mirror of
https://github.com/akuker/RASCSI.git
synced 2025-08-05 01:27:46 +00:00
Move C++ code into cpp/ dir (#941)
- Moved C++ code to cpp/ from src/raspberrypi - Related updates to Makefile, easyinstall.sh, and the github build rules - Removed the native X68k C code in src/x68k from the repo
This commit is contained in:
Daniel Markstedt
GitHub
989
cpp/hal/gpiobus.cpp
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989
cpp/hal/gpiobus.cpp
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@@ -0,0 +1,989 @@
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//---------------------------------------------------------------------------
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//
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// SCSI Target Emulator RaSCSI Reloaded
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// for Raspberry Pi
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//
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// Powered by XM6 TypeG Technology.
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// Copyright (C) 2016-2020 GIMONS
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//
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// [ GPIO-SCSI bus ]
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//
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//---------------------------------------------------------------------------
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#include "hal/gpiobus.h"
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#include "config.h"
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#include "hal/sbc_version.h"
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#include "hal/systimer.h"
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#include "log.h"
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#include "os.h"
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#include <array>
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#include <sys/ioctl.h>
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#include <sys/mman.h>
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#include <sys/time.h>
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#ifdef __linux__
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#include <sys/epoll.h>
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#endif
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#if defined CONNECT_TYPE_STANDARD
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#include "hal/gpiobus_standard.h"
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#elif defined CONNECT_TYPE_FULLSPEC
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#include "hal/gpiobus_fullspec.h"
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#elif defined CONNECT_TYPE_AIBOM
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#include "hal/gpiobus_aibom.h"
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#elif defined CONNECT_TYPE_GAMERNIUM
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#include "hal/gpiobus_gamernium.h"
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#else
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#error Invalid connection type or none specified
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#endif
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//---------------------------------------------------------------------------
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//
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// Constant declarations (bus control timing)
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//
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//---------------------------------------------------------------------------
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// SCSI Bus timings taken from:
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// https://www.staff.uni-mainz.de/tacke/scsi/SCSI2-05.html
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[[maybe_unused]] const static int SCSI_DELAY_ARBITRATION_DELAY_NS = 2400;
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[[maybe_unused]] const static int SCSI_DELAY_ASSERTION_PERIOD_NS = 90;
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[[maybe_unused]] const static int SCSI_DELAY_BUS_CLEAR_DELAY_NS = 800;
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[[maybe_unused]] const static int SCSI_DELAY_BUS_FREE_DELAY_NS = 800;
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[[maybe_unused]] const static int SCSI_DELAY_BUS_SET_DELAY_NS = 1800;
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[[maybe_unused]] const static int SCSI_DELAY_BUS_SETTLE_DELAY_NS = 400;
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[[maybe_unused]] const static int SCSI_DELAY_CABLE_SKEW_DELAY_NS = 10;
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[[maybe_unused]] const static int SCSI_DELAY_DATA_RELEASE_DELAY_NS = 400;
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[[maybe_unused]] const static int SCSI_DELAY_DESKEW_DELAY_NS = 45;
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[[maybe_unused]] const static int SCSI_DELAY_DISCONNECTION_DELAY_US = 200;
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[[maybe_unused]] const static int SCSI_DELAY_HOLD_TIME_NS = 45;
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[[maybe_unused]] const static int SCSI_DELAY_NEGATION_PERIOD_NS = 90;
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[[maybe_unused]] const static int SCSI_DELAY_POWER_ON_TO_SELECTION_TIME_S = 10; // (recommended)
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[[maybe_unused]] const static int SCSI_DELAY_RESET_TO_SELECTION_TIME_US = 250 * 1000; // (recommended)
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[[maybe_unused]] const static int SCSI_DELAY_RESET_HOLD_TIME_US = 25;
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[[maybe_unused]] const static int SCSI_DELAY_SELECTION_ABORT_TIME_US = 200;
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[[maybe_unused]] const static int SCSI_DELAY_SELECTION_TIMEOUT_DELAY_NS = 250 * 1000; // (recommended)
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[[maybe_unused]] const static int SCSI_DELAY_FAST_ASSERTION_PERIOD_NS = 30;
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[[maybe_unused]] const static int SCSI_DELAY_FAST_CABLE_SKEW_DELAY_NS = 5;
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[[maybe_unused]] const static int SCSI_DELAY_FAST_DESKEW_DELAY_NS = 20;
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[[maybe_unused]] const static int SCSI_DELAY_FAST_HOLD_TIME_NS = 10;
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[[maybe_unused]] const static int SCSI_DELAY_FAST_NEGATION_PERIOD_NS = 30;
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// The DaynaPort SCSI Link do a short delay in the middle of transfering
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// a packet. This is the number of uS that will be delayed between the
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// header and the actual data.
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const static int SCSI_DELAY_SEND_DATA_DAYNAPORT_US = 100;
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using namespace std;
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// Nothing SBC hardware specific should be done in this function
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bool GPIOBUS::Init(mode_e mode)
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{
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GPIO_FUNCTION_TRACE
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// Save operation mode
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actmode = mode;
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return true;
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}
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void GPIOBUS::Cleanup()
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{
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#if defined(__x86_64__) || defined(__X86__)
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return;
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#else
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// Release SEL signal interrupt
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#ifdef USE_SEL_EVENT_ENABLE
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close(selevreq.fd);
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#endif // USE_SEL_EVENT_ENABLE
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// Set control signals
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PinSetSignal(PIN_ENB, OFF);
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PinSetSignal(PIN_ACT, OFF);
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PinSetSignal(PIN_TAD, OFF);
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PinSetSignal(PIN_IND, OFF);
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PinSetSignal(PIN_DTD, OFF);
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PinConfig(PIN_ACT, GPIO_INPUT);
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PinConfig(PIN_TAD, GPIO_INPUT);
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PinConfig(PIN_IND, GPIO_INPUT);
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PinConfig(PIN_DTD, GPIO_INPUT);
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// Initialize all signals
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for (int i = 0; SignalTable[i] >= 0; i++) {
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int pin = SignalTable[i];
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PinSetSignal(pin, OFF);
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PinConfig(pin, GPIO_INPUT);
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PullConfig(pin, GPIO_PULLNONE);
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}
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// Set drive strength back to 8mA
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DrvConfig(3);
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#endif // ifdef __x86_64__ || __X86__
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}
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void GPIOBUS::Reset()
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{
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GPIO_FUNCTION_TRACE
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#if defined(__x86_64__) || defined(__X86__)
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return;
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#else
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int i;
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int j;
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// Turn off active signal
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SetControl(PIN_ACT, ACT_OFF);
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// Set all signals to off
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for (i = 0;; i++) {
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j = SignalTable[i];
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if (j < 0) {
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break;
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}
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SetSignal(j, OFF);
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}
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if (actmode == mode_e::TARGET) {
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// Target mode
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// Set target signal to input
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SetControl(PIN_TAD, TAD_IN);
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SetMode(PIN_BSY, IN);
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SetMode(PIN_MSG, IN);
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SetMode(PIN_CD, IN);
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SetMode(PIN_REQ, IN);
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SetMode(PIN_IO, IN);
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// Set the initiator signal to input
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SetControl(PIN_IND, IND_IN);
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SetMode(PIN_SEL, IN);
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SetMode(PIN_ATN, IN);
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SetMode(PIN_ACK, IN);
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SetMode(PIN_RST, IN);
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// Set data bus signals to input
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SetControl(PIN_DTD, DTD_IN);
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SetMode(PIN_DT0, IN);
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SetMode(PIN_DT1, IN);
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SetMode(PIN_DT2, IN);
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SetMode(PIN_DT3, IN);
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SetMode(PIN_DT4, IN);
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SetMode(PIN_DT5, IN);
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SetMode(PIN_DT6, IN);
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SetMode(PIN_DT7, IN);
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SetMode(PIN_DP, IN);
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} else {
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// Initiator mode
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// Set target signal to input
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SetControl(PIN_TAD, TAD_IN);
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SetMode(PIN_BSY, IN);
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SetMode(PIN_MSG, IN);
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SetMode(PIN_CD, IN);
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SetMode(PIN_REQ, IN);
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SetMode(PIN_IO, IN);
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// Set the initiator signal to output
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SetControl(PIN_IND, IND_OUT);
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SetMode(PIN_SEL, OUT);
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SetMode(PIN_ATN, OUT);
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SetMode(PIN_ACK, OUT);
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SetMode(PIN_RST, OUT);
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// Set the data bus signals to output
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SetControl(PIN_DTD, DTD_OUT);
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SetMode(PIN_DT0, OUT);
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SetMode(PIN_DT1, OUT);
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SetMode(PIN_DT2, OUT);
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SetMode(PIN_DT3, OUT);
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SetMode(PIN_DT4, OUT);
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SetMode(PIN_DT5, OUT);
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SetMode(PIN_DT6, OUT);
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SetMode(PIN_DT7, OUT);
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SetMode(PIN_DP, OUT);
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}
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// Initialize all signals
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signals = 0;
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#endif // ifdef __x86_64__ || __X86__
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}
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void GPIOBUS::SetENB(bool ast)
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{
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GPIO_FUNCTION_TRACE
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PinSetSignal(PIN_ENB, ast ? ENB_ON : ENB_OFF);
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}
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bool GPIOBUS::GetBSY() const
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{
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GPIO_FUNCTION_TRACE
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return GetSignal(PIN_BSY);
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}
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void GPIOBUS::SetBSY(bool ast)
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{
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GPIO_FUNCTION_TRACE
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// Set BSY signal
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SetSignal(PIN_BSY, ast);
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if (actmode == mode_e::TARGET) {
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if (ast) {
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// Turn on ACTIVE signal
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SetControl(PIN_ACT, ACT_ON);
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// Set Target signal to output
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SetControl(PIN_TAD, TAD_OUT);
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SetMode(PIN_BSY, OUT);
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SetMode(PIN_MSG, OUT);
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SetMode(PIN_CD, OUT);
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SetMode(PIN_REQ, OUT);
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SetMode(PIN_IO, OUT);
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} else {
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// Turn off the ACTIVE signal
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SetControl(PIN_ACT, ACT_OFF);
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// Set the target signal to input
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SetControl(PIN_TAD, TAD_IN);
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SetMode(PIN_BSY, IN);
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SetMode(PIN_MSG, IN);
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SetMode(PIN_CD, IN);
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SetMode(PIN_REQ, IN);
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SetMode(PIN_IO, IN);
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}
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}
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}
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bool GPIOBUS::GetSEL() const
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{
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GPIO_FUNCTION_TRACE
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return GetSignal(PIN_SEL);
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}
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void GPIOBUS::SetSEL(bool ast)
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{
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GPIO_FUNCTION_TRACE
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if (actmode == mode_e::INITIATOR && ast) {
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// Turn on ACTIVE signal
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SetControl(PIN_ACT, ACT_ON);
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}
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// Set SEL signal
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SetSignal(PIN_SEL, ast);
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}
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bool GPIOBUS::GetATN() const
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{
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GPIO_FUNCTION_TRACE
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return GetSignal(PIN_ATN);
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}
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void GPIOBUS::SetATN(bool ast)
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{
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GPIO_FUNCTION_TRACE
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SetSignal(PIN_ATN, ast);
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}
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bool GPIOBUS::GetACK() const
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{
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GPIO_FUNCTION_TRACE
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return GetSignal(PIN_ACK);
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}
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void GPIOBUS::SetACK(bool ast)
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{
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GPIO_FUNCTION_TRACE
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SetSignal(PIN_ACK, ast);
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}
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bool GPIOBUS::GetACT() const
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{
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GPIO_FUNCTION_TRACE
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return GetSignal(PIN_ACT);
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}
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void GPIOBUS::SetACT(bool ast)
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{
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GPIO_FUNCTION_TRACE
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SetSignal(PIN_ACT, ast);
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}
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bool GPIOBUS::GetRST() const
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{
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GPIO_FUNCTION_TRACE
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return GetSignal(PIN_RST);
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}
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void GPIOBUS::SetRST(bool ast)
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{
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GPIO_FUNCTION_TRACE
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SetSignal(PIN_RST, ast);
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}
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bool GPIOBUS::GetMSG() const
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{
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GPIO_FUNCTION_TRACE
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return GetSignal(PIN_MSG);
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}
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void GPIOBUS::SetMSG(bool ast)
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{
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GPIO_FUNCTION_TRACE
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SetSignal(PIN_MSG, ast);
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}
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bool GPIOBUS::GetCD() const
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{
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GPIO_FUNCTION_TRACE
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return GetSignal(PIN_CD);
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}
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void GPIOBUS::SetCD(bool ast)
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{
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GPIO_FUNCTION_TRACE
|
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SetSignal(PIN_CD, ast);
|
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}
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|
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bool GPIOBUS::GetIO()
|
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{
|
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GPIO_FUNCTION_TRACE
|
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bool ast = GetSignal(PIN_IO);
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if (actmode == mode_e::INITIATOR) {
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// Change the data input/output direction by IO signal
|
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if (ast) {
|
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SetControl(PIN_DTD, DTD_IN);
|
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SetMode(PIN_DT0, IN);
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SetMode(PIN_DT1, IN);
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SetMode(PIN_DT2, IN);
|
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SetMode(PIN_DT3, IN);
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SetMode(PIN_DT4, IN);
|
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SetMode(PIN_DT5, IN);
|
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SetMode(PIN_DT6, IN);
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SetMode(PIN_DT7, IN);
|
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SetMode(PIN_DP, IN);
|
||||
} else {
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||||
SetControl(PIN_DTD, DTD_OUT);
|
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SetMode(PIN_DT0, OUT);
|
||||
SetMode(PIN_DT1, OUT);
|
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SetMode(PIN_DT2, OUT);
|
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SetMode(PIN_DT3, OUT);
|
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SetMode(PIN_DT4, OUT);
|
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SetMode(PIN_DT5, OUT);
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SetMode(PIN_DT6, OUT);
|
||||
SetMode(PIN_DT7, OUT);
|
||||
SetMode(PIN_DP, OUT);
|
||||
}
|
||||
}
|
||||
|
||||
return ast;
|
||||
}
|
||||
|
||||
void GPIOBUS::SetIO(bool ast)
|
||||
{
|
||||
GPIO_FUNCTION_TRACE
|
||||
SetSignal(PIN_IO, ast);
|
||||
|
||||
if (actmode == mode_e::TARGET) {
|
||||
// Change the data input/output direction by IO signal
|
||||
if (ast) {
|
||||
SetControl(PIN_DTD, DTD_OUT);
|
||||
SetDAT(0);
|
||||
SetMode(PIN_DT0, OUT);
|
||||
SetMode(PIN_DT1, OUT);
|
||||
SetMode(PIN_DT2, OUT);
|
||||
SetMode(PIN_DT3, OUT);
|
||||
SetMode(PIN_DT4, OUT);
|
||||
SetMode(PIN_DT5, OUT);
|
||||
SetMode(PIN_DT6, OUT);
|
||||
SetMode(PIN_DT7, OUT);
|
||||
SetMode(PIN_DP, OUT);
|
||||
} else {
|
||||
SetControl(PIN_DTD, DTD_IN);
|
||||
SetMode(PIN_DT0, IN);
|
||||
SetMode(PIN_DT1, IN);
|
||||
SetMode(PIN_DT2, IN);
|
||||
SetMode(PIN_DT3, IN);
|
||||
SetMode(PIN_DT4, IN);
|
||||
SetMode(PIN_DT5, IN);
|
||||
SetMode(PIN_DT6, IN);
|
||||
SetMode(PIN_DT7, IN);
|
||||
SetMode(PIN_DP, IN);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
bool GPIOBUS::GetREQ() const
|
||||
{
|
||||
GPIO_FUNCTION_TRACE
|
||||
return GetSignal(PIN_REQ);
|
||||
}
|
||||
|
||||
void GPIOBUS::SetREQ(bool ast)
|
||||
{
|
||||
GPIO_FUNCTION_TRACE
|
||||
SetSignal(PIN_REQ, ast);
|
||||
}
|
||||
|
||||
bool GPIOBUS::GetDP() const
|
||||
{
|
||||
GPIO_FUNCTION_TRACE
|
||||
return GetSignal(PIN_DP);
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Receive command handshake
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
int GPIOBUS::CommandHandShake(BYTE *buf)
|
||||
{
|
||||
GPIO_FUNCTION_TRACE
|
||||
// Only works in TARGET mode
|
||||
if (actmode != mode_e::TARGET) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
DisableIRQ();
|
||||
|
||||
// Assert REQ signal
|
||||
SetSignal(PIN_REQ, ON);
|
||||
|
||||
// Wait for ACK signal
|
||||
bool ret = WaitSignal(PIN_ACK, ON);
|
||||
|
||||
// Wait until the signal line stabilizes
|
||||
SysTimer::SleepNsec(SCSI_DELAY_BUS_SETTLE_DELAY_NS);
|
||||
|
||||
// Get data
|
||||
*buf = GetDAT();
|
||||
|
||||
// Disable REQ signal
|
||||
SetSignal(PIN_REQ, OFF);
|
||||
|
||||
// Timeout waiting for ACK assertion
|
||||
if (!ret) {
|
||||
EnableIRQ();
|
||||
return 0;
|
||||
}
|
||||
|
||||
// Wait for ACK to clear
|
||||
ret = WaitSignal(PIN_ACK, OFF);
|
||||
|
||||
// Timeout waiting for ACK to clear
|
||||
if (!ret) {
|
||||
EnableIRQ();
|
||||
return 0;
|
||||
}
|
||||
|
||||
// The ICD AdSCSI ST, AdSCSI Plus ST and AdSCSI Micro ST host adapters allow SCSI devices to be connected
|
||||
// to the ACSI bus of Atari ST/TT computers and some clones. ICD-aware drivers prepend a $1F byte in front
|
||||
// of the CDB (effectively resulting in a custom SCSI command) in order to get access to the full SCSI
|
||||
// command set. Native ACSI is limited to the low SCSI command classes with command bytes < $20.
|
||||
// Most other host adapters (e.g. LINK96/97 and the one by Inventronik) and also several devices (e.g.
|
||||
// UltraSatan or GigaFile) that can directly be connected to the Atari's ACSI port also support ICD
|
||||
// semantics. I fact, these semantics have become a standard in the Atari world.
|
||||
|
||||
// RaSCSI becomes ICD compatible by ignoring the prepended $1F byte before processing the CDB.
|
||||
if (*buf == 0x1F) {
|
||||
SetSignal(PIN_REQ, ON);
|
||||
|
||||
ret = WaitSignal(PIN_ACK, ON);
|
||||
|
||||
SysTimer::SleepNsec(SCSI_DELAY_BUS_SETTLE_DELAY_NS);
|
||||
|
||||
// Get the actual SCSI command
|
||||
*buf = GetDAT();
|
||||
|
||||
SetSignal(PIN_REQ, OFF);
|
||||
|
||||
if (!ret) {
|
||||
EnableIRQ();
|
||||
return 0;
|
||||
}
|
||||
|
||||
WaitSignal(PIN_ACK, OFF);
|
||||
|
||||
if (!ret) {
|
||||
EnableIRQ();
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
int command_byte_count = GetCommandByteCount(*buf);
|
||||
|
||||
// Increment buffer pointer
|
||||
buf++;
|
||||
|
||||
int bytes_received;
|
||||
for (bytes_received = 1; bytes_received < command_byte_count; bytes_received++) {
|
||||
// Assert REQ signal
|
||||
SetSignal(PIN_REQ, ON);
|
||||
|
||||
// Wait for ACK signal
|
||||
ret = WaitSignal(PIN_ACK, ON);
|
||||
|
||||
// Wait until the signal line stabilizes
|
||||
SysTimer::SleepNsec(SCSI_DELAY_BUS_SETTLE_DELAY_NS);
|
||||
|
||||
// Get data
|
||||
*buf = GetDAT();
|
||||
|
||||
// Clear the REQ signal
|
||||
SetSignal(PIN_REQ, OFF);
|
||||
|
||||
// Check for timeout waiting for ACK assertion
|
||||
if (!ret) {
|
||||
break;
|
||||
}
|
||||
|
||||
// Wait for ACK to clear
|
||||
ret = WaitSignal(PIN_ACK, OFF);
|
||||
|
||||
// Check for timeout waiting for ACK to clear
|
||||
if (!ret) {
|
||||
break;
|
||||
}
|
||||
|
||||
// Advance the buffer pointer to receive the next byte
|
||||
buf++;
|
||||
}
|
||||
|
||||
EnableIRQ();
|
||||
|
||||
return bytes_received;
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Data reception handshake
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
int GPIOBUS::ReceiveHandShake(BYTE *buf, int count)
|
||||
{
|
||||
GPIO_FUNCTION_TRACE
|
||||
|
||||
int i;
|
||||
|
||||
// Disable IRQs
|
||||
DisableIRQ();
|
||||
|
||||
if (actmode == mode_e::TARGET) {
|
||||
for (i = 0; i < count; i++) {
|
||||
// Assert the REQ signal
|
||||
SetSignal(PIN_REQ, ON);
|
||||
|
||||
// Wait for ACK
|
||||
bool ret = WaitSignal(PIN_ACK, ON);
|
||||
|
||||
// Wait until the signal line stabilizes
|
||||
SysTimer::SleepNsec(SCSI_DELAY_BUS_SETTLE_DELAY_NS);
|
||||
|
||||
// Get data
|
||||
*buf = GetDAT();
|
||||
|
||||
// Clear the REQ signal
|
||||
SetSignal(PIN_REQ, OFF);
|
||||
|
||||
// Check for timeout waiting for ACK signal
|
||||
if (!ret) {
|
||||
break;
|
||||
}
|
||||
|
||||
// Wait for ACK to clear
|
||||
ret = WaitSignal(PIN_ACK, OFF);
|
||||
|
||||
// Check for timeout waiting for ACK to clear
|
||||
if (!ret) {
|
||||
break;
|
||||
}
|
||||
|
||||
// Advance the buffer pointer to receive the next byte
|
||||
buf++;
|
||||
}
|
||||
} else {
|
||||
// Get phase
|
||||
uint32_t phase = Acquire() & GPIO_MCI;
|
||||
|
||||
for (i = 0; i < count; i++) {
|
||||
// Wait for the REQ signal to be asserted
|
||||
bool ret = WaitSignal(PIN_REQ, ON);
|
||||
|
||||
// Check for timeout waiting for REQ signal
|
||||
if (!ret) {
|
||||
break;
|
||||
}
|
||||
|
||||
// Phase error
|
||||
if ((signals & GPIO_MCI) != phase) {
|
||||
break;
|
||||
}
|
||||
|
||||
// Wait until the signal line stabilizes
|
||||
SysTimer::SleepNsec(SCSI_DELAY_BUS_SETTLE_DELAY_NS);
|
||||
|
||||
// Get data
|
||||
*buf = GetDAT();
|
||||
|
||||
// Assert the ACK signal
|
||||
SetSignal(PIN_ACK, ON);
|
||||
|
||||
// Wait for REQ to clear
|
||||
ret = WaitSignal(PIN_REQ, OFF);
|
||||
|
||||
// Clear the ACK signal
|
||||
SetSignal(PIN_ACK, OFF);
|
||||
|
||||
// Check for timeout waiting for REQ to clear
|
||||
if (!ret) {
|
||||
break;
|
||||
}
|
||||
|
||||
// Phase error
|
||||
if ((signals & GPIO_MCI) != phase) {
|
||||
break;
|
||||
}
|
||||
|
||||
// Advance the buffer pointer to receive the next byte
|
||||
buf++;
|
||||
}
|
||||
}
|
||||
|
||||
// Re-enable IRQ
|
||||
EnableIRQ();
|
||||
|
||||
// Return the number of bytes received
|
||||
return i;
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Data transmission handshake
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
int GPIOBUS::SendHandShake(BYTE *buf, int count, int delay_after_bytes)
|
||||
{
|
||||
GPIO_FUNCTION_TRACE
|
||||
|
||||
int i;
|
||||
|
||||
// Disable IRQs
|
||||
DisableIRQ();
|
||||
|
||||
if (actmode == mode_e::TARGET) {
|
||||
for (i = 0; i < count; i++) {
|
||||
if (i == delay_after_bytes) {
|
||||
LOGTRACE("%s DELAYING for %dus after %d bytes", __PRETTY_FUNCTION__, SCSI_DELAY_SEND_DATA_DAYNAPORT_US,
|
||||
(int)delay_after_bytes)
|
||||
SysTimer::SleepUsec(SCSI_DELAY_SEND_DATA_DAYNAPORT_US);
|
||||
}
|
||||
|
||||
// Set the DATA signals
|
||||
SetDAT(*buf);
|
||||
|
||||
// Wait for ACK to clear
|
||||
bool ret = WaitSignal(PIN_ACK, OFF);
|
||||
|
||||
// Check for timeout waiting for ACK to clear
|
||||
if (!ret) {
|
||||
break;
|
||||
}
|
||||
|
||||
// Already waiting for ACK to clear
|
||||
|
||||
// Assert the REQ signal
|
||||
SetSignal(PIN_REQ, ON);
|
||||
|
||||
// Wait for ACK
|
||||
ret = WaitSignal(PIN_ACK, ON);
|
||||
|
||||
// Clear REQ signal
|
||||
SetSignal(PIN_REQ, OFF);
|
||||
|
||||
// Check for timeout waiting for ACK to clear
|
||||
if (!ret) {
|
||||
break;
|
||||
}
|
||||
|
||||
// Advance the data buffer pointer to receive the next byte
|
||||
buf++;
|
||||
}
|
||||
|
||||
// Wait for ACK to clear
|
||||
WaitSignal(PIN_ACK, OFF);
|
||||
} else {
|
||||
// Get Phase
|
||||
uint32_t phase = Acquire() & GPIO_MCI;
|
||||
|
||||
for (i = 0; i < count; i++) {
|
||||
if (i == delay_after_bytes) {
|
||||
LOGTRACE("%s DELAYING for %dus after %d bytes", __PRETTY_FUNCTION__, SCSI_DELAY_SEND_DATA_DAYNAPORT_US,
|
||||
(int)delay_after_bytes)
|
||||
SysTimer::SleepUsec(SCSI_DELAY_SEND_DATA_DAYNAPORT_US);
|
||||
}
|
||||
|
||||
// Set the DATA signals
|
||||
SetDAT(*buf);
|
||||
|
||||
// Wait for REQ to be asserted
|
||||
bool ret = WaitSignal(PIN_REQ, ON);
|
||||
|
||||
// Check for timeout waiting for REQ to be asserted
|
||||
if (!ret) {
|
||||
break;
|
||||
}
|
||||
|
||||
// Phase error
|
||||
if ((signals & GPIO_MCI) != phase) {
|
||||
break;
|
||||
}
|
||||
|
||||
// Already waiting for REQ assertion
|
||||
|
||||
// Assert the ACK signal
|
||||
SetSignal(PIN_ACK, ON);
|
||||
|
||||
// Wait for REQ to clear
|
||||
ret = WaitSignal(PIN_REQ, OFF);
|
||||
|
||||
// Clear the ACK signal
|
||||
SetSignal(PIN_ACK, OFF);
|
||||
|
||||
// Check for timeout waiting for REQ to clear
|
||||
if (!ret) {
|
||||
break;
|
||||
}
|
||||
|
||||
// Phase error
|
||||
if ((signals & GPIO_MCI) != phase) {
|
||||
break;
|
||||
}
|
||||
|
||||
// Advance the data buffer pointer to receive the next byte
|
||||
buf++;
|
||||
}
|
||||
}
|
||||
|
||||
// Re-enable IRQ
|
||||
EnableIRQ();
|
||||
|
||||
// Return number of transmissions
|
||||
return i;
|
||||
}
|
||||
|
||||
#ifdef USE_SEL_EVENT_ENABLE
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// SEL signal event polling
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
bool GPIOBUS::PollSelectEvent()
|
||||
{
|
||||
GPIO_FUNCTION_TRACE
|
||||
errno = 0;
|
||||
|
||||
if (epoll_event epev; epoll_wait(epfd, &epev, 1, -1) <= 0) {
|
||||
LOGWARN("%s epoll_wait failed", __PRETTY_FUNCTION__)
|
||||
LOGWARN("[%08X] %s", errno, strerror(errno))
|
||||
return false;
|
||||
}
|
||||
|
||||
if (gpioevent_data gpev; read(selevreq.fd, &gpev, sizeof(gpev)) < 0) {
|
||||
LOGWARN("%s read failed", __PRETTY_FUNCTION__)
|
||||
LOGWARN("[%08X] %s", errno, strerror(errno))
|
||||
return false;
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Cancel SEL signal event
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
void GPIOBUS::ClearSelectEvent()
|
||||
{
|
||||
GPIO_FUNCTION_TRACE
|
||||
}
|
||||
#endif // USE_SEL_EVENT_ENABLE
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Signal table
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
const array<int, 19> GPIOBUS::SignalTable = {PIN_DT0, PIN_DT1, PIN_DT2, PIN_DT3, PIN_DT4, PIN_DT5, PIN_DT6,
|
||||
PIN_DT7, PIN_DP, PIN_SEL, PIN_ATN, PIN_RST, PIN_ACK, PIN_BSY,
|
||||
PIN_MSG, PIN_CD, PIN_IO, PIN_REQ, -1};
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Create work table
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
void GPIOBUS::MakeTable(void)
|
||||
{
|
||||
GPIO_FUNCTION_TRACE
|
||||
|
||||
const array<int, 9> pintbl = {PIN_DT0, PIN_DT1, PIN_DT2, PIN_DT3, PIN_DT4, PIN_DT5, PIN_DT6, PIN_DT7, PIN_DP};
|
||||
|
||||
array<bool, 256> tblParity;
|
||||
|
||||
// Create parity table
|
||||
for (uint32_t i = 0; i < 0x100; i++) {
|
||||
uint32_t bits = i;
|
||||
uint32_t parity = 0;
|
||||
for (int j = 0; j < 8; j++) {
|
||||
parity ^= bits & 1;
|
||||
bits >>= 1;
|
||||
}
|
||||
parity = ~parity;
|
||||
tblParity[i] = parity & 1;
|
||||
}
|
||||
|
||||
#if SIGNAL_CONTROL_MODE == 0
|
||||
// Mask and setting data generation
|
||||
for (auto &tbl : tblDatMsk) {
|
||||
tbl.fill(-1);
|
||||
}
|
||||
for (auto &tbl : tblDatSet) {
|
||||
tbl.fill(0);
|
||||
}
|
||||
|
||||
for (uint32_t i = 0; i < 0x100; i++) {
|
||||
// Bit string for inspection
|
||||
uint32_t bits = i;
|
||||
|
||||
// Get parity
|
||||
if (tblParity[i]) {
|
||||
bits |= (1 << 8);
|
||||
}
|
||||
|
||||
// Bit check
|
||||
for (int j = 0; j < 9; j++) {
|
||||
// Index and shift amount calculation
|
||||
int index = pintbl[j] / 10;
|
||||
int shift = (pintbl[j] % 10) * 3;
|
||||
|
||||
// Mask data
|
||||
tblDatMsk[index][i] &= ~(0x7 << shift);
|
||||
|
||||
// Setting data
|
||||
if (bits & 1) {
|
||||
tblDatSet[index][i] |= (1 << shift);
|
||||
}
|
||||
|
||||
bits >>= 1;
|
||||
}
|
||||
}
|
||||
#else
|
||||
for (uint32_t i = 0; i < 0x100; i++) {
|
||||
// Bit string for inspection
|
||||
uint32_t bits = i;
|
||||
|
||||
// Get parity
|
||||
if (tblParity[i]) {
|
||||
bits |= (1 << 8);
|
||||
}
|
||||
|
||||
#if SIGNAL_CONTROL_MODE == 1
|
||||
// Negative logic is inverted
|
||||
bits = ~bits;
|
||||
#endif
|
||||
|
||||
// Create GPIO register information
|
||||
uint32_t gpclr = 0;
|
||||
uint32_t gpset = 0;
|
||||
for (int j = 0; j < 9; j++) {
|
||||
if (bits & 1) {
|
||||
gpset |= (1 << pintbl[j]);
|
||||
} else {
|
||||
gpclr |= (1 << pintbl[j]);
|
||||
}
|
||||
bits >>= 1;
|
||||
}
|
||||
|
||||
tblDatMsk[i] = gpclr;
|
||||
tblDatSet[i] = gpset;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Wait for signal change
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
bool GPIOBUS::WaitSignal(int pin, int ast)
|
||||
{
|
||||
GPIO_FUNCTION_TRACE
|
||||
|
||||
// Get current time
|
||||
uint32_t now = SysTimer::GetTimerLow();
|
||||
|
||||
// Calculate timeout (3000ms)
|
||||
uint32_t timeout = 3000 * 1000;
|
||||
|
||||
// end immediately if the signal has changed
|
||||
do {
|
||||
// Immediately upon receiving a reset
|
||||
Acquire();
|
||||
if (GetRST()) {
|
||||
return false;
|
||||
}
|
||||
|
||||
// Check for the signal edge
|
||||
if (((signals >> pin) ^ ~ast) & 1) {
|
||||
return true;
|
||||
}
|
||||
} while ((SysTimer::GetTimerLow() - now) < timeout);
|
||||
|
||||
// We timed out waiting for the signal
|
||||
return false;
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Generic Phase Acquisition (Doesn't read GPIO)
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
BUS::phase_t GPIOBUS::GetPhaseRaw(uint32_t raw_data)
|
||||
{
|
||||
GPIO_FUNCTION_TRACE
|
||||
// Selection Phase
|
||||
if (GetPinRaw(raw_data, PIN_SEL)) {
|
||||
if (GetPinRaw(raw_data, PIN_IO)) {
|
||||
return BUS::phase_t::reselection;
|
||||
} else {
|
||||
return BUS::phase_t::selection;
|
||||
}
|
||||
}
|
||||
|
||||
// Bus busy phase
|
||||
if (!GetPinRaw(raw_data, PIN_BSY)) {
|
||||
return BUS::phase_t::busfree;
|
||||
}
|
||||
|
||||
// Get target phase from bus signal line
|
||||
int mci = GetPinRaw(raw_data, PIN_MSG) ? 0x04 : 0x00;
|
||||
mci |= GetPinRaw(raw_data, PIN_CD) ? 0x02 : 0x00;
|
||||
mci |= GetPinRaw(raw_data, PIN_IO) ? 0x01 : 0x00;
|
||||
return GetPhase(mci);
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Get the number of bytes for a command
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
int GPIOBUS::GetCommandByteCount(BYTE opcode)
|
||||
{
|
||||
GPIO_FUNCTION_TRACE
|
||||
|
||||
if (opcode == 0x88 || opcode == 0x8A || opcode == 0x8F || opcode == 0x91 || opcode == 0x9E || opcode == 0x9F) {
|
||||
return 16;
|
||||
} else if (opcode == 0xA0) {
|
||||
return 12;
|
||||
} else if (opcode == 0x05 || (opcode >= 0x20 && opcode <= 0x7D)) {
|
||||
return 10;
|
||||
} else {
|
||||
return 6;
|
||||
}
|
||||
}
|
||||
440
cpp/hal/gpiobus.h
Normal file
440
cpp/hal/gpiobus.h
Normal file
@@ -0,0 +1,440 @@
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// SCSI Target Emulator RaSCSI Reloaded
|
||||
// for Raspberry Pi
|
||||
//
|
||||
// Powered by XM6 TypeG Technology.
|
||||
// Copyright (C) 2016-2020 GIMONS
|
||||
// [ GPIO-SCSI bus ]
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "config.h"
|
||||
#include "scsi.h"
|
||||
#include <array>
|
||||
|
||||
#ifdef __linux__
|
||||
#include <linux/gpio.h>
|
||||
#endif
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Connection method definitions
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
//#define CONNECT_TYPE_STANDARD // Standard (SCSI logic, standard pin assignment)
|
||||
//#define CONNECT_TYPE_FULLSPEC // Full spec (SCSI logic, standard pin assignment)
|
||||
//#define CONNECT_TYPE_AIBOM // AIBOM version (positive logic, unique pin assignment)
|
||||
//#define CONNECT_TYPE_GAMERNIUM // GAMERnium.com version (standard logic, unique pin assignment)
|
||||
|
||||
#if defined CONNECT_TYPE_STANDARD
|
||||
#include "hal/gpiobus_standard.h"
|
||||
#elif defined CONNECT_TYPE_FULLSPEC
|
||||
#include "hal/gpiobus_fullspec.h"
|
||||
#elif defined CONNECT_TYPE_AIBOM
|
||||
#include "hal/gpiobus_aibom.h"
|
||||
#elif defined CONNECT_TYPE_GAMERNIUM
|
||||
#include "hal/gpiobus_gamernium.h"
|
||||
#else
|
||||
#error Invalid connection type or none specified
|
||||
#endif
|
||||
|
||||
#ifdef ENABLE_GPIO_TRACE
|
||||
#define GPIO_FUNCTION_TRACE LOGTRACE("%s", __PRETTY_FUNCTION__)
|
||||
#else
|
||||
#define GPIO_FUNCTION_TRACE
|
||||
#endif
|
||||
|
||||
using namespace std; // NOSONAR Not relevant for rascsi
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Signal control logic and pin assignment customization
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// SIGNAL_CONTROL_MODE: Signal control mode selection
|
||||
// You can customize the signal control logic from Version 1.22
|
||||
//
|
||||
// 0:SCSI logical specification
|
||||
// Conversion board using 74LS641-1 etc. directly connected or published on HP
|
||||
// True : 0V
|
||||
// False : Open collector output (disconnect from bus)
|
||||
//
|
||||
// 1:Negative logic specification (when using conversion board for negative logic -> SCSI logic)
|
||||
// There is no conversion board with this specification at this time
|
||||
// True : 0V -> (CONVERT) -> 0V
|
||||
// False : 3.3V -> (CONVERT) -> Open collector output
|
||||
//
|
||||
// 2:Positive logic specification (when using the conversion board for positive logic -> SCSI logic)
|
||||
// RaSCSI Adapter Rev.C @132sync etc.
|
||||
//
|
||||
// True : 3.3V -> (CONVERT) -> 0V
|
||||
// False : 0V -> (CONVERT) -> Open collector output
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Control signal pin assignment setting
|
||||
// GPIO pin mapping table for control signals.
|
||||
//
|
||||
// Control signal:
|
||||
// PIN_ACT
|
||||
// Signal that indicates the status of processing SCSI command.
|
||||
// PIN_ENB
|
||||
// Signal that indicates the valid signal from start to finish.
|
||||
// PIN_TAD
|
||||
// Signal that indicates the input/output direction of the target signal (BSY,IO,CD,MSG,REG).
|
||||
// PIN_IND
|
||||
// Signal that indicates the input/output direction of the initiator signal (SEL, ATN, RST, ACK).
|
||||
// PIN_DTD
|
||||
// Signal that indicates the input/output direction of the data lines (DT0...DT7,DP).
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Control signal output logic
|
||||
// 0V:FALSE 3.3V:TRUE
|
||||
//
|
||||
// ACT_ON
|
||||
// PIN_ACT signal
|
||||
// ENB_ON
|
||||
// PIN_ENB signal
|
||||
// TAD_IN
|
||||
// PIN_TAD This is the logic when inputting.
|
||||
// IND_IN
|
||||
// PIN_ENB This is the logic when inputting.
|
||||
// DTD_IN
|
||||
// PIN_ENB This is the logic when inputting.
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// SCSI signal pin assignment setting
|
||||
// GPIO pin mapping table for SCSI signals.
|
||||
// PIN_DT0～PIN_SEL
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
|
||||
#define ALL_SCSI_PINS \
|
||||
((1 << PIN_DT0) | (1 << PIN_DT1) | (1 << PIN_DT2) | (1 << PIN_DT3) | (1 << PIN_DT4) | (1 << PIN_DT5) | \
|
||||
(1 << PIN_DT6) | (1 << PIN_DT7) | (1 << PIN_DP) | (1 << PIN_ATN) | (1 << PIN_RST) | (1 << PIN_ACK) | \
|
||||
(1 << PIN_REQ) | (1 << PIN_MSG) | (1 << PIN_CD) | (1 << PIN_IO) | (1 << PIN_BSY) | (1 << PIN_SEL))
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Constant declarations (GPIO)
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
const static uint32_t SYST_OFFSET = 0x00003000;
|
||||
const static uint32_t IRPT_OFFSET = 0x0000B200;
|
||||
const static uint32_t ARMT_OFFSET = 0x0000B400;
|
||||
const static uint32_t PADS_OFFSET = 0x00100000;
|
||||
const static uint32_t GPIO_OFFSET = 0x00200000;
|
||||
const static uint32_t QA7_OFFSET = 0x01000000;
|
||||
|
||||
const static int GPIO_INPUT = 0;
|
||||
const static int GPIO_OUTPUT = 1;
|
||||
const static int GPIO_PULLNONE = 0;
|
||||
const static int GPIO_PULLDOWN = 1;
|
||||
const static int GPIO_PULLUP = 2;
|
||||
const static int GPIO_FSEL_0 = 0;
|
||||
const static int GPIO_FSEL_1 = 1;
|
||||
const static int GPIO_FSEL_2 = 2;
|
||||
const static int GPIO_FSEL_3 = 3;
|
||||
const static int GPIO_SET_0 = 7;
|
||||
const static int GPIO_CLR_0 = 10;
|
||||
const static int GPIO_LEV_0 = 13;
|
||||
const static int GPIO_EDS_0 = 16;
|
||||
const static int GPIO_REN_0 = 19;
|
||||
const static int GPIO_FEN_0 = 22;
|
||||
const static int GPIO_HEN_0 = 25;
|
||||
const static int GPIO_LEN_0 = 28;
|
||||
const static int GPIO_AREN_0 = 31;
|
||||
const static int GPIO_AFEN_0 = 34;
|
||||
const static int GPIO_PUD = 37;
|
||||
const static int GPIO_CLK_0 = 38;
|
||||
const static int GPIO_GPPINMUXSD = 52;
|
||||
const static int GPIO_PUPPDN0 = 57;
|
||||
const static int GPIO_PUPPDN1 = 58;
|
||||
const static int GPIO_PUPPDN3 = 59;
|
||||
const static int GPIO_PUPPDN4 = 60;
|
||||
const static int PAD_0_27 = 11;
|
||||
const static int SYST_CS = 0;
|
||||
const static int SYST_CLO = 1;
|
||||
const static int SYST_CHI = 2;
|
||||
const static int SYST_C0 = 3;
|
||||
const static int SYST_C1 = 4;
|
||||
const static int SYST_C2 = 5;
|
||||
const static int SYST_C3 = 6;
|
||||
const static int ARMT_LOAD = 0;
|
||||
const static int ARMT_VALUE = 1;
|
||||
const static int ARMT_CTRL = 2;
|
||||
const static int ARMT_CLRIRQ = 3;
|
||||
const static int ARMT_RAWIRQ = 4;
|
||||
const static int ARMT_MSKIRQ = 5;
|
||||
const static int ARMT_RELOAD = 6;
|
||||
const static int ARMT_PREDIV = 7;
|
||||
const static int ARMT_FREERUN = 8;
|
||||
const static int IRPT_PND_IRQ_B = 0;
|
||||
const static int IRPT_PND_IRQ_1 = 1;
|
||||
const static int IRPT_PND_IRQ_2 = 2;
|
||||
const static int IRPT_FIQ_CNTL = 3;
|
||||
const static int IRPT_ENB_IRQ_1 = 4;
|
||||
const static int IRPT_ENB_IRQ_2 = 5;
|
||||
const static int IRPT_ENB_IRQ_B = 6;
|
||||
const static int IRPT_DIS_IRQ_1 = 7;
|
||||
const static int IRPT_DIS_IRQ_2 = 8;
|
||||
const static int IRPT_DIS_IRQ_B = 9;
|
||||
const static int QA7_CORE0_TINTC = 16;
|
||||
const static int GPIO_IRQ = (32 + 20); // GPIO3
|
||||
|
||||
#define GPIO_INEDGE ((1 << PIN_BSY) | (1 << PIN_SEL) | (1 << PIN_ATN) | (1 << PIN_ACK) | (1 << PIN_RST))
|
||||
|
||||
#define GPIO_MCI ((1 << PIN_MSG) | (1 << PIN_CD) | (1 << PIN_IO))
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Constant declarations (GIC)
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
const static uint32_t ARM_GICD_BASE = 0xFF841000;
|
||||
const static uint32_t ARM_GICC_BASE = 0xFF842000;
|
||||
const static uint32_t ARM_GIC_END = 0xFF847FFF;
|
||||
const static int GICD_CTLR = 0x000;
|
||||
const static int GICD_IGROUPR0 = 0x020;
|
||||
const static int GICD_ISENABLER0 = 0x040;
|
||||
const static int GICD_ICENABLER0 = 0x060;
|
||||
const static int GICD_ISPENDR0 = 0x080;
|
||||
const static int GICD_ICPENDR0 = 0x0A0;
|
||||
const static int GICD_ISACTIVER0 = 0x0C0;
|
||||
const static int GICD_ICACTIVER0 = 0x0E0;
|
||||
const static int GICD_IPRIORITYR0 = 0x100;
|
||||
const static int GICD_ITARGETSR0 = 0x200;
|
||||
const static int GICD_ICFGR0 = 0x300;
|
||||
const static int GICD_SGIR = 0x3C0;
|
||||
const static int GICC_CTLR = 0x000;
|
||||
const static int GICC_PMR = 0x001;
|
||||
const static int GICC_IAR = 0x003;
|
||||
const static int GICC_EOIR = 0x004;
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Constant declarations (GIC IRQ)
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
const static int GIC_IRQLOCAL0 = (16 + 14);
|
||||
const static int GIC_GPIO_IRQ = (32 + 116); // GPIO3
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Constant declarations (Control signals)
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
#define ACT_OFF !ACT_ON
|
||||
#define ENB_OFF !ENB_ON
|
||||
#define TAD_OUT !TAD_IN
|
||||
#define IND_OUT !IND_IN
|
||||
#define DTD_OUT !DTD_IN
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Constant declarations (SCSI)
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
#define IN GPIO_INPUT
|
||||
#define OUT GPIO_OUTPUT
|
||||
const static int ON = 1;
|
||||
const static int OFF = 0;
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Class definition
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
class GPIOBUS : public BUS
|
||||
{
|
||||
public:
|
||||
static GPIOBUS *create();
|
||||
|
||||
// Basic Functions
|
||||
GPIOBUS() = default;
|
||||
~GPIOBUS() override = default;
|
||||
// Destructor
|
||||
bool Init(mode_e mode = mode_e::TARGET) override;
|
||||
// Initialization
|
||||
void Reset() override;
|
||||
// Reset
|
||||
void Cleanup() override;
|
||||
// Cleanup
|
||||
|
||||
uint32_t Acquire() override = 0;
|
||||
|
||||
void SetENB(bool ast);
|
||||
// Set ENB signal
|
||||
|
||||
bool GetBSY() const override;
|
||||
// Get BSY signal
|
||||
void SetBSY(bool ast) override;
|
||||
// Set BSY signal
|
||||
|
||||
bool GetSEL() const override;
|
||||
// Get SEL signal
|
||||
void SetSEL(bool ast) override;
|
||||
// Set SEL signal
|
||||
|
||||
bool GetATN() const override;
|
||||
// Get ATN signal
|
||||
void SetATN(bool ast) override;
|
||||
// Set ATN signal
|
||||
|
||||
bool GetACK() const override;
|
||||
// Get ACK signal
|
||||
void SetACK(bool ast) override;
|
||||
// Set ACK signal
|
||||
|
||||
bool GetACT() const;
|
||||
// Get ACT signal
|
||||
void SetACT(bool ast);
|
||||
// Set ACT signal
|
||||
|
||||
bool GetRST() const override;
|
||||
// Get RST signal
|
||||
void SetRST(bool ast) override;
|
||||
// Set RST signal
|
||||
|
||||
bool GetMSG() const override;
|
||||
// Get MSG signal
|
||||
void SetMSG(bool ast) override;
|
||||
// Set MSG signal
|
||||
|
||||
bool GetCD() const override;
|
||||
// Get CD signal
|
||||
void SetCD(bool ast) override;
|
||||
// Set CD signal
|
||||
|
||||
bool GetIO() override;
|
||||
// Get IO signal
|
||||
void SetIO(bool ast) override;
|
||||
// Set IO signal
|
||||
|
||||
bool GetREQ() const override;
|
||||
// Get REQ signal
|
||||
void SetREQ(bool ast) override;
|
||||
// Set REQ signal
|
||||
bool GetDP() const override;
|
||||
// Get Data parity signal
|
||||
int CommandHandShake(BYTE *buf) override;
|
||||
// Command receive handshake
|
||||
int ReceiveHandShake(BYTE *buf, int count) override;
|
||||
// Data receive handshake
|
||||
int SendHandShake(BYTE *buf, int count, int delay_after_bytes) override;
|
||||
// Data transmission handshake
|
||||
|
||||
static BUS::phase_t GetPhaseRaw(uint32_t raw_data);
|
||||
// Get the phase based on raw data
|
||||
|
||||
static int GetCommandByteCount(BYTE opcode);
|
||||
|
||||
#ifdef USE_SEL_EVENT_ENABLE
|
||||
// SEL signal interrupt
|
||||
bool PollSelectEvent();
|
||||
// SEL signal event polling
|
||||
void ClearSelectEvent();
|
||||
// Clear SEL signal event
|
||||
#endif // USE_SEL_EVENT_ENABLE
|
||||
|
||||
protected:
|
||||
// SCSI I/O signal control
|
||||
virtual void MakeTable() = 0;
|
||||
// Create work data
|
||||
virtual void SetControl(int pin, bool ast) = 0;
|
||||
// Set Control Signal
|
||||
virtual void SetMode(int pin, int mode) = 0;
|
||||
// Set SCSI I/O mode
|
||||
bool GetSignal(int pin) const override = 0;
|
||||
// Set Control Signal
|
||||
void SetSignal(int pin, bool ast) override = 0;
|
||||
// Set SCSI I/O mode
|
||||
virtual bool WaitSignal(int pin, int ast) = 0;
|
||||
// Wait for a signal to change
|
||||
// Interrupt control
|
||||
virtual void DisableIRQ() = 0;
|
||||
// IRQ Disabled
|
||||
virtual void EnableIRQ() = 0;
|
||||
// IRQ Enabled
|
||||
|
||||
// GPIO pin functionality settings
|
||||
virtual void PinConfig(int pin, int mode) = 0;
|
||||
// GPIO pin direction setting
|
||||
virtual void PullConfig(int pin, int mode) = 0;
|
||||
// GPIO pin pull up/down resistor setting
|
||||
virtual void PinSetSignal(int pin, bool ast) = 0;
|
||||
// Set GPIO output signal
|
||||
virtual void DrvConfig(uint32_t drive) = 0;
|
||||
// Set GPIO drive strength
|
||||
|
||||
mode_e actmode = mode_e::TARGET; // Operation mode
|
||||
|
||||
#if !defined(__x86_64__) && !defined(__X86__)
|
||||
uint32_t baseaddr = 0; // Base address
|
||||
#endif
|
||||
|
||||
static const array<int, 19> SignalTable; // signal table
|
||||
|
||||
#ifdef USE_SEL_EVENT_ENABLE
|
||||
struct gpioevent_request selevreq = {}; // SEL signal event request
|
||||
|
||||
int epfd; // epoll file descriptor
|
||||
#endif // USE_SEL_EVENT_ENABLE
|
||||
|
||||
private:
|
||||
int rpitype = 0; // Type of Raspberry Pi
|
||||
|
||||
volatile uint32_t *gpio = nullptr; // GPIO register
|
||||
|
||||
volatile uint32_t *pads = nullptr; // PADS register
|
||||
|
||||
#if !defined(__x86_64__) && !defined(__X86__)
|
||||
volatile uint32_t *level = nullptr; // GPIO input level
|
||||
#endif
|
||||
|
||||
volatile uint32_t *irpctl = nullptr; // Interrupt control register
|
||||
|
||||
volatile uint32_t irptenb; // Interrupt enabled state
|
||||
|
||||
volatile uint32_t *qa7regs = nullptr; // QA7 register
|
||||
|
||||
volatile int tintcore; // Interupt control target CPU.
|
||||
|
||||
volatile uint32_t tintctl; // Interupt control
|
||||
|
||||
volatile uint32_t giccpmr; // GICC priority setting
|
||||
|
||||
#if !defined(__x86_64__) && !defined(__X86__)
|
||||
volatile uint32_t *gicd = nullptr; // GIC Interrupt distributor register
|
||||
#endif
|
||||
|
||||
volatile uint32_t *gicc = nullptr; // GIC CPU interface register
|
||||
|
||||
array<uint32_t, 4> gpfsel; // GPFSEL0-4 backup values
|
||||
|
||||
uint32_t signals = 0; // All bus signals
|
||||
|
||||
#if SIGNAL_CONTROL_MODE == 0
|
||||
array<array<uint32_t, 256>, 3> tblDatMsk; // Data mask table
|
||||
|
||||
array<array<uint32_t, 256>, 3> tblDatSet; // Data setting table
|
||||
#else
|
||||
array<uint32_t, 256> tblDatMsk = {}; // Data mask table
|
||||
|
||||
array<uint32_t, 256> tblDatSet = {}; // Table setting table
|
||||
#endif
|
||||
};
|
||||
56
cpp/hal/gpiobus_aibom.h
Normal file
56
cpp/hal/gpiobus_aibom.h
Normal file
@@ -0,0 +1,56 @@
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// SCSI Target Emulator RaSCSI Reloaded
|
||||
// for Raspberry Pi
|
||||
//
|
||||
// Powered by XM6 TypeG Technology.
|
||||
// Copyright (C) 2016-2020 GIMONS
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <string>
|
||||
|
||||
//
|
||||
// RaSCSI Adapter Aibom version
|
||||
//
|
||||
|
||||
const std::string CONNECT_DESC = "AIBOM PRODUCTS version"; // Startup message
|
||||
|
||||
// Select signal control mode
|
||||
const static int SIGNAL_CONTROL_MODE = 2; // SCSI positive logic specification
|
||||
|
||||
// Control signal output logic
|
||||
#define ACT_ON ON // ACTIVE SIGNAL ON
|
||||
#define ENB_ON ON // ENABLE SIGNAL ON
|
||||
#define IND_IN OFF // INITIATOR SIGNAL INPUT
|
||||
#define TAD_IN OFF // TARGET SIGNAL INPUT
|
||||
#define DTD_IN OFF // DATA SIGNAL INPUT
|
||||
|
||||
// Control signal pin assignment (-1 means no control)
|
||||
const static int PIN_ACT = 4; // ACTIVE
|
||||
const static int PIN_ENB = 17; // ENABLE
|
||||
const static int PIN_IND = 27; // INITIATOR CTRL DIRECTION
|
||||
const static int PIN_TAD = -1; // TARGET CTRL DIRECTION
|
||||
const static int PIN_DTD = 18; // DATA DIRECTION
|
||||
|
||||
// SCSI signal pin assignment
|
||||
const static int PIN_DT0 = 6; // Data 0
|
||||
const static int PIN_DT1 = 12; // Data 1
|
||||
const static int PIN_DT2 = 13; // Data 2
|
||||
const static int PIN_DT3 = 16; // Data 3
|
||||
const static int PIN_DT4 = 19; // Data 4
|
||||
const static int PIN_DT5 = 20; // Data 5
|
||||
const static int PIN_DT6 = 26; // Data 6
|
||||
const static int PIN_DT7 = 21; // Data 7
|
||||
const static int PIN_DP = 5; // Data parity
|
||||
const static int PIN_ATN = 22; // ATN
|
||||
const static int PIN_RST = 25; // RST
|
||||
const static int PIN_ACK = 10; // ACK
|
||||
const static int PIN_REQ = 7; // REQ
|
||||
const static int PIN_MSG = 9; // MSG
|
||||
const static int PIN_CD = 11; // CD
|
||||
const static int PIN_IO = 23; // IO
|
||||
const static int PIN_BSY = 24; // BSY
|
||||
const static int PIN_SEL = 8; // SEL
|
||||
120
cpp/hal/gpiobus_allwinner.cpp
Normal file
120
cpp/hal/gpiobus_allwinner.cpp
Normal file
@@ -0,0 +1,120 @@
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// SCSI Target Emulator RaSCSI Reloaded
|
||||
// for Raspberry Pi
|
||||
//
|
||||
// Powered by XM6 TypeG Technology.
|
||||
// Copyright (C) 2016-2020 GIMONS
|
||||
//
|
||||
// [ GPIO-SCSI bus ]
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
|
||||
#include "hal/gpiobus_allwinner.h"
|
||||
#include "hal/gpiobus.h"
|
||||
#include "log.h"
|
||||
|
||||
extern int wiringPiMode;
|
||||
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wunused-variable"
|
||||
#pragma GCC diagnostic ignored "-Wunused-parameter"
|
||||
|
||||
bool GPIOBUS_Allwinner::Init(mode_e mode)
|
||||
{
|
||||
LOGWARN("%s NOT IMPLEMENTED", __PRETTY_FUNCTION__)
|
||||
return false;
|
||||
}
|
||||
|
||||
void GPIOBUS_Allwinner::Cleanup()
|
||||
{
|
||||
LOGTRACE("%s", __PRETTY_FUNCTION__)
|
||||
LOGWARN("%s NOT IMPLEMENTED", __PRETTY_FUNCTION__)
|
||||
}
|
||||
|
||||
void GPIOBUS_Allwinner::Reset(){LOGWARN("%s NOT IMPLEMENTED", __PRETTY_FUNCTION__)}
|
||||
|
||||
BYTE GPIOBUS_Allwinner::GetDAT()
|
||||
{
|
||||
LOGWARN("%s NOT IMPLEMENTED", __PRETTY_FUNCTION__)
|
||||
return 0;
|
||||
}
|
||||
|
||||
void GPIOBUS_Allwinner::SetDAT(BYTE dat)
|
||||
{
|
||||
LOGWARN("%s NOT IMPLEMENTED", __PRETTY_FUNCTION__)
|
||||
}
|
||||
|
||||
void GPIOBUS_Allwinner::MakeTable(void)
|
||||
{
|
||||
LOGWARN("%s NOT IMPLEMENTED", __PRETTY_FUNCTION__)
|
||||
}
|
||||
|
||||
void GPIOBUS_Allwinner::SetControl(int pin, bool ast)
|
||||
{
|
||||
GPIOBUS_Allwinner::SetSignal(pin, ast);
|
||||
}
|
||||
|
||||
void GPIOBUS_Allwinner::SetMode(int pin, int mode)
|
||||
{
|
||||
LOGWARN("%s NOT IMPLEMENTED", __PRETTY_FUNCTION__)
|
||||
}
|
||||
|
||||
bool GPIOBUS_Allwinner::GetSignal(int pin) const
|
||||
{
|
||||
LOGWARN("%s NOT IMPLEMENTED", __PRETTY_FUNCTION__)
|
||||
return false;
|
||||
// return (digitalRead(pin) != 0);
|
||||
}
|
||||
|
||||
void GPIOBUS_Allwinner::SetSignal(int pin, bool ast)
|
||||
{
|
||||
LOGWARN("%s NOT IMPLEMENTED", __PRETTY_FUNCTION__)
|
||||
}
|
||||
|
||||
bool GPIOBUS_Allwinner::WaitSignal(int pin, int ast)
|
||||
{
|
||||
LOGWARN("%s NOT IMPLEMENTED", __PRETTY_FUNCTION__)
|
||||
return false;
|
||||
}
|
||||
|
||||
void GPIOBUS_Allwinner::DisableIRQ()
|
||||
{
|
||||
LOGERROR("%s not implemented!!", __PRETTY_FUNCTION__)
|
||||
}
|
||||
|
||||
void GPIOBUS_Allwinner::EnableIRQ()
|
||||
{
|
||||
LOGERROR("%s not implemented!!", __PRETTY_FUNCTION__)
|
||||
}
|
||||
|
||||
void GPIOBUS_Allwinner::PinConfig(int pin, int mode)
|
||||
{
|
||||
LOGWARN("%s NOT IMPLEMENTED", __PRETTY_FUNCTION__)
|
||||
}
|
||||
|
||||
void GPIOBUS_Allwinner::PullConfig(int pin, int mode)
|
||||
{
|
||||
LOGWARN("%s NOT IMPLEMENTED", __PRETTY_FUNCTION__)
|
||||
}
|
||||
|
||||
void GPIOBUS_Allwinner::PinSetSignal(int pin, bool ast)
|
||||
{
|
||||
LOGWARN("%s NOT IMPLEMENTED", __PRETTY_FUNCTION__)
|
||||
}
|
||||
|
||||
void GPIOBUS_Allwinner::DrvConfig(DWORD drive)
|
||||
{
|
||||
(void)drive;
|
||||
LOGERROR("%s not implemented!!", __PRETTY_FUNCTION__)
|
||||
}
|
||||
|
||||
uint32_t GPIOBUS_Allwinner::Acquire()
|
||||
{
|
||||
LOGWARN("%s NOT IMPLEMENTED", __PRETTY_FUNCTION__)
|
||||
// Only used for development/debugging purposes. Isn't really applicable
|
||||
// to any real-world RaSCSI application
|
||||
return 0;
|
||||
}
|
||||
|
||||
#pragma GCC diagnostic pop
|
||||
128
cpp/hal/gpiobus_allwinner.h
Normal file
128
cpp/hal/gpiobus_allwinner.h
Normal file
@@ -0,0 +1,128 @@
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// SCSI Target Emulator RaSCSI Reloaded
|
||||
// for Raspberry Pi
|
||||
//
|
||||
// Powered by XM6 TypeG Technology.
|
||||
// Copyright (C) 2016-2020 GIMONS
|
||||
// [ GPIO-SCSI bus ]
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "config.h"
|
||||
#include "hal/gpiobus.h"
|
||||
#include "log.h"
|
||||
#include "scsi.h"
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Class definition
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
class GPIOBUS_Allwinner : public GPIOBUS
|
||||
{
|
||||
public:
|
||||
// Basic Functions
|
||||
GPIOBUS_Allwinner() = default;
|
||||
~GPIOBUS_Allwinner() override = default;
|
||||
// Destructor
|
||||
bool Init(mode_e mode = mode_e::TARGET) override;
|
||||
// Initialization
|
||||
void Reset() override;
|
||||
// Reset
|
||||
void Cleanup() override;
|
||||
// Cleanup
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Bus signal acquisition
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
uint32_t Acquire() override;
|
||||
|
||||
BYTE GetDAT() override;
|
||||
// Get DAT signal
|
||||
void SetDAT(BYTE dat) override;
|
||||
// Set DAT signal
|
||||
protected:
|
||||
// SCSI I/O signal control
|
||||
void MakeTable() override;
|
||||
// Create work data
|
||||
void SetControl(int pin, bool ast) override;
|
||||
// Set Control Signal
|
||||
void SetMode(int pin, int mode) override;
|
||||
// Set SCSI I/O mode
|
||||
bool GetSignal(int pin) const override;
|
||||
// Get SCSI input signal value
|
||||
void SetSignal(int pin, bool ast) override;
|
||||
// Set SCSI output signal value
|
||||
bool WaitSignal(int pin, int ast) override;
|
||||
// Wait for a signal to change
|
||||
// Interrupt control
|
||||
void DisableIRQ() override;
|
||||
// IRQ Disabled
|
||||
void EnableIRQ() override;
|
||||
// IRQ Enabled
|
||||
|
||||
// GPIO pin functionality settings
|
||||
void PinConfig(int pin, int mode) override;
|
||||
// GPIO pin direction setting
|
||||
void PullConfig(int pin, int mode) override;
|
||||
// GPIO pin pull up/down resistor setting
|
||||
void PinSetSignal(int pin, bool ast) override;
|
||||
// Set GPIO output signal
|
||||
void DrvConfig(DWORD drive) override;
|
||||
// Set GPIO drive strength
|
||||
|
||||
#if !defined(__x86_64__) && !defined(__X86__)
|
||||
uint32_t baseaddr = 0; // Base address
|
||||
#endif
|
||||
|
||||
volatile uint32_t *gpio = nullptr; // GPIO register
|
||||
|
||||
volatile uint32_t *pads = nullptr; // PADS register
|
||||
|
||||
#if !defined(__x86_64__) && !defined(__X86__)
|
||||
volatile uint32_t *level = nullptr; // GPIO input level
|
||||
#endif
|
||||
|
||||
volatile uint32_t *irpctl = nullptr; // Interrupt control register
|
||||
|
||||
volatile uint32_t irptenb; // Interrupt enabled state
|
||||
|
||||
volatile uint32_t *qa7regs = nullptr; // QA7 register
|
||||
|
||||
volatile int tintcore; // Interupt control target CPU.
|
||||
|
||||
volatile uint32_t tintctl; // Interupt control
|
||||
|
||||
volatile uint32_t giccpmr; // GICC priority setting
|
||||
|
||||
#if !defined(__x86_64__) && !defined(__X86__)
|
||||
volatile uint32_t *gicd = nullptr; // GIC Interrupt distributor register
|
||||
#endif
|
||||
|
||||
volatile uint32_t *gicc = nullptr; // GIC CPU interface register
|
||||
|
||||
array<uint32_t, 4> gpfsel; // GPFSEL0-4 backup values
|
||||
|
||||
uint32_t signals = 0; // All bus signals
|
||||
|
||||
#ifdef USE_SEL_EVENT_ENABLE
|
||||
struct gpioevent_request selevreq = {}; // SEL signal event request
|
||||
|
||||
int epfd; // epoll file descriptor
|
||||
#endif // USE_SEL_EVENT_ENABLE
|
||||
|
||||
#if SIGNAL_CONTROL_MODE == 0
|
||||
array<array<uint32_t, 256>, 3> tblDatMsk; // Data mask table
|
||||
|
||||
array<array<uint32_t, 256>, 3> tblDatSet; // Data setting table
|
||||
#else
|
||||
array<uint32_t, 256> tblDatMsk = {}; // Data mask table
|
||||
|
||||
array<uint32_t, 256> tblDatSet = {}; // Table setting table
|
||||
#endif
|
||||
};
|
||||
30
cpp/hal/gpiobus_factory.cpp
Normal file
30
cpp/hal/gpiobus_factory.cpp
Normal file
@@ -0,0 +1,30 @@
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// SCSI Target Emulator RaSCSI Reloaded
|
||||
// for Raspberry Pi
|
||||
//
|
||||
// Copyright (C) 2022 akuker
|
||||
// [ GPIO bus factory ]
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
|
||||
#include <memory>
|
||||
|
||||
#include "hal/gpiobus_allwinner.h"
|
||||
#include "hal/gpiobus_factory.h"
|
||||
#include "hal/gpiobus_raspberry.h"
|
||||
#include "hal/sbc_version.h"
|
||||
#include "log.h"
|
||||
|
||||
using namespace std;
|
||||
|
||||
unique_ptr<GPIOBUS> GPIOBUS_Factory::Create()
|
||||
{
|
||||
if (SBC_Version::IsBananaPi()) {
|
||||
LOGTRACE("Creating GPIOBUS_Allwinner")
|
||||
return make_unique<GPIOBUS_Allwinner>();
|
||||
} else {
|
||||
LOGTRACE("Creating GPIOBUS_Raspberry")
|
||||
return make_unique<GPIOBUS_Raspberry>();
|
||||
}
|
||||
}
|
||||
24
cpp/hal/gpiobus_factory.h
Normal file
24
cpp/hal/gpiobus_factory.h
Normal file
@@ -0,0 +1,24 @@
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// SCSI Target Emulator RaSCSI Reloaded
|
||||
// for Raspberry Pi
|
||||
//
|
||||
// Powered by XM6 TypeG Technology.
|
||||
// Copyright (C) 2016-2020 GIMONS
|
||||
// [ GPIO-SCSI bus ]
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <memory>
|
||||
|
||||
#include "gpiobus.h"
|
||||
|
||||
using namespace std;
|
||||
|
||||
class GPIOBUS_Factory
|
||||
{
|
||||
public:
|
||||
static unique_ptr<GPIOBUS> Create();
|
||||
};
|
||||
56
cpp/hal/gpiobus_fullspec.h
Normal file
56
cpp/hal/gpiobus_fullspec.h
Normal file
@@ -0,0 +1,56 @@
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// SCSI Target Emulator RaSCSI Reloaded
|
||||
// for Raspberry Pi
|
||||
//
|
||||
// Powered by XM6 TypeG Technology.
|
||||
// Copyright (C) 2016-2020 GIMONS
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <string>
|
||||
|
||||
//
|
||||
// RaSCSI standard (SCSI logic, standard pin assignment)
|
||||
//
|
||||
|
||||
const std::string CONNECT_DESC = "FULLSPEC"; // Startup message
|
||||
|
||||
// Select signal control mode
|
||||
const static int SIGNAL_CONTROL_MODE = 0; // SCSI logical specification
|
||||
|
||||
// Control signal pin assignment (-1 means no control)
|
||||
const static int PIN_ACT = 4; // ACTIVE
|
||||
const static int PIN_ENB = 5; // ENABLE
|
||||
const static int PIN_IND = 6; // INITIATOR CTRL DIRECTION
|
||||
const static int PIN_TAD = 7; // TARGET CTRL DIRECTION
|
||||
const static int PIN_DTD = 8; // DATA DIRECTION
|
||||
|
||||
// Control signal output logic
|
||||
#define ACT_ON ON // ACTIVE SIGNAL ON
|
||||
#define ENB_ON ON // ENABLE SIGNAL ON
|
||||
#define IND_IN OFF // INITIATOR SIGNAL INPUT
|
||||
#define TAD_IN OFF // TARGET SIGNAL INPUT
|
||||
#define DTD_IN ON // DATA SIGNAL INPUT
|
||||
|
||||
// SCSI signal pin assignment
|
||||
const static int PIN_DT0 = 10; // Data 0
|
||||
const static int PIN_DT1 = 11; // Data 1
|
||||
const static int PIN_DT2 = 12; // Data 2
|
||||
const static int PIN_DT3 = 13; // Data 3
|
||||
const static int PIN_DT4 = 14; // Data 4
|
||||
const static int PIN_DT5 = 15; // Data 5
|
||||
const static int PIN_DT6 = 16; // Data 6
|
||||
const static int PIN_DT7 = 17; // Data 7
|
||||
const static int PIN_DP = 18; // Data parity
|
||||
const static int PIN_ATN = 19; // ATN
|
||||
const static int PIN_RST = 20; // RST
|
||||
const static int PIN_ACK = 21; // ACK
|
||||
const static int PIN_REQ = 22; // REQ
|
||||
const static int PIN_MSG = 23; // MSG
|
||||
const static int PIN_CD = 24; // CD
|
||||
const static int PIN_IO = 25; // IO
|
||||
const static int PIN_BSY = 26; // BSY
|
||||
const static int PIN_SEL = 27; // SEL
|
||||
56
cpp/hal/gpiobus_gamernium.h
Normal file
56
cpp/hal/gpiobus_gamernium.h
Normal file
@@ -0,0 +1,56 @@
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// SCSI Target Emulator RaSCSI Reloaded
|
||||
// for Raspberry Pi
|
||||
//
|
||||
// Powered by XM6 TypeG Technology.
|
||||
// Copyright (C) 2016-2020 GIMONS
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <string>
|
||||
|
||||
//
|
||||
// RaSCSI Adapter GAMERnium.com version
|
||||
//
|
||||
|
||||
const std::string CONNECT_DESC = "GAMERnium.com version"; // Startup message
|
||||
|
||||
// Select signal control mode
|
||||
const static int SIGNAL_CONTROL_MODE = 0; // SCSI logical specification
|
||||
|
||||
// Control signal output logic
|
||||
#define ACT_ON ON // ACTIVE SIGNAL ON
|
||||
#define ENB_ON ON // ENABLE SIGNAL ON
|
||||
#define IND_IN OFF // INITIATOR SIGNAL INPUT
|
||||
#define TAD_IN OFF // TARGET SIGNAL INPUT
|
||||
#define DTD_IN ON // DATA SIGNAL INPUT
|
||||
|
||||
// Control signal pin assignment (-1 means no control)
|
||||
const static int PIN_ACT = 14; // ACTIVE
|
||||
const static int PIN_ENB = 6; // ENABLE
|
||||
const static int PIN_IND = 7; // INITIATOR CTRL DIRECTION
|
||||
const static int PIN_TAD = 8; // TARGET CTRL DIRECTION
|
||||
const static int PIN_DTD = 5; // DATA DIRECTION
|
||||
|
||||
// SCSI signal pin assignment
|
||||
const static int PIN_DT0 = 21; // Data 0
|
||||
const static int PIN_DT1 = 26; // Data 1
|
||||
const static int PIN_DT2 = 20; // Data 2
|
||||
const static int PIN_DT3 = 19; // Data 3
|
||||
const static int PIN_DT4 = 16; // Data 4
|
||||
const static int PIN_DT5 = 13; // Data 5
|
||||
const static int PIN_DT6 = 12; // Data 6
|
||||
const static int PIN_DT7 = 11; // Data 7
|
||||
const static int PIN_DP = 25; // Data parity
|
||||
const static int PIN_ATN = 10; // ATN
|
||||
const static int PIN_RST = 22; // RST
|
||||
const static int PIN_ACK = 24; // ACK
|
||||
const static int PIN_REQ = 15; // REQ
|
||||
const static int PIN_MSG = 17; // MSG
|
||||
const static int PIN_CD = 18; // CD
|
||||
const static int PIN_IO = 4; // IO
|
||||
const static int PIN_BSY = 27; // BSY
|
||||
const static int PIN_SEL = 23; // SEL
|
||||
857
cpp/hal/gpiobus_raspberry.cpp
Normal file
857
cpp/hal/gpiobus_raspberry.cpp
Normal file
@@ -0,0 +1,857 @@
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// SCSI Target Emulator RaSCSI Reloaded
|
||||
// for Raspberry Pi
|
||||
//
|
||||
// Powered by XM6 TypeG Technology.
|
||||
// Copyright (C) 2016-2020 GIMONS
|
||||
//
|
||||
// [ GPIO-SCSI bus ]
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
|
||||
#include <sys/mman.h>
|
||||
|
||||
#include "config.h"
|
||||
#include "hal/gpiobus.h"
|
||||
#include "hal/gpiobus_raspberry.h"
|
||||
#include "hal/systimer.h"
|
||||
#include "log.h"
|
||||
#include "os.h"
|
||||
#include <string.h>
|
||||
#include <sys/epoll.h>
|
||||
#include <sys/ioctl.h>
|
||||
#include <sys/mman.h>
|
||||
#include <sys/time.h>
|
||||
|
||||
#ifdef __linux__
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// imported from bcm_host.c
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
static uint32_t get_dt_ranges(const char *filename, uint32_t offset)
|
||||
{
|
||||
GPIO_FUNCTION_TRACE
|
||||
uint32_t address = ~0;
|
||||
if (FILE *fp = fopen(filename, "rb"); fp) {
|
||||
fseek(fp, offset, SEEK_SET);
|
||||
if (array<BYTE, 4> buf; fread(buf.data(), 1, buf.size(), fp) == buf.size()) {
|
||||
address = (int)buf[0] << 24 | (int)buf[1] << 16 | (int)buf[2] << 8 | (int)buf[3] << 0;
|
||||
}
|
||||
fclose(fp);
|
||||
}
|
||||
return address;
|
||||
}
|
||||
|
||||
uint32_t bcm_host_get_peripheral_address()
|
||||
{
|
||||
GPIO_FUNCTION_TRACE
|
||||
uint32_t address = get_dt_ranges("/proc/device-tree/soc/ranges", 4);
|
||||
if (address == 0) {
|
||||
address = get_dt_ranges("/proc/device-tree/soc/ranges", 8);
|
||||
}
|
||||
address = (address == (uint32_t)~0) ? 0x20000000 : address;
|
||||
return address;
|
||||
}
|
||||
#endif // __linux__
|
||||
|
||||
#ifdef __NetBSD__
|
||||
// Assume the Raspberry Pi series and estimate the address from CPU
|
||||
uint32_t bcm_host_get_peripheral_address()
|
||||
{
|
||||
GPIO_FUNCTION_TRACE
|
||||
array<char, 1024> buf;
|
||||
size_t len = buf.size();
|
||||
uint32_t address;
|
||||
|
||||
if (sysctlbyname("hw.model", buf.data(), &len, NULL, 0) || strstr(buf, "ARM1176JZ-S") != buf.data()) {
|
||||
// Failed to get CPU model || Not BCM2835
|
||||
// use the address of BCM283[67]
|
||||
address = 0x3f000000;
|
||||
} else {
|
||||
// Use BCM2835 address
|
||||
address = 0x20000000;
|
||||
}
|
||||
LOGDEBUG("Peripheral address : 0x%lx\n", address);
|
||||
return address;
|
||||
}
|
||||
#endif // __NetBSD__
|
||||
|
||||
bool GPIOBUS_Raspberry::Init(mode_e mode)
|
||||
{
|
||||
GPIO_FUNCTION_TRACE
|
||||
GPIOBUS::Init(mode);
|
||||
|
||||
#if defined(__x86_64__) || defined(__X86__)
|
||||
|
||||
// When we're running on x86, there is no hardware to talk to, so just return.
|
||||
return true;
|
||||
#else
|
||||
#ifdef USE_SEL_EVENT_ENABLE
|
||||
epoll_event ev = {};
|
||||
#endif
|
||||
|
||||
// Get the base address
|
||||
baseaddr = (uint32_t)bcm_host_get_peripheral_address();
|
||||
LOGTRACE("%s Base addr: %08X", __PRETTY_FUNCTION__, baseaddr);
|
||||
|
||||
// Open /dev/mem
|
||||
int fd = open("/dev/mem", O_RDWR | O_SYNC);
|
||||
if (fd == -1) {
|
||||
LOGERROR("Error: Unable to open /dev/mem. Are you running as root?")
|
||||
return false;
|
||||
}
|
||||
|
||||
LOGTRACE("%s Mapping Memory....", __PRETTY_FUNCTION__);
|
||||
|
||||
// Map peripheral region memory
|
||||
void *map = mmap(NULL, 0x1000100, PROT_READ | PROT_WRITE, MAP_SHARED, fd, baseaddr);
|
||||
if (map == MAP_FAILED) {
|
||||
LOGERROR("Error: Unable to map memory")
|
||||
close(fd);
|
||||
return false;
|
||||
}
|
||||
LOGTRACE("%s Done!", __PRETTY_FUNCTION__);
|
||||
|
||||
// Determine the type of raspberry pi from the base address
|
||||
if (baseaddr == 0xfe000000) {
|
||||
rpitype = 4;
|
||||
LOGINFO("%s I'm a pi 4", __PRETTY_FUNCTION__);
|
||||
} else if (baseaddr == 0x3f000000) {
|
||||
rpitype = 2;
|
||||
} else {
|
||||
rpitype = 1;
|
||||
}
|
||||
|
||||
// GPIO
|
||||
gpio = (uint32_t *)map;
|
||||
gpio += GPIO_OFFSET / sizeof(uint32_t);
|
||||
level = &gpio[GPIO_LEV_0];
|
||||
|
||||
// PADS
|
||||
pads = (uint32_t *)map;
|
||||
pads += PADS_OFFSET / sizeof(uint32_t);
|
||||
|
||||
// // System timer
|
||||
// SysTimer::Init(
|
||||
// (uint32_t *)map + SYST_OFFSET / sizeof(uint32_t),
|
||||
// (uint32_t *)map + ARMT_OFFSET / sizeof(uint32_t));
|
||||
SysTimer::Init();
|
||||
|
||||
// Interrupt controller
|
||||
irpctl = (uint32_t *)map;
|
||||
irpctl += IRPT_OFFSET / sizeof(uint32_t);
|
||||
|
||||
// Quad-A7 control
|
||||
qa7regs = (uint32_t *)map;
|
||||
qa7regs += QA7_OFFSET / sizeof(uint32_t);
|
||||
|
||||
LOGTRACE("%s Mapping GIC Memory....", __PRETTY_FUNCTION__);
|
||||
// Map GIC memory
|
||||
if (rpitype == 4) {
|
||||
map = mmap(NULL, 8192, PROT_READ | PROT_WRITE, MAP_SHARED, fd, ARM_GICD_BASE);
|
||||
if (map == MAP_FAILED) {
|
||||
close(fd);
|
||||
return false;
|
||||
}
|
||||
gicd = (uint32_t *)map;
|
||||
gicc = (uint32_t *)map;
|
||||
gicc += (ARM_GICC_BASE - ARM_GICD_BASE) / sizeof(uint32_t);
|
||||
} else {
|
||||
gicd = NULL;
|
||||
gicc = NULL;
|
||||
}
|
||||
close(fd);
|
||||
|
||||
LOGTRACE("%s Set Drive Strength", __PRETTY_FUNCTION__);
|
||||
// Set Drive Strength to 16mA
|
||||
DrvConfig(7);
|
||||
|
||||
// Set pull up/pull down
|
||||
LOGTRACE("%s Set pull up/down....", __PRETTY_FUNCTION__);
|
||||
|
||||
#if SIGNAL_CONTROL_MODE == 0
|
||||
LOGTRACE("%s GPIO_PULLNONE", __PRETTY_FUNCTION__);
|
||||
int pullmode = GPIO_PULLNONE;
|
||||
#elif SIGNAL_CONTROL_MODE == 1
|
||||
LOGTRACE("%s GPIO_PULLUP", __PRETTY_FUNCTION__);
|
||||
int pullmode = GPIO_PULLUP;
|
||||
#else
|
||||
LOGTRACE("%s GPIO_PULLDOWN", __PRETTY_FUNCTION__);
|
||||
int pullmode = GPIO_PULLDOWN;
|
||||
#endif
|
||||
|
||||
// Initialize all signals
|
||||
LOGTRACE("%s Initialize all signals....", __PRETTY_FUNCTION__);
|
||||
|
||||
for (int i = 0; SignalTable[i] >= 0; i++) {
|
||||
int j = SignalTable[i];
|
||||
PinSetSignal(j, OFF);
|
||||
PinConfig(j, GPIO_INPUT);
|
||||
PullConfig(j, pullmode);
|
||||
}
|
||||
|
||||
// Set control signals
|
||||
LOGTRACE("%s Set control signals....", __PRETTY_FUNCTION__);
|
||||
PinSetSignal(PIN_ACT, OFF);
|
||||
PinSetSignal(PIN_TAD, OFF);
|
||||
PinSetSignal(PIN_IND, OFF);
|
||||
PinSetSignal(PIN_DTD, OFF);
|
||||
PinConfig(PIN_ACT, GPIO_OUTPUT);
|
||||
PinConfig(PIN_TAD, GPIO_OUTPUT);
|
||||
PinConfig(PIN_IND, GPIO_OUTPUT);
|
||||
PinConfig(PIN_DTD, GPIO_OUTPUT);
|
||||
|
||||
// Set the ENABLE signal
|
||||
// This is used to show that the application is running
|
||||
PinSetSignal(PIN_ENB, ENB_OFF);
|
||||
PinConfig(PIN_ENB, GPIO_OUTPUT);
|
||||
|
||||
// GPFSEL backup
|
||||
LOGTRACE("%s GPFSEL backup....", __PRETTY_FUNCTION__);
|
||||
|
||||
gpfsel[0] = gpio[GPIO_FSEL_0];
|
||||
gpfsel[1] = gpio[GPIO_FSEL_1];
|
||||
gpfsel[2] = gpio[GPIO_FSEL_2];
|
||||
gpfsel[3] = gpio[GPIO_FSEL_3];
|
||||
|
||||
// Initialize SEL signal interrupt
|
||||
#ifdef USE_SEL_EVENT_ENABLE
|
||||
// GPIO chip open
|
||||
LOGTRACE("%s GPIO chip open", __PRETTY_FUNCTION__);
|
||||
int gpio_fd = open("/dev/gpiochip0", 0);
|
||||
if (gpio_fd == -1) {
|
||||
LOGERROR("Unable to open /dev/gpiochip0. Is RaSCSI already running?")
|
||||
return false;
|
||||
}
|
||||
|
||||
// Event request setting
|
||||
LOGTRACE("%s Event request setting (pin sel: %d)", __PRETTY_FUNCTION__, PIN_SEL);
|
||||
strcpy(selevreq.consumer_label, "RaSCSI");
|
||||
selevreq.lineoffset = PIN_SEL;
|
||||
selevreq.handleflags = GPIOHANDLE_REQUEST_INPUT;
|
||||
#if SIGNAL_CONTROL_MODE < 2
|
||||
selevreq.eventflags = GPIOEVENT_REQUEST_FALLING_EDGE;
|
||||
LOGTRACE("%s eventflags = GPIOEVENT_REQUEST_FALLING_EDGE", __PRETTY_FUNCTION__);
|
||||
#else
|
||||
selevreq.eventflags = GPIOEVENT_REQUEST_RISING_EDGE;
|
||||
LOGTRACE("%s eventflags = GPIOEVENT_REQUEST_RISING_EDGE", __PRETTY_FUNCTION__);
|
||||
#endif // SIGNAL_CONTROL_MODE
|
||||
|
||||
// Get event request
|
||||
if (ioctl(gpio_fd, GPIO_GET_LINEEVENT_IOCTL, &selevreq) == -1) {
|
||||
LOGERROR("selevreq.fd = %d %08X", selevreq.fd, (unsigned int)selevreq.fd);
|
||||
LOGERROR("Unable to register event request. Is RaSCSI already running?")
|
||||
LOGERROR("[%08X] %s", errno, strerror(errno));
|
||||
close(gpio_fd);
|
||||
return false;
|
||||
}
|
||||
|
||||
// Close GPIO chip file handle
|
||||
LOGTRACE("%s Close GPIO chip file handle", __PRETTY_FUNCTION__);
|
||||
close(gpio_fd);
|
||||
|
||||
// epoll initialization
|
||||
LOGTRACE("%s epoll initialization", __PRETTY_FUNCTION__);
|
||||
epfd = epoll_create(1);
|
||||
if (epfd == -1) {
|
||||
LOGERROR("Unable to create the epoll event");
|
||||
return false;
|
||||
}
|
||||
memset(&ev, 0, sizeof(ev));
|
||||
ev.events = EPOLLIN | EPOLLPRI;
|
||||
ev.data.fd = selevreq.fd;
|
||||
epoll_ctl(epfd, EPOLL_CTL_ADD, selevreq.fd, &ev);
|
||||
#else
|
||||
// Edge detection setting
|
||||
#if SIGNAL_CONTROL_MODE == 2
|
||||
gpio[GPIO_AREN_0] = 1 << PIN_SEL;
|
||||
#else
|
||||
gpio[GPIO_AFEN_0] = 1 << PIN_SEL;
|
||||
#endif // SIGNAL_CONTROL_MODE
|
||||
|
||||
// Clear event
|
||||
gpio[GPIO_EDS_0] = 1 << PIN_SEL;
|
||||
|
||||
// Register interrupt handler
|
||||
setIrqFuncAddress(IrqHandler);
|
||||
|
||||
// GPIO interrupt setting
|
||||
if (rpitype == 4) {
|
||||
// GIC Invalid
|
||||
gicd[GICD_CTLR] = 0;
|
||||
|
||||
// Route all interupts to core 0
|
||||
for (i = 0; i < 8; i++) {
|
||||
gicd[GICD_ICENABLER0 + i] = 0xffffffff;
|
||||
gicd[GICD_ICPENDR0 + i] = 0xffffffff;
|
||||
gicd[GICD_ICACTIVER0 + i] = 0xffffffff;
|
||||
}
|
||||
for (i = 0; i < 64; i++) {
|
||||
gicd[GICD_IPRIORITYR0 + i] = 0xa0a0a0a0;
|
||||
gicd[GICD_ITARGETSR0 + i] = 0x01010101;
|
||||
}
|
||||
|
||||
// Set all interrupts as level triggers
|
||||
for (i = 0; i < 16; i++) {
|
||||
gicd[GICD_ICFGR0 + i] = 0;
|
||||
}
|
||||
|
||||
// GIC Invalid
|
||||
gicd[GICD_CTLR] = 1;
|
||||
|
||||
// Enable CPU interface for core 0
|
||||
gicc[GICC_PMR] = 0xf0;
|
||||
gicc[GICC_CTLR] = 1;
|
||||
|
||||
// Enable interrupts
|
||||
gicd[GICD_ISENABLER0 + (GIC_GPIO_IRQ / 32)] = 1 << (GIC_GPIO_IRQ % 32);
|
||||
} else {
|
||||
// Enable interrupts
|
||||
irpctl[IRPT_ENB_IRQ_2] = (1 << (GPIO_IRQ % 32));
|
||||
}
|
||||
#endif // USE_SEL_EVENT_ENABLE
|
||||
|
||||
// Create work table
|
||||
|
||||
MakeTable();
|
||||
|
||||
// Finally, enable ENABLE
|
||||
LOGTRACE("%s Finally, enable ENABLE....", __PRETTY_FUNCTION__);
|
||||
// Show the user that this app is running
|
||||
SetControl(PIN_ENB, ENB_ON);
|
||||
|
||||
return true;
|
||||
#endif // ifdef __x86_64__ || __X86__
|
||||
}
|
||||
|
||||
void GPIOBUS_Raspberry::Cleanup()
|
||||
{
|
||||
GPIO_FUNCTION_TRACE
|
||||
#if defined(__x86_64__) || defined(__X86__)
|
||||
return;
|
||||
#else
|
||||
// Release SEL signal interrupt
|
||||
#ifdef USE_SEL_EVENT_ENABLE
|
||||
close(selevreq.fd);
|
||||
#endif // USE_SEL_EVENT_ENABLE
|
||||
|
||||
// Set control signals
|
||||
PinSetSignal(PIN_ENB, OFF);
|
||||
PinSetSignal(PIN_ACT, OFF);
|
||||
PinSetSignal(PIN_TAD, OFF);
|
||||
PinSetSignal(PIN_IND, OFF);
|
||||
PinSetSignal(PIN_DTD, OFF);
|
||||
PinConfig(PIN_ACT, GPIO_INPUT);
|
||||
PinConfig(PIN_TAD, GPIO_INPUT);
|
||||
PinConfig(PIN_IND, GPIO_INPUT);
|
||||
PinConfig(PIN_DTD, GPIO_INPUT);
|
||||
|
||||
// Initialize all signals
|
||||
for (int i = 0; SignalTable[i] >= 0; i++) {
|
||||
int pin = SignalTable[i];
|
||||
PinSetSignal(pin, OFF);
|
||||
PinConfig(pin, GPIO_INPUT);
|
||||
PullConfig(pin, GPIO_PULLNONE);
|
||||
}
|
||||
|
||||
// Set drive strength back to 8mA
|
||||
DrvConfig(3);
|
||||
#endif // ifdef __x86_64__ || __X86__
|
||||
}
|
||||
|
||||
void GPIOBUS_Raspberry::Reset()
|
||||
{
|
||||
GPIO_FUNCTION_TRACE
|
||||
#if defined(__x86_64__) || defined(__X86__)
|
||||
return;
|
||||
#else
|
||||
int i;
|
||||
int j;
|
||||
|
||||
// Turn off active signal
|
||||
SetControl(PIN_ACT, ACT_OFF);
|
||||
|
||||
// Set all signals to off
|
||||
for (i = 0;; i++) {
|
||||
j = SignalTable[i];
|
||||
if (j < 0) {
|
||||
break;
|
||||
}
|
||||
|
||||
SetSignal(j, OFF);
|
||||
}
|
||||
|
||||
if (actmode == mode_e::TARGET) {
|
||||
// Target mode
|
||||
|
||||
// Set target signal to input
|
||||
SetControl(PIN_TAD, TAD_IN);
|
||||
SetMode(PIN_BSY, IN);
|
||||
SetMode(PIN_MSG, IN);
|
||||
SetMode(PIN_CD, IN);
|
||||
SetMode(PIN_REQ, IN);
|
||||
SetMode(PIN_IO, IN);
|
||||
|
||||
// Set the initiator signal to input
|
||||
SetControl(PIN_IND, IND_IN);
|
||||
SetMode(PIN_SEL, IN);
|
||||
SetMode(PIN_ATN, IN);
|
||||
SetMode(PIN_ACK, IN);
|
||||
SetMode(PIN_RST, IN);
|
||||
|
||||
// Set data bus signals to input
|
||||
SetControl(PIN_DTD, DTD_IN);
|
||||
SetMode(PIN_DT0, IN);
|
||||
SetMode(PIN_DT1, IN);
|
||||
SetMode(PIN_DT2, IN);
|
||||
SetMode(PIN_DT3, IN);
|
||||
SetMode(PIN_DT4, IN);
|
||||
SetMode(PIN_DT5, IN);
|
||||
SetMode(PIN_DT6, IN);
|
||||
SetMode(PIN_DT7, IN);
|
||||
SetMode(PIN_DP, IN);
|
||||
} else {
|
||||
// Initiator mode
|
||||
|
||||
// Set target signal to input
|
||||
SetControl(PIN_TAD, TAD_IN);
|
||||
SetMode(PIN_BSY, IN);
|
||||
SetMode(PIN_MSG, IN);
|
||||
SetMode(PIN_CD, IN);
|
||||
SetMode(PIN_REQ, IN);
|
||||
SetMode(PIN_IO, IN);
|
||||
|
||||
// Set the initiator signal to output
|
||||
SetControl(PIN_IND, IND_OUT);
|
||||
SetMode(PIN_SEL, OUT);
|
||||
SetMode(PIN_ATN, OUT);
|
||||
SetMode(PIN_ACK, OUT);
|
||||
SetMode(PIN_RST, OUT);
|
||||
|
||||
// Set the data bus signals to output
|
||||
SetControl(PIN_DTD, DTD_OUT);
|
||||
SetMode(PIN_DT0, OUT);
|
||||
SetMode(PIN_DT1, OUT);
|
||||
SetMode(PIN_DT2, OUT);
|
||||
SetMode(PIN_DT3, OUT);
|
||||
SetMode(PIN_DT4, OUT);
|
||||
SetMode(PIN_DT5, OUT);
|
||||
SetMode(PIN_DT6, OUT);
|
||||
SetMode(PIN_DT7, OUT);
|
||||
SetMode(PIN_DP, OUT);
|
||||
}
|
||||
|
||||
// Initialize all signals
|
||||
signals = 0;
|
||||
#endif // ifdef __x86_64__ || __X86__
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Get data signals
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
BYTE GPIOBUS_Raspberry::GetDAT()
|
||||
{
|
||||
GPIO_FUNCTION_TRACE
|
||||
uint32_t data = Acquire();
|
||||
data = ((data >> (PIN_DT0 - 0)) & (1 << 0)) | ((data >> (PIN_DT1 - 1)) & (1 << 1)) |
|
||||
((data >> (PIN_DT2 - 2)) & (1 << 2)) | ((data >> (PIN_DT3 - 3)) & (1 << 3)) |
|
||||
((data >> (PIN_DT4 - 4)) & (1 << 4)) | ((data >> (PIN_DT5 - 5)) & (1 << 5)) |
|
||||
((data >> (PIN_DT6 - 6)) & (1 << 6)) | ((data >> (PIN_DT7 - 7)) & (1 << 7));
|
||||
return (BYTE)data;
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Set data signals
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
void GPIOBUS_Raspberry::SetDAT(BYTE dat)
|
||||
{
|
||||
GPIO_FUNCTION_TRACE
|
||||
// Write to port
|
||||
#if SIGNAL_CONTROL_MODE == 0
|
||||
uint32_t fsel = gpfsel[0];
|
||||
fsel &= tblDatMsk[0][dat];
|
||||
fsel |= tblDatSet[0][dat];
|
||||
if (fsel != gpfsel[0]) {
|
||||
gpfsel[0] = fsel;
|
||||
gpio[GPIO_FSEL_0] = fsel;
|
||||
}
|
||||
|
||||
fsel = gpfsel[1];
|
||||
fsel &= tblDatMsk[1][dat];
|
||||
fsel |= tblDatSet[1][dat];
|
||||
if (fsel != gpfsel[1]) {
|
||||
gpfsel[1] = fsel;
|
||||
gpio[GPIO_FSEL_1] = fsel;
|
||||
}
|
||||
|
||||
fsel = gpfsel[2];
|
||||
fsel &= tblDatMsk[2][dat];
|
||||
fsel |= tblDatSet[2][dat];
|
||||
if (fsel != gpfsel[2]) {
|
||||
gpfsel[2] = fsel;
|
||||
gpio[GPIO_FSEL_2] = fsel;
|
||||
}
|
||||
#else
|
||||
gpio[GPIO_CLR_0] = tblDatMsk[dat];
|
||||
gpio[GPIO_SET_0] = tblDatSet[dat];
|
||||
#endif // SIGNAL_CONTROL_MODE
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Create work table
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
void GPIOBUS_Raspberry::MakeTable(void)
|
||||
{
|
||||
GPIO_FUNCTION_TRACE
|
||||
|
||||
const array<int, 9> pintbl = {PIN_DT0, PIN_DT1, PIN_DT2, PIN_DT3, PIN_DT4, PIN_DT5, PIN_DT6, PIN_DT7, PIN_DP};
|
||||
|
||||
array<bool, 256> tblParity;
|
||||
|
||||
// Create parity table
|
||||
for (uint32_t i = 0; i < 0x100; i++) {
|
||||
uint32_t bits = i;
|
||||
uint32_t parity = 0;
|
||||
for (int j = 0; j < 8; j++) {
|
||||
parity ^= bits & 1;
|
||||
bits >>= 1;
|
||||
}
|
||||
parity = ~parity;
|
||||
tblParity[i] = parity & 1;
|
||||
}
|
||||
|
||||
#if SIGNAL_CONTROL_MODE == 0
|
||||
// Mask and setting data generation
|
||||
for (auto &tbl : tblDatMsk) {
|
||||
tbl.fill(-1);
|
||||
}
|
||||
for (auto &tbl : tblDatSet) {
|
||||
tbl.fill(0);
|
||||
}
|
||||
|
||||
for (uint32_t i = 0; i < 0x100; i++) {
|
||||
// Bit string for inspection
|
||||
uint32_t bits = i;
|
||||
|
||||
// Get parity
|
||||
if (tblParity[i]) {
|
||||
bits |= (1 << 8);
|
||||
}
|
||||
|
||||
// Bit check
|
||||
for (int j = 0; j < 9; j++) {
|
||||
// Index and shift amount calculation
|
||||
int index = pintbl[j] / 10;
|
||||
int shift = (pintbl[j] % 10) * 3;
|
||||
|
||||
// Mask data
|
||||
tblDatMsk[index][i] &= ~(0x7 << shift);
|
||||
|
||||
// Setting data
|
||||
if (bits & 1) {
|
||||
tblDatSet[index][i] |= (1 << shift);
|
||||
}
|
||||
|
||||
bits >>= 1;
|
||||
}
|
||||
}
|
||||
#else
|
||||
for (uint32_t i = 0; i < 0x100; i++) {
|
||||
// Bit string for inspection
|
||||
uint32_t bits = i;
|
||||
|
||||
// Get parity
|
||||
if (tblParity[i]) {
|
||||
bits |= (1 << 8);
|
||||
}
|
||||
|
||||
#if SIGNAL_CONTROL_MODE == 1
|
||||
// Negative logic is inverted
|
||||
bits = ~bits;
|
||||
#endif
|
||||
|
||||
// Create GPIO register information
|
||||
uint32_t gpclr = 0;
|
||||
uint32_t gpset = 0;
|
||||
for (int j = 0; j < 9; j++) {
|
||||
if (bits & 1) {
|
||||
gpset |= (1 << pintbl[j]);
|
||||
} else {
|
||||
gpclr |= (1 << pintbl[j]);
|
||||
}
|
||||
bits >>= 1;
|
||||
}
|
||||
|
||||
tblDatMsk[i] = gpclr;
|
||||
tblDatSet[i] = gpset;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Control signal setting
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
void GPIOBUS_Raspberry::SetControl(int pin, bool ast)
|
||||
{
|
||||
PinSetSignal(pin, ast);
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Input/output mode setting
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
void GPIOBUS_Raspberry::SetMode(int pin, int mode)
|
||||
{
|
||||
#if SIGNAL_CONTROL_MODE == 0
|
||||
if (mode == OUT) {
|
||||
return;
|
||||
}
|
||||
#endif // SIGNAL_CONTROL_MODE
|
||||
|
||||
int index = pin / 10;
|
||||
int shift = (pin % 10) * 3;
|
||||
uint32_t data = gpfsel[index];
|
||||
data &= ~(0x7 << shift);
|
||||
if (mode == OUT) {
|
||||
data |= (1 << shift);
|
||||
}
|
||||
gpio[index] = data;
|
||||
gpfsel[index] = data;
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Get input signal value
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
bool GPIOBUS_Raspberry::GetSignal(int pin) const
|
||||
{
|
||||
return (signals >> pin) & 1;
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Set output signal value
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
void GPIOBUS_Raspberry::SetSignal(int pin, bool ast)
|
||||
{
|
||||
#if SIGNAL_CONTROL_MODE == 0
|
||||
int index = pin / 10;
|
||||
int shift = (pin % 10) * 3;
|
||||
uint32_t data = gpfsel[index];
|
||||
if (ast) {
|
||||
data |= (1 << shift);
|
||||
} else {
|
||||
data &= ~(0x7 << shift);
|
||||
}
|
||||
gpio[index] = data;
|
||||
gpfsel[index] = data;
|
||||
#elif SIGNAL_CONTROL_MODE == 1
|
||||
if (ast) {
|
||||
gpio[GPIO_CLR_0] = 0x1 << pin;
|
||||
} else {
|
||||
gpio[GPIO_SET_0] = 0x1 << pin;
|
||||
}
|
||||
#elif SIGNAL_CONTROL_MODE == 2
|
||||
if (ast) {
|
||||
gpio[GPIO_SET_0] = 0x1 << pin;
|
||||
} else {
|
||||
gpio[GPIO_CLR_0] = 0x1 << pin;
|
||||
}
|
||||
#endif // SIGNAL_CONTROL_MODE
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Wait for signal change
|
||||
//
|
||||
// TODO: maybe this should be moved to SCSI_Bus?
|
||||
//---------------------------------------------------------------------------
|
||||
bool GPIOBUS_Raspberry::WaitSignal(int pin, int ast)
|
||||
{
|
||||
// Get current time
|
||||
uint32_t now = SysTimer::GetTimerLow();
|
||||
|
||||
// Calculate timeout (3000ms)
|
||||
uint32_t timeout = 3000 * 1000;
|
||||
|
||||
// end immediately if the signal has changed
|
||||
do {
|
||||
// Immediately upon receiving a reset
|
||||
Acquire();
|
||||
if (GetRST()) {
|
||||
return false;
|
||||
}
|
||||
|
||||
// Check for the signal edge
|
||||
if (((signals >> pin) ^ ~ast) & 1) {
|
||||
return true;
|
||||
}
|
||||
} while ((SysTimer::GetTimerLow() - now) < timeout);
|
||||
|
||||
// We timed out waiting for the signal
|
||||
return false;
|
||||
}
|
||||
|
||||
void GPIOBUS_Raspberry::DisableIRQ()
|
||||
{
|
||||
GPIO_FUNCTION_TRACE
|
||||
#ifdef __linux
|
||||
if (rpitype == 4) {
|
||||
// RPI4 is disabled by GICC
|
||||
giccpmr = gicc[GICC_PMR];
|
||||
gicc[GICC_PMR] = 0;
|
||||
} else if (rpitype == 2) {
|
||||
// RPI2,3 disable core timer IRQ
|
||||
tintcore = sched_getcpu() + QA7_CORE0_TINTC;
|
||||
tintctl = qa7regs[tintcore];
|
||||
qa7regs[tintcore] = 0;
|
||||
} else {
|
||||
// Stop system timer interrupt with interrupt controller
|
||||
irptenb = irpctl[IRPT_ENB_IRQ_1];
|
||||
irpctl[IRPT_DIS_IRQ_1] = irptenb & 0xf;
|
||||
}
|
||||
#else
|
||||
(void)
|
||||
0;
|
||||
#endif
|
||||
}
|
||||
|
||||
void GPIOBUS_Raspberry::EnableIRQ()
|
||||
{
|
||||
GPIO_FUNCTION_TRACE
|
||||
if (rpitype == 4) {
|
||||
// RPI4 enables interrupts via the GICC
|
||||
gicc[GICC_PMR] = giccpmr;
|
||||
} else if (rpitype == 2) {
|
||||
// RPI2,3 re-enable core timer IRQ
|
||||
qa7regs[tintcore] = tintctl;
|
||||
} else {
|
||||
// Restart the system timer interrupt with the interrupt controller
|
||||
irpctl[IRPT_ENB_IRQ_1] = irptenb & 0xf;
|
||||
}
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Pin direction setting (input/output)
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
void GPIOBUS_Raspberry::PinConfig(int pin, int mode)
|
||||
{
|
||||
// Check for invalid pin
|
||||
if (pin < 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
int index = pin / 10;
|
||||
uint32_t mask = ~(0x7 << ((pin % 10) * 3));
|
||||
gpio[index] = (gpio[index] & mask) | ((mode & 0x7) << ((pin % 10) * 3));
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Pin pull-up/pull-down setting
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
void GPIOBUS_Raspberry::PullConfig(int pin, int mode)
|
||||
{
|
||||
uint32_t pull;
|
||||
|
||||
// Check for invalid pin
|
||||
if (pin < 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (rpitype == 4) {
|
||||
LOGTRACE("%s I'm a Pi 4", __PRETTY_FUNCTION__)
|
||||
switch (mode) {
|
||||
case GPIO_PULLNONE:
|
||||
pull = 0;
|
||||
break;
|
||||
case GPIO_PULLUP:
|
||||
pull = 1;
|
||||
break;
|
||||
case GPIO_PULLDOWN:
|
||||
pull = 2;
|
||||
break;
|
||||
default:
|
||||
return;
|
||||
}
|
||||
|
||||
pin &= 0x1f;
|
||||
int shift = (pin & 0xf) << 1;
|
||||
uint32_t bits = gpio[GPIO_PUPPDN0 + (pin >> 4)];
|
||||
bits &= ~(3 << shift);
|
||||
bits |= (pull << shift);
|
||||
gpio[GPIO_PUPPDN0 + (pin >> 4)] = bits;
|
||||
} else {
|
||||
pin &= 0x1f;
|
||||
gpio[GPIO_PUD] = mode & 0x3;
|
||||
SysTimer::SleepUsec(2);
|
||||
gpio[GPIO_CLK_0] = 0x1 << pin;
|
||||
SysTimer::SleepUsec(2);
|
||||
gpio[GPIO_PUD] = 0;
|
||||
gpio[GPIO_CLK_0] = 0;
|
||||
}
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Set output pin
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
void GPIOBUS_Raspberry::PinSetSignal(int pin, bool ast)
|
||||
{
|
||||
// Check for invalid pin
|
||||
if (pin < 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (ast) {
|
||||
gpio[GPIO_SET_0] = 0x1 << pin;
|
||||
} else {
|
||||
gpio[GPIO_CLR_0] = 0x1 << pin;
|
||||
}
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Set the signal drive strength
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
void GPIOBUS_Raspberry::DrvConfig(uint32_t drive)
|
||||
{
|
||||
uint32_t data = pads[PAD_0_27];
|
||||
pads[PAD_0_27] = (0xFFFFFFF8 & data) | drive | 0x5a000000;
|
||||
}
|
||||
|
||||
uint32_t GPIOBUS_Raspberry::Acquire()
|
||||
{
|
||||
GPIO_FUNCTION_TRACE;
|
||||
#if defined(__x86_64__) || defined(__X86__)
|
||||
// Only used for development/debugging purposes. Isn't really applicable
|
||||
// to any real-world RaSCSI application
|
||||
return 0;
|
||||
#else
|
||||
signals = *level;
|
||||
|
||||
#if SIGNAL_CONTROL_MODE < 2
|
||||
// Invert if negative logic (internal processing is unified to positive logic)
|
||||
signals = ~signals;
|
||||
#endif // SIGNAL_CONTROL_MODE
|
||||
return signals;
|
||||
#endif // ifdef __x86_64__ || __X86__
|
||||
}
|
||||
124
cpp/hal/gpiobus_raspberry.h
Normal file
124
cpp/hal/gpiobus_raspberry.h
Normal file
@@ -0,0 +1,124 @@
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// SCSI Target Emulator RaSCSI Reloaded
|
||||
// for Raspberry Pi
|
||||
//
|
||||
// Powered by XM6 TypeG Technology.
|
||||
// Copyright (C) 2016-2020 GIMONS
|
||||
// [ GPIO-SCSI bus ]
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "config.h"
|
||||
#include "hal/gpiobus.h"
|
||||
#include "log.h"
|
||||
#include "scsi.h"
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Class definition
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
class GPIOBUS_Raspberry final : public GPIOBUS
|
||||
{
|
||||
public:
|
||||
// Basic Functions
|
||||
GPIOBUS_Raspberry() = default;
|
||||
~GPIOBUS_Raspberry() override = default;
|
||||
// Destructor
|
||||
bool Init(mode_e mode = mode_e::TARGET) override;
|
||||
// Initialization
|
||||
void Reset() override;
|
||||
// Reset
|
||||
void Cleanup() override;
|
||||
// Cleanup
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Bus signal acquisition
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
uint32_t Acquire() override;
|
||||
|
||||
BYTE GetDAT() override;
|
||||
// Get DAT signal
|
||||
void SetDAT(BYTE dat) override;
|
||||
// Set DAT signal
|
||||
private:
|
||||
// SCSI I/O signal control
|
||||
void MakeTable() override;
|
||||
// Create work data
|
||||
void SetControl(int pin, bool ast) override;
|
||||
// Set Control Signal
|
||||
void SetMode(int pin, int mode) override;
|
||||
// Set SCSI I/O mode
|
||||
bool GetSignal(int pin) const override;
|
||||
// Get SCSI input signal value
|
||||
void SetSignal(int pin, bool ast) override;
|
||||
// Set SCSI output signal value
|
||||
bool WaitSignal(int pin, int ast) override;
|
||||
// Wait for a signal to change
|
||||
// Interrupt control
|
||||
void DisableIRQ() override;
|
||||
// IRQ Disabled
|
||||
void EnableIRQ() override;
|
||||
// IRQ Enabled
|
||||
|
||||
// GPIO pin functionality settings
|
||||
void PinConfig(int pin, int mode) override;
|
||||
// GPIO pin direction setting
|
||||
void PullConfig(int pin, int mode) override;
|
||||
// GPIO pin pull up/down resistor setting
|
||||
void PinSetSignal(int pin, bool ast) override;
|
||||
// Set GPIO output signal
|
||||
void DrvConfig(uint32_t drive) override;
|
||||
// Set GPIO drive strength
|
||||
|
||||
#if !defined(__x86_64__) && !defined(__X86__)
|
||||
uint32_t baseaddr = 0; // Base address
|
||||
#endif
|
||||
|
||||
int rpitype = 0; // Type of Raspberry Pi
|
||||
|
||||
volatile uint32_t *gpio = nullptr; // GPIO register
|
||||
|
||||
volatile uint32_t *pads = nullptr; // PADS register
|
||||
|
||||
#if !defined(__x86_64__) && !defined(__X86__)
|
||||
volatile uint32_t *level = nullptr; // GPIO input level
|
||||
#endif
|
||||
|
||||
volatile uint32_t *irpctl = nullptr; // Interrupt control register
|
||||
|
||||
volatile uint32_t irptenb; // Interrupt enabled state
|
||||
|
||||
volatile uint32_t *qa7regs = nullptr; // QA7 register
|
||||
|
||||
volatile int tintcore; // Interupt control target CPU.
|
||||
|
||||
volatile uint32_t tintctl; // Interupt control
|
||||
|
||||
volatile uint32_t giccpmr; // GICC priority setting
|
||||
|
||||
#if !defined(__x86_64__) && !defined(__X86__)
|
||||
volatile uint32_t *gicd = nullptr; // GIC Interrupt distributor register
|
||||
#endif
|
||||
|
||||
volatile uint32_t *gicc = nullptr; // GIC CPU interface register
|
||||
|
||||
array<uint32_t, 4> gpfsel; // GPFSEL0-4 backup values
|
||||
|
||||
uint32_t signals = 0; // All bus signals
|
||||
|
||||
#if SIGNAL_CONTROL_MODE == 0
|
||||
array<array<uint32_t, 256>, 3> tblDatMsk; // Data mask table
|
||||
|
||||
array<array<uint32_t, 256>, 3> tblDatSet; // Data setting table
|
||||
#else
|
||||
array<uint32_t, 256> tblDatMsk = {}; // Data mask table
|
||||
|
||||
array<uint32_t, 256> tblDatSet = {}; // Table setting table
|
||||
#endif
|
||||
};
|
||||
56
cpp/hal/gpiobus_standard.h
Normal file
56
cpp/hal/gpiobus_standard.h
Normal file
@@ -0,0 +1,56 @@
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// SCSI Target Emulator RaSCSI Reloaded
|
||||
// for Raspberry Pi
|
||||
//
|
||||
// Powered by XM6 TypeG Technology.
|
||||
// Copyright (C) 2016-2020 GIMONS
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <string>
|
||||
|
||||
//
|
||||
// RaSCSI standard (SCSI logic, standard pin assignment)
|
||||
//
|
||||
|
||||
const std::string CONNECT_DESC = "STANDARD"; // Startup message
|
||||
|
||||
// Select signal control mode
|
||||
const static int SIGNAL_CONTROL_MODE = 0; // SCSI logical specification
|
||||
|
||||
// Control signal pin assignment (-1 means no control)
|
||||
const static int PIN_ACT = 4; // ACTIVE
|
||||
const static int PIN_ENB = 5; // ENABLE
|
||||
const static int PIN_IND = -1; // INITIATOR CTRL DIRECTION
|
||||
const static int PIN_TAD = -1; // TARGET CTRL DIRECTION
|
||||
const static int PIN_DTD = -1; // DATA DIRECTION
|
||||
|
||||
// Control signal output logic
|
||||
#define ACT_ON ON // ACTIVE SIGNAL ON
|
||||
#define ENB_ON ON // ENABLE SIGNAL ON
|
||||
#define IND_IN OFF // INITIATOR SIGNAL INPUT
|
||||
#define TAD_IN OFF // TARGET SIGNAL INPUT
|
||||
#define DTD_IN ON // DATA SIGNAL INPUT
|
||||
|
||||
// SCSI signal pin assignment
|
||||
const static int PIN_DT0 = 10; // Data 0
|
||||
const static int PIN_DT1 = 11; // Data 1
|
||||
const static int PIN_DT2 = 12; // Data 2
|
||||
const static int PIN_DT3 = 13; // Data 3
|
||||
const static int PIN_DT4 = 14; // Data 4
|
||||
const static int PIN_DT5 = 15; // Data 5
|
||||
const static int PIN_DT6 = 16; // Data 6
|
||||
const static int PIN_DT7 = 17; // Data 7
|
||||
const static int PIN_DP = 18; // Data parity
|
||||
const static int PIN_ATN = 19; // ATN
|
||||
const static int PIN_RST = 20; // RST
|
||||
const static int PIN_ACK = 21; // ACK
|
||||
const static int PIN_REQ = 22; // REQ
|
||||
const static int PIN_MSG = 23; // MSG
|
||||
const static int PIN_CD = 24; // CD
|
||||
const static int PIN_IO = 25; // IO
|
||||
const static int PIN_BSY = 26; // BSY
|
||||
const static int PIN_SEL = 27; // SEL
|
||||
215
cpp/hal/sbc_version.cpp
Normal file
215
cpp/hal/sbc_version.cpp
Normal file
@@ -0,0 +1,215 @@
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// SCSI Target Emulator RaSCSI Reloaded
|
||||
// for Raspberry Pi
|
||||
//
|
||||
// Copyright (C) 2022 akuker
|
||||
//
|
||||
// [ Hardware version detection routines ]
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
|
||||
#include "sbc_version.h"
|
||||
#include "log.h"
|
||||
#include <fstream>
|
||||
#include <iostream>
|
||||
#include <sstream>
|
||||
|
||||
SBC_Version::sbc_version_type SBC_Version::m_sbc_version = sbc_version_type::sbc_unknown;
|
||||
|
||||
const std::string SBC_Version::m_str_raspberry_pi_1 = "Raspberry Pi 1";
|
||||
const std::string SBC_Version::m_str_raspberry_pi_2_3 = "Raspberry Pi 2/3";
|
||||
const std::string SBC_Version::m_str_raspberry_pi_4 = "Raspberry Pi 4";
|
||||
const std::string SBC_Version::m_str_bananapi_m2_berry = "Banana Pi M2 Berry/Ultra";
|
||||
const std::string SBC_Version::m_str_bananapi_m2_zero = "Banana Pi M2 Zero";
|
||||
const std::string SBC_Version::m_str_bananapi_m2_plus = "Banana Pi BPI-M2-Plus H3";
|
||||
const std::string SBC_Version::m_str_bananapi_m3 = "Banana Pi M3";
|
||||
const std::string SBC_Version::m_str_bananapi_m4 = "Banana Pi M4";
|
||||
const std::string SBC_Version::m_str_unknown_sbc = "Unknown SBC";
|
||||
|
||||
// The strings in this table should align with the 'model' embedded
|
||||
// in the device tree. This can be aquired by running:
|
||||
// cat /proc/device-tree/model
|
||||
// Only the first part of the string is checked. Anything following
|
||||
// will be ignored. For example:
|
||||
// "Raspberry Pi 4 Model B" will match with both of the following:
|
||||
// - Raspberry Pi 4 Model B Rev 1.4
|
||||
// - Raspberry Pi 4 Model B Rev 1.3
|
||||
const std::map<std::string, SBC_Version::sbc_version_type> SBC_Version::m_proc_device_tree_mapping = {
|
||||
{"Raspberry Pi 1 Model ", sbc_version_type::sbc_raspberry_pi_1},
|
||||
{"Raspberry Pi 2 Model ", sbc_version_type::sbc_raspberry_pi_2_3},
|
||||
{"Raspberry Pi 3 Model ", sbc_version_type::sbc_raspberry_pi_2_3},
|
||||
{"Raspberry Pi 4 Model ", sbc_version_type::sbc_raspberry_pi_4},
|
||||
{"Raspberry Pi 400 ", sbc_version_type::sbc_raspberry_pi_4},
|
||||
{"Raspberry Pi Zero W", sbc_version_type::sbc_raspberry_pi_1},
|
||||
{"Raspberry Pi Zero", sbc_version_type::sbc_raspberry_pi_1},
|
||||
{"Banana Pi BPI-M2-Zero ", sbc_version_type::sbc_bananapi_m2_zero},
|
||||
{"Banana Pi BPI-M2-Ultra ", sbc_version_type::sbc_bananapi_m2_berry},
|
||||
{"Banana Pi BPI-M2-Plus H3", sbc_version_type::sbc_bananapi_m2_plus},
|
||||
{"Banana Pi M2 Berry ", sbc_version_type::sbc_bananapi_m2_berry},
|
||||
// sbc_bananapi_m3, TBD....
|
||||
// sbc_bananapi_m4,
|
||||
};
|
||||
|
||||
const std::string SBC_Version::m_device_tree_model_path = "/proc/device-tree/model";
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Convert the SBC Version to a printable string
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
const std::string *SBC_Version::GetString()
|
||||
{
|
||||
switch (m_sbc_version) {
|
||||
case sbc_version_type::sbc_raspberry_pi_1:
|
||||
return &m_str_raspberry_pi_1;
|
||||
case sbc_version_type::sbc_raspberry_pi_2_3:
|
||||
return &m_str_raspberry_pi_2_3;
|
||||
case sbc_version_type::sbc_raspberry_pi_4:
|
||||
return &m_str_raspberry_pi_4;
|
||||
case sbc_version_type::sbc_bananapi_m2_berry:
|
||||
return &m_str_bananapi_m2_berry;
|
||||
case sbc_version_type::sbc_bananapi_m2_zero:
|
||||
return &m_str_bananapi_m2_zero;
|
||||
case sbc_version_type::sbc_bananapi_m2_plus:
|
||||
return &m_str_bananapi_m2_plus;
|
||||
case sbc_version_type::sbc_bananapi_m3:
|
||||
return &m_str_bananapi_m3;
|
||||
case sbc_version_type::sbc_bananapi_m4:
|
||||
return &m_str_bananapi_m4;
|
||||
default:
|
||||
LOGERROR("Unknown type of sbc detected: %d", static_cast<int>(m_sbc_version))
|
||||
return &m_str_unknown_sbc;
|
||||
}
|
||||
}
|
||||
|
||||
SBC_Version::sbc_version_type SBC_Version::GetSbcVersion()
|
||||
{
|
||||
return m_sbc_version;
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Determine which version of single board computer (Pi) is being used
|
||||
// based upon the device tree model string.
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
void SBC_Version::Init()
|
||||
{
|
||||
LOGTRACE("%s", __PRETTY_FUNCTION__)
|
||||
std::string device_tree_model;
|
||||
|
||||
const std::ifstream input_stream(SBC_Version::m_device_tree_model_path);
|
||||
|
||||
if (input_stream.fail()) {
|
||||
LOGERROR("Failed to open %s. Are you running as root?", SBC_Version::m_device_tree_model_path.c_str())
|
||||
throw std::invalid_argument("Failed to open /proc/device-tree/model");
|
||||
}
|
||||
|
||||
std::stringstream str_buffer;
|
||||
str_buffer << input_stream.rdbuf();
|
||||
device_tree_model = str_buffer.str();
|
||||
|
||||
for (const auto &[key, value] : m_proc_device_tree_mapping) {
|
||||
if (device_tree_model.rfind(key, 0) == 0) {
|
||||
m_sbc_version = value;
|
||||
LOGINFO("Detected device %s", GetString()->c_str())
|
||||
return;
|
||||
}
|
||||
}
|
||||
LOGERROR("%s Unable to determine single board computer type. Defaulting to Raspberry Pi 4", __PRETTY_FUNCTION__)
|
||||
m_sbc_version = sbc_version_type::sbc_raspberry_pi_4;
|
||||
}
|
||||
|
||||
bool SBC_Version::IsRaspberryPi()
|
||||
{
|
||||
LOGTRACE("%s", __PRETTY_FUNCTION__)
|
||||
switch (m_sbc_version) {
|
||||
case sbc_version_type::sbc_raspberry_pi_1:
|
||||
case sbc_version_type::sbc_raspberry_pi_2_3:
|
||||
case sbc_version_type::sbc_raspberry_pi_4:
|
||||
return true;
|
||||
case sbc_version_type::sbc_bananapi_m2_berry:
|
||||
case sbc_version_type::sbc_bananapi_m2_zero:
|
||||
case sbc_version_type::sbc_bananapi_m2_plus:
|
||||
case sbc_version_type::sbc_bananapi_m3:
|
||||
case sbc_version_type::sbc_bananapi_m4:
|
||||
return false;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
bool SBC_Version::IsBananaPi()
|
||||
{
|
||||
LOGTRACE("%s", __PRETTY_FUNCTION__)
|
||||
switch (m_sbc_version) {
|
||||
case sbc_version_type::sbc_raspberry_pi_1:
|
||||
case sbc_version_type::sbc_raspberry_pi_2_3:
|
||||
case sbc_version_type::sbc_raspberry_pi_4:
|
||||
return false;
|
||||
case sbc_version_type::sbc_bananapi_m2_berry:
|
||||
case sbc_version_type::sbc_bananapi_m2_zero:
|
||||
case sbc_version_type::sbc_bananapi_m2_plus:
|
||||
case sbc_version_type::sbc_bananapi_m3:
|
||||
case sbc_version_type::sbc_bananapi_m4:
|
||||
return true;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
// The following functions are only used on the Raspberry Pi
|
||||
// (imported from bcm_host.c)
|
||||
DWORD SBC_Version::GetDeviceTreeRanges(const char *filename, DWORD offset)
|
||||
{
|
||||
LOGTRACE("%s", __PRETTY_FUNCTION__)
|
||||
DWORD address = ~0;
|
||||
if (FILE *fp = fopen(filename, "rb"); fp) {
|
||||
fseek(fp, offset, SEEK_SET);
|
||||
if (std::array<BYTE, 4> buf; fread(buf.data(), 1, buf.size(), fp) == buf.size()) {
|
||||
address = (int)buf[0] << 24 | (int)buf[1] << 16 | (int)buf[2] << 8 | (int)buf[3] << 0;
|
||||
}
|
||||
fclose(fp);
|
||||
}
|
||||
return address;
|
||||
}
|
||||
|
||||
#if defined __linux__
|
||||
DWORD SBC_Version::GetPeripheralAddress(void)
|
||||
{
|
||||
LOGTRACE("%s", __PRETTY_FUNCTION__)
|
||||
DWORD address = GetDeviceTreeRanges("/proc/device-tree/soc/ranges", 4);
|
||||
if (address == 0) {
|
||||
address = GetDeviceTreeRanges("/proc/device-tree/soc/ranges", 8);
|
||||
}
|
||||
address = (address == (DWORD)~0) ? 0x20000000 : address;
|
||||
|
||||
LOGDEBUG("Peripheral address : 0x%8x\n", address)
|
||||
|
||||
return address;
|
||||
}
|
||||
#elif defined __NetBSD__
|
||||
DWORD SBC_Version::GetPeripheralAddress(void)
|
||||
{
|
||||
char buf[1024];
|
||||
size_t len = sizeof(buf);
|
||||
DWORD address;
|
||||
|
||||
if (sysctlbyname("hw.model", buf, &len, NULL, 0) || strstr(buf, "ARM1176JZ-S") != buf) {
|
||||
// Failed to get CPU model || Not BCM2835
|
||||
// use the address of BCM283[67]
|
||||
address = 0x3f000000;
|
||||
} else {
|
||||
// Use BCM2835 address
|
||||
address = 0x20000000;
|
||||
}
|
||||
LOGDEBUG("Peripheral address : 0x%lx\n", address);
|
||||
return address;
|
||||
}
|
||||
#else
|
||||
DWORD SBC_Version::GetPeripheralAddress(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
70
cpp/hal/sbc_version.h
Normal file
70
cpp/hal/sbc_version.h
Normal file
@@ -0,0 +1,70 @@
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// SCSI Target Emulator RaSCSI Reloaded
|
||||
// for Raspberry Pi
|
||||
//
|
||||
// Copyright (C) 2022 akuker
|
||||
//
|
||||
// [ Hardware version detection routines ]
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
|
||||
#pragma once
|
||||
#include "os.h"
|
||||
#include <map>
|
||||
#include <string>
|
||||
|
||||
//===========================================================================
|
||||
//
|
||||
// Single Board Computer Versions
|
||||
//
|
||||
//===========================================================================
|
||||
class SBC_Version
|
||||
{
|
||||
public:
|
||||
// Type of Single Board Computer
|
||||
enum class sbc_version_type : uint8_t {
|
||||
sbc_unknown = 0,
|
||||
sbc_raspberry_pi_1,
|
||||
sbc_raspberry_pi_2_3,
|
||||
sbc_raspberry_pi_4,
|
||||
sbc_bananapi_m2_berry,
|
||||
sbc_bananapi_m2_zero,
|
||||
sbc_bananapi_m2_plus,
|
||||
sbc_bananapi_m3,
|
||||
sbc_bananapi_m4,
|
||||
};
|
||||
|
||||
SBC_Version() = delete;
|
||||
~SBC_Version() = delete;
|
||||
|
||||
static void Init();
|
||||
|
||||
static sbc_version_type GetSbcVersion();
|
||||
|
||||
static bool IsRaspberryPi();
|
||||
static bool IsBananaPi();
|
||||
|
||||
static const std::string *GetString();
|
||||
|
||||
static DWORD GetPeripheralAddress();
|
||||
|
||||
private:
|
||||
static sbc_version_type m_sbc_version;
|
||||
|
||||
static const std::string m_str_raspberry_pi_1;
|
||||
static const std::string m_str_raspberry_pi_2_3;
|
||||
static const std::string m_str_raspberry_pi_4;
|
||||
static const std::string m_str_bananapi_m2_berry;
|
||||
static const std::string m_str_bananapi_m2_zero;
|
||||
static const std::string m_str_bananapi_m2_plus;
|
||||
static const std::string m_str_bananapi_m3;
|
||||
static const std::string m_str_bananapi_m4;
|
||||
static const std::string m_str_unknown_sbc;
|
||||
|
||||
static const std::map<std::string, sbc_version_type> m_proc_device_tree_mapping;
|
||||
|
||||
static const std::string m_device_tree_model_path;
|
||||
|
||||
static DWORD GetDeviceTreeRanges(const char *filename, DWORD offset);
|
||||
};
|
||||
68
cpp/hal/systimer.cpp
Normal file
68
cpp/hal/systimer.cpp
Normal file
@@ -0,0 +1,68 @@
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// SCSI Target Emulator RaSCSI Reloaded
|
||||
// for Raspberry Pi
|
||||
//
|
||||
// Powered by XM6 TypeG Technology.
|
||||
// Copyright (C) 2016-2020 GIMONS
|
||||
// Copyright (C) 2022 akuker
|
||||
//
|
||||
// [ High resolution timer ]
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
|
||||
#include "hal/systimer.h"
|
||||
#include "hal/systimer_allwinner.h"
|
||||
#include "hal/systimer_raspberry.h"
|
||||
#include <sys/mman.h>
|
||||
|
||||
#include "hal/gpiobus.h"
|
||||
#include "hal/sbc_version.h"
|
||||
#include "os.h"
|
||||
|
||||
#include "config.h"
|
||||
#include "log.h"
|
||||
|
||||
bool SysTimer::initialized = false;
|
||||
bool SysTimer::is_allwinnner = false;
|
||||
bool SysTimer::is_raspberry = false;
|
||||
|
||||
std::unique_ptr<PlatformSpecificTimer> SysTimer::systimer_ptr;
|
||||
|
||||
void SysTimer::Init()
|
||||
{
|
||||
LOGTRACE("%s", __PRETTY_FUNCTION__)
|
||||
|
||||
if (!initialized) {
|
||||
if (SBC_Version::IsRaspberryPi()) {
|
||||
systimer_ptr = make_unique<SysTimer_Raspberry>();
|
||||
is_raspberry = true;
|
||||
} else if (SBC_Version::IsBananaPi()) {
|
||||
systimer_ptr = make_unique<SysTimer_AllWinner>();
|
||||
is_allwinnner = true;
|
||||
}
|
||||
systimer_ptr->Init();
|
||||
initialized = true;
|
||||
}
|
||||
}
|
||||
|
||||
// Get system timer low byte
|
||||
uint32_t SysTimer::GetTimerLow()
|
||||
{
|
||||
return systimer_ptr->GetTimerLow();
|
||||
}
|
||||
// Get system timer high byte
|
||||
uint32_t SysTimer::GetTimerHigh()
|
||||
{
|
||||
return systimer_ptr->GetTimerHigh();
|
||||
}
|
||||
// Sleep for N nanoseconds
|
||||
void SysTimer::SleepNsec(uint32_t nsec)
|
||||
{
|
||||
systimer_ptr->SleepNsec(nsec);
|
||||
}
|
||||
// Sleep for N microseconds
|
||||
void SysTimer::SleepUsec(uint32_t usec)
|
||||
{
|
||||
systimer_ptr->SleepUsec(usec);
|
||||
}
|
||||
65
cpp/hal/systimer.h
Normal file
65
cpp/hal/systimer.h
Normal file
@@ -0,0 +1,65 @@
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// SCSI Target Emulator RaSCSI Reloaded
|
||||
// for Raspberry Pi
|
||||
//
|
||||
// Powered by XM6 TypeG Technology.
|
||||
// Copyright (C) 2016-2020 GIMONS
|
||||
// Copyright (C) 2022 akuker
|
||||
//
|
||||
// [ High resolution timer ]
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <memory>
|
||||
#include <stdint.h>
|
||||
|
||||
#include "config.h"
|
||||
#include "scsi.h"
|
||||
|
||||
class PlatformSpecificTimer
|
||||
{
|
||||
public:
|
||||
// Default constructor
|
||||
PlatformSpecificTimer() = default;
|
||||
// Default destructor
|
||||
virtual ~PlatformSpecificTimer() = default;
|
||||
// Initialization
|
||||
virtual void Init() = 0;
|
||||
// Get system timer low byte
|
||||
virtual uint32_t GetTimerLow() = 0;
|
||||
// Get system timer high byte
|
||||
virtual uint32_t GetTimerHigh() = 0;
|
||||
// Sleep for N nanoseconds
|
||||
virtual void SleepNsec(uint32_t nsec) = 0;
|
||||
// Sleep for N microseconds
|
||||
virtual void SleepUsec(uint32_t usec) = 0;
|
||||
};
|
||||
|
||||
//===========================================================================
|
||||
//
|
||||
// System timer
|
||||
//
|
||||
//===========================================================================
|
||||
class SysTimer
|
||||
{
|
||||
public:
|
||||
static void Init();
|
||||
// Get system timer low byte
|
||||
static uint32_t GetTimerLow();
|
||||
// Get system timer high byte
|
||||
static uint32_t GetTimerHigh();
|
||||
// Sleep for N nanoseconds
|
||||
static void SleepNsec(uint32_t nsec);
|
||||
// Sleep for N microseconds
|
||||
static void SleepUsec(uint32_t usec);
|
||||
|
||||
private:
|
||||
static bool initialized;
|
||||
static bool is_allwinnner;
|
||||
static bool is_raspberry;
|
||||
|
||||
static std::unique_ptr<PlatformSpecificTimer> systimer_ptr;
|
||||
};
|
||||
156
cpp/hal/systimer_allwinner.cpp
Normal file
156
cpp/hal/systimer_allwinner.cpp
Normal file
@@ -0,0 +1,156 @@
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// SCSI Target Emulator RaSCSI Reloaded
|
||||
// for Raspberry Pi
|
||||
//
|
||||
// Copyright (C) 2022 akuker
|
||||
//
|
||||
// [ High resolution timer for the Allwinner series of SoC's]
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
|
||||
#include "hal/systimer_allwinner.h"
|
||||
#include <sys/mman.h>
|
||||
|
||||
#include "hal/gpiobus.h"
|
||||
#include "os.h"
|
||||
|
||||
#include "config.h"
|
||||
#include "log.h"
|
||||
|
||||
const std::string SysTimer_AllWinner::dev_mem_filename = "/dev/mem";
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Initialize the system timer
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
void SysTimer_AllWinner::Init()
|
||||
{
|
||||
LOGTRACE("%s", __PRETTY_FUNCTION__)
|
||||
|
||||
int fd;
|
||||
|
||||
if ((fd = open("/dev/mem", O_RDWR | O_SYNC)) < 0) {
|
||||
LOGERROR("I can't open /dev/mem. Are you running as root?")
|
||||
exit(-1);
|
||||
}
|
||||
|
||||
hsitimer_regs = (struct sun8i_hsitimer_registers *)mmap(nullptr, 4096, PROT_READ | PROT_WRITE, MAP_SHARED, fd,
|
||||
hs_timer_base_address);
|
||||
|
||||
if (hsitimer_regs == MAP_FAILED) {
|
||||
LOGERROR("Unable to map high speed timer registers. Are you running as root?")
|
||||
}
|
||||
|
||||
sysbus_regs = (struct sun8i_sysbus_registers *)mmap(nullptr, 4096, PROT_READ | PROT_WRITE, MAP_SHARED, fd,
|
||||
system_bus_base_address);
|
||||
|
||||
if (sysbus_regs == MAP_FAILED) {
|
||||
LOGERROR("Unable to map system bus registers. Are you running as root?")
|
||||
}
|
||||
|
||||
enable_hs_timer();
|
||||
}
|
||||
|
||||
void SysTimer_AllWinner::enable_hs_timer()
|
||||
{
|
||||
// By default, the HSTimer clock gating is masked. When it is necessary to use
|
||||
// the HSTimer, its clock gating should be opened in BUS Clock Gating Register 0
|
||||
// and then de-assert the software reset in BUS Software Reset Register 0 on the
|
||||
// CCU module. If it is not needed to use the HSTimer, both the gating bit and
|
||||
// the software reset bit should be set 0.
|
||||
|
||||
LOGTRACE("%s [Before Enable] CLK GATE: %08X SOFT RST: %08X", __PRETTY_FUNCTION__, sysbus_regs->bus_clk_gating_reg0,
|
||||
sysbus_regs->bus_soft_rst_reg0)
|
||||
|
||||
sysbus_regs->bus_clk_gating_reg0 = sysbus_regs->bus_clk_gating_reg0 | (1 << BUS_CLK_GATING_REG0_HSTMR);
|
||||
sysbus_regs->bus_soft_rst_reg0 = sysbus_regs->bus_soft_rst_reg0 | (1 << BUS_SOFT_RST_REG0_HSTMR);
|
||||
LOGTRACE("%s [After Enable] CLK GATE: %08X SOFT RST: %08X", __PRETTY_FUNCTION__, sysbus_regs->bus_clk_gating_reg0,
|
||||
sysbus_regs->bus_soft_rst_reg0)
|
||||
|
||||
// Set interval value to the maximum value. (its a 52 bit register)
|
||||
hsitimer_regs->hs_tmr_intv_hi_reg = (1 << 20) - 1; //(0xFFFFF)
|
||||
hsitimer_regs->hs_tmr_intv_lo_reg = UINT32_MAX;
|
||||
|
||||
// Select prescale value of 1, continuouse mode
|
||||
hsitimer_regs->hs_tmr_ctrl_reg = HS_TMR_CLK_PRE_SCALE_1;
|
||||
|
||||
// Set reload bit
|
||||
hsitimer_regs->hs_tmr_ctrl_reg |= HS_TMR_RELOAD;
|
||||
|
||||
// Enable HSTimer
|
||||
hsitimer_regs->hs_tmr_ctrl_reg |= HS_TMR_EN;
|
||||
}
|
||||
|
||||
// TODO: According to the data sheet, we should turn off the HS timer when we're done with it. But, its just going to
|
||||
// eat up a little extra power if we leave it running.
|
||||
void SysTimer_AllWinner::disable_hs_timer()
|
||||
{
|
||||
LOGTRACE("%s", __PRETTY_FUNCTION__)
|
||||
|
||||
LOGINFO("[Before Disable] CLK GATE: %08X SOFT RST: %08X", sysbus_regs->bus_clk_gating_reg0,
|
||||
sysbus_regs->bus_soft_rst_reg0)
|
||||
|
||||
sysbus_regs->bus_clk_gating_reg0 = sysbus_regs->bus_clk_gating_reg0 & ~(1 << BUS_CLK_GATING_REG0_HSTMR);
|
||||
sysbus_regs->bus_soft_rst_reg0 = sysbus_regs->bus_soft_rst_reg0 & ~(1 << BUS_SOFT_RST_REG0_HSTMR);
|
||||
|
||||
LOGINFO("[After Disable] CLK GATE: %08X SOFT RST: %08X", sysbus_regs->bus_clk_gating_reg0,
|
||||
sysbus_regs->bus_soft_rst_reg0)
|
||||
}
|
||||
|
||||
DWORD SysTimer_AllWinner::GetTimerLow()
|
||||
{
|
||||
// RaSCSI expects the timer to count UP, but the Allwinner HS timer counts
|
||||
// down. So, we subtract the current timer value from UINT32_MAX
|
||||
return UINT32_MAX - (hsitimer_regs->hs_tmr_curnt_lo_reg / 200);
|
||||
}
|
||||
|
||||
DWORD SysTimer_AllWinner::GetTimerHigh()
|
||||
{
|
||||
return (uint32_t)0;
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Sleep in nanoseconds
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
void SysTimer_AllWinner::SleepNsec(DWORD nsec)
|
||||
{
|
||||
// If time is less than one HS timer clock tick, don't do anything
|
||||
if (nsec < 20) {
|
||||
return;
|
||||
}
|
||||
|
||||
// The HS timer receives a 200MHz clock input, which equates to
|
||||
// one clock tick every 5 ns.
|
||||
auto clockticks = (uint32_t)std::ceil(nsec / 5);
|
||||
|
||||
DWORD enter_time = hsitimer_regs->hs_tmr_curnt_lo_reg;
|
||||
|
||||
LOGTRACE("%s entertime: %08X ns: %d clockticks: %d", __PRETTY_FUNCTION__, enter_time, nsec, clockticks)
|
||||
while ((enter_time - hsitimer_regs->hs_tmr_curnt_lo_reg) < clockticks)
|
||||
;
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Sleep in microseconds
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
void SysTimer_AllWinner::SleepUsec(DWORD usec)
|
||||
{
|
||||
LOGTRACE("%s", __PRETTY_FUNCTION__)
|
||||
|
||||
// If time is 0, don't do anything
|
||||
if (usec == 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
DWORD enter_time = GetTimerLow();
|
||||
while ((GetTimerLow() - enter_time) < usec)
|
||||
;
|
||||
}
|
||||
106
cpp/hal/systimer_allwinner.h
Normal file
106
cpp/hal/systimer_allwinner.h
Normal file
@@ -0,0 +1,106 @@
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// SCSI Target Emulator RaSCSI Reloaded
|
||||
// for Raspberry Pi
|
||||
//
|
||||
// Copyright (C) 2022 akuker
|
||||
//
|
||||
// [ High resolution timer ]
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
#pragma once
|
||||
|
||||
#include "systimer.h"
|
||||
#include <stdint.h>
|
||||
#include <string>
|
||||
|
||||
//===========================================================================
|
||||
//
|
||||
// System timer
|
||||
//
|
||||
//===========================================================================
|
||||
class SysTimer_AllWinner : public PlatformSpecificTimer
|
||||
{
|
||||
public:
|
||||
// Default constructor
|
||||
SysTimer_AllWinner() = default;
|
||||
// Default destructor
|
||||
~SysTimer_AllWinner() override = default;
|
||||
// Initialization
|
||||
void Init() override;
|
||||
// Get system timer low byte
|
||||
uint32_t GetTimerLow() override;
|
||||
// Get system timer high byte
|
||||
uint32_t GetTimerHigh() override;
|
||||
// Sleep for N nanoseconds
|
||||
void SleepNsec(uint32_t nsec) override;
|
||||
// Sleep for N microseconds
|
||||
void SleepUsec(uint32_t usec) override;
|
||||
|
||||
private:
|
||||
void enable_hs_timer();
|
||||
void disable_hs_timer();
|
||||
|
||||
static const std::string dev_mem_filename;
|
||||
|
||||
/* Reference: Allwinner H3 Datasheet, section 4.9.3 */
|
||||
static const uint32_t hs_timer_base_address = 0x01C60000;
|
||||
/* Note: Currently the high speed timer is NOT in the armbian
|
||||
* device tree. If it is ever added, this should be pulled
|
||||
* from there */
|
||||
|
||||
struct sun8i_hsitimer_registers {
|
||||
/* 0x00 HS Timer IRQ Enabled Register */
|
||||
uint32_t hs_tmr_irq_en_reg;
|
||||
/* 0x04 HS Timer Status Register */
|
||||
uint32_t hs_tmr_irq_stat_reg;
|
||||
/* 0x08 Unused */
|
||||
uint32_t unused_08;
|
||||
/* 0x0C Unused */
|
||||
uint32_t unused_0C;
|
||||
/* 0x10 HS Timer Control Register */
|
||||
uint32_t hs_tmr_ctrl_reg;
|
||||
/* 0x14 HS Timer Interval Value Low Reg */
|
||||
uint32_t hs_tmr_intv_lo_reg;
|
||||
/* 0x18 HS Timer Interval Value High Register */
|
||||
uint32_t hs_tmr_intv_hi_reg;
|
||||
/* 0x1C HS Timer Current Value Low Register */
|
||||
uint32_t hs_tmr_curnt_lo_reg;
|
||||
/* 0x20 HS Timer Current Value High Register */
|
||||
uint32_t hs_tmr_curnt_hi_reg;
|
||||
};
|
||||
|
||||
/* Constants for the HS Timer IRQ enable Register (section 4.9.4.1) */
|
||||
static const uint32_t HS_TMR_INTERUPT_ENB = (1 << 0);
|
||||
|
||||
/* Constants for the HS Timer Control Register (section 4.9.4.3) */
|
||||
static const uint32_t HS_TMR_EN = (1 << 0);
|
||||
static const uint32_t HS_TMR_RELOAD = (1 << 1);
|
||||
static const uint32_t HS_TMR_CLK_PRE_SCALE_1 = (0 << 4);
|
||||
static const uint32_t HS_TMR_CLK_PRE_SCALE_2 = (1 << 4);
|
||||
static const uint32_t HS_TMR_CLK_PRE_SCALE_4 = (2 << 4);
|
||||
static const uint32_t HS_TMR_CLK_PRE_SCALE_8 = (3 << 4);
|
||||
static const uint32_t HS_TMR_CLK_PRE_SCALE_16 = (4 << 4); // NOSONAR This matches the datasheet
|
||||
static const uint32_t HS_TMR_MODE_SINGLE = (1 << 7);
|
||||
static const uint32_t HS_TMR_TEST_MODE = (1 << 31);
|
||||
|
||||
struct sun8i_hsitimer_registers *hsitimer_regs;
|
||||
|
||||
/* Reference: Allwinner H3 Datasheet, section 4.3.4 */
|
||||
static const uint32_t system_bus_base_address = 0x01C20000;
|
||||
|
||||
struct sun8i_sysbus_registers {
|
||||
uint32_t pad_00_5C[(0x60 / sizeof(uint32_t))]; //NOSONAR c-style array used for padding
|
||||
/* 0x0060 Bus Clock Gating Register 0 */
|
||||
uint32_t bus_clk_gating_reg0;
|
||||
uint32_t pad_64_2C0[((0x2C0 - 0x64) / sizeof(uint32_t))]; //NOSONAR c-style array used for padding
|
||||
/* 0x2C0 Bus Software Reset Register 0 */
|
||||
uint32_t bus_soft_rst_reg0;
|
||||
};
|
||||
|
||||
/* Bit associated with the HS Timer */
|
||||
static const uint32_t BUS_CLK_GATING_REG0_HSTMR = 19;
|
||||
static const uint32_t BUS_SOFT_RST_REG0_HSTMR = 19;
|
||||
|
||||
struct sun8i_sysbus_registers *sysbus_regs;
|
||||
};
|
||||
149
cpp/hal/systimer_raspberry.cpp
Normal file
149
cpp/hal/systimer_raspberry.cpp
Normal file
@@ -0,0 +1,149 @@
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// SCSI Target Emulator RaSCSI Reloaded
|
||||
// for Raspberry Pi
|
||||
//
|
||||
// Powered by XM6 TypeG Technology.
|
||||
// Copyright (C) 2016-2020 GIMONS
|
||||
// Copyright (C) 2022 akuker
|
||||
//
|
||||
// [ High resolution timer ]
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
|
||||
#include "hal/systimer_raspberry.h"
|
||||
#include <memory>
|
||||
#include <sys/ioctl.h>
|
||||
#include <sys/mman.h>
|
||||
|
||||
#include "hal/gpiobus.h"
|
||||
#include "hal/sbc_version.h"
|
||||
#include "os.h"
|
||||
|
||||
#include "config.h"
|
||||
#include "log.h"
|
||||
|
||||
// System timer address
|
||||
volatile uint32_t *SysTimer_Raspberry::systaddr = nullptr;
|
||||
// ARM timer address
|
||||
volatile uint32_t *SysTimer_Raspberry::armtaddr = nullptr;
|
||||
volatile uint32_t SysTimer_Raspberry::corefreq = 0;
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Initialize the system timer
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
void SysTimer_Raspberry::Init()
|
||||
{
|
||||
// Get the base address
|
||||
auto baseaddr = SBC_Version::GetPeripheralAddress();
|
||||
|
||||
// Open /dev/mem
|
||||
int mem_fd = open("/dev/mem", O_RDWR | O_SYNC);
|
||||
if (mem_fd == -1) {
|
||||
LOGERROR("Error: Unable to open /dev/mem. Are you running as root?")
|
||||
return;
|
||||
}
|
||||
|
||||
// Map peripheral region memory
|
||||
void *map = mmap(nullptr, 0x1000100, PROT_READ | PROT_WRITE, MAP_SHARED, mem_fd, baseaddr);
|
||||
if (map == MAP_FAILED) {
|
||||
LOGERROR("Error: Unable to map memory")
|
||||
close(mem_fd);
|
||||
return;
|
||||
}
|
||||
close(mem_fd);
|
||||
|
||||
// RPI Mailbox property interface
|
||||
// Get max clock rate
|
||||
// Tag: 0x00030004
|
||||
//
|
||||
// Request: Length: 4
|
||||
// Value: u32: clock id
|
||||
// Response: Length: 8
|
||||
// Value: u32: clock id, u32: rate (in Hz)
|
||||
//
|
||||
// Clock id
|
||||
// 0x000000004: CORE
|
||||
std::array<uint32_t, 32> maxclock = {32, 0, 0x00030004, 8, 0, 4, 0, 0};
|
||||
|
||||
// Save the base address
|
||||
systaddr = (DWORD *)map + SYST_OFFSET / sizeof(DWORD);
|
||||
armtaddr = (DWORD *)map + ARMT_OFFSET / sizeof(DWORD);
|
||||
|
||||
// Change the ARM timer to free run mode
|
||||
armtaddr[ARMT_CTRL] = 0x00000282;
|
||||
|
||||
// Get the core frequency
|
||||
if (int vcio_fd = open("/dev/vcio", O_RDONLY); vcio_fd >= 0) {
|
||||
ioctl(vcio_fd, _IOWR(100, 0, char *), maxclock.data());
|
||||
corefreq = maxclock[6] / 1000000;
|
||||
close(vcio_fd);
|
||||
}
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Get system timer low byte
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
DWORD SysTimer_Raspberry::GetTimerLow()
|
||||
{
|
||||
return systaddr[SYST_CLO];
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Get system timer high byte
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
DWORD SysTimer_Raspberry::GetTimerHigh()
|
||||
{
|
||||
return systaddr[SYST_CHI];
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Sleep in nanoseconds
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
void SysTimer_Raspberry::SleepNsec(DWORD nsec)
|
||||
{
|
||||
// If time is 0, don't do anything
|
||||
if (nsec == 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
// Calculate the timer difference
|
||||
DWORD diff = corefreq * nsec / 1000;
|
||||
|
||||
// Return if the difference in time is too small
|
||||
if (diff == 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
// Start
|
||||
DWORD start = armtaddr[ARMT_FREERUN];
|
||||
|
||||
// Loop until timer has elapsed
|
||||
while ((armtaddr[ARMT_FREERUN] - start) < diff)
|
||||
;
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// Sleep in microseconds
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
void SysTimer_Raspberry::SleepUsec(DWORD usec)
|
||||
{
|
||||
// If time is 0, don't do anything
|
||||
if (usec == 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
DWORD now = GetTimerLow();
|
||||
while ((GetTimerLow() - now) < usec)
|
||||
;
|
||||
}
|
||||
49
cpp/hal/systimer_raspberry.h
Normal file
49
cpp/hal/systimer_raspberry.h
Normal file
@@ -0,0 +1,49 @@
|
||||
//---------------------------------------------------------------------------
|
||||
//
|
||||
// SCSI Target Emulator RaSCSI Reloaded
|
||||
// for Raspberry Pi
|
||||
//
|
||||
// Powered by XM6 TypeG Technology.
|
||||
// Copyright (C) 2016-2020 GIMONS
|
||||
// Copyright (C) 2022 akuker
|
||||
//
|
||||
// [ High resolution timer ]
|
||||
//
|
||||
//---------------------------------------------------------------------------
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "systimer.h"
|
||||
#include <stdint.h>
|
||||
|
||||
//===========================================================================
|
||||
//
|
||||
// System timer
|
||||
//
|
||||
//===========================================================================
|
||||
class SysTimer_Raspberry : public PlatformSpecificTimer
|
||||
{
|
||||
public:
|
||||
// Default constructor
|
||||
SysTimer_Raspberry() = default;
|
||||
// Default destructor
|
||||
~SysTimer_Raspberry() override = default;
|
||||
// Initialization
|
||||
void Init() override;
|
||||
// Get system timer low byte
|
||||
uint32_t GetTimerLow() override;
|
||||
// Get system timer high byte
|
||||
uint32_t GetTimerHigh() override;
|
||||
// Sleep for N nanoseconds
|
||||
void SleepNsec(uint32_t nsec) override;
|
||||
// Sleep for N microseconds
|
||||
void SleepUsec(uint32_t usec) override;
|
||||
|
||||
private:
|
||||
// System timer address
|
||||
static volatile uint32_t *systaddr;
|
||||
// ARM timer address
|
||||
static volatile uint32_t *armtaddr;
|
||||
// Core frequency
|
||||
static volatile uint32_t corefreq;
|
||||
};
|
||||
Reference in New Issue
Block a user