mirror of https://github.com/akuker/RASCSI.git
Rely on handshake only (see item 3. of #1287)
This commit is contained in:
Uwe Seimet
parent
70bcb78d24
commit
08e0f447b4
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@ -15,7 +15,7 @@
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#include <spdlog/spdlog.h>
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#include <sys/ioctl.h>
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#include <sys/mman.h>
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#include <time.h>
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#include <sys/time.h>
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#ifdef __linux__
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#include <sys/epoll.h>
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#endif
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@ -25,54 +25,27 @@ using namespace std;
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bool GPIOBUS::Init(mode_e mode)
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{
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GPIO_FUNCTION_TRACE
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// Save operation mode
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actmode = mode;
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return true;
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}
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//---------------------------------------------------------------------------
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//
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// Receive command handshake
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//
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//---------------------------------------------------------------------------
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int GPIOBUS::CommandHandShake(vector<uint8_t> &buf)
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{
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// Only works in TARGET mode
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assert(actmode == mode_e::TARGET);
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GPIO_FUNCTION_TRACE
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DisableIRQ();
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// Assert REQ signal
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SetREQ(ON);
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SetREQ(true);
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// Wait for ACK signal
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bool ret = WaitACK(ON);
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bool ack = WaitACK(true);
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// Wait until the signal line stabilizes
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SysTimer::SleepNsec(SCSI_DELAY_BUS_SETTLE_DELAY_NS);
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// Get data
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buf[0] = GetDAT();
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// Disable REQ signal
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SetREQ(OFF);
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SetREQ(false);
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// Timeout waiting for ACK assertion
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if (!ret) {
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EnableIRQ();
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return 0;
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}
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// Wait for ACK to clear
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ret = WaitACK(OFF);
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// Timeout waiting for ACK to clear
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if (!ret) {
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// Timeout waiting for ACK to change
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if (!ack || !WaitACK(false)) {
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EnableIRQ();
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return 0;
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}
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@ -87,34 +60,27 @@ int GPIOBUS::CommandHandShake(vector<uint8_t> &buf)
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// PiSCSI becomes ICD compatible by ignoring the prepended $1F byte before processing the CDB.
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if (buf[0] == 0x1F) {
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SetREQ(ON);
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SetREQ(true);
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ret = WaitACK(ON);
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SysTimer::SleepNsec(SCSI_DELAY_BUS_SETTLE_DELAY_NS);
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ack = WaitACK(true);
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// Get the actual SCSI command
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buf[0] = GetDAT();
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SetREQ(OFF);
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SetREQ(false);
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if (!ret) {
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EnableIRQ();
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return 0;
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}
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WaitACK(OFF);
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if (!ret) {
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// Timeout waiting for ACK to change
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if (!ack || !WaitACK(false)) {
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EnableIRQ();
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return 0;
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}
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}
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const int command_byte_count = GetCommandByteCount(buf[0]);
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if (command_byte_count == 0) {
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if (!command_byte_count) {
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EnableIRQ();
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// Unknown command
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return 0;
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}
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@ -124,31 +90,16 @@ int GPIOBUS::CommandHandShake(vector<uint8_t> &buf)
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for (bytes_received = 1; bytes_received < command_byte_count; bytes_received++) {
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++offset;
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// Assert REQ signal
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SetREQ(ON);
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SetREQ(true);
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// Wait for ACK signal
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ret = WaitACK(ON);
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ack = WaitACK(true);
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// Wait until the signal line stabilizes
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SysTimer::SleepNsec(SCSI_DELAY_BUS_SETTLE_DELAY_NS);
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// Get data
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buf[offset] = GetDAT();
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// Clear the REQ signal
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SetREQ(OFF);
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SetREQ(false);
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// Check for timeout waiting for ACK assertion
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if (!ret) {
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break;
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}
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// Wait for ACK to clear
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ret = WaitACK(OFF);
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// Check for timeout waiting for ACK to clear
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if (!ret) {
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// Timeout waiting for ACK to change
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if (!ack || !WaitACK(false)) {
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break;
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}
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}
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@ -158,63 +109,37 @@ int GPIOBUS::CommandHandShake(vector<uint8_t> &buf)
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return bytes_received;
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}
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//---------------------------------------------------------------------------
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//
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// Data reception handshake
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//
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//---------------------------------------------------------------------------
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// Handshake for DATA IN and MESSAGE IN
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int GPIOBUS::ReceiveHandShake(uint8_t *buf, int count)
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{
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GPIO_FUNCTION_TRACE
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int i;
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int bytes_received;
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// Disable IRQs
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DisableIRQ();
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if (actmode == mode_e::TARGET) {
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for (i = 0; i < count; i++) {
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// Assert the REQ signal
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SetREQ(ON);
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for (bytes_received = 0; bytes_received < count; bytes_received++) {
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SetREQ(true);
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// Wait for ACK
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bool ret = WaitACK(ON);
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const bool ack = WaitACK(true);
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// Wait until the signal line stabilizes
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SysTimer::SleepNsec(SCSI_DELAY_BUS_SETTLE_DELAY_NS);
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// Get data
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*buf = GetDAT();
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// Clear the REQ signal
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SetREQ(OFF);
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SetREQ(false);
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// Check for timeout waiting for ACK signal
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if (!ret) {
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// Timeout waiting for ACK to change
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if (!ack || !WaitACK(false)) {
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break;
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}
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// Wait for ACK to clear
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ret = WaitACK(OFF);
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// Check for timeout waiting for ACK to clear
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if (!ret) {
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break;
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}
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// Advance the buffer pointer to receive the next byte
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buf++;
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}
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} else {
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// Get phase
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Acquire();
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phase_t phase = GetPhase();
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for (i = 0; i < count; i++) {
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// Wait for the REQ signal to be asserted
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bool ret = WaitREQ(ON);
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const phase_t phase = GetPhase();
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for (bytes_received = 0; bytes_received < count; bytes_received++) {
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// Check for timeout waiting for REQ signal
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if (!ret) {
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if (!WaitREQ(true)) {
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break;
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}
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@ -224,23 +149,17 @@ int GPIOBUS::ReceiveHandShake(uint8_t *buf, int count)
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break;
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}
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// Wait until the signal line stabilizes
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SysTimer::SleepNsec(SCSI_DELAY_BUS_SETTLE_DELAY_NS);
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// Get data
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*buf = GetDAT();
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// Assert the ACK signal
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SetACK(ON);
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SetACK(true);
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// Wait for REQ to clear
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ret = WaitREQ(OFF);
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const bool req = WaitREQ(true);
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// Clear the ACK signal
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SetACK(OFF);
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SetACK(false);
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// Check for timeout waiting for REQ to clear
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if (!ret) {
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if (!req) {
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break;
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}
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@ -250,94 +169,70 @@ int GPIOBUS::ReceiveHandShake(uint8_t *buf, int count)
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break;
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}
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// Advance the buffer pointer to receive the next byte
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buf++;
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}
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}
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// Re-enable IRQ
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EnableIRQ();
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// Return the number of bytes received
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return i;
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return bytes_received;
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}
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//---------------------------------------------------------------------------
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//
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// Data transmission handshake
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//
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//---------------------------------------------------------------------------
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// Handshake for DATA OUT and MESSAGE OUT
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int GPIOBUS::SendHandShake(uint8_t *buf, int count, int delay_after_bytes)
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{
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GPIO_FUNCTION_TRACE
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int i;
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int bytes_sent;
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// Disable IRQs
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DisableIRQ();
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if (actmode == mode_e::TARGET) {
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for (i = 0; i < count; i++) {
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if (i == delay_after_bytes) {
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for (bytes_sent = 0; bytes_sent < count; bytes_sent++) {
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if (bytes_sent == delay_after_bytes) {
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spdlog::trace("DELAYING for " + to_string(SCSI_DELAY_SEND_DATA_DAYNAPORT_NS) + " ns after " +
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to_string(delay_after_bytes) + " bytes");
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to_string(delay_after_bytes) + " bytes");
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EnableIRQ();
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const timespec ts = { .tv_sec = 0, .tv_nsec = SCSI_DELAY_SEND_DATA_DAYNAPORT_NS};
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nanosleep(&ts, nullptr);
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DisableIRQ();
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}
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// Set the DATA signals
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SetDAT(*buf);
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// Wait for ACK to clear
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bool ret = WaitACK(OFF);
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// Check for timeout waiting for ACK to clear
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if (!ret) {
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if (!WaitACK(false)) {
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break;
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}
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// Already waiting for ACK to clear
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SetREQ(true);
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// Assert the REQ signal
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SetREQ(ON);
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const bool ack = WaitACK(true);
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// Wait for ACK
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ret = WaitACK(ON);
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// Clear REQ signal
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SetREQ(OFF);
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SetREQ(false);
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// Check for timeout waiting for ACK to clear
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if (!ret) {
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// TODO Do we really have to clear REQ here and everywhere else before checking this?
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if (!ack) {
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break;
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}
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// Advance the data buffer pointer to receive the next byte
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buf++;
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}
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// Wait for ACK to clear
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WaitACK(OFF);
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WaitACK(false);
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} else {
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// Get Phase
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Acquire();
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phase_t phase = GetPhase();
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const phase_t phase = GetPhase();
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for (i = 0; i < count; i++) {
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// Set the DATA signals
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for (bytes_sent = 0; bytes_sent < count; bytes_sent++) {
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SetDAT(*buf);
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// Wait for REQ to be asserted
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bool ret = WaitREQ(ON);
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// Check for timeout waiting for REQ to be asserted
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if (!ret) {
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if (!WaitREQ(true)) {
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break;
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}
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// Signal the last MESSAGE OUT byte
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if (phase == phase_t::msgout && i == count - 1) {
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if (phase == phase_t::msgout && bytes_sent == count - 1) {
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SetATN(false);
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}
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@ -347,19 +242,14 @@ int GPIOBUS::SendHandShake(uint8_t *buf, int count, int delay_after_bytes)
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break;
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}
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// Already waiting for REQ assertion
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SetACK(true);
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// Assert the ACK signal
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SetACK(ON);
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const bool req = WaitREQ(false);
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// Wait for REQ to clear
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ret = WaitREQ(OFF);
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// Clear the ACK signal
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SetACK(OFF);
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SetACK(true);
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// Check for timeout waiting for REQ to clear
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if (!ret) {
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if (!req) {
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break;
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}
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@ -369,29 +259,20 @@ int GPIOBUS::SendHandShake(uint8_t *buf, int count, int delay_after_bytes)
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break;
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}
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// Advance the data buffer pointer to receive the next byte
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buf++;
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}
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}
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// Re-enable IRQ
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EnableIRQ();
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// Return number of transmissions
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return i;
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return bytes_sent;
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}
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//---------------------------------------------------------------------------
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//
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// SEL signal event polling
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//
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//---------------------------------------------------------------------------
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bool GPIOBUS::PollSelectEvent()
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{
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#ifndef USE_SEL_EVENT_ENABLE
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return false;
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#else
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GPIO_FUNCTION_TRACE
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errno = 0;
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if (epoll_event epev; epoll_wait(epfd, &epev, 1, -1) <= 0) {
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@ -412,7 +293,7 @@ bool GPIOBUS::WaitSignal(int pin, bool ast)
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{
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const auto now = chrono::steady_clock::now();
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// Wait up to 3 s
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// Wait for up to 3 s
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do {
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Acquire();
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