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Restore common version of this file
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@ -6404,12 +6404,12 @@ void FASTCALL SASIDEV::BusFree()
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// Phase Setting
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ctrl.phase = BUS::busfree;
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////////////// // Set Signal lines
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////////////// ctrl.bus->SetREQ(FALSE);
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////////////// ctrl.bus->SetMSG(FALSE);
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////////////// ctrl.bus->SetCD(FALSE);
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////////////// ctrl.bus->SetIO(FALSE);
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////////////// ctrl.bus->SetBSY(FALSE);
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// Set Signal lines
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ctrl.bus->SetREQ(FALSE);
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ctrl.bus->SetMSG(FALSE);
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ctrl.bus->SetCD(FALSE);
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ctrl.bus->SetIO(FALSE);
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ctrl.bus->SetBSY(FALSE);
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// Initialize status and message
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ctrl.status = 0x00;
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@ -6490,10 +6490,10 @@ void FASTCALL SASIDEV::Command()
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// Phase Setting
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ctrl.phase = BUS::command;
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////////// // Signal line operated by the target
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////////// ctrl.bus->SetMSG(FALSE);
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////////// ctrl.bus->SetCD(TRUE);
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////////// ctrl.bus->SetIO(FALSE);
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// Signal line operated by the target
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ctrl.bus->SetMSG(FALSE);
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ctrl.bus->SetCD(TRUE);
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ctrl.bus->SetIO(FALSE);
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// Wait until target sets the following condition:
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// MSG = FALSE
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@ -8114,13 +8114,12 @@ void FASTCALL SCSIDEV::BusFree()
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// Phase setting
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ctrl.phase = BUS::busfree;
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////////// // Signal line
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// We shouldn't be setting ANYTHING
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////////// ctrl.bus->SetREQ(FALSE);
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////////// ctrl.bus->SetMSG(FALSE);
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////////// ctrl.bus->SetCD(FALSE);
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////////// ctrl.bus->SetIO(FALSE);
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////////// ctrl.bus->SetBSY(FALSE);
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// Signal line
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ctrl.bus->SetREQ(FALSE);
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ctrl.bus->SetMSG(FALSE);
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ctrl.bus->SetCD(FALSE);
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ctrl.bus->SetIO(FALSE);
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ctrl.bus->SetBSY(FALSE);
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// Initialize status and message
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ctrl.status = 0x00;
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