From 8348aabdb1363d2bdc8e9fff6ddb4f1e1a86e215 Mon Sep 17 00:00:00 2001
From: Uwe Seimet <Uwe.Seimet@seimet.de>
Date: Mon, 23 Aug 2021 17:26:07 +0200
Subject: [PATCH] Updated TestUnitReady

---
 src/raspberrypi/devices/scsi_daynaport.cpp   | 3 +++
 src/raspberrypi/devices/scsi_host_bridge.cpp | 4 +++-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/src/raspberrypi/devices/scsi_daynaport.cpp b/src/raspberrypi/devices/scsi_daynaport.cpp
index a01b6ad6..fcb0a601 100644
--- a/src/raspberrypi/devices/scsi_daynaport.cpp
+++ b/src/raspberrypi/devices/scsi_daynaport.cpp
@@ -558,6 +558,9 @@ bool SCSIDaynaPort::EnableInterface(const DWORD *cdb)
 void SCSIDaynaPort::TestUnitReady(SASIDEV *controller)
 {
 	// TEST UNIT READY Success
+
+	// status phase
+	controller->Status();
 }
 
 void SCSIDaynaPort::Read6(SASIDEV *controller)
diff --git a/src/raspberrypi/devices/scsi_host_bridge.cpp b/src/raspberrypi/devices/scsi_host_bridge.cpp
index 9d61f2b3..1fb21017 100644
--- a/src/raspberrypi/devices/scsi_host_bridge.cpp
+++ b/src/raspberrypi/devices/scsi_host_bridge.cpp
@@ -179,7 +179,9 @@ int SCSIBR::Inquiry(const DWORD *cdb, BYTE *buf)
 void SCSIBR::TestUnitReady(SASIDEV *controller)
 {
 	// TEST UNIT READY Success
-}
+
+	// status phase
+	controller->Status();}
 
 //---------------------------------------------------------------------------
 //