mirror of https://github.com/akuker/RASCSI.git
Un-do extraneous changes before merging back into source branch
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a033451863
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@ -1,65 +0,0 @@
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#!/usr/bin/python
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import sys
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outfile = open('data.json', 'w')
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infile = open('timing_drawer.txt','r')
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print("{signal: [", file=outfile)
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firstline = infile.readline()
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num_columns = len(firstline.split(";"))
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# Skip the time field
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field_num = 1
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while (field_num < num_columns):
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var = firstline.split(";")
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var2 = var[field_num].split("=")
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field_name = var2[0]
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infile.seek(0)
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print(" {name: '" + field_name + "', wave: '", file=outfile, end='')
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prev_val = ''
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if (field_name == "DATA"):
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for line in infile:
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value_pair = line.split(";")[field_num]
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z = value_pair.split("=")[1].strip().replace(".","")
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if(z == prev_val):
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out = '.'
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prev_val = z
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elif (z == '00'):
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out = '0'
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else:
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out = '2'
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print(out, file=outfile, end='')
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prev_val = z
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print("', data: [", file=outfile, end='')
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infile.seek(0)
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for line in infile:
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value_pair = line.split(";")[field_num]
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z = value_pair.split("=")[1].strip().replace(".","")
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if(z == prev_val):
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continue
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print("'" + z + "', ", file=outfile, end='')
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prev_val = z
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print("]},", file=outfile)
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else:
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for line in infile:
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value_pair = line.split(";")[field_num]
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z = value_pair.split("=")[1]
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if(z == prev_val):
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z = '.'
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else:
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prev_val = z
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print(z, file=outfile, end='')
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print("'},", file=outfile)
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field_num = field_num + 1
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print("]}", file=outfile)
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outfile.close()
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@ -43,14 +43,6 @@
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// Disk
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//
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//===========================================================================
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#ifndef DISK_LOG
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#define DISK_LOG
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#endif // DISK_LOG
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#ifndef RASCSI
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#define RASCSI
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#endif // RASCSI
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#ifdef RASCSI
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#define BENDER_SIGNATURE "RaSCSI"
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@ -6447,16 +6439,14 @@ void FASTCALL SASIDEV::Selection()
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return;
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}
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// Wait for this monitor target to assert the selection
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// before moving on to the selection phase.
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if(ctrl.bus->GetBSY())
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{
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// Phase change
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ctrl.phase = BUS::selection;
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spdlog::trace(
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"[ID %d] Selection Phase (with device)", ctrl.id);
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}
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spdlog::trace(
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"Selection Phase ID=%d (with device)", ctrl.id);
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// Phase change
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ctrl.phase = BUS::selection;
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// Raise BSY and respond
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ctrl.bus->SetBSY(TRUE);
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return;
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}
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@ -6495,14 +6485,6 @@ void FASTCALL SASIDEV::Command()
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ctrl.bus->SetCD(TRUE);
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ctrl.bus->SetIO(FALSE);
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// Wait until target sets the following condition:
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// MSG = FALSE
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// CD = TRUE
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// IO = FALSE
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if (ctrl.bus->GetMSG() || !ctrl.bus->GetCD() || ctrl.bus->GetIO()) {
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return;
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}
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// Data transfer is 6 bytes x 1 block
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ctrl.offset = 0;
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ctrl.length = 6;
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@ -8037,7 +8019,6 @@ BUS::phase_t FASTCALL SCSIDEV::Process()
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return ctrl.phase;
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}
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// spdlog::trace("ID {} in phase {}",ctrl.id,ctrl.phase);
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// Phase processing
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switch (ctrl.phase) {
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// Bus free phase
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@ -8162,20 +8143,14 @@ void FASTCALL SCSIDEV::Selection()
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return;
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}
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spdlog::trace(
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"Selection Phase ID={} (with device)", ctrl.id);
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// Phase setting
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ctrl.phase = BUS::selection;
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// Wait for this monitor target to assert the selection
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// before moving on to the selection phase.
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if(ctrl.bus->GetBSY())
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{
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// Phase change
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spdlog::trace(
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"[ID {} Selection Phase (with device)", ctrl.id);
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}
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else{
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spdlog::trace("[ID {}] Selection phase", ctrl.id);
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}
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// Raise BSY and respond
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ctrl.bus->SetBSY(TRUE);
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return;
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}
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@ -141,25 +141,6 @@
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#define PIN_BSY 26 // BSY
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#define PIN_SEL 27 // SEL
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#define ALL_SCSI_PINS \
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((1<<PIN_DT0)|\
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(1<<PIN_DT1)|\
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(1<<PIN_DT2)|\
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(1<<PIN_DT3)|\
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(1<<PIN_DT4)|\
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(1<<PIN_DT5)|\
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(1<<PIN_DT6)|\
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(1<<PIN_DT7)|\
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(1<<PIN_DP)|\
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(1<<PIN_ATN)|\
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(1<<PIN_RST)|\
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(1<<PIN_ACK)|\
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(1<<PIN_REQ)|\
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(1<<PIN_MSG)|\
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(1<<PIN_CD)|\
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(1<<PIN_IO)|\
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(1<<PIN_BSY)|\
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(1<<PIN_SEL))
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#endif
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#ifdef CONNECT_TYPE_FULLSPEC
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#define PIN_SEL 23 // SEL
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#endif
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#define ALL_SCSI_PINS \
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((1<<PIN_DT0)|\
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(1<<PIN_DT1)|\
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(1<<PIN_DT2)|\
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(1<<PIN_DT3)|\
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(1<<PIN_DT4)|\
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(1<<PIN_DT5)|\
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(1<<PIN_DT6)|\
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(1<<PIN_DT7)|\
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(1<<PIN_DP)|\
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(1<<PIN_ATN)|\
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(1<<PIN_RST)|\
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(1<<PIN_ACK)|\
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(1<<PIN_REQ)|\
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(1<<PIN_MSG)|\
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(1<<PIN_CD)|\
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(1<<PIN_IO)|\
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(1<<PIN_BSY)|\
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(1<<PIN_SEL))
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//---------------------------------------------------------------------------
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//
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// Constant declarations(GPIO)
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void FASTCALL SetIO(BOOL ast);
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// Set IO signal
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void FASTCALL SetAct(BOOL ast) { PinSetSignal(PIN_ACT, ast);}
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BOOL FASTCALL GetREQ();
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// Get REQ signal
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void FASTCALL SetREQ(BOOL ast);
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@ -15,6 +15,9 @@
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#define LOGINFO(...) \
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do{char buf[256]; snprintf(buf, 256,__VA_ARGS__); spdlog::info(buf);}while(0)
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#define LOGTRACE(...) \
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do{char buf[256]; snprintf(buf, 256,__VA_ARGS__); spdlog::trace(buf);}while(0)
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//===========================================================================
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//
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@ -1147,4 +1147,3 @@ init_exit:
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return ret;
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#endif // BAREMETAL
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}
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