mirror of
https://github.com/akuker/RASCSI.git
synced 2024-07-02 16:29:33 +00:00
a41855c038
* First attempt at adding 2.5 inch drive connector * Clean up silkscreen and fix DRC issues * additional cleanup. Made Pin 1 of the PB connector square * minor tweaks * Updates for ordered version * Generated .STEP file for RaSCSI * Added STEP file and updated symbol and 3d model references to reference the correct gender of parts. Should be no functional change * Added STEP file and updated symbol and 3d model references to reference the correct gender of parts. Should be no functional change * Added 3D models and correct footprints for STEP file * Merge version 20.12.0 into the master branch (#75) * Update README.md Added reference to gitflow * Updated to match new versioning structure (#73) * Updated to match new versioning structure * fix version number Co-authored-by: Tony Kuker <akuker@gmail.com> * Scsimon improvements (#74) * Updated scsimon to save data on a nano-second time scale, instead of micro-second * Cleanup error messages and data types Co-authored-by: Tony Kuker <akuker@gmail.com> * Updated for new version number * Change reported version back to development build Co-authored-by: Tony Kuker <akuker@gmail.com> * Generate step file and schematic pdf * First draft of powerbook drive bracket * Added side holes and hole for MIPI connector * Set theme jekyll-theme-midnight * Set theme jekyll-theme-dinky * Create CNAME * Delete CNAME * Additional updates to the powerbook 3d printed bracket * Moved RaSCSI board 1mm in + lots of cleanup * Added optional floppy power connector. As-ordered version 2.4a * Added optional floppy power connector. As-ordered version 2.4a * Update rascsi_version.cpp * Update Makefile * Update Makefile Revert extraneous whitepace * Update scsidev_ctrl.cpp Revert unneeded change. Co-authored-by: Tony <akuker@gmail.com>
111 lines
2.1 KiB
Plaintext
111 lines
2.1 KiB
Plaintext
{
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"Header":
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{
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"GenerationSoftware":
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{
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"Vendor": "KiCad",
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"Application": "Pcbnew",
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"Version": "(5.1.9-16-g1737927814)-1"
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},
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"CreationDate": "2021-04-12T08:44:27-05:00"
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},
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"GeneralSpecs":
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{
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"ProjectId":
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{
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"Name": "rascsi_2p4",
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"GUID": "72617363-7369-45f3-9270-342e6b696361",
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"Revision": "rev?"
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},
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"Size":
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{
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"X": 0.000,
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"Y": 0.000
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},
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"LayerNumber": 2,
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"BoardThickness": 1.600
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},
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"DesignRules":
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[
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{
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"Layers": "Outer",
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"PadToPad": 0.127,
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"PadToTrack": 0.127,
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"TrackToTrack": 0.127,
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"MinLineWidth": 0.150,
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"TrackToRegion": 0.508,
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"RegionToRegion": 0.508
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}
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],
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"FilesAttributes":
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[
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{
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"Path": "rascsi_2p4-Top.gbr",
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"FileFunction": "Copper,L1,Top",
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"FilePolarity": "Positive"
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},
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{
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"Path": "rascsi_2p4-Bottom.gbr",
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"FileFunction": "Copper,L2,Bot",
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"FilePolarity": "Positive"
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},
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{
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"Path": "rascsi_2p4-F_SilkS.gbr",
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"FileFunction": "Legend,Top",
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"FilePolarity": "Positive"
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},
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{
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"Path": "rascsi_2p4-B_SilkS.gbr",
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"FileFunction": "Legend,Bot",
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"FilePolarity": "Positive"
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},
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{
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"Path": "rascsi_2p4-F_Mask.gbr",
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"FileFunction": "SolderMask,Top",
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"FilePolarity": "Negative"
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},
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{
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"Path": "rascsi_2p4-B_Mask.gbr",
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"FileFunction": "SolderMask,Bot",
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"FilePolarity": "Negative"
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},
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{
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"Path": "rascsi_2p4-Edge_Cuts.gbr",
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"FileFunction": "Profile",
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"FilePolarity": "Positive"
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}
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],
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"MaterialStackup":
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[
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{
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"Type": "Legend",
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"Notes": "Layer F.SilkS"
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},
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{
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"Type": "SolderMask",
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"Notes": "Layer F.Mask"
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},
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{
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"Type": "Copper",
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"Notes": "Layer Top"
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},
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{
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"Type": "Dielectric",
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"Material": "FR4",
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"Notes": "Layers L1/L2"
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},
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{
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"Type": "Copper",
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"Notes": "Layer Bottom"
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},
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{
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"Type": "SolderMask",
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"Notes": "Layer B.Mask"
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},
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{
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"Type": "Legend",
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"Notes": "Layer B.SilkS"
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}
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]
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}
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