mirror of https://github.com/akuker/RASCSI.git
990 lines
27 KiB
C++
990 lines
27 KiB
C++
//---------------------------------------------------------------------------
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//
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// SCSI Target Emulator RaSCSI Reloaded
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// for Raspberry Pi
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//
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// Powered by XM6 TypeG Technology.
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// Copyright (C) 2016-2020 GIMONS
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//
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// [ GPIO-SCSI bus ]
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//
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//---------------------------------------------------------------------------
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#include "hal/gpiobus.h"
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#include "config.h"
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#include "hal/sbc_version.h"
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#include "hal/systimer.h"
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#include "log.h"
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#include "os.h"
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#include <array>
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#include <sys/ioctl.h>
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#include <sys/mman.h>
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#include <sys/time.h>
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#ifdef __linux__
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#include <sys/epoll.h>
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#endif
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#if defined CONNECT_TYPE_STANDARD
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#include "hal/gpiobus_standard.h"
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#elif defined CONNECT_TYPE_FULLSPEC
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#include "hal/gpiobus_fullspec.h"
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#elif defined CONNECT_TYPE_AIBOM
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#include "hal/gpiobus_aibom.h"
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#elif defined CONNECT_TYPE_GAMERNIUM
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#include "hal/gpiobus_gamernium.h"
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#else
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#error Invalid connection type or none specified
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#endif
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//---------------------------------------------------------------------------
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//
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// Constant declarations (bus control timing)
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//
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//---------------------------------------------------------------------------
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// SCSI Bus timings taken from:
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// https://www.staff.uni-mainz.de/tacke/scsi/SCSI2-05.html
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[[maybe_unused]] const static int SCSI_DELAY_ARBITRATION_DELAY_NS = 2400;
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[[maybe_unused]] const static int SCSI_DELAY_ASSERTION_PERIOD_NS = 90;
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[[maybe_unused]] const static int SCSI_DELAY_BUS_CLEAR_DELAY_NS = 800;
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[[maybe_unused]] const static int SCSI_DELAY_BUS_FREE_DELAY_NS = 800;
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[[maybe_unused]] const static int SCSI_DELAY_BUS_SET_DELAY_NS = 1800;
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[[maybe_unused]] const static int SCSI_DELAY_BUS_SETTLE_DELAY_NS = 400;
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[[maybe_unused]] const static int SCSI_DELAY_CABLE_SKEW_DELAY_NS = 10;
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[[maybe_unused]] const static int SCSI_DELAY_DATA_RELEASE_DELAY_NS = 400;
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[[maybe_unused]] const static int SCSI_DELAY_DESKEW_DELAY_NS = 45;
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[[maybe_unused]] const static int SCSI_DELAY_DISCONNECTION_DELAY_US = 200;
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[[maybe_unused]] const static int SCSI_DELAY_HOLD_TIME_NS = 45;
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[[maybe_unused]] const static int SCSI_DELAY_NEGATION_PERIOD_NS = 90;
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[[maybe_unused]] const static int SCSI_DELAY_POWER_ON_TO_SELECTION_TIME_S = 10; // (recommended)
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[[maybe_unused]] const static int SCSI_DELAY_RESET_TO_SELECTION_TIME_US = 250 * 1000; // (recommended)
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[[maybe_unused]] const static int SCSI_DELAY_RESET_HOLD_TIME_US = 25;
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[[maybe_unused]] const static int SCSI_DELAY_SELECTION_ABORT_TIME_US = 200;
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[[maybe_unused]] const static int SCSI_DELAY_SELECTION_TIMEOUT_DELAY_NS = 250 * 1000; // (recommended)
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[[maybe_unused]] const static int SCSI_DELAY_FAST_ASSERTION_PERIOD_NS = 30;
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[[maybe_unused]] const static int SCSI_DELAY_FAST_CABLE_SKEW_DELAY_NS = 5;
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[[maybe_unused]] const static int SCSI_DELAY_FAST_DESKEW_DELAY_NS = 20;
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[[maybe_unused]] const static int SCSI_DELAY_FAST_HOLD_TIME_NS = 10;
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[[maybe_unused]] const static int SCSI_DELAY_FAST_NEGATION_PERIOD_NS = 30;
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// The DaynaPort SCSI Link do a short delay in the middle of transfering
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// a packet. This is the number of uS that will be delayed between the
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// header and the actual data.
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const static int SCSI_DELAY_SEND_DATA_DAYNAPORT_US = 100;
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using namespace std;
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// Nothing SBC hardware specific should be done in this function
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bool GPIOBUS::Init(mode_e mode)
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{
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GPIO_FUNCTION_TRACE
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// Save operation mode
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actmode = mode;
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return true;
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}
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void GPIOBUS::Cleanup()
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{
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#if defined(__x86_64__) || defined(__X86__)
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return;
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#else
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// Release SEL signal interrupt
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#ifdef USE_SEL_EVENT_ENABLE
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close(selevreq.fd);
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#endif // USE_SEL_EVENT_ENABLE
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// Set control signals
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PinSetSignal(PIN_ENB, RASCSI_PIN_OFF);
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PinSetSignal(PIN_ACT, RASCSI_PIN_OFF);
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PinSetSignal(PIN_TAD, RASCSI_PIN_OFF);
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PinSetSignal(PIN_IND, RASCSI_PIN_OFF);
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PinSetSignal(PIN_DTD, RASCSI_PIN_OFF);
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PinConfig(PIN_ACT, GPIO_INPUT);
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PinConfig(PIN_TAD, GPIO_INPUT);
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PinConfig(PIN_IND, GPIO_INPUT);
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PinConfig(PIN_DTD, GPIO_INPUT);
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// Initialize all signals
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for (int i = 0; SignalTable[i] >= 0; i++) {
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int pin = SignalTable[i];
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PinSetSignal(pin, RASCSI_PIN_OFF);
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PinConfig(pin, GPIO_INPUT);
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PullConfig(pin, GPIO_PULLNONE);
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}
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// Set drive strength back to 8mA
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DrvConfig(3);
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#endif // ifdef __x86_64__ || __X86__
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}
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void GPIOBUS::Reset()
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{
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GPIO_FUNCTION_TRACE
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#if defined(__x86_64__) || defined(__X86__)
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return;
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#else
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int i;
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int j;
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// Turn off active signal
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SetControl(PIN_ACT, ACT_OFF);
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// Set all signals to off
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for (i = 0;; i++) {
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j = SignalTable[i];
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if (j < 0) {
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break;
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}
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SetSignal(j, RASCSI_PIN_OFF);
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}
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if (actmode == mode_e::TARGET) {
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// Target mode
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// Set target signal to input
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SetControl(PIN_TAD, TAD_IN);
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SetMode(PIN_BSY, RASCSI_PIN_IN);
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SetMode(PIN_MSG, RASCSI_PIN_IN);
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SetMode(PIN_CD, RASCSI_PIN_IN);
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SetMode(PIN_REQ, RASCSI_PIN_IN);
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SetMode(PIN_IO, RASCSI_PIN_IN);
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// Set the initiator signal to input
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SetControl(PIN_IND, IND_IN);
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SetMode(PIN_SEL, RASCSI_PIN_IN);
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SetMode(PIN_ATN, RASCSI_PIN_IN);
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SetMode(PIN_ACK, RASCSI_PIN_IN);
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SetMode(PIN_RST, RASCSI_PIN_IN);
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// Set data bus signals to input
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SetControl(PIN_DTD, DTD_IN);
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SetMode(PIN_DT0, RASCSI_PIN_IN);
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SetMode(PIN_DT1, RASCSI_PIN_IN);
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SetMode(PIN_DT2, RASCSI_PIN_IN);
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SetMode(PIN_DT3, RASCSI_PIN_IN);
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SetMode(PIN_DT4, RASCSI_PIN_IN);
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SetMode(PIN_DT5, RASCSI_PIN_IN);
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SetMode(PIN_DT6, RASCSI_PIN_IN);
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SetMode(PIN_DT7, RASCSI_PIN_IN);
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SetMode(PIN_DP, RASCSI_PIN_IN);
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} else {
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// Initiator mode
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// Set target signal to input
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SetControl(PIN_TAD, TAD_IN);
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SetMode(PIN_BSY, RASCSI_PIN_IN);
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SetMode(PIN_MSG, RASCSI_PIN_IN);
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SetMode(PIN_CD, RASCSI_PIN_IN);
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SetMode(PIN_REQ, RASCSI_PIN_IN);
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SetMode(PIN_IO, RASCSI_PIN_IN);
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// Set the initiator signal to output
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SetControl(PIN_IND, IND_OUT);
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SetMode(PIN_SEL, RASCSI_PIN_OUT);
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SetMode(PIN_ATN, RASCSI_PIN_OUT);
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SetMode(PIN_ACK, RASCSI_PIN_OUT);
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SetMode(PIN_RST, RASCSI_PIN_OUT);
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// Set the data bus signals to output
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SetControl(PIN_DTD, DTD_OUT);
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SetMode(PIN_DT0, RASCSI_PIN_OUT);
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SetMode(PIN_DT1, RASCSI_PIN_OUT);
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SetMode(PIN_DT2, RASCSI_PIN_OUT);
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SetMode(PIN_DT3, RASCSI_PIN_OUT);
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SetMode(PIN_DT4, RASCSI_PIN_OUT);
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SetMode(PIN_DT5, RASCSI_PIN_OUT);
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SetMode(PIN_DT6, RASCSI_PIN_OUT);
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SetMode(PIN_DT7, RASCSI_PIN_OUT);
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SetMode(PIN_DP, RASCSI_PIN_OUT);
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}
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// Initialize all signals
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signals = 0;
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#endif // ifdef __x86_64__ || __X86__
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}
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void GPIOBUS::SetENB(bool ast)
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{
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GPIO_FUNCTION_TRACE
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PinSetSignal(PIN_ENB, ast ? ENB_ON : ENB_OFF);
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}
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bool GPIOBUS::GetBSY() const
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{
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GPIO_FUNCTION_TRACE
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return GetSignal(PIN_BSY);
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}
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void GPIOBUS::SetBSY(bool ast)
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{
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GPIO_FUNCTION_TRACE
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// Set BSY signal
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SetSignal(PIN_BSY, ast);
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if (actmode == mode_e::TARGET) {
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if (ast) {
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// Turn on ACTIVE signal
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SetControl(PIN_ACT, ACT_ON);
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// Set Target signal to output
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SetControl(PIN_TAD, TAD_OUT);
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SetMode(PIN_BSY, RASCSI_PIN_OUT);
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SetMode(PIN_MSG, RASCSI_PIN_OUT);
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SetMode(PIN_CD, RASCSI_PIN_OUT);
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SetMode(PIN_REQ, RASCSI_PIN_OUT);
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SetMode(PIN_IO, RASCSI_PIN_OUT);
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} else {
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// Turn off the ACTIVE signal
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SetControl(PIN_ACT, ACT_OFF);
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// Set the target signal to input
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SetControl(PIN_TAD, TAD_IN);
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SetMode(PIN_BSY, RASCSI_PIN_IN);
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SetMode(PIN_MSG, RASCSI_PIN_IN);
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SetMode(PIN_CD, RASCSI_PIN_IN);
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SetMode(PIN_REQ, RASCSI_PIN_IN);
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SetMode(PIN_IO, RASCSI_PIN_IN);
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}
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}
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}
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bool GPIOBUS::GetSEL() const
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{
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GPIO_FUNCTION_TRACE
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return GetSignal(PIN_SEL);
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}
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void GPIOBUS::SetSEL(bool ast)
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{
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GPIO_FUNCTION_TRACE
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if (actmode == mode_e::INITIATOR && ast) {
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// Turn on ACTIVE signal
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SetControl(PIN_ACT, ACT_ON);
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}
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// Set SEL signal
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SetSignal(PIN_SEL, ast);
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}
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bool GPIOBUS::GetATN() const
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{
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GPIO_FUNCTION_TRACE
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return GetSignal(PIN_ATN);
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}
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void GPIOBUS::SetATN(bool ast)
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{
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GPIO_FUNCTION_TRACE
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SetSignal(PIN_ATN, ast);
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}
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bool GPIOBUS::GetACK() const
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{
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GPIO_FUNCTION_TRACE
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return GetSignal(PIN_ACK);
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}
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void GPIOBUS::SetACK(bool ast)
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{
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GPIO_FUNCTION_TRACE
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SetSignal(PIN_ACK, ast);
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}
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bool GPIOBUS::GetACT() const
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{
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GPIO_FUNCTION_TRACE
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return GetSignal(PIN_ACT);
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}
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void GPIOBUS::SetACT(bool ast)
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{
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GPIO_FUNCTION_TRACE
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SetSignal(PIN_ACT, ast);
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}
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bool GPIOBUS::GetRST() const
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{
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GPIO_FUNCTION_TRACE
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return GetSignal(PIN_RST);
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}
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void GPIOBUS::SetRST(bool ast)
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{
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GPIO_FUNCTION_TRACE
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SetSignal(PIN_RST, ast);
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}
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bool GPIOBUS::GetMSG() const
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{
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GPIO_FUNCTION_TRACE
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return GetSignal(PIN_MSG);
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}
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void GPIOBUS::SetMSG(bool ast)
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{
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GPIO_FUNCTION_TRACE
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SetSignal(PIN_MSG, ast);
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}
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bool GPIOBUS::GetCD() const
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{
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GPIO_FUNCTION_TRACE
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return GetSignal(PIN_CD);
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}
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void GPIOBUS::SetCD(bool ast)
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{
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GPIO_FUNCTION_TRACE
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SetSignal(PIN_CD, ast);
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}
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bool GPIOBUS::GetIO()
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{
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GPIO_FUNCTION_TRACE
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bool ast = GetSignal(PIN_IO);
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if (actmode == mode_e::INITIATOR) {
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// Change the data input/output direction by IO signal
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if (ast) {
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SetControl(PIN_DTD, DTD_IN);
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SetMode(PIN_DT0, RASCSI_PIN_IN);
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SetMode(PIN_DT1, RASCSI_PIN_IN);
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SetMode(PIN_DT2, RASCSI_PIN_IN);
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SetMode(PIN_DT3, RASCSI_PIN_IN);
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SetMode(PIN_DT4, RASCSI_PIN_IN);
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SetMode(PIN_DT5, RASCSI_PIN_IN);
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SetMode(PIN_DT6, RASCSI_PIN_IN);
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SetMode(PIN_DT7, RASCSI_PIN_IN);
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SetMode(PIN_DP, RASCSI_PIN_IN);
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} else {
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SetControl(PIN_DTD, DTD_OUT);
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SetMode(PIN_DT0, RASCSI_PIN_OUT);
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SetMode(PIN_DT1, RASCSI_PIN_OUT);
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SetMode(PIN_DT2, RASCSI_PIN_OUT);
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SetMode(PIN_DT3, RASCSI_PIN_OUT);
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SetMode(PIN_DT4, RASCSI_PIN_OUT);
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SetMode(PIN_DT5, RASCSI_PIN_OUT);
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SetMode(PIN_DT6, RASCSI_PIN_OUT);
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SetMode(PIN_DT7, RASCSI_PIN_OUT);
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SetMode(PIN_DP, RASCSI_PIN_OUT);
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}
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}
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return ast;
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}
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void GPIOBUS::SetIO(bool ast)
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{
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GPIO_FUNCTION_TRACE
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SetSignal(PIN_IO, ast);
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if (actmode == mode_e::TARGET) {
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// Change the data input/output direction by IO signal
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if (ast) {
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SetControl(PIN_DTD, DTD_OUT);
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SetDAT(0);
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SetMode(PIN_DT0, RASCSI_PIN_OUT);
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SetMode(PIN_DT1, RASCSI_PIN_OUT);
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SetMode(PIN_DT2, RASCSI_PIN_OUT);
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SetMode(PIN_DT3, RASCSI_PIN_OUT);
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SetMode(PIN_DT4, RASCSI_PIN_OUT);
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SetMode(PIN_DT5, RASCSI_PIN_OUT);
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SetMode(PIN_DT6, RASCSI_PIN_OUT);
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SetMode(PIN_DT7, RASCSI_PIN_OUT);
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SetMode(PIN_DP, RASCSI_PIN_OUT);
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} else {
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SetControl(PIN_DTD, DTD_IN);
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SetMode(PIN_DT0, RASCSI_PIN_IN);
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SetMode(PIN_DT1, RASCSI_PIN_IN);
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SetMode(PIN_DT2, RASCSI_PIN_IN);
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SetMode(PIN_DT3, RASCSI_PIN_IN);
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SetMode(PIN_DT4, RASCSI_PIN_IN);
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SetMode(PIN_DT5, RASCSI_PIN_IN);
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SetMode(PIN_DT6, RASCSI_PIN_IN);
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SetMode(PIN_DT7, RASCSI_PIN_IN);
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SetMode(PIN_DP, RASCSI_PIN_IN);
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}
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}
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}
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bool GPIOBUS::GetREQ() const
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{
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GPIO_FUNCTION_TRACE
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return GetSignal(PIN_REQ);
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}
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void GPIOBUS::SetREQ(bool ast)
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{
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GPIO_FUNCTION_TRACE
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SetSignal(PIN_REQ, ast);
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}
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bool GPIOBUS::GetDP() const
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{
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GPIO_FUNCTION_TRACE
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return GetSignal(PIN_DP);
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}
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//---------------------------------------------------------------------------
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//
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// Receive command handshake
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//
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//---------------------------------------------------------------------------
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int GPIOBUS::CommandHandShake(BYTE *buf)
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{
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GPIO_FUNCTION_TRACE
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// Only works in TARGET mode
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if (actmode != mode_e::TARGET) {
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return 0;
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}
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DisableIRQ();
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// Assert REQ signal
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SetSignal(PIN_REQ, RASCSI_PIN_ON);
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// Wait for ACK signal
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bool ret = WaitSignal(PIN_ACK, RASCSI_PIN_ON);
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// Wait until the signal line stabilizes
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SysTimer::SleepNsec(SCSI_DELAY_BUS_SETTLE_DELAY_NS);
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// Get data
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*buf = GetDAT();
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// Disable REQ signal
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SetSignal(PIN_REQ, RASCSI_PIN_OFF);
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// Timeout waiting for ACK assertion
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if (!ret) {
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EnableIRQ();
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return 0;
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}
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// Wait for ACK to clear
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ret = WaitSignal(PIN_ACK, RASCSI_PIN_OFF);
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// Timeout waiting for ACK to clear
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if (!ret) {
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EnableIRQ();
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return 0;
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}
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// The ICD AdSCSI ST, AdSCSI Plus ST and AdSCSI Micro ST host adapters allow SCSI devices to be connected
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// to the ACSI bus of Atari ST/TT computers and some clones. ICD-aware drivers prepend a $1F byte in front
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// of the CDB (effectively resulting in a custom SCSI command) in order to get access to the full SCSI
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// command set. Native ACSI is limited to the low SCSI command classes with command bytes < $20.
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// Most other host adapters (e.g. LINK96/97 and the one by Inventronik) and also several devices (e.g.
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// UltraSatan or GigaFile) that can directly be connected to the Atari's ACSI port also support ICD
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// semantics. I fact, these semantics have become a standard in the Atari world.
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// RaSCSI becomes ICD compatible by ignoring the prepended $1F byte before processing the CDB.
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if (*buf == 0x1F) {
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SetSignal(PIN_REQ, RASCSI_PIN_ON);
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ret = WaitSignal(PIN_ACK, RASCSI_PIN_ON);
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SysTimer::SleepNsec(SCSI_DELAY_BUS_SETTLE_DELAY_NS);
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// Get the actual SCSI command
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*buf = GetDAT();
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SetSignal(PIN_REQ, RASCSI_PIN_OFF);
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if (!ret) {
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EnableIRQ();
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return 0;
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}
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WaitSignal(PIN_ACK, RASCSI_PIN_OFF);
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if (!ret) {
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EnableIRQ();
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return 0;
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}
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}
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int command_byte_count = GetCommandByteCount(*buf);
|
|
|
|
// Increment buffer pointer
|
|
buf++;
|
|
|
|
int bytes_received;
|
|
for (bytes_received = 1; bytes_received < command_byte_count; bytes_received++) {
|
|
// Assert REQ signal
|
|
SetSignal(PIN_REQ, RASCSI_PIN_ON);
|
|
|
|
// Wait for ACK signal
|
|
ret = WaitSignal(PIN_ACK, RASCSI_PIN_ON);
|
|
|
|
// Wait until the signal line stabilizes
|
|
SysTimer::SleepNsec(SCSI_DELAY_BUS_SETTLE_DELAY_NS);
|
|
|
|
// Get data
|
|
*buf = GetDAT();
|
|
|
|
// Clear the REQ signal
|
|
SetSignal(PIN_REQ, RASCSI_PIN_OFF);
|
|
|
|
// Check for timeout waiting for ACK assertion
|
|
if (!ret) {
|
|
break;
|
|
}
|
|
|
|
// Wait for ACK to clear
|
|
ret = WaitSignal(PIN_ACK, RASCSI_PIN_OFF);
|
|
|
|
// Check for timeout waiting for ACK to clear
|
|
if (!ret) {
|
|
break;
|
|
}
|
|
|
|
// Advance the buffer pointer to receive the next byte
|
|
buf++;
|
|
}
|
|
|
|
EnableIRQ();
|
|
|
|
return bytes_received;
|
|
}
|
|
|
|
//---------------------------------------------------------------------------
|
|
//
|
|
// Data reception handshake
|
|
//
|
|
//---------------------------------------------------------------------------
|
|
int GPIOBUS::ReceiveHandShake(BYTE *buf, int count)
|
|
{
|
|
GPIO_FUNCTION_TRACE
|
|
|
|
int i;
|
|
|
|
// Disable IRQs
|
|
DisableIRQ();
|
|
|
|
if (actmode == mode_e::TARGET) {
|
|
for (i = 0; i < count; i++) {
|
|
// Assert the REQ signal
|
|
SetSignal(PIN_REQ, RASCSI_PIN_ON);
|
|
|
|
// Wait for ACK
|
|
bool ret = WaitSignal(PIN_ACK, RASCSI_PIN_ON);
|
|
|
|
// Wait until the signal line stabilizes
|
|
SysTimer::SleepNsec(SCSI_DELAY_BUS_SETTLE_DELAY_NS);
|
|
|
|
// Get data
|
|
*buf = GetDAT();
|
|
|
|
// Clear the REQ signal
|
|
SetSignal(PIN_REQ, RASCSI_PIN_OFF);
|
|
|
|
// Check for timeout waiting for ACK signal
|
|
if (!ret) {
|
|
break;
|
|
}
|
|
|
|
// Wait for ACK to clear
|
|
ret = WaitSignal(PIN_ACK, RASCSI_PIN_OFF);
|
|
|
|
// Check for timeout waiting for ACK to clear
|
|
if (!ret) {
|
|
break;
|
|
}
|
|
|
|
// Advance the buffer pointer to receive the next byte
|
|
buf++;
|
|
}
|
|
} else {
|
|
// Get phase
|
|
uint32_t phase = Acquire() & GPIO_MCI;
|
|
|
|
for (i = 0; i < count; i++) {
|
|
// Wait for the REQ signal to be asserted
|
|
bool ret = WaitSignal(PIN_REQ, RASCSI_PIN_ON);
|
|
|
|
// Check for timeout waiting for REQ signal
|
|
if (!ret) {
|
|
break;
|
|
}
|
|
|
|
// Phase error
|
|
if ((signals & GPIO_MCI) != phase) {
|
|
break;
|
|
}
|
|
|
|
// Wait until the signal line stabilizes
|
|
SysTimer::SleepNsec(SCSI_DELAY_BUS_SETTLE_DELAY_NS);
|
|
|
|
// Get data
|
|
*buf = GetDAT();
|
|
|
|
// Assert the ACK signal
|
|
SetSignal(PIN_ACK, RASCSI_PIN_ON);
|
|
|
|
// Wait for REQ to clear
|
|
ret = WaitSignal(PIN_REQ, RASCSI_PIN_OFF);
|
|
|
|
// Clear the ACK signal
|
|
SetSignal(PIN_ACK, RASCSI_PIN_OFF);
|
|
|
|
// Check for timeout waiting for REQ to clear
|
|
if (!ret) {
|
|
break;
|
|
}
|
|
|
|
// Phase error
|
|
if ((signals & GPIO_MCI) != phase) {
|
|
break;
|
|
}
|
|
|
|
// Advance the buffer pointer to receive the next byte
|
|
buf++;
|
|
}
|
|
}
|
|
|
|
// Re-enable IRQ
|
|
EnableIRQ();
|
|
|
|
// Return the number of bytes received
|
|
return i;
|
|
}
|
|
|
|
//---------------------------------------------------------------------------
|
|
//
|
|
// Data transmission handshake
|
|
//
|
|
//---------------------------------------------------------------------------
|
|
int GPIOBUS::SendHandShake(BYTE *buf, int count, int delay_after_bytes)
|
|
{
|
|
GPIO_FUNCTION_TRACE
|
|
|
|
int i;
|
|
|
|
// Disable IRQs
|
|
DisableIRQ();
|
|
|
|
if (actmode == mode_e::TARGET) {
|
|
for (i = 0; i < count; i++) {
|
|
if (i == delay_after_bytes) {
|
|
LOGTRACE("%s DELAYING for %dus after %d bytes", __PRETTY_FUNCTION__, SCSI_DELAY_SEND_DATA_DAYNAPORT_US,
|
|
(int)delay_after_bytes)
|
|
SysTimer::SleepUsec(SCSI_DELAY_SEND_DATA_DAYNAPORT_US);
|
|
}
|
|
|
|
// Set the DATA signals
|
|
SetDAT(*buf);
|
|
|
|
// Wait for ACK to clear
|
|
bool ret = WaitSignal(PIN_ACK, RASCSI_PIN_OFF);
|
|
|
|
// Check for timeout waiting for ACK to clear
|
|
if (!ret) {
|
|
break;
|
|
}
|
|
|
|
// Already waiting for ACK to clear
|
|
|
|
// Assert the REQ signal
|
|
SetSignal(PIN_REQ, RASCSI_PIN_ON);
|
|
|
|
// Wait for ACK
|
|
ret = WaitSignal(PIN_ACK, RASCSI_PIN_ON);
|
|
|
|
// Clear REQ signal
|
|
SetSignal(PIN_REQ, RASCSI_PIN_OFF);
|
|
|
|
// Check for timeout waiting for ACK to clear
|
|
if (!ret) {
|
|
break;
|
|
}
|
|
|
|
// Advance the data buffer pointer to receive the next byte
|
|
buf++;
|
|
}
|
|
|
|
// Wait for ACK to clear
|
|
WaitSignal(PIN_ACK, RASCSI_PIN_OFF);
|
|
} else {
|
|
// Get Phase
|
|
uint32_t phase = Acquire() & GPIO_MCI;
|
|
|
|
for (i = 0; i < count; i++) {
|
|
if (i == delay_after_bytes) {
|
|
LOGTRACE("%s DELAYING for %dus after %d bytes", __PRETTY_FUNCTION__, SCSI_DELAY_SEND_DATA_DAYNAPORT_US,
|
|
(int)delay_after_bytes)
|
|
SysTimer::SleepUsec(SCSI_DELAY_SEND_DATA_DAYNAPORT_US);
|
|
}
|
|
|
|
// Set the DATA signals
|
|
SetDAT(*buf);
|
|
|
|
// Wait for REQ to be asserted
|
|
bool ret = WaitSignal(PIN_REQ, RASCSI_PIN_ON);
|
|
|
|
// Check for timeout waiting for REQ to be asserted
|
|
if (!ret) {
|
|
break;
|
|
}
|
|
|
|
// Phase error
|
|
if ((signals & GPIO_MCI) != phase) {
|
|
break;
|
|
}
|
|
|
|
// Already waiting for REQ assertion
|
|
|
|
// Assert the ACK signal
|
|
SetSignal(PIN_ACK, RASCSI_PIN_ON);
|
|
|
|
// Wait for REQ to clear
|
|
ret = WaitSignal(PIN_REQ, RASCSI_PIN_OFF);
|
|
|
|
// Clear the ACK signal
|
|
SetSignal(PIN_ACK, RASCSI_PIN_OFF);
|
|
|
|
// Check for timeout waiting for REQ to clear
|
|
if (!ret) {
|
|
break;
|
|
}
|
|
|
|
// Phase error
|
|
if ((signals & GPIO_MCI) != phase) {
|
|
break;
|
|
}
|
|
|
|
// Advance the data buffer pointer to receive the next byte
|
|
buf++;
|
|
}
|
|
}
|
|
|
|
// Re-enable IRQ
|
|
EnableIRQ();
|
|
|
|
// Return number of transmissions
|
|
return i;
|
|
}
|
|
|
|
#ifdef USE_SEL_EVENT_ENABLE
|
|
//---------------------------------------------------------------------------
|
|
//
|
|
// SEL signal event polling
|
|
//
|
|
//---------------------------------------------------------------------------
|
|
bool GPIOBUS::PollSelectEvent()
|
|
{
|
|
GPIO_FUNCTION_TRACE
|
|
errno = 0;
|
|
|
|
if (epoll_event epev; epoll_wait(epfd, &epev, 1, -1) <= 0) {
|
|
LOGWARN("%s epoll_wait failed", __PRETTY_FUNCTION__)
|
|
LOGWARN("[%08X] %s", errno, strerror(errno))
|
|
return false;
|
|
}
|
|
|
|
if (gpioevent_data gpev; read(selevreq.fd, &gpev, sizeof(gpev)) < 0) {
|
|
LOGWARN("%s read failed", __PRETTY_FUNCTION__)
|
|
LOGWARN("[%08X] %s", errno, strerror(errno))
|
|
return false;
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
//---------------------------------------------------------------------------
|
|
//
|
|
// Cancel SEL signal event
|
|
//
|
|
//---------------------------------------------------------------------------
|
|
void GPIOBUS::ClearSelectEvent()
|
|
{
|
|
GPIO_FUNCTION_TRACE
|
|
}
|
|
#endif // USE_SEL_EVENT_ENABLE
|
|
|
|
//---------------------------------------------------------------------------
|
|
//
|
|
// Signal table
|
|
//
|
|
//---------------------------------------------------------------------------
|
|
const array<int, 19> GPIOBUS::SignalTable = {PIN_DT0, PIN_DT1, PIN_DT2, PIN_DT3, PIN_DT4, PIN_DT5, PIN_DT6,
|
|
PIN_DT7, PIN_DP, PIN_SEL, PIN_ATN, PIN_RST, PIN_ACK, PIN_BSY,
|
|
PIN_MSG, PIN_CD, PIN_IO, PIN_REQ, -1};
|
|
|
|
//---------------------------------------------------------------------------
|
|
//
|
|
// Create work table
|
|
//
|
|
//---------------------------------------------------------------------------
|
|
void GPIOBUS::MakeTable(void)
|
|
{
|
|
GPIO_FUNCTION_TRACE
|
|
|
|
const array<int, 9> pintbl = {PIN_DT0, PIN_DT1, PIN_DT2, PIN_DT3, PIN_DT4, PIN_DT5, PIN_DT6, PIN_DT7, PIN_DP};
|
|
|
|
array<bool, 256> tblParity;
|
|
|
|
// Create parity table
|
|
for (uint32_t i = 0; i < 0x100; i++) {
|
|
uint32_t bits = i;
|
|
uint32_t parity = 0;
|
|
for (int j = 0; j < 8; j++) {
|
|
parity ^= bits & 1;
|
|
bits >>= 1;
|
|
}
|
|
parity = ~parity;
|
|
tblParity[i] = parity & 1;
|
|
}
|
|
|
|
#if SIGNAL_CONTROL_MODE == 0
|
|
// Mask and setting data generation
|
|
for (auto &tbl : tblDatMsk) {
|
|
tbl.fill(-1);
|
|
}
|
|
for (auto &tbl : tblDatSet) {
|
|
tbl.fill(0);
|
|
}
|
|
|
|
for (uint32_t i = 0; i < 0x100; i++) {
|
|
// Bit string for inspection
|
|
uint32_t bits = i;
|
|
|
|
// Get parity
|
|
if (tblParity[i]) {
|
|
bits |= (1 << 8);
|
|
}
|
|
|
|
// Bit check
|
|
for (int j = 0; j < 9; j++) {
|
|
// Index and shift amount calculation
|
|
int index = pintbl[j] / 10;
|
|
int shift = (pintbl[j] % 10) * 3;
|
|
|
|
// Mask data
|
|
tblDatMsk[index][i] &= ~(0x7 << shift);
|
|
|
|
// Setting data
|
|
if (bits & 1) {
|
|
tblDatSet[index][i] |= (1 << shift);
|
|
}
|
|
|
|
bits >>= 1;
|
|
}
|
|
}
|
|
#else
|
|
for (uint32_t i = 0; i < 0x100; i++) {
|
|
// Bit string for inspection
|
|
uint32_t bits = i;
|
|
|
|
// Get parity
|
|
if (tblParity[i]) {
|
|
bits |= (1 << 8);
|
|
}
|
|
|
|
#if SIGNAL_CONTROL_MODE == 1
|
|
// Negative logic is inverted
|
|
bits = ~bits;
|
|
#endif
|
|
|
|
// Create GPIO register information
|
|
uint32_t gpclr = 0;
|
|
uint32_t gpset = 0;
|
|
for (int j = 0; j < 9; j++) {
|
|
if (bits & 1) {
|
|
gpset |= (1 << pintbl[j]);
|
|
} else {
|
|
gpclr |= (1 << pintbl[j]);
|
|
}
|
|
bits >>= 1;
|
|
}
|
|
|
|
tblDatMsk[i] = gpclr;
|
|
tblDatSet[i] = gpset;
|
|
}
|
|
#endif
|
|
}
|
|
|
|
//---------------------------------------------------------------------------
|
|
//
|
|
// Wait for signal change
|
|
//
|
|
//---------------------------------------------------------------------------
|
|
bool GPIOBUS::WaitSignal(int pin, int ast)
|
|
{
|
|
GPIO_FUNCTION_TRACE
|
|
|
|
// Get current time
|
|
uint32_t now = SysTimer::GetTimerLow();
|
|
|
|
// Calculate timeout (3000ms)
|
|
uint32_t timeout = 3000 * 1000;
|
|
|
|
// end immediately if the signal has changed
|
|
do {
|
|
// Immediately upon receiving a reset
|
|
Acquire();
|
|
if (GetRST()) {
|
|
return false;
|
|
}
|
|
|
|
// Check for the signal edge
|
|
if (((signals >> pin) ^ ~ast) & 1) {
|
|
return true;
|
|
}
|
|
} while ((SysTimer::GetTimerLow() - now) < timeout);
|
|
|
|
// We timed out waiting for the signal
|
|
return false;
|
|
}
|
|
|
|
//---------------------------------------------------------------------------
|
|
//
|
|
// Generic Phase Acquisition (Doesn't read GPIO)
|
|
//
|
|
//---------------------------------------------------------------------------
|
|
BUS::phase_t GPIOBUS::GetPhaseRaw(uint32_t raw_data)
|
|
{
|
|
GPIO_FUNCTION_TRACE
|
|
// Selection Phase
|
|
if (GetPinRaw(raw_data, PIN_SEL)) {
|
|
if (GetPinRaw(raw_data, PIN_IO)) {
|
|
return BUS::phase_t::reselection;
|
|
} else {
|
|
return BUS::phase_t::selection;
|
|
}
|
|
}
|
|
|
|
// Bus busy phase
|
|
if (!GetPinRaw(raw_data, PIN_BSY)) {
|
|
return BUS::phase_t::busfree;
|
|
}
|
|
|
|
// Get target phase from bus signal line
|
|
int mci = GetPinRaw(raw_data, PIN_MSG) ? 0x04 : 0x00;
|
|
mci |= GetPinRaw(raw_data, PIN_CD) ? 0x02 : 0x00;
|
|
mci |= GetPinRaw(raw_data, PIN_IO) ? 0x01 : 0x00;
|
|
return GetPhase(mci);
|
|
}
|
|
|
|
//---------------------------------------------------------------------------
|
|
//
|
|
// Get the number of bytes for a command
|
|
//
|
|
//---------------------------------------------------------------------------
|
|
int GPIOBUS::GetCommandByteCount(BYTE opcode)
|
|
{
|
|
GPIO_FUNCTION_TRACE
|
|
|
|
if (opcode == 0x88 || opcode == 0x8A || opcode == 0x8F || opcode == 0x91 || opcode == 0x9E || opcode == 0x9F) {
|
|
return 16;
|
|
} else if (opcode == 0xA0) {
|
|
return 12;
|
|
} else if (opcode == 0x05 || (opcode >= 0x20 && opcode <= 0x7D)) {
|
|
return 10;
|
|
} else {
|
|
return 6;
|
|
}
|
|
}
|