ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 1


   1              		.syntax unified
   2              		.cpu cortex-m3
   3              		.fpu softvfp
   4              		.eabi_attribute 20, 1
   5              		.eabi_attribute 21, 1
   6              		.eabi_attribute 23, 3
   7              		.eabi_attribute 24, 1
   8              		.eabi_attribute 25, 1
   9              		.eabi_attribute 26, 1
  10              		.eabi_attribute 30, 4
  11              		.eabi_attribute 34, 1
  12              		.eabi_attribute 18, 4
  13              		.thumb
  14              		.file	"cyPm.c"
  15              		.text
  16              	.Ltext0:
  17              		.cfi_sections	.debug_frame
  18              		.section	.text.CyPmHibSlpSaveSet,"ax",%progbits
  19              		.align	1
  20              		.thumb
  21              		.thumb_func
  22              		.type	CyPmHibSlpSaveSet, %function
  23              	CyPmHibSlpSaveSet:
  24              	.LFB11:
  25              		.file 1 ".\\Generated_Source\\PSoC5\\cyPm.c"
   1:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************
   2:.\Generated_Source\PSoC5/cyPm.c **** * File Name: cyPm.c
   3:.\Generated_Source\PSoC5/cyPm.c **** * Version 4.0
   4:.\Generated_Source\PSoC5/cyPm.c **** *
   5:.\Generated_Source\PSoC5/cyPm.c **** * Description:
   6:.\Generated_Source\PSoC5/cyPm.c **** *  Provides an API for the power management.
   7:.\Generated_Source\PSoC5/cyPm.c **** *
   8:.\Generated_Source\PSoC5/cyPm.c **** * Note:
   9:.\Generated_Source\PSoC5/cyPm.c **** *  Documentation of the API's in this file is located in the
  10:.\Generated_Source\PSoC5/cyPm.c **** *  System Reference Guide provided with PSoC Creator.
  11:.\Generated_Source\PSoC5/cyPm.c **** *
  12:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************
  13:.\Generated_Source\PSoC5/cyPm.c **** * Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
  14:.\Generated_Source\PSoC5/cyPm.c **** * You may use this file only in accordance with the license, terms, conditions,
  15:.\Generated_Source\PSoC5/cyPm.c **** * disclaimers, and limitations in the end user license agreement accompanying
  16:.\Generated_Source\PSoC5/cyPm.c **** * the software package with which this file was provided.
  17:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/
  18:.\Generated_Source\PSoC5/cyPm.c **** 
  19:.\Generated_Source\PSoC5/cyPm.c **** #include "cyPm.h"
  20:.\Generated_Source\PSoC5/cyPm.c **** 
  21:.\Generated_Source\PSoC5/cyPm.c **** 
  22:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************
  23:.\Generated_Source\PSoC5/cyPm.c **** * Place your includes, defines and code here. Do not use merge
  24:.\Generated_Source\PSoC5/cyPm.c **** * region below unless any component datasheet suggest to do so.
  25:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************/
  26:.\Generated_Source\PSoC5/cyPm.c **** /* `#START CY_PM_HEADER_INCLUDE` */
  27:.\Generated_Source\PSoC5/cyPm.c **** 
  28:.\Generated_Source\PSoC5/cyPm.c **** /* `#END` */
  29:.\Generated_Source\PSoC5/cyPm.c **** 
  30:.\Generated_Source\PSoC5/cyPm.c **** 
  31:.\Generated_Source\PSoC5/cyPm.c **** static CY_PM_BACKUP_STRUCT          cyPmBackup;
  32:.\Generated_Source\PSoC5/cyPm.c **** static CY_PM_CLOCK_BACKUP_STRUCT    cyPmClockBackup;
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 2


  33:.\Generated_Source\PSoC5/cyPm.c **** 
  34:.\Generated_Source\PSoC5/cyPm.c **** /* Convertion table between register's values and frequency in MHz  */
  35:.\Generated_Source\PSoC5/cyPm.c **** static const uint8 CYCODE cyPmImoFreqReg2Mhz[7u] = {12u, 6u, 24u, 3u, 48u, 62u, 74u};
  36:.\Generated_Source\PSoC5/cyPm.c **** 
  37:.\Generated_Source\PSoC5/cyPm.c **** /* Function Prototypes */
  38:.\Generated_Source\PSoC5/cyPm.c **** static void CyPmHibSaveSet(void);
  39:.\Generated_Source\PSoC5/cyPm.c **** static void CyPmHibRestore(void) ;
  40:.\Generated_Source\PSoC5/cyPm.c **** 
  41:.\Generated_Source\PSoC5/cyPm.c **** static void CyPmHibSlpSaveSet(void) ;
  42:.\Generated_Source\PSoC5/cyPm.c **** static void CyPmHibSlpRestore(void) ;
  43:.\Generated_Source\PSoC5/cyPm.c **** 
  44:.\Generated_Source\PSoC5/cyPm.c **** static void CyPmHviLviSaveDisable(void) ;
  45:.\Generated_Source\PSoC5/cyPm.c **** static void CyPmHviLviRestore(void) ;
  46:.\Generated_Source\PSoC5/cyPm.c **** 
  47:.\Generated_Source\PSoC5/cyPm.c **** 
  48:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************
  49:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmSaveClocks
  50:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************
  51:.\Generated_Source\PSoC5/cyPm.c **** *
  52:.\Generated_Source\PSoC5/cyPm.c **** * Summary:
  53:.\Generated_Source\PSoC5/cyPm.c **** *  This function is called in preparation for entering sleep or hibernate low
  54:.\Generated_Source\PSoC5/cyPm.c **** *  power modes. Saves all state of the clocking system that does not persist
  55:.\Generated_Source\PSoC5/cyPm.c **** *  during sleep/hibernate or that needs to be altered in preparation for
  56:.\Generated_Source\PSoC5/cyPm.c **** *  sleep/hibernate. Shutdowns all the digital and analog clock dividers for the
  57:.\Generated_Source\PSoC5/cyPm.c **** *  active power mode configuration.
  58:.\Generated_Source\PSoC5/cyPm.c **** *
  59:.\Generated_Source\PSoC5/cyPm.c **** *  Switches the master clock over to the IMO and shuts down the PLL and MHz
  60:.\Generated_Source\PSoC5/cyPm.c **** *  Crystal. The IMO frequency is set to either 12 MHz or 48 MHz to match the
  61:.\Generated_Source\PSoC5/cyPm.c **** *  Design-Wide Resources System Editor "Enable Fast IMO During Startup" setting.
  62:.\Generated_Source\PSoC5/cyPm.c **** *  The ILO and 32 KHz oscillators are not impacted. The current Flash wait state
  63:.\Generated_Source\PSoC5/cyPm.c **** *  setting is saved and the Flash wait state setting is set for the current IMO
  64:.\Generated_Source\PSoC5/cyPm.c **** *  speed.
  65:.\Generated_Source\PSoC5/cyPm.c **** *
  66:.\Generated_Source\PSoC5/cyPm.c **** *  Note If the Master Clock source is routed through the DSI inputs, then it
  67:.\Generated_Source\PSoC5/cyPm.c **** *  must be set manually to another source before using the
  68:.\Generated_Source\PSoC5/cyPm.c **** *  CyPmSaveClocks()/CyPmRestoreClocks() functions.
  69:.\Generated_Source\PSoC5/cyPm.c **** *
  70:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:
  71:.\Generated_Source\PSoC5/cyPm.c **** *  None
  72:.\Generated_Source\PSoC5/cyPm.c **** *
  73:.\Generated_Source\PSoC5/cyPm.c **** * Return:
  74:.\Generated_Source\PSoC5/cyPm.c **** *  None
  75:.\Generated_Source\PSoC5/cyPm.c **** *
  76:.\Generated_Source\PSoC5/cyPm.c **** * Side Effects:
  77:.\Generated_Source\PSoC5/cyPm.c **** *  All peripheral clocks are going to be off after this API method call.
  78:.\Generated_Source\PSoC5/cyPm.c **** *
  79:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/
  80:.\Generated_Source\PSoC5/cyPm.c **** void CyPmSaveClocks(void) 
  81:.\Generated_Source\PSoC5/cyPm.c **** {
  82:.\Generated_Source\PSoC5/cyPm.c ****     /* Digital and analog clocks - save enable state and disable them all */
  83:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.enClkA = CY_PM_ACT_CFG1_REG & CY_PM_ACT_EN_CLK_A_MASK;
  84:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.enClkD = CY_PM_ACT_CFG2_REG;
  85:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_ACT_CFG1_REG &= ((uint8)(~CY_PM_ACT_EN_CLK_A_MASK));
  86:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_ACT_CFG2_REG &= ((uint8)(~CY_PM_ACT_EN_CLK_D_MASK));
  87:.\Generated_Source\PSoC5/cyPm.c **** 
  88:.\Generated_Source\PSoC5/cyPm.c ****     /* Save current flash wait cycles and set the maximum value */
  89:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.flashWaitCycles = CY_PM_CACHE_CR_CYCLES_MASK & CY_PM_CACHE_CR_REG;
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 3


  90:.\Generated_Source\PSoC5/cyPm.c ****     CyFlash_SetWaitCycles(CY_PM_MAX_FLASH_WAIT_CYCLES);
  91:.\Generated_Source\PSoC5/cyPm.c **** 
  92:.\Generated_Source\PSoC5/cyPm.c ****     /* IMO - save current IMO MHz OSC frequency and USB mode is on bit */
  93:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.imoFreq = CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK;
  94:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.imoUsbClk = CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_USB;
  95:.\Generated_Source\PSoC5/cyPm.c **** 
  96:.\Generated_Source\PSoC5/cyPm.c ****     /* IMO doubler - save enable state */
  97:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_F2XON))
  98:.\Generated_Source\PSoC5/cyPm.c ****     {
  99:.\Generated_Source\PSoC5/cyPm.c ****         /* IMO doubler enabled - save and disable */
 100:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.imo2x = CY_PM_ENABLED;
 101:.\Generated_Source\PSoC5/cyPm.c ****     }
 102:.\Generated_Source\PSoC5/cyPm.c ****     else
 103:.\Generated_Source\PSoC5/cyPm.c ****     {
 104:.\Generated_Source\PSoC5/cyPm.c ****         /* IMO doubler disabled */
 105:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.imo2x = CY_PM_DISABLED;
 106:.\Generated_Source\PSoC5/cyPm.c ****     }
 107:.\Generated_Source\PSoC5/cyPm.c **** 
 108:.\Generated_Source\PSoC5/cyPm.c ****     /* IMO - set appropriate frequency for LPM */
 109:.\Generated_Source\PSoC5/cyPm.c ****     CyIMO_SetFreq(CY_PM_IMO_FREQ_LPM);
 110:.\Generated_Source\PSoC5/cyPm.c **** 
 111:.\Generated_Source\PSoC5/cyPm.c ****     /* IMO - save enable state and enable without wait to settle */
 112:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_ACT_CFG0_IMO & CY_PM_ACT_CFG0_REG))
 113:.\Generated_Source\PSoC5/cyPm.c ****     {
 114:.\Generated_Source\PSoC5/cyPm.c ****         /* IMO - save enabled state */
 115:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.imoEnable = CY_PM_ENABLED;
 116:.\Generated_Source\PSoC5/cyPm.c ****     }
 117:.\Generated_Source\PSoC5/cyPm.c ****     else
 118:.\Generated_Source\PSoC5/cyPm.c ****     {
 119:.\Generated_Source\PSoC5/cyPm.c ****         /* IMO - save disabled state */
 120:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.imoEnable = CY_PM_DISABLED;
 121:.\Generated_Source\PSoC5/cyPm.c **** 
 122:.\Generated_Source\PSoC5/cyPm.c ****         /* IMO - enable */
 123:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_Start(CY_PM_IMO_NO_WAIT_TO_SETTLE);
 124:.\Generated_Source\PSoC5/cyPm.c ****     }
 125:.\Generated_Source\PSoC5/cyPm.c **** 
 126:.\Generated_Source\PSoC5/cyPm.c ****     /* IMO - save the current IMOCLK source and set to IMO if not yet */
 127:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_XCLKEN))
 128:.\Generated_Source\PSoC5/cyPm.c ****     {
 129:.\Generated_Source\PSoC5/cyPm.c ****         /* DSI or XTAL CLK */
 130:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.imoClkSrc =
 131:.\Generated_Source\PSoC5/cyPm.c ****             (0u == (CY_PM_CLKDIST_CR_REG & CY_PM_CLKDIST_IMO2X_SRC)) ? CY_IMO_SOURCE_DSI : CY_IMO_S
 132:.\Generated_Source\PSoC5/cyPm.c **** 
 133:.\Generated_Source\PSoC5/cyPm.c ****         /* IMO -  set IMOCLK source to MHz OSC */
 134:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_SetSource(CY_IMO_SOURCE_IMO);
 135:.\Generated_Source\PSoC5/cyPm.c ****     }
 136:.\Generated_Source\PSoC5/cyPm.c ****     else
 137:.\Generated_Source\PSoC5/cyPm.c ****     {
 138:.\Generated_Source\PSoC5/cyPm.c ****         /* IMO */
 139:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.imoClkSrc = CY_IMO_SOURCE_IMO;
 140:.\Generated_Source\PSoC5/cyPm.c ****     }
 141:.\Generated_Source\PSoC5/cyPm.c **** 
 142:.\Generated_Source\PSoC5/cyPm.c ****     /* Save clk_imo source */
 143:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.clkImoSrc = CY_PM_CLKDIST_CR_REG & CY_PM_CLKDIST_IMO_OUT_MASK;
 144:.\Generated_Source\PSoC5/cyPm.c **** 
 145:.\Generated_Source\PSoC5/cyPm.c ****     /* If IMOCLK2X or SPC OSC is source for clk_imo, set it to IMOCLK */
 146:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_CLKDIST_IMO_OUT_IMO != cyPmClockBackup.clkImoSrc)
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 4


 147:.\Generated_Source\PSoC5/cyPm.c ****     {
 148:.\Generated_Source\PSoC5/cyPm.c ****         /* Set IMOCLK to source for clk_imo */
 149:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_CLKDIST_CR_REG = (CY_PM_CLKDIST_CR_REG & ((uint8)(~CY_PM_CLKDIST_IMO_OUT_MASK))) |
 150:.\Generated_Source\PSoC5/cyPm.c ****                                 CY_PM_CLKDIST_IMO_OUT_IMO;
 151:.\Generated_Source\PSoC5/cyPm.c ****     }    /* Need to change nothing if IMOCLK is source clk_imo */
 152:.\Generated_Source\PSoC5/cyPm.c **** 
 153:.\Generated_Source\PSoC5/cyPm.c ****     /* IMO doubler - disable it (saved above) */
 154:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_F2XON))
 155:.\Generated_Source\PSoC5/cyPm.c ****     {
 156:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_DisableDoubler();
 157:.\Generated_Source\PSoC5/cyPm.c ****     }
 158:.\Generated_Source\PSoC5/cyPm.c **** 
 159:.\Generated_Source\PSoC5/cyPm.c ****     /* Master clock - save divider and set it to divide-by-one (if no yet) */
 160:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.clkSyncDiv = CY_PM_CLKDIST_MSTR0_REG;
 161:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_DIV_BY_ONE != cyPmClockBackup.clkSyncDiv)
 162:.\Generated_Source\PSoC5/cyPm.c ****     {
 163:.\Generated_Source\PSoC5/cyPm.c ****         CyMasterClk_SetDivider(CY_PM_DIV_BY_ONE);
 164:.\Generated_Source\PSoC5/cyPm.c ****     }    /* Need to change nothing if master clock divider is 1 */
 165:.\Generated_Source\PSoC5/cyPm.c **** 
 166:.\Generated_Source\PSoC5/cyPm.c ****     /* Master clock - save current source */
 167:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.masterClkSrc = CY_PM_CLKDIST_MSTR1_REG & CY_PM_MASTER_CLK_SRC_MASK;
 168:.\Generated_Source\PSoC5/cyPm.c **** 
 169:.\Generated_Source\PSoC5/cyPm.c ****     /* Master clock source - set it to IMO if not yet. */
 170:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_MASTER_SOURCE_IMO != cyPmClockBackup.masterClkSrc)
 171:.\Generated_Source\PSoC5/cyPm.c ****     {
 172:.\Generated_Source\PSoC5/cyPm.c ****         CyMasterClk_SetSource(CY_MASTER_SOURCE_IMO);
 173:.\Generated_Source\PSoC5/cyPm.c ****     }    /* Need to change nothing if master clock source is IMO */
 174:.\Generated_Source\PSoC5/cyPm.c **** 
 175:.\Generated_Source\PSoC5/cyPm.c ****     /* Bus clock - save divider and set it, if needed, to divide-by-one */
 176:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.clkBusDiv = (uint16) ((uint16) CY_PM_CLK_BUS_MSB_DIV_REG << 8u);
 177:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.clkBusDiv |= CY_PM_CLK_BUS_LSB_DIV_REG;
 178:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_BUS_CLK_DIV_BY_ONE != cyPmClockBackup.clkBusDiv)
 179:.\Generated_Source\PSoC5/cyPm.c ****     {
 180:.\Generated_Source\PSoC5/cyPm.c ****         CyBusClk_SetDivider(CY_PM_BUS_CLK_DIV_BY_ONE);
 181:.\Generated_Source\PSoC5/cyPm.c ****     }    /* Do nothing if saved and actual values are equal */
 182:.\Generated_Source\PSoC5/cyPm.c **** 
 183:.\Generated_Source\PSoC5/cyPm.c ****     /* Set number of wait cycles for the flash according CPU frequency in MHz */
 184:.\Generated_Source\PSoC5/cyPm.c ****     CyFlash_SetWaitCycles((uint8)CY_PM_GET_CPU_FREQ_MHZ);
 185:.\Generated_Source\PSoC5/cyPm.c **** 
 186:.\Generated_Source\PSoC5/cyPm.c ****     /* PLL - check enable state, disable if needed */
 187:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_FASTCLK_PLL_CFG0_REG & CY_PM_PLL_CFG0_ENABLE))
 188:.\Generated_Source\PSoC5/cyPm.c ****     {
 189:.\Generated_Source\PSoC5/cyPm.c ****         /* PLL is enabled - save state and disable */
 190:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.pllEnableState = CY_PM_ENABLED;
 191:.\Generated_Source\PSoC5/cyPm.c ****         CyPLL_OUT_Stop();
 192:.\Generated_Source\PSoC5/cyPm.c ****     }
 193:.\Generated_Source\PSoC5/cyPm.c ****     else
 194:.\Generated_Source\PSoC5/cyPm.c ****     {
 195:.\Generated_Source\PSoC5/cyPm.c ****         /* PLL is disabled - save state */
 196:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.pllEnableState = CY_PM_DISABLED;
 197:.\Generated_Source\PSoC5/cyPm.c ****     }
 198:.\Generated_Source\PSoC5/cyPm.c **** 
 199:.\Generated_Source\PSoC5/cyPm.c ****     /* MHz ECO - check enable state and disable if needed */
 200:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_FASTCLK_XMHZ_CSR_REG & CY_PM_XMHZ_CSR_ENABLE))
 201:.\Generated_Source\PSoC5/cyPm.c ****     {
 202:.\Generated_Source\PSoC5/cyPm.c ****         /* MHz ECO is enabled - save state and disable */
 203:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.xmhzEnableState = CY_PM_ENABLED;
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 5


 204:.\Generated_Source\PSoC5/cyPm.c ****         CyXTAL_Stop();
 205:.\Generated_Source\PSoC5/cyPm.c ****     }
 206:.\Generated_Source\PSoC5/cyPm.c ****     else
 207:.\Generated_Source\PSoC5/cyPm.c ****     {
 208:.\Generated_Source\PSoC5/cyPm.c ****         /* MHz ECO is disabled - save state */
 209:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.xmhzEnableState = CY_PM_DISABLED;
 210:.\Generated_Source\PSoC5/cyPm.c ****     }
 211:.\Generated_Source\PSoC5/cyPm.c **** 
 212:.\Generated_Source\PSoC5/cyPm.c **** 
 213:.\Generated_Source\PSoC5/cyPm.c ****     /***************************************************************************
 214:.\Generated_Source\PSoC5/cyPm.c ****     * Save enable state of delay between the system bus clock and each of the
 215:.\Generated_Source\PSoC5/cyPm.c ****     * 4 individual analog clocks. This bit non-retention and it's value should
 216:.\Generated_Source\PSoC5/cyPm.c ****     * be restored on wakeup.
 217:.\Generated_Source\PSoC5/cyPm.c ****     ***************************************************************************/
 218:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_CLKDIST_DELAY_REG & CY_PM_CLKDIST_DELAY_EN))
 219:.\Generated_Source\PSoC5/cyPm.c ****     {
 220:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.clkDistDelay = CY_PM_ENABLED;
 221:.\Generated_Source\PSoC5/cyPm.c ****     }
 222:.\Generated_Source\PSoC5/cyPm.c ****     else
 223:.\Generated_Source\PSoC5/cyPm.c ****     {
 224:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.clkDistDelay = CY_PM_DISABLED;
 225:.\Generated_Source\PSoC5/cyPm.c ****     }
 226:.\Generated_Source\PSoC5/cyPm.c **** }
 227:.\Generated_Source\PSoC5/cyPm.c **** 
 228:.\Generated_Source\PSoC5/cyPm.c **** 
 229:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************
 230:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmRestoreClocks
 231:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************
 232:.\Generated_Source\PSoC5/cyPm.c **** *
 233:.\Generated_Source\PSoC5/cyPm.c **** * Summary:
 234:.\Generated_Source\PSoC5/cyPm.c **** *  Restores any state that was preserved by the last call to CyPmSaveClocks().
 235:.\Generated_Source\PSoC5/cyPm.c **** *  The Flash wait state setting is also restored.
 236:.\Generated_Source\PSoC5/cyPm.c **** *
 237:.\Generated_Source\PSoC5/cyPm.c **** *  Note If the Master Clock source is routed through the DSI inputs, then it
 238:.\Generated_Source\PSoC5/cyPm.c **** *  must be set manually to another source before using the
 239:.\Generated_Source\PSoC5/cyPm.c **** *  CyPmSaveClocks()/CyPmRestoreClocks() functions.
 240:.\Generated_Source\PSoC5/cyPm.c **** *
 241:.\Generated_Source\PSoC5/cyPm.c **** *  PSoC 3 and PSoC 5LP:
 242:.\Generated_Source\PSoC5/cyPm.c **** *  The merge region could be used to process state when the megahertz crystal is
 243:.\Generated_Source\PSoC5/cyPm.c **** *  not ready after the hold-off timeout.
 244:.\Generated_Source\PSoC5/cyPm.c **** *
 245:.\Generated_Source\PSoC5/cyPm.c **** *  PSoC 5:
 246:.\Generated_Source\PSoC5/cyPm.c **** *  The 130 ms is given for the megahertz crystal to stabilize. It's readiness is
 247:.\Generated_Source\PSoC5/cyPm.c **** *  not verified after the hold-off timeout.
 248:.\Generated_Source\PSoC5/cyPm.c **** *
 249:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:
 250:.\Generated_Source\PSoC5/cyPm.c **** *  None
 251:.\Generated_Source\PSoC5/cyPm.c **** *
 252:.\Generated_Source\PSoC5/cyPm.c **** * Return:
 253:.\Generated_Source\PSoC5/cyPm.c **** *  None
 254:.\Generated_Source\PSoC5/cyPm.c **** *
 255:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/
 256:.\Generated_Source\PSoC5/cyPm.c **** void CyPmRestoreClocks(void) 
 257:.\Generated_Source\PSoC5/cyPm.c **** {
 258:.\Generated_Source\PSoC5/cyPm.c ****     cystatus status = CYRET_TIMEOUT;
 259:.\Generated_Source\PSoC5/cyPm.c ****     uint16 i;
 260:.\Generated_Source\PSoC5/cyPm.c ****     uint16 clkBusDivTmp;
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 6


 261:.\Generated_Source\PSoC5/cyPm.c **** 
 262:.\Generated_Source\PSoC5/cyPm.c **** 
 263:.\Generated_Source\PSoC5/cyPm.c ****     /* Convertion table between CyIMO_SetFreq() parameters and register's value */
 264:.\Generated_Source\PSoC5/cyPm.c ****     const uint8 CYCODE cyPmImoFreqMhz2Reg[7u] = {
 265:.\Generated_Source\PSoC5/cyPm.c ****         CY_IMO_FREQ_12MHZ, CY_IMO_FREQ_6MHZ,  CY_IMO_FREQ_24MHZ, CY_IMO_FREQ_3MHZ,
 266:.\Generated_Source\PSoC5/cyPm.c ****         CY_IMO_FREQ_48MHZ, 5u, 6u};
 267:.\Generated_Source\PSoC5/cyPm.c **** 
 268:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore enable state of delay between the system bus clock and ACLKs. */
 269:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmClockBackup.clkDistDelay)
 270:.\Generated_Source\PSoC5/cyPm.c ****     {
 271:.\Generated_Source\PSoC5/cyPm.c ****         /* Delay for both the bandgap and the delay line to settle out */
 272:.\Generated_Source\PSoC5/cyPm.c ****         CyDelayCycles((uint32)(CY_PM_CLK_DELAY_BANDGAP_SETTLE_US + CY_PM_CLK_DELAY_BIAS_SETTLE_US) 
 273:.\Generated_Source\PSoC5/cyPm.c ****                         CY_PM_GET_CPU_FREQ_MHZ);
 274:.\Generated_Source\PSoC5/cyPm.c **** 
 275:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_CLKDIST_DELAY_REG |= CY_PM_CLKDIST_DELAY_EN;
 276:.\Generated_Source\PSoC5/cyPm.c ****     }
 277:.\Generated_Source\PSoC5/cyPm.c **** 
 278:.\Generated_Source\PSoC5/cyPm.c ****     /* MHz ECO restore state */
 279:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmClockBackup.xmhzEnableState)
 280:.\Generated_Source\PSoC5/cyPm.c ****     {
 281:.\Generated_Source\PSoC5/cyPm.c ****         /***********************************************************************
 282:.\Generated_Source\PSoC5/cyPm.c ****         * Enabling XMHZ XTAL. The actual CyXTAL_Start() with non zero wait
 283:.\Generated_Source\PSoC5/cyPm.c ****         * period uses FTW for period measurement. This could cause a problem
 284:.\Generated_Source\PSoC5/cyPm.c ****         * if CTW/FTW is used as a wake up time in the low power modes APIs.
 285:.\Generated_Source\PSoC5/cyPm.c ****         * So, the XTAL wait procedure is implemented with a software delay.
 286:.\Generated_Source\PSoC5/cyPm.c ****         ***********************************************************************/
 287:.\Generated_Source\PSoC5/cyPm.c **** 
 288:.\Generated_Source\PSoC5/cyPm.c ****         /* Enable XMHZ XTAL with no wait */
 289:.\Generated_Source\PSoC5/cyPm.c ****         (void) CyXTAL_Start(CY_PM_XTAL_MHZ_NO_WAIT);
 290:.\Generated_Source\PSoC5/cyPm.c **** 
 291:.\Generated_Source\PSoC5/cyPm.c ****         /* Read XERR bit to clear it */
 292:.\Generated_Source\PSoC5/cyPm.c ****         (void) CY_PM_FASTCLK_XMHZ_CSR_REG;
 293:.\Generated_Source\PSoC5/cyPm.c **** 
 294:.\Generated_Source\PSoC5/cyPm.c ****         /* Wait */
 295:.\Generated_Source\PSoC5/cyPm.c ****         for(i = CY_PM_MHZ_XTAL_WAIT_NUM_OF_200_US; i > 0u; i--)
 296:.\Generated_Source\PSoC5/cyPm.c ****         {
 297:.\Generated_Source\PSoC5/cyPm.c ****             /* Make a 200 microseconds delay */
 298:.\Generated_Source\PSoC5/cyPm.c ****             CyDelayCycles((uint32)CY_PM_WAIT_200_US * CY_PM_GET_CPU_FREQ_MHZ);
 299:.\Generated_Source\PSoC5/cyPm.c **** 
 300:.\Generated_Source\PSoC5/cyPm.c ****             /* High output indicates oscillator failure */
 301:.\Generated_Source\PSoC5/cyPm.c ****             if(0u == (CY_PM_FASTCLK_XMHZ_CSR_REG & CY_PM_XMHZ_CSR_XERR))
 302:.\Generated_Source\PSoC5/cyPm.c ****             {
 303:.\Generated_Source\PSoC5/cyPm.c ****                 status = CYRET_SUCCESS;
 304:.\Generated_Source\PSoC5/cyPm.c ****                 break;
 305:.\Generated_Source\PSoC5/cyPm.c ****             }
 306:.\Generated_Source\PSoC5/cyPm.c ****         }
 307:.\Generated_Source\PSoC5/cyPm.c **** 
 308:.\Generated_Source\PSoC5/cyPm.c ****         if(CYRET_TIMEOUT == status)
 309:.\Generated_Source\PSoC5/cyPm.c ****         {
 310:.\Generated_Source\PSoC5/cyPm.c ****             /*******************************************************************
 311:.\Generated_Source\PSoC5/cyPm.c ****             * Process the situation when megahertz crystal is not ready.
 312:.\Generated_Source\PSoC5/cyPm.c ****             * Time to stabialize value is crystal specific.
 313:.\Generated_Source\PSoC5/cyPm.c ****             *******************************************************************/
 314:.\Generated_Source\PSoC5/cyPm.c ****            /* `#START_MHZ_ECO_TIMEOUT` */
 315:.\Generated_Source\PSoC5/cyPm.c **** 
 316:.\Generated_Source\PSoC5/cyPm.c ****            /* `#END` */
 317:.\Generated_Source\PSoC5/cyPm.c ****         }
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 7


 318:.\Generated_Source\PSoC5/cyPm.c ****     }   /* (CY_PM_ENABLED == cyPmClockBackup.xmhzEnableState) */
 319:.\Generated_Source\PSoC5/cyPm.c **** 
 320:.\Generated_Source\PSoC5/cyPm.c **** 
 321:.\Generated_Source\PSoC5/cyPm.c ****     /* Temprorary set the maximum flash wait cycles */
 322:.\Generated_Source\PSoC5/cyPm.c ****     CyFlash_SetWaitCycles(CY_PM_MAX_FLASH_WAIT_CYCLES);
 323:.\Generated_Source\PSoC5/cyPm.c **** 
 324:.\Generated_Source\PSoC5/cyPm.c ****     /* The XTAL and DSI clocks are ready to be source for Master clock. */
 325:.\Generated_Source\PSoC5/cyPm.c ****     if((CY_PM_MASTER_CLK_SRC_XTAL == cyPmClockBackup.masterClkSrc) ||
 326:.\Generated_Source\PSoC5/cyPm.c ****        (CY_PM_MASTER_CLK_SRC_DSI  == cyPmClockBackup.masterClkSrc))
 327:.\Generated_Source\PSoC5/cyPm.c ****     {
 328:.\Generated_Source\PSoC5/cyPm.c ****         /* Restore Master clock's divider */
 329:.\Generated_Source\PSoC5/cyPm.c ****         if(CY_PM_CLKDIST_MSTR0_REG != cyPmClockBackup.clkSyncDiv)
 330:.\Generated_Source\PSoC5/cyPm.c ****         {
 331:.\Generated_Source\PSoC5/cyPm.c ****             /* Restore Master clock divider */
 332:.\Generated_Source\PSoC5/cyPm.c ****             CyMasterClk_SetDivider(cyPmClockBackup.clkSyncDiv);
 333:.\Generated_Source\PSoC5/cyPm.c ****         }
 334:.\Generated_Source\PSoC5/cyPm.c **** 
 335:.\Generated_Source\PSoC5/cyPm.c ****         /* Restore Master clock source */
 336:.\Generated_Source\PSoC5/cyPm.c ****         CyMasterClk_SetSource(cyPmClockBackup.masterClkSrc);
 337:.\Generated_Source\PSoC5/cyPm.c ****     }
 338:.\Generated_Source\PSoC5/cyPm.c **** 
 339:.\Generated_Source\PSoC5/cyPm.c ****     /* IMO - restore IMO frequency */
 340:.\Generated_Source\PSoC5/cyPm.c ****     if((0u != (cyPmClockBackup.imoUsbClk & CY_PM_FASTCLK_IMO_CR_USB)) &&
 341:.\Generated_Source\PSoC5/cyPm.c ****         (CY_IMO_FREQ_24MHZ == cyPmImoFreqMhz2Reg[cyPmClockBackup.imoFreq]))
 342:.\Generated_Source\PSoC5/cyPm.c ****     {
 343:.\Generated_Source\PSoC5/cyPm.c ****         /* Restore IMO frequency (24 MHz) and trim it for USB */
 344:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_SetFreq(CY_IMO_FREQ_USB);
 345:.\Generated_Source\PSoC5/cyPm.c ****     }
 346:.\Generated_Source\PSoC5/cyPm.c ****     else
 347:.\Generated_Source\PSoC5/cyPm.c ****     {
 348:.\Generated_Source\PSoC5/cyPm.c ****         /* Restore IMO frequency */
 349:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_SetFreq(cyPmImoFreqMhz2Reg[cyPmClockBackup.imoFreq]);
 350:.\Generated_Source\PSoC5/cyPm.c **** 
 351:.\Generated_Source\PSoC5/cyPm.c ****         if(0u != (cyPmClockBackup.imoUsbClk & CY_PM_FASTCLK_IMO_CR_USB))
 352:.\Generated_Source\PSoC5/cyPm.c ****         {
 353:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_FASTCLK_IMO_CR_REG |= CY_PM_FASTCLK_IMO_CR_USB;
 354:.\Generated_Source\PSoC5/cyPm.c ****         }
 355:.\Generated_Source\PSoC5/cyPm.c ****         else
 356:.\Generated_Source\PSoC5/cyPm.c ****         {
 357:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_FASTCLK_IMO_CR_REG &= ((uint8)(~CY_PM_FASTCLK_IMO_CR_USB));
 358:.\Generated_Source\PSoC5/cyPm.c ****         }
 359:.\Generated_Source\PSoC5/cyPm.c ****     }
 360:.\Generated_Source\PSoC5/cyPm.c **** 
 361:.\Generated_Source\PSoC5/cyPm.c ****     /* IMO - restore enable state if needed */
 362:.\Generated_Source\PSoC5/cyPm.c ****     if((CY_PM_ENABLED == cyPmClockBackup.imoEnable) &&
 363:.\Generated_Source\PSoC5/cyPm.c ****        (0u == (CY_PM_ACT_CFG0_IMO & CY_PM_ACT_CFG0_REG)))
 364:.\Generated_Source\PSoC5/cyPm.c ****     {
 365:.\Generated_Source\PSoC5/cyPm.c ****         /* IMO - restore enabled state */
 366:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_Start(CY_PM_IMO_NO_WAIT_TO_SETTLE);
 367:.\Generated_Source\PSoC5/cyPm.c ****     }
 368:.\Generated_Source\PSoC5/cyPm.c **** 
 369:.\Generated_Source\PSoC5/cyPm.c ****     /* IMO - restore disable state if needed */
 370:.\Generated_Source\PSoC5/cyPm.c ****     if((CY_PM_DISABLED == cyPmClockBackup.imoEnable) &&
 371:.\Generated_Source\PSoC5/cyPm.c ****        (0u != (CY_PM_ACT_CFG0_IMO & CY_PM_ACT_CFG0_REG)))
 372:.\Generated_Source\PSoC5/cyPm.c ****     {
 373:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_Stop();
 374:.\Generated_Source\PSoC5/cyPm.c ****     }
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 8


 375:.\Generated_Source\PSoC5/cyPm.c **** 
 376:.\Generated_Source\PSoC5/cyPm.c ****     /* IMO - restore IMOCLK source */
 377:.\Generated_Source\PSoC5/cyPm.c ****     CyIMO_SetSource(cyPmClockBackup.imoClkSrc);
 378:.\Generated_Source\PSoC5/cyPm.c **** 
 379:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore IMO doubler enable state (turned off by CyPmSaveClocks()) */
 380:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmClockBackup.imo2x)
 381:.\Generated_Source\PSoC5/cyPm.c ****     {
 382:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_EnableDoubler();
 383:.\Generated_Source\PSoC5/cyPm.c ****     }
 384:.\Generated_Source\PSoC5/cyPm.c **** 
 385:.\Generated_Source\PSoC5/cyPm.c ****     /* IMO - restore clk_imo source, if needed */
 386:.\Generated_Source\PSoC5/cyPm.c ****     if(cyPmClockBackup.clkImoSrc != (CY_PM_CLKDIST_CR_REG & CY_PM_CLKDIST_IMO_OUT_MASK))
 387:.\Generated_Source\PSoC5/cyPm.c ****     {
 388:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_CLKDIST_CR_REG = (CY_PM_CLKDIST_CR_REG & ((uint8)(~CY_PM_CLKDIST_IMO_OUT_MASK))) |
 389:.\Generated_Source\PSoC5/cyPm.c ****                                 cyPmClockBackup.clkImoSrc;
 390:.\Generated_Source\PSoC5/cyPm.c ****     }
 391:.\Generated_Source\PSoC5/cyPm.c **** 
 392:.\Generated_Source\PSoC5/cyPm.c ****     /* PLL restore state */
 393:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmClockBackup.pllEnableState)
 394:.\Generated_Source\PSoC5/cyPm.c ****     {
 395:.\Generated_Source\PSoC5/cyPm.c ****         /***********************************************************************
 396:.\Generated_Source\PSoC5/cyPm.c ****         * Enable PLL. The actual CyPLL_OUT_Start() without wait period uses FTW
 397:.\Generated_Source\PSoC5/cyPm.c ****         * for period measurement. This could cause a problem if CTW/FTW is used
 398:.\Generated_Source\PSoC5/cyPm.c ****         * as a wakeup time in the low power modes APIs. To omit this issue PLL
 399:.\Generated_Source\PSoC5/cyPm.c ****         * wait procedure is implemented with a software delay.
 400:.\Generated_Source\PSoC5/cyPm.c ****         ***********************************************************************/
 401:.\Generated_Source\PSoC5/cyPm.c **** 
 402:.\Generated_Source\PSoC5/cyPm.c ****         /* Enable PLL */
 403:.\Generated_Source\PSoC5/cyPm.c ****         (void) CyPLL_OUT_Start(CY_PM_PLL_OUT_NO_WAIT);
 404:.\Generated_Source\PSoC5/cyPm.c **** 
 405:.\Generated_Source\PSoC5/cyPm.c ****         /* Make a 250 us delay */
 406:.\Generated_Source\PSoC5/cyPm.c ****         CyDelayCycles((uint32)CY_PM_WAIT_250_US * CY_PM_GET_CPU_FREQ_MHZ);
 407:.\Generated_Source\PSoC5/cyPm.c ****     }   /* (CY_PM_ENABLED == cyPmClockBackup.pllEnableState) */
 408:.\Generated_Source\PSoC5/cyPm.c **** 
 409:.\Generated_Source\PSoC5/cyPm.c **** 
 410:.\Generated_Source\PSoC5/cyPm.c ****     /* PLL and IMO is ready to be source for Master clock */
 411:.\Generated_Source\PSoC5/cyPm.c ****     if((CY_PM_MASTER_CLK_SRC_IMO == cyPmClockBackup.masterClkSrc) ||
 412:.\Generated_Source\PSoC5/cyPm.c ****        (CY_PM_MASTER_CLK_SRC_PLL == cyPmClockBackup.masterClkSrc))
 413:.\Generated_Source\PSoC5/cyPm.c ****     {
 414:.\Generated_Source\PSoC5/cyPm.c ****         /* Restore Master clock divider */
 415:.\Generated_Source\PSoC5/cyPm.c ****         if(CY_PM_CLKDIST_MSTR0_REG != cyPmClockBackup.clkSyncDiv)
 416:.\Generated_Source\PSoC5/cyPm.c ****         {
 417:.\Generated_Source\PSoC5/cyPm.c ****             CyMasterClk_SetDivider(cyPmClockBackup.clkSyncDiv);
 418:.\Generated_Source\PSoC5/cyPm.c ****         }
 419:.\Generated_Source\PSoC5/cyPm.c **** 
 420:.\Generated_Source\PSoC5/cyPm.c ****         /* Restore Master clock source */
 421:.\Generated_Source\PSoC5/cyPm.c ****         CyMasterClk_SetSource(cyPmClockBackup.masterClkSrc);
 422:.\Generated_Source\PSoC5/cyPm.c ****     }
 423:.\Generated_Source\PSoC5/cyPm.c **** 
 424:.\Generated_Source\PSoC5/cyPm.c ****     /* Bus clock - restore divider, if needed */
 425:.\Generated_Source\PSoC5/cyPm.c ****     clkBusDivTmp = (uint16) ((uint16)CY_PM_CLK_BUS_MSB_DIV_REG << 8u);
 426:.\Generated_Source\PSoC5/cyPm.c ****     clkBusDivTmp |= CY_PM_CLK_BUS_LSB_DIV_REG;
 427:.\Generated_Source\PSoC5/cyPm.c ****     if(cyPmClockBackup.clkBusDiv != clkBusDivTmp)
 428:.\Generated_Source\PSoC5/cyPm.c ****     {
 429:.\Generated_Source\PSoC5/cyPm.c ****         CyBusClk_SetDivider(cyPmClockBackup.clkBusDiv);
 430:.\Generated_Source\PSoC5/cyPm.c ****     }
 431:.\Generated_Source\PSoC5/cyPm.c **** 
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 9


 432:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore flash wait cycles */
 433:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_CACHE_CR_REG = ((CY_PM_CACHE_CR_REG & ((uint8)(~CY_PM_CACHE_CR_CYCLES_MASK))) |
 434:.\Generated_Source\PSoC5/cyPm.c ****                            cyPmClockBackup.flashWaitCycles);
 435:.\Generated_Source\PSoC5/cyPm.c **** 
 436:.\Generated_Source\PSoC5/cyPm.c ****     /* Digital and analog clocks - restore state */
 437:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_ACT_CFG1_REG = cyPmClockBackup.enClkA;
 438:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_ACT_CFG2_REG = cyPmClockBackup.enClkD;
 439:.\Generated_Source\PSoC5/cyPm.c **** }
 440:.\Generated_Source\PSoC5/cyPm.c **** 
 441:.\Generated_Source\PSoC5/cyPm.c **** 
 442:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************
 443:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmAltAct
 444:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************
 445:.\Generated_Source\PSoC5/cyPm.c **** *
 446:.\Generated_Source\PSoC5/cyPm.c **** * Summary:
 447:.\Generated_Source\PSoC5/cyPm.c **** *  Puts the part into the Alternate Active (Standby) state. The Alternate Active
 448:.\Generated_Source\PSoC5/cyPm.c **** *  state can allow for any of the capabilities of the device to be active, but
 449:.\Generated_Source\PSoC5/cyPm.c **** *  the operation of this function is dependent on the CPU being disabled during
 450:.\Generated_Source\PSoC5/cyPm.c **** *  the Alternate Active state. The configuration code and the component APIs
 451:.\Generated_Source\PSoC5/cyPm.c **** *  will configure the template for the Alternate Active state to be the same as
 452:.\Generated_Source\PSoC5/cyPm.c **** *  the Active state with the exception that the CPU will be disabled during
 453:.\Generated_Source\PSoC5/cyPm.c **** *  Alternate Active.
 454:.\Generated_Source\PSoC5/cyPm.c **** *
 455:.\Generated_Source\PSoC5/cyPm.c **** *  Note Before calling this function, you must manually configure the power mode
 456:.\Generated_Source\PSoC5/cyPm.c **** *  of the source clocks for the timer that is used as the wakeup timer.
 457:.\Generated_Source\PSoC5/cyPm.c **** *
 458:.\Generated_Source\PSoC5/cyPm.c **** *  PSoC 3:
 459:.\Generated_Source\PSoC5/cyPm.c **** *  Before switching to Alternate Active, if a wakeupTime other than NONE is
 460:.\Generated_Source\PSoC5/cyPm.c **** *  specified, then the appropriate timer state is configured as specified with
 461:.\Generated_Source\PSoC5/cyPm.c **** *  the interrupt for that timer disabled.  The wakeup source will be the
 462:.\Generated_Source\PSoC5/cyPm.c **** *  combination of the values specified in the wakeupSource and any timer
 463:.\Generated_Source\PSoC5/cyPm.c **** *  specified in the wakeupTime argument.  Once the wakeup condition is
 464:.\Generated_Source\PSoC5/cyPm.c **** *  satisfied, then all saved state is restored and the function returns in the
 465:.\Generated_Source\PSoC5/cyPm.c **** *  Active state.
 466:.\Generated_Source\PSoC5/cyPm.c **** *
 467:.\Generated_Source\PSoC5/cyPm.c **** *  Note that if the wakeupTime is made with a different value, the period before
 468:.\Generated_Source\PSoC5/cyPm.c **** *  the wakeup occurs can be significantly shorter than the specified time.  If
 469:.\Generated_Source\PSoC5/cyPm.c **** *  the next call is made with the same wakeupTime value, then the wakeup will
 470:.\Generated_Source\PSoC5/cyPm.c **** *  occur the specified period after the previous wakeup occurred.
 471:.\Generated_Source\PSoC5/cyPm.c **** *
 472:.\Generated_Source\PSoC5/cyPm.c **** *  If a wakeupTime other than NONE is specified, then upon exit the state of the
 473:.\Generated_Source\PSoC5/cyPm.c **** *  specified timer will be left as specified by wakeupTime with the timer
 474:.\Generated_Source\PSoC5/cyPm.c **** *  enabled and the interrupt disabled.  If the CTW, FTW or One PPS is already
 475:.\Generated_Source\PSoC5/cyPm.c **** *  configured for wakeup, for example with the SleepTimer or RTC components,
 476:.\Generated_Source\PSoC5/cyPm.c **** *  then specify NONE for the wakeupTime and include the appropriate source for
 477:.\Generated_Source\PSoC5/cyPm.c **** *  wakeupSource.
 478:.\Generated_Source\PSoC5/cyPm.c **** *
 479:.\Generated_Source\PSoC5/cyPm.c **** *  PSoC 5LP:
 480:.\Generated_Source\PSoC5/cyPm.c **** *  This function is used to both enter the Alternate Active mode and halt the
 481:.\Generated_Source\PSoC5/cyPm.c **** *  processor.  For PSoC 3 these two actions must be paired together.  With PSoC
 482:.\Generated_Source\PSoC5/cyPm.c **** *  5LP the processor can be halted independently with the __WFI() function from
 483:.\Generated_Source\PSoC5/cyPm.c **** *  the CMSIS library that is included in Creator.  This function should be used
 484:.\Generated_Source\PSoC5/cyPm.c **** *  instead when the action required is just to halt the processor until an
 485:.\Generated_Source\PSoC5/cyPm.c **** *  enabled interrupt occurs.
 486:.\Generated_Source\PSoC5/cyPm.c **** *
 487:.\Generated_Source\PSoC5/cyPm.c **** *  The wakeupTime parameter is not used for this device. It must be set to zero
 488:.\Generated_Source\PSoC5/cyPm.c **** *  (PM_ALT_ACT_TIME_NONE). The wake up time configuration can be done by a
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 10


 489:.\Generated_Source\PSoC5/cyPm.c **** *  separate component: the CTW wakeup interval should be configured with the
 490:.\Generated_Source\PSoC5/cyPm.c **** *  Sleep Timer component and one second interval should be configured with the
 491:.\Generated_Source\PSoC5/cyPm.c **** *  RTC component.
 492:.\Generated_Source\PSoC5/cyPm.c **** *
 493:.\Generated_Source\PSoC5/cyPm.c **** *  The wakeup behavior depends on wakeupSource parameter in the following
 494:.\Generated_Source\PSoC5/cyPm.c **** *  manner: upon function execution the device will be switched from Active to
 495:.\Generated_Source\PSoC5/cyPm.c **** *  Alternate Active mode and then the CPU will be halted. When an enabled wakeup
 496:.\Generated_Source\PSoC5/cyPm.c **** *  event occurs the device will return to Active mode.  Similarly when an
 497:.\Generated_Source\PSoC5/cyPm.c **** *  enabled interrupt occurs the CPU will be started. These two actions will
 498:.\Generated_Source\PSoC5/cyPm.c **** *  occur together provided that the event that occurs is an enabled wakeup
 499:.\Generated_Source\PSoC5/cyPm.c **** *  source and also generates an interrupt. If just the wakeup event occurs then
 500:.\Generated_Source\PSoC5/cyPm.c **** *  the device will be in Active mode, but the CPU will remain halted waiting for
 501:.\Generated_Source\PSoC5/cyPm.c **** *  an interrupt. If an interrupt occurs from something other than a wakeup
 502:.\Generated_Source\PSoC5/cyPm.c **** *  source, then the CPU will restart with the device in Alternate Active mode
 503:.\Generated_Source\PSoC5/cyPm.c **** *  until a wakeup event occurs.
 504:.\Generated_Source\PSoC5/cyPm.c **** *
 505:.\Generated_Source\PSoC5/cyPm.c **** *  For example, if CyPmAltAct(PM_ALT_ACT_TIME_NONE, PM_ALT_ACT_SRC_PICU) is
 506:.\Generated_Source\PSoC5/cyPm.c **** *  called and PICU interrupt occurs, the CPU will be started and device will be
 507:.\Generated_Source\PSoC5/cyPm.c **** *  switched into Active mode. And if CyPmAltAct(PM_ALT_ACT_TIME_NONE,
 508:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_NONE) is called and PICU interrupt occurs, the CPU will be
 509:.\Generated_Source\PSoC5/cyPm.c **** *  started while device remains in Alternate Active mode.
 510:.\Generated_Source\PSoC5/cyPm.c **** *
 511:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:
 512:.\Generated_Source\PSoC5/cyPm.c **** *  wakeupTime: Specifies a timer wakeup source and the frequency of that
 513:.\Generated_Source\PSoC5/cyPm.c **** *              source. For PSoC 5LP this parameter is ignored.
 514:.\Generated_Source\PSoC5/cyPm.c **** *
 515:.\Generated_Source\PSoC5/cyPm.c **** *           Define                      Time
 516:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_NONE             None
 517:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_ONE_PPS          One PPS: 1 second
 518:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_CTW_2MS          CTW: 2 ms
 519:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_CTW_4MS          CTW: 4 ms
 520:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_CTW_8MS          CTW: 8 ms
 521:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_CTW_16MS         CTW: 16 ms
 522:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_CTW_32MS         CTW: 32 ms
 523:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_CTW_64MS         CTW: 64 ms
 524:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_CTW_128MS        CTW: 128 ms
 525:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_CTW_256MS        CTW: 256 ms
 526:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_CTW_512MS        CTW: 512 ms
 527:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_CTW_1024MS       CTW: 1024 ms
 528:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_CTW_2048MS       CTW: 2048 ms
 529:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_CTW_4096MS       CTW: 4096 ms
 530:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_FTW(1-256)*       FTW: 10us to 2.56 ms
 531:.\Generated_Source\PSoC5/cyPm.c **** *
 532:.\Generated_Source\PSoC5/cyPm.c **** *  *Note:   PM_ALT_ACT_TIME_FTW() is a macro that takes an argument that
 533:.\Generated_Source\PSoC5/cyPm.c **** *           specifies how many increments of 10 us to delay.
 534:.\Generated_Source\PSoC5/cyPm.c ****             For PSoC 3 silicon the valid range of  values is 1 to 256.
 535:.\Generated_Source\PSoC5/cyPm.c **** *
 536:.\Generated_Source\PSoC5/cyPm.c **** *  wakeUpSource:    Specifies a bitwise mask of wakeup sources. In addition, if
 537:.\Generated_Source\PSoC5/cyPm.c **** *                   a wakeupTime has been specified the associated timer will be
 538:.\Generated_Source\PSoC5/cyPm.c **** *                   included as a wakeup source.
 539:.\Generated_Source\PSoC5/cyPm.c **** *
 540:.\Generated_Source\PSoC5/cyPm.c **** *           Define                      Source
 541:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_NONE              None
 542:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_COMPARATOR0       Comparator 0
 543:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_COMPARATOR1       Comparator 1
 544:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_COMPARATOR2       Comparator 2
 545:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_COMPARATOR3       Comparator 3
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 11


 546:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_INTERRUPT         Interrupt
 547:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_PICU              PICU
 548:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_I2C               I2C
 549:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_BOOSTCONVERTER    Boost Converter
 550:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_FTW               Fast Timewheel*
 551:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_VD                High and Low Voltage Detection (HVI, LVI)*
 552:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_CTW               Central Timewheel**
 553:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_ONE_PPS           One PPS**
 554:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_LCD               LCD
 555:.\Generated_Source\PSoC5/cyPm.c **** *
 556:.\Generated_Source\PSoC5/cyPm.c **** *  *Note : FTW and HVI/LVI wakeup signals are in the same mask bit.
 557:.\Generated_Source\PSoC5/cyPm.c **** *  **Note: CTW and One PPS wakeup signals are in the same mask bit.
 558:.\Generated_Source\PSoC5/cyPm.c **** *
 559:.\Generated_Source\PSoC5/cyPm.c **** *  When specifying a Comparator as the wakeupSource an instance specific define
 560:.\Generated_Source\PSoC5/cyPm.c **** *  should be used that will track with the specific comparator that the instance
 561:.\Generated_Source\PSoC5/cyPm.c **** *  is placed into. As an example, for a Comparator instance named MyComp the
 562:.\Generated_Source\PSoC5/cyPm.c **** *  value to OR into the mask is: MyComp_ctComp__CMP_MASK.
 563:.\Generated_Source\PSoC5/cyPm.c **** *
 564:.\Generated_Source\PSoC5/cyPm.c **** *  When CTW, FTW or One PPS is used as a wakeup source, the CyPmReadStatus()
 565:.\Generated_Source\PSoC5/cyPm.c **** *  function must be called upon wakeup with corresponding parameter. Please
 566:.\Generated_Source\PSoC5/cyPm.c **** *  refer to the CyPmReadStatus() API in the System Reference Guide for more
 567:.\Generated_Source\PSoC5/cyPm.c **** *  information.
 568:.\Generated_Source\PSoC5/cyPm.c **** *
 569:.\Generated_Source\PSoC5/cyPm.c **** * Return:
 570:.\Generated_Source\PSoC5/cyPm.c **** *  None
 571:.\Generated_Source\PSoC5/cyPm.c **** *
 572:.\Generated_Source\PSoC5/cyPm.c **** * Reentrant:
 573:.\Generated_Source\PSoC5/cyPm.c **** *  No
 574:.\Generated_Source\PSoC5/cyPm.c **** *
 575:.\Generated_Source\PSoC5/cyPm.c **** * Side Effects:
 576:.\Generated_Source\PSoC5/cyPm.c **** *  If a wakeupTime other than NONE is specified, then upon exit the state of the
 577:.\Generated_Source\PSoC5/cyPm.c **** *  specified timer will be left as specified by wakeupTime with the timer
 578:.\Generated_Source\PSoC5/cyPm.c **** *  enabled and the interrupt disabled.  Also, the ILO 1 KHz (if CTW timer is
 579:.\Generated_Source\PSoC5/cyPm.c **** *  used as wakeup time) or ILO 100 KHz (if FTW timer is used as wakeup time)
 580:.\Generated_Source\PSoC5/cyPm.c **** *  will be left started.
 581:.\Generated_Source\PSoC5/cyPm.c **** *
 582:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/
 583:.\Generated_Source\PSoC5/cyPm.c **** void CyPmAltAct(uint16 wakeupTime, uint16 wakeupSource) 
 584:.\Generated_Source\PSoC5/cyPm.c **** {
 585:.\Generated_Source\PSoC5/cyPm.c ****     #if(CY_PSOC5)
 586:.\Generated_Source\PSoC5/cyPm.c **** 
 587:.\Generated_Source\PSoC5/cyPm.c ****         /* Arguments expected to be 0 */
 588:.\Generated_Source\PSoC5/cyPm.c ****         CYASSERT(PM_ALT_ACT_TIME_NONE == wakeupTime);
 589:.\Generated_Source\PSoC5/cyPm.c **** 
 590:.\Generated_Source\PSoC5/cyPm.c ****         if(0u != wakeupTime)
 591:.\Generated_Source\PSoC5/cyPm.c ****         {
 592:.\Generated_Source\PSoC5/cyPm.c ****             /* To remove unreferenced local variable warning */
 593:.\Generated_Source\PSoC5/cyPm.c ****         }
 594:.\Generated_Source\PSoC5/cyPm.c **** 
 595:.\Generated_Source\PSoC5/cyPm.c ****     #endif /* (CY_PSOC5) */
 596:.\Generated_Source\PSoC5/cyPm.c **** 
 597:.\Generated_Source\PSoC5/cyPm.c **** 
 598:.\Generated_Source\PSoC5/cyPm.c ****     #if(CY_PSOC3)
 599:.\Generated_Source\PSoC5/cyPm.c **** 
 600:.\Generated_Source\PSoC5/cyPm.c ****         /* FTW - save current and set new configuration */
 601:.\Generated_Source\PSoC5/cyPm.c ****         if((wakeupTime >= PM_ALT_ACT_TIME_FTW(1u)) && (wakeupTime <= PM_ALT_ACT_TIME_FTW(256u)))
 602:.\Generated_Source\PSoC5/cyPm.c ****         {
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 12


 603:.\Generated_Source\PSoC5/cyPm.c ****             CyPmFtwSetInterval(PM_ALT_ACT_FTW_INTERVAL(wakeupTime));
 604:.\Generated_Source\PSoC5/cyPm.c **** 
 605:.\Generated_Source\PSoC5/cyPm.c ****             /* Include associated timer to the wakeupSource */
 606:.\Generated_Source\PSoC5/cyPm.c ****             wakeupSource |= PM_ALT_ACT_SRC_FTW;
 607:.\Generated_Source\PSoC5/cyPm.c ****         }
 608:.\Generated_Source\PSoC5/cyPm.c **** 
 609:.\Generated_Source\PSoC5/cyPm.c ****         /* CTW - save current and set new configuration */
 610:.\Generated_Source\PSoC5/cyPm.c ****         if((wakeupTime >= PM_ALT_ACT_TIME_CTW_2MS) && (wakeupTime <= PM_ALT_ACT_TIME_CTW_4096MS))
 611:.\Generated_Source\PSoC5/cyPm.c ****         {
 612:.\Generated_Source\PSoC5/cyPm.c ****             /* Save current CTW configuration and set new one */
 613:.\Generated_Source\PSoC5/cyPm.c ****             CyPmCtwSetInterval((uint8)(wakeupTime - 1u));
 614:.\Generated_Source\PSoC5/cyPm.c **** 
 615:.\Generated_Source\PSoC5/cyPm.c ****             /* Include associated timer to the wakeupSource */
 616:.\Generated_Source\PSoC5/cyPm.c ****             wakeupSource |= PM_ALT_ACT_SRC_CTW;
 617:.\Generated_Source\PSoC5/cyPm.c ****         }
 618:.\Generated_Source\PSoC5/cyPm.c **** 
 619:.\Generated_Source\PSoC5/cyPm.c ****         /* 1PPS - save current and set new configuration */
 620:.\Generated_Source\PSoC5/cyPm.c ****         if(PM_ALT_ACT_TIME_ONE_PPS == wakeupTime)
 621:.\Generated_Source\PSoC5/cyPm.c ****         {
 622:.\Generated_Source\PSoC5/cyPm.c ****             /* Save current 1PPS configuration and set new one */
 623:.\Generated_Source\PSoC5/cyPm.c ****             CyPmOppsSet();
 624:.\Generated_Source\PSoC5/cyPm.c **** 
 625:.\Generated_Source\PSoC5/cyPm.c ****             /* Include associated timer to the wakeupSource */
 626:.\Generated_Source\PSoC5/cyPm.c ****             wakeupSource |= PM_ALT_ACT_SRC_ONE_PPS;
 627:.\Generated_Source\PSoC5/cyPm.c ****         }
 628:.\Generated_Source\PSoC5/cyPm.c **** 
 629:.\Generated_Source\PSoC5/cyPm.c ****     #endif /* (CY_PSOC3) */
 630:.\Generated_Source\PSoC5/cyPm.c **** 
 631:.\Generated_Source\PSoC5/cyPm.c **** 
 632:.\Generated_Source\PSoC5/cyPm.c ****     /* Save and set new wake up configuration */
 633:.\Generated_Source\PSoC5/cyPm.c **** 
 634:.\Generated_Source\PSoC5/cyPm.c ****     /* Interrupt, PICU, I2C, Boost converter, CTW/1PPS */
 635:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg0 = CY_PM_WAKEUP_CFG0_REG;
 636:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = (uint8) (wakeupSource >> 4u);
 637:.\Generated_Source\PSoC5/cyPm.c **** 
 638:.\Generated_Source\PSoC5/cyPm.c ****     /* Comparators */
 639:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg1 = CY_PM_WAKEUP_CFG1_REG;
 640:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = (((uint8) wakeupSource) & CY_PM_WAKEUP_SRC_CMPS_MASK);
 641:.\Generated_Source\PSoC5/cyPm.c **** 
 642:.\Generated_Source\PSoC5/cyPm.c ****     /* LCD */
 643:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg2 = CY_PM_WAKEUP_CFG2_REG;
 644:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = ((uint8) ((wakeupSource >> 12u) & 0x01u));
 645:.\Generated_Source\PSoC5/cyPm.c **** 
 646:.\Generated_Source\PSoC5/cyPm.c **** 
 647:.\Generated_Source\PSoC5/cyPm.c ****     /* Switch to the Alternate Active mode */
 648:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_MODE_CSR_REG = ((CY_PM_MODE_CSR_REG & ((uint8)(~CY_PM_MODE_CSR_MASK))) | CY_PM_MODE_CSR_A
 649:.\Generated_Source\PSoC5/cyPm.c **** 
 650:.\Generated_Source\PSoC5/cyPm.c ****     /* Recommended readback. */
 651:.\Generated_Source\PSoC5/cyPm.c ****     (void) CY_PM_MODE_CSR_REG;
 652:.\Generated_Source\PSoC5/cyPm.c **** 
 653:.\Generated_Source\PSoC5/cyPm.c ****     /* Two recommended NOPs to get into the mode. */
 654:.\Generated_Source\PSoC5/cyPm.c ****     CY_NOP;
 655:.\Generated_Source\PSoC5/cyPm.c ****     CY_NOP;
 656:.\Generated_Source\PSoC5/cyPm.c **** 
 657:.\Generated_Source\PSoC5/cyPm.c ****     /* Execute WFI instruction (for ARM-based devices only) */
 658:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WFI;
 659:.\Generated_Source\PSoC5/cyPm.c **** 
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 13


 660:.\Generated_Source\PSoC5/cyPm.c ****     /* Point of return from Alternate Active Mode */
 661:.\Generated_Source\PSoC5/cyPm.c **** 
 662:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore wake up configuration */
 663:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = cyPmBackup.wakeupCfg0;
 664:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = cyPmBackup.wakeupCfg1;
 665:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = cyPmBackup.wakeupCfg2;
 666:.\Generated_Source\PSoC5/cyPm.c **** }
 667:.\Generated_Source\PSoC5/cyPm.c **** 
 668:.\Generated_Source\PSoC5/cyPm.c **** 
 669:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************
 670:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmSleep
 671:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************
 672:.\Generated_Source\PSoC5/cyPm.c **** *
 673:.\Generated_Source\PSoC5/cyPm.c **** * Summary:
 674:.\Generated_Source\PSoC5/cyPm.c **** *  Puts the part into the Sleep state.
 675:.\Generated_Source\PSoC5/cyPm.c **** *
 676:.\Generated_Source\PSoC5/cyPm.c **** *  Note Before calling this function, you must manually configure the power
 677:.\Generated_Source\PSoC5/cyPm.c **** *  mode of the source clocks for the timer that is used as wakeup timer.
 678:.\Generated_Source\PSoC5/cyPm.c **** *
 679:.\Generated_Source\PSoC5/cyPm.c **** *  Note Before calling this function, you must prepare clock tree configuration
 680:.\Generated_Source\PSoC5/cyPm.c **** *  for the low power mode by calling CyPmSaveClocks(). And restore clock
 681:.\Generated_Source\PSoC5/cyPm.c **** *  configuration after CyPmSleep() execution by calling CyPmRestoreClocks(). See
 682:.\Generated_Source\PSoC5/cyPm.c **** *  Power Management section, Clock Configuration subsection of the System
 683:.\Generated_Source\PSoC5/cyPm.c **** *  Reference Guide for more information.
 684:.\Generated_Source\PSoC5/cyPm.c **** *
 685:.\Generated_Source\PSoC5/cyPm.c **** *  PSoC 3:
 686:.\Generated_Source\PSoC5/cyPm.c **** *  Before switching to Sleep, if a wakeupTime other than NONE is specified,
 687:.\Generated_Source\PSoC5/cyPm.c **** *  then the appropriate timer state is configured as specified with the
 688:.\Generated_Source\PSoC5/cyPm.c **** *  interrupt for that timer disabled.  The wakeup source will be the combination
 689:.\Generated_Source\PSoC5/cyPm.c **** *  of the values specified in the wakeupSource and any timer specified in the
 690:.\Generated_Source\PSoC5/cyPm.c **** *  wakeupTime argument.  Once the wakeup condition is satisfied, then all saved
 691:.\Generated_Source\PSoC5/cyPm.c **** *  state is restored and the function returns in the Active state.
 692:.\Generated_Source\PSoC5/cyPm.c **** *
 693:.\Generated_Source\PSoC5/cyPm.c **** *  Note that if the wakeupTime is made with a different value, the period before
 694:.\Generated_Source\PSoC5/cyPm.c **** *  the wakeup occurs can be significantly shorter than the specified time.  If
 695:.\Generated_Source\PSoC5/cyPm.c **** *  the next call is made with the same wakeupTime value, then the wakeup will
 696:.\Generated_Source\PSoC5/cyPm.c **** *  occur the specified period after the previous wakeup occurred.
 697:.\Generated_Source\PSoC5/cyPm.c **** *
 698:.\Generated_Source\PSoC5/cyPm.c **** *  If a wakeupTime other than NONE is specified, then upon exit the state of the
 699:.\Generated_Source\PSoC5/cyPm.c **** *  specified timer will be left as specified by wakeupTime with the timer
 700:.\Generated_Source\PSoC5/cyPm.c **** *  enabled and the interrupt disabled.  If the CTW or One PPS is already
 701:.\Generated_Source\PSoC5/cyPm.c **** *  configured for wakeup, for example with the SleepTimer or RTC components,
 702:.\Generated_Source\PSoC5/cyPm.c **** *  then specify NONE for the wakeupTime and include the appropriate source for
 703:.\Generated_Source\PSoC5/cyPm.c **** *  wakeupSource.
 704:.\Generated_Source\PSoC5/cyPm.c **** *
 705:.\Generated_Source\PSoC5/cyPm.c **** *  PSoC 5LP:
 706:.\Generated_Source\PSoC5/cyPm.c **** *  The wakeupTime parameter is not used and the only NONE can be specified.
 707:.\Generated_Source\PSoC5/cyPm.c **** *  The wakeup time must be configured with the component, SleepTimer for CTW
 708:.\Generated_Source\PSoC5/cyPm.c **** *  intervals and RTC for 1PPS interval. The component must be configured to
 709:.\Generated_Source\PSoC5/cyPm.c **** *  generate an interrrupt.
 710:.\Generated_Source\PSoC5/cyPm.c **** *
 711:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:
 712:.\Generated_Source\PSoC5/cyPm.c **** *  wakeupTime:      Specifies a timer wakeup source and the frequency of that
 713:.\Generated_Source\PSoC5/cyPm.c **** *                   source. For PSoC 5LP, this parameter is ignored.
 714:.\Generated_Source\PSoC5/cyPm.c **** *
 715:.\Generated_Source\PSoC5/cyPm.c **** *           Define                      Time
 716:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_NONE               None
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 14


 717:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_ONE_PPS            One PPS: 1 second
 718:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_CTW_2MS            CTW: 2 ms
 719:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_CTW_4MS            CTW: 4 ms
 720:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_CTW_8MS            CTW: 8 ms
 721:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_CTW_16MS           CTW: 16 ms
 722:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_CTW_32MS           CTW: 32 ms
 723:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_CTW_64MS           CTW: 64 ms
 724:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_CTW_128MS          CTW: 128 ms
 725:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_CTW_256MS          CTW: 256 ms
 726:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_CTW_512MS          CTW: 512 ms
 727:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_CTW_1024MS         CTW: 1024 ms
 728:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_CTW_2048MS         CTW: 2048 ms
 729:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_CTW_4096MS         CTW: 4096 ms
 730:.\Generated_Source\PSoC5/cyPm.c **** *
 731:.\Generated_Source\PSoC5/cyPm.c **** *  wakeUpSource:    Specifies a bitwise mask of wakeup sources. In addition, if
 732:.\Generated_Source\PSoC5/cyPm.c **** *                   a wakeupTime has been specified the associated timer will be
 733:.\Generated_Source\PSoC5/cyPm.c **** *                   included as a wakeup source.
 734:.\Generated_Source\PSoC5/cyPm.c **** *
 735:.\Generated_Source\PSoC5/cyPm.c **** *           Define                      Source
 736:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_SRC_NONE                None
 737:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_SRC_COMPARATOR0         Comparator 0
 738:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_SRC_COMPARATOR1         Comparator 1
 739:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_SRC_COMPARATOR2         Comparator 2
 740:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_SRC_COMPARATOR3         Comparator 3
 741:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_SRC_PICU                PICU
 742:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_SRC_I2C                 I2C
 743:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_SRC_BOOSTCONVERTER      Boost Converter
 744:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_SRC_VD                  High and Low Voltage Detection (HVI, LVI)
 745:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_SRC_CTW                 Central Timewheel*
 746:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_SRC_ONE_PPS             One PPS*
 747:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_SRC_LCD                 LCD
 748:.\Generated_Source\PSoC5/cyPm.c **** *
 749:.\Generated_Source\PSoC5/cyPm.c **** *  *Note:   CTW and One PPS wakeup signals are in the same mask bit.
 750:.\Generated_Source\PSoC5/cyPm.c **** *
 751:.\Generated_Source\PSoC5/cyPm.c **** *  When specifying a Comparator as the wakeupSource an instance specific define
 752:.\Generated_Source\PSoC5/cyPm.c **** *  should be used that will track with the specific comparator that the instance
 753:.\Generated_Source\PSoC5/cyPm.c **** *  is placed into. As an example for a Comparator instance named MyComp the
 754:.\Generated_Source\PSoC5/cyPm.c **** *  value to OR into the mask is: MyComp_ctComp__CMP_MASK.
 755:.\Generated_Source\PSoC5/cyPm.c **** *
 756:.\Generated_Source\PSoC5/cyPm.c **** *  When CTW or One PPS is used as a wakeup source, the CyPmReadStatus()
 757:.\Generated_Source\PSoC5/cyPm.c **** *  function must be called upon wakeup with corresponding parameter. Please
 758:.\Generated_Source\PSoC5/cyPm.c **** *  refer to the CyPmReadStatus() API in the System Reference Guide for more
 759:.\Generated_Source\PSoC5/cyPm.c **** *  information.
 760:.\Generated_Source\PSoC5/cyPm.c **** *
 761:.\Generated_Source\PSoC5/cyPm.c **** * Return:
 762:.\Generated_Source\PSoC5/cyPm.c **** *  None
 763:.\Generated_Source\PSoC5/cyPm.c **** *
 764:.\Generated_Source\PSoC5/cyPm.c **** * Reentrant:
 765:.\Generated_Source\PSoC5/cyPm.c **** *  No
 766:.\Generated_Source\PSoC5/cyPm.c **** *
 767:.\Generated_Source\PSoC5/cyPm.c **** * Side Effects and Restrictions:
 768:.\Generated_Source\PSoC5/cyPm.c **** *  If a wakeupTime other than NONE is specified, then upon exit the state of the
 769:.\Generated_Source\PSoC5/cyPm.c **** *  specified timer will be left as specified by wakeupTime with the timer
 770:.\Generated_Source\PSoC5/cyPm.c **** *  enabled and the interrupt disabled. Also, the ILO 1 KHz (if CTW timer is
 771:.\Generated_Source\PSoC5/cyPm.c **** *  used as wake up time) will be left started.
 772:.\Generated_Source\PSoC5/cyPm.c **** *
 773:.\Generated_Source\PSoC5/cyPm.c **** *  The 1 kHz ILO clock is expected to be enabled for PSoC 3 and PSoC 5LP to
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 15


 774:.\Generated_Source\PSoC5/cyPm.c **** *  measure Hibernate/Sleep regulator settling time after a reset. The holdoff
 775:.\Generated_Source\PSoC5/cyPm.c **** *  delay is measured using rising edges of the 1 kHz ILO.
 776:.\Generated_Source\PSoC5/cyPm.c **** *
 777:.\Generated_Source\PSoC5/cyPm.c **** *  For PSoC 3 silicon hardware buzz should be disabled before entering a sleep
 778:.\Generated_Source\PSoC5/cyPm.c **** *  power mode. It is disabled by PSoC Creator during startup.
 779:.\Generated_Source\PSoC5/cyPm.c **** *  If a Low Voltage Interrupt (LVI), High Voltage Interrupt (HVI) or Brown Out
 780:.\Generated_Source\PSoC5/cyPm.c **** *  detect (power supply supervising capabilities) are required in a design
 781:.\Generated_Source\PSoC5/cyPm.c **** *  during sleep, use the Central Time Wheel (CTW) to periodically wake the
 782:.\Generated_Source\PSoC5/cyPm.c **** *  device, perform software buzz, and refresh the supervisory services. If LVI,
 783:.\Generated_Source\PSoC5/cyPm.c **** *  HVI, or Brown Out is not required, then use of the CTW is not required.
 784:.\Generated_Source\PSoC5/cyPm.c **** *  Refer to the device errata for more information.
 785:.\Generated_Source\PSoC5/cyPm.c **** *
 786:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/
 787:.\Generated_Source\PSoC5/cyPm.c **** void CyPmSleep(uint8 wakeupTime, uint16 wakeupSource) 
 788:.\Generated_Source\PSoC5/cyPm.c **** {
 789:.\Generated_Source\PSoC5/cyPm.c ****     uint8 interruptState;
 790:.\Generated_Source\PSoC5/cyPm.c **** 
 791:.\Generated_Source\PSoC5/cyPm.c ****     /* Save current global interrupt enable and disable it */
 792:.\Generated_Source\PSoC5/cyPm.c ****     interruptState = CyEnterCriticalSection();
 793:.\Generated_Source\PSoC5/cyPm.c **** 
 794:.\Generated_Source\PSoC5/cyPm.c **** 
 795:.\Generated_Source\PSoC5/cyPm.c ****     /***********************************************************************
 796:.\Generated_Source\PSoC5/cyPm.c ****     * The Hibernate/Sleep regulator has a settling time after a reset.
 797:.\Generated_Source\PSoC5/cyPm.c ****     * During this time, the system ignores requests to enter Sleep and
 798:.\Generated_Source\PSoC5/cyPm.c ****     * Hibernate modes. The holdoff delay is measured using rising edges of
 799:.\Generated_Source\PSoC5/cyPm.c ****     * the 1 kHz ILO.
 800:.\Generated_Source\PSoC5/cyPm.c ****     ***********************************************************************/
 801:.\Generated_Source\PSoC5/cyPm.c ****     if(0u == (CY_PM_MODE_CSR_REG & CY_PM_MODE_CSR_PWRUP_PULSE_Q))
 802:.\Generated_Source\PSoC5/cyPm.c ****     {
 803:.\Generated_Source\PSoC5/cyPm.c ****         /* Disable hold off - no action on restore */
 804:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_PWRSYS_SLP_TR_REG &= CY_PM_PWRSYS_SLP_TR_HIBSLP_HOLDOFF_MASK;
 805:.\Generated_Source\PSoC5/cyPm.c ****     }
 806:.\Generated_Source\PSoC5/cyPm.c ****     else
 807:.\Generated_Source\PSoC5/cyPm.c ****     {
 808:.\Generated_Source\PSoC5/cyPm.c ****         /* Abort, device is not ready for low power mode entry */
 809:.\Generated_Source\PSoC5/cyPm.c **** 
 810:.\Generated_Source\PSoC5/cyPm.c ****         /* Restore global interrupt enable state */
 811:.\Generated_Source\PSoC5/cyPm.c ****         CyExitCriticalSection(interruptState);
 812:.\Generated_Source\PSoC5/cyPm.c **** 
 813:.\Generated_Source\PSoC5/cyPm.c ****         return;
 814:.\Generated_Source\PSoC5/cyPm.c ****     }
 815:.\Generated_Source\PSoC5/cyPm.c **** 
 816:.\Generated_Source\PSoC5/cyPm.c **** 
 817:.\Generated_Source\PSoC5/cyPm.c ****     /***********************************************************************
 818:.\Generated_Source\PSoC5/cyPm.c ****     * PSoC3 < TO6:
 819:.\Generated_Source\PSoC5/cyPm.c ****     * - Hardware buzz must be disabled before sleep mode entry.
 820:.\Generated_Source\PSoC5/cyPm.c ****     * - Voltage supervision (HVI/LVI) requires hardware buzz, so they must
 821:.\Generated_Source\PSoC5/cyPm.c ****     *   be aslo disabled.
 822:.\Generated_Source\PSoC5/cyPm.c ****     *
 823:.\Generated_Source\PSoC5/cyPm.c ****     * PSoC3 >= TO6:
 824:.\Generated_Source\PSoC5/cyPm.c ****     * - Voltage supervision (HVI/LVI) requires hardware buzz, so hardware buzz must be
 825:.\Generated_Source\PSoC5/cyPm.c ****     *   enabled before sleep mode entry and restored on wakeup.
 826:.\Generated_Source\PSoC5/cyPm.c ****     ***********************************************************************/
 827:.\Generated_Source\PSoC5/cyPm.c ****     #if(CY_PSOC3)
 828:.\Generated_Source\PSoC5/cyPm.c **** 
 829:.\Generated_Source\PSoC5/cyPm.c ****         /* Silicon Revision ID is below TO6 */
 830:.\Generated_Source\PSoC5/cyPm.c ****         if(CYDEV_CHIP_REV_ACTUAL < 5u)
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 16


 831:.\Generated_Source\PSoC5/cyPm.c ****         {
 832:.\Generated_Source\PSoC5/cyPm.c ****             /* Hardware buzz expected to be disabled in Sleep mode */
 833:.\Generated_Source\PSoC5/cyPm.c ****             CYASSERT(0u == (CY_PM_PWRSYS_WAKE_TR2_REG & CY_PM_PWRSYS_WAKE_TR2_EN_BUZZ));
 834:.\Generated_Source\PSoC5/cyPm.c ****         }
 835:.\Generated_Source\PSoC5/cyPm.c **** 
 836:.\Generated_Source\PSoC5/cyPm.c **** 
 837:.\Generated_Source\PSoC5/cyPm.c ****         if(0u != (CY_PM_RESET_CR1_REG & (CY_PM_RESET_CR1_HVIA_EN |
 838:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_RESET_CR1_LVIA_EN | CY_PM_RESET_CR1_LVID_EN)))
 839:.\Generated_Source\PSoC5/cyPm.c ****         {
 840:.\Generated_Source\PSoC5/cyPm.c ****             if(CYDEV_CHIP_REV_ACTUAL < 5u)
 841:.\Generated_Source\PSoC5/cyPm.c ****             {
 842:.\Generated_Source\PSoC5/cyPm.c ****                 /* LVI/HVI requires hardware buzz to be enabled */
 843:.\Generated_Source\PSoC5/cyPm.c ****                 CYASSERT(0u != 0u);
 844:.\Generated_Source\PSoC5/cyPm.c ****             }
 845:.\Generated_Source\PSoC5/cyPm.c ****             else
 846:.\Generated_Source\PSoC5/cyPm.c ****             {
 847:.\Generated_Source\PSoC5/cyPm.c ****                 if (0u == (CY_PM_PWRSYS_WAKE_TR2_REG & CY_PM_PWRSYS_WAKE_TR2_EN_BUZZ))
 848:.\Generated_Source\PSoC5/cyPm.c ****                 {
 849:.\Generated_Source\PSoC5/cyPm.c ****                     cyPmBackup.hardwareBuzz = CY_PM_DISABLED;
 850:.\Generated_Source\PSoC5/cyPm.c ****                     CY_PM_PWRSYS_WAKE_TR2_REG |= CY_PM_PWRSYS_WAKE_TR2_EN_BUZZ;
 851:.\Generated_Source\PSoC5/cyPm.c ****                 }
 852:.\Generated_Source\PSoC5/cyPm.c ****                 else
 853:.\Generated_Source\PSoC5/cyPm.c ****                 {
 854:.\Generated_Source\PSoC5/cyPm.c ****                     cyPmBackup.hardwareBuzz = CY_PM_ENABLED;
 855:.\Generated_Source\PSoC5/cyPm.c ****                 }
 856:.\Generated_Source\PSoC5/cyPm.c ****             }
 857:.\Generated_Source\PSoC5/cyPm.c ****         }
 858:.\Generated_Source\PSoC5/cyPm.c **** 
 859:.\Generated_Source\PSoC5/cyPm.c ****     #endif /* (CY_PSOC3) */
 860:.\Generated_Source\PSoC5/cyPm.c **** 
 861:.\Generated_Source\PSoC5/cyPm.c **** 
 862:.\Generated_Source\PSoC5/cyPm.c ****     /*******************************************************************************
 863:.\Generated_Source\PSoC5/cyPm.c ****     * For ARM-based devices, an interrupt is required for the CPU to wake up. The
 864:.\Generated_Source\PSoC5/cyPm.c ****     * Power Management implementation assumes that wakeup time is configured with a
 865:.\Generated_Source\PSoC5/cyPm.c ****     * separate component (component-based wakeup time configuration) for an
 866:.\Generated_Source\PSoC5/cyPm.c ****     * interrupt to be issued on terminal count. For more information, refer to the
 867:.\Generated_Source\PSoC5/cyPm.c ****     * Wakeup Time Configuration section of System Reference Guide.
 868:.\Generated_Source\PSoC5/cyPm.c ****     *******************************************************************************/
 869:.\Generated_Source\PSoC5/cyPm.c ****     #if(CY_PSOC5)
 870:.\Generated_Source\PSoC5/cyPm.c **** 
 871:.\Generated_Source\PSoC5/cyPm.c ****         /* Arguments expected to be 0 */
 872:.\Generated_Source\PSoC5/cyPm.c ****         CYASSERT(PM_SLEEP_TIME_NONE == wakeupTime);
 873:.\Generated_Source\PSoC5/cyPm.c **** 
 874:.\Generated_Source\PSoC5/cyPm.c ****         if(0u != wakeupTime)
 875:.\Generated_Source\PSoC5/cyPm.c ****         {
 876:.\Generated_Source\PSoC5/cyPm.c ****             /* To remove unreferenced local variable warning */
 877:.\Generated_Source\PSoC5/cyPm.c ****         }
 878:.\Generated_Source\PSoC5/cyPm.c **** 
 879:.\Generated_Source\PSoC5/cyPm.c ****     #endif /* (CY_PSOC5) */
 880:.\Generated_Source\PSoC5/cyPm.c **** 
 881:.\Generated_Source\PSoC5/cyPm.c **** 
 882:.\Generated_Source\PSoC5/cyPm.c ****     CyPmHibSlpSaveSet();
 883:.\Generated_Source\PSoC5/cyPm.c **** 
 884:.\Generated_Source\PSoC5/cyPm.c **** 
 885:.\Generated_Source\PSoC5/cyPm.c ****     #if(CY_PSOC3)
 886:.\Generated_Source\PSoC5/cyPm.c **** 
 887:.\Generated_Source\PSoC5/cyPm.c ****         /* CTW - save current and set new configuration */
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 17


 888:.\Generated_Source\PSoC5/cyPm.c ****         if((wakeupTime >= PM_SLEEP_TIME_CTW_2MS) && (wakeupTime <= PM_SLEEP_TIME_CTW_4096MS))
 889:.\Generated_Source\PSoC5/cyPm.c ****         {
 890:.\Generated_Source\PSoC5/cyPm.c ****             /* Save current and set new configuration of the CTW */
 891:.\Generated_Source\PSoC5/cyPm.c ****             CyPmCtwSetInterval((uint8)(wakeupTime - 1u));
 892:.\Generated_Source\PSoC5/cyPm.c **** 
 893:.\Generated_Source\PSoC5/cyPm.c ****             /* Include associated timer to the wakeupSource */
 894:.\Generated_Source\PSoC5/cyPm.c ****             wakeupSource |= PM_SLEEP_SRC_CTW;
 895:.\Generated_Source\PSoC5/cyPm.c ****         }
 896:.\Generated_Source\PSoC5/cyPm.c **** 
 897:.\Generated_Source\PSoC5/cyPm.c ****         /* 1PPS - save current and set new configuration */
 898:.\Generated_Source\PSoC5/cyPm.c ****         if(PM_SLEEP_TIME_ONE_PPS == wakeupTime)
 899:.\Generated_Source\PSoC5/cyPm.c ****         {
 900:.\Generated_Source\PSoC5/cyPm.c ****             /* Save current and set new configuration of the 1PPS */
 901:.\Generated_Source\PSoC5/cyPm.c ****             CyPmOppsSet();
 902:.\Generated_Source\PSoC5/cyPm.c **** 
 903:.\Generated_Source\PSoC5/cyPm.c ****             /* Include associated timer to the wakeupSource */
 904:.\Generated_Source\PSoC5/cyPm.c ****             wakeupSource |= PM_SLEEP_SRC_ONE_PPS;
 905:.\Generated_Source\PSoC5/cyPm.c ****         }
 906:.\Generated_Source\PSoC5/cyPm.c **** 
 907:.\Generated_Source\PSoC5/cyPm.c ****     #endif /* (CY_PSOC3) */
 908:.\Generated_Source\PSoC5/cyPm.c **** 
 909:.\Generated_Source\PSoC5/cyPm.c **** 
 910:.\Generated_Source\PSoC5/cyPm.c ****     /* Save and set new wake up configuration */
 911:.\Generated_Source\PSoC5/cyPm.c **** 
 912:.\Generated_Source\PSoC5/cyPm.c ****     /* Interrupt, PICU, I2C, Boost converter, CTW/1PPS */
 913:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg0 = CY_PM_WAKEUP_CFG0_REG;
 914:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = (uint8) (wakeupSource >> 4u);
 915:.\Generated_Source\PSoC5/cyPm.c **** 
 916:.\Generated_Source\PSoC5/cyPm.c ****     /* Comparators */
 917:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg1 = CY_PM_WAKEUP_CFG1_REG;
 918:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = (((uint8) wakeupSource) & CY_PM_WAKEUP_SRC_CMPS_MASK);
 919:.\Generated_Source\PSoC5/cyPm.c **** 
 920:.\Generated_Source\PSoC5/cyPm.c ****     /* LCD */
 921:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg2 = CY_PM_WAKEUP_CFG2_REG;
 922:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = ((uint8) ((wakeupSource >> 12u) & 0x01u));
 923:.\Generated_Source\PSoC5/cyPm.c **** 
 924:.\Generated_Source\PSoC5/cyPm.c **** 
 925:.\Generated_Source\PSoC5/cyPm.c ****     /*******************************************************************
 926:.\Generated_Source\PSoC5/cyPm.c ****     * Do not use merge region below unless any component datasheet
 927:.\Generated_Source\PSoC5/cyPm.c ****     * suggest to do so.
 928:.\Generated_Source\PSoC5/cyPm.c ****     *******************************************************************/
 929:.\Generated_Source\PSoC5/cyPm.c ****     /* `#START CY_PM_JUST_BEFORE_SLEEP` */
 930:.\Generated_Source\PSoC5/cyPm.c **** 
 931:.\Generated_Source\PSoC5/cyPm.c ****     /* `#END` */
 932:.\Generated_Source\PSoC5/cyPm.c **** 
 933:.\Generated_Source\PSoC5/cyPm.c **** 
 934:.\Generated_Source\PSoC5/cyPm.c ****     /* Last moment IMO frequency change */
 935:.\Generated_Source\PSoC5/cyPm.c ****     if(0u == (CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK))
 936:.\Generated_Source\PSoC5/cyPm.c ****     {
 937:.\Generated_Source\PSoC5/cyPm.c ****         /* IMO frequency is 12 MHz */
 938:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.imoActFreq12Mhz = CY_PM_ENABLED;
 939:.\Generated_Source\PSoC5/cyPm.c ****     }
 940:.\Generated_Source\PSoC5/cyPm.c ****     else
 941:.\Generated_Source\PSoC5/cyPm.c ****     {
 942:.\Generated_Source\PSoC5/cyPm.c ****         /* IMO frequency is not 12 MHz */
 943:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.imoActFreq12Mhz = CY_PM_DISABLED;
 944:.\Generated_Source\PSoC5/cyPm.c **** 
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 18


 945:.\Generated_Source\PSoC5/cyPm.c ****         /* Save IMO frequency */
 946:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.imoActFreq = CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK;
 947:.\Generated_Source\PSoC5/cyPm.c **** 
 948:.\Generated_Source\PSoC5/cyPm.c ****         /* Set IMO frequency to 12 MHz */
 949:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_FASTCLK_IMO_CR_REG &= ((uint8) (~CY_PM_FASTCLK_IMO_CR_FREQ_MASK));
 950:.\Generated_Source\PSoC5/cyPm.c ****     }
 951:.\Generated_Source\PSoC5/cyPm.c **** 
 952:.\Generated_Source\PSoC5/cyPm.c ****     /* Switch to the Sleep mode */
 953:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_MODE_CSR_REG = ((CY_PM_MODE_CSR_REG & ((uint8)(~CY_PM_MODE_CSR_MASK))) | CY_PM_MODE_CSR_S
 954:.\Generated_Source\PSoC5/cyPm.c **** 
 955:.\Generated_Source\PSoC5/cyPm.c ****     /* Recommended readback. */
 956:.\Generated_Source\PSoC5/cyPm.c ****     (void) CY_PM_MODE_CSR_REG;
 957:.\Generated_Source\PSoC5/cyPm.c **** 
 958:.\Generated_Source\PSoC5/cyPm.c ****     /* Two recommended NOPs to get into the mode. */
 959:.\Generated_Source\PSoC5/cyPm.c ****     CY_NOP;
 960:.\Generated_Source\PSoC5/cyPm.c ****     CY_NOP;
 961:.\Generated_Source\PSoC5/cyPm.c **** 
 962:.\Generated_Source\PSoC5/cyPm.c ****     /* Execute WFI instruction (for ARM-based devices only) */
 963:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WFI;
 964:.\Generated_Source\PSoC5/cyPm.c **** 
 965:.\Generated_Source\PSoC5/cyPm.c ****     /* Point of return from Sleep Mode */
 966:.\Generated_Source\PSoC5/cyPm.c **** 
 967:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore last moment IMO frequency change */
 968:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED != cyPmBackup.imoActFreq12Mhz)
 969:.\Generated_Source\PSoC5/cyPm.c ****     {
 970:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_FASTCLK_IMO_CR_REG  = (CY_PM_FASTCLK_IMO_CR_REG & ((uint8)(~CY_PM_FASTCLK_IMO_CR_FREQ
 971:.\Generated_Source\PSoC5/cyPm.c ****                                     cyPmBackup.imoActFreq;
 972:.\Generated_Source\PSoC5/cyPm.c ****     }
 973:.\Generated_Source\PSoC5/cyPm.c **** 
 974:.\Generated_Source\PSoC5/cyPm.c **** 
 975:.\Generated_Source\PSoC5/cyPm.c ****     /*******************************************************************
 976:.\Generated_Source\PSoC5/cyPm.c ****     * Do not use merge region below unless any component datasheet
 977:.\Generated_Source\PSoC5/cyPm.c ****     * suggest to do so.
 978:.\Generated_Source\PSoC5/cyPm.c ****     *******************************************************************/
 979:.\Generated_Source\PSoC5/cyPm.c ****     /* `#START CY_PM_JUST_AFTER_WAKEUP_FROM_SLEEP` */
 980:.\Generated_Source\PSoC5/cyPm.c **** 
 981:.\Generated_Source\PSoC5/cyPm.c ****     /* `#END` */
 982:.\Generated_Source\PSoC5/cyPm.c **** 
 983:.\Generated_Source\PSoC5/cyPm.c **** 
 984:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore hardware configuration */
 985:.\Generated_Source\PSoC5/cyPm.c ****     CyPmHibSlpRestore();
 986:.\Generated_Source\PSoC5/cyPm.c **** 
 987:.\Generated_Source\PSoC5/cyPm.c **** 
 988:.\Generated_Source\PSoC5/cyPm.c ****     /* Disable hardware buzz, if it was previously enabled */
 989:.\Generated_Source\PSoC5/cyPm.c ****     #if(CY_PSOC3)
 990:.\Generated_Source\PSoC5/cyPm.c **** 
 991:.\Generated_Source\PSoC5/cyPm.c ****         if(0u != (CY_PM_RESET_CR1_REG & (CY_PM_RESET_CR1_HVIA_EN |
 992:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_RESET_CR1_LVIA_EN | CY_PM_RESET_CR1_LVID_EN)))
 993:.\Generated_Source\PSoC5/cyPm.c ****         {
 994:.\Generated_Source\PSoC5/cyPm.c ****             if(CYDEV_CHIP_REV_ACTUAL >= 5u)
 995:.\Generated_Source\PSoC5/cyPm.c ****             {
 996:.\Generated_Source\PSoC5/cyPm.c ****                 if (CY_PM_DISABLED == cyPmBackup.hardwareBuzz)
 997:.\Generated_Source\PSoC5/cyPm.c ****                 {
 998:.\Generated_Source\PSoC5/cyPm.c ****                     CY_PM_PWRSYS_WAKE_TR2_REG &= (uint8)(~CY_PM_PWRSYS_WAKE_TR2_EN_BUZZ);
 999:.\Generated_Source\PSoC5/cyPm.c ****                 }
1000:.\Generated_Source\PSoC5/cyPm.c ****             }
1001:.\Generated_Source\PSoC5/cyPm.c ****         }
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 19


1002:.\Generated_Source\PSoC5/cyPm.c **** 
1003:.\Generated_Source\PSoC5/cyPm.c ****     #endif /* (CY_PSOC3) */
1004:.\Generated_Source\PSoC5/cyPm.c **** 
1005:.\Generated_Source\PSoC5/cyPm.c **** 
1006:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore current wake up configuration */
1007:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = cyPmBackup.wakeupCfg0;
1008:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = cyPmBackup.wakeupCfg1;
1009:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = cyPmBackup.wakeupCfg2;
1010:.\Generated_Source\PSoC5/cyPm.c **** 
1011:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore global interrupt enable state */
1012:.\Generated_Source\PSoC5/cyPm.c ****     CyExitCriticalSection(interruptState);
1013:.\Generated_Source\PSoC5/cyPm.c **** }
1014:.\Generated_Source\PSoC5/cyPm.c **** 
1015:.\Generated_Source\PSoC5/cyPm.c **** 
1016:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************
1017:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmHibernate
1018:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************
1019:.\Generated_Source\PSoC5/cyPm.c **** *
1020:.\Generated_Source\PSoC5/cyPm.c **** * Summary:
1021:.\Generated_Source\PSoC5/cyPm.c **** *  Puts the part into the Hibernate state.
1022:.\Generated_Source\PSoC5/cyPm.c **** *
1023:.\Generated_Source\PSoC5/cyPm.c **** *  PSoC 3 and PSoC 5LP:
1024:.\Generated_Source\PSoC5/cyPm.c **** *  Before switching to Hibernate, the current status of the PICU wakeup source
1025:.\Generated_Source\PSoC5/cyPm.c **** *  bit is saved and then set. This configures the device to wake up from the
1026:.\Generated_Source\PSoC5/cyPm.c **** *  PICU. Make sure you have at least one pin configured to generate a PICU
1027:.\Generated_Source\PSoC5/cyPm.c **** *  interrupt. For pin Px.y, the register "PICU_INTTYPE_PICUx_INTTYPEy" controls
1028:.\Generated_Source\PSoC5/cyPm.c **** *  the PICU behavior. In the TRM, this register is "PICU[0..15]_INTTYPE[0..7]."
1029:.\Generated_Source\PSoC5/cyPm.c **** *  In the Pins component datasheet, this register is referred to as the IRQ
1030:.\Generated_Source\PSoC5/cyPm.c **** *  option. Once the wakeup occurs, the PICU wakeup source bit is restored and
1031:.\Generated_Source\PSoC5/cyPm.c **** *  the PSoC returns to the Active state.
1032:.\Generated_Source\PSoC5/cyPm.c **** *
1033:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:
1034:.\Generated_Source\PSoC5/cyPm.c **** *  None
1035:.\Generated_Source\PSoC5/cyPm.c **** *
1036:.\Generated_Source\PSoC5/cyPm.c **** * Return:
1037:.\Generated_Source\PSoC5/cyPm.c **** *  None
1038:.\Generated_Source\PSoC5/cyPm.c **** *
1039:.\Generated_Source\PSoC5/cyPm.c **** * Reentrant:
1040:.\Generated_Source\PSoC5/cyPm.c **** *  No
1041:.\Generated_Source\PSoC5/cyPm.c **** *
1042:.\Generated_Source\PSoC5/cyPm.c **** * Side Effects:
1043:.\Generated_Source\PSoC5/cyPm.c **** *  Applications must wait 20 us before re-entering hibernate or sleep after
1044:.\Generated_Source\PSoC5/cyPm.c **** *  waking up from hibernate. The 20 us allows the sleep regulator time to
1045:.\Generated_Source\PSoC5/cyPm.c **** *  stabilize before the next hibernate / sleep event occurs. The 20 us
1046:.\Generated_Source\PSoC5/cyPm.c **** *  requirement begins when the device wakes up. There is no hardware check that
1047:.\Generated_Source\PSoC5/cyPm.c **** *  this requirement is met. The specified delay should be done on ISR entry.
1048:.\Generated_Source\PSoC5/cyPm.c **** *
1049:.\Generated_Source\PSoC5/cyPm.c **** *  After wakeup PICU interrupt occurs, the Pin_ClearInterrupt() (where Pin is
1050:.\Generated_Source\PSoC5/cyPm.c **** *  instance name of the Pins component) function must be called to clear the
1051:.\Generated_Source\PSoC5/cyPm.c **** *  latched pin events to allow proper Hibernate mode entry andd to enable
1052:.\Generated_Source\PSoC5/cyPm.c **** *  detection of future events.
1053:.\Generated_Source\PSoC5/cyPm.c **** *
1054:.\Generated_Source\PSoC5/cyPm.c **** *  The 1 kHz ILO clock is expected to be enabled for PSoC 3 and PSoC 5LP to
1055:.\Generated_Source\PSoC5/cyPm.c **** *  measure Hibernate/Sleep regulator settling time after a reset. The holdoff
1056:.\Generated_Source\PSoC5/cyPm.c **** *  delay is measured using rising edges of the 1 kHz ILO.
1057:.\Generated_Source\PSoC5/cyPm.c **** *
1058:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 20


1059:.\Generated_Source\PSoC5/cyPm.c **** void CyPmHibernate(void) 
1060:.\Generated_Source\PSoC5/cyPm.c **** {
1061:.\Generated_Source\PSoC5/cyPm.c ****     uint8 interruptState;
1062:.\Generated_Source\PSoC5/cyPm.c **** 
1063:.\Generated_Source\PSoC5/cyPm.c ****     /* Save current global interrupt enable and disable it */
1064:.\Generated_Source\PSoC5/cyPm.c ****     interruptState = CyEnterCriticalSection();
1065:.\Generated_Source\PSoC5/cyPm.c **** 
1066:.\Generated_Source\PSoC5/cyPm.c ****         /***********************************************************************
1067:.\Generated_Source\PSoC5/cyPm.c ****         * The Hibernate/Sleep regulator has a settling time after a reset.
1068:.\Generated_Source\PSoC5/cyPm.c ****         * During this time, the system ignores requests to enter Sleep and
1069:.\Generated_Source\PSoC5/cyPm.c ****         * Hibernate modes. The holdoff delay is measured using rising edges of
1070:.\Generated_Source\PSoC5/cyPm.c ****         * the 1 kHz ILO.
1071:.\Generated_Source\PSoC5/cyPm.c ****         ***********************************************************************/
1072:.\Generated_Source\PSoC5/cyPm.c ****         if(0u == (CY_PM_MODE_CSR_REG & CY_PM_MODE_CSR_PWRUP_PULSE_Q))
1073:.\Generated_Source\PSoC5/cyPm.c ****         {
1074:.\Generated_Source\PSoC5/cyPm.c ****             /* Disable hold off - no action on restore */
1075:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_PWRSYS_SLP_TR_REG &= CY_PM_PWRSYS_SLP_TR_HIBSLP_HOLDOFF_MASK;
1076:.\Generated_Source\PSoC5/cyPm.c ****         }
1077:.\Generated_Source\PSoC5/cyPm.c ****         else
1078:.\Generated_Source\PSoC5/cyPm.c ****         {
1079:.\Generated_Source\PSoC5/cyPm.c ****             /* Abort, device is not ready for low power mode entry */
1080:.\Generated_Source\PSoC5/cyPm.c **** 
1081:.\Generated_Source\PSoC5/cyPm.c ****             /* Restore global interrupt enable state */
1082:.\Generated_Source\PSoC5/cyPm.c ****             CyExitCriticalSection(interruptState);
1083:.\Generated_Source\PSoC5/cyPm.c **** 
1084:.\Generated_Source\PSoC5/cyPm.c ****             return;
1085:.\Generated_Source\PSoC5/cyPm.c ****         }
1086:.\Generated_Source\PSoC5/cyPm.c **** 
1087:.\Generated_Source\PSoC5/cyPm.c ****     CyPmHibSaveSet();
1088:.\Generated_Source\PSoC5/cyPm.c **** 
1089:.\Generated_Source\PSoC5/cyPm.c **** 
1090:.\Generated_Source\PSoC5/cyPm.c ****     /* Save and enable only wakeup on PICU */
1091:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg0 = CY_PM_WAKEUP_CFG0_REG;
1092:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = CY_PM_WAKEUP_PICU;
1093:.\Generated_Source\PSoC5/cyPm.c **** 
1094:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg1 = CY_PM_WAKEUP_CFG1_REG;
1095:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = 0x00u;
1096:.\Generated_Source\PSoC5/cyPm.c **** 
1097:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg2 = CY_PM_WAKEUP_CFG2_REG;
1098:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = 0x00u;
1099:.\Generated_Source\PSoC5/cyPm.c **** 
1100:.\Generated_Source\PSoC5/cyPm.c **** 
1101:.\Generated_Source\PSoC5/cyPm.c ****     /* Last moment IMO frequency change */
1102:.\Generated_Source\PSoC5/cyPm.c ****     if(0u == (CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK))
1103:.\Generated_Source\PSoC5/cyPm.c ****     {
1104:.\Generated_Source\PSoC5/cyPm.c ****         /* IMO frequency is 12 MHz */
1105:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.imoActFreq12Mhz = CY_PM_ENABLED;
1106:.\Generated_Source\PSoC5/cyPm.c ****     }
1107:.\Generated_Source\PSoC5/cyPm.c ****     else
1108:.\Generated_Source\PSoC5/cyPm.c ****     {
1109:.\Generated_Source\PSoC5/cyPm.c ****         /* IMO frequency is not 12 MHz */
1110:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.imoActFreq12Mhz = CY_PM_DISABLED;
1111:.\Generated_Source\PSoC5/cyPm.c **** 
1112:.\Generated_Source\PSoC5/cyPm.c ****         /* Save IMO frequency */
1113:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.imoActFreq = CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK;
1114:.\Generated_Source\PSoC5/cyPm.c **** 
1115:.\Generated_Source\PSoC5/cyPm.c ****         /* Set IMO frequency to 12 MHz */
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 21


1116:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_FASTCLK_IMO_CR_REG &= ((uint8) (~CY_PM_FASTCLK_IMO_CR_FREQ_MASK));
1117:.\Generated_Source\PSoC5/cyPm.c ****     }
1118:.\Generated_Source\PSoC5/cyPm.c **** 
1119:.\Generated_Source\PSoC5/cyPm.c **** 
1120:.\Generated_Source\PSoC5/cyPm.c ****     /* Switch to Hibernate Mode */
1121:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_MODE_CSR_REG = (CY_PM_MODE_CSR_REG & ((uint8) (~CY_PM_MODE_CSR_MASK))) | CY_PM_MODE_CSR_H
1122:.\Generated_Source\PSoC5/cyPm.c **** 
1123:.\Generated_Source\PSoC5/cyPm.c ****     /* Recommended readback. */
1124:.\Generated_Source\PSoC5/cyPm.c ****     (void) CY_PM_MODE_CSR_REG;
1125:.\Generated_Source\PSoC5/cyPm.c **** 
1126:.\Generated_Source\PSoC5/cyPm.c ****     /* Two recommended NOPs to get into the mode. */
1127:.\Generated_Source\PSoC5/cyPm.c ****     CY_NOP;
1128:.\Generated_Source\PSoC5/cyPm.c ****     CY_NOP;
1129:.\Generated_Source\PSoC5/cyPm.c **** 
1130:.\Generated_Source\PSoC5/cyPm.c ****     /* Execute WFI instruction (for ARM-based devices only) */
1131:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WFI;
1132:.\Generated_Source\PSoC5/cyPm.c **** 
1133:.\Generated_Source\PSoC5/cyPm.c **** 
1134:.\Generated_Source\PSoC5/cyPm.c ****     /* Point of return from Hibernate mode */
1135:.\Generated_Source\PSoC5/cyPm.c **** 
1136:.\Generated_Source\PSoC5/cyPm.c **** 
1137:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore last moment IMO frequency change */
1138:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED != cyPmBackup.imoActFreq12Mhz)
1139:.\Generated_Source\PSoC5/cyPm.c ****     {
1140:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_FASTCLK_IMO_CR_REG  = (CY_PM_FASTCLK_IMO_CR_REG & ((uint8)(~CY_PM_FASTCLK_IMO_CR_FREQ
1141:.\Generated_Source\PSoC5/cyPm.c ****                                     cyPmBackup.imoActFreq;
1142:.\Generated_Source\PSoC5/cyPm.c ****     }
1143:.\Generated_Source\PSoC5/cyPm.c **** 
1144:.\Generated_Source\PSoC5/cyPm.c **** 
1145:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore device for proper Hibernate mode exit*/
1146:.\Generated_Source\PSoC5/cyPm.c ****     CyPmHibRestore();
1147:.\Generated_Source\PSoC5/cyPm.c **** 
1148:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore current wake up configuration */
1149:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = cyPmBackup.wakeupCfg0;
1150:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = cyPmBackup.wakeupCfg1;
1151:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = cyPmBackup.wakeupCfg2;
1152:.\Generated_Source\PSoC5/cyPm.c **** 
1153:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore global interrupt enable state */
1154:.\Generated_Source\PSoC5/cyPm.c ****     CyExitCriticalSection(interruptState);
1155:.\Generated_Source\PSoC5/cyPm.c **** }
1156:.\Generated_Source\PSoC5/cyPm.c **** 
1157:.\Generated_Source\PSoC5/cyPm.c **** 
1158:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************
1159:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmReadStatus
1160:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************
1161:.\Generated_Source\PSoC5/cyPm.c **** *
1162:.\Generated_Source\PSoC5/cyPm.c **** * Summary:
1163:.\Generated_Source\PSoC5/cyPm.c **** *  Manages the Power Manager Interrupt Status Register.  This register has the
1164:.\Generated_Source\PSoC5/cyPm.c **** *  interrupt status for the one pulse per second, central timewheel and fast
1165:.\Generated_Source\PSoC5/cyPm.c **** *  timewheel timers.  This hardware register clears on read.  To allow for only
1166:.\Generated_Source\PSoC5/cyPm.c **** *  clearing the bits of interest and preserving the other bits, this function
1167:.\Generated_Source\PSoC5/cyPm.c **** *  uses a shadow register that retains the state.  This function reads the
1168:.\Generated_Source\PSoC5/cyPm.c **** *  status register and ORs that value with the shadow register.  That is the
1169:.\Generated_Source\PSoC5/cyPm.c **** *  value that is returned.  Then the bits in the mask that are set are cleared
1170:.\Generated_Source\PSoC5/cyPm.c **** *  from this value and written back to the shadow register.
1171:.\Generated_Source\PSoC5/cyPm.c **** *
1172:.\Generated_Source\PSoC5/cyPm.c **** *  Note You must call this function within 1 ms (1 clock cycle of the ILO)
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 22


1173:.\Generated_Source\PSoC5/cyPm.c **** *  after a CTW event has occurred.
1174:.\Generated_Source\PSoC5/cyPm.c **** *
1175:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:
1176:.\Generated_Source\PSoC5/cyPm.c **** *  mask: Bits in the shadow register to clear.
1177:.\Generated_Source\PSoC5/cyPm.c **** *
1178:.\Generated_Source\PSoC5/cyPm.c **** *       Define                      Source
1179:.\Generated_Source\PSoC5/cyPm.c **** *  CY_PM_FTW_INT                Fast Timewheel
1180:.\Generated_Source\PSoC5/cyPm.c **** *  CY_PM_CTW_INT                Central Timewheel
1181:.\Generated_Source\PSoC5/cyPm.c **** *  CY_PM_ONEPPS_INT             One Pulse Per Second
1182:.\Generated_Source\PSoC5/cyPm.c **** *
1183:.\Generated_Source\PSoC5/cyPm.c **** * Return:
1184:.\Generated_Source\PSoC5/cyPm.c **** *  Status.  Same bits values as the mask parameter.
1185:.\Generated_Source\PSoC5/cyPm.c **** *
1186:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/
1187:.\Generated_Source\PSoC5/cyPm.c **** uint8 CyPmReadStatus(uint8 mask) 
1188:.\Generated_Source\PSoC5/cyPm.c **** {
1189:.\Generated_Source\PSoC5/cyPm.c ****     static uint8 interruptStatus;
1190:.\Generated_Source\PSoC5/cyPm.c ****     uint8 interruptState;
1191:.\Generated_Source\PSoC5/cyPm.c ****     uint8 tmpStatus;
1192:.\Generated_Source\PSoC5/cyPm.c **** 
1193:.\Generated_Source\PSoC5/cyPm.c ****     /* Enter critical section */
1194:.\Generated_Source\PSoC5/cyPm.c ****     interruptState = CyEnterCriticalSection();
1195:.\Generated_Source\PSoC5/cyPm.c **** 
1196:.\Generated_Source\PSoC5/cyPm.c ****     /* Save value of the register, copy it and clear desired bit */
1197:.\Generated_Source\PSoC5/cyPm.c ****     interruptStatus |= CY_PM_INT_SR_REG;
1198:.\Generated_Source\PSoC5/cyPm.c ****     tmpStatus = interruptStatus;
1199:.\Generated_Source\PSoC5/cyPm.c ****     interruptStatus &= ((uint8)(~mask));
1200:.\Generated_Source\PSoC5/cyPm.c **** 
1201:.\Generated_Source\PSoC5/cyPm.c ****     /* Exit critical section */
1202:.\Generated_Source\PSoC5/cyPm.c ****     CyExitCriticalSection(interruptState);
1203:.\Generated_Source\PSoC5/cyPm.c **** 
1204:.\Generated_Source\PSoC5/cyPm.c ****     return(tmpStatus);
1205:.\Generated_Source\PSoC5/cyPm.c **** }
1206:.\Generated_Source\PSoC5/cyPm.c **** 
1207:.\Generated_Source\PSoC5/cyPm.c **** 
1208:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************
1209:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmHibSaveSet
1210:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************
1211:.\Generated_Source\PSoC5/cyPm.c **** *
1212:.\Generated_Source\PSoC5/cyPm.c **** * Summary:
1213:.\Generated_Source\PSoC5/cyPm.c **** *  Prepare device for proper Hibernate low power mode entry:
1214:.\Generated_Source\PSoC5/cyPm.c **** *  - Disables I2C backup regulator
1215:.\Generated_Source\PSoC5/cyPm.c **** *  - Saves ILO power down mode state and enable it
1216:.\Generated_Source\PSoC5/cyPm.c **** *  - Saves state of 1 kHz and 100 kHz ILO and disable them
1217:.\Generated_Source\PSoC5/cyPm.c **** *  - Disables sleep regulator and shorts vccd to vpwrsleep
1218:.\Generated_Source\PSoC5/cyPm.c **** *  - Save LVI/HVI configuration and disable them - CyPmHviLviSaveDisable()
1219:.\Generated_Source\PSoC5/cyPm.c **** *  - CyPmHibSlpSaveSet() function is called
1220:.\Generated_Source\PSoC5/cyPm.c **** *
1221:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:
1222:.\Generated_Source\PSoC5/cyPm.c **** *  None
1223:.\Generated_Source\PSoC5/cyPm.c **** *
1224:.\Generated_Source\PSoC5/cyPm.c **** * Return:
1225:.\Generated_Source\PSoC5/cyPm.c **** *  None
1226:.\Generated_Source\PSoC5/cyPm.c **** *
1227:.\Generated_Source\PSoC5/cyPm.c **** * Reentrant:
1228:.\Generated_Source\PSoC5/cyPm.c **** *  No
1229:.\Generated_Source\PSoC5/cyPm.c **** *
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 23


1230:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/
1231:.\Generated_Source\PSoC5/cyPm.c **** static void CyPmHibSaveSet(void) 
1232:.\Generated_Source\PSoC5/cyPm.c **** {
1233:.\Generated_Source\PSoC5/cyPm.c ****     /* I2C backup reg must be off when the sleep regulator is unavailable */
1234:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_PWRSYS_CR1_REG & CY_PM_PWRSYS_CR1_I2CREG_BACKUP))
1235:.\Generated_Source\PSoC5/cyPm.c ****     {
1236:.\Generated_Source\PSoC5/cyPm.c ****         /***********************************************************************
1237:.\Generated_Source\PSoC5/cyPm.c ****         * If I2C backup regulator is enabled, all the fixed-function registers
1238:.\Generated_Source\PSoC5/cyPm.c ****         * store their values while device is in low power mode, otherwise their
1239:.\Generated_Source\PSoC5/cyPm.c ****         * configuration is lost. The I2C API makes a decision to restore or not
1240:.\Generated_Source\PSoC5/cyPm.c ****         * to restore I2C registers based on this. If this regulator will be
1241:.\Generated_Source\PSoC5/cyPm.c ****         * disabled and then enabled, I2C API will suppose that I2C block
1242:.\Generated_Source\PSoC5/cyPm.c ****         * registers preserved their values, while this is not true. So, the
1243:.\Generated_Source\PSoC5/cyPm.c ****         * backup regulator is disabled. The I2C sleep APIs is responsible for
1244:.\Generated_Source\PSoC5/cyPm.c ****         * restoration.
1245:.\Generated_Source\PSoC5/cyPm.c ****         ***********************************************************************/
1246:.\Generated_Source\PSoC5/cyPm.c **** 
1247:.\Generated_Source\PSoC5/cyPm.c ****         /* Disable I2C backup register */
1248:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_PWRSYS_CR1_REG &= ((uint8)(~CY_PM_PWRSYS_CR1_I2CREG_BACKUP));
1249:.\Generated_Source\PSoC5/cyPm.c ****     }
1250:.\Generated_Source\PSoC5/cyPm.c **** 
1251:.\Generated_Source\PSoC5/cyPm.c **** 
1252:.\Generated_Source\PSoC5/cyPm.c ****     /* Save current ILO power mode and ensure low power mode */
1253:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.iloPowerMode = CyILO_SetPowerMode(CY_PM_POWERDOWN_MODE);
1254:.\Generated_Source\PSoC5/cyPm.c **** 
1255:.\Generated_Source\PSoC5/cyPm.c ****     /* Save current 1kHz ILO enable state. Disabled automatically. */
1256:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.ilo1kEnable = (0u == (CY_PM_SLOWCLK_ILO_CR0_REG & CY_PM_ILO_CR0_EN_1K)) ?
1257:.\Generated_Source\PSoC5/cyPm.c ****                                 CY_PM_DISABLED : CY_PM_ENABLED;
1258:.\Generated_Source\PSoC5/cyPm.c **** 
1259:.\Generated_Source\PSoC5/cyPm.c ****     /* Save current 100kHz ILO enable state. Disabled automatically. */
1260:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.ilo100kEnable = (0u == (CY_PM_SLOWCLK_ILO_CR0_REG & CY_PM_ILO_CR0_EN_100K)) ?
1261:.\Generated_Source\PSoC5/cyPm.c ****                                 CY_PM_DISABLED : CY_PM_ENABLED;
1262:.\Generated_Source\PSoC5/cyPm.c **** 
1263:.\Generated_Source\PSoC5/cyPm.c **** 
1264:.\Generated_Source\PSoC5/cyPm.c ****     /* Disable the sleep regulator and shorts vccd to vpwrsleep */
1265:.\Generated_Source\PSoC5/cyPm.c ****     if(0u == (CY_PM_PWRSYS_SLP_TR_REG & CY_PM_PWRSYS_SLP_TR_BYPASS))
1266:.\Generated_Source\PSoC5/cyPm.c ****     {
1267:.\Generated_Source\PSoC5/cyPm.c ****         /* Save current bypass state */
1268:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.slpTrBypass = CY_PM_DISABLED;
1269:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_PWRSYS_SLP_TR_REG |= CY_PM_PWRSYS_SLP_TR_BYPASS;
1270:.\Generated_Source\PSoC5/cyPm.c ****     }
1271:.\Generated_Source\PSoC5/cyPm.c ****     else
1272:.\Generated_Source\PSoC5/cyPm.c ****     {
1273:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.slpTrBypass = CY_PM_ENABLED;
1274:.\Generated_Source\PSoC5/cyPm.c ****     }
1275:.\Generated_Source\PSoC5/cyPm.c **** 
1276:.\Generated_Source\PSoC5/cyPm.c ****     /* LPCOMPs are always enabled (even when BOTH ext_vccd=1 and ext_vcca=1)*/
1277:.\Generated_Source\PSoC5/cyPm.c **** 
1278:.\Generated_Source\PSoC5/cyPm.c **** 
1279:.\Generated_Source\PSoC5/cyPm.c ****     /***************************************************************************
1280:.\Generated_Source\PSoC5/cyPm.c ****     * LVI/HVI must be disabled in Hibernate
1281:.\Generated_Source\PSoC5/cyPm.c ****     ***************************************************************************/
1282:.\Generated_Source\PSoC5/cyPm.c **** 
1283:.\Generated_Source\PSoC5/cyPm.c ****     /* Save LVI/HVI configuration and disable them */
1284:.\Generated_Source\PSoC5/cyPm.c ****     CyPmHviLviSaveDisable();
1285:.\Generated_Source\PSoC5/cyPm.c **** 
1286:.\Generated_Source\PSoC5/cyPm.c **** 
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 24


1287:.\Generated_Source\PSoC5/cyPm.c ****     /* Make the same preparations for Hibernate and Sleep modes */
1288:.\Generated_Source\PSoC5/cyPm.c ****     CyPmHibSlpSaveSet();
1289:.\Generated_Source\PSoC5/cyPm.c **** 
1290:.\Generated_Source\PSoC5/cyPm.c **** 
1291:.\Generated_Source\PSoC5/cyPm.c ****     /***************************************************************************
1292:.\Generated_Source\PSoC5/cyPm.c ****     * Save and set power mode wakeup trim registers
1293:.\Generated_Source\PSoC5/cyPm.c ****     ***************************************************************************/
1294:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupTrim0 = CY_PM_PWRSYS_WAKE_TR0_REG;
1295:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupTrim1 = CY_PM_PWRSYS_WAKE_TR1_REG;
1296:.\Generated_Source\PSoC5/cyPm.c **** 
1297:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_PWRSYS_WAKE_TR0_REG = CY_PM_PWRSYS_WAKE_TR0;
1298:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_PWRSYS_WAKE_TR1_REG = CY_PM_PWRSYS_WAKE_TR1;
1299:.\Generated_Source\PSoC5/cyPm.c **** }
1300:.\Generated_Source\PSoC5/cyPm.c **** 
1301:.\Generated_Source\PSoC5/cyPm.c **** 
1302:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************
1303:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmHibRestore
1304:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************
1305:.\Generated_Source\PSoC5/cyPm.c **** *
1306:.\Generated_Source\PSoC5/cyPm.c **** * Summary:
1307:.\Generated_Source\PSoC5/cyPm.c **** *  Restore device for proper Hibernate mode exit:
1308:.\Generated_Source\PSoC5/cyPm.c **** *  - Restore LVI/HVI configuration - call CyPmHviLviRestore()
1309:.\Generated_Source\PSoC5/cyPm.c **** *  - CyPmHibSlpSaveRestore() function is called
1310:.\Generated_Source\PSoC5/cyPm.c **** *  - Restores ILO power down mode state and enable it
1311:.\Generated_Source\PSoC5/cyPm.c **** *  - Restores state of 1 kHz and 100 kHz ILO and disable them
1312:.\Generated_Source\PSoC5/cyPm.c **** *  - Restores sleep regulator settings
1313:.\Generated_Source\PSoC5/cyPm.c **** *
1314:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:
1315:.\Generated_Source\PSoC5/cyPm.c **** *  None
1316:.\Generated_Source\PSoC5/cyPm.c **** *
1317:.\Generated_Source\PSoC5/cyPm.c **** * Return:
1318:.\Generated_Source\PSoC5/cyPm.c **** *  None
1319:.\Generated_Source\PSoC5/cyPm.c **** *
1320:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/
1321:.\Generated_Source\PSoC5/cyPm.c **** static void CyPmHibRestore(void) 
1322:.\Generated_Source\PSoC5/cyPm.c **** {
1323:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore LVI/HVI configuration */
1324:.\Generated_Source\PSoC5/cyPm.c ****     CyPmHviLviRestore();
1325:.\Generated_Source\PSoC5/cyPm.c **** 
1326:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore the same configuration for Hibernate and Sleep modes */
1327:.\Generated_Source\PSoC5/cyPm.c ****     CyPmHibSlpRestore();
1328:.\Generated_Source\PSoC5/cyPm.c **** 
1329:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore 1kHz ILO enable state */
1330:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmBackup.ilo1kEnable)
1331:.\Generated_Source\PSoC5/cyPm.c ****     {
1332:.\Generated_Source\PSoC5/cyPm.c ****         /* Enable 1kHz ILO */
1333:.\Generated_Source\PSoC5/cyPm.c ****         CyILO_Start1K();
1334:.\Generated_Source\PSoC5/cyPm.c ****     }
1335:.\Generated_Source\PSoC5/cyPm.c **** 
1336:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore 100kHz ILO enable state */
1337:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmBackup.ilo100kEnable)
1338:.\Generated_Source\PSoC5/cyPm.c ****     {
1339:.\Generated_Source\PSoC5/cyPm.c ****         /* Enable 100kHz ILO */
1340:.\Generated_Source\PSoC5/cyPm.c ****         CyILO_Start100K();
1341:.\Generated_Source\PSoC5/cyPm.c ****     }
1342:.\Generated_Source\PSoC5/cyPm.c **** 
1343:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore ILO power mode */
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 25


1344:.\Generated_Source\PSoC5/cyPm.c ****     (void) CyILO_SetPowerMode(cyPmBackup.iloPowerMode);
1345:.\Generated_Source\PSoC5/cyPm.c **** 
1346:.\Generated_Source\PSoC5/cyPm.c **** 
1347:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_DISABLED == cyPmBackup.slpTrBypass)
1348:.\Generated_Source\PSoC5/cyPm.c ****     {
1349:.\Generated_Source\PSoC5/cyPm.c ****         /* Enable the sleep regulator */
1350:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_PWRSYS_SLP_TR_REG &= ((uint8)(~CY_PM_PWRSYS_SLP_TR_BYPASS));
1351:.\Generated_Source\PSoC5/cyPm.c ****     }
1352:.\Generated_Source\PSoC5/cyPm.c **** 
1353:.\Generated_Source\PSoC5/cyPm.c **** 
1354:.\Generated_Source\PSoC5/cyPm.c ****     /***************************************************************************
1355:.\Generated_Source\PSoC5/cyPm.c ****     * Restore power mode wakeup trim registers
1356:.\Generated_Source\PSoC5/cyPm.c ****     ***************************************************************************/
1357:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_PWRSYS_WAKE_TR0_REG = cyPmBackup.wakeupTrim0;
1358:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_PWRSYS_WAKE_TR1_REG = cyPmBackup.wakeupTrim1;
1359:.\Generated_Source\PSoC5/cyPm.c **** }
1360:.\Generated_Source\PSoC5/cyPm.c **** 
1361:.\Generated_Source\PSoC5/cyPm.c **** 
1362:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************
1363:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmCtwSetInterval
1364:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************
1365:.\Generated_Source\PSoC5/cyPm.c **** *
1366:.\Generated_Source\PSoC5/cyPm.c **** * Summary:
1367:.\Generated_Source\PSoC5/cyPm.c **** *  Performs CTW configuration:
1368:.\Generated_Source\PSoC5/cyPm.c **** *  - Disables CTW interrupt
1369:.\Generated_Source\PSoC5/cyPm.c **** *  - Enables 1 kHz ILO
1370:.\Generated_Source\PSoC5/cyPm.c **** *  - Sets new CTW interval
1371:.\Generated_Source\PSoC5/cyPm.c **** *
1372:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:
1373:.\Generated_Source\PSoC5/cyPm.c **** *  ctwInterval: the CTW interval to be set.
1374:.\Generated_Source\PSoC5/cyPm.c **** *
1375:.\Generated_Source\PSoC5/cyPm.c **** * Return:
1376:.\Generated_Source\PSoC5/cyPm.c **** *  None
1377:.\Generated_Source\PSoC5/cyPm.c **** *
1378:.\Generated_Source\PSoC5/cyPm.c **** * Side Effects:
1379:.\Generated_Source\PSoC5/cyPm.c **** *  Enables ILO 1 KHz clock and leaves it enabled.
1380:.\Generated_Source\PSoC5/cyPm.c **** *
1381:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/
1382:.\Generated_Source\PSoC5/cyPm.c **** void CyPmCtwSetInterval(uint8 ctwInterval) 
1383:.\Generated_Source\PSoC5/cyPm.c **** {
1384:.\Generated_Source\PSoC5/cyPm.c ****     /* Disable CTW interrupt enable */
1385:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_CTW_IE));
1386:.\Generated_Source\PSoC5/cyPm.c **** 
1387:.\Generated_Source\PSoC5/cyPm.c ****     /* Enable 1kHz ILO (required for CTW operation) */
1388:.\Generated_Source\PSoC5/cyPm.c ****     CyILO_Start1K();
1389:.\Generated_Source\PSoC5/cyPm.c **** 
1390:.\Generated_Source\PSoC5/cyPm.c ****     /* Interval could be set only while CTW is disabled */
1391:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_TW_CFG2_REG & CY_PM_CTW_EN))
1392:.\Generated_Source\PSoC5/cyPm.c ****     {
1393:.\Generated_Source\PSoC5/cyPm.c ****         /* Set CTW interval if needed */
1394:.\Generated_Source\PSoC5/cyPm.c ****         if(CY_PM_TW_CFG1_REG != ctwInterval)
1395:.\Generated_Source\PSoC5/cyPm.c ****         {
1396:.\Generated_Source\PSoC5/cyPm.c ****             /* Disable the CTW, set new CTW interval and enable it again */
1397:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_CTW_EN));
1398:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG1_REG = ctwInterval;
1399:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG2_REG |= CY_PM_CTW_EN;
1400:.\Generated_Source\PSoC5/cyPm.c ****         }   /* Required interval is already set */
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 26


1401:.\Generated_Source\PSoC5/cyPm.c ****     }
1402:.\Generated_Source\PSoC5/cyPm.c ****     else
1403:.\Generated_Source\PSoC5/cyPm.c ****     {
1404:.\Generated_Source\PSoC5/cyPm.c ****         /* Set CTW interval if needed */
1405:.\Generated_Source\PSoC5/cyPm.c ****         if(CY_PM_TW_CFG1_REG != ctwInterval)
1406:.\Generated_Source\PSoC5/cyPm.c ****         {
1407:.\Generated_Source\PSoC5/cyPm.c ****             /* Set the new CTW interval. Could be changed if CTW is disabled */
1408:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG1_REG = ctwInterval;
1409:.\Generated_Source\PSoC5/cyPm.c ****         }   /* Required interval is already set */
1410:.\Generated_Source\PSoC5/cyPm.c **** 
1411:.\Generated_Source\PSoC5/cyPm.c ****         /* Enable the CTW */
1412:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_TW_CFG2_REG |= CY_PM_CTW_EN;
1413:.\Generated_Source\PSoC5/cyPm.c ****     }
1414:.\Generated_Source\PSoC5/cyPm.c **** }
1415:.\Generated_Source\PSoC5/cyPm.c **** 
1416:.\Generated_Source\PSoC5/cyPm.c **** 
1417:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************
1418:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmOppsSet
1419:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************
1420:.\Generated_Source\PSoC5/cyPm.c **** *
1421:.\Generated_Source\PSoC5/cyPm.c **** * Summary:
1422:.\Generated_Source\PSoC5/cyPm.c **** *  Performs 1PPS configuration:
1423:.\Generated_Source\PSoC5/cyPm.c **** *  - Starts 32 KHz XTAL
1424:.\Generated_Source\PSoC5/cyPm.c **** *  - Disables 1PPS interupts
1425:.\Generated_Source\PSoC5/cyPm.c **** *  - Enables 1PPS
1426:.\Generated_Source\PSoC5/cyPm.c **** *
1427:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:
1428:.\Generated_Source\PSoC5/cyPm.c **** *  None
1429:.\Generated_Source\PSoC5/cyPm.c **** *
1430:.\Generated_Source\PSoC5/cyPm.c **** * Return:
1431:.\Generated_Source\PSoC5/cyPm.c **** *  None
1432:.\Generated_Source\PSoC5/cyPm.c **** *
1433:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/
1434:.\Generated_Source\PSoC5/cyPm.c **** void CyPmOppsSet(void) 
1435:.\Generated_Source\PSoC5/cyPm.c **** {
1436:.\Generated_Source\PSoC5/cyPm.c ****     /* Enable 32kHz XTAL if needed */
1437:.\Generated_Source\PSoC5/cyPm.c ****     if(0u == (CY_PM_SLOWCLK_X32_CR_REG & CY_PM_X32_CR_X32EN))
1438:.\Generated_Source\PSoC5/cyPm.c ****     {
1439:.\Generated_Source\PSoC5/cyPm.c ****         /* Enable 32kHz XTAL */
1440:.\Generated_Source\PSoC5/cyPm.c ****         CyXTAL_32KHZ_Start();
1441:.\Generated_Source\PSoC5/cyPm.c ****     }
1442:.\Generated_Source\PSoC5/cyPm.c **** 
1443:.\Generated_Source\PSoC5/cyPm.c ****     /* Disable 1PPS interrupt enable */
1444:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_1PPS_IE));
1445:.\Generated_Source\PSoC5/cyPm.c **** 
1446:.\Generated_Source\PSoC5/cyPm.c ****     /* Enable 1PPS operation */
1447:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_TW_CFG2_REG |= CY_PM_1PPS_EN;
1448:.\Generated_Source\PSoC5/cyPm.c **** }
1449:.\Generated_Source\PSoC5/cyPm.c **** 
1450:.\Generated_Source\PSoC5/cyPm.c **** 
1451:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************
1452:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmFtwSetInterval
1453:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************
1454:.\Generated_Source\PSoC5/cyPm.c **** *
1455:.\Generated_Source\PSoC5/cyPm.c **** * Summary:
1456:.\Generated_Source\PSoC5/cyPm.c **** *  Performs FTW configuration:
1457:.\Generated_Source\PSoC5/cyPm.c **** *  - Disables FTW interrupt
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 27


1458:.\Generated_Source\PSoC5/cyPm.c **** *  - Enables 100 kHz ILO
1459:.\Generated_Source\PSoC5/cyPm.c **** *  - Sets new FTW interval.
1460:.\Generated_Source\PSoC5/cyPm.c **** *
1461:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:
1462:.\Generated_Source\PSoC5/cyPm.c **** *  ftwInterval - FTW counter interval.
1463:.\Generated_Source\PSoC5/cyPm.c **** *
1464:.\Generated_Source\PSoC5/cyPm.c **** * Return:
1465:.\Generated_Source\PSoC5/cyPm.c **** *  None
1466:.\Generated_Source\PSoC5/cyPm.c **** *
1467:.\Generated_Source\PSoC5/cyPm.c **** * Side Effects:
1468:.\Generated_Source\PSoC5/cyPm.c **** *  Enables ILO 100 KHz clock and leaves it enabled.
1469:.\Generated_Source\PSoC5/cyPm.c **** *
1470:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/
1471:.\Generated_Source\PSoC5/cyPm.c **** void CyPmFtwSetInterval(uint8 ftwInterval) 
1472:.\Generated_Source\PSoC5/cyPm.c **** {
1473:.\Generated_Source\PSoC5/cyPm.c ****     /* Disable FTW interrupt enable */
1474:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_FTW_IE));
1475:.\Generated_Source\PSoC5/cyPm.c **** 
1476:.\Generated_Source\PSoC5/cyPm.c ****     /* Enable 100kHz ILO */
1477:.\Generated_Source\PSoC5/cyPm.c ****     CyILO_Start100K();
1478:.\Generated_Source\PSoC5/cyPm.c **** 
1479:.\Generated_Source\PSoC5/cyPm.c ****     /* Iterval could be set only while FTW is disabled */
1480:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_TW_CFG2_REG & CY_PM_FTW_EN))
1481:.\Generated_Source\PSoC5/cyPm.c ****     {
1482:.\Generated_Source\PSoC5/cyPm.c ****         /* Disable FTW, set new FTW interval if needed and enable it again */
1483:.\Generated_Source\PSoC5/cyPm.c ****         if(CY_PM_TW_CFG0_REG != ftwInterval)
1484:.\Generated_Source\PSoC5/cyPm.c ****         {
1485:.\Generated_Source\PSoC5/cyPm.c ****             /* Disable the CTW, set new CTW interval and enable it again */
1486:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_FTW_EN));
1487:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG0_REG = ftwInterval;
1488:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG2_REG |= CY_PM_FTW_EN;
1489:.\Generated_Source\PSoC5/cyPm.c ****         }   /* Required interval is already set */
1490:.\Generated_Source\PSoC5/cyPm.c ****     }
1491:.\Generated_Source\PSoC5/cyPm.c ****     else
1492:.\Generated_Source\PSoC5/cyPm.c ****     {
1493:.\Generated_Source\PSoC5/cyPm.c ****         /* Set new FTW counter interval if needed. FTW is disabled. */
1494:.\Generated_Source\PSoC5/cyPm.c ****         if(CY_PM_TW_CFG0_REG != ftwInterval)
1495:.\Generated_Source\PSoC5/cyPm.c ****         {
1496:.\Generated_Source\PSoC5/cyPm.c ****             /* Set the new CTW interval. Could be changed if CTW is disabled */
1497:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG0_REG = ftwInterval;
1498:.\Generated_Source\PSoC5/cyPm.c ****         }   /* Required interval is already set */
1499:.\Generated_Source\PSoC5/cyPm.c **** 
1500:.\Generated_Source\PSoC5/cyPm.c ****         /* Enable the FTW */
1501:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_TW_CFG2_REG |= CY_PM_FTW_EN;
1502:.\Generated_Source\PSoC5/cyPm.c ****     }
1503:.\Generated_Source\PSoC5/cyPm.c **** }
1504:.\Generated_Source\PSoC5/cyPm.c **** 
1505:.\Generated_Source\PSoC5/cyPm.c **** 
1506:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************
1507:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmHibSlpSaveSet
1508:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************
1509:.\Generated_Source\PSoC5/cyPm.c **** *
1510:.\Generated_Source\PSoC5/cyPm.c **** * Summary:
1511:.\Generated_Source\PSoC5/cyPm.c **** *  This API is used for preparing device for Sleep and Hibernate low power
1512:.\Generated_Source\PSoC5/cyPm.c **** *  modes entry:
1513:.\Generated_Source\PSoC5/cyPm.c **** *  - Saves COMP, VIDAC, DSM and SAR routing connections (PSoC 5)
1514:.\Generated_Source\PSoC5/cyPm.c **** *  - Saves SC/CT routing connections (PSoC 3/5/5LP)
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 28


1515:.\Generated_Source\PSoC5/cyPm.c **** *  - Disables Serial Wire Viewer (SWV) (PSoC 3)
1516:.\Generated_Source\PSoC5/cyPm.c **** *  - Save boost reference selection and set it to internal
1517:.\Generated_Source\PSoC5/cyPm.c **** *
1518:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:
1519:.\Generated_Source\PSoC5/cyPm.c **** *  None
1520:.\Generated_Source\PSoC5/cyPm.c **** *
1521:.\Generated_Source\PSoC5/cyPm.c **** * Return:
1522:.\Generated_Source\PSoC5/cyPm.c **** *  None
1523:.\Generated_Source\PSoC5/cyPm.c **** *
1524:.\Generated_Source\PSoC5/cyPm.c **** * Reentrant:
1525:.\Generated_Source\PSoC5/cyPm.c **** *  No
1526:.\Generated_Source\PSoC5/cyPm.c **** *
1527:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/
1528:.\Generated_Source\PSoC5/cyPm.c **** static void CyPmHibSlpSaveSet(void) 
1529:.\Generated_Source\PSoC5/cyPm.c **** {
  26              		.loc 1 1529 0
  27              		.cfi_startproc
  28              		@ args = 0, pretend = 0, frame = 0
  29              		@ frame_needed = 0, uses_anonymous_args = 0
  30 0000 2DE9F04F 		push	{r4, r5, r6, r7, r8, r9, sl, fp, lr}
  31              	.LCFI0:
  32              		.cfi_def_cfa_offset 36
  33              		.cfi_offset 4, -36
  34              		.cfi_offset 5, -32
  35              		.cfi_offset 6, -28
  36              		.cfi_offset 7, -24
  37              		.cfi_offset 8, -20
  38              		.cfi_offset 9, -16
  39              		.cfi_offset 10, -12
  40              		.cfi_offset 11, -8
  41              		.cfi_offset 14, -4
1530:.\Generated_Source\PSoC5/cyPm.c ****     /* Save SC/CT routing registers */
1531:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[0u]   = CY_GET_REG8(CYREG_SC0_SW0 );
  42              		.loc 1 1531 0
  43 0004 DFF848B1 		ldr	fp, .L5+32
  44 0008 494B     		ldr	r3, .L5
  45 000a 9BF80020 		ldrb	r2, [fp, #0]	@ zero_extendqisi2
1532:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[1u]   = CY_GET_REG8(CYREG_SC0_SW2 );
  46              		.loc 1 1532 0
  47 000e 4949     		ldr	r1, .L5+4
1531:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[0u]   = CY_GET_REG8(CYREG_SC0_SW0 );
  48              		.loc 1 1531 0
  49 0010 5A72     		strb	r2, [r3, #9]
  50              		.loc 1 1532 0
  51 0012 0878     		ldrb	r0, [r1, #0]	@ zero_extendqisi2
1533:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[2u]   = CY_GET_REG8(CYREG_SC0_SW3 );
  52              		.loc 1 1533 0
  53 0014 484F     		ldr	r7, .L5+8
1532:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[1u]   = CY_GET_REG8(CYREG_SC0_SW2 );
  54              		.loc 1 1532 0
  55 0016 9872     		strb	r0, [r3, #10]
  56              		.loc 1 1533 0
  57 0018 3C78     		ldrb	r4, [r7, #0]	@ zero_extendqisi2
1534:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[3u]   = CY_GET_REG8(CYREG_SC0_SW4 );
1535:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[4u]   = CY_GET_REG8(CYREG_SC0_SW6 );
1536:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[5u]   = CY_GET_REG8(CYREG_SC0_SW8 );
1537:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[6u]   = CY_GET_REG8(CYREG_SC0_SW10);
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 29


1538:.\Generated_Source\PSoC5/cyPm.c **** 
1539:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[7u]   = CY_GET_REG8(CYREG_SC1_SW0 );
1540:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[8u]   = CY_GET_REG8(CYREG_SC1_SW2 );
1541:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[9u]   = CY_GET_REG8(CYREG_SC1_SW3 );
1542:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[10u]  = CY_GET_REG8(CYREG_SC1_SW4 );
1543:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[11u]  = CY_GET_REG8(CYREG_SC1_SW6 );
1544:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[12u]  = CY_GET_REG8(CYREG_SC1_SW8 );
1545:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[13u]  = CY_GET_REG8(CYREG_SC1_SW10);
1546:.\Generated_Source\PSoC5/cyPm.c **** 
1547:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[14u]  = CY_GET_REG8(CYREG_SC2_SW0 );
1548:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[15u]  = CY_GET_REG8(CYREG_SC2_SW2 );
1549:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[16u]  = CY_GET_REG8(CYREG_SC2_SW3 );
1550:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[17u]  = CY_GET_REG8(CYREG_SC2_SW4 );
1551:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[18u]  = CY_GET_REG8(CYREG_SC2_SW6 );
  58              		.loc 1 1551 0
  59 001a DFF838A1 		ldr	sl, .L5+36
1533:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[2u]   = CY_GET_REG8(CYREG_SC0_SW3 );
  60              		.loc 1 1533 0
  61 001e DC72     		strb	r4, [r3, #11]
1534:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[3u]   = CY_GET_REG8(CYREG_SC0_SW4 );
  62              		.loc 1 1534 0
  63 0020 8D78     		ldrb	r5, [r1, #2]	@ zero_extendqisi2
1552:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[19u]  = CY_GET_REG8(CYREG_SC2_SW8 );
  64              		.loc 1 1552 0
  65 0022 DFF83491 		ldr	r9, .L5+40
1534:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[3u]   = CY_GET_REG8(CYREG_SC0_SW4 );
  66              		.loc 1 1534 0
  67 0026 1D73     		strb	r5, [r3, #12]
1535:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[4u]   = CY_GET_REG8(CYREG_SC0_SW6 );
  68              		.loc 1 1535 0
  69 0028 FE78     		ldrb	r6, [r7, #3]	@ zero_extendqisi2
1553:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[20u]  = CY_GET_REG8(CYREG_SC2_SW10);
  70              		.loc 1 1553 0
  71 002a DFF83081 		ldr	r8, .L5+44
1535:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[4u]   = CY_GET_REG8(CYREG_SC0_SW6 );
  72              		.loc 1 1535 0
  73 002e 5E73     		strb	r6, [r3, #13]
1536:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[5u]   = CY_GET_REG8(CYREG_SC0_SW8 );
  74              		.loc 1 1536 0
  75 0030 8A79     		ldrb	r2, [r1, #6]	@ zero_extendqisi2
1554:.\Generated_Source\PSoC5/cyPm.c **** 
1555:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[21u]  = CY_GET_REG8(CYREG_SC3_SW0 );
  76              		.loc 1 1555 0
  77 0032 DFF82CC1 		ldr	ip, .L5+48
1536:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[5u]   = CY_GET_REG8(CYREG_SC0_SW8 );
  78              		.loc 1 1536 0
  79 0036 9A73     		strb	r2, [r3, #14]
1537:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[6u]   = CY_GET_REG8(CYREG_SC0_SW10);
  80              		.loc 1 1537 0
  81 0038 F879     		ldrb	r0, [r7, #7]	@ zero_extendqisi2
  82 003a D873     		strb	r0, [r3, #15]
1539:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[7u]   = CY_GET_REG8(CYREG_SC1_SW0 );
  83              		.loc 1 1539 0
  84 003c 8C7B     		ldrb	r4, [r1, #14]	@ zero_extendqisi2
  85 003e 1C74     		strb	r4, [r3, #16]
1540:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[8u]   = CY_GET_REG8(CYREG_SC1_SW2 );
  86              		.loc 1 1540 0
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 30


  87 0040 FD7B     		ldrb	r5, [r7, #15]	@ zero_extendqisi2
  88 0042 5D74     		strb	r5, [r3, #17]
1541:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[9u]   = CY_GET_REG8(CYREG_SC1_SW3 );
  89              		.loc 1 1541 0
  90 0044 4E7C     		ldrb	r6, [r1, #17]	@ zero_extendqisi2
  91 0046 9E74     		strb	r6, [r3, #18]
1542:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[10u]  = CY_GET_REG8(CYREG_SC1_SW4 );
  92              		.loc 1 1542 0
  93 0048 7A7C     		ldrb	r2, [r7, #17]	@ zero_extendqisi2
  94 004a DA74     		strb	r2, [r3, #19]
1543:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[11u]  = CY_GET_REG8(CYREG_SC1_SW6 );
  95              		.loc 1 1543 0
  96 004c 087D     		ldrb	r0, [r1, #20]	@ zero_extendqisi2
  97 004e 1875     		strb	r0, [r3, #20]
1544:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[12u]  = CY_GET_REG8(CYREG_SC1_SW8 );
  98              		.loc 1 1544 0
  99 0050 7C7D     		ldrb	r4, [r7, #21]	@ zero_extendqisi2
 100 0052 5C75     		strb	r4, [r3, #21]
1545:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[13u]  = CY_GET_REG8(CYREG_SC1_SW10);
 101              		.loc 1 1545 0
 102 0054 0D7E     		ldrb	r5, [r1, #24]	@ zero_extendqisi2
 103 0056 9D75     		strb	r5, [r3, #22]
1547:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[14u]  = CY_GET_REG8(CYREG_SC2_SW0 );
 104              		.loc 1 1547 0
 105 0058 7E7F     		ldrb	r6, [r7, #29]	@ zero_extendqisi2
 106 005a DE75     		strb	r6, [r3, #23]
1548:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[15u]  = CY_GET_REG8(CYREG_SC2_SW2 );
 107              		.loc 1 1548 0
 108 005c 91F82020 		ldrb	r2, [r1, #32]	@ zero_extendqisi2
 109 0060 1A76     		strb	r2, [r3, #24]
1549:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[16u]  = CY_GET_REG8(CYREG_SC2_SW3 );
 110              		.loc 1 1549 0
 111 0062 97F82000 		ldrb	r0, [r7, #32]	@ zero_extendqisi2
 112 0066 5876     		strb	r0, [r3, #25]
1550:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[17u]  = CY_GET_REG8(CYREG_SC2_SW4 );
 113              		.loc 1 1550 0
 114 0068 91F82240 		ldrb	r4, [r1, #34]	@ zero_extendqisi2
 115 006c 9C76     		strb	r4, [r3, #26]
1551:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[18u]  = CY_GET_REG8(CYREG_SC2_SW6 );
 116              		.loc 1 1551 0
 117 006e 9AF80050 		ldrb	r5, [sl, #0]	@ zero_extendqisi2
 118 0072 DD76     		strb	r5, [r3, #27]
1552:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[19u]  = CY_GET_REG8(CYREG_SC2_SW8 );
 119              		.loc 1 1552 0
 120 0074 99F80060 		ldrb	r6, [r9, #0]	@ zero_extendqisi2
 121 0078 1E77     		strb	r6, [r3, #28]
1553:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[20u]  = CY_GET_REG8(CYREG_SC2_SW10);
 122              		.loc 1 1553 0
 123 007a 98F80020 		ldrb	r2, [r8, #0]	@ zero_extendqisi2
1556:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[22u]  = CY_GET_REG8(CYREG_SC3_SW2 );
1557:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[23u]  = CY_GET_REG8(CYREG_SC3_SW3 );
 124              		.loc 1 1557 0
 125 007e 2F4E     		ldr	r6, .L5+12
1553:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[20u]  = CY_GET_REG8(CYREG_SC2_SW10);
 126              		.loc 1 1553 0
 127 0080 5A77     		strb	r2, [r3, #29]
1555:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[21u]  = CY_GET_REG8(CYREG_SC3_SW0 );
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 31


 128              		.loc 1 1555 0
 129 0082 9CF80000 		ldrb	r0, [ip, #0]	@ zero_extendqisi2
 130 0086 9877     		strb	r0, [r3, #30]
1556:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[22u]  = CY_GET_REG8(CYREG_SC3_SW2 );
 131              		.loc 1 1556 0
 132 0088 97F82F40 		ldrb	r4, [r7, #47]	@ zero_extendqisi2
 133 008c DC77     		strb	r4, [r3, #31]
 134              		.loc 1 1557 0
 135 008e 3578     		ldrb	r5, [r6, #0]	@ zero_extendqisi2
1558:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[24u]  = CY_GET_REG8(CYREG_SC3_SW4 );
1559:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[25u]  = CY_GET_REG8(CYREG_SC3_SW6 );
 136              		.loc 1 1559 0
 137 0090 2B4C     		ldr	r4, .L5+16
1557:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[23u]  = CY_GET_REG8(CYREG_SC3_SW3 );
 138              		.loc 1 1557 0
 139 0092 83F82050 		strb	r5, [r3, #32]
1558:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[24u]  = CY_GET_REG8(CYREG_SC3_SW4 );
 140              		.loc 1 1558 0
 141 0096 2B4D     		ldr	r5, .L5+20
 142 0098 2A78     		ldrb	r2, [r5, #0]	@ zero_extendqisi2
 143 009a 83F82120 		strb	r2, [r3, #33]
 144              		.loc 1 1559 0
 145 009e 2078     		ldrb	r0, [r4, #0]	@ zero_extendqisi2
 146 00a0 83F82200 		strb	r0, [r3, #34]
1560:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[26u]  = CY_GET_REG8(CYREG_SC3_SW8 );
 147              		.loc 1 1560 0
 148 00a4 2848     		ldr	r0, .L5+24
 149 00a6 0278     		ldrb	r2, [r0, #0]	@ zero_extendqisi2
 150 00a8 83F82320 		strb	r2, [r3, #35]
1561:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[27u]  = CY_GET_REG8(CYREG_SC3_SW10);
 151              		.loc 1 1561 0
 152 00ac 91F83820 		ldrb	r2, [r1, #56]	@ zero_extendqisi2
 153 00b0 83F82420 		strb	r2, [r3, #36]
1562:.\Generated_Source\PSoC5/cyPm.c **** 
1563:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW0 , 0u);
 154              		.loc 1 1563 0
 155 00b4 0022     		movs	r2, #0
 156 00b6 8BF80020 		strb	r2, [fp, #0]
1564:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW2 , 0u);
 157              		.loc 1 1564 0
 158 00ba 07F8012C 		strb	r2, [r7, #-1]
1535:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[4u]   = CY_GET_REG8(CYREG_SC0_SW6 );
 159              		.loc 1 1535 0
 160 00be 0337     		adds	r7, r7, #3
1565:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW3 , 0u);
 161              		.loc 1 1565 0
 162 00c0 07F8032C 		strb	r2, [r7, #-3]
1564:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW2 , 0u);
 163              		.loc 1 1564 0
 164 00c4 043F     		subs	r7, r7, #4
1566:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW4 , 0u);
 165              		.loc 1 1566 0
 166 00c6 0237     		adds	r7, r7, #2
 167 00c8 3A70     		strb	r2, [r7, #0]
1567:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW6 , 0u);
 168              		.loc 1 1567 0
 169 00ca BA70     		strb	r2, [r7, #2]
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 32


1568:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW8 , 0u);
 170              		.loc 1 1568 0
 171 00cc 3A71     		strb	r2, [r7, #4]
1569:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW10, 0u);
 172              		.loc 1 1569 0
 173 00ce BA71     		strb	r2, [r7, #6]
1570:.\Generated_Source\PSoC5/cyPm.c **** 
1571:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW0 , 0u);
 174              		.loc 1 1571 0
 175 00d0 3A73     		strb	r2, [r7, #12]
1572:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW2 , 0u);
 176              		.loc 1 1572 0
 177 00d2 BA73     		strb	r2, [r7, #14]
1573:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW3 , 0u);
 178              		.loc 1 1573 0
 179 00d4 FA73     		strb	r2, [r7, #15]
1574:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW4 , 0u);
 180              		.loc 1 1574 0
 181 00d6 3A74     		strb	r2, [r7, #16]
1575:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW6 , 0u);
 182              		.loc 1 1575 0
 183 00d8 BA74     		strb	r2, [r7, #18]
1576:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW8 , 0u);
 184              		.loc 1 1576 0
 185 00da 3A75     		strb	r2, [r7, #20]
1577:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW10, 0u);
 186              		.loc 1 1577 0
 187 00dc BA75     		strb	r2, [r7, #22]
1578:.\Generated_Source\PSoC5/cyPm.c **** 
1579:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW0 , 0u);
 188              		.loc 1 1579 0
 189 00de 3A77     		strb	r2, [r7, #28]
1580:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW2 , 0u);
 190              		.loc 1 1580 0
 191 00e0 BA77     		strb	r2, [r7, #30]
1581:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW3 , 0u);
 192              		.loc 1 1581 0
 193 00e2 FA77     		strb	r2, [r7, #31]
1582:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW4 , 0u);
 194              		.loc 1 1582 0
 195 00e4 87F82020 		strb	r2, [r7, #32]
1583:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW6 , 0u);
 196              		.loc 1 1583 0
 197 00e8 8AF80020 		strb	r2, [sl, #0]
1584:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW8 , 0u);
 198              		.loc 1 1584 0
 199 00ec 89F80020 		strb	r2, [r9, #0]
1585:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW10, 0u);
 200              		.loc 1 1585 0
 201 00f0 88F80020 		strb	r2, [r8, #0]
1586:.\Generated_Source\PSoC5/cyPm.c **** 
1587:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW0 , 0u);
 202              		.loc 1 1587 0
 203 00f4 8CF80020 		strb	r2, [ip, #0]
1588:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW2 , 0u);
 204              		.loc 1 1588 0
 205 00f8 87F82E20 		strb	r2, [r7, #46]
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 33


1589:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW3 , 0u);
 206              		.loc 1 1589 0
 207 00fc 3270     		strb	r2, [r6, #0]
1590:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW4 , 0u);
 208              		.loc 1 1590 0
 209 00fe 2A70     		strb	r2, [r5, #0]
1591:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW6 , 0u);
 210              		.loc 1 1591 0
 211 0100 2270     		strb	r2, [r4, #0]
1592:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW8 , 0u);
 212              		.loc 1 1592 0
 213 0102 0270     		strb	r2, [r0, #0]
1593:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW10, 0u);
1594:.\Generated_Source\PSoC5/cyPm.c **** 
1595:.\Generated_Source\PSoC5/cyPm.c **** 
1596:.\Generated_Source\PSoC5/cyPm.c ****     #if(CY_PSOC3)
1597:.\Generated_Source\PSoC5/cyPm.c **** 
1598:.\Generated_Source\PSoC5/cyPm.c ****         /* Serial Wire Viewer (SWV) workaround */
1599:.\Generated_Source\PSoC5/cyPm.c **** 
1600:.\Generated_Source\PSoC5/cyPm.c ****         /* Disable SWV before entering low power mode */
1601:.\Generated_Source\PSoC5/cyPm.c ****         if(0u != (CY_PM_MLOGIC_DBG_REG & CY_PM_MLOGIC_DBG_SWV_CLK_EN))
1602:.\Generated_Source\PSoC5/cyPm.c ****         {
1603:.\Generated_Source\PSoC5/cyPm.c ****             /* Save SWV clock enabled state */
1604:.\Generated_Source\PSoC5/cyPm.c ****             cyPmBackup.swvClkEnabled = CY_PM_ENABLED;
1605:.\Generated_Source\PSoC5/cyPm.c **** 
1606:.\Generated_Source\PSoC5/cyPm.c ****             /* Save current ports drive mode settings */
1607:.\Generated_Source\PSoC5/cyPm.c ****             cyPmBackup.prt1Dm = CY_PM_PRT1_PC3_REG & ((uint8)(~CY_PM_PRT1_PC3_DM_MASK));
1608:.\Generated_Source\PSoC5/cyPm.c **** 
1609:.\Generated_Source\PSoC5/cyPm.c ****             /* Set drive mode to strong output */
1610:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_PRT1_PC3_REG = (CY_PM_PRT1_PC3_REG & CY_PM_PRT1_PC3_DM_MASK) |
1611:.\Generated_Source\PSoC5/cyPm.c ****                                 CY_PM_PRT1_PC3_DM_STRONG;
1612:.\Generated_Source\PSoC5/cyPm.c **** 
1613:.\Generated_Source\PSoC5/cyPm.c ****             /* Disable SWV clocks */
1614:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_MLOGIC_DBG_REG &= ((uint8)(~CY_PM_MLOGIC_DBG_SWV_CLK_EN));
1615:.\Generated_Source\PSoC5/cyPm.c ****         }
1616:.\Generated_Source\PSoC5/cyPm.c ****         else
1617:.\Generated_Source\PSoC5/cyPm.c ****         {
1618:.\Generated_Source\PSoC5/cyPm.c ****             /* Save SWV clock disabled state */
1619:.\Generated_Source\PSoC5/cyPm.c ****             cyPmBackup.swvClkEnabled = CY_PM_DISABLED;
1620:.\Generated_Source\PSoC5/cyPm.c ****         }
1621:.\Generated_Source\PSoC5/cyPm.c **** 
1622:.\Generated_Source\PSoC5/cyPm.c ****     #endif  /* (CY_PSOC3) */
1623:.\Generated_Source\PSoC5/cyPm.c **** 
1624:.\Generated_Source\PSoC5/cyPm.c **** 
1625:.\Generated_Source\PSoC5/cyPm.c ****     /***************************************************************************
1626:.\Generated_Source\PSoC5/cyPm.c ****     * Save boost reference and set it to boost's internal by clearing the bit.
1627:.\Generated_Source\PSoC5/cyPm.c ****     * External (chip bandgap) reference is not available in Sleep and Hibernate.
1628:.\Generated_Source\PSoC5/cyPm.c ****     ***************************************************************************/
1629:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_BOOST_CR2_REG & CY_PM_BOOST_CR2_EREFSEL_EXT))
 214              		.loc 1 1629 0
 215 0104 1148     		ldr	r0, .L5+28
1593:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW10, 0u);
 216              		.loc 1 1593 0
 217 0106 81F83820 		strb	r2, [r1, #56]
 218              		.loc 1 1629 0
 219 010a 0178     		ldrb	r1, [r0, #0]	@ zero_extendqisi2
1588:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW2 , 0u);
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 34


 220              		.loc 1 1588 0
 221 010c 2E37     		adds	r7, r7, #46
 222              		.loc 1 1629 0
 223 010e 11F00802 		ands	r2, r1, #8
 224 0112 08D0     		beq	.L2
1630:.\Generated_Source\PSoC5/cyPm.c ****     {
1631:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.boostRefExt = CY_PM_ENABLED;
 225              		.loc 1 1631 0
 226 0114 0121     		movs	r1, #1
 227 0116 83F82E10 		strb	r1, [r3, #46]
1632:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_BOOST_CR2_REG &= ((uint8)(~CY_PM_BOOST_CR2_EREFSEL_EXT));
 228              		.loc 1 1632 0
 229 011a 0378     		ldrb	r3, [r0, #0]	@ zero_extendqisi2
 230 011c 03F0F702 		and	r2, r3, #247
 231 0120 0270     		strb	r2, [r0, #0]
 232 0122 BDE8F08F 		pop	{r4, r5, r6, r7, r8, r9, sl, fp, pc}
 233              	.L2:
1633:.\Generated_Source\PSoC5/cyPm.c ****     }
1634:.\Generated_Source\PSoC5/cyPm.c ****     else
1635:.\Generated_Source\PSoC5/cyPm.c ****     {
1636:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.boostRefExt = CY_PM_DISABLED;
 234              		.loc 1 1636 0
 235 0126 83F82E20 		strb	r2, [r3, #46]
 236 012a BDE8F08F 		pop	{r4, r5, r6, r7, r8, r9, sl, fp, pc}
 237              	.L6:
 238 012e 00BF     		.align	2
 239              	.L5:
 240 0130 00000000 		.word	.LANCHOR0
 241 0134 025A0040 		.word	1073764866
 242 0138 035A0040 		.word	1073764867
 243 013c 335A0040 		.word	1073764915
 244 0140 365A0040 		.word	1073764918
 245 0144 345A0040 		.word	1073764916
 246 0148 385A0040 		.word	1073764920
 247 014c 22430040 		.word	1073759010
 248 0150 005A0040 		.word	1073764864
 249 0154 265A0040 		.word	1073764902
 250 0158 285A0040 		.word	1073764904
 251 015c 2A5A0040 		.word	1073764906
 252 0160 305A0040 		.word	1073764912
 253              		.cfi_endproc
 254              	.LFE11:
 255              		.size	CyPmHibSlpSaveSet, .-CyPmHibSlpSaveSet
 256              		.section	.text.CyPmHibSlpRestore,"ax",%progbits
 257              		.align	1
 258              		.thumb
 259              		.thumb_func
 260              		.type	CyPmHibSlpRestore, %function
 261              	CyPmHibSlpRestore:
 262              	.LFB12:
1637:.\Generated_Source\PSoC5/cyPm.c ****     }
1638:.\Generated_Source\PSoC5/cyPm.c **** }
1639:.\Generated_Source\PSoC5/cyPm.c **** 
1640:.\Generated_Source\PSoC5/cyPm.c **** 
1641:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************
1642:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmHibSlpRestore
1643:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 35


1644:.\Generated_Source\PSoC5/cyPm.c **** *
1645:.\Generated_Source\PSoC5/cyPm.c **** * Summary:
1646:.\Generated_Source\PSoC5/cyPm.c **** *  This API is used for restoring device configurations after wakeup from Sleep
1647:.\Generated_Source\PSoC5/cyPm.c **** *  and Hibernate low power modes:
1648:.\Generated_Source\PSoC5/cyPm.c **** *  - Restores SC/CT routing connections
1649:.\Generated_Source\PSoC5/cyPm.c **** *  - Restores enable state of Serial Wire Viewer (SWV) (PSoC 3)
1650:.\Generated_Source\PSoC5/cyPm.c **** *  - Restore boost reference selection
1651:.\Generated_Source\PSoC5/cyPm.c **** *
1652:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:
1653:.\Generated_Source\PSoC5/cyPm.c **** *  None
1654:.\Generated_Source\PSoC5/cyPm.c **** *
1655:.\Generated_Source\PSoC5/cyPm.c **** * Return:
1656:.\Generated_Source\PSoC5/cyPm.c **** *  None
1657:.\Generated_Source\PSoC5/cyPm.c **** *
1658:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/
1659:.\Generated_Source\PSoC5/cyPm.c **** static void CyPmHibSlpRestore(void) 
1660:.\Generated_Source\PSoC5/cyPm.c **** {
 263              		.loc 1 1660 0
 264              		.cfi_startproc
 265              		@ args = 0, pretend = 0, frame = 0
 266              		@ frame_needed = 0, uses_anonymous_args = 0
 267              		@ link register save eliminated.
1661:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore SC/CT routing registers */
1662:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW0 , cyPmBackup.scctData[0u] );
 268              		.loc 1 1662 0
 269 0000 254B     		ldr	r3, .L9
 270 0002 264A     		ldr	r2, .L9+4
 271 0004 597A     		ldrb	r1, [r3, #9]	@ zero_extendqisi2
 272 0006 1170     		strb	r1, [r2, #0]
1663:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW2 , cyPmBackup.scctData[1u] );
 273              		.loc 1 1663 0
 274 0008 987A     		ldrb	r0, [r3, #10]	@ zero_extendqisi2
 275 000a 9070     		strb	r0, [r2, #2]
1664:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW3 , cyPmBackup.scctData[2u] );
 276              		.loc 1 1664 0
 277 000c D97A     		ldrb	r1, [r3, #11]	@ zero_extendqisi2
 278 000e D170     		strb	r1, [r2, #3]
1665:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW4 , cyPmBackup.scctData[3u] );
 279              		.loc 1 1665 0
 280 0010 187B     		ldrb	r0, [r3, #12]	@ zero_extendqisi2
 281 0012 1071     		strb	r0, [r2, #4]
1666:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW6 , cyPmBackup.scctData[4u] );
 282              		.loc 1 1666 0
 283 0014 597B     		ldrb	r1, [r3, #13]	@ zero_extendqisi2
 284 0016 9171     		strb	r1, [r2, #6]
1667:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW8 , cyPmBackup.scctData[5u] );
 285              		.loc 1 1667 0
 286 0018 987B     		ldrb	r0, [r3, #14]	@ zero_extendqisi2
 287 001a 1072     		strb	r0, [r2, #8]
1668:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW10, cyPmBackup.scctData[6u] );
 288              		.loc 1 1668 0
 289 001c D97B     		ldrb	r1, [r3, #15]	@ zero_extendqisi2
 290 001e 9172     		strb	r1, [r2, #10]
1669:.\Generated_Source\PSoC5/cyPm.c **** 
1670:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW0 , cyPmBackup.scctData[7u] );
 291              		.loc 1 1670 0
 292 0020 187C     		ldrb	r0, [r3, #16]	@ zero_extendqisi2
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 36


 293 0022 1074     		strb	r0, [r2, #16]
1671:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW2 , cyPmBackup.scctData[8u] );
 294              		.loc 1 1671 0
 295 0024 597C     		ldrb	r1, [r3, #17]	@ zero_extendqisi2
 296 0026 9174     		strb	r1, [r2, #18]
1672:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW3 , cyPmBackup.scctData[9u] );
 297              		.loc 1 1672 0
 298 0028 987C     		ldrb	r0, [r3, #18]	@ zero_extendqisi2
 299 002a D074     		strb	r0, [r2, #19]
1673:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW4 , cyPmBackup.scctData[10u]);
 300              		.loc 1 1673 0
 301 002c D97C     		ldrb	r1, [r3, #19]	@ zero_extendqisi2
 302 002e 1175     		strb	r1, [r2, #20]
1674:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW6 , cyPmBackup.scctData[11u]);
 303              		.loc 1 1674 0
 304 0030 187D     		ldrb	r0, [r3, #20]	@ zero_extendqisi2
 305 0032 9075     		strb	r0, [r2, #22]
1675:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW8 , cyPmBackup.scctData[12u]);
 306              		.loc 1 1675 0
 307 0034 597D     		ldrb	r1, [r3, #21]	@ zero_extendqisi2
 308 0036 1832     		adds	r2, r2, #24
 309 0038 1170     		strb	r1, [r2, #0]
1676:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW10, cyPmBackup.scctData[13u]);
 310              		.loc 1 1676 0
 311 003a 987D     		ldrb	r0, [r3, #22]	@ zero_extendqisi2
 312 003c 9070     		strb	r0, [r2, #2]
1677:.\Generated_Source\PSoC5/cyPm.c **** 
1678:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW0 , cyPmBackup.scctData[14u]);
 313              		.loc 1 1678 0
 314 003e D97D     		ldrb	r1, [r3, #23]	@ zero_extendqisi2
 315 0040 1172     		strb	r1, [r2, #8]
1679:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW2 , cyPmBackup.scctData[15u]);
 316              		.loc 1 1679 0
 317 0042 187E     		ldrb	r0, [r3, #24]	@ zero_extendqisi2
 318 0044 9072     		strb	r0, [r2, #10]
1680:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW3 , cyPmBackup.scctData[16u]);
 319              		.loc 1 1680 0
 320 0046 597E     		ldrb	r1, [r3, #25]	@ zero_extendqisi2
 321 0048 D172     		strb	r1, [r2, #11]
1681:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW4 , cyPmBackup.scctData[17u]);
 322              		.loc 1 1681 0
 323 004a 987E     		ldrb	r0, [r3, #26]	@ zero_extendqisi2
 324 004c 1073     		strb	r0, [r2, #12]
1682:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW6 , cyPmBackup.scctData[18u]);
 325              		.loc 1 1682 0
 326 004e D97E     		ldrb	r1, [r3, #27]	@ zero_extendqisi2
 327 0050 9173     		strb	r1, [r2, #14]
1683:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW8 , cyPmBackup.scctData[19u]);
 328              		.loc 1 1683 0
 329 0052 187F     		ldrb	r0, [r3, #28]	@ zero_extendqisi2
 330 0054 1074     		strb	r0, [r2, #16]
1684:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW10, cyPmBackup.scctData[20u]);
 331              		.loc 1 1684 0
 332 0056 597F     		ldrb	r1, [r3, #29]	@ zero_extendqisi2
 333 0058 9174     		strb	r1, [r2, #18]
1685:.\Generated_Source\PSoC5/cyPm.c **** 
1686:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW0 , cyPmBackup.scctData[21u]);
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 37


 334              		.loc 1 1686 0
 335 005a 987F     		ldrb	r0, [r3, #30]	@ zero_extendqisi2
 336 005c 1076     		strb	r0, [r2, #24]
1687:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW2 , cyPmBackup.scctData[22u]);
 337              		.loc 1 1687 0
 338 005e D97F     		ldrb	r1, [r3, #31]	@ zero_extendqisi2
 339 0060 9176     		strb	r1, [r2, #26]
1688:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW3 , cyPmBackup.scctData[23u]);
 340              		.loc 1 1688 0
 341 0062 93F82000 		ldrb	r0, [r3, #32]	@ zero_extendqisi2
 342 0066 D076     		strb	r0, [r2, #27]
1689:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW4 , cyPmBackup.scctData[24u]);
 343              		.loc 1 1689 0
 344 0068 93F82110 		ldrb	r1, [r3, #33]	@ zero_extendqisi2
 345 006c 1177     		strb	r1, [r2, #28]
1690:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW6 , cyPmBackup.scctData[25u]);
 346              		.loc 1 1690 0
 347 006e 93F82200 		ldrb	r0, [r3, #34]	@ zero_extendqisi2
 348 0072 9077     		strb	r0, [r2, #30]
1691:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW8 , cyPmBackup.scctData[26u]);
 349              		.loc 1 1691 0
 350 0074 93F82310 		ldrb	r1, [r3, #35]	@ zero_extendqisi2
 351 0078 82F82010 		strb	r1, [r2, #32]
1692:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW10, cyPmBackup.scctData[27u]);
 352              		.loc 1 1692 0
 353 007c 93F82400 		ldrb	r0, [r3, #36]	@ zero_extendqisi2
 354 0080 82F82200 		strb	r0, [r2, #34]
1693:.\Generated_Source\PSoC5/cyPm.c **** 
1694:.\Generated_Source\PSoC5/cyPm.c **** 
1695:.\Generated_Source\PSoC5/cyPm.c ****     #if(CY_PSOC3)
1696:.\Generated_Source\PSoC5/cyPm.c **** 
1697:.\Generated_Source\PSoC5/cyPm.c ****         /* Serial Wire Viewer (SWV) workaround */
1698:.\Generated_Source\PSoC5/cyPm.c ****         if(CY_PM_ENABLED == cyPmBackup.swvClkEnabled)
1699:.\Generated_Source\PSoC5/cyPm.c ****         {
1700:.\Generated_Source\PSoC5/cyPm.c ****             /* Restore ports drive mode */
1701:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_PRT1_PC3_REG = (CY_PM_PRT1_PC3_REG & CY_PM_PRT1_PC3_DM_MASK) |
1702:.\Generated_Source\PSoC5/cyPm.c ****                                     cyPmBackup.prt1Dm;
1703:.\Generated_Source\PSoC5/cyPm.c **** 
1704:.\Generated_Source\PSoC5/cyPm.c ****             /* Enable SWV clocks */
1705:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_MLOGIC_DBG_REG |= CY_PM_MLOGIC_DBG_SWV_CLK_EN;
1706:.\Generated_Source\PSoC5/cyPm.c ****         }
1707:.\Generated_Source\PSoC5/cyPm.c **** 
1708:.\Generated_Source\PSoC5/cyPm.c ****     #endif /* (CY_PSOC3) */
1709:.\Generated_Source\PSoC5/cyPm.c **** 
1710:.\Generated_Source\PSoC5/cyPm.c **** 
1711:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore boost reference */
1712:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmBackup.boostRefExt)
 355              		.loc 1 1712 0
 356 0084 93F82E30 		ldrb	r3, [r3, #46]	@ zero_extendqisi2
 357 0088 012B     		cmp	r3, #1
 358 008a 04D1     		bne	.L7
1713:.\Generated_Source\PSoC5/cyPm.c ****     {
1714:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_BOOST_CR2_REG |= CY_PM_BOOST_CR2_EREFSEL_EXT;
 359              		.loc 1 1714 0
 360 008c 0449     		ldr	r1, .L9+8
 361 008e 0A78     		ldrb	r2, [r1, #0]	@ zero_extendqisi2
 362 0090 42F00800 		orr	r0, r2, #8
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 38


 363 0094 0870     		strb	r0, [r1, #0]
 364              	.L7:
 365 0096 7047     		bx	lr
 366              	.L10:
 367              		.align	2
 368              	.L9:
 369 0098 00000000 		.word	.LANCHOR0
 370 009c 005A0040 		.word	1073764864
 371 00a0 22430040 		.word	1073759010
 372              		.cfi_endproc
 373              	.LFE12:
 374              		.size	CyPmHibSlpRestore, .-CyPmHibSlpRestore
 375              		.section	.text.CyPmSaveClocks,"ax",%progbits
 376              		.align	1
 377              		.global	CyPmSaveClocks
 378              		.thumb
 379              		.thumb_func
 380              		.type	CyPmSaveClocks, %function
 381              	CyPmSaveClocks:
 382              	.LFB0:
  81:.\Generated_Source\PSoC5/cyPm.c **** {
 383              		.loc 1 81 0
 384              		.cfi_startproc
 385              		@ args = 0, pretend = 0, frame = 0
 386              		@ frame_needed = 0, uses_anonymous_args = 0
 387 0000 10B5     		push	{r4, lr}
 388              	.LCFI1:
 389              		.cfi_def_cfa_offset 8
 390              		.cfi_offset 4, -8
 391              		.cfi_offset 14, -4
  83:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.enClkA = CY_PM_ACT_CFG1_REG & CY_PM_ACT_EN_CLK_A_MASK;
 392              		.loc 1 83 0
 393 0002 5E4A     		ldr	r2, .L46
 394 0004 5E4C     		ldr	r4, .L46+4
 395 0006 1378     		ldrb	r3, [r2, #0]	@ zero_extendqisi2
 396 0008 03F00F00 		and	r0, r3, #15
  84:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.enClkD = CY_PM_ACT_CFG2_REG;
 397              		.loc 1 84 0
 398 000c 5D4B     		ldr	r3, .L46+8
  83:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.enClkA = CY_PM_ACT_CFG1_REG & CY_PM_ACT_EN_CLK_A_MASK;
 399              		.loc 1 83 0
 400 000e 84F83000 		strb	r0, [r4, #48]
  84:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.enClkD = CY_PM_ACT_CFG2_REG;
 401              		.loc 1 84 0
 402 0012 1978     		ldrb	r1, [r3, #0]	@ zero_extendqisi2
 403 0014 84F83110 		strb	r1, [r4, #49]
  85:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_ACT_CFG1_REG &= ((uint8)(~CY_PM_ACT_EN_CLK_A_MASK));
 404              		.loc 1 85 0
 405 0018 1078     		ldrb	r0, [r2, #0]	@ zero_extendqisi2
 406 001a 00F0F001 		and	r1, r0, #240
 407 001e 1170     		strb	r1, [r2, #0]
  86:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_ACT_CFG2_REG &= ((uint8)(~CY_PM_ACT_EN_CLK_D_MASK));
 408              		.loc 1 86 0
 409 0020 1A78     		ldrb	r2, [r3, #0]	@ zero_extendqisi2
 410 0022 0022     		movs	r2, #0
 411 0024 1A70     		strb	r2, [r3, #0]
  89:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.flashWaitCycles = CY_PM_CACHE_CR_CYCLES_MASK & CY_PM_CACHE_CR_REG;
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 39


 412              		.loc 1 89 0
 413 0026 584B     		ldr	r3, .L46+12
 414 0028 1878     		ldrb	r0, [r3, #0]	@ zero_extendqisi2
 415 002a 00F0C001 		and	r1, r0, #192
  90:.\Generated_Source\PSoC5/cyPm.c ****     CyFlash_SetWaitCycles(CY_PM_MAX_FLASH_WAIT_CYCLES);
 416              		.loc 1 90 0
 417 002e 3720     		movs	r0, #55
  89:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.flashWaitCycles = CY_PM_CACHE_CR_CYCLES_MASK & CY_PM_CACHE_CR_REG;
 418              		.loc 1 89 0
 419 0030 84F83510 		strb	r1, [r4, #53]
  90:.\Generated_Source\PSoC5/cyPm.c ****     CyFlash_SetWaitCycles(CY_PM_MAX_FLASH_WAIT_CYCLES);
 420              		.loc 1 90 0
 421 0034 FFF7FEFF 		bl	CyFlash_SetWaitCycles
 422              	.LVL0:
  93:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.imoFreq = CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK;
 423              		.loc 1 93 0
 424 0038 544B     		ldr	r3, .L46+16
 425 003a 1A78     		ldrb	r2, [r3, #0]	@ zero_extendqisi2
 426 003c 02F00700 		and	r0, r2, #7
 427 0040 84F83300 		strb	r0, [r4, #51]
  94:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.imoUsbClk = CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_USB;
 428              		.loc 1 94 0
 429 0044 1978     		ldrb	r1, [r3, #0]	@ zero_extendqisi2
 430 0046 01F04002 		and	r2, r1, #64
 431 004a 84F83420 		strb	r2, [r4, #52]
  97:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_F2XON))
 432              		.loc 1 97 0
 433 004e 1B78     		ldrb	r3, [r3, #0]	@ zero_extendqisi2
 434 0050 13F01000 		ands	r0, r3, #16
 100:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.imo2x = CY_PM_ENABLED;
 435              		.loc 1 100 0
 436 0054 18BF     		it	ne
 437 0056 0120     		movne	r0, #1
 105:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.imo2x = CY_PM_DISABLED;
 438              		.loc 1 105 0
 439 0058 84F83900 		strb	r0, [r4, #57]
 109:.\Generated_Source\PSoC5/cyPm.c ****     CyIMO_SetFreq(CY_PM_IMO_FREQ_LPM);
 440              		.loc 1 109 0
 441 005c 0420     		movs	r0, #4
 442 005e FFF7FEFF 		bl	CyIMO_SetFreq
 443              	.LVL1:
 112:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_ACT_CFG0_IMO & CY_PM_ACT_CFG0_REG))
 444              		.loc 1 112 0
 445 0062 4B49     		ldr	r1, .L46+20
 446 0064 0A78     		ldrb	r2, [r1, #0]	@ zero_extendqisi2
 447 0066 4649     		ldr	r1, .L46+4
 448 0068 02F01003 		and	r3, r2, #16
 449 006c 1846     		mov	r0, r3
 450 006e 1BB1     		cbz	r3, .L14
 115:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.imoEnable = CY_PM_ENABLED;
 451              		.loc 1 115 0
 452 0070 0120     		movs	r0, #1
 453 0072 81F83600 		strb	r0, [r1, #54]
 454 0076 03E0     		b	.L15
 455              	.L14:
 120:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.imoEnable = CY_PM_DISABLED;
 456              		.loc 1 120 0
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 40


 457 0078 81F83630 		strb	r3, [r1, #54]
 123:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_Start(CY_PM_IMO_NO_WAIT_TO_SETTLE);
 458              		.loc 1 123 0
 459 007c FFF7FEFF 		bl	CyIMO_Start
 460              	.LVL2:
 461              	.L15:
 127:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_XCLKEN))
 462              		.loc 1 127 0
 463 0080 424A     		ldr	r2, .L46+16
 464 0082 1378     		ldrb	r3, [r2, #0]	@ zero_extendqisi2
 465 0084 13F02001 		ands	r1, r3, #32
 466 0088 10D0     		beq	.L16
 131:.\Generated_Source\PSoC5/cyPm.c ****             (0u == (CY_PM_CLKDIST_CR_REG & CY_PM_CLKDIST_IMO2X_SRC)) ? CY_IMO_SOURCE_DSI : CY_IMO_S
 467              		.loc 1 131 0
 468 008a 4FF04022 		mov	r2, #1073758208
 469 008e 1378     		ldrb	r3, [r2, #0]	@ zero_extendqisi2
 130:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.imoClkSrc =
 470              		.loc 1 130 0
 471 0090 03F04001 		and	r1, r3, #64
 472 0094 C8B2     		uxtb	r0, r1
 473 0096 3A4B     		ldr	r3, .L46+4
 474 0098 0028     		cmp	r0, #0
 475 009a 14BF     		ite	ne
 476 009c 0122     		movne	r2, #1
 477 009e 0222     		moveq	r2, #2
 134:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_SetSource(CY_IMO_SOURCE_IMO);
 478              		.loc 1 134 0
 479 00a0 0020     		movs	r0, #0
 130:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.imoClkSrc =
 480              		.loc 1 130 0
 481 00a2 83F83720 		strb	r2, [r3, #55]
 134:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_SetSource(CY_IMO_SOURCE_IMO);
 482              		.loc 1 134 0
 483 00a6 FFF7FEFF 		bl	CyIMO_SetSource
 484              	.LVL3:
 485 00aa 02E0     		b	.L18
 486              	.L16:
 139:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.imoClkSrc = CY_IMO_SOURCE_IMO;
 487              		.loc 1 139 0
 488 00ac 3448     		ldr	r0, .L46+4
 489 00ae 80F83710 		strb	r1, [r0, #55]
 490              	.L18:
 143:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.clkImoSrc = CY_PM_CLKDIST_CR_REG & CY_PM_CLKDIST_IMO_OUT_MASK;
 491              		.loc 1 143 0
 492 00b2 4FF04020 		mov	r0, #1073758208
 493 00b6 0178     		ldrb	r1, [r0, #0]	@ zero_extendqisi2
 494 00b8 314B     		ldr	r3, .L46+4
 495 00ba 01F03002 		and	r2, r1, #48
 496 00be 83F83820 		strb	r2, [r3, #56]
 146:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_CLKDIST_IMO_OUT_IMO != cyPmClockBackup.clkImoSrc)
 497              		.loc 1 146 0
 498 00c2 1AB1     		cbz	r2, .L19
 149:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_CLKDIST_CR_REG = (CY_PM_CLKDIST_CR_REG & ((uint8)(~CY_PM_CLKDIST_IMO_OUT_MASK))) |
 499              		.loc 1 149 0
 500 00c4 0178     		ldrb	r1, [r0, #0]	@ zero_extendqisi2
 501 00c6 01F0CF02 		and	r2, r1, #207
 502 00ca 0270     		strb	r2, [r0, #0]
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 41


 503              	.L19:
 154:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_F2XON))
 504              		.loc 1 154 0
 505 00cc 2F48     		ldr	r0, .L46+16
 506 00ce 0378     		ldrb	r3, [r0, #0]	@ zero_extendqisi2
 507 00d0 03F01001 		and	r1, r3, #16
 508 00d4 CAB2     		uxtb	r2, r1
 509 00d6 0AB1     		cbz	r2, .L20
 156:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_DisableDoubler();
 510              		.loc 1 156 0
 511 00d8 FFF7FEFF 		bl	CyIMO_DisableDoubler
 512              	.LVL4:
 513              	.L20:
 160:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.clkSyncDiv = CY_PM_CLKDIST_MSTR0_REG;
 514              		.loc 1 160 0
 515 00dc 2D48     		ldr	r0, .L46+24
 516 00de 2849     		ldr	r1, .L46+4
 517 00e0 0378     		ldrb	r3, [r0, #0]	@ zero_extendqisi2
 518 00e2 81F83A30 		strb	r3, [r1, #58]
 161:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_DIV_BY_ONE != cyPmClockBackup.clkSyncDiv)
 519              		.loc 1 161 0
 520 00e6 13B1     		cbz	r3, .L21
 163:.\Generated_Source\PSoC5/cyPm.c ****         CyMasterClk_SetDivider(CY_PM_DIV_BY_ONE);
 521              		.loc 1 163 0
 522 00e8 0020     		movs	r0, #0
 523 00ea FFF7FEFF 		bl	CyMasterClk_SetDivider
 524              	.LVL5:
 525              	.L21:
 167:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.masterClkSrc = CY_PM_CLKDIST_MSTR1_REG & CY_PM_MASTER_CLK_SRC_MASK;
 526              		.loc 1 167 0
 527 00ee 2A4A     		ldr	r2, .L46+28
 528 00f0 2349     		ldr	r1, .L46+4
 529 00f2 1078     		ldrb	r0, [r2, #0]	@ zero_extendqisi2
 530 00f4 00F00303 		and	r3, r0, #3
 531 00f8 81F83230 		strb	r3, [r1, #50]
 170:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_MASTER_SOURCE_IMO != cyPmClockBackup.masterClkSrc)
 532              		.loc 1 170 0
 533 00fc 13B1     		cbz	r3, .L22
 172:.\Generated_Source\PSoC5/cyPm.c ****         CyMasterClk_SetSource(CY_MASTER_SOURCE_IMO);
 534              		.loc 1 172 0
 535 00fe 0020     		movs	r0, #0
 536 0100 FFF7FEFF 		bl	CyMasterClk_SetSource
 537              	.LVL6:
 538              	.L22:
 176:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.clkBusDiv = (uint16) ((uint16) CY_PM_CLK_BUS_MSB_DIV_REG << 8u);
 539              		.loc 1 176 0
 540 0104 254A     		ldr	r2, .L46+32
 177:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.clkBusDiv |= CY_PM_CLK_BUS_LSB_DIV_REG;
 541              		.loc 1 177 0
 542 0106 2649     		ldr	r1, .L46+36
 176:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.clkBusDiv = (uint16) ((uint16) CY_PM_CLK_BUS_MSB_DIV_REG << 8u);
 543              		.loc 1 176 0
 544 0108 1078     		ldrb	r0, [r2, #0]	@ zero_extendqisi2
 545 010a 1D4A     		ldr	r2, .L46+4
 546 010c 0302     		lsls	r3, r0, #8
 547 010e 9387     		strh	r3, [r2, #60]	@ movhi
 177:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.clkBusDiv |= CY_PM_CLK_BUS_LSB_DIV_REG;
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 42


 548              		.loc 1 177 0
 549 0110 0878     		ldrb	r0, [r1, #0]	@ zero_extendqisi2
 550 0112 0343     		orrs	r3, r3, r0
 551 0114 9387     		strh	r3, [r2, #60]	@ movhi
 178:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_BUS_CLK_DIV_BY_ONE != cyPmClockBackup.clkBusDiv)
 552              		.loc 1 178 0
 553 0116 13B1     		cbz	r3, .L23
 180:.\Generated_Source\PSoC5/cyPm.c ****         CyBusClk_SetDivider(CY_PM_BUS_CLK_DIV_BY_ONE);
 554              		.loc 1 180 0
 555 0118 0020     		movs	r0, #0
 556 011a FFF7FEFF 		bl	CyBusClk_SetDivider
 557              	.LVL7:
 558              	.L23:
 184:.\Generated_Source\PSoC5/cyPm.c ****     CyFlash_SetWaitCycles((uint8)CY_PM_GET_CPU_FREQ_MHZ);
 559              		.loc 1 184 0
 560 011e 1B4B     		ldr	r3, .L46+16
 561 0120 2048     		ldr	r0, .L46+40
 562 0122 1A78     		ldrb	r2, [r3, #0]	@ zero_extendqisi2
 563 0124 02F00701 		and	r1, r2, #7
 564 0128 405C     		ldrb	r0, [r0, r1]	@ zero_extendqisi2
 565 012a FFF7FEFF 		bl	CyFlash_SetWaitCycles
 566              	.LVL8:
 187:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_FASTCLK_PLL_CFG0_REG & CY_PM_PLL_CFG0_ENABLE))
 567              		.loc 1 187 0
 568 012e 1E4B     		ldr	r3, .L46+44
 569 0130 1348     		ldr	r0, .L46+4
 570 0132 1A78     		ldrb	r2, [r3, #0]	@ zero_extendqisi2
 571 0134 12F00101 		ands	r1, r2, #1
 572 0138 05D0     		beq	.L24
 190:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.pllEnableState = CY_PM_ENABLED;
 573              		.loc 1 190 0
 574 013a 0123     		movs	r3, #1
 575 013c 80F83E30 		strb	r3, [r0, #62]
 191:.\Generated_Source\PSoC5/cyPm.c ****         CyPLL_OUT_Stop();
 576              		.loc 1 191 0
 577 0140 FFF7FEFF 		bl	CyPLL_OUT_Stop
 578              	.LVL9:
 579 0144 01E0     		b	.L25
 580              	.L24:
 196:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.pllEnableState = CY_PM_DISABLED;
 581              		.loc 1 196 0
 582 0146 80F83E10 		strb	r1, [r0, #62]
 583              	.L25:
 200:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_FASTCLK_XMHZ_CSR_REG & CY_PM_XMHZ_CSR_ENABLE))
 584              		.loc 1 200 0
 585 014a 184A     		ldr	r2, .L46+48
 586 014c 0C4B     		ldr	r3, .L46+4
 587 014e 1178     		ldrb	r1, [r2, #0]	@ zero_extendqisi2
 588 0150 11F00100 		ands	r0, r1, #1
 589 0154 05D0     		beq	.L26
 203:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.xmhzEnableState = CY_PM_ENABLED;
 590              		.loc 1 203 0
 591 0156 0122     		movs	r2, #1
 592 0158 83F83F20 		strb	r2, [r3, #63]
 204:.\Generated_Source\PSoC5/cyPm.c ****         CyXTAL_Stop();
 593              		.loc 1 204 0
 594 015c FFF7FEFF 		bl	CyXTAL_Stop
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 43


 595              	.LVL10:
 596 0160 01E0     		b	.L27
 597              	.L26:
 209:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.xmhzEnableState = CY_PM_DISABLED;
 598              		.loc 1 209 0
 599 0162 83F83F00 		strb	r0, [r3, #63]
 600              	.L27:
 218:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_CLKDIST_DELAY_REG & CY_PM_CLKDIST_DELAY_EN))
 601              		.loc 1 218 0
 602 0166 1249     		ldr	r1, .L46+52
 603 0168 054B     		ldr	r3, .L46+4
 604 016a 0878     		ldrb	r0, [r1, #0]	@ zero_extendqisi2
 605 016c 10F00402 		ands	r2, r0, #4
 220:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.clkDistDelay = CY_PM_ENABLED;
 606              		.loc 1 220 0
 607 0170 18BF     		it	ne
 608 0172 0122     		movne	r2, #1
 224:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.clkDistDelay = CY_PM_DISABLED;
 609              		.loc 1 224 0
 610 0174 83F84020 		strb	r2, [r3, #64]
 611 0178 10BD     		pop	{r4, pc}
 612              	.L47:
 613 017a 00BF     		.align	2
 614              	.L46:
 615 017c A1430040 		.word	1073759137
 616 0180 00000000 		.word	.LANCHOR0
 617 0184 A2430040 		.word	1073759138
 618 0188 00480040 		.word	1073760256
 619 018c 00420040 		.word	1073758720
 620 0190 A0430040 		.word	1073759136
 621 0194 04400040 		.word	1073758212
 622 0198 05400040 		.word	1073758213
 623 019c 07400040 		.word	1073758215
 624 01a0 06400040 		.word	1073758214
 625 01a4 00000000 		.word	.LANCHOR1
 626 01a8 20420040 		.word	1073758752
 627 01ac 10420040 		.word	1073758736
 628 01b0 0B400040 		.word	1073758219
 629              		.cfi_endproc
 630              	.LFE0:
 631              		.size	CyPmSaveClocks, .-CyPmSaveClocks
 632              		.section	.text.CyPmRestoreClocks,"ax",%progbits
 633              		.align	1
 634              		.global	CyPmRestoreClocks
 635              		.thumb
 636              		.thumb_func
 637              		.type	CyPmRestoreClocks, %function
 638              	CyPmRestoreClocks:
 639              	.LFB1:
 257:.\Generated_Source\PSoC5/cyPm.c **** {
 640              		.loc 1 257 0
 641              		.cfi_startproc
 642              		@ args = 0, pretend = 0, frame = 8
 643              		@ frame_needed = 0, uses_anonymous_args = 0
 644              	.LVL11:
 264:.\Generated_Source\PSoC5/cyPm.c ****     const uint8 CYCODE cyPmImoFreqMhz2Reg[7u] = {
 645              		.loc 1 264 0
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 44


 646 0000 774A     		ldr	r2, .L76
 257:.\Generated_Source\PSoC5/cyPm.c **** {
 647              		.loc 1 257 0
 648 0002 13B5     		push	{r0, r1, r4, lr}
 649              	.LCFI2:
 650              		.cfi_def_cfa_offset 16
 651              		.cfi_offset 0, -16
 652              		.cfi_offset 1, -12
 653              		.cfi_offset 4, -8
 654              		.cfi_offset 14, -4
 264:.\Generated_Source\PSoC5/cyPm.c ****     const uint8 CYCODE cyPmImoFreqMhz2Reg[7u] = {
 655              		.loc 1 264 0
 656 0004 1346     		mov	r3, r2
 657 0006 53F8070F 		ldr	r0, [r3, #7]!	@ unaligned
 658 000a 9988     		ldrh	r1, [r3, #4]	@ unaligned
 659 000c 9C79     		ldrb	r4, [r3, #6]	@ zero_extendqisi2
 269:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmClockBackup.clkDistDelay)
 660              		.loc 1 269 0
 661 000e 754B     		ldr	r3, .L76+4
 264:.\Generated_Source\PSoC5/cyPm.c ****     const uint8 CYCODE cyPmImoFreqMhz2Reg[7u] = {
 662              		.loc 1 264 0
 663 0010 0090     		str	r0, [sp, #0]	@ unaligned
 269:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmClockBackup.clkDistDelay)
 664              		.loc 1 269 0
 665 0012 93F84000 		ldrb	r0, [r3, #64]	@ zero_extendqisi2
 264:.\Generated_Source\PSoC5/cyPm.c ****     const uint8 CYCODE cyPmImoFreqMhz2Reg[7u] = {
 666              		.loc 1 264 0
 667 0016 ADF80410 		strh	r1, [sp, #4]	@ unaligned
 269:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmClockBackup.clkDistDelay)
 668              		.loc 1 269 0
 669 001a 0128     		cmp	r0, #1
 264:.\Generated_Source\PSoC5/cyPm.c ****     const uint8 CYCODE cyPmImoFreqMhz2Reg[7u] = {
 670              		.loc 1 264 0
 671 001c 8DF80640 		strb	r4, [sp, #6]
 269:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmClockBackup.clkDistDelay)
 672              		.loc 1 269 0
 673 0020 0DD1     		bne	.L49
 273:.\Generated_Source\PSoC5/cyPm.c ****                         CY_PM_GET_CPU_FREQ_MHZ);
 674              		.loc 1 273 0
 675 0022 7149     		ldr	r1, .L76+8
 272:.\Generated_Source\PSoC5/cyPm.c ****         CyDelayCycles((uint32)(CY_PM_CLK_DELAY_BANDGAP_SETTLE_US + CY_PM_CLK_DELAY_BIAS_SETTLE_US) 
 676              		.loc 1 272 0
 677 0024 4B20     		movs	r0, #75
 273:.\Generated_Source\PSoC5/cyPm.c ****                         CY_PM_GET_CPU_FREQ_MHZ);
 678              		.loc 1 273 0
 679 0026 0C78     		ldrb	r4, [r1, #0]	@ zero_extendqisi2
 680 0028 04F00703 		and	r3, r4, #7
 272:.\Generated_Source\PSoC5/cyPm.c ****         CyDelayCycles((uint32)(CY_PM_CLK_DELAY_BANDGAP_SETTLE_US + CY_PM_CLK_DELAY_BIAS_SETTLE_US) 
 681              		.loc 1 272 0
 682 002c D25C     		ldrb	r2, [r2, r3]	@ zero_extendqisi2
 683 002e 5043     		muls	r0, r2, r0
 684 0030 FFF7FEFF 		bl	CyDelayCycles
 685              	.LVL12:
 275:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_CLKDIST_DELAY_REG |= CY_PM_CLKDIST_DELAY_EN;
 686              		.loc 1 275 0
 687 0034 6D48     		ldr	r0, .L76+12
 688 0036 0178     		ldrb	r1, [r0, #0]	@ zero_extendqisi2
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 45


 689 0038 41F00404 		orr	r4, r1, #4
 690 003c 0470     		strb	r4, [r0, #0]
 691              	.L49:
 279:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmClockBackup.xmhzEnableState)
 692              		.loc 1 279 0
 693 003e 694B     		ldr	r3, .L76+4
 694 0040 93F83F20 		ldrb	r2, [r3, #63]	@ zero_extendqisi2
 695 0044 012A     		cmp	r2, #1
 696 0046 09D0     		beq	.L50
 697              	.L53:
 325:.\Generated_Source\PSoC5/cyPm.c ****     if((CY_PM_MASTER_CLK_SRC_XTAL == cyPmClockBackup.masterClkSrc) ||
 698              		.loc 1 325 0
 699 0048 664C     		ldr	r4, .L76+4
 322:.\Generated_Source\PSoC5/cyPm.c ****     CyFlash_SetWaitCycles(CY_PM_MAX_FLASH_WAIT_CYCLES);
 700              		.loc 1 322 0
 701 004a 3720     		movs	r0, #55
 702 004c FFF7FEFF 		bl	CyFlash_SetWaitCycles
 703              	.LVL13:
 325:.\Generated_Source\PSoC5/cyPm.c ****     if((CY_PM_MASTER_CLK_SRC_XTAL == cyPmClockBackup.masterClkSrc) ||
 704              		.loc 1 325 0
 705 0050 94F83220 		ldrb	r2, [r4, #50]	@ zero_extendqisi2
 706 0054 911E     		subs	r1, r2, #2
 707 0056 0129     		cmp	r1, #1
 708 0058 25D8     		bhi	.L52
 709 005a 18E0     		b	.L75
 710              	.L50:
 289:.\Generated_Source\PSoC5/cyPm.c ****         (void) CyXTAL_Start(CY_PM_XTAL_MHZ_NO_WAIT);
 711              		.loc 1 289 0
 712 005c 0020     		movs	r0, #0
 713 005e FFF7FEFF 		bl	CyXTAL_Start
 714              	.LVL14:
 292:.\Generated_Source\PSoC5/cyPm.c ****         (void) CY_PM_FASTCLK_XMHZ_CSR_REG;
 715              		.loc 1 292 0
 716 0062 6348     		ldr	r0, .L76+16
 717 0064 0524     		movs	r4, #5
 718 0066 0378     		ldrb	r3, [r0, #0]	@ zero_extendqisi2
 719              	.LVL15:
 720              	.L54:
 298:.\Generated_Source\PSoC5/cyPm.c ****             CyDelayCycles((uint32)CY_PM_WAIT_200_US * CY_PM_GET_CPU_FREQ_MHZ);
 721              		.loc 1 298 0
 722 0068 5F49     		ldr	r1, .L76+8
 723 006a 5D4A     		ldr	r2, .L76
 724 006c 0B78     		ldrb	r3, [r1, #0]	@ zero_extendqisi2
 725 006e 03F00700 		and	r0, r3, #7
 726 0072 115C     		ldrb	r1, [r2, r0]	@ zero_extendqisi2
 727 0074 C820     		movs	r0, #200
 728 0076 4843     		muls	r0, r1, r0
 729 0078 FFF7FEFF 		bl	CyDelayCycles
 730              	.LVL16:
 301:.\Generated_Source\PSoC5/cyPm.c ****             if(0u == (CY_PM_FASTCLK_XMHZ_CSR_REG & CY_PM_XMHZ_CSR_XERR))
 731              		.loc 1 301 0
 732 007c 5C4B     		ldr	r3, .L76+16
 733 007e 1878     		ldrb	r0, [r3, #0]	@ zero_extendqisi2
 734 0080 0306     		lsls	r3, r0, #24
 735 0082 E1D5     		bpl	.L53
 736 0084 013C     		subs	r4, r4, #1
 737 0086 A4B2     		uxth	r4, r4
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 46


 295:.\Generated_Source\PSoC5/cyPm.c ****         for(i = CY_PM_MHZ_XTAL_WAIT_NUM_OF_200_US; i > 0u; i--)
 738              		.loc 1 295 0
 739 0088 002C     		cmp	r4, #0
 740 008a EDD1     		bne	.L54
 741 008c DCE7     		b	.L53
 742              	.L75:
 329:.\Generated_Source\PSoC5/cyPm.c ****         if(CY_PM_CLKDIST_MSTR0_REG != cyPmClockBackup.clkSyncDiv)
 743              		.loc 1 329 0
 744 008e 594B     		ldr	r3, .L76+20
 745 0090 94F83A00 		ldrb	r0, [r4, #58]	@ zero_extendqisi2
 746 0094 1A78     		ldrb	r2, [r3, #0]	@ zero_extendqisi2
 747 0096 8242     		cmp	r2, r0
 748 0098 01D0     		beq	.L55
 332:.\Generated_Source\PSoC5/cyPm.c ****             CyMasterClk_SetDivider(cyPmClockBackup.clkSyncDiv);
 749              		.loc 1 332 0
 750 009a FFF7FEFF 		bl	CyMasterClk_SetDivider
 751              	.LVL17:
 752              	.L55:
 336:.\Generated_Source\PSoC5/cyPm.c ****         CyMasterClk_SetSource(cyPmClockBackup.masterClkSrc);
 753              		.loc 1 336 0
 754 009e 94F83200 		ldrb	r0, [r4, #50]	@ zero_extendqisi2
 755 00a2 FFF7FEFF 		bl	CyMasterClk_SetSource
 756              	.LVL18:
 757              	.L52:
 340:.\Generated_Source\PSoC5/cyPm.c ****     if((0u != (cyPmClockBackup.imoUsbClk & CY_PM_FASTCLK_IMO_CR_USB)) &&
 758              		.loc 1 340 0
 759 00a6 4F48     		ldr	r0, .L76+4
 760 00a8 90F83440 		ldrb	r4, [r0, #52]	@ zero_extendqisi2
 761 00ac 04F04001 		and	r1, r4, #64
 762 00b0 CBB2     		uxtb	r3, r1
 763 00b2 0446     		mov	r4, r0
 764 00b4 5BB1     		cbz	r3, .L56
 341:.\Generated_Source\PSoC5/cyPm.c ****         (CY_IMO_FREQ_24MHZ == cyPmImoFreqMhz2Reg[cyPmClockBackup.imoFreq]))
 765              		.loc 1 341 0 discriminator 1
 766 00b6 90F83300 		ldrb	r0, [r0, #51]	@ zero_extendqisi2
 767 00ba 02AA     		add	r2, sp, #8
 768 00bc 1118     		adds	r1, r2, r0
 340:.\Generated_Source\PSoC5/cyPm.c ****     if((0u != (cyPmClockBackup.imoUsbClk & CY_PM_FASTCLK_IMO_CR_USB)) &&
 769              		.loc 1 340 0 discriminator 1
 770 00be 11F8083C 		ldrb	r3, [r1, #-8]	@ zero_extendqisi2
 771 00c2 032B     		cmp	r3, #3
 772 00c4 03D1     		bne	.L56
 344:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_SetFreq(CY_IMO_FREQ_USB);
 773              		.loc 1 344 0
 774 00c6 0820     		movs	r0, #8
 775 00c8 FFF7FEFF 		bl	CyIMO_SetFreq
 776              	.LVL19:
 777 00cc 16E0     		b	.L57
 778              	.L56:
 349:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_SetFreq(cyPmImoFreqMhz2Reg[cyPmClockBackup.imoFreq]);
 779              		.loc 1 349 0
 780 00ce 94F83300 		ldrb	r0, [r4, #51]	@ zero_extendqisi2
 781 00d2 02AA     		add	r2, sp, #8
 782 00d4 1118     		adds	r1, r2, r0
 783 00d6 11F8080C 		ldrb	r0, [r1, #-8]	@ zero_extendqisi2
 784 00da FFF7FEFF 		bl	CyIMO_SetFreq
 785              	.LVL20:
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 47


 351:.\Generated_Source\PSoC5/cyPm.c ****         if(0u != (cyPmClockBackup.imoUsbClk & CY_PM_FASTCLK_IMO_CR_USB))
 786              		.loc 1 351 0
 787 00de 94F83440 		ldrb	r4, [r4, #52]	@ zero_extendqisi2
 788 00e2 4149     		ldr	r1, .L76+8
 789 00e4 04F04003 		and	r3, r4, #64
 790 00e8 D8B2     		uxtb	r0, r3
 791 00ea 18B1     		cbz	r0, .L58
 353:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_FASTCLK_IMO_CR_REG |= CY_PM_FASTCLK_IMO_CR_USB;
 792              		.loc 1 353 0
 793 00ec 0B78     		ldrb	r3, [r1, #0]	@ zero_extendqisi2
 794 00ee 43F04004 		orr	r4, r3, #64
 795 00f2 02E0     		b	.L74
 796              	.L58:
 357:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_FASTCLK_IMO_CR_REG &= ((uint8)(~CY_PM_FASTCLK_IMO_CR_USB));
 797              		.loc 1 357 0
 798 00f4 0A78     		ldrb	r2, [r1, #0]	@ zero_extendqisi2
 799 00f6 02F0BF04 		and	r4, r2, #191
 800              	.L74:
 801 00fa 0C70     		strb	r4, [r1, #0]
 802              	.L57:
 362:.\Generated_Source\PSoC5/cyPm.c ****     if((CY_PM_ENABLED == cyPmClockBackup.imoEnable) &&
 803              		.loc 1 362 0
 804 00fc 3948     		ldr	r0, .L76+4
 805 00fe 90F83610 		ldrb	r1, [r0, #54]	@ zero_extendqisi2
 806 0102 0129     		cmp	r1, #1
 807 0104 07D1     		bne	.L59
 363:.\Generated_Source\PSoC5/cyPm.c ****        (0u == (CY_PM_ACT_CFG0_IMO & CY_PM_ACT_CFG0_REG)))
 808              		.loc 1 363 0 discriminator 1
 809 0106 3C4A     		ldr	r2, .L76+24
 810 0108 1478     		ldrb	r4, [r2, #0]	@ zero_extendqisi2
 362:.\Generated_Source\PSoC5/cyPm.c ****     if((CY_PM_ENABLED == cyPmClockBackup.imoEnable) &&
 811              		.loc 1 362 0 discriminator 1
 812 010a 04F01003 		and	r3, r4, #16
 813 010e D8B2     		uxtb	r0, r3
 814 0110 08B9     		cbnz	r0, .L59
 366:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_Start(CY_PM_IMO_NO_WAIT_TO_SETTLE);
 815              		.loc 1 366 0
 816 0112 FFF7FEFF 		bl	CyIMO_Start
 817              	.LVL21:
 818              	.L59:
 370:.\Generated_Source\PSoC5/cyPm.c ****     if((CY_PM_DISABLED == cyPmClockBackup.imoEnable) &&
 819              		.loc 1 370 0
 820 0116 3348     		ldr	r0, .L76+4
 821 0118 90F83610 		ldrb	r1, [r0, #54]	@ zero_extendqisi2
 822 011c 39B9     		cbnz	r1, .L60
 371:.\Generated_Source\PSoC5/cyPm.c ****        (0u != (CY_PM_ACT_CFG0_IMO & CY_PM_ACT_CFG0_REG)))
 823              		.loc 1 371 0 discriminator 1
 824 011e 364A     		ldr	r2, .L76+24
 825 0120 1478     		ldrb	r4, [r2, #0]	@ zero_extendqisi2
 370:.\Generated_Source\PSoC5/cyPm.c ****     if((CY_PM_DISABLED == cyPmClockBackup.imoEnable) &&
 826              		.loc 1 370 0 discriminator 1
 827 0122 04F01003 		and	r3, r4, #16
 828 0126 D8B2     		uxtb	r0, r3
 829 0128 08B1     		cbz	r0, .L60
 373:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_Stop();
 830              		.loc 1 373 0
 831 012a FFF7FEFF 		bl	CyIMO_Stop
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 48


 832              	.LVL22:
 833              	.L60:
 377:.\Generated_Source\PSoC5/cyPm.c ****     CyIMO_SetSource(cyPmClockBackup.imoClkSrc);
 834              		.loc 1 377 0
 835 012e 2D4C     		ldr	r4, .L76+4
 836 0130 94F83700 		ldrb	r0, [r4, #55]	@ zero_extendqisi2
 837 0134 FFF7FEFF 		bl	CyIMO_SetSource
 838              	.LVL23:
 380:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmClockBackup.imo2x)
 839              		.loc 1 380 0
 840 0138 94F83910 		ldrb	r1, [r4, #57]	@ zero_extendqisi2
 841 013c 0129     		cmp	r1, #1
 842 013e 01D1     		bne	.L61
 382:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_EnableDoubler();
 843              		.loc 1 382 0
 844 0140 FFF7FEFF 		bl	CyIMO_EnableDoubler
 845              	.LVL24:
 846              	.L61:
 386:.\Generated_Source\PSoC5/cyPm.c ****     if(cyPmClockBackup.clkImoSrc != (CY_PM_CLKDIST_CR_REG & CY_PM_CLKDIST_IMO_OUT_MASK))
 847              		.loc 1 386 0
 848 0144 4FF04023 		mov	r3, #1073758208
 849 0148 1878     		ldrb	r0, [r3, #0]	@ zero_extendqisi2
 850 014a 94F83820 		ldrb	r2, [r4, #56]	@ zero_extendqisi2
 851 014e 00F03004 		and	r4, r0, #48
 852 0152 A242     		cmp	r2, r4
 853 0154 04D0     		beq	.L62
 388:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_CLKDIST_CR_REG = (CY_PM_CLKDIST_CR_REG & ((uint8)(~CY_PM_CLKDIST_IMO_OUT_MASK))) |
 854              		.loc 1 388 0
 855 0156 1978     		ldrb	r1, [r3, #0]	@ zero_extendqisi2
 856 0158 21F03000 		bic	r0, r1, #48
 857 015c 0243     		orrs	r2, r2, r0
 858 015e 1A70     		strb	r2, [r3, #0]
 859              	.L62:
 393:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmClockBackup.pllEnableState)
 860              		.loc 1 393 0
 861 0160 204B     		ldr	r3, .L76+4
 862 0162 93F83E40 		ldrb	r4, [r3, #62]	@ zero_extendqisi2
 863 0166 012C     		cmp	r4, #1
 864 0168 0CD1     		bne	.L63
 403:.\Generated_Source\PSoC5/cyPm.c ****         (void) CyPLL_OUT_Start(CY_PM_PLL_OUT_NO_WAIT);
 865              		.loc 1 403 0
 866 016a 0020     		movs	r0, #0
 867 016c FFF7FEFF 		bl	CyPLL_OUT_Start
 868              	.LVL25:
 406:.\Generated_Source\PSoC5/cyPm.c ****         CyDelayCycles((uint32)CY_PM_WAIT_250_US * CY_PM_GET_CPU_FREQ_MHZ);
 869              		.loc 1 406 0
 870 0170 1D49     		ldr	r1, .L76+8
 871 0172 1B4A     		ldr	r2, .L76
 872 0174 0878     		ldrb	r0, [r1, #0]	@ zero_extendqisi2
 873 0176 00F00703 		and	r3, r0, #7
 874 017a D45C     		ldrb	r4, [r2, r3]	@ zero_extendqisi2
 875 017c FA20     		movs	r0, #250
 876 017e 6043     		muls	r0, r4, r0
 877 0180 FFF7FEFF 		bl	CyDelayCycles
 878              	.LVL26:
 879              	.L63:
 411:.\Generated_Source\PSoC5/cyPm.c ****     if((CY_PM_MASTER_CLK_SRC_IMO == cyPmClockBackup.masterClkSrc) ||
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 49


 880              		.loc 1 411 0
 881 0184 174C     		ldr	r4, .L76+4
 882 0186 94F83210 		ldrb	r1, [r4, #50]	@ zero_extendqisi2
 883 018a 0129     		cmp	r1, #1
 884 018c 0BD8     		bhi	.L64
 415:.\Generated_Source\PSoC5/cyPm.c ****         if(CY_PM_CLKDIST_MSTR0_REG != cyPmClockBackup.clkSyncDiv)
 885              		.loc 1 415 0
 886 018e 1948     		ldr	r0, .L76+20
 887 0190 0378     		ldrb	r3, [r0, #0]	@ zero_extendqisi2
 888 0192 94F83A00 		ldrb	r0, [r4, #58]	@ zero_extendqisi2
 889 0196 8342     		cmp	r3, r0
 890 0198 01D0     		beq	.L65
 417:.\Generated_Source\PSoC5/cyPm.c ****             CyMasterClk_SetDivider(cyPmClockBackup.clkSyncDiv);
 891              		.loc 1 417 0
 892 019a FFF7FEFF 		bl	CyMasterClk_SetDivider
 893              	.LVL27:
 894              	.L65:
 421:.\Generated_Source\PSoC5/cyPm.c ****         CyMasterClk_SetSource(cyPmClockBackup.masterClkSrc);
 895              		.loc 1 421 0
 896 019e 94F83200 		ldrb	r0, [r4, #50]	@ zero_extendqisi2
 897 01a2 FFF7FEFF 		bl	CyMasterClk_SetSource
 898              	.LVL28:
 899              	.L64:
 425:.\Generated_Source\PSoC5/cyPm.c ****     clkBusDivTmp = (uint16) ((uint16)CY_PM_CLK_BUS_MSB_DIV_REG << 8u);
 900              		.loc 1 425 0
 901 01a6 154C     		ldr	r4, .L76+28
 902 01a8 2278     		ldrb	r2, [r4, #0]	@ zero_extendqisi2
 903              	.LVL29:
 426:.\Generated_Source\PSoC5/cyPm.c ****     clkBusDivTmp |= CY_PM_CLK_BUS_LSB_DIV_REG;
 904              		.loc 1 426 0
 905 01aa 611E     		subs	r1, r4, #1
 427:.\Generated_Source\PSoC5/cyPm.c ****     if(cyPmClockBackup.clkBusDiv != clkBusDivTmp)
 906              		.loc 1 427 0
 907 01ac 0D4C     		ldr	r4, .L76+4
 426:.\Generated_Source\PSoC5/cyPm.c ****     clkBusDivTmp |= CY_PM_CLK_BUS_LSB_DIV_REG;
 908              		.loc 1 426 0
 909 01ae 0B78     		ldrb	r3, [r1, #0]	@ zero_extendqisi2
 910              	.LVL30:
 427:.\Generated_Source\PSoC5/cyPm.c ****     if(cyPmClockBackup.clkBusDiv != clkBusDivTmp)
 911              		.loc 1 427 0
 912 01b0 A08F     		ldrh	r0, [r4, #60]
 913 01b2 43EA0222 		orr	r2, r3, r2, lsl #8
 914              	.LVL31:
 915 01b6 9042     		cmp	r0, r2
 916 01b8 01D0     		beq	.L66
 429:.\Generated_Source\PSoC5/cyPm.c ****         CyBusClk_SetDivider(cyPmClockBackup.clkBusDiv);
 917              		.loc 1 429 0
 918 01ba FFF7FEFF 		bl	CyBusClk_SetDivider
 919              	.LVL32:
 920              	.L66:
 433:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_CACHE_CR_REG = ((CY_PM_CACHE_CR_REG & ((uint8)(~CY_PM_CACHE_CR_CYCLES_MASK))) |
 921              		.loc 1 433 0
 922 01be 1048     		ldr	r0, .L76+32
 923 01c0 94F83520 		ldrb	r2, [r4, #53]	@ zero_extendqisi2
 924 01c4 0178     		ldrb	r1, [r0, #0]	@ zero_extendqisi2
 925 01c6 01F03F03 		and	r3, r1, #63
 926 01ca 1343     		orrs	r3, r3, r2
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 50


 927 01cc 0370     		strb	r3, [r0, #0]
 437:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_ACT_CFG1_REG = cyPmClockBackup.enClkA;
 928              		.loc 1 437 0
 929 01ce 94F83000 		ldrb	r0, [r4, #48]	@ zero_extendqisi2
 930 01d2 0C49     		ldr	r1, .L76+36
 931 01d4 0870     		strb	r0, [r1, #0]
 438:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_ACT_CFG2_REG = cyPmClockBackup.enClkD;
 932              		.loc 1 438 0
 933 01d6 94F83130 		ldrb	r3, [r4, #49]	@ zero_extendqisi2
 934 01da 4B70     		strb	r3, [r1, #1]
 439:.\Generated_Source\PSoC5/cyPm.c **** }
 935              		.loc 1 439 0
 936 01dc 1CBD     		pop	{r2, r3, r4, pc}
 937              	.L77:
 938 01de 00BF     		.align	2
 939              	.L76:
 940 01e0 00000000 		.word	.LANCHOR1
 941 01e4 00000000 		.word	.LANCHOR0
 942 01e8 00420040 		.word	1073758720
 943 01ec 0B400040 		.word	1073758219
 944 01f0 10420040 		.word	1073758736
 945 01f4 04400040 		.word	1073758212
 946 01f8 A0430040 		.word	1073759136
 947 01fc 07400040 		.word	1073758215
 948 0200 00480040 		.word	1073760256
 949 0204 A1430040 		.word	1073759137
 950              		.cfi_endproc
 951              	.LFE1:
 952              		.size	CyPmRestoreClocks, .-CyPmRestoreClocks
 953              		.section	.text.CyPmAltAct,"ax",%progbits
 954              		.align	1
 955              		.global	CyPmAltAct
 956              		.thumb
 957              		.thumb_func
 958              		.type	CyPmAltAct, %function
 959              	CyPmAltAct:
 960              	.LFB2:
 584:.\Generated_Source\PSoC5/cyPm.c **** {
 961              		.loc 1 584 0
 962              		.cfi_startproc
 963              		@ args = 0, pretend = 0, frame = 0
 964              		@ frame_needed = 0, uses_anonymous_args = 0
 965              	.LVL33:
 966 0000 30B5     		push	{r4, r5, lr}
 967              	.LCFI3:
 968              		.cfi_def_cfa_offset 12
 969              		.cfi_offset 4, -12
 970              		.cfi_offset 5, -8
 971              		.cfi_offset 14, -4
 635:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg0 = CY_PM_WAKEUP_CFG0_REG;
 972              		.loc 1 635 0
 973 0002 124C     		ldr	r4, .L79
 974 0004 124B     		ldr	r3, .L79+4
 975 0006 2278     		ldrb	r2, [r4, #0]	@ zero_extendqisi2
 636:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = (uint8) (wakeupSource >> 4u);
 976              		.loc 1 636 0
 977 0008 0809     		lsrs	r0, r1, #4
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 51


 978              	.LVL34:
 635:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg0 = CY_PM_WAKEUP_CFG0_REG;
 979              		.loc 1 635 0
 980 000a 1A71     		strb	r2, [r3, #4]
 636:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = (uint8) (wakeupSource >> 4u);
 981              		.loc 1 636 0
 982 000c 2070     		strb	r0, [r4, #0]
 639:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg1 = CY_PM_WAKEUP_CFG1_REG;
 983              		.loc 1 639 0
 984 000e 1148     		ldr	r0, .L79+8
 640:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = (((uint8) wakeupSource) & CY_PM_WAKEUP_SRC_CMPS_MASK);
 985              		.loc 1 640 0
 986 0010 01F00F02 		and	r2, r1, #15
 639:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg1 = CY_PM_WAKEUP_CFG1_REG;
 987              		.loc 1 639 0
 988 0014 0578     		ldrb	r5, [r0, #0]	@ zero_extendqisi2
 644:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = ((uint8) ((wakeupSource >> 12u) & 0x01u));
 989              		.loc 1 644 0
 990 0016 C1F30031 		ubfx	r1, r1, #12, #1
 991              	.LVL35:
 639:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg1 = CY_PM_WAKEUP_CFG1_REG;
 992              		.loc 1 639 0
 993 001a 5D71     		strb	r5, [r3, #5]
 640:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = (((uint8) wakeupSource) & CY_PM_WAKEUP_SRC_CMPS_MASK);
 994              		.loc 1 640 0
 995 001c 0270     		strb	r2, [r0, #0]
 643:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg2 = CY_PM_WAKEUP_CFG2_REG;
 996              		.loc 1 643 0
 997 001e 0E4A     		ldr	r2, .L79+12
 998 0020 1578     		ldrb	r5, [r2, #0]	@ zero_extendqisi2
 999 0022 9D71     		strb	r5, [r3, #6]
 644:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = ((uint8) ((wakeupSource >> 12u) & 0x01u));
 1000              		.loc 1 644 0
 1001 0024 1170     		strb	r1, [r2, #0]
 648:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_MODE_CSR_REG = ((CY_PM_MODE_CSR_REG & ((uint8)(~CY_PM_MODE_CSR_MASK))) | CY_PM_MODE_CSR_A
 1002              		.loc 1 648 0
 1003 0026 0D49     		ldr	r1, .L79+16
 1004 0028 0D78     		ldrb	r5, [r1, #0]	@ zero_extendqisi2
 1005 002a 05F0F805 		and	r5, r5, #248
 1006 002e 45F00105 		orr	r5, r5, #1
 1007 0032 0D70     		strb	r5, [r1, #0]
 651:.\Generated_Source\PSoC5/cyPm.c ****     (void) CY_PM_MODE_CSR_REG;
 1008              		.loc 1 651 0
 1009 0034 0978     		ldrb	r1, [r1, #0]	@ zero_extendqisi2
 654:.\Generated_Source\PSoC5/cyPm.c ****     CY_NOP;
 1010              		.loc 1 654 0
 1011              	@ 654 ".\Generated_Source\PSoC5\cyPm.c" 1
 1012 0036 00BF     		NOP
 1013              	
 1014              	@ 0 "" 2
 655:.\Generated_Source\PSoC5/cyPm.c ****     CY_NOP;
 1015              		.loc 1 655 0
 1016              	@ 655 ".\Generated_Source\PSoC5\cyPm.c" 1
 1017 0038 00BF     		NOP
 1018              	
 1019              	@ 0 "" 2
 658:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WFI;
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 52


 1020              		.loc 1 658 0
 1021              	@ 658 ".\Generated_Source\PSoC5\cyPm.c" 1
 1022 003a 30BF     		WFI 
 1023              	
 1024              	@ 0 "" 2
 663:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = cyPmBackup.wakeupCfg0;
 1025              		.loc 1 663 0
 1026              		.thumb
 1027 003c 1979     		ldrb	r1, [r3, #4]	@ zero_extendqisi2
 1028 003e 2170     		strb	r1, [r4, #0]
 664:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = cyPmBackup.wakeupCfg1;
 1029              		.loc 1 664 0
 1030 0040 5979     		ldrb	r1, [r3, #5]	@ zero_extendqisi2
 1031 0042 0170     		strb	r1, [r0, #0]
 665:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = cyPmBackup.wakeupCfg2;
 1032              		.loc 1 665 0
 1033 0044 9B79     		ldrb	r3, [r3, #6]	@ zero_extendqisi2
 1034 0046 1370     		strb	r3, [r2, #0]
 1035 0048 30BD     		pop	{r4, r5, pc}
 1036              	.L80:
 1037 004a 00BF     		.align	2
 1038              	.L79:
 1039 004c 98430040 		.word	1073759128
 1040 0050 00000000 		.word	.LANCHOR0
 1041 0054 99430040 		.word	1073759129
 1042 0058 9A430040 		.word	1073759130
 1043 005c 93430040 		.word	1073759123
 1044              		.cfi_endproc
 1045              	.LFE2:
 1046              		.size	CyPmAltAct, .-CyPmAltAct
 1047              		.section	.text.CyPmSleep,"ax",%progbits
 1048              		.align	1
 1049              		.global	CyPmSleep
 1050              		.thumb
 1051              		.thumb_func
 1052              		.type	CyPmSleep, %function
 1053              	CyPmSleep:
 1054              	.LFB3:
 788:.\Generated_Source\PSoC5/cyPm.c **** {
 1055              		.loc 1 788 0
 1056              		.cfi_startproc
 1057              		@ args = 0, pretend = 0, frame = 0
 1058              		@ frame_needed = 0, uses_anonymous_args = 0
 1059              	.LVL36:
 1060 0000 70B5     		push	{r4, r5, r6, lr}
 1061              	.LCFI4:
 1062              		.cfi_def_cfa_offset 16
 1063              		.cfi_offset 4, -16
 1064              		.cfi_offset 5, -12
 1065              		.cfi_offset 6, -8
 1066              		.cfi_offset 14, -4
 788:.\Generated_Source\PSoC5/cyPm.c **** {
 1067              		.loc 1 788 0
 1068 0002 0C46     		mov	r4, r1
 792:.\Generated_Source\PSoC5/cyPm.c ****     interruptState = CyEnterCriticalSection();
 1069              		.loc 1 792 0
 1070 0004 FFF7FEFF 		bl	CyEnterCriticalSection
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 53


 1071              	.LVL37:
 801:.\Generated_Source\PSoC5/cyPm.c ****     if(0u == (CY_PM_MODE_CSR_REG & CY_PM_MODE_CSR_PWRUP_PULSE_Q))
 1072              		.loc 1 801 0
 1073 0008 2D4B     		ldr	r3, .L93
 792:.\Generated_Source\PSoC5/cyPm.c ****     interruptState = CyEnterCriticalSection();
 1074              		.loc 1 792 0
 1075 000a 0546     		mov	r5, r0
 1076              	.LVL38:
 801:.\Generated_Source\PSoC5/cyPm.c ****     if(0u == (CY_PM_MODE_CSR_REG & CY_PM_MODE_CSR_PWRUP_PULSE_Q))
 1077              		.loc 1 801 0
 1078 000c 1978     		ldrb	r1, [r3, #0]	@ zero_extendqisi2
 1079 000e 11F00806 		ands	r6, r1, #8
 1080 0012 50D1     		bne	.L91
 804:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_PWRSYS_SLP_TR_REG &= CY_PM_PWRSYS_SLP_TR_HIBSLP_HOLDOFF_MASK;
 1081              		.loc 1 804 0
 1082 0014 2B4A     		ldr	r2, .L93+4
 1083 0016 1078     		ldrb	r0, [r2, #0]	@ zero_extendqisi2
 1084              	.LVL39:
 1085 0018 00F01F03 		and	r3, r0, #31
 1086 001c 1370     		strb	r3, [r2, #0]
 882:.\Generated_Source\PSoC5/cyPm.c ****     CyPmHibSlpSaveSet();
 1087              		.loc 1 882 0
 1088 001e FFF7FEFF 		bl	CyPmHibSlpSaveSet
 1089              	.LVL40:
 913:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg0 = CY_PM_WAKEUP_CFG0_REG;
 1090              		.loc 1 913 0
 1091 0022 294A     		ldr	r2, .L93+8
 1092 0024 2948     		ldr	r0, .L93+12
 1093 0026 1178     		ldrb	r1, [r2, #0]	@ zero_extendqisi2
 914:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = (uint8) (wakeupSource >> 4u);
 1094              		.loc 1 914 0
 1095 0028 2309     		lsrs	r3, r4, #4
 913:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg0 = CY_PM_WAKEUP_CFG0_REG;
 1096              		.loc 1 913 0
 1097 002a 0171     		strb	r1, [r0, #4]
 914:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = (uint8) (wakeupSource >> 4u);
 1098              		.loc 1 914 0
 1099 002c 1370     		strb	r3, [r2, #0]
 917:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg1 = CY_PM_WAKEUP_CFG1_REG;
 1100              		.loc 1 917 0
 1101 002e 5178     		ldrb	r1, [r2, #1]	@ zero_extendqisi2
 918:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = (((uint8) wakeupSource) & CY_PM_WAKEUP_SRC_CMPS_MASK);
 1102              		.loc 1 918 0
 1103 0030 04F00F03 		and	r3, r4, #15
 917:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg1 = CY_PM_WAKEUP_CFG1_REG;
 1104              		.loc 1 917 0
 1105 0034 4171     		strb	r1, [r0, #5]
 918:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = (((uint8) wakeupSource) & CY_PM_WAKEUP_SRC_CMPS_MASK);
 1106              		.loc 1 918 0
 1107 0036 5370     		strb	r3, [r2, #1]
 921:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg2 = CY_PM_WAKEUP_CFG2_REG;
 1108              		.loc 1 921 0
 1109 0038 9178     		ldrb	r1, [r2, #2]	@ zero_extendqisi2
 922:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = ((uint8) ((wakeupSource >> 12u) & 0x01u));
 1110              		.loc 1 922 0
 1111 003a C4F30034 		ubfx	r4, r4, #12, #1
 921:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg2 = CY_PM_WAKEUP_CFG2_REG;
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 54


 1112              		.loc 1 921 0
 1113 003e 8171     		strb	r1, [r0, #6]
 922:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = ((uint8) ((wakeupSource >> 12u) & 0x01u));
 1114              		.loc 1 922 0
 1115 0040 9470     		strb	r4, [r2, #2]
 921:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg2 = CY_PM_WAKEUP_CFG2_REG;
 1116              		.loc 1 921 0
 1117 0042 0232     		adds	r2, r2, #2
 935:.\Generated_Source\PSoC5/cyPm.c ****     if(0u == (CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK))
 1118              		.loc 1 935 0
 1119 0044 A2F5CD72 		sub	r2, r2, #410
 1120 0048 1378     		ldrb	r3, [r2, #0]	@ zero_extendqisi2
 1121 004a 5907     		lsls	r1, r3, #29
 1122 004c 03D1     		bne	.L92
 1123              	.L83:
 938:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.imoActFreq12Mhz = CY_PM_ENABLED;
 1124              		.loc 1 938 0
 1125 004e 0122     		movs	r2, #1
 1126 0050 80F82D20 		strb	r2, [r0, #45]
 1127 0054 0AE0     		b	.L85
 1128              	.L92:
 943:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.imoActFreq12Mhz = CY_PM_DISABLED;
 1129              		.loc 1 943 0
 1130 0056 80F82D60 		strb	r6, [r0, #45]
 946:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.imoActFreq = CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK;
 1131              		.loc 1 946 0
 1132 005a 1178     		ldrb	r1, [r2, #0]	@ zero_extendqisi2
 1133 005c 01F00703 		and	r3, r1, #7
 1134 0060 80F82C30 		strb	r3, [r0, #44]
 949:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_FASTCLK_IMO_CR_REG &= ((uint8) (~CY_PM_FASTCLK_IMO_CR_FREQ_MASK));
 1135              		.loc 1 949 0
 1136 0064 1078     		ldrb	r0, [r2, #0]	@ zero_extendqisi2
 1137 0066 00F0F801 		and	r1, r0, #248
 1138 006a 1170     		strb	r1, [r2, #0]
 1139              	.L85:
 953:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_MODE_CSR_REG = ((CY_PM_MODE_CSR_REG & ((uint8)(~CY_PM_MODE_CSR_MASK))) | CY_PM_MODE_CSR_S
 1140              		.loc 1 953 0
 1141 006c 144B     		ldr	r3, .L93
 1142 006e 1878     		ldrb	r0, [r3, #0]	@ zero_extendqisi2
 1143 0070 00F0F801 		and	r1, r0, #248
 1144 0074 41F00302 		orr	r2, r1, #3
 1145 0078 1A70     		strb	r2, [r3, #0]
 956:.\Generated_Source\PSoC5/cyPm.c ****     (void) CY_PM_MODE_CSR_REG;
 1146              		.loc 1 956 0
 1147 007a 1B78     		ldrb	r3, [r3, #0]	@ zero_extendqisi2
 959:.\Generated_Source\PSoC5/cyPm.c ****     CY_NOP;
 1148              		.loc 1 959 0
 1149              	@ 959 ".\Generated_Source\PSoC5\cyPm.c" 1
 1150 007c 00BF     		NOP
 1151              	
 1152              	@ 0 "" 2
 960:.\Generated_Source\PSoC5/cyPm.c ****     CY_NOP;
 1153              		.loc 1 960 0
 1154              	@ 960 ".\Generated_Source\PSoC5\cyPm.c" 1
 1155 007e 00BF     		NOP
 1156              	
 1157              	@ 0 "" 2
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 55


 963:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WFI;
 1158              		.loc 1 963 0
 1159              	@ 963 ".\Generated_Source\PSoC5\cyPm.c" 1
 1160 0080 30BF     		WFI 
 1161              	
 1162              	@ 0 "" 2
 968:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED != cyPmBackup.imoActFreq12Mhz)
 1163              		.loc 1 968 0
 1164              		.thumb
 1165 0082 1249     		ldr	r1, .L93+12
 1166 0084 91F82D30 		ldrb	r3, [r1, #45]	@ zero_extendqisi2
 1167 0088 012B     		cmp	r3, #1
 1168 008a 08D0     		beq	.L86
 970:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_FASTCLK_IMO_CR_REG  = (CY_PM_FASTCLK_IMO_CR_REG & ((uint8)(~CY_PM_FASTCLK_IMO_CR_FREQ
 1169              		.loc 1 970 0
 1170 008c 104B     		ldr	r3, .L93+16
 1171 008e 91F82C10 		ldrb	r1, [r1, #44]	@ zero_extendqisi2
 1172 0092 1878     		ldrb	r0, [r3, #0]	@ zero_extendqisi2
 1173 0094 20F00702 		bic	r2, r0, #7
 1174 0098 42EA0100 		orr	r0, r2, r1
 1175 009c 1870     		strb	r0, [r3, #0]
 1176              	.L86:
 985:.\Generated_Source\PSoC5/cyPm.c ****     CyPmHibSlpRestore();
 1177              		.loc 1 985 0
 1178 009e FFF7FEFF 		bl	CyPmHibSlpRestore
 1179              	.LVL41:
1007:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = cyPmBackup.wakeupCfg0;
 1180              		.loc 1 1007 0
 1181 00a2 0A4B     		ldr	r3, .L93+12
 1182 00a4 084A     		ldr	r2, .L93+8
 1183 00a6 1979     		ldrb	r1, [r3, #4]	@ zero_extendqisi2
 1184 00a8 1170     		strb	r1, [r2, #0]
1008:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = cyPmBackup.wakeupCfg1;
 1185              		.loc 1 1008 0
 1186 00aa 5879     		ldrb	r0, [r3, #5]	@ zero_extendqisi2
 1187 00ac 5070     		strb	r0, [r2, #1]
1009:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = cyPmBackup.wakeupCfg2;
 1188              		.loc 1 1009 0
 1189 00ae 9979     		ldrb	r1, [r3, #6]	@ zero_extendqisi2
 1190 00b0 084B     		ldr	r3, .L93+20
1012:.\Generated_Source\PSoC5/cyPm.c ****     CyExitCriticalSection(interruptState);
 1191              		.loc 1 1012 0
 1192 00b2 2846     		mov	r0, r5
1009:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = cyPmBackup.wakeupCfg2;
 1193              		.loc 1 1009 0
 1194 00b4 1970     		strb	r1, [r3, #0]
 1195              	.LVL42:
 1196              	.L91:
1013:.\Generated_Source\PSoC5/cyPm.c **** }
 1197              		.loc 1 1013 0
 1198 00b6 BDE87040 		pop	{r4, r5, r6, lr}
1012:.\Generated_Source\PSoC5/cyPm.c ****     CyExitCriticalSection(interruptState);
 1199              		.loc 1 1012 0
 1200 00ba FFF7FEBF 		b	CyExitCriticalSection
 1201              	.LVL43:
 1202              	.L94:
 1203 00be 00BF     		.align	2
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 56


 1204              	.L93:
 1205 00c0 93430040 		.word	1073759123
 1206 00c4 83460040 		.word	1073759875
 1207 00c8 98430040 		.word	1073759128
 1208 00cc 00000000 		.word	.LANCHOR0
 1209 00d0 00420040 		.word	1073758720
 1210 00d4 9A430040 		.word	1073759130
 1211              		.cfi_endproc
 1212              	.LFE3:
 1213              		.size	CyPmSleep, .-CyPmSleep
 1214              		.section	.text.CyPmHibernate,"ax",%progbits
 1215              		.align	1
 1216              		.global	CyPmHibernate
 1217              		.thumb
 1218              		.thumb_func
 1219              		.type	CyPmHibernate, %function
 1220              	CyPmHibernate:
 1221              	.LFB4:
1060:.\Generated_Source\PSoC5/cyPm.c **** {
 1222              		.loc 1 1060 0
 1223              		.cfi_startproc
 1224              		@ args = 0, pretend = 0, frame = 0
 1225              		@ frame_needed = 0, uses_anonymous_args = 0
 1226 0000 38B5     		push	{r3, r4, r5, lr}
 1227              	.LCFI5:
 1228              		.cfi_def_cfa_offset 16
 1229              		.cfi_offset 3, -16
 1230              		.cfi_offset 4, -12
 1231              		.cfi_offset 5, -8
 1232              		.cfi_offset 14, -4
1064:.\Generated_Source\PSoC5/cyPm.c ****     interruptState = CyEnterCriticalSection();
 1233              		.loc 1 1064 0
 1234 0002 FFF7FEFF 		bl	CyEnterCriticalSection
 1235              	.LVL44:
1072:.\Generated_Source\PSoC5/cyPm.c ****         if(0u == (CY_PM_MODE_CSR_REG & CY_PM_MODE_CSR_PWRUP_PULSE_Q))
 1236              		.loc 1 1072 0
 1237 0006 7F4B     		ldr	r3, .L125
1064:.\Generated_Source\PSoC5/cyPm.c ****     interruptState = CyEnterCriticalSection();
 1238              		.loc 1 1064 0
 1239 0008 0546     		mov	r5, r0
 1240              	.LVL45:
1072:.\Generated_Source\PSoC5/cyPm.c ****         if(0u == (CY_PM_MODE_CSR_REG & CY_PM_MODE_CSR_PWRUP_PULSE_Q))
 1241              		.loc 1 1072 0
 1242 000a 1978     		ldrb	r1, [r3, #0]	@ zero_extendqisi2
 1243 000c 01F00802 		and	r2, r1, #8
 1244 0010 D3B2     		uxtb	r3, r2
 1245 0012 002B     		cmp	r3, #0
 1246 0014 40F0F280 		bne	.L123
1075:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_PWRSYS_SLP_TR_REG &= CY_PM_PWRSYS_SLP_TR_HIBSLP_HOLDOFF_MASK;
 1247              		.loc 1 1075 0
 1248 0018 7B48     		ldr	r0, .L125+4
 1249              	.LVL46:
 1250              	.LBB10:
 1251              	.LBB11:
1234:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_PWRSYS_CR1_REG & CY_PM_PWRSYS_CR1_I2CREG_BACKUP))
 1252              		.loc 1 1234 0
 1253 001a 7C4B     		ldr	r3, .L125+8
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 57


 1254              	.LBE11:
 1255              	.LBE10:
1075:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_PWRSYS_SLP_TR_REG &= CY_PM_PWRSYS_SLP_TR_HIBSLP_HOLDOFF_MASK;
 1256              		.loc 1 1075 0
 1257 001c 0478     		ldrb	r4, [r0, #0]	@ zero_extendqisi2
 1258 001e 04F01F01 		and	r1, r4, #31
 1259 0022 0170     		strb	r1, [r0, #0]
 1260              	.LBB15:
 1261              	.LBB14:
1234:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_PWRSYS_CR1_REG & CY_PM_PWRSYS_CR1_I2CREG_BACKUP))
 1262              		.loc 1 1234 0
 1263 0024 1A78     		ldrb	r2, [r3, #0]	@ zero_extendqisi2
 1264 0026 02F00400 		and	r0, r2, #4
 1265 002a C4B2     		uxtb	r4, r0
 1266 002c 1CB1     		cbz	r4, .L97
1248:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_PWRSYS_CR1_REG &= ((uint8)(~CY_PM_PWRSYS_CR1_I2CREG_BACKUP));
 1267              		.loc 1 1248 0
 1268 002e 1978     		ldrb	r1, [r3, #0]	@ zero_extendqisi2
 1269 0030 01F0FB02 		and	r2, r1, #251
 1270 0034 1A70     		strb	r2, [r3, #0]
 1271              	.L97:
1253:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.iloPowerMode = CyILO_SetPowerMode(CY_PM_POWERDOWN_MODE);
 1272              		.loc 1 1253 0
 1273 0036 0120     		movs	r0, #1
 1274 0038 FFF7FEFF 		bl	CyILO_SetPowerMode
 1275              	.LVL47:
 1276 003c 744B     		ldr	r3, .L125+12
 1277 003e 1870     		strb	r0, [r3, #0]
1256:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.ilo1kEnable = (0u == (CY_PM_SLOWCLK_ILO_CR0_REG & CY_PM_ILO_CR0_EN_1K)) ?
 1278              		.loc 1 1256 0
 1279 0040 7448     		ldr	r0, .L125+16
 1280 0042 0478     		ldrb	r4, [r0, #0]	@ zero_extendqisi2
1257:.\Generated_Source\PSoC5/cyPm.c ****                                 CY_PM_DISABLED : CY_PM_ENABLED;
 1281              		.loc 1 1257 0
 1282 0044 C4F34001 		ubfx	r1, r4, #1, #1
1256:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.ilo1kEnable = (0u == (CY_PM_SLOWCLK_ILO_CR0_REG & CY_PM_ILO_CR0_EN_1K)) ?
 1283              		.loc 1 1256 0
 1284 0048 5970     		strb	r1, [r3, #1]
1260:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.ilo100kEnable = (0u == (CY_PM_SLOWCLK_ILO_CR0_REG & CY_PM_ILO_CR0_EN_100K)) ?
 1285              		.loc 1 1260 0
 1286 004a 0278     		ldrb	r2, [r0, #0]	@ zero_extendqisi2
1265:.\Generated_Source\PSoC5/cyPm.c ****     if(0u == (CY_PM_PWRSYS_SLP_TR_REG & CY_PM_PWRSYS_SLP_TR_BYPASS))
 1287              		.loc 1 1265 0
 1288 004c 6E4C     		ldr	r4, .L125+4
1261:.\Generated_Source\PSoC5/cyPm.c ****                                 CY_PM_DISABLED : CY_PM_ENABLED;
 1289              		.loc 1 1261 0
 1290 004e C2F38000 		ubfx	r0, r2, #2, #1
1260:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.ilo100kEnable = (0u == (CY_PM_SLOWCLK_ILO_CR0_REG & CY_PM_ILO_CR0_EN_100K)) ?
 1291              		.loc 1 1260 0
 1292 0052 9870     		strb	r0, [r3, #2]
1265:.\Generated_Source\PSoC5/cyPm.c ****     if(0u == (CY_PM_PWRSYS_SLP_TR_REG & CY_PM_PWRSYS_SLP_TR_BYPASS))
 1293              		.loc 1 1265 0
 1294 0054 2178     		ldrb	r1, [r4, #0]	@ zero_extendqisi2
 1295 0056 11F01002 		ands	r2, r1, #16
 1296 005a 05D1     		bne	.L98
1268:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.slpTrBypass = CY_PM_DISABLED;
 1297              		.loc 1 1268 0
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 58


 1298 005c DA70     		strb	r2, [r3, #3]
1269:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_PWRSYS_SLP_TR_REG |= CY_PM_PWRSYS_SLP_TR_BYPASS;
 1299              		.loc 1 1269 0
 1300 005e 2378     		ldrb	r3, [r4, #0]	@ zero_extendqisi2
 1301 0060 43F01001 		orr	r1, r3, #16
 1302 0064 2170     		strb	r1, [r4, #0]
 1303 0066 01E0     		b	.L99
 1304              	.L98:
1273:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.slpTrBypass = CY_PM_ENABLED;
 1305              		.loc 1 1273 0
 1306 0068 0120     		movs	r0, #1
 1307 006a D870     		strb	r0, [r3, #3]
 1308              	.L99:
 1309              	.LBB12:
 1310              	.LBB13:
1715:.\Generated_Source\PSoC5/cyPm.c ****     }
1716:.\Generated_Source\PSoC5/cyPm.c **** }
1717:.\Generated_Source\PSoC5/cyPm.c **** 
1718:.\Generated_Source\PSoC5/cyPm.c **** 
1719:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************
1720:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmHviLviSaveDisable
1721:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************
1722:.\Generated_Source\PSoC5/cyPm.c **** *
1723:.\Generated_Source\PSoC5/cyPm.c **** * Summary:
1724:.\Generated_Source\PSoC5/cyPm.c **** *  Saves analog and digital LVI and HVI configuration and disables them.
1725:.\Generated_Source\PSoC5/cyPm.c **** *
1726:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:
1727:.\Generated_Source\PSoC5/cyPm.c **** *  None
1728:.\Generated_Source\PSoC5/cyPm.c **** *
1729:.\Generated_Source\PSoC5/cyPm.c **** * Return:
1730:.\Generated_Source\PSoC5/cyPm.c **** *  None
1731:.\Generated_Source\PSoC5/cyPm.c **** *
1732:.\Generated_Source\PSoC5/cyPm.c **** * Reentrant:
1733:.\Generated_Source\PSoC5/cyPm.c **** *  No
1734:.\Generated_Source\PSoC5/cyPm.c **** *
1735:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/
1736:.\Generated_Source\PSoC5/cyPm.c **** static void CyPmHviLviSaveDisable(void) 
1737:.\Generated_Source\PSoC5/cyPm.c **** {
1738:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_VD_LVI_HVI_CONTROL_REG & CY_VD_LVID_EN))
 1311              		.loc 1 1738 0
 1312 006c 6A4C     		ldr	r4, .L125+20
 1313 006e 684B     		ldr	r3, .L125+12
 1314 0070 2278     		ldrb	r2, [r4, #0]	@ zero_extendqisi2
 1315 0072 12F00100 		ands	r0, r2, #1
 1316 0076 11D0     		beq	.L100
1739:.\Generated_Source\PSoC5/cyPm.c ****     {
1740:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lvidEn = CY_PM_ENABLED;
 1317              		.loc 1 1740 0
 1318 0078 0121     		movs	r1, #1
1741:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lvidTrip = CY_VD_LVI_TRIP_REG & CY_VD_LVI_TRIP_LVID_MASK;
 1319              		.loc 1 1741 0
 1320 007a 684C     		ldr	r4, .L125+24
1740:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lvidEn = CY_PM_ENABLED;
 1321              		.loc 1 1740 0
 1322 007c 83F82510 		strb	r1, [r3, #37]
 1323              		.loc 1 1741 0
 1324 0080 2278     		ldrb	r2, [r4, #0]	@ zero_extendqisi2
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 59


1742:.\Generated_Source\PSoC5/cyPm.c **** 
1743:.\Generated_Source\PSoC5/cyPm.c ****         /* Save state of reset device at a specified Vddd threshold */
1744:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lvidRst = (0u == (CY_VD_PRES_CONTROL_REG & CY_VD_PRESD_EN)) ? \
 1325              		.loc 1 1744 0
 1326 0082 6749     		ldr	r1, .L125+28
1741:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lvidTrip = CY_VD_LVI_TRIP_REG & CY_VD_LVI_TRIP_LVID_MASK;
 1327              		.loc 1 1741 0
 1328 0084 02F00F00 		and	r0, r2, #15
 1329 0088 83F82600 		strb	r0, [r3, #38]
 1330              		.loc 1 1744 0
 1331 008c 0C78     		ldrb	r4, [r1, #0]	@ zero_extendqisi2
1745:.\Generated_Source\PSoC5/cyPm.c ****                              CY_PM_DISABLED : CY_PM_ENABLED;
 1332              		.loc 1 1745 0
 1333 008e C4F38012 		ubfx	r2, r4, #6, #1
1744:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lvidRst = (0u == (CY_VD_PRES_CONTROL_REG & CY_VD_PRESD_EN)) ? \
 1334              		.loc 1 1744 0
 1335 0092 83F82A20 		strb	r2, [r3, #42]
1746:.\Generated_Source\PSoC5/cyPm.c **** 
1747:.\Generated_Source\PSoC5/cyPm.c ****         CyVdLvDigitDisable();
 1336              		.loc 1 1747 0
 1337 0096 FFF7FEFF 		bl	CyVdLvDigitDisable
 1338              	.LVL48:
 1339 009a 01E0     		b	.L101
 1340              	.L100:
1748:.\Generated_Source\PSoC5/cyPm.c ****     }
1749:.\Generated_Source\PSoC5/cyPm.c ****     else
1750:.\Generated_Source\PSoC5/cyPm.c ****     {
1751:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lvidEn = CY_PM_DISABLED;
 1341              		.loc 1 1751 0
 1342 009c 83F82500 		strb	r0, [r3, #37]
 1343              	.L101:
1752:.\Generated_Source\PSoC5/cyPm.c ****     }
1753:.\Generated_Source\PSoC5/cyPm.c **** 
1754:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_VD_LVI_HVI_CONTROL_REG & CY_VD_LVIA_EN))
 1344              		.loc 1 1754 0
 1345 00a0 5D4B     		ldr	r3, .L125+20
 1346 00a2 5B4C     		ldr	r4, .L125+12
 1347 00a4 1878     		ldrb	r0, [r3, #0]	@ zero_extendqisi2
 1348 00a6 10F00201 		ands	r1, r0, #2
 1349 00aa 0FD0     		beq	.L102
1755:.\Generated_Source\PSoC5/cyPm.c ****     {
1756:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lviaEn = CY_PM_ENABLED;
 1350              		.loc 1 1756 0
 1351 00ac 0122     		movs	r2, #1
1757:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lviaTrip = CY_VD_LVI_TRIP_REG >> 4u;
 1352              		.loc 1 1757 0
 1353 00ae 5B4B     		ldr	r3, .L125+24
1756:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lviaEn = CY_PM_ENABLED;
 1354              		.loc 1 1756 0
 1355 00b0 84F82720 		strb	r2, [r4, #39]
 1356              		.loc 1 1757 0
 1357 00b4 1878     		ldrb	r0, [r3, #0]	@ zero_extendqisi2
1758:.\Generated_Source\PSoC5/cyPm.c **** 
1759:.\Generated_Source\PSoC5/cyPm.c ****         /* Save state of reset device at a specified Vdda threshold */
1760:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lviaRst = (0u == (CY_VD_PRES_CONTROL_REG & CY_VD_PRESA_EN)) ? \
 1358              		.loc 1 1760 0
 1359 00b6 5A4A     		ldr	r2, .L125+28
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 60


1757:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lviaTrip = CY_VD_LVI_TRIP_REG >> 4u;
 1360              		.loc 1 1757 0
 1361 00b8 0109     		lsrs	r1, r0, #4
 1362 00ba 84F82810 		strb	r1, [r4, #40]
 1363              		.loc 1 1760 0
 1364 00be 1378     		ldrb	r3, [r2, #0]	@ zero_extendqisi2
1761:.\Generated_Source\PSoC5/cyPm.c ****                              CY_PM_DISABLED : CY_PM_ENABLED;
 1365              		.loc 1 1761 0
 1366 00c0 D809     		lsrs	r0, r3, #7
1760:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lviaRst = (0u == (CY_VD_PRES_CONTROL_REG & CY_VD_PRESA_EN)) ? \
 1367              		.loc 1 1760 0
 1368 00c2 84F82B00 		strb	r0, [r4, #43]
1762:.\Generated_Source\PSoC5/cyPm.c **** 
1763:.\Generated_Source\PSoC5/cyPm.c ****         CyVdLvAnalogDisable();
 1369              		.loc 1 1763 0
 1370 00c6 FFF7FEFF 		bl	CyVdLvAnalogDisable
 1371              	.LVL49:
 1372 00ca 01E0     		b	.L103
 1373              	.L102:
1764:.\Generated_Source\PSoC5/cyPm.c ****     }
1765:.\Generated_Source\PSoC5/cyPm.c ****     else
1766:.\Generated_Source\PSoC5/cyPm.c ****     {
1767:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lviaEn = CY_PM_DISABLED;
 1374              		.loc 1 1767 0
 1375 00cc 84F82710 		strb	r1, [r4, #39]
 1376              	.L103:
1768:.\Generated_Source\PSoC5/cyPm.c ****     }
1769:.\Generated_Source\PSoC5/cyPm.c **** 
1770:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_VD_LVI_HVI_CONTROL_REG & CY_VD_HVIA_EN))
 1377              		.loc 1 1770 0
 1378 00d0 514C     		ldr	r4, .L125+20
 1379 00d2 4F4B     		ldr	r3, .L125+12
 1380 00d4 2178     		ldrb	r1, [r4, #0]	@ zero_extendqisi2
 1381 00d6 11F00402 		ands	r2, r1, #4
 1382 00da 05D0     		beq	.L104
1771:.\Generated_Source\PSoC5/cyPm.c ****     {
1772:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.hviaEn = CY_PM_ENABLED;
 1383              		.loc 1 1772 0
 1384 00dc 0120     		movs	r0, #1
 1385 00de 83F82900 		strb	r0, [r3, #41]
1773:.\Generated_Source\PSoC5/cyPm.c ****         CyVdHvAnalogDisable();
 1386              		.loc 1 1773 0
 1387 00e2 FFF7FEFF 		bl	CyVdHvAnalogDisable
 1388              	.LVL50:
 1389 00e6 01E0     		b	.L105
 1390              	.L104:
1774:.\Generated_Source\PSoC5/cyPm.c ****     }
1775:.\Generated_Source\PSoC5/cyPm.c ****     else
1776:.\Generated_Source\PSoC5/cyPm.c ****     {
1777:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.hviaEn = CY_PM_DISABLED;
 1391              		.loc 1 1777 0
 1392 00e8 83F82920 		strb	r2, [r3, #41]
 1393              	.L105:
 1394              	.LBE13:
 1395              	.LBE12:
1294:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupTrim0 = CY_PM_PWRSYS_WAKE_TR0_REG;
 1396              		.loc 1 1294 0
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 61


 1397 00ec 4D4C     		ldr	r4, .L125+32
1288:.\Generated_Source\PSoC5/cyPm.c ****     CyPmHibSlpSaveSet();
 1398              		.loc 1 1288 0
 1399 00ee FFF7FEFF 		bl	CyPmHibSlpSaveSet
 1400              	.LVL51:
1294:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupTrim0 = CY_PM_PWRSYS_WAKE_TR0_REG;
 1401              		.loc 1 1294 0
 1402 00f2 2178     		ldrb	r1, [r4, #0]	@ zero_extendqisi2
 1403 00f4 464B     		ldr	r3, .L125+12
1295:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupTrim1 = CY_PM_PWRSYS_WAKE_TR1_REG;
 1404              		.loc 1 1295 0
 1405 00f6 4C4A     		ldr	r2, .L125+36
1294:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupTrim0 = CY_PM_PWRSYS_WAKE_TR0_REG;
 1406              		.loc 1 1294 0
 1407 00f8 D971     		strb	r1, [r3, #7]
1295:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupTrim1 = CY_PM_PWRSYS_WAKE_TR1_REG;
 1408              		.loc 1 1295 0
 1409 00fa 1078     		ldrb	r0, [r2, #0]	@ zero_extendqisi2
1297:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_PWRSYS_WAKE_TR0_REG = CY_PM_PWRSYS_WAKE_TR0;
 1410              		.loc 1 1297 0
 1411 00fc FF21     		movs	r1, #255
1295:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupTrim1 = CY_PM_PWRSYS_WAKE_TR1_REG;
 1412              		.loc 1 1295 0
 1413 00fe 1872     		strb	r0, [r3, #8]
1297:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_PWRSYS_WAKE_TR0_REG = CY_PM_PWRSYS_WAKE_TR0;
 1414              		.loc 1 1297 0
 1415 0100 2170     		strb	r1, [r4, #0]
1298:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_PWRSYS_WAKE_TR1_REG = CY_PM_PWRSYS_WAKE_TR1;
 1416              		.loc 1 1298 0
 1417 0102 B024     		movs	r4, #176
 1418 0104 1470     		strb	r4, [r2, #0]
 1419              	.LBE14:
 1420              	.LBE15:
1091:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg0 = CY_PM_WAKEUP_CFG0_REG;
 1421              		.loc 1 1091 0
 1422 0106 494A     		ldr	r2, .L125+40
1092:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = CY_PM_WAKEUP_PICU;
 1423              		.loc 1 1092 0
 1424 0108 0421     		movs	r1, #4
1091:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg0 = CY_PM_WAKEUP_CFG0_REG;
 1425              		.loc 1 1091 0
 1426 010a 1078     		ldrb	r0, [r2, #0]	@ zero_extendqisi2
 1427 010c 1871     		strb	r0, [r3, #4]
1092:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = CY_PM_WAKEUP_PICU;
 1428              		.loc 1 1092 0
 1429 010e 1170     		strb	r1, [r2, #0]
1094:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg1 = CY_PM_WAKEUP_CFG1_REG;
 1430              		.loc 1 1094 0
 1431 0110 5478     		ldrb	r4, [r2, #1]	@ zero_extendqisi2
1095:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = 0x00u;
 1432              		.loc 1 1095 0
 1433 0112 0021     		movs	r1, #0
1094:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg1 = CY_PM_WAKEUP_CFG1_REG;
 1434              		.loc 1 1094 0
 1435 0114 5C71     		strb	r4, [r3, #5]
1095:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = 0x00u;
 1436              		.loc 1 1095 0
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 62


 1437 0116 5170     		strb	r1, [r2, #1]
1097:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg2 = CY_PM_WAKEUP_CFG2_REG;
 1438              		.loc 1 1097 0
 1439 0118 9078     		ldrb	r0, [r2, #2]	@ zero_extendqisi2
 1440 011a 9871     		strb	r0, [r3, #6]
1098:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = 0x00u;
 1441              		.loc 1 1098 0
 1442 011c 9170     		strb	r1, [r2, #2]
1097:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg2 = CY_PM_WAKEUP_CFG2_REG;
 1443              		.loc 1 1097 0
 1444 011e 0232     		adds	r2, r2, #2
1102:.\Generated_Source\PSoC5/cyPm.c ****     if(0u == (CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK))
 1445              		.loc 1 1102 0
 1446 0120 A2F5CD74 		sub	r4, r2, #410
 1447 0124 2078     		ldrb	r0, [r4, #0]	@ zero_extendqisi2
 1448 0126 4007     		lsls	r0, r0, #29
 1449 0128 03D1     		bne	.L124
 1450              	.L106:
1105:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.imoActFreq12Mhz = CY_PM_ENABLED;
 1451              		.loc 1 1105 0
 1452 012a 0124     		movs	r4, #1
 1453 012c 83F82D40 		strb	r4, [r3, #45]
 1454 0130 0AE0     		b	.L108
 1455              	.L124:
1110:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.imoActFreq12Mhz = CY_PM_DISABLED;
 1456              		.loc 1 1110 0
 1457 0132 83F82D10 		strb	r1, [r3, #45]
1113:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.imoActFreq = CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK;
 1458              		.loc 1 1113 0
 1459 0136 2178     		ldrb	r1, [r4, #0]	@ zero_extendqisi2
 1460 0138 01F00702 		and	r2, r1, #7
 1461 013c 83F82C20 		strb	r2, [r3, #44]
1116:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_FASTCLK_IMO_CR_REG &= ((uint8) (~CY_PM_FASTCLK_IMO_CR_FREQ_MASK));
 1462              		.loc 1 1116 0
 1463 0140 2378     		ldrb	r3, [r4, #0]	@ zero_extendqisi2
 1464 0142 03F0F800 		and	r0, r3, #248
 1465 0146 2070     		strb	r0, [r4, #0]
 1466              	.L108:
1121:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_MODE_CSR_REG = (CY_PM_MODE_CSR_REG & ((uint8) (~CY_PM_MODE_CSR_MASK))) | CY_PM_MODE_CSR_H
 1467              		.loc 1 1121 0
 1468 0148 2E49     		ldr	r1, .L125
 1469 014a 0A78     		ldrb	r2, [r1, #0]	@ zero_extendqisi2
 1470 014c 02F0F803 		and	r3, r2, #248
 1471 0150 43F00400 		orr	r0, r3, #4
 1472 0154 0870     		strb	r0, [r1, #0]
1124:.\Generated_Source\PSoC5/cyPm.c ****     (void) CY_PM_MODE_CSR_REG;
 1473              		.loc 1 1124 0
 1474 0156 0B78     		ldrb	r3, [r1, #0]	@ zero_extendqisi2
1127:.\Generated_Source\PSoC5/cyPm.c ****     CY_NOP;
 1475              		.loc 1 1127 0
 1476              	@ 1127 ".\Generated_Source\PSoC5\cyPm.c" 1
 1477 0158 00BF     		NOP
 1478              	
 1479              	@ 0 "" 2
1128:.\Generated_Source\PSoC5/cyPm.c ****     CY_NOP;
 1480              		.loc 1 1128 0
 1481              	@ 1128 ".\Generated_Source\PSoC5\cyPm.c" 1
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 63


 1482 015a 00BF     		NOP
 1483              	
 1484              	@ 0 "" 2
1131:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WFI;
 1485              		.loc 1 1131 0
 1486              	@ 1131 ".\Generated_Source\PSoC5\cyPm.c" 1
 1487 015c 30BF     		WFI 
 1488              	
 1489              	@ 0 "" 2
1138:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED != cyPmBackup.imoActFreq12Mhz)
 1490              		.loc 1 1138 0
 1491              		.thumb
 1492 015e 2C4C     		ldr	r4, .L125+12
 1493 0160 94F82D10 		ldrb	r1, [r4, #45]	@ zero_extendqisi2
 1494 0164 0129     		cmp	r1, #1
 1495 0166 07D0     		beq	.L109
1140:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_FASTCLK_IMO_CR_REG  = (CY_PM_FASTCLK_IMO_CR_REG & ((uint8)(~CY_PM_FASTCLK_IMO_CR_FREQ
 1496              		.loc 1 1140 0
 1497 0168 314A     		ldr	r2, .L125+44
 1498 016a 94F82C00 		ldrb	r0, [r4, #44]	@ zero_extendqisi2
 1499 016e 1378     		ldrb	r3, [r2, #0]	@ zero_extendqisi2
 1500 0170 23F00701 		bic	r1, r3, #7
 1501 0174 0143     		orrs	r1, r1, r0
 1502 0176 1170     		strb	r1, [r2, #0]
 1503              	.L109:
 1504              	.LBB16:
 1505              	.LBB17:
 1506              	.LBB18:
 1507              	.LBB19:
1778:.\Generated_Source\PSoC5/cyPm.c ****     }
1779:.\Generated_Source\PSoC5/cyPm.c **** }
1780:.\Generated_Source\PSoC5/cyPm.c **** 
1781:.\Generated_Source\PSoC5/cyPm.c **** 
1782:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************
1783:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmHviLviRestore
1784:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************
1785:.\Generated_Source\PSoC5/cyPm.c **** *
1786:.\Generated_Source\PSoC5/cyPm.c **** * Summary:
1787:.\Generated_Source\PSoC5/cyPm.c **** *  Restores analog and digital LVI and HVI configuration.
1788:.\Generated_Source\PSoC5/cyPm.c **** *
1789:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:
1790:.\Generated_Source\PSoC5/cyPm.c **** *  None
1791:.\Generated_Source\PSoC5/cyPm.c **** *
1792:.\Generated_Source\PSoC5/cyPm.c **** * Return:
1793:.\Generated_Source\PSoC5/cyPm.c **** *  None
1794:.\Generated_Source\PSoC5/cyPm.c **** *
1795:.\Generated_Source\PSoC5/cyPm.c **** * Reentrant:
1796:.\Generated_Source\PSoC5/cyPm.c **** *  No
1797:.\Generated_Source\PSoC5/cyPm.c **** *
1798:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/
1799:.\Generated_Source\PSoC5/cyPm.c **** static void CyPmHviLviRestore(void) 
1800:.\Generated_Source\PSoC5/cyPm.c **** {
1801:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore LVI/HVI configuration */
1802:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmBackup.lvidEn)
 1508              		.loc 1 1802 0
 1509 0178 94F82540 		ldrb	r4, [r4, #37]	@ zero_extendqisi2
 1510 017c 244B     		ldr	r3, .L125+12
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 64


 1511 017e 012C     		cmp	r4, #1
 1512 0180 05D1     		bne	.L110
1803:.\Generated_Source\PSoC5/cyPm.c ****     {
1804:.\Generated_Source\PSoC5/cyPm.c ****         CyVdLvDigitEnable(cyPmBackup.lvidRst, cyPmBackup.lvidTrip);
 1513              		.loc 1 1804 0
 1514 0182 93F82A00 		ldrb	r0, [r3, #42]	@ zero_extendqisi2
 1515 0186 93F82610 		ldrb	r1, [r3, #38]	@ zero_extendqisi2
 1516 018a FFF7FEFF 		bl	CyVdLvDigitEnable
 1517              	.LVL52:
 1518              	.L110:
1805:.\Generated_Source\PSoC5/cyPm.c ****     }
1806:.\Generated_Source\PSoC5/cyPm.c **** 
1807:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmBackup.lviaEn)
 1519              		.loc 1 1807 0
 1520 018e 204C     		ldr	r4, .L125+12
 1521 0190 94F82720 		ldrb	r2, [r4, #39]	@ zero_extendqisi2
 1522 0194 012A     		cmp	r2, #1
 1523 0196 05D1     		bne	.L111
1808:.\Generated_Source\PSoC5/cyPm.c ****     {
1809:.\Generated_Source\PSoC5/cyPm.c ****         CyVdLvAnalogEnable(cyPmBackup.lviaRst, cyPmBackup.lviaTrip);
 1524              		.loc 1 1809 0
 1525 0198 94F82B00 		ldrb	r0, [r4, #43]	@ zero_extendqisi2
 1526 019c 94F82810 		ldrb	r1, [r4, #40]	@ zero_extendqisi2
 1527 01a0 FFF7FEFF 		bl	CyVdLvAnalogEnable
 1528              	.LVL53:
 1529              	.L111:
1810:.\Generated_Source\PSoC5/cyPm.c ****     }
1811:.\Generated_Source\PSoC5/cyPm.c **** 
1812:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmBackup.hviaEn)
 1530              		.loc 1 1812 0
 1531 01a4 94F82910 		ldrb	r1, [r4, #41]	@ zero_extendqisi2
 1532 01a8 0129     		cmp	r1, #1
 1533 01aa 01D1     		bne	.L112
1813:.\Generated_Source\PSoC5/cyPm.c ****     {
1814:.\Generated_Source\PSoC5/cyPm.c ****         CyVdHvAnalogEnable();
 1534              		.loc 1 1814 0
 1535 01ac FFF7FEFF 		bl	CyVdHvAnalogEnable
 1536              	.LVL54:
 1537              	.L112:
 1538              	.LBE19:
 1539              	.LBE18:
1330:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmBackup.ilo1kEnable)
 1540              		.loc 1 1330 0
 1541 01b0 174C     		ldr	r4, .L125+12
1327:.\Generated_Source\PSoC5/cyPm.c ****     CyPmHibSlpRestore();
 1542              		.loc 1 1327 0
 1543 01b2 FFF7FEFF 		bl	CyPmHibSlpRestore
 1544              	.LVL55:
1330:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmBackup.ilo1kEnable)
 1545              		.loc 1 1330 0
 1546 01b6 6078     		ldrb	r0, [r4, #1]	@ zero_extendqisi2
 1547 01b8 0128     		cmp	r0, #1
 1548 01ba 01D1     		bne	.L113
1333:.\Generated_Source\PSoC5/cyPm.c ****         CyILO_Start1K();
 1549              		.loc 1 1333 0
 1550 01bc FFF7FEFF 		bl	CyILO_Start1K
 1551              	.LVL56:
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 65


 1552              	.L113:
1337:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmBackup.ilo100kEnable)
 1553              		.loc 1 1337 0
 1554 01c0 A378     		ldrb	r3, [r4, #2]	@ zero_extendqisi2
 1555 01c2 012B     		cmp	r3, #1
 1556 01c4 01D1     		bne	.L114
1340:.\Generated_Source\PSoC5/cyPm.c ****         CyILO_Start100K();
 1557              		.loc 1 1340 0
 1558 01c6 FFF7FEFF 		bl	CyILO_Start100K
 1559              	.LVL57:
 1560              	.L114:
1344:.\Generated_Source\PSoC5/cyPm.c ****     (void) CyILO_SetPowerMode(cyPmBackup.iloPowerMode);
 1561              		.loc 1 1344 0
 1562 01ca 2078     		ldrb	r0, [r4, #0]	@ zero_extendqisi2
 1563 01cc FFF7FEFF 		bl	CyILO_SetPowerMode
 1564              	.LVL58:
1347:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_DISABLED == cyPmBackup.slpTrBypass)
 1565              		.loc 1 1347 0
 1566 01d0 E278     		ldrb	r2, [r4, #3]	@ zero_extendqisi2
 1567 01d2 22B9     		cbnz	r2, .L115
1350:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_PWRSYS_SLP_TR_REG &= ((uint8)(~CY_PM_PWRSYS_SLP_TR_BYPASS));
 1568              		.loc 1 1350 0
 1569 01d4 0C49     		ldr	r1, .L125+4
 1570 01d6 0878     		ldrb	r0, [r1, #0]	@ zero_extendqisi2
 1571 01d8 00F0EF03 		and	r3, r0, #239
 1572 01dc 0B70     		strb	r3, [r1, #0]
 1573              	.L115:
1357:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_PWRSYS_WAKE_TR0_REG = cyPmBackup.wakeupTrim0;
 1574              		.loc 1 1357 0
 1575 01de 0C48     		ldr	r0, .L125+12
 1576 01e0 104A     		ldr	r2, .L125+32
 1577 01e2 C179     		ldrb	r1, [r0, #7]	@ zero_extendqisi2
 1578 01e4 1170     		strb	r1, [r2, #0]
1358:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_PWRSYS_WAKE_TR1_REG = cyPmBackup.wakeupTrim1;
 1579              		.loc 1 1358 0
 1580 01e6 037A     		ldrb	r3, [r0, #8]	@ zero_extendqisi2
 1581 01e8 5370     		strb	r3, [r2, #1]
 1582              	.LBE17:
 1583              	.LBE16:
1149:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = cyPmBackup.wakeupCfg0;
 1584              		.loc 1 1149 0
 1585 01ea 0179     		ldrb	r1, [r0, #4]	@ zero_extendqisi2
 1586 01ec 0F4A     		ldr	r2, .L125+40
 1587 01ee 1170     		strb	r1, [r2, #0]
1150:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = cyPmBackup.wakeupCfg1;
 1588              		.loc 1 1150 0
 1589 01f0 4379     		ldrb	r3, [r0, #5]	@ zero_extendqisi2
1151:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = cyPmBackup.wakeupCfg2;
 1590              		.loc 1 1151 0
 1591 01f2 1049     		ldr	r1, .L125+48
1150:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = cyPmBackup.wakeupCfg1;
 1592              		.loc 1 1150 0
 1593 01f4 5370     		strb	r3, [r2, #1]
1151:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = cyPmBackup.wakeupCfg2;
 1594              		.loc 1 1151 0
 1595 01f6 8079     		ldrb	r0, [r0, #6]	@ zero_extendqisi2
 1596 01f8 0870     		strb	r0, [r1, #0]
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 66


1154:.\Generated_Source\PSoC5/cyPm.c ****     CyExitCriticalSection(interruptState);
 1597              		.loc 1 1154 0
 1598 01fa 2846     		mov	r0, r5
 1599              	.LVL59:
 1600              	.L123:
1155:.\Generated_Source\PSoC5/cyPm.c **** }
 1601              		.loc 1 1155 0
 1602 01fc BDE83840 		pop	{r3, r4, r5, lr}
1154:.\Generated_Source\PSoC5/cyPm.c ****     CyExitCriticalSection(interruptState);
 1603              		.loc 1 1154 0
 1604 0200 FFF7FEBF 		b	CyExitCriticalSection
 1605              	.LVL60:
 1606              	.L126:
 1607              		.align	2
 1608              	.L125:
 1609 0204 93430040 		.word	1073759123
 1610 0208 83460040 		.word	1073759875
 1611 020c 31430040 		.word	1073759025
 1612 0210 00000000 		.word	.LANCHOR0
 1613 0214 00430040 		.word	1073758976
 1614 0218 F5460040 		.word	1073759989
 1615 021c F4460040 		.word	1073759988
 1616 0220 F7460040 		.word	1073759991
 1617 0224 85460040 		.word	1073759877
 1618 0228 86460040 		.word	1073759878
 1619 022c 98430040 		.word	1073759128
 1620 0230 00420040 		.word	1073758720
 1621 0234 9A430040 		.word	1073759130
 1622              		.cfi_endproc
 1623              	.LFE4:
 1624              		.size	CyPmHibernate, .-CyPmHibernate
 1625              		.section	.text.CyPmReadStatus,"ax",%progbits
 1626              		.align	1
 1627              		.global	CyPmReadStatus
 1628              		.thumb
 1629              		.thumb_func
 1630              		.type	CyPmReadStatus, %function
 1631              	CyPmReadStatus:
 1632              	.LFB5:
1188:.\Generated_Source\PSoC5/cyPm.c **** {
 1633              		.loc 1 1188 0
 1634              		.cfi_startproc
 1635              		@ args = 0, pretend = 0, frame = 0
 1636              		@ frame_needed = 0, uses_anonymous_args = 0
 1637              	.LVL61:
 1638 0000 38B5     		push	{r3, r4, r5, lr}
 1639              	.LCFI6:
 1640              		.cfi_def_cfa_offset 16
 1641              		.cfi_offset 3, -16
 1642              		.cfi_offset 4, -12
 1643              		.cfi_offset 5, -8
 1644              		.cfi_offset 14, -4
1188:.\Generated_Source\PSoC5/cyPm.c **** {
 1645              		.loc 1 1188 0
 1646 0002 0546     		mov	r5, r0
1194:.\Generated_Source\PSoC5/cyPm.c ****     interruptState = CyEnterCriticalSection();
 1647              		.loc 1 1194 0
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 67


 1648 0004 FFF7FEFF 		bl	CyEnterCriticalSection
 1649              	.LVL62:
1197:.\Generated_Source\PSoC5/cyPm.c ****     interruptStatus |= CY_PM_INT_SR_REG;
 1650              		.loc 1 1197 0
 1651 0008 0649     		ldr	r1, .L128
 1652 000a 074B     		ldr	r3, .L128+4
 1653 000c 91F84220 		ldrb	r2, [r1, #66]	@ zero_extendqisi2
 1654 0010 1C78     		ldrb	r4, [r3, #0]	@ zero_extendqisi2
 1655 0012 1443     		orrs	r4, r4, r2
 1656              	.LVL63:
1199:.\Generated_Source\PSoC5/cyPm.c ****     interruptStatus &= ((uint8)(~mask));
 1657              		.loc 1 1199 0
 1658 0014 24EA0505 		bic	r5, r4, r5
 1659 0018 81F84250 		strb	r5, [r1, #66]
1202:.\Generated_Source\PSoC5/cyPm.c ****     CyExitCriticalSection(interruptState);
 1660              		.loc 1 1202 0
 1661 001c FFF7FEFF 		bl	CyExitCriticalSection
 1662              	.LVL64:
1205:.\Generated_Source\PSoC5/cyPm.c **** }
 1663              		.loc 1 1205 0
 1664 0020 2046     		mov	r0, r4
 1665 0022 38BD     		pop	{r3, r4, r5, pc}
 1666              	.L129:
 1667              		.align	2
 1668              	.L128:
 1669 0024 00000000 		.word	.LANCHOR0
 1670 0028 90430040 		.word	1073759120
 1671              		.cfi_endproc
 1672              	.LFE5:
 1673              		.size	CyPmReadStatus, .-CyPmReadStatus
 1674              		.section	.text.CyPmCtwSetInterval,"ax",%progbits
 1675              		.align	1
 1676              		.global	CyPmCtwSetInterval
 1677              		.thumb
 1678              		.thumb_func
 1679              		.type	CyPmCtwSetInterval, %function
 1680              	CyPmCtwSetInterval:
 1681              	.LFB8:
1383:.\Generated_Source\PSoC5/cyPm.c **** {
 1682              		.loc 1 1383 0
 1683              		.cfi_startproc
 1684              		@ args = 0, pretend = 0, frame = 0
 1685              		@ frame_needed = 0, uses_anonymous_args = 0
 1686              	.LVL65:
 1687 0000 38B5     		push	{r3, r4, r5, lr}
 1688              	.LCFI7:
 1689              		.cfi_def_cfa_offset 16
 1690              		.cfi_offset 3, -16
 1691              		.cfi_offset 4, -12
 1692              		.cfi_offset 5, -8
 1693              		.cfi_offset 14, -4
1385:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_CTW_IE));
 1694              		.loc 1 1385 0
 1695 0002 124C     		ldr	r4, .L134
1383:.\Generated_Source\PSoC5/cyPm.c **** {
 1696              		.loc 1 1383 0
 1697 0004 0546     		mov	r5, r0
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 68


1385:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_CTW_IE));
 1698              		.loc 1 1385 0
 1699 0006 2378     		ldrb	r3, [r4, #0]	@ zero_extendqisi2
 1700 0008 03F0F700 		and	r0, r3, #247
 1701              	.LVL66:
 1702 000c 2070     		strb	r0, [r4, #0]
1388:.\Generated_Source\PSoC5/cyPm.c ****     CyILO_Start1K();
 1703              		.loc 1 1388 0
 1704 000e FFF7FEFF 		bl	CyILO_Start1K
 1705              	.LVL67:
1391:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_TW_CFG2_REG & CY_PM_CTW_EN))
 1706              		.loc 1 1391 0
 1707 0012 2178     		ldrb	r1, [r4, #0]	@ zero_extendqisi2
 1708 0014 0E4B     		ldr	r3, .L134+4
 1709 0016 01F00402 		and	r2, r1, #4
 1710 001a D0B2     		uxtb	r0, r2
 1711 001c 60B1     		cbz	r0, .L131
1394:.\Generated_Source\PSoC5/cyPm.c ****         if(CY_PM_TW_CFG1_REG != ctwInterval)
 1712              		.loc 1 1394 0
 1713 001e 1A78     		ldrb	r2, [r3, #0]	@ zero_extendqisi2
 1714 0020 AA42     		cmp	r2, r5
 1715 0022 11D0     		beq	.L130
1397:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_CTW_EN));
 1716              		.loc 1 1397 0
 1717 0024 2178     		ldrb	r1, [r4, #0]	@ zero_extendqisi2
 1718 0026 01F0FB00 		and	r0, r1, #251
 1719 002a 2070     		strb	r0, [r4, #0]
1398:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG1_REG = ctwInterval;
 1720              		.loc 1 1398 0
 1721 002c 1D70     		strb	r5, [r3, #0]
1399:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG2_REG |= CY_PM_CTW_EN;
 1722              		.loc 1 1399 0
 1723 002e 2378     		ldrb	r3, [r4, #0]	@ zero_extendqisi2
 1724 0030 43F00402 		orr	r2, r3, #4
 1725 0034 2270     		strb	r2, [r4, #0]
 1726 0036 38BD     		pop	{r3, r4, r5, pc}
 1727              	.L131:
1405:.\Generated_Source\PSoC5/cyPm.c ****         if(CY_PM_TW_CFG1_REG != ctwInterval)
 1728              		.loc 1 1405 0
 1729 0038 1978     		ldrb	r1, [r3, #0]	@ zero_extendqisi2
 1730 003a A942     		cmp	r1, r5
1408:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG1_REG = ctwInterval;
 1731              		.loc 1 1408 0
 1732 003c 18BF     		it	ne
 1733 003e 1D70     		strbne	r5, [r3, #0]
1412:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_TW_CFG2_REG |= CY_PM_CTW_EN;
 1734              		.loc 1 1412 0
 1735 0040 2078     		ldrb	r0, [r4, #0]	@ zero_extendqisi2
 1736 0042 40F00403 		orr	r3, r0, #4
 1737 0046 2370     		strb	r3, [r4, #0]
 1738              	.L130:
 1739 0048 38BD     		pop	{r3, r4, r5, pc}
 1740              	.L135:
 1741 004a 00BF     		.align	2
 1742              	.L134:
 1743 004c 82430040 		.word	1073759106
 1744 0050 81430040 		.word	1073759105
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 69


 1745              		.cfi_endproc
 1746              	.LFE8:
 1747              		.size	CyPmCtwSetInterval, .-CyPmCtwSetInterval
 1748              		.section	.text.CyPmOppsSet,"ax",%progbits
 1749              		.align	1
 1750              		.global	CyPmOppsSet
 1751              		.thumb
 1752              		.thumb_func
 1753              		.type	CyPmOppsSet, %function
 1754              	CyPmOppsSet:
 1755              	.LFB9:
1435:.\Generated_Source\PSoC5/cyPm.c **** {
 1756              		.loc 1 1435 0
 1757              		.cfi_startproc
 1758              		@ args = 0, pretend = 0, frame = 0
 1759              		@ frame_needed = 0, uses_anonymous_args = 0
 1760 0000 08B5     		push	{r3, lr}
 1761              	.LCFI8:
 1762              		.cfi_def_cfa_offset 8
 1763              		.cfi_offset 3, -8
 1764              		.cfi_offset 14, -4
1437:.\Generated_Source\PSoC5/cyPm.c ****     if(0u == (CY_PM_SLOWCLK_X32_CR_REG & CY_PM_X32_CR_X32EN))
 1765              		.loc 1 1437 0
 1766 0002 084B     		ldr	r3, .L138
 1767 0004 1878     		ldrb	r0, [r3, #0]	@ zero_extendqisi2
 1768 0006 C307     		lsls	r3, r0, #31
 1769 0008 01D4     		bmi	.L137
1440:.\Generated_Source\PSoC5/cyPm.c ****         CyXTAL_32KHZ_Start();
 1770              		.loc 1 1440 0
 1771 000a FFF7FEFF 		bl	CyXTAL_32KHZ_Start
 1772              	.LVL68:
 1773              	.L137:
1444:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_1PPS_IE));
 1774              		.loc 1 1444 0
 1775 000e 0649     		ldr	r1, .L138+4
 1776 0010 0A78     		ldrb	r2, [r1, #0]	@ zero_extendqisi2
 1777 0012 02F0DF03 		and	r3, r2, #223
 1778 0016 0B70     		strb	r3, [r1, #0]
1447:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_TW_CFG2_REG |= CY_PM_1PPS_EN;
 1779              		.loc 1 1447 0
 1780 0018 0878     		ldrb	r0, [r1, #0]	@ zero_extendqisi2
 1781 001a 40F01002 		orr	r2, r0, #16
 1782 001e 0A70     		strb	r2, [r1, #0]
 1783 0020 08BD     		pop	{r3, pc}
 1784              	.L139:
 1785 0022 00BF     		.align	2
 1786              	.L138:
 1787 0024 08430040 		.word	1073758984
 1788 0028 82430040 		.word	1073759106
 1789              		.cfi_endproc
 1790              	.LFE9:
 1791              		.size	CyPmOppsSet, .-CyPmOppsSet
 1792              		.section	.text.CyPmFtwSetInterval,"ax",%progbits
 1793              		.align	1
 1794              		.global	CyPmFtwSetInterval
 1795              		.thumb
 1796              		.thumb_func
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 70


 1797              		.type	CyPmFtwSetInterval, %function
 1798              	CyPmFtwSetInterval:
 1799              	.LFB10:
1472:.\Generated_Source\PSoC5/cyPm.c **** {
 1800              		.loc 1 1472 0
 1801              		.cfi_startproc
 1802              		@ args = 0, pretend = 0, frame = 0
 1803              		@ frame_needed = 0, uses_anonymous_args = 0
 1804              	.LVL69:
 1805 0000 38B5     		push	{r3, r4, r5, lr}
 1806              	.LCFI9:
 1807              		.cfi_def_cfa_offset 16
 1808              		.cfi_offset 3, -16
 1809              		.cfi_offset 4, -12
 1810              		.cfi_offset 5, -8
 1811              		.cfi_offset 14, -4
1474:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_FTW_IE));
 1812              		.loc 1 1474 0
 1813 0002 114C     		ldr	r4, .L144
1472:.\Generated_Source\PSoC5/cyPm.c **** {
 1814              		.loc 1 1472 0
 1815 0004 0546     		mov	r5, r0
1474:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_FTW_IE));
 1816              		.loc 1 1474 0
 1817 0006 2378     		ldrb	r3, [r4, #0]	@ zero_extendqisi2
 1818 0008 03F0FD00 		and	r0, r3, #253
 1819              	.LVL70:
 1820 000c 2070     		strb	r0, [r4, #0]
1477:.\Generated_Source\PSoC5/cyPm.c ****     CyILO_Start100K();
 1821              		.loc 1 1477 0
 1822 000e FFF7FEFF 		bl	CyILO_Start100K
 1823              	.LVL71:
1480:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_TW_CFG2_REG & CY_PM_FTW_EN))
 1824              		.loc 1 1480 0
 1825 0012 2178     		ldrb	r1, [r4, #0]	@ zero_extendqisi2
 1826 0014 0D4B     		ldr	r3, .L144+4
 1827 0016 11F0010F 		tst	r1, #1
 1828 001a 0CD0     		beq	.L141
1483:.\Generated_Source\PSoC5/cyPm.c ****         if(CY_PM_TW_CFG0_REG != ftwInterval)
 1829              		.loc 1 1483 0
 1830 001c 1A78     		ldrb	r2, [r3, #0]	@ zero_extendqisi2
 1831 001e AA42     		cmp	r2, r5
 1832 0020 11D0     		beq	.L140
1486:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_FTW_EN));
 1833              		.loc 1 1486 0
 1834 0022 2078     		ldrb	r0, [r4, #0]	@ zero_extendqisi2
 1835 0024 00F0FE01 		and	r1, r0, #254
 1836 0028 2170     		strb	r1, [r4, #0]
1487:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG0_REG = ftwInterval;
 1837              		.loc 1 1487 0
 1838 002a 1D70     		strb	r5, [r3, #0]
1488:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG2_REG |= CY_PM_FTW_EN;
 1839              		.loc 1 1488 0
 1840 002c 2378     		ldrb	r3, [r4, #0]	@ zero_extendqisi2
 1841 002e 43F00102 		orr	r2, r3, #1
 1842 0032 2270     		strb	r2, [r4, #0]
 1843 0034 38BD     		pop	{r3, r4, r5, pc}
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 71


 1844              	.L141:
1494:.\Generated_Source\PSoC5/cyPm.c ****         if(CY_PM_TW_CFG0_REG != ftwInterval)
 1845              		.loc 1 1494 0
 1846 0036 1878     		ldrb	r0, [r3, #0]	@ zero_extendqisi2
 1847 0038 A842     		cmp	r0, r5
1497:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG0_REG = ftwInterval;
 1848              		.loc 1 1497 0
 1849 003a 18BF     		it	ne
 1850 003c 1D70     		strbne	r5, [r3, #0]
1501:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_TW_CFG2_REG |= CY_PM_FTW_EN;
 1851              		.loc 1 1501 0
 1852 003e 2178     		ldrb	r1, [r4, #0]	@ zero_extendqisi2
 1853 0040 41F00103 		orr	r3, r1, #1
 1854 0044 2370     		strb	r3, [r4, #0]
 1855              	.L140:
 1856 0046 38BD     		pop	{r3, r4, r5, pc}
 1857              	.L145:
 1858              		.align	2
 1859              	.L144:
 1860 0048 82430040 		.word	1073759106
 1861 004c 80430040 		.word	1073759104
 1862              		.cfi_endproc
 1863              	.LFE10:
 1864              		.size	CyPmFtwSetInterval, .-CyPmFtwSetInterval
 1865              		.section	.rodata
 1866              		.set	.LANCHOR1,. + 0
 1867              		.type	cyPmImoFreqReg2Mhz, %object
 1868              		.size	cyPmImoFreqReg2Mhz, 7
 1869              	cyPmImoFreqReg2Mhz:
 1870 0000 0C       		.byte	12
 1871 0001 06       		.byte	6
 1872 0002 18       		.byte	24
 1873 0003 03       		.byte	3
 1874 0004 30       		.byte	48
 1875 0005 3E       		.byte	62
 1876 0006 4A       		.byte	74
 1877              	.LC0:
 1878 0007 02       		.byte	2
 1879 0008 01       		.byte	1
 1880 0009 03       		.byte	3
 1881 000a 00       		.byte	0
 1882 000b 04       		.byte	4
 1883 000c 05       		.byte	5
 1884 000d 06       		.byte	6
 1885              		.bss
 1886              		.align	1
 1887              		.set	.LANCHOR0,. + 0
 1888              		.type	cyPmBackup, %object
 1889              		.size	cyPmBackup, 47
 1890              	cyPmBackup:
 1891 0000 00000000 		.space	47
 1891      00000000 
 1891      00000000 
 1891      00000000 
 1891      00000000 
 1892 002f 00       		.space	1
 1893              		.type	cyPmClockBackup, %object
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 72


 1894              		.size	cyPmClockBackup, 18
 1895              	cyPmClockBackup:
 1896 0030 00000000 		.space	18
 1896      00000000 
 1896      00000000 
 1896      00000000 
 1896      0000
 1897              		.type	interruptStatus.4773, %object
 1898              		.size	interruptStatus.4773, 1
 1899              	interruptStatus.4773:
 1900 0042 00       		.space	1
 1901 0043 00       		.text
 1902              	.Letext0:
 1903              		.file 2 ".\\Generated_Source\\PSoC5\\cytypes.h"
 1904              		.file 3 ".\\Generated_Source\\PSoC5\\cyPm.h"
 1905              		.file 4 ".\\Generated_Source\\PSoC5\\CyFlash.h"
 1906              		.file 5 ".\\Generated_Source\\PSoC5\\CyLib.h"
 1907              		.section	.debug_info,"",%progbits
 1908              	.Ldebug_info0:
 1909 0000 180A0000 		.4byte	0xa18
 1910 0004 0200     		.2byte	0x2
 1911 0006 00000000 		.4byte	.Ldebug_abbrev0
 1912 000a 04       		.byte	0x4
 1913 000b 01       		.uleb128 0x1
 1914 000c 4A040000 		.4byte	.LASF111
 1915 0010 01       		.byte	0x1
 1916 0011 A4010000 		.4byte	.LASF112
 1917 0015 EA010000 		.4byte	.LASF113
 1918 0019 18000000 		.4byte	.Ldebug_ranges0+0x18
 1919 001d 00000000 		.4byte	0
 1920 0021 00000000 		.4byte	0
 1921 0025 00000000 		.4byte	.Ldebug_line0
 1922 0029 02       		.uleb128 0x2
 1923 002a 01       		.byte	0x1
 1924 002b 06       		.byte	0x6
 1925 002c 33010000 		.4byte	.LASF0
 1926 0030 02       		.uleb128 0x2
 1927 0031 01       		.byte	0x1
 1928 0032 08       		.byte	0x8
 1929 0033 A4040000 		.4byte	.LASF1
 1930 0037 02       		.uleb128 0x2
 1931 0038 02       		.byte	0x2
 1932 0039 05       		.byte	0x5
 1933 003a DD040000 		.4byte	.LASF2
 1934 003e 02       		.uleb128 0x2
 1935 003f 02       		.byte	0x2
 1936 0040 07       		.byte	0x7
 1937 0041 D7020000 		.4byte	.LASF3
 1938 0045 02       		.uleb128 0x2
 1939 0046 04       		.byte	0x4
 1940 0047 05       		.byte	0x5
 1941 0048 6C010000 		.4byte	.LASF4
 1942 004c 02       		.uleb128 0x2
 1943 004d 04       		.byte	0x4
 1944 004e 07       		.byte	0x7
 1945 004f 48020000 		.4byte	.LASF5
 1946 0053 02       		.uleb128 0x2
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 73


 1947 0054 08       		.byte	0x8
 1948 0055 05       		.byte	0x5
 1949 0056 25010000 		.4byte	.LASF6
 1950 005a 02       		.uleb128 0x2
 1951 005b 08       		.byte	0x8
 1952 005c 07       		.byte	0x7
 1953 005d A2000000 		.4byte	.LASF7
 1954 0061 03       		.uleb128 0x3
 1955 0062 04       		.byte	0x4
 1956 0063 05       		.byte	0x5
 1957 0064 696E7400 		.ascii	"int\000"
 1958 0068 02       		.uleb128 0x2
 1959 0069 04       		.byte	0x4
 1960 006a 07       		.byte	0x7
 1961 006b 1A020000 		.4byte	.LASF8
 1962 006f 04       		.uleb128 0x4
 1963 0070 87010000 		.4byte	.LASF9
 1964 0074 02       		.byte	0x2
 1965 0075 5B       		.byte	0x5b
 1966 0076 30000000 		.4byte	0x30
 1967 007a 04       		.uleb128 0x4
 1968 007b 14000000 		.4byte	.LASF10
 1969 007f 02       		.byte	0x2
 1970 0080 5C       		.byte	0x5c
 1971 0081 3E000000 		.4byte	0x3e
 1972 0085 04       		.uleb128 0x4
 1973 0086 C4010000 		.4byte	.LASF11
 1974 008a 02       		.byte	0x2
 1975 008b 5D       		.byte	0x5d
 1976 008c 4C000000 		.4byte	0x4c
 1977 0090 02       		.uleb128 0x2
 1978 0091 04       		.byte	0x4
 1979 0092 04       		.byte	0x4
 1980 0093 03040000 		.4byte	.LASF12
 1981 0097 02       		.uleb128 0x2
 1982 0098 08       		.byte	0x8
 1983 0099 04       		.byte	0x4
 1984 009a 9D010000 		.4byte	.LASF13
 1985 009e 02       		.uleb128 0x2
 1986 009f 01       		.byte	0x1
 1987 00a0 08       		.byte	0x8
 1988 00a1 07050000 		.4byte	.LASF14
 1989 00a5 04       		.uleb128 0x4
 1990 00a6 27060000 		.4byte	.LASF15
 1991 00aa 02       		.byte	0x2
 1992 00ab E8       		.byte	0xe8
 1993 00ac 4C000000 		.4byte	0x4c
 1994 00b0 04       		.uleb128 0x4
 1995 00b1 93040000 		.4byte	.LASF16
 1996 00b5 02       		.byte	0x2
 1997 00b6 F0       		.byte	0xf0
 1998 00b7 BB000000 		.4byte	0xbb
 1999 00bb 05       		.uleb128 0x5
 2000 00bc 6F000000 		.4byte	0x6f
 2001 00c0 02       		.uleb128 0x2
 2002 00c1 04       		.byte	0x4
 2003 00c2 07       		.byte	0x7
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 74


 2004 00c3 8C030000 		.4byte	.LASF17
 2005 00c7 06       		.uleb128 0x6
 2006 00c8 61020000 		.4byte	.LASF34
 2007 00cc 12       		.byte	0x12
 2008 00cd 03       		.byte	0x3
 2009 00ce F1       		.byte	0xf1
 2010 00cf A9010000 		.4byte	0x1a9
 2011 00d3 07       		.uleb128 0x7
 2012 00d4 A8030000 		.4byte	.LASF18
 2013 00d8 03       		.byte	0x3
 2014 00d9 F4       		.byte	0xf4
 2015 00da 6F000000 		.4byte	0x6f
 2016 00de 02       		.byte	0x2
 2017 00df 23       		.byte	0x23
 2018 00e0 00       		.uleb128 0
 2019 00e1 07       		.uleb128 0x7
 2020 00e2 AF030000 		.4byte	.LASF19
 2021 00e6 03       		.byte	0x3
 2022 00e7 F5       		.byte	0xf5
 2023 00e8 6F000000 		.4byte	0x6f
 2024 00ec 02       		.byte	0x2
 2025 00ed 23       		.byte	0x23
 2026 00ee 01       		.uleb128 0x1
 2027 00ef 07       		.uleb128 0x7
 2028 00f0 51000000 		.4byte	.LASF20
 2029 00f4 03       		.byte	0x3
 2030 00f5 F6       		.byte	0xf6
 2031 00f6 6F000000 		.4byte	0x6f
 2032 00fa 02       		.byte	0x2
 2033 00fb 23       		.byte	0x23
 2034 00fc 02       		.uleb128 0x2
 2035 00fd 07       		.uleb128 0x7
 2036 00fe 40020000 		.4byte	.LASF21
 2037 0102 03       		.byte	0x3
 2038 0103 F7       		.byte	0xf7
 2039 0104 6F000000 		.4byte	0x6f
 2040 0108 02       		.byte	0x2
 2041 0109 23       		.byte	0x23
 2042 010a 03       		.uleb128 0x3
 2043 010b 07       		.uleb128 0x7
 2044 010c E2000000 		.4byte	.LASF22
 2045 0110 03       		.byte	0x3
 2046 0111 F8       		.byte	0xf8
 2047 0112 6F000000 		.4byte	0x6f
 2048 0116 02       		.byte	0x2
 2049 0117 23       		.byte	0x23
 2050 0118 04       		.uleb128 0x4
 2051 0119 07       		.uleb128 0x7
 2052 011a 30060000 		.4byte	.LASF23
 2053 011e 03       		.byte	0x3
 2054 011f F9       		.byte	0xf9
 2055 0120 6F000000 		.4byte	0x6f
 2056 0124 02       		.byte	0x2
 2057 0125 23       		.byte	0x23
 2058 0126 05       		.uleb128 0x5
 2059 0127 07       		.uleb128 0x7
 2060 0128 7B060000 		.4byte	.LASF24
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 75


 2061 012c 03       		.byte	0x3
 2062 012d FA       		.byte	0xfa
 2063 012e 6F000000 		.4byte	0x6f
 2064 0132 02       		.byte	0x2
 2065 0133 23       		.byte	0x23
 2066 0134 06       		.uleb128 0x6
 2067 0135 07       		.uleb128 0x7
 2068 0136 F9030000 		.4byte	.LASF25
 2069 013a 03       		.byte	0x3
 2070 013b FB       		.byte	0xfb
 2071 013c 6F000000 		.4byte	0x6f
 2072 0140 02       		.byte	0x2
 2073 0141 23       		.byte	0x23
 2074 0142 07       		.uleb128 0x7
 2075 0143 07       		.uleb128 0x7
 2076 0144 5A030000 		.4byte	.LASF26
 2077 0148 03       		.byte	0x3
 2078 0149 FC       		.byte	0xfc
 2079 014a 6F000000 		.4byte	0x6f
 2080 014e 02       		.byte	0x2
 2081 014f 23       		.byte	0x23
 2082 0150 08       		.uleb128 0x8
 2083 0151 07       		.uleb128 0x7
 2084 0152 66010000 		.4byte	.LASF27
 2085 0156 03       		.byte	0x3
 2086 0157 FD       		.byte	0xfd
 2087 0158 6F000000 		.4byte	0x6f
 2088 015c 02       		.byte	0x2
 2089 015d 23       		.byte	0x23
 2090 015e 09       		.uleb128 0x9
 2091 015f 07       		.uleb128 0x7
 2092 0160 85000000 		.4byte	.LASF28
 2093 0164 03       		.byte	0x3
 2094 0165 FE       		.byte	0xfe
 2095 0166 6F000000 		.4byte	0x6f
 2096 016a 02       		.byte	0x2
 2097 016b 23       		.byte	0x23
 2098 016c 0A       		.uleb128 0xa
 2099 016d 07       		.uleb128 0x7
 2100 016e 3F010000 		.4byte	.LASF29
 2101 0172 03       		.byte	0x3
 2102 0173 FF       		.byte	0xff
 2103 0174 7A000000 		.4byte	0x7a
 2104 0178 02       		.byte	0x2
 2105 0179 23       		.byte	0x23
 2106 017a 0C       		.uleb128 0xc
 2107 017b 08       		.uleb128 0x8
 2108 017c C2040000 		.4byte	.LASF30
 2109 0180 03       		.byte	0x3
 2110 0181 0001     		.2byte	0x100
 2111 0183 6F000000 		.4byte	0x6f
 2112 0187 02       		.byte	0x2
 2113 0188 23       		.byte	0x23
 2114 0189 0E       		.uleb128 0xe
 2115 018a 08       		.uleb128 0x8
 2116 018b CB010000 		.4byte	.LASF31
 2117 018f 03       		.byte	0x3
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 76


 2118 0190 0101     		.2byte	0x101
 2119 0192 6F000000 		.4byte	0x6f
 2120 0196 02       		.byte	0x2
 2121 0197 23       		.byte	0x23
 2122 0198 0F       		.uleb128 0xf
 2123 0199 08       		.uleb128 0x8
 2124 019a AA050000 		.4byte	.LASF32
 2125 019e 03       		.byte	0x3
 2126 019f 0201     		.2byte	0x102
 2127 01a1 6F000000 		.4byte	0x6f
 2128 01a5 02       		.byte	0x2
 2129 01a6 23       		.byte	0x23
 2130 01a7 10       		.uleb128 0x10
 2131 01a8 00       		.byte	0
 2132 01a9 09       		.uleb128 0x9
 2133 01aa BD020000 		.4byte	.LASF33
 2134 01ae 03       		.byte	0x3
 2135 01af 0401     		.2byte	0x104
 2136 01b1 C7000000 		.4byte	0xc7
 2137 01b5 0A       		.uleb128 0xa
 2138 01b6 8E020000 		.4byte	.LASF35
 2139 01ba 2F       		.byte	0x2f
 2140 01bb 03       		.byte	0x3
 2141 01bc 0701     		.2byte	0x107
 2142 01be EF020000 		.4byte	0x2ef
 2143 01c2 08       		.uleb128 0x8
 2144 01c3 18010000 		.4byte	.LASF36
 2145 01c7 03       		.byte	0x3
 2146 01c8 0901     		.2byte	0x109
 2147 01ca 6F000000 		.4byte	0x6f
 2148 01ce 02       		.byte	0x2
 2149 01cf 23       		.byte	0x23
 2150 01d0 00       		.uleb128 0
 2151 01d1 08       		.uleb128 0x8
 2152 01d2 D1040000 		.4byte	.LASF37
 2153 01d6 03       		.byte	0x3
 2154 01d7 0A01     		.2byte	0x10a
 2155 01d9 6F000000 		.4byte	0x6f
 2156 01dd 02       		.byte	0x2
 2157 01de 23       		.byte	0x23
 2158 01df 01       		.uleb128 0x1
 2159 01e0 08       		.uleb128 0x8
 2160 01e1 F9040000 		.4byte	.LASF38
 2161 01e5 03       		.byte	0x3
 2162 01e6 0B01     		.2byte	0x10b
 2163 01e8 6F000000 		.4byte	0x6f
 2164 01ec 02       		.byte	0x2
 2165 01ed 23       		.byte	0x23
 2166 01ee 02       		.uleb128 0x2
 2167 01ef 08       		.uleb128 0x8
 2168 01f0 80030000 		.4byte	.LASF39
 2169 01f4 03       		.byte	0x3
 2170 01f5 0D01     		.2byte	0x10d
 2171 01f7 6F000000 		.4byte	0x6f
 2172 01fb 02       		.byte	0x2
 2173 01fc 23       		.byte	0x23
 2174 01fd 03       		.uleb128 0x3
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 77


 2175 01fe 08       		.uleb128 0x8
 2176 01ff 20030000 		.4byte	.LASF40
 2177 0203 03       		.byte	0x3
 2178 0204 1701     		.2byte	0x117
 2179 0206 6F000000 		.4byte	0x6f
 2180 020a 02       		.byte	0x2
 2181 020b 23       		.byte	0x23
 2182 020c 04       		.uleb128 0x4
 2183 020d 08       		.uleb128 0x8
 2184 020e 2B030000 		.4byte	.LASF41
 2185 0212 03       		.byte	0x3
 2186 0213 1801     		.2byte	0x118
 2187 0215 6F000000 		.4byte	0x6f
 2188 0219 02       		.byte	0x2
 2189 021a 23       		.byte	0x23
 2190 021b 05       		.uleb128 0x5
 2191 021c 08       		.uleb128 0x8
 2192 021d 36030000 		.4byte	.LASF42
 2193 0221 03       		.byte	0x3
 2194 0222 1901     		.2byte	0x119
 2195 0224 6F000000 		.4byte	0x6f
 2196 0228 02       		.byte	0x2
 2197 0229 23       		.byte	0x23
 2198 022a 06       		.uleb128 0x6
 2199 022b 08       		.uleb128 0x8
 2200 022c 39000000 		.4byte	.LASF43
 2201 0230 03       		.byte	0x3
 2202 0231 1B01     		.2byte	0x11b
 2203 0233 6F000000 		.4byte	0x6f
 2204 0237 02       		.byte	0x2
 2205 0238 23       		.byte	0x23
 2206 0239 07       		.uleb128 0x7
 2207 023a 08       		.uleb128 0x8
 2208 023b 45000000 		.4byte	.LASF44
 2209 023f 03       		.byte	0x3
 2210 0240 1C01     		.2byte	0x11c
 2211 0242 6F000000 		.4byte	0x6f
 2212 0246 02       		.byte	0x2
 2213 0247 23       		.byte	0x23
 2214 0248 08       		.uleb128 0x8
 2215 0249 08       		.uleb128 0x8
 2216 024a 27020000 		.4byte	.LASF45
 2217 024e 03       		.byte	0x3
 2218 024f 1E01     		.2byte	0x11e
 2219 0251 EF020000 		.4byte	0x2ef
 2220 0255 02       		.byte	0x2
 2221 0256 23       		.byte	0x23
 2222 0257 09       		.uleb128 0x9
 2223 0258 08       		.uleb128 0x8
 2224 0259 5A020000 		.4byte	.LASF46
 2225 025d 03       		.byte	0x3
 2226 025e 2101     		.2byte	0x121
 2227 0260 6F000000 		.4byte	0x6f
 2228 0264 02       		.byte	0x2
 2229 0265 23       		.byte	0x23
 2230 0266 25       		.uleb128 0x25
 2231 0267 08       		.uleb128 0x8
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 78


 2232 0268 72060000 		.4byte	.LASF47
 2233 026c 03       		.byte	0x3
 2234 026d 2201     		.2byte	0x122
 2235 026f 6F000000 		.4byte	0x6f
 2236 0273 02       		.byte	0x2
 2237 0274 23       		.byte	0x23
 2238 0275 26       		.uleb128 0x26
 2239 0276 08       		.uleb128 0x8
 2240 0277 D1050000 		.4byte	.LASF48
 2241 027b 03       		.byte	0x3
 2242 027c 2301     		.2byte	0x123
 2243 027e 6F000000 		.4byte	0x6f
 2244 0282 02       		.byte	0x2
 2245 0283 23       		.byte	0x23
 2246 0284 27       		.uleb128 0x27
 2247 0285 08       		.uleb128 0x8
 2248 0286 D9000000 		.4byte	.LASF49
 2249 028a 03       		.byte	0x3
 2250 028b 2401     		.2byte	0x124
 2251 028d 6F000000 		.4byte	0x6f
 2252 0291 02       		.byte	0x2
 2253 0292 23       		.byte	0x23
 2254 0293 28       		.uleb128 0x28
 2255 0294 08       		.uleb128 0x8
 2256 0295 FF000000 		.4byte	.LASF50
 2257 0299 03       		.byte	0x3
 2258 029a 2501     		.2byte	0x125
 2259 029c 6F000000 		.4byte	0x6f
 2260 02a0 02       		.byte	0x2
 2261 02a1 23       		.byte	0x23
 2262 02a2 29       		.uleb128 0x29
 2263 02a3 08       		.uleb128 0x8
 2264 02a4 29040000 		.4byte	.LASF51
 2265 02a8 03       		.byte	0x3
 2266 02a9 2601     		.2byte	0x126
 2267 02ab 6F000000 		.4byte	0x6f
 2268 02af 02       		.byte	0x2
 2269 02b0 23       		.byte	0x23
 2270 02b1 2A       		.uleb128 0x2a
 2271 02b2 08       		.uleb128 0x8
 2272 02b3 40060000 		.4byte	.LASF52
 2273 02b7 03       		.byte	0x3
 2274 02b8 2701     		.2byte	0x127
 2275 02ba 6F000000 		.4byte	0x6f
 2276 02be 02       		.byte	0x2
 2277 02bf 23       		.byte	0x23
 2278 02c0 2B       		.uleb128 0x2b
 2279 02c1 08       		.uleb128 0x8
 2280 02c2 0F020000 		.4byte	.LASF53
 2281 02c6 03       		.byte	0x3
 2282 02c7 2901     		.2byte	0x129
 2283 02c9 6F000000 		.4byte	0x6f
 2284 02cd 02       		.byte	0x2
 2285 02ce 23       		.byte	0x23
 2286 02cf 2C       		.uleb128 0x2c
 2287 02d0 08       		.uleb128 0x8
 2288 02d1 34050000 		.4byte	.LASF54
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 79


 2289 02d5 03       		.byte	0x3
 2290 02d6 2A01     		.2byte	0x12a
 2291 02d8 6F000000 		.4byte	0x6f
 2292 02dc 02       		.byte	0x2
 2293 02dd 23       		.byte	0x23
 2294 02de 2D       		.uleb128 0x2d
 2295 02df 08       		.uleb128 0x8
 2296 02e0 4E030000 		.4byte	.LASF55
 2297 02e4 03       		.byte	0x3
 2298 02e5 2C01     		.2byte	0x12c
 2299 02e7 6F000000 		.4byte	0x6f
 2300 02eb 02       		.byte	0x2
 2301 02ec 23       		.byte	0x23
 2302 02ed 2E       		.uleb128 0x2e
 2303 02ee 00       		.byte	0
 2304 02ef 0B       		.uleb128 0xb
 2305 02f0 6F000000 		.4byte	0x6f
 2306 02f4 FF020000 		.4byte	0x2ff
 2307 02f8 0C       		.uleb128 0xc
 2308 02f9 C0000000 		.4byte	0xc0
 2309 02fd 1B       		.byte	0x1b
 2310 02fe 00       		.byte	0
 2311 02ff 09       		.uleb128 0x9
 2312 0300 5E000000 		.4byte	.LASF56
 2313 0304 03       		.byte	0x3
 2314 0305 2E01     		.2byte	0x12e
 2315 0307 B5010000 		.4byte	0x1b5
 2316 030b 0D       		.uleb128 0xd
 2317 030c E7040000 		.4byte	.LASF57
 2318 0310 01       		.byte	0x1
 2319 0311 F805     		.2byte	0x5f8
 2320 0313 01       		.byte	0x1
 2321 0314 00000000 		.4byte	.LFB11
 2322 0318 64010000 		.4byte	.LFE11
 2323 031c 00000000 		.4byte	.LLST0
 2324 0320 01       		.byte	0x1
 2325 0321 0E       		.uleb128 0xe
 2326 0322 27000000 		.4byte	.LASF58
 2327 0326 01       		.byte	0x1
 2328 0327 7B06     		.2byte	0x67b
 2329 0329 01       		.byte	0x1
 2330 032a 00000000 		.4byte	.LFB12
 2331 032e A4000000 		.4byte	.LFE12
 2332 0332 02       		.byte	0x2
 2333 0333 7D       		.byte	0x7d
 2334 0334 00       		.sleb128 0
 2335 0335 01       		.byte	0x1
 2336 0336 0F       		.uleb128 0xf
 2337 0337 01       		.byte	0x1
 2338 0338 64030000 		.4byte	.LASF59
 2339 033c 01       		.byte	0x1
 2340 033d 50       		.byte	0x50
 2341 033e 01       		.byte	0x1
 2342 033f 00000000 		.4byte	.LFB0
 2343 0343 B4010000 		.4byte	.LFE0
 2344 0347 20000000 		.4byte	.LLST1
 2345 034b 01       		.byte	0x1
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 80


 2346 034c F1030000 		.4byte	0x3f1
 2347 0350 10       		.uleb128 0x10
 2348 0351 38000000 		.4byte	.LVL0
 2349 0355 67080000 		.4byte	0x867
 2350 0359 64030000 		.4byte	0x364
 2351 035d 11       		.uleb128 0x11
 2352 035e 01       		.byte	0x1
 2353 035f 50       		.byte	0x50
 2354 0360 02       		.byte	0x2
 2355 0361 08       		.byte	0x8
 2356 0362 37       		.byte	0x37
 2357 0363 00       		.byte	0
 2358 0364 10       		.uleb128 0x10
 2359 0365 62000000 		.4byte	.LVL1
 2360 0369 7B080000 		.4byte	0x87b
 2361 036d 77030000 		.4byte	0x377
 2362 0371 11       		.uleb128 0x11
 2363 0372 01       		.byte	0x1
 2364 0373 50       		.byte	0x50
 2365 0374 01       		.byte	0x1
 2366 0375 34       		.byte	0x34
 2367 0376 00       		.byte	0
 2368 0377 12       		.uleb128 0x12
 2369 0378 80000000 		.4byte	.LVL2
 2370 037c 8F080000 		.4byte	0x88f
 2371 0380 10       		.uleb128 0x10
 2372 0381 AA000000 		.4byte	.LVL3
 2373 0385 A3080000 		.4byte	0x8a3
 2374 0389 93030000 		.4byte	0x393
 2375 038d 11       		.uleb128 0x11
 2376 038e 01       		.byte	0x1
 2377 038f 50       		.byte	0x50
 2378 0390 01       		.byte	0x1
 2379 0391 30       		.byte	0x30
 2380 0392 00       		.byte	0
 2381 0393 12       		.uleb128 0x12
 2382 0394 DC000000 		.4byte	.LVL4
 2383 0398 B7080000 		.4byte	0x8b7
 2384 039c 10       		.uleb128 0x10
 2385 039d EE000000 		.4byte	.LVL5
 2386 03a1 C1080000 		.4byte	0x8c1
 2387 03a5 AF030000 		.4byte	0x3af
 2388 03a9 11       		.uleb128 0x11
 2389 03aa 01       		.byte	0x1
 2390 03ab 50       		.byte	0x50
 2391 03ac 01       		.byte	0x1
 2392 03ad 30       		.byte	0x30
 2393 03ae 00       		.byte	0
 2394 03af 10       		.uleb128 0x10
 2395 03b0 04010000 		.4byte	.LVL6
 2396 03b4 D5080000 		.4byte	0x8d5
 2397 03b8 C2030000 		.4byte	0x3c2
 2398 03bc 11       		.uleb128 0x11
 2399 03bd 01       		.byte	0x1
 2400 03be 50       		.byte	0x50
 2401 03bf 01       		.byte	0x1
 2402 03c0 30       		.byte	0x30
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 81


 2403 03c1 00       		.byte	0
 2404 03c2 10       		.uleb128 0x10
 2405 03c3 1E010000 		.4byte	.LVL7
 2406 03c7 E9080000 		.4byte	0x8e9
 2407 03cb D5030000 		.4byte	0x3d5
 2408 03cf 11       		.uleb128 0x11
 2409 03d0 01       		.byte	0x1
 2410 03d1 50       		.byte	0x50
 2411 03d2 01       		.byte	0x1
 2412 03d3 30       		.byte	0x30
 2413 03d4 00       		.byte	0
 2414 03d5 12       		.uleb128 0x12
 2415 03d6 2E010000 		.4byte	.LVL8
 2416 03da 67080000 		.4byte	0x867
 2417 03de 12       		.uleb128 0x12
 2418 03df 44010000 		.4byte	.LVL9
 2419 03e3 FD080000 		.4byte	0x8fd
 2420 03e7 12       		.uleb128 0x12
 2421 03e8 60010000 		.4byte	.LVL10
 2422 03ec 07090000 		.4byte	0x907
 2423 03f0 00       		.byte	0
 2424 03f1 13       		.uleb128 0x13
 2425 03f2 01       		.byte	0x1
 2426 03f3 90000000 		.4byte	.LASF60
 2427 03f7 01       		.byte	0x1
 2428 03f8 0001     		.2byte	0x100
 2429 03fa 01       		.byte	0x1
 2430 03fb 00000000 		.4byte	.LFB1
 2431 03ff 08020000 		.4byte	.LFE1
 2432 0403 40000000 		.4byte	.LLST2
 2433 0407 01       		.byte	0x1
 2434 0408 3B050000 		.4byte	0x53b
 2435 040c 14       		.uleb128 0x14
 2436 040d CA050000 		.4byte	.LASF61
 2437 0411 01       		.byte	0x1
 2438 0412 0201     		.2byte	0x102
 2439 0414 A5000000 		.4byte	0xa5
 2440 0418 10       		.byte	0x10
 2441 0419 15       		.uleb128 0x15
 2442 041a 6900     		.ascii	"i\000"
 2443 041c 01       		.byte	0x1
 2444 041d 0301     		.2byte	0x103
 2445 041f 7A000000 		.4byte	0x7a
 2446 0423 16       		.uleb128 0x16
 2447 0424 41030000 		.4byte	.LASF62
 2448 0428 01       		.byte	0x1
 2449 0429 0401     		.2byte	0x104
 2450 042b 7A000000 		.4byte	0x7a
 2451 042f 60000000 		.4byte	.LLST3
 2452 0433 17       		.uleb128 0x17
 2453 0434 95030000 		.4byte	.LASF63
 2454 0438 01       		.byte	0x1
 2455 0439 0801     		.2byte	0x108
 2456 043b 4B050000 		.4byte	0x54b
 2457 043f 02       		.byte	0x2
 2458 0440 91       		.byte	0x91
 2459 0441 70       		.sleb128 -16
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 82


 2460 0442 10       		.uleb128 0x10
 2461 0443 34000000 		.4byte	.LVL12
 2462 0447 11090000 		.4byte	0x911
 2463 044b 66040000 		.4byte	0x466
 2464 044f 11       		.uleb128 0x11
 2465 0450 01       		.byte	0x1
 2466 0451 50       		.byte	0x50
 2467 0452 12       		.byte	0x12
 2468 0453 74       		.byte	0x74
 2469 0454 00       		.sleb128 0
 2470 0455 37       		.byte	0x37
 2471 0456 1A       		.byte	0x1a
 2472 0457 03       		.byte	0x3
 2473 0458 00000000 		.4byte	.LANCHOR1
 2474 045c 22       		.byte	0x22
 2475 045d 94       		.byte	0x94
 2476 045e 01       		.byte	0x1
 2477 045f 08       		.byte	0x8
 2478 0460 FF       		.byte	0xff
 2479 0461 1A       		.byte	0x1a
 2480 0462 08       		.byte	0x8
 2481 0463 4B       		.byte	0x4b
 2482 0464 1E       		.byte	0x1e
 2483 0465 00       		.byte	0
 2484 0466 10       		.uleb128 0x10
 2485 0467 50000000 		.4byte	.LVL13
 2486 046b 67080000 		.4byte	0x867
 2487 046f 7A040000 		.4byte	0x47a
 2488 0473 11       		.uleb128 0x11
 2489 0474 01       		.byte	0x1
 2490 0475 50       		.byte	0x50
 2491 0476 02       		.byte	0x2
 2492 0477 08       		.byte	0x8
 2493 0478 37       		.byte	0x37
 2494 0479 00       		.byte	0
 2495 047a 10       		.uleb128 0x10
 2496 047b 62000000 		.4byte	.LVL14
 2497 047f 25090000 		.4byte	0x925
 2498 0483 8D040000 		.4byte	0x48d
 2499 0487 11       		.uleb128 0x11
 2500 0488 01       		.byte	0x1
 2501 0489 50       		.byte	0x50
 2502 048a 01       		.byte	0x1
 2503 048b 30       		.byte	0x30
 2504 048c 00       		.byte	0
 2505 048d 12       		.uleb128 0x12
 2506 048e 7C000000 		.4byte	.LVL16
 2507 0492 11090000 		.4byte	0x911
 2508 0496 12       		.uleb128 0x12
 2509 0497 9E000000 		.4byte	.LVL17
 2510 049b C1080000 		.4byte	0x8c1
 2511 049f 12       		.uleb128 0x12
 2512 04a0 A6000000 		.4byte	.LVL18
 2513 04a4 D5080000 		.4byte	0x8d5
 2514 04a8 10       		.uleb128 0x10
 2515 04a9 CC000000 		.4byte	.LVL19
 2516 04ad 7B080000 		.4byte	0x87b
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 83


 2517 04b1 BB040000 		.4byte	0x4bb
 2518 04b5 11       		.uleb128 0x11
 2519 04b6 01       		.byte	0x1
 2520 04b7 50       		.byte	0x50
 2521 04b8 01       		.byte	0x1
 2522 04b9 38       		.byte	0x38
 2523 04ba 00       		.byte	0
 2524 04bb 12       		.uleb128 0x12
 2525 04bc DE000000 		.4byte	.LVL20
 2526 04c0 7B080000 		.4byte	0x87b
 2527 04c4 10       		.uleb128 0x10
 2528 04c5 16010000 		.4byte	.LVL21
 2529 04c9 8F080000 		.4byte	0x88f
 2530 04cd DA040000 		.4byte	0x4da
 2531 04d1 11       		.uleb128 0x11
 2532 04d2 01       		.byte	0x1
 2533 04d3 50       		.byte	0x50
 2534 04d4 04       		.byte	0x4
 2535 04d5 74       		.byte	0x74
 2536 04d6 00       		.sleb128 0
 2537 04d7 40       		.byte	0x40
 2538 04d8 1A       		.byte	0x1a
 2539 04d9 00       		.byte	0
 2540 04da 12       		.uleb128 0x12
 2541 04db 2E010000 		.4byte	.LVL22
 2542 04df 3D090000 		.4byte	0x93d
 2543 04e3 12       		.uleb128 0x12
 2544 04e4 38010000 		.4byte	.LVL23
 2545 04e8 A3080000 		.4byte	0x8a3
 2546 04ec 12       		.uleb128 0x12
 2547 04ed 44010000 		.4byte	.LVL24
 2548 04f1 47090000 		.4byte	0x947
 2549 04f5 10       		.uleb128 0x10
 2550 04f6 70010000 		.4byte	.LVL25
 2551 04fa 51090000 		.4byte	0x951
 2552 04fe 08050000 		.4byte	0x508
 2553 0502 11       		.uleb128 0x11
 2554 0503 01       		.byte	0x1
 2555 0504 50       		.byte	0x50
 2556 0505 01       		.byte	0x1
 2557 0506 30       		.byte	0x30
 2558 0507 00       		.byte	0
 2559 0508 10       		.uleb128 0x10
 2560 0509 84010000 		.4byte	.LVL26
 2561 050d 11090000 		.4byte	0x911
 2562 0511 1F050000 		.4byte	0x51f
 2563 0515 11       		.uleb128 0x11
 2564 0516 01       		.byte	0x1
 2565 0517 50       		.byte	0x50
 2566 0518 05       		.byte	0x5
 2567 0519 74       		.byte	0x74
 2568 051a 00       		.sleb128 0
 2569 051b 08       		.byte	0x8
 2570 051c FA       		.byte	0xfa
 2571 051d 1E       		.byte	0x1e
 2572 051e 00       		.byte	0
 2573 051f 12       		.uleb128 0x12
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 84


 2574 0520 9E010000 		.4byte	.LVL27
 2575 0524 C1080000 		.4byte	0x8c1
 2576 0528 12       		.uleb128 0x12
 2577 0529 A6010000 		.4byte	.LVL28
 2578 052d D5080000 		.4byte	0x8d5
 2579 0531 12       		.uleb128 0x12
 2580 0532 BE010000 		.4byte	.LVL32
 2581 0536 E9080000 		.4byte	0x8e9
 2582 053a 00       		.byte	0
 2583 053b 0B       		.uleb128 0xb
 2584 053c 6F000000 		.4byte	0x6f
 2585 0540 4B050000 		.4byte	0x54b
 2586 0544 0C       		.uleb128 0xc
 2587 0545 C0000000 		.4byte	0xc0
 2588 0549 06       		.byte	0x6
 2589 054a 00       		.byte	0
 2590 054b 18       		.uleb128 0x18
 2591 054c 3B050000 		.4byte	0x53b
 2592 0550 13       		.uleb128 0x13
 2593 0551 01       		.byte	0x1
 2594 0552 31040000 		.4byte	.LASF64
 2595 0556 01       		.byte	0x1
 2596 0557 4702     		.2byte	0x247
 2597 0559 01       		.byte	0x1
 2598 055a 00000000 		.4byte	.LFB2
 2599 055e 60000000 		.4byte	.LFE2
 2600 0562 8C000000 		.4byte	.LLST4
 2601 0566 01       		.byte	0x1
 2602 0567 8C050000 		.4byte	0x58c
 2603 056b 19       		.uleb128 0x19
 2604 056c 09060000 		.4byte	.LASF65
 2605 0570 01       		.byte	0x1
 2606 0571 4702     		.2byte	0x247
 2607 0573 7A000000 		.4byte	0x7a
 2608 0577 AC000000 		.4byte	.LLST5
 2609 057b 19       		.uleb128 0x19
 2610 057c C6030000 		.4byte	.LASF66
 2611 0580 01       		.byte	0x1
 2612 0581 4702     		.2byte	0x247
 2613 0583 7A000000 		.4byte	0x7a
 2614 0587 CD000000 		.4byte	.LLST6
 2615 058b 00       		.byte	0
 2616 058c 13       		.uleb128 0x13
 2617 058d 01       		.byte	0x1
 2618 058e 1F040000 		.4byte	.LASF67
 2619 0592 01       		.byte	0x1
 2620 0593 1303     		.2byte	0x313
 2621 0595 01       		.byte	0x1
 2622 0596 00000000 		.4byte	.LFB3
 2623 059a D8000000 		.4byte	.LFE3
 2624 059e EE000000 		.4byte	.LLST7
 2625 05a2 01       		.byte	0x1
 2626 05a3 FD050000 		.4byte	0x5fd
 2627 05a7 19       		.uleb128 0x19
 2628 05a8 09060000 		.4byte	.LASF65
 2629 05ac 01       		.byte	0x1
 2630 05ad 1303     		.2byte	0x313
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 85


 2631 05af 6F000000 		.4byte	0x6f
 2632 05b3 0E010000 		.4byte	.LLST8
 2633 05b7 19       		.uleb128 0x19
 2634 05b8 C6030000 		.4byte	.LASF66
 2635 05bc 01       		.byte	0x1
 2636 05bd 1303     		.2byte	0x313
 2637 05bf 7A000000 		.4byte	0x7a
 2638 05c3 2F010000 		.4byte	.LLST9
 2639 05c7 16       		.uleb128 0x16
 2640 05c8 49010000 		.4byte	.LASF68
 2641 05cc 01       		.byte	0x1
 2642 05cd 1503     		.2byte	0x315
 2643 05cf 6F000000 		.4byte	0x6f
 2644 05d3 50010000 		.4byte	.LLST10
 2645 05d7 12       		.uleb128 0x12
 2646 05d8 08000000 		.4byte	.LVL37
 2647 05dc 69090000 		.4byte	0x969
 2648 05e0 12       		.uleb128 0x12
 2649 05e1 22000000 		.4byte	.LVL40
 2650 05e5 0B030000 		.4byte	0x30b
 2651 05e9 12       		.uleb128 0x12
 2652 05ea A2000000 		.4byte	.LVL41
 2653 05ee 21030000 		.4byte	0x321
 2654 05f2 1A       		.uleb128 0x1a
 2655 05f3 BE000000 		.4byte	.LVL43
 2656 05f7 01       		.byte	0x1
 2657 05f8 77090000 		.4byte	0x977
 2658 05fc 00       		.byte	0
 2659 05fd 1B       		.uleb128 0x1b
 2660 05fe FA050000 		.4byte	.LASF69
 2661 0602 01       		.byte	0x1
 2662 0603 CF04     		.2byte	0x4cf
 2663 0605 01       		.byte	0x1
 2664 0606 01       		.byte	0x1
 2665 0607 1B       		.uleb128 0x1b
 2666 0608 B9000000 		.4byte	.LASF70
 2667 060c 01       		.byte	0x1
 2668 060d C806     		.2byte	0x6c8
 2669 060f 01       		.byte	0x1
 2670 0610 01       		.byte	0x1
 2671 0611 1B       		.uleb128 0x1b
 2672 0612 DB010000 		.4byte	.LASF71
 2673 0616 01       		.byte	0x1
 2674 0617 2905     		.2byte	0x529
 2675 0619 01       		.byte	0x1
 2676 061a 01       		.byte	0x1
 2677 061b 1B       		.uleb128 0x1b
 2678 061c 75010000 		.4byte	.LASF72
 2679 0620 01       		.byte	0x1
 2680 0621 0707     		.2byte	0x707
 2681 0623 01       		.byte	0x1
 2682 0624 01       		.byte	0x1
 2683 0625 13       		.uleb128 0x13
 2684 0626 01       		.byte	0x1
 2685 0627 44050000 		.4byte	.LASF73
 2686 062b 01       		.byte	0x1
 2687 062c 2304     		.2byte	0x423
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 86


 2688 062e 01       		.byte	0x1
 2689 062f 00000000 		.4byte	.LFB4
 2690 0633 38020000 		.4byte	.LFE4
 2691 0637 84010000 		.4byte	.LLST11
 2692 063b 01       		.byte	0x1
 2693 063c 2E070000 		.4byte	0x72e
 2694 0640 16       		.uleb128 0x16
 2695 0641 49010000 		.4byte	.LASF68
 2696 0645 01       		.byte	0x1
 2697 0646 2504     		.2byte	0x425
 2698 0648 6F000000 		.4byte	0x6f
 2699 064c A4010000 		.4byte	.LLST12
 2700 0650 1C       		.uleb128 0x1c
 2701 0651 FD050000 		.4byte	0x5fd
 2702 0655 1A000000 		.4byte	.LBB10
 2703 0659 00000000 		.4byte	.Ldebug_ranges0+0
 2704 065d 01       		.byte	0x1
 2705 065e 3F04     		.2byte	0x43f
 2706 0660 B1060000 		.4byte	0x6b1
 2707 0664 1D       		.uleb128 0x1d
 2708 0665 07060000 		.4byte	0x607
 2709 0669 6C000000 		.4byte	.LBB12
 2710 066d EC000000 		.4byte	.LBE12
 2711 0671 01       		.byte	0x1
 2712 0672 0405     		.2byte	0x504
 2713 0674 94060000 		.4byte	0x694
 2714 0678 12       		.uleb128 0x12
 2715 0679 9A000000 		.4byte	.LVL48
 2716 067d 8B090000 		.4byte	0x98b
 2717 0681 12       		.uleb128 0x12
 2718 0682 CA000000 		.4byte	.LVL49
 2719 0686 95090000 		.4byte	0x995
 2720 068a 12       		.uleb128 0x12
 2721 068b E6000000 		.4byte	.LVL50
 2722 068f 9F090000 		.4byte	0x99f
 2723 0693 00       		.byte	0
 2724 0694 10       		.uleb128 0x10
 2725 0695 3C000000 		.4byte	.LVL47
 2726 0699 A9090000 		.4byte	0x9a9
 2727 069d A7060000 		.4byte	0x6a7
 2728 06a1 11       		.uleb128 0x11
 2729 06a2 01       		.byte	0x1
 2730 06a3 50       		.byte	0x50
 2731 06a4 01       		.byte	0x1
 2732 06a5 31       		.byte	0x31
 2733 06a6 00       		.byte	0
 2734 06a7 12       		.uleb128 0x12
 2735 06a8 F2000000 		.4byte	.LVL51
 2736 06ac 0B030000 		.4byte	0x30b
 2737 06b0 00       		.byte	0
 2738 06b1 1D       		.uleb128 0x1d
 2739 06b2 11060000 		.4byte	0x611
 2740 06b6 78010000 		.4byte	.LBB16
 2741 06ba EA010000 		.4byte	.LBE16
 2742 06be 01       		.byte	0x1
 2743 06bf 7A04     		.2byte	0x47a
 2744 06c1 1A070000 		.4byte	0x71a
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 87


 2745 06c5 1D       		.uleb128 0x1d
 2746 06c6 1B060000 		.4byte	0x61b
 2747 06ca 78010000 		.4byte	.LBB18
 2748 06ce B0010000 		.4byte	.LBE18
 2749 06d2 01       		.byte	0x1
 2750 06d3 2C05     		.2byte	0x52c
 2751 06d5 F5060000 		.4byte	0x6f5
 2752 06d9 12       		.uleb128 0x12
 2753 06da 8E010000 		.4byte	.LVL52
 2754 06de C1090000 		.4byte	0x9c1
 2755 06e2 12       		.uleb128 0x12
 2756 06e3 A4010000 		.4byte	.LVL53
 2757 06e7 DA090000 		.4byte	0x9da
 2758 06eb 12       		.uleb128 0x12
 2759 06ec B0010000 		.4byte	.LVL54
 2760 06f0 F3090000 		.4byte	0x9f3
 2761 06f4 00       		.byte	0
 2762 06f5 12       		.uleb128 0x12
 2763 06f6 B6010000 		.4byte	.LVL55
 2764 06fa 21030000 		.4byte	0x321
 2765 06fe 12       		.uleb128 0x12
 2766 06ff C0010000 		.4byte	.LVL56
 2767 0703 FD090000 		.4byte	0x9fd
 2768 0707 12       		.uleb128 0x12
 2769 0708 CA010000 		.4byte	.LVL57
 2770 070c 070A0000 		.4byte	0xa07
 2771 0710 12       		.uleb128 0x12
 2772 0711 D0010000 		.4byte	.LVL58
 2773 0715 A9090000 		.4byte	0x9a9
 2774 0719 00       		.byte	0
 2775 071a 12       		.uleb128 0x12
 2776 071b 06000000 		.4byte	.LVL44
 2777 071f 69090000 		.4byte	0x969
 2778 0723 1A       		.uleb128 0x1a
 2779 0724 04020000 		.4byte	.LVL60
 2780 0728 01       		.byte	0x1
 2781 0729 77090000 		.4byte	0x977
 2782 072d 00       		.byte	0
 2783 072e 1E       		.uleb128 0x1e
 2784 072f 01       		.byte	0x1
 2785 0730 87050000 		.4byte	.LASF114
 2786 0734 01       		.byte	0x1
 2787 0735 A304     		.2byte	0x4a3
 2788 0737 01       		.byte	0x1
 2789 0738 6F000000 		.4byte	0x6f
 2790 073c 00000000 		.4byte	.LFB5
 2791 0740 2C000000 		.4byte	.LFE5
 2792 0744 D8010000 		.4byte	.LLST13
 2793 0748 01       		.byte	0x1
 2794 0749 A0070000 		.4byte	0x7a0
 2795 074d 19       		.uleb128 0x19
 2796 074e 0A020000 		.4byte	.LASF74
 2797 0752 01       		.byte	0x1
 2798 0753 A304     		.2byte	0x4a3
 2799 0755 6F000000 		.4byte	0x6f
 2800 0759 F8010000 		.4byte	.LLST14
 2801 075d 17       		.uleb128 0x17
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 88


 2802 075e 85060000 		.4byte	.LASF75
 2803 0762 01       		.byte	0x1
 2804 0763 A504     		.2byte	0x4a5
 2805 0765 6F000000 		.4byte	0x6f
 2806 0769 05       		.byte	0x5
 2807 076a 03       		.byte	0x3
 2808 076b 42000000 		.4byte	interruptStatus.4773
 2809 076f 16       		.uleb128 0x16
 2810 0770 49010000 		.4byte	.LASF68
 2811 0774 01       		.byte	0x1
 2812 0775 A604     		.2byte	0x4a6
 2813 0777 6F000000 		.4byte	0x6f
 2814 077b 19020000 		.4byte	.LLST15
 2815 077f 17       		.uleb128 0x17
 2816 0780 CF000000 		.4byte	.LASF76
 2817 0784 01       		.byte	0x1
 2818 0785 A704     		.2byte	0x4a7
 2819 0787 6F000000 		.4byte	0x6f
 2820 078b 01       		.byte	0x1
 2821 078c 54       		.byte	0x54
 2822 078d 12       		.uleb128 0x12
 2823 078e 08000000 		.4byte	.LVL62
 2824 0792 69090000 		.4byte	0x969
 2825 0796 12       		.uleb128 0x12
 2826 0797 20000000 		.4byte	.LVL64
 2827 079b 77090000 		.4byte	0x977
 2828 079f 00       		.byte	0
 2829 07a0 13       		.uleb128 0x13
 2830 07a1 01       		.byte	0x1
 2831 07a2 B7050000 		.4byte	.LASF77
 2832 07a6 01       		.byte	0x1
 2833 07a7 6605     		.2byte	0x566
 2834 07a9 01       		.byte	0x1
 2835 07aa 00000000 		.4byte	.LFB8
 2836 07ae 54000000 		.4byte	.LFE8
 2837 07b2 2C020000 		.4byte	.LLST16
 2838 07b6 01       		.byte	0x1
 2839 07b7 D5070000 		.4byte	0x7d5
 2840 07bb 19       		.uleb128 0x19
 2841 07bc EA020000 		.4byte	.LASF78
 2842 07c0 01       		.byte	0x1
 2843 07c1 6605     		.2byte	0x566
 2844 07c3 6F000000 		.4byte	0x6f
 2845 07c7 4C020000 		.4byte	.LLST17
 2846 07cb 12       		.uleb128 0x12
 2847 07cc 12000000 		.4byte	.LVL67
 2848 07d0 FD090000 		.4byte	0x9fd
 2849 07d4 00       		.byte	0
 2850 07d5 13       		.uleb128 0x13
 2851 07d6 01       		.byte	0x1
 2852 07d7 98040000 		.4byte	.LASF79
 2853 07db 01       		.byte	0x1
 2854 07dc 9A05     		.2byte	0x59a
 2855 07de 01       		.byte	0x1
 2856 07df 00000000 		.4byte	.LFB9
 2857 07e3 2C000000 		.4byte	.LFE9
 2858 07e7 6D020000 		.4byte	.LLST18
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 89


 2859 07eb 01       		.byte	0x1
 2860 07ec FA070000 		.4byte	0x7fa
 2861 07f0 12       		.uleb128 0x12
 2862 07f1 0E000000 		.4byte	.LVL68
 2863 07f5 110A0000 		.4byte	0xa11
 2864 07f9 00       		.byte	0
 2865 07fa 13       		.uleb128 0x13
 2866 07fb 01       		.byte	0x1
 2867 07fc EC000000 		.4byte	.LASF80
 2868 0800 01       		.byte	0x1
 2869 0801 BF05     		.2byte	0x5bf
 2870 0803 01       		.byte	0x1
 2871 0804 00000000 		.4byte	.LFB10
 2872 0808 50000000 		.4byte	.LFE10
 2873 080c 8D020000 		.4byte	.LLST19
 2874 0810 01       		.byte	0x1
 2875 0811 2F080000 		.4byte	0x82f
 2876 0815 19       		.uleb128 0x19
 2877 0816 68050000 		.4byte	.LASF81
 2878 081a 01       		.byte	0x1
 2879 081b BF05     		.2byte	0x5bf
 2880 081d 6F000000 		.4byte	0x6f
 2881 0821 AD020000 		.4byte	.LLST20
 2882 0825 12       		.uleb128 0x12
 2883 0826 12000000 		.4byte	.LVL71
 2884 082a 070A0000 		.4byte	0xa07
 2885 082e 00       		.byte	0
 2886 082f 1F       		.uleb128 0x1f
 2887 0830 67060000 		.4byte	.LASF82
 2888 0834 01       		.byte	0x1
 2889 0835 1F       		.byte	0x1f
 2890 0836 FF020000 		.4byte	0x2ff
 2891 083a 05       		.byte	0x5
 2892 083b 03       		.byte	0x3
 2893 083c 00000000 		.4byte	cyPmBackup
 2894 0840 1F       		.uleb128 0x1f
 2895 0841 B2040000 		.4byte	.LASF83
 2896 0845 01       		.byte	0x1
 2897 0846 20       		.byte	0x20
 2898 0847 A9010000 		.4byte	0x1a9
 2899 084b 05       		.byte	0x5
 2900 084c 03       		.byte	0x3
 2901 084d 30000000 		.4byte	cyPmClockBackup
 2902 0851 1F       		.uleb128 0x1f
 2903 0852 74050000 		.4byte	.LASF84
 2904 0856 01       		.byte	0x1
 2905 0857 23       		.byte	0x23
 2906 0858 62080000 		.4byte	0x862
 2907 085c 05       		.byte	0x5
 2908 085d 03       		.byte	0x3
 2909 085e 00000000 		.4byte	cyPmImoFreqReg2Mhz
 2910 0862 18       		.uleb128 0x18
 2911 0863 3B050000 		.4byte	0x53b
 2912 0867 20       		.uleb128 0x20
 2913 0868 01       		.byte	0x1
 2914 0869 52050000 		.4byte	.LASF85
 2915 086d 04       		.byte	0x4
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 90


 2916 086e 4B       		.byte	0x4b
 2917 086f 01       		.byte	0x1
 2918 0870 01       		.byte	0x1
 2919 0871 7B080000 		.4byte	0x87b
 2920 0875 21       		.uleb128 0x21
 2921 0876 6F000000 		.4byte	0x6f
 2922 087a 00       		.byte	0
 2923 087b 20       		.uleb128 0x20
 2924 087c 01       		.byte	0x1
 2925 087d D8050000 		.4byte	.LASF86
 2926 0881 05       		.byte	0x5
 2927 0882 49       		.byte	0x49
 2928 0883 01       		.byte	0x1
 2929 0884 01       		.byte	0x1
 2930 0885 8F080000 		.4byte	0x88f
 2931 0889 21       		.uleb128 0x21
 2932 088a 6F000000 		.4byte	0x6f
 2933 088e 00       		.byte	0
 2934 088f 20       		.uleb128 0x20
 2935 0890 01       		.byte	0x1
 2936 0891 1B000000 		.4byte	.LASF87
 2937 0895 05       		.byte	0x5
 2938 0896 47       		.byte	0x47
 2939 0897 01       		.byte	0x1
 2940 0898 01       		.byte	0x1
 2941 0899 A3080000 		.4byte	0x8a3
 2942 089d 21       		.uleb128 0x21
 2943 089e 6F000000 		.4byte	0x6f
 2944 08a2 00       		.byte	0
 2945 08a3 20       		.uleb128 0x20
 2946 08a4 01       		.byte	0x1
 2947 08a5 30020000 		.4byte	.LASF88
 2948 08a9 05       		.byte	0x5
 2949 08aa 4A       		.byte	0x4a
 2950 08ab 01       		.byte	0x1
 2951 08ac 01       		.byte	0x1
 2952 08ad B7080000 		.4byte	0x8b7
 2953 08b1 21       		.uleb128 0x21
 2954 08b2 6F000000 		.4byte	0x6f
 2955 08b6 00       		.byte	0
 2956 08b7 22       		.uleb128 0x22
 2957 08b8 01       		.byte	0x1
 2958 08b9 0C050000 		.4byte	.LASF92
 2959 08bd 05       		.byte	0x5
 2960 08be 4C       		.byte	0x4c
 2961 08bf 01       		.byte	0x1
 2962 08c0 01       		.byte	0x1
 2963 08c1 20       		.uleb128 0x20
 2964 08c2 01       		.byte	0x1
 2965 08c3 E2030000 		.4byte	.LASF89
 2966 08c7 05       		.byte	0x5
 2967 08c8 4F       		.byte	0x4f
 2968 08c9 01       		.byte	0x1
 2969 08ca 01       		.byte	0x1
 2970 08cb D5080000 		.4byte	0x8d5
 2971 08cf 21       		.uleb128 0x21
 2972 08d0 6F000000 		.4byte	0x6f
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 91


 2973 08d4 00       		.byte	0
 2974 08d5 20       		.uleb128 0x20
 2975 08d6 01       		.byte	0x1
 2976 08d7 0A030000 		.4byte	.LASF90
 2977 08db 05       		.byte	0x5
 2978 08dc 4E       		.byte	0x4e
 2979 08dd 01       		.byte	0x1
 2980 08de 01       		.byte	0x1
 2981 08df E9080000 		.4byte	0x8e9
 2982 08e3 21       		.uleb128 0x21
 2983 08e4 6F000000 		.4byte	0x6f
 2984 08e8 00       		.byte	0
 2985 08e9 20       		.uleb128 0x20
 2986 08ea 01       		.byte	0x1
 2987 08eb 96050000 		.4byte	.LASF91
 2988 08ef 05       		.byte	0x5
 2989 08f0 50       		.byte	0x50
 2990 08f1 01       		.byte	0x1
 2991 08f2 01       		.byte	0x1
 2992 08f3 FD080000 		.4byte	0x8fd
 2993 08f7 21       		.uleb128 0x21
 2994 08f8 7A000000 		.4byte	0x7a
 2995 08fc 00       		.byte	0
 2996 08fd 22       		.uleb128 0x22
 2997 08fe 01       		.byte	0x1
 2998 08ff D3030000 		.4byte	.LASF93
 2999 0903 05       		.byte	0x5
 3000 0904 43       		.byte	0x43
 3001 0905 01       		.byte	0x1
 3002 0906 01       		.byte	0x1
 3003 0907 22       		.uleb128 0x22
 3004 0908 01       		.byte	0x1
 3005 0909 5B060000 		.4byte	.LASF94
 3006 090d 05       		.byte	0x5
 3007 090e 67       		.byte	0x67
 3008 090f 01       		.byte	0x1
 3009 0910 01       		.byte	0x1
 3010 0911 20       		.uleb128 0x20
 3011 0912 01       		.byte	0x1
 3012 0913 3C040000 		.4byte	.LASF95
 3013 0917 05       		.byte	0x5
 3014 0918 7A       		.byte	0x7a
 3015 0919 01       		.byte	0x1
 3016 091a 01       		.byte	0x1
 3017 091b 25090000 		.4byte	0x925
 3018 091f 21       		.uleb128 0x21
 3019 0920 85000000 		.4byte	0x85
 3020 0924 00       		.byte	0
 3021 0925 23       		.uleb128 0x23
 3022 0926 01       		.byte	0x1
 3023 0927 73030000 		.4byte	.LASF98
 3024 092b 05       		.byte	0x5
 3025 092c 66       		.byte	0x66
 3026 092d 01       		.byte	0x1
 3027 092e A5000000 		.4byte	0xa5
 3028 0932 01       		.byte	0x1
 3029 0933 3D090000 		.4byte	0x93d
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 92


 3030 0937 21       		.uleb128 0x21
 3031 0938 6F000000 		.4byte	0x6f
 3032 093c 00       		.byte	0
 3033 093d 22       		.uleb128 0x22
 3034 093e 01       		.byte	0x1
 3035 093f B2020000 		.4byte	.LASF96
 3036 0943 05       		.byte	0x5
 3037 0944 48       		.byte	0x48
 3038 0945 01       		.byte	0x1
 3039 0946 01       		.byte	0x1
 3040 0947 22       		.uleb128 0x22
 3041 0948 01       		.byte	0x1
 3042 0949 E6050000 		.4byte	.LASF97
 3043 094d 05       		.byte	0x5
 3044 094e 4B       		.byte	0x4b
 3045 094f 01       		.byte	0x1
 3046 0950 01       		.byte	0x1
 3047 0951 23       		.uleb128 0x23
 3048 0952 01       		.byte	0x1
 3049 0953 8D010000 		.4byte	.LASF99
 3050 0957 05       		.byte	0x5
 3051 0958 42       		.byte	0x42
 3052 0959 01       		.byte	0x1
 3053 095a A5000000 		.4byte	0xa5
 3054 095e 01       		.byte	0x1
 3055 095f 69090000 		.4byte	0x969
 3056 0963 21       		.uleb128 0x21
 3057 0964 6F000000 		.4byte	0x6f
 3058 0968 00       		.byte	0
 3059 0969 24       		.uleb128 0x24
 3060 096a 01       		.byte	0x1
 3061 096b 77020000 		.4byte	.LASF115
 3062 096f 05       		.byte	0x5
 3063 0970 7E       		.byte	0x7e
 3064 0971 01       		.byte	0x1
 3065 0972 6F000000 		.4byte	0x6f
 3066 0976 01       		.byte	0x1
 3067 0977 20       		.uleb128 0x20
 3068 0978 01       		.byte	0x1
 3069 0979 09040000 		.4byte	.LASF100
 3070 097d 05       		.byte	0x5
 3071 097e 7F       		.byte	0x7f
 3072 097f 01       		.byte	0x1
 3073 0980 01       		.byte	0x1
 3074 0981 8B090000 		.4byte	0x98b
 3075 0985 21       		.uleb128 0x21
 3076 0986 6F000000 		.4byte	0x6f
 3077 098a 00       		.byte	0
 3078 098b 22       		.uleb128 0x22
 3079 098c 01       		.byte	0x1
 3080 098d 21050000 		.4byte	.LASF101
 3081 0991 05       		.byte	0x5
 3082 0992 9D       		.byte	0x9d
 3083 0993 01       		.byte	0x1
 3084 0994 01       		.byte	0x1
 3085 0995 22       		.uleb128 0x22
 3086 0996 01       		.byte	0x1
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 93


 3087 0997 00000000 		.4byte	.LASF102
 3088 099b 05       		.byte	0x5
 3089 099c 9E       		.byte	0x9e
 3090 099d 01       		.byte	0x1
 3091 099e 01       		.byte	0x1
 3092 099f 22       		.uleb128 0x22
 3093 09a0 01       		.byte	0x1
 3094 09a1 F6020000 		.4byte	.LASF103
 3095 09a5 05       		.byte	0x5
 3096 09a6 A0       		.byte	0xa0
 3097 09a7 01       		.byte	0x1
 3098 09a8 01       		.byte	0x1
 3099 09a9 23       		.uleb128 0x23
 3100 09aa 01       		.byte	0x1
 3101 09ab 9F020000 		.4byte	.LASF104
 3102 09af 05       		.byte	0x5
 3103 09b0 5F       		.byte	0x5f
 3104 09b1 01       		.byte	0x1
 3105 09b2 6F000000 		.4byte	0x6f
 3106 09b6 01       		.byte	0x1
 3107 09b7 C1090000 		.4byte	0x9c1
 3108 09bb 21       		.uleb128 0x21
 3109 09bc 6F000000 		.4byte	0x6f
 3110 09c0 00       		.byte	0
 3111 09c1 20       		.uleb128 0x20
 3112 09c2 01       		.byte	0x1
 3113 09c3 06010000 		.4byte	.LASF105
 3114 09c7 05       		.byte	0x5
 3115 09c8 9B       		.byte	0x9b
 3116 09c9 01       		.byte	0x1
 3117 09ca 01       		.byte	0x1
 3118 09cb DA090000 		.4byte	0x9da
 3119 09cf 21       		.uleb128 0x21
 3120 09d0 6F000000 		.4byte	0x6f
 3121 09d4 21       		.uleb128 0x21
 3122 09d5 6F000000 		.4byte	0x6f
 3123 09d9 00       		.byte	0
 3124 09da 20       		.uleb128 0x20
 3125 09db 01       		.byte	0x1
 3126 09dc 14060000 		.4byte	.LASF106
 3127 09e0 05       		.byte	0x5
 3128 09e1 9C       		.byte	0x9c
 3129 09e2 01       		.byte	0x1
 3130 09e3 01       		.byte	0x1
 3131 09e4 F3090000 		.4byte	0x9f3
 3132 09e8 21       		.uleb128 0x21
 3133 09e9 6F000000 		.4byte	0x6f
 3134 09ed 21       		.uleb128 0x21
 3135 09ee 6F000000 		.4byte	0x6f
 3136 09f2 00       		.byte	0
 3137 09f3 22       		.uleb128 0x22
 3138 09f4 01       		.byte	0x1
 3139 09f5 48060000 		.4byte	.LASF107
 3140 09f9 05       		.byte	0x5
 3141 09fa 9F       		.byte	0x9f
 3142 09fb 01       		.byte	0x1
 3143 09fc 01       		.byte	0x1
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 94


 3144 09fd 22       		.uleb128 0x22
 3145 09fe 01       		.byte	0x1
 3146 09ff 58010000 		.4byte	.LASF108
 3147 0a03 05       		.byte	0x5
 3148 0a04 58       		.byte	0x58
 3149 0a05 01       		.byte	0x1
 3150 0a06 01       		.byte	0x1
 3151 0a07 22       		.uleb128 0x22
 3152 0a08 01       		.byte	0x1
 3153 0a09 B6030000 		.4byte	.LASF109
 3154 0a0d 05       		.byte	0x5
 3155 0a0e 5A       		.byte	0x5a
 3156 0a0f 01       		.byte	0x1
 3157 0a10 01       		.byte	0x1
 3158 0a11 22       		.uleb128 0x22
 3159 0a12 01       		.byte	0x1
 3160 0a13 72000000 		.4byte	.LASF110
 3161 0a17 05       		.byte	0x5
 3162 0a18 63       		.byte	0x63
 3163 0a19 01       		.byte	0x1
 3164 0a1a 01       		.byte	0x1
 3165 0a1b 00       		.byte	0
 3166              		.section	.debug_abbrev,"",%progbits
 3167              	.Ldebug_abbrev0:
 3168 0000 01       		.uleb128 0x1
 3169 0001 11       		.uleb128 0x11
 3170 0002 01       		.byte	0x1
 3171 0003 25       		.uleb128 0x25
 3172 0004 0E       		.uleb128 0xe
 3173 0005 13       		.uleb128 0x13
 3174 0006 0B       		.uleb128 0xb
 3175 0007 03       		.uleb128 0x3
 3176 0008 0E       		.uleb128 0xe
 3177 0009 1B       		.uleb128 0x1b
 3178 000a 0E       		.uleb128 0xe
 3179 000b 55       		.uleb128 0x55
 3180 000c 06       		.uleb128 0x6
 3181 000d 11       		.uleb128 0x11
 3182 000e 01       		.uleb128 0x1
 3183 000f 52       		.uleb128 0x52
 3184 0010 01       		.uleb128 0x1
 3185 0011 10       		.uleb128 0x10
 3186 0012 06       		.uleb128 0x6
 3187 0013 00       		.byte	0
 3188 0014 00       		.byte	0
 3189 0015 02       		.uleb128 0x2
 3190 0016 24       		.uleb128 0x24
 3191 0017 00       		.byte	0
 3192 0018 0B       		.uleb128 0xb
 3193 0019 0B       		.uleb128 0xb
 3194 001a 3E       		.uleb128 0x3e
 3195 001b 0B       		.uleb128 0xb
 3196 001c 03       		.uleb128 0x3
 3197 001d 0E       		.uleb128 0xe
 3198 001e 00       		.byte	0
 3199 001f 00       		.byte	0
 3200 0020 03       		.uleb128 0x3
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 95


 3201 0021 24       		.uleb128 0x24
 3202 0022 00       		.byte	0
 3203 0023 0B       		.uleb128 0xb
 3204 0024 0B       		.uleb128 0xb
 3205 0025 3E       		.uleb128 0x3e
 3206 0026 0B       		.uleb128 0xb
 3207 0027 03       		.uleb128 0x3
 3208 0028 08       		.uleb128 0x8
 3209 0029 00       		.byte	0
 3210 002a 00       		.byte	0
 3211 002b 04       		.uleb128 0x4
 3212 002c 16       		.uleb128 0x16
 3213 002d 00       		.byte	0
 3214 002e 03       		.uleb128 0x3
 3215 002f 0E       		.uleb128 0xe
 3216 0030 3A       		.uleb128 0x3a
 3217 0031 0B       		.uleb128 0xb
 3218 0032 3B       		.uleb128 0x3b
 3219 0033 0B       		.uleb128 0xb
 3220 0034 49       		.uleb128 0x49
 3221 0035 13       		.uleb128 0x13
 3222 0036 00       		.byte	0
 3223 0037 00       		.byte	0
 3224 0038 05       		.uleb128 0x5
 3225 0039 35       		.uleb128 0x35
 3226 003a 00       		.byte	0
 3227 003b 49       		.uleb128 0x49
 3228 003c 13       		.uleb128 0x13
 3229 003d 00       		.byte	0
 3230 003e 00       		.byte	0
 3231 003f 06       		.uleb128 0x6
 3232 0040 13       		.uleb128 0x13
 3233 0041 01       		.byte	0x1
 3234 0042 03       		.uleb128 0x3
 3235 0043 0E       		.uleb128 0xe
 3236 0044 0B       		.uleb128 0xb
 3237 0045 0B       		.uleb128 0xb
 3238 0046 3A       		.uleb128 0x3a
 3239 0047 0B       		.uleb128 0xb
 3240 0048 3B       		.uleb128 0x3b
 3241 0049 0B       		.uleb128 0xb
 3242 004a 01       		.uleb128 0x1
 3243 004b 13       		.uleb128 0x13
 3244 004c 00       		.byte	0
 3245 004d 00       		.byte	0
 3246 004e 07       		.uleb128 0x7
 3247 004f 0D       		.uleb128 0xd
 3248 0050 00       		.byte	0
 3249 0051 03       		.uleb128 0x3
 3250 0052 0E       		.uleb128 0xe
 3251 0053 3A       		.uleb128 0x3a
 3252 0054 0B       		.uleb128 0xb
 3253 0055 3B       		.uleb128 0x3b
 3254 0056 0B       		.uleb128 0xb
 3255 0057 49       		.uleb128 0x49
 3256 0058 13       		.uleb128 0x13
 3257 0059 38       		.uleb128 0x38
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 96


 3258 005a 0A       		.uleb128 0xa
 3259 005b 00       		.byte	0
 3260 005c 00       		.byte	0
 3261 005d 08       		.uleb128 0x8
 3262 005e 0D       		.uleb128 0xd
 3263 005f 00       		.byte	0
 3264 0060 03       		.uleb128 0x3
 3265 0061 0E       		.uleb128 0xe
 3266 0062 3A       		.uleb128 0x3a
 3267 0063 0B       		.uleb128 0xb
 3268 0064 3B       		.uleb128 0x3b
 3269 0065 05       		.uleb128 0x5
 3270 0066 49       		.uleb128 0x49
 3271 0067 13       		.uleb128 0x13
 3272 0068 38       		.uleb128 0x38
 3273 0069 0A       		.uleb128 0xa
 3274 006a 00       		.byte	0
 3275 006b 00       		.byte	0
 3276 006c 09       		.uleb128 0x9
 3277 006d 16       		.uleb128 0x16
 3278 006e 00       		.byte	0
 3279 006f 03       		.uleb128 0x3
 3280 0070 0E       		.uleb128 0xe
 3281 0071 3A       		.uleb128 0x3a
 3282 0072 0B       		.uleb128 0xb
 3283 0073 3B       		.uleb128 0x3b
 3284 0074 05       		.uleb128 0x5
 3285 0075 49       		.uleb128 0x49
 3286 0076 13       		.uleb128 0x13
 3287 0077 00       		.byte	0
 3288 0078 00       		.byte	0
 3289 0079 0A       		.uleb128 0xa
 3290 007a 13       		.uleb128 0x13
 3291 007b 01       		.byte	0x1
 3292 007c 03       		.uleb128 0x3
 3293 007d 0E       		.uleb128 0xe
 3294 007e 0B       		.uleb128 0xb
 3295 007f 0B       		.uleb128 0xb
 3296 0080 3A       		.uleb128 0x3a
 3297 0081 0B       		.uleb128 0xb
 3298 0082 3B       		.uleb128 0x3b
 3299 0083 05       		.uleb128 0x5
 3300 0084 01       		.uleb128 0x1
 3301 0085 13       		.uleb128 0x13
 3302 0086 00       		.byte	0
 3303 0087 00       		.byte	0
 3304 0088 0B       		.uleb128 0xb
 3305 0089 01       		.uleb128 0x1
 3306 008a 01       		.byte	0x1
 3307 008b 49       		.uleb128 0x49
 3308 008c 13       		.uleb128 0x13
 3309 008d 01       		.uleb128 0x1
 3310 008e 13       		.uleb128 0x13
 3311 008f 00       		.byte	0
 3312 0090 00       		.byte	0
 3313 0091 0C       		.uleb128 0xc
 3314 0092 21       		.uleb128 0x21
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 97


 3315 0093 00       		.byte	0
 3316 0094 49       		.uleb128 0x49
 3317 0095 13       		.uleb128 0x13
 3318 0096 2F       		.uleb128 0x2f
 3319 0097 0B       		.uleb128 0xb
 3320 0098 00       		.byte	0
 3321 0099 00       		.byte	0
 3322 009a 0D       		.uleb128 0xd
 3323 009b 2E       		.uleb128 0x2e
 3324 009c 00       		.byte	0
 3325 009d 03       		.uleb128 0x3
 3326 009e 0E       		.uleb128 0xe
 3327 009f 3A       		.uleb128 0x3a
 3328 00a0 0B       		.uleb128 0xb
 3329 00a1 3B       		.uleb128 0x3b
 3330 00a2 05       		.uleb128 0x5
 3331 00a3 27       		.uleb128 0x27
 3332 00a4 0C       		.uleb128 0xc
 3333 00a5 11       		.uleb128 0x11
 3334 00a6 01       		.uleb128 0x1
 3335 00a7 12       		.uleb128 0x12
 3336 00a8 01       		.uleb128 0x1
 3337 00a9 40       		.uleb128 0x40
 3338 00aa 06       		.uleb128 0x6
 3339 00ab 9742     		.uleb128 0x2117
 3340 00ad 0C       		.uleb128 0xc
 3341 00ae 00       		.byte	0
 3342 00af 00       		.byte	0
 3343 00b0 0E       		.uleb128 0xe
 3344 00b1 2E       		.uleb128 0x2e
 3345 00b2 00       		.byte	0
 3346 00b3 03       		.uleb128 0x3
 3347 00b4 0E       		.uleb128 0xe
 3348 00b5 3A       		.uleb128 0x3a
 3349 00b6 0B       		.uleb128 0xb
 3350 00b7 3B       		.uleb128 0x3b
 3351 00b8 05       		.uleb128 0x5
 3352 00b9 27       		.uleb128 0x27
 3353 00ba 0C       		.uleb128 0xc
 3354 00bb 11       		.uleb128 0x11
 3355 00bc 01       		.uleb128 0x1
 3356 00bd 12       		.uleb128 0x12
 3357 00be 01       		.uleb128 0x1
 3358 00bf 40       		.uleb128 0x40
 3359 00c0 0A       		.uleb128 0xa
 3360 00c1 9742     		.uleb128 0x2117
 3361 00c3 0C       		.uleb128 0xc
 3362 00c4 00       		.byte	0
 3363 00c5 00       		.byte	0
 3364 00c6 0F       		.uleb128 0xf
 3365 00c7 2E       		.uleb128 0x2e
 3366 00c8 01       		.byte	0x1
 3367 00c9 3F       		.uleb128 0x3f
 3368 00ca 0C       		.uleb128 0xc
 3369 00cb 03       		.uleb128 0x3
 3370 00cc 0E       		.uleb128 0xe
 3371 00cd 3A       		.uleb128 0x3a
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 98


 3372 00ce 0B       		.uleb128 0xb
 3373 00cf 3B       		.uleb128 0x3b
 3374 00d0 0B       		.uleb128 0xb
 3375 00d1 27       		.uleb128 0x27
 3376 00d2 0C       		.uleb128 0xc
 3377 00d3 11       		.uleb128 0x11
 3378 00d4 01       		.uleb128 0x1
 3379 00d5 12       		.uleb128 0x12
 3380 00d6 01       		.uleb128 0x1
 3381 00d7 40       		.uleb128 0x40
 3382 00d8 06       		.uleb128 0x6
 3383 00d9 9742     		.uleb128 0x2117
 3384 00db 0C       		.uleb128 0xc
 3385 00dc 01       		.uleb128 0x1
 3386 00dd 13       		.uleb128 0x13
 3387 00de 00       		.byte	0
 3388 00df 00       		.byte	0
 3389 00e0 10       		.uleb128 0x10
 3390 00e1 898201   		.uleb128 0x4109
 3391 00e4 01       		.byte	0x1
 3392 00e5 11       		.uleb128 0x11
 3393 00e6 01       		.uleb128 0x1
 3394 00e7 31       		.uleb128 0x31
 3395 00e8 13       		.uleb128 0x13
 3396 00e9 01       		.uleb128 0x1
 3397 00ea 13       		.uleb128 0x13
 3398 00eb 00       		.byte	0
 3399 00ec 00       		.byte	0
 3400 00ed 11       		.uleb128 0x11
 3401 00ee 8A8201   		.uleb128 0x410a
 3402 00f1 00       		.byte	0
 3403 00f2 02       		.uleb128 0x2
 3404 00f3 0A       		.uleb128 0xa
 3405 00f4 9142     		.uleb128 0x2111
 3406 00f6 0A       		.uleb128 0xa
 3407 00f7 00       		.byte	0
 3408 00f8 00       		.byte	0
 3409 00f9 12       		.uleb128 0x12
 3410 00fa 898201   		.uleb128 0x4109
 3411 00fd 00       		.byte	0
 3412 00fe 11       		.uleb128 0x11
 3413 00ff 01       		.uleb128 0x1
 3414 0100 31       		.uleb128 0x31
 3415 0101 13       		.uleb128 0x13
 3416 0102 00       		.byte	0
 3417 0103 00       		.byte	0
 3418 0104 13       		.uleb128 0x13
 3419 0105 2E       		.uleb128 0x2e
 3420 0106 01       		.byte	0x1
 3421 0107 3F       		.uleb128 0x3f
 3422 0108 0C       		.uleb128 0xc
 3423 0109 03       		.uleb128 0x3
 3424 010a 0E       		.uleb128 0xe
 3425 010b 3A       		.uleb128 0x3a
 3426 010c 0B       		.uleb128 0xb
 3427 010d 3B       		.uleb128 0x3b
 3428 010e 05       		.uleb128 0x5
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 99


 3429 010f 27       		.uleb128 0x27
 3430 0110 0C       		.uleb128 0xc
 3431 0111 11       		.uleb128 0x11
 3432 0112 01       		.uleb128 0x1
 3433 0113 12       		.uleb128 0x12
 3434 0114 01       		.uleb128 0x1
 3435 0115 40       		.uleb128 0x40
 3436 0116 06       		.uleb128 0x6
 3437 0117 9742     		.uleb128 0x2117
 3438 0119 0C       		.uleb128 0xc
 3439 011a 01       		.uleb128 0x1
 3440 011b 13       		.uleb128 0x13
 3441 011c 00       		.byte	0
 3442 011d 00       		.byte	0
 3443 011e 14       		.uleb128 0x14
 3444 011f 34       		.uleb128 0x34
 3445 0120 00       		.byte	0
 3446 0121 03       		.uleb128 0x3
 3447 0122 0E       		.uleb128 0xe
 3448 0123 3A       		.uleb128 0x3a
 3449 0124 0B       		.uleb128 0xb
 3450 0125 3B       		.uleb128 0x3b
 3451 0126 05       		.uleb128 0x5
 3452 0127 49       		.uleb128 0x49
 3453 0128 13       		.uleb128 0x13
 3454 0129 1C       		.uleb128 0x1c
 3455 012a 0B       		.uleb128 0xb
 3456 012b 00       		.byte	0
 3457 012c 00       		.byte	0
 3458 012d 15       		.uleb128 0x15
 3459 012e 34       		.uleb128 0x34
 3460 012f 00       		.byte	0
 3461 0130 03       		.uleb128 0x3
 3462 0131 08       		.uleb128 0x8
 3463 0132 3A       		.uleb128 0x3a
 3464 0133 0B       		.uleb128 0xb
 3465 0134 3B       		.uleb128 0x3b
 3466 0135 05       		.uleb128 0x5
 3467 0136 49       		.uleb128 0x49
 3468 0137 13       		.uleb128 0x13
 3469 0138 00       		.byte	0
 3470 0139 00       		.byte	0
 3471 013a 16       		.uleb128 0x16
 3472 013b 34       		.uleb128 0x34
 3473 013c 00       		.byte	0
 3474 013d 03       		.uleb128 0x3
 3475 013e 0E       		.uleb128 0xe
 3476 013f 3A       		.uleb128 0x3a
 3477 0140 0B       		.uleb128 0xb
 3478 0141 3B       		.uleb128 0x3b
 3479 0142 05       		.uleb128 0x5
 3480 0143 49       		.uleb128 0x49
 3481 0144 13       		.uleb128 0x13
 3482 0145 02       		.uleb128 0x2
 3483 0146 06       		.uleb128 0x6
 3484 0147 00       		.byte	0
 3485 0148 00       		.byte	0
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 100


 3486 0149 17       		.uleb128 0x17
 3487 014a 34       		.uleb128 0x34
 3488 014b 00       		.byte	0
 3489 014c 03       		.uleb128 0x3
 3490 014d 0E       		.uleb128 0xe
 3491 014e 3A       		.uleb128 0x3a
 3492 014f 0B       		.uleb128 0xb
 3493 0150 3B       		.uleb128 0x3b
 3494 0151 05       		.uleb128 0x5
 3495 0152 49       		.uleb128 0x49
 3496 0153 13       		.uleb128 0x13
 3497 0154 02       		.uleb128 0x2
 3498 0155 0A       		.uleb128 0xa
 3499 0156 00       		.byte	0
 3500 0157 00       		.byte	0
 3501 0158 18       		.uleb128 0x18
 3502 0159 26       		.uleb128 0x26
 3503 015a 00       		.byte	0
 3504 015b 49       		.uleb128 0x49
 3505 015c 13       		.uleb128 0x13
 3506 015d 00       		.byte	0
 3507 015e 00       		.byte	0
 3508 015f 19       		.uleb128 0x19
 3509 0160 05       		.uleb128 0x5
 3510 0161 00       		.byte	0
 3511 0162 03       		.uleb128 0x3
 3512 0163 0E       		.uleb128 0xe
 3513 0164 3A       		.uleb128 0x3a
 3514 0165 0B       		.uleb128 0xb
 3515 0166 3B       		.uleb128 0x3b
 3516 0167 05       		.uleb128 0x5
 3517 0168 49       		.uleb128 0x49
 3518 0169 13       		.uleb128 0x13
 3519 016a 02       		.uleb128 0x2
 3520 016b 06       		.uleb128 0x6
 3521 016c 00       		.byte	0
 3522 016d 00       		.byte	0
 3523 016e 1A       		.uleb128 0x1a
 3524 016f 898201   		.uleb128 0x4109
 3525 0172 00       		.byte	0
 3526 0173 11       		.uleb128 0x11
 3527 0174 01       		.uleb128 0x1
 3528 0175 9542     		.uleb128 0x2115
 3529 0177 0C       		.uleb128 0xc
 3530 0178 31       		.uleb128 0x31
 3531 0179 13       		.uleb128 0x13
 3532 017a 00       		.byte	0
 3533 017b 00       		.byte	0
 3534 017c 1B       		.uleb128 0x1b
 3535 017d 2E       		.uleb128 0x2e
 3536 017e 00       		.byte	0
 3537 017f 03       		.uleb128 0x3
 3538 0180 0E       		.uleb128 0xe
 3539 0181 3A       		.uleb128 0x3a
 3540 0182 0B       		.uleb128 0xb
 3541 0183 3B       		.uleb128 0x3b
 3542 0184 05       		.uleb128 0x5
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 101


 3543 0185 27       		.uleb128 0x27
 3544 0186 0C       		.uleb128 0xc
 3545 0187 20       		.uleb128 0x20
 3546 0188 0B       		.uleb128 0xb
 3547 0189 00       		.byte	0
 3548 018a 00       		.byte	0
 3549 018b 1C       		.uleb128 0x1c
 3550 018c 1D       		.uleb128 0x1d
 3551 018d 01       		.byte	0x1
 3552 018e 31       		.uleb128 0x31
 3553 018f 13       		.uleb128 0x13
 3554 0190 52       		.uleb128 0x52
 3555 0191 01       		.uleb128 0x1
 3556 0192 55       		.uleb128 0x55
 3557 0193 06       		.uleb128 0x6
 3558 0194 58       		.uleb128 0x58
 3559 0195 0B       		.uleb128 0xb
 3560 0196 59       		.uleb128 0x59
 3561 0197 05       		.uleb128 0x5
 3562 0198 01       		.uleb128 0x1
 3563 0199 13       		.uleb128 0x13
 3564 019a 00       		.byte	0
 3565 019b 00       		.byte	0
 3566 019c 1D       		.uleb128 0x1d
 3567 019d 1D       		.uleb128 0x1d
 3568 019e 01       		.byte	0x1
 3569 019f 31       		.uleb128 0x31
 3570 01a0 13       		.uleb128 0x13
 3571 01a1 11       		.uleb128 0x11
 3572 01a2 01       		.uleb128 0x1
 3573 01a3 12       		.uleb128 0x12
 3574 01a4 01       		.uleb128 0x1
 3575 01a5 58       		.uleb128 0x58
 3576 01a6 0B       		.uleb128 0xb
 3577 01a7 59       		.uleb128 0x59
 3578 01a8 05       		.uleb128 0x5
 3579 01a9 01       		.uleb128 0x1
 3580 01aa 13       		.uleb128 0x13
 3581 01ab 00       		.byte	0
 3582 01ac 00       		.byte	0
 3583 01ad 1E       		.uleb128 0x1e
 3584 01ae 2E       		.uleb128 0x2e
 3585 01af 01       		.byte	0x1
 3586 01b0 3F       		.uleb128 0x3f
 3587 01b1 0C       		.uleb128 0xc
 3588 01b2 03       		.uleb128 0x3
 3589 01b3 0E       		.uleb128 0xe
 3590 01b4 3A       		.uleb128 0x3a
 3591 01b5 0B       		.uleb128 0xb
 3592 01b6 3B       		.uleb128 0x3b
 3593 01b7 05       		.uleb128 0x5
 3594 01b8 27       		.uleb128 0x27
 3595 01b9 0C       		.uleb128 0xc
 3596 01ba 49       		.uleb128 0x49
 3597 01bb 13       		.uleb128 0x13
 3598 01bc 11       		.uleb128 0x11
 3599 01bd 01       		.uleb128 0x1
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 102


 3600 01be 12       		.uleb128 0x12
 3601 01bf 01       		.uleb128 0x1
 3602 01c0 40       		.uleb128 0x40
 3603 01c1 06       		.uleb128 0x6
 3604 01c2 9742     		.uleb128 0x2117
 3605 01c4 0C       		.uleb128 0xc
 3606 01c5 01       		.uleb128 0x1
 3607 01c6 13       		.uleb128 0x13
 3608 01c7 00       		.byte	0
 3609 01c8 00       		.byte	0
 3610 01c9 1F       		.uleb128 0x1f
 3611 01ca 34       		.uleb128 0x34
 3612 01cb 00       		.byte	0
 3613 01cc 03       		.uleb128 0x3
 3614 01cd 0E       		.uleb128 0xe
 3615 01ce 3A       		.uleb128 0x3a
 3616 01cf 0B       		.uleb128 0xb
 3617 01d0 3B       		.uleb128 0x3b
 3618 01d1 0B       		.uleb128 0xb
 3619 01d2 49       		.uleb128 0x49
 3620 01d3 13       		.uleb128 0x13
 3621 01d4 02       		.uleb128 0x2
 3622 01d5 0A       		.uleb128 0xa
 3623 01d6 00       		.byte	0
 3624 01d7 00       		.byte	0
 3625 01d8 20       		.uleb128 0x20
 3626 01d9 2E       		.uleb128 0x2e
 3627 01da 01       		.byte	0x1
 3628 01db 3F       		.uleb128 0x3f
 3629 01dc 0C       		.uleb128 0xc
 3630 01dd 03       		.uleb128 0x3
 3631 01de 0E       		.uleb128 0xe
 3632 01df 3A       		.uleb128 0x3a
 3633 01e0 0B       		.uleb128 0xb
 3634 01e1 3B       		.uleb128 0x3b
 3635 01e2 0B       		.uleb128 0xb
 3636 01e3 27       		.uleb128 0x27
 3637 01e4 0C       		.uleb128 0xc
 3638 01e5 3C       		.uleb128 0x3c
 3639 01e6 0C       		.uleb128 0xc
 3640 01e7 01       		.uleb128 0x1
 3641 01e8 13       		.uleb128 0x13
 3642 01e9 00       		.byte	0
 3643 01ea 00       		.byte	0
 3644 01eb 21       		.uleb128 0x21
 3645 01ec 05       		.uleb128 0x5
 3646 01ed 00       		.byte	0
 3647 01ee 49       		.uleb128 0x49
 3648 01ef 13       		.uleb128 0x13
 3649 01f0 00       		.byte	0
 3650 01f1 00       		.byte	0
 3651 01f2 22       		.uleb128 0x22
 3652 01f3 2E       		.uleb128 0x2e
 3653 01f4 00       		.byte	0
 3654 01f5 3F       		.uleb128 0x3f
 3655 01f6 0C       		.uleb128 0xc
 3656 01f7 03       		.uleb128 0x3
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 103


 3657 01f8 0E       		.uleb128 0xe
 3658 01f9 3A       		.uleb128 0x3a
 3659 01fa 0B       		.uleb128 0xb
 3660 01fb 3B       		.uleb128 0x3b
 3661 01fc 0B       		.uleb128 0xb
 3662 01fd 27       		.uleb128 0x27
 3663 01fe 0C       		.uleb128 0xc
 3664 01ff 3C       		.uleb128 0x3c
 3665 0200 0C       		.uleb128 0xc
 3666 0201 00       		.byte	0
 3667 0202 00       		.byte	0
 3668 0203 23       		.uleb128 0x23
 3669 0204 2E       		.uleb128 0x2e
 3670 0205 01       		.byte	0x1
 3671 0206 3F       		.uleb128 0x3f
 3672 0207 0C       		.uleb128 0xc
 3673 0208 03       		.uleb128 0x3
 3674 0209 0E       		.uleb128 0xe
 3675 020a 3A       		.uleb128 0x3a
 3676 020b 0B       		.uleb128 0xb
 3677 020c 3B       		.uleb128 0x3b
 3678 020d 0B       		.uleb128 0xb
 3679 020e 27       		.uleb128 0x27
 3680 020f 0C       		.uleb128 0xc
 3681 0210 49       		.uleb128 0x49
 3682 0211 13       		.uleb128 0x13
 3683 0212 3C       		.uleb128 0x3c
 3684 0213 0C       		.uleb128 0xc
 3685 0214 01       		.uleb128 0x1
 3686 0215 13       		.uleb128 0x13
 3687 0216 00       		.byte	0
 3688 0217 00       		.byte	0
 3689 0218 24       		.uleb128 0x24
 3690 0219 2E       		.uleb128 0x2e
 3691 021a 00       		.byte	0
 3692 021b 3F       		.uleb128 0x3f
 3693 021c 0C       		.uleb128 0xc
 3694 021d 03       		.uleb128 0x3
 3695 021e 0E       		.uleb128 0xe
 3696 021f 3A       		.uleb128 0x3a
 3697 0220 0B       		.uleb128 0xb
 3698 0221 3B       		.uleb128 0x3b
 3699 0222 0B       		.uleb128 0xb
 3700 0223 27       		.uleb128 0x27
 3701 0224 0C       		.uleb128 0xc
 3702 0225 49       		.uleb128 0x49
 3703 0226 13       		.uleb128 0x13
 3704 0227 3C       		.uleb128 0x3c
 3705 0228 0C       		.uleb128 0xc
 3706 0229 00       		.byte	0
 3707 022a 00       		.byte	0
 3708 022b 00       		.byte	0
 3709              		.section	.debug_loc,"",%progbits
 3710              	.Ldebug_loc0:
 3711              	.LLST0:
 3712 0000 00000000 		.4byte	.LFB11
 3713 0004 04000000 		.4byte	.LCFI0
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 104


 3714 0008 0200     		.2byte	0x2
 3715 000a 7D       		.byte	0x7d
 3716 000b 00       		.sleb128 0
 3717 000c 04000000 		.4byte	.LCFI0
 3718 0010 64010000 		.4byte	.LFE11
 3719 0014 0200     		.2byte	0x2
 3720 0016 7D       		.byte	0x7d
 3721 0017 24       		.sleb128 36
 3722 0018 00000000 		.4byte	0
 3723 001c 00000000 		.4byte	0
 3724              	.LLST1:
 3725 0020 00000000 		.4byte	.LFB0
 3726 0024 02000000 		.4byte	.LCFI1
 3727 0028 0200     		.2byte	0x2
 3728 002a 7D       		.byte	0x7d
 3729 002b 00       		.sleb128 0
 3730 002c 02000000 		.4byte	.LCFI1
 3731 0030 B4010000 		.4byte	.LFE0
 3732 0034 0200     		.2byte	0x2
 3733 0036 7D       		.byte	0x7d
 3734 0037 08       		.sleb128 8
 3735 0038 00000000 		.4byte	0
 3736 003c 00000000 		.4byte	0
 3737              	.LLST2:
 3738 0040 00000000 		.4byte	.LFB1
 3739 0044 04000000 		.4byte	.LCFI2
 3740 0048 0200     		.2byte	0x2
 3741 004a 7D       		.byte	0x7d
 3742 004b 00       		.sleb128 0
 3743 004c 04000000 		.4byte	.LCFI2
 3744 0050 08020000 		.4byte	.LFE1
 3745 0054 0200     		.2byte	0x2
 3746 0056 7D       		.byte	0x7d
 3747 0057 10       		.sleb128 16
 3748 0058 00000000 		.4byte	0
 3749 005c 00000000 		.4byte	0
 3750              	.LLST3:
 3751 0060 AA010000 		.4byte	.LVL29
 3752 0064 B0010000 		.4byte	.LVL30
 3753 0068 0500     		.2byte	0x5
 3754 006a 72       		.byte	0x72
 3755 006b 00       		.sleb128 0
 3756 006c 38       		.byte	0x38
 3757 006d 24       		.byte	0x24
 3758 006e 9F       		.byte	0x9f
 3759 006f B0010000 		.4byte	.LVL30
 3760 0073 B6010000 		.4byte	.LVL31
 3761 0077 0B00     		.2byte	0xb
 3762 0079 72       		.byte	0x72
 3763 007a 00       		.sleb128 0
 3764 007b 38       		.byte	0x38
 3765 007c 24       		.byte	0x24
 3766 007d 73       		.byte	0x73
 3767 007e 00       		.sleb128 0
 3768 007f 08       		.byte	0x8
 3769 0080 FF       		.byte	0xff
 3770 0081 1A       		.byte	0x1a
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 105


 3771 0082 21       		.byte	0x21
 3772 0083 9F       		.byte	0x9f
 3773 0084 00000000 		.4byte	0
 3774 0088 00000000 		.4byte	0
 3775              	.LLST4:
 3776 008c 00000000 		.4byte	.LFB2
 3777 0090 02000000 		.4byte	.LCFI3
 3778 0094 0200     		.2byte	0x2
 3779 0096 7D       		.byte	0x7d
 3780 0097 00       		.sleb128 0
 3781 0098 02000000 		.4byte	.LCFI3
 3782 009c 60000000 		.4byte	.LFE2
 3783 00a0 0200     		.2byte	0x2
 3784 00a2 7D       		.byte	0x7d
 3785 00a3 0C       		.sleb128 12
 3786 00a4 00000000 		.4byte	0
 3787 00a8 00000000 		.4byte	0
 3788              	.LLST5:
 3789 00ac 00000000 		.4byte	.LVL33
 3790 00b0 0A000000 		.4byte	.LVL34
 3791 00b4 0100     		.2byte	0x1
 3792 00b6 50       		.byte	0x50
 3793 00b7 0A000000 		.4byte	.LVL34
 3794 00bb 60000000 		.4byte	.LFE2
 3795 00bf 0400     		.2byte	0x4
 3796 00c1 F3       		.byte	0xf3
 3797 00c2 01       		.uleb128 0x1
 3798 00c3 50       		.byte	0x50
 3799 00c4 9F       		.byte	0x9f
 3800 00c5 00000000 		.4byte	0
 3801 00c9 00000000 		.4byte	0
 3802              	.LLST6:
 3803 00cd 00000000 		.4byte	.LVL33
 3804 00d1 1A000000 		.4byte	.LVL35
 3805 00d5 0100     		.2byte	0x1
 3806 00d7 51       		.byte	0x51
 3807 00d8 1A000000 		.4byte	.LVL35
 3808 00dc 60000000 		.4byte	.LFE2
 3809 00e0 0400     		.2byte	0x4
 3810 00e2 F3       		.byte	0xf3
 3811 00e3 01       		.uleb128 0x1
 3812 00e4 51       		.byte	0x51
 3813 00e5 9F       		.byte	0x9f
 3814 00e6 00000000 		.4byte	0
 3815 00ea 00000000 		.4byte	0
 3816              	.LLST7:
 3817 00ee 00000000 		.4byte	.LFB3
 3818 00f2 02000000 		.4byte	.LCFI4
 3819 00f6 0200     		.2byte	0x2
 3820 00f8 7D       		.byte	0x7d
 3821 00f9 00       		.sleb128 0
 3822 00fa 02000000 		.4byte	.LCFI4
 3823 00fe D8000000 		.4byte	.LFE3
 3824 0102 0200     		.2byte	0x2
 3825 0104 7D       		.byte	0x7d
 3826 0105 10       		.sleb128 16
 3827 0106 00000000 		.4byte	0
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 106


 3828 010a 00000000 		.4byte	0
 3829              	.LLST8:
 3830 010e 00000000 		.4byte	.LVL36
 3831 0112 07000000 		.4byte	.LVL37-1
 3832 0116 0100     		.2byte	0x1
 3833 0118 50       		.byte	0x50
 3834 0119 07000000 		.4byte	.LVL37-1
 3835 011d D8000000 		.4byte	.LFE3
 3836 0121 0400     		.2byte	0x4
 3837 0123 F3       		.byte	0xf3
 3838 0124 01       		.uleb128 0x1
 3839 0125 50       		.byte	0x50
 3840 0126 9F       		.byte	0x9f
 3841 0127 00000000 		.4byte	0
 3842 012b 00000000 		.4byte	0
 3843              	.LLST9:
 3844 012f 00000000 		.4byte	.LVL36
 3845 0133 07000000 		.4byte	.LVL37-1
 3846 0137 0100     		.2byte	0x1
 3847 0139 51       		.byte	0x51
 3848 013a 07000000 		.4byte	.LVL37-1
 3849 013e D8000000 		.4byte	.LFE3
 3850 0142 0400     		.2byte	0x4
 3851 0144 F3       		.byte	0xf3
 3852 0145 01       		.uleb128 0x1
 3853 0146 51       		.byte	0x51
 3854 0147 9F       		.byte	0x9f
 3855 0148 00000000 		.4byte	0
 3856 014c 00000000 		.4byte	0
 3857              	.LLST10:
 3858 0150 0C000000 		.4byte	.LVL38
 3859 0154 18000000 		.4byte	.LVL39
 3860 0158 0100     		.2byte	0x1
 3861 015a 50       		.byte	0x50
 3862 015b 18000000 		.4byte	.LVL39
 3863 015f B6000000 		.4byte	.LVL42
 3864 0163 0100     		.2byte	0x1
 3865 0165 55       		.byte	0x55
 3866 0166 B6000000 		.4byte	.LVL42
 3867 016a BD000000 		.4byte	.LVL43-1
 3868 016e 0100     		.2byte	0x1
 3869 0170 50       		.byte	0x50
 3870 0171 BD000000 		.4byte	.LVL43-1
 3871 0175 D8000000 		.4byte	.LFE3
 3872 0179 0100     		.2byte	0x1
 3873 017b 55       		.byte	0x55
 3874 017c 00000000 		.4byte	0
 3875 0180 00000000 		.4byte	0
 3876              	.LLST11:
 3877 0184 00000000 		.4byte	.LFB4
 3878 0188 02000000 		.4byte	.LCFI5
 3879 018c 0200     		.2byte	0x2
 3880 018e 7D       		.byte	0x7d
 3881 018f 00       		.sleb128 0
 3882 0190 02000000 		.4byte	.LCFI5
 3883 0194 38020000 		.4byte	.LFE4
 3884 0198 0200     		.2byte	0x2
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 107


 3885 019a 7D       		.byte	0x7d
 3886 019b 10       		.sleb128 16
 3887 019c 00000000 		.4byte	0
 3888 01a0 00000000 		.4byte	0
 3889              	.LLST12:
 3890 01a4 0A000000 		.4byte	.LVL45
 3891 01a8 1A000000 		.4byte	.LVL46
 3892 01ac 0100     		.2byte	0x1
 3893 01ae 50       		.byte	0x50
 3894 01af 1A000000 		.4byte	.LVL46
 3895 01b3 FC010000 		.4byte	.LVL59
 3896 01b7 0100     		.2byte	0x1
 3897 01b9 55       		.byte	0x55
 3898 01ba FC010000 		.4byte	.LVL59
 3899 01be 03020000 		.4byte	.LVL60-1
 3900 01c2 0100     		.2byte	0x1
 3901 01c4 50       		.byte	0x50
 3902 01c5 03020000 		.4byte	.LVL60-1
 3903 01c9 38020000 		.4byte	.LFE4
 3904 01cd 0100     		.2byte	0x1
 3905 01cf 55       		.byte	0x55
 3906 01d0 00000000 		.4byte	0
 3907 01d4 00000000 		.4byte	0
 3908              	.LLST13:
 3909 01d8 00000000 		.4byte	.LFB5
 3910 01dc 02000000 		.4byte	.LCFI6
 3911 01e0 0200     		.2byte	0x2
 3912 01e2 7D       		.byte	0x7d
 3913 01e3 00       		.sleb128 0
 3914 01e4 02000000 		.4byte	.LCFI6
 3915 01e8 2C000000 		.4byte	.LFE5
 3916 01ec 0200     		.2byte	0x2
 3917 01ee 7D       		.byte	0x7d
 3918 01ef 10       		.sleb128 16
 3919 01f0 00000000 		.4byte	0
 3920 01f4 00000000 		.4byte	0
 3921              	.LLST14:
 3922 01f8 00000000 		.4byte	.LVL61
 3923 01fc 07000000 		.4byte	.LVL62-1
 3924 0200 0100     		.2byte	0x1
 3925 0202 50       		.byte	0x50
 3926 0203 07000000 		.4byte	.LVL62-1
 3927 0207 2C000000 		.4byte	.LFE5
 3928 020b 0400     		.2byte	0x4
 3929 020d F3       		.byte	0xf3
 3930 020e 01       		.uleb128 0x1
 3931 020f 50       		.byte	0x50
 3932 0210 9F       		.byte	0x9f
 3933 0211 00000000 		.4byte	0
 3934 0215 00000000 		.4byte	0
 3935              	.LLST15:
 3936 0219 08000000 		.4byte	.LVL62
 3937 021d 1F000000 		.4byte	.LVL64-1
 3938 0221 0100     		.2byte	0x1
 3939 0223 50       		.byte	0x50
 3940 0224 00000000 		.4byte	0
 3941 0228 00000000 		.4byte	0
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 108


 3942              	.LLST16:
 3943 022c 00000000 		.4byte	.LFB8
 3944 0230 02000000 		.4byte	.LCFI7
 3945 0234 0200     		.2byte	0x2
 3946 0236 7D       		.byte	0x7d
 3947 0237 00       		.sleb128 0
 3948 0238 02000000 		.4byte	.LCFI7
 3949 023c 54000000 		.4byte	.LFE8
 3950 0240 0200     		.2byte	0x2
 3951 0242 7D       		.byte	0x7d
 3952 0243 10       		.sleb128 16
 3953 0244 00000000 		.4byte	0
 3954 0248 00000000 		.4byte	0
 3955              	.LLST17:
 3956 024c 00000000 		.4byte	.LVL65
 3957 0250 0C000000 		.4byte	.LVL66
 3958 0254 0100     		.2byte	0x1
 3959 0256 50       		.byte	0x50
 3960 0257 0C000000 		.4byte	.LVL66
 3961 025b 54000000 		.4byte	.LFE8
 3962 025f 0400     		.2byte	0x4
 3963 0261 F3       		.byte	0xf3
 3964 0262 01       		.uleb128 0x1
 3965 0263 50       		.byte	0x50
 3966 0264 9F       		.byte	0x9f
 3967 0265 00000000 		.4byte	0
 3968 0269 00000000 		.4byte	0
 3969              	.LLST18:
 3970 026d 00000000 		.4byte	.LFB9
 3971 0271 02000000 		.4byte	.LCFI8
 3972 0275 0200     		.2byte	0x2
 3973 0277 7D       		.byte	0x7d
 3974 0278 00       		.sleb128 0
 3975 0279 02000000 		.4byte	.LCFI8
 3976 027d 2C000000 		.4byte	.LFE9
 3977 0281 0200     		.2byte	0x2
 3978 0283 7D       		.byte	0x7d
 3979 0284 08       		.sleb128 8
 3980 0285 00000000 		.4byte	0
 3981 0289 00000000 		.4byte	0
 3982              	.LLST19:
 3983 028d 00000000 		.4byte	.LFB10
 3984 0291 02000000 		.4byte	.LCFI9
 3985 0295 0200     		.2byte	0x2
 3986 0297 7D       		.byte	0x7d
 3987 0298 00       		.sleb128 0
 3988 0299 02000000 		.4byte	.LCFI9
 3989 029d 50000000 		.4byte	.LFE10
 3990 02a1 0200     		.2byte	0x2
 3991 02a3 7D       		.byte	0x7d
 3992 02a4 10       		.sleb128 16
 3993 02a5 00000000 		.4byte	0
 3994 02a9 00000000 		.4byte	0
 3995              	.LLST20:
 3996 02ad 00000000 		.4byte	.LVL69
 3997 02b1 0C000000 		.4byte	.LVL70
 3998 02b5 0100     		.2byte	0x1
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 109


 3999 02b7 50       		.byte	0x50
 4000 02b8 0C000000 		.4byte	.LVL70
 4001 02bc 50000000 		.4byte	.LFE10
 4002 02c0 0400     		.2byte	0x4
 4003 02c2 F3       		.byte	0xf3
 4004 02c3 01       		.uleb128 0x1
 4005 02c4 50       		.byte	0x50
 4006 02c5 9F       		.byte	0x9f
 4007 02c6 00000000 		.4byte	0
 4008 02ca 00000000 		.4byte	0
 4009              		.section	.debug_aranges,"",%progbits
 4010 0000 6C000000 		.4byte	0x6c
 4011 0004 0200     		.2byte	0x2
 4012 0006 00000000 		.4byte	.Ldebug_info0
 4013 000a 04       		.byte	0x4
 4014 000b 00       		.byte	0
 4015 000c 0000     		.2byte	0
 4016 000e 0000     		.2byte	0
 4017 0010 00000000 		.4byte	.LFB11
 4018 0014 64010000 		.4byte	.LFE11-.LFB11
 4019 0018 00000000 		.4byte	.LFB12
 4020 001c A4000000 		.4byte	.LFE12-.LFB12
 4021 0020 00000000 		.4byte	.LFB0
 4022 0024 B4010000 		.4byte	.LFE0-.LFB0
 4023 0028 00000000 		.4byte	.LFB1
 4024 002c 08020000 		.4byte	.LFE1-.LFB1
 4025 0030 00000000 		.4byte	.LFB2
 4026 0034 60000000 		.4byte	.LFE2-.LFB2
 4027 0038 00000000 		.4byte	.LFB3
 4028 003c D8000000 		.4byte	.LFE3-.LFB3
 4029 0040 00000000 		.4byte	.LFB4
 4030 0044 38020000 		.4byte	.LFE4-.LFB4
 4031 0048 00000000 		.4byte	.LFB5
 4032 004c 2C000000 		.4byte	.LFE5-.LFB5
 4033 0050 00000000 		.4byte	.LFB8
 4034 0054 54000000 		.4byte	.LFE8-.LFB8
 4035 0058 00000000 		.4byte	.LFB9
 4036 005c 2C000000 		.4byte	.LFE9-.LFB9
 4037 0060 00000000 		.4byte	.LFB10
 4038 0064 50000000 		.4byte	.LFE10-.LFB10
 4039 0068 00000000 		.4byte	0
 4040 006c 00000000 		.4byte	0
 4041              		.section	.debug_ranges,"",%progbits
 4042              	.Ldebug_ranges0:
 4043 0000 1A000000 		.4byte	.LBB10
 4044 0004 1C000000 		.4byte	.LBE10
 4045 0008 24000000 		.4byte	.LBB15
 4046 000c 06010000 		.4byte	.LBE15
 4047 0010 00000000 		.4byte	0
 4048 0014 00000000 		.4byte	0
 4049 0018 00000000 		.4byte	.LFB11
 4050 001c 64010000 		.4byte	.LFE11
 4051 0020 00000000 		.4byte	.LFB12
 4052 0024 A4000000 		.4byte	.LFE12
 4053 0028 00000000 		.4byte	.LFB0
 4054 002c B4010000 		.4byte	.LFE0
 4055 0030 00000000 		.4byte	.LFB1
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 110


 4056 0034 08020000 		.4byte	.LFE1
 4057 0038 00000000 		.4byte	.LFB2
 4058 003c 60000000 		.4byte	.LFE2
 4059 0040 00000000 		.4byte	.LFB3
 4060 0044 D8000000 		.4byte	.LFE3
 4061 0048 00000000 		.4byte	.LFB4
 4062 004c 38020000 		.4byte	.LFE4
 4063 0050 00000000 		.4byte	.LFB5
 4064 0054 2C000000 		.4byte	.LFE5
 4065 0058 00000000 		.4byte	.LFB8
 4066 005c 54000000 		.4byte	.LFE8
 4067 0060 00000000 		.4byte	.LFB9
 4068 0064 2C000000 		.4byte	.LFE9
 4069 0068 00000000 		.4byte	.LFB10
 4070 006c 50000000 		.4byte	.LFE10
 4071 0070 00000000 		.4byte	0
 4072 0074 00000000 		.4byte	0
 4073              		.section	.debug_line,"",%progbits
 4074              	.Ldebug_line0:
 4075 0000 46030000 		.section	.debug_str,"MS",%progbits,1
 4075      02006500 
 4075      00000201 
 4075      FB0E0D00 
 4075      01010101 
 4076              	.LASF102:
 4077 0000 43795664 		.ascii	"CyVdLvAnalogDisable\000"
 4077      4C76416E 
 4077      616C6F67 
 4077      44697361 
 4077      626C6500 
 4078              	.LASF10:
 4079 0014 75696E74 		.ascii	"uint16\000"
 4079      313600
 4080              	.LASF87:
 4081 001b 4379494D 		.ascii	"CyIMO_Start\000"
 4081      4F5F5374 
 4081      61727400 
 4082              	.LASF58:
 4083 0027 4379506D 		.ascii	"CyPmHibSlpRestore\000"
 4083      48696253 
 4083      6C705265 
 4083      73746F72 
 4083      6500
 4084              	.LASF43:
 4085 0039 77616B65 		.ascii	"wakeupTrim0\000"
 4085      75705472 
 4085      696D3000 
 4086              	.LASF44:
 4087 0045 77616B65 		.ascii	"wakeupTrim1\000"
 4087      75705472 
 4087      696D3100 
 4088              	.LASF20:
 4089 0051 6D617374 		.ascii	"masterClkSrc\000"
 4089      6572436C 
 4089      6B537263 
 4089      00
 4090              	.LASF56:
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 111


 4091 005e 43595F50 		.ascii	"CY_PM_BACKUP_STRUCT\000"
 4091      4D5F4241 
 4091      434B5550 
 4091      5F535452 
 4091      55435400 
 4092              	.LASF110:
 4093 0072 43795854 		.ascii	"CyXTAL_32KHZ_Start\000"
 4093      414C5F33 
 4093      324B485A 
 4093      5F537461 
 4093      727400
 4094              	.LASF28:
 4095 0085 636C6B53 		.ascii	"clkSyncDiv\000"
 4095      796E6344 
 4095      697600
 4096              	.LASF60:
 4097 0090 4379506D 		.ascii	"CyPmRestoreClocks\000"
 4097      52657374 
 4097      6F726543 
 4097      6C6F636B 
 4097      7300
 4098              	.LASF7:
 4099 00a2 6C6F6E67 		.ascii	"long long unsigned int\000"
 4099      206C6F6E 
 4099      6720756E 
 4099      7369676E 
 4099      65642069 
 4100              	.LASF70:
 4101 00b9 4379506D 		.ascii	"CyPmHviLviSaveDisable\000"
 4101      4876694C 
 4101      76695361 
 4101      76654469 
 4101      7361626C 
 4102              	.LASF76:
 4103 00cf 746D7053 		.ascii	"tmpStatus\000"
 4103      74617475 
 4103      7300
 4104              	.LASF49:
 4105 00d9 6C766961 		.ascii	"lviaTrip\000"
 4105      54726970 
 4105      00
 4106              	.LASF22:
 4107 00e2 696D6F55 		.ascii	"imoUsbClk\000"
 4107      7362436C 
 4107      6B00
 4108              	.LASF80:
 4109 00ec 4379506D 		.ascii	"CyPmFtwSetInterval\000"
 4109      46747753 
 4109      6574496E 
 4109      74657276 
 4109      616C00
 4110              	.LASF50:
 4111 00ff 68766961 		.ascii	"hviaEn\000"
 4111      456E00
 4112              	.LASF105:
 4113 0106 43795664 		.ascii	"CyVdLvDigitEnable\000"
 4113      4C764469 
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 112


 4113      67697445 
 4113      6E61626C 
 4113      6500
 4114              	.LASF36:
 4115 0118 696C6F50 		.ascii	"iloPowerMode\000"
 4115      6F776572 
 4115      4D6F6465 
 4115      00
 4116              	.LASF6:
 4117 0125 6C6F6E67 		.ascii	"long long int\000"
 4117      206C6F6E 
 4117      6720696E 
 4117      7400
 4118              	.LASF0:
 4119 0133 7369676E 		.ascii	"signed char\000"
 4119      65642063 
 4119      68617200 
 4120              	.LASF29:
 4121 013f 636C6B42 		.ascii	"clkBusDiv\000"
 4121      75734469 
 4121      7600
 4122              	.LASF68:
 4123 0149 696E7465 		.ascii	"interruptState\000"
 4123      72727570 
 4123      74537461 
 4123      746500
 4124              	.LASF108:
 4125 0158 4379494C 		.ascii	"CyILO_Start1K\000"
 4125      4F5F5374 
 4125      61727431 
 4125      4B00
 4126              	.LASF27:
 4127 0166 696D6F32 		.ascii	"imo2x\000"
 4127      7800
 4128              	.LASF4:
 4129 016c 6C6F6E67 		.ascii	"long int\000"
 4129      20696E74 
 4129      00
 4130              	.LASF72:
 4131 0175 4379506D 		.ascii	"CyPmHviLviRestore\000"
 4131      4876694C 
 4131      76695265 
 4131      73746F72 
 4131      6500
 4132              	.LASF9:
 4133 0187 75696E74 		.ascii	"uint8\000"
 4133      3800
 4134              	.LASF99:
 4135 018d 4379504C 		.ascii	"CyPLL_OUT_Start\000"
 4135      4C5F4F55 
 4135      545F5374 
 4135      61727400 
 4136              	.LASF13:
 4137 019d 646F7562 		.ascii	"double\000"
 4137      6C6500
 4138              	.LASF112:
 4139 01a4 2E5C4765 		.ascii	".\\Generated_Source\\PSoC5\\cyPm.c\000"
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 113


 4139      6E657261 
 4139      7465645F 
 4139      536F7572 
 4139      63655C50 
 4140              	.LASF11:
 4141 01c4 75696E74 		.ascii	"uint32\000"
 4141      333200
 4142              	.LASF31:
 4143 01cb 786D687A 		.ascii	"xmhzEnableState\000"
 4143      456E6162 
 4143      6C655374 
 4143      61746500 
 4144              	.LASF71:
 4145 01db 4379506D 		.ascii	"CyPmHibRestore\000"
 4145      48696252 
 4145      6573746F 
 4145      726500
 4146              	.LASF113:
 4147 01ea 573A5C53 		.ascii	"W:\\SCSI2SD\\USB_Bootloader.cydsn\000"
 4147      43534932 
 4147      53445C55 
 4147      53425F42 
 4147      6F6F746C 
 4148              	.LASF74:
 4149 020a 6D61736B 		.ascii	"mask\000"
 4149      00
 4150              	.LASF53:
 4151 020f 696D6F41 		.ascii	"imoActFreq\000"
 4151      63744672 
 4151      657100
 4152              	.LASF8:
 4153 021a 756E7369 		.ascii	"unsigned int\000"
 4153      676E6564 
 4153      20696E74 
 4153      00
 4154              	.LASF45:
 4155 0227 73636374 		.ascii	"scctData\000"
 4155      44617461 
 4155      00
 4156              	.LASF88:
 4157 0230 4379494D 		.ascii	"CyIMO_SetSource\000"
 4157      4F5F5365 
 4157      74536F75 
 4157      72636500 
 4158              	.LASF21:
 4159 0240 696D6F46 		.ascii	"imoFreq\000"
 4159      72657100 
 4160              	.LASF5:
 4161 0248 6C6F6E67 		.ascii	"long unsigned int\000"
 4161      20756E73 
 4161      69676E65 
 4161      6420696E 
 4161      7400
 4162              	.LASF46:
 4163 025a 6C766964 		.ascii	"lvidEn\000"
 4163      456E00
 4164              	.LASF34:
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 114


 4165 0261 6379506D 		.ascii	"cyPmClockBackupStruct\000"
 4165      436C6F63 
 4165      6B426163 
 4165      6B757053 
 4165      74727563 
 4166              	.LASF115:
 4167 0277 4379456E 		.ascii	"CyEnterCriticalSection\000"
 4167      74657243 
 4167      72697469 
 4167      63616C53 
 4167      65637469 
 4168              	.LASF35:
 4169 028e 6379506D 		.ascii	"cyPmBackupStruct\000"
 4169      4261636B 
 4169      75705374 
 4169      72756374 
 4169      00
 4170              	.LASF104:
 4171 029f 4379494C 		.ascii	"CyILO_SetPowerMode\000"
 4171      4F5F5365 
 4171      74506F77 
 4171      65724D6F 
 4171      646500
 4172              	.LASF96:
 4173 02b2 4379494D 		.ascii	"CyIMO_Stop\000"
 4173      4F5F5374 
 4173      6F7000
 4174              	.LASF33:
 4175 02bd 43595F50 		.ascii	"CY_PM_CLOCK_BACKUP_STRUCT\000"
 4175      4D5F434C 
 4175      4F434B5F 
 4175      4241434B 
 4175      55505F53 
 4176              	.LASF3:
 4177 02d7 73686F72 		.ascii	"short unsigned int\000"
 4177      7420756E 
 4177      7369676E 
 4177      65642069 
 4177      6E7400
 4178              	.LASF78:
 4179 02ea 63747749 		.ascii	"ctwInterval\000"
 4179      6E746572 
 4179      76616C00 
 4180              	.LASF103:
 4181 02f6 43795664 		.ascii	"CyVdHvAnalogDisable\000"
 4181      4876416E 
 4181      616C6F67 
 4181      44697361 
 4181      626C6500 
 4182              	.LASF90:
 4183 030a 43794D61 		.ascii	"CyMasterClk_SetSource\000"
 4183      73746572 
 4183      436C6B5F 
 4183      53657453 
 4183      6F757263 
 4184              	.LASF40:
 4185 0320 77616B65 		.ascii	"wakeupCfg0\000"
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 115


 4185      75704366 
 4185      673000
 4186              	.LASF41:
 4187 032b 77616B65 		.ascii	"wakeupCfg1\000"
 4187      75704366 
 4187      673100
 4188              	.LASF42:
 4189 0336 77616B65 		.ascii	"wakeupCfg2\000"
 4189      75704366 
 4189      673200
 4190              	.LASF62:
 4191 0341 636C6B42 		.ascii	"clkBusDivTmp\000"
 4191      75734469 
 4191      76546D70 
 4191      00
 4192              	.LASF55:
 4193 034e 626F6F73 		.ascii	"boostRefExt\000"
 4193      74526566 
 4193      45787400 
 4194              	.LASF26:
 4195 035a 636C6B49 		.ascii	"clkImoSrc\000"
 4195      6D6F5372 
 4195      6300
 4196              	.LASF59:
 4197 0364 4379506D 		.ascii	"CyPmSaveClocks\000"
 4197      53617665 
 4197      436C6F63 
 4197      6B7300
 4198              	.LASF98:
 4199 0373 43795854 		.ascii	"CyXTAL_Start\000"
 4199      414C5F53 
 4199      74617274 
 4199      00
 4200              	.LASF39:
 4201 0380 736C7054 		.ascii	"slpTrBypass\000"
 4201      72427970 
 4201      61737300 
 4202              	.LASF17:
 4203 038c 73697A65 		.ascii	"sizetype\000"
 4203      74797065 
 4203      00
 4204              	.LASF63:
 4205 0395 6379506D 		.ascii	"cyPmImoFreqMhz2Reg\000"
 4205      496D6F46 
 4205      7265714D 
 4205      687A3252 
 4205      656700
 4206              	.LASF18:
 4207 03a8 656E436C 		.ascii	"enClkA\000"
 4207      6B4100
 4208              	.LASF19:
 4209 03af 656E436C 		.ascii	"enClkD\000"
 4209      6B4400
 4210              	.LASF109:
 4211 03b6 4379494C 		.ascii	"CyILO_Start100K\000"
 4211      4F5F5374 
 4211      61727431 
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 116


 4211      30304B00 
 4212              	.LASF66:
 4213 03c6 77616B65 		.ascii	"wakeupSource\000"
 4213      7570536F 
 4213      75726365 
 4213      00
 4214              	.LASF93:
 4215 03d3 4379504C 		.ascii	"CyPLL_OUT_Stop\000"
 4215      4C5F4F55 
 4215      545F5374 
 4215      6F7000
 4216              	.LASF89:
 4217 03e2 43794D61 		.ascii	"CyMasterClk_SetDivider\000"
 4217      73746572 
 4217      436C6B5F 
 4217      53657444 
 4217      69766964 
 4218              	.LASF25:
 4219 03f9 696D6F43 		.ascii	"imoClkSrc\000"
 4219      6C6B5372 
 4219      6300
 4220              	.LASF12:
 4221 0403 666C6F61 		.ascii	"float\000"
 4221      7400
 4222              	.LASF100:
 4223 0409 43794578 		.ascii	"CyExitCriticalSection\000"
 4223      69744372 
 4223      69746963 
 4223      616C5365 
 4223      6374696F 
 4224              	.LASF67:
 4225 041f 4379506D 		.ascii	"CyPmSleep\000"
 4225      536C6565 
 4225      7000
 4226              	.LASF51:
 4227 0429 6C766964 		.ascii	"lvidRst\000"
 4227      52737400 
 4228              	.LASF64:
 4229 0431 4379506D 		.ascii	"CyPmAltAct\000"
 4229      416C7441 
 4229      637400
 4230              	.LASF95:
 4231 043c 43794465 		.ascii	"CyDelayCycles\000"
 4231      6C617943 
 4231      79636C65 
 4231      7300
 4232              	.LASF111:
 4233 044a 474E5520 		.ascii	"GNU C 4.7.3 20130312 (release) [ARM/embedded-4_7-br"
 4233      4320342E 
 4233      372E3320 
 4233      32303133 
 4233      30333132 
 4234 047d 616E6368 		.ascii	"anch revision 196615]\000"
 4234      20726576 
 4234      6973696F 
 4234      6E203139 
 4234      36363135 
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 117


 4235              	.LASF16:
 4236 0493 72656738 		.ascii	"reg8\000"
 4236      00
 4237              	.LASF79:
 4238 0498 4379506D 		.ascii	"CyPmOppsSet\000"
 4238      4F707073 
 4238      53657400 
 4239              	.LASF1:
 4240 04a4 756E7369 		.ascii	"unsigned char\000"
 4240      676E6564 
 4240      20636861 
 4240      7200
 4241              	.LASF83:
 4242 04b2 6379506D 		.ascii	"cyPmClockBackup\000"
 4242      436C6F63 
 4242      6B426163 
 4242      6B757000 
 4243              	.LASF30:
 4244 04c2 706C6C45 		.ascii	"pllEnableState\000"
 4244      6E61626C 
 4244      65537461 
 4244      746500
 4245              	.LASF37:
 4246 04d1 696C6F31 		.ascii	"ilo1kEnable\000"
 4246      6B456E61 
 4246      626C6500 
 4247              	.LASF2:
 4248 04dd 73686F72 		.ascii	"short int\000"
 4248      7420696E 
 4248      7400
 4249              	.LASF57:
 4250 04e7 4379506D 		.ascii	"CyPmHibSlpSaveSet\000"
 4250      48696253 
 4250      6C705361 
 4250      76655365 
 4250      7400
 4251              	.LASF38:
 4252 04f9 696C6F31 		.ascii	"ilo100kEnable\000"
 4252      30306B45 
 4252      6E61626C 
 4252      6500
 4253              	.LASF14:
 4254 0507 63686172 		.ascii	"char\000"
 4254      00
 4255              	.LASF92:
 4256 050c 4379494D 		.ascii	"CyIMO_DisableDoubler\000"
 4256      4F5F4469 
 4256      7361626C 
 4256      65446F75 
 4256      626C6572 
 4257              	.LASF101:
 4258 0521 43795664 		.ascii	"CyVdLvDigitDisable\000"
 4258      4C764469 
 4258      67697444 
 4258      69736162 
 4258      6C6500
 4259              	.LASF54:
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 118


 4260 0534 696D6F41 		.ascii	"imoActFreq12Mhz\000"
 4260      63744672 
 4260      65713132 
 4260      4D687A00 
 4261              	.LASF73:
 4262 0544 4379506D 		.ascii	"CyPmHibernate\000"
 4262      48696265 
 4262      726E6174 
 4262      6500
 4263              	.LASF85:
 4264 0552 4379466C 		.ascii	"CyFlash_SetWaitCycles\000"
 4264      6173685F 
 4264      53657457 
 4264      61697443 
 4264      79636C65 
 4265              	.LASF81:
 4266 0568 66747749 		.ascii	"ftwInterval\000"
 4266      6E746572 
 4266      76616C00 
 4267              	.LASF84:
 4268 0574 6379506D 		.ascii	"cyPmImoFreqReg2Mhz\000"
 4268      496D6F46 
 4268      72657152 
 4268      6567324D 
 4268      687A00
 4269              	.LASF114:
 4270 0587 4379506D 		.ascii	"CyPmReadStatus\000"
 4270      52656164 
 4270      53746174 
 4270      757300
 4271              	.LASF91:
 4272 0596 43794275 		.ascii	"CyBusClk_SetDivider\000"
 4272      73436C6B 
 4272      5F536574 
 4272      44697669 
 4272      64657200 
 4273              	.LASF32:
 4274 05aa 636C6B44 		.ascii	"clkDistDelay\000"
 4274      69737444 
 4274      656C6179 
 4274      00
 4275              	.LASF77:
 4276 05b7 4379506D 		.ascii	"CyPmCtwSetInterval\000"
 4276      43747753 
 4276      6574496E 
 4276      74657276 
 4276      616C00
 4277              	.LASF61:
 4278 05ca 73746174 		.ascii	"status\000"
 4278      757300
 4279              	.LASF48:
 4280 05d1 6C766961 		.ascii	"lviaEn\000"
 4280      456E00
 4281              	.LASF86:
 4282 05d8 4379494D 		.ascii	"CyIMO_SetFreq\000"
 4282      4F5F5365 
 4282      74467265 
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 119


 4282      7100
 4283              	.LASF97:
 4284 05e6 4379494D 		.ascii	"CyIMO_EnableDoubler\000"
 4284      4F5F456E 
 4284      61626C65 
 4284      446F7562 
 4284      6C657200 
 4285              	.LASF69:
 4286 05fa 4379506D 		.ascii	"CyPmHibSaveSet\000"
 4286      48696253 
 4286      61766553 
 4286      657400
 4287              	.LASF65:
 4288 0609 77616B65 		.ascii	"wakeupTime\000"
 4288      75705469 
 4288      6D6500
 4289              	.LASF106:
 4290 0614 43795664 		.ascii	"CyVdLvAnalogEnable\000"
 4290      4C76416E 
 4290      616C6F67 
 4290      456E6162 
 4290      6C6500
 4291              	.LASF15:
 4292 0627 63797374 		.ascii	"cystatus\000"
 4292      61747573 
 4292      00
 4293              	.LASF23:
 4294 0630 666C6173 		.ascii	"flashWaitCycles\000"
 4294      68576169 
 4294      74437963 
 4294      6C657300 
 4295              	.LASF52:
 4296 0640 6C766961 		.ascii	"lviaRst\000"
 4296      52737400 
 4297              	.LASF107:
 4298 0648 43795664 		.ascii	"CyVdHvAnalogEnable\000"
 4298      4876416E 
 4298      616C6F67 
 4298      456E6162 
 4298      6C6500
 4299              	.LASF94:
 4300 065b 43795854 		.ascii	"CyXTAL_Stop\000"
 4300      414C5F53 
 4300      746F7000 
 4301              	.LASF82:
 4302 0667 6379506D 		.ascii	"cyPmBackup\000"
 4302      4261636B 
 4302      757000
 4303              	.LASF47:
 4304 0672 6C766964 		.ascii	"lvidTrip\000"
 4304      54726970 
 4304      00
 4305              	.LASF24:
 4306 067b 696D6F45 		.ascii	"imoEnable\000"
 4306      6E61626C 
 4306      6500
 4307              	.LASF75:
ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cccYZJXD.s 			page 120


 4308 0685 696E7465 		.ascii	"interruptStatus\000"
 4308      72727570 
 4308      74537461 
 4308      74757300 
 4309              		.ident	"GCC: (GNU Tools for ARM Embedded Processors) 4.7.3 20130312 (release) [ARM/embedded-4_7-br
