Update IDE files

This commit is contained in:
Michael McMaster 2019-05-22 20:06:49 +10:00
parent baf133df4e
commit 561f2903e9
45 changed files with 10652 additions and 10312 deletions

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@ -31,7 +31,7 @@
#include <string.h>
static const uint16_t FIRMWARE_VERSION = 0x0481;
static const uint16_t FIRMWARE_VERSION = 0x0482;
// 1 flash row
static const uint8_t DEFAULT_CONFIG[256] =

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@ -1,14 +1,14 @@
/*******************************************************************************
* File Name: cydevice.h
* OBSOLETE: Do not use this file. Use the _trm version instead.
* PSoC Creator 4.1
* PSoC Creator 4.2
*
* Description:
* This file provides all of the address values for the entire PSoC device.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.

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@ -1,14 +1,14 @@
/*******************************************************************************
* File Name: cydevice_trm.h
*
* PSoC Creator 4.1
* PSoC Creator 4.2
*
* Description:
* This file provides all of the address values for the entire PSoC device.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.

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@ -1,14 +1,14 @@
/*******************************************************************************
* File Name: cydevicegnu.inc
* OBSOLETE: Do not use this file. Use the _trm version instead.
* PSoC Creator 4.1
* PSoC Creator 4.2
*
* Description:
* This file provides all of the address values for the entire PSoC device.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.

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@ -1,14 +1,14 @@
/*******************************************************************************
* File Name: cydevicegnu_trm.inc
*
* PSoC Creator 4.1
* PSoC Creator 4.2
*
* Description:
* This file provides all of the address values for the entire PSoC device.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.

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@ -1,13 +1,13 @@
;
; File Name: cydeviceiar.inc
; OBSOLETE: Do not use this file. Use the _trm version instead.
; PSoC Creator 4.1
; PSoC Creator 4.2
;
; Description:
; This file provides all of the address values for the entire PSoC device.
;
;-------------------------------------------------------------------------------
; Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.

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@ -1,13 +1,13 @@
;
; File Name: cydeviceiar_trm.inc
;
; PSoC Creator 4.1
; PSoC Creator 4.2
;
; Description:
; This file provides all of the address values for the entire PSoC device.
;
;-------------------------------------------------------------------------------
; Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.

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@ -1,13 +1,13 @@
;
; File Name: cydevicerv.inc
; OBSOLETE: Do not use this file. Use the _trm version instead.
; PSoC Creator 4.1
; PSoC Creator 4.2
;
; Description:
; This file provides all of the address values for the entire PSoC device.
;
;-------------------------------------------------------------------------------
; Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.

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@ -1,13 +1,13 @@
;
; File Name: cydevicerv_trm.inc
;
; PSoC Creator 4.1
; PSoC Creator 4.2
;
; Description:
; This file provides all of the address values for the entire PSoC device.
;
;-------------------------------------------------------------------------------
; Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.

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@ -1,14 +1,14 @@
/*******************************************************************************
* File Name: cyfitter_cfg.h
*
* PSoC Creator 4.1
* PSoC Creator 4.2
*
* Description:
* This file provides basic startup and mux configuration settings
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.

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@ -1,14 +1,14 @@
/*******************************************************************************
* File Name: cymetadata.c
*
* PSoC Creator 4.1
* PSoC Creator 4.2
*
* Description:
* This file defines all extra memory spaces that need to be included.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.

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@ -1,14 +1,14 @@
/*******************************************************************************
* File Name: project.h
*
* PSoC Creator 4.1
* PSoC Creator 4.2
*
* Description:
* It contains references to all generated header files and should not be modified.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
@ -83,6 +83,7 @@
#include "cyPm.h"
#include "CySpc.h"
#include "cytypes.h"
#include "cy_em_eeprom.h"
/*[]*/

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@ -1,12 +1,42 @@
<?xml version="1.0" encoding="utf-8"?>
<blockRegMap version="1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://cypress.com/xsd/cyblockregmap cyblockregmap.xsd" xmlns="http://cypress.com/xsd/cyblockregmap">
<block name="SCSI_RX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_TX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_RX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_TX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_Filtered" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<register name="SCSI_Filtered_STATUS_REG" address="0x4000646D" bitWidth="8" desc="" hidden="false" />
<register name="SCSI_Filtered_MASK_REG" address="0x4000648D" bitWidth="8" desc="" hidden="false" />
<register name="SCSI_Filtered_STATUS_AUX_CTL_REG" address="0x4000649D" bitWidth="8" desc="" hidden="false">
<field name="FIFO0" from="5" to="5" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="ENABLED" value="1" desc="Enable counter" />
<value name="DISABLED" value="0" desc="Disable counter" />
</field>
<field name="INTRENBL" from="4" to="4" access="RW" resetVal="" desc="Enables or disables the Interrupt" hidden="false">
<value name="ENABLED" value="1" desc="Interrupt enabled" />
<value name="DISABLED" value="0" desc="Interrupt disabled" />
</field>
<field name="FIFO1LEVEL" from="3" to="3" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="ENABLED" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
<value name="DISABLED" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
</field>
<field name="FIFO0LEVEL" from="2" to="2" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="ENABLED" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
<value name="DISABLED" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
</field>
<field name="FIFO1CLEAR" from="1" to="1" access="RW" resetVal="" desc="FIFO clear" hidden="false">
<value name="ENABLED" value="1" desc="Clear FIFO state" />
<value name="DISABLED" value="0" desc="Normal FIFO operation" />
</field>
<field name="FIFO0CLEAR" from="0" to="0" access="RW" resetVal="" desc="FIFO clear" hidden="false">
<value name="ENABLED" value="1" desc="Clear FIFO state" />
<value name="DISABLED" value="0" desc="Normal FIFO operation" />
</field>
</register>
</block>
<block name="SCSI_Parity_Error" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<register name="SCSI_Parity_Error_STATUS_REG" address="0x40006465" bitWidth="8" desc="" hidden="false" />
<register name="SCSI_Parity_Error_MASK_REG" address="0x40006485" bitWidth="8" desc="" hidden="false" />
<register name="SCSI_Parity_Error_STATUS_AUX_CTL_REG" address="0x40006495" bitWidth="8" desc="" hidden="false">
<register name="SCSI_Parity_Error_STATUS_REG" address="0x4000646B" bitWidth="8" desc="" hidden="false" />
<register name="SCSI_Parity_Error_MASK_REG" address="0x4000648B" bitWidth="8" desc="" hidden="false" />
<register name="SCSI_Parity_Error_STATUS_AUX_CTL_REG" address="0x4000649B" bitWidth="8" desc="" hidden="false">
<field name="FIFO0" from="5" to="5" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="ENABLED" value="1" desc="Enable counter" />
<value name="DISABLED" value="0" desc="Disable counter" />
@ -34,129 +64,44 @@
</register>
</block>
<block name="SCSI_RX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_RX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_TX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Debug_Timer_Interrupt" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="timer_clock" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_RX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_TX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_TX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_Filtered" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<register name="SCSI_Filtered_STATUS_REG" address="0x4000646B" bitWidth="8" desc="" hidden="false" />
<register name="SCSI_Filtered_MASK_REG" address="0x4000648B" bitWidth="8" desc="" hidden="false" />
<register name="SCSI_Filtered_STATUS_AUX_CTL_REG" address="0x4000649B" bitWidth="8" desc="" hidden="false">
<field name="FIFO0" from="5" to="5" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="ENABLED" value="1" desc="Enable counter" />
<value name="DISABLED" value="0" desc="Disable counter" />
</field>
<field name="INTRENBL" from="4" to="4" access="RW" resetVal="" desc="Enables or disables the Interrupt" hidden="false">
<value name="ENABLED" value="1" desc="Interrupt enabled" />
<value name="DISABLED" value="0" desc="Interrupt disabled" />
</field>
<field name="FIFO1LEVEL" from="3" to="3" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="ENABLED" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
<value name="DISABLED" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
</field>
<field name="FIFO0LEVEL" from="2" to="2" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="ENABLED" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
<value name="DISABLED" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
</field>
<field name="FIFO1CLEAR" from="1" to="1" access="RW" resetVal="" desc="FIFO clear" hidden="false">
<value name="ENABLED" value="1" desc="Clear FIFO state" />
<value name="DISABLED" value="0" desc="Normal FIFO operation" />
</field>
<field name="FIFO0CLEAR" from="0" to="0" access="RW" resetVal="" desc="FIFO clear" hidden="false">
<value name="ENABLED" value="1" desc="Clear FIFO state" />
<value name="DISABLED" value="0" desc="Normal FIFO operation" />
</field>
</register>
</block>
<block name="mux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_SEL_ISR" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cydff_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Clock_4" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Em_EEPROM_Dynamic" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cy_boot" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_Glitch_Ctl" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<register name="SCSI_Glitch_Ctl_CONTROL_REG" address="0x40006474" bitWidth="8" desc="" hidden="false" />
<register name="SCSI_Glitch_Ctl_CONTROL_REG" address="0x40006473" bitWidth="8" desc="" hidden="false" />
</block>
<block name="mux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Clock_4" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cydff_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cy_constant_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="GlitchFilter_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="not_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="EXTLED" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Clock_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Debug_Timer" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<block name="VirtualMux_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="TimerHW" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="OneTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="VirtualMux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="VirtualMux_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<register name="Debug_Timer_GLOBAL_ENABLE" address="0x400043A3" bitWidth="8" desc="PM.ACT.CFG" hidden="false">
<field name="en_timer" from="3" to="0" access="RW" resetVal="" desc="Enable timer/counters." hidden="false" />
</register>
<register name="Debug_Timer_CONTROL" address="0x40004F00" bitWidth="8" desc="TMRx.CFG0" hidden="false">
<field name="EN" from="0" to="0" access="RW" resetVal="" desc="Enables timer/comparator." hidden="false" />
<field name="MODE" from="1" to="1" access="RW" resetVal="" desc="Mode. (0 = Timer; 1 = Comparator)" hidden="false">
<value name="Timer" value="0" desc="Timer mode. CNT/CMP register holds timer count value." />
<value name="Comparator" value="1" desc="Comparator mode. CNT/CMP register holds comparator threshold value." />
</field>
<field name="ONESHOT" from="2" to="2" access="RW" resetVal="" desc="Timer stops upon reaching stop condition defined by TMR_CFG bits. Can be restarted by asserting TIMER RESET or disabling and re-enabling block." hidden="false" />
<field name="CMP_BUFF" from="3" to="3" access="RW" resetVal="" desc="Buffer compare register. Compare register updates only on timer terminal count." hidden="false" />
<field name="INV" from="4" to="4" access="RW" resetVal="" desc="Invert sense of TIMEREN signal" hidden="false" />
<field name="DB" from="5" to="5" access="RW" resetVal="" desc="Deadband mode--Deadband phases phi1 and phi2 are outputted on CMP and TC output pins respectively." hidden="false">
<value name="Timer" value="0" desc="CMP and TC are output." />
<value name="Deadband" value="1" desc="PHI1 (instead of CMP) and PHI2 (instead of TC) are output." />
</field>
<field name="DEADBAND_PERIOD" from="7" to="6" access="RW" resetVal="" desc="Deadband Period" hidden="false" />
</register>
<register name="Debug_Timer_CONTROL2" address="0x40004F01" bitWidth="8" desc="TMRx.CFG1" hidden="false">
<field name="IRQ_SEL" from="0" to="0" access="RW" resetVal="" desc="Irq selection. (0 = raw interrupts; 1 = status register interrupts)" hidden="false" />
<field name="FTC" from="1" to="1" access="RW" resetVal="" desc="First Terminal Count (FTC). Setting this bit forces a single pulse on the TC pin when first enabled." hidden="false">
<value name="Disable FTC" value="0" desc="Disable the single cycle pulse, which signifies the timer is starting." />
<value name="Enable FTC" value="1" desc="Enable the single cycle pulse, which signifies the timer is starting." />
</field>
<field name="DCOR" from="2" to="2" access="RW" resetVal="" desc="Disable Clear on Read (DCOR) of Status Register SR0." hidden="false" />
<field name="DBMODE" from="3" to="3" access="RW" resetVal="" desc="Deadband mode (asynchronous/synchronous). CMP output pin is also affected when not in deadband mode (CFG0.DEADBAND)." hidden="false" />
<field name="CLK_BUS_EN_SEL" from="6" to="4" access="RW" resetVal="" desc="Digital Global Clock selection." hidden="false" />
<field name="BUS_CLK_SEL" from="7" to="7" access="RW" resetVal="" desc="Bus Clock selection." hidden="false" />
</register>
<register name="Debug_Timer_CONTROL3_" address="0x40004F02" bitWidth="8" desc="TMRx.CFG2" hidden="false">
<field name="TMR_CFG" from="1" to="0" access="RW" resetVal="" desc="Timer configuration (MODE = 0): 000 = Continuous; 001 = Pulsewidth; 010 = Period; 011 = Stop on IRQ" hidden="false">
<value name="Continuous" value="0" desc="Timer runs while EN bit of CFG0 register is set to '1'." />
<value name="Pulsewidth" value="1" desc="Timer runs from positive to negative edge of TIMEREN." />
<value name="Period" value="10" desc="Timer runs from positive to positive edge of TIMEREN." />
<value name="Irq" value="11" desc="Timer runs until IRQ." />
</field>
<field name="COD" from="2" to="2" access="RW" resetVal="" desc="Clear On Disable (COD). Clears or gates outputs to zero." hidden="false" />
<field name="ROD" from="3" to="3" access="RW" resetVal="" desc="Reset On Disable (ROD). Resets internal state of output logic" hidden="false" />
<field name="CMP_CFG" from="6" to="4" access="RW" resetVal="" desc="Comparator configurations" hidden="false">
<value name="Equal" value="0" desc="Compare Equal " />
<value name="Less than" value="1" desc="Compare Less Than " />
<value name="Less than or equal" value="10" desc="Compare Less Than or Equal ." />
<value name="Greater" value="11" desc="Compare Greater Than ." />
<value name="Greater than or equal" value="100" desc="Compare Greater Than or Equal " />
</field>
<field name="HW_EN" from="7" to="7" access="RW" resetVal="" desc="When set Timer Enable controls counting." hidden="false" />
</register>
<register name="Debug_Timer_PERIOD" address="0x40004F04" bitWidth="16" desc="TMRx.PER0 - Assigned Period" hidden="false" />
<register name="Debug_Timer_COUNTER" address="0x40004F06" bitWidth="16" desc="TMRx.CNT_CMP0 - Current Down Counter Value" hidden="false" />
</block>
<block name="SD_CS" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="CFG_EEPROM" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_Out" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_In" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_CLK" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_MOSI" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_SCK" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_CS" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_In" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_Data_Clk" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_Out_DBx" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_In_DBx" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="OddParityGen_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_CTL_PHASE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<register name="SCSI_CTL_PHASE_CONTROL_REG" address="0x40006476" bitWidth="8" desc="" hidden="false" />
<register name="SCSI_CTL_PHASE_CONTROL_REG" address="0x40006472" bitWidth="8" desc="" hidden="false" />
</block>
<block name="SD_CD" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_CLK" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_Out_Mux" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Bootloadable_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="USBFS" BASE="0x0" SIZE="0x0" desc="USBFS" visible="true" hidden="false">
<block name="ep_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
@ -1016,14 +961,70 @@
<field name="RA9" from="0" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
</register>
</block>
<block name="SD_MISO" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Debug_Timer" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<block name="VirtualMux_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="TimerHW" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="OneTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="VirtualMux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="VirtualMux_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<register name="Debug_Timer_GLOBAL_ENABLE" address="0x400043A3" bitWidth="8" desc="PM.ACT.CFG" hidden="false">
<field name="en_timer" from="3" to="0" access="RW" resetVal="" desc="Enable timer/counters." hidden="false" />
</register>
<register name="Debug_Timer_CONTROL" address="0x40004F00" bitWidth="8" desc="TMRx.CFG0" hidden="false">
<field name="EN" from="0" to="0" access="RW" resetVal="" desc="Enables timer/comparator." hidden="false" />
<field name="MODE" from="1" to="1" access="RW" resetVal="" desc="Mode. (0 = Timer; 1 = Comparator)" hidden="false">
<value name="Timer" value="0" desc="Timer mode. CNT/CMP register holds timer count value." />
<value name="Comparator" value="1" desc="Comparator mode. CNT/CMP register holds comparator threshold value." />
</field>
<field name="ONESHOT" from="2" to="2" access="RW" resetVal="" desc="Timer stops upon reaching stop condition defined by TMR_CFG bits. Can be restarted by asserting TIMER RESET or disabling and re-enabling block." hidden="false" />
<field name="CMP_BUFF" from="3" to="3" access="RW" resetVal="" desc="Buffer compare register. Compare register updates only on timer terminal count." hidden="false" />
<field name="INV" from="4" to="4" access="RW" resetVal="" desc="Invert sense of TIMEREN signal" hidden="false" />
<field name="DB" from="5" to="5" access="RW" resetVal="" desc="Deadband mode--Deadband phases phi1 and phi2 are outputted on CMP and TC output pins respectively." hidden="false">
<value name="Timer" value="0" desc="CMP and TC are output." />
<value name="Deadband" value="1" desc="PHI1 (instead of CMP) and PHI2 (instead of TC) are output." />
</field>
<field name="DEADBAND_PERIOD" from="7" to="6" access="RW" resetVal="" desc="Deadband Period" hidden="false" />
</register>
<register name="Debug_Timer_CONTROL2" address="0x40004F01" bitWidth="8" desc="TMRx.CFG1" hidden="false">
<field name="IRQ_SEL" from="0" to="0" access="RW" resetVal="" desc="Irq selection. (0 = raw interrupts; 1 = status register interrupts)" hidden="false" />
<field name="FTC" from="1" to="1" access="RW" resetVal="" desc="First Terminal Count (FTC). Setting this bit forces a single pulse on the TC pin when first enabled." hidden="false">
<value name="Disable FTC" value="0" desc="Disable the single cycle pulse, which signifies the timer is starting." />
<value name="Enable FTC" value="1" desc="Enable the single cycle pulse, which signifies the timer is starting." />
</field>
<field name="DCOR" from="2" to="2" access="RW" resetVal="" desc="Disable Clear on Read (DCOR) of Status Register SR0." hidden="false" />
<field name="DBMODE" from="3" to="3" access="RW" resetVal="" desc="Deadband mode (asynchronous/synchronous). CMP output pin is also affected when not in deadband mode (CFG0.DEADBAND)." hidden="false" />
<field name="CLK_BUS_EN_SEL" from="6" to="4" access="RW" resetVal="" desc="Digital Global Clock selection." hidden="false" />
<field name="BUS_CLK_SEL" from="7" to="7" access="RW" resetVal="" desc="Bus Clock selection." hidden="false" />
</register>
<register name="Debug_Timer_CONTROL3_" address="0x40004F02" bitWidth="8" desc="TMRx.CFG2" hidden="false">
<field name="TMR_CFG" from="1" to="0" access="RW" resetVal="" desc="Timer configuration (MODE = 0): 000 = Continuous; 001 = Pulsewidth; 010 = Period; 011 = Stop on IRQ" hidden="false">
<value name="Continuous" value="0" desc="Timer runs while EN bit of CFG0 register is set to '1'." />
<value name="Pulsewidth" value="1" desc="Timer runs from positive to negative edge of TIMEREN." />
<value name="Period" value="10" desc="Timer runs from positive to positive edge of TIMEREN." />
<value name="Irq" value="11" desc="Timer runs until IRQ." />
</field>
<field name="COD" from="2" to="2" access="RW" resetVal="" desc="Clear On Disable (COD). Clears or gates outputs to zero." hidden="false" />
<field name="ROD" from="3" to="3" access="RW" resetVal="" desc="Reset On Disable (ROD). Resets internal state of output logic" hidden="false" />
<field name="CMP_CFG" from="6" to="4" access="RW" resetVal="" desc="Comparator configurations" hidden="false">
<value name="Equal" value="0" desc="Compare Equal " />
<value name="Less than" value="1" desc="Compare Less Than " />
<value name="Less than or equal" value="10" desc="Compare Less Than or Equal ." />
<value name="Greater" value="11" desc="Compare Greater Than ." />
<value name="Greater than or equal" value="100" desc="Compare Greater Than or Equal " />
</field>
<field name="HW_EN" from="7" to="7" access="RW" resetVal="" desc="When set Timer Enable controls counting." hidden="false" />
</register>
<register name="Debug_Timer_PERIOD" address="0x40004F04" bitWidth="16" desc="TMRx.PER0 - Assigned Period" hidden="false" />
<register name="Debug_Timer_COUNTER" address="0x40004F06" bitWidth="16" desc="TMRx.CNT_CMP0 - Current Down Counter Value" hidden="false" />
</block>
<block name="SCSI_Out_Ctl" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<register name="SCSI_Out_Ctl_CONTROL_REG" address="0x4000647C" bitWidth="8" desc="" hidden="false" />
<register name="SCSI_Out_Ctl_CONTROL_REG" address="0x40006477" bitWidth="8" desc="" hidden="false" />
</block>
<block name="SCSI_Out_Bits" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<register name="SCSI_Out_Bits_CONTROL_REG" address="0x4000647E" bitWidth="8" desc="" hidden="false" />
<register name="SCSI_Out_Bits_CONTROL_REG" address="0x4000647A" bitWidth="8" desc="" hidden="false" />
</block>
<block name="SCSI_Out_Mux" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_MISO" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_RST_ISR" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_Noise" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="not_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />

View File

@ -473,6 +473,7 @@
<Group key="Component">
<Group key="v1">
<Data key="cy_boot" value="cy_boot_v5_50" />
<Data key="Em_EEPROM_Dynamic" value="Em_EEPROM_Dynamic_v2_0" />
<Data key="LIN_Dynamic" value="LIN_Dynamic_v3_40" />
</Group>
</Group>
@ -3632,7 +3633,13 @@
</Group>
</Group>
<Group key="Interrupt">
<Data key="791071b3-a348-49c4-b578-64e66d701d0f/d91ea660-bc91-4817-b29b-2fe86c305500" value="6" />
<Group key="791071b3-a348-49c4-b578-64e66d701d0f/d91ea660-bc91-4817-b29b-2fe86c305500">
<Group key="CortexM3">
<Data key="Assigned" value="True" />
<Data key="Priority" value="6" />
<Data key="Vector" value="-1" />
</Group>
</Group>
</Group>
<Group key="Pin2">
<Group key="1bd12db2-da87-4f00-90d1-0a734e846c58">

View File

@ -2156,6 +2156,32 @@
<build_action v="OTHER;;;;" />
<PropertyDeltas />
</CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
<CyGuid_ebc4f06d-207f-49c2-a540-72acf4adabc0 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtFolderSerialize" version="3">
<CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtBaseContainerSerialize" version="1">
<CyGuid_31768f72-0253-412b-af77-e7dba74d1330 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItemSerialize" version="2" name="Em_EEPROM_Dynamic" persistent="">
<Hidden v="False" />
</CyGuid_31768f72-0253-412b-af77-e7dba74d1330>
<CyGuid_0820c2e7-528d-4137-9a08-97257b946089 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItemListSerialize" version="2">
<dependencies>
<CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtFileSerialize" version="3" xml_contents_version="1">
<CyGuid_31768f72-0253-412b-af77-e7dba74d1330 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItemSerialize" version="2" name="cy_em_eeprom.c" persistent="Generated_Source\PSoC5\cy_em_eeprom.c">
<Hidden v="False" />
</CyGuid_31768f72-0253-412b-af77-e7dba74d1330>
<build_action v="SOURCE_C;CortexM3;;;" />
<PropertyDeltas />
</CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
<CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtFileSerialize" version="3" xml_contents_version="1">
<CyGuid_31768f72-0253-412b-af77-e7dba74d1330 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItemSerialize" version="2" name="cy_em_eeprom.h" persistent="Generated_Source\PSoC5\cy_em_eeprom.h">
<Hidden v="False" />
</CyGuid_31768f72-0253-412b-af77-e7dba74d1330>
<build_action v="HEADER;;;;" />
<PropertyDeltas />
</CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
</dependencies>
</CyGuid_0820c2e7-528d-4137-9a08-97257b946089>
</CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8>
<filters />
</CyGuid_ebc4f06d-207f-49c2-a540-72acf4adabc0>
</dependencies>
</CyGuid_0820c2e7-528d-4137-9a08-97257b946089>
</CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8>
@ -2764,8 +2790,8 @@
</platforms>
<project_current_platform v="c9323d49-d323-40b8-9b59-cc008d68a989" />
<last_selected_tab v="Cypress" />
<WriteAppVersionLastSavedWith v="4.1.0.2686" />
<WriteAppMarketingVersionLastSavedWith v=" 4.1" />
<WriteAppVersionLastSavedWith v="4.2.0.641" />
<WriteAppMarketingVersionLastSavedWith v=" 4.2" />
<project_id v="6e1f5cbb-a0ca-4f55-a1fa-7b20c5be3a3e" />
<GenerateDescriptionFiles v="False" />
</CyGuid_49cfd574-032a-4a64-b7be-d4eeeaf25e43>

View File

@ -7,9 +7,9 @@
<width>32</width>
<peripherals>
<peripheral>
<name>SCSI_Parity_Error</name>
<name>SCSI_Filtered</name>
<description>No description available</description>
<baseAddress>0x40006465</baseAddress>
<baseAddress>0x0</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x0</size>
@ -17,27 +17,27 @@
</addressBlock>
<registers>
<register>
<name>SCSI_Parity_Error_STATUS_REG</name>
<name>SCSI_Filtered_STATUS_REG</name>
<description>No description available</description>
<addressOffset>0x0</addressOffset>
<addressOffset>0x4000646D</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
<resetMask>0</resetMask>
</register>
<register>
<name>SCSI_Parity_Error_MASK_REG</name>
<name>SCSI_Filtered_MASK_REG</name>
<description>No description available</description>
<addressOffset>0x20</addressOffset>
<addressOffset>0x4000648D</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
<resetMask>0</resetMask>
</register>
<register>
<name>SCSI_Parity_Error_STATUS_AUX_CTL_REG</name>
<name>SCSI_Filtered_STATUS_AUX_CTL_REG</name>
<description>No description available</description>
<addressOffset>0x30</addressOffset>
<addressOffset>0x4000649D</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
@ -162,9 +162,9 @@
</registers>
</peripheral>
<peripheral>
<name>SCSI_Filtered</name>
<name>SCSI_Parity_Error</name>
<description>No description available</description>
<baseAddress>0x4000646B</baseAddress>
<baseAddress>0x0</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x0</size>
@ -172,27 +172,27 @@
</addressBlock>
<registers>
<register>
<name>SCSI_Filtered_STATUS_REG</name>
<name>SCSI_Parity_Error_STATUS_REG</name>
<description>No description available</description>
<addressOffset>0x0</addressOffset>
<addressOffset>0x4000646B</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
<resetMask>0</resetMask>
</register>
<register>
<name>SCSI_Filtered_MASK_REG</name>
<name>SCSI_Parity_Error_MASK_REG</name>
<description>No description available</description>
<addressOffset>0x20</addressOffset>
<addressOffset>0x4000648B</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
<resetMask>0</resetMask>
</register>
<register>
<name>SCSI_Filtered_STATUS_AUX_CTL_REG</name>
<name>SCSI_Parity_Error_STATUS_AUX_CTL_REG</name>
<description>No description available</description>
<addressOffset>0x30</addressOffset>
<addressOffset>0x4000649B</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
@ -319,7 +319,7 @@
<peripheral>
<name>SCSI_Glitch_Ctl</name>
<description>No description available</description>
<baseAddress>0x40006474</baseAddress>
<baseAddress>0x0</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x0</size>
@ -329,7 +329,7 @@
<register>
<name>SCSI_Glitch_Ctl_CONTROL_REG</name>
<description>No description available</description>
<addressOffset>0x0</addressOffset>
<addressOffset>0x40006473</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
@ -337,302 +337,10 @@
</register>
</registers>
</peripheral>
<peripheral>
<name>Debug_Timer</name>
<description>No description available</description>
<baseAddress>0x0</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x0</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>Debug_Timer_GLOBAL_ENABLE</name>
<description>PM.ACT.CFG</description>
<addressOffset>0x400043A3</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
<resetMask>0</resetMask>
<fields>
<field>
<name>en_timer</name>
<description>Enable timer/counters.</description>
<lsb>0</lsb>
<msb>3</msb>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>Debug_Timer_CONTROL</name>
<description>TMRx.CFG0</description>
<addressOffset>0x40004F00</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
<resetMask>0</resetMask>
<fields>
<field>
<name>EN</name>
<description>Enables timer/comparator.</description>
<lsb>0</lsb>
<msb>0</msb>
<access>read-write</access>
</field>
<field>
<name>MODE</name>
<description>Mode. (0 = Timer; 1 = Comparator)</description>
<lsb>1</lsb>
<msb>1</msb>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>Timer</name>
<description>Timer mode. CNT/CMP register holds timer count value.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Comparator</name>
<description>Comparator mode. CNT/CMP register holds comparator threshold value.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ONESHOT</name>
<description>Timer stops upon reaching stop condition defined by TMR_CFG bits. Can be restarted by asserting TIMER RESET or disabling and re-enabling block.</description>
<lsb>2</lsb>
<msb>2</msb>
<access>read-write</access>
</field>
<field>
<name>CMP_BUFF</name>
<description>Buffer compare register. Compare register updates only on timer terminal count.</description>
<lsb>3</lsb>
<msb>3</msb>
<access>read-write</access>
</field>
<field>
<name>INV</name>
<description>Invert sense of TIMEREN signal</description>
<lsb>4</lsb>
<msb>4</msb>
<access>read-write</access>
</field>
<field>
<name>DB</name>
<description>Deadband mode--Deadband phases phi1 and phi2 are outputted on CMP and TC output pins respectively.</description>
<lsb>5</lsb>
<msb>5</msb>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>Timer</name>
<description>CMP and TC are output.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deadband</name>
<description>PHI1 (instead of CMP) and PHI2 (instead of TC) are output.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DEADBAND_PERIOD</name>
<description>Deadband Period</description>
<lsb>6</lsb>
<msb>7</msb>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>Debug_Timer_CONTROL2</name>
<description>TMRx.CFG1</description>
<addressOffset>0x40004F01</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
<resetMask>0</resetMask>
<fields>
<field>
<name>IRQ_SEL</name>
<description>Irq selection. (0 = raw interrupts; 1 = status register interrupts)</description>
<lsb>0</lsb>
<msb>0</msb>
<access>read-write</access>
</field>
<field>
<name>FTC</name>
<description>First Terminal Count (FTC). Setting this bit forces a single pulse on the TC pin when first enabled.</description>
<lsb>1</lsb>
<msb>1</msb>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>Disable_FTC</name>
<description>Disable the single cycle pulse, which signifies the timer is starting.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable_FTC</name>
<description>Enable the single cycle pulse, which signifies the timer is starting.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DCOR</name>
<description>Disable Clear on Read (DCOR) of Status Register SR0.</description>
<lsb>2</lsb>
<msb>2</msb>
<access>read-write</access>
</field>
<field>
<name>DBMODE</name>
<description>Deadband mode (asynchronous/synchronous). CMP output pin is also affected when not in deadband mode (CFG0.DEADBAND).</description>
<lsb>3</lsb>
<msb>3</msb>
<access>read-write</access>
</field>
<field>
<name>CLK_BUS_EN_SEL</name>
<description>Digital Global Clock selection.</description>
<lsb>4</lsb>
<msb>6</msb>
<access>read-write</access>
</field>
<field>
<name>BUS_CLK_SEL</name>
<description>Bus Clock selection.</description>
<lsb>7</lsb>
<msb>7</msb>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>Debug_Timer_CONTROL3_</name>
<description>TMRx.CFG2</description>
<addressOffset>0x40004F02</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
<resetMask>0</resetMask>
<fields>
<field>
<name>TMR_CFG</name>
<description>Timer configuration (MODE = 0): 000 = Continuous; 001 = Pulsewidth; 010 = Period; 011 = Stop on IRQ</description>
<lsb>0</lsb>
<msb>1</msb>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>Continuous</name>
<description>Timer runs while EN bit of CFG0 register is set to '1'.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pulsewidth</name>
<description>Timer runs from positive to negative edge of TIMEREN.</description>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>Period</name>
<description>Timer runs from positive to positive edge of TIMEREN.</description>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>Irq</name>
<description>Timer runs until IRQ.</description>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>COD</name>
<description>Clear On Disable (COD). Clears or gates outputs to zero.</description>
<lsb>2</lsb>
<msb>2</msb>
<access>read-write</access>
</field>
<field>
<name>ROD</name>
<description>Reset On Disable (ROD). Resets internal state of output logic</description>
<lsb>3</lsb>
<msb>3</msb>
<access>read-write</access>
</field>
<field>
<name>CMP_CFG</name>
<description>Comparator configurations</description>
<lsb>4</lsb>
<msb>6</msb>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>Equal</name>
<description>Compare Equal </description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Less_than</name>
<description>Compare Less Than </description>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>Less_than_or_equal</name>
<description>Compare Less Than or Equal .</description>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>Greater</name>
<description>Compare Greater Than .</description>
<value>3</value>
</enumeratedValue>
<enumeratedValue>
<name>Greater_than_or_equal</name>
<description>Compare Greater Than or Equal </description>
<value>4</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>HW_EN</name>
<description>When set Timer Enable controls counting.</description>
<lsb>7</lsb>
<msb>7</msb>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>Debug_Timer_PERIOD</name>
<description>TMRx.PER0 - Assigned Period</description>
<addressOffset>0x40004F04</addressOffset>
<size>16</size>
<access>read-write</access>
<resetValue>0</resetValue>
<resetMask>0</resetMask>
</register>
<register>
<name>Debug_Timer_COUNTER</name>
<description>TMRx.CNT_CMP0 - Current Down Counter Value</description>
<addressOffset>0x40004F06</addressOffset>
<size>16</size>
<access>read-write</access>
<resetValue>0</resetValue>
<resetMask>0</resetMask>
</register>
</registers>
</peripheral>
<peripheral>
<name>SCSI_CTL_PHASE</name>
<description>No description available</description>
<baseAddress>0x40006476</baseAddress>
<baseAddress>0x0</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x0</size>
@ -642,7 +350,7 @@
<register>
<name>SCSI_CTL_PHASE_CONTROL_REG</name>
<description>No description available</description>
<addressOffset>0x0</addressOffset>
<addressOffset>0x40006472</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
@ -2888,10 +2596,302 @@
</register>
</registers>
</peripheral>
<peripheral>
<name>Debug_Timer</name>
<description>No description available</description>
<baseAddress>0x0</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x0</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>Debug_Timer_GLOBAL_ENABLE</name>
<description>PM.ACT.CFG</description>
<addressOffset>0x400043A3</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
<resetMask>0</resetMask>
<fields>
<field>
<name>en_timer</name>
<description>Enable timer/counters.</description>
<lsb>0</lsb>
<msb>3</msb>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>Debug_Timer_CONTROL</name>
<description>TMRx.CFG0</description>
<addressOffset>0x40004F00</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
<resetMask>0</resetMask>
<fields>
<field>
<name>EN</name>
<description>Enables timer/comparator.</description>
<lsb>0</lsb>
<msb>0</msb>
<access>read-write</access>
</field>
<field>
<name>MODE</name>
<description>Mode. (0 = Timer; 1 = Comparator)</description>
<lsb>1</lsb>
<msb>1</msb>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>Timer</name>
<description>Timer mode. CNT/CMP register holds timer count value.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Comparator</name>
<description>Comparator mode. CNT/CMP register holds comparator threshold value.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ONESHOT</name>
<description>Timer stops upon reaching stop condition defined by TMR_CFG bits. Can be restarted by asserting TIMER RESET or disabling and re-enabling block.</description>
<lsb>2</lsb>
<msb>2</msb>
<access>read-write</access>
</field>
<field>
<name>CMP_BUFF</name>
<description>Buffer compare register. Compare register updates only on timer terminal count.</description>
<lsb>3</lsb>
<msb>3</msb>
<access>read-write</access>
</field>
<field>
<name>INV</name>
<description>Invert sense of TIMEREN signal</description>
<lsb>4</lsb>
<msb>4</msb>
<access>read-write</access>
</field>
<field>
<name>DB</name>
<description>Deadband mode--Deadband phases phi1 and phi2 are outputted on CMP and TC output pins respectively.</description>
<lsb>5</lsb>
<msb>5</msb>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>Timer</name>
<description>CMP and TC are output.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deadband</name>
<description>PHI1 (instead of CMP) and PHI2 (instead of TC) are output.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DEADBAND_PERIOD</name>
<description>Deadband Period</description>
<lsb>6</lsb>
<msb>7</msb>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>Debug_Timer_CONTROL2</name>
<description>TMRx.CFG1</description>
<addressOffset>0x40004F01</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
<resetMask>0</resetMask>
<fields>
<field>
<name>IRQ_SEL</name>
<description>Irq selection. (0 = raw interrupts; 1 = status register interrupts)</description>
<lsb>0</lsb>
<msb>0</msb>
<access>read-write</access>
</field>
<field>
<name>FTC</name>
<description>First Terminal Count (FTC). Setting this bit forces a single pulse on the TC pin when first enabled.</description>
<lsb>1</lsb>
<msb>1</msb>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>Disable_FTC</name>
<description>Disable the single cycle pulse, which signifies the timer is starting.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable_FTC</name>
<description>Enable the single cycle pulse, which signifies the timer is starting.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DCOR</name>
<description>Disable Clear on Read (DCOR) of Status Register SR0.</description>
<lsb>2</lsb>
<msb>2</msb>
<access>read-write</access>
</field>
<field>
<name>DBMODE</name>
<description>Deadband mode (asynchronous/synchronous). CMP output pin is also affected when not in deadband mode (CFG0.DEADBAND).</description>
<lsb>3</lsb>
<msb>3</msb>
<access>read-write</access>
</field>
<field>
<name>CLK_BUS_EN_SEL</name>
<description>Digital Global Clock selection.</description>
<lsb>4</lsb>
<msb>6</msb>
<access>read-write</access>
</field>
<field>
<name>BUS_CLK_SEL</name>
<description>Bus Clock selection.</description>
<lsb>7</lsb>
<msb>7</msb>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>Debug_Timer_CONTROL3_</name>
<description>TMRx.CFG2</description>
<addressOffset>0x40004F02</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
<resetMask>0</resetMask>
<fields>
<field>
<name>TMR_CFG</name>
<description>Timer configuration (MODE = 0): 000 = Continuous; 001 = Pulsewidth; 010 = Period; 011 = Stop on IRQ</description>
<lsb>0</lsb>
<msb>1</msb>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>Continuous</name>
<description>Timer runs while EN bit of CFG0 register is set to '1'.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pulsewidth</name>
<description>Timer runs from positive to negative edge of TIMEREN.</description>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>Period</name>
<description>Timer runs from positive to positive edge of TIMEREN.</description>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>Irq</name>
<description>Timer runs until IRQ.</description>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>COD</name>
<description>Clear On Disable (COD). Clears or gates outputs to zero.</description>
<lsb>2</lsb>
<msb>2</msb>
<access>read-write</access>
</field>
<field>
<name>ROD</name>
<description>Reset On Disable (ROD). Resets internal state of output logic</description>
<lsb>3</lsb>
<msb>3</msb>
<access>read-write</access>
</field>
<field>
<name>CMP_CFG</name>
<description>Comparator configurations</description>
<lsb>4</lsb>
<msb>6</msb>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>Equal</name>
<description>Compare Equal </description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Less_than</name>
<description>Compare Less Than </description>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>Less_than_or_equal</name>
<description>Compare Less Than or Equal .</description>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>Greater</name>
<description>Compare Greater Than .</description>
<value>3</value>
</enumeratedValue>
<enumeratedValue>
<name>Greater_than_or_equal</name>
<description>Compare Greater Than or Equal </description>
<value>4</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>HW_EN</name>
<description>When set Timer Enable controls counting.</description>
<lsb>7</lsb>
<msb>7</msb>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>Debug_Timer_PERIOD</name>
<description>TMRx.PER0 - Assigned Period</description>
<addressOffset>0x40004F04</addressOffset>
<size>16</size>
<access>read-write</access>
<resetValue>0</resetValue>
<resetMask>0</resetMask>
</register>
<register>
<name>Debug_Timer_COUNTER</name>
<description>TMRx.CNT_CMP0 - Current Down Counter Value</description>
<addressOffset>0x40004F06</addressOffset>
<size>16</size>
<access>read-write</access>
<resetValue>0</resetValue>
<resetMask>0</resetMask>
</register>
</registers>
</peripheral>
<peripheral>
<name>SCSI_Out_Ctl</name>
<description>No description available</description>
<baseAddress>0x4000647C</baseAddress>
<baseAddress>0x0</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x0</size>
@ -2901,7 +2901,7 @@
<register>
<name>SCSI_Out_Ctl_CONTROL_REG</name>
<description>No description available</description>
<addressOffset>0x0</addressOffset>
<addressOffset>0x40006477</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
@ -2912,7 +2912,7 @@
<peripheral>
<name>SCSI_Out_Bits</name>
<description>No description available</description>
<baseAddress>0x4000647E</baseAddress>
<baseAddress>0x0</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x0</size>
@ -2922,7 +2922,7 @@
<register>
<name>SCSI_Out_Bits_CONTROL_REG</name>
<description>No description available</description>
<addressOffset>0x0</addressOffset>
<addressOffset>0x4000647A</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>

View File

@ -1,14 +1,14 @@
/*******************************************************************************
* File Name: cydevice.h
* OBSOLETE: Do not use this file. Use the _trm version instead.
* PSoC Creator 4.1
* PSoC Creator 4.2
*
* Description:
* This file provides all of the address values for the entire PSoC device.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.

View File

@ -1,14 +1,14 @@
/*******************************************************************************
* File Name: cydevice_trm.h
*
* PSoC Creator 4.1
* PSoC Creator 4.2
*
* Description:
* This file provides all of the address values for the entire PSoC device.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.

View File

@ -1,14 +1,14 @@
/*******************************************************************************
* File Name: cydevicegnu.inc
* OBSOLETE: Do not use this file. Use the _trm version instead.
* PSoC Creator 4.1
* PSoC Creator 4.2
*
* Description:
* This file provides all of the address values for the entire PSoC device.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.

View File

@ -1,14 +1,14 @@
/*******************************************************************************
* File Name: cydevicegnu_trm.inc
*
* PSoC Creator 4.1
* PSoC Creator 4.2
*
* Description:
* This file provides all of the address values for the entire PSoC device.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.

View File

@ -1,13 +1,13 @@
;
; File Name: cydeviceiar.inc
; OBSOLETE: Do not use this file. Use the _trm version instead.
; PSoC Creator 4.1
; PSoC Creator 4.2
;
; Description:
; This file provides all of the address values for the entire PSoC device.
;
;-------------------------------------------------------------------------------
; Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.

View File

@ -1,13 +1,13 @@
;
; File Name: cydeviceiar_trm.inc
;
; PSoC Creator 4.1
; PSoC Creator 4.2
;
; Description:
; This file provides all of the address values for the entire PSoC device.
;
;-------------------------------------------------------------------------------
; Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.

View File

@ -1,13 +1,13 @@
;
; File Name: cydevicerv.inc
; OBSOLETE: Do not use this file. Use the _trm version instead.
; PSoC Creator 4.1
; PSoC Creator 4.2
;
; Description:
; This file provides all of the address values for the entire PSoC device.
;
;-------------------------------------------------------------------------------
; Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.

View File

@ -1,13 +1,13 @@
;
; File Name: cydevicerv_trm.inc
;
; PSoC Creator 4.1
; PSoC Creator 4.2
;
; Description:
; This file provides all of the address values for the entire PSoC device.
;
;-------------------------------------------------------------------------------
; Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.

View File

@ -2,7 +2,7 @@
/*******************************************************************************
* File Name: cyfitter_cfg.c
*
* PSoC Creator 4.1
* PSoC Creator 4.2
*
* Description:
* This file contains device initialization code.
@ -10,7 +10,7 @@
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
@ -101,6 +101,7 @@ static void CYCONFIGCPYCODE(void *dest, const void *src, size_t n)
#define CYCLOCKSTART_32KHZ_ERROR 2u
#define CYCLOCKSTART_PLL_ERROR 3u
#define CYCLOCKSTART_FLL_ERROR 4u
#define CYCLOCKSTART_WCO_ERROR 5u
#ifdef CY_NEED_CYCLOCKSTARTUPERROR
@ -124,12 +125,8 @@ static void CyClockStartupError(uint8 errorCode);
CY_CFG_UNUSED
static void CyClockStartupError(uint8 errorCode)
{
/* To remove the compiler warning if errorCode not used. */
#if defined(CY_PSOC3) && (CY_PSOC3)
/* To remove the compiler warning if errorCode not used. */
errorCode = errorCode;
#else
(void)errorCode;
#endif /* CY_PSOC3 */
/* If we have a clock startup error (bad MHz crystal, PLL lock, etc.), */
/* we will end up here to allow the customer to implement something to */
@ -399,7 +396,7 @@ void cyfitter_cfg(void)
/* Set Flash Cycles based on max possible frequency in case a glitch occurs during ClockSetup(). */
CY_SET_XTND_REG8((void CYFAR *)(CYREG_CACHE_CC_CTL), (((CYDEV_INSTRUCT_CACHE_ENABLED) != 0) ? 0x01u : 0x00u));
CY_SET_XTND_REG8((void CYFAR *)(CYREG_CACHE_CC_CTL), (((CYDEV_INSTRUCT_CACHE_ENABLED) != 0) ? 0x61u : 0x60u));
/* Setup clocks based on selections from Clock DWR */
ClockSetup();
/* Set Flash Cycles based on newly configured 50.00MHz Bus Clock. */

View File

@ -1,14 +1,14 @@
/*******************************************************************************
* File Name: cyfitter_cfg.h
*
* PSoC Creator 4.1
* PSoC Creator 4.2
*
* Description:
* This file provides basic startup and mux configuration settings
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.

View File

@ -1,14 +1,14 @@
/*******************************************************************************
* File Name: cymetadata.c
*
* PSoC Creator 4.1
* PSoC Creator 4.2
*
* Description:
* This file defines all extra memory spaces that need to be included.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.

View File

@ -1,14 +1,14 @@
/*******************************************************************************
* File Name: project.h
*
* PSoC Creator 4.1
* PSoC Creator 4.2
*
* Description:
* It contains references to all generated header files and should not be modified.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
@ -82,6 +82,7 @@
#include "cyPm.h"
#include "CySpc.h"
#include "cytypes.h"
#include "cy_em_eeprom.h"
/*[]*/

View File

@ -1,5 +1,6 @@
<?xml version="1.0" encoding="utf-8"?>
<blockRegMap version="1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://cypress.com/xsd/cyblockregmap cyblockregmap.xsd" xmlns="http://cypress.com/xsd/cyblockregmap">
<block name="GlitchFilter_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_Filtered" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<register name="SCSI_Filtered_STATUS_REG" address="0x4000646B" bitWidth="8" desc="" hidden="false" />
<register name="SCSI_Filtered_MASK_REG" address="0x4000648B" bitWidth="8" desc="" hidden="false" />
@ -60,34 +61,34 @@
</field>
</register>
</block>
<block name="SCSI_RX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="GlitchFilter_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cy_constant_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="not_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Clock_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cydff_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cy_constant_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_TX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_RX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_TX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_TX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_TX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_RX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_RX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_RX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_TX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_RX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="not_5" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="not_8" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="not_4" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="not_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="not_5" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="not_7" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Em_EEPROM_Dynamic" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cy_boot" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="not_6" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="not_7" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_SEL_ISR" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cydff_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Clock_4" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="not_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_SEL_ISR" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="mux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="not_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="TERM_EN" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_Glitch_Ctl" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<register name="SCSI_Glitch_Ctl_CONTROL_REG" address="0x40006475" bitWidth="8" desc="" hidden="false" />
</block>
<block name="mux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_TX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_SCK" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_CS" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="CFG_EEPROM" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />

View File

@ -473,6 +473,7 @@
<Group key="Component">
<Group key="v1">
<Data key="cy_boot" value="cy_boot_v5_50" />
<Data key="Em_EEPROM_Dynamic" value="Em_EEPROM_Dynamic_v2_0" />
<Data key="LIN_Dynamic" value="LIN_Dynamic_v3_40" />
</Group>
</Group>
@ -3633,7 +3634,13 @@
</Group>
</Group>
<Group key="Interrupt">
<Data key="791071b3-a348-49c4-b578-64e66d701d0f/d91ea660-bc91-4817-b29b-2fe86c305500" value="6" />
<Group key="791071b3-a348-49c4-b578-64e66d701d0f/d91ea660-bc91-4817-b29b-2fe86c305500">
<Group key="CortexM3">
<Data key="Assigned" value="True" />
<Data key="Priority" value="6" />
<Data key="Vector" value="-1" />
</Group>
</Group>
</Group>
<Group key="Pin2">
<Group key="1bd12db2-da87-4f00-90d1-0a734e846c58">

View File

@ -2203,6 +2203,32 @@
</CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8>
<filters />
</CyGuid_ebc4f06d-207f-49c2-a540-72acf4adabc0>
<CyGuid_ebc4f06d-207f-49c2-a540-72acf4adabc0 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtFolderSerialize" version="3">
<CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtBaseContainerSerialize" version="1">
<CyGuid_31768f72-0253-412b-af77-e7dba74d1330 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItemSerialize" version="2" name="Em_EEPROM_Dynamic" persistent="">
<Hidden v="False" />
</CyGuid_31768f72-0253-412b-af77-e7dba74d1330>
<CyGuid_0820c2e7-528d-4137-9a08-97257b946089 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItemListSerialize" version="2">
<dependencies>
<CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtFileSerialize" version="3" xml_contents_version="1">
<CyGuid_31768f72-0253-412b-af77-e7dba74d1330 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItemSerialize" version="2" name="cy_em_eeprom.c" persistent="Generated_Source\PSoC5\cy_em_eeprom.c">
<Hidden v="False" />
</CyGuid_31768f72-0253-412b-af77-e7dba74d1330>
<build_action v="SOURCE_C;CortexM3;;;" />
<PropertyDeltas />
</CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
<CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtFileSerialize" version="3" xml_contents_version="1">
<CyGuid_31768f72-0253-412b-af77-e7dba74d1330 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItemSerialize" version="2" name="cy_em_eeprom.h" persistent="Generated_Source\PSoC5\cy_em_eeprom.h">
<Hidden v="False" />
</CyGuid_31768f72-0253-412b-af77-e7dba74d1330>
<build_action v="HEADER;;;;" />
<PropertyDeltas />
</CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
</dependencies>
</CyGuid_0820c2e7-528d-4137-9a08-97257b946089>
</CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8>
<filters />
</CyGuid_ebc4f06d-207f-49c2-a540-72acf4adabc0>
</dependencies>
</CyGuid_0820c2e7-528d-4137-9a08-97257b946089>
</CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8>
@ -2811,8 +2837,8 @@
</platforms>
<project_current_platform v="c9323d49-d323-40b8-9b59-cc008d68a989" />
<last_selected_tab v="Cypress" />
<WriteAppVersionLastSavedWith v="4.1.0.2686" />
<WriteAppMarketingVersionLastSavedWith v=" 4.1" />
<WriteAppVersionLastSavedWith v="4.2.0.641" />
<WriteAppMarketingVersionLastSavedWith v=" 4.2" />
<project_id v="6e1f5cbb-a0ca-4f55-a1fa-7b20c5be3a3e" />
<GenerateDescriptionFiles v="False" />
</CyGuid_49cfd574-032a-4a64-b7be-d4eeeaf25e43>

View File

@ -9,7 +9,7 @@
<peripheral>
<name>SCSI_Filtered</name>
<description>No description available</description>
<baseAddress>0x4000646B</baseAddress>
<baseAddress>0x0</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x0</size>
@ -19,7 +19,7 @@
<register>
<name>SCSI_Filtered_STATUS_REG</name>
<description>No description available</description>
<addressOffset>0x0</addressOffset>
<addressOffset>0x4000646B</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
@ -28,7 +28,7 @@
<register>
<name>SCSI_Filtered_MASK_REG</name>
<description>No description available</description>
<addressOffset>0x20</addressOffset>
<addressOffset>0x4000648B</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
@ -37,7 +37,7 @@
<register>
<name>SCSI_Filtered_STATUS_AUX_CTL_REG</name>
<description>No description available</description>
<addressOffset>0x30</addressOffset>
<addressOffset>0x4000649B</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
@ -164,7 +164,7 @@
<peripheral>
<name>SCSI_Parity_Error</name>
<description>No description available</description>
<baseAddress>0x40006462</baseAddress>
<baseAddress>0x0</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x0</size>
@ -174,7 +174,7 @@
<register>
<name>SCSI_Parity_Error_STATUS_REG</name>
<description>No description available</description>
<addressOffset>0x0</addressOffset>
<addressOffset>0x40006462</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
@ -183,7 +183,7 @@
<register>
<name>SCSI_Parity_Error_MASK_REG</name>
<description>No description available</description>
<addressOffset>0x20</addressOffset>
<addressOffset>0x40006482</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
@ -192,7 +192,7 @@
<register>
<name>SCSI_Parity_Error_STATUS_AUX_CTL_REG</name>
<description>No description available</description>
<addressOffset>0x30</addressOffset>
<addressOffset>0x40006492</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
@ -319,7 +319,7 @@
<peripheral>
<name>SCSI_Glitch_Ctl</name>
<description>No description available</description>
<baseAddress>0x40006475</baseAddress>
<baseAddress>0x0</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x0</size>
@ -329,7 +329,7 @@
<register>
<name>SCSI_Glitch_Ctl_CONTROL_REG</name>
<description>No description available</description>
<addressOffset>0x0</addressOffset>
<addressOffset>0x40006475</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
@ -340,7 +340,7 @@
<peripheral>
<name>SCSI_CTL_PHASE</name>
<description>No description available</description>
<baseAddress>0x40006472</baseAddress>
<baseAddress>0x0</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x0</size>
@ -350,7 +350,7 @@
<register>
<name>SCSI_CTL_PHASE_CONTROL_REG</name>
<description>No description available</description>
<addressOffset>0x0</addressOffset>
<addressOffset>0x40006472</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
@ -361,7 +361,7 @@
<peripheral>
<name>SCSI_Out_Ctl</name>
<description>No description available</description>
<baseAddress>0x4000647B</baseAddress>
<baseAddress>0x0</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x0</size>
@ -371,7 +371,7 @@
<register>
<name>SCSI_Out_Ctl_CONTROL_REG</name>
<description>No description available</description>
<addressOffset>0x0</addressOffset>
<addressOffset>0x4000647B</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
@ -382,7 +382,7 @@
<peripheral>
<name>SCSI_Out_Bits</name>
<description>No description available</description>
<baseAddress>0x40006477</baseAddress>
<baseAddress>0x0</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x0</size>
@ -392,7 +392,7 @@
<register>
<name>SCSI_Out_Bits_CONTROL_REG</name>
<description>No description available</description>
<addressOffset>0x0</addressOffset>
<addressOffset>0x40006477</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>