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https://github.com/fhgwright/SCSI2SD.git
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Clean up version number mishap (4.2.3 reported as 4.2.2)
Reduce size of mode pages for SCSI1 hosts Stability improvements whan handling resets during SCSI reads.
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@ -1,3 +1,11 @@
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20150504 4.2.4
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- Clean up version number mishap (4.2.3 reported as 4.2.2)
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- Reduce size of mode pages for SCSI1 hosts
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- Stability improvements whan handling resets during SCSI reads.
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20150420 4.2.3
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- Bugfix for failed flash checksums after configing configuration
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20150420 4.2.2
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- Improved compatibility with older SCSI1 hosts.
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@ -32,7 +32,7 @@
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#include <string.h>
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static const uint16_t FIRMWARE_VERSION = 0x0422;
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static const uint16_t FIRMWARE_VERSION = 0x0424;
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enum USB_ENDPOINTS
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{
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@ -395,8 +395,12 @@ void scsiPhyReset()
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dmaTotalCount = 0;
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CyDmaChSetRequest(scsiDmaTxChan, CY_DMA_CPU_TERM_CHAIN);
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CyDmaChSetRequest(scsiDmaRxChan, CY_DMA_CPU_TERM_CHAIN);
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// CyDmaChGetRequest returns 0 for the relevant bit once the
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// request is completed.
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trace(trace_spinDMAReset);
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while (!(scsiTxDMAComplete && scsiRxDMAComplete)) {}
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while (CyDmaChGetRequest(scsiDmaTxChan) & CY_DMA_CPU_TERM_CHAIN) {}
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while (CyDmaChGetRequest(scsiDmaRxChan) & CY_DMA_CPU_TERM_CHAIN) {}
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CyDmaChDisable(scsiDmaTxChan);
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CyDmaChDisable(scsiDmaRxChan);
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@ -409,6 +413,7 @@ void scsiPhyReset()
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// ensure it returns to the idle state. The datapath runs at the BUS clk
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// speed (ie. same as the CPU), so we can be sure it is active for a sufficient
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// duration.
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SCSI_RST_ISR_Disable();
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SCSI_SetPin(SCSI_Out_RST);
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SCSI_CTL_PHASE_Write(0);
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@ -421,6 +426,7 @@ void scsiPhyReset()
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// Allow the FIFOs to fill up again.
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SCSI_ClearPin(SCSI_Out_RST);
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SCSI_RST_ISR_Enable();
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scsiTarget_AUX_CTL = scsiTarget_AUX_CTL & ~(0x03);
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SCSI_Parity_Error_Read(); // clear sticky bits
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@ -28,7 +28,7 @@ __attribute__ ((__section__(".cyloadablemeta"), used))
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const uint8 cy_meta_loadable[] = {
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0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,
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0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,
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0x00u, 0x00u, 0x00u, 0x00u, 0x5Cu, 0xD1u, 0x22u, 0x04u,
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0x00u, 0x00u, 0x00u, 0x00u, 0x5Cu, 0xD1u, 0x24u, 0x04u,
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0x01u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,
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0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,
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0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,
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@ -28,7 +28,7 @@ __attribute__ ((__section__(".cyloadablemeta"), used))
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const uint8 cy_meta_loadable[] = {
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0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,
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0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,
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0x00u, 0x00u, 0x00u, 0x00u, 0x5Cu, 0xD1u, 0x22u, 0x04u,
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0x00u, 0x00u, 0x00u, 0x00u, 0x5Cu, 0xD1u, 0x24u, 0x04u,
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0x01u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,
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0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,
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0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,
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