mirror of
https://github.com/fhgwright/SCSI2SD.git
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Add missing SWV trace functions.
This commit is contained in:
Michael McMaster
parent
e309282563
commit
ee846f4226
73
software/SCSI2SD/src/trace.c
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73
software/SCSI2SD/src/trace.c
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// Copyright (C) 2015 James Laird-Wah <james@laird-wah.net>
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//
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// This file is part of SCSI2SD.
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//
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// SCSI2SD is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// SCSI2SD is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with SCSI2SD. If not, see <http://www.gnu.org/licenses/>.
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#include <core_cm3_psoc5.h>
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#include <stdint.h>
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#include <cyfitter.h>
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#include <cytypes.h>
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#include <device.h>
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#include "trace.h"
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// configure desired baud rate on the SWV pin.
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// up to the lower of CPU_clk/2 or 33MHz
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#define BAUD_RATE 921600
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// Cortex-M3 Trace Port Interface Unit (TPIU)
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#define TPIU_BASE 0xe0040000
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#define MMIO32(addr) *((volatile uint32_t*)(addr))
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#define TPIU_SSPSR MMIO32(TPIU_BASE + 0x000)
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#define TPIU_CSPSR MMIO32(TPIU_BASE + 0x004)
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#define TPIU_ACPR MMIO32(TPIU_BASE + 0x010)
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#define TPIU_SPPR MMIO32(TPIU_BASE + 0x0F0)
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#define TPIU_FFSR MMIO32(TPIU_BASE + 0x300)
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#define TPIU_FFCR MMIO32(TPIU_BASE + 0x304)
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#define TPIU_CSPSR_BYTE (1 << 0)
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#define TPIU_CSPSR_HALFWORD (1 << 1)
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#define TPIU_CSPSR_WORD (1 << 3)
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#define TPIU_SPPR_SYNC (0x0)
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#define TPIU_SPPR_ASYNC_MANCHESTER (0x1)
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#define TPIU_SPPR_ASYNC_NRZ (0x2)
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#define TPIU_FFCR_ENFCONT (1 << 1)
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void traceInit(void) {
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// enable the trace module clocks
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CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
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// set SWV clock = CPU clock / 2, and enable
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CY_SET_REG8(CYDEV_MFGCFG_MLOGIC_DEBUG, 0xc); // swv_clk_sel = CPU_clk / 2, swv_clk enable
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// unlock the ETM/TPIU registers
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*((volatile uint32_t*)0xE0000FB0) = 0xC5ACCE55;
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// NRZ is "UART mode"
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TPIU_SPPR = TPIU_SPPR_ASYNC_NRZ;
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// prescaler, 0 = divide by 1
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TPIU_ACPR = (BCLK__BUS_CLK__HZ/2/BAUD_RATE) - 1;
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// can write 1, 2 or 4 byte ports
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TPIU_CSPSR = TPIU_CSPSR_BYTE;
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// bypass formatter (puts sync & stuff in otherwise)
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TPIU_FFCR &= ~TPIU_FFCR_ENFCONT;
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// enable ITM, enable the first 2 stimulus ports
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ITM->TCR = ITM_TCR_ITMENA_Msk;
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ITM->TER = 0x3;
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trace(trace_begin);
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}
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@ -1,4 +1,4 @@
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// Copyright (C) 2015 Michael McMaster <michael@codesrc.com>
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// Copyright (C) 2015 James Laird-Wah <james@laird-wah.net>
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//
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// This file is part of SCSI2SD.
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//
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@ -14,11 +14,63 @@
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//
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// You should have received a copy of the GNU General Public License
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// along with SCSI2SD. If not, see <http://www.gnu.org/licenses/>.
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#ifndef TRACE_H
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#define TRACE_H
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#define traceInit()
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#define trace(x)
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#define traceIrq(x)
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// Trace event IDs to be output. 1 and 9 are generated as headers on ports 0
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// and 1 respectively, and should not be used.
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enum trace_event {
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trace_begin = 0,
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// function entries - SCSI
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trace_scsiRxCompleteISR = 0x50,
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trace_scsiTxCompleteISR,
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trace_scsiResetISR,
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trace_doRxSingleDMA,
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trace_doTxSingleDMA,
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trace_scsiPhyReset,
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// spin loops - SCSI
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trace_spinTxComplete = 0x20,
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trace_spinReadDMAPoll,
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trace_spinWriteDMAPoll,
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trace_spinPhyTxFifo,
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trace_spinPhyRxFifo,
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trace_spinDMAReset,
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// SD
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trace_spinSpiByte = 0x30,
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trace_spinSDRxFIFO,
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trace_spinSDBusy,
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trace_spinSDDMA,
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trace_spinSDCompleteWrite,
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trace_spinSDCompleteRead,
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// completion
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trace_sdSpiByte = 0x40,
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};
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void traceInit(void);
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#ifdef TRACE
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// normally the code spins waiting for the trace FIFO to be ready for each event
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// if you are debugging a timing-sensitive problem, define TRACE_IMPATIENT and
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// expect some dropped packets
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#ifdef TRACE_IMPATIENT
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#define wait_fifo(port) ;
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#else
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#define wait_fifo(port) while (!(ITM->PORT[port].u32));
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#endif
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#include <core_cm3_psoc5.h>
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static inline void trace(enum trace_event ch) {
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wait_fifo(0);
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ITM->PORT[0].u8 = ch;
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}
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// use a different stimulus port for ISRs to avoid a race
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static inline void traceIrq(enum trace_event ch) {
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wait_fifo(1);
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ITM->PORT[1].u8 = ch;
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}
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#else
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#define trace(ev)
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#define traceIrq(ev)
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#endif
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@ -123,6 +123,13 @@
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<build_action v="C_FILE" />
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<PropertyDeltas />
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</CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
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<CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtFile" version="3" xml_contents_version="1">
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<CyGuid_31768f72-0253-412b-af77-e7dba74d1330 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItem" version="2" name="trace.c" persistent="..\..\src\trace.c">
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<Hidden v="False" />
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</CyGuid_31768f72-0253-412b-af77-e7dba74d1330>
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<build_action v="C_FILE" />
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<PropertyDeltas />
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</CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
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</dependencies>
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</CyGuid_0820c2e7-528d-4137-9a08-97257b946089>
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</CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8>
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@ -266,6 +273,13 @@
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<build_action v="NONE" />
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<PropertyDeltas />
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</CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
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<CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtFile" version="3" xml_contents_version="1">
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<CyGuid_31768f72-0253-412b-af77-e7dba74d1330 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItem" version="2" name="trace.h" persistent="..\..\src\trace.h">
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<Hidden v="False" />
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</CyGuid_31768f72-0253-412b-af77-e7dba74d1330>
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<build_action v="NONE" />
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<PropertyDeltas />
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</CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
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</dependencies>
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</CyGuid_0820c2e7-528d-4137-9a08-97257b946089>
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</CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8>
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@ -123,6 +123,13 @@
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<build_action v="C_FILE" />
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<PropertyDeltas />
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</CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
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<CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtFile" version="3" xml_contents_version="1">
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<CyGuid_31768f72-0253-412b-af77-e7dba74d1330 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItem" version="2" name="trace.c" persistent="..\..\src\trace.c">
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<Hidden v="False" />
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</CyGuid_31768f72-0253-412b-af77-e7dba74d1330>
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<build_action v="C_FILE" />
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<PropertyDeltas />
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</CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
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</dependencies>
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</CyGuid_0820c2e7-528d-4137-9a08-97257b946089>
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</CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8>
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@ -266,6 +273,13 @@
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<build_action v="NONE" />
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<PropertyDeltas />
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</CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
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<CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtFile" version="3" xml_contents_version="1">
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<CyGuid_31768f72-0253-412b-af77-e7dba74d1330 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItem" version="2" name="trace.h" persistent="..\..\src\trace.h">
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<Hidden v="False" />
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</CyGuid_31768f72-0253-412b-af77-e7dba74d1330>
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<build_action v="NONE" />
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<PropertyDeltas />
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</CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
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</dependencies>
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</CyGuid_0820c2e7-528d-4137-9a08-97257b946089>
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</CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8>
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