mirror of
https://github.com/fhgwright/SCSI2SD.git
synced 2024-06-02 06:41:36 +00:00
16040 lines
451 KiB
C++
16040 lines
451 KiB
C++
;
|
|
; File Name: cydevicerv_trm.inc
|
|
;
|
|
; PSoC Creator 4.4
|
|
;
|
|
; Description:
|
|
; This file provides all of the address values for the entire PSoC device.
|
|
;
|
|
;-------------------------------------------------------------------------------
|
|
; Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
|
|
; You may use this file only in accordance with the license, terms, conditions,
|
|
; disclaimers, and limitations in the end user license agreement accompanying
|
|
; the software package with which this file was provided.
|
|
;-------------------------------------------------------------------------------
|
|
|
|
IF :LNOT::DEF:CYDEV_FLASH_BASE
|
|
CYDEV_FLASH_BASE EQU 0x00000000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_FLASH_SIZE
|
|
CYDEV_FLASH_SIZE EQU 0x00020000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLASH_DATA_MBASE
|
|
CYREG_FLASH_DATA_MBASE EQU 0x00000000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLASH_DATA_MSIZE
|
|
CYREG_FLASH_DATA_MSIZE EQU 0x00020000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_SRAM_BASE
|
|
CYDEV_SRAM_BASE EQU 0x1fffc000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_SRAM_SIZE
|
|
CYDEV_SRAM_SIZE EQU 0x00008000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SRAM_CODE64K_MBASE
|
|
CYREG_SRAM_CODE64K_MBASE EQU 0x1fff8000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SRAM_CODE64K_MSIZE
|
|
CYREG_SRAM_CODE64K_MSIZE EQU 0x00004000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SRAM_CODE32K_MBASE
|
|
CYREG_SRAM_CODE32K_MBASE EQU 0x1fffc000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SRAM_CODE32K_MSIZE
|
|
CYREG_SRAM_CODE32K_MSIZE EQU 0x00002000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SRAM_CODE16K_MBASE
|
|
CYREG_SRAM_CODE16K_MBASE EQU 0x1fffe000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SRAM_CODE16K_MSIZE
|
|
CYREG_SRAM_CODE16K_MSIZE EQU 0x00001000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SRAM_CODE_MBASE
|
|
CYREG_SRAM_CODE_MBASE EQU 0x1fffc000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SRAM_CODE_MSIZE
|
|
CYREG_SRAM_CODE_MSIZE EQU 0x00004000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SRAM_DATA_MBASE
|
|
CYREG_SRAM_DATA_MBASE EQU 0x20000000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SRAM_DATA_MSIZE
|
|
CYREG_SRAM_DATA_MSIZE EQU 0x00004000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SRAM_DATA16K_MBASE
|
|
CYREG_SRAM_DATA16K_MBASE EQU 0x20001000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SRAM_DATA16K_MSIZE
|
|
CYREG_SRAM_DATA16K_MSIZE EQU 0x00001000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SRAM_DATA32K_MBASE
|
|
CYREG_SRAM_DATA32K_MBASE EQU 0x20002000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SRAM_DATA32K_MSIZE
|
|
CYREG_SRAM_DATA32K_MSIZE EQU 0x00002000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SRAM_DATA64K_MBASE
|
|
CYREG_SRAM_DATA64K_MBASE EQU 0x20004000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SRAM_DATA64K_MSIZE
|
|
CYREG_SRAM_DATA64K_MSIZE EQU 0x00004000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_DMA_BASE
|
|
CYDEV_DMA_BASE EQU 0x20008000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_DMA_SIZE
|
|
CYDEV_DMA_SIZE EQU 0x00008000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DMA_SRAM64K_MBASE
|
|
CYREG_DMA_SRAM64K_MBASE EQU 0x20008000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DMA_SRAM64K_MSIZE
|
|
CYREG_DMA_SRAM64K_MSIZE EQU 0x00004000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DMA_SRAM32K_MBASE
|
|
CYREG_DMA_SRAM32K_MBASE EQU 0x2000c000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DMA_SRAM32K_MSIZE
|
|
CYREG_DMA_SRAM32K_MSIZE EQU 0x00002000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DMA_SRAM16K_MBASE
|
|
CYREG_DMA_SRAM16K_MBASE EQU 0x2000e000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DMA_SRAM16K_MSIZE
|
|
CYREG_DMA_SRAM16K_MSIZE EQU 0x00001000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DMA_SRAM_MBASE
|
|
CYREG_DMA_SRAM_MBASE EQU 0x2000f000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DMA_SRAM_MSIZE
|
|
CYREG_DMA_SRAM_MSIZE EQU 0x00001000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CLKDIST_BASE
|
|
CYDEV_CLKDIST_BASE EQU 0x40004000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CLKDIST_SIZE
|
|
CYDEV_CLKDIST_SIZE EQU 0x00000110
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_CR
|
|
CYREG_CLKDIST_CR EQU 0x40004000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_LD
|
|
CYREG_CLKDIST_LD EQU 0x40004001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_WRK0
|
|
CYREG_CLKDIST_WRK0 EQU 0x40004002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_WRK1
|
|
CYREG_CLKDIST_WRK1 EQU 0x40004003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_MSTR0
|
|
CYREG_CLKDIST_MSTR0 EQU 0x40004004
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_MSTR1
|
|
CYREG_CLKDIST_MSTR1 EQU 0x40004005
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_BCFG0
|
|
CYREG_CLKDIST_BCFG0 EQU 0x40004006
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_BCFG1
|
|
CYREG_CLKDIST_BCFG1 EQU 0x40004007
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_BCFG2
|
|
CYREG_CLKDIST_BCFG2 EQU 0x40004008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_UCFG
|
|
CYREG_CLKDIST_UCFG EQU 0x40004009
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_DLY0
|
|
CYREG_CLKDIST_DLY0 EQU 0x4000400a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_DLY1
|
|
CYREG_CLKDIST_DLY1 EQU 0x4000400b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_DMASK
|
|
CYREG_CLKDIST_DMASK EQU 0x40004010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_AMASK
|
|
CYREG_CLKDIST_AMASK EQU 0x40004014
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CLKDIST_DCFG0_BASE
|
|
CYDEV_CLKDIST_DCFG0_BASE EQU 0x40004080
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CLKDIST_DCFG0_SIZE
|
|
CYDEV_CLKDIST_DCFG0_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_DCFG0_CFG0
|
|
CYREG_CLKDIST_DCFG0_CFG0 EQU 0x40004080
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_DCFG0_CFG1
|
|
CYREG_CLKDIST_DCFG0_CFG1 EQU 0x40004081
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_DCFG0_CFG2
|
|
CYREG_CLKDIST_DCFG0_CFG2 EQU 0x40004082
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CLKDIST_DCFG1_BASE
|
|
CYDEV_CLKDIST_DCFG1_BASE EQU 0x40004084
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CLKDIST_DCFG1_SIZE
|
|
CYDEV_CLKDIST_DCFG1_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_DCFG1_CFG0
|
|
CYREG_CLKDIST_DCFG1_CFG0 EQU 0x40004084
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_DCFG1_CFG1
|
|
CYREG_CLKDIST_DCFG1_CFG1 EQU 0x40004085
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_DCFG1_CFG2
|
|
CYREG_CLKDIST_DCFG1_CFG2 EQU 0x40004086
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CLKDIST_DCFG2_BASE
|
|
CYDEV_CLKDIST_DCFG2_BASE EQU 0x40004088
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CLKDIST_DCFG2_SIZE
|
|
CYDEV_CLKDIST_DCFG2_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_DCFG2_CFG0
|
|
CYREG_CLKDIST_DCFG2_CFG0 EQU 0x40004088
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_DCFG2_CFG1
|
|
CYREG_CLKDIST_DCFG2_CFG1 EQU 0x40004089
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_DCFG2_CFG2
|
|
CYREG_CLKDIST_DCFG2_CFG2 EQU 0x4000408a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CLKDIST_DCFG3_BASE
|
|
CYDEV_CLKDIST_DCFG3_BASE EQU 0x4000408c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CLKDIST_DCFG3_SIZE
|
|
CYDEV_CLKDIST_DCFG3_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_DCFG3_CFG0
|
|
CYREG_CLKDIST_DCFG3_CFG0 EQU 0x4000408c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_DCFG3_CFG1
|
|
CYREG_CLKDIST_DCFG3_CFG1 EQU 0x4000408d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_DCFG3_CFG2
|
|
CYREG_CLKDIST_DCFG3_CFG2 EQU 0x4000408e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CLKDIST_DCFG4_BASE
|
|
CYDEV_CLKDIST_DCFG4_BASE EQU 0x40004090
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CLKDIST_DCFG4_SIZE
|
|
CYDEV_CLKDIST_DCFG4_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_DCFG4_CFG0
|
|
CYREG_CLKDIST_DCFG4_CFG0 EQU 0x40004090
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_DCFG4_CFG1
|
|
CYREG_CLKDIST_DCFG4_CFG1 EQU 0x40004091
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_DCFG4_CFG2
|
|
CYREG_CLKDIST_DCFG4_CFG2 EQU 0x40004092
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CLKDIST_DCFG5_BASE
|
|
CYDEV_CLKDIST_DCFG5_BASE EQU 0x40004094
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CLKDIST_DCFG5_SIZE
|
|
CYDEV_CLKDIST_DCFG5_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_DCFG5_CFG0
|
|
CYREG_CLKDIST_DCFG5_CFG0 EQU 0x40004094
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_DCFG5_CFG1
|
|
CYREG_CLKDIST_DCFG5_CFG1 EQU 0x40004095
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_DCFG5_CFG2
|
|
CYREG_CLKDIST_DCFG5_CFG2 EQU 0x40004096
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CLKDIST_DCFG6_BASE
|
|
CYDEV_CLKDIST_DCFG6_BASE EQU 0x40004098
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CLKDIST_DCFG6_SIZE
|
|
CYDEV_CLKDIST_DCFG6_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_DCFG6_CFG0
|
|
CYREG_CLKDIST_DCFG6_CFG0 EQU 0x40004098
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_DCFG6_CFG1
|
|
CYREG_CLKDIST_DCFG6_CFG1 EQU 0x40004099
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_DCFG6_CFG2
|
|
CYREG_CLKDIST_DCFG6_CFG2 EQU 0x4000409a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CLKDIST_DCFG7_BASE
|
|
CYDEV_CLKDIST_DCFG7_BASE EQU 0x4000409c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CLKDIST_DCFG7_SIZE
|
|
CYDEV_CLKDIST_DCFG7_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_DCFG7_CFG0
|
|
CYREG_CLKDIST_DCFG7_CFG0 EQU 0x4000409c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_DCFG7_CFG1
|
|
CYREG_CLKDIST_DCFG7_CFG1 EQU 0x4000409d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_DCFG7_CFG2
|
|
CYREG_CLKDIST_DCFG7_CFG2 EQU 0x4000409e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CLKDIST_ACFG0_BASE
|
|
CYDEV_CLKDIST_ACFG0_BASE EQU 0x40004100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CLKDIST_ACFG0_SIZE
|
|
CYDEV_CLKDIST_ACFG0_SIZE EQU 0x00000004
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_ACFG0_CFG0
|
|
CYREG_CLKDIST_ACFG0_CFG0 EQU 0x40004100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_ACFG0_CFG1
|
|
CYREG_CLKDIST_ACFG0_CFG1 EQU 0x40004101
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_ACFG0_CFG2
|
|
CYREG_CLKDIST_ACFG0_CFG2 EQU 0x40004102
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_ACFG0_CFG3
|
|
CYREG_CLKDIST_ACFG0_CFG3 EQU 0x40004103
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CLKDIST_ACFG1_BASE
|
|
CYDEV_CLKDIST_ACFG1_BASE EQU 0x40004104
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CLKDIST_ACFG1_SIZE
|
|
CYDEV_CLKDIST_ACFG1_SIZE EQU 0x00000004
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_ACFG1_CFG0
|
|
CYREG_CLKDIST_ACFG1_CFG0 EQU 0x40004104
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_ACFG1_CFG1
|
|
CYREG_CLKDIST_ACFG1_CFG1 EQU 0x40004105
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_ACFG1_CFG2
|
|
CYREG_CLKDIST_ACFG1_CFG2 EQU 0x40004106
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_ACFG1_CFG3
|
|
CYREG_CLKDIST_ACFG1_CFG3 EQU 0x40004107
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CLKDIST_ACFG2_BASE
|
|
CYDEV_CLKDIST_ACFG2_BASE EQU 0x40004108
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CLKDIST_ACFG2_SIZE
|
|
CYDEV_CLKDIST_ACFG2_SIZE EQU 0x00000004
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_ACFG2_CFG0
|
|
CYREG_CLKDIST_ACFG2_CFG0 EQU 0x40004108
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_ACFG2_CFG1
|
|
CYREG_CLKDIST_ACFG2_CFG1 EQU 0x40004109
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_ACFG2_CFG2
|
|
CYREG_CLKDIST_ACFG2_CFG2 EQU 0x4000410a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_ACFG2_CFG3
|
|
CYREG_CLKDIST_ACFG2_CFG3 EQU 0x4000410b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CLKDIST_ACFG3_BASE
|
|
CYDEV_CLKDIST_ACFG3_BASE EQU 0x4000410c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CLKDIST_ACFG3_SIZE
|
|
CYDEV_CLKDIST_ACFG3_SIZE EQU 0x00000004
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_ACFG3_CFG0
|
|
CYREG_CLKDIST_ACFG3_CFG0 EQU 0x4000410c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_ACFG3_CFG1
|
|
CYREG_CLKDIST_ACFG3_CFG1 EQU 0x4000410d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_ACFG3_CFG2
|
|
CYREG_CLKDIST_ACFG3_CFG2 EQU 0x4000410e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CLKDIST_ACFG3_CFG3
|
|
CYREG_CLKDIST_ACFG3_CFG3 EQU 0x4000410f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_FASTCLK_BASE
|
|
CYDEV_FASTCLK_BASE EQU 0x40004200
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_FASTCLK_SIZE
|
|
CYDEV_FASTCLK_SIZE EQU 0x00000026
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_FASTCLK_IMO_BASE
|
|
CYDEV_FASTCLK_IMO_BASE EQU 0x40004200
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_FASTCLK_IMO_SIZE
|
|
CYDEV_FASTCLK_IMO_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FASTCLK_IMO_CR
|
|
CYREG_FASTCLK_IMO_CR EQU 0x40004200
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_FASTCLK_XMHZ_BASE
|
|
CYDEV_FASTCLK_XMHZ_BASE EQU 0x40004210
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_FASTCLK_XMHZ_SIZE
|
|
CYDEV_FASTCLK_XMHZ_SIZE EQU 0x00000004
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FASTCLK_XMHZ_CSR
|
|
CYREG_FASTCLK_XMHZ_CSR EQU 0x40004210
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FASTCLK_XMHZ_CFG0
|
|
CYREG_FASTCLK_XMHZ_CFG0 EQU 0x40004212
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FASTCLK_XMHZ_CFG1
|
|
CYREG_FASTCLK_XMHZ_CFG1 EQU 0x40004213
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_FASTCLK_PLL_BASE
|
|
CYDEV_FASTCLK_PLL_BASE EQU 0x40004220
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_FASTCLK_PLL_SIZE
|
|
CYDEV_FASTCLK_PLL_SIZE EQU 0x00000006
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FASTCLK_PLL_CFG0
|
|
CYREG_FASTCLK_PLL_CFG0 EQU 0x40004220
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FASTCLK_PLL_CFG1
|
|
CYREG_FASTCLK_PLL_CFG1 EQU 0x40004221
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FASTCLK_PLL_P
|
|
CYREG_FASTCLK_PLL_P EQU 0x40004222
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FASTCLK_PLL_Q
|
|
CYREG_FASTCLK_PLL_Q EQU 0x40004223
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FASTCLK_PLL_SR
|
|
CYREG_FASTCLK_PLL_SR EQU 0x40004225
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_SLOWCLK_BASE
|
|
CYDEV_SLOWCLK_BASE EQU 0x40004300
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_SLOWCLK_SIZE
|
|
CYDEV_SLOWCLK_SIZE EQU 0x0000000b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_SLOWCLK_ILO_BASE
|
|
CYDEV_SLOWCLK_ILO_BASE EQU 0x40004300
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_SLOWCLK_ILO_SIZE
|
|
CYDEV_SLOWCLK_ILO_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SLOWCLK_ILO_CR0
|
|
CYREG_SLOWCLK_ILO_CR0 EQU 0x40004300
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SLOWCLK_ILO_CR1
|
|
CYREG_SLOWCLK_ILO_CR1 EQU 0x40004301
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_SLOWCLK_X32_BASE
|
|
CYDEV_SLOWCLK_X32_BASE EQU 0x40004308
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_SLOWCLK_X32_SIZE
|
|
CYDEV_SLOWCLK_X32_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SLOWCLK_X32_CR
|
|
CYREG_SLOWCLK_X32_CR EQU 0x40004308
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SLOWCLK_X32_CFG
|
|
CYREG_SLOWCLK_X32_CFG EQU 0x40004309
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SLOWCLK_X32_TST
|
|
CYREG_SLOWCLK_X32_TST EQU 0x4000430a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_BOOST_BASE
|
|
CYDEV_BOOST_BASE EQU 0x40004320
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_BOOST_SIZE
|
|
CYDEV_BOOST_SIZE EQU 0x00000007
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BOOST_CR0
|
|
CYREG_BOOST_CR0 EQU 0x40004320
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BOOST_CR1
|
|
CYREG_BOOST_CR1 EQU 0x40004321
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BOOST_CR2
|
|
CYREG_BOOST_CR2 EQU 0x40004322
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BOOST_CR3
|
|
CYREG_BOOST_CR3 EQU 0x40004323
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BOOST_SR
|
|
CYREG_BOOST_SR EQU 0x40004324
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BOOST_CR4
|
|
CYREG_BOOST_CR4 EQU 0x40004325
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BOOST_SR2
|
|
CYREG_BOOST_SR2 EQU 0x40004326
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PWRSYS_BASE
|
|
CYDEV_PWRSYS_BASE EQU 0x40004330
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PWRSYS_SIZE
|
|
CYDEV_PWRSYS_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PWRSYS_CR0
|
|
CYREG_PWRSYS_CR0 EQU 0x40004330
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PWRSYS_CR1
|
|
CYREG_PWRSYS_CR1 EQU 0x40004331
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PM_BASE
|
|
CYDEV_PM_BASE EQU 0x40004380
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PM_SIZE
|
|
CYDEV_PM_SIZE EQU 0x00000057
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_TW_CFG0
|
|
CYREG_PM_TW_CFG0 EQU 0x40004380
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_TW_CFG1
|
|
CYREG_PM_TW_CFG1 EQU 0x40004381
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_TW_CFG2
|
|
CYREG_PM_TW_CFG2 EQU 0x40004382
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_WDT_CFG
|
|
CYREG_PM_WDT_CFG EQU 0x40004383
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_WDT_CR
|
|
CYREG_PM_WDT_CR EQU 0x40004384
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_INT_SR
|
|
CYREG_PM_INT_SR EQU 0x40004390
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_MODE_CFG0
|
|
CYREG_PM_MODE_CFG0 EQU 0x40004391
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_MODE_CFG1
|
|
CYREG_PM_MODE_CFG1 EQU 0x40004392
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_MODE_CSR
|
|
CYREG_PM_MODE_CSR EQU 0x40004393
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_USB_CR0
|
|
CYREG_PM_USB_CR0 EQU 0x40004394
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_WAKEUP_CFG0
|
|
CYREG_PM_WAKEUP_CFG0 EQU 0x40004398
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_WAKEUP_CFG1
|
|
CYREG_PM_WAKEUP_CFG1 EQU 0x40004399
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_WAKEUP_CFG2
|
|
CYREG_PM_WAKEUP_CFG2 EQU 0x4000439a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PM_ACT_BASE
|
|
CYDEV_PM_ACT_BASE EQU 0x400043a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PM_ACT_SIZE
|
|
CYDEV_PM_ACT_SIZE EQU 0x0000000e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_ACT_CFG0
|
|
CYREG_PM_ACT_CFG0 EQU 0x400043a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_ACT_CFG1
|
|
CYREG_PM_ACT_CFG1 EQU 0x400043a1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_ACT_CFG2
|
|
CYREG_PM_ACT_CFG2 EQU 0x400043a2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_ACT_CFG3
|
|
CYREG_PM_ACT_CFG3 EQU 0x400043a3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_ACT_CFG4
|
|
CYREG_PM_ACT_CFG4 EQU 0x400043a4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_ACT_CFG5
|
|
CYREG_PM_ACT_CFG5 EQU 0x400043a5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_ACT_CFG6
|
|
CYREG_PM_ACT_CFG6 EQU 0x400043a6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_ACT_CFG7
|
|
CYREG_PM_ACT_CFG7 EQU 0x400043a7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_ACT_CFG8
|
|
CYREG_PM_ACT_CFG8 EQU 0x400043a8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_ACT_CFG9
|
|
CYREG_PM_ACT_CFG9 EQU 0x400043a9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_ACT_CFG10
|
|
CYREG_PM_ACT_CFG10 EQU 0x400043aa
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_ACT_CFG11
|
|
CYREG_PM_ACT_CFG11 EQU 0x400043ab
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_ACT_CFG12
|
|
CYREG_PM_ACT_CFG12 EQU 0x400043ac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_ACT_CFG13
|
|
CYREG_PM_ACT_CFG13 EQU 0x400043ad
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PM_STBY_BASE
|
|
CYDEV_PM_STBY_BASE EQU 0x400043b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PM_STBY_SIZE
|
|
CYDEV_PM_STBY_SIZE EQU 0x0000000e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_STBY_CFG0
|
|
CYREG_PM_STBY_CFG0 EQU 0x400043b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_STBY_CFG1
|
|
CYREG_PM_STBY_CFG1 EQU 0x400043b1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_STBY_CFG2
|
|
CYREG_PM_STBY_CFG2 EQU 0x400043b2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_STBY_CFG3
|
|
CYREG_PM_STBY_CFG3 EQU 0x400043b3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_STBY_CFG4
|
|
CYREG_PM_STBY_CFG4 EQU 0x400043b4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_STBY_CFG5
|
|
CYREG_PM_STBY_CFG5 EQU 0x400043b5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_STBY_CFG6
|
|
CYREG_PM_STBY_CFG6 EQU 0x400043b6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_STBY_CFG7
|
|
CYREG_PM_STBY_CFG7 EQU 0x400043b7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_STBY_CFG8
|
|
CYREG_PM_STBY_CFG8 EQU 0x400043b8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_STBY_CFG9
|
|
CYREG_PM_STBY_CFG9 EQU 0x400043b9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_STBY_CFG10
|
|
CYREG_PM_STBY_CFG10 EQU 0x400043ba
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_STBY_CFG11
|
|
CYREG_PM_STBY_CFG11 EQU 0x400043bb
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_STBY_CFG12
|
|
CYREG_PM_STBY_CFG12 EQU 0x400043bc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_STBY_CFG13
|
|
CYREG_PM_STBY_CFG13 EQU 0x400043bd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PM_AVAIL_BASE
|
|
CYDEV_PM_AVAIL_BASE EQU 0x400043c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PM_AVAIL_SIZE
|
|
CYDEV_PM_AVAIL_SIZE EQU 0x00000017
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_AVAIL_CR0
|
|
CYREG_PM_AVAIL_CR0 EQU 0x400043c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_AVAIL_CR1
|
|
CYREG_PM_AVAIL_CR1 EQU 0x400043c1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_AVAIL_CR2
|
|
CYREG_PM_AVAIL_CR2 EQU 0x400043c2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_AVAIL_CR3
|
|
CYREG_PM_AVAIL_CR3 EQU 0x400043c3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_AVAIL_CR4
|
|
CYREG_PM_AVAIL_CR4 EQU 0x400043c4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_AVAIL_CR5
|
|
CYREG_PM_AVAIL_CR5 EQU 0x400043c5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_AVAIL_CR6
|
|
CYREG_PM_AVAIL_CR6 EQU 0x400043c6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_AVAIL_SR0
|
|
CYREG_PM_AVAIL_SR0 EQU 0x400043d0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_AVAIL_SR1
|
|
CYREG_PM_AVAIL_SR1 EQU 0x400043d1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_AVAIL_SR2
|
|
CYREG_PM_AVAIL_SR2 EQU 0x400043d2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_AVAIL_SR3
|
|
CYREG_PM_AVAIL_SR3 EQU 0x400043d3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_AVAIL_SR4
|
|
CYREG_PM_AVAIL_SR4 EQU 0x400043d4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_AVAIL_SR5
|
|
CYREG_PM_AVAIL_SR5 EQU 0x400043d5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PM_AVAIL_SR6
|
|
CYREG_PM_AVAIL_SR6 EQU 0x400043d6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_BASE
|
|
CYDEV_PICU_BASE EQU 0x40004500
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_SIZE
|
|
CYDEV_PICU_SIZE EQU 0x000000b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_INTTYPE_BASE
|
|
CYDEV_PICU_INTTYPE_BASE EQU 0x40004500
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_INTTYPE_SIZE
|
|
CYDEV_PICU_INTTYPE_SIZE EQU 0x00000080
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU0_BASE
|
|
CYDEV_PICU_INTTYPE_PICU0_BASE EQU 0x40004500
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU0_SIZE
|
|
CYDEV_PICU_INTTYPE_PICU0_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU0_INTTYPE0
|
|
CYREG_PICU0_INTTYPE0 EQU 0x40004500
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU0_INTTYPE1
|
|
CYREG_PICU0_INTTYPE1 EQU 0x40004501
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU0_INTTYPE2
|
|
CYREG_PICU0_INTTYPE2 EQU 0x40004502
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU0_INTTYPE3
|
|
CYREG_PICU0_INTTYPE3 EQU 0x40004503
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU0_INTTYPE4
|
|
CYREG_PICU0_INTTYPE4 EQU 0x40004504
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU0_INTTYPE5
|
|
CYREG_PICU0_INTTYPE5 EQU 0x40004505
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU0_INTTYPE6
|
|
CYREG_PICU0_INTTYPE6 EQU 0x40004506
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU0_INTTYPE7
|
|
CYREG_PICU0_INTTYPE7 EQU 0x40004507
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU1_BASE
|
|
CYDEV_PICU_INTTYPE_PICU1_BASE EQU 0x40004508
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU1_SIZE
|
|
CYDEV_PICU_INTTYPE_PICU1_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU1_INTTYPE0
|
|
CYREG_PICU1_INTTYPE0 EQU 0x40004508
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU1_INTTYPE1
|
|
CYREG_PICU1_INTTYPE1 EQU 0x40004509
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU1_INTTYPE2
|
|
CYREG_PICU1_INTTYPE2 EQU 0x4000450a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU1_INTTYPE3
|
|
CYREG_PICU1_INTTYPE3 EQU 0x4000450b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU1_INTTYPE4
|
|
CYREG_PICU1_INTTYPE4 EQU 0x4000450c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU1_INTTYPE5
|
|
CYREG_PICU1_INTTYPE5 EQU 0x4000450d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU1_INTTYPE6
|
|
CYREG_PICU1_INTTYPE6 EQU 0x4000450e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU1_INTTYPE7
|
|
CYREG_PICU1_INTTYPE7 EQU 0x4000450f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU2_BASE
|
|
CYDEV_PICU_INTTYPE_PICU2_BASE EQU 0x40004510
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU2_SIZE
|
|
CYDEV_PICU_INTTYPE_PICU2_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU2_INTTYPE0
|
|
CYREG_PICU2_INTTYPE0 EQU 0x40004510
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU2_INTTYPE1
|
|
CYREG_PICU2_INTTYPE1 EQU 0x40004511
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU2_INTTYPE2
|
|
CYREG_PICU2_INTTYPE2 EQU 0x40004512
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU2_INTTYPE3
|
|
CYREG_PICU2_INTTYPE3 EQU 0x40004513
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU2_INTTYPE4
|
|
CYREG_PICU2_INTTYPE4 EQU 0x40004514
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU2_INTTYPE5
|
|
CYREG_PICU2_INTTYPE5 EQU 0x40004515
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU2_INTTYPE6
|
|
CYREG_PICU2_INTTYPE6 EQU 0x40004516
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU2_INTTYPE7
|
|
CYREG_PICU2_INTTYPE7 EQU 0x40004517
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU3_BASE
|
|
CYDEV_PICU_INTTYPE_PICU3_BASE EQU 0x40004518
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU3_SIZE
|
|
CYDEV_PICU_INTTYPE_PICU3_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU3_INTTYPE0
|
|
CYREG_PICU3_INTTYPE0 EQU 0x40004518
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU3_INTTYPE1
|
|
CYREG_PICU3_INTTYPE1 EQU 0x40004519
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU3_INTTYPE2
|
|
CYREG_PICU3_INTTYPE2 EQU 0x4000451a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU3_INTTYPE3
|
|
CYREG_PICU3_INTTYPE3 EQU 0x4000451b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU3_INTTYPE4
|
|
CYREG_PICU3_INTTYPE4 EQU 0x4000451c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU3_INTTYPE5
|
|
CYREG_PICU3_INTTYPE5 EQU 0x4000451d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU3_INTTYPE6
|
|
CYREG_PICU3_INTTYPE6 EQU 0x4000451e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU3_INTTYPE7
|
|
CYREG_PICU3_INTTYPE7 EQU 0x4000451f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU4_BASE
|
|
CYDEV_PICU_INTTYPE_PICU4_BASE EQU 0x40004520
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU4_SIZE
|
|
CYDEV_PICU_INTTYPE_PICU4_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU4_INTTYPE0
|
|
CYREG_PICU4_INTTYPE0 EQU 0x40004520
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU4_INTTYPE1
|
|
CYREG_PICU4_INTTYPE1 EQU 0x40004521
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU4_INTTYPE2
|
|
CYREG_PICU4_INTTYPE2 EQU 0x40004522
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU4_INTTYPE3
|
|
CYREG_PICU4_INTTYPE3 EQU 0x40004523
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU4_INTTYPE4
|
|
CYREG_PICU4_INTTYPE4 EQU 0x40004524
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU4_INTTYPE5
|
|
CYREG_PICU4_INTTYPE5 EQU 0x40004525
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU4_INTTYPE6
|
|
CYREG_PICU4_INTTYPE6 EQU 0x40004526
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU4_INTTYPE7
|
|
CYREG_PICU4_INTTYPE7 EQU 0x40004527
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU5_BASE
|
|
CYDEV_PICU_INTTYPE_PICU5_BASE EQU 0x40004528
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU5_SIZE
|
|
CYDEV_PICU_INTTYPE_PICU5_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU5_INTTYPE0
|
|
CYREG_PICU5_INTTYPE0 EQU 0x40004528
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU5_INTTYPE1
|
|
CYREG_PICU5_INTTYPE1 EQU 0x40004529
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU5_INTTYPE2
|
|
CYREG_PICU5_INTTYPE2 EQU 0x4000452a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU5_INTTYPE3
|
|
CYREG_PICU5_INTTYPE3 EQU 0x4000452b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU5_INTTYPE4
|
|
CYREG_PICU5_INTTYPE4 EQU 0x4000452c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU5_INTTYPE5
|
|
CYREG_PICU5_INTTYPE5 EQU 0x4000452d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU5_INTTYPE6
|
|
CYREG_PICU5_INTTYPE6 EQU 0x4000452e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU5_INTTYPE7
|
|
CYREG_PICU5_INTTYPE7 EQU 0x4000452f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU6_BASE
|
|
CYDEV_PICU_INTTYPE_PICU6_BASE EQU 0x40004530
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU6_SIZE
|
|
CYDEV_PICU_INTTYPE_PICU6_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU6_INTTYPE0
|
|
CYREG_PICU6_INTTYPE0 EQU 0x40004530
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU6_INTTYPE1
|
|
CYREG_PICU6_INTTYPE1 EQU 0x40004531
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU6_INTTYPE2
|
|
CYREG_PICU6_INTTYPE2 EQU 0x40004532
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU6_INTTYPE3
|
|
CYREG_PICU6_INTTYPE3 EQU 0x40004533
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU6_INTTYPE4
|
|
CYREG_PICU6_INTTYPE4 EQU 0x40004534
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU6_INTTYPE5
|
|
CYREG_PICU6_INTTYPE5 EQU 0x40004535
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU6_INTTYPE6
|
|
CYREG_PICU6_INTTYPE6 EQU 0x40004536
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU6_INTTYPE7
|
|
CYREG_PICU6_INTTYPE7 EQU 0x40004537
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU12_BASE
|
|
CYDEV_PICU_INTTYPE_PICU12_BASE EQU 0x40004560
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU12_SIZE
|
|
CYDEV_PICU_INTTYPE_PICU12_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU12_INTTYPE0
|
|
CYREG_PICU12_INTTYPE0 EQU 0x40004560
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU12_INTTYPE1
|
|
CYREG_PICU12_INTTYPE1 EQU 0x40004561
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU12_INTTYPE2
|
|
CYREG_PICU12_INTTYPE2 EQU 0x40004562
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU12_INTTYPE3
|
|
CYREG_PICU12_INTTYPE3 EQU 0x40004563
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU12_INTTYPE4
|
|
CYREG_PICU12_INTTYPE4 EQU 0x40004564
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU12_INTTYPE5
|
|
CYREG_PICU12_INTTYPE5 EQU 0x40004565
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU12_INTTYPE6
|
|
CYREG_PICU12_INTTYPE6 EQU 0x40004566
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU12_INTTYPE7
|
|
CYREG_PICU12_INTTYPE7 EQU 0x40004567
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU15_BASE
|
|
CYDEV_PICU_INTTYPE_PICU15_BASE EQU 0x40004578
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU15_SIZE
|
|
CYDEV_PICU_INTTYPE_PICU15_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU15_INTTYPE0
|
|
CYREG_PICU15_INTTYPE0 EQU 0x40004578
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU15_INTTYPE1
|
|
CYREG_PICU15_INTTYPE1 EQU 0x40004579
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU15_INTTYPE2
|
|
CYREG_PICU15_INTTYPE2 EQU 0x4000457a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU15_INTTYPE3
|
|
CYREG_PICU15_INTTYPE3 EQU 0x4000457b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU15_INTTYPE4
|
|
CYREG_PICU15_INTTYPE4 EQU 0x4000457c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU15_INTTYPE5
|
|
CYREG_PICU15_INTTYPE5 EQU 0x4000457d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU15_INTTYPE6
|
|
CYREG_PICU15_INTTYPE6 EQU 0x4000457e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU15_INTTYPE7
|
|
CYREG_PICU15_INTTYPE7 EQU 0x4000457f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_STAT_BASE
|
|
CYDEV_PICU_STAT_BASE EQU 0x40004580
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_STAT_SIZE
|
|
CYDEV_PICU_STAT_SIZE EQU 0x00000010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_STAT_PICU0_BASE
|
|
CYDEV_PICU_STAT_PICU0_BASE EQU 0x40004580
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_STAT_PICU0_SIZE
|
|
CYDEV_PICU_STAT_PICU0_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU0_INTSTAT
|
|
CYREG_PICU0_INTSTAT EQU 0x40004580
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_STAT_PICU1_BASE
|
|
CYDEV_PICU_STAT_PICU1_BASE EQU 0x40004581
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_STAT_PICU1_SIZE
|
|
CYDEV_PICU_STAT_PICU1_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU1_INTSTAT
|
|
CYREG_PICU1_INTSTAT EQU 0x40004581
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_STAT_PICU2_BASE
|
|
CYDEV_PICU_STAT_PICU2_BASE EQU 0x40004582
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_STAT_PICU2_SIZE
|
|
CYDEV_PICU_STAT_PICU2_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU2_INTSTAT
|
|
CYREG_PICU2_INTSTAT EQU 0x40004582
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_STAT_PICU3_BASE
|
|
CYDEV_PICU_STAT_PICU3_BASE EQU 0x40004583
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_STAT_PICU3_SIZE
|
|
CYDEV_PICU_STAT_PICU3_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU3_INTSTAT
|
|
CYREG_PICU3_INTSTAT EQU 0x40004583
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_STAT_PICU4_BASE
|
|
CYDEV_PICU_STAT_PICU4_BASE EQU 0x40004584
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_STAT_PICU4_SIZE
|
|
CYDEV_PICU_STAT_PICU4_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU4_INTSTAT
|
|
CYREG_PICU4_INTSTAT EQU 0x40004584
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_STAT_PICU5_BASE
|
|
CYDEV_PICU_STAT_PICU5_BASE EQU 0x40004585
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_STAT_PICU5_SIZE
|
|
CYDEV_PICU_STAT_PICU5_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU5_INTSTAT
|
|
CYREG_PICU5_INTSTAT EQU 0x40004585
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_STAT_PICU6_BASE
|
|
CYDEV_PICU_STAT_PICU6_BASE EQU 0x40004586
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_STAT_PICU6_SIZE
|
|
CYDEV_PICU_STAT_PICU6_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU6_INTSTAT
|
|
CYREG_PICU6_INTSTAT EQU 0x40004586
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_STAT_PICU12_BASE
|
|
CYDEV_PICU_STAT_PICU12_BASE EQU 0x4000458c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_STAT_PICU12_SIZE
|
|
CYDEV_PICU_STAT_PICU12_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU12_INTSTAT
|
|
CYREG_PICU12_INTSTAT EQU 0x4000458c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_STAT_PICU15_BASE
|
|
CYDEV_PICU_STAT_PICU15_BASE EQU 0x4000458f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_STAT_PICU15_SIZE
|
|
CYDEV_PICU_STAT_PICU15_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU15_INTSTAT
|
|
CYREG_PICU15_INTSTAT EQU 0x4000458f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_SNAP_BASE
|
|
CYDEV_PICU_SNAP_BASE EQU 0x40004590
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_SNAP_SIZE
|
|
CYDEV_PICU_SNAP_SIZE EQU 0x00000010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU0_BASE
|
|
CYDEV_PICU_SNAP_PICU0_BASE EQU 0x40004590
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU0_SIZE
|
|
CYDEV_PICU_SNAP_PICU0_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU0_SNAP
|
|
CYREG_PICU0_SNAP EQU 0x40004590
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU1_BASE
|
|
CYDEV_PICU_SNAP_PICU1_BASE EQU 0x40004591
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU1_SIZE
|
|
CYDEV_PICU_SNAP_PICU1_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU1_SNAP
|
|
CYREG_PICU1_SNAP EQU 0x40004591
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU2_BASE
|
|
CYDEV_PICU_SNAP_PICU2_BASE EQU 0x40004592
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU2_SIZE
|
|
CYDEV_PICU_SNAP_PICU2_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU2_SNAP
|
|
CYREG_PICU2_SNAP EQU 0x40004592
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU3_BASE
|
|
CYDEV_PICU_SNAP_PICU3_BASE EQU 0x40004593
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU3_SIZE
|
|
CYDEV_PICU_SNAP_PICU3_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU3_SNAP
|
|
CYREG_PICU3_SNAP EQU 0x40004593
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU4_BASE
|
|
CYDEV_PICU_SNAP_PICU4_BASE EQU 0x40004594
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU4_SIZE
|
|
CYDEV_PICU_SNAP_PICU4_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU4_SNAP
|
|
CYREG_PICU4_SNAP EQU 0x40004594
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU5_BASE
|
|
CYDEV_PICU_SNAP_PICU5_BASE EQU 0x40004595
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU5_SIZE
|
|
CYDEV_PICU_SNAP_PICU5_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU5_SNAP
|
|
CYREG_PICU5_SNAP EQU 0x40004595
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU6_BASE
|
|
CYDEV_PICU_SNAP_PICU6_BASE EQU 0x40004596
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU6_SIZE
|
|
CYDEV_PICU_SNAP_PICU6_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU6_SNAP
|
|
CYREG_PICU6_SNAP EQU 0x40004596
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU12_BASE
|
|
CYDEV_PICU_SNAP_PICU12_BASE EQU 0x4000459c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU12_SIZE
|
|
CYDEV_PICU_SNAP_PICU12_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU12_SNAP
|
|
CYREG_PICU12_SNAP EQU 0x4000459c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU_15_BASE
|
|
CYDEV_PICU_SNAP_PICU_15_BASE EQU 0x4000459f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU_15_SIZE
|
|
CYDEV_PICU_SNAP_PICU_15_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU_15_SNAP_15
|
|
CYREG_PICU_15_SNAP_15 EQU 0x4000459f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_BASE
|
|
CYDEV_PICU_DISABLE_COR_BASE EQU 0x400045a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_SIZE
|
|
CYDEV_PICU_DISABLE_COR_SIZE EQU 0x00000010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU0_BASE
|
|
CYDEV_PICU_DISABLE_COR_PICU0_BASE EQU 0x400045a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU0_SIZE
|
|
CYDEV_PICU_DISABLE_COR_PICU0_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU0_DISABLE_COR
|
|
CYREG_PICU0_DISABLE_COR EQU 0x400045a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU1_BASE
|
|
CYDEV_PICU_DISABLE_COR_PICU1_BASE EQU 0x400045a1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU1_SIZE
|
|
CYDEV_PICU_DISABLE_COR_PICU1_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU1_DISABLE_COR
|
|
CYREG_PICU1_DISABLE_COR EQU 0x400045a1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU2_BASE
|
|
CYDEV_PICU_DISABLE_COR_PICU2_BASE EQU 0x400045a2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU2_SIZE
|
|
CYDEV_PICU_DISABLE_COR_PICU2_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU2_DISABLE_COR
|
|
CYREG_PICU2_DISABLE_COR EQU 0x400045a2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU3_BASE
|
|
CYDEV_PICU_DISABLE_COR_PICU3_BASE EQU 0x400045a3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU3_SIZE
|
|
CYDEV_PICU_DISABLE_COR_PICU3_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU3_DISABLE_COR
|
|
CYREG_PICU3_DISABLE_COR EQU 0x400045a3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU4_BASE
|
|
CYDEV_PICU_DISABLE_COR_PICU4_BASE EQU 0x400045a4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU4_SIZE
|
|
CYDEV_PICU_DISABLE_COR_PICU4_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU4_DISABLE_COR
|
|
CYREG_PICU4_DISABLE_COR EQU 0x400045a4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU5_BASE
|
|
CYDEV_PICU_DISABLE_COR_PICU5_BASE EQU 0x400045a5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU5_SIZE
|
|
CYDEV_PICU_DISABLE_COR_PICU5_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU5_DISABLE_COR
|
|
CYREG_PICU5_DISABLE_COR EQU 0x400045a5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU6_BASE
|
|
CYDEV_PICU_DISABLE_COR_PICU6_BASE EQU 0x400045a6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU6_SIZE
|
|
CYDEV_PICU_DISABLE_COR_PICU6_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU6_DISABLE_COR
|
|
CYREG_PICU6_DISABLE_COR EQU 0x400045a6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU12_BASE
|
|
CYDEV_PICU_DISABLE_COR_PICU12_BASE EQU 0x400045ac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU12_SIZE
|
|
CYDEV_PICU_DISABLE_COR_PICU12_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU12_DISABLE_COR
|
|
CYREG_PICU12_DISABLE_COR EQU 0x400045ac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU15_BASE
|
|
CYDEV_PICU_DISABLE_COR_PICU15_BASE EQU 0x400045af
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU15_SIZE
|
|
CYDEV_PICU_DISABLE_COR_PICU15_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PICU15_DISABLE_COR
|
|
CYREG_PICU15_DISABLE_COR EQU 0x400045af
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_BASE
|
|
CYDEV_MFGCFG_BASE EQU 0x40004600
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_SIZE
|
|
CYDEV_MFGCFG_SIZE EQU 0x000000ed
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_BASE
|
|
CYDEV_MFGCFG_ANAIF_BASE EQU 0x40004600
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_SIZE
|
|
CYDEV_MFGCFG_ANAIF_SIZE EQU 0x00000038
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC0_BASE
|
|
CYDEV_MFGCFG_ANAIF_DAC0_BASE EQU 0x40004608
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC0_SIZE
|
|
CYDEV_MFGCFG_ANAIF_DAC0_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC0_TR
|
|
CYREG_DAC0_TR EQU 0x40004608
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC1_BASE
|
|
CYDEV_MFGCFG_ANAIF_DAC1_BASE EQU 0x40004609
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC1_SIZE
|
|
CYDEV_MFGCFG_ANAIF_DAC1_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC1_TR
|
|
CYREG_DAC1_TR EQU 0x40004609
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC2_BASE
|
|
CYDEV_MFGCFG_ANAIF_DAC2_BASE EQU 0x4000460a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC2_SIZE
|
|
CYDEV_MFGCFG_ANAIF_DAC2_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC2_TR
|
|
CYREG_DAC2_TR EQU 0x4000460a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC3_BASE
|
|
CYDEV_MFGCFG_ANAIF_DAC3_BASE EQU 0x4000460b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC3_SIZE
|
|
CYDEV_MFGCFG_ANAIF_DAC3_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC3_TR
|
|
CYREG_DAC3_TR EQU 0x4000460b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_NPUMP_DSM_BASE
|
|
CYDEV_MFGCFG_ANAIF_NPUMP_DSM_BASE EQU 0x40004610
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_NPUMP_DSM_SIZE
|
|
CYDEV_MFGCFG_ANAIF_NPUMP_DSM_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NPUMP_DSM_TR0
|
|
CYREG_NPUMP_DSM_TR0 EQU 0x40004610
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_NPUMP_SC_BASE
|
|
CYDEV_MFGCFG_ANAIF_NPUMP_SC_BASE EQU 0x40004611
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_NPUMP_SC_SIZE
|
|
CYDEV_MFGCFG_ANAIF_NPUMP_SC_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NPUMP_SC_TR0
|
|
CYREG_NPUMP_SC_TR0 EQU 0x40004611
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_BASE
|
|
CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_BASE EQU 0x40004612
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_SIZE
|
|
CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NPUMP_OPAMP_TR0
|
|
CYREG_NPUMP_OPAMP_TR0 EQU 0x40004612
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_SAR0_BASE
|
|
CYDEV_MFGCFG_ANAIF_SAR0_BASE EQU 0x40004614
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_SAR0_SIZE
|
|
CYDEV_MFGCFG_ANAIF_SAR0_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR0_TR0
|
|
CYREG_SAR0_TR0 EQU 0x40004614
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_SAR1_BASE
|
|
CYDEV_MFGCFG_ANAIF_SAR1_BASE EQU 0x40004616
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_SAR1_SIZE
|
|
CYDEV_MFGCFG_ANAIF_SAR1_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR1_TR0
|
|
CYREG_SAR1_TR0 EQU 0x40004616
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP0_BASE
|
|
CYDEV_MFGCFG_ANAIF_OPAMP0_BASE EQU 0x40004620
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP0_SIZE
|
|
CYDEV_MFGCFG_ANAIF_OPAMP0_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_OPAMP0_TR0
|
|
CYREG_OPAMP0_TR0 EQU 0x40004620
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_OPAMP0_TR1
|
|
CYREG_OPAMP0_TR1 EQU 0x40004621
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP1_BASE
|
|
CYDEV_MFGCFG_ANAIF_OPAMP1_BASE EQU 0x40004622
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP1_SIZE
|
|
CYDEV_MFGCFG_ANAIF_OPAMP1_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_OPAMP1_TR0
|
|
CYREG_OPAMP1_TR0 EQU 0x40004622
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_OPAMP1_TR1
|
|
CYREG_OPAMP1_TR1 EQU 0x40004623
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP2_BASE
|
|
CYDEV_MFGCFG_ANAIF_OPAMP2_BASE EQU 0x40004624
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP2_SIZE
|
|
CYDEV_MFGCFG_ANAIF_OPAMP2_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_OPAMP2_TR0
|
|
CYREG_OPAMP2_TR0 EQU 0x40004624
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_OPAMP2_TR1
|
|
CYREG_OPAMP2_TR1 EQU 0x40004625
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP3_BASE
|
|
CYDEV_MFGCFG_ANAIF_OPAMP3_BASE EQU 0x40004626
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP3_SIZE
|
|
CYDEV_MFGCFG_ANAIF_OPAMP3_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_OPAMP3_TR0
|
|
CYREG_OPAMP3_TR0 EQU 0x40004626
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_OPAMP3_TR1
|
|
CYREG_OPAMP3_TR1 EQU 0x40004627
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP0_BASE
|
|
CYDEV_MFGCFG_ANAIF_CMP0_BASE EQU 0x40004630
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP0_SIZE
|
|
CYDEV_MFGCFG_ANAIF_CMP0_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP0_TR0
|
|
CYREG_CMP0_TR0 EQU 0x40004630
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP0_TR1
|
|
CYREG_CMP0_TR1 EQU 0x40004631
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP1_BASE
|
|
CYDEV_MFGCFG_ANAIF_CMP1_BASE EQU 0x40004632
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP1_SIZE
|
|
CYDEV_MFGCFG_ANAIF_CMP1_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP1_TR0
|
|
CYREG_CMP1_TR0 EQU 0x40004632
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP1_TR1
|
|
CYREG_CMP1_TR1 EQU 0x40004633
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP2_BASE
|
|
CYDEV_MFGCFG_ANAIF_CMP2_BASE EQU 0x40004634
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP2_SIZE
|
|
CYDEV_MFGCFG_ANAIF_CMP2_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP2_TR0
|
|
CYREG_CMP2_TR0 EQU 0x40004634
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP2_TR1
|
|
CYREG_CMP2_TR1 EQU 0x40004635
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP3_BASE
|
|
CYDEV_MFGCFG_ANAIF_CMP3_BASE EQU 0x40004636
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP3_SIZE
|
|
CYDEV_MFGCFG_ANAIF_CMP3_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP3_TR0
|
|
CYREG_CMP3_TR0 EQU 0x40004636
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP3_TR1
|
|
CYREG_CMP3_TR1 EQU 0x40004637
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_PWRSYS_BASE
|
|
CYDEV_MFGCFG_PWRSYS_BASE EQU 0x40004680
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_PWRSYS_SIZE
|
|
CYDEV_MFGCFG_PWRSYS_SIZE EQU 0x0000000b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PWRSYS_HIB_TR0
|
|
CYREG_PWRSYS_HIB_TR0 EQU 0x40004680
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PWRSYS_HIB_TR1
|
|
CYREG_PWRSYS_HIB_TR1 EQU 0x40004681
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PWRSYS_I2C_TR
|
|
CYREG_PWRSYS_I2C_TR EQU 0x40004682
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PWRSYS_SLP_TR
|
|
CYREG_PWRSYS_SLP_TR EQU 0x40004683
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PWRSYS_BUZZ_TR
|
|
CYREG_PWRSYS_BUZZ_TR EQU 0x40004684
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PWRSYS_WAKE_TR0
|
|
CYREG_PWRSYS_WAKE_TR0 EQU 0x40004685
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PWRSYS_WAKE_TR1
|
|
CYREG_PWRSYS_WAKE_TR1 EQU 0x40004686
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PWRSYS_BREF_TR
|
|
CYREG_PWRSYS_BREF_TR EQU 0x40004687
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PWRSYS_BG_TR
|
|
CYREG_PWRSYS_BG_TR EQU 0x40004688
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PWRSYS_WAKE_TR2
|
|
CYREG_PWRSYS_WAKE_TR2 EQU 0x40004689
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PWRSYS_WAKE_TR3
|
|
CYREG_PWRSYS_WAKE_TR3 EQU 0x4000468a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ILO_BASE
|
|
CYDEV_MFGCFG_ILO_BASE EQU 0x40004690
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_ILO_SIZE
|
|
CYDEV_MFGCFG_ILO_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ILO_TR0
|
|
CYREG_ILO_TR0 EQU 0x40004690
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ILO_TR1
|
|
CYREG_ILO_TR1 EQU 0x40004691
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_X32_BASE
|
|
CYDEV_MFGCFG_X32_BASE EQU 0x40004698
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_X32_SIZE
|
|
CYDEV_MFGCFG_X32_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_X32_TR
|
|
CYREG_X32_TR EQU 0x40004698
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_IMO_BASE
|
|
CYDEV_MFGCFG_IMO_BASE EQU 0x400046a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_IMO_SIZE
|
|
CYDEV_MFGCFG_IMO_SIZE EQU 0x00000005
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_IMO_TR0
|
|
CYREG_IMO_TR0 EQU 0x400046a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_IMO_TR1
|
|
CYREG_IMO_TR1 EQU 0x400046a1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_IMO_GAIN
|
|
CYREG_IMO_GAIN EQU 0x400046a2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_IMO_C36M
|
|
CYREG_IMO_C36M EQU 0x400046a3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_IMO_TR2
|
|
CYREG_IMO_TR2 EQU 0x400046a4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_XMHZ_BASE
|
|
CYDEV_MFGCFG_XMHZ_BASE EQU 0x400046a8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_XMHZ_SIZE
|
|
CYDEV_MFGCFG_XMHZ_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_XMHZ_TR
|
|
CYREG_XMHZ_TR EQU 0x400046a8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_MFGCFG_DLY
|
|
CYREG_MFGCFG_DLY EQU 0x400046c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_MLOGIC_BASE
|
|
CYDEV_MFGCFG_MLOGIC_BASE EQU 0x400046e0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_MLOGIC_SIZE
|
|
CYDEV_MFGCFG_MLOGIC_SIZE EQU 0x0000000d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_MLOGIC_DMPSTR
|
|
CYREG_MLOGIC_DMPSTR EQU 0x400046e2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_MLOGIC_SEG_BASE
|
|
CYDEV_MFGCFG_MLOGIC_SEG_BASE EQU 0x400046e4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_MLOGIC_SEG_SIZE
|
|
CYDEV_MFGCFG_MLOGIC_SEG_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_MLOGIC_SEG_CR
|
|
CYREG_MLOGIC_SEG_CR EQU 0x400046e4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_MLOGIC_SEG_CFG0
|
|
CYREG_MLOGIC_SEG_CFG0 EQU 0x400046e5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_MLOGIC_DEBUG
|
|
CYREG_MLOGIC_DEBUG EQU 0x400046e8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_MLOGIC_CPU_SCR_BASE
|
|
CYDEV_MFGCFG_MLOGIC_CPU_SCR_BASE EQU 0x400046ea
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_MFGCFG_MLOGIC_CPU_SCR_SIZE
|
|
CYDEV_MFGCFG_MLOGIC_CPU_SCR_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_MLOGIC_CPU_SCR_CPU_SCR
|
|
CYREG_MLOGIC_CPU_SCR_CPU_SCR EQU 0x400046ea
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_MLOGIC_REV_ID
|
|
CYREG_MLOGIC_REV_ID EQU 0x400046ec
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_RESET_BASE
|
|
CYDEV_RESET_BASE EQU 0x400046f0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_RESET_SIZE
|
|
CYDEV_RESET_SIZE EQU 0x0000000f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_RESET_IPOR_CR0
|
|
CYREG_RESET_IPOR_CR0 EQU 0x400046f0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_RESET_IPOR_CR1
|
|
CYREG_RESET_IPOR_CR1 EQU 0x400046f1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_RESET_IPOR_CR2
|
|
CYREG_RESET_IPOR_CR2 EQU 0x400046f2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_RESET_IPOR_CR3
|
|
CYREG_RESET_IPOR_CR3 EQU 0x400046f3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_RESET_CR0
|
|
CYREG_RESET_CR0 EQU 0x400046f4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_RESET_CR1
|
|
CYREG_RESET_CR1 EQU 0x400046f5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_RESET_CR2
|
|
CYREG_RESET_CR2 EQU 0x400046f6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_RESET_CR3
|
|
CYREG_RESET_CR3 EQU 0x400046f7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_RESET_CR4
|
|
CYREG_RESET_CR4 EQU 0x400046f8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_RESET_CR5
|
|
CYREG_RESET_CR5 EQU 0x400046f9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_RESET_SR0
|
|
CYREG_RESET_SR0 EQU 0x400046fa
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_RESET_SR1
|
|
CYREG_RESET_SR1 EQU 0x400046fb
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_RESET_SR2
|
|
CYREG_RESET_SR2 EQU 0x400046fc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_RESET_SR3
|
|
CYREG_RESET_SR3 EQU 0x400046fd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_RESET_TR
|
|
CYREG_RESET_TR EQU 0x400046fe
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_SPC_BASE
|
|
CYDEV_SPC_BASE EQU 0x40004700
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_SPC_SIZE
|
|
CYDEV_SPC_SIZE EQU 0x00000100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SPC_FM_EE_CR
|
|
CYREG_SPC_FM_EE_CR EQU 0x40004700
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SPC_FM_EE_WAKE_CNT
|
|
CYREG_SPC_FM_EE_WAKE_CNT EQU 0x40004701
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SPC_EE_SCR
|
|
CYREG_SPC_EE_SCR EQU 0x40004702
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SPC_EE_ERR
|
|
CYREG_SPC_EE_ERR EQU 0x40004703
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SPC_CPU_DATA
|
|
CYREG_SPC_CPU_DATA EQU 0x40004720
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SPC_DMA_DATA
|
|
CYREG_SPC_DMA_DATA EQU 0x40004721
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SPC_SR
|
|
CYREG_SPC_SR EQU 0x40004722
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SPC_CR
|
|
CYREG_SPC_CR EQU 0x40004723
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_SPC_DMM_MAP_BASE
|
|
CYDEV_SPC_DMM_MAP_BASE EQU 0x40004780
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_SPC_DMM_MAP_SIZE
|
|
CYDEV_SPC_DMM_MAP_SIZE EQU 0x00000080
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SPC_DMM_MAP_SRAM_MBASE
|
|
CYREG_SPC_DMM_MAP_SRAM_MBASE EQU 0x40004780
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SPC_DMM_MAP_SRAM_MSIZE
|
|
CYREG_SPC_DMM_MAP_SRAM_MSIZE EQU 0x00000080
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CACHE_BASE
|
|
CYDEV_CACHE_BASE EQU 0x40004800
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CACHE_SIZE
|
|
CYDEV_CACHE_SIZE EQU 0x0000009c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CACHE_CC_CTL
|
|
CYREG_CACHE_CC_CTL EQU 0x40004800
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CACHE_ECC_CORR
|
|
CYREG_CACHE_ECC_CORR EQU 0x40004880
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CACHE_ECC_ERR
|
|
CYREG_CACHE_ECC_ERR EQU 0x40004888
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CACHE_FLASH_ERR
|
|
CYREG_CACHE_FLASH_ERR EQU 0x40004890
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CACHE_HITMISS
|
|
CYREG_CACHE_HITMISS EQU 0x40004898
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_I2C_BASE
|
|
CYDEV_I2C_BASE EQU 0x40004900
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_I2C_SIZE
|
|
CYDEV_I2C_SIZE EQU 0x000000e1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_I2C_XCFG
|
|
CYREG_I2C_XCFG EQU 0x400049c8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_I2C_ADR
|
|
CYREG_I2C_ADR EQU 0x400049ca
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_I2C_CFG
|
|
CYREG_I2C_CFG EQU 0x400049d6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_I2C_CSR
|
|
CYREG_I2C_CSR EQU 0x400049d7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_I2C_D
|
|
CYREG_I2C_D EQU 0x400049d8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_I2C_MCSR
|
|
CYREG_I2C_MCSR EQU 0x400049d9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_I2C_CLK_DIV1
|
|
CYREG_I2C_CLK_DIV1 EQU 0x400049db
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_I2C_CLK_DIV2
|
|
CYREG_I2C_CLK_DIV2 EQU 0x400049dc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_I2C_TMOUT_CSR
|
|
CYREG_I2C_TMOUT_CSR EQU 0x400049dd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_I2C_TMOUT_SR
|
|
CYREG_I2C_TMOUT_SR EQU 0x400049de
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_I2C_TMOUT_CFG0
|
|
CYREG_I2C_TMOUT_CFG0 EQU 0x400049df
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_I2C_TMOUT_CFG1
|
|
CYREG_I2C_TMOUT_CFG1 EQU 0x400049e0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_DEC_BASE
|
|
CYDEV_DEC_BASE EQU 0x40004e00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_DEC_SIZE
|
|
CYDEV_DEC_SIZE EQU 0x00000015
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DEC_CR
|
|
CYREG_DEC_CR EQU 0x40004e00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DEC_SR
|
|
CYREG_DEC_SR EQU 0x40004e01
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DEC_SHIFT1
|
|
CYREG_DEC_SHIFT1 EQU 0x40004e02
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DEC_SHIFT2
|
|
CYREG_DEC_SHIFT2 EQU 0x40004e03
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DEC_DR2
|
|
CYREG_DEC_DR2 EQU 0x40004e04
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DEC_DR2H
|
|
CYREG_DEC_DR2H EQU 0x40004e05
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DEC_DR1
|
|
CYREG_DEC_DR1 EQU 0x40004e06
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DEC_OCOR
|
|
CYREG_DEC_OCOR EQU 0x40004e08
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DEC_OCORM
|
|
CYREG_DEC_OCORM EQU 0x40004e09
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DEC_OCORH
|
|
CYREG_DEC_OCORH EQU 0x40004e0a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DEC_GCOR
|
|
CYREG_DEC_GCOR EQU 0x40004e0c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DEC_GCORH
|
|
CYREG_DEC_GCORH EQU 0x40004e0d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DEC_GVAL
|
|
CYREG_DEC_GVAL EQU 0x40004e0e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DEC_OUTSAMP
|
|
CYREG_DEC_OUTSAMP EQU 0x40004e10
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DEC_OUTSAMPM
|
|
CYREG_DEC_OUTSAMPM EQU 0x40004e11
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DEC_OUTSAMPH
|
|
CYREG_DEC_OUTSAMPH EQU 0x40004e12
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DEC_OUTSAMPS
|
|
CYREG_DEC_OUTSAMPS EQU 0x40004e13
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DEC_COHER
|
|
CYREG_DEC_COHER EQU 0x40004e14
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_TMR0_BASE
|
|
CYDEV_TMR0_BASE EQU 0x40004f00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_TMR0_SIZE
|
|
CYDEV_TMR0_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR0_CFG0
|
|
CYREG_TMR0_CFG0 EQU 0x40004f00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR0_CFG1
|
|
CYREG_TMR0_CFG1 EQU 0x40004f01
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR0_CFG2
|
|
CYREG_TMR0_CFG2 EQU 0x40004f02
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR0_SR0
|
|
CYREG_TMR0_SR0 EQU 0x40004f03
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR0_PER0
|
|
CYREG_TMR0_PER0 EQU 0x40004f04
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR0_PER1
|
|
CYREG_TMR0_PER1 EQU 0x40004f05
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR0_CNT_CMP0
|
|
CYREG_TMR0_CNT_CMP0 EQU 0x40004f06
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR0_CNT_CMP1
|
|
CYREG_TMR0_CNT_CMP1 EQU 0x40004f07
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR0_CAP0
|
|
CYREG_TMR0_CAP0 EQU 0x40004f08
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR0_CAP1
|
|
CYREG_TMR0_CAP1 EQU 0x40004f09
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR0_RT0
|
|
CYREG_TMR0_RT0 EQU 0x40004f0a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR0_RT1
|
|
CYREG_TMR0_RT1 EQU 0x40004f0b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_TMR1_BASE
|
|
CYDEV_TMR1_BASE EQU 0x40004f0c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_TMR1_SIZE
|
|
CYDEV_TMR1_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR1_CFG0
|
|
CYREG_TMR1_CFG0 EQU 0x40004f0c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR1_CFG1
|
|
CYREG_TMR1_CFG1 EQU 0x40004f0d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR1_CFG2
|
|
CYREG_TMR1_CFG2 EQU 0x40004f0e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR1_SR0
|
|
CYREG_TMR1_SR0 EQU 0x40004f0f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR1_PER0
|
|
CYREG_TMR1_PER0 EQU 0x40004f10
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR1_PER1
|
|
CYREG_TMR1_PER1 EQU 0x40004f11
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR1_CNT_CMP0
|
|
CYREG_TMR1_CNT_CMP0 EQU 0x40004f12
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR1_CNT_CMP1
|
|
CYREG_TMR1_CNT_CMP1 EQU 0x40004f13
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR1_CAP0
|
|
CYREG_TMR1_CAP0 EQU 0x40004f14
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR1_CAP1
|
|
CYREG_TMR1_CAP1 EQU 0x40004f15
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR1_RT0
|
|
CYREG_TMR1_RT0 EQU 0x40004f16
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR1_RT1
|
|
CYREG_TMR1_RT1 EQU 0x40004f17
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_TMR2_BASE
|
|
CYDEV_TMR2_BASE EQU 0x40004f18
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_TMR2_SIZE
|
|
CYDEV_TMR2_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR2_CFG0
|
|
CYREG_TMR2_CFG0 EQU 0x40004f18
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR2_CFG1
|
|
CYREG_TMR2_CFG1 EQU 0x40004f19
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR2_CFG2
|
|
CYREG_TMR2_CFG2 EQU 0x40004f1a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR2_SR0
|
|
CYREG_TMR2_SR0 EQU 0x40004f1b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR2_PER0
|
|
CYREG_TMR2_PER0 EQU 0x40004f1c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR2_PER1
|
|
CYREG_TMR2_PER1 EQU 0x40004f1d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR2_CNT_CMP0
|
|
CYREG_TMR2_CNT_CMP0 EQU 0x40004f1e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR2_CNT_CMP1
|
|
CYREG_TMR2_CNT_CMP1 EQU 0x40004f1f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR2_CAP0
|
|
CYREG_TMR2_CAP0 EQU 0x40004f20
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR2_CAP1
|
|
CYREG_TMR2_CAP1 EQU 0x40004f21
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR2_RT0
|
|
CYREG_TMR2_RT0 EQU 0x40004f22
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR2_RT1
|
|
CYREG_TMR2_RT1 EQU 0x40004f23
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_TMR3_BASE
|
|
CYDEV_TMR3_BASE EQU 0x40004f24
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_TMR3_SIZE
|
|
CYDEV_TMR3_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR3_CFG0
|
|
CYREG_TMR3_CFG0 EQU 0x40004f24
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR3_CFG1
|
|
CYREG_TMR3_CFG1 EQU 0x40004f25
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR3_CFG2
|
|
CYREG_TMR3_CFG2 EQU 0x40004f26
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR3_SR0
|
|
CYREG_TMR3_SR0 EQU 0x40004f27
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR3_PER0
|
|
CYREG_TMR3_PER0 EQU 0x40004f28
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR3_PER1
|
|
CYREG_TMR3_PER1 EQU 0x40004f29
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR3_CNT_CMP0
|
|
CYREG_TMR3_CNT_CMP0 EQU 0x40004f2a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR3_CNT_CMP1
|
|
CYREG_TMR3_CNT_CMP1 EQU 0x40004f2b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR3_CAP0
|
|
CYREG_TMR3_CAP0 EQU 0x40004f2c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR3_CAP1
|
|
CYREG_TMR3_CAP1 EQU 0x40004f2d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR3_RT0
|
|
CYREG_TMR3_RT0 EQU 0x40004f2e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TMR3_RT1
|
|
CYREG_TMR3_RT1 EQU 0x40004f2f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_BASE
|
|
CYDEV_IO_BASE EQU 0x40005000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_SIZE
|
|
CYDEV_IO_SIZE EQU 0x00000200
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PC_BASE
|
|
CYDEV_IO_PC_BASE EQU 0x40005000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PC_SIZE
|
|
CYDEV_IO_PC_SIZE EQU 0x00000080
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PC_PRT0_BASE
|
|
CYDEV_IO_PC_PRT0_BASE EQU 0x40005000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PC_PRT0_SIZE
|
|
CYDEV_IO_PC_PRT0_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_PC0
|
|
CYREG_PRT0_PC0 EQU 0x40005000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_PC1
|
|
CYREG_PRT0_PC1 EQU 0x40005001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_PC2
|
|
CYREG_PRT0_PC2 EQU 0x40005002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_PC3
|
|
CYREG_PRT0_PC3 EQU 0x40005003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_PC4
|
|
CYREG_PRT0_PC4 EQU 0x40005004
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_PC5
|
|
CYREG_PRT0_PC5 EQU 0x40005005
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_PC6
|
|
CYREG_PRT0_PC6 EQU 0x40005006
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_PC7
|
|
CYREG_PRT0_PC7 EQU 0x40005007
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PC_PRT1_BASE
|
|
CYDEV_IO_PC_PRT1_BASE EQU 0x40005008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PC_PRT1_SIZE
|
|
CYDEV_IO_PC_PRT1_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_PC0
|
|
CYREG_PRT1_PC0 EQU 0x40005008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_PC1
|
|
CYREG_PRT1_PC1 EQU 0x40005009
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_PC2
|
|
CYREG_PRT1_PC2 EQU 0x4000500a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_PC3
|
|
CYREG_PRT1_PC3 EQU 0x4000500b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_PC4
|
|
CYREG_PRT1_PC4 EQU 0x4000500c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_PC5
|
|
CYREG_PRT1_PC5 EQU 0x4000500d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_PC6
|
|
CYREG_PRT1_PC6 EQU 0x4000500e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_PC7
|
|
CYREG_PRT1_PC7 EQU 0x4000500f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PC_PRT2_BASE
|
|
CYDEV_IO_PC_PRT2_BASE EQU 0x40005010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PC_PRT2_SIZE
|
|
CYDEV_IO_PC_PRT2_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_PC0
|
|
CYREG_PRT2_PC0 EQU 0x40005010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_PC1
|
|
CYREG_PRT2_PC1 EQU 0x40005011
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_PC2
|
|
CYREG_PRT2_PC2 EQU 0x40005012
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_PC3
|
|
CYREG_PRT2_PC3 EQU 0x40005013
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_PC4
|
|
CYREG_PRT2_PC4 EQU 0x40005014
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_PC5
|
|
CYREG_PRT2_PC5 EQU 0x40005015
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_PC6
|
|
CYREG_PRT2_PC6 EQU 0x40005016
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_PC7
|
|
CYREG_PRT2_PC7 EQU 0x40005017
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PC_PRT3_BASE
|
|
CYDEV_IO_PC_PRT3_BASE EQU 0x40005018
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PC_PRT3_SIZE
|
|
CYDEV_IO_PC_PRT3_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_PC0
|
|
CYREG_PRT3_PC0 EQU 0x40005018
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_PC1
|
|
CYREG_PRT3_PC1 EQU 0x40005019
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_PC2
|
|
CYREG_PRT3_PC2 EQU 0x4000501a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_PC3
|
|
CYREG_PRT3_PC3 EQU 0x4000501b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_PC4
|
|
CYREG_PRT3_PC4 EQU 0x4000501c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_PC5
|
|
CYREG_PRT3_PC5 EQU 0x4000501d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_PC6
|
|
CYREG_PRT3_PC6 EQU 0x4000501e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_PC7
|
|
CYREG_PRT3_PC7 EQU 0x4000501f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PC_PRT4_BASE
|
|
CYDEV_IO_PC_PRT4_BASE EQU 0x40005020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PC_PRT4_SIZE
|
|
CYDEV_IO_PC_PRT4_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_PC0
|
|
CYREG_PRT4_PC0 EQU 0x40005020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_PC1
|
|
CYREG_PRT4_PC1 EQU 0x40005021
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_PC2
|
|
CYREG_PRT4_PC2 EQU 0x40005022
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_PC3
|
|
CYREG_PRT4_PC3 EQU 0x40005023
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_PC4
|
|
CYREG_PRT4_PC4 EQU 0x40005024
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_PC5
|
|
CYREG_PRT4_PC5 EQU 0x40005025
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_PC6
|
|
CYREG_PRT4_PC6 EQU 0x40005026
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_PC7
|
|
CYREG_PRT4_PC7 EQU 0x40005027
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PC_PRT5_BASE
|
|
CYDEV_IO_PC_PRT5_BASE EQU 0x40005028
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PC_PRT5_SIZE
|
|
CYDEV_IO_PC_PRT5_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_PC0
|
|
CYREG_PRT5_PC0 EQU 0x40005028
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_PC1
|
|
CYREG_PRT5_PC1 EQU 0x40005029
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_PC2
|
|
CYREG_PRT5_PC2 EQU 0x4000502a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_PC3
|
|
CYREG_PRT5_PC3 EQU 0x4000502b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_PC4
|
|
CYREG_PRT5_PC4 EQU 0x4000502c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_PC5
|
|
CYREG_PRT5_PC5 EQU 0x4000502d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_PC6
|
|
CYREG_PRT5_PC6 EQU 0x4000502e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_PC7
|
|
CYREG_PRT5_PC7 EQU 0x4000502f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PC_PRT6_BASE
|
|
CYDEV_IO_PC_PRT6_BASE EQU 0x40005030
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PC_PRT6_SIZE
|
|
CYDEV_IO_PC_PRT6_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_PC0
|
|
CYREG_PRT6_PC0 EQU 0x40005030
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_PC1
|
|
CYREG_PRT6_PC1 EQU 0x40005031
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_PC2
|
|
CYREG_PRT6_PC2 EQU 0x40005032
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_PC3
|
|
CYREG_PRT6_PC3 EQU 0x40005033
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_PC4
|
|
CYREG_PRT6_PC4 EQU 0x40005034
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_PC5
|
|
CYREG_PRT6_PC5 EQU 0x40005035
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_PC6
|
|
CYREG_PRT6_PC6 EQU 0x40005036
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_PC7
|
|
CYREG_PRT6_PC7 EQU 0x40005037
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PC_PRT12_BASE
|
|
CYDEV_IO_PC_PRT12_BASE EQU 0x40005060
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PC_PRT12_SIZE
|
|
CYDEV_IO_PC_PRT12_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_PC0
|
|
CYREG_PRT12_PC0 EQU 0x40005060
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_PC1
|
|
CYREG_PRT12_PC1 EQU 0x40005061
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_PC2
|
|
CYREG_PRT12_PC2 EQU 0x40005062
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_PC3
|
|
CYREG_PRT12_PC3 EQU 0x40005063
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_PC4
|
|
CYREG_PRT12_PC4 EQU 0x40005064
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_PC5
|
|
CYREG_PRT12_PC5 EQU 0x40005065
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_PC6
|
|
CYREG_PRT12_PC6 EQU 0x40005066
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_PC7
|
|
CYREG_PRT12_PC7 EQU 0x40005067
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PC_PRT15_BASE
|
|
CYDEV_IO_PC_PRT15_BASE EQU 0x40005078
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PC_PRT15_SIZE
|
|
CYDEV_IO_PC_PRT15_SIZE EQU 0x00000006
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_IO_PC_PRT15_PC0
|
|
CYREG_IO_PC_PRT15_PC0 EQU 0x40005078
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_IO_PC_PRT15_PC1
|
|
CYREG_IO_PC_PRT15_PC1 EQU 0x40005079
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_IO_PC_PRT15_PC2
|
|
CYREG_IO_PC_PRT15_PC2 EQU 0x4000507a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_IO_PC_PRT15_PC3
|
|
CYREG_IO_PC_PRT15_PC3 EQU 0x4000507b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_IO_PC_PRT15_PC4
|
|
CYREG_IO_PC_PRT15_PC4 EQU 0x4000507c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_IO_PC_PRT15_PC5
|
|
CYREG_IO_PC_PRT15_PC5 EQU 0x4000507d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PC_PRT15_7_6_BASE
|
|
CYDEV_IO_PC_PRT15_7_6_BASE EQU 0x4000507e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PC_PRT15_7_6_SIZE
|
|
CYDEV_IO_PC_PRT15_7_6_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_IO_PC_PRT15_7_6_PC0
|
|
CYREG_IO_PC_PRT15_7_6_PC0 EQU 0x4000507e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_IO_PC_PRT15_7_6_PC1
|
|
CYREG_IO_PC_PRT15_7_6_PC1 EQU 0x4000507f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_DR_BASE
|
|
CYDEV_IO_DR_BASE EQU 0x40005080
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_DR_SIZE
|
|
CYDEV_IO_DR_SIZE EQU 0x00000010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_DR_PRT0_BASE
|
|
CYDEV_IO_DR_PRT0_BASE EQU 0x40005080
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_DR_PRT0_SIZE
|
|
CYDEV_IO_DR_PRT0_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_DR_ALIAS
|
|
CYREG_PRT0_DR_ALIAS EQU 0x40005080
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_DR_PRT1_BASE
|
|
CYDEV_IO_DR_PRT1_BASE EQU 0x40005081
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_DR_PRT1_SIZE
|
|
CYDEV_IO_DR_PRT1_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_DR_ALIAS
|
|
CYREG_PRT1_DR_ALIAS EQU 0x40005081
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_DR_PRT2_BASE
|
|
CYDEV_IO_DR_PRT2_BASE EQU 0x40005082
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_DR_PRT2_SIZE
|
|
CYDEV_IO_DR_PRT2_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_DR_ALIAS
|
|
CYREG_PRT2_DR_ALIAS EQU 0x40005082
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_DR_PRT3_BASE
|
|
CYDEV_IO_DR_PRT3_BASE EQU 0x40005083
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_DR_PRT3_SIZE
|
|
CYDEV_IO_DR_PRT3_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_DR_ALIAS
|
|
CYREG_PRT3_DR_ALIAS EQU 0x40005083
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_DR_PRT4_BASE
|
|
CYDEV_IO_DR_PRT4_BASE EQU 0x40005084
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_DR_PRT4_SIZE
|
|
CYDEV_IO_DR_PRT4_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_DR_ALIAS
|
|
CYREG_PRT4_DR_ALIAS EQU 0x40005084
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_DR_PRT5_BASE
|
|
CYDEV_IO_DR_PRT5_BASE EQU 0x40005085
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_DR_PRT5_SIZE
|
|
CYDEV_IO_DR_PRT5_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_DR_ALIAS
|
|
CYREG_PRT5_DR_ALIAS EQU 0x40005085
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_DR_PRT6_BASE
|
|
CYDEV_IO_DR_PRT6_BASE EQU 0x40005086
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_DR_PRT6_SIZE
|
|
CYDEV_IO_DR_PRT6_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_DR_ALIAS
|
|
CYREG_PRT6_DR_ALIAS EQU 0x40005086
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_DR_PRT12_BASE
|
|
CYDEV_IO_DR_PRT12_BASE EQU 0x4000508c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_DR_PRT12_SIZE
|
|
CYDEV_IO_DR_PRT12_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_DR_ALIAS
|
|
CYREG_PRT12_DR_ALIAS EQU 0x4000508c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_DR_PRT15_BASE
|
|
CYDEV_IO_DR_PRT15_BASE EQU 0x4000508f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_DR_PRT15_SIZE
|
|
CYDEV_IO_DR_PRT15_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT15_DR_15_ALIAS
|
|
CYREG_PRT15_DR_15_ALIAS EQU 0x4000508f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PS_BASE
|
|
CYDEV_IO_PS_BASE EQU 0x40005090
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PS_SIZE
|
|
CYDEV_IO_PS_SIZE EQU 0x00000010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PS_PRT0_BASE
|
|
CYDEV_IO_PS_PRT0_BASE EQU 0x40005090
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PS_PRT0_SIZE
|
|
CYDEV_IO_PS_PRT0_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_PS_ALIAS
|
|
CYREG_PRT0_PS_ALIAS EQU 0x40005090
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PS_PRT1_BASE
|
|
CYDEV_IO_PS_PRT1_BASE EQU 0x40005091
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PS_PRT1_SIZE
|
|
CYDEV_IO_PS_PRT1_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_PS_ALIAS
|
|
CYREG_PRT1_PS_ALIAS EQU 0x40005091
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PS_PRT2_BASE
|
|
CYDEV_IO_PS_PRT2_BASE EQU 0x40005092
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PS_PRT2_SIZE
|
|
CYDEV_IO_PS_PRT2_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_PS_ALIAS
|
|
CYREG_PRT2_PS_ALIAS EQU 0x40005092
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PS_PRT3_BASE
|
|
CYDEV_IO_PS_PRT3_BASE EQU 0x40005093
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PS_PRT3_SIZE
|
|
CYDEV_IO_PS_PRT3_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_PS_ALIAS
|
|
CYREG_PRT3_PS_ALIAS EQU 0x40005093
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PS_PRT4_BASE
|
|
CYDEV_IO_PS_PRT4_BASE EQU 0x40005094
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PS_PRT4_SIZE
|
|
CYDEV_IO_PS_PRT4_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_PS_ALIAS
|
|
CYREG_PRT4_PS_ALIAS EQU 0x40005094
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PS_PRT5_BASE
|
|
CYDEV_IO_PS_PRT5_BASE EQU 0x40005095
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PS_PRT5_SIZE
|
|
CYDEV_IO_PS_PRT5_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_PS_ALIAS
|
|
CYREG_PRT5_PS_ALIAS EQU 0x40005095
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PS_PRT6_BASE
|
|
CYDEV_IO_PS_PRT6_BASE EQU 0x40005096
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PS_PRT6_SIZE
|
|
CYDEV_IO_PS_PRT6_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_PS_ALIAS
|
|
CYREG_PRT6_PS_ALIAS EQU 0x40005096
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PS_PRT12_BASE
|
|
CYDEV_IO_PS_PRT12_BASE EQU 0x4000509c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PS_PRT12_SIZE
|
|
CYDEV_IO_PS_PRT12_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_PS_ALIAS
|
|
CYREG_PRT12_PS_ALIAS EQU 0x4000509c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PS_PRT15_BASE
|
|
CYDEV_IO_PS_PRT15_BASE EQU 0x4000509f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PS_PRT15_SIZE
|
|
CYDEV_IO_PS_PRT15_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT15_PS15_ALIAS
|
|
CYREG_PRT15_PS15_ALIAS EQU 0x4000509f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PRT_BASE
|
|
CYDEV_IO_PRT_BASE EQU 0x40005100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PRT_SIZE
|
|
CYDEV_IO_PRT_SIZE EQU 0x00000100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PRT_PRT0_BASE
|
|
CYDEV_IO_PRT_PRT0_BASE EQU 0x40005100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PRT_PRT0_SIZE
|
|
CYDEV_IO_PRT_PRT0_SIZE EQU 0x00000010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_DR
|
|
CYREG_PRT0_DR EQU 0x40005100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_PS
|
|
CYREG_PRT0_PS EQU 0x40005101
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_DM0
|
|
CYREG_PRT0_DM0 EQU 0x40005102
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_DM1
|
|
CYREG_PRT0_DM1 EQU 0x40005103
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_DM2
|
|
CYREG_PRT0_DM2 EQU 0x40005104
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_SLW
|
|
CYREG_PRT0_SLW EQU 0x40005105
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_BYP
|
|
CYREG_PRT0_BYP EQU 0x40005106
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_BIE
|
|
CYREG_PRT0_BIE EQU 0x40005107
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_INP_DIS
|
|
CYREG_PRT0_INP_DIS EQU 0x40005108
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_CTL
|
|
CYREG_PRT0_CTL EQU 0x40005109
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_PRT
|
|
CYREG_PRT0_PRT EQU 0x4000510a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_BIT_MASK
|
|
CYREG_PRT0_BIT_MASK EQU 0x4000510b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_AMUX
|
|
CYREG_PRT0_AMUX EQU 0x4000510c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_AG
|
|
CYREG_PRT0_AG EQU 0x4000510d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_LCD_COM_SEG
|
|
CYREG_PRT0_LCD_COM_SEG EQU 0x4000510e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_LCD_EN
|
|
CYREG_PRT0_LCD_EN EQU 0x4000510f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PRT_PRT1_BASE
|
|
CYDEV_IO_PRT_PRT1_BASE EQU 0x40005110
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PRT_PRT1_SIZE
|
|
CYDEV_IO_PRT_PRT1_SIZE EQU 0x00000010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_DR
|
|
CYREG_PRT1_DR EQU 0x40005110
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_PS
|
|
CYREG_PRT1_PS EQU 0x40005111
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_DM0
|
|
CYREG_PRT1_DM0 EQU 0x40005112
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_DM1
|
|
CYREG_PRT1_DM1 EQU 0x40005113
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_DM2
|
|
CYREG_PRT1_DM2 EQU 0x40005114
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_SLW
|
|
CYREG_PRT1_SLW EQU 0x40005115
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_BYP
|
|
CYREG_PRT1_BYP EQU 0x40005116
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_BIE
|
|
CYREG_PRT1_BIE EQU 0x40005117
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_INP_DIS
|
|
CYREG_PRT1_INP_DIS EQU 0x40005118
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_CTL
|
|
CYREG_PRT1_CTL EQU 0x40005119
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_PRT
|
|
CYREG_PRT1_PRT EQU 0x4000511a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_BIT_MASK
|
|
CYREG_PRT1_BIT_MASK EQU 0x4000511b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_AMUX
|
|
CYREG_PRT1_AMUX EQU 0x4000511c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_AG
|
|
CYREG_PRT1_AG EQU 0x4000511d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_LCD_COM_SEG
|
|
CYREG_PRT1_LCD_COM_SEG EQU 0x4000511e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_LCD_EN
|
|
CYREG_PRT1_LCD_EN EQU 0x4000511f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PRT_PRT2_BASE
|
|
CYDEV_IO_PRT_PRT2_BASE EQU 0x40005120
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PRT_PRT2_SIZE
|
|
CYDEV_IO_PRT_PRT2_SIZE EQU 0x00000010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_DR
|
|
CYREG_PRT2_DR EQU 0x40005120
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_PS
|
|
CYREG_PRT2_PS EQU 0x40005121
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_DM0
|
|
CYREG_PRT2_DM0 EQU 0x40005122
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_DM1
|
|
CYREG_PRT2_DM1 EQU 0x40005123
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_DM2
|
|
CYREG_PRT2_DM2 EQU 0x40005124
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_SLW
|
|
CYREG_PRT2_SLW EQU 0x40005125
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_BYP
|
|
CYREG_PRT2_BYP EQU 0x40005126
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_BIE
|
|
CYREG_PRT2_BIE EQU 0x40005127
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_INP_DIS
|
|
CYREG_PRT2_INP_DIS EQU 0x40005128
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_CTL
|
|
CYREG_PRT2_CTL EQU 0x40005129
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_PRT
|
|
CYREG_PRT2_PRT EQU 0x4000512a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_BIT_MASK
|
|
CYREG_PRT2_BIT_MASK EQU 0x4000512b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_AMUX
|
|
CYREG_PRT2_AMUX EQU 0x4000512c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_AG
|
|
CYREG_PRT2_AG EQU 0x4000512d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_LCD_COM_SEG
|
|
CYREG_PRT2_LCD_COM_SEG EQU 0x4000512e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_LCD_EN
|
|
CYREG_PRT2_LCD_EN EQU 0x4000512f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PRT_PRT3_BASE
|
|
CYDEV_IO_PRT_PRT3_BASE EQU 0x40005130
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PRT_PRT3_SIZE
|
|
CYDEV_IO_PRT_PRT3_SIZE EQU 0x00000010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_DR
|
|
CYREG_PRT3_DR EQU 0x40005130
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_PS
|
|
CYREG_PRT3_PS EQU 0x40005131
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_DM0
|
|
CYREG_PRT3_DM0 EQU 0x40005132
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_DM1
|
|
CYREG_PRT3_DM1 EQU 0x40005133
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_DM2
|
|
CYREG_PRT3_DM2 EQU 0x40005134
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_SLW
|
|
CYREG_PRT3_SLW EQU 0x40005135
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_BYP
|
|
CYREG_PRT3_BYP EQU 0x40005136
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_BIE
|
|
CYREG_PRT3_BIE EQU 0x40005137
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_INP_DIS
|
|
CYREG_PRT3_INP_DIS EQU 0x40005138
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_CTL
|
|
CYREG_PRT3_CTL EQU 0x40005139
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_PRT
|
|
CYREG_PRT3_PRT EQU 0x4000513a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_BIT_MASK
|
|
CYREG_PRT3_BIT_MASK EQU 0x4000513b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_AMUX
|
|
CYREG_PRT3_AMUX EQU 0x4000513c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_AG
|
|
CYREG_PRT3_AG EQU 0x4000513d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_LCD_COM_SEG
|
|
CYREG_PRT3_LCD_COM_SEG EQU 0x4000513e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_LCD_EN
|
|
CYREG_PRT3_LCD_EN EQU 0x4000513f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PRT_PRT4_BASE
|
|
CYDEV_IO_PRT_PRT4_BASE EQU 0x40005140
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PRT_PRT4_SIZE
|
|
CYDEV_IO_PRT_PRT4_SIZE EQU 0x00000010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_DR
|
|
CYREG_PRT4_DR EQU 0x40005140
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_PS
|
|
CYREG_PRT4_PS EQU 0x40005141
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_DM0
|
|
CYREG_PRT4_DM0 EQU 0x40005142
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_DM1
|
|
CYREG_PRT4_DM1 EQU 0x40005143
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_DM2
|
|
CYREG_PRT4_DM2 EQU 0x40005144
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_SLW
|
|
CYREG_PRT4_SLW EQU 0x40005145
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_BYP
|
|
CYREG_PRT4_BYP EQU 0x40005146
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_BIE
|
|
CYREG_PRT4_BIE EQU 0x40005147
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_INP_DIS
|
|
CYREG_PRT4_INP_DIS EQU 0x40005148
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_CTL
|
|
CYREG_PRT4_CTL EQU 0x40005149
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_PRT
|
|
CYREG_PRT4_PRT EQU 0x4000514a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_BIT_MASK
|
|
CYREG_PRT4_BIT_MASK EQU 0x4000514b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_AMUX
|
|
CYREG_PRT4_AMUX EQU 0x4000514c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_AG
|
|
CYREG_PRT4_AG EQU 0x4000514d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_LCD_COM_SEG
|
|
CYREG_PRT4_LCD_COM_SEG EQU 0x4000514e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_LCD_EN
|
|
CYREG_PRT4_LCD_EN EQU 0x4000514f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PRT_PRT5_BASE
|
|
CYDEV_IO_PRT_PRT5_BASE EQU 0x40005150
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PRT_PRT5_SIZE
|
|
CYDEV_IO_PRT_PRT5_SIZE EQU 0x00000010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_DR
|
|
CYREG_PRT5_DR EQU 0x40005150
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_PS
|
|
CYREG_PRT5_PS EQU 0x40005151
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_DM0
|
|
CYREG_PRT5_DM0 EQU 0x40005152
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_DM1
|
|
CYREG_PRT5_DM1 EQU 0x40005153
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_DM2
|
|
CYREG_PRT5_DM2 EQU 0x40005154
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_SLW
|
|
CYREG_PRT5_SLW EQU 0x40005155
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_BYP
|
|
CYREG_PRT5_BYP EQU 0x40005156
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_BIE
|
|
CYREG_PRT5_BIE EQU 0x40005157
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_INP_DIS
|
|
CYREG_PRT5_INP_DIS EQU 0x40005158
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_CTL
|
|
CYREG_PRT5_CTL EQU 0x40005159
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_PRT
|
|
CYREG_PRT5_PRT EQU 0x4000515a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_BIT_MASK
|
|
CYREG_PRT5_BIT_MASK EQU 0x4000515b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_AMUX
|
|
CYREG_PRT5_AMUX EQU 0x4000515c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_AG
|
|
CYREG_PRT5_AG EQU 0x4000515d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_LCD_COM_SEG
|
|
CYREG_PRT5_LCD_COM_SEG EQU 0x4000515e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_LCD_EN
|
|
CYREG_PRT5_LCD_EN EQU 0x4000515f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PRT_PRT6_BASE
|
|
CYDEV_IO_PRT_PRT6_BASE EQU 0x40005160
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PRT_PRT6_SIZE
|
|
CYDEV_IO_PRT_PRT6_SIZE EQU 0x00000010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_DR
|
|
CYREG_PRT6_DR EQU 0x40005160
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_PS
|
|
CYREG_PRT6_PS EQU 0x40005161
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_DM0
|
|
CYREG_PRT6_DM0 EQU 0x40005162
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_DM1
|
|
CYREG_PRT6_DM1 EQU 0x40005163
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_DM2
|
|
CYREG_PRT6_DM2 EQU 0x40005164
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_SLW
|
|
CYREG_PRT6_SLW EQU 0x40005165
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_BYP
|
|
CYREG_PRT6_BYP EQU 0x40005166
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_BIE
|
|
CYREG_PRT6_BIE EQU 0x40005167
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_INP_DIS
|
|
CYREG_PRT6_INP_DIS EQU 0x40005168
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_CTL
|
|
CYREG_PRT6_CTL EQU 0x40005169
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_PRT
|
|
CYREG_PRT6_PRT EQU 0x4000516a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_BIT_MASK
|
|
CYREG_PRT6_BIT_MASK EQU 0x4000516b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_AMUX
|
|
CYREG_PRT6_AMUX EQU 0x4000516c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_AG
|
|
CYREG_PRT6_AG EQU 0x4000516d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_LCD_COM_SEG
|
|
CYREG_PRT6_LCD_COM_SEG EQU 0x4000516e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_LCD_EN
|
|
CYREG_PRT6_LCD_EN EQU 0x4000516f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PRT_PRT12_BASE
|
|
CYDEV_IO_PRT_PRT12_BASE EQU 0x400051c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PRT_PRT12_SIZE
|
|
CYDEV_IO_PRT_PRT12_SIZE EQU 0x00000010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_DR
|
|
CYREG_PRT12_DR EQU 0x400051c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_PS
|
|
CYREG_PRT12_PS EQU 0x400051c1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_DM0
|
|
CYREG_PRT12_DM0 EQU 0x400051c2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_DM1
|
|
CYREG_PRT12_DM1 EQU 0x400051c3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_DM2
|
|
CYREG_PRT12_DM2 EQU 0x400051c4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_SLW
|
|
CYREG_PRT12_SLW EQU 0x400051c5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_BYP
|
|
CYREG_PRT12_BYP EQU 0x400051c6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_BIE
|
|
CYREG_PRT12_BIE EQU 0x400051c7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_INP_DIS
|
|
CYREG_PRT12_INP_DIS EQU 0x400051c8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_SIO_HYST_EN
|
|
CYREG_PRT12_SIO_HYST_EN EQU 0x400051c9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_PRT
|
|
CYREG_PRT12_PRT EQU 0x400051ca
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_BIT_MASK
|
|
CYREG_PRT12_BIT_MASK EQU 0x400051cb
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_SIO_REG_HIFREQ
|
|
CYREG_PRT12_SIO_REG_HIFREQ EQU 0x400051cc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_AG
|
|
CYREG_PRT12_AG EQU 0x400051cd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_SIO_CFG
|
|
CYREG_PRT12_SIO_CFG EQU 0x400051ce
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_SIO_DIFF
|
|
CYREG_PRT12_SIO_DIFF EQU 0x400051cf
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PRT_PRT15_BASE
|
|
CYDEV_IO_PRT_PRT15_BASE EQU 0x400051f0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IO_PRT_PRT15_SIZE
|
|
CYDEV_IO_PRT_PRT15_SIZE EQU 0x00000010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT15_DR
|
|
CYREG_PRT15_DR EQU 0x400051f0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT15_PS
|
|
CYREG_PRT15_PS EQU 0x400051f1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT15_DM0
|
|
CYREG_PRT15_DM0 EQU 0x400051f2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT15_DM1
|
|
CYREG_PRT15_DM1 EQU 0x400051f3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT15_DM2
|
|
CYREG_PRT15_DM2 EQU 0x400051f4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT15_SLW
|
|
CYREG_PRT15_SLW EQU 0x400051f5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT15_BYP
|
|
CYREG_PRT15_BYP EQU 0x400051f6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT15_BIE
|
|
CYREG_PRT15_BIE EQU 0x400051f7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT15_INP_DIS
|
|
CYREG_PRT15_INP_DIS EQU 0x400051f8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT15_CTL
|
|
CYREG_PRT15_CTL EQU 0x400051f9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT15_PRT
|
|
CYREG_PRT15_PRT EQU 0x400051fa
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT15_BIT_MASK
|
|
CYREG_PRT15_BIT_MASK EQU 0x400051fb
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT15_AMUX
|
|
CYREG_PRT15_AMUX EQU 0x400051fc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT15_AG
|
|
CYREG_PRT15_AG EQU 0x400051fd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT15_LCD_COM_SEG
|
|
CYREG_PRT15_LCD_COM_SEG EQU 0x400051fe
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT15_LCD_EN
|
|
CYREG_PRT15_LCD_EN EQU 0x400051ff
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PRTDSI_BASE
|
|
CYDEV_PRTDSI_BASE EQU 0x40005200
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PRTDSI_SIZE
|
|
CYDEV_PRTDSI_SIZE EQU 0x0000007f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PRTDSI_PRT0_BASE
|
|
CYDEV_PRTDSI_PRT0_BASE EQU 0x40005200
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PRTDSI_PRT0_SIZE
|
|
CYDEV_PRTDSI_PRT0_SIZE EQU 0x00000007
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_OUT_SEL0
|
|
CYREG_PRT0_OUT_SEL0 EQU 0x40005200
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_OUT_SEL1
|
|
CYREG_PRT0_OUT_SEL1 EQU 0x40005201
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_OE_SEL0
|
|
CYREG_PRT0_OE_SEL0 EQU 0x40005202
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_OE_SEL1
|
|
CYREG_PRT0_OE_SEL1 EQU 0x40005203
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_DBL_SYNC_IN
|
|
CYREG_PRT0_DBL_SYNC_IN EQU 0x40005204
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_SYNC_OUT
|
|
CYREG_PRT0_SYNC_OUT EQU 0x40005205
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT0_CAPS_SEL
|
|
CYREG_PRT0_CAPS_SEL EQU 0x40005206
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PRTDSI_PRT1_BASE
|
|
CYDEV_PRTDSI_PRT1_BASE EQU 0x40005208
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PRTDSI_PRT1_SIZE
|
|
CYDEV_PRTDSI_PRT1_SIZE EQU 0x00000007
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_OUT_SEL0
|
|
CYREG_PRT1_OUT_SEL0 EQU 0x40005208
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_OUT_SEL1
|
|
CYREG_PRT1_OUT_SEL1 EQU 0x40005209
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_OE_SEL0
|
|
CYREG_PRT1_OE_SEL0 EQU 0x4000520a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_OE_SEL1
|
|
CYREG_PRT1_OE_SEL1 EQU 0x4000520b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_DBL_SYNC_IN
|
|
CYREG_PRT1_DBL_SYNC_IN EQU 0x4000520c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_SYNC_OUT
|
|
CYREG_PRT1_SYNC_OUT EQU 0x4000520d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT1_CAPS_SEL
|
|
CYREG_PRT1_CAPS_SEL EQU 0x4000520e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PRTDSI_PRT2_BASE
|
|
CYDEV_PRTDSI_PRT2_BASE EQU 0x40005210
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PRTDSI_PRT2_SIZE
|
|
CYDEV_PRTDSI_PRT2_SIZE EQU 0x00000007
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_OUT_SEL0
|
|
CYREG_PRT2_OUT_SEL0 EQU 0x40005210
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_OUT_SEL1
|
|
CYREG_PRT2_OUT_SEL1 EQU 0x40005211
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_OE_SEL0
|
|
CYREG_PRT2_OE_SEL0 EQU 0x40005212
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_OE_SEL1
|
|
CYREG_PRT2_OE_SEL1 EQU 0x40005213
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_DBL_SYNC_IN
|
|
CYREG_PRT2_DBL_SYNC_IN EQU 0x40005214
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_SYNC_OUT
|
|
CYREG_PRT2_SYNC_OUT EQU 0x40005215
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT2_CAPS_SEL
|
|
CYREG_PRT2_CAPS_SEL EQU 0x40005216
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PRTDSI_PRT3_BASE
|
|
CYDEV_PRTDSI_PRT3_BASE EQU 0x40005218
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PRTDSI_PRT3_SIZE
|
|
CYDEV_PRTDSI_PRT3_SIZE EQU 0x00000007
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_OUT_SEL0
|
|
CYREG_PRT3_OUT_SEL0 EQU 0x40005218
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_OUT_SEL1
|
|
CYREG_PRT3_OUT_SEL1 EQU 0x40005219
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_OE_SEL0
|
|
CYREG_PRT3_OE_SEL0 EQU 0x4000521a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_OE_SEL1
|
|
CYREG_PRT3_OE_SEL1 EQU 0x4000521b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_DBL_SYNC_IN
|
|
CYREG_PRT3_DBL_SYNC_IN EQU 0x4000521c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_SYNC_OUT
|
|
CYREG_PRT3_SYNC_OUT EQU 0x4000521d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT3_CAPS_SEL
|
|
CYREG_PRT3_CAPS_SEL EQU 0x4000521e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PRTDSI_PRT4_BASE
|
|
CYDEV_PRTDSI_PRT4_BASE EQU 0x40005220
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PRTDSI_PRT4_SIZE
|
|
CYDEV_PRTDSI_PRT4_SIZE EQU 0x00000007
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_OUT_SEL0
|
|
CYREG_PRT4_OUT_SEL0 EQU 0x40005220
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_OUT_SEL1
|
|
CYREG_PRT4_OUT_SEL1 EQU 0x40005221
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_OE_SEL0
|
|
CYREG_PRT4_OE_SEL0 EQU 0x40005222
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_OE_SEL1
|
|
CYREG_PRT4_OE_SEL1 EQU 0x40005223
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_DBL_SYNC_IN
|
|
CYREG_PRT4_DBL_SYNC_IN EQU 0x40005224
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_SYNC_OUT
|
|
CYREG_PRT4_SYNC_OUT EQU 0x40005225
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT4_CAPS_SEL
|
|
CYREG_PRT4_CAPS_SEL EQU 0x40005226
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PRTDSI_PRT5_BASE
|
|
CYDEV_PRTDSI_PRT5_BASE EQU 0x40005228
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PRTDSI_PRT5_SIZE
|
|
CYDEV_PRTDSI_PRT5_SIZE EQU 0x00000007
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_OUT_SEL0
|
|
CYREG_PRT5_OUT_SEL0 EQU 0x40005228
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_OUT_SEL1
|
|
CYREG_PRT5_OUT_SEL1 EQU 0x40005229
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_OE_SEL0
|
|
CYREG_PRT5_OE_SEL0 EQU 0x4000522a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_OE_SEL1
|
|
CYREG_PRT5_OE_SEL1 EQU 0x4000522b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_DBL_SYNC_IN
|
|
CYREG_PRT5_DBL_SYNC_IN EQU 0x4000522c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_SYNC_OUT
|
|
CYREG_PRT5_SYNC_OUT EQU 0x4000522d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT5_CAPS_SEL
|
|
CYREG_PRT5_CAPS_SEL EQU 0x4000522e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PRTDSI_PRT6_BASE
|
|
CYDEV_PRTDSI_PRT6_BASE EQU 0x40005230
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PRTDSI_PRT6_SIZE
|
|
CYDEV_PRTDSI_PRT6_SIZE EQU 0x00000007
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_OUT_SEL0
|
|
CYREG_PRT6_OUT_SEL0 EQU 0x40005230
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_OUT_SEL1
|
|
CYREG_PRT6_OUT_SEL1 EQU 0x40005231
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_OE_SEL0
|
|
CYREG_PRT6_OE_SEL0 EQU 0x40005232
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_OE_SEL1
|
|
CYREG_PRT6_OE_SEL1 EQU 0x40005233
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_DBL_SYNC_IN
|
|
CYREG_PRT6_DBL_SYNC_IN EQU 0x40005234
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_SYNC_OUT
|
|
CYREG_PRT6_SYNC_OUT EQU 0x40005235
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT6_CAPS_SEL
|
|
CYREG_PRT6_CAPS_SEL EQU 0x40005236
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PRTDSI_PRT12_BASE
|
|
CYDEV_PRTDSI_PRT12_BASE EQU 0x40005260
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PRTDSI_PRT12_SIZE
|
|
CYDEV_PRTDSI_PRT12_SIZE EQU 0x00000006
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_OUT_SEL0
|
|
CYREG_PRT12_OUT_SEL0 EQU 0x40005260
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_OUT_SEL1
|
|
CYREG_PRT12_OUT_SEL1 EQU 0x40005261
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_OE_SEL0
|
|
CYREG_PRT12_OE_SEL0 EQU 0x40005262
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_OE_SEL1
|
|
CYREG_PRT12_OE_SEL1 EQU 0x40005263
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_DBL_SYNC_IN
|
|
CYREG_PRT12_DBL_SYNC_IN EQU 0x40005264
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT12_SYNC_OUT
|
|
CYREG_PRT12_SYNC_OUT EQU 0x40005265
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PRTDSI_PRT15_BASE
|
|
CYDEV_PRTDSI_PRT15_BASE EQU 0x40005278
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PRTDSI_PRT15_SIZE
|
|
CYDEV_PRTDSI_PRT15_SIZE EQU 0x00000007
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT15_OUT_SEL0
|
|
CYREG_PRT15_OUT_SEL0 EQU 0x40005278
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT15_OUT_SEL1
|
|
CYREG_PRT15_OUT_SEL1 EQU 0x40005279
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT15_OE_SEL0
|
|
CYREG_PRT15_OE_SEL0 EQU 0x4000527a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT15_OE_SEL1
|
|
CYREG_PRT15_OE_SEL1 EQU 0x4000527b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT15_DBL_SYNC_IN
|
|
CYREG_PRT15_DBL_SYNC_IN EQU 0x4000527c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT15_SYNC_OUT
|
|
CYREG_PRT15_SYNC_OUT EQU 0x4000527d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PRT15_CAPS_SEL
|
|
CYREG_PRT15_CAPS_SEL EQU 0x4000527e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_EMIF_BASE
|
|
CYDEV_EMIF_BASE EQU 0x40005400
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_EMIF_SIZE
|
|
CYDEV_EMIF_SIZE EQU 0x00000007
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_EMIF_NO_UDB
|
|
CYREG_EMIF_NO_UDB EQU 0x40005400
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_EMIF_RP_WAIT_STATES
|
|
CYREG_EMIF_RP_WAIT_STATES EQU 0x40005401
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_EMIF_MEM_DWN
|
|
CYREG_EMIF_MEM_DWN EQU 0x40005402
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_EMIF_MEMCLK_DIV
|
|
CYREG_EMIF_MEMCLK_DIV EQU 0x40005403
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_EMIF_CLOCK_EN
|
|
CYREG_EMIF_CLOCK_EN EQU 0x40005404
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_EMIF_EM_TYPE
|
|
CYREG_EMIF_EM_TYPE EQU 0x40005405
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_EMIF_WP_WAIT_STATES
|
|
CYREG_EMIF_WP_WAIT_STATES EQU 0x40005406
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_BASE
|
|
CYDEV_ANAIF_BASE EQU 0x40005800
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_SIZE
|
|
CYDEV_ANAIF_SIZE EQU 0x000003a9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_BASE
|
|
CYDEV_ANAIF_CFG_BASE EQU 0x40005800
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_SIZE
|
|
CYDEV_ANAIF_CFG_SIZE EQU 0x0000010f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC0_BASE
|
|
CYDEV_ANAIF_CFG_SC0_BASE EQU 0x40005800
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC0_SIZE
|
|
CYDEV_ANAIF_CFG_SC0_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC0_CR0
|
|
CYREG_SC0_CR0 EQU 0x40005800
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC0_CR1
|
|
CYREG_SC0_CR1 EQU 0x40005801
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC0_CR2
|
|
CYREG_SC0_CR2 EQU 0x40005802
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC1_BASE
|
|
CYDEV_ANAIF_CFG_SC1_BASE EQU 0x40005804
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC1_SIZE
|
|
CYDEV_ANAIF_CFG_SC1_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC1_CR0
|
|
CYREG_SC1_CR0 EQU 0x40005804
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC1_CR1
|
|
CYREG_SC1_CR1 EQU 0x40005805
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC1_CR2
|
|
CYREG_SC1_CR2 EQU 0x40005806
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC2_BASE
|
|
CYDEV_ANAIF_CFG_SC2_BASE EQU 0x40005808
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC2_SIZE
|
|
CYDEV_ANAIF_CFG_SC2_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC2_CR0
|
|
CYREG_SC2_CR0 EQU 0x40005808
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC2_CR1
|
|
CYREG_SC2_CR1 EQU 0x40005809
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC2_CR2
|
|
CYREG_SC2_CR2 EQU 0x4000580a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC3_BASE
|
|
CYDEV_ANAIF_CFG_SC3_BASE EQU 0x4000580c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC3_SIZE
|
|
CYDEV_ANAIF_CFG_SC3_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC3_CR0
|
|
CYREG_SC3_CR0 EQU 0x4000580c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC3_CR1
|
|
CYREG_SC3_CR1 EQU 0x4000580d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC3_CR2
|
|
CYREG_SC3_CR2 EQU 0x4000580e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC0_BASE
|
|
CYDEV_ANAIF_CFG_DAC0_BASE EQU 0x40005820
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC0_SIZE
|
|
CYDEV_ANAIF_CFG_DAC0_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC0_CR0
|
|
CYREG_DAC0_CR0 EQU 0x40005820
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC0_CR1
|
|
CYREG_DAC0_CR1 EQU 0x40005821
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC0_TST
|
|
CYREG_DAC0_TST EQU 0x40005822
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC1_BASE
|
|
CYDEV_ANAIF_CFG_DAC1_BASE EQU 0x40005824
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC1_SIZE
|
|
CYDEV_ANAIF_CFG_DAC1_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC1_CR0
|
|
CYREG_DAC1_CR0 EQU 0x40005824
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC1_CR1
|
|
CYREG_DAC1_CR1 EQU 0x40005825
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC1_TST
|
|
CYREG_DAC1_TST EQU 0x40005826
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC2_BASE
|
|
CYDEV_ANAIF_CFG_DAC2_BASE EQU 0x40005828
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC2_SIZE
|
|
CYDEV_ANAIF_CFG_DAC2_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC2_CR0
|
|
CYREG_DAC2_CR0 EQU 0x40005828
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC2_CR1
|
|
CYREG_DAC2_CR1 EQU 0x40005829
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC2_TST
|
|
CYREG_DAC2_TST EQU 0x4000582a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC3_BASE
|
|
CYDEV_ANAIF_CFG_DAC3_BASE EQU 0x4000582c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC3_SIZE
|
|
CYDEV_ANAIF_CFG_DAC3_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC3_CR0
|
|
CYREG_DAC3_CR0 EQU 0x4000582c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC3_CR1
|
|
CYREG_DAC3_CR1 EQU 0x4000582d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC3_TST
|
|
CYREG_DAC3_TST EQU 0x4000582e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP0_BASE
|
|
CYDEV_ANAIF_CFG_CMP0_BASE EQU 0x40005840
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP0_SIZE
|
|
CYDEV_ANAIF_CFG_CMP0_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP0_CR
|
|
CYREG_CMP0_CR EQU 0x40005840
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP1_BASE
|
|
CYDEV_ANAIF_CFG_CMP1_BASE EQU 0x40005841
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP1_SIZE
|
|
CYDEV_ANAIF_CFG_CMP1_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP1_CR
|
|
CYREG_CMP1_CR EQU 0x40005841
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP2_BASE
|
|
CYDEV_ANAIF_CFG_CMP2_BASE EQU 0x40005842
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP2_SIZE
|
|
CYDEV_ANAIF_CFG_CMP2_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP2_CR
|
|
CYREG_CMP2_CR EQU 0x40005842
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP3_BASE
|
|
CYDEV_ANAIF_CFG_CMP3_BASE EQU 0x40005843
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP3_SIZE
|
|
CYDEV_ANAIF_CFG_CMP3_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP3_CR
|
|
CYREG_CMP3_CR EQU 0x40005843
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT0_BASE
|
|
CYDEV_ANAIF_CFG_LUT0_BASE EQU 0x40005848
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT0_SIZE
|
|
CYDEV_ANAIF_CFG_LUT0_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_LUT0_CR
|
|
CYREG_LUT0_CR EQU 0x40005848
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_LUT0_MX
|
|
CYREG_LUT0_MX EQU 0x40005849
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT1_BASE
|
|
CYDEV_ANAIF_CFG_LUT1_BASE EQU 0x4000584a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT1_SIZE
|
|
CYDEV_ANAIF_CFG_LUT1_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_LUT1_CR
|
|
CYREG_LUT1_CR EQU 0x4000584a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_LUT1_MX
|
|
CYREG_LUT1_MX EQU 0x4000584b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT2_BASE
|
|
CYDEV_ANAIF_CFG_LUT2_BASE EQU 0x4000584c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT2_SIZE
|
|
CYDEV_ANAIF_CFG_LUT2_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_LUT2_CR
|
|
CYREG_LUT2_CR EQU 0x4000584c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_LUT2_MX
|
|
CYREG_LUT2_MX EQU 0x4000584d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT3_BASE
|
|
CYDEV_ANAIF_CFG_LUT3_BASE EQU 0x4000584e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT3_SIZE
|
|
CYDEV_ANAIF_CFG_LUT3_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_LUT3_CR
|
|
CYREG_LUT3_CR EQU 0x4000584e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_LUT3_MX
|
|
CYREG_LUT3_MX EQU 0x4000584f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP0_BASE
|
|
CYDEV_ANAIF_CFG_OPAMP0_BASE EQU 0x40005858
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP0_SIZE
|
|
CYDEV_ANAIF_CFG_OPAMP0_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_OPAMP0_CR
|
|
CYREG_OPAMP0_CR EQU 0x40005858
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_OPAMP0_RSVD
|
|
CYREG_OPAMP0_RSVD EQU 0x40005859
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP1_BASE
|
|
CYDEV_ANAIF_CFG_OPAMP1_BASE EQU 0x4000585a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP1_SIZE
|
|
CYDEV_ANAIF_CFG_OPAMP1_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_OPAMP1_CR
|
|
CYREG_OPAMP1_CR EQU 0x4000585a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_OPAMP1_RSVD
|
|
CYREG_OPAMP1_RSVD EQU 0x4000585b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP2_BASE
|
|
CYDEV_ANAIF_CFG_OPAMP2_BASE EQU 0x4000585c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP2_SIZE
|
|
CYDEV_ANAIF_CFG_OPAMP2_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_OPAMP2_CR
|
|
CYREG_OPAMP2_CR EQU 0x4000585c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_OPAMP2_RSVD
|
|
CYREG_OPAMP2_RSVD EQU 0x4000585d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP3_BASE
|
|
CYDEV_ANAIF_CFG_OPAMP3_BASE EQU 0x4000585e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP3_SIZE
|
|
CYDEV_ANAIF_CFG_OPAMP3_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_OPAMP3_CR
|
|
CYREG_OPAMP3_CR EQU 0x4000585e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_OPAMP3_RSVD
|
|
CYREG_OPAMP3_RSVD EQU 0x4000585f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_LCDDAC_BASE
|
|
CYDEV_ANAIF_CFG_LCDDAC_BASE EQU 0x40005868
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_LCDDAC_SIZE
|
|
CYDEV_ANAIF_CFG_LCDDAC_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_LCDDAC_CR0
|
|
CYREG_LCDDAC_CR0 EQU 0x40005868
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_LCDDAC_CR1
|
|
CYREG_LCDDAC_CR1 EQU 0x40005869
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_LCDDRV_BASE
|
|
CYDEV_ANAIF_CFG_LCDDRV_BASE EQU 0x4000586a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_LCDDRV_SIZE
|
|
CYDEV_ANAIF_CFG_LCDDRV_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_LCDDRV_CR
|
|
CYREG_LCDDRV_CR EQU 0x4000586a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_LCDTMR_BASE
|
|
CYDEV_ANAIF_CFG_LCDTMR_BASE EQU 0x4000586b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_LCDTMR_SIZE
|
|
CYDEV_ANAIF_CFG_LCDTMR_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_LCDTMR_CFG
|
|
CYREG_LCDTMR_CFG EQU 0x4000586b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_BG_BASE
|
|
CYDEV_ANAIF_CFG_BG_BASE EQU 0x4000586c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_BG_SIZE
|
|
CYDEV_ANAIF_CFG_BG_SIZE EQU 0x00000004
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BG_CR0
|
|
CYREG_BG_CR0 EQU 0x4000586c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BG_RSVD
|
|
CYREG_BG_RSVD EQU 0x4000586d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BG_DFT0
|
|
CYREG_BG_DFT0 EQU 0x4000586e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BG_DFT1
|
|
CYREG_BG_DFT1 EQU 0x4000586f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_CAPSL_BASE
|
|
CYDEV_ANAIF_CFG_CAPSL_BASE EQU 0x40005870
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_CAPSL_SIZE
|
|
CYDEV_ANAIF_CFG_CAPSL_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAPSL_CFG0
|
|
CYREG_CAPSL_CFG0 EQU 0x40005870
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAPSL_CFG1
|
|
CYREG_CAPSL_CFG1 EQU 0x40005871
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_CAPSR_BASE
|
|
CYDEV_ANAIF_CFG_CAPSR_BASE EQU 0x40005872
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_CAPSR_SIZE
|
|
CYDEV_ANAIF_CFG_CAPSR_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAPSR_CFG0
|
|
CYREG_CAPSR_CFG0 EQU 0x40005872
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAPSR_CFG1
|
|
CYREG_CAPSR_CFG1 EQU 0x40005873
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_PUMP_BASE
|
|
CYDEV_ANAIF_CFG_PUMP_BASE EQU 0x40005876
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_PUMP_SIZE
|
|
CYDEV_ANAIF_CFG_PUMP_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PUMP_CR0
|
|
CYREG_PUMP_CR0 EQU 0x40005876
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PUMP_CR1
|
|
CYREG_PUMP_CR1 EQU 0x40005877
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_LPF0_BASE
|
|
CYDEV_ANAIF_CFG_LPF0_BASE EQU 0x40005878
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_LPF0_SIZE
|
|
CYDEV_ANAIF_CFG_LPF0_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_LPF0_CR0
|
|
CYREG_LPF0_CR0 EQU 0x40005878
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_LPF0_RSVD
|
|
CYREG_LPF0_RSVD EQU 0x40005879
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_LPF1_BASE
|
|
CYDEV_ANAIF_CFG_LPF1_BASE EQU 0x4000587a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_LPF1_SIZE
|
|
CYDEV_ANAIF_CFG_LPF1_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_LPF1_CR0
|
|
CYREG_LPF1_CR0 EQU 0x4000587a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_LPF1_RSVD
|
|
CYREG_LPF1_RSVD EQU 0x4000587b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_MISC_BASE
|
|
CYDEV_ANAIF_CFG_MISC_BASE EQU 0x4000587c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_MISC_SIZE
|
|
CYDEV_ANAIF_CFG_MISC_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ANAIF_CFG_MISC_CR0
|
|
CYREG_ANAIF_CFG_MISC_CR0 EQU 0x4000587c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_BASE
|
|
CYDEV_ANAIF_CFG_DSM0_BASE EQU 0x40005880
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_SIZE
|
|
CYDEV_ANAIF_CFG_DSM0_SIZE EQU 0x00000020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_CR0
|
|
CYREG_DSM0_CR0 EQU 0x40005880
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_CR1
|
|
CYREG_DSM0_CR1 EQU 0x40005881
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_CR2
|
|
CYREG_DSM0_CR2 EQU 0x40005882
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_CR3
|
|
CYREG_DSM0_CR3 EQU 0x40005883
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_CR4
|
|
CYREG_DSM0_CR4 EQU 0x40005884
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_CR5
|
|
CYREG_DSM0_CR5 EQU 0x40005885
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_CR6
|
|
CYREG_DSM0_CR6 EQU 0x40005886
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_CR7
|
|
CYREG_DSM0_CR7 EQU 0x40005887
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_CR8
|
|
CYREG_DSM0_CR8 EQU 0x40005888
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_CR9
|
|
CYREG_DSM0_CR9 EQU 0x40005889
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_CR10
|
|
CYREG_DSM0_CR10 EQU 0x4000588a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_CR11
|
|
CYREG_DSM0_CR11 EQU 0x4000588b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_CR12
|
|
CYREG_DSM0_CR12 EQU 0x4000588c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_CR13
|
|
CYREG_DSM0_CR13 EQU 0x4000588d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_CR14
|
|
CYREG_DSM0_CR14 EQU 0x4000588e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_CR15
|
|
CYREG_DSM0_CR15 EQU 0x4000588f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_CR16
|
|
CYREG_DSM0_CR16 EQU 0x40005890
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_CR17
|
|
CYREG_DSM0_CR17 EQU 0x40005891
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_REF0
|
|
CYREG_DSM0_REF0 EQU 0x40005892
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_REF1
|
|
CYREG_DSM0_REF1 EQU 0x40005893
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_REF2
|
|
CYREG_DSM0_REF2 EQU 0x40005894
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_REF3
|
|
CYREG_DSM0_REF3 EQU 0x40005895
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_DEM0
|
|
CYREG_DSM0_DEM0 EQU 0x40005896
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_DEM1
|
|
CYREG_DSM0_DEM1 EQU 0x40005897
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_TST0
|
|
CYREG_DSM0_TST0 EQU 0x40005898
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_TST1
|
|
CYREG_DSM0_TST1 EQU 0x40005899
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_BUF0
|
|
CYREG_DSM0_BUF0 EQU 0x4000589a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_BUF1
|
|
CYREG_DSM0_BUF1 EQU 0x4000589b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_BUF2
|
|
CYREG_DSM0_BUF2 EQU 0x4000589c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_BUF3
|
|
CYREG_DSM0_BUF3 EQU 0x4000589d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_MISC
|
|
CYREG_DSM0_MISC EQU 0x4000589e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_RSVD1
|
|
CYREG_DSM0_RSVD1 EQU 0x4000589f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_SAR0_BASE
|
|
CYDEV_ANAIF_CFG_SAR0_BASE EQU 0x40005900
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_SAR0_SIZE
|
|
CYDEV_ANAIF_CFG_SAR0_SIZE EQU 0x00000007
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR0_CSR0
|
|
CYREG_SAR0_CSR0 EQU 0x40005900
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR0_CSR1
|
|
CYREG_SAR0_CSR1 EQU 0x40005901
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR0_CSR2
|
|
CYREG_SAR0_CSR2 EQU 0x40005902
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR0_CSR3
|
|
CYREG_SAR0_CSR3 EQU 0x40005903
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR0_CSR4
|
|
CYREG_SAR0_CSR4 EQU 0x40005904
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR0_CSR5
|
|
CYREG_SAR0_CSR5 EQU 0x40005905
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR0_CSR6
|
|
CYREG_SAR0_CSR6 EQU 0x40005906
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_SAR1_BASE
|
|
CYDEV_ANAIF_CFG_SAR1_BASE EQU 0x40005908
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_CFG_SAR1_SIZE
|
|
CYDEV_ANAIF_CFG_SAR1_SIZE EQU 0x00000007
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR1_CSR0
|
|
CYREG_SAR1_CSR0 EQU 0x40005908
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR1_CSR1
|
|
CYREG_SAR1_CSR1 EQU 0x40005909
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR1_CSR2
|
|
CYREG_SAR1_CSR2 EQU 0x4000590a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR1_CSR3
|
|
CYREG_SAR1_CSR3 EQU 0x4000590b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR1_CSR4
|
|
CYREG_SAR1_CSR4 EQU 0x4000590c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR1_CSR5
|
|
CYREG_SAR1_CSR5 EQU 0x4000590d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR1_CSR6
|
|
CYREG_SAR1_CSR6 EQU 0x4000590e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_BASE
|
|
CYDEV_ANAIF_RT_BASE EQU 0x40005a00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_SIZE
|
|
CYDEV_ANAIF_RT_SIZE EQU 0x00000162
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_SC0_BASE
|
|
CYDEV_ANAIF_RT_SC0_BASE EQU 0x40005a00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_SC0_SIZE
|
|
CYDEV_ANAIF_RT_SC0_SIZE EQU 0x0000000d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC0_SW0
|
|
CYREG_SC0_SW0 EQU 0x40005a00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC0_SW2
|
|
CYREG_SC0_SW2 EQU 0x40005a02
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC0_SW3
|
|
CYREG_SC0_SW3 EQU 0x40005a03
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC0_SW4
|
|
CYREG_SC0_SW4 EQU 0x40005a04
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC0_SW6
|
|
CYREG_SC0_SW6 EQU 0x40005a06
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC0_SW7
|
|
CYREG_SC0_SW7 EQU 0x40005a07
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC0_SW8
|
|
CYREG_SC0_SW8 EQU 0x40005a08
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC0_SW10
|
|
CYREG_SC0_SW10 EQU 0x40005a0a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC0_CLK
|
|
CYREG_SC0_CLK EQU 0x40005a0b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC0_BST
|
|
CYREG_SC0_BST EQU 0x40005a0c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_SC1_BASE
|
|
CYDEV_ANAIF_RT_SC1_BASE EQU 0x40005a10
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_SC1_SIZE
|
|
CYDEV_ANAIF_RT_SC1_SIZE EQU 0x0000000d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC1_SW0
|
|
CYREG_SC1_SW0 EQU 0x40005a10
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC1_SW2
|
|
CYREG_SC1_SW2 EQU 0x40005a12
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC1_SW3
|
|
CYREG_SC1_SW3 EQU 0x40005a13
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC1_SW4
|
|
CYREG_SC1_SW4 EQU 0x40005a14
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC1_SW6
|
|
CYREG_SC1_SW6 EQU 0x40005a16
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC1_SW7
|
|
CYREG_SC1_SW7 EQU 0x40005a17
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC1_SW8
|
|
CYREG_SC1_SW8 EQU 0x40005a18
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC1_SW10
|
|
CYREG_SC1_SW10 EQU 0x40005a1a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC1_CLK
|
|
CYREG_SC1_CLK EQU 0x40005a1b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC1_BST
|
|
CYREG_SC1_BST EQU 0x40005a1c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_SC2_BASE
|
|
CYDEV_ANAIF_RT_SC2_BASE EQU 0x40005a20
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_SC2_SIZE
|
|
CYDEV_ANAIF_RT_SC2_SIZE EQU 0x0000000d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC2_SW0
|
|
CYREG_SC2_SW0 EQU 0x40005a20
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC2_SW2
|
|
CYREG_SC2_SW2 EQU 0x40005a22
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC2_SW3
|
|
CYREG_SC2_SW3 EQU 0x40005a23
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC2_SW4
|
|
CYREG_SC2_SW4 EQU 0x40005a24
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC2_SW6
|
|
CYREG_SC2_SW6 EQU 0x40005a26
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC2_SW7
|
|
CYREG_SC2_SW7 EQU 0x40005a27
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC2_SW8
|
|
CYREG_SC2_SW8 EQU 0x40005a28
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC2_SW10
|
|
CYREG_SC2_SW10 EQU 0x40005a2a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC2_CLK
|
|
CYREG_SC2_CLK EQU 0x40005a2b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC2_BST
|
|
CYREG_SC2_BST EQU 0x40005a2c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_SC3_BASE
|
|
CYDEV_ANAIF_RT_SC3_BASE EQU 0x40005a30
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_SC3_SIZE
|
|
CYDEV_ANAIF_RT_SC3_SIZE EQU 0x0000000d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC3_SW0
|
|
CYREG_SC3_SW0 EQU 0x40005a30
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC3_SW2
|
|
CYREG_SC3_SW2 EQU 0x40005a32
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC3_SW3
|
|
CYREG_SC3_SW3 EQU 0x40005a33
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC3_SW4
|
|
CYREG_SC3_SW4 EQU 0x40005a34
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC3_SW6
|
|
CYREG_SC3_SW6 EQU 0x40005a36
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC3_SW7
|
|
CYREG_SC3_SW7 EQU 0x40005a37
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC3_SW8
|
|
CYREG_SC3_SW8 EQU 0x40005a38
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC3_SW10
|
|
CYREG_SC3_SW10 EQU 0x40005a3a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC3_CLK
|
|
CYREG_SC3_CLK EQU 0x40005a3b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC3_BST
|
|
CYREG_SC3_BST EQU 0x40005a3c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC0_BASE
|
|
CYDEV_ANAIF_RT_DAC0_BASE EQU 0x40005a80
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC0_SIZE
|
|
CYDEV_ANAIF_RT_DAC0_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC0_SW0
|
|
CYREG_DAC0_SW0 EQU 0x40005a80
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC0_SW2
|
|
CYREG_DAC0_SW2 EQU 0x40005a82
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC0_SW3
|
|
CYREG_DAC0_SW3 EQU 0x40005a83
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC0_SW4
|
|
CYREG_DAC0_SW4 EQU 0x40005a84
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC0_STROBE
|
|
CYREG_DAC0_STROBE EQU 0x40005a87
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC1_BASE
|
|
CYDEV_ANAIF_RT_DAC1_BASE EQU 0x40005a88
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC1_SIZE
|
|
CYDEV_ANAIF_RT_DAC1_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC1_SW0
|
|
CYREG_DAC1_SW0 EQU 0x40005a88
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC1_SW2
|
|
CYREG_DAC1_SW2 EQU 0x40005a8a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC1_SW3
|
|
CYREG_DAC1_SW3 EQU 0x40005a8b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC1_SW4
|
|
CYREG_DAC1_SW4 EQU 0x40005a8c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC1_STROBE
|
|
CYREG_DAC1_STROBE EQU 0x40005a8f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC2_BASE
|
|
CYDEV_ANAIF_RT_DAC2_BASE EQU 0x40005a90
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC2_SIZE
|
|
CYDEV_ANAIF_RT_DAC2_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC2_SW0
|
|
CYREG_DAC2_SW0 EQU 0x40005a90
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC2_SW2
|
|
CYREG_DAC2_SW2 EQU 0x40005a92
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC2_SW3
|
|
CYREG_DAC2_SW3 EQU 0x40005a93
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC2_SW4
|
|
CYREG_DAC2_SW4 EQU 0x40005a94
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC2_STROBE
|
|
CYREG_DAC2_STROBE EQU 0x40005a97
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC3_BASE
|
|
CYDEV_ANAIF_RT_DAC3_BASE EQU 0x40005a98
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC3_SIZE
|
|
CYDEV_ANAIF_RT_DAC3_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC3_SW0
|
|
CYREG_DAC3_SW0 EQU 0x40005a98
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC3_SW2
|
|
CYREG_DAC3_SW2 EQU 0x40005a9a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC3_SW3
|
|
CYREG_DAC3_SW3 EQU 0x40005a9b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC3_SW4
|
|
CYREG_DAC3_SW4 EQU 0x40005a9c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC3_STROBE
|
|
CYREG_DAC3_STROBE EQU 0x40005a9f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP0_BASE
|
|
CYDEV_ANAIF_RT_CMP0_BASE EQU 0x40005ac0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP0_SIZE
|
|
CYDEV_ANAIF_RT_CMP0_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP0_SW0
|
|
CYREG_CMP0_SW0 EQU 0x40005ac0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP0_SW2
|
|
CYREG_CMP0_SW2 EQU 0x40005ac2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP0_SW3
|
|
CYREG_CMP0_SW3 EQU 0x40005ac3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP0_SW4
|
|
CYREG_CMP0_SW4 EQU 0x40005ac4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP0_SW6
|
|
CYREG_CMP0_SW6 EQU 0x40005ac6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP0_CLK
|
|
CYREG_CMP0_CLK EQU 0x40005ac7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP1_BASE
|
|
CYDEV_ANAIF_RT_CMP1_BASE EQU 0x40005ac8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP1_SIZE
|
|
CYDEV_ANAIF_RT_CMP1_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP1_SW0
|
|
CYREG_CMP1_SW0 EQU 0x40005ac8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP1_SW2
|
|
CYREG_CMP1_SW2 EQU 0x40005aca
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP1_SW3
|
|
CYREG_CMP1_SW3 EQU 0x40005acb
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP1_SW4
|
|
CYREG_CMP1_SW4 EQU 0x40005acc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP1_SW6
|
|
CYREG_CMP1_SW6 EQU 0x40005ace
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP1_CLK
|
|
CYREG_CMP1_CLK EQU 0x40005acf
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP2_BASE
|
|
CYDEV_ANAIF_RT_CMP2_BASE EQU 0x40005ad0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP2_SIZE
|
|
CYDEV_ANAIF_RT_CMP2_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP2_SW0
|
|
CYREG_CMP2_SW0 EQU 0x40005ad0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP2_SW2
|
|
CYREG_CMP2_SW2 EQU 0x40005ad2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP2_SW3
|
|
CYREG_CMP2_SW3 EQU 0x40005ad3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP2_SW4
|
|
CYREG_CMP2_SW4 EQU 0x40005ad4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP2_SW6
|
|
CYREG_CMP2_SW6 EQU 0x40005ad6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP2_CLK
|
|
CYREG_CMP2_CLK EQU 0x40005ad7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP3_BASE
|
|
CYDEV_ANAIF_RT_CMP3_BASE EQU 0x40005ad8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP3_SIZE
|
|
CYDEV_ANAIF_RT_CMP3_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP3_SW0
|
|
CYREG_CMP3_SW0 EQU 0x40005ad8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP3_SW2
|
|
CYREG_CMP3_SW2 EQU 0x40005ada
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP3_SW3
|
|
CYREG_CMP3_SW3 EQU 0x40005adb
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP3_SW4
|
|
CYREG_CMP3_SW4 EQU 0x40005adc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP3_SW6
|
|
CYREG_CMP3_SW6 EQU 0x40005ade
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP3_CLK
|
|
CYREG_CMP3_CLK EQU 0x40005adf
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_DSM0_BASE
|
|
CYDEV_ANAIF_RT_DSM0_BASE EQU 0x40005b00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_DSM0_SIZE
|
|
CYDEV_ANAIF_RT_DSM0_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_SW0
|
|
CYREG_DSM0_SW0 EQU 0x40005b00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_SW2
|
|
CYREG_DSM0_SW2 EQU 0x40005b02
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_SW3
|
|
CYREG_DSM0_SW3 EQU 0x40005b03
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_SW4
|
|
CYREG_DSM0_SW4 EQU 0x40005b04
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_SW6
|
|
CYREG_DSM0_SW6 EQU 0x40005b06
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_CLK
|
|
CYREG_DSM0_CLK EQU 0x40005b07
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_SAR0_BASE
|
|
CYDEV_ANAIF_RT_SAR0_BASE EQU 0x40005b20
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_SAR0_SIZE
|
|
CYDEV_ANAIF_RT_SAR0_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR0_SW0
|
|
CYREG_SAR0_SW0 EQU 0x40005b20
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR0_SW2
|
|
CYREG_SAR0_SW2 EQU 0x40005b22
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR0_SW3
|
|
CYREG_SAR0_SW3 EQU 0x40005b23
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR0_SW4
|
|
CYREG_SAR0_SW4 EQU 0x40005b24
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR0_SW6
|
|
CYREG_SAR0_SW6 EQU 0x40005b26
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR0_CLK
|
|
CYREG_SAR0_CLK EQU 0x40005b27
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_SAR1_BASE
|
|
CYDEV_ANAIF_RT_SAR1_BASE EQU 0x40005b28
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_SAR1_SIZE
|
|
CYDEV_ANAIF_RT_SAR1_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR1_SW0
|
|
CYREG_SAR1_SW0 EQU 0x40005b28
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR1_SW2
|
|
CYREG_SAR1_SW2 EQU 0x40005b2a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR1_SW3
|
|
CYREG_SAR1_SW3 EQU 0x40005b2b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR1_SW4
|
|
CYREG_SAR1_SW4 EQU 0x40005b2c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR1_SW6
|
|
CYREG_SAR1_SW6 EQU 0x40005b2e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR1_CLK
|
|
CYREG_SAR1_CLK EQU 0x40005b2f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP0_BASE
|
|
CYDEV_ANAIF_RT_OPAMP0_BASE EQU 0x40005b40
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP0_SIZE
|
|
CYDEV_ANAIF_RT_OPAMP0_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_OPAMP0_MX
|
|
CYREG_OPAMP0_MX EQU 0x40005b40
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_OPAMP0_SW
|
|
CYREG_OPAMP0_SW EQU 0x40005b41
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP1_BASE
|
|
CYDEV_ANAIF_RT_OPAMP1_BASE EQU 0x40005b42
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP1_SIZE
|
|
CYDEV_ANAIF_RT_OPAMP1_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_OPAMP1_MX
|
|
CYREG_OPAMP1_MX EQU 0x40005b42
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_OPAMP1_SW
|
|
CYREG_OPAMP1_SW EQU 0x40005b43
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP2_BASE
|
|
CYDEV_ANAIF_RT_OPAMP2_BASE EQU 0x40005b44
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP2_SIZE
|
|
CYDEV_ANAIF_RT_OPAMP2_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_OPAMP2_MX
|
|
CYREG_OPAMP2_MX EQU 0x40005b44
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_OPAMP2_SW
|
|
CYREG_OPAMP2_SW EQU 0x40005b45
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP3_BASE
|
|
CYDEV_ANAIF_RT_OPAMP3_BASE EQU 0x40005b46
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP3_SIZE
|
|
CYDEV_ANAIF_RT_OPAMP3_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_OPAMP3_MX
|
|
CYREG_OPAMP3_MX EQU 0x40005b46
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_OPAMP3_SW
|
|
CYREG_OPAMP3_SW EQU 0x40005b47
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_LCDDAC_BASE
|
|
CYDEV_ANAIF_RT_LCDDAC_BASE EQU 0x40005b50
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_LCDDAC_SIZE
|
|
CYDEV_ANAIF_RT_LCDDAC_SIZE EQU 0x00000005
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_LCDDAC_SW0
|
|
CYREG_LCDDAC_SW0 EQU 0x40005b50
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_LCDDAC_SW1
|
|
CYREG_LCDDAC_SW1 EQU 0x40005b51
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_LCDDAC_SW2
|
|
CYREG_LCDDAC_SW2 EQU 0x40005b52
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_LCDDAC_SW3
|
|
CYREG_LCDDAC_SW3 EQU 0x40005b53
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_LCDDAC_SW4
|
|
CYREG_LCDDAC_SW4 EQU 0x40005b54
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_SC_BASE
|
|
CYDEV_ANAIF_RT_SC_BASE EQU 0x40005b56
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_SC_SIZE
|
|
CYDEV_ANAIF_RT_SC_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC_MISC
|
|
CYREG_SC_MISC EQU 0x40005b56
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_BUS_BASE
|
|
CYDEV_ANAIF_RT_BUS_BASE EQU 0x40005b58
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_BUS_SIZE
|
|
CYDEV_ANAIF_RT_BUS_SIZE EQU 0x00000004
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BUS_SW0
|
|
CYREG_BUS_SW0 EQU 0x40005b58
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BUS_SW2
|
|
CYREG_BUS_SW2 EQU 0x40005b5a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BUS_SW3
|
|
CYREG_BUS_SW3 EQU 0x40005b5b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_DFT_BASE
|
|
CYDEV_ANAIF_RT_DFT_BASE EQU 0x40005b5c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_RT_DFT_SIZE
|
|
CYDEV_ANAIF_RT_DFT_SIZE EQU 0x00000006
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFT_CR0
|
|
CYREG_DFT_CR0 EQU 0x40005b5c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFT_CR1
|
|
CYREG_DFT_CR1 EQU 0x40005b5d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFT_CR2
|
|
CYREG_DFT_CR2 EQU 0x40005b5e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFT_CR3
|
|
CYREG_DFT_CR3 EQU 0x40005b5f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFT_CR4
|
|
CYREG_DFT_CR4 EQU 0x40005b60
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFT_CR5
|
|
CYREG_DFT_CR5 EQU 0x40005b61
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_WRK_BASE
|
|
CYDEV_ANAIF_WRK_BASE EQU 0x40005b80
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_WRK_SIZE
|
|
CYDEV_ANAIF_WRK_SIZE EQU 0x00000029
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC0_BASE
|
|
CYDEV_ANAIF_WRK_DAC0_BASE EQU 0x40005b80
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC0_SIZE
|
|
CYDEV_ANAIF_WRK_DAC0_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC0_D
|
|
CYREG_DAC0_D EQU 0x40005b80
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC1_BASE
|
|
CYDEV_ANAIF_WRK_DAC1_BASE EQU 0x40005b81
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC1_SIZE
|
|
CYDEV_ANAIF_WRK_DAC1_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC1_D
|
|
CYREG_DAC1_D EQU 0x40005b81
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC2_BASE
|
|
CYDEV_ANAIF_WRK_DAC2_BASE EQU 0x40005b82
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC2_SIZE
|
|
CYDEV_ANAIF_WRK_DAC2_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC2_D
|
|
CYREG_DAC2_D EQU 0x40005b82
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC3_BASE
|
|
CYDEV_ANAIF_WRK_DAC3_BASE EQU 0x40005b83
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC3_SIZE
|
|
CYDEV_ANAIF_WRK_DAC3_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DAC3_D
|
|
CYREG_DAC3_D EQU 0x40005b83
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_WRK_DSM0_BASE
|
|
CYDEV_ANAIF_WRK_DSM0_BASE EQU 0x40005b88
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_WRK_DSM0_SIZE
|
|
CYDEV_ANAIF_WRK_DSM0_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_OUT0
|
|
CYREG_DSM0_OUT0 EQU 0x40005b88
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DSM0_OUT1
|
|
CYREG_DSM0_OUT1 EQU 0x40005b89
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_WRK_LUT_BASE
|
|
CYDEV_ANAIF_WRK_LUT_BASE EQU 0x40005b90
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_WRK_LUT_SIZE
|
|
CYDEV_ANAIF_WRK_LUT_SIZE EQU 0x00000005
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_LUT_SR
|
|
CYREG_LUT_SR EQU 0x40005b90
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_LUT_WRK1
|
|
CYREG_LUT_WRK1 EQU 0x40005b91
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_LUT_MSK
|
|
CYREG_LUT_MSK EQU 0x40005b92
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_LUT_CLK
|
|
CYREG_LUT_CLK EQU 0x40005b93
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_LUT_CPTR
|
|
CYREG_LUT_CPTR EQU 0x40005b94
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_WRK_CMP_BASE
|
|
CYDEV_ANAIF_WRK_CMP_BASE EQU 0x40005b96
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_WRK_CMP_SIZE
|
|
CYDEV_ANAIF_WRK_CMP_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP_WRK
|
|
CYREG_CMP_WRK EQU 0x40005b96
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CMP_TST
|
|
CYREG_CMP_TST EQU 0x40005b97
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_WRK_SC_BASE
|
|
CYDEV_ANAIF_WRK_SC_BASE EQU 0x40005b98
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_WRK_SC_SIZE
|
|
CYDEV_ANAIF_WRK_SC_SIZE EQU 0x00000005
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC_SR
|
|
CYREG_SC_SR EQU 0x40005b98
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC_WRK1
|
|
CYREG_SC_WRK1 EQU 0x40005b99
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC_MSK
|
|
CYREG_SC_MSK EQU 0x40005b9a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC_CMPINV
|
|
CYREG_SC_CMPINV EQU 0x40005b9b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SC_CPTR
|
|
CYREG_SC_CPTR EQU 0x40005b9c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_WRK_SAR0_BASE
|
|
CYDEV_ANAIF_WRK_SAR0_BASE EQU 0x40005ba0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_WRK_SAR0_SIZE
|
|
CYDEV_ANAIF_WRK_SAR0_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR0_WRK0
|
|
CYREG_SAR0_WRK0 EQU 0x40005ba0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR0_WRK1
|
|
CYREG_SAR0_WRK1 EQU 0x40005ba1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_WRK_SAR1_BASE
|
|
CYDEV_ANAIF_WRK_SAR1_BASE EQU 0x40005ba2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_WRK_SAR1_SIZE
|
|
CYDEV_ANAIF_WRK_SAR1_SIZE EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR1_WRK0
|
|
CYREG_SAR1_WRK0 EQU 0x40005ba2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SAR1_WRK1
|
|
CYREG_SAR1_WRK1 EQU 0x40005ba3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_WRK_SARS_BASE
|
|
CYDEV_ANAIF_WRK_SARS_BASE EQU 0x40005ba8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ANAIF_WRK_SARS_SIZE
|
|
CYDEV_ANAIF_WRK_SARS_SIZE EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ANAIF_WRK_SARS_SOF
|
|
CYREG_ANAIF_WRK_SARS_SOF EQU 0x40005ba8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_BASE
|
|
CYDEV_USB_BASE EQU 0x40006000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_SIZE
|
|
CYDEV_USB_SIZE EQU 0x00000300
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_EP0_DR0
|
|
CYREG_USB_EP0_DR0 EQU 0x40006000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_EP0_DR1
|
|
CYREG_USB_EP0_DR1 EQU 0x40006001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_EP0_DR2
|
|
CYREG_USB_EP0_DR2 EQU 0x40006002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_EP0_DR3
|
|
CYREG_USB_EP0_DR3 EQU 0x40006003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_EP0_DR4
|
|
CYREG_USB_EP0_DR4 EQU 0x40006004
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_EP0_DR5
|
|
CYREG_USB_EP0_DR5 EQU 0x40006005
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_EP0_DR6
|
|
CYREG_USB_EP0_DR6 EQU 0x40006006
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_EP0_DR7
|
|
CYREG_USB_EP0_DR7 EQU 0x40006007
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_CR0
|
|
CYREG_USB_CR0 EQU 0x40006008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_CR1
|
|
CYREG_USB_CR1 EQU 0x40006009
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SIE_EP_INT_EN
|
|
CYREG_USB_SIE_EP_INT_EN EQU 0x4000600a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SIE_EP_INT_SR
|
|
CYREG_USB_SIE_EP_INT_SR EQU 0x4000600b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_SIE_EP1_BASE
|
|
CYDEV_USB_SIE_EP1_BASE EQU 0x4000600c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_SIE_EP1_SIZE
|
|
CYDEV_USB_SIE_EP1_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SIE_EP1_CNT0
|
|
CYREG_USB_SIE_EP1_CNT0 EQU 0x4000600c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SIE_EP1_CNT1
|
|
CYREG_USB_SIE_EP1_CNT1 EQU 0x4000600d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SIE_EP1_CR0
|
|
CYREG_USB_SIE_EP1_CR0 EQU 0x4000600e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_USBIO_CR0
|
|
CYREG_USB_USBIO_CR0 EQU 0x40006010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_USBIO_CR1
|
|
CYREG_USB_USBIO_CR1 EQU 0x40006012
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_DYN_RECONFIG
|
|
CYREG_USB_DYN_RECONFIG EQU 0x40006014
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SOF0
|
|
CYREG_USB_SOF0 EQU 0x40006018
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SOF1
|
|
CYREG_USB_SOF1 EQU 0x40006019
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_SIE_EP2_BASE
|
|
CYDEV_USB_SIE_EP2_BASE EQU 0x4000601c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_SIE_EP2_SIZE
|
|
CYDEV_USB_SIE_EP2_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SIE_EP2_CNT0
|
|
CYREG_USB_SIE_EP2_CNT0 EQU 0x4000601c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SIE_EP2_CNT1
|
|
CYREG_USB_SIE_EP2_CNT1 EQU 0x4000601d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SIE_EP2_CR0
|
|
CYREG_USB_SIE_EP2_CR0 EQU 0x4000601e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_EP0_CR
|
|
CYREG_USB_EP0_CR EQU 0x40006028
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_EP0_CNT
|
|
CYREG_USB_EP0_CNT EQU 0x40006029
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_SIE_EP3_BASE
|
|
CYDEV_USB_SIE_EP3_BASE EQU 0x4000602c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_SIE_EP3_SIZE
|
|
CYDEV_USB_SIE_EP3_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SIE_EP3_CNT0
|
|
CYREG_USB_SIE_EP3_CNT0 EQU 0x4000602c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SIE_EP3_CNT1
|
|
CYREG_USB_SIE_EP3_CNT1 EQU 0x4000602d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SIE_EP3_CR0
|
|
CYREG_USB_SIE_EP3_CR0 EQU 0x4000602e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_SIE_EP4_BASE
|
|
CYDEV_USB_SIE_EP4_BASE EQU 0x4000603c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_SIE_EP4_SIZE
|
|
CYDEV_USB_SIE_EP4_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SIE_EP4_CNT0
|
|
CYREG_USB_SIE_EP4_CNT0 EQU 0x4000603c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SIE_EP4_CNT1
|
|
CYREG_USB_SIE_EP4_CNT1 EQU 0x4000603d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SIE_EP4_CR0
|
|
CYREG_USB_SIE_EP4_CR0 EQU 0x4000603e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_SIE_EP5_BASE
|
|
CYDEV_USB_SIE_EP5_BASE EQU 0x4000604c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_SIE_EP5_SIZE
|
|
CYDEV_USB_SIE_EP5_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SIE_EP5_CNT0
|
|
CYREG_USB_SIE_EP5_CNT0 EQU 0x4000604c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SIE_EP5_CNT1
|
|
CYREG_USB_SIE_EP5_CNT1 EQU 0x4000604d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SIE_EP5_CR0
|
|
CYREG_USB_SIE_EP5_CR0 EQU 0x4000604e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_SIE_EP6_BASE
|
|
CYDEV_USB_SIE_EP6_BASE EQU 0x4000605c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_SIE_EP6_SIZE
|
|
CYDEV_USB_SIE_EP6_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SIE_EP6_CNT0
|
|
CYREG_USB_SIE_EP6_CNT0 EQU 0x4000605c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SIE_EP6_CNT1
|
|
CYREG_USB_SIE_EP6_CNT1 EQU 0x4000605d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SIE_EP6_CR0
|
|
CYREG_USB_SIE_EP6_CR0 EQU 0x4000605e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_SIE_EP7_BASE
|
|
CYDEV_USB_SIE_EP7_BASE EQU 0x4000606c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_SIE_EP7_SIZE
|
|
CYDEV_USB_SIE_EP7_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SIE_EP7_CNT0
|
|
CYREG_USB_SIE_EP7_CNT0 EQU 0x4000606c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SIE_EP7_CNT1
|
|
CYREG_USB_SIE_EP7_CNT1 EQU 0x4000606d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SIE_EP7_CR0
|
|
CYREG_USB_SIE_EP7_CR0 EQU 0x4000606e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_SIE_EP8_BASE
|
|
CYDEV_USB_SIE_EP8_BASE EQU 0x4000607c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_SIE_EP8_SIZE
|
|
CYDEV_USB_SIE_EP8_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SIE_EP8_CNT0
|
|
CYREG_USB_SIE_EP8_CNT0 EQU 0x4000607c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SIE_EP8_CNT1
|
|
CYREG_USB_SIE_EP8_CNT1 EQU 0x4000607d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_SIE_EP8_CR0
|
|
CYREG_USB_SIE_EP8_CR0 EQU 0x4000607e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_EP1_BASE
|
|
CYDEV_USB_ARB_EP1_BASE EQU 0x40006080
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_EP1_SIZE
|
|
CYDEV_USB_ARB_EP1_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_EP1_CFG
|
|
CYREG_USB_ARB_EP1_CFG EQU 0x40006080
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_EP1_INT_EN
|
|
CYREG_USB_ARB_EP1_INT_EN EQU 0x40006081
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_EP1_SR
|
|
CYREG_USB_ARB_EP1_SR EQU 0x40006082
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_RW1_BASE
|
|
CYDEV_USB_ARB_RW1_BASE EQU 0x40006084
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_RW1_SIZE
|
|
CYDEV_USB_ARB_RW1_SIZE EQU 0x00000005
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW1_WA
|
|
CYREG_USB_ARB_RW1_WA EQU 0x40006084
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW1_WA_MSB
|
|
CYREG_USB_ARB_RW1_WA_MSB EQU 0x40006085
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW1_RA
|
|
CYREG_USB_ARB_RW1_RA EQU 0x40006086
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW1_RA_MSB
|
|
CYREG_USB_ARB_RW1_RA_MSB EQU 0x40006087
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW1_DR
|
|
CYREG_USB_ARB_RW1_DR EQU 0x40006088
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_BUF_SIZE
|
|
CYREG_USB_BUF_SIZE EQU 0x4000608c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_EP_ACTIVE
|
|
CYREG_USB_EP_ACTIVE EQU 0x4000608e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_EP_TYPE
|
|
CYREG_USB_EP_TYPE EQU 0x4000608f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_EP2_BASE
|
|
CYDEV_USB_ARB_EP2_BASE EQU 0x40006090
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_EP2_SIZE
|
|
CYDEV_USB_ARB_EP2_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_EP2_CFG
|
|
CYREG_USB_ARB_EP2_CFG EQU 0x40006090
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_EP2_INT_EN
|
|
CYREG_USB_ARB_EP2_INT_EN EQU 0x40006091
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_EP2_SR
|
|
CYREG_USB_ARB_EP2_SR EQU 0x40006092
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_RW2_BASE
|
|
CYDEV_USB_ARB_RW2_BASE EQU 0x40006094
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_RW2_SIZE
|
|
CYDEV_USB_ARB_RW2_SIZE EQU 0x00000005
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW2_WA
|
|
CYREG_USB_ARB_RW2_WA EQU 0x40006094
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW2_WA_MSB
|
|
CYREG_USB_ARB_RW2_WA_MSB EQU 0x40006095
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW2_RA
|
|
CYREG_USB_ARB_RW2_RA EQU 0x40006096
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW2_RA_MSB
|
|
CYREG_USB_ARB_RW2_RA_MSB EQU 0x40006097
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW2_DR
|
|
CYREG_USB_ARB_RW2_DR EQU 0x40006098
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_CFG
|
|
CYREG_USB_ARB_CFG EQU 0x4000609c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_USB_CLK_EN
|
|
CYREG_USB_USB_CLK_EN EQU 0x4000609d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_INT_EN
|
|
CYREG_USB_ARB_INT_EN EQU 0x4000609e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_INT_SR
|
|
CYREG_USB_ARB_INT_SR EQU 0x4000609f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_EP3_BASE
|
|
CYDEV_USB_ARB_EP3_BASE EQU 0x400060a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_EP3_SIZE
|
|
CYDEV_USB_ARB_EP3_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_EP3_CFG
|
|
CYREG_USB_ARB_EP3_CFG EQU 0x400060a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_EP3_INT_EN
|
|
CYREG_USB_ARB_EP3_INT_EN EQU 0x400060a1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_EP3_SR
|
|
CYREG_USB_ARB_EP3_SR EQU 0x400060a2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_RW3_BASE
|
|
CYDEV_USB_ARB_RW3_BASE EQU 0x400060a4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_RW3_SIZE
|
|
CYDEV_USB_ARB_RW3_SIZE EQU 0x00000005
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW3_WA
|
|
CYREG_USB_ARB_RW3_WA EQU 0x400060a4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW3_WA_MSB
|
|
CYREG_USB_ARB_RW3_WA_MSB EQU 0x400060a5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW3_RA
|
|
CYREG_USB_ARB_RW3_RA EQU 0x400060a6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW3_RA_MSB
|
|
CYREG_USB_ARB_RW3_RA_MSB EQU 0x400060a7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW3_DR
|
|
CYREG_USB_ARB_RW3_DR EQU 0x400060a8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_CWA
|
|
CYREG_USB_CWA EQU 0x400060ac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_CWA_MSB
|
|
CYREG_USB_CWA_MSB EQU 0x400060ad
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_EP4_BASE
|
|
CYDEV_USB_ARB_EP4_BASE EQU 0x400060b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_EP4_SIZE
|
|
CYDEV_USB_ARB_EP4_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_EP4_CFG
|
|
CYREG_USB_ARB_EP4_CFG EQU 0x400060b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_EP4_INT_EN
|
|
CYREG_USB_ARB_EP4_INT_EN EQU 0x400060b1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_EP4_SR
|
|
CYREG_USB_ARB_EP4_SR EQU 0x400060b2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_RW4_BASE
|
|
CYDEV_USB_ARB_RW4_BASE EQU 0x400060b4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_RW4_SIZE
|
|
CYDEV_USB_ARB_RW4_SIZE EQU 0x00000005
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW4_WA
|
|
CYREG_USB_ARB_RW4_WA EQU 0x400060b4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW4_WA_MSB
|
|
CYREG_USB_ARB_RW4_WA_MSB EQU 0x400060b5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW4_RA
|
|
CYREG_USB_ARB_RW4_RA EQU 0x400060b6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW4_RA_MSB
|
|
CYREG_USB_ARB_RW4_RA_MSB EQU 0x400060b7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW4_DR
|
|
CYREG_USB_ARB_RW4_DR EQU 0x400060b8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_DMA_THRES
|
|
CYREG_USB_DMA_THRES EQU 0x400060bc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_DMA_THRES_MSB
|
|
CYREG_USB_DMA_THRES_MSB EQU 0x400060bd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_EP5_BASE
|
|
CYDEV_USB_ARB_EP5_BASE EQU 0x400060c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_EP5_SIZE
|
|
CYDEV_USB_ARB_EP5_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_EP5_CFG
|
|
CYREG_USB_ARB_EP5_CFG EQU 0x400060c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_EP5_INT_EN
|
|
CYREG_USB_ARB_EP5_INT_EN EQU 0x400060c1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_EP5_SR
|
|
CYREG_USB_ARB_EP5_SR EQU 0x400060c2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_RW5_BASE
|
|
CYDEV_USB_ARB_RW5_BASE EQU 0x400060c4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_RW5_SIZE
|
|
CYDEV_USB_ARB_RW5_SIZE EQU 0x00000005
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW5_WA
|
|
CYREG_USB_ARB_RW5_WA EQU 0x400060c4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW5_WA_MSB
|
|
CYREG_USB_ARB_RW5_WA_MSB EQU 0x400060c5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW5_RA
|
|
CYREG_USB_ARB_RW5_RA EQU 0x400060c6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW5_RA_MSB
|
|
CYREG_USB_ARB_RW5_RA_MSB EQU 0x400060c7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW5_DR
|
|
CYREG_USB_ARB_RW5_DR EQU 0x400060c8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_BUS_RST_CNT
|
|
CYREG_USB_BUS_RST_CNT EQU 0x400060cc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_EP6_BASE
|
|
CYDEV_USB_ARB_EP6_BASE EQU 0x400060d0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_EP6_SIZE
|
|
CYDEV_USB_ARB_EP6_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_EP6_CFG
|
|
CYREG_USB_ARB_EP6_CFG EQU 0x400060d0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_EP6_INT_EN
|
|
CYREG_USB_ARB_EP6_INT_EN EQU 0x400060d1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_EP6_SR
|
|
CYREG_USB_ARB_EP6_SR EQU 0x400060d2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_RW6_BASE
|
|
CYDEV_USB_ARB_RW6_BASE EQU 0x400060d4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_RW6_SIZE
|
|
CYDEV_USB_ARB_RW6_SIZE EQU 0x00000005
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW6_WA
|
|
CYREG_USB_ARB_RW6_WA EQU 0x400060d4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW6_WA_MSB
|
|
CYREG_USB_ARB_RW6_WA_MSB EQU 0x400060d5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW6_RA
|
|
CYREG_USB_ARB_RW6_RA EQU 0x400060d6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW6_RA_MSB
|
|
CYREG_USB_ARB_RW6_RA_MSB EQU 0x400060d7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW6_DR
|
|
CYREG_USB_ARB_RW6_DR EQU 0x400060d8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_EP7_BASE
|
|
CYDEV_USB_ARB_EP7_BASE EQU 0x400060e0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_EP7_SIZE
|
|
CYDEV_USB_ARB_EP7_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_EP7_CFG
|
|
CYREG_USB_ARB_EP7_CFG EQU 0x400060e0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_EP7_INT_EN
|
|
CYREG_USB_ARB_EP7_INT_EN EQU 0x400060e1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_EP7_SR
|
|
CYREG_USB_ARB_EP7_SR EQU 0x400060e2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_RW7_BASE
|
|
CYDEV_USB_ARB_RW7_BASE EQU 0x400060e4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_RW7_SIZE
|
|
CYDEV_USB_ARB_RW7_SIZE EQU 0x00000005
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW7_WA
|
|
CYREG_USB_ARB_RW7_WA EQU 0x400060e4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW7_WA_MSB
|
|
CYREG_USB_ARB_RW7_WA_MSB EQU 0x400060e5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW7_RA
|
|
CYREG_USB_ARB_RW7_RA EQU 0x400060e6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW7_RA_MSB
|
|
CYREG_USB_ARB_RW7_RA_MSB EQU 0x400060e7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW7_DR
|
|
CYREG_USB_ARB_RW7_DR EQU 0x400060e8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_EP8_BASE
|
|
CYDEV_USB_ARB_EP8_BASE EQU 0x400060f0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_EP8_SIZE
|
|
CYDEV_USB_ARB_EP8_SIZE EQU 0x00000003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_EP8_CFG
|
|
CYREG_USB_ARB_EP8_CFG EQU 0x400060f0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_EP8_INT_EN
|
|
CYREG_USB_ARB_EP8_INT_EN EQU 0x400060f1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_EP8_SR
|
|
CYREG_USB_ARB_EP8_SR EQU 0x400060f2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_RW8_BASE
|
|
CYDEV_USB_ARB_RW8_BASE EQU 0x400060f4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_ARB_RW8_SIZE
|
|
CYDEV_USB_ARB_RW8_SIZE EQU 0x00000005
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW8_WA
|
|
CYREG_USB_ARB_RW8_WA EQU 0x400060f4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW8_WA_MSB
|
|
CYREG_USB_ARB_RW8_WA_MSB EQU 0x400060f5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW8_RA
|
|
CYREG_USB_ARB_RW8_RA EQU 0x400060f6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW8_RA_MSB
|
|
CYREG_USB_ARB_RW8_RA_MSB EQU 0x400060f7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_ARB_RW8_DR
|
|
CYREG_USB_ARB_RW8_DR EQU 0x400060f8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_MEM_BASE
|
|
CYDEV_USB_MEM_BASE EQU 0x40006100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_USB_MEM_SIZE
|
|
CYDEV_USB_MEM_SIZE EQU 0x00000200
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_MEM_DATA_MBASE
|
|
CYREG_USB_MEM_DATA_MBASE EQU 0x40006100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_USB_MEM_DATA_MSIZE
|
|
CYREG_USB_MEM_DATA_MSIZE EQU 0x00000200
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UWRK_BASE
|
|
CYDEV_UWRK_BASE EQU 0x40006400
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UWRK_SIZE
|
|
CYDEV_UWRK_SIZE EQU 0x00000b60
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UWRK_UWRK8_BASE
|
|
CYDEV_UWRK_UWRK8_BASE EQU 0x40006400
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UWRK_UWRK8_SIZE
|
|
CYDEV_UWRK_UWRK8_SIZE EQU 0x000003b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_BASE
|
|
CYDEV_UWRK_UWRK8_B0_BASE EQU 0x40006400
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_SIZE
|
|
CYDEV_UWRK_UWRK8_B0_SIZE EQU 0x000000b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_A0
|
|
CYREG_B0_UDB00_A0 EQU 0x40006400
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_A0
|
|
CYREG_B0_UDB01_A0 EQU 0x40006401
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_A0
|
|
CYREG_B0_UDB02_A0 EQU 0x40006402
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_A0
|
|
CYREG_B0_UDB03_A0 EQU 0x40006403
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_A0
|
|
CYREG_B0_UDB04_A0 EQU 0x40006404
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_A0
|
|
CYREG_B0_UDB05_A0 EQU 0x40006405
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_A0
|
|
CYREG_B0_UDB06_A0 EQU 0x40006406
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_A0
|
|
CYREG_B0_UDB07_A0 EQU 0x40006407
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_A0
|
|
CYREG_B0_UDB08_A0 EQU 0x40006408
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_A0
|
|
CYREG_B0_UDB09_A0 EQU 0x40006409
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_A0
|
|
CYREG_B0_UDB10_A0 EQU 0x4000640a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_A0
|
|
CYREG_B0_UDB11_A0 EQU 0x4000640b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_A0
|
|
CYREG_B0_UDB12_A0 EQU 0x4000640c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_A0
|
|
CYREG_B0_UDB13_A0 EQU 0x4000640d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_A0
|
|
CYREG_B0_UDB14_A0 EQU 0x4000640e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB15_A0
|
|
CYREG_B0_UDB15_A0 EQU 0x4000640f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_A1
|
|
CYREG_B0_UDB00_A1 EQU 0x40006410
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_A1
|
|
CYREG_B0_UDB01_A1 EQU 0x40006411
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_A1
|
|
CYREG_B0_UDB02_A1 EQU 0x40006412
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_A1
|
|
CYREG_B0_UDB03_A1 EQU 0x40006413
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_A1
|
|
CYREG_B0_UDB04_A1 EQU 0x40006414
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_A1
|
|
CYREG_B0_UDB05_A1 EQU 0x40006415
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_A1
|
|
CYREG_B0_UDB06_A1 EQU 0x40006416
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_A1
|
|
CYREG_B0_UDB07_A1 EQU 0x40006417
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_A1
|
|
CYREG_B0_UDB08_A1 EQU 0x40006418
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_A1
|
|
CYREG_B0_UDB09_A1 EQU 0x40006419
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_A1
|
|
CYREG_B0_UDB10_A1 EQU 0x4000641a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_A1
|
|
CYREG_B0_UDB11_A1 EQU 0x4000641b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_A1
|
|
CYREG_B0_UDB12_A1 EQU 0x4000641c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_A1
|
|
CYREG_B0_UDB13_A1 EQU 0x4000641d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_A1
|
|
CYREG_B0_UDB14_A1 EQU 0x4000641e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB15_A1
|
|
CYREG_B0_UDB15_A1 EQU 0x4000641f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_D0
|
|
CYREG_B0_UDB00_D0 EQU 0x40006420
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_D0
|
|
CYREG_B0_UDB01_D0 EQU 0x40006421
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_D0
|
|
CYREG_B0_UDB02_D0 EQU 0x40006422
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_D0
|
|
CYREG_B0_UDB03_D0 EQU 0x40006423
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_D0
|
|
CYREG_B0_UDB04_D0 EQU 0x40006424
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_D0
|
|
CYREG_B0_UDB05_D0 EQU 0x40006425
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_D0
|
|
CYREG_B0_UDB06_D0 EQU 0x40006426
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_D0
|
|
CYREG_B0_UDB07_D0 EQU 0x40006427
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_D0
|
|
CYREG_B0_UDB08_D0 EQU 0x40006428
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_D0
|
|
CYREG_B0_UDB09_D0 EQU 0x40006429
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_D0
|
|
CYREG_B0_UDB10_D0 EQU 0x4000642a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_D0
|
|
CYREG_B0_UDB11_D0 EQU 0x4000642b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_D0
|
|
CYREG_B0_UDB12_D0 EQU 0x4000642c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_D0
|
|
CYREG_B0_UDB13_D0 EQU 0x4000642d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_D0
|
|
CYREG_B0_UDB14_D0 EQU 0x4000642e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB15_D0
|
|
CYREG_B0_UDB15_D0 EQU 0x4000642f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_D1
|
|
CYREG_B0_UDB00_D1 EQU 0x40006430
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_D1
|
|
CYREG_B0_UDB01_D1 EQU 0x40006431
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_D1
|
|
CYREG_B0_UDB02_D1 EQU 0x40006432
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_D1
|
|
CYREG_B0_UDB03_D1 EQU 0x40006433
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_D1
|
|
CYREG_B0_UDB04_D1 EQU 0x40006434
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_D1
|
|
CYREG_B0_UDB05_D1 EQU 0x40006435
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_D1
|
|
CYREG_B0_UDB06_D1 EQU 0x40006436
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_D1
|
|
CYREG_B0_UDB07_D1 EQU 0x40006437
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_D1
|
|
CYREG_B0_UDB08_D1 EQU 0x40006438
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_D1
|
|
CYREG_B0_UDB09_D1 EQU 0x40006439
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_D1
|
|
CYREG_B0_UDB10_D1 EQU 0x4000643a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_D1
|
|
CYREG_B0_UDB11_D1 EQU 0x4000643b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_D1
|
|
CYREG_B0_UDB12_D1 EQU 0x4000643c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_D1
|
|
CYREG_B0_UDB13_D1 EQU 0x4000643d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_D1
|
|
CYREG_B0_UDB14_D1 EQU 0x4000643e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB15_D1
|
|
CYREG_B0_UDB15_D1 EQU 0x4000643f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_F0
|
|
CYREG_B0_UDB00_F0 EQU 0x40006440
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_F0
|
|
CYREG_B0_UDB01_F0 EQU 0x40006441
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_F0
|
|
CYREG_B0_UDB02_F0 EQU 0x40006442
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_F0
|
|
CYREG_B0_UDB03_F0 EQU 0x40006443
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_F0
|
|
CYREG_B0_UDB04_F0 EQU 0x40006444
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_F0
|
|
CYREG_B0_UDB05_F0 EQU 0x40006445
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_F0
|
|
CYREG_B0_UDB06_F0 EQU 0x40006446
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_F0
|
|
CYREG_B0_UDB07_F0 EQU 0x40006447
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_F0
|
|
CYREG_B0_UDB08_F0 EQU 0x40006448
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_F0
|
|
CYREG_B0_UDB09_F0 EQU 0x40006449
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_F0
|
|
CYREG_B0_UDB10_F0 EQU 0x4000644a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_F0
|
|
CYREG_B0_UDB11_F0 EQU 0x4000644b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_F0
|
|
CYREG_B0_UDB12_F0 EQU 0x4000644c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_F0
|
|
CYREG_B0_UDB13_F0 EQU 0x4000644d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_F0
|
|
CYREG_B0_UDB14_F0 EQU 0x4000644e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB15_F0
|
|
CYREG_B0_UDB15_F0 EQU 0x4000644f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_F1
|
|
CYREG_B0_UDB00_F1 EQU 0x40006450
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_F1
|
|
CYREG_B0_UDB01_F1 EQU 0x40006451
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_F1
|
|
CYREG_B0_UDB02_F1 EQU 0x40006452
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_F1
|
|
CYREG_B0_UDB03_F1 EQU 0x40006453
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_F1
|
|
CYREG_B0_UDB04_F1 EQU 0x40006454
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_F1
|
|
CYREG_B0_UDB05_F1 EQU 0x40006455
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_F1
|
|
CYREG_B0_UDB06_F1 EQU 0x40006456
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_F1
|
|
CYREG_B0_UDB07_F1 EQU 0x40006457
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_F1
|
|
CYREG_B0_UDB08_F1 EQU 0x40006458
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_F1
|
|
CYREG_B0_UDB09_F1 EQU 0x40006459
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_F1
|
|
CYREG_B0_UDB10_F1 EQU 0x4000645a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_F1
|
|
CYREG_B0_UDB11_F1 EQU 0x4000645b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_F1
|
|
CYREG_B0_UDB12_F1 EQU 0x4000645c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_F1
|
|
CYREG_B0_UDB13_F1 EQU 0x4000645d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_F1
|
|
CYREG_B0_UDB14_F1 EQU 0x4000645e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB15_F1
|
|
CYREG_B0_UDB15_F1 EQU 0x4000645f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_ST
|
|
CYREG_B0_UDB00_ST EQU 0x40006460
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_ST
|
|
CYREG_B0_UDB01_ST EQU 0x40006461
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_ST
|
|
CYREG_B0_UDB02_ST EQU 0x40006462
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_ST
|
|
CYREG_B0_UDB03_ST EQU 0x40006463
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_ST
|
|
CYREG_B0_UDB04_ST EQU 0x40006464
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_ST
|
|
CYREG_B0_UDB05_ST EQU 0x40006465
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_ST
|
|
CYREG_B0_UDB06_ST EQU 0x40006466
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_ST
|
|
CYREG_B0_UDB07_ST EQU 0x40006467
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_ST
|
|
CYREG_B0_UDB08_ST EQU 0x40006468
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_ST
|
|
CYREG_B0_UDB09_ST EQU 0x40006469
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_ST
|
|
CYREG_B0_UDB10_ST EQU 0x4000646a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_ST
|
|
CYREG_B0_UDB11_ST EQU 0x4000646b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_ST
|
|
CYREG_B0_UDB12_ST EQU 0x4000646c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_ST
|
|
CYREG_B0_UDB13_ST EQU 0x4000646d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_ST
|
|
CYREG_B0_UDB14_ST EQU 0x4000646e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB15_ST
|
|
CYREG_B0_UDB15_ST EQU 0x4000646f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_CTL
|
|
CYREG_B0_UDB00_CTL EQU 0x40006470
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_CTL
|
|
CYREG_B0_UDB01_CTL EQU 0x40006471
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_CTL
|
|
CYREG_B0_UDB02_CTL EQU 0x40006472
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_CTL
|
|
CYREG_B0_UDB03_CTL EQU 0x40006473
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_CTL
|
|
CYREG_B0_UDB04_CTL EQU 0x40006474
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_CTL
|
|
CYREG_B0_UDB05_CTL EQU 0x40006475
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_CTL
|
|
CYREG_B0_UDB06_CTL EQU 0x40006476
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_CTL
|
|
CYREG_B0_UDB07_CTL EQU 0x40006477
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_CTL
|
|
CYREG_B0_UDB08_CTL EQU 0x40006478
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_CTL
|
|
CYREG_B0_UDB09_CTL EQU 0x40006479
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_CTL
|
|
CYREG_B0_UDB10_CTL EQU 0x4000647a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_CTL
|
|
CYREG_B0_UDB11_CTL EQU 0x4000647b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_CTL
|
|
CYREG_B0_UDB12_CTL EQU 0x4000647c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_CTL
|
|
CYREG_B0_UDB13_CTL EQU 0x4000647d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_CTL
|
|
CYREG_B0_UDB14_CTL EQU 0x4000647e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB15_CTL
|
|
CYREG_B0_UDB15_CTL EQU 0x4000647f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_MSK
|
|
CYREG_B0_UDB00_MSK EQU 0x40006480
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_MSK
|
|
CYREG_B0_UDB01_MSK EQU 0x40006481
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_MSK
|
|
CYREG_B0_UDB02_MSK EQU 0x40006482
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_MSK
|
|
CYREG_B0_UDB03_MSK EQU 0x40006483
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_MSK
|
|
CYREG_B0_UDB04_MSK EQU 0x40006484
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_MSK
|
|
CYREG_B0_UDB05_MSK EQU 0x40006485
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_MSK
|
|
CYREG_B0_UDB06_MSK EQU 0x40006486
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_MSK
|
|
CYREG_B0_UDB07_MSK EQU 0x40006487
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_MSK
|
|
CYREG_B0_UDB08_MSK EQU 0x40006488
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_MSK
|
|
CYREG_B0_UDB09_MSK EQU 0x40006489
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_MSK
|
|
CYREG_B0_UDB10_MSK EQU 0x4000648a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_MSK
|
|
CYREG_B0_UDB11_MSK EQU 0x4000648b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_MSK
|
|
CYREG_B0_UDB12_MSK EQU 0x4000648c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_MSK
|
|
CYREG_B0_UDB13_MSK EQU 0x4000648d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_MSK
|
|
CYREG_B0_UDB14_MSK EQU 0x4000648e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB15_MSK
|
|
CYREG_B0_UDB15_MSK EQU 0x4000648f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_ACTL
|
|
CYREG_B0_UDB00_ACTL EQU 0x40006490
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_ACTL
|
|
CYREG_B0_UDB01_ACTL EQU 0x40006491
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_ACTL
|
|
CYREG_B0_UDB02_ACTL EQU 0x40006492
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_ACTL
|
|
CYREG_B0_UDB03_ACTL EQU 0x40006493
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_ACTL
|
|
CYREG_B0_UDB04_ACTL EQU 0x40006494
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_ACTL
|
|
CYREG_B0_UDB05_ACTL EQU 0x40006495
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_ACTL
|
|
CYREG_B0_UDB06_ACTL EQU 0x40006496
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_ACTL
|
|
CYREG_B0_UDB07_ACTL EQU 0x40006497
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_ACTL
|
|
CYREG_B0_UDB08_ACTL EQU 0x40006498
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_ACTL
|
|
CYREG_B0_UDB09_ACTL EQU 0x40006499
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_ACTL
|
|
CYREG_B0_UDB10_ACTL EQU 0x4000649a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_ACTL
|
|
CYREG_B0_UDB11_ACTL EQU 0x4000649b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_ACTL
|
|
CYREG_B0_UDB12_ACTL EQU 0x4000649c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_ACTL
|
|
CYREG_B0_UDB13_ACTL EQU 0x4000649d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_ACTL
|
|
CYREG_B0_UDB14_ACTL EQU 0x4000649e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB15_ACTL
|
|
CYREG_B0_UDB15_ACTL EQU 0x4000649f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_MC
|
|
CYREG_B0_UDB00_MC EQU 0x400064a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_MC
|
|
CYREG_B0_UDB01_MC EQU 0x400064a1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_MC
|
|
CYREG_B0_UDB02_MC EQU 0x400064a2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_MC
|
|
CYREG_B0_UDB03_MC EQU 0x400064a3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_MC
|
|
CYREG_B0_UDB04_MC EQU 0x400064a4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_MC
|
|
CYREG_B0_UDB05_MC EQU 0x400064a5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_MC
|
|
CYREG_B0_UDB06_MC EQU 0x400064a6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_MC
|
|
CYREG_B0_UDB07_MC EQU 0x400064a7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_MC
|
|
CYREG_B0_UDB08_MC EQU 0x400064a8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_MC
|
|
CYREG_B0_UDB09_MC EQU 0x400064a9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_MC
|
|
CYREG_B0_UDB10_MC EQU 0x400064aa
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_MC
|
|
CYREG_B0_UDB11_MC EQU 0x400064ab
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_MC
|
|
CYREG_B0_UDB12_MC EQU 0x400064ac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_MC
|
|
CYREG_B0_UDB13_MC EQU 0x400064ad
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_MC
|
|
CYREG_B0_UDB14_MC EQU 0x400064ae
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB15_MC
|
|
CYREG_B0_UDB15_MC EQU 0x400064af
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_BASE
|
|
CYDEV_UWRK_UWRK8_B1_BASE EQU 0x40006500
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_SIZE
|
|
CYDEV_UWRK_UWRK8_B1_SIZE EQU 0x000000b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_A0
|
|
CYREG_B1_UDB04_A0 EQU 0x40006504
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_A0
|
|
CYREG_B1_UDB05_A0 EQU 0x40006505
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_A0
|
|
CYREG_B1_UDB06_A0 EQU 0x40006506
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_A0
|
|
CYREG_B1_UDB07_A0 EQU 0x40006507
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_A0
|
|
CYREG_B1_UDB08_A0 EQU 0x40006508
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_A0
|
|
CYREG_B1_UDB09_A0 EQU 0x40006509
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_A0
|
|
CYREG_B1_UDB10_A0 EQU 0x4000650a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_A0
|
|
CYREG_B1_UDB11_A0 EQU 0x4000650b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_A1
|
|
CYREG_B1_UDB04_A1 EQU 0x40006514
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_A1
|
|
CYREG_B1_UDB05_A1 EQU 0x40006515
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_A1
|
|
CYREG_B1_UDB06_A1 EQU 0x40006516
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_A1
|
|
CYREG_B1_UDB07_A1 EQU 0x40006517
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_A1
|
|
CYREG_B1_UDB08_A1 EQU 0x40006518
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_A1
|
|
CYREG_B1_UDB09_A1 EQU 0x40006519
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_A1
|
|
CYREG_B1_UDB10_A1 EQU 0x4000651a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_A1
|
|
CYREG_B1_UDB11_A1 EQU 0x4000651b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_D0
|
|
CYREG_B1_UDB04_D0 EQU 0x40006524
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_D0
|
|
CYREG_B1_UDB05_D0 EQU 0x40006525
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_D0
|
|
CYREG_B1_UDB06_D0 EQU 0x40006526
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_D0
|
|
CYREG_B1_UDB07_D0 EQU 0x40006527
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_D0
|
|
CYREG_B1_UDB08_D0 EQU 0x40006528
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_D0
|
|
CYREG_B1_UDB09_D0 EQU 0x40006529
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_D0
|
|
CYREG_B1_UDB10_D0 EQU 0x4000652a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_D0
|
|
CYREG_B1_UDB11_D0 EQU 0x4000652b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_D1
|
|
CYREG_B1_UDB04_D1 EQU 0x40006534
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_D1
|
|
CYREG_B1_UDB05_D1 EQU 0x40006535
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_D1
|
|
CYREG_B1_UDB06_D1 EQU 0x40006536
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_D1
|
|
CYREG_B1_UDB07_D1 EQU 0x40006537
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_D1
|
|
CYREG_B1_UDB08_D1 EQU 0x40006538
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_D1
|
|
CYREG_B1_UDB09_D1 EQU 0x40006539
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_D1
|
|
CYREG_B1_UDB10_D1 EQU 0x4000653a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_D1
|
|
CYREG_B1_UDB11_D1 EQU 0x4000653b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_F0
|
|
CYREG_B1_UDB04_F0 EQU 0x40006544
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_F0
|
|
CYREG_B1_UDB05_F0 EQU 0x40006545
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_F0
|
|
CYREG_B1_UDB06_F0 EQU 0x40006546
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_F0
|
|
CYREG_B1_UDB07_F0 EQU 0x40006547
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_F0
|
|
CYREG_B1_UDB08_F0 EQU 0x40006548
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_F0
|
|
CYREG_B1_UDB09_F0 EQU 0x40006549
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_F0
|
|
CYREG_B1_UDB10_F0 EQU 0x4000654a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_F0
|
|
CYREG_B1_UDB11_F0 EQU 0x4000654b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_F1
|
|
CYREG_B1_UDB04_F1 EQU 0x40006554
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_F1
|
|
CYREG_B1_UDB05_F1 EQU 0x40006555
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_F1
|
|
CYREG_B1_UDB06_F1 EQU 0x40006556
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_F1
|
|
CYREG_B1_UDB07_F1 EQU 0x40006557
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_F1
|
|
CYREG_B1_UDB08_F1 EQU 0x40006558
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_F1
|
|
CYREG_B1_UDB09_F1 EQU 0x40006559
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_F1
|
|
CYREG_B1_UDB10_F1 EQU 0x4000655a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_F1
|
|
CYREG_B1_UDB11_F1 EQU 0x4000655b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_ST
|
|
CYREG_B1_UDB04_ST EQU 0x40006564
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_ST
|
|
CYREG_B1_UDB05_ST EQU 0x40006565
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_ST
|
|
CYREG_B1_UDB06_ST EQU 0x40006566
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_ST
|
|
CYREG_B1_UDB07_ST EQU 0x40006567
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_ST
|
|
CYREG_B1_UDB08_ST EQU 0x40006568
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_ST
|
|
CYREG_B1_UDB09_ST EQU 0x40006569
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_ST
|
|
CYREG_B1_UDB10_ST EQU 0x4000656a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_ST
|
|
CYREG_B1_UDB11_ST EQU 0x4000656b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_CTL
|
|
CYREG_B1_UDB04_CTL EQU 0x40006574
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_CTL
|
|
CYREG_B1_UDB05_CTL EQU 0x40006575
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_CTL
|
|
CYREG_B1_UDB06_CTL EQU 0x40006576
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_CTL
|
|
CYREG_B1_UDB07_CTL EQU 0x40006577
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_CTL
|
|
CYREG_B1_UDB08_CTL EQU 0x40006578
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_CTL
|
|
CYREG_B1_UDB09_CTL EQU 0x40006579
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_CTL
|
|
CYREG_B1_UDB10_CTL EQU 0x4000657a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_CTL
|
|
CYREG_B1_UDB11_CTL EQU 0x4000657b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_MSK
|
|
CYREG_B1_UDB04_MSK EQU 0x40006584
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_MSK
|
|
CYREG_B1_UDB05_MSK EQU 0x40006585
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_MSK
|
|
CYREG_B1_UDB06_MSK EQU 0x40006586
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_MSK
|
|
CYREG_B1_UDB07_MSK EQU 0x40006587
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_MSK
|
|
CYREG_B1_UDB08_MSK EQU 0x40006588
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_MSK
|
|
CYREG_B1_UDB09_MSK EQU 0x40006589
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_MSK
|
|
CYREG_B1_UDB10_MSK EQU 0x4000658a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_MSK
|
|
CYREG_B1_UDB11_MSK EQU 0x4000658b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_ACTL
|
|
CYREG_B1_UDB04_ACTL EQU 0x40006594
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_ACTL
|
|
CYREG_B1_UDB05_ACTL EQU 0x40006595
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_ACTL
|
|
CYREG_B1_UDB06_ACTL EQU 0x40006596
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_ACTL
|
|
CYREG_B1_UDB07_ACTL EQU 0x40006597
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_ACTL
|
|
CYREG_B1_UDB08_ACTL EQU 0x40006598
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_ACTL
|
|
CYREG_B1_UDB09_ACTL EQU 0x40006599
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_ACTL
|
|
CYREG_B1_UDB10_ACTL EQU 0x4000659a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_ACTL
|
|
CYREG_B1_UDB11_ACTL EQU 0x4000659b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_MC
|
|
CYREG_B1_UDB04_MC EQU 0x400065a4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_MC
|
|
CYREG_B1_UDB05_MC EQU 0x400065a5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_MC
|
|
CYREG_B1_UDB06_MC EQU 0x400065a6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_MC
|
|
CYREG_B1_UDB07_MC EQU 0x400065a7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_MC
|
|
CYREG_B1_UDB08_MC EQU 0x400065a8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_MC
|
|
CYREG_B1_UDB09_MC EQU 0x400065a9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_MC
|
|
CYREG_B1_UDB10_MC EQU 0x400065aa
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_MC
|
|
CYREG_B1_UDB11_MC EQU 0x400065ab
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UWRK_UWRK16_BASE
|
|
CYDEV_UWRK_UWRK16_BASE EQU 0x40006800
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UWRK_UWRK16_SIZE
|
|
CYDEV_UWRK_UWRK16_SIZE EQU 0x00000760
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_BASE
|
|
CYDEV_UWRK_UWRK16_CAT_BASE EQU 0x40006800
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_SIZE
|
|
CYDEV_UWRK_UWRK16_CAT_SIZE EQU 0x00000760
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_BASE
|
|
CYDEV_UWRK_UWRK16_CAT_B0_BASE EQU 0x40006800
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_SIZE
|
|
CYDEV_UWRK_UWRK16_CAT_B0_SIZE EQU 0x00000160
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_A0_A1
|
|
CYREG_B0_UDB00_A0_A1 EQU 0x40006800
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_A0_A1
|
|
CYREG_B0_UDB01_A0_A1 EQU 0x40006802
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_A0_A1
|
|
CYREG_B0_UDB02_A0_A1 EQU 0x40006804
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_A0_A1
|
|
CYREG_B0_UDB03_A0_A1 EQU 0x40006806
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_A0_A1
|
|
CYREG_B0_UDB04_A0_A1 EQU 0x40006808
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_A0_A1
|
|
CYREG_B0_UDB05_A0_A1 EQU 0x4000680a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_A0_A1
|
|
CYREG_B0_UDB06_A0_A1 EQU 0x4000680c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_A0_A1
|
|
CYREG_B0_UDB07_A0_A1 EQU 0x4000680e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_A0_A1
|
|
CYREG_B0_UDB08_A0_A1 EQU 0x40006810
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_A0_A1
|
|
CYREG_B0_UDB09_A0_A1 EQU 0x40006812
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_A0_A1
|
|
CYREG_B0_UDB10_A0_A1 EQU 0x40006814
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_A0_A1
|
|
CYREG_B0_UDB11_A0_A1 EQU 0x40006816
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_A0_A1
|
|
CYREG_B0_UDB12_A0_A1 EQU 0x40006818
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_A0_A1
|
|
CYREG_B0_UDB13_A0_A1 EQU 0x4000681a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_A0_A1
|
|
CYREG_B0_UDB14_A0_A1 EQU 0x4000681c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB15_A0_A1
|
|
CYREG_B0_UDB15_A0_A1 EQU 0x4000681e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_D0_D1
|
|
CYREG_B0_UDB00_D0_D1 EQU 0x40006840
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_D0_D1
|
|
CYREG_B0_UDB01_D0_D1 EQU 0x40006842
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_D0_D1
|
|
CYREG_B0_UDB02_D0_D1 EQU 0x40006844
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_D0_D1
|
|
CYREG_B0_UDB03_D0_D1 EQU 0x40006846
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_D0_D1
|
|
CYREG_B0_UDB04_D0_D1 EQU 0x40006848
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_D0_D1
|
|
CYREG_B0_UDB05_D0_D1 EQU 0x4000684a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_D0_D1
|
|
CYREG_B0_UDB06_D0_D1 EQU 0x4000684c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_D0_D1
|
|
CYREG_B0_UDB07_D0_D1 EQU 0x4000684e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_D0_D1
|
|
CYREG_B0_UDB08_D0_D1 EQU 0x40006850
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_D0_D1
|
|
CYREG_B0_UDB09_D0_D1 EQU 0x40006852
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_D0_D1
|
|
CYREG_B0_UDB10_D0_D1 EQU 0x40006854
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_D0_D1
|
|
CYREG_B0_UDB11_D0_D1 EQU 0x40006856
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_D0_D1
|
|
CYREG_B0_UDB12_D0_D1 EQU 0x40006858
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_D0_D1
|
|
CYREG_B0_UDB13_D0_D1 EQU 0x4000685a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_D0_D1
|
|
CYREG_B0_UDB14_D0_D1 EQU 0x4000685c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB15_D0_D1
|
|
CYREG_B0_UDB15_D0_D1 EQU 0x4000685e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_F0_F1
|
|
CYREG_B0_UDB00_F0_F1 EQU 0x40006880
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_F0_F1
|
|
CYREG_B0_UDB01_F0_F1 EQU 0x40006882
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_F0_F1
|
|
CYREG_B0_UDB02_F0_F1 EQU 0x40006884
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_F0_F1
|
|
CYREG_B0_UDB03_F0_F1 EQU 0x40006886
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_F0_F1
|
|
CYREG_B0_UDB04_F0_F1 EQU 0x40006888
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_F0_F1
|
|
CYREG_B0_UDB05_F0_F1 EQU 0x4000688a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_F0_F1
|
|
CYREG_B0_UDB06_F0_F1 EQU 0x4000688c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_F0_F1
|
|
CYREG_B0_UDB07_F0_F1 EQU 0x4000688e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_F0_F1
|
|
CYREG_B0_UDB08_F0_F1 EQU 0x40006890
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_F0_F1
|
|
CYREG_B0_UDB09_F0_F1 EQU 0x40006892
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_F0_F1
|
|
CYREG_B0_UDB10_F0_F1 EQU 0x40006894
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_F0_F1
|
|
CYREG_B0_UDB11_F0_F1 EQU 0x40006896
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_F0_F1
|
|
CYREG_B0_UDB12_F0_F1 EQU 0x40006898
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_F0_F1
|
|
CYREG_B0_UDB13_F0_F1 EQU 0x4000689a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_F0_F1
|
|
CYREG_B0_UDB14_F0_F1 EQU 0x4000689c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB15_F0_F1
|
|
CYREG_B0_UDB15_F0_F1 EQU 0x4000689e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_ST_CTL
|
|
CYREG_B0_UDB00_ST_CTL EQU 0x400068c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_ST_CTL
|
|
CYREG_B0_UDB01_ST_CTL EQU 0x400068c2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_ST_CTL
|
|
CYREG_B0_UDB02_ST_CTL EQU 0x400068c4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_ST_CTL
|
|
CYREG_B0_UDB03_ST_CTL EQU 0x400068c6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_ST_CTL
|
|
CYREG_B0_UDB04_ST_CTL EQU 0x400068c8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_ST_CTL
|
|
CYREG_B0_UDB05_ST_CTL EQU 0x400068ca
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_ST_CTL
|
|
CYREG_B0_UDB06_ST_CTL EQU 0x400068cc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_ST_CTL
|
|
CYREG_B0_UDB07_ST_CTL EQU 0x400068ce
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_ST_CTL
|
|
CYREG_B0_UDB08_ST_CTL EQU 0x400068d0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_ST_CTL
|
|
CYREG_B0_UDB09_ST_CTL EQU 0x400068d2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_ST_CTL
|
|
CYREG_B0_UDB10_ST_CTL EQU 0x400068d4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_ST_CTL
|
|
CYREG_B0_UDB11_ST_CTL EQU 0x400068d6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_ST_CTL
|
|
CYREG_B0_UDB12_ST_CTL EQU 0x400068d8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_ST_CTL
|
|
CYREG_B0_UDB13_ST_CTL EQU 0x400068da
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_ST_CTL
|
|
CYREG_B0_UDB14_ST_CTL EQU 0x400068dc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB15_ST_CTL
|
|
CYREG_B0_UDB15_ST_CTL EQU 0x400068de
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_MSK_ACTL
|
|
CYREG_B0_UDB00_MSK_ACTL EQU 0x40006900
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_MSK_ACTL
|
|
CYREG_B0_UDB01_MSK_ACTL EQU 0x40006902
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_MSK_ACTL
|
|
CYREG_B0_UDB02_MSK_ACTL EQU 0x40006904
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_MSK_ACTL
|
|
CYREG_B0_UDB03_MSK_ACTL EQU 0x40006906
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_MSK_ACTL
|
|
CYREG_B0_UDB04_MSK_ACTL EQU 0x40006908
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_MSK_ACTL
|
|
CYREG_B0_UDB05_MSK_ACTL EQU 0x4000690a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_MSK_ACTL
|
|
CYREG_B0_UDB06_MSK_ACTL EQU 0x4000690c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_MSK_ACTL
|
|
CYREG_B0_UDB07_MSK_ACTL EQU 0x4000690e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_MSK_ACTL
|
|
CYREG_B0_UDB08_MSK_ACTL EQU 0x40006910
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_MSK_ACTL
|
|
CYREG_B0_UDB09_MSK_ACTL EQU 0x40006912
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_MSK_ACTL
|
|
CYREG_B0_UDB10_MSK_ACTL EQU 0x40006914
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_MSK_ACTL
|
|
CYREG_B0_UDB11_MSK_ACTL EQU 0x40006916
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_MSK_ACTL
|
|
CYREG_B0_UDB12_MSK_ACTL EQU 0x40006918
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_MSK_ACTL
|
|
CYREG_B0_UDB13_MSK_ACTL EQU 0x4000691a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_MSK_ACTL
|
|
CYREG_B0_UDB14_MSK_ACTL EQU 0x4000691c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB15_MSK_ACTL
|
|
CYREG_B0_UDB15_MSK_ACTL EQU 0x4000691e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_MC_00
|
|
CYREG_B0_UDB00_MC_00 EQU 0x40006940
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_MC_00
|
|
CYREG_B0_UDB01_MC_00 EQU 0x40006942
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_MC_00
|
|
CYREG_B0_UDB02_MC_00 EQU 0x40006944
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_MC_00
|
|
CYREG_B0_UDB03_MC_00 EQU 0x40006946
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_MC_00
|
|
CYREG_B0_UDB04_MC_00 EQU 0x40006948
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_MC_00
|
|
CYREG_B0_UDB05_MC_00 EQU 0x4000694a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_MC_00
|
|
CYREG_B0_UDB06_MC_00 EQU 0x4000694c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_MC_00
|
|
CYREG_B0_UDB07_MC_00 EQU 0x4000694e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_MC_00
|
|
CYREG_B0_UDB08_MC_00 EQU 0x40006950
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_MC_00
|
|
CYREG_B0_UDB09_MC_00 EQU 0x40006952
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_MC_00
|
|
CYREG_B0_UDB10_MC_00 EQU 0x40006954
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_MC_00
|
|
CYREG_B0_UDB11_MC_00 EQU 0x40006956
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_MC_00
|
|
CYREG_B0_UDB12_MC_00 EQU 0x40006958
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_MC_00
|
|
CYREG_B0_UDB13_MC_00 EQU 0x4000695a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_MC_00
|
|
CYREG_B0_UDB14_MC_00 EQU 0x4000695c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB15_MC_00
|
|
CYREG_B0_UDB15_MC_00 EQU 0x4000695e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_BASE
|
|
CYDEV_UWRK_UWRK16_CAT_B1_BASE EQU 0x40006a00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_SIZE
|
|
CYDEV_UWRK_UWRK16_CAT_B1_SIZE EQU 0x00000160
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_A0_A1
|
|
CYREG_B1_UDB04_A0_A1 EQU 0x40006a08
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_A0_A1
|
|
CYREG_B1_UDB05_A0_A1 EQU 0x40006a0a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_A0_A1
|
|
CYREG_B1_UDB06_A0_A1 EQU 0x40006a0c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_A0_A1
|
|
CYREG_B1_UDB07_A0_A1 EQU 0x40006a0e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_A0_A1
|
|
CYREG_B1_UDB08_A0_A1 EQU 0x40006a10
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_A0_A1
|
|
CYREG_B1_UDB09_A0_A1 EQU 0x40006a12
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_A0_A1
|
|
CYREG_B1_UDB10_A0_A1 EQU 0x40006a14
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_A0_A1
|
|
CYREG_B1_UDB11_A0_A1 EQU 0x40006a16
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_D0_D1
|
|
CYREG_B1_UDB04_D0_D1 EQU 0x40006a48
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_D0_D1
|
|
CYREG_B1_UDB05_D0_D1 EQU 0x40006a4a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_D0_D1
|
|
CYREG_B1_UDB06_D0_D1 EQU 0x40006a4c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_D0_D1
|
|
CYREG_B1_UDB07_D0_D1 EQU 0x40006a4e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_D0_D1
|
|
CYREG_B1_UDB08_D0_D1 EQU 0x40006a50
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_D0_D1
|
|
CYREG_B1_UDB09_D0_D1 EQU 0x40006a52
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_D0_D1
|
|
CYREG_B1_UDB10_D0_D1 EQU 0x40006a54
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_D0_D1
|
|
CYREG_B1_UDB11_D0_D1 EQU 0x40006a56
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_F0_F1
|
|
CYREG_B1_UDB04_F0_F1 EQU 0x40006a88
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_F0_F1
|
|
CYREG_B1_UDB05_F0_F1 EQU 0x40006a8a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_F0_F1
|
|
CYREG_B1_UDB06_F0_F1 EQU 0x40006a8c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_F0_F1
|
|
CYREG_B1_UDB07_F0_F1 EQU 0x40006a8e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_F0_F1
|
|
CYREG_B1_UDB08_F0_F1 EQU 0x40006a90
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_F0_F1
|
|
CYREG_B1_UDB09_F0_F1 EQU 0x40006a92
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_F0_F1
|
|
CYREG_B1_UDB10_F0_F1 EQU 0x40006a94
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_F0_F1
|
|
CYREG_B1_UDB11_F0_F1 EQU 0x40006a96
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_ST_CTL
|
|
CYREG_B1_UDB04_ST_CTL EQU 0x40006ac8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_ST_CTL
|
|
CYREG_B1_UDB05_ST_CTL EQU 0x40006aca
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_ST_CTL
|
|
CYREG_B1_UDB06_ST_CTL EQU 0x40006acc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_ST_CTL
|
|
CYREG_B1_UDB07_ST_CTL EQU 0x40006ace
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_ST_CTL
|
|
CYREG_B1_UDB08_ST_CTL EQU 0x40006ad0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_ST_CTL
|
|
CYREG_B1_UDB09_ST_CTL EQU 0x40006ad2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_ST_CTL
|
|
CYREG_B1_UDB10_ST_CTL EQU 0x40006ad4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_ST_CTL
|
|
CYREG_B1_UDB11_ST_CTL EQU 0x40006ad6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_MSK_ACTL
|
|
CYREG_B1_UDB04_MSK_ACTL EQU 0x40006b08
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_MSK_ACTL
|
|
CYREG_B1_UDB05_MSK_ACTL EQU 0x40006b0a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_MSK_ACTL
|
|
CYREG_B1_UDB06_MSK_ACTL EQU 0x40006b0c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_MSK_ACTL
|
|
CYREG_B1_UDB07_MSK_ACTL EQU 0x40006b0e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_MSK_ACTL
|
|
CYREG_B1_UDB08_MSK_ACTL EQU 0x40006b10
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_MSK_ACTL
|
|
CYREG_B1_UDB09_MSK_ACTL EQU 0x40006b12
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_MSK_ACTL
|
|
CYREG_B1_UDB10_MSK_ACTL EQU 0x40006b14
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_MSK_ACTL
|
|
CYREG_B1_UDB11_MSK_ACTL EQU 0x40006b16
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_MC_00
|
|
CYREG_B1_UDB04_MC_00 EQU 0x40006b48
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_MC_00
|
|
CYREG_B1_UDB05_MC_00 EQU 0x40006b4a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_MC_00
|
|
CYREG_B1_UDB06_MC_00 EQU 0x40006b4c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_MC_00
|
|
CYREG_B1_UDB07_MC_00 EQU 0x40006b4e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_MC_00
|
|
CYREG_B1_UDB08_MC_00 EQU 0x40006b50
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_MC_00
|
|
CYREG_B1_UDB09_MC_00 EQU 0x40006b52
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_MC_00
|
|
CYREG_B1_UDB10_MC_00 EQU 0x40006b54
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_MC_00
|
|
CYREG_B1_UDB11_MC_00 EQU 0x40006b56
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_BASE
|
|
CYDEV_UWRK_UWRK16_DEF_BASE EQU 0x40006800
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_SIZE
|
|
CYDEV_UWRK_UWRK16_DEF_SIZE EQU 0x0000075e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_BASE
|
|
CYDEV_UWRK_UWRK16_DEF_B0_BASE EQU 0x40006800
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_SIZE
|
|
CYDEV_UWRK_UWRK16_DEF_B0_SIZE EQU 0x0000015e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_01_A0
|
|
CYREG_B0_UDB00_01_A0 EQU 0x40006800
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_02_A0
|
|
CYREG_B0_UDB01_02_A0 EQU 0x40006802
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_03_A0
|
|
CYREG_B0_UDB02_03_A0 EQU 0x40006804
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_04_A0
|
|
CYREG_B0_UDB03_04_A0 EQU 0x40006806
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_05_A0
|
|
CYREG_B0_UDB04_05_A0 EQU 0x40006808
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_06_A0
|
|
CYREG_B0_UDB05_06_A0 EQU 0x4000680a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_07_A0
|
|
CYREG_B0_UDB06_07_A0 EQU 0x4000680c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_08_A0
|
|
CYREG_B0_UDB07_08_A0 EQU 0x4000680e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_09_A0
|
|
CYREG_B0_UDB08_09_A0 EQU 0x40006810
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_10_A0
|
|
CYREG_B0_UDB09_10_A0 EQU 0x40006812
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_11_A0
|
|
CYREG_B0_UDB10_11_A0 EQU 0x40006814
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_12_A0
|
|
CYREG_B0_UDB11_12_A0 EQU 0x40006816
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_13_A0
|
|
CYREG_B0_UDB12_13_A0 EQU 0x40006818
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_14_A0
|
|
CYREG_B0_UDB13_14_A0 EQU 0x4000681a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_15_A0
|
|
CYREG_B0_UDB14_15_A0 EQU 0x4000681c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_01_A1
|
|
CYREG_B0_UDB00_01_A1 EQU 0x40006820
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_02_A1
|
|
CYREG_B0_UDB01_02_A1 EQU 0x40006822
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_03_A1
|
|
CYREG_B0_UDB02_03_A1 EQU 0x40006824
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_04_A1
|
|
CYREG_B0_UDB03_04_A1 EQU 0x40006826
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_05_A1
|
|
CYREG_B0_UDB04_05_A1 EQU 0x40006828
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_06_A1
|
|
CYREG_B0_UDB05_06_A1 EQU 0x4000682a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_07_A1
|
|
CYREG_B0_UDB06_07_A1 EQU 0x4000682c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_08_A1
|
|
CYREG_B0_UDB07_08_A1 EQU 0x4000682e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_09_A1
|
|
CYREG_B0_UDB08_09_A1 EQU 0x40006830
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_10_A1
|
|
CYREG_B0_UDB09_10_A1 EQU 0x40006832
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_11_A1
|
|
CYREG_B0_UDB10_11_A1 EQU 0x40006834
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_12_A1
|
|
CYREG_B0_UDB11_12_A1 EQU 0x40006836
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_13_A1
|
|
CYREG_B0_UDB12_13_A1 EQU 0x40006838
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_14_A1
|
|
CYREG_B0_UDB13_14_A1 EQU 0x4000683a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_15_A1
|
|
CYREG_B0_UDB14_15_A1 EQU 0x4000683c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_01_D0
|
|
CYREG_B0_UDB00_01_D0 EQU 0x40006840
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_02_D0
|
|
CYREG_B0_UDB01_02_D0 EQU 0x40006842
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_03_D0
|
|
CYREG_B0_UDB02_03_D0 EQU 0x40006844
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_04_D0
|
|
CYREG_B0_UDB03_04_D0 EQU 0x40006846
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_05_D0
|
|
CYREG_B0_UDB04_05_D0 EQU 0x40006848
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_06_D0
|
|
CYREG_B0_UDB05_06_D0 EQU 0x4000684a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_07_D0
|
|
CYREG_B0_UDB06_07_D0 EQU 0x4000684c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_08_D0
|
|
CYREG_B0_UDB07_08_D0 EQU 0x4000684e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_09_D0
|
|
CYREG_B0_UDB08_09_D0 EQU 0x40006850
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_10_D0
|
|
CYREG_B0_UDB09_10_D0 EQU 0x40006852
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_11_D0
|
|
CYREG_B0_UDB10_11_D0 EQU 0x40006854
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_12_D0
|
|
CYREG_B0_UDB11_12_D0 EQU 0x40006856
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_13_D0
|
|
CYREG_B0_UDB12_13_D0 EQU 0x40006858
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_14_D0
|
|
CYREG_B0_UDB13_14_D0 EQU 0x4000685a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_15_D0
|
|
CYREG_B0_UDB14_15_D0 EQU 0x4000685c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_01_D1
|
|
CYREG_B0_UDB00_01_D1 EQU 0x40006860
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_02_D1
|
|
CYREG_B0_UDB01_02_D1 EQU 0x40006862
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_03_D1
|
|
CYREG_B0_UDB02_03_D1 EQU 0x40006864
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_04_D1
|
|
CYREG_B0_UDB03_04_D1 EQU 0x40006866
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_05_D1
|
|
CYREG_B0_UDB04_05_D1 EQU 0x40006868
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_06_D1
|
|
CYREG_B0_UDB05_06_D1 EQU 0x4000686a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_07_D1
|
|
CYREG_B0_UDB06_07_D1 EQU 0x4000686c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_08_D1
|
|
CYREG_B0_UDB07_08_D1 EQU 0x4000686e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_09_D1
|
|
CYREG_B0_UDB08_09_D1 EQU 0x40006870
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_10_D1
|
|
CYREG_B0_UDB09_10_D1 EQU 0x40006872
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_11_D1
|
|
CYREG_B0_UDB10_11_D1 EQU 0x40006874
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_12_D1
|
|
CYREG_B0_UDB11_12_D1 EQU 0x40006876
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_13_D1
|
|
CYREG_B0_UDB12_13_D1 EQU 0x40006878
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_14_D1
|
|
CYREG_B0_UDB13_14_D1 EQU 0x4000687a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_15_D1
|
|
CYREG_B0_UDB14_15_D1 EQU 0x4000687c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_01_F0
|
|
CYREG_B0_UDB00_01_F0 EQU 0x40006880
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_02_F0
|
|
CYREG_B0_UDB01_02_F0 EQU 0x40006882
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_03_F0
|
|
CYREG_B0_UDB02_03_F0 EQU 0x40006884
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_04_F0
|
|
CYREG_B0_UDB03_04_F0 EQU 0x40006886
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_05_F0
|
|
CYREG_B0_UDB04_05_F0 EQU 0x40006888
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_06_F0
|
|
CYREG_B0_UDB05_06_F0 EQU 0x4000688a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_07_F0
|
|
CYREG_B0_UDB06_07_F0 EQU 0x4000688c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_08_F0
|
|
CYREG_B0_UDB07_08_F0 EQU 0x4000688e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_09_F0
|
|
CYREG_B0_UDB08_09_F0 EQU 0x40006890
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_10_F0
|
|
CYREG_B0_UDB09_10_F0 EQU 0x40006892
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_11_F0
|
|
CYREG_B0_UDB10_11_F0 EQU 0x40006894
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_12_F0
|
|
CYREG_B0_UDB11_12_F0 EQU 0x40006896
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_13_F0
|
|
CYREG_B0_UDB12_13_F0 EQU 0x40006898
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_14_F0
|
|
CYREG_B0_UDB13_14_F0 EQU 0x4000689a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_15_F0
|
|
CYREG_B0_UDB14_15_F0 EQU 0x4000689c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_01_F1
|
|
CYREG_B0_UDB00_01_F1 EQU 0x400068a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_02_F1
|
|
CYREG_B0_UDB01_02_F1 EQU 0x400068a2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_03_F1
|
|
CYREG_B0_UDB02_03_F1 EQU 0x400068a4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_04_F1
|
|
CYREG_B0_UDB03_04_F1 EQU 0x400068a6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_05_F1
|
|
CYREG_B0_UDB04_05_F1 EQU 0x400068a8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_06_F1
|
|
CYREG_B0_UDB05_06_F1 EQU 0x400068aa
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_07_F1
|
|
CYREG_B0_UDB06_07_F1 EQU 0x400068ac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_08_F1
|
|
CYREG_B0_UDB07_08_F1 EQU 0x400068ae
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_09_F1
|
|
CYREG_B0_UDB08_09_F1 EQU 0x400068b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_10_F1
|
|
CYREG_B0_UDB09_10_F1 EQU 0x400068b2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_11_F1
|
|
CYREG_B0_UDB10_11_F1 EQU 0x400068b4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_12_F1
|
|
CYREG_B0_UDB11_12_F1 EQU 0x400068b6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_13_F1
|
|
CYREG_B0_UDB12_13_F1 EQU 0x400068b8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_14_F1
|
|
CYREG_B0_UDB13_14_F1 EQU 0x400068ba
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_15_F1
|
|
CYREG_B0_UDB14_15_F1 EQU 0x400068bc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_01_ST
|
|
CYREG_B0_UDB00_01_ST EQU 0x400068c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_02_ST
|
|
CYREG_B0_UDB01_02_ST EQU 0x400068c2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_03_ST
|
|
CYREG_B0_UDB02_03_ST EQU 0x400068c4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_04_ST
|
|
CYREG_B0_UDB03_04_ST EQU 0x400068c6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_05_ST
|
|
CYREG_B0_UDB04_05_ST EQU 0x400068c8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_06_ST
|
|
CYREG_B0_UDB05_06_ST EQU 0x400068ca
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_07_ST
|
|
CYREG_B0_UDB06_07_ST EQU 0x400068cc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_08_ST
|
|
CYREG_B0_UDB07_08_ST EQU 0x400068ce
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_09_ST
|
|
CYREG_B0_UDB08_09_ST EQU 0x400068d0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_10_ST
|
|
CYREG_B0_UDB09_10_ST EQU 0x400068d2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_11_ST
|
|
CYREG_B0_UDB10_11_ST EQU 0x400068d4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_12_ST
|
|
CYREG_B0_UDB11_12_ST EQU 0x400068d6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_13_ST
|
|
CYREG_B0_UDB12_13_ST EQU 0x400068d8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_14_ST
|
|
CYREG_B0_UDB13_14_ST EQU 0x400068da
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_15_ST
|
|
CYREG_B0_UDB14_15_ST EQU 0x400068dc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_01_CTL
|
|
CYREG_B0_UDB00_01_CTL EQU 0x400068e0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_02_CTL
|
|
CYREG_B0_UDB01_02_CTL EQU 0x400068e2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_03_CTL
|
|
CYREG_B0_UDB02_03_CTL EQU 0x400068e4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_04_CTL
|
|
CYREG_B0_UDB03_04_CTL EQU 0x400068e6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_05_CTL
|
|
CYREG_B0_UDB04_05_CTL EQU 0x400068e8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_06_CTL
|
|
CYREG_B0_UDB05_06_CTL EQU 0x400068ea
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_07_CTL
|
|
CYREG_B0_UDB06_07_CTL EQU 0x400068ec
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_08_CTL
|
|
CYREG_B0_UDB07_08_CTL EQU 0x400068ee
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_09_CTL
|
|
CYREG_B0_UDB08_09_CTL EQU 0x400068f0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_10_CTL
|
|
CYREG_B0_UDB09_10_CTL EQU 0x400068f2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_11_CTL
|
|
CYREG_B0_UDB10_11_CTL EQU 0x400068f4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_12_CTL
|
|
CYREG_B0_UDB11_12_CTL EQU 0x400068f6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_13_CTL
|
|
CYREG_B0_UDB12_13_CTL EQU 0x400068f8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_14_CTL
|
|
CYREG_B0_UDB13_14_CTL EQU 0x400068fa
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_15_CTL
|
|
CYREG_B0_UDB14_15_CTL EQU 0x400068fc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_01_MSK
|
|
CYREG_B0_UDB00_01_MSK EQU 0x40006900
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_02_MSK
|
|
CYREG_B0_UDB01_02_MSK EQU 0x40006902
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_03_MSK
|
|
CYREG_B0_UDB02_03_MSK EQU 0x40006904
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_04_MSK
|
|
CYREG_B0_UDB03_04_MSK EQU 0x40006906
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_05_MSK
|
|
CYREG_B0_UDB04_05_MSK EQU 0x40006908
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_06_MSK
|
|
CYREG_B0_UDB05_06_MSK EQU 0x4000690a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_07_MSK
|
|
CYREG_B0_UDB06_07_MSK EQU 0x4000690c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_08_MSK
|
|
CYREG_B0_UDB07_08_MSK EQU 0x4000690e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_09_MSK
|
|
CYREG_B0_UDB08_09_MSK EQU 0x40006910
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_10_MSK
|
|
CYREG_B0_UDB09_10_MSK EQU 0x40006912
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_11_MSK
|
|
CYREG_B0_UDB10_11_MSK EQU 0x40006914
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_12_MSK
|
|
CYREG_B0_UDB11_12_MSK EQU 0x40006916
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_13_MSK
|
|
CYREG_B0_UDB12_13_MSK EQU 0x40006918
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_14_MSK
|
|
CYREG_B0_UDB13_14_MSK EQU 0x4000691a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_15_MSK
|
|
CYREG_B0_UDB14_15_MSK EQU 0x4000691c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_01_ACTL
|
|
CYREG_B0_UDB00_01_ACTL EQU 0x40006920
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_02_ACTL
|
|
CYREG_B0_UDB01_02_ACTL EQU 0x40006922
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_03_ACTL
|
|
CYREG_B0_UDB02_03_ACTL EQU 0x40006924
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_04_ACTL
|
|
CYREG_B0_UDB03_04_ACTL EQU 0x40006926
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_05_ACTL
|
|
CYREG_B0_UDB04_05_ACTL EQU 0x40006928
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_06_ACTL
|
|
CYREG_B0_UDB05_06_ACTL EQU 0x4000692a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_07_ACTL
|
|
CYREG_B0_UDB06_07_ACTL EQU 0x4000692c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_08_ACTL
|
|
CYREG_B0_UDB07_08_ACTL EQU 0x4000692e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_09_ACTL
|
|
CYREG_B0_UDB08_09_ACTL EQU 0x40006930
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_10_ACTL
|
|
CYREG_B0_UDB09_10_ACTL EQU 0x40006932
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_11_ACTL
|
|
CYREG_B0_UDB10_11_ACTL EQU 0x40006934
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_12_ACTL
|
|
CYREG_B0_UDB11_12_ACTL EQU 0x40006936
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_13_ACTL
|
|
CYREG_B0_UDB12_13_ACTL EQU 0x40006938
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_14_ACTL
|
|
CYREG_B0_UDB13_14_ACTL EQU 0x4000693a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_15_ACTL
|
|
CYREG_B0_UDB14_15_ACTL EQU 0x4000693c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB00_01_MC
|
|
CYREG_B0_UDB00_01_MC EQU 0x40006940
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB01_02_MC
|
|
CYREG_B0_UDB01_02_MC EQU 0x40006942
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB02_03_MC
|
|
CYREG_B0_UDB02_03_MC EQU 0x40006944
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB03_04_MC
|
|
CYREG_B0_UDB03_04_MC EQU 0x40006946
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB04_05_MC
|
|
CYREG_B0_UDB04_05_MC EQU 0x40006948
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB05_06_MC
|
|
CYREG_B0_UDB05_06_MC EQU 0x4000694a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB06_07_MC
|
|
CYREG_B0_UDB06_07_MC EQU 0x4000694c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB07_08_MC
|
|
CYREG_B0_UDB07_08_MC EQU 0x4000694e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB08_09_MC
|
|
CYREG_B0_UDB08_09_MC EQU 0x40006950
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB09_10_MC
|
|
CYREG_B0_UDB09_10_MC EQU 0x40006952
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB10_11_MC
|
|
CYREG_B0_UDB10_11_MC EQU 0x40006954
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB11_12_MC
|
|
CYREG_B0_UDB11_12_MC EQU 0x40006956
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB12_13_MC
|
|
CYREG_B0_UDB12_13_MC EQU 0x40006958
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB13_14_MC
|
|
CYREG_B0_UDB13_14_MC EQU 0x4000695a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_UDB14_15_MC
|
|
CYREG_B0_UDB14_15_MC EQU 0x4000695c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_BASE
|
|
CYDEV_UWRK_UWRK16_DEF_B1_BASE EQU 0x40006a00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_SIZE
|
|
CYDEV_UWRK_UWRK16_DEF_B1_SIZE EQU 0x0000015e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_05_A0
|
|
CYREG_B1_UDB04_05_A0 EQU 0x40006a08
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_06_A0
|
|
CYREG_B1_UDB05_06_A0 EQU 0x40006a0a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_07_A0
|
|
CYREG_B1_UDB06_07_A0 EQU 0x40006a0c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_08_A0
|
|
CYREG_B1_UDB07_08_A0 EQU 0x40006a0e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_09_A0
|
|
CYREG_B1_UDB08_09_A0 EQU 0x40006a10
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_10_A0
|
|
CYREG_B1_UDB09_10_A0 EQU 0x40006a12
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_11_A0
|
|
CYREG_B1_UDB10_11_A0 EQU 0x40006a14
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_12_A0
|
|
CYREG_B1_UDB11_12_A0 EQU 0x40006a16
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_05_A1
|
|
CYREG_B1_UDB04_05_A1 EQU 0x40006a28
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_06_A1
|
|
CYREG_B1_UDB05_06_A1 EQU 0x40006a2a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_07_A1
|
|
CYREG_B1_UDB06_07_A1 EQU 0x40006a2c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_08_A1
|
|
CYREG_B1_UDB07_08_A1 EQU 0x40006a2e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_09_A1
|
|
CYREG_B1_UDB08_09_A1 EQU 0x40006a30
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_10_A1
|
|
CYREG_B1_UDB09_10_A1 EQU 0x40006a32
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_11_A1
|
|
CYREG_B1_UDB10_11_A1 EQU 0x40006a34
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_12_A1
|
|
CYREG_B1_UDB11_12_A1 EQU 0x40006a36
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_05_D0
|
|
CYREG_B1_UDB04_05_D0 EQU 0x40006a48
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_06_D0
|
|
CYREG_B1_UDB05_06_D0 EQU 0x40006a4a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_07_D0
|
|
CYREG_B1_UDB06_07_D0 EQU 0x40006a4c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_08_D0
|
|
CYREG_B1_UDB07_08_D0 EQU 0x40006a4e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_09_D0
|
|
CYREG_B1_UDB08_09_D0 EQU 0x40006a50
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_10_D0
|
|
CYREG_B1_UDB09_10_D0 EQU 0x40006a52
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_11_D0
|
|
CYREG_B1_UDB10_11_D0 EQU 0x40006a54
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_12_D0
|
|
CYREG_B1_UDB11_12_D0 EQU 0x40006a56
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_05_D1
|
|
CYREG_B1_UDB04_05_D1 EQU 0x40006a68
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_06_D1
|
|
CYREG_B1_UDB05_06_D1 EQU 0x40006a6a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_07_D1
|
|
CYREG_B1_UDB06_07_D1 EQU 0x40006a6c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_08_D1
|
|
CYREG_B1_UDB07_08_D1 EQU 0x40006a6e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_09_D1
|
|
CYREG_B1_UDB08_09_D1 EQU 0x40006a70
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_10_D1
|
|
CYREG_B1_UDB09_10_D1 EQU 0x40006a72
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_11_D1
|
|
CYREG_B1_UDB10_11_D1 EQU 0x40006a74
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_12_D1
|
|
CYREG_B1_UDB11_12_D1 EQU 0x40006a76
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_05_F0
|
|
CYREG_B1_UDB04_05_F0 EQU 0x40006a88
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_06_F0
|
|
CYREG_B1_UDB05_06_F0 EQU 0x40006a8a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_07_F0
|
|
CYREG_B1_UDB06_07_F0 EQU 0x40006a8c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_08_F0
|
|
CYREG_B1_UDB07_08_F0 EQU 0x40006a8e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_09_F0
|
|
CYREG_B1_UDB08_09_F0 EQU 0x40006a90
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_10_F0
|
|
CYREG_B1_UDB09_10_F0 EQU 0x40006a92
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_11_F0
|
|
CYREG_B1_UDB10_11_F0 EQU 0x40006a94
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_12_F0
|
|
CYREG_B1_UDB11_12_F0 EQU 0x40006a96
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_05_F1
|
|
CYREG_B1_UDB04_05_F1 EQU 0x40006aa8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_06_F1
|
|
CYREG_B1_UDB05_06_F1 EQU 0x40006aaa
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_07_F1
|
|
CYREG_B1_UDB06_07_F1 EQU 0x40006aac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_08_F1
|
|
CYREG_B1_UDB07_08_F1 EQU 0x40006aae
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_09_F1
|
|
CYREG_B1_UDB08_09_F1 EQU 0x40006ab0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_10_F1
|
|
CYREG_B1_UDB09_10_F1 EQU 0x40006ab2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_11_F1
|
|
CYREG_B1_UDB10_11_F1 EQU 0x40006ab4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_12_F1
|
|
CYREG_B1_UDB11_12_F1 EQU 0x40006ab6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_05_ST
|
|
CYREG_B1_UDB04_05_ST EQU 0x40006ac8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_06_ST
|
|
CYREG_B1_UDB05_06_ST EQU 0x40006aca
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_07_ST
|
|
CYREG_B1_UDB06_07_ST EQU 0x40006acc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_08_ST
|
|
CYREG_B1_UDB07_08_ST EQU 0x40006ace
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_09_ST
|
|
CYREG_B1_UDB08_09_ST EQU 0x40006ad0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_10_ST
|
|
CYREG_B1_UDB09_10_ST EQU 0x40006ad2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_11_ST
|
|
CYREG_B1_UDB10_11_ST EQU 0x40006ad4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_12_ST
|
|
CYREG_B1_UDB11_12_ST EQU 0x40006ad6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_05_CTL
|
|
CYREG_B1_UDB04_05_CTL EQU 0x40006ae8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_06_CTL
|
|
CYREG_B1_UDB05_06_CTL EQU 0x40006aea
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_07_CTL
|
|
CYREG_B1_UDB06_07_CTL EQU 0x40006aec
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_08_CTL
|
|
CYREG_B1_UDB07_08_CTL EQU 0x40006aee
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_09_CTL
|
|
CYREG_B1_UDB08_09_CTL EQU 0x40006af0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_10_CTL
|
|
CYREG_B1_UDB09_10_CTL EQU 0x40006af2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_11_CTL
|
|
CYREG_B1_UDB10_11_CTL EQU 0x40006af4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_12_CTL
|
|
CYREG_B1_UDB11_12_CTL EQU 0x40006af6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_05_MSK
|
|
CYREG_B1_UDB04_05_MSK EQU 0x40006b08
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_06_MSK
|
|
CYREG_B1_UDB05_06_MSK EQU 0x40006b0a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_07_MSK
|
|
CYREG_B1_UDB06_07_MSK EQU 0x40006b0c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_08_MSK
|
|
CYREG_B1_UDB07_08_MSK EQU 0x40006b0e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_09_MSK
|
|
CYREG_B1_UDB08_09_MSK EQU 0x40006b10
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_10_MSK
|
|
CYREG_B1_UDB09_10_MSK EQU 0x40006b12
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_11_MSK
|
|
CYREG_B1_UDB10_11_MSK EQU 0x40006b14
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_12_MSK
|
|
CYREG_B1_UDB11_12_MSK EQU 0x40006b16
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_05_ACTL
|
|
CYREG_B1_UDB04_05_ACTL EQU 0x40006b28
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_06_ACTL
|
|
CYREG_B1_UDB05_06_ACTL EQU 0x40006b2a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_07_ACTL
|
|
CYREG_B1_UDB06_07_ACTL EQU 0x40006b2c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_08_ACTL
|
|
CYREG_B1_UDB07_08_ACTL EQU 0x40006b2e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_09_ACTL
|
|
CYREG_B1_UDB08_09_ACTL EQU 0x40006b30
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_10_ACTL
|
|
CYREG_B1_UDB09_10_ACTL EQU 0x40006b32
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_11_ACTL
|
|
CYREG_B1_UDB10_11_ACTL EQU 0x40006b34
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_12_ACTL
|
|
CYREG_B1_UDB11_12_ACTL EQU 0x40006b36
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB04_05_MC
|
|
CYREG_B1_UDB04_05_MC EQU 0x40006b48
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB05_06_MC
|
|
CYREG_B1_UDB05_06_MC EQU 0x40006b4a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB06_07_MC
|
|
CYREG_B1_UDB06_07_MC EQU 0x40006b4c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB07_08_MC
|
|
CYREG_B1_UDB07_08_MC EQU 0x40006b4e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB08_09_MC
|
|
CYREG_B1_UDB08_09_MC EQU 0x40006b50
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB09_10_MC
|
|
CYREG_B1_UDB09_10_MC EQU 0x40006b52
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB10_11_MC
|
|
CYREG_B1_UDB10_11_MC EQU 0x40006b54
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_UDB11_12_MC
|
|
CYREG_B1_UDB11_12_MC EQU 0x40006b56
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_BASE
|
|
CYDEV_PHUB_BASE EQU 0x40007000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_SIZE
|
|
CYDEV_PHUB_SIZE EQU 0x00000c00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFG
|
|
CYREG_PHUB_CFG EQU 0x40007000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_ERR
|
|
CYREG_PHUB_ERR EQU 0x40007004
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_ERR_ADR
|
|
CYREG_PHUB_ERR_ADR EQU 0x40007008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH0_BASE
|
|
CYDEV_PHUB_CH0_BASE EQU 0x40007010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH0_SIZE
|
|
CYDEV_PHUB_CH0_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH0_BASIC_CFG
|
|
CYREG_PHUB_CH0_BASIC_CFG EQU 0x40007010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH0_ACTION
|
|
CYREG_PHUB_CH0_ACTION EQU 0x40007014
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH0_BASIC_STATUS
|
|
CYREG_PHUB_CH0_BASIC_STATUS EQU 0x40007018
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH1_BASE
|
|
CYDEV_PHUB_CH1_BASE EQU 0x40007020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH1_SIZE
|
|
CYDEV_PHUB_CH1_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH1_BASIC_CFG
|
|
CYREG_PHUB_CH1_BASIC_CFG EQU 0x40007020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH1_ACTION
|
|
CYREG_PHUB_CH1_ACTION EQU 0x40007024
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH1_BASIC_STATUS
|
|
CYREG_PHUB_CH1_BASIC_STATUS EQU 0x40007028
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH2_BASE
|
|
CYDEV_PHUB_CH2_BASE EQU 0x40007030
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH2_SIZE
|
|
CYDEV_PHUB_CH2_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH2_BASIC_CFG
|
|
CYREG_PHUB_CH2_BASIC_CFG EQU 0x40007030
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH2_ACTION
|
|
CYREG_PHUB_CH2_ACTION EQU 0x40007034
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH2_BASIC_STATUS
|
|
CYREG_PHUB_CH2_BASIC_STATUS EQU 0x40007038
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH3_BASE
|
|
CYDEV_PHUB_CH3_BASE EQU 0x40007040
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH3_SIZE
|
|
CYDEV_PHUB_CH3_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH3_BASIC_CFG
|
|
CYREG_PHUB_CH3_BASIC_CFG EQU 0x40007040
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH3_ACTION
|
|
CYREG_PHUB_CH3_ACTION EQU 0x40007044
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH3_BASIC_STATUS
|
|
CYREG_PHUB_CH3_BASIC_STATUS EQU 0x40007048
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH4_BASE
|
|
CYDEV_PHUB_CH4_BASE EQU 0x40007050
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH4_SIZE
|
|
CYDEV_PHUB_CH4_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH4_BASIC_CFG
|
|
CYREG_PHUB_CH4_BASIC_CFG EQU 0x40007050
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH4_ACTION
|
|
CYREG_PHUB_CH4_ACTION EQU 0x40007054
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH4_BASIC_STATUS
|
|
CYREG_PHUB_CH4_BASIC_STATUS EQU 0x40007058
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH5_BASE
|
|
CYDEV_PHUB_CH5_BASE EQU 0x40007060
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH5_SIZE
|
|
CYDEV_PHUB_CH5_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH5_BASIC_CFG
|
|
CYREG_PHUB_CH5_BASIC_CFG EQU 0x40007060
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH5_ACTION
|
|
CYREG_PHUB_CH5_ACTION EQU 0x40007064
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH5_BASIC_STATUS
|
|
CYREG_PHUB_CH5_BASIC_STATUS EQU 0x40007068
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH6_BASE
|
|
CYDEV_PHUB_CH6_BASE EQU 0x40007070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH6_SIZE
|
|
CYDEV_PHUB_CH6_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH6_BASIC_CFG
|
|
CYREG_PHUB_CH6_BASIC_CFG EQU 0x40007070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH6_ACTION
|
|
CYREG_PHUB_CH6_ACTION EQU 0x40007074
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH6_BASIC_STATUS
|
|
CYREG_PHUB_CH6_BASIC_STATUS EQU 0x40007078
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH7_BASE
|
|
CYDEV_PHUB_CH7_BASE EQU 0x40007080
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH7_SIZE
|
|
CYDEV_PHUB_CH7_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH7_BASIC_CFG
|
|
CYREG_PHUB_CH7_BASIC_CFG EQU 0x40007080
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH7_ACTION
|
|
CYREG_PHUB_CH7_ACTION EQU 0x40007084
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH7_BASIC_STATUS
|
|
CYREG_PHUB_CH7_BASIC_STATUS EQU 0x40007088
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH8_BASE
|
|
CYDEV_PHUB_CH8_BASE EQU 0x40007090
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH8_SIZE
|
|
CYDEV_PHUB_CH8_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH8_BASIC_CFG
|
|
CYREG_PHUB_CH8_BASIC_CFG EQU 0x40007090
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH8_ACTION
|
|
CYREG_PHUB_CH8_ACTION EQU 0x40007094
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH8_BASIC_STATUS
|
|
CYREG_PHUB_CH8_BASIC_STATUS EQU 0x40007098
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH9_BASE
|
|
CYDEV_PHUB_CH9_BASE EQU 0x400070a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH9_SIZE
|
|
CYDEV_PHUB_CH9_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH9_BASIC_CFG
|
|
CYREG_PHUB_CH9_BASIC_CFG EQU 0x400070a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH9_ACTION
|
|
CYREG_PHUB_CH9_ACTION EQU 0x400070a4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH9_BASIC_STATUS
|
|
CYREG_PHUB_CH9_BASIC_STATUS EQU 0x400070a8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH10_BASE
|
|
CYDEV_PHUB_CH10_BASE EQU 0x400070b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH10_SIZE
|
|
CYDEV_PHUB_CH10_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH10_BASIC_CFG
|
|
CYREG_PHUB_CH10_BASIC_CFG EQU 0x400070b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH10_ACTION
|
|
CYREG_PHUB_CH10_ACTION EQU 0x400070b4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH10_BASIC_STATUS
|
|
CYREG_PHUB_CH10_BASIC_STATUS EQU 0x400070b8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH11_BASE
|
|
CYDEV_PHUB_CH11_BASE EQU 0x400070c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH11_SIZE
|
|
CYDEV_PHUB_CH11_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH11_BASIC_CFG
|
|
CYREG_PHUB_CH11_BASIC_CFG EQU 0x400070c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH11_ACTION
|
|
CYREG_PHUB_CH11_ACTION EQU 0x400070c4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH11_BASIC_STATUS
|
|
CYREG_PHUB_CH11_BASIC_STATUS EQU 0x400070c8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH12_BASE
|
|
CYDEV_PHUB_CH12_BASE EQU 0x400070d0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH12_SIZE
|
|
CYDEV_PHUB_CH12_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH12_BASIC_CFG
|
|
CYREG_PHUB_CH12_BASIC_CFG EQU 0x400070d0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH12_ACTION
|
|
CYREG_PHUB_CH12_ACTION EQU 0x400070d4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH12_BASIC_STATUS
|
|
CYREG_PHUB_CH12_BASIC_STATUS EQU 0x400070d8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH13_BASE
|
|
CYDEV_PHUB_CH13_BASE EQU 0x400070e0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH13_SIZE
|
|
CYDEV_PHUB_CH13_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH13_BASIC_CFG
|
|
CYREG_PHUB_CH13_BASIC_CFG EQU 0x400070e0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH13_ACTION
|
|
CYREG_PHUB_CH13_ACTION EQU 0x400070e4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH13_BASIC_STATUS
|
|
CYREG_PHUB_CH13_BASIC_STATUS EQU 0x400070e8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH14_BASE
|
|
CYDEV_PHUB_CH14_BASE EQU 0x400070f0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH14_SIZE
|
|
CYDEV_PHUB_CH14_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH14_BASIC_CFG
|
|
CYREG_PHUB_CH14_BASIC_CFG EQU 0x400070f0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH14_ACTION
|
|
CYREG_PHUB_CH14_ACTION EQU 0x400070f4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH14_BASIC_STATUS
|
|
CYREG_PHUB_CH14_BASIC_STATUS EQU 0x400070f8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH15_BASE
|
|
CYDEV_PHUB_CH15_BASE EQU 0x40007100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH15_SIZE
|
|
CYDEV_PHUB_CH15_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH15_BASIC_CFG
|
|
CYREG_PHUB_CH15_BASIC_CFG EQU 0x40007100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH15_ACTION
|
|
CYREG_PHUB_CH15_ACTION EQU 0x40007104
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH15_BASIC_STATUS
|
|
CYREG_PHUB_CH15_BASIC_STATUS EQU 0x40007108
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH16_BASE
|
|
CYDEV_PHUB_CH16_BASE EQU 0x40007110
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH16_SIZE
|
|
CYDEV_PHUB_CH16_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH16_BASIC_CFG
|
|
CYREG_PHUB_CH16_BASIC_CFG EQU 0x40007110
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH16_ACTION
|
|
CYREG_PHUB_CH16_ACTION EQU 0x40007114
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH16_BASIC_STATUS
|
|
CYREG_PHUB_CH16_BASIC_STATUS EQU 0x40007118
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH17_BASE
|
|
CYDEV_PHUB_CH17_BASE EQU 0x40007120
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH17_SIZE
|
|
CYDEV_PHUB_CH17_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH17_BASIC_CFG
|
|
CYREG_PHUB_CH17_BASIC_CFG EQU 0x40007120
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH17_ACTION
|
|
CYREG_PHUB_CH17_ACTION EQU 0x40007124
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH17_BASIC_STATUS
|
|
CYREG_PHUB_CH17_BASIC_STATUS EQU 0x40007128
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH18_BASE
|
|
CYDEV_PHUB_CH18_BASE EQU 0x40007130
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH18_SIZE
|
|
CYDEV_PHUB_CH18_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH18_BASIC_CFG
|
|
CYREG_PHUB_CH18_BASIC_CFG EQU 0x40007130
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH18_ACTION
|
|
CYREG_PHUB_CH18_ACTION EQU 0x40007134
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH18_BASIC_STATUS
|
|
CYREG_PHUB_CH18_BASIC_STATUS EQU 0x40007138
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH19_BASE
|
|
CYDEV_PHUB_CH19_BASE EQU 0x40007140
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH19_SIZE
|
|
CYDEV_PHUB_CH19_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH19_BASIC_CFG
|
|
CYREG_PHUB_CH19_BASIC_CFG EQU 0x40007140
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH19_ACTION
|
|
CYREG_PHUB_CH19_ACTION EQU 0x40007144
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH19_BASIC_STATUS
|
|
CYREG_PHUB_CH19_BASIC_STATUS EQU 0x40007148
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH20_BASE
|
|
CYDEV_PHUB_CH20_BASE EQU 0x40007150
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH20_SIZE
|
|
CYDEV_PHUB_CH20_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH20_BASIC_CFG
|
|
CYREG_PHUB_CH20_BASIC_CFG EQU 0x40007150
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH20_ACTION
|
|
CYREG_PHUB_CH20_ACTION EQU 0x40007154
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH20_BASIC_STATUS
|
|
CYREG_PHUB_CH20_BASIC_STATUS EQU 0x40007158
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH21_BASE
|
|
CYDEV_PHUB_CH21_BASE EQU 0x40007160
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH21_SIZE
|
|
CYDEV_PHUB_CH21_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH21_BASIC_CFG
|
|
CYREG_PHUB_CH21_BASIC_CFG EQU 0x40007160
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH21_ACTION
|
|
CYREG_PHUB_CH21_ACTION EQU 0x40007164
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH21_BASIC_STATUS
|
|
CYREG_PHUB_CH21_BASIC_STATUS EQU 0x40007168
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH22_BASE
|
|
CYDEV_PHUB_CH22_BASE EQU 0x40007170
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH22_SIZE
|
|
CYDEV_PHUB_CH22_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH22_BASIC_CFG
|
|
CYREG_PHUB_CH22_BASIC_CFG EQU 0x40007170
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH22_ACTION
|
|
CYREG_PHUB_CH22_ACTION EQU 0x40007174
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH22_BASIC_STATUS
|
|
CYREG_PHUB_CH22_BASIC_STATUS EQU 0x40007178
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH23_BASE
|
|
CYDEV_PHUB_CH23_BASE EQU 0x40007180
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CH23_SIZE
|
|
CYDEV_PHUB_CH23_SIZE EQU 0x0000000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH23_BASIC_CFG
|
|
CYREG_PHUB_CH23_BASIC_CFG EQU 0x40007180
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH23_ACTION
|
|
CYREG_PHUB_CH23_ACTION EQU 0x40007184
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CH23_BASIC_STATUS
|
|
CYREG_PHUB_CH23_BASIC_STATUS EQU 0x40007188
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM0_BASE
|
|
CYDEV_PHUB_CFGMEM0_BASE EQU 0x40007600
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM0_SIZE
|
|
CYDEV_PHUB_CFGMEM0_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM0_CFG0
|
|
CYREG_PHUB_CFGMEM0_CFG0 EQU 0x40007600
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM0_CFG1
|
|
CYREG_PHUB_CFGMEM0_CFG1 EQU 0x40007604
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM1_BASE
|
|
CYDEV_PHUB_CFGMEM1_BASE EQU 0x40007608
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM1_SIZE
|
|
CYDEV_PHUB_CFGMEM1_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM1_CFG0
|
|
CYREG_PHUB_CFGMEM1_CFG0 EQU 0x40007608
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM1_CFG1
|
|
CYREG_PHUB_CFGMEM1_CFG1 EQU 0x4000760c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM2_BASE
|
|
CYDEV_PHUB_CFGMEM2_BASE EQU 0x40007610
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM2_SIZE
|
|
CYDEV_PHUB_CFGMEM2_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM2_CFG0
|
|
CYREG_PHUB_CFGMEM2_CFG0 EQU 0x40007610
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM2_CFG1
|
|
CYREG_PHUB_CFGMEM2_CFG1 EQU 0x40007614
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM3_BASE
|
|
CYDEV_PHUB_CFGMEM3_BASE EQU 0x40007618
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM3_SIZE
|
|
CYDEV_PHUB_CFGMEM3_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM3_CFG0
|
|
CYREG_PHUB_CFGMEM3_CFG0 EQU 0x40007618
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM3_CFG1
|
|
CYREG_PHUB_CFGMEM3_CFG1 EQU 0x4000761c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM4_BASE
|
|
CYDEV_PHUB_CFGMEM4_BASE EQU 0x40007620
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM4_SIZE
|
|
CYDEV_PHUB_CFGMEM4_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM4_CFG0
|
|
CYREG_PHUB_CFGMEM4_CFG0 EQU 0x40007620
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM4_CFG1
|
|
CYREG_PHUB_CFGMEM4_CFG1 EQU 0x40007624
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM5_BASE
|
|
CYDEV_PHUB_CFGMEM5_BASE EQU 0x40007628
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM5_SIZE
|
|
CYDEV_PHUB_CFGMEM5_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM5_CFG0
|
|
CYREG_PHUB_CFGMEM5_CFG0 EQU 0x40007628
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM5_CFG1
|
|
CYREG_PHUB_CFGMEM5_CFG1 EQU 0x4000762c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM6_BASE
|
|
CYDEV_PHUB_CFGMEM6_BASE EQU 0x40007630
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM6_SIZE
|
|
CYDEV_PHUB_CFGMEM6_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM6_CFG0
|
|
CYREG_PHUB_CFGMEM6_CFG0 EQU 0x40007630
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM6_CFG1
|
|
CYREG_PHUB_CFGMEM6_CFG1 EQU 0x40007634
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM7_BASE
|
|
CYDEV_PHUB_CFGMEM7_BASE EQU 0x40007638
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM7_SIZE
|
|
CYDEV_PHUB_CFGMEM7_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM7_CFG0
|
|
CYREG_PHUB_CFGMEM7_CFG0 EQU 0x40007638
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM7_CFG1
|
|
CYREG_PHUB_CFGMEM7_CFG1 EQU 0x4000763c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM8_BASE
|
|
CYDEV_PHUB_CFGMEM8_BASE EQU 0x40007640
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM8_SIZE
|
|
CYDEV_PHUB_CFGMEM8_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM8_CFG0
|
|
CYREG_PHUB_CFGMEM8_CFG0 EQU 0x40007640
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM8_CFG1
|
|
CYREG_PHUB_CFGMEM8_CFG1 EQU 0x40007644
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM9_BASE
|
|
CYDEV_PHUB_CFGMEM9_BASE EQU 0x40007648
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM9_SIZE
|
|
CYDEV_PHUB_CFGMEM9_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM9_CFG0
|
|
CYREG_PHUB_CFGMEM9_CFG0 EQU 0x40007648
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM9_CFG1
|
|
CYREG_PHUB_CFGMEM9_CFG1 EQU 0x4000764c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM10_BASE
|
|
CYDEV_PHUB_CFGMEM10_BASE EQU 0x40007650
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM10_SIZE
|
|
CYDEV_PHUB_CFGMEM10_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM10_CFG0
|
|
CYREG_PHUB_CFGMEM10_CFG0 EQU 0x40007650
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM10_CFG1
|
|
CYREG_PHUB_CFGMEM10_CFG1 EQU 0x40007654
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM11_BASE
|
|
CYDEV_PHUB_CFGMEM11_BASE EQU 0x40007658
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM11_SIZE
|
|
CYDEV_PHUB_CFGMEM11_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM11_CFG0
|
|
CYREG_PHUB_CFGMEM11_CFG0 EQU 0x40007658
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM11_CFG1
|
|
CYREG_PHUB_CFGMEM11_CFG1 EQU 0x4000765c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM12_BASE
|
|
CYDEV_PHUB_CFGMEM12_BASE EQU 0x40007660
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM12_SIZE
|
|
CYDEV_PHUB_CFGMEM12_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM12_CFG0
|
|
CYREG_PHUB_CFGMEM12_CFG0 EQU 0x40007660
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM12_CFG1
|
|
CYREG_PHUB_CFGMEM12_CFG1 EQU 0x40007664
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM13_BASE
|
|
CYDEV_PHUB_CFGMEM13_BASE EQU 0x40007668
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM13_SIZE
|
|
CYDEV_PHUB_CFGMEM13_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM13_CFG0
|
|
CYREG_PHUB_CFGMEM13_CFG0 EQU 0x40007668
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM13_CFG1
|
|
CYREG_PHUB_CFGMEM13_CFG1 EQU 0x4000766c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM14_BASE
|
|
CYDEV_PHUB_CFGMEM14_BASE EQU 0x40007670
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM14_SIZE
|
|
CYDEV_PHUB_CFGMEM14_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM14_CFG0
|
|
CYREG_PHUB_CFGMEM14_CFG0 EQU 0x40007670
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM14_CFG1
|
|
CYREG_PHUB_CFGMEM14_CFG1 EQU 0x40007674
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM15_BASE
|
|
CYDEV_PHUB_CFGMEM15_BASE EQU 0x40007678
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM15_SIZE
|
|
CYDEV_PHUB_CFGMEM15_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM15_CFG0
|
|
CYREG_PHUB_CFGMEM15_CFG0 EQU 0x40007678
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM15_CFG1
|
|
CYREG_PHUB_CFGMEM15_CFG1 EQU 0x4000767c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM16_BASE
|
|
CYDEV_PHUB_CFGMEM16_BASE EQU 0x40007680
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM16_SIZE
|
|
CYDEV_PHUB_CFGMEM16_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM16_CFG0
|
|
CYREG_PHUB_CFGMEM16_CFG0 EQU 0x40007680
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM16_CFG1
|
|
CYREG_PHUB_CFGMEM16_CFG1 EQU 0x40007684
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM17_BASE
|
|
CYDEV_PHUB_CFGMEM17_BASE EQU 0x40007688
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM17_SIZE
|
|
CYDEV_PHUB_CFGMEM17_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM17_CFG0
|
|
CYREG_PHUB_CFGMEM17_CFG0 EQU 0x40007688
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM17_CFG1
|
|
CYREG_PHUB_CFGMEM17_CFG1 EQU 0x4000768c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM18_BASE
|
|
CYDEV_PHUB_CFGMEM18_BASE EQU 0x40007690
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM18_SIZE
|
|
CYDEV_PHUB_CFGMEM18_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM18_CFG0
|
|
CYREG_PHUB_CFGMEM18_CFG0 EQU 0x40007690
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM18_CFG1
|
|
CYREG_PHUB_CFGMEM18_CFG1 EQU 0x40007694
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM19_BASE
|
|
CYDEV_PHUB_CFGMEM19_BASE EQU 0x40007698
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM19_SIZE
|
|
CYDEV_PHUB_CFGMEM19_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM19_CFG0
|
|
CYREG_PHUB_CFGMEM19_CFG0 EQU 0x40007698
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM19_CFG1
|
|
CYREG_PHUB_CFGMEM19_CFG1 EQU 0x4000769c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM20_BASE
|
|
CYDEV_PHUB_CFGMEM20_BASE EQU 0x400076a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM20_SIZE
|
|
CYDEV_PHUB_CFGMEM20_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM20_CFG0
|
|
CYREG_PHUB_CFGMEM20_CFG0 EQU 0x400076a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM20_CFG1
|
|
CYREG_PHUB_CFGMEM20_CFG1 EQU 0x400076a4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM21_BASE
|
|
CYDEV_PHUB_CFGMEM21_BASE EQU 0x400076a8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM21_SIZE
|
|
CYDEV_PHUB_CFGMEM21_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM21_CFG0
|
|
CYREG_PHUB_CFGMEM21_CFG0 EQU 0x400076a8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM21_CFG1
|
|
CYREG_PHUB_CFGMEM21_CFG1 EQU 0x400076ac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM22_BASE
|
|
CYDEV_PHUB_CFGMEM22_BASE EQU 0x400076b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM22_SIZE
|
|
CYDEV_PHUB_CFGMEM22_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM22_CFG0
|
|
CYREG_PHUB_CFGMEM22_CFG0 EQU 0x400076b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM22_CFG1
|
|
CYREG_PHUB_CFGMEM22_CFG1 EQU 0x400076b4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM23_BASE
|
|
CYDEV_PHUB_CFGMEM23_BASE EQU 0x400076b8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_CFGMEM23_SIZE
|
|
CYDEV_PHUB_CFGMEM23_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM23_CFG0
|
|
CYREG_PHUB_CFGMEM23_CFG0 EQU 0x400076b8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_CFGMEM23_CFG1
|
|
CYREG_PHUB_CFGMEM23_CFG1 EQU 0x400076bc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM0_BASE
|
|
CYDEV_PHUB_TDMEM0_BASE EQU 0x40007800
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM0_SIZE
|
|
CYDEV_PHUB_TDMEM0_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM0_ORIG_TD0
|
|
CYREG_PHUB_TDMEM0_ORIG_TD0 EQU 0x40007800
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM0_ORIG_TD1
|
|
CYREG_PHUB_TDMEM0_ORIG_TD1 EQU 0x40007804
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM1_BASE
|
|
CYDEV_PHUB_TDMEM1_BASE EQU 0x40007808
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM1_SIZE
|
|
CYDEV_PHUB_TDMEM1_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM1_ORIG_TD0
|
|
CYREG_PHUB_TDMEM1_ORIG_TD0 EQU 0x40007808
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM1_ORIG_TD1
|
|
CYREG_PHUB_TDMEM1_ORIG_TD1 EQU 0x4000780c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM2_BASE
|
|
CYDEV_PHUB_TDMEM2_BASE EQU 0x40007810
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM2_SIZE
|
|
CYDEV_PHUB_TDMEM2_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM2_ORIG_TD0
|
|
CYREG_PHUB_TDMEM2_ORIG_TD0 EQU 0x40007810
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM2_ORIG_TD1
|
|
CYREG_PHUB_TDMEM2_ORIG_TD1 EQU 0x40007814
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM3_BASE
|
|
CYDEV_PHUB_TDMEM3_BASE EQU 0x40007818
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM3_SIZE
|
|
CYDEV_PHUB_TDMEM3_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM3_ORIG_TD0
|
|
CYREG_PHUB_TDMEM3_ORIG_TD0 EQU 0x40007818
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM3_ORIG_TD1
|
|
CYREG_PHUB_TDMEM3_ORIG_TD1 EQU 0x4000781c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM4_BASE
|
|
CYDEV_PHUB_TDMEM4_BASE EQU 0x40007820
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM4_SIZE
|
|
CYDEV_PHUB_TDMEM4_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM4_ORIG_TD0
|
|
CYREG_PHUB_TDMEM4_ORIG_TD0 EQU 0x40007820
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM4_ORIG_TD1
|
|
CYREG_PHUB_TDMEM4_ORIG_TD1 EQU 0x40007824
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM5_BASE
|
|
CYDEV_PHUB_TDMEM5_BASE EQU 0x40007828
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM5_SIZE
|
|
CYDEV_PHUB_TDMEM5_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM5_ORIG_TD0
|
|
CYREG_PHUB_TDMEM5_ORIG_TD0 EQU 0x40007828
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM5_ORIG_TD1
|
|
CYREG_PHUB_TDMEM5_ORIG_TD1 EQU 0x4000782c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM6_BASE
|
|
CYDEV_PHUB_TDMEM6_BASE EQU 0x40007830
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM6_SIZE
|
|
CYDEV_PHUB_TDMEM6_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM6_ORIG_TD0
|
|
CYREG_PHUB_TDMEM6_ORIG_TD0 EQU 0x40007830
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM6_ORIG_TD1
|
|
CYREG_PHUB_TDMEM6_ORIG_TD1 EQU 0x40007834
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM7_BASE
|
|
CYDEV_PHUB_TDMEM7_BASE EQU 0x40007838
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM7_SIZE
|
|
CYDEV_PHUB_TDMEM7_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM7_ORIG_TD0
|
|
CYREG_PHUB_TDMEM7_ORIG_TD0 EQU 0x40007838
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM7_ORIG_TD1
|
|
CYREG_PHUB_TDMEM7_ORIG_TD1 EQU 0x4000783c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM8_BASE
|
|
CYDEV_PHUB_TDMEM8_BASE EQU 0x40007840
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM8_SIZE
|
|
CYDEV_PHUB_TDMEM8_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM8_ORIG_TD0
|
|
CYREG_PHUB_TDMEM8_ORIG_TD0 EQU 0x40007840
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM8_ORIG_TD1
|
|
CYREG_PHUB_TDMEM8_ORIG_TD1 EQU 0x40007844
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM9_BASE
|
|
CYDEV_PHUB_TDMEM9_BASE EQU 0x40007848
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM9_SIZE
|
|
CYDEV_PHUB_TDMEM9_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM9_ORIG_TD0
|
|
CYREG_PHUB_TDMEM9_ORIG_TD0 EQU 0x40007848
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM9_ORIG_TD1
|
|
CYREG_PHUB_TDMEM9_ORIG_TD1 EQU 0x4000784c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM10_BASE
|
|
CYDEV_PHUB_TDMEM10_BASE EQU 0x40007850
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM10_SIZE
|
|
CYDEV_PHUB_TDMEM10_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM10_ORIG_TD0
|
|
CYREG_PHUB_TDMEM10_ORIG_TD0 EQU 0x40007850
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM10_ORIG_TD1
|
|
CYREG_PHUB_TDMEM10_ORIG_TD1 EQU 0x40007854
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM11_BASE
|
|
CYDEV_PHUB_TDMEM11_BASE EQU 0x40007858
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM11_SIZE
|
|
CYDEV_PHUB_TDMEM11_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM11_ORIG_TD0
|
|
CYREG_PHUB_TDMEM11_ORIG_TD0 EQU 0x40007858
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM11_ORIG_TD1
|
|
CYREG_PHUB_TDMEM11_ORIG_TD1 EQU 0x4000785c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM12_BASE
|
|
CYDEV_PHUB_TDMEM12_BASE EQU 0x40007860
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM12_SIZE
|
|
CYDEV_PHUB_TDMEM12_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM12_ORIG_TD0
|
|
CYREG_PHUB_TDMEM12_ORIG_TD0 EQU 0x40007860
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM12_ORIG_TD1
|
|
CYREG_PHUB_TDMEM12_ORIG_TD1 EQU 0x40007864
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM13_BASE
|
|
CYDEV_PHUB_TDMEM13_BASE EQU 0x40007868
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM13_SIZE
|
|
CYDEV_PHUB_TDMEM13_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM13_ORIG_TD0
|
|
CYREG_PHUB_TDMEM13_ORIG_TD0 EQU 0x40007868
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM13_ORIG_TD1
|
|
CYREG_PHUB_TDMEM13_ORIG_TD1 EQU 0x4000786c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM14_BASE
|
|
CYDEV_PHUB_TDMEM14_BASE EQU 0x40007870
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM14_SIZE
|
|
CYDEV_PHUB_TDMEM14_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM14_ORIG_TD0
|
|
CYREG_PHUB_TDMEM14_ORIG_TD0 EQU 0x40007870
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM14_ORIG_TD1
|
|
CYREG_PHUB_TDMEM14_ORIG_TD1 EQU 0x40007874
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM15_BASE
|
|
CYDEV_PHUB_TDMEM15_BASE EQU 0x40007878
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM15_SIZE
|
|
CYDEV_PHUB_TDMEM15_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM15_ORIG_TD0
|
|
CYREG_PHUB_TDMEM15_ORIG_TD0 EQU 0x40007878
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM15_ORIG_TD1
|
|
CYREG_PHUB_TDMEM15_ORIG_TD1 EQU 0x4000787c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM16_BASE
|
|
CYDEV_PHUB_TDMEM16_BASE EQU 0x40007880
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM16_SIZE
|
|
CYDEV_PHUB_TDMEM16_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM16_ORIG_TD0
|
|
CYREG_PHUB_TDMEM16_ORIG_TD0 EQU 0x40007880
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM16_ORIG_TD1
|
|
CYREG_PHUB_TDMEM16_ORIG_TD1 EQU 0x40007884
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM17_BASE
|
|
CYDEV_PHUB_TDMEM17_BASE EQU 0x40007888
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM17_SIZE
|
|
CYDEV_PHUB_TDMEM17_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM17_ORIG_TD0
|
|
CYREG_PHUB_TDMEM17_ORIG_TD0 EQU 0x40007888
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM17_ORIG_TD1
|
|
CYREG_PHUB_TDMEM17_ORIG_TD1 EQU 0x4000788c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM18_BASE
|
|
CYDEV_PHUB_TDMEM18_BASE EQU 0x40007890
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM18_SIZE
|
|
CYDEV_PHUB_TDMEM18_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM18_ORIG_TD0
|
|
CYREG_PHUB_TDMEM18_ORIG_TD0 EQU 0x40007890
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM18_ORIG_TD1
|
|
CYREG_PHUB_TDMEM18_ORIG_TD1 EQU 0x40007894
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM19_BASE
|
|
CYDEV_PHUB_TDMEM19_BASE EQU 0x40007898
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM19_SIZE
|
|
CYDEV_PHUB_TDMEM19_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM19_ORIG_TD0
|
|
CYREG_PHUB_TDMEM19_ORIG_TD0 EQU 0x40007898
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM19_ORIG_TD1
|
|
CYREG_PHUB_TDMEM19_ORIG_TD1 EQU 0x4000789c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM20_BASE
|
|
CYDEV_PHUB_TDMEM20_BASE EQU 0x400078a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM20_SIZE
|
|
CYDEV_PHUB_TDMEM20_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM20_ORIG_TD0
|
|
CYREG_PHUB_TDMEM20_ORIG_TD0 EQU 0x400078a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM20_ORIG_TD1
|
|
CYREG_PHUB_TDMEM20_ORIG_TD1 EQU 0x400078a4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM21_BASE
|
|
CYDEV_PHUB_TDMEM21_BASE EQU 0x400078a8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM21_SIZE
|
|
CYDEV_PHUB_TDMEM21_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM21_ORIG_TD0
|
|
CYREG_PHUB_TDMEM21_ORIG_TD0 EQU 0x400078a8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM21_ORIG_TD1
|
|
CYREG_PHUB_TDMEM21_ORIG_TD1 EQU 0x400078ac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM22_BASE
|
|
CYDEV_PHUB_TDMEM22_BASE EQU 0x400078b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM22_SIZE
|
|
CYDEV_PHUB_TDMEM22_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM22_ORIG_TD0
|
|
CYREG_PHUB_TDMEM22_ORIG_TD0 EQU 0x400078b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM22_ORIG_TD1
|
|
CYREG_PHUB_TDMEM22_ORIG_TD1 EQU 0x400078b4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM23_BASE
|
|
CYDEV_PHUB_TDMEM23_BASE EQU 0x400078b8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM23_SIZE
|
|
CYDEV_PHUB_TDMEM23_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM23_ORIG_TD0
|
|
CYREG_PHUB_TDMEM23_ORIG_TD0 EQU 0x400078b8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM23_ORIG_TD1
|
|
CYREG_PHUB_TDMEM23_ORIG_TD1 EQU 0x400078bc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM24_BASE
|
|
CYDEV_PHUB_TDMEM24_BASE EQU 0x400078c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM24_SIZE
|
|
CYDEV_PHUB_TDMEM24_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM24_ORIG_TD0
|
|
CYREG_PHUB_TDMEM24_ORIG_TD0 EQU 0x400078c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM24_ORIG_TD1
|
|
CYREG_PHUB_TDMEM24_ORIG_TD1 EQU 0x400078c4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM25_BASE
|
|
CYDEV_PHUB_TDMEM25_BASE EQU 0x400078c8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM25_SIZE
|
|
CYDEV_PHUB_TDMEM25_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM25_ORIG_TD0
|
|
CYREG_PHUB_TDMEM25_ORIG_TD0 EQU 0x400078c8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM25_ORIG_TD1
|
|
CYREG_PHUB_TDMEM25_ORIG_TD1 EQU 0x400078cc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM26_BASE
|
|
CYDEV_PHUB_TDMEM26_BASE EQU 0x400078d0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM26_SIZE
|
|
CYDEV_PHUB_TDMEM26_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM26_ORIG_TD0
|
|
CYREG_PHUB_TDMEM26_ORIG_TD0 EQU 0x400078d0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM26_ORIG_TD1
|
|
CYREG_PHUB_TDMEM26_ORIG_TD1 EQU 0x400078d4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM27_BASE
|
|
CYDEV_PHUB_TDMEM27_BASE EQU 0x400078d8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM27_SIZE
|
|
CYDEV_PHUB_TDMEM27_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM27_ORIG_TD0
|
|
CYREG_PHUB_TDMEM27_ORIG_TD0 EQU 0x400078d8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM27_ORIG_TD1
|
|
CYREG_PHUB_TDMEM27_ORIG_TD1 EQU 0x400078dc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM28_BASE
|
|
CYDEV_PHUB_TDMEM28_BASE EQU 0x400078e0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM28_SIZE
|
|
CYDEV_PHUB_TDMEM28_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM28_ORIG_TD0
|
|
CYREG_PHUB_TDMEM28_ORIG_TD0 EQU 0x400078e0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM28_ORIG_TD1
|
|
CYREG_PHUB_TDMEM28_ORIG_TD1 EQU 0x400078e4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM29_BASE
|
|
CYDEV_PHUB_TDMEM29_BASE EQU 0x400078e8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM29_SIZE
|
|
CYDEV_PHUB_TDMEM29_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM29_ORIG_TD0
|
|
CYREG_PHUB_TDMEM29_ORIG_TD0 EQU 0x400078e8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM29_ORIG_TD1
|
|
CYREG_PHUB_TDMEM29_ORIG_TD1 EQU 0x400078ec
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM30_BASE
|
|
CYDEV_PHUB_TDMEM30_BASE EQU 0x400078f0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM30_SIZE
|
|
CYDEV_PHUB_TDMEM30_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM30_ORIG_TD0
|
|
CYREG_PHUB_TDMEM30_ORIG_TD0 EQU 0x400078f0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM30_ORIG_TD1
|
|
CYREG_PHUB_TDMEM30_ORIG_TD1 EQU 0x400078f4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM31_BASE
|
|
CYDEV_PHUB_TDMEM31_BASE EQU 0x400078f8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM31_SIZE
|
|
CYDEV_PHUB_TDMEM31_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM31_ORIG_TD0
|
|
CYREG_PHUB_TDMEM31_ORIG_TD0 EQU 0x400078f8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM31_ORIG_TD1
|
|
CYREG_PHUB_TDMEM31_ORIG_TD1 EQU 0x400078fc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM32_BASE
|
|
CYDEV_PHUB_TDMEM32_BASE EQU 0x40007900
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM32_SIZE
|
|
CYDEV_PHUB_TDMEM32_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM32_ORIG_TD0
|
|
CYREG_PHUB_TDMEM32_ORIG_TD0 EQU 0x40007900
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM32_ORIG_TD1
|
|
CYREG_PHUB_TDMEM32_ORIG_TD1 EQU 0x40007904
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM33_BASE
|
|
CYDEV_PHUB_TDMEM33_BASE EQU 0x40007908
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM33_SIZE
|
|
CYDEV_PHUB_TDMEM33_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM33_ORIG_TD0
|
|
CYREG_PHUB_TDMEM33_ORIG_TD0 EQU 0x40007908
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM33_ORIG_TD1
|
|
CYREG_PHUB_TDMEM33_ORIG_TD1 EQU 0x4000790c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM34_BASE
|
|
CYDEV_PHUB_TDMEM34_BASE EQU 0x40007910
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM34_SIZE
|
|
CYDEV_PHUB_TDMEM34_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM34_ORIG_TD0
|
|
CYREG_PHUB_TDMEM34_ORIG_TD0 EQU 0x40007910
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM34_ORIG_TD1
|
|
CYREG_PHUB_TDMEM34_ORIG_TD1 EQU 0x40007914
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM35_BASE
|
|
CYDEV_PHUB_TDMEM35_BASE EQU 0x40007918
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM35_SIZE
|
|
CYDEV_PHUB_TDMEM35_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM35_ORIG_TD0
|
|
CYREG_PHUB_TDMEM35_ORIG_TD0 EQU 0x40007918
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM35_ORIG_TD1
|
|
CYREG_PHUB_TDMEM35_ORIG_TD1 EQU 0x4000791c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM36_BASE
|
|
CYDEV_PHUB_TDMEM36_BASE EQU 0x40007920
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM36_SIZE
|
|
CYDEV_PHUB_TDMEM36_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM36_ORIG_TD0
|
|
CYREG_PHUB_TDMEM36_ORIG_TD0 EQU 0x40007920
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM36_ORIG_TD1
|
|
CYREG_PHUB_TDMEM36_ORIG_TD1 EQU 0x40007924
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM37_BASE
|
|
CYDEV_PHUB_TDMEM37_BASE EQU 0x40007928
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM37_SIZE
|
|
CYDEV_PHUB_TDMEM37_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM37_ORIG_TD0
|
|
CYREG_PHUB_TDMEM37_ORIG_TD0 EQU 0x40007928
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM37_ORIG_TD1
|
|
CYREG_PHUB_TDMEM37_ORIG_TD1 EQU 0x4000792c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM38_BASE
|
|
CYDEV_PHUB_TDMEM38_BASE EQU 0x40007930
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM38_SIZE
|
|
CYDEV_PHUB_TDMEM38_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM38_ORIG_TD0
|
|
CYREG_PHUB_TDMEM38_ORIG_TD0 EQU 0x40007930
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM38_ORIG_TD1
|
|
CYREG_PHUB_TDMEM38_ORIG_TD1 EQU 0x40007934
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM39_BASE
|
|
CYDEV_PHUB_TDMEM39_BASE EQU 0x40007938
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM39_SIZE
|
|
CYDEV_PHUB_TDMEM39_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM39_ORIG_TD0
|
|
CYREG_PHUB_TDMEM39_ORIG_TD0 EQU 0x40007938
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM39_ORIG_TD1
|
|
CYREG_PHUB_TDMEM39_ORIG_TD1 EQU 0x4000793c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM40_BASE
|
|
CYDEV_PHUB_TDMEM40_BASE EQU 0x40007940
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM40_SIZE
|
|
CYDEV_PHUB_TDMEM40_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM40_ORIG_TD0
|
|
CYREG_PHUB_TDMEM40_ORIG_TD0 EQU 0x40007940
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM40_ORIG_TD1
|
|
CYREG_PHUB_TDMEM40_ORIG_TD1 EQU 0x40007944
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM41_BASE
|
|
CYDEV_PHUB_TDMEM41_BASE EQU 0x40007948
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM41_SIZE
|
|
CYDEV_PHUB_TDMEM41_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM41_ORIG_TD0
|
|
CYREG_PHUB_TDMEM41_ORIG_TD0 EQU 0x40007948
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM41_ORIG_TD1
|
|
CYREG_PHUB_TDMEM41_ORIG_TD1 EQU 0x4000794c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM42_BASE
|
|
CYDEV_PHUB_TDMEM42_BASE EQU 0x40007950
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM42_SIZE
|
|
CYDEV_PHUB_TDMEM42_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM42_ORIG_TD0
|
|
CYREG_PHUB_TDMEM42_ORIG_TD0 EQU 0x40007950
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM42_ORIG_TD1
|
|
CYREG_PHUB_TDMEM42_ORIG_TD1 EQU 0x40007954
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM43_BASE
|
|
CYDEV_PHUB_TDMEM43_BASE EQU 0x40007958
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM43_SIZE
|
|
CYDEV_PHUB_TDMEM43_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM43_ORIG_TD0
|
|
CYREG_PHUB_TDMEM43_ORIG_TD0 EQU 0x40007958
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM43_ORIG_TD1
|
|
CYREG_PHUB_TDMEM43_ORIG_TD1 EQU 0x4000795c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM44_BASE
|
|
CYDEV_PHUB_TDMEM44_BASE EQU 0x40007960
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM44_SIZE
|
|
CYDEV_PHUB_TDMEM44_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM44_ORIG_TD0
|
|
CYREG_PHUB_TDMEM44_ORIG_TD0 EQU 0x40007960
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM44_ORIG_TD1
|
|
CYREG_PHUB_TDMEM44_ORIG_TD1 EQU 0x40007964
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM45_BASE
|
|
CYDEV_PHUB_TDMEM45_BASE EQU 0x40007968
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM45_SIZE
|
|
CYDEV_PHUB_TDMEM45_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM45_ORIG_TD0
|
|
CYREG_PHUB_TDMEM45_ORIG_TD0 EQU 0x40007968
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM45_ORIG_TD1
|
|
CYREG_PHUB_TDMEM45_ORIG_TD1 EQU 0x4000796c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM46_BASE
|
|
CYDEV_PHUB_TDMEM46_BASE EQU 0x40007970
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM46_SIZE
|
|
CYDEV_PHUB_TDMEM46_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM46_ORIG_TD0
|
|
CYREG_PHUB_TDMEM46_ORIG_TD0 EQU 0x40007970
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM46_ORIG_TD1
|
|
CYREG_PHUB_TDMEM46_ORIG_TD1 EQU 0x40007974
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM47_BASE
|
|
CYDEV_PHUB_TDMEM47_BASE EQU 0x40007978
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM47_SIZE
|
|
CYDEV_PHUB_TDMEM47_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM47_ORIG_TD0
|
|
CYREG_PHUB_TDMEM47_ORIG_TD0 EQU 0x40007978
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM47_ORIG_TD1
|
|
CYREG_PHUB_TDMEM47_ORIG_TD1 EQU 0x4000797c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM48_BASE
|
|
CYDEV_PHUB_TDMEM48_BASE EQU 0x40007980
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM48_SIZE
|
|
CYDEV_PHUB_TDMEM48_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM48_ORIG_TD0
|
|
CYREG_PHUB_TDMEM48_ORIG_TD0 EQU 0x40007980
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM48_ORIG_TD1
|
|
CYREG_PHUB_TDMEM48_ORIG_TD1 EQU 0x40007984
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM49_BASE
|
|
CYDEV_PHUB_TDMEM49_BASE EQU 0x40007988
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM49_SIZE
|
|
CYDEV_PHUB_TDMEM49_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM49_ORIG_TD0
|
|
CYREG_PHUB_TDMEM49_ORIG_TD0 EQU 0x40007988
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM49_ORIG_TD1
|
|
CYREG_PHUB_TDMEM49_ORIG_TD1 EQU 0x4000798c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM50_BASE
|
|
CYDEV_PHUB_TDMEM50_BASE EQU 0x40007990
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM50_SIZE
|
|
CYDEV_PHUB_TDMEM50_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM50_ORIG_TD0
|
|
CYREG_PHUB_TDMEM50_ORIG_TD0 EQU 0x40007990
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM50_ORIG_TD1
|
|
CYREG_PHUB_TDMEM50_ORIG_TD1 EQU 0x40007994
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM51_BASE
|
|
CYDEV_PHUB_TDMEM51_BASE EQU 0x40007998
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM51_SIZE
|
|
CYDEV_PHUB_TDMEM51_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM51_ORIG_TD0
|
|
CYREG_PHUB_TDMEM51_ORIG_TD0 EQU 0x40007998
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM51_ORIG_TD1
|
|
CYREG_PHUB_TDMEM51_ORIG_TD1 EQU 0x4000799c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM52_BASE
|
|
CYDEV_PHUB_TDMEM52_BASE EQU 0x400079a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM52_SIZE
|
|
CYDEV_PHUB_TDMEM52_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM52_ORIG_TD0
|
|
CYREG_PHUB_TDMEM52_ORIG_TD0 EQU 0x400079a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM52_ORIG_TD1
|
|
CYREG_PHUB_TDMEM52_ORIG_TD1 EQU 0x400079a4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM53_BASE
|
|
CYDEV_PHUB_TDMEM53_BASE EQU 0x400079a8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM53_SIZE
|
|
CYDEV_PHUB_TDMEM53_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM53_ORIG_TD0
|
|
CYREG_PHUB_TDMEM53_ORIG_TD0 EQU 0x400079a8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM53_ORIG_TD1
|
|
CYREG_PHUB_TDMEM53_ORIG_TD1 EQU 0x400079ac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM54_BASE
|
|
CYDEV_PHUB_TDMEM54_BASE EQU 0x400079b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM54_SIZE
|
|
CYDEV_PHUB_TDMEM54_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM54_ORIG_TD0
|
|
CYREG_PHUB_TDMEM54_ORIG_TD0 EQU 0x400079b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM54_ORIG_TD1
|
|
CYREG_PHUB_TDMEM54_ORIG_TD1 EQU 0x400079b4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM55_BASE
|
|
CYDEV_PHUB_TDMEM55_BASE EQU 0x400079b8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM55_SIZE
|
|
CYDEV_PHUB_TDMEM55_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM55_ORIG_TD0
|
|
CYREG_PHUB_TDMEM55_ORIG_TD0 EQU 0x400079b8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM55_ORIG_TD1
|
|
CYREG_PHUB_TDMEM55_ORIG_TD1 EQU 0x400079bc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM56_BASE
|
|
CYDEV_PHUB_TDMEM56_BASE EQU 0x400079c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM56_SIZE
|
|
CYDEV_PHUB_TDMEM56_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM56_ORIG_TD0
|
|
CYREG_PHUB_TDMEM56_ORIG_TD0 EQU 0x400079c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM56_ORIG_TD1
|
|
CYREG_PHUB_TDMEM56_ORIG_TD1 EQU 0x400079c4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM57_BASE
|
|
CYDEV_PHUB_TDMEM57_BASE EQU 0x400079c8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM57_SIZE
|
|
CYDEV_PHUB_TDMEM57_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM57_ORIG_TD0
|
|
CYREG_PHUB_TDMEM57_ORIG_TD0 EQU 0x400079c8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM57_ORIG_TD1
|
|
CYREG_PHUB_TDMEM57_ORIG_TD1 EQU 0x400079cc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM58_BASE
|
|
CYDEV_PHUB_TDMEM58_BASE EQU 0x400079d0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM58_SIZE
|
|
CYDEV_PHUB_TDMEM58_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM58_ORIG_TD0
|
|
CYREG_PHUB_TDMEM58_ORIG_TD0 EQU 0x400079d0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM58_ORIG_TD1
|
|
CYREG_PHUB_TDMEM58_ORIG_TD1 EQU 0x400079d4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM59_BASE
|
|
CYDEV_PHUB_TDMEM59_BASE EQU 0x400079d8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM59_SIZE
|
|
CYDEV_PHUB_TDMEM59_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM59_ORIG_TD0
|
|
CYREG_PHUB_TDMEM59_ORIG_TD0 EQU 0x400079d8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM59_ORIG_TD1
|
|
CYREG_PHUB_TDMEM59_ORIG_TD1 EQU 0x400079dc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM60_BASE
|
|
CYDEV_PHUB_TDMEM60_BASE EQU 0x400079e0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM60_SIZE
|
|
CYDEV_PHUB_TDMEM60_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM60_ORIG_TD0
|
|
CYREG_PHUB_TDMEM60_ORIG_TD0 EQU 0x400079e0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM60_ORIG_TD1
|
|
CYREG_PHUB_TDMEM60_ORIG_TD1 EQU 0x400079e4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM61_BASE
|
|
CYDEV_PHUB_TDMEM61_BASE EQU 0x400079e8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM61_SIZE
|
|
CYDEV_PHUB_TDMEM61_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM61_ORIG_TD0
|
|
CYREG_PHUB_TDMEM61_ORIG_TD0 EQU 0x400079e8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM61_ORIG_TD1
|
|
CYREG_PHUB_TDMEM61_ORIG_TD1 EQU 0x400079ec
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM62_BASE
|
|
CYDEV_PHUB_TDMEM62_BASE EQU 0x400079f0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM62_SIZE
|
|
CYDEV_PHUB_TDMEM62_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM62_ORIG_TD0
|
|
CYREG_PHUB_TDMEM62_ORIG_TD0 EQU 0x400079f0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM62_ORIG_TD1
|
|
CYREG_PHUB_TDMEM62_ORIG_TD1 EQU 0x400079f4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM63_BASE
|
|
CYDEV_PHUB_TDMEM63_BASE EQU 0x400079f8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM63_SIZE
|
|
CYDEV_PHUB_TDMEM63_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM63_ORIG_TD0
|
|
CYREG_PHUB_TDMEM63_ORIG_TD0 EQU 0x400079f8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM63_ORIG_TD1
|
|
CYREG_PHUB_TDMEM63_ORIG_TD1 EQU 0x400079fc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM64_BASE
|
|
CYDEV_PHUB_TDMEM64_BASE EQU 0x40007a00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM64_SIZE
|
|
CYDEV_PHUB_TDMEM64_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM64_ORIG_TD0
|
|
CYREG_PHUB_TDMEM64_ORIG_TD0 EQU 0x40007a00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM64_ORIG_TD1
|
|
CYREG_PHUB_TDMEM64_ORIG_TD1 EQU 0x40007a04
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM65_BASE
|
|
CYDEV_PHUB_TDMEM65_BASE EQU 0x40007a08
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM65_SIZE
|
|
CYDEV_PHUB_TDMEM65_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM65_ORIG_TD0
|
|
CYREG_PHUB_TDMEM65_ORIG_TD0 EQU 0x40007a08
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM65_ORIG_TD1
|
|
CYREG_PHUB_TDMEM65_ORIG_TD1 EQU 0x40007a0c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM66_BASE
|
|
CYDEV_PHUB_TDMEM66_BASE EQU 0x40007a10
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM66_SIZE
|
|
CYDEV_PHUB_TDMEM66_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM66_ORIG_TD0
|
|
CYREG_PHUB_TDMEM66_ORIG_TD0 EQU 0x40007a10
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM66_ORIG_TD1
|
|
CYREG_PHUB_TDMEM66_ORIG_TD1 EQU 0x40007a14
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM67_BASE
|
|
CYDEV_PHUB_TDMEM67_BASE EQU 0x40007a18
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM67_SIZE
|
|
CYDEV_PHUB_TDMEM67_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM67_ORIG_TD0
|
|
CYREG_PHUB_TDMEM67_ORIG_TD0 EQU 0x40007a18
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM67_ORIG_TD1
|
|
CYREG_PHUB_TDMEM67_ORIG_TD1 EQU 0x40007a1c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM68_BASE
|
|
CYDEV_PHUB_TDMEM68_BASE EQU 0x40007a20
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM68_SIZE
|
|
CYDEV_PHUB_TDMEM68_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM68_ORIG_TD0
|
|
CYREG_PHUB_TDMEM68_ORIG_TD0 EQU 0x40007a20
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM68_ORIG_TD1
|
|
CYREG_PHUB_TDMEM68_ORIG_TD1 EQU 0x40007a24
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM69_BASE
|
|
CYDEV_PHUB_TDMEM69_BASE EQU 0x40007a28
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM69_SIZE
|
|
CYDEV_PHUB_TDMEM69_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM69_ORIG_TD0
|
|
CYREG_PHUB_TDMEM69_ORIG_TD0 EQU 0x40007a28
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM69_ORIG_TD1
|
|
CYREG_PHUB_TDMEM69_ORIG_TD1 EQU 0x40007a2c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM70_BASE
|
|
CYDEV_PHUB_TDMEM70_BASE EQU 0x40007a30
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM70_SIZE
|
|
CYDEV_PHUB_TDMEM70_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM70_ORIG_TD0
|
|
CYREG_PHUB_TDMEM70_ORIG_TD0 EQU 0x40007a30
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM70_ORIG_TD1
|
|
CYREG_PHUB_TDMEM70_ORIG_TD1 EQU 0x40007a34
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM71_BASE
|
|
CYDEV_PHUB_TDMEM71_BASE EQU 0x40007a38
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM71_SIZE
|
|
CYDEV_PHUB_TDMEM71_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM71_ORIG_TD0
|
|
CYREG_PHUB_TDMEM71_ORIG_TD0 EQU 0x40007a38
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM71_ORIG_TD1
|
|
CYREG_PHUB_TDMEM71_ORIG_TD1 EQU 0x40007a3c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM72_BASE
|
|
CYDEV_PHUB_TDMEM72_BASE EQU 0x40007a40
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM72_SIZE
|
|
CYDEV_PHUB_TDMEM72_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM72_ORIG_TD0
|
|
CYREG_PHUB_TDMEM72_ORIG_TD0 EQU 0x40007a40
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM72_ORIG_TD1
|
|
CYREG_PHUB_TDMEM72_ORIG_TD1 EQU 0x40007a44
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM73_BASE
|
|
CYDEV_PHUB_TDMEM73_BASE EQU 0x40007a48
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM73_SIZE
|
|
CYDEV_PHUB_TDMEM73_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM73_ORIG_TD0
|
|
CYREG_PHUB_TDMEM73_ORIG_TD0 EQU 0x40007a48
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM73_ORIG_TD1
|
|
CYREG_PHUB_TDMEM73_ORIG_TD1 EQU 0x40007a4c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM74_BASE
|
|
CYDEV_PHUB_TDMEM74_BASE EQU 0x40007a50
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM74_SIZE
|
|
CYDEV_PHUB_TDMEM74_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM74_ORIG_TD0
|
|
CYREG_PHUB_TDMEM74_ORIG_TD0 EQU 0x40007a50
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM74_ORIG_TD1
|
|
CYREG_PHUB_TDMEM74_ORIG_TD1 EQU 0x40007a54
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM75_BASE
|
|
CYDEV_PHUB_TDMEM75_BASE EQU 0x40007a58
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM75_SIZE
|
|
CYDEV_PHUB_TDMEM75_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM75_ORIG_TD0
|
|
CYREG_PHUB_TDMEM75_ORIG_TD0 EQU 0x40007a58
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM75_ORIG_TD1
|
|
CYREG_PHUB_TDMEM75_ORIG_TD1 EQU 0x40007a5c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM76_BASE
|
|
CYDEV_PHUB_TDMEM76_BASE EQU 0x40007a60
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM76_SIZE
|
|
CYDEV_PHUB_TDMEM76_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM76_ORIG_TD0
|
|
CYREG_PHUB_TDMEM76_ORIG_TD0 EQU 0x40007a60
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM76_ORIG_TD1
|
|
CYREG_PHUB_TDMEM76_ORIG_TD1 EQU 0x40007a64
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM77_BASE
|
|
CYDEV_PHUB_TDMEM77_BASE EQU 0x40007a68
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM77_SIZE
|
|
CYDEV_PHUB_TDMEM77_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM77_ORIG_TD0
|
|
CYREG_PHUB_TDMEM77_ORIG_TD0 EQU 0x40007a68
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM77_ORIG_TD1
|
|
CYREG_PHUB_TDMEM77_ORIG_TD1 EQU 0x40007a6c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM78_BASE
|
|
CYDEV_PHUB_TDMEM78_BASE EQU 0x40007a70
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM78_SIZE
|
|
CYDEV_PHUB_TDMEM78_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM78_ORIG_TD0
|
|
CYREG_PHUB_TDMEM78_ORIG_TD0 EQU 0x40007a70
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM78_ORIG_TD1
|
|
CYREG_PHUB_TDMEM78_ORIG_TD1 EQU 0x40007a74
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM79_BASE
|
|
CYDEV_PHUB_TDMEM79_BASE EQU 0x40007a78
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM79_SIZE
|
|
CYDEV_PHUB_TDMEM79_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM79_ORIG_TD0
|
|
CYREG_PHUB_TDMEM79_ORIG_TD0 EQU 0x40007a78
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM79_ORIG_TD1
|
|
CYREG_PHUB_TDMEM79_ORIG_TD1 EQU 0x40007a7c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM80_BASE
|
|
CYDEV_PHUB_TDMEM80_BASE EQU 0x40007a80
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM80_SIZE
|
|
CYDEV_PHUB_TDMEM80_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM80_ORIG_TD0
|
|
CYREG_PHUB_TDMEM80_ORIG_TD0 EQU 0x40007a80
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM80_ORIG_TD1
|
|
CYREG_PHUB_TDMEM80_ORIG_TD1 EQU 0x40007a84
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM81_BASE
|
|
CYDEV_PHUB_TDMEM81_BASE EQU 0x40007a88
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM81_SIZE
|
|
CYDEV_PHUB_TDMEM81_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM81_ORIG_TD0
|
|
CYREG_PHUB_TDMEM81_ORIG_TD0 EQU 0x40007a88
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM81_ORIG_TD1
|
|
CYREG_PHUB_TDMEM81_ORIG_TD1 EQU 0x40007a8c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM82_BASE
|
|
CYDEV_PHUB_TDMEM82_BASE EQU 0x40007a90
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM82_SIZE
|
|
CYDEV_PHUB_TDMEM82_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM82_ORIG_TD0
|
|
CYREG_PHUB_TDMEM82_ORIG_TD0 EQU 0x40007a90
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM82_ORIG_TD1
|
|
CYREG_PHUB_TDMEM82_ORIG_TD1 EQU 0x40007a94
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM83_BASE
|
|
CYDEV_PHUB_TDMEM83_BASE EQU 0x40007a98
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM83_SIZE
|
|
CYDEV_PHUB_TDMEM83_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM83_ORIG_TD0
|
|
CYREG_PHUB_TDMEM83_ORIG_TD0 EQU 0x40007a98
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM83_ORIG_TD1
|
|
CYREG_PHUB_TDMEM83_ORIG_TD1 EQU 0x40007a9c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM84_BASE
|
|
CYDEV_PHUB_TDMEM84_BASE EQU 0x40007aa0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM84_SIZE
|
|
CYDEV_PHUB_TDMEM84_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM84_ORIG_TD0
|
|
CYREG_PHUB_TDMEM84_ORIG_TD0 EQU 0x40007aa0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM84_ORIG_TD1
|
|
CYREG_PHUB_TDMEM84_ORIG_TD1 EQU 0x40007aa4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM85_BASE
|
|
CYDEV_PHUB_TDMEM85_BASE EQU 0x40007aa8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM85_SIZE
|
|
CYDEV_PHUB_TDMEM85_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM85_ORIG_TD0
|
|
CYREG_PHUB_TDMEM85_ORIG_TD0 EQU 0x40007aa8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM85_ORIG_TD1
|
|
CYREG_PHUB_TDMEM85_ORIG_TD1 EQU 0x40007aac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM86_BASE
|
|
CYDEV_PHUB_TDMEM86_BASE EQU 0x40007ab0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM86_SIZE
|
|
CYDEV_PHUB_TDMEM86_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM86_ORIG_TD0
|
|
CYREG_PHUB_TDMEM86_ORIG_TD0 EQU 0x40007ab0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM86_ORIG_TD1
|
|
CYREG_PHUB_TDMEM86_ORIG_TD1 EQU 0x40007ab4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM87_BASE
|
|
CYDEV_PHUB_TDMEM87_BASE EQU 0x40007ab8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM87_SIZE
|
|
CYDEV_PHUB_TDMEM87_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM87_ORIG_TD0
|
|
CYREG_PHUB_TDMEM87_ORIG_TD0 EQU 0x40007ab8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM87_ORIG_TD1
|
|
CYREG_PHUB_TDMEM87_ORIG_TD1 EQU 0x40007abc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM88_BASE
|
|
CYDEV_PHUB_TDMEM88_BASE EQU 0x40007ac0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM88_SIZE
|
|
CYDEV_PHUB_TDMEM88_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM88_ORIG_TD0
|
|
CYREG_PHUB_TDMEM88_ORIG_TD0 EQU 0x40007ac0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM88_ORIG_TD1
|
|
CYREG_PHUB_TDMEM88_ORIG_TD1 EQU 0x40007ac4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM89_BASE
|
|
CYDEV_PHUB_TDMEM89_BASE EQU 0x40007ac8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM89_SIZE
|
|
CYDEV_PHUB_TDMEM89_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM89_ORIG_TD0
|
|
CYREG_PHUB_TDMEM89_ORIG_TD0 EQU 0x40007ac8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM89_ORIG_TD1
|
|
CYREG_PHUB_TDMEM89_ORIG_TD1 EQU 0x40007acc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM90_BASE
|
|
CYDEV_PHUB_TDMEM90_BASE EQU 0x40007ad0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM90_SIZE
|
|
CYDEV_PHUB_TDMEM90_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM90_ORIG_TD0
|
|
CYREG_PHUB_TDMEM90_ORIG_TD0 EQU 0x40007ad0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM90_ORIG_TD1
|
|
CYREG_PHUB_TDMEM90_ORIG_TD1 EQU 0x40007ad4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM91_BASE
|
|
CYDEV_PHUB_TDMEM91_BASE EQU 0x40007ad8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM91_SIZE
|
|
CYDEV_PHUB_TDMEM91_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM91_ORIG_TD0
|
|
CYREG_PHUB_TDMEM91_ORIG_TD0 EQU 0x40007ad8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM91_ORIG_TD1
|
|
CYREG_PHUB_TDMEM91_ORIG_TD1 EQU 0x40007adc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM92_BASE
|
|
CYDEV_PHUB_TDMEM92_BASE EQU 0x40007ae0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM92_SIZE
|
|
CYDEV_PHUB_TDMEM92_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM92_ORIG_TD0
|
|
CYREG_PHUB_TDMEM92_ORIG_TD0 EQU 0x40007ae0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM92_ORIG_TD1
|
|
CYREG_PHUB_TDMEM92_ORIG_TD1 EQU 0x40007ae4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM93_BASE
|
|
CYDEV_PHUB_TDMEM93_BASE EQU 0x40007ae8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM93_SIZE
|
|
CYDEV_PHUB_TDMEM93_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM93_ORIG_TD0
|
|
CYREG_PHUB_TDMEM93_ORIG_TD0 EQU 0x40007ae8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM93_ORIG_TD1
|
|
CYREG_PHUB_TDMEM93_ORIG_TD1 EQU 0x40007aec
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM94_BASE
|
|
CYDEV_PHUB_TDMEM94_BASE EQU 0x40007af0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM94_SIZE
|
|
CYDEV_PHUB_TDMEM94_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM94_ORIG_TD0
|
|
CYREG_PHUB_TDMEM94_ORIG_TD0 EQU 0x40007af0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM94_ORIG_TD1
|
|
CYREG_PHUB_TDMEM94_ORIG_TD1 EQU 0x40007af4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM95_BASE
|
|
CYDEV_PHUB_TDMEM95_BASE EQU 0x40007af8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM95_SIZE
|
|
CYDEV_PHUB_TDMEM95_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM95_ORIG_TD0
|
|
CYREG_PHUB_TDMEM95_ORIG_TD0 EQU 0x40007af8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM95_ORIG_TD1
|
|
CYREG_PHUB_TDMEM95_ORIG_TD1 EQU 0x40007afc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM96_BASE
|
|
CYDEV_PHUB_TDMEM96_BASE EQU 0x40007b00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM96_SIZE
|
|
CYDEV_PHUB_TDMEM96_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM96_ORIG_TD0
|
|
CYREG_PHUB_TDMEM96_ORIG_TD0 EQU 0x40007b00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM96_ORIG_TD1
|
|
CYREG_PHUB_TDMEM96_ORIG_TD1 EQU 0x40007b04
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM97_BASE
|
|
CYDEV_PHUB_TDMEM97_BASE EQU 0x40007b08
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM97_SIZE
|
|
CYDEV_PHUB_TDMEM97_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM97_ORIG_TD0
|
|
CYREG_PHUB_TDMEM97_ORIG_TD0 EQU 0x40007b08
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM97_ORIG_TD1
|
|
CYREG_PHUB_TDMEM97_ORIG_TD1 EQU 0x40007b0c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM98_BASE
|
|
CYDEV_PHUB_TDMEM98_BASE EQU 0x40007b10
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM98_SIZE
|
|
CYDEV_PHUB_TDMEM98_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM98_ORIG_TD0
|
|
CYREG_PHUB_TDMEM98_ORIG_TD0 EQU 0x40007b10
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM98_ORIG_TD1
|
|
CYREG_PHUB_TDMEM98_ORIG_TD1 EQU 0x40007b14
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM99_BASE
|
|
CYDEV_PHUB_TDMEM99_BASE EQU 0x40007b18
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM99_SIZE
|
|
CYDEV_PHUB_TDMEM99_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM99_ORIG_TD0
|
|
CYREG_PHUB_TDMEM99_ORIG_TD0 EQU 0x40007b18
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM99_ORIG_TD1
|
|
CYREG_PHUB_TDMEM99_ORIG_TD1 EQU 0x40007b1c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM100_BASE
|
|
CYDEV_PHUB_TDMEM100_BASE EQU 0x40007b20
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM100_SIZE
|
|
CYDEV_PHUB_TDMEM100_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM100_ORIG_TD0
|
|
CYREG_PHUB_TDMEM100_ORIG_TD0 EQU 0x40007b20
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM100_ORIG_TD1
|
|
CYREG_PHUB_TDMEM100_ORIG_TD1 EQU 0x40007b24
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM101_BASE
|
|
CYDEV_PHUB_TDMEM101_BASE EQU 0x40007b28
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM101_SIZE
|
|
CYDEV_PHUB_TDMEM101_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM101_ORIG_TD0
|
|
CYREG_PHUB_TDMEM101_ORIG_TD0 EQU 0x40007b28
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM101_ORIG_TD1
|
|
CYREG_PHUB_TDMEM101_ORIG_TD1 EQU 0x40007b2c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM102_BASE
|
|
CYDEV_PHUB_TDMEM102_BASE EQU 0x40007b30
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM102_SIZE
|
|
CYDEV_PHUB_TDMEM102_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM102_ORIG_TD0
|
|
CYREG_PHUB_TDMEM102_ORIG_TD0 EQU 0x40007b30
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM102_ORIG_TD1
|
|
CYREG_PHUB_TDMEM102_ORIG_TD1 EQU 0x40007b34
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM103_BASE
|
|
CYDEV_PHUB_TDMEM103_BASE EQU 0x40007b38
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM103_SIZE
|
|
CYDEV_PHUB_TDMEM103_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM103_ORIG_TD0
|
|
CYREG_PHUB_TDMEM103_ORIG_TD0 EQU 0x40007b38
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM103_ORIG_TD1
|
|
CYREG_PHUB_TDMEM103_ORIG_TD1 EQU 0x40007b3c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM104_BASE
|
|
CYDEV_PHUB_TDMEM104_BASE EQU 0x40007b40
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM104_SIZE
|
|
CYDEV_PHUB_TDMEM104_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM104_ORIG_TD0
|
|
CYREG_PHUB_TDMEM104_ORIG_TD0 EQU 0x40007b40
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM104_ORIG_TD1
|
|
CYREG_PHUB_TDMEM104_ORIG_TD1 EQU 0x40007b44
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM105_BASE
|
|
CYDEV_PHUB_TDMEM105_BASE EQU 0x40007b48
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM105_SIZE
|
|
CYDEV_PHUB_TDMEM105_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM105_ORIG_TD0
|
|
CYREG_PHUB_TDMEM105_ORIG_TD0 EQU 0x40007b48
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM105_ORIG_TD1
|
|
CYREG_PHUB_TDMEM105_ORIG_TD1 EQU 0x40007b4c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM106_BASE
|
|
CYDEV_PHUB_TDMEM106_BASE EQU 0x40007b50
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM106_SIZE
|
|
CYDEV_PHUB_TDMEM106_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM106_ORIG_TD0
|
|
CYREG_PHUB_TDMEM106_ORIG_TD0 EQU 0x40007b50
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM106_ORIG_TD1
|
|
CYREG_PHUB_TDMEM106_ORIG_TD1 EQU 0x40007b54
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM107_BASE
|
|
CYDEV_PHUB_TDMEM107_BASE EQU 0x40007b58
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM107_SIZE
|
|
CYDEV_PHUB_TDMEM107_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM107_ORIG_TD0
|
|
CYREG_PHUB_TDMEM107_ORIG_TD0 EQU 0x40007b58
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM107_ORIG_TD1
|
|
CYREG_PHUB_TDMEM107_ORIG_TD1 EQU 0x40007b5c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM108_BASE
|
|
CYDEV_PHUB_TDMEM108_BASE EQU 0x40007b60
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM108_SIZE
|
|
CYDEV_PHUB_TDMEM108_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM108_ORIG_TD0
|
|
CYREG_PHUB_TDMEM108_ORIG_TD0 EQU 0x40007b60
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM108_ORIG_TD1
|
|
CYREG_PHUB_TDMEM108_ORIG_TD1 EQU 0x40007b64
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM109_BASE
|
|
CYDEV_PHUB_TDMEM109_BASE EQU 0x40007b68
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM109_SIZE
|
|
CYDEV_PHUB_TDMEM109_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM109_ORIG_TD0
|
|
CYREG_PHUB_TDMEM109_ORIG_TD0 EQU 0x40007b68
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM109_ORIG_TD1
|
|
CYREG_PHUB_TDMEM109_ORIG_TD1 EQU 0x40007b6c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM110_BASE
|
|
CYDEV_PHUB_TDMEM110_BASE EQU 0x40007b70
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM110_SIZE
|
|
CYDEV_PHUB_TDMEM110_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM110_ORIG_TD0
|
|
CYREG_PHUB_TDMEM110_ORIG_TD0 EQU 0x40007b70
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM110_ORIG_TD1
|
|
CYREG_PHUB_TDMEM110_ORIG_TD1 EQU 0x40007b74
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM111_BASE
|
|
CYDEV_PHUB_TDMEM111_BASE EQU 0x40007b78
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM111_SIZE
|
|
CYDEV_PHUB_TDMEM111_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM111_ORIG_TD0
|
|
CYREG_PHUB_TDMEM111_ORIG_TD0 EQU 0x40007b78
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM111_ORIG_TD1
|
|
CYREG_PHUB_TDMEM111_ORIG_TD1 EQU 0x40007b7c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM112_BASE
|
|
CYDEV_PHUB_TDMEM112_BASE EQU 0x40007b80
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM112_SIZE
|
|
CYDEV_PHUB_TDMEM112_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM112_ORIG_TD0
|
|
CYREG_PHUB_TDMEM112_ORIG_TD0 EQU 0x40007b80
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM112_ORIG_TD1
|
|
CYREG_PHUB_TDMEM112_ORIG_TD1 EQU 0x40007b84
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM113_BASE
|
|
CYDEV_PHUB_TDMEM113_BASE EQU 0x40007b88
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM113_SIZE
|
|
CYDEV_PHUB_TDMEM113_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM113_ORIG_TD0
|
|
CYREG_PHUB_TDMEM113_ORIG_TD0 EQU 0x40007b88
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM113_ORIG_TD1
|
|
CYREG_PHUB_TDMEM113_ORIG_TD1 EQU 0x40007b8c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM114_BASE
|
|
CYDEV_PHUB_TDMEM114_BASE EQU 0x40007b90
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM114_SIZE
|
|
CYDEV_PHUB_TDMEM114_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM114_ORIG_TD0
|
|
CYREG_PHUB_TDMEM114_ORIG_TD0 EQU 0x40007b90
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM114_ORIG_TD1
|
|
CYREG_PHUB_TDMEM114_ORIG_TD1 EQU 0x40007b94
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM115_BASE
|
|
CYDEV_PHUB_TDMEM115_BASE EQU 0x40007b98
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM115_SIZE
|
|
CYDEV_PHUB_TDMEM115_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM115_ORIG_TD0
|
|
CYREG_PHUB_TDMEM115_ORIG_TD0 EQU 0x40007b98
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM115_ORIG_TD1
|
|
CYREG_PHUB_TDMEM115_ORIG_TD1 EQU 0x40007b9c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM116_BASE
|
|
CYDEV_PHUB_TDMEM116_BASE EQU 0x40007ba0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM116_SIZE
|
|
CYDEV_PHUB_TDMEM116_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM116_ORIG_TD0
|
|
CYREG_PHUB_TDMEM116_ORIG_TD0 EQU 0x40007ba0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM116_ORIG_TD1
|
|
CYREG_PHUB_TDMEM116_ORIG_TD1 EQU 0x40007ba4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM117_BASE
|
|
CYDEV_PHUB_TDMEM117_BASE EQU 0x40007ba8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM117_SIZE
|
|
CYDEV_PHUB_TDMEM117_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM117_ORIG_TD0
|
|
CYREG_PHUB_TDMEM117_ORIG_TD0 EQU 0x40007ba8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM117_ORIG_TD1
|
|
CYREG_PHUB_TDMEM117_ORIG_TD1 EQU 0x40007bac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM118_BASE
|
|
CYDEV_PHUB_TDMEM118_BASE EQU 0x40007bb0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM118_SIZE
|
|
CYDEV_PHUB_TDMEM118_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM118_ORIG_TD0
|
|
CYREG_PHUB_TDMEM118_ORIG_TD0 EQU 0x40007bb0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM118_ORIG_TD1
|
|
CYREG_PHUB_TDMEM118_ORIG_TD1 EQU 0x40007bb4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM119_BASE
|
|
CYDEV_PHUB_TDMEM119_BASE EQU 0x40007bb8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM119_SIZE
|
|
CYDEV_PHUB_TDMEM119_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM119_ORIG_TD0
|
|
CYREG_PHUB_TDMEM119_ORIG_TD0 EQU 0x40007bb8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM119_ORIG_TD1
|
|
CYREG_PHUB_TDMEM119_ORIG_TD1 EQU 0x40007bbc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM120_BASE
|
|
CYDEV_PHUB_TDMEM120_BASE EQU 0x40007bc0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM120_SIZE
|
|
CYDEV_PHUB_TDMEM120_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM120_ORIG_TD0
|
|
CYREG_PHUB_TDMEM120_ORIG_TD0 EQU 0x40007bc0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM120_ORIG_TD1
|
|
CYREG_PHUB_TDMEM120_ORIG_TD1 EQU 0x40007bc4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM121_BASE
|
|
CYDEV_PHUB_TDMEM121_BASE EQU 0x40007bc8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM121_SIZE
|
|
CYDEV_PHUB_TDMEM121_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM121_ORIG_TD0
|
|
CYREG_PHUB_TDMEM121_ORIG_TD0 EQU 0x40007bc8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM121_ORIG_TD1
|
|
CYREG_PHUB_TDMEM121_ORIG_TD1 EQU 0x40007bcc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM122_BASE
|
|
CYDEV_PHUB_TDMEM122_BASE EQU 0x40007bd0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM122_SIZE
|
|
CYDEV_PHUB_TDMEM122_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM122_ORIG_TD0
|
|
CYREG_PHUB_TDMEM122_ORIG_TD0 EQU 0x40007bd0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM122_ORIG_TD1
|
|
CYREG_PHUB_TDMEM122_ORIG_TD1 EQU 0x40007bd4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM123_BASE
|
|
CYDEV_PHUB_TDMEM123_BASE EQU 0x40007bd8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM123_SIZE
|
|
CYDEV_PHUB_TDMEM123_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM123_ORIG_TD0
|
|
CYREG_PHUB_TDMEM123_ORIG_TD0 EQU 0x40007bd8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM123_ORIG_TD1
|
|
CYREG_PHUB_TDMEM123_ORIG_TD1 EQU 0x40007bdc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM124_BASE
|
|
CYDEV_PHUB_TDMEM124_BASE EQU 0x40007be0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM124_SIZE
|
|
CYDEV_PHUB_TDMEM124_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM124_ORIG_TD0
|
|
CYREG_PHUB_TDMEM124_ORIG_TD0 EQU 0x40007be0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM124_ORIG_TD1
|
|
CYREG_PHUB_TDMEM124_ORIG_TD1 EQU 0x40007be4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM125_BASE
|
|
CYDEV_PHUB_TDMEM125_BASE EQU 0x40007be8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM125_SIZE
|
|
CYDEV_PHUB_TDMEM125_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM125_ORIG_TD0
|
|
CYREG_PHUB_TDMEM125_ORIG_TD0 EQU 0x40007be8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM125_ORIG_TD1
|
|
CYREG_PHUB_TDMEM125_ORIG_TD1 EQU 0x40007bec
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM126_BASE
|
|
CYDEV_PHUB_TDMEM126_BASE EQU 0x40007bf0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM126_SIZE
|
|
CYDEV_PHUB_TDMEM126_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM126_ORIG_TD0
|
|
CYREG_PHUB_TDMEM126_ORIG_TD0 EQU 0x40007bf0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM126_ORIG_TD1
|
|
CYREG_PHUB_TDMEM126_ORIG_TD1 EQU 0x40007bf4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM127_BASE
|
|
CYDEV_PHUB_TDMEM127_BASE EQU 0x40007bf8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PHUB_TDMEM127_SIZE
|
|
CYDEV_PHUB_TDMEM127_SIZE EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM127_ORIG_TD0
|
|
CYREG_PHUB_TDMEM127_ORIG_TD0 EQU 0x40007bf8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PHUB_TDMEM127_ORIG_TD1
|
|
CYREG_PHUB_TDMEM127_ORIG_TD1 EQU 0x40007bfc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_EE_BASE
|
|
CYDEV_EE_BASE EQU 0x40008000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_EE_SIZE
|
|
CYDEV_EE_SIZE EQU 0x00000800
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_EE_DATA_MBASE
|
|
CYREG_EE_DATA_MBASE EQU 0x40008000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_EE_DATA_MSIZE
|
|
CYREG_EE_DATA_MSIZE EQU 0x00000800
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_BASE
|
|
CYDEV_CAN0_BASE EQU 0x4000a000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_SIZE
|
|
CYDEV_CAN0_SIZE EQU 0x000002a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_CSR_BASE
|
|
CYDEV_CAN0_CSR_BASE EQU 0x4000a000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_CSR_SIZE
|
|
CYDEV_CAN0_CSR_SIZE EQU 0x00000018
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_CSR_INT_SR
|
|
CYREG_CAN0_CSR_INT_SR EQU 0x4000a000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_CSR_INT_EN
|
|
CYREG_CAN0_CSR_INT_EN EQU 0x4000a004
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_CSR_BUF_SR
|
|
CYREG_CAN0_CSR_BUF_SR EQU 0x4000a008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_CSR_ERR_SR
|
|
CYREG_CAN0_CSR_ERR_SR EQU 0x4000a00c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_CSR_CMD
|
|
CYREG_CAN0_CSR_CMD EQU 0x4000a010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_CSR_CFG
|
|
CYREG_CAN0_CSR_CFG EQU 0x4000a014
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_TX0_BASE
|
|
CYDEV_CAN0_TX0_BASE EQU 0x4000a020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_TX0_SIZE
|
|
CYDEV_CAN0_TX0_SIZE EQU 0x00000010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX0_CMD
|
|
CYREG_CAN0_TX0_CMD EQU 0x4000a020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX0_ID
|
|
CYREG_CAN0_TX0_ID EQU 0x4000a024
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX0_DH
|
|
CYREG_CAN0_TX0_DH EQU 0x4000a028
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX0_DL
|
|
CYREG_CAN0_TX0_DL EQU 0x4000a02c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_TX1_BASE
|
|
CYDEV_CAN0_TX1_BASE EQU 0x4000a030
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_TX1_SIZE
|
|
CYDEV_CAN0_TX1_SIZE EQU 0x00000010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX1_CMD
|
|
CYREG_CAN0_TX1_CMD EQU 0x4000a030
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX1_ID
|
|
CYREG_CAN0_TX1_ID EQU 0x4000a034
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX1_DH
|
|
CYREG_CAN0_TX1_DH EQU 0x4000a038
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX1_DL
|
|
CYREG_CAN0_TX1_DL EQU 0x4000a03c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_TX2_BASE
|
|
CYDEV_CAN0_TX2_BASE EQU 0x4000a040
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_TX2_SIZE
|
|
CYDEV_CAN0_TX2_SIZE EQU 0x00000010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX2_CMD
|
|
CYREG_CAN0_TX2_CMD EQU 0x4000a040
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX2_ID
|
|
CYREG_CAN0_TX2_ID EQU 0x4000a044
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX2_DH
|
|
CYREG_CAN0_TX2_DH EQU 0x4000a048
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX2_DL
|
|
CYREG_CAN0_TX2_DL EQU 0x4000a04c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_TX3_BASE
|
|
CYDEV_CAN0_TX3_BASE EQU 0x4000a050
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_TX3_SIZE
|
|
CYDEV_CAN0_TX3_SIZE EQU 0x00000010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX3_CMD
|
|
CYREG_CAN0_TX3_CMD EQU 0x4000a050
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX3_ID
|
|
CYREG_CAN0_TX3_ID EQU 0x4000a054
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX3_DH
|
|
CYREG_CAN0_TX3_DH EQU 0x4000a058
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX3_DL
|
|
CYREG_CAN0_TX3_DL EQU 0x4000a05c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_TX4_BASE
|
|
CYDEV_CAN0_TX4_BASE EQU 0x4000a060
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_TX4_SIZE
|
|
CYDEV_CAN0_TX4_SIZE EQU 0x00000010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX4_CMD
|
|
CYREG_CAN0_TX4_CMD EQU 0x4000a060
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX4_ID
|
|
CYREG_CAN0_TX4_ID EQU 0x4000a064
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX4_DH
|
|
CYREG_CAN0_TX4_DH EQU 0x4000a068
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX4_DL
|
|
CYREG_CAN0_TX4_DL EQU 0x4000a06c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_TX5_BASE
|
|
CYDEV_CAN0_TX5_BASE EQU 0x4000a070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_TX5_SIZE
|
|
CYDEV_CAN0_TX5_SIZE EQU 0x00000010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX5_CMD
|
|
CYREG_CAN0_TX5_CMD EQU 0x4000a070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX5_ID
|
|
CYREG_CAN0_TX5_ID EQU 0x4000a074
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX5_DH
|
|
CYREG_CAN0_TX5_DH EQU 0x4000a078
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX5_DL
|
|
CYREG_CAN0_TX5_DL EQU 0x4000a07c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_TX6_BASE
|
|
CYDEV_CAN0_TX6_BASE EQU 0x4000a080
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_TX6_SIZE
|
|
CYDEV_CAN0_TX6_SIZE EQU 0x00000010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX6_CMD
|
|
CYREG_CAN0_TX6_CMD EQU 0x4000a080
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX6_ID
|
|
CYREG_CAN0_TX6_ID EQU 0x4000a084
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX6_DH
|
|
CYREG_CAN0_TX6_DH EQU 0x4000a088
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX6_DL
|
|
CYREG_CAN0_TX6_DL EQU 0x4000a08c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_TX7_BASE
|
|
CYDEV_CAN0_TX7_BASE EQU 0x4000a090
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_TX7_SIZE
|
|
CYDEV_CAN0_TX7_SIZE EQU 0x00000010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX7_CMD
|
|
CYREG_CAN0_TX7_CMD EQU 0x4000a090
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX7_ID
|
|
CYREG_CAN0_TX7_ID EQU 0x4000a094
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX7_DH
|
|
CYREG_CAN0_TX7_DH EQU 0x4000a098
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_TX7_DL
|
|
CYREG_CAN0_TX7_DL EQU 0x4000a09c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX0_BASE
|
|
CYDEV_CAN0_RX0_BASE EQU 0x4000a0a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX0_SIZE
|
|
CYDEV_CAN0_RX0_SIZE EQU 0x00000020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX0_CMD
|
|
CYREG_CAN0_RX0_CMD EQU 0x4000a0a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX0_ID
|
|
CYREG_CAN0_RX0_ID EQU 0x4000a0a4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX0_DH
|
|
CYREG_CAN0_RX0_DH EQU 0x4000a0a8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX0_DL
|
|
CYREG_CAN0_RX0_DL EQU 0x4000a0ac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX0_AMR
|
|
CYREG_CAN0_RX0_AMR EQU 0x4000a0b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX0_ACR
|
|
CYREG_CAN0_RX0_ACR EQU 0x4000a0b4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX0_AMRD
|
|
CYREG_CAN0_RX0_AMRD EQU 0x4000a0b8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX0_ACRD
|
|
CYREG_CAN0_RX0_ACRD EQU 0x4000a0bc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX1_BASE
|
|
CYDEV_CAN0_RX1_BASE EQU 0x4000a0c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX1_SIZE
|
|
CYDEV_CAN0_RX1_SIZE EQU 0x00000020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX1_CMD
|
|
CYREG_CAN0_RX1_CMD EQU 0x4000a0c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX1_ID
|
|
CYREG_CAN0_RX1_ID EQU 0x4000a0c4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX1_DH
|
|
CYREG_CAN0_RX1_DH EQU 0x4000a0c8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX1_DL
|
|
CYREG_CAN0_RX1_DL EQU 0x4000a0cc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX1_AMR
|
|
CYREG_CAN0_RX1_AMR EQU 0x4000a0d0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX1_ACR
|
|
CYREG_CAN0_RX1_ACR EQU 0x4000a0d4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX1_AMRD
|
|
CYREG_CAN0_RX1_AMRD EQU 0x4000a0d8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX1_ACRD
|
|
CYREG_CAN0_RX1_ACRD EQU 0x4000a0dc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX2_BASE
|
|
CYDEV_CAN0_RX2_BASE EQU 0x4000a0e0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX2_SIZE
|
|
CYDEV_CAN0_RX2_SIZE EQU 0x00000020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX2_CMD
|
|
CYREG_CAN0_RX2_CMD EQU 0x4000a0e0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX2_ID
|
|
CYREG_CAN0_RX2_ID EQU 0x4000a0e4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX2_DH
|
|
CYREG_CAN0_RX2_DH EQU 0x4000a0e8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX2_DL
|
|
CYREG_CAN0_RX2_DL EQU 0x4000a0ec
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX2_AMR
|
|
CYREG_CAN0_RX2_AMR EQU 0x4000a0f0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX2_ACR
|
|
CYREG_CAN0_RX2_ACR EQU 0x4000a0f4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX2_AMRD
|
|
CYREG_CAN0_RX2_AMRD EQU 0x4000a0f8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX2_ACRD
|
|
CYREG_CAN0_RX2_ACRD EQU 0x4000a0fc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX3_BASE
|
|
CYDEV_CAN0_RX3_BASE EQU 0x4000a100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX3_SIZE
|
|
CYDEV_CAN0_RX3_SIZE EQU 0x00000020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX3_CMD
|
|
CYREG_CAN0_RX3_CMD EQU 0x4000a100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX3_ID
|
|
CYREG_CAN0_RX3_ID EQU 0x4000a104
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX3_DH
|
|
CYREG_CAN0_RX3_DH EQU 0x4000a108
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX3_DL
|
|
CYREG_CAN0_RX3_DL EQU 0x4000a10c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX3_AMR
|
|
CYREG_CAN0_RX3_AMR EQU 0x4000a110
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX3_ACR
|
|
CYREG_CAN0_RX3_ACR EQU 0x4000a114
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX3_AMRD
|
|
CYREG_CAN0_RX3_AMRD EQU 0x4000a118
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX3_ACRD
|
|
CYREG_CAN0_RX3_ACRD EQU 0x4000a11c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX4_BASE
|
|
CYDEV_CAN0_RX4_BASE EQU 0x4000a120
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX4_SIZE
|
|
CYDEV_CAN0_RX4_SIZE EQU 0x00000020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX4_CMD
|
|
CYREG_CAN0_RX4_CMD EQU 0x4000a120
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX4_ID
|
|
CYREG_CAN0_RX4_ID EQU 0x4000a124
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX4_DH
|
|
CYREG_CAN0_RX4_DH EQU 0x4000a128
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX4_DL
|
|
CYREG_CAN0_RX4_DL EQU 0x4000a12c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX4_AMR
|
|
CYREG_CAN0_RX4_AMR EQU 0x4000a130
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX4_ACR
|
|
CYREG_CAN0_RX4_ACR EQU 0x4000a134
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX4_AMRD
|
|
CYREG_CAN0_RX4_AMRD EQU 0x4000a138
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX4_ACRD
|
|
CYREG_CAN0_RX4_ACRD EQU 0x4000a13c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX5_BASE
|
|
CYDEV_CAN0_RX5_BASE EQU 0x4000a140
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX5_SIZE
|
|
CYDEV_CAN0_RX5_SIZE EQU 0x00000020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX5_CMD
|
|
CYREG_CAN0_RX5_CMD EQU 0x4000a140
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX5_ID
|
|
CYREG_CAN0_RX5_ID EQU 0x4000a144
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX5_DH
|
|
CYREG_CAN0_RX5_DH EQU 0x4000a148
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX5_DL
|
|
CYREG_CAN0_RX5_DL EQU 0x4000a14c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX5_AMR
|
|
CYREG_CAN0_RX5_AMR EQU 0x4000a150
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX5_ACR
|
|
CYREG_CAN0_RX5_ACR EQU 0x4000a154
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX5_AMRD
|
|
CYREG_CAN0_RX5_AMRD EQU 0x4000a158
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX5_ACRD
|
|
CYREG_CAN0_RX5_ACRD EQU 0x4000a15c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX6_BASE
|
|
CYDEV_CAN0_RX6_BASE EQU 0x4000a160
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX6_SIZE
|
|
CYDEV_CAN0_RX6_SIZE EQU 0x00000020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX6_CMD
|
|
CYREG_CAN0_RX6_CMD EQU 0x4000a160
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX6_ID
|
|
CYREG_CAN0_RX6_ID EQU 0x4000a164
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX6_DH
|
|
CYREG_CAN0_RX6_DH EQU 0x4000a168
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX6_DL
|
|
CYREG_CAN0_RX6_DL EQU 0x4000a16c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX6_AMR
|
|
CYREG_CAN0_RX6_AMR EQU 0x4000a170
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX6_ACR
|
|
CYREG_CAN0_RX6_ACR EQU 0x4000a174
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX6_AMRD
|
|
CYREG_CAN0_RX6_AMRD EQU 0x4000a178
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX6_ACRD
|
|
CYREG_CAN0_RX6_ACRD EQU 0x4000a17c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX7_BASE
|
|
CYDEV_CAN0_RX7_BASE EQU 0x4000a180
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX7_SIZE
|
|
CYDEV_CAN0_RX7_SIZE EQU 0x00000020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX7_CMD
|
|
CYREG_CAN0_RX7_CMD EQU 0x4000a180
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX7_ID
|
|
CYREG_CAN0_RX7_ID EQU 0x4000a184
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX7_DH
|
|
CYREG_CAN0_RX7_DH EQU 0x4000a188
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX7_DL
|
|
CYREG_CAN0_RX7_DL EQU 0x4000a18c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX7_AMR
|
|
CYREG_CAN0_RX7_AMR EQU 0x4000a190
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX7_ACR
|
|
CYREG_CAN0_RX7_ACR EQU 0x4000a194
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX7_AMRD
|
|
CYREG_CAN0_RX7_AMRD EQU 0x4000a198
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX7_ACRD
|
|
CYREG_CAN0_RX7_ACRD EQU 0x4000a19c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX8_BASE
|
|
CYDEV_CAN0_RX8_BASE EQU 0x4000a1a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX8_SIZE
|
|
CYDEV_CAN0_RX8_SIZE EQU 0x00000020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX8_CMD
|
|
CYREG_CAN0_RX8_CMD EQU 0x4000a1a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX8_ID
|
|
CYREG_CAN0_RX8_ID EQU 0x4000a1a4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX8_DH
|
|
CYREG_CAN0_RX8_DH EQU 0x4000a1a8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX8_DL
|
|
CYREG_CAN0_RX8_DL EQU 0x4000a1ac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX8_AMR
|
|
CYREG_CAN0_RX8_AMR EQU 0x4000a1b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX8_ACR
|
|
CYREG_CAN0_RX8_ACR EQU 0x4000a1b4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX8_AMRD
|
|
CYREG_CAN0_RX8_AMRD EQU 0x4000a1b8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX8_ACRD
|
|
CYREG_CAN0_RX8_ACRD EQU 0x4000a1bc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX9_BASE
|
|
CYDEV_CAN0_RX9_BASE EQU 0x4000a1c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX9_SIZE
|
|
CYDEV_CAN0_RX9_SIZE EQU 0x00000020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX9_CMD
|
|
CYREG_CAN0_RX9_CMD EQU 0x4000a1c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX9_ID
|
|
CYREG_CAN0_RX9_ID EQU 0x4000a1c4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX9_DH
|
|
CYREG_CAN0_RX9_DH EQU 0x4000a1c8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX9_DL
|
|
CYREG_CAN0_RX9_DL EQU 0x4000a1cc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX9_AMR
|
|
CYREG_CAN0_RX9_AMR EQU 0x4000a1d0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX9_ACR
|
|
CYREG_CAN0_RX9_ACR EQU 0x4000a1d4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX9_AMRD
|
|
CYREG_CAN0_RX9_AMRD EQU 0x4000a1d8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX9_ACRD
|
|
CYREG_CAN0_RX9_ACRD EQU 0x4000a1dc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX10_BASE
|
|
CYDEV_CAN0_RX10_BASE EQU 0x4000a1e0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX10_SIZE
|
|
CYDEV_CAN0_RX10_SIZE EQU 0x00000020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX10_CMD
|
|
CYREG_CAN0_RX10_CMD EQU 0x4000a1e0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX10_ID
|
|
CYREG_CAN0_RX10_ID EQU 0x4000a1e4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX10_DH
|
|
CYREG_CAN0_RX10_DH EQU 0x4000a1e8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX10_DL
|
|
CYREG_CAN0_RX10_DL EQU 0x4000a1ec
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX10_AMR
|
|
CYREG_CAN0_RX10_AMR EQU 0x4000a1f0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX10_ACR
|
|
CYREG_CAN0_RX10_ACR EQU 0x4000a1f4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX10_AMRD
|
|
CYREG_CAN0_RX10_AMRD EQU 0x4000a1f8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX10_ACRD
|
|
CYREG_CAN0_RX10_ACRD EQU 0x4000a1fc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX11_BASE
|
|
CYDEV_CAN0_RX11_BASE EQU 0x4000a200
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX11_SIZE
|
|
CYDEV_CAN0_RX11_SIZE EQU 0x00000020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX11_CMD
|
|
CYREG_CAN0_RX11_CMD EQU 0x4000a200
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX11_ID
|
|
CYREG_CAN0_RX11_ID EQU 0x4000a204
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX11_DH
|
|
CYREG_CAN0_RX11_DH EQU 0x4000a208
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX11_DL
|
|
CYREG_CAN0_RX11_DL EQU 0x4000a20c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX11_AMR
|
|
CYREG_CAN0_RX11_AMR EQU 0x4000a210
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX11_ACR
|
|
CYREG_CAN0_RX11_ACR EQU 0x4000a214
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX11_AMRD
|
|
CYREG_CAN0_RX11_AMRD EQU 0x4000a218
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX11_ACRD
|
|
CYREG_CAN0_RX11_ACRD EQU 0x4000a21c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX12_BASE
|
|
CYDEV_CAN0_RX12_BASE EQU 0x4000a220
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX12_SIZE
|
|
CYDEV_CAN0_RX12_SIZE EQU 0x00000020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX12_CMD
|
|
CYREG_CAN0_RX12_CMD EQU 0x4000a220
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX12_ID
|
|
CYREG_CAN0_RX12_ID EQU 0x4000a224
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX12_DH
|
|
CYREG_CAN0_RX12_DH EQU 0x4000a228
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX12_DL
|
|
CYREG_CAN0_RX12_DL EQU 0x4000a22c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX12_AMR
|
|
CYREG_CAN0_RX12_AMR EQU 0x4000a230
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX12_ACR
|
|
CYREG_CAN0_RX12_ACR EQU 0x4000a234
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX12_AMRD
|
|
CYREG_CAN0_RX12_AMRD EQU 0x4000a238
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX12_ACRD
|
|
CYREG_CAN0_RX12_ACRD EQU 0x4000a23c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX13_BASE
|
|
CYDEV_CAN0_RX13_BASE EQU 0x4000a240
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX13_SIZE
|
|
CYDEV_CAN0_RX13_SIZE EQU 0x00000020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX13_CMD
|
|
CYREG_CAN0_RX13_CMD EQU 0x4000a240
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX13_ID
|
|
CYREG_CAN0_RX13_ID EQU 0x4000a244
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX13_DH
|
|
CYREG_CAN0_RX13_DH EQU 0x4000a248
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX13_DL
|
|
CYREG_CAN0_RX13_DL EQU 0x4000a24c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX13_AMR
|
|
CYREG_CAN0_RX13_AMR EQU 0x4000a250
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX13_ACR
|
|
CYREG_CAN0_RX13_ACR EQU 0x4000a254
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX13_AMRD
|
|
CYREG_CAN0_RX13_AMRD EQU 0x4000a258
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX13_ACRD
|
|
CYREG_CAN0_RX13_ACRD EQU 0x4000a25c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX14_BASE
|
|
CYDEV_CAN0_RX14_BASE EQU 0x4000a260
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX14_SIZE
|
|
CYDEV_CAN0_RX14_SIZE EQU 0x00000020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX14_CMD
|
|
CYREG_CAN0_RX14_CMD EQU 0x4000a260
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX14_ID
|
|
CYREG_CAN0_RX14_ID EQU 0x4000a264
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX14_DH
|
|
CYREG_CAN0_RX14_DH EQU 0x4000a268
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX14_DL
|
|
CYREG_CAN0_RX14_DL EQU 0x4000a26c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX14_AMR
|
|
CYREG_CAN0_RX14_AMR EQU 0x4000a270
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX14_ACR
|
|
CYREG_CAN0_RX14_ACR EQU 0x4000a274
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX14_AMRD
|
|
CYREG_CAN0_RX14_AMRD EQU 0x4000a278
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX14_ACRD
|
|
CYREG_CAN0_RX14_ACRD EQU 0x4000a27c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX15_BASE
|
|
CYDEV_CAN0_RX15_BASE EQU 0x4000a280
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CAN0_RX15_SIZE
|
|
CYDEV_CAN0_RX15_SIZE EQU 0x00000020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX15_CMD
|
|
CYREG_CAN0_RX15_CMD EQU 0x4000a280
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX15_ID
|
|
CYREG_CAN0_RX15_ID EQU 0x4000a284
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX15_DH
|
|
CYREG_CAN0_RX15_DH EQU 0x4000a288
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX15_DL
|
|
CYREG_CAN0_RX15_DL EQU 0x4000a28c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX15_AMR
|
|
CYREG_CAN0_RX15_AMR EQU 0x4000a290
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX15_ACR
|
|
CYREG_CAN0_RX15_ACR EQU 0x4000a294
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX15_AMRD
|
|
CYREG_CAN0_RX15_AMRD EQU 0x4000a298
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CAN0_RX15_ACRD
|
|
CYREG_CAN0_RX15_ACRD EQU 0x4000a29c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_DFB0_BASE
|
|
CYDEV_DFB0_BASE EQU 0x4000c000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_DFB0_SIZE
|
|
CYDEV_DFB0_SIZE EQU 0x000007b5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_DFB0_DPA_SRAM_BASE
|
|
CYDEV_DFB0_DPA_SRAM_BASE EQU 0x4000c000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_DFB0_DPA_SRAM_SIZE
|
|
CYDEV_DFB0_DPA_SRAM_SIZE EQU 0x00000200
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_DPA_SRAM_DATA_MBASE
|
|
CYREG_DFB0_DPA_SRAM_DATA_MBASE EQU 0x4000c000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_DPA_SRAM_DATA_MSIZE
|
|
CYREG_DFB0_DPA_SRAM_DATA_MSIZE EQU 0x00000200
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_DFB0_DPB_SRAM_BASE
|
|
CYDEV_DFB0_DPB_SRAM_BASE EQU 0x4000c200
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_DFB0_DPB_SRAM_SIZE
|
|
CYDEV_DFB0_DPB_SRAM_SIZE EQU 0x00000200
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_DPB_SRAM_DATA_MBASE
|
|
CYREG_DFB0_DPB_SRAM_DATA_MBASE EQU 0x4000c200
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_DPB_SRAM_DATA_MSIZE
|
|
CYREG_DFB0_DPB_SRAM_DATA_MSIZE EQU 0x00000200
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_DFB0_CSA_SRAM_BASE
|
|
CYDEV_DFB0_CSA_SRAM_BASE EQU 0x4000c400
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_DFB0_CSA_SRAM_SIZE
|
|
CYDEV_DFB0_CSA_SRAM_SIZE EQU 0x00000100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_CSA_SRAM_DATA_MBASE
|
|
CYREG_DFB0_CSA_SRAM_DATA_MBASE EQU 0x4000c400
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_CSA_SRAM_DATA_MSIZE
|
|
CYREG_DFB0_CSA_SRAM_DATA_MSIZE EQU 0x00000100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_DFB0_CSB_SRAM_BASE
|
|
CYDEV_DFB0_CSB_SRAM_BASE EQU 0x4000c500
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_DFB0_CSB_SRAM_SIZE
|
|
CYDEV_DFB0_CSB_SRAM_SIZE EQU 0x00000100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_CSB_SRAM_DATA_MBASE
|
|
CYREG_DFB0_CSB_SRAM_DATA_MBASE EQU 0x4000c500
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_CSB_SRAM_DATA_MSIZE
|
|
CYREG_DFB0_CSB_SRAM_DATA_MSIZE EQU 0x00000100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_DFB0_FSM_SRAM_BASE
|
|
CYDEV_DFB0_FSM_SRAM_BASE EQU 0x4000c600
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_DFB0_FSM_SRAM_SIZE
|
|
CYDEV_DFB0_FSM_SRAM_SIZE EQU 0x00000100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_FSM_SRAM_DATA_MBASE
|
|
CYREG_DFB0_FSM_SRAM_DATA_MBASE EQU 0x4000c600
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_FSM_SRAM_DATA_MSIZE
|
|
CYREG_DFB0_FSM_SRAM_DATA_MSIZE EQU 0x00000100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_DFB0_ACU_SRAM_BASE
|
|
CYDEV_DFB0_ACU_SRAM_BASE EQU 0x4000c700
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_DFB0_ACU_SRAM_SIZE
|
|
CYDEV_DFB0_ACU_SRAM_SIZE EQU 0x00000040
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_ACU_SRAM_DATA_MBASE
|
|
CYREG_DFB0_ACU_SRAM_DATA_MBASE EQU 0x4000c700
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_ACU_SRAM_DATA_MSIZE
|
|
CYREG_DFB0_ACU_SRAM_DATA_MSIZE EQU 0x00000040
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_CR
|
|
CYREG_DFB0_CR EQU 0x4000c780
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_SR
|
|
CYREG_DFB0_SR EQU 0x4000c784
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_RAM_EN
|
|
CYREG_DFB0_RAM_EN EQU 0x4000c788
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_RAM_DIR
|
|
CYREG_DFB0_RAM_DIR EQU 0x4000c78c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_SEMA
|
|
CYREG_DFB0_SEMA EQU 0x4000c790
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_DSI_CTRL
|
|
CYREG_DFB0_DSI_CTRL EQU 0x4000c794
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_INT_CTRL
|
|
CYREG_DFB0_INT_CTRL EQU 0x4000c798
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_DMA_CTRL
|
|
CYREG_DFB0_DMA_CTRL EQU 0x4000c79c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_STAGEA
|
|
CYREG_DFB0_STAGEA EQU 0x4000c7a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_STAGEAM
|
|
CYREG_DFB0_STAGEAM EQU 0x4000c7a1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_STAGEAH
|
|
CYREG_DFB0_STAGEAH EQU 0x4000c7a2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_STAGEB
|
|
CYREG_DFB0_STAGEB EQU 0x4000c7a4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_STAGEBM
|
|
CYREG_DFB0_STAGEBM EQU 0x4000c7a5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_STAGEBH
|
|
CYREG_DFB0_STAGEBH EQU 0x4000c7a6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_HOLDA
|
|
CYREG_DFB0_HOLDA EQU 0x4000c7a8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_HOLDAM
|
|
CYREG_DFB0_HOLDAM EQU 0x4000c7a9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_HOLDAH
|
|
CYREG_DFB0_HOLDAH EQU 0x4000c7aa
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_HOLDAS
|
|
CYREG_DFB0_HOLDAS EQU 0x4000c7ab
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_HOLDB
|
|
CYREG_DFB0_HOLDB EQU 0x4000c7ac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_HOLDBM
|
|
CYREG_DFB0_HOLDBM EQU 0x4000c7ad
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_HOLDBH
|
|
CYREG_DFB0_HOLDBH EQU 0x4000c7ae
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_HOLDBS
|
|
CYREG_DFB0_HOLDBS EQU 0x4000c7af
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_COHER
|
|
CYREG_DFB0_COHER EQU 0x4000c7b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DFB0_DALIGN
|
|
CYREG_DFB0_DALIGN EQU 0x4000c7b4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_BASE
|
|
CYDEV_UCFG_BASE EQU 0x40010000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_SIZE
|
|
CYDEV_UCFG_SIZE EQU 0x00005040
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_BASE
|
|
CYDEV_UCFG_B0_BASE EQU 0x40010000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_SIZE
|
|
CYDEV_UCFG_B0_SIZE EQU 0x00000fef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P0_BASE
|
|
CYDEV_UCFG_B0_P0_BASE EQU 0x40010000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P0_SIZE
|
|
CYDEV_UCFG_B0_P0_SIZE EQU 0x000001ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_BASE
|
|
CYDEV_UCFG_B0_P0_U0_BASE EQU 0x40010000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_SIZE
|
|
CYDEV_UCFG_B0_P0_U0_SIZE EQU 0x00000070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_IT0
|
|
CYREG_B0_P0_U0_PLD_IT0 EQU 0x40010000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_IT1
|
|
CYREG_B0_P0_U0_PLD_IT1 EQU 0x40010004
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_IT2
|
|
CYREG_B0_P0_U0_PLD_IT2 EQU 0x40010008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_IT3
|
|
CYREG_B0_P0_U0_PLD_IT3 EQU 0x4001000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_IT4
|
|
CYREG_B0_P0_U0_PLD_IT4 EQU 0x40010010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_IT5
|
|
CYREG_B0_P0_U0_PLD_IT5 EQU 0x40010014
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_IT6
|
|
CYREG_B0_P0_U0_PLD_IT6 EQU 0x40010018
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_IT7
|
|
CYREG_B0_P0_U0_PLD_IT7 EQU 0x4001001c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_IT8
|
|
CYREG_B0_P0_U0_PLD_IT8 EQU 0x40010020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_IT9
|
|
CYREG_B0_P0_U0_PLD_IT9 EQU 0x40010024
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_IT10
|
|
CYREG_B0_P0_U0_PLD_IT10 EQU 0x40010028
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_IT11
|
|
CYREG_B0_P0_U0_PLD_IT11 EQU 0x4001002c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_ORT0
|
|
CYREG_B0_P0_U0_PLD_ORT0 EQU 0x40010030
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_ORT1
|
|
CYREG_B0_P0_U0_PLD_ORT1 EQU 0x40010032
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_ORT2
|
|
CYREG_B0_P0_U0_PLD_ORT2 EQU 0x40010034
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_ORT3
|
|
CYREG_B0_P0_U0_PLD_ORT3 EQU 0x40010036
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_MC_CFG_CEN_CONST
|
|
CYREG_B0_P0_U0_MC_CFG_CEN_CONST EQU 0x40010038
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_MC_CFG_XORFB
|
|
CYREG_B0_P0_U0_MC_CFG_XORFB EQU 0x4001003a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_MC_CFG_SET_RESET
|
|
CYREG_B0_P0_U0_MC_CFG_SET_RESET EQU 0x4001003c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_MC_CFG_BYPASS
|
|
CYREG_B0_P0_U0_MC_CFG_BYPASS EQU 0x4001003e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG0
|
|
CYREG_B0_P0_U0_CFG0 EQU 0x40010040
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG1
|
|
CYREG_B0_P0_U0_CFG1 EQU 0x40010041
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG2
|
|
CYREG_B0_P0_U0_CFG2 EQU 0x40010042
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG3
|
|
CYREG_B0_P0_U0_CFG3 EQU 0x40010043
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG4
|
|
CYREG_B0_P0_U0_CFG4 EQU 0x40010044
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG5
|
|
CYREG_B0_P0_U0_CFG5 EQU 0x40010045
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG6
|
|
CYREG_B0_P0_U0_CFG6 EQU 0x40010046
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG7
|
|
CYREG_B0_P0_U0_CFG7 EQU 0x40010047
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG8
|
|
CYREG_B0_P0_U0_CFG8 EQU 0x40010048
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG9
|
|
CYREG_B0_P0_U0_CFG9 EQU 0x40010049
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG10
|
|
CYREG_B0_P0_U0_CFG10 EQU 0x4001004a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG11
|
|
CYREG_B0_P0_U0_CFG11 EQU 0x4001004b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG12
|
|
CYREG_B0_P0_U0_CFG12 EQU 0x4001004c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG13
|
|
CYREG_B0_P0_U0_CFG13 EQU 0x4001004d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG14
|
|
CYREG_B0_P0_U0_CFG14 EQU 0x4001004e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG15
|
|
CYREG_B0_P0_U0_CFG15 EQU 0x4001004f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG16
|
|
CYREG_B0_P0_U0_CFG16 EQU 0x40010050
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG17
|
|
CYREG_B0_P0_U0_CFG17 EQU 0x40010051
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG18
|
|
CYREG_B0_P0_U0_CFG18 EQU 0x40010052
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG19
|
|
CYREG_B0_P0_U0_CFG19 EQU 0x40010053
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG20
|
|
CYREG_B0_P0_U0_CFG20 EQU 0x40010054
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG21
|
|
CYREG_B0_P0_U0_CFG21 EQU 0x40010055
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG22
|
|
CYREG_B0_P0_U0_CFG22 EQU 0x40010056
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG23
|
|
CYREG_B0_P0_U0_CFG23 EQU 0x40010057
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG24
|
|
CYREG_B0_P0_U0_CFG24 EQU 0x40010058
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG25
|
|
CYREG_B0_P0_U0_CFG25 EQU 0x40010059
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG26
|
|
CYREG_B0_P0_U0_CFG26 EQU 0x4001005a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG27
|
|
CYREG_B0_P0_U0_CFG27 EQU 0x4001005b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG28
|
|
CYREG_B0_P0_U0_CFG28 EQU 0x4001005c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG29
|
|
CYREG_B0_P0_U0_CFG29 EQU 0x4001005d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG30
|
|
CYREG_B0_P0_U0_CFG30 EQU 0x4001005e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_CFG31
|
|
CYREG_B0_P0_U0_CFG31 EQU 0x4001005f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_DCFG0
|
|
CYREG_B0_P0_U0_DCFG0 EQU 0x40010060
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_DCFG1
|
|
CYREG_B0_P0_U0_DCFG1 EQU 0x40010062
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_DCFG2
|
|
CYREG_B0_P0_U0_DCFG2 EQU 0x40010064
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_DCFG3
|
|
CYREG_B0_P0_U0_DCFG3 EQU 0x40010066
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_DCFG4
|
|
CYREG_B0_P0_U0_DCFG4 EQU 0x40010068
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_DCFG5
|
|
CYREG_B0_P0_U0_DCFG5 EQU 0x4001006a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_DCFG6
|
|
CYREG_B0_P0_U0_DCFG6 EQU 0x4001006c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U0_DCFG7
|
|
CYREG_B0_P0_U0_DCFG7 EQU 0x4001006e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_BASE
|
|
CYDEV_UCFG_B0_P0_U1_BASE EQU 0x40010080
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_SIZE
|
|
CYDEV_UCFG_B0_P0_U1_SIZE EQU 0x00000070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_IT0
|
|
CYREG_B0_P0_U1_PLD_IT0 EQU 0x40010080
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_IT1
|
|
CYREG_B0_P0_U1_PLD_IT1 EQU 0x40010084
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_IT2
|
|
CYREG_B0_P0_U1_PLD_IT2 EQU 0x40010088
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_IT3
|
|
CYREG_B0_P0_U1_PLD_IT3 EQU 0x4001008c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_IT4
|
|
CYREG_B0_P0_U1_PLD_IT4 EQU 0x40010090
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_IT5
|
|
CYREG_B0_P0_U1_PLD_IT5 EQU 0x40010094
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_IT6
|
|
CYREG_B0_P0_U1_PLD_IT6 EQU 0x40010098
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_IT7
|
|
CYREG_B0_P0_U1_PLD_IT7 EQU 0x4001009c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_IT8
|
|
CYREG_B0_P0_U1_PLD_IT8 EQU 0x400100a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_IT9
|
|
CYREG_B0_P0_U1_PLD_IT9 EQU 0x400100a4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_IT10
|
|
CYREG_B0_P0_U1_PLD_IT10 EQU 0x400100a8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_IT11
|
|
CYREG_B0_P0_U1_PLD_IT11 EQU 0x400100ac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_ORT0
|
|
CYREG_B0_P0_U1_PLD_ORT0 EQU 0x400100b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_ORT1
|
|
CYREG_B0_P0_U1_PLD_ORT1 EQU 0x400100b2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_ORT2
|
|
CYREG_B0_P0_U1_PLD_ORT2 EQU 0x400100b4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_ORT3
|
|
CYREG_B0_P0_U1_PLD_ORT3 EQU 0x400100b6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_MC_CFG_CEN_CONST
|
|
CYREG_B0_P0_U1_MC_CFG_CEN_CONST EQU 0x400100b8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_MC_CFG_XORFB
|
|
CYREG_B0_P0_U1_MC_CFG_XORFB EQU 0x400100ba
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_MC_CFG_SET_RESET
|
|
CYREG_B0_P0_U1_MC_CFG_SET_RESET EQU 0x400100bc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_MC_CFG_BYPASS
|
|
CYREG_B0_P0_U1_MC_CFG_BYPASS EQU 0x400100be
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG0
|
|
CYREG_B0_P0_U1_CFG0 EQU 0x400100c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG1
|
|
CYREG_B0_P0_U1_CFG1 EQU 0x400100c1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG2
|
|
CYREG_B0_P0_U1_CFG2 EQU 0x400100c2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG3
|
|
CYREG_B0_P0_U1_CFG3 EQU 0x400100c3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG4
|
|
CYREG_B0_P0_U1_CFG4 EQU 0x400100c4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG5
|
|
CYREG_B0_P0_U1_CFG5 EQU 0x400100c5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG6
|
|
CYREG_B0_P0_U1_CFG6 EQU 0x400100c6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG7
|
|
CYREG_B0_P0_U1_CFG7 EQU 0x400100c7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG8
|
|
CYREG_B0_P0_U1_CFG8 EQU 0x400100c8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG9
|
|
CYREG_B0_P0_U1_CFG9 EQU 0x400100c9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG10
|
|
CYREG_B0_P0_U1_CFG10 EQU 0x400100ca
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG11
|
|
CYREG_B0_P0_U1_CFG11 EQU 0x400100cb
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG12
|
|
CYREG_B0_P0_U1_CFG12 EQU 0x400100cc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG13
|
|
CYREG_B0_P0_U1_CFG13 EQU 0x400100cd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG14
|
|
CYREG_B0_P0_U1_CFG14 EQU 0x400100ce
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG15
|
|
CYREG_B0_P0_U1_CFG15 EQU 0x400100cf
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG16
|
|
CYREG_B0_P0_U1_CFG16 EQU 0x400100d0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG17
|
|
CYREG_B0_P0_U1_CFG17 EQU 0x400100d1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG18
|
|
CYREG_B0_P0_U1_CFG18 EQU 0x400100d2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG19
|
|
CYREG_B0_P0_U1_CFG19 EQU 0x400100d3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG20
|
|
CYREG_B0_P0_U1_CFG20 EQU 0x400100d4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG21
|
|
CYREG_B0_P0_U1_CFG21 EQU 0x400100d5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG22
|
|
CYREG_B0_P0_U1_CFG22 EQU 0x400100d6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG23
|
|
CYREG_B0_P0_U1_CFG23 EQU 0x400100d7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG24
|
|
CYREG_B0_P0_U1_CFG24 EQU 0x400100d8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG25
|
|
CYREG_B0_P0_U1_CFG25 EQU 0x400100d9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG26
|
|
CYREG_B0_P0_U1_CFG26 EQU 0x400100da
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG27
|
|
CYREG_B0_P0_U1_CFG27 EQU 0x400100db
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG28
|
|
CYREG_B0_P0_U1_CFG28 EQU 0x400100dc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG29
|
|
CYREG_B0_P0_U1_CFG29 EQU 0x400100dd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG30
|
|
CYREG_B0_P0_U1_CFG30 EQU 0x400100de
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_CFG31
|
|
CYREG_B0_P0_U1_CFG31 EQU 0x400100df
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_DCFG0
|
|
CYREG_B0_P0_U1_DCFG0 EQU 0x400100e0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_DCFG1
|
|
CYREG_B0_P0_U1_DCFG1 EQU 0x400100e2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_DCFG2
|
|
CYREG_B0_P0_U1_DCFG2 EQU 0x400100e4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_DCFG3
|
|
CYREG_B0_P0_U1_DCFG3 EQU 0x400100e6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_DCFG4
|
|
CYREG_B0_P0_U1_DCFG4 EQU 0x400100e8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_DCFG5
|
|
CYREG_B0_P0_U1_DCFG5 EQU 0x400100ea
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_DCFG6
|
|
CYREG_B0_P0_U1_DCFG6 EQU 0x400100ec
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P0_U1_DCFG7
|
|
CYREG_B0_P0_U1_DCFG7 EQU 0x400100ee
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P0_ROUTE_BASE
|
|
CYDEV_UCFG_B0_P0_ROUTE_BASE EQU 0x40010100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P0_ROUTE_SIZE
|
|
CYDEV_UCFG_B0_P0_ROUTE_SIZE EQU 0x000000ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P1_BASE
|
|
CYDEV_UCFG_B0_P1_BASE EQU 0x40010200
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P1_SIZE
|
|
CYDEV_UCFG_B0_P1_SIZE EQU 0x000001ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_BASE
|
|
CYDEV_UCFG_B0_P1_U0_BASE EQU 0x40010200
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_SIZE
|
|
CYDEV_UCFG_B0_P1_U0_SIZE EQU 0x00000070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_IT0
|
|
CYREG_B0_P1_U0_PLD_IT0 EQU 0x40010200
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_IT1
|
|
CYREG_B0_P1_U0_PLD_IT1 EQU 0x40010204
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_IT2
|
|
CYREG_B0_P1_U0_PLD_IT2 EQU 0x40010208
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_IT3
|
|
CYREG_B0_P1_U0_PLD_IT3 EQU 0x4001020c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_IT4
|
|
CYREG_B0_P1_U0_PLD_IT4 EQU 0x40010210
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_IT5
|
|
CYREG_B0_P1_U0_PLD_IT5 EQU 0x40010214
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_IT6
|
|
CYREG_B0_P1_U0_PLD_IT6 EQU 0x40010218
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_IT7
|
|
CYREG_B0_P1_U0_PLD_IT7 EQU 0x4001021c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_IT8
|
|
CYREG_B0_P1_U0_PLD_IT8 EQU 0x40010220
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_IT9
|
|
CYREG_B0_P1_U0_PLD_IT9 EQU 0x40010224
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_IT10
|
|
CYREG_B0_P1_U0_PLD_IT10 EQU 0x40010228
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_IT11
|
|
CYREG_B0_P1_U0_PLD_IT11 EQU 0x4001022c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_ORT0
|
|
CYREG_B0_P1_U0_PLD_ORT0 EQU 0x40010230
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_ORT1
|
|
CYREG_B0_P1_U0_PLD_ORT1 EQU 0x40010232
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_ORT2
|
|
CYREG_B0_P1_U0_PLD_ORT2 EQU 0x40010234
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_ORT3
|
|
CYREG_B0_P1_U0_PLD_ORT3 EQU 0x40010236
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_MC_CFG_CEN_CONST
|
|
CYREG_B0_P1_U0_MC_CFG_CEN_CONST EQU 0x40010238
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_MC_CFG_XORFB
|
|
CYREG_B0_P1_U0_MC_CFG_XORFB EQU 0x4001023a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_MC_CFG_SET_RESET
|
|
CYREG_B0_P1_U0_MC_CFG_SET_RESET EQU 0x4001023c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_MC_CFG_BYPASS
|
|
CYREG_B0_P1_U0_MC_CFG_BYPASS EQU 0x4001023e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG0
|
|
CYREG_B0_P1_U0_CFG0 EQU 0x40010240
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG1
|
|
CYREG_B0_P1_U0_CFG1 EQU 0x40010241
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG2
|
|
CYREG_B0_P1_U0_CFG2 EQU 0x40010242
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG3
|
|
CYREG_B0_P1_U0_CFG3 EQU 0x40010243
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG4
|
|
CYREG_B0_P1_U0_CFG4 EQU 0x40010244
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG5
|
|
CYREG_B0_P1_U0_CFG5 EQU 0x40010245
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG6
|
|
CYREG_B0_P1_U0_CFG6 EQU 0x40010246
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG7
|
|
CYREG_B0_P1_U0_CFG7 EQU 0x40010247
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG8
|
|
CYREG_B0_P1_U0_CFG8 EQU 0x40010248
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG9
|
|
CYREG_B0_P1_U0_CFG9 EQU 0x40010249
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG10
|
|
CYREG_B0_P1_U0_CFG10 EQU 0x4001024a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG11
|
|
CYREG_B0_P1_U0_CFG11 EQU 0x4001024b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG12
|
|
CYREG_B0_P1_U0_CFG12 EQU 0x4001024c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG13
|
|
CYREG_B0_P1_U0_CFG13 EQU 0x4001024d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG14
|
|
CYREG_B0_P1_U0_CFG14 EQU 0x4001024e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG15
|
|
CYREG_B0_P1_U0_CFG15 EQU 0x4001024f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG16
|
|
CYREG_B0_P1_U0_CFG16 EQU 0x40010250
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG17
|
|
CYREG_B0_P1_U0_CFG17 EQU 0x40010251
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG18
|
|
CYREG_B0_P1_U0_CFG18 EQU 0x40010252
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG19
|
|
CYREG_B0_P1_U0_CFG19 EQU 0x40010253
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG20
|
|
CYREG_B0_P1_U0_CFG20 EQU 0x40010254
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG21
|
|
CYREG_B0_P1_U0_CFG21 EQU 0x40010255
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG22
|
|
CYREG_B0_P1_U0_CFG22 EQU 0x40010256
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG23
|
|
CYREG_B0_P1_U0_CFG23 EQU 0x40010257
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG24
|
|
CYREG_B0_P1_U0_CFG24 EQU 0x40010258
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG25
|
|
CYREG_B0_P1_U0_CFG25 EQU 0x40010259
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG26
|
|
CYREG_B0_P1_U0_CFG26 EQU 0x4001025a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG27
|
|
CYREG_B0_P1_U0_CFG27 EQU 0x4001025b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG28
|
|
CYREG_B0_P1_U0_CFG28 EQU 0x4001025c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG29
|
|
CYREG_B0_P1_U0_CFG29 EQU 0x4001025d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG30
|
|
CYREG_B0_P1_U0_CFG30 EQU 0x4001025e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_CFG31
|
|
CYREG_B0_P1_U0_CFG31 EQU 0x4001025f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_DCFG0
|
|
CYREG_B0_P1_U0_DCFG0 EQU 0x40010260
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_DCFG1
|
|
CYREG_B0_P1_U0_DCFG1 EQU 0x40010262
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_DCFG2
|
|
CYREG_B0_P1_U0_DCFG2 EQU 0x40010264
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_DCFG3
|
|
CYREG_B0_P1_U0_DCFG3 EQU 0x40010266
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_DCFG4
|
|
CYREG_B0_P1_U0_DCFG4 EQU 0x40010268
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_DCFG5
|
|
CYREG_B0_P1_U0_DCFG5 EQU 0x4001026a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_DCFG6
|
|
CYREG_B0_P1_U0_DCFG6 EQU 0x4001026c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U0_DCFG7
|
|
CYREG_B0_P1_U0_DCFG7 EQU 0x4001026e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_BASE
|
|
CYDEV_UCFG_B0_P1_U1_BASE EQU 0x40010280
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_SIZE
|
|
CYDEV_UCFG_B0_P1_U1_SIZE EQU 0x00000070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_IT0
|
|
CYREG_B0_P1_U1_PLD_IT0 EQU 0x40010280
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_IT1
|
|
CYREG_B0_P1_U1_PLD_IT1 EQU 0x40010284
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_IT2
|
|
CYREG_B0_P1_U1_PLD_IT2 EQU 0x40010288
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_IT3
|
|
CYREG_B0_P1_U1_PLD_IT3 EQU 0x4001028c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_IT4
|
|
CYREG_B0_P1_U1_PLD_IT4 EQU 0x40010290
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_IT5
|
|
CYREG_B0_P1_U1_PLD_IT5 EQU 0x40010294
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_IT6
|
|
CYREG_B0_P1_U1_PLD_IT6 EQU 0x40010298
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_IT7
|
|
CYREG_B0_P1_U1_PLD_IT7 EQU 0x4001029c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_IT8
|
|
CYREG_B0_P1_U1_PLD_IT8 EQU 0x400102a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_IT9
|
|
CYREG_B0_P1_U1_PLD_IT9 EQU 0x400102a4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_IT10
|
|
CYREG_B0_P1_U1_PLD_IT10 EQU 0x400102a8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_IT11
|
|
CYREG_B0_P1_U1_PLD_IT11 EQU 0x400102ac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_ORT0
|
|
CYREG_B0_P1_U1_PLD_ORT0 EQU 0x400102b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_ORT1
|
|
CYREG_B0_P1_U1_PLD_ORT1 EQU 0x400102b2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_ORT2
|
|
CYREG_B0_P1_U1_PLD_ORT2 EQU 0x400102b4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_ORT3
|
|
CYREG_B0_P1_U1_PLD_ORT3 EQU 0x400102b6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_MC_CFG_CEN_CONST
|
|
CYREG_B0_P1_U1_MC_CFG_CEN_CONST EQU 0x400102b8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_MC_CFG_XORFB
|
|
CYREG_B0_P1_U1_MC_CFG_XORFB EQU 0x400102ba
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_MC_CFG_SET_RESET
|
|
CYREG_B0_P1_U1_MC_CFG_SET_RESET EQU 0x400102bc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_MC_CFG_BYPASS
|
|
CYREG_B0_P1_U1_MC_CFG_BYPASS EQU 0x400102be
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG0
|
|
CYREG_B0_P1_U1_CFG0 EQU 0x400102c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG1
|
|
CYREG_B0_P1_U1_CFG1 EQU 0x400102c1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG2
|
|
CYREG_B0_P1_U1_CFG2 EQU 0x400102c2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG3
|
|
CYREG_B0_P1_U1_CFG3 EQU 0x400102c3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG4
|
|
CYREG_B0_P1_U1_CFG4 EQU 0x400102c4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG5
|
|
CYREG_B0_P1_U1_CFG5 EQU 0x400102c5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG6
|
|
CYREG_B0_P1_U1_CFG6 EQU 0x400102c6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG7
|
|
CYREG_B0_P1_U1_CFG7 EQU 0x400102c7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG8
|
|
CYREG_B0_P1_U1_CFG8 EQU 0x400102c8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG9
|
|
CYREG_B0_P1_U1_CFG9 EQU 0x400102c9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG10
|
|
CYREG_B0_P1_U1_CFG10 EQU 0x400102ca
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG11
|
|
CYREG_B0_P1_U1_CFG11 EQU 0x400102cb
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG12
|
|
CYREG_B0_P1_U1_CFG12 EQU 0x400102cc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG13
|
|
CYREG_B0_P1_U1_CFG13 EQU 0x400102cd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG14
|
|
CYREG_B0_P1_U1_CFG14 EQU 0x400102ce
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG15
|
|
CYREG_B0_P1_U1_CFG15 EQU 0x400102cf
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG16
|
|
CYREG_B0_P1_U1_CFG16 EQU 0x400102d0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG17
|
|
CYREG_B0_P1_U1_CFG17 EQU 0x400102d1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG18
|
|
CYREG_B0_P1_U1_CFG18 EQU 0x400102d2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG19
|
|
CYREG_B0_P1_U1_CFG19 EQU 0x400102d3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG20
|
|
CYREG_B0_P1_U1_CFG20 EQU 0x400102d4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG21
|
|
CYREG_B0_P1_U1_CFG21 EQU 0x400102d5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG22
|
|
CYREG_B0_P1_U1_CFG22 EQU 0x400102d6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG23
|
|
CYREG_B0_P1_U1_CFG23 EQU 0x400102d7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG24
|
|
CYREG_B0_P1_U1_CFG24 EQU 0x400102d8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG25
|
|
CYREG_B0_P1_U1_CFG25 EQU 0x400102d9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG26
|
|
CYREG_B0_P1_U1_CFG26 EQU 0x400102da
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG27
|
|
CYREG_B0_P1_U1_CFG27 EQU 0x400102db
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG28
|
|
CYREG_B0_P1_U1_CFG28 EQU 0x400102dc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG29
|
|
CYREG_B0_P1_U1_CFG29 EQU 0x400102dd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG30
|
|
CYREG_B0_P1_U1_CFG30 EQU 0x400102de
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_CFG31
|
|
CYREG_B0_P1_U1_CFG31 EQU 0x400102df
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_DCFG0
|
|
CYREG_B0_P1_U1_DCFG0 EQU 0x400102e0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_DCFG1
|
|
CYREG_B0_P1_U1_DCFG1 EQU 0x400102e2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_DCFG2
|
|
CYREG_B0_P1_U1_DCFG2 EQU 0x400102e4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_DCFG3
|
|
CYREG_B0_P1_U1_DCFG3 EQU 0x400102e6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_DCFG4
|
|
CYREG_B0_P1_U1_DCFG4 EQU 0x400102e8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_DCFG5
|
|
CYREG_B0_P1_U1_DCFG5 EQU 0x400102ea
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_DCFG6
|
|
CYREG_B0_P1_U1_DCFG6 EQU 0x400102ec
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P1_U1_DCFG7
|
|
CYREG_B0_P1_U1_DCFG7 EQU 0x400102ee
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P1_ROUTE_BASE
|
|
CYDEV_UCFG_B0_P1_ROUTE_BASE EQU 0x40010300
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P1_ROUTE_SIZE
|
|
CYDEV_UCFG_B0_P1_ROUTE_SIZE EQU 0x000000ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P2_BASE
|
|
CYDEV_UCFG_B0_P2_BASE EQU 0x40010400
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P2_SIZE
|
|
CYDEV_UCFG_B0_P2_SIZE EQU 0x000001ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_BASE
|
|
CYDEV_UCFG_B0_P2_U0_BASE EQU 0x40010400
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_SIZE
|
|
CYDEV_UCFG_B0_P2_U0_SIZE EQU 0x00000070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_IT0
|
|
CYREG_B0_P2_U0_PLD_IT0 EQU 0x40010400
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_IT1
|
|
CYREG_B0_P2_U0_PLD_IT1 EQU 0x40010404
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_IT2
|
|
CYREG_B0_P2_U0_PLD_IT2 EQU 0x40010408
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_IT3
|
|
CYREG_B0_P2_U0_PLD_IT3 EQU 0x4001040c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_IT4
|
|
CYREG_B0_P2_U0_PLD_IT4 EQU 0x40010410
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_IT5
|
|
CYREG_B0_P2_U0_PLD_IT5 EQU 0x40010414
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_IT6
|
|
CYREG_B0_P2_U0_PLD_IT6 EQU 0x40010418
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_IT7
|
|
CYREG_B0_P2_U0_PLD_IT7 EQU 0x4001041c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_IT8
|
|
CYREG_B0_P2_U0_PLD_IT8 EQU 0x40010420
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_IT9
|
|
CYREG_B0_P2_U0_PLD_IT9 EQU 0x40010424
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_IT10
|
|
CYREG_B0_P2_U0_PLD_IT10 EQU 0x40010428
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_IT11
|
|
CYREG_B0_P2_U0_PLD_IT11 EQU 0x4001042c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_ORT0
|
|
CYREG_B0_P2_U0_PLD_ORT0 EQU 0x40010430
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_ORT1
|
|
CYREG_B0_P2_U0_PLD_ORT1 EQU 0x40010432
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_ORT2
|
|
CYREG_B0_P2_U0_PLD_ORT2 EQU 0x40010434
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_ORT3
|
|
CYREG_B0_P2_U0_PLD_ORT3 EQU 0x40010436
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_MC_CFG_CEN_CONST
|
|
CYREG_B0_P2_U0_MC_CFG_CEN_CONST EQU 0x40010438
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_MC_CFG_XORFB
|
|
CYREG_B0_P2_U0_MC_CFG_XORFB EQU 0x4001043a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_MC_CFG_SET_RESET
|
|
CYREG_B0_P2_U0_MC_CFG_SET_RESET EQU 0x4001043c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_MC_CFG_BYPASS
|
|
CYREG_B0_P2_U0_MC_CFG_BYPASS EQU 0x4001043e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG0
|
|
CYREG_B0_P2_U0_CFG0 EQU 0x40010440
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG1
|
|
CYREG_B0_P2_U0_CFG1 EQU 0x40010441
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG2
|
|
CYREG_B0_P2_U0_CFG2 EQU 0x40010442
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG3
|
|
CYREG_B0_P2_U0_CFG3 EQU 0x40010443
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG4
|
|
CYREG_B0_P2_U0_CFG4 EQU 0x40010444
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG5
|
|
CYREG_B0_P2_U0_CFG5 EQU 0x40010445
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG6
|
|
CYREG_B0_P2_U0_CFG6 EQU 0x40010446
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG7
|
|
CYREG_B0_P2_U0_CFG7 EQU 0x40010447
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG8
|
|
CYREG_B0_P2_U0_CFG8 EQU 0x40010448
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG9
|
|
CYREG_B0_P2_U0_CFG9 EQU 0x40010449
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG10
|
|
CYREG_B0_P2_U0_CFG10 EQU 0x4001044a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG11
|
|
CYREG_B0_P2_U0_CFG11 EQU 0x4001044b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG12
|
|
CYREG_B0_P2_U0_CFG12 EQU 0x4001044c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG13
|
|
CYREG_B0_P2_U0_CFG13 EQU 0x4001044d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG14
|
|
CYREG_B0_P2_U0_CFG14 EQU 0x4001044e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG15
|
|
CYREG_B0_P2_U0_CFG15 EQU 0x4001044f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG16
|
|
CYREG_B0_P2_U0_CFG16 EQU 0x40010450
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG17
|
|
CYREG_B0_P2_U0_CFG17 EQU 0x40010451
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG18
|
|
CYREG_B0_P2_U0_CFG18 EQU 0x40010452
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG19
|
|
CYREG_B0_P2_U0_CFG19 EQU 0x40010453
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG20
|
|
CYREG_B0_P2_U0_CFG20 EQU 0x40010454
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG21
|
|
CYREG_B0_P2_U0_CFG21 EQU 0x40010455
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG22
|
|
CYREG_B0_P2_U0_CFG22 EQU 0x40010456
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG23
|
|
CYREG_B0_P2_U0_CFG23 EQU 0x40010457
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG24
|
|
CYREG_B0_P2_U0_CFG24 EQU 0x40010458
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG25
|
|
CYREG_B0_P2_U0_CFG25 EQU 0x40010459
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG26
|
|
CYREG_B0_P2_U0_CFG26 EQU 0x4001045a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG27
|
|
CYREG_B0_P2_U0_CFG27 EQU 0x4001045b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG28
|
|
CYREG_B0_P2_U0_CFG28 EQU 0x4001045c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG29
|
|
CYREG_B0_P2_U0_CFG29 EQU 0x4001045d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG30
|
|
CYREG_B0_P2_U0_CFG30 EQU 0x4001045e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_CFG31
|
|
CYREG_B0_P2_U0_CFG31 EQU 0x4001045f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_DCFG0
|
|
CYREG_B0_P2_U0_DCFG0 EQU 0x40010460
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_DCFG1
|
|
CYREG_B0_P2_U0_DCFG1 EQU 0x40010462
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_DCFG2
|
|
CYREG_B0_P2_U0_DCFG2 EQU 0x40010464
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_DCFG3
|
|
CYREG_B0_P2_U0_DCFG3 EQU 0x40010466
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_DCFG4
|
|
CYREG_B0_P2_U0_DCFG4 EQU 0x40010468
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_DCFG5
|
|
CYREG_B0_P2_U0_DCFG5 EQU 0x4001046a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_DCFG6
|
|
CYREG_B0_P2_U0_DCFG6 EQU 0x4001046c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U0_DCFG7
|
|
CYREG_B0_P2_U0_DCFG7 EQU 0x4001046e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_BASE
|
|
CYDEV_UCFG_B0_P2_U1_BASE EQU 0x40010480
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_SIZE
|
|
CYDEV_UCFG_B0_P2_U1_SIZE EQU 0x00000070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_IT0
|
|
CYREG_B0_P2_U1_PLD_IT0 EQU 0x40010480
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_IT1
|
|
CYREG_B0_P2_U1_PLD_IT1 EQU 0x40010484
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_IT2
|
|
CYREG_B0_P2_U1_PLD_IT2 EQU 0x40010488
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_IT3
|
|
CYREG_B0_P2_U1_PLD_IT3 EQU 0x4001048c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_IT4
|
|
CYREG_B0_P2_U1_PLD_IT4 EQU 0x40010490
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_IT5
|
|
CYREG_B0_P2_U1_PLD_IT5 EQU 0x40010494
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_IT6
|
|
CYREG_B0_P2_U1_PLD_IT6 EQU 0x40010498
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_IT7
|
|
CYREG_B0_P2_U1_PLD_IT7 EQU 0x4001049c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_IT8
|
|
CYREG_B0_P2_U1_PLD_IT8 EQU 0x400104a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_IT9
|
|
CYREG_B0_P2_U1_PLD_IT9 EQU 0x400104a4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_IT10
|
|
CYREG_B0_P2_U1_PLD_IT10 EQU 0x400104a8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_IT11
|
|
CYREG_B0_P2_U1_PLD_IT11 EQU 0x400104ac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_ORT0
|
|
CYREG_B0_P2_U1_PLD_ORT0 EQU 0x400104b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_ORT1
|
|
CYREG_B0_P2_U1_PLD_ORT1 EQU 0x400104b2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_ORT2
|
|
CYREG_B0_P2_U1_PLD_ORT2 EQU 0x400104b4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_ORT3
|
|
CYREG_B0_P2_U1_PLD_ORT3 EQU 0x400104b6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_MC_CFG_CEN_CONST
|
|
CYREG_B0_P2_U1_MC_CFG_CEN_CONST EQU 0x400104b8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_MC_CFG_XORFB
|
|
CYREG_B0_P2_U1_MC_CFG_XORFB EQU 0x400104ba
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_MC_CFG_SET_RESET
|
|
CYREG_B0_P2_U1_MC_CFG_SET_RESET EQU 0x400104bc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_MC_CFG_BYPASS
|
|
CYREG_B0_P2_U1_MC_CFG_BYPASS EQU 0x400104be
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG0
|
|
CYREG_B0_P2_U1_CFG0 EQU 0x400104c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG1
|
|
CYREG_B0_P2_U1_CFG1 EQU 0x400104c1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG2
|
|
CYREG_B0_P2_U1_CFG2 EQU 0x400104c2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG3
|
|
CYREG_B0_P2_U1_CFG3 EQU 0x400104c3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG4
|
|
CYREG_B0_P2_U1_CFG4 EQU 0x400104c4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG5
|
|
CYREG_B0_P2_U1_CFG5 EQU 0x400104c5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG6
|
|
CYREG_B0_P2_U1_CFG6 EQU 0x400104c6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG7
|
|
CYREG_B0_P2_U1_CFG7 EQU 0x400104c7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG8
|
|
CYREG_B0_P2_U1_CFG8 EQU 0x400104c8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG9
|
|
CYREG_B0_P2_U1_CFG9 EQU 0x400104c9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG10
|
|
CYREG_B0_P2_U1_CFG10 EQU 0x400104ca
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG11
|
|
CYREG_B0_P2_U1_CFG11 EQU 0x400104cb
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG12
|
|
CYREG_B0_P2_U1_CFG12 EQU 0x400104cc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG13
|
|
CYREG_B0_P2_U1_CFG13 EQU 0x400104cd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG14
|
|
CYREG_B0_P2_U1_CFG14 EQU 0x400104ce
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG15
|
|
CYREG_B0_P2_U1_CFG15 EQU 0x400104cf
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG16
|
|
CYREG_B0_P2_U1_CFG16 EQU 0x400104d0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG17
|
|
CYREG_B0_P2_U1_CFG17 EQU 0x400104d1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG18
|
|
CYREG_B0_P2_U1_CFG18 EQU 0x400104d2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG19
|
|
CYREG_B0_P2_U1_CFG19 EQU 0x400104d3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG20
|
|
CYREG_B0_P2_U1_CFG20 EQU 0x400104d4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG21
|
|
CYREG_B0_P2_U1_CFG21 EQU 0x400104d5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG22
|
|
CYREG_B0_P2_U1_CFG22 EQU 0x400104d6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG23
|
|
CYREG_B0_P2_U1_CFG23 EQU 0x400104d7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG24
|
|
CYREG_B0_P2_U1_CFG24 EQU 0x400104d8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG25
|
|
CYREG_B0_P2_U1_CFG25 EQU 0x400104d9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG26
|
|
CYREG_B0_P2_U1_CFG26 EQU 0x400104da
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG27
|
|
CYREG_B0_P2_U1_CFG27 EQU 0x400104db
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG28
|
|
CYREG_B0_P2_U1_CFG28 EQU 0x400104dc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG29
|
|
CYREG_B0_P2_U1_CFG29 EQU 0x400104dd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG30
|
|
CYREG_B0_P2_U1_CFG30 EQU 0x400104de
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_CFG31
|
|
CYREG_B0_P2_U1_CFG31 EQU 0x400104df
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_DCFG0
|
|
CYREG_B0_P2_U1_DCFG0 EQU 0x400104e0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_DCFG1
|
|
CYREG_B0_P2_U1_DCFG1 EQU 0x400104e2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_DCFG2
|
|
CYREG_B0_P2_U1_DCFG2 EQU 0x400104e4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_DCFG3
|
|
CYREG_B0_P2_U1_DCFG3 EQU 0x400104e6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_DCFG4
|
|
CYREG_B0_P2_U1_DCFG4 EQU 0x400104e8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_DCFG5
|
|
CYREG_B0_P2_U1_DCFG5 EQU 0x400104ea
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_DCFG6
|
|
CYREG_B0_P2_U1_DCFG6 EQU 0x400104ec
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P2_U1_DCFG7
|
|
CYREG_B0_P2_U1_DCFG7 EQU 0x400104ee
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P2_ROUTE_BASE
|
|
CYDEV_UCFG_B0_P2_ROUTE_BASE EQU 0x40010500
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P2_ROUTE_SIZE
|
|
CYDEV_UCFG_B0_P2_ROUTE_SIZE EQU 0x000000ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P3_BASE
|
|
CYDEV_UCFG_B0_P3_BASE EQU 0x40010600
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P3_SIZE
|
|
CYDEV_UCFG_B0_P3_SIZE EQU 0x000001ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_BASE
|
|
CYDEV_UCFG_B0_P3_U0_BASE EQU 0x40010600
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_SIZE
|
|
CYDEV_UCFG_B0_P3_U0_SIZE EQU 0x00000070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_IT0
|
|
CYREG_B0_P3_U0_PLD_IT0 EQU 0x40010600
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_IT1
|
|
CYREG_B0_P3_U0_PLD_IT1 EQU 0x40010604
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_IT2
|
|
CYREG_B0_P3_U0_PLD_IT2 EQU 0x40010608
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_IT3
|
|
CYREG_B0_P3_U0_PLD_IT3 EQU 0x4001060c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_IT4
|
|
CYREG_B0_P3_U0_PLD_IT4 EQU 0x40010610
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_IT5
|
|
CYREG_B0_P3_U0_PLD_IT5 EQU 0x40010614
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_IT6
|
|
CYREG_B0_P3_U0_PLD_IT6 EQU 0x40010618
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_IT7
|
|
CYREG_B0_P3_U0_PLD_IT7 EQU 0x4001061c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_IT8
|
|
CYREG_B0_P3_U0_PLD_IT8 EQU 0x40010620
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_IT9
|
|
CYREG_B0_P3_U0_PLD_IT9 EQU 0x40010624
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_IT10
|
|
CYREG_B0_P3_U0_PLD_IT10 EQU 0x40010628
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_IT11
|
|
CYREG_B0_P3_U0_PLD_IT11 EQU 0x4001062c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_ORT0
|
|
CYREG_B0_P3_U0_PLD_ORT0 EQU 0x40010630
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_ORT1
|
|
CYREG_B0_P3_U0_PLD_ORT1 EQU 0x40010632
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_ORT2
|
|
CYREG_B0_P3_U0_PLD_ORT2 EQU 0x40010634
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_ORT3
|
|
CYREG_B0_P3_U0_PLD_ORT3 EQU 0x40010636
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_MC_CFG_CEN_CONST
|
|
CYREG_B0_P3_U0_MC_CFG_CEN_CONST EQU 0x40010638
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_MC_CFG_XORFB
|
|
CYREG_B0_P3_U0_MC_CFG_XORFB EQU 0x4001063a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_MC_CFG_SET_RESET
|
|
CYREG_B0_P3_U0_MC_CFG_SET_RESET EQU 0x4001063c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_MC_CFG_BYPASS
|
|
CYREG_B0_P3_U0_MC_CFG_BYPASS EQU 0x4001063e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG0
|
|
CYREG_B0_P3_U0_CFG0 EQU 0x40010640
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG1
|
|
CYREG_B0_P3_U0_CFG1 EQU 0x40010641
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG2
|
|
CYREG_B0_P3_U0_CFG2 EQU 0x40010642
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG3
|
|
CYREG_B0_P3_U0_CFG3 EQU 0x40010643
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG4
|
|
CYREG_B0_P3_U0_CFG4 EQU 0x40010644
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG5
|
|
CYREG_B0_P3_U0_CFG5 EQU 0x40010645
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG6
|
|
CYREG_B0_P3_U0_CFG6 EQU 0x40010646
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG7
|
|
CYREG_B0_P3_U0_CFG7 EQU 0x40010647
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG8
|
|
CYREG_B0_P3_U0_CFG8 EQU 0x40010648
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG9
|
|
CYREG_B0_P3_U0_CFG9 EQU 0x40010649
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG10
|
|
CYREG_B0_P3_U0_CFG10 EQU 0x4001064a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG11
|
|
CYREG_B0_P3_U0_CFG11 EQU 0x4001064b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG12
|
|
CYREG_B0_P3_U0_CFG12 EQU 0x4001064c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG13
|
|
CYREG_B0_P3_U0_CFG13 EQU 0x4001064d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG14
|
|
CYREG_B0_P3_U0_CFG14 EQU 0x4001064e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG15
|
|
CYREG_B0_P3_U0_CFG15 EQU 0x4001064f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG16
|
|
CYREG_B0_P3_U0_CFG16 EQU 0x40010650
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG17
|
|
CYREG_B0_P3_U0_CFG17 EQU 0x40010651
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG18
|
|
CYREG_B0_P3_U0_CFG18 EQU 0x40010652
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG19
|
|
CYREG_B0_P3_U0_CFG19 EQU 0x40010653
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG20
|
|
CYREG_B0_P3_U0_CFG20 EQU 0x40010654
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG21
|
|
CYREG_B0_P3_U0_CFG21 EQU 0x40010655
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG22
|
|
CYREG_B0_P3_U0_CFG22 EQU 0x40010656
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG23
|
|
CYREG_B0_P3_U0_CFG23 EQU 0x40010657
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG24
|
|
CYREG_B0_P3_U0_CFG24 EQU 0x40010658
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG25
|
|
CYREG_B0_P3_U0_CFG25 EQU 0x40010659
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG26
|
|
CYREG_B0_P3_U0_CFG26 EQU 0x4001065a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG27
|
|
CYREG_B0_P3_U0_CFG27 EQU 0x4001065b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG28
|
|
CYREG_B0_P3_U0_CFG28 EQU 0x4001065c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG29
|
|
CYREG_B0_P3_U0_CFG29 EQU 0x4001065d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG30
|
|
CYREG_B0_P3_U0_CFG30 EQU 0x4001065e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_CFG31
|
|
CYREG_B0_P3_U0_CFG31 EQU 0x4001065f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_DCFG0
|
|
CYREG_B0_P3_U0_DCFG0 EQU 0x40010660
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_DCFG1
|
|
CYREG_B0_P3_U0_DCFG1 EQU 0x40010662
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_DCFG2
|
|
CYREG_B0_P3_U0_DCFG2 EQU 0x40010664
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_DCFG3
|
|
CYREG_B0_P3_U0_DCFG3 EQU 0x40010666
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_DCFG4
|
|
CYREG_B0_P3_U0_DCFG4 EQU 0x40010668
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_DCFG5
|
|
CYREG_B0_P3_U0_DCFG5 EQU 0x4001066a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_DCFG6
|
|
CYREG_B0_P3_U0_DCFG6 EQU 0x4001066c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U0_DCFG7
|
|
CYREG_B0_P3_U0_DCFG7 EQU 0x4001066e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_BASE
|
|
CYDEV_UCFG_B0_P3_U1_BASE EQU 0x40010680
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_SIZE
|
|
CYDEV_UCFG_B0_P3_U1_SIZE EQU 0x00000070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_IT0
|
|
CYREG_B0_P3_U1_PLD_IT0 EQU 0x40010680
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_IT1
|
|
CYREG_B0_P3_U1_PLD_IT1 EQU 0x40010684
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_IT2
|
|
CYREG_B0_P3_U1_PLD_IT2 EQU 0x40010688
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_IT3
|
|
CYREG_B0_P3_U1_PLD_IT3 EQU 0x4001068c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_IT4
|
|
CYREG_B0_P3_U1_PLD_IT4 EQU 0x40010690
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_IT5
|
|
CYREG_B0_P3_U1_PLD_IT5 EQU 0x40010694
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_IT6
|
|
CYREG_B0_P3_U1_PLD_IT6 EQU 0x40010698
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_IT7
|
|
CYREG_B0_P3_U1_PLD_IT7 EQU 0x4001069c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_IT8
|
|
CYREG_B0_P3_U1_PLD_IT8 EQU 0x400106a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_IT9
|
|
CYREG_B0_P3_U1_PLD_IT9 EQU 0x400106a4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_IT10
|
|
CYREG_B0_P3_U1_PLD_IT10 EQU 0x400106a8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_IT11
|
|
CYREG_B0_P3_U1_PLD_IT11 EQU 0x400106ac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_ORT0
|
|
CYREG_B0_P3_U1_PLD_ORT0 EQU 0x400106b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_ORT1
|
|
CYREG_B0_P3_U1_PLD_ORT1 EQU 0x400106b2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_ORT2
|
|
CYREG_B0_P3_U1_PLD_ORT2 EQU 0x400106b4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_ORT3
|
|
CYREG_B0_P3_U1_PLD_ORT3 EQU 0x400106b6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_MC_CFG_CEN_CONST
|
|
CYREG_B0_P3_U1_MC_CFG_CEN_CONST EQU 0x400106b8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_MC_CFG_XORFB
|
|
CYREG_B0_P3_U1_MC_CFG_XORFB EQU 0x400106ba
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_MC_CFG_SET_RESET
|
|
CYREG_B0_P3_U1_MC_CFG_SET_RESET EQU 0x400106bc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_MC_CFG_BYPASS
|
|
CYREG_B0_P3_U1_MC_CFG_BYPASS EQU 0x400106be
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG0
|
|
CYREG_B0_P3_U1_CFG0 EQU 0x400106c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG1
|
|
CYREG_B0_P3_U1_CFG1 EQU 0x400106c1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG2
|
|
CYREG_B0_P3_U1_CFG2 EQU 0x400106c2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG3
|
|
CYREG_B0_P3_U1_CFG3 EQU 0x400106c3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG4
|
|
CYREG_B0_P3_U1_CFG4 EQU 0x400106c4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG5
|
|
CYREG_B0_P3_U1_CFG5 EQU 0x400106c5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG6
|
|
CYREG_B0_P3_U1_CFG6 EQU 0x400106c6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG7
|
|
CYREG_B0_P3_U1_CFG7 EQU 0x400106c7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG8
|
|
CYREG_B0_P3_U1_CFG8 EQU 0x400106c8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG9
|
|
CYREG_B0_P3_U1_CFG9 EQU 0x400106c9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG10
|
|
CYREG_B0_P3_U1_CFG10 EQU 0x400106ca
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG11
|
|
CYREG_B0_P3_U1_CFG11 EQU 0x400106cb
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG12
|
|
CYREG_B0_P3_U1_CFG12 EQU 0x400106cc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG13
|
|
CYREG_B0_P3_U1_CFG13 EQU 0x400106cd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG14
|
|
CYREG_B0_P3_U1_CFG14 EQU 0x400106ce
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG15
|
|
CYREG_B0_P3_U1_CFG15 EQU 0x400106cf
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG16
|
|
CYREG_B0_P3_U1_CFG16 EQU 0x400106d0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG17
|
|
CYREG_B0_P3_U1_CFG17 EQU 0x400106d1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG18
|
|
CYREG_B0_P3_U1_CFG18 EQU 0x400106d2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG19
|
|
CYREG_B0_P3_U1_CFG19 EQU 0x400106d3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG20
|
|
CYREG_B0_P3_U1_CFG20 EQU 0x400106d4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG21
|
|
CYREG_B0_P3_U1_CFG21 EQU 0x400106d5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG22
|
|
CYREG_B0_P3_U1_CFG22 EQU 0x400106d6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG23
|
|
CYREG_B0_P3_U1_CFG23 EQU 0x400106d7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG24
|
|
CYREG_B0_P3_U1_CFG24 EQU 0x400106d8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG25
|
|
CYREG_B0_P3_U1_CFG25 EQU 0x400106d9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG26
|
|
CYREG_B0_P3_U1_CFG26 EQU 0x400106da
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG27
|
|
CYREG_B0_P3_U1_CFG27 EQU 0x400106db
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG28
|
|
CYREG_B0_P3_U1_CFG28 EQU 0x400106dc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG29
|
|
CYREG_B0_P3_U1_CFG29 EQU 0x400106dd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG30
|
|
CYREG_B0_P3_U1_CFG30 EQU 0x400106de
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_CFG31
|
|
CYREG_B0_P3_U1_CFG31 EQU 0x400106df
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_DCFG0
|
|
CYREG_B0_P3_U1_DCFG0 EQU 0x400106e0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_DCFG1
|
|
CYREG_B0_P3_U1_DCFG1 EQU 0x400106e2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_DCFG2
|
|
CYREG_B0_P3_U1_DCFG2 EQU 0x400106e4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_DCFG3
|
|
CYREG_B0_P3_U1_DCFG3 EQU 0x400106e6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_DCFG4
|
|
CYREG_B0_P3_U1_DCFG4 EQU 0x400106e8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_DCFG5
|
|
CYREG_B0_P3_U1_DCFG5 EQU 0x400106ea
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_DCFG6
|
|
CYREG_B0_P3_U1_DCFG6 EQU 0x400106ec
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P3_U1_DCFG7
|
|
CYREG_B0_P3_U1_DCFG7 EQU 0x400106ee
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P3_ROUTE_BASE
|
|
CYDEV_UCFG_B0_P3_ROUTE_BASE EQU 0x40010700
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P3_ROUTE_SIZE
|
|
CYDEV_UCFG_B0_P3_ROUTE_SIZE EQU 0x000000ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P4_BASE
|
|
CYDEV_UCFG_B0_P4_BASE EQU 0x40010800
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P4_SIZE
|
|
CYDEV_UCFG_B0_P4_SIZE EQU 0x000001ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_BASE
|
|
CYDEV_UCFG_B0_P4_U0_BASE EQU 0x40010800
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_SIZE
|
|
CYDEV_UCFG_B0_P4_U0_SIZE EQU 0x00000070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_IT0
|
|
CYREG_B0_P4_U0_PLD_IT0 EQU 0x40010800
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_IT1
|
|
CYREG_B0_P4_U0_PLD_IT1 EQU 0x40010804
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_IT2
|
|
CYREG_B0_P4_U0_PLD_IT2 EQU 0x40010808
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_IT3
|
|
CYREG_B0_P4_U0_PLD_IT3 EQU 0x4001080c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_IT4
|
|
CYREG_B0_P4_U0_PLD_IT4 EQU 0x40010810
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_IT5
|
|
CYREG_B0_P4_U0_PLD_IT5 EQU 0x40010814
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_IT6
|
|
CYREG_B0_P4_U0_PLD_IT6 EQU 0x40010818
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_IT7
|
|
CYREG_B0_P4_U0_PLD_IT7 EQU 0x4001081c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_IT8
|
|
CYREG_B0_P4_U0_PLD_IT8 EQU 0x40010820
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_IT9
|
|
CYREG_B0_P4_U0_PLD_IT9 EQU 0x40010824
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_IT10
|
|
CYREG_B0_P4_U0_PLD_IT10 EQU 0x40010828
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_IT11
|
|
CYREG_B0_P4_U0_PLD_IT11 EQU 0x4001082c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_ORT0
|
|
CYREG_B0_P4_U0_PLD_ORT0 EQU 0x40010830
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_ORT1
|
|
CYREG_B0_P4_U0_PLD_ORT1 EQU 0x40010832
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_ORT2
|
|
CYREG_B0_P4_U0_PLD_ORT2 EQU 0x40010834
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_ORT3
|
|
CYREG_B0_P4_U0_PLD_ORT3 EQU 0x40010836
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_MC_CFG_CEN_CONST
|
|
CYREG_B0_P4_U0_MC_CFG_CEN_CONST EQU 0x40010838
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_MC_CFG_XORFB
|
|
CYREG_B0_P4_U0_MC_CFG_XORFB EQU 0x4001083a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_MC_CFG_SET_RESET
|
|
CYREG_B0_P4_U0_MC_CFG_SET_RESET EQU 0x4001083c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_MC_CFG_BYPASS
|
|
CYREG_B0_P4_U0_MC_CFG_BYPASS EQU 0x4001083e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG0
|
|
CYREG_B0_P4_U0_CFG0 EQU 0x40010840
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG1
|
|
CYREG_B0_P4_U0_CFG1 EQU 0x40010841
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG2
|
|
CYREG_B0_P4_U0_CFG2 EQU 0x40010842
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG3
|
|
CYREG_B0_P4_U0_CFG3 EQU 0x40010843
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG4
|
|
CYREG_B0_P4_U0_CFG4 EQU 0x40010844
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG5
|
|
CYREG_B0_P4_U0_CFG5 EQU 0x40010845
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG6
|
|
CYREG_B0_P4_U0_CFG6 EQU 0x40010846
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG7
|
|
CYREG_B0_P4_U0_CFG7 EQU 0x40010847
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG8
|
|
CYREG_B0_P4_U0_CFG8 EQU 0x40010848
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG9
|
|
CYREG_B0_P4_U0_CFG9 EQU 0x40010849
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG10
|
|
CYREG_B0_P4_U0_CFG10 EQU 0x4001084a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG11
|
|
CYREG_B0_P4_U0_CFG11 EQU 0x4001084b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG12
|
|
CYREG_B0_P4_U0_CFG12 EQU 0x4001084c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG13
|
|
CYREG_B0_P4_U0_CFG13 EQU 0x4001084d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG14
|
|
CYREG_B0_P4_U0_CFG14 EQU 0x4001084e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG15
|
|
CYREG_B0_P4_U0_CFG15 EQU 0x4001084f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG16
|
|
CYREG_B0_P4_U0_CFG16 EQU 0x40010850
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG17
|
|
CYREG_B0_P4_U0_CFG17 EQU 0x40010851
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG18
|
|
CYREG_B0_P4_U0_CFG18 EQU 0x40010852
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG19
|
|
CYREG_B0_P4_U0_CFG19 EQU 0x40010853
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG20
|
|
CYREG_B0_P4_U0_CFG20 EQU 0x40010854
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG21
|
|
CYREG_B0_P4_U0_CFG21 EQU 0x40010855
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG22
|
|
CYREG_B0_P4_U0_CFG22 EQU 0x40010856
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG23
|
|
CYREG_B0_P4_U0_CFG23 EQU 0x40010857
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG24
|
|
CYREG_B0_P4_U0_CFG24 EQU 0x40010858
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG25
|
|
CYREG_B0_P4_U0_CFG25 EQU 0x40010859
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG26
|
|
CYREG_B0_P4_U0_CFG26 EQU 0x4001085a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG27
|
|
CYREG_B0_P4_U0_CFG27 EQU 0x4001085b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG28
|
|
CYREG_B0_P4_U0_CFG28 EQU 0x4001085c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG29
|
|
CYREG_B0_P4_U0_CFG29 EQU 0x4001085d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG30
|
|
CYREG_B0_P4_U0_CFG30 EQU 0x4001085e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_CFG31
|
|
CYREG_B0_P4_U0_CFG31 EQU 0x4001085f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_DCFG0
|
|
CYREG_B0_P4_U0_DCFG0 EQU 0x40010860
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_DCFG1
|
|
CYREG_B0_P4_U0_DCFG1 EQU 0x40010862
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_DCFG2
|
|
CYREG_B0_P4_U0_DCFG2 EQU 0x40010864
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_DCFG3
|
|
CYREG_B0_P4_U0_DCFG3 EQU 0x40010866
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_DCFG4
|
|
CYREG_B0_P4_U0_DCFG4 EQU 0x40010868
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_DCFG5
|
|
CYREG_B0_P4_U0_DCFG5 EQU 0x4001086a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_DCFG6
|
|
CYREG_B0_P4_U0_DCFG6 EQU 0x4001086c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U0_DCFG7
|
|
CYREG_B0_P4_U0_DCFG7 EQU 0x4001086e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_BASE
|
|
CYDEV_UCFG_B0_P4_U1_BASE EQU 0x40010880
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_SIZE
|
|
CYDEV_UCFG_B0_P4_U1_SIZE EQU 0x00000070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_IT0
|
|
CYREG_B0_P4_U1_PLD_IT0 EQU 0x40010880
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_IT1
|
|
CYREG_B0_P4_U1_PLD_IT1 EQU 0x40010884
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_IT2
|
|
CYREG_B0_P4_U1_PLD_IT2 EQU 0x40010888
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_IT3
|
|
CYREG_B0_P4_U1_PLD_IT3 EQU 0x4001088c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_IT4
|
|
CYREG_B0_P4_U1_PLD_IT4 EQU 0x40010890
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_IT5
|
|
CYREG_B0_P4_U1_PLD_IT5 EQU 0x40010894
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_IT6
|
|
CYREG_B0_P4_U1_PLD_IT6 EQU 0x40010898
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_IT7
|
|
CYREG_B0_P4_U1_PLD_IT7 EQU 0x4001089c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_IT8
|
|
CYREG_B0_P4_U1_PLD_IT8 EQU 0x400108a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_IT9
|
|
CYREG_B0_P4_U1_PLD_IT9 EQU 0x400108a4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_IT10
|
|
CYREG_B0_P4_U1_PLD_IT10 EQU 0x400108a8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_IT11
|
|
CYREG_B0_P4_U1_PLD_IT11 EQU 0x400108ac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_ORT0
|
|
CYREG_B0_P4_U1_PLD_ORT0 EQU 0x400108b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_ORT1
|
|
CYREG_B0_P4_U1_PLD_ORT1 EQU 0x400108b2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_ORT2
|
|
CYREG_B0_P4_U1_PLD_ORT2 EQU 0x400108b4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_ORT3
|
|
CYREG_B0_P4_U1_PLD_ORT3 EQU 0x400108b6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_MC_CFG_CEN_CONST
|
|
CYREG_B0_P4_U1_MC_CFG_CEN_CONST EQU 0x400108b8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_MC_CFG_XORFB
|
|
CYREG_B0_P4_U1_MC_CFG_XORFB EQU 0x400108ba
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_MC_CFG_SET_RESET
|
|
CYREG_B0_P4_U1_MC_CFG_SET_RESET EQU 0x400108bc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_MC_CFG_BYPASS
|
|
CYREG_B0_P4_U1_MC_CFG_BYPASS EQU 0x400108be
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG0
|
|
CYREG_B0_P4_U1_CFG0 EQU 0x400108c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG1
|
|
CYREG_B0_P4_U1_CFG1 EQU 0x400108c1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG2
|
|
CYREG_B0_P4_U1_CFG2 EQU 0x400108c2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG3
|
|
CYREG_B0_P4_U1_CFG3 EQU 0x400108c3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG4
|
|
CYREG_B0_P4_U1_CFG4 EQU 0x400108c4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG5
|
|
CYREG_B0_P4_U1_CFG5 EQU 0x400108c5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG6
|
|
CYREG_B0_P4_U1_CFG6 EQU 0x400108c6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG7
|
|
CYREG_B0_P4_U1_CFG7 EQU 0x400108c7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG8
|
|
CYREG_B0_P4_U1_CFG8 EQU 0x400108c8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG9
|
|
CYREG_B0_P4_U1_CFG9 EQU 0x400108c9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG10
|
|
CYREG_B0_P4_U1_CFG10 EQU 0x400108ca
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG11
|
|
CYREG_B0_P4_U1_CFG11 EQU 0x400108cb
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG12
|
|
CYREG_B0_P4_U1_CFG12 EQU 0x400108cc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG13
|
|
CYREG_B0_P4_U1_CFG13 EQU 0x400108cd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG14
|
|
CYREG_B0_P4_U1_CFG14 EQU 0x400108ce
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG15
|
|
CYREG_B0_P4_U1_CFG15 EQU 0x400108cf
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG16
|
|
CYREG_B0_P4_U1_CFG16 EQU 0x400108d0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG17
|
|
CYREG_B0_P4_U1_CFG17 EQU 0x400108d1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG18
|
|
CYREG_B0_P4_U1_CFG18 EQU 0x400108d2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG19
|
|
CYREG_B0_P4_U1_CFG19 EQU 0x400108d3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG20
|
|
CYREG_B0_P4_U1_CFG20 EQU 0x400108d4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG21
|
|
CYREG_B0_P4_U1_CFG21 EQU 0x400108d5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG22
|
|
CYREG_B0_P4_U1_CFG22 EQU 0x400108d6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG23
|
|
CYREG_B0_P4_U1_CFG23 EQU 0x400108d7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG24
|
|
CYREG_B0_P4_U1_CFG24 EQU 0x400108d8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG25
|
|
CYREG_B0_P4_U1_CFG25 EQU 0x400108d9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG26
|
|
CYREG_B0_P4_U1_CFG26 EQU 0x400108da
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG27
|
|
CYREG_B0_P4_U1_CFG27 EQU 0x400108db
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG28
|
|
CYREG_B0_P4_U1_CFG28 EQU 0x400108dc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG29
|
|
CYREG_B0_P4_U1_CFG29 EQU 0x400108dd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG30
|
|
CYREG_B0_P4_U1_CFG30 EQU 0x400108de
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_CFG31
|
|
CYREG_B0_P4_U1_CFG31 EQU 0x400108df
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_DCFG0
|
|
CYREG_B0_P4_U1_DCFG0 EQU 0x400108e0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_DCFG1
|
|
CYREG_B0_P4_U1_DCFG1 EQU 0x400108e2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_DCFG2
|
|
CYREG_B0_P4_U1_DCFG2 EQU 0x400108e4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_DCFG3
|
|
CYREG_B0_P4_U1_DCFG3 EQU 0x400108e6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_DCFG4
|
|
CYREG_B0_P4_U1_DCFG4 EQU 0x400108e8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_DCFG5
|
|
CYREG_B0_P4_U1_DCFG5 EQU 0x400108ea
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_DCFG6
|
|
CYREG_B0_P4_U1_DCFG6 EQU 0x400108ec
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P4_U1_DCFG7
|
|
CYREG_B0_P4_U1_DCFG7 EQU 0x400108ee
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P4_ROUTE_BASE
|
|
CYDEV_UCFG_B0_P4_ROUTE_BASE EQU 0x40010900
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P4_ROUTE_SIZE
|
|
CYDEV_UCFG_B0_P4_ROUTE_SIZE EQU 0x000000ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P5_BASE
|
|
CYDEV_UCFG_B0_P5_BASE EQU 0x40010a00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P5_SIZE
|
|
CYDEV_UCFG_B0_P5_SIZE EQU 0x000001ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_BASE
|
|
CYDEV_UCFG_B0_P5_U0_BASE EQU 0x40010a00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_SIZE
|
|
CYDEV_UCFG_B0_P5_U0_SIZE EQU 0x00000070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_IT0
|
|
CYREG_B0_P5_U0_PLD_IT0 EQU 0x40010a00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_IT1
|
|
CYREG_B0_P5_U0_PLD_IT1 EQU 0x40010a04
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_IT2
|
|
CYREG_B0_P5_U0_PLD_IT2 EQU 0x40010a08
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_IT3
|
|
CYREG_B0_P5_U0_PLD_IT3 EQU 0x40010a0c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_IT4
|
|
CYREG_B0_P5_U0_PLD_IT4 EQU 0x40010a10
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_IT5
|
|
CYREG_B0_P5_U0_PLD_IT5 EQU 0x40010a14
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_IT6
|
|
CYREG_B0_P5_U0_PLD_IT6 EQU 0x40010a18
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_IT7
|
|
CYREG_B0_P5_U0_PLD_IT7 EQU 0x40010a1c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_IT8
|
|
CYREG_B0_P5_U0_PLD_IT8 EQU 0x40010a20
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_IT9
|
|
CYREG_B0_P5_U0_PLD_IT9 EQU 0x40010a24
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_IT10
|
|
CYREG_B0_P5_U0_PLD_IT10 EQU 0x40010a28
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_IT11
|
|
CYREG_B0_P5_U0_PLD_IT11 EQU 0x40010a2c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_ORT0
|
|
CYREG_B0_P5_U0_PLD_ORT0 EQU 0x40010a30
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_ORT1
|
|
CYREG_B0_P5_U0_PLD_ORT1 EQU 0x40010a32
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_ORT2
|
|
CYREG_B0_P5_U0_PLD_ORT2 EQU 0x40010a34
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_ORT3
|
|
CYREG_B0_P5_U0_PLD_ORT3 EQU 0x40010a36
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_MC_CFG_CEN_CONST
|
|
CYREG_B0_P5_U0_MC_CFG_CEN_CONST EQU 0x40010a38
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_MC_CFG_XORFB
|
|
CYREG_B0_P5_U0_MC_CFG_XORFB EQU 0x40010a3a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_MC_CFG_SET_RESET
|
|
CYREG_B0_P5_U0_MC_CFG_SET_RESET EQU 0x40010a3c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_MC_CFG_BYPASS
|
|
CYREG_B0_P5_U0_MC_CFG_BYPASS EQU 0x40010a3e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG0
|
|
CYREG_B0_P5_U0_CFG0 EQU 0x40010a40
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG1
|
|
CYREG_B0_P5_U0_CFG1 EQU 0x40010a41
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG2
|
|
CYREG_B0_P5_U0_CFG2 EQU 0x40010a42
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG3
|
|
CYREG_B0_P5_U0_CFG3 EQU 0x40010a43
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG4
|
|
CYREG_B0_P5_U0_CFG4 EQU 0x40010a44
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG5
|
|
CYREG_B0_P5_U0_CFG5 EQU 0x40010a45
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG6
|
|
CYREG_B0_P5_U0_CFG6 EQU 0x40010a46
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG7
|
|
CYREG_B0_P5_U0_CFG7 EQU 0x40010a47
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG8
|
|
CYREG_B0_P5_U0_CFG8 EQU 0x40010a48
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG9
|
|
CYREG_B0_P5_U0_CFG9 EQU 0x40010a49
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG10
|
|
CYREG_B0_P5_U0_CFG10 EQU 0x40010a4a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG11
|
|
CYREG_B0_P5_U0_CFG11 EQU 0x40010a4b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG12
|
|
CYREG_B0_P5_U0_CFG12 EQU 0x40010a4c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG13
|
|
CYREG_B0_P5_U0_CFG13 EQU 0x40010a4d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG14
|
|
CYREG_B0_P5_U0_CFG14 EQU 0x40010a4e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG15
|
|
CYREG_B0_P5_U0_CFG15 EQU 0x40010a4f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG16
|
|
CYREG_B0_P5_U0_CFG16 EQU 0x40010a50
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG17
|
|
CYREG_B0_P5_U0_CFG17 EQU 0x40010a51
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG18
|
|
CYREG_B0_P5_U0_CFG18 EQU 0x40010a52
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG19
|
|
CYREG_B0_P5_U0_CFG19 EQU 0x40010a53
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG20
|
|
CYREG_B0_P5_U0_CFG20 EQU 0x40010a54
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG21
|
|
CYREG_B0_P5_U0_CFG21 EQU 0x40010a55
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG22
|
|
CYREG_B0_P5_U0_CFG22 EQU 0x40010a56
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG23
|
|
CYREG_B0_P5_U0_CFG23 EQU 0x40010a57
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG24
|
|
CYREG_B0_P5_U0_CFG24 EQU 0x40010a58
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG25
|
|
CYREG_B0_P5_U0_CFG25 EQU 0x40010a59
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG26
|
|
CYREG_B0_P5_U0_CFG26 EQU 0x40010a5a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG27
|
|
CYREG_B0_P5_U0_CFG27 EQU 0x40010a5b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG28
|
|
CYREG_B0_P5_U0_CFG28 EQU 0x40010a5c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG29
|
|
CYREG_B0_P5_U0_CFG29 EQU 0x40010a5d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG30
|
|
CYREG_B0_P5_U0_CFG30 EQU 0x40010a5e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_CFG31
|
|
CYREG_B0_P5_U0_CFG31 EQU 0x40010a5f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_DCFG0
|
|
CYREG_B0_P5_U0_DCFG0 EQU 0x40010a60
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_DCFG1
|
|
CYREG_B0_P5_U0_DCFG1 EQU 0x40010a62
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_DCFG2
|
|
CYREG_B0_P5_U0_DCFG2 EQU 0x40010a64
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_DCFG3
|
|
CYREG_B0_P5_U0_DCFG3 EQU 0x40010a66
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_DCFG4
|
|
CYREG_B0_P5_U0_DCFG4 EQU 0x40010a68
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_DCFG5
|
|
CYREG_B0_P5_U0_DCFG5 EQU 0x40010a6a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_DCFG6
|
|
CYREG_B0_P5_U0_DCFG6 EQU 0x40010a6c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U0_DCFG7
|
|
CYREG_B0_P5_U0_DCFG7 EQU 0x40010a6e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_BASE
|
|
CYDEV_UCFG_B0_P5_U1_BASE EQU 0x40010a80
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_SIZE
|
|
CYDEV_UCFG_B0_P5_U1_SIZE EQU 0x00000070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_IT0
|
|
CYREG_B0_P5_U1_PLD_IT0 EQU 0x40010a80
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_IT1
|
|
CYREG_B0_P5_U1_PLD_IT1 EQU 0x40010a84
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_IT2
|
|
CYREG_B0_P5_U1_PLD_IT2 EQU 0x40010a88
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_IT3
|
|
CYREG_B0_P5_U1_PLD_IT3 EQU 0x40010a8c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_IT4
|
|
CYREG_B0_P5_U1_PLD_IT4 EQU 0x40010a90
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_IT5
|
|
CYREG_B0_P5_U1_PLD_IT5 EQU 0x40010a94
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_IT6
|
|
CYREG_B0_P5_U1_PLD_IT6 EQU 0x40010a98
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_IT7
|
|
CYREG_B0_P5_U1_PLD_IT7 EQU 0x40010a9c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_IT8
|
|
CYREG_B0_P5_U1_PLD_IT8 EQU 0x40010aa0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_IT9
|
|
CYREG_B0_P5_U1_PLD_IT9 EQU 0x40010aa4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_IT10
|
|
CYREG_B0_P5_U1_PLD_IT10 EQU 0x40010aa8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_IT11
|
|
CYREG_B0_P5_U1_PLD_IT11 EQU 0x40010aac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_ORT0
|
|
CYREG_B0_P5_U1_PLD_ORT0 EQU 0x40010ab0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_ORT1
|
|
CYREG_B0_P5_U1_PLD_ORT1 EQU 0x40010ab2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_ORT2
|
|
CYREG_B0_P5_U1_PLD_ORT2 EQU 0x40010ab4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_ORT3
|
|
CYREG_B0_P5_U1_PLD_ORT3 EQU 0x40010ab6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_MC_CFG_CEN_CONST
|
|
CYREG_B0_P5_U1_MC_CFG_CEN_CONST EQU 0x40010ab8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_MC_CFG_XORFB
|
|
CYREG_B0_P5_U1_MC_CFG_XORFB EQU 0x40010aba
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_MC_CFG_SET_RESET
|
|
CYREG_B0_P5_U1_MC_CFG_SET_RESET EQU 0x40010abc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_MC_CFG_BYPASS
|
|
CYREG_B0_P5_U1_MC_CFG_BYPASS EQU 0x40010abe
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG0
|
|
CYREG_B0_P5_U1_CFG0 EQU 0x40010ac0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG1
|
|
CYREG_B0_P5_U1_CFG1 EQU 0x40010ac1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG2
|
|
CYREG_B0_P5_U1_CFG2 EQU 0x40010ac2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG3
|
|
CYREG_B0_P5_U1_CFG3 EQU 0x40010ac3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG4
|
|
CYREG_B0_P5_U1_CFG4 EQU 0x40010ac4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG5
|
|
CYREG_B0_P5_U1_CFG5 EQU 0x40010ac5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG6
|
|
CYREG_B0_P5_U1_CFG6 EQU 0x40010ac6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG7
|
|
CYREG_B0_P5_U1_CFG7 EQU 0x40010ac7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG8
|
|
CYREG_B0_P5_U1_CFG8 EQU 0x40010ac8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG9
|
|
CYREG_B0_P5_U1_CFG9 EQU 0x40010ac9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG10
|
|
CYREG_B0_P5_U1_CFG10 EQU 0x40010aca
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG11
|
|
CYREG_B0_P5_U1_CFG11 EQU 0x40010acb
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG12
|
|
CYREG_B0_P5_U1_CFG12 EQU 0x40010acc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG13
|
|
CYREG_B0_P5_U1_CFG13 EQU 0x40010acd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG14
|
|
CYREG_B0_P5_U1_CFG14 EQU 0x40010ace
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG15
|
|
CYREG_B0_P5_U1_CFG15 EQU 0x40010acf
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG16
|
|
CYREG_B0_P5_U1_CFG16 EQU 0x40010ad0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG17
|
|
CYREG_B0_P5_U1_CFG17 EQU 0x40010ad1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG18
|
|
CYREG_B0_P5_U1_CFG18 EQU 0x40010ad2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG19
|
|
CYREG_B0_P5_U1_CFG19 EQU 0x40010ad3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG20
|
|
CYREG_B0_P5_U1_CFG20 EQU 0x40010ad4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG21
|
|
CYREG_B0_P5_U1_CFG21 EQU 0x40010ad5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG22
|
|
CYREG_B0_P5_U1_CFG22 EQU 0x40010ad6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG23
|
|
CYREG_B0_P5_U1_CFG23 EQU 0x40010ad7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG24
|
|
CYREG_B0_P5_U1_CFG24 EQU 0x40010ad8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG25
|
|
CYREG_B0_P5_U1_CFG25 EQU 0x40010ad9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG26
|
|
CYREG_B0_P5_U1_CFG26 EQU 0x40010ada
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG27
|
|
CYREG_B0_P5_U1_CFG27 EQU 0x40010adb
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG28
|
|
CYREG_B0_P5_U1_CFG28 EQU 0x40010adc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG29
|
|
CYREG_B0_P5_U1_CFG29 EQU 0x40010add
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG30
|
|
CYREG_B0_P5_U1_CFG30 EQU 0x40010ade
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_CFG31
|
|
CYREG_B0_P5_U1_CFG31 EQU 0x40010adf
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_DCFG0
|
|
CYREG_B0_P5_U1_DCFG0 EQU 0x40010ae0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_DCFG1
|
|
CYREG_B0_P5_U1_DCFG1 EQU 0x40010ae2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_DCFG2
|
|
CYREG_B0_P5_U1_DCFG2 EQU 0x40010ae4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_DCFG3
|
|
CYREG_B0_P5_U1_DCFG3 EQU 0x40010ae6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_DCFG4
|
|
CYREG_B0_P5_U1_DCFG4 EQU 0x40010ae8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_DCFG5
|
|
CYREG_B0_P5_U1_DCFG5 EQU 0x40010aea
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_DCFG6
|
|
CYREG_B0_P5_U1_DCFG6 EQU 0x40010aec
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P5_U1_DCFG7
|
|
CYREG_B0_P5_U1_DCFG7 EQU 0x40010aee
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P5_ROUTE_BASE
|
|
CYDEV_UCFG_B0_P5_ROUTE_BASE EQU 0x40010b00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P5_ROUTE_SIZE
|
|
CYDEV_UCFG_B0_P5_ROUTE_SIZE EQU 0x000000ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P6_BASE
|
|
CYDEV_UCFG_B0_P6_BASE EQU 0x40010c00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P6_SIZE
|
|
CYDEV_UCFG_B0_P6_SIZE EQU 0x000001ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_BASE
|
|
CYDEV_UCFG_B0_P6_U0_BASE EQU 0x40010c00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_SIZE
|
|
CYDEV_UCFG_B0_P6_U0_SIZE EQU 0x00000070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_IT0
|
|
CYREG_B0_P6_U0_PLD_IT0 EQU 0x40010c00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_IT1
|
|
CYREG_B0_P6_U0_PLD_IT1 EQU 0x40010c04
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_IT2
|
|
CYREG_B0_P6_U0_PLD_IT2 EQU 0x40010c08
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_IT3
|
|
CYREG_B0_P6_U0_PLD_IT3 EQU 0x40010c0c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_IT4
|
|
CYREG_B0_P6_U0_PLD_IT4 EQU 0x40010c10
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_IT5
|
|
CYREG_B0_P6_U0_PLD_IT5 EQU 0x40010c14
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_IT6
|
|
CYREG_B0_P6_U0_PLD_IT6 EQU 0x40010c18
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_IT7
|
|
CYREG_B0_P6_U0_PLD_IT7 EQU 0x40010c1c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_IT8
|
|
CYREG_B0_P6_U0_PLD_IT8 EQU 0x40010c20
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_IT9
|
|
CYREG_B0_P6_U0_PLD_IT9 EQU 0x40010c24
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_IT10
|
|
CYREG_B0_P6_U0_PLD_IT10 EQU 0x40010c28
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_IT11
|
|
CYREG_B0_P6_U0_PLD_IT11 EQU 0x40010c2c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_ORT0
|
|
CYREG_B0_P6_U0_PLD_ORT0 EQU 0x40010c30
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_ORT1
|
|
CYREG_B0_P6_U0_PLD_ORT1 EQU 0x40010c32
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_ORT2
|
|
CYREG_B0_P6_U0_PLD_ORT2 EQU 0x40010c34
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_ORT3
|
|
CYREG_B0_P6_U0_PLD_ORT3 EQU 0x40010c36
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_MC_CFG_CEN_CONST
|
|
CYREG_B0_P6_U0_MC_CFG_CEN_CONST EQU 0x40010c38
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_MC_CFG_XORFB
|
|
CYREG_B0_P6_U0_MC_CFG_XORFB EQU 0x40010c3a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_MC_CFG_SET_RESET
|
|
CYREG_B0_P6_U0_MC_CFG_SET_RESET EQU 0x40010c3c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_MC_CFG_BYPASS
|
|
CYREG_B0_P6_U0_MC_CFG_BYPASS EQU 0x40010c3e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG0
|
|
CYREG_B0_P6_U0_CFG0 EQU 0x40010c40
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG1
|
|
CYREG_B0_P6_U0_CFG1 EQU 0x40010c41
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG2
|
|
CYREG_B0_P6_U0_CFG2 EQU 0x40010c42
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG3
|
|
CYREG_B0_P6_U0_CFG3 EQU 0x40010c43
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG4
|
|
CYREG_B0_P6_U0_CFG4 EQU 0x40010c44
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG5
|
|
CYREG_B0_P6_U0_CFG5 EQU 0x40010c45
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG6
|
|
CYREG_B0_P6_U0_CFG6 EQU 0x40010c46
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG7
|
|
CYREG_B0_P6_U0_CFG7 EQU 0x40010c47
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG8
|
|
CYREG_B0_P6_U0_CFG8 EQU 0x40010c48
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG9
|
|
CYREG_B0_P6_U0_CFG9 EQU 0x40010c49
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG10
|
|
CYREG_B0_P6_U0_CFG10 EQU 0x40010c4a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG11
|
|
CYREG_B0_P6_U0_CFG11 EQU 0x40010c4b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG12
|
|
CYREG_B0_P6_U0_CFG12 EQU 0x40010c4c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG13
|
|
CYREG_B0_P6_U0_CFG13 EQU 0x40010c4d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG14
|
|
CYREG_B0_P6_U0_CFG14 EQU 0x40010c4e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG15
|
|
CYREG_B0_P6_U0_CFG15 EQU 0x40010c4f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG16
|
|
CYREG_B0_P6_U0_CFG16 EQU 0x40010c50
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG17
|
|
CYREG_B0_P6_U0_CFG17 EQU 0x40010c51
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG18
|
|
CYREG_B0_P6_U0_CFG18 EQU 0x40010c52
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG19
|
|
CYREG_B0_P6_U0_CFG19 EQU 0x40010c53
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG20
|
|
CYREG_B0_P6_U0_CFG20 EQU 0x40010c54
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG21
|
|
CYREG_B0_P6_U0_CFG21 EQU 0x40010c55
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG22
|
|
CYREG_B0_P6_U0_CFG22 EQU 0x40010c56
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG23
|
|
CYREG_B0_P6_U0_CFG23 EQU 0x40010c57
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG24
|
|
CYREG_B0_P6_U0_CFG24 EQU 0x40010c58
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG25
|
|
CYREG_B0_P6_U0_CFG25 EQU 0x40010c59
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG26
|
|
CYREG_B0_P6_U0_CFG26 EQU 0x40010c5a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG27
|
|
CYREG_B0_P6_U0_CFG27 EQU 0x40010c5b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG28
|
|
CYREG_B0_P6_U0_CFG28 EQU 0x40010c5c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG29
|
|
CYREG_B0_P6_U0_CFG29 EQU 0x40010c5d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG30
|
|
CYREG_B0_P6_U0_CFG30 EQU 0x40010c5e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_CFG31
|
|
CYREG_B0_P6_U0_CFG31 EQU 0x40010c5f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_DCFG0
|
|
CYREG_B0_P6_U0_DCFG0 EQU 0x40010c60
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_DCFG1
|
|
CYREG_B0_P6_U0_DCFG1 EQU 0x40010c62
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_DCFG2
|
|
CYREG_B0_P6_U0_DCFG2 EQU 0x40010c64
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_DCFG3
|
|
CYREG_B0_P6_U0_DCFG3 EQU 0x40010c66
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_DCFG4
|
|
CYREG_B0_P6_U0_DCFG4 EQU 0x40010c68
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_DCFG5
|
|
CYREG_B0_P6_U0_DCFG5 EQU 0x40010c6a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_DCFG6
|
|
CYREG_B0_P6_U0_DCFG6 EQU 0x40010c6c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U0_DCFG7
|
|
CYREG_B0_P6_U0_DCFG7 EQU 0x40010c6e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_BASE
|
|
CYDEV_UCFG_B0_P6_U1_BASE EQU 0x40010c80
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_SIZE
|
|
CYDEV_UCFG_B0_P6_U1_SIZE EQU 0x00000070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_IT0
|
|
CYREG_B0_P6_U1_PLD_IT0 EQU 0x40010c80
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_IT1
|
|
CYREG_B0_P6_U1_PLD_IT1 EQU 0x40010c84
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_IT2
|
|
CYREG_B0_P6_U1_PLD_IT2 EQU 0x40010c88
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_IT3
|
|
CYREG_B0_P6_U1_PLD_IT3 EQU 0x40010c8c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_IT4
|
|
CYREG_B0_P6_U1_PLD_IT4 EQU 0x40010c90
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_IT5
|
|
CYREG_B0_P6_U1_PLD_IT5 EQU 0x40010c94
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_IT6
|
|
CYREG_B0_P6_U1_PLD_IT6 EQU 0x40010c98
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_IT7
|
|
CYREG_B0_P6_U1_PLD_IT7 EQU 0x40010c9c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_IT8
|
|
CYREG_B0_P6_U1_PLD_IT8 EQU 0x40010ca0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_IT9
|
|
CYREG_B0_P6_U1_PLD_IT9 EQU 0x40010ca4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_IT10
|
|
CYREG_B0_P6_U1_PLD_IT10 EQU 0x40010ca8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_IT11
|
|
CYREG_B0_P6_U1_PLD_IT11 EQU 0x40010cac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_ORT0
|
|
CYREG_B0_P6_U1_PLD_ORT0 EQU 0x40010cb0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_ORT1
|
|
CYREG_B0_P6_U1_PLD_ORT1 EQU 0x40010cb2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_ORT2
|
|
CYREG_B0_P6_U1_PLD_ORT2 EQU 0x40010cb4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_ORT3
|
|
CYREG_B0_P6_U1_PLD_ORT3 EQU 0x40010cb6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_MC_CFG_CEN_CONST
|
|
CYREG_B0_P6_U1_MC_CFG_CEN_CONST EQU 0x40010cb8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_MC_CFG_XORFB
|
|
CYREG_B0_P6_U1_MC_CFG_XORFB EQU 0x40010cba
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_MC_CFG_SET_RESET
|
|
CYREG_B0_P6_U1_MC_CFG_SET_RESET EQU 0x40010cbc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_MC_CFG_BYPASS
|
|
CYREG_B0_P6_U1_MC_CFG_BYPASS EQU 0x40010cbe
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG0
|
|
CYREG_B0_P6_U1_CFG0 EQU 0x40010cc0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG1
|
|
CYREG_B0_P6_U1_CFG1 EQU 0x40010cc1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG2
|
|
CYREG_B0_P6_U1_CFG2 EQU 0x40010cc2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG3
|
|
CYREG_B0_P6_U1_CFG3 EQU 0x40010cc3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG4
|
|
CYREG_B0_P6_U1_CFG4 EQU 0x40010cc4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG5
|
|
CYREG_B0_P6_U1_CFG5 EQU 0x40010cc5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG6
|
|
CYREG_B0_P6_U1_CFG6 EQU 0x40010cc6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG7
|
|
CYREG_B0_P6_U1_CFG7 EQU 0x40010cc7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG8
|
|
CYREG_B0_P6_U1_CFG8 EQU 0x40010cc8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG9
|
|
CYREG_B0_P6_U1_CFG9 EQU 0x40010cc9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG10
|
|
CYREG_B0_P6_U1_CFG10 EQU 0x40010cca
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG11
|
|
CYREG_B0_P6_U1_CFG11 EQU 0x40010ccb
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG12
|
|
CYREG_B0_P6_U1_CFG12 EQU 0x40010ccc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG13
|
|
CYREG_B0_P6_U1_CFG13 EQU 0x40010ccd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG14
|
|
CYREG_B0_P6_U1_CFG14 EQU 0x40010cce
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG15
|
|
CYREG_B0_P6_U1_CFG15 EQU 0x40010ccf
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG16
|
|
CYREG_B0_P6_U1_CFG16 EQU 0x40010cd0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG17
|
|
CYREG_B0_P6_U1_CFG17 EQU 0x40010cd1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG18
|
|
CYREG_B0_P6_U1_CFG18 EQU 0x40010cd2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG19
|
|
CYREG_B0_P6_U1_CFG19 EQU 0x40010cd3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG20
|
|
CYREG_B0_P6_U1_CFG20 EQU 0x40010cd4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG21
|
|
CYREG_B0_P6_U1_CFG21 EQU 0x40010cd5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG22
|
|
CYREG_B0_P6_U1_CFG22 EQU 0x40010cd6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG23
|
|
CYREG_B0_P6_U1_CFG23 EQU 0x40010cd7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG24
|
|
CYREG_B0_P6_U1_CFG24 EQU 0x40010cd8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG25
|
|
CYREG_B0_P6_U1_CFG25 EQU 0x40010cd9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG26
|
|
CYREG_B0_P6_U1_CFG26 EQU 0x40010cda
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG27
|
|
CYREG_B0_P6_U1_CFG27 EQU 0x40010cdb
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG28
|
|
CYREG_B0_P6_U1_CFG28 EQU 0x40010cdc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG29
|
|
CYREG_B0_P6_U1_CFG29 EQU 0x40010cdd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG30
|
|
CYREG_B0_P6_U1_CFG30 EQU 0x40010cde
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_CFG31
|
|
CYREG_B0_P6_U1_CFG31 EQU 0x40010cdf
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_DCFG0
|
|
CYREG_B0_P6_U1_DCFG0 EQU 0x40010ce0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_DCFG1
|
|
CYREG_B0_P6_U1_DCFG1 EQU 0x40010ce2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_DCFG2
|
|
CYREG_B0_P6_U1_DCFG2 EQU 0x40010ce4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_DCFG3
|
|
CYREG_B0_P6_U1_DCFG3 EQU 0x40010ce6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_DCFG4
|
|
CYREG_B0_P6_U1_DCFG4 EQU 0x40010ce8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_DCFG5
|
|
CYREG_B0_P6_U1_DCFG5 EQU 0x40010cea
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_DCFG6
|
|
CYREG_B0_P6_U1_DCFG6 EQU 0x40010cec
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P6_U1_DCFG7
|
|
CYREG_B0_P6_U1_DCFG7 EQU 0x40010cee
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P6_ROUTE_BASE
|
|
CYDEV_UCFG_B0_P6_ROUTE_BASE EQU 0x40010d00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P6_ROUTE_SIZE
|
|
CYDEV_UCFG_B0_P6_ROUTE_SIZE EQU 0x000000ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P7_BASE
|
|
CYDEV_UCFG_B0_P7_BASE EQU 0x40010e00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P7_SIZE
|
|
CYDEV_UCFG_B0_P7_SIZE EQU 0x000001ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_BASE
|
|
CYDEV_UCFG_B0_P7_U0_BASE EQU 0x40010e00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_SIZE
|
|
CYDEV_UCFG_B0_P7_U0_SIZE EQU 0x00000070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_IT0
|
|
CYREG_B0_P7_U0_PLD_IT0 EQU 0x40010e00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_IT1
|
|
CYREG_B0_P7_U0_PLD_IT1 EQU 0x40010e04
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_IT2
|
|
CYREG_B0_P7_U0_PLD_IT2 EQU 0x40010e08
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_IT3
|
|
CYREG_B0_P7_U0_PLD_IT3 EQU 0x40010e0c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_IT4
|
|
CYREG_B0_P7_U0_PLD_IT4 EQU 0x40010e10
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_IT5
|
|
CYREG_B0_P7_U0_PLD_IT5 EQU 0x40010e14
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_IT6
|
|
CYREG_B0_P7_U0_PLD_IT6 EQU 0x40010e18
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_IT7
|
|
CYREG_B0_P7_U0_PLD_IT7 EQU 0x40010e1c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_IT8
|
|
CYREG_B0_P7_U0_PLD_IT8 EQU 0x40010e20
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_IT9
|
|
CYREG_B0_P7_U0_PLD_IT9 EQU 0x40010e24
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_IT10
|
|
CYREG_B0_P7_U0_PLD_IT10 EQU 0x40010e28
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_IT11
|
|
CYREG_B0_P7_U0_PLD_IT11 EQU 0x40010e2c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_ORT0
|
|
CYREG_B0_P7_U0_PLD_ORT0 EQU 0x40010e30
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_ORT1
|
|
CYREG_B0_P7_U0_PLD_ORT1 EQU 0x40010e32
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_ORT2
|
|
CYREG_B0_P7_U0_PLD_ORT2 EQU 0x40010e34
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_ORT3
|
|
CYREG_B0_P7_U0_PLD_ORT3 EQU 0x40010e36
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_MC_CFG_CEN_CONST
|
|
CYREG_B0_P7_U0_MC_CFG_CEN_CONST EQU 0x40010e38
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_MC_CFG_XORFB
|
|
CYREG_B0_P7_U0_MC_CFG_XORFB EQU 0x40010e3a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_MC_CFG_SET_RESET
|
|
CYREG_B0_P7_U0_MC_CFG_SET_RESET EQU 0x40010e3c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_MC_CFG_BYPASS
|
|
CYREG_B0_P7_U0_MC_CFG_BYPASS EQU 0x40010e3e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG0
|
|
CYREG_B0_P7_U0_CFG0 EQU 0x40010e40
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG1
|
|
CYREG_B0_P7_U0_CFG1 EQU 0x40010e41
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG2
|
|
CYREG_B0_P7_U0_CFG2 EQU 0x40010e42
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG3
|
|
CYREG_B0_P7_U0_CFG3 EQU 0x40010e43
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG4
|
|
CYREG_B0_P7_U0_CFG4 EQU 0x40010e44
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG5
|
|
CYREG_B0_P7_U0_CFG5 EQU 0x40010e45
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG6
|
|
CYREG_B0_P7_U0_CFG6 EQU 0x40010e46
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG7
|
|
CYREG_B0_P7_U0_CFG7 EQU 0x40010e47
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG8
|
|
CYREG_B0_P7_U0_CFG8 EQU 0x40010e48
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG9
|
|
CYREG_B0_P7_U0_CFG9 EQU 0x40010e49
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG10
|
|
CYREG_B0_P7_U0_CFG10 EQU 0x40010e4a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG11
|
|
CYREG_B0_P7_U0_CFG11 EQU 0x40010e4b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG12
|
|
CYREG_B0_P7_U0_CFG12 EQU 0x40010e4c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG13
|
|
CYREG_B0_P7_U0_CFG13 EQU 0x40010e4d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG14
|
|
CYREG_B0_P7_U0_CFG14 EQU 0x40010e4e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG15
|
|
CYREG_B0_P7_U0_CFG15 EQU 0x40010e4f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG16
|
|
CYREG_B0_P7_U0_CFG16 EQU 0x40010e50
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG17
|
|
CYREG_B0_P7_U0_CFG17 EQU 0x40010e51
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG18
|
|
CYREG_B0_P7_U0_CFG18 EQU 0x40010e52
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG19
|
|
CYREG_B0_P7_U0_CFG19 EQU 0x40010e53
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG20
|
|
CYREG_B0_P7_U0_CFG20 EQU 0x40010e54
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG21
|
|
CYREG_B0_P7_U0_CFG21 EQU 0x40010e55
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG22
|
|
CYREG_B0_P7_U0_CFG22 EQU 0x40010e56
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG23
|
|
CYREG_B0_P7_U0_CFG23 EQU 0x40010e57
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG24
|
|
CYREG_B0_P7_U0_CFG24 EQU 0x40010e58
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG25
|
|
CYREG_B0_P7_U0_CFG25 EQU 0x40010e59
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG26
|
|
CYREG_B0_P7_U0_CFG26 EQU 0x40010e5a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG27
|
|
CYREG_B0_P7_U0_CFG27 EQU 0x40010e5b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG28
|
|
CYREG_B0_P7_U0_CFG28 EQU 0x40010e5c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG29
|
|
CYREG_B0_P7_U0_CFG29 EQU 0x40010e5d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG30
|
|
CYREG_B0_P7_U0_CFG30 EQU 0x40010e5e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_CFG31
|
|
CYREG_B0_P7_U0_CFG31 EQU 0x40010e5f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_DCFG0
|
|
CYREG_B0_P7_U0_DCFG0 EQU 0x40010e60
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_DCFG1
|
|
CYREG_B0_P7_U0_DCFG1 EQU 0x40010e62
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_DCFG2
|
|
CYREG_B0_P7_U0_DCFG2 EQU 0x40010e64
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_DCFG3
|
|
CYREG_B0_P7_U0_DCFG3 EQU 0x40010e66
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_DCFG4
|
|
CYREG_B0_P7_U0_DCFG4 EQU 0x40010e68
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_DCFG5
|
|
CYREG_B0_P7_U0_DCFG5 EQU 0x40010e6a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_DCFG6
|
|
CYREG_B0_P7_U0_DCFG6 EQU 0x40010e6c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U0_DCFG7
|
|
CYREG_B0_P7_U0_DCFG7 EQU 0x40010e6e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_BASE
|
|
CYDEV_UCFG_B0_P7_U1_BASE EQU 0x40010e80
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_SIZE
|
|
CYDEV_UCFG_B0_P7_U1_SIZE EQU 0x00000070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_IT0
|
|
CYREG_B0_P7_U1_PLD_IT0 EQU 0x40010e80
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_IT1
|
|
CYREG_B0_P7_U1_PLD_IT1 EQU 0x40010e84
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_IT2
|
|
CYREG_B0_P7_U1_PLD_IT2 EQU 0x40010e88
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_IT3
|
|
CYREG_B0_P7_U1_PLD_IT3 EQU 0x40010e8c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_IT4
|
|
CYREG_B0_P7_U1_PLD_IT4 EQU 0x40010e90
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_IT5
|
|
CYREG_B0_P7_U1_PLD_IT5 EQU 0x40010e94
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_IT6
|
|
CYREG_B0_P7_U1_PLD_IT6 EQU 0x40010e98
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_IT7
|
|
CYREG_B0_P7_U1_PLD_IT7 EQU 0x40010e9c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_IT8
|
|
CYREG_B0_P7_U1_PLD_IT8 EQU 0x40010ea0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_IT9
|
|
CYREG_B0_P7_U1_PLD_IT9 EQU 0x40010ea4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_IT10
|
|
CYREG_B0_P7_U1_PLD_IT10 EQU 0x40010ea8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_IT11
|
|
CYREG_B0_P7_U1_PLD_IT11 EQU 0x40010eac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_ORT0
|
|
CYREG_B0_P7_U1_PLD_ORT0 EQU 0x40010eb0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_ORT1
|
|
CYREG_B0_P7_U1_PLD_ORT1 EQU 0x40010eb2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_ORT2
|
|
CYREG_B0_P7_U1_PLD_ORT2 EQU 0x40010eb4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_ORT3
|
|
CYREG_B0_P7_U1_PLD_ORT3 EQU 0x40010eb6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_MC_CFG_CEN_CONST
|
|
CYREG_B0_P7_U1_MC_CFG_CEN_CONST EQU 0x40010eb8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_MC_CFG_XORFB
|
|
CYREG_B0_P7_U1_MC_CFG_XORFB EQU 0x40010eba
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_MC_CFG_SET_RESET
|
|
CYREG_B0_P7_U1_MC_CFG_SET_RESET EQU 0x40010ebc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_MC_CFG_BYPASS
|
|
CYREG_B0_P7_U1_MC_CFG_BYPASS EQU 0x40010ebe
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG0
|
|
CYREG_B0_P7_U1_CFG0 EQU 0x40010ec0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG1
|
|
CYREG_B0_P7_U1_CFG1 EQU 0x40010ec1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG2
|
|
CYREG_B0_P7_U1_CFG2 EQU 0x40010ec2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG3
|
|
CYREG_B0_P7_U1_CFG3 EQU 0x40010ec3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG4
|
|
CYREG_B0_P7_U1_CFG4 EQU 0x40010ec4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG5
|
|
CYREG_B0_P7_U1_CFG5 EQU 0x40010ec5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG6
|
|
CYREG_B0_P7_U1_CFG6 EQU 0x40010ec6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG7
|
|
CYREG_B0_P7_U1_CFG7 EQU 0x40010ec7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG8
|
|
CYREG_B0_P7_U1_CFG8 EQU 0x40010ec8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG9
|
|
CYREG_B0_P7_U1_CFG9 EQU 0x40010ec9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG10
|
|
CYREG_B0_P7_U1_CFG10 EQU 0x40010eca
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG11
|
|
CYREG_B0_P7_U1_CFG11 EQU 0x40010ecb
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG12
|
|
CYREG_B0_P7_U1_CFG12 EQU 0x40010ecc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG13
|
|
CYREG_B0_P7_U1_CFG13 EQU 0x40010ecd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG14
|
|
CYREG_B0_P7_U1_CFG14 EQU 0x40010ece
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG15
|
|
CYREG_B0_P7_U1_CFG15 EQU 0x40010ecf
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG16
|
|
CYREG_B0_P7_U1_CFG16 EQU 0x40010ed0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG17
|
|
CYREG_B0_P7_U1_CFG17 EQU 0x40010ed1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG18
|
|
CYREG_B0_P7_U1_CFG18 EQU 0x40010ed2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG19
|
|
CYREG_B0_P7_U1_CFG19 EQU 0x40010ed3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG20
|
|
CYREG_B0_P7_U1_CFG20 EQU 0x40010ed4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG21
|
|
CYREG_B0_P7_U1_CFG21 EQU 0x40010ed5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG22
|
|
CYREG_B0_P7_U1_CFG22 EQU 0x40010ed6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG23
|
|
CYREG_B0_P7_U1_CFG23 EQU 0x40010ed7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG24
|
|
CYREG_B0_P7_U1_CFG24 EQU 0x40010ed8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG25
|
|
CYREG_B0_P7_U1_CFG25 EQU 0x40010ed9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG26
|
|
CYREG_B0_P7_U1_CFG26 EQU 0x40010eda
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG27
|
|
CYREG_B0_P7_U1_CFG27 EQU 0x40010edb
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG28
|
|
CYREG_B0_P7_U1_CFG28 EQU 0x40010edc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG29
|
|
CYREG_B0_P7_U1_CFG29 EQU 0x40010edd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG30
|
|
CYREG_B0_P7_U1_CFG30 EQU 0x40010ede
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_CFG31
|
|
CYREG_B0_P7_U1_CFG31 EQU 0x40010edf
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_DCFG0
|
|
CYREG_B0_P7_U1_DCFG0 EQU 0x40010ee0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_DCFG1
|
|
CYREG_B0_P7_U1_DCFG1 EQU 0x40010ee2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_DCFG2
|
|
CYREG_B0_P7_U1_DCFG2 EQU 0x40010ee4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_DCFG3
|
|
CYREG_B0_P7_U1_DCFG3 EQU 0x40010ee6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_DCFG4
|
|
CYREG_B0_P7_U1_DCFG4 EQU 0x40010ee8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_DCFG5
|
|
CYREG_B0_P7_U1_DCFG5 EQU 0x40010eea
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_DCFG6
|
|
CYREG_B0_P7_U1_DCFG6 EQU 0x40010eec
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B0_P7_U1_DCFG7
|
|
CYREG_B0_P7_U1_DCFG7 EQU 0x40010eee
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P7_ROUTE_BASE
|
|
CYDEV_UCFG_B0_P7_ROUTE_BASE EQU 0x40010f00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B0_P7_ROUTE_SIZE
|
|
CYDEV_UCFG_B0_P7_ROUTE_SIZE EQU 0x000000ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_BASE
|
|
CYDEV_UCFG_B1_BASE EQU 0x40011000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_SIZE
|
|
CYDEV_UCFG_B1_SIZE EQU 0x00000fef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P2_BASE
|
|
CYDEV_UCFG_B1_P2_BASE EQU 0x40011400
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P2_SIZE
|
|
CYDEV_UCFG_B1_P2_SIZE EQU 0x000001ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_BASE
|
|
CYDEV_UCFG_B1_P2_U0_BASE EQU 0x40011400
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_SIZE
|
|
CYDEV_UCFG_B1_P2_U0_SIZE EQU 0x00000070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_IT0
|
|
CYREG_B1_P2_U0_PLD_IT0 EQU 0x40011400
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_IT1
|
|
CYREG_B1_P2_U0_PLD_IT1 EQU 0x40011404
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_IT2
|
|
CYREG_B1_P2_U0_PLD_IT2 EQU 0x40011408
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_IT3
|
|
CYREG_B1_P2_U0_PLD_IT3 EQU 0x4001140c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_IT4
|
|
CYREG_B1_P2_U0_PLD_IT4 EQU 0x40011410
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_IT5
|
|
CYREG_B1_P2_U0_PLD_IT5 EQU 0x40011414
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_IT6
|
|
CYREG_B1_P2_U0_PLD_IT6 EQU 0x40011418
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_IT7
|
|
CYREG_B1_P2_U0_PLD_IT7 EQU 0x4001141c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_IT8
|
|
CYREG_B1_P2_U0_PLD_IT8 EQU 0x40011420
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_IT9
|
|
CYREG_B1_P2_U0_PLD_IT9 EQU 0x40011424
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_IT10
|
|
CYREG_B1_P2_U0_PLD_IT10 EQU 0x40011428
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_IT11
|
|
CYREG_B1_P2_U0_PLD_IT11 EQU 0x4001142c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_ORT0
|
|
CYREG_B1_P2_U0_PLD_ORT0 EQU 0x40011430
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_ORT1
|
|
CYREG_B1_P2_U0_PLD_ORT1 EQU 0x40011432
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_ORT2
|
|
CYREG_B1_P2_U0_PLD_ORT2 EQU 0x40011434
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_ORT3
|
|
CYREG_B1_P2_U0_PLD_ORT3 EQU 0x40011436
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_MC_CFG_CEN_CONST
|
|
CYREG_B1_P2_U0_MC_CFG_CEN_CONST EQU 0x40011438
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_MC_CFG_XORFB
|
|
CYREG_B1_P2_U0_MC_CFG_XORFB EQU 0x4001143a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_MC_CFG_SET_RESET
|
|
CYREG_B1_P2_U0_MC_CFG_SET_RESET EQU 0x4001143c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_MC_CFG_BYPASS
|
|
CYREG_B1_P2_U0_MC_CFG_BYPASS EQU 0x4001143e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG0
|
|
CYREG_B1_P2_U0_CFG0 EQU 0x40011440
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG1
|
|
CYREG_B1_P2_U0_CFG1 EQU 0x40011441
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG2
|
|
CYREG_B1_P2_U0_CFG2 EQU 0x40011442
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG3
|
|
CYREG_B1_P2_U0_CFG3 EQU 0x40011443
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG4
|
|
CYREG_B1_P2_U0_CFG4 EQU 0x40011444
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG5
|
|
CYREG_B1_P2_U0_CFG5 EQU 0x40011445
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG6
|
|
CYREG_B1_P2_U0_CFG6 EQU 0x40011446
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG7
|
|
CYREG_B1_P2_U0_CFG7 EQU 0x40011447
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG8
|
|
CYREG_B1_P2_U0_CFG8 EQU 0x40011448
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG9
|
|
CYREG_B1_P2_U0_CFG9 EQU 0x40011449
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG10
|
|
CYREG_B1_P2_U0_CFG10 EQU 0x4001144a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG11
|
|
CYREG_B1_P2_U0_CFG11 EQU 0x4001144b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG12
|
|
CYREG_B1_P2_U0_CFG12 EQU 0x4001144c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG13
|
|
CYREG_B1_P2_U0_CFG13 EQU 0x4001144d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG14
|
|
CYREG_B1_P2_U0_CFG14 EQU 0x4001144e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG15
|
|
CYREG_B1_P2_U0_CFG15 EQU 0x4001144f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG16
|
|
CYREG_B1_P2_U0_CFG16 EQU 0x40011450
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG17
|
|
CYREG_B1_P2_U0_CFG17 EQU 0x40011451
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG18
|
|
CYREG_B1_P2_U0_CFG18 EQU 0x40011452
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG19
|
|
CYREG_B1_P2_U0_CFG19 EQU 0x40011453
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG20
|
|
CYREG_B1_P2_U0_CFG20 EQU 0x40011454
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG21
|
|
CYREG_B1_P2_U0_CFG21 EQU 0x40011455
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG22
|
|
CYREG_B1_P2_U0_CFG22 EQU 0x40011456
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG23
|
|
CYREG_B1_P2_U0_CFG23 EQU 0x40011457
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG24
|
|
CYREG_B1_P2_U0_CFG24 EQU 0x40011458
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG25
|
|
CYREG_B1_P2_U0_CFG25 EQU 0x40011459
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG26
|
|
CYREG_B1_P2_U0_CFG26 EQU 0x4001145a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG27
|
|
CYREG_B1_P2_U0_CFG27 EQU 0x4001145b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG28
|
|
CYREG_B1_P2_U0_CFG28 EQU 0x4001145c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG29
|
|
CYREG_B1_P2_U0_CFG29 EQU 0x4001145d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG30
|
|
CYREG_B1_P2_U0_CFG30 EQU 0x4001145e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_CFG31
|
|
CYREG_B1_P2_U0_CFG31 EQU 0x4001145f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_DCFG0
|
|
CYREG_B1_P2_U0_DCFG0 EQU 0x40011460
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_DCFG1
|
|
CYREG_B1_P2_U0_DCFG1 EQU 0x40011462
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_DCFG2
|
|
CYREG_B1_P2_U0_DCFG2 EQU 0x40011464
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_DCFG3
|
|
CYREG_B1_P2_U0_DCFG3 EQU 0x40011466
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_DCFG4
|
|
CYREG_B1_P2_U0_DCFG4 EQU 0x40011468
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_DCFG5
|
|
CYREG_B1_P2_U0_DCFG5 EQU 0x4001146a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_DCFG6
|
|
CYREG_B1_P2_U0_DCFG6 EQU 0x4001146c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U0_DCFG7
|
|
CYREG_B1_P2_U0_DCFG7 EQU 0x4001146e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_BASE
|
|
CYDEV_UCFG_B1_P2_U1_BASE EQU 0x40011480
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_SIZE
|
|
CYDEV_UCFG_B1_P2_U1_SIZE EQU 0x00000070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_IT0
|
|
CYREG_B1_P2_U1_PLD_IT0 EQU 0x40011480
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_IT1
|
|
CYREG_B1_P2_U1_PLD_IT1 EQU 0x40011484
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_IT2
|
|
CYREG_B1_P2_U1_PLD_IT2 EQU 0x40011488
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_IT3
|
|
CYREG_B1_P2_U1_PLD_IT3 EQU 0x4001148c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_IT4
|
|
CYREG_B1_P2_U1_PLD_IT4 EQU 0x40011490
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_IT5
|
|
CYREG_B1_P2_U1_PLD_IT5 EQU 0x40011494
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_IT6
|
|
CYREG_B1_P2_U1_PLD_IT6 EQU 0x40011498
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_IT7
|
|
CYREG_B1_P2_U1_PLD_IT7 EQU 0x4001149c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_IT8
|
|
CYREG_B1_P2_U1_PLD_IT8 EQU 0x400114a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_IT9
|
|
CYREG_B1_P2_U1_PLD_IT9 EQU 0x400114a4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_IT10
|
|
CYREG_B1_P2_U1_PLD_IT10 EQU 0x400114a8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_IT11
|
|
CYREG_B1_P2_U1_PLD_IT11 EQU 0x400114ac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_ORT0
|
|
CYREG_B1_P2_U1_PLD_ORT0 EQU 0x400114b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_ORT1
|
|
CYREG_B1_P2_U1_PLD_ORT1 EQU 0x400114b2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_ORT2
|
|
CYREG_B1_P2_U1_PLD_ORT2 EQU 0x400114b4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_ORT3
|
|
CYREG_B1_P2_U1_PLD_ORT3 EQU 0x400114b6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_MC_CFG_CEN_CONST
|
|
CYREG_B1_P2_U1_MC_CFG_CEN_CONST EQU 0x400114b8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_MC_CFG_XORFB
|
|
CYREG_B1_P2_U1_MC_CFG_XORFB EQU 0x400114ba
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_MC_CFG_SET_RESET
|
|
CYREG_B1_P2_U1_MC_CFG_SET_RESET EQU 0x400114bc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_MC_CFG_BYPASS
|
|
CYREG_B1_P2_U1_MC_CFG_BYPASS EQU 0x400114be
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG0
|
|
CYREG_B1_P2_U1_CFG0 EQU 0x400114c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG1
|
|
CYREG_B1_P2_U1_CFG1 EQU 0x400114c1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG2
|
|
CYREG_B1_P2_U1_CFG2 EQU 0x400114c2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG3
|
|
CYREG_B1_P2_U1_CFG3 EQU 0x400114c3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG4
|
|
CYREG_B1_P2_U1_CFG4 EQU 0x400114c4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG5
|
|
CYREG_B1_P2_U1_CFG5 EQU 0x400114c5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG6
|
|
CYREG_B1_P2_U1_CFG6 EQU 0x400114c6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG7
|
|
CYREG_B1_P2_U1_CFG7 EQU 0x400114c7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG8
|
|
CYREG_B1_P2_U1_CFG8 EQU 0x400114c8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG9
|
|
CYREG_B1_P2_U1_CFG9 EQU 0x400114c9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG10
|
|
CYREG_B1_P2_U1_CFG10 EQU 0x400114ca
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG11
|
|
CYREG_B1_P2_U1_CFG11 EQU 0x400114cb
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG12
|
|
CYREG_B1_P2_U1_CFG12 EQU 0x400114cc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG13
|
|
CYREG_B1_P2_U1_CFG13 EQU 0x400114cd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG14
|
|
CYREG_B1_P2_U1_CFG14 EQU 0x400114ce
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG15
|
|
CYREG_B1_P2_U1_CFG15 EQU 0x400114cf
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG16
|
|
CYREG_B1_P2_U1_CFG16 EQU 0x400114d0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG17
|
|
CYREG_B1_P2_U1_CFG17 EQU 0x400114d1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG18
|
|
CYREG_B1_P2_U1_CFG18 EQU 0x400114d2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG19
|
|
CYREG_B1_P2_U1_CFG19 EQU 0x400114d3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG20
|
|
CYREG_B1_P2_U1_CFG20 EQU 0x400114d4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG21
|
|
CYREG_B1_P2_U1_CFG21 EQU 0x400114d5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG22
|
|
CYREG_B1_P2_U1_CFG22 EQU 0x400114d6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG23
|
|
CYREG_B1_P2_U1_CFG23 EQU 0x400114d7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG24
|
|
CYREG_B1_P2_U1_CFG24 EQU 0x400114d8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG25
|
|
CYREG_B1_P2_U1_CFG25 EQU 0x400114d9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG26
|
|
CYREG_B1_P2_U1_CFG26 EQU 0x400114da
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG27
|
|
CYREG_B1_P2_U1_CFG27 EQU 0x400114db
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG28
|
|
CYREG_B1_P2_U1_CFG28 EQU 0x400114dc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG29
|
|
CYREG_B1_P2_U1_CFG29 EQU 0x400114dd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG30
|
|
CYREG_B1_P2_U1_CFG30 EQU 0x400114de
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_CFG31
|
|
CYREG_B1_P2_U1_CFG31 EQU 0x400114df
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_DCFG0
|
|
CYREG_B1_P2_U1_DCFG0 EQU 0x400114e0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_DCFG1
|
|
CYREG_B1_P2_U1_DCFG1 EQU 0x400114e2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_DCFG2
|
|
CYREG_B1_P2_U1_DCFG2 EQU 0x400114e4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_DCFG3
|
|
CYREG_B1_P2_U1_DCFG3 EQU 0x400114e6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_DCFG4
|
|
CYREG_B1_P2_U1_DCFG4 EQU 0x400114e8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_DCFG5
|
|
CYREG_B1_P2_U1_DCFG5 EQU 0x400114ea
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_DCFG6
|
|
CYREG_B1_P2_U1_DCFG6 EQU 0x400114ec
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P2_U1_DCFG7
|
|
CYREG_B1_P2_U1_DCFG7 EQU 0x400114ee
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P2_ROUTE_BASE
|
|
CYDEV_UCFG_B1_P2_ROUTE_BASE EQU 0x40011500
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P2_ROUTE_SIZE
|
|
CYDEV_UCFG_B1_P2_ROUTE_SIZE EQU 0x000000ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P3_BASE
|
|
CYDEV_UCFG_B1_P3_BASE EQU 0x40011600
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P3_SIZE
|
|
CYDEV_UCFG_B1_P3_SIZE EQU 0x000001ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_BASE
|
|
CYDEV_UCFG_B1_P3_U0_BASE EQU 0x40011600
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_SIZE
|
|
CYDEV_UCFG_B1_P3_U0_SIZE EQU 0x00000070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_IT0
|
|
CYREG_B1_P3_U0_PLD_IT0 EQU 0x40011600
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_IT1
|
|
CYREG_B1_P3_U0_PLD_IT1 EQU 0x40011604
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_IT2
|
|
CYREG_B1_P3_U0_PLD_IT2 EQU 0x40011608
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_IT3
|
|
CYREG_B1_P3_U0_PLD_IT3 EQU 0x4001160c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_IT4
|
|
CYREG_B1_P3_U0_PLD_IT4 EQU 0x40011610
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_IT5
|
|
CYREG_B1_P3_U0_PLD_IT5 EQU 0x40011614
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_IT6
|
|
CYREG_B1_P3_U0_PLD_IT6 EQU 0x40011618
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_IT7
|
|
CYREG_B1_P3_U0_PLD_IT7 EQU 0x4001161c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_IT8
|
|
CYREG_B1_P3_U0_PLD_IT8 EQU 0x40011620
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_IT9
|
|
CYREG_B1_P3_U0_PLD_IT9 EQU 0x40011624
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_IT10
|
|
CYREG_B1_P3_U0_PLD_IT10 EQU 0x40011628
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_IT11
|
|
CYREG_B1_P3_U0_PLD_IT11 EQU 0x4001162c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_ORT0
|
|
CYREG_B1_P3_U0_PLD_ORT0 EQU 0x40011630
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_ORT1
|
|
CYREG_B1_P3_U0_PLD_ORT1 EQU 0x40011632
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_ORT2
|
|
CYREG_B1_P3_U0_PLD_ORT2 EQU 0x40011634
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_ORT3
|
|
CYREG_B1_P3_U0_PLD_ORT3 EQU 0x40011636
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_MC_CFG_CEN_CONST
|
|
CYREG_B1_P3_U0_MC_CFG_CEN_CONST EQU 0x40011638
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_MC_CFG_XORFB
|
|
CYREG_B1_P3_U0_MC_CFG_XORFB EQU 0x4001163a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_MC_CFG_SET_RESET
|
|
CYREG_B1_P3_U0_MC_CFG_SET_RESET EQU 0x4001163c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_MC_CFG_BYPASS
|
|
CYREG_B1_P3_U0_MC_CFG_BYPASS EQU 0x4001163e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG0
|
|
CYREG_B1_P3_U0_CFG0 EQU 0x40011640
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG1
|
|
CYREG_B1_P3_U0_CFG1 EQU 0x40011641
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG2
|
|
CYREG_B1_P3_U0_CFG2 EQU 0x40011642
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG3
|
|
CYREG_B1_P3_U0_CFG3 EQU 0x40011643
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG4
|
|
CYREG_B1_P3_U0_CFG4 EQU 0x40011644
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG5
|
|
CYREG_B1_P3_U0_CFG5 EQU 0x40011645
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG6
|
|
CYREG_B1_P3_U0_CFG6 EQU 0x40011646
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG7
|
|
CYREG_B1_P3_U0_CFG7 EQU 0x40011647
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG8
|
|
CYREG_B1_P3_U0_CFG8 EQU 0x40011648
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG9
|
|
CYREG_B1_P3_U0_CFG9 EQU 0x40011649
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG10
|
|
CYREG_B1_P3_U0_CFG10 EQU 0x4001164a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG11
|
|
CYREG_B1_P3_U0_CFG11 EQU 0x4001164b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG12
|
|
CYREG_B1_P3_U0_CFG12 EQU 0x4001164c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG13
|
|
CYREG_B1_P3_U0_CFG13 EQU 0x4001164d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG14
|
|
CYREG_B1_P3_U0_CFG14 EQU 0x4001164e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG15
|
|
CYREG_B1_P3_U0_CFG15 EQU 0x4001164f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG16
|
|
CYREG_B1_P3_U0_CFG16 EQU 0x40011650
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG17
|
|
CYREG_B1_P3_U0_CFG17 EQU 0x40011651
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG18
|
|
CYREG_B1_P3_U0_CFG18 EQU 0x40011652
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG19
|
|
CYREG_B1_P3_U0_CFG19 EQU 0x40011653
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG20
|
|
CYREG_B1_P3_U0_CFG20 EQU 0x40011654
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG21
|
|
CYREG_B1_P3_U0_CFG21 EQU 0x40011655
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG22
|
|
CYREG_B1_P3_U0_CFG22 EQU 0x40011656
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG23
|
|
CYREG_B1_P3_U0_CFG23 EQU 0x40011657
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG24
|
|
CYREG_B1_P3_U0_CFG24 EQU 0x40011658
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG25
|
|
CYREG_B1_P3_U0_CFG25 EQU 0x40011659
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG26
|
|
CYREG_B1_P3_U0_CFG26 EQU 0x4001165a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG27
|
|
CYREG_B1_P3_U0_CFG27 EQU 0x4001165b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG28
|
|
CYREG_B1_P3_U0_CFG28 EQU 0x4001165c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG29
|
|
CYREG_B1_P3_U0_CFG29 EQU 0x4001165d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG30
|
|
CYREG_B1_P3_U0_CFG30 EQU 0x4001165e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_CFG31
|
|
CYREG_B1_P3_U0_CFG31 EQU 0x4001165f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_DCFG0
|
|
CYREG_B1_P3_U0_DCFG0 EQU 0x40011660
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_DCFG1
|
|
CYREG_B1_P3_U0_DCFG1 EQU 0x40011662
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_DCFG2
|
|
CYREG_B1_P3_U0_DCFG2 EQU 0x40011664
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_DCFG3
|
|
CYREG_B1_P3_U0_DCFG3 EQU 0x40011666
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_DCFG4
|
|
CYREG_B1_P3_U0_DCFG4 EQU 0x40011668
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_DCFG5
|
|
CYREG_B1_P3_U0_DCFG5 EQU 0x4001166a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_DCFG6
|
|
CYREG_B1_P3_U0_DCFG6 EQU 0x4001166c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U0_DCFG7
|
|
CYREG_B1_P3_U0_DCFG7 EQU 0x4001166e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_BASE
|
|
CYDEV_UCFG_B1_P3_U1_BASE EQU 0x40011680
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_SIZE
|
|
CYDEV_UCFG_B1_P3_U1_SIZE EQU 0x00000070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_IT0
|
|
CYREG_B1_P3_U1_PLD_IT0 EQU 0x40011680
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_IT1
|
|
CYREG_B1_P3_U1_PLD_IT1 EQU 0x40011684
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_IT2
|
|
CYREG_B1_P3_U1_PLD_IT2 EQU 0x40011688
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_IT3
|
|
CYREG_B1_P3_U1_PLD_IT3 EQU 0x4001168c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_IT4
|
|
CYREG_B1_P3_U1_PLD_IT4 EQU 0x40011690
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_IT5
|
|
CYREG_B1_P3_U1_PLD_IT5 EQU 0x40011694
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_IT6
|
|
CYREG_B1_P3_U1_PLD_IT6 EQU 0x40011698
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_IT7
|
|
CYREG_B1_P3_U1_PLD_IT7 EQU 0x4001169c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_IT8
|
|
CYREG_B1_P3_U1_PLD_IT8 EQU 0x400116a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_IT9
|
|
CYREG_B1_P3_U1_PLD_IT9 EQU 0x400116a4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_IT10
|
|
CYREG_B1_P3_U1_PLD_IT10 EQU 0x400116a8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_IT11
|
|
CYREG_B1_P3_U1_PLD_IT11 EQU 0x400116ac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_ORT0
|
|
CYREG_B1_P3_U1_PLD_ORT0 EQU 0x400116b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_ORT1
|
|
CYREG_B1_P3_U1_PLD_ORT1 EQU 0x400116b2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_ORT2
|
|
CYREG_B1_P3_U1_PLD_ORT2 EQU 0x400116b4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_ORT3
|
|
CYREG_B1_P3_U1_PLD_ORT3 EQU 0x400116b6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_MC_CFG_CEN_CONST
|
|
CYREG_B1_P3_U1_MC_CFG_CEN_CONST EQU 0x400116b8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_MC_CFG_XORFB
|
|
CYREG_B1_P3_U1_MC_CFG_XORFB EQU 0x400116ba
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_MC_CFG_SET_RESET
|
|
CYREG_B1_P3_U1_MC_CFG_SET_RESET EQU 0x400116bc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_MC_CFG_BYPASS
|
|
CYREG_B1_P3_U1_MC_CFG_BYPASS EQU 0x400116be
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG0
|
|
CYREG_B1_P3_U1_CFG0 EQU 0x400116c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG1
|
|
CYREG_B1_P3_U1_CFG1 EQU 0x400116c1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG2
|
|
CYREG_B1_P3_U1_CFG2 EQU 0x400116c2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG3
|
|
CYREG_B1_P3_U1_CFG3 EQU 0x400116c3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG4
|
|
CYREG_B1_P3_U1_CFG4 EQU 0x400116c4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG5
|
|
CYREG_B1_P3_U1_CFG5 EQU 0x400116c5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG6
|
|
CYREG_B1_P3_U1_CFG6 EQU 0x400116c6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG7
|
|
CYREG_B1_P3_U1_CFG7 EQU 0x400116c7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG8
|
|
CYREG_B1_P3_U1_CFG8 EQU 0x400116c8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG9
|
|
CYREG_B1_P3_U1_CFG9 EQU 0x400116c9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG10
|
|
CYREG_B1_P3_U1_CFG10 EQU 0x400116ca
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG11
|
|
CYREG_B1_P3_U1_CFG11 EQU 0x400116cb
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG12
|
|
CYREG_B1_P3_U1_CFG12 EQU 0x400116cc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG13
|
|
CYREG_B1_P3_U1_CFG13 EQU 0x400116cd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG14
|
|
CYREG_B1_P3_U1_CFG14 EQU 0x400116ce
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG15
|
|
CYREG_B1_P3_U1_CFG15 EQU 0x400116cf
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG16
|
|
CYREG_B1_P3_U1_CFG16 EQU 0x400116d0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG17
|
|
CYREG_B1_P3_U1_CFG17 EQU 0x400116d1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG18
|
|
CYREG_B1_P3_U1_CFG18 EQU 0x400116d2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG19
|
|
CYREG_B1_P3_U1_CFG19 EQU 0x400116d3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG20
|
|
CYREG_B1_P3_U1_CFG20 EQU 0x400116d4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG21
|
|
CYREG_B1_P3_U1_CFG21 EQU 0x400116d5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG22
|
|
CYREG_B1_P3_U1_CFG22 EQU 0x400116d6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG23
|
|
CYREG_B1_P3_U1_CFG23 EQU 0x400116d7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG24
|
|
CYREG_B1_P3_U1_CFG24 EQU 0x400116d8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG25
|
|
CYREG_B1_P3_U1_CFG25 EQU 0x400116d9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG26
|
|
CYREG_B1_P3_U1_CFG26 EQU 0x400116da
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG27
|
|
CYREG_B1_P3_U1_CFG27 EQU 0x400116db
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG28
|
|
CYREG_B1_P3_U1_CFG28 EQU 0x400116dc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG29
|
|
CYREG_B1_P3_U1_CFG29 EQU 0x400116dd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG30
|
|
CYREG_B1_P3_U1_CFG30 EQU 0x400116de
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_CFG31
|
|
CYREG_B1_P3_U1_CFG31 EQU 0x400116df
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_DCFG0
|
|
CYREG_B1_P3_U1_DCFG0 EQU 0x400116e0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_DCFG1
|
|
CYREG_B1_P3_U1_DCFG1 EQU 0x400116e2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_DCFG2
|
|
CYREG_B1_P3_U1_DCFG2 EQU 0x400116e4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_DCFG3
|
|
CYREG_B1_P3_U1_DCFG3 EQU 0x400116e6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_DCFG4
|
|
CYREG_B1_P3_U1_DCFG4 EQU 0x400116e8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_DCFG5
|
|
CYREG_B1_P3_U1_DCFG5 EQU 0x400116ea
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_DCFG6
|
|
CYREG_B1_P3_U1_DCFG6 EQU 0x400116ec
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P3_U1_DCFG7
|
|
CYREG_B1_P3_U1_DCFG7 EQU 0x400116ee
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P3_ROUTE_BASE
|
|
CYDEV_UCFG_B1_P3_ROUTE_BASE EQU 0x40011700
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P3_ROUTE_SIZE
|
|
CYDEV_UCFG_B1_P3_ROUTE_SIZE EQU 0x000000ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P4_BASE
|
|
CYDEV_UCFG_B1_P4_BASE EQU 0x40011800
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P4_SIZE
|
|
CYDEV_UCFG_B1_P4_SIZE EQU 0x000001ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_BASE
|
|
CYDEV_UCFG_B1_P4_U0_BASE EQU 0x40011800
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_SIZE
|
|
CYDEV_UCFG_B1_P4_U0_SIZE EQU 0x00000070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_IT0
|
|
CYREG_B1_P4_U0_PLD_IT0 EQU 0x40011800
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_IT1
|
|
CYREG_B1_P4_U0_PLD_IT1 EQU 0x40011804
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_IT2
|
|
CYREG_B1_P4_U0_PLD_IT2 EQU 0x40011808
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_IT3
|
|
CYREG_B1_P4_U0_PLD_IT3 EQU 0x4001180c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_IT4
|
|
CYREG_B1_P4_U0_PLD_IT4 EQU 0x40011810
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_IT5
|
|
CYREG_B1_P4_U0_PLD_IT5 EQU 0x40011814
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_IT6
|
|
CYREG_B1_P4_U0_PLD_IT6 EQU 0x40011818
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_IT7
|
|
CYREG_B1_P4_U0_PLD_IT7 EQU 0x4001181c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_IT8
|
|
CYREG_B1_P4_U0_PLD_IT8 EQU 0x40011820
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_IT9
|
|
CYREG_B1_P4_U0_PLD_IT9 EQU 0x40011824
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_IT10
|
|
CYREG_B1_P4_U0_PLD_IT10 EQU 0x40011828
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_IT11
|
|
CYREG_B1_P4_U0_PLD_IT11 EQU 0x4001182c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_ORT0
|
|
CYREG_B1_P4_U0_PLD_ORT0 EQU 0x40011830
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_ORT1
|
|
CYREG_B1_P4_U0_PLD_ORT1 EQU 0x40011832
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_ORT2
|
|
CYREG_B1_P4_U0_PLD_ORT2 EQU 0x40011834
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_ORT3
|
|
CYREG_B1_P4_U0_PLD_ORT3 EQU 0x40011836
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_MC_CFG_CEN_CONST
|
|
CYREG_B1_P4_U0_MC_CFG_CEN_CONST EQU 0x40011838
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_MC_CFG_XORFB
|
|
CYREG_B1_P4_U0_MC_CFG_XORFB EQU 0x4001183a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_MC_CFG_SET_RESET
|
|
CYREG_B1_P4_U0_MC_CFG_SET_RESET EQU 0x4001183c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_MC_CFG_BYPASS
|
|
CYREG_B1_P4_U0_MC_CFG_BYPASS EQU 0x4001183e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG0
|
|
CYREG_B1_P4_U0_CFG0 EQU 0x40011840
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG1
|
|
CYREG_B1_P4_U0_CFG1 EQU 0x40011841
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG2
|
|
CYREG_B1_P4_U0_CFG2 EQU 0x40011842
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG3
|
|
CYREG_B1_P4_U0_CFG3 EQU 0x40011843
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG4
|
|
CYREG_B1_P4_U0_CFG4 EQU 0x40011844
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG5
|
|
CYREG_B1_P4_U0_CFG5 EQU 0x40011845
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG6
|
|
CYREG_B1_P4_U0_CFG6 EQU 0x40011846
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG7
|
|
CYREG_B1_P4_U0_CFG7 EQU 0x40011847
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG8
|
|
CYREG_B1_P4_U0_CFG8 EQU 0x40011848
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG9
|
|
CYREG_B1_P4_U0_CFG9 EQU 0x40011849
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG10
|
|
CYREG_B1_P4_U0_CFG10 EQU 0x4001184a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG11
|
|
CYREG_B1_P4_U0_CFG11 EQU 0x4001184b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG12
|
|
CYREG_B1_P4_U0_CFG12 EQU 0x4001184c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG13
|
|
CYREG_B1_P4_U0_CFG13 EQU 0x4001184d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG14
|
|
CYREG_B1_P4_U0_CFG14 EQU 0x4001184e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG15
|
|
CYREG_B1_P4_U0_CFG15 EQU 0x4001184f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG16
|
|
CYREG_B1_P4_U0_CFG16 EQU 0x40011850
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG17
|
|
CYREG_B1_P4_U0_CFG17 EQU 0x40011851
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG18
|
|
CYREG_B1_P4_U0_CFG18 EQU 0x40011852
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG19
|
|
CYREG_B1_P4_U0_CFG19 EQU 0x40011853
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG20
|
|
CYREG_B1_P4_U0_CFG20 EQU 0x40011854
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG21
|
|
CYREG_B1_P4_U0_CFG21 EQU 0x40011855
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG22
|
|
CYREG_B1_P4_U0_CFG22 EQU 0x40011856
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG23
|
|
CYREG_B1_P4_U0_CFG23 EQU 0x40011857
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG24
|
|
CYREG_B1_P4_U0_CFG24 EQU 0x40011858
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG25
|
|
CYREG_B1_P4_U0_CFG25 EQU 0x40011859
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG26
|
|
CYREG_B1_P4_U0_CFG26 EQU 0x4001185a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG27
|
|
CYREG_B1_P4_U0_CFG27 EQU 0x4001185b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG28
|
|
CYREG_B1_P4_U0_CFG28 EQU 0x4001185c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG29
|
|
CYREG_B1_P4_U0_CFG29 EQU 0x4001185d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG30
|
|
CYREG_B1_P4_U0_CFG30 EQU 0x4001185e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_CFG31
|
|
CYREG_B1_P4_U0_CFG31 EQU 0x4001185f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_DCFG0
|
|
CYREG_B1_P4_U0_DCFG0 EQU 0x40011860
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_DCFG1
|
|
CYREG_B1_P4_U0_DCFG1 EQU 0x40011862
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_DCFG2
|
|
CYREG_B1_P4_U0_DCFG2 EQU 0x40011864
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_DCFG3
|
|
CYREG_B1_P4_U0_DCFG3 EQU 0x40011866
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_DCFG4
|
|
CYREG_B1_P4_U0_DCFG4 EQU 0x40011868
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_DCFG5
|
|
CYREG_B1_P4_U0_DCFG5 EQU 0x4001186a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_DCFG6
|
|
CYREG_B1_P4_U0_DCFG6 EQU 0x4001186c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U0_DCFG7
|
|
CYREG_B1_P4_U0_DCFG7 EQU 0x4001186e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_BASE
|
|
CYDEV_UCFG_B1_P4_U1_BASE EQU 0x40011880
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_SIZE
|
|
CYDEV_UCFG_B1_P4_U1_SIZE EQU 0x00000070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_IT0
|
|
CYREG_B1_P4_U1_PLD_IT0 EQU 0x40011880
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_IT1
|
|
CYREG_B1_P4_U1_PLD_IT1 EQU 0x40011884
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_IT2
|
|
CYREG_B1_P4_U1_PLD_IT2 EQU 0x40011888
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_IT3
|
|
CYREG_B1_P4_U1_PLD_IT3 EQU 0x4001188c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_IT4
|
|
CYREG_B1_P4_U1_PLD_IT4 EQU 0x40011890
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_IT5
|
|
CYREG_B1_P4_U1_PLD_IT5 EQU 0x40011894
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_IT6
|
|
CYREG_B1_P4_U1_PLD_IT6 EQU 0x40011898
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_IT7
|
|
CYREG_B1_P4_U1_PLD_IT7 EQU 0x4001189c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_IT8
|
|
CYREG_B1_P4_U1_PLD_IT8 EQU 0x400118a0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_IT9
|
|
CYREG_B1_P4_U1_PLD_IT9 EQU 0x400118a4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_IT10
|
|
CYREG_B1_P4_U1_PLD_IT10 EQU 0x400118a8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_IT11
|
|
CYREG_B1_P4_U1_PLD_IT11 EQU 0x400118ac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_ORT0
|
|
CYREG_B1_P4_U1_PLD_ORT0 EQU 0x400118b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_ORT1
|
|
CYREG_B1_P4_U1_PLD_ORT1 EQU 0x400118b2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_ORT2
|
|
CYREG_B1_P4_U1_PLD_ORT2 EQU 0x400118b4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_ORT3
|
|
CYREG_B1_P4_U1_PLD_ORT3 EQU 0x400118b6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_MC_CFG_CEN_CONST
|
|
CYREG_B1_P4_U1_MC_CFG_CEN_CONST EQU 0x400118b8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_MC_CFG_XORFB
|
|
CYREG_B1_P4_U1_MC_CFG_XORFB EQU 0x400118ba
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_MC_CFG_SET_RESET
|
|
CYREG_B1_P4_U1_MC_CFG_SET_RESET EQU 0x400118bc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_MC_CFG_BYPASS
|
|
CYREG_B1_P4_U1_MC_CFG_BYPASS EQU 0x400118be
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG0
|
|
CYREG_B1_P4_U1_CFG0 EQU 0x400118c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG1
|
|
CYREG_B1_P4_U1_CFG1 EQU 0x400118c1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG2
|
|
CYREG_B1_P4_U1_CFG2 EQU 0x400118c2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG3
|
|
CYREG_B1_P4_U1_CFG3 EQU 0x400118c3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG4
|
|
CYREG_B1_P4_U1_CFG4 EQU 0x400118c4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG5
|
|
CYREG_B1_P4_U1_CFG5 EQU 0x400118c5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG6
|
|
CYREG_B1_P4_U1_CFG6 EQU 0x400118c6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG7
|
|
CYREG_B1_P4_U1_CFG7 EQU 0x400118c7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG8
|
|
CYREG_B1_P4_U1_CFG8 EQU 0x400118c8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG9
|
|
CYREG_B1_P4_U1_CFG9 EQU 0x400118c9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG10
|
|
CYREG_B1_P4_U1_CFG10 EQU 0x400118ca
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG11
|
|
CYREG_B1_P4_U1_CFG11 EQU 0x400118cb
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG12
|
|
CYREG_B1_P4_U1_CFG12 EQU 0x400118cc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG13
|
|
CYREG_B1_P4_U1_CFG13 EQU 0x400118cd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG14
|
|
CYREG_B1_P4_U1_CFG14 EQU 0x400118ce
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG15
|
|
CYREG_B1_P4_U1_CFG15 EQU 0x400118cf
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG16
|
|
CYREG_B1_P4_U1_CFG16 EQU 0x400118d0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG17
|
|
CYREG_B1_P4_U1_CFG17 EQU 0x400118d1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG18
|
|
CYREG_B1_P4_U1_CFG18 EQU 0x400118d2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG19
|
|
CYREG_B1_P4_U1_CFG19 EQU 0x400118d3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG20
|
|
CYREG_B1_P4_U1_CFG20 EQU 0x400118d4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG21
|
|
CYREG_B1_P4_U1_CFG21 EQU 0x400118d5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG22
|
|
CYREG_B1_P4_U1_CFG22 EQU 0x400118d6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG23
|
|
CYREG_B1_P4_U1_CFG23 EQU 0x400118d7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG24
|
|
CYREG_B1_P4_U1_CFG24 EQU 0x400118d8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG25
|
|
CYREG_B1_P4_U1_CFG25 EQU 0x400118d9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG26
|
|
CYREG_B1_P4_U1_CFG26 EQU 0x400118da
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG27
|
|
CYREG_B1_P4_U1_CFG27 EQU 0x400118db
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG28
|
|
CYREG_B1_P4_U1_CFG28 EQU 0x400118dc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG29
|
|
CYREG_B1_P4_U1_CFG29 EQU 0x400118dd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG30
|
|
CYREG_B1_P4_U1_CFG30 EQU 0x400118de
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_CFG31
|
|
CYREG_B1_P4_U1_CFG31 EQU 0x400118df
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_DCFG0
|
|
CYREG_B1_P4_U1_DCFG0 EQU 0x400118e0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_DCFG1
|
|
CYREG_B1_P4_U1_DCFG1 EQU 0x400118e2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_DCFG2
|
|
CYREG_B1_P4_U1_DCFG2 EQU 0x400118e4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_DCFG3
|
|
CYREG_B1_P4_U1_DCFG3 EQU 0x400118e6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_DCFG4
|
|
CYREG_B1_P4_U1_DCFG4 EQU 0x400118e8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_DCFG5
|
|
CYREG_B1_P4_U1_DCFG5 EQU 0x400118ea
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_DCFG6
|
|
CYREG_B1_P4_U1_DCFG6 EQU 0x400118ec
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P4_U1_DCFG7
|
|
CYREG_B1_P4_U1_DCFG7 EQU 0x400118ee
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P4_ROUTE_BASE
|
|
CYDEV_UCFG_B1_P4_ROUTE_BASE EQU 0x40011900
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P4_ROUTE_SIZE
|
|
CYDEV_UCFG_B1_P4_ROUTE_SIZE EQU 0x000000ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P5_BASE
|
|
CYDEV_UCFG_B1_P5_BASE EQU 0x40011a00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P5_SIZE
|
|
CYDEV_UCFG_B1_P5_SIZE EQU 0x000001ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_BASE
|
|
CYDEV_UCFG_B1_P5_U0_BASE EQU 0x40011a00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_SIZE
|
|
CYDEV_UCFG_B1_P5_U0_SIZE EQU 0x00000070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_IT0
|
|
CYREG_B1_P5_U0_PLD_IT0 EQU 0x40011a00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_IT1
|
|
CYREG_B1_P5_U0_PLD_IT1 EQU 0x40011a04
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_IT2
|
|
CYREG_B1_P5_U0_PLD_IT2 EQU 0x40011a08
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_IT3
|
|
CYREG_B1_P5_U0_PLD_IT3 EQU 0x40011a0c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_IT4
|
|
CYREG_B1_P5_U0_PLD_IT4 EQU 0x40011a10
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_IT5
|
|
CYREG_B1_P5_U0_PLD_IT5 EQU 0x40011a14
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_IT6
|
|
CYREG_B1_P5_U0_PLD_IT6 EQU 0x40011a18
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_IT7
|
|
CYREG_B1_P5_U0_PLD_IT7 EQU 0x40011a1c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_IT8
|
|
CYREG_B1_P5_U0_PLD_IT8 EQU 0x40011a20
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_IT9
|
|
CYREG_B1_P5_U0_PLD_IT9 EQU 0x40011a24
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_IT10
|
|
CYREG_B1_P5_U0_PLD_IT10 EQU 0x40011a28
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_IT11
|
|
CYREG_B1_P5_U0_PLD_IT11 EQU 0x40011a2c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_ORT0
|
|
CYREG_B1_P5_U0_PLD_ORT0 EQU 0x40011a30
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_ORT1
|
|
CYREG_B1_P5_U0_PLD_ORT1 EQU 0x40011a32
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_ORT2
|
|
CYREG_B1_P5_U0_PLD_ORT2 EQU 0x40011a34
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_ORT3
|
|
CYREG_B1_P5_U0_PLD_ORT3 EQU 0x40011a36
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_MC_CFG_CEN_CONST
|
|
CYREG_B1_P5_U0_MC_CFG_CEN_CONST EQU 0x40011a38
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_MC_CFG_XORFB
|
|
CYREG_B1_P5_U0_MC_CFG_XORFB EQU 0x40011a3a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_MC_CFG_SET_RESET
|
|
CYREG_B1_P5_U0_MC_CFG_SET_RESET EQU 0x40011a3c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_MC_CFG_BYPASS
|
|
CYREG_B1_P5_U0_MC_CFG_BYPASS EQU 0x40011a3e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG0
|
|
CYREG_B1_P5_U0_CFG0 EQU 0x40011a40
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG1
|
|
CYREG_B1_P5_U0_CFG1 EQU 0x40011a41
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG2
|
|
CYREG_B1_P5_U0_CFG2 EQU 0x40011a42
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG3
|
|
CYREG_B1_P5_U0_CFG3 EQU 0x40011a43
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG4
|
|
CYREG_B1_P5_U0_CFG4 EQU 0x40011a44
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG5
|
|
CYREG_B1_P5_U0_CFG5 EQU 0x40011a45
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG6
|
|
CYREG_B1_P5_U0_CFG6 EQU 0x40011a46
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG7
|
|
CYREG_B1_P5_U0_CFG7 EQU 0x40011a47
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG8
|
|
CYREG_B1_P5_U0_CFG8 EQU 0x40011a48
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG9
|
|
CYREG_B1_P5_U0_CFG9 EQU 0x40011a49
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG10
|
|
CYREG_B1_P5_U0_CFG10 EQU 0x40011a4a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG11
|
|
CYREG_B1_P5_U0_CFG11 EQU 0x40011a4b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG12
|
|
CYREG_B1_P5_U0_CFG12 EQU 0x40011a4c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG13
|
|
CYREG_B1_P5_U0_CFG13 EQU 0x40011a4d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG14
|
|
CYREG_B1_P5_U0_CFG14 EQU 0x40011a4e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG15
|
|
CYREG_B1_P5_U0_CFG15 EQU 0x40011a4f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG16
|
|
CYREG_B1_P5_U0_CFG16 EQU 0x40011a50
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG17
|
|
CYREG_B1_P5_U0_CFG17 EQU 0x40011a51
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG18
|
|
CYREG_B1_P5_U0_CFG18 EQU 0x40011a52
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG19
|
|
CYREG_B1_P5_U0_CFG19 EQU 0x40011a53
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG20
|
|
CYREG_B1_P5_U0_CFG20 EQU 0x40011a54
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG21
|
|
CYREG_B1_P5_U0_CFG21 EQU 0x40011a55
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG22
|
|
CYREG_B1_P5_U0_CFG22 EQU 0x40011a56
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG23
|
|
CYREG_B1_P5_U0_CFG23 EQU 0x40011a57
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG24
|
|
CYREG_B1_P5_U0_CFG24 EQU 0x40011a58
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG25
|
|
CYREG_B1_P5_U0_CFG25 EQU 0x40011a59
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG26
|
|
CYREG_B1_P5_U0_CFG26 EQU 0x40011a5a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG27
|
|
CYREG_B1_P5_U0_CFG27 EQU 0x40011a5b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG28
|
|
CYREG_B1_P5_U0_CFG28 EQU 0x40011a5c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG29
|
|
CYREG_B1_P5_U0_CFG29 EQU 0x40011a5d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG30
|
|
CYREG_B1_P5_U0_CFG30 EQU 0x40011a5e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_CFG31
|
|
CYREG_B1_P5_U0_CFG31 EQU 0x40011a5f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_DCFG0
|
|
CYREG_B1_P5_U0_DCFG0 EQU 0x40011a60
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_DCFG1
|
|
CYREG_B1_P5_U0_DCFG1 EQU 0x40011a62
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_DCFG2
|
|
CYREG_B1_P5_U0_DCFG2 EQU 0x40011a64
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_DCFG3
|
|
CYREG_B1_P5_U0_DCFG3 EQU 0x40011a66
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_DCFG4
|
|
CYREG_B1_P5_U0_DCFG4 EQU 0x40011a68
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_DCFG5
|
|
CYREG_B1_P5_U0_DCFG5 EQU 0x40011a6a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_DCFG6
|
|
CYREG_B1_P5_U0_DCFG6 EQU 0x40011a6c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U0_DCFG7
|
|
CYREG_B1_P5_U0_DCFG7 EQU 0x40011a6e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_BASE
|
|
CYDEV_UCFG_B1_P5_U1_BASE EQU 0x40011a80
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_SIZE
|
|
CYDEV_UCFG_B1_P5_U1_SIZE EQU 0x00000070
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_IT0
|
|
CYREG_B1_P5_U1_PLD_IT0 EQU 0x40011a80
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_IT1
|
|
CYREG_B1_P5_U1_PLD_IT1 EQU 0x40011a84
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_IT2
|
|
CYREG_B1_P5_U1_PLD_IT2 EQU 0x40011a88
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_IT3
|
|
CYREG_B1_P5_U1_PLD_IT3 EQU 0x40011a8c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_IT4
|
|
CYREG_B1_P5_U1_PLD_IT4 EQU 0x40011a90
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_IT5
|
|
CYREG_B1_P5_U1_PLD_IT5 EQU 0x40011a94
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_IT6
|
|
CYREG_B1_P5_U1_PLD_IT6 EQU 0x40011a98
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_IT7
|
|
CYREG_B1_P5_U1_PLD_IT7 EQU 0x40011a9c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_IT8
|
|
CYREG_B1_P5_U1_PLD_IT8 EQU 0x40011aa0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_IT9
|
|
CYREG_B1_P5_U1_PLD_IT9 EQU 0x40011aa4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_IT10
|
|
CYREG_B1_P5_U1_PLD_IT10 EQU 0x40011aa8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_IT11
|
|
CYREG_B1_P5_U1_PLD_IT11 EQU 0x40011aac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_ORT0
|
|
CYREG_B1_P5_U1_PLD_ORT0 EQU 0x40011ab0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_ORT1
|
|
CYREG_B1_P5_U1_PLD_ORT1 EQU 0x40011ab2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_ORT2
|
|
CYREG_B1_P5_U1_PLD_ORT2 EQU 0x40011ab4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_ORT3
|
|
CYREG_B1_P5_U1_PLD_ORT3 EQU 0x40011ab6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_MC_CFG_CEN_CONST
|
|
CYREG_B1_P5_U1_MC_CFG_CEN_CONST EQU 0x40011ab8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_MC_CFG_XORFB
|
|
CYREG_B1_P5_U1_MC_CFG_XORFB EQU 0x40011aba
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_MC_CFG_SET_RESET
|
|
CYREG_B1_P5_U1_MC_CFG_SET_RESET EQU 0x40011abc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_MC_CFG_BYPASS
|
|
CYREG_B1_P5_U1_MC_CFG_BYPASS EQU 0x40011abe
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG0
|
|
CYREG_B1_P5_U1_CFG0 EQU 0x40011ac0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG1
|
|
CYREG_B1_P5_U1_CFG1 EQU 0x40011ac1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG2
|
|
CYREG_B1_P5_U1_CFG2 EQU 0x40011ac2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG3
|
|
CYREG_B1_P5_U1_CFG3 EQU 0x40011ac3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG4
|
|
CYREG_B1_P5_U1_CFG4 EQU 0x40011ac4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG5
|
|
CYREG_B1_P5_U1_CFG5 EQU 0x40011ac5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG6
|
|
CYREG_B1_P5_U1_CFG6 EQU 0x40011ac6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG7
|
|
CYREG_B1_P5_U1_CFG7 EQU 0x40011ac7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG8
|
|
CYREG_B1_P5_U1_CFG8 EQU 0x40011ac8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG9
|
|
CYREG_B1_P5_U1_CFG9 EQU 0x40011ac9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG10
|
|
CYREG_B1_P5_U1_CFG10 EQU 0x40011aca
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG11
|
|
CYREG_B1_P5_U1_CFG11 EQU 0x40011acb
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG12
|
|
CYREG_B1_P5_U1_CFG12 EQU 0x40011acc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG13
|
|
CYREG_B1_P5_U1_CFG13 EQU 0x40011acd
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG14
|
|
CYREG_B1_P5_U1_CFG14 EQU 0x40011ace
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG15
|
|
CYREG_B1_P5_U1_CFG15 EQU 0x40011acf
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG16
|
|
CYREG_B1_P5_U1_CFG16 EQU 0x40011ad0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG17
|
|
CYREG_B1_P5_U1_CFG17 EQU 0x40011ad1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG18
|
|
CYREG_B1_P5_U1_CFG18 EQU 0x40011ad2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG19
|
|
CYREG_B1_P5_U1_CFG19 EQU 0x40011ad3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG20
|
|
CYREG_B1_P5_U1_CFG20 EQU 0x40011ad4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG21
|
|
CYREG_B1_P5_U1_CFG21 EQU 0x40011ad5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG22
|
|
CYREG_B1_P5_U1_CFG22 EQU 0x40011ad6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG23
|
|
CYREG_B1_P5_U1_CFG23 EQU 0x40011ad7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG24
|
|
CYREG_B1_P5_U1_CFG24 EQU 0x40011ad8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG25
|
|
CYREG_B1_P5_U1_CFG25 EQU 0x40011ad9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG26
|
|
CYREG_B1_P5_U1_CFG26 EQU 0x40011ada
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG27
|
|
CYREG_B1_P5_U1_CFG27 EQU 0x40011adb
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG28
|
|
CYREG_B1_P5_U1_CFG28 EQU 0x40011adc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG29
|
|
CYREG_B1_P5_U1_CFG29 EQU 0x40011add
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG30
|
|
CYREG_B1_P5_U1_CFG30 EQU 0x40011ade
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_CFG31
|
|
CYREG_B1_P5_U1_CFG31 EQU 0x40011adf
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_DCFG0
|
|
CYREG_B1_P5_U1_DCFG0 EQU 0x40011ae0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_DCFG1
|
|
CYREG_B1_P5_U1_DCFG1 EQU 0x40011ae2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_DCFG2
|
|
CYREG_B1_P5_U1_DCFG2 EQU 0x40011ae4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_DCFG3
|
|
CYREG_B1_P5_U1_DCFG3 EQU 0x40011ae6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_DCFG4
|
|
CYREG_B1_P5_U1_DCFG4 EQU 0x40011ae8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_DCFG5
|
|
CYREG_B1_P5_U1_DCFG5 EQU 0x40011aea
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_DCFG6
|
|
CYREG_B1_P5_U1_DCFG6 EQU 0x40011aec
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_B1_P5_U1_DCFG7
|
|
CYREG_B1_P5_U1_DCFG7 EQU 0x40011aee
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P5_ROUTE_BASE
|
|
CYDEV_UCFG_B1_P5_ROUTE_BASE EQU 0x40011b00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_B1_P5_ROUTE_SIZE
|
|
CYDEV_UCFG_B1_P5_ROUTE_SIZE EQU 0x000000ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_DSI0_BASE
|
|
CYDEV_UCFG_DSI0_BASE EQU 0x40014000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_DSI0_SIZE
|
|
CYDEV_UCFG_DSI0_SIZE EQU 0x000000ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_DSI1_BASE
|
|
CYDEV_UCFG_DSI1_BASE EQU 0x40014100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_DSI1_SIZE
|
|
CYDEV_UCFG_DSI1_SIZE EQU 0x000000ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_DSI2_BASE
|
|
CYDEV_UCFG_DSI2_BASE EQU 0x40014200
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_DSI2_SIZE
|
|
CYDEV_UCFG_DSI2_SIZE EQU 0x000000ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_DSI3_BASE
|
|
CYDEV_UCFG_DSI3_BASE EQU 0x40014300
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_DSI3_SIZE
|
|
CYDEV_UCFG_DSI3_SIZE EQU 0x000000ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_DSI4_BASE
|
|
CYDEV_UCFG_DSI4_BASE EQU 0x40014400
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_DSI4_SIZE
|
|
CYDEV_UCFG_DSI4_SIZE EQU 0x000000ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_DSI5_BASE
|
|
CYDEV_UCFG_DSI5_BASE EQU 0x40014500
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_DSI5_SIZE
|
|
CYDEV_UCFG_DSI5_SIZE EQU 0x000000ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_DSI6_BASE
|
|
CYDEV_UCFG_DSI6_BASE EQU 0x40014600
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_DSI6_SIZE
|
|
CYDEV_UCFG_DSI6_SIZE EQU 0x000000ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_DSI7_BASE
|
|
CYDEV_UCFG_DSI7_BASE EQU 0x40014700
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_DSI7_SIZE
|
|
CYDEV_UCFG_DSI7_SIZE EQU 0x000000ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_DSI8_BASE
|
|
CYDEV_UCFG_DSI8_BASE EQU 0x40014800
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_DSI8_SIZE
|
|
CYDEV_UCFG_DSI8_SIZE EQU 0x000000ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_DSI9_BASE
|
|
CYDEV_UCFG_DSI9_BASE EQU 0x40014900
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_DSI9_SIZE
|
|
CYDEV_UCFG_DSI9_SIZE EQU 0x000000ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_DSI12_BASE
|
|
CYDEV_UCFG_DSI12_BASE EQU 0x40014c00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_DSI12_SIZE
|
|
CYDEV_UCFG_DSI12_SIZE EQU 0x000000ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_DSI13_BASE
|
|
CYDEV_UCFG_DSI13_BASE EQU 0x40014d00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_DSI13_SIZE
|
|
CYDEV_UCFG_DSI13_SIZE EQU 0x000000ef
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_BCTL0_BASE
|
|
CYDEV_UCFG_BCTL0_BASE EQU 0x40015000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_BCTL0_SIZE
|
|
CYDEV_UCFG_BCTL0_SIZE EQU 0x00000010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BCTL0_MDCLK_EN
|
|
CYREG_BCTL0_MDCLK_EN EQU 0x40015000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BCTL0_MBCLK_EN
|
|
CYREG_BCTL0_MBCLK_EN EQU 0x40015001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BCTL0_WAIT_CFG
|
|
CYREG_BCTL0_WAIT_CFG EQU 0x40015002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BCTL0_BANK_CTL
|
|
CYREG_BCTL0_BANK_CTL EQU 0x40015003
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BCTL0_UDB_TEST_3
|
|
CYREG_BCTL0_UDB_TEST_3 EQU 0x40015007
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BCTL0_DCLK_EN0
|
|
CYREG_BCTL0_DCLK_EN0 EQU 0x40015008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BCTL0_BCLK_EN0
|
|
CYREG_BCTL0_BCLK_EN0 EQU 0x40015009
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BCTL0_DCLK_EN1
|
|
CYREG_BCTL0_DCLK_EN1 EQU 0x4001500a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BCTL0_BCLK_EN1
|
|
CYREG_BCTL0_BCLK_EN1 EQU 0x4001500b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BCTL0_DCLK_EN2
|
|
CYREG_BCTL0_DCLK_EN2 EQU 0x4001500c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BCTL0_BCLK_EN2
|
|
CYREG_BCTL0_BCLK_EN2 EQU 0x4001500d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BCTL0_DCLK_EN3
|
|
CYREG_BCTL0_DCLK_EN3 EQU 0x4001500e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BCTL0_BCLK_EN3
|
|
CYREG_BCTL0_BCLK_EN3 EQU 0x4001500f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_BCTL1_BASE
|
|
CYDEV_UCFG_BCTL1_BASE EQU 0x40015010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_UCFG_BCTL1_SIZE
|
|
CYDEV_UCFG_BCTL1_SIZE EQU 0x00000010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BCTL1_MDCLK_EN
|
|
CYREG_BCTL1_MDCLK_EN EQU 0x40015010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BCTL1_MBCLK_EN
|
|
CYREG_BCTL1_MBCLK_EN EQU 0x40015011
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BCTL1_WAIT_CFG
|
|
CYREG_BCTL1_WAIT_CFG EQU 0x40015012
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BCTL1_BANK_CTL
|
|
CYREG_BCTL1_BANK_CTL EQU 0x40015013
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BCTL1_UDB_TEST_3
|
|
CYREG_BCTL1_UDB_TEST_3 EQU 0x40015017
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BCTL1_DCLK_EN0
|
|
CYREG_BCTL1_DCLK_EN0 EQU 0x40015018
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BCTL1_BCLK_EN0
|
|
CYREG_BCTL1_BCLK_EN0 EQU 0x40015019
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BCTL1_DCLK_EN1
|
|
CYREG_BCTL1_DCLK_EN1 EQU 0x4001501a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BCTL1_BCLK_EN1
|
|
CYREG_BCTL1_BCLK_EN1 EQU 0x4001501b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BCTL1_DCLK_EN2
|
|
CYREG_BCTL1_DCLK_EN2 EQU 0x4001501c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BCTL1_BCLK_EN2
|
|
CYREG_BCTL1_BCLK_EN2 EQU 0x4001501d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BCTL1_DCLK_EN3
|
|
CYREG_BCTL1_DCLK_EN3 EQU 0x4001501e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_BCTL1_BCLK_EN3
|
|
CYREG_BCTL1_BCLK_EN3 EQU 0x4001501f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IDMUX_BASE
|
|
CYDEV_IDMUX_BASE EQU 0x40015100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_IDMUX_SIZE
|
|
CYDEV_IDMUX_SIZE EQU 0x00000016
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_IDMUX_IRQ_CTL0
|
|
CYREG_IDMUX_IRQ_CTL0 EQU 0x40015100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_IDMUX_IRQ_CTL1
|
|
CYREG_IDMUX_IRQ_CTL1 EQU 0x40015101
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_IDMUX_IRQ_CTL2
|
|
CYREG_IDMUX_IRQ_CTL2 EQU 0x40015102
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_IDMUX_IRQ_CTL3
|
|
CYREG_IDMUX_IRQ_CTL3 EQU 0x40015103
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_IDMUX_IRQ_CTL4
|
|
CYREG_IDMUX_IRQ_CTL4 EQU 0x40015104
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_IDMUX_IRQ_CTL5
|
|
CYREG_IDMUX_IRQ_CTL5 EQU 0x40015105
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_IDMUX_IRQ_CTL6
|
|
CYREG_IDMUX_IRQ_CTL6 EQU 0x40015106
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_IDMUX_IRQ_CTL7
|
|
CYREG_IDMUX_IRQ_CTL7 EQU 0x40015107
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_IDMUX_DRQ_CTL0
|
|
CYREG_IDMUX_DRQ_CTL0 EQU 0x40015110
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_IDMUX_DRQ_CTL1
|
|
CYREG_IDMUX_DRQ_CTL1 EQU 0x40015111
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_IDMUX_DRQ_CTL2
|
|
CYREG_IDMUX_DRQ_CTL2 EQU 0x40015112
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_IDMUX_DRQ_CTL3
|
|
CYREG_IDMUX_DRQ_CTL3 EQU 0x40015113
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_IDMUX_DRQ_CTL4
|
|
CYREG_IDMUX_DRQ_CTL4 EQU 0x40015114
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_IDMUX_DRQ_CTL5
|
|
CYREG_IDMUX_DRQ_CTL5 EQU 0x40015115
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CACHERAM_BASE
|
|
CYDEV_CACHERAM_BASE EQU 0x40030000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CACHERAM_SIZE
|
|
CYDEV_CACHERAM_SIZE EQU 0x00000400
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CACHERAM_DATA_MBASE
|
|
CYREG_CACHERAM_DATA_MBASE EQU 0x40030000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CACHERAM_DATA_MSIZE
|
|
CYREG_CACHERAM_DATA_MSIZE EQU 0x00000400
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_SFR_BASE
|
|
CYDEV_SFR_BASE EQU 0x40050100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_SFR_SIZE
|
|
CYDEV_SFR_SIZE EQU 0x000000fb
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SFR_GPIO0
|
|
CYREG_SFR_GPIO0 EQU 0x40050180
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SFR_GPIRD0
|
|
CYREG_SFR_GPIRD0 EQU 0x40050189
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SFR_GPIO0_SEL
|
|
CYREG_SFR_GPIO0_SEL EQU 0x4005018a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SFR_GPIO1
|
|
CYREG_SFR_GPIO1 EQU 0x40050190
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SFR_GPIRD1
|
|
CYREG_SFR_GPIRD1 EQU 0x40050191
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SFR_GPIO2
|
|
CYREG_SFR_GPIO2 EQU 0x40050198
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SFR_GPIRD2
|
|
CYREG_SFR_GPIRD2 EQU 0x40050199
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SFR_GPIO2_SEL
|
|
CYREG_SFR_GPIO2_SEL EQU 0x4005019a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SFR_GPIO1_SEL
|
|
CYREG_SFR_GPIO1_SEL EQU 0x400501a2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SFR_GPIO3
|
|
CYREG_SFR_GPIO3 EQU 0x400501b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SFR_GPIRD3
|
|
CYREG_SFR_GPIRD3 EQU 0x400501b1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SFR_GPIO3_SEL
|
|
CYREG_SFR_GPIO3_SEL EQU 0x400501b2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SFR_GPIO4
|
|
CYREG_SFR_GPIO4 EQU 0x400501c0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SFR_GPIRD4
|
|
CYREG_SFR_GPIRD4 EQU 0x400501c1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SFR_GPIO4_SEL
|
|
CYREG_SFR_GPIO4_SEL EQU 0x400501c2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SFR_GPIO5
|
|
CYREG_SFR_GPIO5 EQU 0x400501c8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SFR_GPIRD5
|
|
CYREG_SFR_GPIRD5 EQU 0x400501c9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SFR_GPIO5_SEL
|
|
CYREG_SFR_GPIO5_SEL EQU 0x400501ca
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SFR_GPIO6
|
|
CYREG_SFR_GPIO6 EQU 0x400501d8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SFR_GPIRD6
|
|
CYREG_SFR_GPIRD6 EQU 0x400501d9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SFR_GPIO6_SEL
|
|
CYREG_SFR_GPIO6_SEL EQU 0x400501da
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SFR_GPIO12
|
|
CYREG_SFR_GPIO12 EQU 0x400501e8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SFR_GPIRD12
|
|
CYREG_SFR_GPIRD12 EQU 0x400501e9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SFR_GPIO12_SEL
|
|
CYREG_SFR_GPIO12_SEL EQU 0x400501f2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SFR_GPIO15
|
|
CYREG_SFR_GPIO15 EQU 0x400501f8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SFR_GPIRD15
|
|
CYREG_SFR_GPIRD15 EQU 0x400501f9
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_SFR_GPIO15_SEL
|
|
CYREG_SFR_GPIO15_SEL EQU 0x400501fa
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_P3BA_BASE
|
|
CYDEV_P3BA_BASE EQU 0x40050300
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_P3BA_SIZE
|
|
CYDEV_P3BA_SIZE EQU 0x0000002b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_Y_START
|
|
CYREG_P3BA_Y_START EQU 0x40050300
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_YROLL
|
|
CYREG_P3BA_YROLL EQU 0x40050301
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_YCFG
|
|
CYREG_P3BA_YCFG EQU 0x40050302
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_X_START1
|
|
CYREG_P3BA_X_START1 EQU 0x40050303
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_X_START2
|
|
CYREG_P3BA_X_START2 EQU 0x40050304
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_XROLL1
|
|
CYREG_P3BA_XROLL1 EQU 0x40050305
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_XROLL2
|
|
CYREG_P3BA_XROLL2 EQU 0x40050306
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_XINC
|
|
CYREG_P3BA_XINC EQU 0x40050307
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_XCFG
|
|
CYREG_P3BA_XCFG EQU 0x40050308
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_OFFSETADDR1
|
|
CYREG_P3BA_OFFSETADDR1 EQU 0x40050309
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_OFFSETADDR2
|
|
CYREG_P3BA_OFFSETADDR2 EQU 0x4005030a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_OFFSETADDR3
|
|
CYREG_P3BA_OFFSETADDR3 EQU 0x4005030b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_ABSADDR1
|
|
CYREG_P3BA_ABSADDR1 EQU 0x4005030c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_ABSADDR2
|
|
CYREG_P3BA_ABSADDR2 EQU 0x4005030d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_ABSADDR3
|
|
CYREG_P3BA_ABSADDR3 EQU 0x4005030e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_ABSADDR4
|
|
CYREG_P3BA_ABSADDR4 EQU 0x4005030f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_DATCFG1
|
|
CYREG_P3BA_DATCFG1 EQU 0x40050310
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_DATCFG2
|
|
CYREG_P3BA_DATCFG2 EQU 0x40050311
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_CMP_RSLT1
|
|
CYREG_P3BA_CMP_RSLT1 EQU 0x40050314
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_CMP_RSLT2
|
|
CYREG_P3BA_CMP_RSLT2 EQU 0x40050315
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_CMP_RSLT3
|
|
CYREG_P3BA_CMP_RSLT3 EQU 0x40050316
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_CMP_RSLT4
|
|
CYREG_P3BA_CMP_RSLT4 EQU 0x40050317
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_DATA_REG1
|
|
CYREG_P3BA_DATA_REG1 EQU 0x40050318
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_DATA_REG2
|
|
CYREG_P3BA_DATA_REG2 EQU 0x40050319
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_DATA_REG3
|
|
CYREG_P3BA_DATA_REG3 EQU 0x4005031a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_DATA_REG4
|
|
CYREG_P3BA_DATA_REG4 EQU 0x4005031b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_EXP_DATA1
|
|
CYREG_P3BA_EXP_DATA1 EQU 0x4005031c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_EXP_DATA2
|
|
CYREG_P3BA_EXP_DATA2 EQU 0x4005031d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_EXP_DATA3
|
|
CYREG_P3BA_EXP_DATA3 EQU 0x4005031e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_EXP_DATA4
|
|
CYREG_P3BA_EXP_DATA4 EQU 0x4005031f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_MSTR_HRDATA1
|
|
CYREG_P3BA_MSTR_HRDATA1 EQU 0x40050320
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_MSTR_HRDATA2
|
|
CYREG_P3BA_MSTR_HRDATA2 EQU 0x40050321
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_MSTR_HRDATA3
|
|
CYREG_P3BA_MSTR_HRDATA3 EQU 0x40050322
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_MSTR_HRDATA4
|
|
CYREG_P3BA_MSTR_HRDATA4 EQU 0x40050323
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_BIST_EN
|
|
CYREG_P3BA_BIST_EN EQU 0x40050324
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_PHUB_MASTER_SSR
|
|
CYREG_P3BA_PHUB_MASTER_SSR EQU 0x40050325
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_SEQCFG1
|
|
CYREG_P3BA_SEQCFG1 EQU 0x40050326
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_SEQCFG2
|
|
CYREG_P3BA_SEQCFG2 EQU 0x40050327
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_Y_CURR
|
|
CYREG_P3BA_Y_CURR EQU 0x40050328
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_X_CURR1
|
|
CYREG_P3BA_X_CURR1 EQU 0x40050329
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_P3BA_X_CURR2
|
|
CYREG_P3BA_X_CURR2 EQU 0x4005032a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PANTHER_BASE
|
|
CYDEV_PANTHER_BASE EQU 0x40080000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PANTHER_SIZE
|
|
CYDEV_PANTHER_SIZE EQU 0x00000020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PANTHER_STCALIB_CFG
|
|
CYREG_PANTHER_STCALIB_CFG EQU 0x40080000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PANTHER_WAITPIPE
|
|
CYREG_PANTHER_WAITPIPE EQU 0x40080004
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PANTHER_TRACE_CFG
|
|
CYREG_PANTHER_TRACE_CFG EQU 0x40080008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PANTHER_DBG_CFG
|
|
CYREG_PANTHER_DBG_CFG EQU 0x4008000c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PANTHER_CM3_LCKRST_STAT
|
|
CYREG_PANTHER_CM3_LCKRST_STAT EQU 0x40080018
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_PANTHER_DEVICE_ID
|
|
CYREG_PANTHER_DEVICE_ID EQU 0x4008001c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_FLSECC_BASE
|
|
CYDEV_FLSECC_BASE EQU 0x48000000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_FLSECC_SIZE
|
|
CYDEV_FLSECC_SIZE EQU 0x00008000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSECC_DATA_MBASE
|
|
CYREG_FLSECC_DATA_MBASE EQU 0x48000000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSECC_DATA_MSIZE
|
|
CYREG_FLSECC_DATA_MSIZE EQU 0x00008000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_FLSHID_BASE
|
|
CYDEV_FLSHID_BASE EQU 0x49000000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_FLSHID_SIZE
|
|
CYDEV_FLSHID_SIZE EQU 0x00000200
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_RSVD_MBASE
|
|
CYREG_FLSHID_RSVD_MBASE EQU 0x49000000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_RSVD_MSIZE
|
|
CYREG_FLSHID_RSVD_MSIZE EQU 0x00000080
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_MDATA_MBASE
|
|
CYREG_FLSHID_CUST_MDATA_MBASE EQU 0x49000080
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_MDATA_MSIZE
|
|
CYREG_FLSHID_CUST_MDATA_MSIZE EQU 0x00000080
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_BASE
|
|
CYDEV_FLSHID_CUST_TABLES_BASE EQU 0x49000100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_SIZE
|
|
CYDEV_FLSHID_CUST_TABLES_SIZE EQU 0x00000040
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_Y_LOC
|
|
CYREG_FLSHID_CUST_TABLES_Y_LOC EQU 0x49000100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_X_LOC
|
|
CYREG_FLSHID_CUST_TABLES_X_LOC EQU 0x49000101
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_WAFER_NUM
|
|
CYREG_FLSHID_CUST_TABLES_WAFER_NUM EQU 0x49000102
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_LOT_LSB
|
|
CYREG_FLSHID_CUST_TABLES_LOT_LSB EQU 0x49000103
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_LOT_MSB
|
|
CYREG_FLSHID_CUST_TABLES_LOT_MSB EQU 0x49000104
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_WRK_WK
|
|
CYREG_FLSHID_CUST_TABLES_WRK_WK EQU 0x49000105
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_FAB_YR
|
|
CYREG_FLSHID_CUST_TABLES_FAB_YR EQU 0x49000106
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_MINOR
|
|
CYREG_FLSHID_CUST_TABLES_MINOR EQU 0x49000107
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_IMO_3MHZ
|
|
CYREG_FLSHID_CUST_TABLES_IMO_3MHZ EQU 0x49000108
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_IMO_6MHZ
|
|
CYREG_FLSHID_CUST_TABLES_IMO_6MHZ EQU 0x49000109
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_IMO_12MHZ
|
|
CYREG_FLSHID_CUST_TABLES_IMO_12MHZ EQU 0x4900010a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_IMO_24MHZ
|
|
CYREG_FLSHID_CUST_TABLES_IMO_24MHZ EQU 0x4900010b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_IMO_67MHZ
|
|
CYREG_FLSHID_CUST_TABLES_IMO_67MHZ EQU 0x4900010c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_IMO_80MHZ
|
|
CYREG_FLSHID_CUST_TABLES_IMO_80MHZ EQU 0x4900010d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_IMO_92MHZ
|
|
CYREG_FLSHID_CUST_TABLES_IMO_92MHZ EQU 0x4900010e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_IMO_USB
|
|
CYREG_FLSHID_CUST_TABLES_IMO_USB EQU 0x4900010f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_CMP0_TR0_HS
|
|
CYREG_FLSHID_CUST_TABLES_CMP0_TR0_HS EQU 0x49000110
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_CMP1_TR0_HS
|
|
CYREG_FLSHID_CUST_TABLES_CMP1_TR0_HS EQU 0x49000111
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_CMP2_TR0_HS
|
|
CYREG_FLSHID_CUST_TABLES_CMP2_TR0_HS EQU 0x49000112
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_CMP3_TR0_HS
|
|
CYREG_FLSHID_CUST_TABLES_CMP3_TR0_HS EQU 0x49000113
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_CMP0_TR1_HS
|
|
CYREG_FLSHID_CUST_TABLES_CMP0_TR1_HS EQU 0x49000114
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_CMP1_TR1_HS
|
|
CYREG_FLSHID_CUST_TABLES_CMP1_TR1_HS EQU 0x49000115
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_CMP2_TR1_HS
|
|
CYREG_FLSHID_CUST_TABLES_CMP2_TR1_HS EQU 0x49000116
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_CMP3_TR1_HS
|
|
CYREG_FLSHID_CUST_TABLES_CMP3_TR1_HS EQU 0x49000117
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DEC_M1
|
|
CYREG_FLSHID_CUST_TABLES_DEC_M1 EQU 0x49000118
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DEC_M2
|
|
CYREG_FLSHID_CUST_TABLES_DEC_M2 EQU 0x49000119
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DEC_M3
|
|
CYREG_FLSHID_CUST_TABLES_DEC_M3 EQU 0x4900011a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DEC_M4
|
|
CYREG_FLSHID_CUST_TABLES_DEC_M4 EQU 0x4900011b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DEC_M5
|
|
CYREG_FLSHID_CUST_TABLES_DEC_M5 EQU 0x4900011c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DEC_M6
|
|
CYREG_FLSHID_CUST_TABLES_DEC_M6 EQU 0x4900011d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DEC_M7
|
|
CYREG_FLSHID_CUST_TABLES_DEC_M7 EQU 0x4900011e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DEC_M8
|
|
CYREG_FLSHID_CUST_TABLES_DEC_M8 EQU 0x4900011f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC0_M1
|
|
CYREG_FLSHID_CUST_TABLES_DAC0_M1 EQU 0x49000120
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC0_M2
|
|
CYREG_FLSHID_CUST_TABLES_DAC0_M2 EQU 0x49000121
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC0_M3
|
|
CYREG_FLSHID_CUST_TABLES_DAC0_M3 EQU 0x49000122
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC0_M4
|
|
CYREG_FLSHID_CUST_TABLES_DAC0_M4 EQU 0x49000123
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC0_M5
|
|
CYREG_FLSHID_CUST_TABLES_DAC0_M5 EQU 0x49000124
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC0_M6
|
|
CYREG_FLSHID_CUST_TABLES_DAC0_M6 EQU 0x49000125
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC0_M7
|
|
CYREG_FLSHID_CUST_TABLES_DAC0_M7 EQU 0x49000126
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC0_M8
|
|
CYREG_FLSHID_CUST_TABLES_DAC0_M8 EQU 0x49000127
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC2_M1
|
|
CYREG_FLSHID_CUST_TABLES_DAC2_M1 EQU 0x49000128
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC2_M2
|
|
CYREG_FLSHID_CUST_TABLES_DAC2_M2 EQU 0x49000129
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC2_M3
|
|
CYREG_FLSHID_CUST_TABLES_DAC2_M3 EQU 0x4900012a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC2_M4
|
|
CYREG_FLSHID_CUST_TABLES_DAC2_M4 EQU 0x4900012b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC2_M5
|
|
CYREG_FLSHID_CUST_TABLES_DAC2_M5 EQU 0x4900012c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC2_M6
|
|
CYREG_FLSHID_CUST_TABLES_DAC2_M6 EQU 0x4900012d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC2_M7
|
|
CYREG_FLSHID_CUST_TABLES_DAC2_M7 EQU 0x4900012e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC2_M8
|
|
CYREG_FLSHID_CUST_TABLES_DAC2_M8 EQU 0x4900012f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC1_M1
|
|
CYREG_FLSHID_CUST_TABLES_DAC1_M1 EQU 0x49000130
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC1_M2
|
|
CYREG_FLSHID_CUST_TABLES_DAC1_M2 EQU 0x49000131
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC1_M3
|
|
CYREG_FLSHID_CUST_TABLES_DAC1_M3 EQU 0x49000132
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC1_M4
|
|
CYREG_FLSHID_CUST_TABLES_DAC1_M4 EQU 0x49000133
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC1_M5
|
|
CYREG_FLSHID_CUST_TABLES_DAC1_M5 EQU 0x49000134
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC1_M6
|
|
CYREG_FLSHID_CUST_TABLES_DAC1_M6 EQU 0x49000135
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC1_M7
|
|
CYREG_FLSHID_CUST_TABLES_DAC1_M7 EQU 0x49000136
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC1_M8
|
|
CYREG_FLSHID_CUST_TABLES_DAC1_M8 EQU 0x49000137
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC3_M1
|
|
CYREG_FLSHID_CUST_TABLES_DAC3_M1 EQU 0x49000138
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC3_M2
|
|
CYREG_FLSHID_CUST_TABLES_DAC3_M2 EQU 0x49000139
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC3_M3
|
|
CYREG_FLSHID_CUST_TABLES_DAC3_M3 EQU 0x4900013a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC3_M4
|
|
CYREG_FLSHID_CUST_TABLES_DAC3_M4 EQU 0x4900013b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC3_M5
|
|
CYREG_FLSHID_CUST_TABLES_DAC3_M5 EQU 0x4900013c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC3_M6
|
|
CYREG_FLSHID_CUST_TABLES_DAC3_M6 EQU 0x4900013d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC3_M7
|
|
CYREG_FLSHID_CUST_TABLES_DAC3_M7 EQU 0x4900013e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC3_M8
|
|
CYREG_FLSHID_CUST_TABLES_DAC3_M8 EQU 0x4900013f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_FLSHID_MFG_CFG_BASE
|
|
CYDEV_FLSHID_MFG_CFG_BASE EQU 0x49000180
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_FLSHID_MFG_CFG_SIZE
|
|
CYDEV_FLSHID_MFG_CFG_SIZE EQU 0x00000080
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_MFG_CFG_IMO_TR1
|
|
CYREG_FLSHID_MFG_CFG_IMO_TR1 EQU 0x49000188
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_MFG_CFG_CMP0_TR0
|
|
CYREG_FLSHID_MFG_CFG_CMP0_TR0 EQU 0x490001ac
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_MFG_CFG_CMP1_TR0
|
|
CYREG_FLSHID_MFG_CFG_CMP1_TR0 EQU 0x490001ae
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_MFG_CFG_CMP2_TR0
|
|
CYREG_FLSHID_MFG_CFG_CMP2_TR0 EQU 0x490001b0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_MFG_CFG_CMP3_TR0
|
|
CYREG_FLSHID_MFG_CFG_CMP3_TR0 EQU 0x490001b2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_MFG_CFG_CMP0_TR1
|
|
CYREG_FLSHID_MFG_CFG_CMP0_TR1 EQU 0x490001b4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_MFG_CFG_CMP1_TR1
|
|
CYREG_FLSHID_MFG_CFG_CMP1_TR1 EQU 0x490001b6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_MFG_CFG_CMP2_TR1
|
|
CYREG_FLSHID_MFG_CFG_CMP2_TR1 EQU 0x490001b8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_MFG_CFG_CMP3_TR1
|
|
CYREG_FLSHID_MFG_CFG_CMP3_TR1 EQU 0x490001ba
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FLSHID_MFG_CFG_BG_XOVER_INL_TRIM
|
|
CYREG_FLSHID_MFG_CFG_BG_XOVER_INL_TRIM EQU 0x490001ce
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_EXTMEM_BASE
|
|
CYDEV_EXTMEM_BASE EQU 0x60000000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_EXTMEM_SIZE
|
|
CYDEV_EXTMEM_SIZE EQU 0x00800000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_EXTMEM_DATA_MBASE
|
|
CYREG_EXTMEM_DATA_MBASE EQU 0x60000000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_EXTMEM_DATA_MSIZE
|
|
CYREG_EXTMEM_DATA_MSIZE EQU 0x00800000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ITM_BASE
|
|
CYDEV_ITM_BASE EQU 0xe0000000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ITM_SIZE
|
|
CYDEV_ITM_SIZE EQU 0x00001000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ITM_TRACE_EN
|
|
CYREG_ITM_TRACE_EN EQU 0xe0000e00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ITM_TRACE_PRIVILEGE
|
|
CYREG_ITM_TRACE_PRIVILEGE EQU 0xe0000e40
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ITM_TRACE_CTRL
|
|
CYREG_ITM_TRACE_CTRL EQU 0xe0000e80
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ITM_LOCK_ACCESS
|
|
CYREG_ITM_LOCK_ACCESS EQU 0xe0000fb0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ITM_LOCK_STATUS
|
|
CYREG_ITM_LOCK_STATUS EQU 0xe0000fb4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ITM_PID4
|
|
CYREG_ITM_PID4 EQU 0xe0000fd0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ITM_PID5
|
|
CYREG_ITM_PID5 EQU 0xe0000fd4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ITM_PID6
|
|
CYREG_ITM_PID6 EQU 0xe0000fd8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ITM_PID7
|
|
CYREG_ITM_PID7 EQU 0xe0000fdc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ITM_PID0
|
|
CYREG_ITM_PID0 EQU 0xe0000fe0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ITM_PID1
|
|
CYREG_ITM_PID1 EQU 0xe0000fe4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ITM_PID2
|
|
CYREG_ITM_PID2 EQU 0xe0000fe8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ITM_PID3
|
|
CYREG_ITM_PID3 EQU 0xe0000fec
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ITM_CID0
|
|
CYREG_ITM_CID0 EQU 0xe0000ff0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ITM_CID1
|
|
CYREG_ITM_CID1 EQU 0xe0000ff4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ITM_CID2
|
|
CYREG_ITM_CID2 EQU 0xe0000ff8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ITM_CID3
|
|
CYREG_ITM_CID3 EQU 0xe0000ffc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_DWT_BASE
|
|
CYDEV_DWT_BASE EQU 0xe0001000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_DWT_SIZE
|
|
CYDEV_DWT_SIZE EQU 0x0000005c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DWT_CTRL
|
|
CYREG_DWT_CTRL EQU 0xe0001000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DWT_CYCLE_COUNT
|
|
CYREG_DWT_CYCLE_COUNT EQU 0xe0001004
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DWT_CPI_COUNT
|
|
CYREG_DWT_CPI_COUNT EQU 0xe0001008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DWT_EXC_OVHD_COUNT
|
|
CYREG_DWT_EXC_OVHD_COUNT EQU 0xe000100c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DWT_SLEEP_COUNT
|
|
CYREG_DWT_SLEEP_COUNT EQU 0xe0001010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DWT_LSU_COUNT
|
|
CYREG_DWT_LSU_COUNT EQU 0xe0001014
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DWT_FOLD_COUNT
|
|
CYREG_DWT_FOLD_COUNT EQU 0xe0001018
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DWT_PC_SAMPLE
|
|
CYREG_DWT_PC_SAMPLE EQU 0xe000101c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DWT_COMP_0
|
|
CYREG_DWT_COMP_0 EQU 0xe0001020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DWT_MASK_0
|
|
CYREG_DWT_MASK_0 EQU 0xe0001024
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DWT_FUNCTION_0
|
|
CYREG_DWT_FUNCTION_0 EQU 0xe0001028
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DWT_COMP_1
|
|
CYREG_DWT_COMP_1 EQU 0xe0001030
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DWT_MASK_1
|
|
CYREG_DWT_MASK_1 EQU 0xe0001034
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DWT_FUNCTION_1
|
|
CYREG_DWT_FUNCTION_1 EQU 0xe0001038
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DWT_COMP_2
|
|
CYREG_DWT_COMP_2 EQU 0xe0001040
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DWT_MASK_2
|
|
CYREG_DWT_MASK_2 EQU 0xe0001044
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DWT_FUNCTION_2
|
|
CYREG_DWT_FUNCTION_2 EQU 0xe0001048
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DWT_COMP_3
|
|
CYREG_DWT_COMP_3 EQU 0xe0001050
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DWT_MASK_3
|
|
CYREG_DWT_MASK_3 EQU 0xe0001054
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_DWT_FUNCTION_3
|
|
CYREG_DWT_FUNCTION_3 EQU 0xe0001058
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_FPB_BASE
|
|
CYDEV_FPB_BASE EQU 0xe0002000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_FPB_SIZE
|
|
CYDEV_FPB_SIZE EQU 0x00001000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FPB_CTRL
|
|
CYREG_FPB_CTRL EQU 0xe0002000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FPB_REMAP
|
|
CYREG_FPB_REMAP EQU 0xe0002004
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FPB_FP_COMP_0
|
|
CYREG_FPB_FP_COMP_0 EQU 0xe0002008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FPB_FP_COMP_1
|
|
CYREG_FPB_FP_COMP_1 EQU 0xe000200c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FPB_FP_COMP_2
|
|
CYREG_FPB_FP_COMP_2 EQU 0xe0002010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FPB_FP_COMP_3
|
|
CYREG_FPB_FP_COMP_3 EQU 0xe0002014
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FPB_FP_COMP_4
|
|
CYREG_FPB_FP_COMP_4 EQU 0xe0002018
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FPB_FP_COMP_5
|
|
CYREG_FPB_FP_COMP_5 EQU 0xe000201c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FPB_FP_COMP_6
|
|
CYREG_FPB_FP_COMP_6 EQU 0xe0002020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FPB_FP_COMP_7
|
|
CYREG_FPB_FP_COMP_7 EQU 0xe0002024
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FPB_PID4
|
|
CYREG_FPB_PID4 EQU 0xe0002fd0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FPB_PID5
|
|
CYREG_FPB_PID5 EQU 0xe0002fd4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FPB_PID6
|
|
CYREG_FPB_PID6 EQU 0xe0002fd8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FPB_PID7
|
|
CYREG_FPB_PID7 EQU 0xe0002fdc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FPB_PID0
|
|
CYREG_FPB_PID0 EQU 0xe0002fe0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FPB_PID1
|
|
CYREG_FPB_PID1 EQU 0xe0002fe4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FPB_PID2
|
|
CYREG_FPB_PID2 EQU 0xe0002fe8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FPB_PID3
|
|
CYREG_FPB_PID3 EQU 0xe0002fec
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FPB_CID0
|
|
CYREG_FPB_CID0 EQU 0xe0002ff0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FPB_CID1
|
|
CYREG_FPB_CID1 EQU 0xe0002ff4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FPB_CID2
|
|
CYREG_FPB_CID2 EQU 0xe0002ff8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_FPB_CID3
|
|
CYREG_FPB_CID3 EQU 0xe0002ffc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_NVIC_BASE
|
|
CYDEV_NVIC_BASE EQU 0xe000e000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_NVIC_SIZE
|
|
CYDEV_NVIC_SIZE EQU 0x00000d3c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_INT_CTL_TYPE
|
|
CYREG_NVIC_INT_CTL_TYPE EQU 0xe000e004
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_SYSTICK_CTL
|
|
CYREG_NVIC_SYSTICK_CTL EQU 0xe000e010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_SYSTICK_RELOAD
|
|
CYREG_NVIC_SYSTICK_RELOAD EQU 0xe000e014
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_SYSTICK_CURRENT
|
|
CYREG_NVIC_SYSTICK_CURRENT EQU 0xe000e018
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_SYSTICK_CAL
|
|
CYREG_NVIC_SYSTICK_CAL EQU 0xe000e01c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_SETENA0
|
|
CYREG_NVIC_SETENA0 EQU 0xe000e100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_CLRENA0
|
|
CYREG_NVIC_CLRENA0 EQU 0xe000e180
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_SETPEND0
|
|
CYREG_NVIC_SETPEND0 EQU 0xe000e200
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_CLRPEND0
|
|
CYREG_NVIC_CLRPEND0 EQU 0xe000e280
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_ACTIVE0
|
|
CYREG_NVIC_ACTIVE0 EQU 0xe000e300
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_0
|
|
CYREG_NVIC_PRI_0 EQU 0xe000e400
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_1
|
|
CYREG_NVIC_PRI_1 EQU 0xe000e401
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_2
|
|
CYREG_NVIC_PRI_2 EQU 0xe000e402
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_3
|
|
CYREG_NVIC_PRI_3 EQU 0xe000e403
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_4
|
|
CYREG_NVIC_PRI_4 EQU 0xe000e404
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_5
|
|
CYREG_NVIC_PRI_5 EQU 0xe000e405
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_6
|
|
CYREG_NVIC_PRI_6 EQU 0xe000e406
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_7
|
|
CYREG_NVIC_PRI_7 EQU 0xe000e407
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_8
|
|
CYREG_NVIC_PRI_8 EQU 0xe000e408
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_9
|
|
CYREG_NVIC_PRI_9 EQU 0xe000e409
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_10
|
|
CYREG_NVIC_PRI_10 EQU 0xe000e40a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_11
|
|
CYREG_NVIC_PRI_11 EQU 0xe000e40b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_12
|
|
CYREG_NVIC_PRI_12 EQU 0xe000e40c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_13
|
|
CYREG_NVIC_PRI_13 EQU 0xe000e40d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_14
|
|
CYREG_NVIC_PRI_14 EQU 0xe000e40e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_15
|
|
CYREG_NVIC_PRI_15 EQU 0xe000e40f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_16
|
|
CYREG_NVIC_PRI_16 EQU 0xe000e410
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_17
|
|
CYREG_NVIC_PRI_17 EQU 0xe000e411
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_18
|
|
CYREG_NVIC_PRI_18 EQU 0xe000e412
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_19
|
|
CYREG_NVIC_PRI_19 EQU 0xe000e413
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_20
|
|
CYREG_NVIC_PRI_20 EQU 0xe000e414
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_21
|
|
CYREG_NVIC_PRI_21 EQU 0xe000e415
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_22
|
|
CYREG_NVIC_PRI_22 EQU 0xe000e416
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_23
|
|
CYREG_NVIC_PRI_23 EQU 0xe000e417
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_24
|
|
CYREG_NVIC_PRI_24 EQU 0xe000e418
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_25
|
|
CYREG_NVIC_PRI_25 EQU 0xe000e419
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_26
|
|
CYREG_NVIC_PRI_26 EQU 0xe000e41a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_27
|
|
CYREG_NVIC_PRI_27 EQU 0xe000e41b
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_28
|
|
CYREG_NVIC_PRI_28 EQU 0xe000e41c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_29
|
|
CYREG_NVIC_PRI_29 EQU 0xe000e41d
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_30
|
|
CYREG_NVIC_PRI_30 EQU 0xe000e41e
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_PRI_31
|
|
CYREG_NVIC_PRI_31 EQU 0xe000e41f
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_CPUID_BASE
|
|
CYREG_NVIC_CPUID_BASE EQU 0xe000ed00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_INTR_CTRL_STATE
|
|
CYREG_NVIC_INTR_CTRL_STATE EQU 0xe000ed04
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_VECT_OFFSET
|
|
CYREG_NVIC_VECT_OFFSET EQU 0xe000ed08
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_APPLN_INTR
|
|
CYREG_NVIC_APPLN_INTR EQU 0xe000ed0c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_SYSTEM_CONTROL
|
|
CYREG_NVIC_SYSTEM_CONTROL EQU 0xe000ed10
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_CFG_CONTROL
|
|
CYREG_NVIC_CFG_CONTROL EQU 0xe000ed14
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_SYS_PRIO_HANDLER_4_7
|
|
CYREG_NVIC_SYS_PRIO_HANDLER_4_7 EQU 0xe000ed18
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_SYS_PRIO_HANDLER_8_11
|
|
CYREG_NVIC_SYS_PRIO_HANDLER_8_11 EQU 0xe000ed1c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_SYS_PRIO_HANDLER_12_15
|
|
CYREG_NVIC_SYS_PRIO_HANDLER_12_15 EQU 0xe000ed20
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_SYS_HANDLER_CSR
|
|
CYREG_NVIC_SYS_HANDLER_CSR EQU 0xe000ed24
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_MEMMAN_FAULT_STATUS
|
|
CYREG_NVIC_MEMMAN_FAULT_STATUS EQU 0xe000ed28
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_BUS_FAULT_STATUS
|
|
CYREG_NVIC_BUS_FAULT_STATUS EQU 0xe000ed29
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_USAGE_FAULT_STATUS
|
|
CYREG_NVIC_USAGE_FAULT_STATUS EQU 0xe000ed2a
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_HARD_FAULT_STATUS
|
|
CYREG_NVIC_HARD_FAULT_STATUS EQU 0xe000ed2c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_DEBUG_FAULT_STATUS
|
|
CYREG_NVIC_DEBUG_FAULT_STATUS EQU 0xe000ed30
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_MEMMAN_FAULT_ADD
|
|
CYREG_NVIC_MEMMAN_FAULT_ADD EQU 0xe000ed34
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_NVIC_BUS_FAULT_ADD
|
|
CYREG_NVIC_BUS_FAULT_ADD EQU 0xe000ed38
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CORE_DBG_BASE
|
|
CYDEV_CORE_DBG_BASE EQU 0xe000edf0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_CORE_DBG_SIZE
|
|
CYDEV_CORE_DBG_SIZE EQU 0x00000010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CORE_DBG_DBG_HLT_CS
|
|
CYREG_CORE_DBG_DBG_HLT_CS EQU 0xe000edf0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CORE_DBG_DBG_REG_SEL
|
|
CYREG_CORE_DBG_DBG_REG_SEL EQU 0xe000edf4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CORE_DBG_DBG_REG_DATA
|
|
CYREG_CORE_DBG_DBG_REG_DATA EQU 0xe000edf8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_CORE_DBG_EXC_MON_CTL
|
|
CYREG_CORE_DBG_EXC_MON_CTL EQU 0xe000edfc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_TPIU_BASE
|
|
CYDEV_TPIU_BASE EQU 0xe0040000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_TPIU_SIZE
|
|
CYDEV_TPIU_SIZE EQU 0x00001000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TPIU_SUPPORTED_SYNC_PRT_SZ
|
|
CYREG_TPIU_SUPPORTED_SYNC_PRT_SZ EQU 0xe0040000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TPIU_CURRENT_SYNC_PRT_SZ
|
|
CYREG_TPIU_CURRENT_SYNC_PRT_SZ EQU 0xe0040004
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TPIU_ASYNC_CLK_PRESCALER
|
|
CYREG_TPIU_ASYNC_CLK_PRESCALER EQU 0xe0040010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TPIU_PROTOCOL
|
|
CYREG_TPIU_PROTOCOL EQU 0xe00400f0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TPIU_FORM_FLUSH_STAT
|
|
CYREG_TPIU_FORM_FLUSH_STAT EQU 0xe0040300
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TPIU_FORM_FLUSH_CTRL
|
|
CYREG_TPIU_FORM_FLUSH_CTRL EQU 0xe0040304
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TPIU_TRIGGER
|
|
CYREG_TPIU_TRIGGER EQU 0xe0040ee8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TPIU_ITETMDATA
|
|
CYREG_TPIU_ITETMDATA EQU 0xe0040eec
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TPIU_ITATBCTR2
|
|
CYREG_TPIU_ITATBCTR2 EQU 0xe0040ef0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TPIU_ITATBCTR0
|
|
CYREG_TPIU_ITATBCTR0 EQU 0xe0040ef8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TPIU_ITITMDATA
|
|
CYREG_TPIU_ITITMDATA EQU 0xe0040efc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TPIU_ITCTRL
|
|
CYREG_TPIU_ITCTRL EQU 0xe0040f00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TPIU_DEVID
|
|
CYREG_TPIU_DEVID EQU 0xe0040fc8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TPIU_DEVTYPE
|
|
CYREG_TPIU_DEVTYPE EQU 0xe0040fcc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TPIU_PID4
|
|
CYREG_TPIU_PID4 EQU 0xe0040fd0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TPIU_PID5
|
|
CYREG_TPIU_PID5 EQU 0xe0040fd4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TPIU_PID6
|
|
CYREG_TPIU_PID6 EQU 0xe0040fd8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TPIU_PID7
|
|
CYREG_TPIU_PID7 EQU 0xe0040fdc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TPIU_PID0
|
|
CYREG_TPIU_PID0 EQU 0xe0040fe0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TPIU_PID1
|
|
CYREG_TPIU_PID1 EQU 0xe0040fe4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TPIU_PID2
|
|
CYREG_TPIU_PID2 EQU 0xe0040fe8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TPIU_PID3
|
|
CYREG_TPIU_PID3 EQU 0xe0040fec
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TPIU_CID0
|
|
CYREG_TPIU_CID0 EQU 0xe0040ff0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TPIU_CID1
|
|
CYREG_TPIU_CID1 EQU 0xe0040ff4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TPIU_CID2
|
|
CYREG_TPIU_CID2 EQU 0xe0040ff8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_TPIU_CID3
|
|
CYREG_TPIU_CID3 EQU 0xe0040ffc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ETM_BASE
|
|
CYDEV_ETM_BASE EQU 0xe0041000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ETM_SIZE
|
|
CYDEV_ETM_SIZE EQU 0x00001000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_CTL
|
|
CYREG_ETM_CTL EQU 0xe0041000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_CFG_CODE
|
|
CYREG_ETM_CFG_CODE EQU 0xe0041004
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_TRIG_EVENT
|
|
CYREG_ETM_TRIG_EVENT EQU 0xe0041008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_STATUS
|
|
CYREG_ETM_STATUS EQU 0xe0041010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_SYS_CFG
|
|
CYREG_ETM_SYS_CFG EQU 0xe0041014
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_TRACE_ENB_EVENT
|
|
CYREG_ETM_TRACE_ENB_EVENT EQU 0xe0041020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_TRACE_EN_CTRL1
|
|
CYREG_ETM_TRACE_EN_CTRL1 EQU 0xe0041024
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_FIFOFULL_LEVEL
|
|
CYREG_ETM_FIFOFULL_LEVEL EQU 0xe004102c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_SYNC_FREQ
|
|
CYREG_ETM_SYNC_FREQ EQU 0xe00411e0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_ETM_ID
|
|
CYREG_ETM_ETM_ID EQU 0xe00411e4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_CFG_CODE_EXT
|
|
CYREG_ETM_CFG_CODE_EXT EQU 0xe00411e8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_TR_SS_EMBICE_CTRL
|
|
CYREG_ETM_TR_SS_EMBICE_CTRL EQU 0xe00411f0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_CS_TRACE_ID
|
|
CYREG_ETM_CS_TRACE_ID EQU 0xe0041200
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_OS_LOCK_ACCESS
|
|
CYREG_ETM_OS_LOCK_ACCESS EQU 0xe0041300
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_OS_LOCK_STATUS
|
|
CYREG_ETM_OS_LOCK_STATUS EQU 0xe0041304
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_PDSR
|
|
CYREG_ETM_PDSR EQU 0xe0041314
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_ITMISCIN
|
|
CYREG_ETM_ITMISCIN EQU 0xe0041ee0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_ITTRIGOUT
|
|
CYREG_ETM_ITTRIGOUT EQU 0xe0041ee8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_ITATBCTR2
|
|
CYREG_ETM_ITATBCTR2 EQU 0xe0041ef0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_ITATBCTR0
|
|
CYREG_ETM_ITATBCTR0 EQU 0xe0041ef8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_INT_MODE_CTRL
|
|
CYREG_ETM_INT_MODE_CTRL EQU 0xe0041f00
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_CLM_TAG_SET
|
|
CYREG_ETM_CLM_TAG_SET EQU 0xe0041fa0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_CLM_TAG_CLR
|
|
CYREG_ETM_CLM_TAG_CLR EQU 0xe0041fa4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_LOCK_ACCESS
|
|
CYREG_ETM_LOCK_ACCESS EQU 0xe0041fb0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_LOCK_STATUS
|
|
CYREG_ETM_LOCK_STATUS EQU 0xe0041fb4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_AUTH_STATUS
|
|
CYREG_ETM_AUTH_STATUS EQU 0xe0041fb8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_DEV_TYPE
|
|
CYREG_ETM_DEV_TYPE EQU 0xe0041fcc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_PID4
|
|
CYREG_ETM_PID4 EQU 0xe0041fd0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_PID5
|
|
CYREG_ETM_PID5 EQU 0xe0041fd4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_PID6
|
|
CYREG_ETM_PID6 EQU 0xe0041fd8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_PID7
|
|
CYREG_ETM_PID7 EQU 0xe0041fdc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_PID0
|
|
CYREG_ETM_PID0 EQU 0xe0041fe0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_PID1
|
|
CYREG_ETM_PID1 EQU 0xe0041fe4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_PID2
|
|
CYREG_ETM_PID2 EQU 0xe0041fe8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_PID3
|
|
CYREG_ETM_PID3 EQU 0xe0041fec
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_CID0
|
|
CYREG_ETM_CID0 EQU 0xe0041ff0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_CID1
|
|
CYREG_ETM_CID1 EQU 0xe0041ff4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_CID2
|
|
CYREG_ETM_CID2 EQU 0xe0041ff8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ETM_CID3
|
|
CYREG_ETM_CID3 EQU 0xe0041ffc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ROM_TABLE_BASE
|
|
CYDEV_ROM_TABLE_BASE EQU 0xe00ff000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ROM_TABLE_SIZE
|
|
CYDEV_ROM_TABLE_SIZE EQU 0x00001000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ROM_TABLE_NVIC
|
|
CYREG_ROM_TABLE_NVIC EQU 0xe00ff000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ROM_TABLE_DWT
|
|
CYREG_ROM_TABLE_DWT EQU 0xe00ff004
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ROM_TABLE_FPB
|
|
CYREG_ROM_TABLE_FPB EQU 0xe00ff008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ROM_TABLE_ITM
|
|
CYREG_ROM_TABLE_ITM EQU 0xe00ff00c
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ROM_TABLE_TPIU
|
|
CYREG_ROM_TABLE_TPIU EQU 0xe00ff010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ROM_TABLE_ETM
|
|
CYREG_ROM_TABLE_ETM EQU 0xe00ff014
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ROM_TABLE_END
|
|
CYREG_ROM_TABLE_END EQU 0xe00ff018
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ROM_TABLE_MEMTYPE
|
|
CYREG_ROM_TABLE_MEMTYPE EQU 0xe00fffcc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ROM_TABLE_PID4
|
|
CYREG_ROM_TABLE_PID4 EQU 0xe00fffd0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ROM_TABLE_PID5
|
|
CYREG_ROM_TABLE_PID5 EQU 0xe00fffd4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ROM_TABLE_PID6
|
|
CYREG_ROM_TABLE_PID6 EQU 0xe00fffd8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ROM_TABLE_PID7
|
|
CYREG_ROM_TABLE_PID7 EQU 0xe00fffdc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ROM_TABLE_PID0
|
|
CYREG_ROM_TABLE_PID0 EQU 0xe00fffe0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ROM_TABLE_PID1
|
|
CYREG_ROM_TABLE_PID1 EQU 0xe00fffe4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ROM_TABLE_PID2
|
|
CYREG_ROM_TABLE_PID2 EQU 0xe00fffe8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ROM_TABLE_PID3
|
|
CYREG_ROM_TABLE_PID3 EQU 0xe00fffec
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ROM_TABLE_CID0
|
|
CYREG_ROM_TABLE_CID0 EQU 0xe00ffff0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ROM_TABLE_CID1
|
|
CYREG_ROM_TABLE_CID1 EQU 0xe00ffff4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ROM_TABLE_CID2
|
|
CYREG_ROM_TABLE_CID2 EQU 0xe00ffff8
|
|
ENDIF
|
|
IF :LNOT::DEF:CYREG_ROM_TABLE_CID3
|
|
CYREG_ROM_TABLE_CID3 EQU 0xe00ffffc
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_FLS_SIZE
|
|
CYDEV_FLS_SIZE EQU CYDEV_FLASH_SIZE
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ECC_BASE
|
|
CYDEV_ECC_BASE EQU CYDEV_FLSECC_BASE
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_FLS_SECTOR_SIZE
|
|
CYDEV_FLS_SECTOR_SIZE EQU 0x00010000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_FLS_ROW_SIZE
|
|
CYDEV_FLS_ROW_SIZE EQU 0x00000100
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ECC_SECTOR_SIZE
|
|
CYDEV_ECC_SECTOR_SIZE EQU 0x00002000
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_ECC_ROW_SIZE
|
|
CYDEV_ECC_ROW_SIZE EQU 0x00000020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_EEPROM_SECTOR_SIZE
|
|
CYDEV_EEPROM_SECTOR_SIZE EQU 0x00000400
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_EEPROM_ROW_SIZE
|
|
CYDEV_EEPROM_ROW_SIZE EQU 0x00000010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYDEV_PERIPH_BASE
|
|
CYDEV_PERIPH_BASE EQU CYDEV_CLKDIST_BASE
|
|
ENDIF
|
|
IF :LNOT::DEF:CYCLK_LD_DISABLE
|
|
CYCLK_LD_DISABLE EQU 0x00000004
|
|
ENDIF
|
|
IF :LNOT::DEF:CYCLK_LD_SYNC_EN
|
|
CYCLK_LD_SYNC_EN EQU 0x00000002
|
|
ENDIF
|
|
IF :LNOT::DEF:CYCLK_LD_LOAD
|
|
CYCLK_LD_LOAD EQU 0x00000001
|
|
ENDIF
|
|
IF :LNOT::DEF:CYCLK_PIPE
|
|
CYCLK_PIPE EQU 0x00000080
|
|
ENDIF
|
|
IF :LNOT::DEF:CYCLK_SSS
|
|
CYCLK_SSS EQU 0x00000040
|
|
ENDIF
|
|
IF :LNOT::DEF:CYCLK_EARLY
|
|
CYCLK_EARLY EQU 0x00000020
|
|
ENDIF
|
|
IF :LNOT::DEF:CYCLK_DUTY
|
|
CYCLK_DUTY EQU 0x00000010
|
|
ENDIF
|
|
IF :LNOT::DEF:CYCLK_SYNC
|
|
CYCLK_SYNC EQU 0x00000008
|
|
ENDIF
|
|
IF :LNOT::DEF:CYCLK_SRC_SEL_CLK_SYNC_D
|
|
CYCLK_SRC_SEL_CLK_SYNC_D EQU 0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYCLK_SRC_SEL_SYNC_DIG
|
|
CYCLK_SRC_SEL_SYNC_DIG EQU 0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYCLK_SRC_SEL_IMO
|
|
CYCLK_SRC_SEL_IMO EQU 1
|
|
ENDIF
|
|
IF :LNOT::DEF:CYCLK_SRC_SEL_XTAL_MHZ
|
|
CYCLK_SRC_SEL_XTAL_MHZ EQU 2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYCLK_SRC_SEL_XTALM
|
|
CYCLK_SRC_SEL_XTALM EQU 2
|
|
ENDIF
|
|
IF :LNOT::DEF:CYCLK_SRC_SEL_ILO
|
|
CYCLK_SRC_SEL_ILO EQU 3
|
|
ENDIF
|
|
IF :LNOT::DEF:CYCLK_SRC_SEL_PLL
|
|
CYCLK_SRC_SEL_PLL EQU 4
|
|
ENDIF
|
|
IF :LNOT::DEF:CYCLK_SRC_SEL_XTAL_KHZ
|
|
CYCLK_SRC_SEL_XTAL_KHZ EQU 5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYCLK_SRC_SEL_XTALK
|
|
CYCLK_SRC_SEL_XTALK EQU 5
|
|
ENDIF
|
|
IF :LNOT::DEF:CYCLK_SRC_SEL_DSI_G
|
|
CYCLK_SRC_SEL_DSI_G EQU 6
|
|
ENDIF
|
|
IF :LNOT::DEF:CYCLK_SRC_SEL_DSI_D
|
|
CYCLK_SRC_SEL_DSI_D EQU 7
|
|
ENDIF
|
|
IF :LNOT::DEF:CYCLK_SRC_SEL_CLK_SYNC_A
|
|
CYCLK_SRC_SEL_CLK_SYNC_A EQU 0
|
|
ENDIF
|
|
IF :LNOT::DEF:CYCLK_SRC_SEL_DSI_A
|
|
CYCLK_SRC_SEL_DSI_A EQU 7
|
|
ENDIF
|
|
END
|