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323 lines
13 KiB
C
Executable File
323 lines
13 KiB
C
Executable File
/***************************************************************************//**
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* \file CyFlash.h
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* \version 5.60
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*
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* \brief Provides the function definitions for the FLASH/EEPROM.
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*
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* \note Documentation of the API's in this file is located in the System
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* Reference Guide provided with PSoC Creator.
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*
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********************************************************************************
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* \copyright
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* Copyright 2008-2017, Cypress Semiconductor Corporation. All rights reserved.
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* You may use this file only in accordance with the license, terms, conditions,
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* disclaimers, and limitations in the end user license agreement accompanying
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* the software package with which this file was provided.
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*******************************************************************************/
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#if !defined(CY_BOOT_CYFLASH_H)
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#define CY_BOOT_CYFLASH_H
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#include "cydevice_trm.h"
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#include "cytypes.h"
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#include "CyLib.h"
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#include "CySpc.h"
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#define CY_FLASH_DIE_TEMP_DATA_SIZE (2u) /* Die temperature data size */
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extern uint8 dieTemperature[CY_FLASH_DIE_TEMP_DATA_SIZE];
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/***************************************
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* API Constants
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***************************************/
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#define CY_FLASH_BASE (CYDEV_FLASH_BASE)
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#define CY_FLASH_SIZE (CYDEV_FLS_SIZE)
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#define CY_FLASH_SIZEOF_ARRAY (CYDEV_FLS_SECTOR_SIZE)
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#define CY_FLASH_SIZEOF_ROW (CYDEV_FLS_ROW_SIZE)
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#define CY_FLASH_SIZEOF_ECC_ROW (CYDEV_ECC_ROW_SIZE)
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#define CY_FLASH_NUMBER_ROWS (CYDEV_FLS_SIZE / CYDEV_FLS_ROW_SIZE)
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#define CY_FLASH_NUMBER_ARRAYS (CYDEV_FLS_SIZE / CYDEV_FLS_SECTOR_SIZE)
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#if(CYDEV_ECC_ENABLE == 0)
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#define CY_FLASH_SIZEOF_FULL_ROW (CY_FLASH_SIZEOF_ROW + CY_FLASH_SIZEOF_ECC_ROW)
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#else
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#define CY_FLASH_SIZEOF_FULL_ROW (CY_FLASH_SIZEOF_ROW)
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#endif /* (CYDEV_ECC_ENABLE == 0) */
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#define CY_EEPROM_BASE (CYDEV_EE_BASE)
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#define CY_EEPROM_SIZE (CYDEV_EE_SIZE)
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#define CY_EEPROM_SIZEOF_ARRAY (CYDEV_EE_SIZE) /* EEPROM has one array */
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#define CY_EEPROM_SIZEOF_ROW (CYDEV_EEPROM_ROW_SIZE)
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#define CY_EEPROM_NUMBER_ROWS (CYDEV_EE_SIZE / CYDEV_EEPROM_ROW_SIZE)
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#define CY_EEPROM_NUMBER_ARRAYS (CYDEV_EE_SIZE / CY_EEPROM_SIZEOF_ARRAY)
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#define CY_EEPROM_NUMBER_SECTORS (CYDEV_EE_SIZE / CYDEV_EEPROM_SECTOR_SIZE)
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#define CY_EEPROM_SIZEOF_SECTOR (CYDEV_EEPROM_SECTOR_SIZE)
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#if !defined(CYDEV_FLS_BASE)
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#define CYDEV_FLS_BASE CYDEV_FLASH_BASE
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#endif /* !defined(CYDEV_FLS_BASE) */
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/***************************************
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* Function Prototypes
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***************************************/
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/* Flash Functions */
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void CyFlash_Start(void);
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void CyFlash_Stop(void);
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cystatus CySetTemp(void);
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cystatus CySetFlashEEBuffer(uint8 * buffer);
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cystatus CyWriteRowFull(uint8 arrayId, uint16 rowNumber, const uint8 * rowData, uint16 rowSize) \
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;
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cystatus CyWriteRowData(uint8 arrayId, uint16 rowAddress, const uint8 * rowData);
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#if ((CYDEV_ECC_ENABLE == 0u) && (CYDEV_CONFIGURATION_ECC == 0u))
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cystatus CyWriteRowConfig(uint8 arrayId, uint16 rowAddress, const uint8 * rowECC) \
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;
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#endif /* ((CYDEV_ECC_ENABLE == 0u) && (CYDEV_CONFIGURATION_ECC == 0u)) */
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void CyFlash_SetWaitCycles(uint8 freq) ;
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/* EEPROM Functions */
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void CyEEPROM_Start(void) ;
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void CyEEPROM_Stop(void) ;
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void CyEEPROM_ReadReserve(void) ;
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void CyEEPROM_ReadRelease(void) ;
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/***************************************
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* Registers
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***************************************/
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/* Active Power Mode Configuration Register 0 */
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#define CY_FLASH_PM_ACT_CFG0_REG (* (reg8 *) CYREG_PM_ACT_CFG0)
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#define CY_FLASH_PM_ACT_CFG0_PTR ( (reg8 *) CYREG_PM_ACT_CFG0)
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/* Alternate Active Power Mode Configuration Register 0 */
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#define CY_FLASH_PM_ALTACT_CFG0_REG (* (reg8 *) CYREG_PM_STBY_CFG0)
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#define CY_FLASH_PM_ALTACT_CFG0_PTR ( (reg8 *) CYREG_PM_STBY_CFG0)
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/* Active Power Mode Configuration Register 12 */
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#define CY_FLASH_PM_ACT_CFG12_REG (* (reg8 *) CYREG_PM_ACT_CFG12)
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#define CY_FLASH_PM_ACT_CFG12_PTR ( (reg8 *) CYREG_PM_ACT_CFG12)
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/* Alternate Active Power Mode Configuration Register 12 */
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#define CY_FLASH_PM_ALTACT_CFG12_REG (* (reg8 *) CYREG_PM_STBY_CFG12)
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#define CY_FLASH_PM_ALTACT_CFG12_PTR ( (reg8 *) CYREG_PM_STBY_CFG12)
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/* Wake count (BUS_CLK cycles) it takes for the Flash and EEPROM to wake up */
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#define CY_FLASH_SPC_FM_EE_WAKE_CNT_REG (* (reg8 *) CYREG_SPC_FM_EE_WAKE_CNT)
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#define CY_FLASH_SPC_FM_EE_WAKE_CNT_PTR ( (reg8 *) CYREG_SPC_FM_EE_WAKE_CNT)
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/* Flash macro control register */
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#define CY_FLASH_SPC_FM_EE_CR_REG (* (reg8 *) CYREG_SPC_FM_EE_CR)
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#define CY_FLASH_SPC_FM_EE_CR_PTR ( (reg8 *) CYREG_SPC_FM_EE_CR)
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/* Cache Control Register */
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#if (CY_PSOC3)
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#define CY_FLASH_CONTROL_REG (* (reg8 *) CYREG_CACHE_CR )
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#define CY_FLASH_CONTROL_PTR ( (reg8 *) CYREG_CACHE_CR )
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#else
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#define CY_FLASH_CONTROL_REG (* (reg8 *) CYREG_CACHE_CC_CTL )
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#define CY_FLASH_CONTROL_PTR ( (reg8 *) CYREG_CACHE_CC_CTL )
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#endif /* (CY_PSOC3) */
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/* EEPROM Status & Control Register */
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#define CY_FLASH_EE_SCR_REG (* (reg8 *) CYREG_SPC_EE_SCR)
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#define CY_FLASH_EE_SCR_PTR ( (reg8 *) CYREG_SPC_EE_SCR)
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/***************************************
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* Register Constants
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***************************************/
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/* Power Mode Masks */
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/* Enable EEPROM */
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#define CY_FLASH_PM_ACT_CFG12_EN_EE (0x10u)
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#define CY_FLASH_PM_ALTACT_CFG12_EN_EE (0x10u)
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/* Enable Flash */
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#if (CY_PSOC3)
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#define CY_FLASH_PM_ACT_CFG12_EN_FM (0x01u)
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#define CY_FLASH_PM_ALTACT_CFG12_EN_FM (0x01u)
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#else
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#define CY_FLASH_PM_ACT_CFG12_EN_FM (0x0Fu)
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#define CY_FLASH_PM_ALTACT_CFG12_EN_FM (0x0Fu)
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#endif /* (CY_PSOC3) */
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/* Frequency Constants */
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#if (CY_PSOC3)
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#define CY_FLASH_CACHE_WS_VALUE_MASK (0xC0u)
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#define CY_FLASH_CACHE_WS_1_VALUE_MASK (0x40u)
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#define CY_FLASH_CACHE_WS_2_VALUE_MASK (0x80u)
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#define CY_FLASH_CACHE_WS_3_VALUE_MASK (0xC0u)
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#define CY_FLASH_CACHE_WS_1_FREQ_MAX (22u)
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#define CY_FLASH_CACHE_WS_2_FREQ_MAX (44u)
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#define CY_FLASH_CACHE_WS_3_FREQ_MAX (67u)
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#endif /* (CY_PSOC3) */
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#if (CY_PSOC5)
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#define CY_FLASH_CACHE_WS_VALUE_MASK (0xE0u)
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#define CY_FLASH_CACHE_WS_1_VALUE_MASK (0x40u)
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#define CY_FLASH_CACHE_WS_2_VALUE_MASK (0x80u)
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#define CY_FLASH_CACHE_WS_3_VALUE_MASK (0xC0u)
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#define CY_FLASH_CACHE_WS_4_VALUE_MASK (0x00u)
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#define CY_FLASH_CACHE_WS_5_VALUE_MASK (0x20u)
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#define CY_FLASH_CACHE_WS_1_FREQ_MAX (16u)
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#define CY_FLASH_CACHE_WS_2_FREQ_MAX (33u)
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#define CY_FLASH_CACHE_WS_3_FREQ_MAX (50u)
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#define CY_FLASH_CACHE_WS_4_FREQ_MAX (67u)
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#define CY_FLASH_CACHE_WS_5_FREQ_MAX (83u)
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#endif /* (CY_PSOC5) */
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#define CY_FLASH_CYCLES_MASK_SHIFT (0x06u)
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#define CY_FLASH_CYCLES_MASK ((uint8)(0x03u << (CY_FLASH_CYCLES_MASK_SHIFT)))
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#define CY_FLASH_EE_SCR_AHB_EE_REQ (0x01u)
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#define CY_FLASH_EE_SCR_AHB_EE_ACK (0x02u)
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#define CY_FLASH_EE_EE_AWAKE (0x20u)
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/* 5(us) * BUS_CLK(80 MHz) / granularity(2) */
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#define CY_FLASH_SPC_FM_EE_WAKE_CNT_80MHZ (0xC8u)
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/* Enable clk_spc. This also internally enables the 36MHz IMO. */
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#define CY_FLASH_PM_ACT_CFG0_EN_CLK_SPC (0x08u)
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#define CY_FLASH_PM_ALTACT_CFG0_EN_CLK_SPC (0x08u)
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/* Default values for getting temperature. */
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#define CY_TEMP_NUMBER_OF_SAMPLES (0x1u)
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#define CY_TEMP_TIMER_PERIOD (0xFFFu)
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#define CY_TEMP_CLK_DIV_SELECT (0x4u)
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#define CY_TEMP_NUM_SAMPLES (1 << (CY_TEMP_NUMBER_OF_SAMPLES))
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#define CY_SPC_CLK_PERIOD (120u) /* nS */
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#define CY_SYS_ns_PER_TICK (1000u)
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#define CY_FRM_EXEC_TIME (1000u) /* nS */
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#define CY_GET_TEMP_TIME ((1 << (CY_TEMP_NUM_SAMPLES + 1)) * \
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(CY_SPC_CLK_PERIOD * CY_TEMP_CLK_DIV_SELECT) * \
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CY_TEMP_TIMER_PERIOD + CY_FRM_EXEC_TIME)
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#define CY_TEMP_MAX_WAIT ((CY_GET_TEMP_TIME) / CY_SYS_ns_PER_TICK) /* In system ticks. */
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/*******************************************************************************
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* Thne following code is OBSOLETE and must not be used starting with cy_boot
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* 4.20.
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*
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* If the obsoleted macro definitions intended for use in the application use the
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* following scheme, redefine your own versions of these definitions:
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* #ifdef <OBSOLETED_DEFINE>
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* #undef <OBSOLETED_DEFINE>
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* #define <OBSOLETED_DEFINE> (<New Value>)
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* #endif
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*
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* Note: Redefine obsoleted macro definitions with caution. They might still be
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* used in the application and their modification might lead to unexpected
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* consequences.
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*******************************************************************************/
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#if (CY_PSOC5)
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#define CY_FLASH_LESSER_OR_EQUAL_16MHz (0x01u)
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#define CY_FLASH_LESSER_OR_EQUAL_33MHz (0x02u)
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#define CY_FLASH_LESSER_OR_EQUAL_50MHz (0x03u)
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#define CY_FLASH_GREATER_51MHz (0x00u)
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#endif /* (CY_PSOC5) */
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#if (CY_PSOC3)
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#define CY_FLASH_LESSER_OR_EQUAL_22MHz (0x01u)
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#define CY_FLASH_LESSER_OR_EQUAL_44MHz (0x02u)
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#define CY_FLASH_GREATER_44MHz (0x03u)
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#endif /* (CY_PSOC3) */
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#define CY_FLASH_PM_ACT_EEFLASH_REG (* (reg8 *) CYREG_PM_ACT_CFG12)
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#define CY_FLASH_PM_ACT_EEFLASH_PTR ( (reg8 *) CYREG_PM_ACT_CFG12)
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#define CY_FLASH_PM_ALTACT_EEFLASH_REG (* (reg8 *) CYREG_PM_STBY_CFG12)
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#define CY_FLASH_PM_ALTACT_EEFLASH_PTR ( (reg8 *) CYREG_PM_STBY_CFG12)
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#define CY_FLASH_PM_EE_MASK (0x10u)
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#define CY_FLASH_PM_FLASH_MASK (0x01u)
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/*******************************************************************************
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* The following code is OBSOLETE and must not be used starting with cy_boot 3.0
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*******************************************************************************/
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#define FLASH_SIZE (CY_FLASH_SIZE)
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#define FLASH_SIZEOF_SECTOR (CY_FLASH_SIZEOF_ARRAY)
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#define FLASH_NUMBER_ROWS (CY_FLASH_NUMBER_ROWS)
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#define FLASH_NUMBER_SECTORS (CY_FLASH_NUMBER_ARRAYS)
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#define EEPROM_SIZE (CY_EEPROM_SIZE)
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#define EEPROM_SIZEOF_SECTOR (CYDEV_EEPROM_SECTOR_SIZE)
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#define EEPROM_NUMBER_ROWS (CY_EEPROM_NUMBER_ROWS)
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#define EEPROM_NUMBER_SECTORS (CY_EEPROM_NUMBER_SECTORS)
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/*******************************************************************************
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* The following code is OBSOLETE and must not be used starting with cy_boot 3.30
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*******************************************************************************/
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#define FLASH_CYCLES_PTR (CY_FLASH_CONTROL_PTR)
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#define TEMP_NUMBER_OF_SAMPLES (CY_TEMP_NUMBER_OF_SAMPLES)
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#define TEMP_TIMER_PERIOD (CY_TEMP_TIMER_PERIOD)
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#define TEMP_CLK_DIV_SELECT (CY_TEMP_CLK_DIV_SELECT)
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#define NUM_SAMPLES (CY_TEMP_NUM_SAMPLES)
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#define SPC_CLK_PERIOD (CY_SPC_CLK_PERIOD)
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#define FRM_EXEC_TIME (CY_FRM_EXEC_TIME)
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#define GET_TEMP_TIME (CY_GET_TEMP_TIME)
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#define TEMP_MAX_WAIT (CY_TEMP_MAX_WAIT)
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#define ECC_ADDR (0x80u)
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#define PM_ACT_EE_PTR (CY_FLASH_PM_ACT_EEFLASH_PTR)
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#define PM_ACT_FLASH_PTR (CY_FLASH_PM_ACT_EEFLASH_PTR)
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#define PM_STBY_EE_PTR (CY_FLASH_PM_ALTACT_EEFLASH_PTR)
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#define PM_STBY_FLASH_PTR (CY_FLASH_PM_ALTACT_EEFLASH_PTR)
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#define PM_EE_MASK (CY_FLASH_PM_EE_MASK)
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#define PM_FLASH_MASK (CY_FLASH_PM_FLASH_MASK)
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#define FLASH_CYCLES_MASK_SHIFT (CY_FLASH_CYCLES_MASK_SHIFT)
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#define FLASH_CYCLES_MASK (CY_FLASH_CYCLES_MASK)
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#if (CY_PSOC3)
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#define LESSER_OR_EQUAL_22MHz (CY_FLASH_LESSER_OR_EQUAL_22MHz)
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#define LESSER_OR_EQUAL_44MHz (CY_FLASH_LESSER_OR_EQUAL_44MHz)
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#define GREATER_44MHz (CY_FLASH_GREATER_44MHz)
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#endif /* (CY_PSOC3) */
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#if (CY_PSOC5)
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#define LESSER_OR_EQUAL_16MHz (CY_FLASH_LESSER_OR_EQUAL_16MHz)
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#define LESSER_OR_EQUAL_33MHz (CY_FLASH_LESSER_OR_EQUAL_33MHz)
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#define LESSER_OR_EQUAL_50MHz (CY_FLASH_LESSER_OR_EQUAL_50MHz)
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#define LESSER_OR_EQUAL_67MHz (CY_FLASH_LESSER_OR_EQUAL_67MHz)
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#define GREATER_67MHz (CY_FLASH_GREATER_67MHz)
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#define GREATER_51MHz (CY_FLASH_GREATER_51MHz)
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#endif /* (CY_PSOC5) */
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#define AHUB_EE_REQ_ACK_PTR (CY_FLASH_EE_SCR_PTR)
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#endif /* (CY_BOOT_CYFLASH_H) */
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/* [] END OF FILE */
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