65 lines
2.0 KiB
Plaintext
65 lines
2.0 KiB
Plaintext
# This is the template file for creating symbols with tragesym
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# every line starting with '#' is a comment line.
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[options]
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# wordswap swaps labels if the pin is on the right side an looks like this:
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# "PB1 (CLK)". That's useful for micro controller port labels
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# rotate_labels rotates the pintext of top and bottom pins
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# this is useful for large symbols like FPGAs with more than 100 pins
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# sort_labels will sort the pins by it's labels
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# useful for address ports, busses, ...
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wordswap=yes
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rotate_labels=yes
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sort_labels=no
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generate_pinseq=yes
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sym_width=1000
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pinwidthvertical=400
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pinwidthhorizontal=400
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[geda_attr]
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# name will be printed in the top of the symbol
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# name is only some graphical text, not an attribute
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# version specifies a gschem version.
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# if you have a device with slots, you'll have to use slot= and slotdef=
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# use comment= if there are special information you want to add
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version=20060113 1
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name=LD1117
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device=LD1117
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refdes=U?
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footprint=DPAK
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description=LDO Regulator, fixed
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documentation=http://www.st.com/web/en/resource/technical/document/datasheet/CD00000544.pdf
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author=Michael McMaster <michael@codesrc.com>
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dist-license=gpl3+
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use-license=gpl3+
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numslots=0
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#slot=1
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#slotdef=1:
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#slotdef=2:
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#slotdef=3:
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#slotdef=4:
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#comment=
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#comment=
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#comment=
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[pins]
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# tabseparated list of pin descriptions
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# ----------------------------------------
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# pinnr is the physical number of the pin
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# seq is the pinseq= attribute, leave it blank if it doesn't matter
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# type can be (in, out, io, oc, oe, pas, tp, tri, clk, pwr)
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# style can be (line,dot,clk,dotclk,spacer,none). none if only want to add a net
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# posit. can be (l,r,t,b) or empty for nets.
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# net specifies the name of the net. Vcc or GND for example.
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# label represents the pinlabel.
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# negation lines can be added with "\_" example: \_enable\_
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# if you want to write a "\" use "\\" as escape sequence
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#-----------------------------------------------------
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#pinnr seq type style posit. net label
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#-----------------------------------------------------
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1 pwr line b GND GND
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2 pwr line r OUT
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3 pwr line l IN
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