1004 lines
36 KiB
XML
1004 lines
36 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<device schemaVersion="1.0" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_0.xsd">
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<name>CY8C5267AXI_LP051</name>
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<version>0.1</version>
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<description>CY8C52LP</description>
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<addressUnitBits>8</addressUnitBits>
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<width>32</width>
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<peripherals>
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<peripheral>
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<name>SCSI_Out_Ctl</name>
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<description>No description available</description>
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<baseAddress>0x4000647E</baseAddress>
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<addressBlock>
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<offset>0</offset>
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<size>0x1</size>
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<usage>registers</usage>
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</addressBlock>
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<registers>
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<register>
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<name>SCSI_Out_Ctl_CONTROL_REG</name>
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<description>No description available</description>
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<addressOffset>0x0</addressOffset>
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<size>8</size>
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<access>read-write</access>
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<resetValue>0</resetValue>
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<resetMask>0</resetMask>
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</register>
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</registers>
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</peripheral>
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<peripheral>
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<name>SCSI_Out_Bits</name>
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<description>No description available</description>
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<baseAddress>0x4000647B</baseAddress>
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<addressBlock>
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<offset>0</offset>
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<size>0x1</size>
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<usage>registers</usage>
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</addressBlock>
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<registers>
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<register>
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<name>SCSI_Out_Bits_CONTROL_REG</name>
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<description>No description available</description>
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<addressOffset>0x0</addressOffset>
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<size>8</size>
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<access>read-write</access>
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<resetValue>0</resetValue>
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<resetMask>0</resetMask>
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</register>
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</registers>
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</peripheral>
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<peripheral>
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<name>Debug_Timer</name>
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<description>No description available</description>
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<baseAddress>0x400043A3</baseAddress>
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<addressBlock>
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<offset>0</offset>
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<size>0xB64</size>
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<usage>registers</usage>
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</addressBlock>
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<registers>
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<register>
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<name>Debug_Timer_GLOBAL_ENABLE</name>
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<description>PM.ACT.CFG</description>
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<addressOffset>0x0</addressOffset>
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<size>8</size>
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<access>read-write</access>
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<resetValue>0</resetValue>
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<resetMask>0</resetMask>
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<fields>
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<field>
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<name>en_timer</name>
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<description>Enable timer/counters.</description>
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<lsb>0</lsb>
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<msb>3</msb>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<register>
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<name>Debug_Timer_CONTROL</name>
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<description>TMRx.CFG0</description>
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<addressOffset>0xB5D</addressOffset>
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<size>8</size>
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<access>read-write</access>
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<resetValue>0</resetValue>
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<resetMask>0</resetMask>
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<fields>
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<field>
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<name>EN</name>
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<description>Enables timer/comparator.</description>
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<lsb>0</lsb>
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<msb>0</msb>
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<access>read-write</access>
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</field>
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<field>
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<name>MODE</name>
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<description>Mode. (0 = Timer; 1 = Comparator)</description>
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<lsb>1</lsb>
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<msb>1</msb>
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<access>read-write</access>
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<enumeratedValues>
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<enumeratedValue>
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<name>Timer</name>
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<description>Timer mode. CNT/CMP register holds timer count value.</description>
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<value>0</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>Comparator</name>
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<description>Comparator mode. CNT/CMP register holds comparator threshold value.</description>
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<value>1</value>
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</enumeratedValue>
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</enumeratedValues>
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</field>
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<field>
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<name>ONESHOT</name>
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<description>Timer stops upon reaching stop condition defined by TMR_CFG bits. Can be restarted by asserting TIMER RESET or disabling and re-enabling block.</description>
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<lsb>2</lsb>
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<msb>2</msb>
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<access>read-write</access>
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</field>
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<field>
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<name>CMP_BUFF</name>
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<description>Buffer compare register. Compare register updates only on timer terminal count.</description>
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<lsb>3</lsb>
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<msb>3</msb>
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<access>read-write</access>
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</field>
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<field>
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<name>INV</name>
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<description>Invert sense of TIMEREN signal</description>
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<lsb>4</lsb>
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<msb>4</msb>
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<access>read-write</access>
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</field>
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<field>
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<name>DB</name>
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<description>Deadband mode--Deadband phases phi1 and phi2 are outputted on CMP and TC output pins respectively.</description>
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<lsb>5</lsb>
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<msb>5</msb>
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<access>read-write</access>
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<enumeratedValues>
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<enumeratedValue>
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<name>Timer</name>
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<description>CMP and TC are output.</description>
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<value>0</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>Deadband</name>
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<description>PHI1 (instead of CMP) and PHI2 (instead of TC) are output.</description>
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<value>1</value>
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</enumeratedValue>
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</enumeratedValues>
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</field>
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<field>
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<name>DEADBAND_PERIOD</name>
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<description>Deadband Period</description>
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<lsb>6</lsb>
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<msb>7</msb>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<register>
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<name>Debug_Timer_CONTROL2</name>
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<description>TMRx.CFG1</description>
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<addressOffset>0xB5E</addressOffset>
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<size>8</size>
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<access>read-write</access>
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<resetValue>0</resetValue>
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<resetMask>0</resetMask>
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<fields>
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<field>
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<name>IRQ_SEL</name>
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<description>Irq selection. (0 = raw interrupts; 1 = status register interrupts)</description>
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<lsb>0</lsb>
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<msb>0</msb>
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<access>read-write</access>
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</field>
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<field>
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<name>FTC</name>
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<description>First Terminal Count (FTC). Setting this bit forces a single pulse on the TC pin when first enabled.</description>
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<lsb>1</lsb>
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<msb>1</msb>
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<access>read-write</access>
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<enumeratedValues>
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<enumeratedValue>
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<name>Disable_FTC</name>
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<description>Disable the single cycle pulse, which signifies the timer is starting.</description>
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<value>0</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>Enable_FTC</name>
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<description>Enable the single cycle pulse, which signifies the timer is starting.</description>
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<value>1</value>
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</enumeratedValue>
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</enumeratedValues>
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</field>
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<field>
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<name>DCOR</name>
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<description>Disable Clear on Read (DCOR) of Status Register SR0.</description>
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<lsb>2</lsb>
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<msb>2</msb>
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<access>read-write</access>
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</field>
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<field>
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<name>DBMODE</name>
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<description>Deadband mode (asynchronous/synchronous). CMP output pin is also affected when not in deadband mode (CFG0.DEADBAND).</description>
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<lsb>3</lsb>
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<msb>3</msb>
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<access>read-write</access>
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</field>
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<field>
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<name>CLK_BUS_EN_SEL</name>
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<description>Digital Global Clock selection.</description>
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<lsb>4</lsb>
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<msb>6</msb>
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<access>read-write</access>
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</field>
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<field>
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<name>BUS_CLK_SEL</name>
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<description>Bus Clock selection.</description>
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<lsb>7</lsb>
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<msb>7</msb>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<register>
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<name>Debug_Timer_CONTROL3_</name>
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<description>TMRx.CFG2</description>
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<addressOffset>0xB5F</addressOffset>
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<size>8</size>
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<access>read-write</access>
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<resetValue>0</resetValue>
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<resetMask>0</resetMask>
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<fields>
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<field>
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<name>TMR_CFG</name>
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<description>Timer configuration (MODE = 0): 000 = Continuous; 001 = Pulsewidth; 010 = Period; 011 = Stop on IRQ</description>
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<lsb>0</lsb>
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<msb>1</msb>
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<access>read-write</access>
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<enumeratedValues>
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<enumeratedValue>
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<name>Continuous</name>
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<description>Timer runs while EN bit of CFG0 register is set to '1'.</description>
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<value>0</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>Pulsewidth</name>
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<description>Timer runs from positive to negative edge of TIMEREN.</description>
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<value>1</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>Period</name>
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<description>Timer runs from positive to positive edge of TIMEREN.</description>
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<value>2</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>Irq</name>
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<description>Timer runs until IRQ.</description>
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<value>3</value>
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</enumeratedValue>
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</enumeratedValues>
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</field>
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<field>
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<name>COD</name>
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<description>Clear On Disable (COD). Clears or gates outputs to zero.</description>
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<lsb>2</lsb>
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<msb>2</msb>
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<access>read-write</access>
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</field>
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<field>
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<name>ROD</name>
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<description>Reset On Disable (ROD). Resets internal state of output logic</description>
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<lsb>3</lsb>
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<msb>3</msb>
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<access>read-write</access>
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</field>
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<field>
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<name>CMP_CFG</name>
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<description>Comparator configurations</description>
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<lsb>4</lsb>
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<msb>6</msb>
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<access>read-write</access>
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<enumeratedValues>
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<enumeratedValue>
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<name>Equal</name>
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<description>Compare Equal </description>
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<value>0</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>Less_than</name>
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<description>Compare Less Than </description>
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<value>1</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>Less_than_or_equal</name>
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<description>Compare Less Than or Equal .</description>
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<value>2</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>Greater</name>
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<description>Compare Greater Than .</description>
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<value>3</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>Greater_than_or_equal</name>
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<description>Compare Greater Than or Equal </description>
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<value>4</value>
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</enumeratedValue>
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</enumeratedValues>
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</field>
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<field>
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<name>HW_EN</name>
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<description>When set Timer Enable controls counting.</description>
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<lsb>7</lsb>
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<msb>7</msb>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<register>
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<name>Debug_Timer_PERIOD</name>
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<description>TMRx.PER0 - Assigned Period</description>
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<addressOffset>0xB61</addressOffset>
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<size>16</size>
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<access>read-write</access>
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<resetValue>0</resetValue>
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<resetMask>0</resetMask>
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</register>
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<register>
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<name>Debug_Timer_COUNTER</name>
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<description>TMRx.CNT_CMP0 - Current Down Counter Value</description>
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<addressOffset>0xB63</addressOffset>
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<size>16</size>
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<access>read-write</access>
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<resetValue>0</resetValue>
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<resetMask>0</resetMask>
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</register>
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</registers>
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</peripheral>
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<peripheral>
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<name>USBFS</name>
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<description>USBFS</description>
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<baseAddress>0x40004394</baseAddress>
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<addressBlock>
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<offset>0</offset>
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<size>0x1D0A</size>
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<usage>registers</usage>
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</addressBlock>
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<registers>
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<register>
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<name>USBFS_PM_USB_CR0</name>
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<description>USB Power Mode Control Register 0</description>
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<addressOffset>0x0</addressOffset>
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<size>8</size>
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<access>read-write</access>
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<resetValue>0</resetValue>
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<resetMask>0</resetMask>
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<fields>
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<field>
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<name>fsusbio_ref_en</name>
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<description>No description available</description>
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<lsb>0</lsb>
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<msb>0</msb>
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<access>read-write</access>
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</field>
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<field>
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<name>fsusbio_pd_n</name>
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<description>No description available</description>
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<lsb>1</lsb>
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<msb>1</msb>
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<access>read-write</access>
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</field>
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<field>
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<name>fsusbio_pd_pullup_n</name>
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<description>No description available</description>
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<lsb>2</lsb>
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<msb>2</msb>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<register>
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<name>USBFS_PM_ACT_CFG</name>
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<description>Active Power Mode Configuration Register</description>
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<addressOffset>0x11</addressOffset>
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<size>8</size>
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<access>read-write</access>
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<resetValue>0</resetValue>
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<resetMask>0</resetMask>
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</register>
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<register>
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<name>USBFS_PM_STBY_CFG</name>
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<description>Standby Power Mode Configuration Register</description>
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<addressOffset>0x21</addressOffset>
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<size>8</size>
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<access>read-write</access>
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<resetValue>0</resetValue>
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<resetMask>0</resetMask>
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</register>
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<register>
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<name>USBFS_PRT_PS</name>
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<description>Port Pin State Register</description>
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<addressOffset>0xE5D</addressOffset>
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<size>8</size>
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<access>read-write</access>
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<resetValue>0</resetValue>
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<resetMask>0</resetMask>
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<fields>
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<field>
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<name>PinState_DP</name>
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<description>No description available</description>
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<lsb>6</lsb>
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<msb>6</msb>
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<access>read-only</access>
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</field>
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<field>
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<name>PinState_DM</name>
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<description>No description available</description>
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<lsb>7</lsb>
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<msb>7</msb>
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<access>read-only</access>
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</field>
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</fields>
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</register>
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<register>
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<name>USBFS_PRT_DM0</name>
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<description>Port Drive Mode Register</description>
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<addressOffset>0xE5E</addressOffset>
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<size>8</size>
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<access>read-write</access>
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<resetValue>0</resetValue>
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<resetMask>0</resetMask>
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<fields>
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<field>
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<name>DriveMode_DP</name>
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<description>No description available</description>
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<lsb>6</lsb>
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<msb>6</msb>
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<access>read-write</access>
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</field>
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<field>
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<name>DriveMode_DM</name>
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<description>No description available</description>
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<lsb>7</lsb>
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<msb>7</msb>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<register>
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<name>USBFS_PRT_DM1</name>
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<description>Port Drive Mode Register</description>
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<addressOffset>0xE5F</addressOffset>
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<size>8</size>
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<access>read-write</access>
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<resetValue>0</resetValue>
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<resetMask>0</resetMask>
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<fields>
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<field>
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<name>PullUp_en_DP</name>
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<description>No description available</description>
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<lsb>6</lsb>
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<msb>6</msb>
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<access>read-write</access>
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</field>
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<field>
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<name>PullUp_en_DM</name>
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<description>No description available</description>
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<lsb>7</lsb>
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<msb>7</msb>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<register>
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<name>USBFS_PRT_INP_DIS</name>
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<description>Input buffer disable override</description>
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<addressOffset>0xE64</addressOffset>
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<size>8</size>
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<access>read-write</access>
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<resetValue>0</resetValue>
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<resetMask>0</resetMask>
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<fields>
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<field>
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<name>seinput_dis_dp</name>
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<description>No description available</description>
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<lsb>6</lsb>
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<msb>6</msb>
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<access>read-write</access>
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</field>
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<field>
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<name>seinput_dis_dm</name>
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<description>No description available</description>
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<lsb>7</lsb>
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<msb>7</msb>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<register>
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|
<name>USBFS_EP0_DR0</name>
|
|
<description>bmRequestType</description>
|
|
<addressOffset>0x1C6C</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
</register>
|
|
<register>
|
|
<name>USBFS_EP0_DR1</name>
|
|
<description>bRequest</description>
|
|
<addressOffset>0x1C6D</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
</register>
|
|
<register>
|
|
<name>USBFS_EP0_DR2</name>
|
|
<description>wValueLo</description>
|
|
<addressOffset>0x1C6E</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
</register>
|
|
<register>
|
|
<name>USBFS_EP0_DR3</name>
|
|
<description>wValueHi</description>
|
|
<addressOffset>0x1C6F</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
</register>
|
|
<register>
|
|
<name>USBFS_EP0_DR4</name>
|
|
<description>wIndexLo</description>
|
|
<addressOffset>0x1C70</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
</register>
|
|
<register>
|
|
<name>USBFS_EP0_DR5</name>
|
|
<description>wIndexHi</description>
|
|
<addressOffset>0x1C71</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
</register>
|
|
<register>
|
|
<name>USBFS_EP0_DR6</name>
|
|
<description>lengthLo</description>
|
|
<addressOffset>0x1C72</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
</register>
|
|
<register>
|
|
<name>USBFS_EP0_DR7</name>
|
|
<description>lengthHi</description>
|
|
<addressOffset>0x1C73</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
</register>
|
|
<register>
|
|
<name>USBFS_CR0</name>
|
|
<description>USB Control Register 0</description>
|
|
<addressOffset>0x1C74</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>device_address</name>
|
|
<description>No description available</description>
|
|
<lsb>6</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>usb_enable</name>
|
|
<description>No description available</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>USBFS_CR1</name>
|
|
<description>USB Control Register 1</description>
|
|
<addressOffset>0x1C75</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>reg_enable</name>
|
|
<description>No description available</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>enable_lock</name>
|
|
<description>No description available</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>bus_activity</name>
|
|
<description>No description available</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>trim_offset_msb</name>
|
|
<description>No description available</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>USBFS_SIE_EP1_CR0</name>
|
|
<description>The Endpoint1 Control Register</description>
|
|
<addressOffset>0x1C7A</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
</register>
|
|
<register>
|
|
<name>USBFS_USBIO_CR0</name>
|
|
<description>USBIO Control Register 0</description>
|
|
<addressOffset>0x1C7C</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>rd</name>
|
|
<description>No description available</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>td</name>
|
|
<description>No description available</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>tse0</name>
|
|
<description>No description available</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ten</name>
|
|
<description>No description available</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>USBFS_USBIO_CR1</name>
|
|
<description>USBIO Control Register 1</description>
|
|
<addressOffset>0x1C7E</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>dmo</name>
|
|
<description>No description available</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>dpo</name>
|
|
<description>No description available</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>usbpuen</name>
|
|
<description>No description available</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>iomode</name>
|
|
<description>No description available</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>USBFS_SIE_EP2_CR0</name>
|
|
<description>The Endpoint2 Control Register</description>
|
|
<addressOffset>0x1C8A</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
</register>
|
|
<register>
|
|
<name>USBFS_SIE_EP3_CR0</name>
|
|
<description>The Endpoint3 Control Register</description>
|
|
<addressOffset>0x1C9A</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
</register>
|
|
<register>
|
|
<name>USBFS_SIE_EP4_CR0</name>
|
|
<description>The Endpoint4 Control Register</description>
|
|
<addressOffset>0x1CAA</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
</register>
|
|
<register>
|
|
<name>USBFS_SIE_EP5_CR0</name>
|
|
<description>The Endpoint5 Control Register</description>
|
|
<addressOffset>0x1CBA</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
</register>
|
|
<register>
|
|
<name>USBFS_SIE_EP6_CR0</name>
|
|
<description>The Endpoint6 Control Register</description>
|
|
<addressOffset>0x1CCA</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
</register>
|
|
<register>
|
|
<name>USBFS_SIE_EP7_CR0</name>
|
|
<description>The Endpoint7 Control Register</description>
|
|
<addressOffset>0x1CDA</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
</register>
|
|
<register>
|
|
<name>USBFS_SIE_EP8_CR0</name>
|
|
<description>The Endpoint8 Control Register</description>
|
|
<addressOffset>0x1CEA</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
</register>
|
|
<register>
|
|
<name>USBFS_BUF_SIZE</name>
|
|
<description>Dedicated Endpoint Buffer Size Register</description>
|
|
<addressOffset>0x1CF8</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
</register>
|
|
<register>
|
|
<name>USBFS_EP_ACTIVE</name>
|
|
<description>Endpoint Active Indication Register</description>
|
|
<addressOffset>0x1CFA</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
</register>
|
|
<register>
|
|
<name>USBFS_EP_TYPE</name>
|
|
<description>Endpoint Type (IN/OUT) Indication</description>
|
|
<addressOffset>0x1CFB</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
</register>
|
|
<register>
|
|
<name>USBFS_USB_CLK_EN</name>
|
|
<description>USB Block Clock Enable Register</description>
|
|
<addressOffset>0x1D09</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>SCSI_Parity_Error</name>
|
|
<description>No description available</description>
|
|
<baseAddress>0x4000646A</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x31</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>SCSI_Parity_Error_STATUS_REG</name>
|
|
<description>No description available</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
</register>
|
|
<register>
|
|
<name>SCSI_Parity_Error_MASK_REG</name>
|
|
<description>No description available</description>
|
|
<addressOffset>0x20</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
</register>
|
|
<register>
|
|
<name>SCSI_Parity_Error_STATUS_AUX_CTL_REG</name>
|
|
<description>No description available</description>
|
|
<addressOffset>0x30</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>FIFO0</name>
|
|
<description>FIFO0 clear</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>ENABLED</name>
|
|
<description>Enable counter</description>
|
|
<value>1</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Disable counter</description>
|
|
<value>0</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>INTRENBL</name>
|
|
<description>Enables or disables the Interrupt</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>ENABLED</name>
|
|
<description>Interrupt enabled</description>
|
|
<value>1</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Interrupt disabled</description>
|
|
<value>0</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>FIFO1LEVEL</name>
|
|
<description>FIFO level</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>ENABLED</name>
|
|
<description>FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full</description>
|
|
<value>1</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty</description>
|
|
<value>0</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>FIFO0LEVEL</name>
|
|
<description>FIFO level</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>ENABLED</name>
|
|
<description>FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full</description>
|
|
<value>1</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty</description>
|
|
<value>0</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>FIFO1CLEAR</name>
|
|
<description>FIFO clear</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>ENABLED</name>
|
|
<description>Clear FIFO state</description>
|
|
<value>1</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Normal FIFO operation</description>
|
|
<value>0</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>FIFO0CLEAR</name>
|
|
<description>FIFO clear</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>ENABLED</name>
|
|
<description>Clear FIFO state</description>
|
|
<value>1</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Normal FIFO operation</description>
|
|
<value>0</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>SCSI_CTL_PHASE</name>
|
|
<description>No description available</description>
|
|
<baseAddress>0x40006471</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>SCSI_CTL_PHASE_CONTROL_REG</name>
|
|
<description>No description available</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0</resetValue>
|
|
<resetMask>0</resetMask>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
</peripherals>
|
|
</device> |