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b5e1d49d6e
SCSI2SD/software/SCSI2SD/v5.2/USB_Bootloader.cydsn/USB_Bootloader.rpt
Michael McMaster b5e1d49d6e Fix USB ID to identify V5.2 boards
2020-10-12 11:09:06 +10:00

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Loading plugins phase: Elapsed time ==> 0s.109ms
<CYPRESSTAG name="CyDsfit arguments...">
cydsfit arguments: -.fdsnotice -.fdswarpdepfile=warp_dependencies.txt -.fdselabdepfile=elab_dependencies.txt -.fdsbldfile=generated_files.txt -.fdsreffile=referenced_files.txt -p C:\Users\Michael\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\USB_Bootloader.cyprj -d CY8C5267AXI-LP051 -s C:\Users\Michael\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\Generated_Source\PSoC5 -- -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE
</CYPRESSTAG>
<CYPRESSTAG name="Design elaboration results...">
</CYPRESSTAG>
Elaboration phase: Elapsed time ==> 1s.465ms
<CYPRESSTAG name="HDL generation results...">
</CYPRESSTAG>
HDL generation phase: Elapsed time ==> 0s.041ms
<CYPRESSTAG name="Synthesis results...">
| | | | | | |
_________________
-| |-
-| |-
-| |-
-| CYPRESS |-
-| |-
-| |- Warp Verilog Synthesis Compiler: Version 6.3 IR 41
-| |- Copyright (C) 1991-2001 Cypress Semiconductor
|_______________|
| | | | | | |
======================================================================
Compiling: USB_Bootloader.v
Program : C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\bin\warp.exe
Options : -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE -ya -.fftprj=C:\Users\Michael\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 USB_Bootloader.v -verilog
======================================================================
======================================================================
Compiling: USB_Bootloader.v
Program : C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\bin\warp.exe
Options : -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE -ya -.fftprj=C:\Users\Michael\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 USB_Bootloader.v -verilog
======================================================================
======================================================================
Compiling: USB_Bootloader.v
Program : vlogfe
Options : -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE -ya -.fftprj=C:\Users\Michael\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 -verilog USB_Bootloader.v
======================================================================
vlogfe V6.3 IR 41: Verilog parser
Mon Oct 12 10:51:56 2020
======================================================================
Compiling: USB_Bootloader.v
Program : vpp
Options : -yv2 -q10 USB_Bootloader.v
======================================================================
vpp V6.3 IR 41: Verilog Pre-Processor
Mon Oct 12 10:51:56 2020
Flattening file 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\cy_virtualmux_v1_0\cy_virtualmux_v1_0.v'
Flattening file 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\ZeroTerminal\ZeroTerminal.v'
vpp: No errors.
Library 'work' => directory 'lcpsoc3'
General_symbol_table
General_symbol_table
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\std.vhd'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\cypress.vhd'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\work\cypress.vif'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\ieee\work\stdlogic.vif'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\lpmpkg.vif'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\rtlpkg.vif'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\mod_cnst.vif'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\mod_mthv.vif'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\mod_genv.vif'.
Using control file 'USB_Bootloader.ctl'.
vlogfe: No errors.
======================================================================
Compiling: USB_Bootloader.v
Program : tovif
Options : -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE -ya -.fftprj=C:\Users\Michael\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 -verilog USB_Bootloader.v
======================================================================
tovif V6.3 IR 41: High-level synthesis
Mon Oct 12 10:51:56 2020
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\std.vhd'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\cypress.vhd'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\work\cypress.vif'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\ieee\work\stdlogic.vif'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\lpmpkg.vif'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\rtlpkg.vif'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\mod_cnst.vif'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\mod_mthv.vif'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\mod_genv.vif'.
Linking 'C:\Users\Michael\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\codegentemp\USB_Bootloader.ctl'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\cy_virtualmux_v1_0\cy_virtualmux_v1_0.v'.
Linking 'C:\Users\Michael\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\codegentemp\USB_Bootloader.v'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\ZeroTerminal\ZeroTerminal.v'.
tovif: No errors.
======================================================================
Compiling: USB_Bootloader.v
Program : topld
Options : -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE -ya -.fftprj=C:\Users\Michael\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 -verilog USB_Bootloader.v
======================================================================
topld V6.3 IR 41: Synthesis and optimization
Mon Oct 12 10:51:56 2020
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\std.vhd'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\cypress.vhd'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\work\cypress.vif'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\ieee\work\stdlogic.vif'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\lpmpkg.vif'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\rtlpkg.vif'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\mod_cnst.vif'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\mod_mthv.vif'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\mod_genv.vif'.
Linking 'C:\Users\Michael\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\codegentemp\USB_Bootloader.ctl'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\cy_virtualmux_v1_0\cy_virtualmux_v1_0.v'.
Linking 'C:\Users\Michael\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\codegentemp\USB_Bootloader.v'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\ZeroTerminal\ZeroTerminal.v'.
Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\lcpsoc3\stdlogic\cpsoc3.vif'.
----------------------------------------------------------
Detecting unused logic.
----------------------------------------------------------
User names
\USBFS:dma_nrq_0\
\USBFS:Net_1800\
\USBFS:dma_nrq_3\
\USBFS:Net_1803\
\USBFS:Net_1801\
\USBFS:dma_nrq_1\
\USBFS:dma_nrq_4\
\USBFS:Net_1804\
\USBFS:dma_nrq_5\
\USBFS:Net_1805\
\USBFS:dma_nrq_6\
\USBFS:Net_1806\
\USBFS:dma_nrq_7\
\USBFS:Net_1807\
\USBFS:dma_nrq_2\
\USBFS:Net_1802\
Deleted 16 User equations/components.
Deleted 0 Synthesized equations/components.
------------------------------------------------------
Alias Detection
------------------------------------------------------
Aliasing one to \USBFS:tmpOE__Dm_net_0\
Aliasing \USBFS:tmpOE__Dp_net_0\ to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__SCSI_Out_DBx_net_7 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__SCSI_Out_DBx_net_6 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__SCSI_Out_DBx_net_5 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__SCSI_Out_DBx_net_4 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__SCSI_Out_DBx_net_3 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__SCSI_Out_DBx_net_2 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__SCSI_Out_DBx_net_1 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__SCSI_Out_DBx_net_0 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__SCSI_Out_net_7 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__SCSI_Out_net_6 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__SCSI_Out_net_5 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__SCSI_Out_net_4 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__SCSI_Out_net_3 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__SCSI_Out_net_2 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__SCSI_Out_net_1 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__SCSI_Out_net_0 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__SD_PULLUP_net_3 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__SD_PULLUP_net_2 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__SD_PULLUP_net_1 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__SD_PULLUP_net_0 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__LED_net_1 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__LED_net_0 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__TERM_EN_net_0 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__BOOTLDR_net_0 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__SPI_PULLUP_net_3 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__SPI_PULLUP_net_2 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__SPI_PULLUP_net_1 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__SPI_PULLUP_net_0 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__SPI_PULLUP_1_net_1 to \USBFS:tmpOE__Dm_net_0\
Aliasing tmpOE__SPI_PULLUP_1_net_0 to \USBFS:tmpOE__Dm_net_0\
Removing Rhs of wire one[37] = \USBFS:tmpOE__Dm_net_0\[31]
Removing Lhs of wire \USBFS:tmpOE__Dp_net_0\[40] = one[37]
Removing Lhs of wire tmpOE__SCSI_Out_DBx_net_7[65] = one[37]
Removing Lhs of wire tmpOE__SCSI_Out_DBx_net_6[66] = one[37]
Removing Lhs of wire tmpOE__SCSI_Out_DBx_net_5[67] = one[37]
Removing Lhs of wire tmpOE__SCSI_Out_DBx_net_4[68] = one[37]
Removing Lhs of wire tmpOE__SCSI_Out_DBx_net_3[69] = one[37]
Removing Lhs of wire tmpOE__SCSI_Out_DBx_net_2[70] = one[37]
Removing Lhs of wire tmpOE__SCSI_Out_DBx_net_1[71] = one[37]
Removing Lhs of wire tmpOE__SCSI_Out_DBx_net_0[72] = one[37]
Removing Lhs of wire tmpOE__SCSI_Out_net_7[100] = one[37]
Removing Lhs of wire tmpOE__SCSI_Out_net_6[101] = one[37]
Removing Lhs of wire tmpOE__SCSI_Out_net_5[102] = one[37]
Removing Lhs of wire tmpOE__SCSI_Out_net_4[103] = one[37]
Removing Lhs of wire tmpOE__SCSI_Out_net_3[104] = one[37]
Removing Lhs of wire tmpOE__SCSI_Out_net_2[105] = one[37]
Removing Lhs of wire tmpOE__SCSI_Out_net_1[106] = one[37]
Removing Lhs of wire tmpOE__SCSI_Out_net_0[107] = one[37]
Removing Lhs of wire tmpOE__SD_PULLUP_net_3[135] = one[37]
Removing Lhs of wire tmpOE__SD_PULLUP_net_2[136] = one[37]
Removing Lhs of wire tmpOE__SD_PULLUP_net_1[137] = one[37]
Removing Lhs of wire tmpOE__SD_PULLUP_net_0[138] = one[37]
Removing Lhs of wire tmpOE__LED_net_1[150] = one[37]
Removing Lhs of wire tmpOE__LED_net_0[151] = one[37]
Removing Lhs of wire tmpOE__TERM_EN_net_0[159] = one[37]
Removing Lhs of wire tmpOE__BOOTLDR_net_0[166] = one[37]
Removing Lhs of wire tmpOE__SPI_PULLUP_net_3[172] = one[37]
Removing Lhs of wire tmpOE__SPI_PULLUP_net_2[173] = one[37]
Removing Lhs of wire tmpOE__SPI_PULLUP_net_1[174] = one[37]
Removing Lhs of wire tmpOE__SPI_PULLUP_net_0[175] = one[37]
Removing Lhs of wire tmpOE__SPI_PULLUP_1_net_1[187] = one[37]
Removing Lhs of wire tmpOE__SPI_PULLUP_1_net_0[188] = one[37]
------------------------------------------------------
Aliased 0 equations, 32 wires.
------------------------------------------------------
----------------------------------------------------------
Circuit simplification
----------------------------------------------------------
Substituting virtuals - pass 1:
----------------------------------------------------------
Circuit simplification results:
Expanded 0 signals.
Turned 0 signals into soft nodes.
Maximum default expansion cost was set at 3.
----------------------------------------------------------
topld: No errors.
CYPRESS_DIR : C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp
Warp Program : C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\bin\warp.exe
Warp Arguments : -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE -ya -.fftprj=C:\Users\Michael\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 USB_Bootloader.v -verilog
</CYPRESSTAG>
Warp synthesis phase: Elapsed time ==> 0s.471ms
<CYPRESSTAG name="Fitter results...">
<CYPRESSTAG name="Fitter startup details...">
cyp3fit: V4.2.0.641, Family: PSoC3, Started at: Monday, 12 October 2020 10:51:56
Options: -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE -ya -.fftprj=C:\Users\Michael\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\USB_Bootloader.cyprj -d CY8C5267AXI-LP051 USB_Bootloader.v -verilog
</CYPRESSTAG>
<CYPRESSTAG name="Design parsing">
Design parsing phase: Elapsed time ==> 0s.009ms
</CYPRESSTAG>
<CYPRESSTAG name="Tech Mapping">
<CYPRESSTAG name="Initial Mapping" icon="FILE_RPT_TECHM">
Assigning clock USBFS_Clock_vbus to clock BUS_CLK because it is a pass-through
<CYPRESSTAG name="Global Clock Selection" icon="FILE_RPT_TECHM">
</CYPRESSTAG>
<CYPRESSTAG name="UDB Clock/Enable Remapping Results">
</CYPRESSTAG>
<CYPRESSTAG name="Duplicate Macrocell detection">
</CYPRESSTAG>
</CYPRESSTAG>
<CYPRESSTAG name="Duplicate Macrocell detection">
</CYPRESSTAG>
<CYPRESSTAG name="Design Equations" icon="FILE_RPT_EQUATION">
------------------------------------------------------------
Design Equations
------------------------------------------------------------
<CYPRESSTAG name="Pin listing">
------------------------------------------------------------
Pin listing
------------------------------------------------------------
Pin : Name = \USBFS:Dm(0)\
Attributes:
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: AUTO
Interrupt generated: False
Interrupt mode: NONE
Drive mode: HI_Z_ANALOG
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: True
Can contain Digital: False
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: USB_D_MINUS
Initial Value: 0
IO Voltage: 0
PORT MAP (
pa_out => \USBFS:Dm(0)\__PA ,
analog_term => \USBFS:Net_597\ ,
pad => \USBFS:Dm(0)_PAD\ );
Properties:
{
}
Pin : Name = \USBFS:Dp(0)\
Attributes:
In Group/Port: True
In Sync Option: SYNC
Out Sync Option: AUTO
Interrupt generated: True
Interrupt mode: FALLING
Drive mode: HI_Z_ANALOG
VTrip: CMOS
Slew: FAST
Input Sync needed: True
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: False
Is OE Registered: False
Uses Analog: True
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: USB_D_PLUS
Initial Value: 0
IO Voltage: 0
PORT MAP (
pa_out => \USBFS:Dp(0)\__PA ,
analog_term => \USBFS:Net_1000\ ,
pad => \USBFS:Dp(0)_PAD\ );
Properties:
{
}
Pin : Name = SCSI_Out_DBx(0)
Attributes:
Alias: DB0
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out_DBx(0)__PA ,
pad => SCSI_Out_DBx(0)_PAD );
Properties:
{
}
Pin : Name = SCSI_Out_DBx(1)
Attributes:
Alias: DB1
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out_DBx(1)__PA ,
pad => SCSI_Out_DBx(1)_PAD );
Properties:
{
}
Pin : Name = SCSI_Out_DBx(2)
Attributes:
Alias: DB2
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out_DBx(2)__PA ,
pad => SCSI_Out_DBx(2)_PAD );
Properties:
{
}
Pin : Name = SCSI_Out_DBx(3)
Attributes:
Alias: DB3
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out_DBx(3)__PA ,
pad => SCSI_Out_DBx(3)_PAD );
Properties:
{
}
Pin : Name = SCSI_Out_DBx(4)
Attributes:
Alias: DB4
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out_DBx(4)__PA ,
pad => SCSI_Out_DBx(4)_PAD );
Properties:
{
}
Pin : Name = SCSI_Out_DBx(5)
Attributes:
Alias: DB5
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out_DBx(5)__PA ,
pad => SCSI_Out_DBx(5)_PAD );
Properties:
{
}
Pin : Name = SCSI_Out_DBx(6)
Attributes:
Alias: DB6
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out_DBx(6)__PA ,
pad => SCSI_Out_DBx(6)_PAD );
Properties:
{
}
Pin : Name = SCSI_Out_DBx(7)
Attributes:
Alias: DB7
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out_DBx(7)__PA ,
pad => SCSI_Out_DBx(7)_PAD );
Properties:
{
}
Pin : Name = SCSI_Out(0)
Attributes:
Alias: DBP_raw
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out(0)__PA ,
pad => SCSI_Out(0)_PAD );
Properties:
{
}
Pin : Name = SCSI_Out(1)
Attributes:
Alias: BSY
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out(1)__PA ,
pad => SCSI_Out(1)_PAD );
Properties:
{
}
Pin : Name = SCSI_Out(2)
Attributes:
Alias: RST
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out(2)__PA ,
pad => SCSI_Out(2)_PAD );
Properties:
{
}
Pin : Name = SCSI_Out(3)
Attributes:
Alias: MSG
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out(3)__PA ,
pad => SCSI_Out(3)_PAD );
Properties:
{
}
Pin : Name = SCSI_Out(4)
Attributes:
Alias: SEL
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out(4)__PA ,
pad => SCSI_Out(4)_PAD );
Properties:
{
}
Pin : Name = SCSI_Out(5)
Attributes:
Alias: CD
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out(5)__PA ,
pad => SCSI_Out(5)_PAD );
Properties:
{
}
Pin : Name = SCSI_Out(6)
Attributes:
Alias: REQ
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out(6)__PA ,
pad => SCSI_Out(6)_PAD );
Properties:
{
}
Pin : Name = SCSI_Out(7)
Attributes:
Alias: IO_raw
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out(7)__PA ,
pad => SCSI_Out(7)_PAD );
Properties:
{
}
Pin : Name = SD_PULLUP(0)
Attributes:
In Group/Port: True
In Sync Option: SYNC
Out Sync Option: AUTO
Interrupt generated: False
Interrupt mode: NONE
Drive mode: RES_PULL_UP
VTrip: CMOS
Slew: FAST
Input Sync needed: True
Output Sync needed: False
SC shield enabled: False
POR State: INP_DIS_LO
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: False
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL, ROUTABLE
Initial Value: 1
IO Voltage: 0
PORT MAP (
pa_out => SD_PULLUP(0)__PA ,
pad => SD_PULLUP(0)_PAD );
Properties:
{
}
Pin : Name = SD_PULLUP(1)
Attributes:
In Group/Port: True
In Sync Option: SYNC
Out Sync Option: AUTO
Interrupt generated: False
Interrupt mode: NONE
Drive mode: RES_PULL_UP
VTrip: CMOS
Slew: FAST
Input Sync needed: True
Output Sync needed: False
SC shield enabled: False
POR State: INP_DIS_LO
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: False
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL, ROUTABLE
Initial Value: 1
IO Voltage: 0
PORT MAP (
pa_out => SD_PULLUP(1)__PA ,
pad => SD_PULLUP(1)_PAD );
Properties:
{
}
Pin : Name = SD_PULLUP(2)
Attributes:
In Group/Port: True
In Sync Option: SYNC
Out Sync Option: AUTO
Interrupt generated: False
Interrupt mode: NONE
Drive mode: RES_PULL_UP
VTrip: CMOS
Slew: FAST
Input Sync needed: True
Output Sync needed: False
SC shield enabled: False
POR State: INP_DIS_LO
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: False
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL, ROUTABLE
Initial Value: 1
IO Voltage: 0
PORT MAP (
pa_out => SD_PULLUP(2)__PA ,
pad => SD_PULLUP(2)_PAD );
Properties:
{
}
Pin : Name = SD_PULLUP(3)
Attributes:
In Group/Port: True
In Sync Option: SYNC
Out Sync Option: AUTO
Interrupt generated: False
Interrupt mode: NONE
Drive mode: RES_PULL_UP
VTrip: CMOS
Slew: FAST
Input Sync needed: True
Output Sync needed: False
SC shield enabled: False
POR State: INP_DIS_LO
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: False
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL, ROUTABLE
Initial Value: 1
IO Voltage: 0
PORT MAP (
pa_out => SD_PULLUP(3)__PA ,
pad => SD_PULLUP(3)_PAD );
Properties:
{
}
Pin : Name = LED(0)
Attributes:
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: RES_PULL_UP
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: False
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 1
IO Voltage: 0
PORT MAP (
pa_out => LED(0)__PA ,
pad => LED(0)_PAD );
Properties:
{
}
Pin : Name = LED(1)
Attributes:
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: RES_PULL_UP
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: False
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 1
IO Voltage: 0
PORT MAP (
pa_out => LED(1)__PA ,
pad => LED(1)_PAD );
Properties:
{
}
Pin : Name = TERM_EN(0)
Attributes:
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 0
PORT MAP (
pa_out => TERM_EN(0)__PA ,
pad => TERM_EN(0)_PAD );
Properties:
{
}
Pin : Name = BOOTLDR(0)
Attributes:
In Group/Port: True
In Sync Option: SYNC
Out Sync Option: AUTO
Interrupt generated: False
Interrupt mode: NONE
Drive mode: RES_PULL_UP
VTrip: CMOS
Slew: FAST
Input Sync needed: True
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL, ROUTABLE
Initial Value: 1
IO Voltage: 0
PORT MAP (
pa_out => BOOTLDR(0)__PA ,
pad => BOOTLDR(0)_PAD );
Properties:
{
}
Pin : Name = SPI_PULLUP(0)
Attributes:
In Group/Port: True
In Sync Option: SYNC
Out Sync Option: AUTO
Interrupt generated: False
Interrupt mode: NONE
Drive mode: RES_PULL_UP
VTrip: CMOS
Slew: FAST
Input Sync needed: True
Output Sync needed: False
SC shield enabled: False
POR State: INP_DIS_LO
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: False
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL, ROUTABLE
Initial Value: 1
IO Voltage: 0
PORT MAP (
pa_out => SPI_PULLUP(0)__PA ,
pad => SPI_PULLUP(0)_PAD );
Properties:
{
}
Pin : Name = SPI_PULLUP(1)
Attributes:
In Group/Port: True
In Sync Option: SYNC
Out Sync Option: AUTO
Interrupt generated: False
Interrupt mode: NONE
Drive mode: RES_PULL_UP
VTrip: CMOS
Slew: FAST
Input Sync needed: True
Output Sync needed: False
SC shield enabled: False
POR State: INP_DIS_LO
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: False
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL, ROUTABLE
Initial Value: 1
IO Voltage: 0
PORT MAP (
pa_out => SPI_PULLUP(1)__PA ,
pad => SPI_PULLUP(1)_PAD );
Properties:
{
}
Pin : Name = SPI_PULLUP(2)
Attributes:
In Group/Port: True
In Sync Option: SYNC
Out Sync Option: AUTO
Interrupt generated: False
Interrupt mode: NONE
Drive mode: RES_PULL_UP
VTrip: CMOS
Slew: FAST
Input Sync needed: True
Output Sync needed: False
SC shield enabled: False
POR State: INP_DIS_LO
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: False
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL, ROUTABLE
Initial Value: 1
IO Voltage: 0
PORT MAP (
pa_out => SPI_PULLUP(2)__PA ,
pad => SPI_PULLUP(2)_PAD );
Properties:
{
}
Pin : Name = SPI_PULLUP(3)
Attributes:
In Group/Port: True
In Sync Option: SYNC
Out Sync Option: AUTO
Interrupt generated: False
Interrupt mode: NONE
Drive mode: RES_PULL_UP
VTrip: CMOS
Slew: FAST
Input Sync needed: True
Output Sync needed: False
SC shield enabled: False
POR State: INP_DIS_LO
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: False
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL, ROUTABLE
Initial Value: 1
IO Voltage: 0
PORT MAP (
pa_out => SPI_PULLUP(3)__PA ,
pad => SPI_PULLUP(3)_PAD );
Properties:
{
}
Pin : Name = SPI_PULLUP_1(0)
Attributes:
In Group/Port: True
In Sync Option: SYNC
Out Sync Option: AUTO
Interrupt generated: False
Interrupt mode: NONE
Drive mode: RES_PULL_UP
VTrip: CMOS
Slew: FAST
Input Sync needed: True
Output Sync needed: False
SC shield enabled: False
POR State: INP_DIS_LO
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: False
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL, ROUTABLE
Initial Value: 1
IO Voltage: 0
PORT MAP (
pa_out => SPI_PULLUP_1(0)__PA ,
pad => SPI_PULLUP_1(0)_PAD );
Properties:
{
}
Pin : Name = SPI_PULLUP_1(1)
Attributes:
In Group/Port: True
In Sync Option: SYNC
Out Sync Option: AUTO
Interrupt generated: False
Interrupt mode: NONE
Drive mode: RES_PULL_UP
VTrip: CMOS
Slew: FAST
Input Sync needed: True
Output Sync needed: False
SC shield enabled: False
POR State: INP_DIS_LO
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: False
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL, ROUTABLE
Initial Value: 1
IO Voltage: 0
PORT MAP (
pa_out => SPI_PULLUP_1(1)__PA ,
pad => SPI_PULLUP_1(1)_PAD );
Properties:
{
}
</CYPRESSTAG>
<CYPRESSTAG name="Macrocell listing" icon="FILE_RPT_EQUATION">
</CYPRESSTAG>
<CYPRESSTAG name="Datapath listing">
</CYPRESSTAG>
<CYPRESSTAG name="Status register listing">
</CYPRESSTAG>
<CYPRESSTAG name="StatusI register listing">
</CYPRESSTAG>
<CYPRESSTAG name="Sync listing">
</CYPRESSTAG>
<CYPRESSTAG name="Control register listing">
</CYPRESSTAG>
<CYPRESSTAG name="Count7 listing">
</CYPRESSTAG>
<CYPRESSTAG name="DRQ listing">
</CYPRESSTAG>
<CYPRESSTAG name="Interrupt listing">
------------------------------------------------------------
Interrupt listing
------------------------------------------------------------
interrupt: Name =\USBFS:ep_0\
PORT MAP (
interrupt => \USBFS:ept_int_0\ );
Properties:
{
int_type = "10"
is_nmi = 0
}
interrupt: Name =\USBFS:bus_reset\
PORT MAP (
interrupt => \USBFS:Net_81\ );
Properties:
{
int_type = "10"
is_nmi = 0
}
interrupt: Name =\USBFS:arb_int\
PORT MAP (
interrupt => \USBFS:Net_79\ );
Properties:
{
int_type = "10"
is_nmi = 0
}
interrupt: Name =\USBFS:ep_2\
PORT MAP (
interrupt => \USBFS:ept_int_2\ );
Properties:
{
int_type = "10"
is_nmi = 0
}
interrupt: Name =\USBFS:ep_1\
PORT MAP (
interrupt => \USBFS:ept_int_1\ );
Properties:
{
int_type = "10"
is_nmi = 0
}
interrupt: Name =\USBFS:dp_int\
PORT MAP (
interrupt => \USBFS:Net_1010\ );
Properties:
{
int_type = "10"
is_nmi = 0
}
interrupt: Name =\USBFS:sof_int\
PORT MAP (
interrupt => Net_40 );
Properties:
{
int_type = "10"
is_nmi = 0
}
</CYPRESSTAG>
</CYPRESSTAG>
<CYPRESSTAG name="Technology mapping summary" expanded>
------------------------------------------------------------
Technology mapping summary
------------------------------------------------------------
Resource Type : Used : Free : Max : % Used
============================================================
Digital Clocks : 0 : 8 : 8 : 0.00 %
Analog Clocks : 0 : 4 : 4 : 0.00 %
CapSense Buffers : 0 : 2 : 2 : 0.00 %
Interrupts : 7 : 25 : 32 : 21.88 %
IO : 35 : 37 : 72 : 48.61 %
Segment LCD : 0 : 1 : 1 : 0.00 %
I2C : 0 : 1 : 1 : 0.00 %
USB : 1 : 0 : 1 : 100.00 %
DMA Channels : 0 : 24 : 24 : 0.00 %
Timer : 0 : 4 : 4 : 0.00 %
UDB : : : :
Macrocells : 0 : 192 : 192 : 0.00 %
Unique P-terms : 0 : 384 : 384 : 0.00 %
Total P-terms : 0 : : :
Datapath Cells : 0 : 24 : 24 : 0.00 %
Status Cells : 0 : 24 : 24 : 0.00 %
Control Cells : 0 : 24 : 24 : 0.00 %
Comparator : 0 : 2 : 2 : 0.00 %
Delta-Sigma ADC : 0 : 1 : 1 : 0.00 %
LPF : 0 : 2 : 2 : 0.00 %
SAR ADC : 0 : 1 : 1 : 0.00 %
DAC : : : :
VIDAC : 0 : 1 : 1 : 0.00 %
</CYPRESSTAG>
Technology Mapping: Elapsed time ==> 0s.073ms
Tech Mapping phase: Elapsed time ==> 0s.130ms
</CYPRESSTAG>
<CYPRESSTAG name="Analog Placement">
Initial Analog Placement Results:
IO_0@[IOP=(0)][IoId=(0)] : BOOTLDR(0) (fixed)
IO_2@[IOP=(12)][IoId=(2)] : LED(0) (fixed)
IO_3@[IOP=(12)][IoId=(3)] : LED(1) (fixed)
IO_2@[IOP=(6)][IoId=(2)] : SCSI_Out(0) (fixed)
IO_6@[IOP=(4)][IoId=(6)] : SCSI_Out(1) (fixed)
IO_7@[IOP=(0)][IoId=(7)] : SCSI_Out(2) (fixed)
IO_5@[IOP=(0)][IoId=(5)] : SCSI_Out(3) (fixed)
IO_3@[IOP=(0)][IoId=(3)] : SCSI_Out(4) (fixed)
IO_1@[IOP=(0)][IoId=(1)] : SCSI_Out(5) (fixed)
IO_1@[IOP=(4)][IoId=(1)] : SCSI_Out(6) (fixed)
IO_0@[IOP=(4)][IoId=(0)] : SCSI_Out(7) (fixed)
IO_7@[IOP=(6)][IoId=(7)] : SCSI_Out_DBx(0) (fixed)
IO_5@[IOP=(6)][IoId=(5)] : SCSI_Out_DBx(1) (fixed)
IO_5@[IOP=(12)][IoId=(5)] : SCSI_Out_DBx(2) (fixed)
IO_7@[IOP=(2)][IoId=(7)] : SCSI_Out_DBx(3) (fixed)
IO_5@[IOP=(2)][IoId=(5)] : SCSI_Out_DBx(4) (fixed)
IO_3@[IOP=(2)][IoId=(3)] : SCSI_Out_DBx(5) (fixed)
IO_1@[IOP=(2)][IoId=(1)] : SCSI_Out_DBx(6) (fixed)
IO_5@[IOP=(15)][IoId=(5)] : SCSI_Out_DBx(7) (fixed)
IO_0@[IOP=(3)][IoId=(0)] : SD_PULLUP(0) (fixed)
IO_1@[IOP=(3)][IoId=(1)] : SD_PULLUP(1) (fixed)
IO_2@[IOP=(3)][IoId=(2)] : SD_PULLUP(2) (fixed)
IO_3@[IOP=(3)][IoId=(3)] : SD_PULLUP(3) (fixed)
IO_4@[IOP=(3)][IoId=(4)] : SPI_PULLUP(0) (fixed)
IO_5@[IOP=(3)][IoId=(5)] : SPI_PULLUP(1) (fixed)
IO_6@[IOP=(3)][IoId=(6)] : SPI_PULLUP(2) (fixed)
IO_7@[IOP=(3)][IoId=(7)] : SPI_PULLUP(3) (fixed)
IO_0@[IOP=(12)][IoId=(0)] : SPI_PULLUP_1(0) (fixed)
IO_1@[IOP=(12)][IoId=(1)] : SPI_PULLUP_1(1) (fixed)
IO_3@[IOP=(15)][IoId=(3)] : TERM_EN(0) (fixed)
IO_7@[IOP=(15)][IoId=(7)] : \USBFS:Dm(0)\ (fixed)
IO_6@[IOP=(15)][IoId=(6)] : \USBFS:Dp(0)\ (fixed)
USB[0]@[FFB(USB,0)] : \USBFS:USB\
Analog Placement phase: Elapsed time ==> 0s.053ms
</CYPRESSTAG>
<CYPRESSTAG name="Analog Routing">
Analog Routing phase: Elapsed time ==> 0s.000ms
</CYPRESSTAG>
<CYPRESSTAG name="Analog Code Generation">
============ Analog Final Answer Routes ============
Dump of CyAnalogRoutingResultsDB
Map of net to items {
}
Map of item to net {
}
Mux Info {
}
Dump of CyP35AnalogRoutingResultsDB
IsVddaHalfUsedForComp = False
IsVddaHalfUsedForSar0 = False
IsVddaHalfUsedForSar1 = False
Analog Code Generation phase: Elapsed time ==> 0s.328ms
</CYPRESSTAG>
<CYPRESSTAG name="Digital Placement">
<CYPRESSTAG name="Detailed placement messages">
I2659: No Constrained paths were found. The placer will run in non-timing driven mode.
I2076: Total run-time: 0.6 sec.
</CYPRESSTAG>
<CYPRESSTAG name="PLD Packing">
<CYPRESSTAG name="PLD Packing Summary">
No PLDs were packed.
</CYPRESSTAG>
PLD Packing: Elapsed time ==> 0s.000ms
</CYPRESSTAG>
<CYPRESSTAG name="Partitioning">
<CYPRESSTAG name="Initial Partitioning Summary">
Initial Partitioning Summary not displayed at this verbose level.</CYPRESSTAG>
<CYPRESSTAG name="Final Partitioning Summary">
Final Partitioning Summary not displayed at this verbose level.</CYPRESSTAG>
Partitioning: Elapsed time ==> 0s.028ms
</CYPRESSTAG>
<CYPRESSTAG name="Final Placement Summary">
------------------------------------------------------------
Final Placement Summary
------------------------------------------------------------
Resource Type : Count : Avg Inputs : Avg Outputs
========================================================
UDB : 0 : 0.00 : 0.00
<CYPRESSTAG name="Final Placement Details">
<CYPRESSTAG name="Component Details">
------------------------------------------------------------
Component Placement Details
------------------------------------------------------------
UDB [UDB=(0,0)] is empty.
UDB [UDB=(0,1)] is empty.
UDB [UDB=(0,2)] is empty.
UDB [UDB=(0,3)] is empty.
UDB [UDB=(0,4)] is empty.
UDB [UDB=(0,5)] is empty.
UDB [UDB=(1,0)] is empty.
UDB [UDB=(1,1)] is empty.
UDB [UDB=(1,2)] is empty.
UDB [UDB=(1,3)] is empty.
UDB [UDB=(1,4)] is empty.
UDB [UDB=(1,5)] is empty.
UDB [UDB=(2,0)] is empty.
UDB [UDB=(2,1)] is empty.
UDB [UDB=(2,2)] is empty.
UDB [UDB=(2,3)] is empty.
UDB [UDB=(2,4)] is empty.
UDB [UDB=(2,5)] is empty.
UDB [UDB=(3,0)] is empty.
UDB [UDB=(3,1)] is empty.
UDB [UDB=(3,2)] is empty.
UDB [UDB=(3,3)] is empty.
UDB [UDB=(3,4)] is empty.
UDB [UDB=(3,5)] is empty.
Intr container @ [IntrContainer=(0)]:
Intr@ [IntrContainer=(0)][IntrId=(0)]
interrupt: Name =\USBFS:ep_1\
PORT MAP (
interrupt => \USBFS:ept_int_1\ );
Properties:
{
int_type = "10"
is_nmi = 0
}
Intr@ [IntrContainer=(0)][IntrId=(1)]
interrupt: Name =\USBFS:ep_2\
PORT MAP (
interrupt => \USBFS:ept_int_2\ );
Properties:
{
int_type = "10"
is_nmi = 0
}
Intr@ [IntrContainer=(0)][IntrId=(12)]
interrupt: Name =\USBFS:dp_int\
PORT MAP (
interrupt => \USBFS:Net_1010\ );
Properties:
{
int_type = "10"
is_nmi = 0
}
Intr@ [IntrContainer=(0)][IntrId=(21)]
interrupt: Name =\USBFS:sof_int\
PORT MAP (
interrupt => Net_40 );
Properties:
{
int_type = "10"
is_nmi = 0
}
Intr@ [IntrContainer=(0)][IntrId=(22)]
interrupt: Name =\USBFS:arb_int\
PORT MAP (
interrupt => \USBFS:Net_79\ );
Properties:
{
int_type = "10"
is_nmi = 0
}
Intr@ [IntrContainer=(0)][IntrId=(23)]
interrupt: Name =\USBFS:bus_reset\
PORT MAP (
interrupt => \USBFS:Net_81\ );
Properties:
{
int_type = "10"
is_nmi = 0
}
Intr@ [IntrContainer=(0)][IntrId=(24)]
interrupt: Name =\USBFS:ep_0\
PORT MAP (
interrupt => \USBFS:ept_int_0\ );
Properties:
{
int_type = "10"
is_nmi = 0
}
Drq container @ [DrqContainer=(0)]: empty
Port 0 contains the following IO cells:
[IoId=0]:
Pin : Name = BOOTLDR(0)
Attributes:
In Group/Port: True
In Sync Option: SYNC
Out Sync Option: AUTO
Interrupt generated: False
Interrupt mode: NONE
Drive mode: RES_PULL_UP
VTrip: CMOS
Slew: FAST
Input Sync needed: True
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL, ROUTABLE
Initial Value: 1
IO Voltage: 0
PORT MAP (
pa_out => BOOTLDR(0)__PA ,
pad => BOOTLDR(0)_PAD );
Properties:
{
}
[IoId=1]:
Pin : Name = SCSI_Out(5)
Attributes:
Alias: CD
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out(5)__PA ,
pad => SCSI_Out(5)_PAD );
Properties:
{
}
[IoId=3]:
Pin : Name = SCSI_Out(4)
Attributes:
Alias: SEL
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out(4)__PA ,
pad => SCSI_Out(4)_PAD );
Properties:
{
}
[IoId=5]:
Pin : Name = SCSI_Out(3)
Attributes:
Alias: MSG
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out(3)__PA ,
pad => SCSI_Out(3)_PAD );
Properties:
{
}
[IoId=7]:
Pin : Name = SCSI_Out(2)
Attributes:
Alias: RST
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out(2)__PA ,
pad => SCSI_Out(2)_PAD );
Properties:
{
}
Port 1 contains the following IO cells:
Port 2 contains the following IO cells:
[IoId=1]:
Pin : Name = SCSI_Out_DBx(6)
Attributes:
Alias: DB6
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out_DBx(6)__PA ,
pad => SCSI_Out_DBx(6)_PAD );
Properties:
{
}
[IoId=3]:
Pin : Name = SCSI_Out_DBx(5)
Attributes:
Alias: DB5
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out_DBx(5)__PA ,
pad => SCSI_Out_DBx(5)_PAD );
Properties:
{
}
[IoId=5]:
Pin : Name = SCSI_Out_DBx(4)
Attributes:
Alias: DB4
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out_DBx(4)__PA ,
pad => SCSI_Out_DBx(4)_PAD );
Properties:
{
}
[IoId=7]:
Pin : Name = SCSI_Out_DBx(3)
Attributes:
Alias: DB3
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out_DBx(3)__PA ,
pad => SCSI_Out_DBx(3)_PAD );
Properties:
{
}
Port 3 contains the following IO cells:
[IoId=0]:
Pin : Name = SD_PULLUP(0)
Attributes:
In Group/Port: True
In Sync Option: SYNC
Out Sync Option: AUTO
Interrupt generated: False
Interrupt mode: NONE
Drive mode: RES_PULL_UP
VTrip: CMOS
Slew: FAST
Input Sync needed: True
Output Sync needed: False
SC shield enabled: False
POR State: INP_DIS_LO
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: False
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL, ROUTABLE
Initial Value: 1
IO Voltage: 0
PORT MAP (
pa_out => SD_PULLUP(0)__PA ,
pad => SD_PULLUP(0)_PAD );
Properties:
{
}
[IoId=1]:
Pin : Name = SD_PULLUP(1)
Attributes:
In Group/Port: True
In Sync Option: SYNC
Out Sync Option: AUTO
Interrupt generated: False
Interrupt mode: NONE
Drive mode: RES_PULL_UP
VTrip: CMOS
Slew: FAST
Input Sync needed: True
Output Sync needed: False
SC shield enabled: False
POR State: INP_DIS_LO
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: False
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL, ROUTABLE
Initial Value: 1
IO Voltage: 0
PORT MAP (
pa_out => SD_PULLUP(1)__PA ,
pad => SD_PULLUP(1)_PAD );
Properties:
{
}
[IoId=2]:
Pin : Name = SD_PULLUP(2)
Attributes:
In Group/Port: True
In Sync Option: SYNC
Out Sync Option: AUTO
Interrupt generated: False
Interrupt mode: NONE
Drive mode: RES_PULL_UP
VTrip: CMOS
Slew: FAST
Input Sync needed: True
Output Sync needed: False
SC shield enabled: False
POR State: INP_DIS_LO
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: False
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL, ROUTABLE
Initial Value: 1
IO Voltage: 0
PORT MAP (
pa_out => SD_PULLUP(2)__PA ,
pad => SD_PULLUP(2)_PAD );
Properties:
{
}
[IoId=3]:
Pin : Name = SD_PULLUP(3)
Attributes:
In Group/Port: True
In Sync Option: SYNC
Out Sync Option: AUTO
Interrupt generated: False
Interrupt mode: NONE
Drive mode: RES_PULL_UP
VTrip: CMOS
Slew: FAST
Input Sync needed: True
Output Sync needed: False
SC shield enabled: False
POR State: INP_DIS_LO
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: False
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL, ROUTABLE
Initial Value: 1
IO Voltage: 0
PORT MAP (
pa_out => SD_PULLUP(3)__PA ,
pad => SD_PULLUP(3)_PAD );
Properties:
{
}
[IoId=4]:
Pin : Name = SPI_PULLUP(0)
Attributes:
In Group/Port: True
In Sync Option: SYNC
Out Sync Option: AUTO
Interrupt generated: False
Interrupt mode: NONE
Drive mode: RES_PULL_UP
VTrip: CMOS
Slew: FAST
Input Sync needed: True
Output Sync needed: False
SC shield enabled: False
POR State: INP_DIS_LO
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: False
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL, ROUTABLE
Initial Value: 1
IO Voltage: 0
PORT MAP (
pa_out => SPI_PULLUP(0)__PA ,
pad => SPI_PULLUP(0)_PAD );
Properties:
{
}
[IoId=5]:
Pin : Name = SPI_PULLUP(1)
Attributes:
In Group/Port: True
In Sync Option: SYNC
Out Sync Option: AUTO
Interrupt generated: False
Interrupt mode: NONE
Drive mode: RES_PULL_UP
VTrip: CMOS
Slew: FAST
Input Sync needed: True
Output Sync needed: False
SC shield enabled: False
POR State: INP_DIS_LO
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: False
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL, ROUTABLE
Initial Value: 1
IO Voltage: 0
PORT MAP (
pa_out => SPI_PULLUP(1)__PA ,
pad => SPI_PULLUP(1)_PAD );
Properties:
{
}
[IoId=6]:
Pin : Name = SPI_PULLUP(2)
Attributes:
In Group/Port: True
In Sync Option: SYNC
Out Sync Option: AUTO
Interrupt generated: False
Interrupt mode: NONE
Drive mode: RES_PULL_UP
VTrip: CMOS
Slew: FAST
Input Sync needed: True
Output Sync needed: False
SC shield enabled: False
POR State: INP_DIS_LO
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: False
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL, ROUTABLE
Initial Value: 1
IO Voltage: 0
PORT MAP (
pa_out => SPI_PULLUP(2)__PA ,
pad => SPI_PULLUP(2)_PAD );
Properties:
{
}
[IoId=7]:
Pin : Name = SPI_PULLUP(3)
Attributes:
In Group/Port: True
In Sync Option: SYNC
Out Sync Option: AUTO
Interrupt generated: False
Interrupt mode: NONE
Drive mode: RES_PULL_UP
VTrip: CMOS
Slew: FAST
Input Sync needed: True
Output Sync needed: False
SC shield enabled: False
POR State: INP_DIS_LO
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: False
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL, ROUTABLE
Initial Value: 1
IO Voltage: 0
PORT MAP (
pa_out => SPI_PULLUP(3)__PA ,
pad => SPI_PULLUP(3)_PAD );
Properties:
{
}
Port 4 contains the following IO cells:
[IoId=0]:
Pin : Name = SCSI_Out(7)
Attributes:
Alias: IO_raw
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out(7)__PA ,
pad => SCSI_Out(7)_PAD );
Properties:
{
}
[IoId=1]:
Pin : Name = SCSI_Out(6)
Attributes:
Alias: REQ
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out(6)__PA ,
pad => SCSI_Out(6)_PAD );
Properties:
{
}
[IoId=6]:
Pin : Name = SCSI_Out(1)
Attributes:
Alias: BSY
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out(1)__PA ,
pad => SCSI_Out(1)_PAD );
Properties:
{
}
Port 5 contains the following IO cells:
Port 6 contains the following IO cells:
[IoId=2]:
Pin : Name = SCSI_Out(0)
Attributes:
Alias: DBP_raw
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out(0)__PA ,
pad => SCSI_Out(0)_PAD );
Properties:
{
}
[IoId=5]:
Pin : Name = SCSI_Out_DBx(1)
Attributes:
Alias: DB1
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out_DBx(1)__PA ,
pad => SCSI_Out_DBx(1)_PAD );
Properties:
{
}
[IoId=7]:
Pin : Name = SCSI_Out_DBx(0)
Attributes:
Alias: DB0
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out_DBx(0)__PA ,
pad => SCSI_Out_DBx(0)_PAD );
Properties:
{
}
Port 12 contains the following IO cells:
[IoId=0]:
Pin : Name = SPI_PULLUP_1(0)
Attributes:
In Group/Port: True
In Sync Option: SYNC
Out Sync Option: AUTO
Interrupt generated: False
Interrupt mode: NONE
Drive mode: RES_PULL_UP
VTrip: CMOS
Slew: FAST
Input Sync needed: True
Output Sync needed: False
SC shield enabled: False
POR State: INP_DIS_LO
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: False
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL, ROUTABLE
Initial Value: 1
IO Voltage: 0
PORT MAP (
pa_out => SPI_PULLUP_1(0)__PA ,
pad => SPI_PULLUP_1(0)_PAD );
Properties:
{
}
[IoId=1]:
Pin : Name = SPI_PULLUP_1(1)
Attributes:
In Group/Port: True
In Sync Option: SYNC
Out Sync Option: AUTO
Interrupt generated: False
Interrupt mode: NONE
Drive mode: RES_PULL_UP
VTrip: CMOS
Slew: FAST
Input Sync needed: True
Output Sync needed: False
SC shield enabled: False
POR State: INP_DIS_LO
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: False
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL, ROUTABLE
Initial Value: 1
IO Voltage: 0
PORT MAP (
pa_out => SPI_PULLUP_1(1)__PA ,
pad => SPI_PULLUP_1(1)_PAD );
Properties:
{
}
[IoId=2]:
Pin : Name = LED(0)
Attributes:
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: RES_PULL_UP
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: False
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 1
IO Voltage: 0
PORT MAP (
pa_out => LED(0)__PA ,
pad => LED(0)_PAD );
Properties:
{
}
[IoId=3]:
Pin : Name = LED(1)
Attributes:
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: RES_PULL_UP
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: False
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 1
IO Voltage: 0
PORT MAP (
pa_out => LED(1)__PA ,
pad => LED(1)_PAD );
Properties:
{
}
[IoId=5]:
Pin : Name = SCSI_Out_DBx(2)
Attributes:
Alias: DB2
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out_DBx(2)__PA ,
pad => SCSI_Out_DBx(2)_PAD );
Properties:
{
}
Port 15 generates interrupt for logical port:
logicalport: Name =\USBFS:Dp\
PORT MAP (
in_clock_en => one ,
in_reset => zero ,
out_clock_en => one ,
out_reset => zero ,
interrupt => \USBFS:Net_1010\ ,
in_clock => ClockBlock_BUS_CLK );
Properties:
{
drive_mode = "000"
ibuf_enabled = "0"
id = "f9248435-5d3e-4e4d-bbae-bdae8795c3dd/618a72fc-5ddd-4df5-958f-a3d55102db42"
init_dr_st = "0"
input_buffer_sel = "00"
input_clk_en = 0
input_sync = "1"
input_sync_mode = "0"
intr_mode = "10"
invert_in_clock = 0
invert_in_clock_en = 0
invert_in_reset = 0
invert_out_clock = 0
invert_out_clock_en = 0
invert_out_reset = 0
io_voltage = ""
layout_mode = "CONTIGUOUS"
oe_conn = "0"
oe_reset = 0
oe_sync = "0"
output_clk_en = 0
output_clock_mode = "0"
output_conn = "0"
output_mode = "0"
output_reset = 0
output_sync = "0"
ovt_hyst_trim = "0"
ovt_needed = "0"
ovt_slew_control = "00"
pa_in_clock = -1
pa_in_clock_en = -1
pa_in_reset = -1
pa_out_clock = -1
pa_out_clock_en = -1
pa_out_reset = -1
pin_aliases = ""
pin_mode = "I"
por_state = 4
port_alias_group = ""
port_alias_required = 0
sio_group_cnt = 0
sio_hifreq = ""
sio_hyst = "1"
sio_ibuf = "00000000"
sio_info = "00"
sio_obuf = "00000000"
sio_refsel = "00000000"
sio_vohsel = ""
sio_vtrip = "00000000"
slew_rate = "0"
spanning = 0
sw_only = 0
use_annotation = "0"
vtrip = "00"
width = 1
}
and contains the following IO cells:
[IoId=3]:
Pin : Name = TERM_EN(0)
Attributes:
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 0
PORT MAP (
pa_out => TERM_EN(0)__PA ,
pad => TERM_EN(0)_PAD );
Properties:
{
}
[IoId=5]:
Pin : Name = SCSI_Out_DBx(7)
Attributes:
Alias: DB7
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: NOSYNC
Interrupt generated: False
Interrupt mode: NONE
Drive mode: CMOS_OUT
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: False
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: DIGITAL
Initial Value: 0
IO Voltage: 5
PORT MAP (
pa_out => SCSI_Out_DBx(7)__PA ,
pad => SCSI_Out_DBx(7)_PAD );
Properties:
{
}
[IoId=6]:
Pin : Name = \USBFS:Dp(0)\
Attributes:
In Group/Port: True
In Sync Option: SYNC
Out Sync Option: AUTO
Interrupt generated: True
Interrupt mode: FALLING
Drive mode: HI_Z_ANALOG
VTrip: CMOS
Slew: FAST
Input Sync needed: True
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: False
Is OE Registered: False
Uses Analog: True
Can contain Digital: True
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: USB_D_PLUS
Initial Value: 0
IO Voltage: 0
PORT MAP (
pa_out => \USBFS:Dp(0)\__PA ,
analog_term => \USBFS:Net_1000\ ,
pad => \USBFS:Dp(0)_PAD\ );
Properties:
{
}
[IoId=7]:
Pin : Name = \USBFS:Dm(0)\
Attributes:
In Group/Port: True
In Sync Option: AUTO
Out Sync Option: AUTO
Interrupt generated: False
Interrupt mode: NONE
Drive mode: HI_Z_ANALOG
VTrip: EITHER
Slew: FAST
Input Sync needed: False
Output Sync needed: False
SC shield enabled: False
POR State: ANY
LCD Mode: COMMON
Register Mode: RegComb
CaSense Mode: NEITHER
Treat as pin: True
Is OE Registered: False
Uses Analog: True
Can contain Digital: False
Is SIO: False
SIO Output Buf: NONREGULATED
SIO Input Buf: SINGLE_ENDED
SIO HiFreq: LOW
SIO Hyst: DISABLED
SIO Vtrip: MULTIPLIER_0_5
SIO Multiplier Index: 0
SIO RefSel: VCC_IO
Required Capabilities: USB_D_MINUS
Initial Value: 0
IO Voltage: 0
PORT MAP (
pa_out => \USBFS:Dm(0)\__PA ,
analog_term => \USBFS:Net_597\ ,
pad => \USBFS:Dm(0)_PAD\ );
Properties:
{
}
ARM group 0: empty
Cache group 0: empty
CapSense group 0: empty
Clock group 0:
Clock Block @ F(Clock,0):
clockblockcell: Name =ClockBlock
PORT MAP (
imo => ClockBlock_IMO ,
pllout => ClockBlock_PLL_OUT ,
ilo => ClockBlock_ILO ,
clk_100k => ClockBlock_100k ,
clk_1k => ClockBlock_1k ,
clk_32k => ClockBlock_32k ,
xtal => ClockBlock_XTAL ,
clk_32k_xtal => ClockBlock_XTAL_32KHZ ,
clk_sync => ClockBlock_MASTER_CLK ,
clk_bus_glb => ClockBlock_BUS_CLK ,
clk_bus => ClockBlock_BUS_CLK_local );
Properties:
{
}
Comparator group 0: empty
DSM group 0: empty
Decimator group 0: empty
EMIF group 0: empty
I2C group 0: empty
LCD group 0: empty
LVD group 0: empty
PICU group 0: empty
PM group 0: empty
SPC group 0: empty
Timer group 0: empty
USB group 0:
USB Block @ F(USB,0):
usbcell: Name =\USBFS:USB\
PORT MAP (
dp => \USBFS:Net_1000\ ,
dm => \USBFS:Net_597\ ,
sof_int => Net_40 ,
arb_int => \USBFS:Net_79\ ,
usb_int => \USBFS:Net_81\ ,
ept_int_8 => \USBFS:ept_int_8\ ,
ept_int_7 => \USBFS:ept_int_7\ ,
ept_int_6 => \USBFS:ept_int_6\ ,
ept_int_5 => \USBFS:ept_int_5\ ,
ept_int_4 => \USBFS:ept_int_4\ ,
ept_int_3 => \USBFS:ept_int_3\ ,
ept_int_2 => \USBFS:ept_int_2\ ,
ept_int_1 => \USBFS:ept_int_1\ ,
ept_int_0 => \USBFS:ept_int_0\ ,
ord_int => \USBFS:Net_95\ ,
dma_req_7 => \USBFS:dma_req_7\ ,
dma_req_6 => \USBFS:dma_req_6\ ,
dma_req_5 => \USBFS:dma_req_5\ ,
dma_req_4 => \USBFS:dma_req_4\ ,
dma_req_3 => \USBFS:dma_req_3\ ,
dma_req_2 => \USBFS:dma_req_2\ ,
dma_req_1 => \USBFS:dma_req_1\ ,
dma_req_0 => \USBFS:dma_req_0\ ,
dma_termin => \USBFS:Net_824\ );
Properties:
{
cy_registers = ""
}
VIDAC group 0: empty
CsAbuf group 0: empty
Vref group 0: empty
LPF group 0: empty
SAR group 0: empty
ANAIF group 0: empty
PHUB group 0: empty
</CYPRESSTAG>
<CYPRESSTAG name="Port Configuration Details">
------------------------------------------------------------
Port Configuration report
------------------------------------------------------------
| | | Interrupt | | |
Port | Pin | Fixed | Type | Drive Mode | Name | Connections
-----+-----+-------+-----------+------------------+-----------------+-------------------------
0 | 0 | * | NONE | RES_PULL_UP | BOOTLDR(0) |
| 1 | * | NONE | CMOS_OUT | SCSI_Out(5) |
| 3 | * | NONE | CMOS_OUT | SCSI_Out(4) |
| 5 | * | NONE | CMOS_OUT | SCSI_Out(3) |
| 7 | * | NONE | CMOS_OUT | SCSI_Out(2) |
-----+-----+-------+-----------+------------------+-----------------+-------------------------
2 | 1 | * | NONE | CMOS_OUT | SCSI_Out_DBx(6) |
| 3 | * | NONE | CMOS_OUT | SCSI_Out_DBx(5) |
| 5 | * | NONE | CMOS_OUT | SCSI_Out_DBx(4) |
| 7 | * | NONE | CMOS_OUT | SCSI_Out_DBx(3) |
-----+-----+-------+-----------+------------------+-----------------+-------------------------
3 | 0 | * | NONE | RES_PULL_UP | SD_PULLUP(0) |
| 1 | * | NONE | RES_PULL_UP | SD_PULLUP(1) |
| 2 | * | NONE | RES_PULL_UP | SD_PULLUP(2) |
| 3 | * | NONE | RES_PULL_UP | SD_PULLUP(3) |
| 4 | * | NONE | RES_PULL_UP | SPI_PULLUP(0) |
| 5 | * | NONE | RES_PULL_UP | SPI_PULLUP(1) |
| 6 | * | NONE | RES_PULL_UP | SPI_PULLUP(2) |
| 7 | * | NONE | RES_PULL_UP | SPI_PULLUP(3) |
-----+-----+-------+-----------+------------------+-----------------+-------------------------
4 | 0 | * | NONE | CMOS_OUT | SCSI_Out(7) |
| 1 | * | NONE | CMOS_OUT | SCSI_Out(6) |
| 6 | * | NONE | CMOS_OUT | SCSI_Out(1) |
-----+-----+-------+-----------+------------------+-----------------+-------------------------
6 | 2 | * | NONE | CMOS_OUT | SCSI_Out(0) |
| 5 | * | NONE | CMOS_OUT | SCSI_Out_DBx(1) |
| 7 | * | NONE | CMOS_OUT | SCSI_Out_DBx(0) |
-----+-----+-------+-----------+------------------+-----------------+-------------------------
12 | 0 | * | NONE | RES_PULL_UP | SPI_PULLUP_1(0) |
| 1 | * | NONE | RES_PULL_UP | SPI_PULLUP_1(1) |
| 2 | * | NONE | RES_PULL_UP | LED(0) |
| 3 | * | NONE | RES_PULL_UP | LED(1) |
| 5 | * | NONE | CMOS_OUT | SCSI_Out_DBx(2) |
-----+-----+-------+-----------+------------------+-----------------+-------------------------
15 | 3 | * | NONE | CMOS_OUT | TERM_EN(0) |
| 5 | * | NONE | CMOS_OUT | SCSI_Out_DBx(7) |
| 6 | * | FALLING | HI_Z_ANALOG | \USBFS:Dp(0)\ | Analog(\USBFS:Net_1000\)
| 7 | * | NONE | HI_Z_ANALOG | \USBFS:Dm(0)\ | Analog(\USBFS:Net_597\)
----------------------------------------------------------------------------------------------
</CYPRESSTAG>
</CYPRESSTAG>
</CYPRESSTAG>
Digital component placer commit/Report: Elapsed time ==> 0s.048ms
Digital Placement phase: Elapsed time ==> 0s.964ms
</CYPRESSTAG>
<CYPRESSTAG name="Digital Routing">
"C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\bin/sjrouter.exe" --xml-path "C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\dev\psoc5/psoc5lp/route_arch-rrg.cydata" --vh2-path "USB_Bootloader_r.vh2" --pcf-path "USB_Bootloader.pco" --des-name "USB_Bootloader" --dsf-path "USB_Bootloader.dsf" --sdc-path "USB_Bootloader.sdc" --lib-path "USB_Bootloader_r.lib"
Routing successful.
Digital Routing phase: Elapsed time ==> 1s.346ms
</CYPRESSTAG>
<CYPRESSTAG name="Bitstream Generation">
Bitstream Generation phase: Elapsed time ==> 0s.136ms
</CYPRESSTAG>
<CYPRESSTAG name="Bitstream Verification">
Bitstream Verification phase: Elapsed time ==> 0s.030ms
</CYPRESSTAG>
<CYPRESSTAG name="Static timing analysis">
Timing report is in USB_Bootloader_timing.html.
Static timing analysis phase: Elapsed time ==> 0s.229ms
</CYPRESSTAG>
<CYPRESSTAG name="Data reporting">
Data reporting phase: Elapsed time ==> 0s.000ms
</CYPRESSTAG>
<CYPRESSTAG name="Database update...">
Design database save phase: Elapsed time ==> 0s.159ms
</CYPRESSTAG>
cydsfit: Elapsed time ==> 3s.406ms
</CYPRESSTAG>
Fitter phase: Elapsed time ==> 3s.407ms
API generation phase: Elapsed time ==> 1s.335ms
Dependency generation phase: Elapsed time ==> 0s.009ms
Cleanup phase: Elapsed time ==> 0s.000ms
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