mirror of
https://github.com/fhgwright/SCSI2SD.git
synced 2024-06-11 05:29:27 +00:00
161 lines
6.8 KiB
Plaintext
161 lines
6.8 KiB
Plaintext
/*###ICF### Section handled by ICF editor, don't touch! ****/
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/*-Editor annotation file-*/
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/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
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/*-Specials-*/
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define symbol __ICFEDIT_intvec_start__ = 0x00000000;
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_ROM_start__ = 0x0;
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define symbol __ICFEDIT_region_ROM_end__ = 131072 - 1;
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define symbol __ICFEDIT_region_RAM_start__ = 0x20000000 - (32768 / 2);
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define symbol __ICFEDIT_region_RAM_end__ = 0x20000000 + (32768 / 2) - 1;
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/*-Sizes-*/
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define symbol __ICFEDIT_size_cstack__ = 0x1000;
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define symbol __ICFEDIT_size_heap__ = 0x0400;
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/**** End of ICF editor section. ###ICF###*/
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/******** Definitions ********/
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define symbol CY_APPL_LOADABLE = 1;
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define symbol CY_APPL_LOADER = 0;
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define symbol CY_APPL_NUM = 1;
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define symbol CY_APPL_MAX = 1;
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define symbol CY_METADATA_SIZE = 64;
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define symbol CY_CHECKSUM_EXCLUDE_SIZE = 0;
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define symbol CY_EE_IN_BTLDR = 0x00;
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define symbol CY_EE_SIZE = 2048;
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include "cybootloader.icf";
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if (!CY_APPL_LOADABLE) {
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define symbol CYDEV_BTLDR_SIZE = 0;
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}
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define symbol CY_FLASH_SIZE = 131072;
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define symbol CY_APPL_ORIGIN = 0;
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define symbol CY_FLASH_ROW_SIZE = 256;
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define symbol CY_ECC_ROW_SIZE = 32;
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define memory mem with size = 4G;
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define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
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define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
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define block HSTACK {block HEAP, last block CSTACK};
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if (CY_APPL_LOADABLE)
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{
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define block LOADER { readonly section .cybootloader };
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}
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define block APPL with fixed order {readonly section .romvectors, readonly};
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/* The address of the Flash row next after the Bootloader image */
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define symbol CY_BTLDR_END = CYDEV_BTLDR_SIZE +
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((CYDEV_BTLDR_SIZE % CY_FLASH_ROW_SIZE) ?
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(CY_FLASH_ROW_SIZE - (CYDEV_BTLDR_SIZE % CY_FLASH_ROW_SIZE)) : 0);
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/* The start address of Standard/Loader/Loadable#1 image */
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define symbol CY_APPL1_START = CY_APPL_ORIGIN ? CY_APPL_ORIGIN : CY_BTLDR_END;
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/* The number of metadata records located at the end of Flash */
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define symbol CY_METADATA_CNT = (CY_APPL_NUM == 2) ? 2 : ((CY_APPL_LOADER || CY_APPL_LOADABLE) ? 1 : 0);
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/* The application area size measured in rows */
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define symbol CY_APPL_ROW_CNT = ((CY_FLASH_SIZE - CY_APPL1_START) / CY_FLASH_ROW_SIZE) - CY_METADATA_CNT;
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/* The start address of Loadable#2 image if any */
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define symbol CY_APPL2_START = CY_APPL1_START + (CY_APPL_ROW_CNT / 2 + CY_APPL_ROW_CNT % 2) * CY_FLASH_ROW_SIZE;
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/* The current image (Standard/Loader/Loadable) start address */
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define symbol CY_APPL_START = (CY_APPL_NUM == 1) ? CY_APPL1_START : CY_APPL2_START;
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/* The ECC data placement address */
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define exported symbol CY_ECC_OFFSET = (CY_APPL_START / CY_FLASH_ROW_SIZE) * CY_ECC_ROW_SIZE;
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/* The EEPROM offset and size that can be used by current application (Standard/Loader/Loadable) */
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define symbol CY_EE_OFFSET = (CY_APPL_LOADABLE && !CY_EE_IN_BTLDR) ? ((CY_EE_SIZE / CY_APPL_MAX) * (CY_APPL_NUM - 1)) : 0;
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define symbol CY_EE_IN_USE = (CY_APPL_LOADABLE && !CY_EE_IN_BTLDR) ? (CY_EE_SIZE / CY_APPL_MAX) : CY_EE_SIZE;
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/* Define EEPROM region */
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define region EEPROM_region = mem:[from (0x90200000 + CY_EE_OFFSET) size CY_EE_IN_USE];
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/* Define APPL region that will limit application size */
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define region APPL_region = mem:[from CY_APPL_START size CY_APPL_ROW_CNT * CY_FLASH_ROW_SIZE];
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/****** Initializations ******/
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initialize by copy { readwrite };
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do not initialize { section .noinit };
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do not initialize { readwrite section .ramvectors };
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/******** Placements *********/
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if (CY_APPL_LOADABLE)
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{
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".cybootloader" : place at start of ROM_region {block LOADER};
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}
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"APPL" : place at start of APPL_region {block APPL};
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"RAMVEC" : place at start of RAM_region { readwrite section .ramvectors };
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"readwrite" : place in RAM_region { readwrite };
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"HSTACK" : place at end of RAM_region { block HSTACK};
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keep { section .cybootloader,
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section .cyloadermeta,
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section .cyloadablemeta,
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section .cyconfigecc,
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section .cy_checksum_exclude,
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section .cycustnvl,
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section .cywolatch,
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section .cyeeprom,
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section .cyflashprotect,
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section .cymeta };
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".cyloadermeta" : place at address mem : ((CY_APPL_LOADER && !CY_APPL_LOADABLE) ? (CY_FLASH_SIZE - CY_METADATA_SIZE) : 0xF0000000) { readonly section .cyloadermeta };
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if (CY_APPL_LOADABLE)
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{
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".cyloadablemeta" : place at address mem : (CY_FLASH_SIZE - CY_FLASH_ROW_SIZE * (CY_APPL_NUM - 1) - CY_METADATA_SIZE) { readonly section .cyloadablemeta };
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}
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/*******************************************************************************
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* Checksum Exclude Section. See cm0gcc.ld on placement details.
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*******************************************************************************/
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if (CY_APPL_LOADABLE)
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{
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/* Align size to the flash row size */
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define symbol CY_CHECKSUM_EXCLUDE_SIZE_ALIGNED = CY_CHECKSUM_EXCLUDE_SIZE + ((CY_CHECKSUM_EXCLUDE_SIZE % CY_FLASH_ROW_SIZE) ? (CY_FLASH_ROW_SIZE - (CY_CHECKSUM_EXCLUDE_SIZE % CY_FLASH_ROW_SIZE)) : 0);
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if (CY_CHECKSUM_EXCLUDE_SIZE != 0)
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{
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/* General case */
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if ((CY_APPL_NUM == 1) && (CY_APPL_MAX == 2))
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{
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define symbol CY_CHECKSUM_EXCLUDE_START = CY_APPL2_START - CY_CHECKSUM_EXCLUDE_SIZE_ALIGNED;
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}
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else
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{
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define symbol CY_CHECKSUM_EXCLUDE_START = (CY_FLASH_SIZE - CY_FLASH_ROW_SIZE * CY_APPL_MAX) - CY_CHECKSUM_EXCLUDE_SIZE_ALIGNED;
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}
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define symbol CY_CHECKSUM_EXCLUDE_START_ALIGNED = CY_CHECKSUM_EXCLUDE_START + ((CY_CHECKSUM_EXCLUDE_START % CY_FLASH_ROW_SIZE) ? (CY_FLASH_ROW_SIZE - (CY_CHECKSUM_EXCLUDE_START % CY_FLASH_ROW_SIZE)) : 0);
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".cy_checksum_exclude" : place at address mem : (CY_CHECKSUM_EXCLUDE_START_ALIGNED) { readonly section .cy_checksum_exclude };
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} /* (CY_CHECKSUM_EXCLUDE_SIZE_ALIGNED != 0) */
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}
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else
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{
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".cy_checksum_exclude" : place in ROM_region { readonly section .cy_checksum_exclude };
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}
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".cyconfigecc" : place at address mem : (0x80000000 + CY_ECC_OFFSET) { readonly section .cyconfigecc };
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".cycustnvl" : place at address mem : 0x90000000 { readonly section .cycustnvl };
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".cywolatch" : place at address mem : 0x90100000 { readonly section .cywolatch };
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".cyeeprom" : place in EEPROM_region { readonly section .cyeeprom };
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".cyflashprotect" : place at address mem : 0x90400000 { readonly section .cyflashprotect };
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".cymeta" : place at address mem : 0x90500000 { readonly section .cymeta };
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/* EOF */
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