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157 lines
5.2 KiB
ArmAsm
157 lines
5.2 KiB
ArmAsm
;-------------------------------------------------------------------------------
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; FILENAME: CyBootAsmIar.s
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; Version 5.50
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;
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; DESCRIPTION:
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; Assembly routines for IAR Embedded Workbench IDE.
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;
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;-------------------------------------------------------------------------------
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; Copyright 2013-2015, Cypress Semiconductor Corporation. All rights reserved.
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; You may use this file only in accordance with the license, terms, conditions,
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; disclaimers, and limitations in the end user license agreement accompanying
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; the software package with which this file was provided.
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;-------------------------------------------------------------------------------
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SECTION .text:CODE:ROOT(4)
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PUBLIC CyDelayCycles
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PUBLIC CyEnterCriticalSection
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PUBLIC CyExitCriticalSection
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INCLUDE cyfitteriar.inc
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THUMB
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;-------------------------------------------------------------------------------
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; Function Name: CyEnterCriticalSection
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;-------------------------------------------------------------------------------
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;
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; Summary:
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; CyEnterCriticalSection disables interrupts and returns a value indicating
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; whether interrupts were previously enabled.
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;
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; Note Implementation of CyEnterCriticalSection manipulates the IRQ enable bit
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; with interrupts still enabled. The test and set of the interrupt bits is not
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; atomic. Therefore, to avoid a corrupting processor state, it must be the policy
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; that all interrupt routines restore the interrupt enable bits as they were
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; found on entry.
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;
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; Parameters:
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; None
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;
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; Return:
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; uint8
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; Returns 0 if interrupts were previously enabled or 1 if interrupts
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; were previously disabled.
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;
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;-------------------------------------------------------------------------------
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; uint8 CyEnterCriticalSection(void)
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CyEnterCriticalSection:
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MRS r0, PRIMASK ; Save and return interrupt state
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CPSID I ; Disable interrupts
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BX lr
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;-------------------------------------------------------------------------------
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; Function Name: CyExitCriticalSection
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;-------------------------------------------------------------------------------
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;
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; Summary:
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; CyExitCriticalSection re-enables interrupts if they were enabled before
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; CyEnterCriticalSection was called. The argument should be the value returned
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; from CyEnterCriticalSection.
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;
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; Parameters:
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; uint8 savedIntrStatus:
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; Saved interrupt status returned by the CyEnterCriticalSection function.
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;
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; Return:
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; None
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;
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;-------------------------------------------------------------------------------
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; void CyExitCriticalSection(uint8 savedIntrStatus)
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CyExitCriticalSection:
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MSR PRIMASK, r0 ; Restore interrupt state
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BX lr
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;-------------------------------------------------------------------------------
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; Function Name: CyDelayCycles
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;-------------------------------------------------------------------------------
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;
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; Summary:
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; Delays for the specified number of cycles.
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;
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; Parameters:
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; uint32 cycles: number of cycles to delay.
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;
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; Return:
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; None
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;
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;-------------------------------------------------------------------------------
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; void CyDelayCycles(uint32 cycles)
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CyDelayCycles:
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IF CYDEV_INSTRUCT_CACHE_ENABLED == 1
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; cycles bytes
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ADDS r0, r0, #2 ; 1 2 Round to nearest multiple of 4
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LSRS r0, r0, #2 ; 1 2 Divide by 4 and set flags
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BEQ CyDelayCycles_done ; 2 2 Skip if 0
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NOP ; 1 2 Loop alignment padding
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CyDelayCycles_loop:
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SUBS r0, r0, #1 ; 1 2
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MOV r0, r0 ; 1 2 Pad loop to power of two cycles
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BNE CyDelayCycles_loop ; 2 2
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CyDelayCycles_done:
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BX lr ; 3 2
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ELSE
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CMP r0, #20 ; 1 2 If delay is short - jump to cycle
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BLS CyDelayCycles_short ; 1 2
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PUSH {r1} ; 2 2 PUSH r1 to stack
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MOVS r1, #1 ; 1 2
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SUBS r0, r0, #20 ; 1 2 Subtract overhead
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LDR r1,=CYREG_CACHE_CC_CTL; 2 2 Load flash wait cycles value
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LDRB r1, [r1, #0] ; 2 2
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ANDS r1, r1, #0xC0 ; 1 2
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LSRS r1, r1, #6 ; 1 2
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PUSH {r2} ; 1 2 PUSH r2 to stack
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LDR r2, =cy_flash_cycles ; 2 2
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LDRB r1, [r2, r1] ; 2 2
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POP {r2} ; 2 2 POP r2 from stack
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NOP ; 1 2 Alignment padding
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NOP ; 1 2 Alignment padding
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NOP ; 1 2 Alignment padding
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CyDelayCycles_loop:
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SBCS r0, r0, r1 ; 1 2
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BPL CyDelayCycles_loop ; 3 2
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NOP ; 1 2 Loop alignment padding
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NOP ; 1 2 Loop alignment padding
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POP {r1} ; 2 2 POP r1 from stack
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CyDelayCycles_done:
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BX lr ; 3 2
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NOP ; 1 2 Alignment padding
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NOP ; 1 2 Alignment padding
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CyDelayCycles_short:
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SBCS r0, r0, #4 ; 1 2
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BPL CyDelayCycles_short ; 3 2
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BX lr ; 3 2
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NOP ; 1 2 Loop alignment padding
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DATA
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cy_flash_cycles:
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byte_1 DCB 0x0B
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byte_2 DCB 0x05
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byte_3 DCB 0x07
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byte_4 DCB 0x09
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ENDIF
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END
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