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685 lines
22 KiB
C
685 lines
22 KiB
C
/***************************************************************************//**
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* \file CyFlash.c
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* \version 5.50
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*
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* \brief Provides an API for the FLASH/EEPROM.
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*
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* \note This code is endian agnostic.
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*
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* \note Documentation of the API's in this file is located in the System
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* Reference Guide provided with PSoC Creator.
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*
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********************************************************************************
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* \copyright
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* Copyright 2008-2016, Cypress Semiconductor Corporation. All rights reserved.
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* You may use this file only in accordance with the license, terms, conditions,
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* disclaimers, and limitations in the end user license agreement accompanying
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* the software package with which this file was provided.
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*******************************************************************************/
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#include "CyFlash.h"
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/* The number of EEPROM arrays */
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#define CY_FLASH_EEPROM_NUMBER_ARRAYS (1u)
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/*******************************************************************************
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* Holds the die temperature, updated by CySetTemp(). Used for flash writing.
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* The first byte is the sign of the temperature (0 = negative, 1 = positive).
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* The second byte is the magnitude.
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*******************************************************************************/
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uint8 dieTemperature[CY_FLASH_DIE_TEMP_DATA_SIZE];
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#if(CYDEV_ECC_ENABLE == 0)
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static uint8 * rowBuffer = 0;
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#endif /* (CYDEV_ECC_ENABLE == 0) */
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static cystatus CySetTempInt(void);
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static cystatus CyFlashGetSpcAlgorithm(void);
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/*******************************************************************************
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* Function Name: CyFlash_Start
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****************************************************************************//**
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*
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* Enable the Flash.
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*
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*******************************************************************************/
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void CyFlash_Start(void)
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{
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uint8 interruptState;
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interruptState = CyEnterCriticalSection();
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/***************************************************************************
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* Enable SPC clock. This also internally enables the 36MHz IMO, since this
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* is required for the SPC to function.
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***************************************************************************/
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CY_FLASH_PM_ACT_CFG0_REG |= CY_FLASH_PM_ACT_CFG0_EN_CLK_SPC;
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CY_FLASH_PM_ALTACT_CFG0_REG |= CY_FLASH_PM_ALTACT_CFG0_EN_CLK_SPC;
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/***************************************************************************
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* The wake count defines the number of Bus Clock cycles it takes for the
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* flash or eeprom to wake up from a low power mode independent of the chip
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* power mode. Wake up time for these blocks is 5 us.
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* The granularity of this register is 2 Bus Clock cycles, so a value of 0x1E
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* (30d) defines the wake up time as 60 cycles of the Bus Clock.
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* This register needs to be written with a value dependent on the Bus Clock
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* frequency so that the duration of the cycles is equal to or greater than
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* the 5 us delay required.
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***************************************************************************/
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CY_FLASH_SPC_FM_EE_WAKE_CNT_REG = CY_FLASH_SPC_FM_EE_WAKE_CNT_80MHZ;
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/***************************************************************************
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* Enable flash. Active flash macros consume current, but re-enabling a
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* disabled flash macro takes 5us. If the CPU attempts to fetch out of the
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* macro during that time, it will be stalled. This bit allows the flash to
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* be enabled even if the CPU is disabled, which allows a quicker return to
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* code execution.
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***************************************************************************/
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CY_FLASH_PM_ACT_CFG12_REG |= CY_FLASH_PM_ACT_CFG12_EN_FM;
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CY_FLASH_PM_ALTACT_CFG12_REG |= CY_FLASH_PM_ALTACT_CFG12_EN_FM;
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while(0u == (CY_FLASH_SPC_FM_EE_CR_REG & CY_FLASH_EE_EE_AWAKE))
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{
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/* Non-zero status denotes that the EEPROM/Flash is awake & powered. */
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}
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CyExitCriticalSection(interruptState);
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}
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/*******************************************************************************
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* Function Name: CyFlash_Stop
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****************************************************************************//**
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*
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* Disable the Flash.
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*
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* \sideeffect
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* This setting is ignored as long as the CPU is currently running. This will
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* only take effect when the CPU is later disabled.
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*
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*******************************************************************************/
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void CyFlash_Stop(void)
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{
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uint8 interruptState;
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interruptState = CyEnterCriticalSection();
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CY_FLASH_PM_ACT_CFG12_REG &= ((uint8)(~CY_FLASH_PM_ACT_CFG12_EN_FM));
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CY_FLASH_PM_ALTACT_CFG12_REG &= ((uint8)(~CY_FLASH_PM_ALTACT_CFG12_EN_FM));
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CyExitCriticalSection(interruptState);
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}
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/*******************************************************************************
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* Function Name: CySetTempInt
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****************************************************************************//**
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*
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* Sends a command to the SPC to read the die temperature. Sets a global value
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* used by the Write function. This function must be called once before
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* executing a series of Flash writing functions.
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*
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* \return
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* status:
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* CYRET_SUCCESS - if successful
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* CYRET_LOCKED - if Flash writing already in use
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* CYRET_UNKNOWN - if there was an SPC error
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*
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*******************************************************************************/
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static cystatus CySetTempInt(void)
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{
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cystatus status;
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/* Make sure SPC is powered */
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CySpcStart();
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/* Plan for failure. */
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status = CYRET_UNKNOWN;
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if(CySpcLock() == CYRET_SUCCESS)
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{
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/* Write the command. */
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if(CYRET_STARTED == CySpcGetTemp(CY_TEMP_NUMBER_OF_SAMPLES))
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{
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do
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{
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if(CySpcReadData(dieTemperature, CY_FLASH_DIE_TEMP_DATA_SIZE) == CY_FLASH_DIE_TEMP_DATA_SIZE)
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{
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status = CYRET_SUCCESS;
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while(CY_SPC_BUSY)
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{
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/* Spin until idle. */
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CyDelayUs(1u);
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}
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break;
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}
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} while(CY_SPC_BUSY);
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}
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CySpcUnlock();
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}
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else
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{
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status = CYRET_LOCKED;
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}
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return (status);
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}
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/*******************************************************************************
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* Function Name: CyFlashGetSpcAlgorithm
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****************************************************************************//**
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*
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* Sends a command to the SPC to download code into RAM.
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*
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* \return
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* status:
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* CYRET_SUCCESS - if successful
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* CYRET_LOCKED - if Flash writing already in use
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* CYRET_UNKNOWN - if there was an SPC error
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*
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*******************************************************************************/
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static cystatus CyFlashGetSpcAlgorithm(void)
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{
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cystatus status;
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/* Make sure SPC is powered */
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CySpcStart();
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if(CySpcLock() == CYRET_SUCCESS)
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{
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status = CySpcGetAlgorithm();
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if(CYRET_STARTED == status)
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{
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while(CY_SPC_BUSY)
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{
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/* Spin until idle. */
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CyDelayUs(1u);
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}
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if(CY_SPC_STATUS_SUCCESS == CY_SPC_READ_STATUS)
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{
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status = CYRET_SUCCESS;
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}
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}
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CySpcUnlock();
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}
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else
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{
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status = CYRET_LOCKED;
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}
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return (status);
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}
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/*******************************************************************************
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* Function Name: CySetTemp
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****************************************************************************//**
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*
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* This is a wraparound for CySetTempInt(). It is used to return the second
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* successful read of the temperature value.
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*
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* \return
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* status:
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* CYRET_SUCCESS if successful.
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* CYRET_LOCKED if Flash writing already in use
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* CYRET_UNKNOWN if there was an SPC error.
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*
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* uint8 dieTemperature[2]:
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* Holds the die temperature for the flash writing algorithm. The first byte is
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* the sign of the temperature (0 = negative, 1 = positive). The second byte is
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* the magnitude.
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*
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*******************************************************************************/
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cystatus CySetTemp(void)
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{
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cystatus status = CyFlashGetSpcAlgorithm();
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if(status == CYRET_SUCCESS)
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{
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status = CySetTempInt();
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}
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return (status);
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}
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/*******************************************************************************
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* Function Name: CySetFlashEEBuffer
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****************************************************************************//**
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*
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* Sets the user supplied temporary buffer to store SPC data while performing
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* Flash and EEPROM commands. This buffer is only necessary when the Flash ECC
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* is disabled.
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*
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* \param buffer:
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* The address of a block of memory to store temporary memory. The size of the
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* block of memory is CYDEV_FLS_ROW_SIZE + CYDEV_ECC_ROW_SIZE.
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*
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* \return
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* status:
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* CYRET_SUCCESS if successful.
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* CYRET_BAD_PARAM if the buffer is NULL
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*
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*******************************************************************************/
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cystatus CySetFlashEEBuffer(uint8 * buffer)
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{
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cystatus status = CYRET_SUCCESS;
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CySpcStart();
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#if(CYDEV_ECC_ENABLE == 0)
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if(NULL == buffer)
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{
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rowBuffer = rowBuffer;
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status = CYRET_BAD_PARAM;
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}
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else if(CySpcLock() != CYRET_SUCCESS)
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{
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rowBuffer = rowBuffer;
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status = CYRET_LOCKED;
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}
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else
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{
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rowBuffer = buffer;
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CySpcUnlock();
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}
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#else
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/* To suppress warning */
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buffer = buffer;
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#endif /* (CYDEV_ECC_ENABLE == 0u) */
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return(status);
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}
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/*******************************************************************************
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* Function Name: CyWriteRowData
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****************************************************************************//**
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*
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* Sends a command to the SPC to load and program a row of data in
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* Flash or EEPROM.
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*
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* \param arrayID: ID of the array to write.
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* The type of write, Flash or EEPROM, is determined from the array ID.
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* The arrays in the part are sequential starting at the first ID for the
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* specific memory type. The array ID for the Flash memory lasts from 0x00 to
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* 0x3F and for the EEPROM memory it lasts from 0x40 to 0x7F.
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* \param rowAddress: rowAddress of flash row to program.
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* \param rowData: Array of bytes to write.
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*
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* \return
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* status:
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* CYRET_SUCCESS if successful.
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* CYRET_LOCKED if the SPC is already in use.
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* CYRET_CANCELED if command not accepted
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* CYRET_UNKNOWN if there was an SPC error.
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*
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*******************************************************************************/
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cystatus CyWriteRowData(uint8 arrayId, uint16 rowAddress, const uint8 * rowData)
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{
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uint16 rowSize;
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cystatus status;
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rowSize = (arrayId > CY_SPC_LAST_FLASH_ARRAYID) ? CYDEV_EEPROM_ROW_SIZE : CYDEV_FLS_ROW_SIZE;
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status = CyWriteRowFull(arrayId, rowAddress, rowData, rowSize);
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return(status);
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}
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/*******************************************************************
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* If "Enable Error Correcting Code (ECC)" and "Store Configuration
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* Data in ECC" DWR options are disabled, ECC section is available
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* for user data.
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*******************************************************************/
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#if ((CYDEV_ECC_ENABLE == 0u) && (CYDEV_CONFIGURATION_ECC == 0u))
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/*******************************************************************************
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* Function Name: CyWriteRowConfig
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****************************************************************************//**
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*
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* Sends a command to the SPC to load and program a row of config data in the
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* Flash. This function is only valid for Flash array IDs (not for EEPROM).
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*
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* \param arrayId: ID of the array to write
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* The arrays in the part are sequential starting at the first ID for the
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* specific memory type. The array ID for the Flash memory lasts
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* from 0x00 to 0x3F.
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* \param rowAddress: The address of the sector to erase.
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* \param rowECC: The array of bytes to write.
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*
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* \return
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* status:
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* CYRET_SUCCESS if successful.
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* CYRET_LOCKED if the SPC is already in use.
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* CYRET_CANCELED if command not accepted
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* CYRET_UNKNOWN if there was an SPC error.
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*
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*******************************************************************************/
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cystatus CyWriteRowConfig(uint8 arrayId, uint16 rowAddress, const uint8 * rowECC)\
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{
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cystatus status;
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status = CyWriteRowFull(arrayId, rowAddress, rowECC, CYDEV_ECC_ROW_SIZE);
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return (status);
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}
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#endif /* ((CYDEV_ECC_ENABLE == 0u) && (CYDEV_CONFIGURATION_ECC == 0u)) */
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/*******************************************************************************
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* Function Name: CyWriteRowFull
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****************************************************************************//**
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* Sends a command to the SPC to load and program a row of data in the Flash.
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* rowData array is expected to contain Flash and ECC data if needed.
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*
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* \param arrayId: FLASH or EEPROM array id.
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* \param rowData: Pointer to a row of data to write.
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* \param rowNumber: Zero based number of the row.
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* \param rowSize: Size of the row.
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*
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* \return
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* CYRET_SUCCESS if successful.
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* CYRET_LOCKED if the SPC is already in use.
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* CYRET_CANCELED if command not accepted
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* CYRET_UNKNOWN if there was an SPC error.
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*
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*******************************************************************************/
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cystatus CyWriteRowFull(uint8 arrayId, uint16 rowNumber, const uint8* rowData, uint16 rowSize) \
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{
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cystatus status = CYRET_SUCCESS;
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if((arrayId <= CY_SPC_LAST_FLASH_ARRAYID) && (arrayId > (CY_FLASH_NUMBER_ARRAYS + CY_SPC_FIRST_FLASH_ARRAYID)))
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{
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status = CYRET_BAD_PARAM;
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}
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if(arrayId > CY_SPC_LAST_EE_ARRAYID)
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{
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status = CYRET_BAD_PARAM;
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}
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if((arrayId >= CY_SPC_FIRST_EE_ARRAYID) && (arrayId > (CY_FLASH_EEPROM_NUMBER_ARRAYS + CY_SPC_FIRST_EE_ARRAYID)))
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{
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status = CYRET_BAD_PARAM;
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}
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if(arrayId <= CY_SPC_LAST_FLASH_ARRAYID)
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{
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/* Flash */
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if(rowNumber > (CY_FLASH_NUMBER_ROWS/CY_FLASH_NUMBER_ARRAYS))
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{
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status = CYRET_BAD_PARAM;
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}
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}
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else
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{
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/* EEPROM */
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if(rowNumber > (CY_EEPROM_NUMBER_ROWS/CY_FLASH_EEPROM_NUMBER_ARRAYS))
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{
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status = CYRET_BAD_PARAM;
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}
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if(CY_EEPROM_SIZEOF_ROW != rowSize)
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{
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status = CYRET_BAD_PARAM;
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}
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}
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if(rowData == NULL)
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{
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status = CYRET_BAD_PARAM;
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}
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if(status == CYRET_SUCCESS)
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{
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if(CySpcLock() == CYRET_SUCCESS)
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{
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/* Load row data into SPC internal latch */
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status = CySpcLoadRowFull(arrayId, rowNumber, rowData, rowSize);
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if(CYRET_STARTED == status)
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{
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while(CY_SPC_BUSY)
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{
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/* Wait for SPC to finish and get SPC status */
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CyDelayUs(1u);
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}
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/* Hide SPC status */
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if(CY_SPC_STATUS_SUCCESS == CY_SPC_READ_STATUS)
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{
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status = CYRET_SUCCESS;
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}
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else
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{
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status = CYRET_UNKNOWN;
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}
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if(CYRET_SUCCESS == status)
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{
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/* Erase and program flash with data from SPC interval latch */
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status = CySpcWriteRow(arrayId, rowNumber, dieTemperature[0u], dieTemperature[1u]);
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if(CYRET_STARTED == status)
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{
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while(CY_SPC_BUSY)
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{
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/* Wait for SPC to finish and get SPC status */
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CyDelayUs(1u);
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}
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/* Hide SPC status */
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if(CY_SPC_STATUS_SUCCESS == CY_SPC_READ_STATUS)
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{
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status = CYRET_SUCCESS;
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}
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else
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{
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status = CYRET_UNKNOWN;
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}
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}
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}
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}
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CySpcUnlock();
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} /* if(CySpcLock() == CYRET_SUCCESS) */
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else
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{
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status = CYRET_LOCKED;
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}
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}
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return(status);
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}
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/*******************************************************************************
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* Function Name: CyFlash_SetWaitCycles
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****************************************************************************//**
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*
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* Sets the number of clock cycles the cache will wait before it samples data
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* coming back from the Flash. This function must be called before increasing
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* the CPU clock frequency. It can optionally be called after lowering the CPU
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* clock frequency in order to improve the CPU performance.
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*
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* \param uint8 freq:
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* Frequency of operation in Megahertz.
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*
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*******************************************************************************/
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void CyFlash_SetWaitCycles(uint8 freq)
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{
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uint8 interruptState;
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/* Save current global interrupt enable and disable it */
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interruptState = CyEnterCriticalSection();
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/***************************************************************************
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* The number of clock cycles the cache will wait before it samples data
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* coming back from the Flash must be equal or greater to to the CPU frequency
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* outlined in clock cycles.
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***************************************************************************/
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if (freq < CY_FLASH_CACHE_WS_1_FREQ_MAX)
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{
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CY_FLASH_CONTROL_REG = (CY_FLASH_CONTROL_REG & (uint8)(~CY_FLASH_CACHE_WS_VALUE_MASK)) |
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CY_FLASH_CACHE_WS_1_VALUE_MASK;
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}
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else if (freq < CY_FLASH_CACHE_WS_2_FREQ_MAX)
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{
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CY_FLASH_CONTROL_REG = (CY_FLASH_CONTROL_REG & (uint8)(~CY_FLASH_CACHE_WS_VALUE_MASK)) |
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CY_FLASH_CACHE_WS_2_VALUE_MASK;
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}
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else if (freq < CY_FLASH_CACHE_WS_3_FREQ_MAX)
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{
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CY_FLASH_CONTROL_REG = (CY_FLASH_CONTROL_REG & (uint8)(~CY_FLASH_CACHE_WS_VALUE_MASK)) |
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CY_FLASH_CACHE_WS_3_VALUE_MASK;
|
|
}
|
|
#if (CY_PSOC5)
|
|
else if (freq < CY_FLASH_CACHE_WS_4_FREQ_MAX)
|
|
{
|
|
CY_FLASH_CONTROL_REG = (CY_FLASH_CONTROL_REG & (uint8)(~CY_FLASH_CACHE_WS_VALUE_MASK)) |
|
|
CY_FLASH_CACHE_WS_4_VALUE_MASK;
|
|
}
|
|
else if (freq <= CY_FLASH_CACHE_WS_5_FREQ_MAX)
|
|
{
|
|
CY_FLASH_CONTROL_REG = (CY_FLASH_CONTROL_REG & (uint8)(~CY_FLASH_CACHE_WS_VALUE_MASK)) |
|
|
CY_FLASH_CACHE_WS_5_VALUE_MASK;
|
|
}
|
|
#endif /* (CY_PSOC5) */
|
|
else
|
|
{
|
|
/* Halt CPU in debug mode if frequency is invalid */
|
|
CYASSERT(0u != 0u);
|
|
}
|
|
|
|
/* Restore global interrupt enable state */
|
|
CyExitCriticalSection(interruptState);
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
* Function Name: CyEEPROM_Start
|
|
****************************************************************************//**
|
|
*
|
|
* Enable the EEPROM.
|
|
*
|
|
*******************************************************************************/
|
|
void CyEEPROM_Start(void)
|
|
{
|
|
uint8 interruptState;
|
|
|
|
interruptState = CyEnterCriticalSection();
|
|
|
|
|
|
/***************************************************************************
|
|
* Enable SPC clock. This also internally enables the 36MHz IMO, since this
|
|
* is required for the SPC to function.
|
|
***************************************************************************/
|
|
CY_FLASH_PM_ACT_CFG0_REG |= CY_FLASH_PM_ACT_CFG0_EN_CLK_SPC;
|
|
CY_FLASH_PM_ALTACT_CFG0_REG |= CY_FLASH_PM_ALTACT_CFG0_EN_CLK_SPC;
|
|
|
|
|
|
/***************************************************************************
|
|
* The wake count defines the number of Bus Clock cycles it takes for the
|
|
* flash or EEPROM to wake up from a low power mode independent of the chip
|
|
* power mode. Wake up time for these blocks is 5 us.
|
|
* The granularity of this register is 2 Bus Clock cycles, so a value of 0x1E
|
|
* (30d) defines the wake up time as 60 cycles of the Bus Clock.
|
|
* This register needs to be written with a value dependent on the Bus Clock
|
|
* frequency so that the duration of the cycles is equal to or greater than
|
|
* the 5 us delay required.
|
|
***************************************************************************/
|
|
CY_FLASH_SPC_FM_EE_WAKE_CNT_REG = CY_FLASH_SPC_FM_EE_WAKE_CNT_80MHZ;
|
|
|
|
|
|
/***************************************************************************
|
|
* Enable EEPROM. Re-enabling an EEPROM macro takes 5us. During this time,
|
|
* the EE will not acknowledge a PHUB request.
|
|
***************************************************************************/
|
|
CY_FLASH_PM_ACT_CFG12_REG |= CY_FLASH_PM_ACT_CFG12_EN_EE;
|
|
CY_FLASH_PM_ALTACT_CFG12_REG |= CY_FLASH_PM_ALTACT_CFG12_EN_EE;
|
|
|
|
while(0u == (CY_FLASH_SPC_FM_EE_CR_REG & CY_FLASH_EE_EE_AWAKE))
|
|
{
|
|
/* Non-zero status denotes that the EEPROM/Flash is awake & powered. */
|
|
}
|
|
|
|
CyExitCriticalSection(interruptState);
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
* Function Name: CyEEPROM_Stop
|
|
****************************************************************************//**
|
|
*
|
|
* Disable the EEPROM.
|
|
*
|
|
*******************************************************************************/
|
|
void CyEEPROM_Stop (void)
|
|
{
|
|
uint8 interruptState;
|
|
|
|
interruptState = CyEnterCriticalSection();
|
|
|
|
CY_FLASH_PM_ACT_CFG12_REG &= ((uint8)(~CY_FLASH_PM_ACT_CFG12_EN_EE));
|
|
CY_FLASH_PM_ALTACT_CFG12_REG &= ((uint8)(~CY_FLASH_PM_ALTACT_CFG12_EN_EE));
|
|
|
|
CyExitCriticalSection(interruptState);
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
* Function Name: CyEEPROM_ReadReserve
|
|
****************************************************************************//**
|
|
*
|
|
* Request access to the EEPROM for reading and wait until access is available.
|
|
*
|
|
*******************************************************************************/
|
|
void CyEEPROM_ReadReserve(void)
|
|
{
|
|
/* Make request for PHUB to have access */
|
|
CY_FLASH_EE_SCR_REG |= CY_FLASH_EE_SCR_AHB_EE_REQ;
|
|
|
|
while (0u == (CY_FLASH_EE_SCR_REG & CY_FLASH_EE_SCR_AHB_EE_ACK))
|
|
{
|
|
/* Wait for acknowledgment from PHUB */
|
|
}
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
* Function Name: CyEEPROM_ReadRelease
|
|
****************************************************************************//**
|
|
*
|
|
* Release the read reservation of the EEPROM.
|
|
*
|
|
*******************************************************************************/
|
|
void CyEEPROM_ReadRelease(void)
|
|
{
|
|
CY_FLASH_EE_SCR_REG &= (uint8)(~CY_FLASH_EE_SCR_AHB_EE_REQ);
|
|
}
|
|
|
|
|
|
/* [] END OF FILE */
|