R3 Initial schematic complete, start routing

This commit is contained in:
techav 2023-06-30 00:05:36 -05:00
parent a351ec4477
commit f15cd37581
4 changed files with 11494 additions and 870 deletions

View File

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10822
Hardware/SE-VGA.kicad_pcb Normal file

File diff suppressed because it is too large Load Diff

View File

@ -3,26 +3,189 @@
"3dviewports": [],
"design_settings": {
"defaults": {
"board_outline_line_width": 0.1,
"copper_line_width": 0.2,
"board_outline_line_width": 0.09999999999999999,
"copper_line_width": 0.19999999999999998,
"copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.049999999999999996,
"dimension_precision": 4,
"dimension_units": 3,
"dimensions": {
"arrow_length": 1270000,
"extension_offset": 500000,
"keep_text_aligned": true,
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"text_position": 0,
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"other_text_size_h": 1.0,
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"other_text_thickness": 0.15,
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"pads": {
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"height": 1.524,
"width": 1.524
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}
},
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{
"gap": 0.0,
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"width": 0.0
}
],
"drc_exclusions": [],
"rules": {
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"solder_mask_clearance": 0.0,
"solder_mask_min_width": 0.0
"meta": {
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},
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"rule_severities": {
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"clearance": "error",
"connection_width": "warning",
"copper_edge_clearance": "error",
"copper_sliver": "warning",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint": "error",
"footprint_type_mismatch": "ignore",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
"isolated_copper": "warning",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"lib_footprint_issues": "warning",
"lib_footprint_mismatch": "warning",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "warning",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_edge_clearance": "warning",
"silk_over_copper": "warning",
"silk_overlap": "warning",
"skew_out_of_range": "error",
"solder_mask_bridge": "error",
"starved_thermal": "error",
"text_height": "warning",
"text_thickness": "warning",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zones_intersect": "error"
},
"rules": {
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"min_clearance": 0.0,
"min_connection": 0.0,
"min_copper_edge_clearance": 0.0,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.19999999999999998,
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"min_resolved_spokes": 2,
"min_silk_clearance": 0.0,
"min_text_height": 0.7999999999999999,
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"use_height_for_length_calcs": true
},
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"td_curve_segcount": 5,
"td_on_pad_in_zone": false,
"td_onpadsmd": true,
"td_onroundshapesonly": false,
"td_ontrackend": false,
"td_onviapad": true
}
],
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@ -254,7 +417,7 @@
"classes": [
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"clearance": 0.2,
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@ -264,7 +427,58 @@
"name": "Default",
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},
{
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"line_style": 0,
"microvia_diameter": 0.3,
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"name": "MacInterface",
"pcb_color": "rgba(0, 0, 0, 0.000)",
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},
{
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"name": "Power",
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"wire_width": 6
},
{
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"name": "VRAM",
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"via_drill": 0.4,
"wire_width": 6
@ -275,7 +489,36 @@
},
"net_colors": null,
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"netclass_patterns": []
"netclass_patterns": [
{
"netclass": "MacInterface",
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},
{
"netclass": "MacInterface",
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},
{
"netclass": "Power",
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},
{
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},
{
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},
{
"netclass": "VRAM",
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},
{
"netclass": "VRAM",
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]
},
"pcbnew": {
"last_paths": {

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