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<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE twReport [
<!ELEMENT twReport (twHead?, (twWarn | twDebug | twInfo)*, twBody, twSum?,
twDebug*, twFoot?, twClientInfo?)>
<!ATTLIST twReport version CDATA "10,4">
<!ELEMENT twHead (twExecVer?, twCopyright, twCmdLine?, twDesign?, twPCF?, twDevInfo, twRptInfo, twEnvVar*)>
<!ELEMENT twExecVer (#PCDATA)>
<!ELEMENT twCopyright (#PCDATA)>
<!ELEMENT twCmdLine (#PCDATA)>
<!ELEMENT twDesign (#PCDATA)>
<!ELEMENT twPCF (#PCDATA)>
<!ELEMENT twDevInfo (twDevName, twSpeedGrade, twSpeedVer?)>
<!ELEMENT twDevName (#PCDATA)>
<!ATTLIST twDevInfo arch CDATA #IMPLIED pkg CDATA #IMPLIED>
<!ELEMENT twSpeedGrade (#PCDATA)>
<!ELEMENT twSpeedVer (#PCDATA)>
<!ELEMENT twRptInfo (twItemLimit?, (twUnconst, twUnconstLimit?)?)>
<!ATTLIST twRptInfo twRptLvl (twErr | twVerbose | twTerseErr | twSum | twTimeGrp) #REQUIRED>
<!ATTLIST twRptInfo twAdvRpt (TRUE | FALSE) "FALSE">
<!ATTLIST twRptInfo twTimeUnits (twPsec | twNsec | twUsec | twMsec | twSec) "twNsec">
<!ATTLIST twRptInfo twFreqUnits (twGHz | twMHz | twHz) "twMHz">
<!ATTLIST twRptInfo twReportMinPaths CDATA #IMPLIED>
<!ELEMENT twItemLimit (#PCDATA)>
<!ELEMENT twUnconst EMPTY>
<!ELEMENT twUnconstLimit (#PCDATA)>
<!ELEMENT twEnvVar EMPTY>
<!ATTLIST twEnvVar name CDATA #REQUIRED>
<!ATTLIST twEnvVar description CDATA #REQUIRED>
<!ELEMENT twWarn (#PCDATA)>
<!ELEMENT twInfo (#PCDATA)>
<!ELEMENT twDebug (#PCDATA)>
<!ELEMENT twBody (twDerating?, (twSumRpt | twVerboseRpt | twErrRpt | twTerseErrRpt | twTimeGrpRpt), twNonDedClks?)>
<!ATTLIST twBody twFastPaths CDATA #IMPLIED>
<!ELEMENT twDerating (twProc?, twTemp?, twVolt?)>
<!ELEMENT twProc (#PCDATA)>
<!ELEMENT twTemp (#PCDATA)>
<!ELEMENT twVolt (#PCDATA)>
<!ELEMENT twSumRpt (twConstRollupTable*, twConstList?, twConstSummaryTable?, twUnmetConstCnt?, (twWarn | twInfo | twDebug)*, twDataSheet?)>
<!ELEMENT twErrRpt (twCycles?, (twConst | twTIG | twConstRollupTable)*, twUnmetConstCnt?, (twWarn | twInfo | twDebug)*, twDataSheet?, twTimeGrp*)>
<!ELEMENT twTerseErrRpt (twConstList, twUnmetConstCnt?, twDataSheet?)>
<!ELEMENT twVerboseRpt (twCycles?, (twConst | twTIG | twConstRollupTable)*, twUnmetConstCnt?, (twWarn | twInfo | twDebug)*, twDataSheet?, twTimeGrp*)>
<!ELEMENT twCycles (twSigConn+)>
<!ATTLIST twCycles twNum CDATA #REQUIRED>
<!ELEMENT twSigConn (twSig, twDriver, twLoad)>
<!ELEMENT twSig (#PCDATA)>
<!ELEMENT twDriver (#PCDATA)>
<!ELEMENT twLoad (#PCDATA)>
<!ELEMENT twConst (twConstHead, ((twPathRpt?,twRacePathRpt?, twPathRptBanner?)* | (twPathRpt*, twRacePathRpt?) | twNetRpt* | twClkSkewLimit*))>
<!ATTLIST twConst twConstType (NET |
NETDELAY |
NETSKEW |
PATH |
DEFPERIOD |
UNCONSTPATH |
DEFPATH |
PATH2SETUP |
UNCONSTPATH2SETUP |
PATHCLASS |
PATHDELAY |
PERIOD |
FREQUENCY |
PATHBLOCK |
OFFSET |
OFFSETIN |
OFFSETINCLOCK |
UNCONSTOFFSETINCLOCK |
OFFSETINDELAY |
OFFSETINMOD |
OFFSETOUT |
OFFSETOUTCLOCK |
UNCONSTOFFSETOUTCLOCK |
OFFSETOUTDELAY |
OFFSETOUTMOD| CLOCK_SKEW_LIMITS) #IMPLIED>
<!ELEMENT twConstHead (twConstName, twItemCnt, twErrCntSetup, twErrCntEndPt?, twErrCntHold,
twEndPtCnt?,
twPathErrCnt?, (twMinPer| twMaxDel| twMaxFreq| twMaxNetDel| twMaxNetSkew| twMinOff| twMaxOff)*)>
<!ELEMENT twConstName (#PCDATA)>
<!ATTLIST twConstName UCFConstName CDATA #IMPLIED>
<!ATTLIST twConstHead uID CDATA #IMPLIED>
<!ELEMENT twItemCnt (#PCDATA)>
<!ELEMENT twErrCnt (#PCDATA)>
<!ELEMENT twErrCntEndPt (#PCDATA)>
<!ELEMENT twErrCntSetup (#PCDATA)>
<!ELEMENT twErrCntHold (#PCDATA)>
<!ATTLIST twErrCntHold twRaceChecked (TRUE | FALSE) "FALSE">
<!ELEMENT twEndPtCnt (#PCDATA)>
<!ELEMENT twPathErrCnt (#PCDATA)>
<!ELEMENT twMinPer (#PCDATA) >
<!ELEMENT twFootnote EMPTY>
<!ATTLIST twFootnote number CDATA #REQUIRED>
<!ELEMENT twMaxDel (#PCDATA)>
<!ELEMENT twMaxFreq (#PCDATA)>
<!ELEMENT twMinOff (#PCDATA)>
<!ELEMENT twMaxOff (#PCDATA)>
<!ELEMENT twTIG (twTIGHead, (twPathRpt*,twRacePathRpt?))>
<!ELEMENT twTIGHead (twTIGName, twInstantiated, twBlocked)>
<!ELEMENT twTIGName (#PCDATA)>
<!ELEMENT twInstantiated (#PCDATA)>
<!ELEMENT twBlocked (#PCDATA)>
<!ELEMENT twRacePathRpt (twRacePath+)>
<!ELEMENT twPathRpt (twUnconstPath | twConstPath | twUnconstOffIn | twConstOffIn | twUnconstOffOut | twConstOffOut | twModOffOut)>
<!ELEMENT twUnconstPath (twTotDel, twSrc, twDest, (twDel, twSUTime)?, twTotPathDel?, twClkSkew?, tw2Phase?, twClkUncert?, twDetPath?)>
<!ATTLIST twUnconstPath twDataPathType CDATA #IMPLIED
twSimpleMinPath CDATA #IMPLIED>
<!ELEMENT twTotDel (#PCDATA)>
<!ELEMENT twSrc (#PCDATA)>
<!ATTLIST twSrc BELType CDATA #IMPLIED>
<!ELEMENT twDest (#PCDATA)>
<!ATTLIST twDest BELType CDATA #IMPLIED>
<!ELEMENT twDel (#PCDATA)>
<!ELEMENT twSUTime (#PCDATA)>
<!ELEMENT twTotPathDel (#PCDATA)>
<!ELEMENT twClkSkew (#PCDATA)>
<!ATTLIST twClkSkew dest CDATA #IMPLIED src CDATA #IMPLIED>
<!ELEMENT twConstPath (twSlack, twSrc, twDest, twTotPathDel?, twClkSkew?, twDelConst, tw2Phase?, twClkUncert?, twDetPath?)>
<!ATTLIST twConstPath twDataPathType CDATA "twDataPathMaxDelay">
<!ATTLIST twConstPath constType (period | fromto | unknown) "unknown">
<!ELEMENT twSlack (#PCDATA)>
<!ELEMENT twDelConst (#PCDATA)>
<!ELEMENT tw2Phase EMPTY>
<!ELEMENT twClkUncert (#PCDATA)>
<!ATTLIST twClkUncert fSysJit CDATA #IMPLIED fInputJit CDATA #IMPLIED
fDCMJit CDATA #IMPLIED
fPhaseErr CDATA #IMPLIED
sEqu CDATA #IMPLIED>
<!ELEMENT twRacePath (twSlack, twSrc, twDest, twClkSkew, twDelConst?, twClkUncert?, twDetPath)>
<!ELEMENT twPathRptBanner (#PCDATA)>
<!ATTLIST twPathRptBanner sType CDATA #IMPLIED iPaths CDATA #IMPLIED iCriticalPaths CDATA #IMPLIED>
<!ELEMENT twUnconstOffIn (twOff, twSrc, twDest, twGuaranteed?, twClkUncert?, (twDataPath, twClkPath)?)>
<!ATTLIST twUnconstOffIn twDataPathType CDATA #IMPLIED>
<!ELEMENT twOff (#PCDATA)>
<!ELEMENT twGuaranteed EMPTY>
<!ELEMENT twConstOffIn (twSlack, twSrc, twDest, ((twClkDel, twClkSrc, twClkDest) | twGuarInSetup), twOff, twOffSrc, twOffDest, twClkUncert?, (twDataPath, twClkPath)?)>
<!ATTLIST twConstOffIn twDataPathType CDATA "twDataPathMaxDelay">
<!ATTLIST twConstOffIn twDurationNotSpecified CDATA #IMPLIED>
<!ELEMENT twClkDel (#PCDATA)>
<!ELEMENT twClkSrc (#PCDATA)>
<!ELEMENT twClkDest (#PCDATA)>
<!ELEMENT twGuarInSetup (#PCDATA)>
<!ELEMENT twOffSrc (#PCDATA)>
<!ELEMENT twOffDest (#PCDATA)>
<!ELEMENT twUnconstOffOut (twOff, twSrc, twDest, twClkUncert?, (twClkPath, twDataPath)?)>
<!ATTLIST twUnconstOffOut twDataPathType CDATA #IMPLIED>
<!ELEMENT twConstOffOut (twSlack, twSrc, twDest, twClkDel, twClkSrc, twClkDest, twDataDel, twDataSrc, twDataDest, twOff, twOffSrc, twOffDest, twClkUncert?, (twClkPath, twDataPath)?)>
<!ATTLIST twConstOffOut twDataPathType CDATA "twDataPathMaxDelay">
<!ELEMENT twDataDel (#PCDATA)>
<!ELEMENT twDataSrc (#PCDATA)>
<!ELEMENT twDataDest (#PCDATA)>
<!ELEMENT twModOffOut (twSlack, twDest, twDataDel, twDataSrc, twDataDest, twClkUncert?, twDataPath?)>
<!ELEMENT twDetPath (twSrc, twDest, twLogLvls, twSrcSite, twSrcClk?, twPathDel*, (twLogDel, twRouteDel, twTotDel)?, twDestClk?, (twPctLog, twPctRoute)?)>
<!ATTLIST twDetPath maxSiteLen CDATA #IMPLIED>
<!ELEMENT twDataPath (twSrc, twDest, twLogLvls, twSrcSite, twSrcClk?, twPathDel*, (twLogDel, twRouteDel, twTotDel)?, twDestClk?, (twPctLog, twPctRoute)?)>
<!ATTLIST twDataPath maxSiteLen CDATA #IMPLIED>
<!ELEMENT twClkPath (twSrc, twDest, twLogLvls, twSrcSite, twSrcClk?, twPathDel*, (twLogDel, twRouteDel, twTotDel)?, twDestClk?, (twPctLog, twPctRoute)?)>
<!ATTLIST twClkPath maxSiteLen CDATA #IMPLIED>
<!ELEMENT twLogLvls (#PCDATA)>
<!ELEMENT twSrcSite (#PCDATA)>
<!ELEMENT twSrcClk (#PCDATA)>
<!ATTLIST twSrcClk twEdge (twRising | twFalling) "twRising">
<!ATTLIST twSrcClk twArriveTime CDATA #IMPLIED>
<!ATTLIST twSrcClk twClkRes CDATA #IMPLIED>
<!ELEMENT twPathDel (twSite, twDelType, twFanCnt?, twDelInfo?, twComp, twNet?, twBEL*)>
<!ATTLIST twPathDel twHoldTime (TRUE | FALSE) "FALSE">
<!ELEMENT twDelInfo (#PCDATA)>
<!ATTLIST twDelInfo twEdge (twRising | twFalling | twIndet) #REQUIRED>
<!ATTLIST twDelInfo twAcc (twRouted | twEst | twApprox) "twRouted">
<!ELEMENT twSite (#PCDATA)>
<!ELEMENT twDelType (#PCDATA)>
<!ELEMENT twFanCnt (#PCDATA)>
<!ELEMENT twComp (#PCDATA)>
<!ELEMENT twNet (#PCDATA)>
<!ELEMENT twBEL (#PCDATA)>
<!ELEMENT twLogDel (#PCDATA)>
<!ELEMENT twRouteDel (#PCDATA)>
<!ELEMENT twDestClk (#PCDATA)>
<!ATTLIST twDestClk twEdge (twRising | twFalling) "twRising">
<!ATTLIST twDestClk twArriveTime CDATA #IMPLIED>
<!ATTLIST twDestClk twClkRes CDATA #IMPLIED>
<!ELEMENT twPctLog (#PCDATA)>
<!ELEMENT twPctRoute (#PCDATA)>
<!ELEMENT twNetRpt (twDelNet | twSlackNet | twSkewNet)>
<!ELEMENT twDelNet (twDel, twNet, twDetNet?)>
<!ELEMENT twSlackNet (twSlack, twNet, twDel, twNotMet?, twTimeConst, twAbsSlack, twDetNet?)>
<!ELEMENT twTimeConst (#PCDATA)>
<!ELEMENT twAbsSlack (#PCDATA)>
<!ELEMENT twSkewNet (twSlack, twNet, twSkew, twNotMet?, twTimeConst, twAbsSlack, twDetSkewNet?)>
<!ELEMENT twSkew (#PCDATA)>
<!ELEMENT twDetNet (twNetDel*)>
<!ELEMENT twNetDel (twSrc, twDest, twNetDelInfo)>
<!ELEMENT twNetDelInfo (#PCDATA)>
<!ATTLIST twNetDelInfo twAcc (twRouted | twEst | twApprox) "twRouted">
<!ELEMENT twDetSkewNet (twNetSkew*)>
<!ELEMENT twNetSkew (twSrc, twDest, twNetDelInfo, twSkew)>
<!ELEMENT twClkSkewLimit EMPTY>
<!ATTLIST twClkSkewLimit slack CDATA #IMPLIED skew CDATA #IMPLIED arrv1name CDATA #IMPLIED arrv1 CDATA #IMPLIED
arrv2name CDATA #IMPLIED arrv2 CDATA #IMPLIED uncert CDATA #IMPLIED>
<!ELEMENT twConstRollupTable (twConstRollup*)>
<!ATTLIST twConstRollupTable uID CDATA #IMPLIED>
<!ELEMENT twConstRollup EMPTY>
<!ATTLIST twConstRollup name CDATA #IMPLIED fullName CDATA #IMPLIED type CDATA #IMPLIED requirement CDATA #IMPLIED prefType CDATA #IMPLIED actual CDATA #IMPLIED>
<!ATTLIST twConstRollup actualRollup CDATA #IMPLIED errors CDATA #IMPLIED errorRollup CDATA #IMPLIED items CDATA #IMPLIED itemsRollup CDATA #IMPLIED>
<!ELEMENT twConstList (twConstListItem)*>
<!ELEMENT twConstListItem (twConstName, twNotMet?, twReqVal?, twActVal?, twLogLvls?)>
<!ATTLIST twConstListItem twUnits (twTime | twFreq) "twTime">
<!ELEMENT twNotMet EMPTY>
<!ELEMENT twReqVal (#PCDATA)>
<!ELEMENT twActVal (#PCDATA)>
<!ELEMENT twConstSummaryTable (twConstStats|twConstSummary)*>
<!ATTLIST twConstSummaryTable twEmptyConstraints CDATA #IMPLIED>
<!ELEMENT twConstStats (twConstName)>
<!ATTLIST twConstStats twUnits (twTime | twFreq) "twTime">
<!ATTLIST twConstStats twRequired CDATA #IMPLIED>
<!ATTLIST twConstStats twActual CDATA #IMPLIED>
<!ATTLIST twConstStats twSlack CDATA #IMPLIED>
<!ATTLIST twConstStats twLogLvls CDATA #IMPLIED>
<!ATTLIST twConstStats twErrors CDATA #IMPLIED>
<!ATTLIST twConstStats twPCFIndex CDATA #IMPLIED>
<!ATTLIST twConstStats twAbsSlackIndex CDATA #IMPLIED>
<!ATTLIST twConstStats twTCType CDATA #IMPLIED>
<!ELEMENT twConstSummary (twConstName, twConstData?, twConstData*)>
<!ATTLIST twConstSummary PCFIndex CDATA #IMPLIED slackIndex CDATA #IMPLIED>
<!ELEMENT twConstData EMPTY>
<!ATTLIST twConstData type CDATA #IMPLIED units (MHz | ns) "ns" slack CDATA #IMPLIED
best CDATA #IMPLIED requested CDATA #IMPLIED
errors CDATA #IMPLIED
score CDATA #IMPLIED>
<!ELEMENT twTimeGrpRpt (twTimeGrp)*>
<!ELEMENT twTimeGrp (twTimeGrpName, twCompList?, twBELList?, twMacList?, twBlockList?, twSigList?, twPinList?)>
<!ELEMENT twTimeGrpName (#PCDATA)>
<!ELEMENT twCompList (twCompName+)>
<!ELEMENT twCompName (#PCDATA)>
<!ELEMENT twSigList (twSigName+)>
<!ELEMENT twSigName (#PCDATA)>
<!ELEMENT twBELList (twBELName+)>
<!ELEMENT twBELName (#PCDATA)>
<!ELEMENT twBlockList (twBlockName+)>
<!ELEMENT twBlockName (#PCDATA)>
<!ELEMENT twMacList (twMacName+)>
<!ELEMENT twMacName (#PCDATA)>
<!ELEMENT twPinList (twPinName+)>
<!ELEMENT twPinName (#PCDATA)>
<!ELEMENT twUnmetConstCnt (#PCDATA)>
<!ELEMENT twDataSheet (twSUH2ClkList*, (twClk2PadList|twClk2OutList)*, twClk2SUList*, twPad2PadList?, twOffsetTables?)>
<!ATTLIST twDataSheet twNameLen CDATA #REQUIRED>
<!ELEMENT twSUH2ClkList (twDest, twSUH2Clk+)>
<!ATTLIST twSUH2ClkList twDestWidth CDATA #IMPLIED>
<!ATTLIST twSUH2ClkList twPhaseWidth CDATA #IMPLIED>
<!ELEMENT twSUH2Clk (twSrc, twSUHTime, twSUHTime?)>
<!ELEMENT twSUHTime (twSU2ClkTime?,twH2ClkTime?)>
<!ATTLIST twSUHTime twInternalClk CDATA #IMPLIED>
<!ATTLIST twSUHTime twClkPhase CDATA #IMPLIED>
<!ELEMENT twSU2ClkTime (#PCDATA)>
<!ATTLIST twSU2ClkTime twEdge (twRising | twFalling | twIndet) #REQUIRED>
<!ELEMENT twH2ClkTime (#PCDATA)>
<!ATTLIST twH2ClkTime twEdge (twRising | twFalling | twIndet) #REQUIRED>
<!ELEMENT twClk2PadList (twSrc, twClk2Pad+)>
<!ELEMENT twClk2Pad (twDest, twTime)>
<!ELEMENT twTime (#PCDATA)>
<!ATTLIST twTime twEdge (twRising | twFalling | twIndet) #REQUIRED>
<!ELEMENT twClk2OutList (twSrc, twClk2Out+)>
<!ATTLIST twClk2OutList twDestWidth CDATA #REQUIRED>
<!ATTLIST twClk2OutList twPhaseWidth CDATA #REQUIRED>
<!ELEMENT twClk2Out EMPTY>
<!ATTLIST twClk2Out twOutPad CDATA #REQUIRED>
<!ATTLIST twClk2Out twMinTime CDATA #REQUIRED>
<!ATTLIST twClk2Out twMinEdge CDATA #REQUIRED>
<!ATTLIST twClk2Out twMaxTime CDATA #REQUIRED>
<!ATTLIST twClk2Out twMaxEdge CDATA #REQUIRED>
<!ATTLIST twClk2Out twInternalClk CDATA #REQUIRED>
<!ATTLIST twClk2Out twClkPhase CDATA #REQUIRED>
<!ELEMENT twClk2SUList (twDest, twClk2SU+)>
<!ATTLIST twClk2SUList twDestWidth CDATA #IMPLIED>
<!ELEMENT twClk2SU (twSrc, twRiseRise?, twFallRise?, twRiseFall?, twFallFall?)>
<!ELEMENT twRiseRise (#PCDATA)>
<!ELEMENT twFallRise (#PCDATA)>
<!ELEMENT twRiseFall (#PCDATA)>
<!ELEMENT twFallFall (#PCDATA)>
<!ELEMENT twPad2PadList (twPad2Pad+)>
<!ATTLIST twPad2PadList twSrcWidth CDATA #IMPLIED>
<!ATTLIST twPad2PadList twDestWidth CDATA #IMPLIED>
<!ELEMENT twPad2Pad (twSrc, twDest, twDel)>
<!ELEMENT twOffsetTables (twOffsetInTable*,twOffsetOutTable*)>
<!ELEMENT twOffsetInTable (twConstName, twOffInTblRow*)>
<!ATTLIST twOffsetInTable twDestWidth CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstWindow CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstSetup CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstHold CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstSetupSlack CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstHoldSlack CDATA #IMPLIED>
<!ELEMENT twOffsetOutTable (twConstName, twOffOutTblRow*)>
<!ATTLIST twOffsetOutTable twDestWidth CDATA #IMPLIED>
<!ATTLIST twOffsetOutTable twMinSlack CDATA #IMPLIED>
<!ATTLIST twOffsetOutTable twMaxSlack CDATA #IMPLIED>
<!ATTLIST twOffsetOutTable twRelSkew CDATA #IMPLIED>
<!ELEMENT twOffInTblRow (twSrc, twSUHSlackTime*)>
<!ELEMENT twSUHSlackTime (twSU2ClkTime?,twH2ClkTime?)>
<!ATTLIST twSUHSlackTime twSetupSlack CDATA #IMPLIED twHoldSlack CDATA #IMPLIED>
<!ELEMENT twOffOutTblRow EMPTY>
<!ATTLIST twOffOutTblRow twOutPad CDATA #IMPLIED>
<!ATTLIST twOffOutTblRow twSlack CDATA #IMPLIED>
<!ATTLIST twOffOutTblRow twRelSkew CDATA #IMPLIED>
<!ELEMENT twNonDedClks ((twWarn | twInfo), twNonDedClk+)>
<!ELEMENT twNonDedClk (#PCDATA)>
<!ELEMENT twSum ( twErrCnt, twScore, twConstCov, twStats)>
<!ELEMENT twScore (#PCDATA)>
<!ELEMENT twConstCov (twPathCnt, twNetCnt, twConnCnt, twPct?)>
<!ELEMENT twPathCnt (#PCDATA)>
<!ELEMENT twNetCnt (#PCDATA)>
<!ELEMENT twConnCnt (#PCDATA)>
<!ELEMENT twPct (#PCDATA)>
<!ELEMENT twStats ( twMinPer?, twFootnote?, twMaxFreq?, twMaxCombDel?, twMaxFromToDel?, twMaxNetDel?, twMaxNetSkew?, twMaxInAfterClk?, twMinInBeforeClk?, twMaxOutBeforeClk?, twMinOutAfterClk?, (twInfo | twWarn)*)>
<!ELEMENT twMaxCombDel (#PCDATA)>
<!ELEMENT twMaxFromToDel (#PCDATA)>
<!ELEMENT twMaxNetDel (#PCDATA)>
<!ELEMENT twMaxNetSkew (#PCDATA)>
<!ELEMENT twMaxInAfterClk (#PCDATA)>
<!ELEMENT twMinInBeforeClk (#PCDATA)>
<!ELEMENT twMaxOutBeforeClk (#PCDATA)>
<!ELEMENT twMinOutAfterClk (#PCDATA)>
<!ELEMENT twFoot (twFootnoteExplanation*, twTimestamp)>
<!ELEMENT twTimestamp (#PCDATA)>
<!ELEMENT twFootnoteExplanation EMPTY>
<!ATTLIST twFootnoteExplanation number CDATA #REQUIRED>
<!ATTLIST twFootnoteExplanation text CDATA #REQUIRED>
<!ELEMENT twClientInfo (twClientName, twAttrList?)>
<!ELEMENT twClientName (#PCDATA)>
<!ELEMENT twAttrList (twAttrListItem)*>
<!ELEMENT twAttrListItem (twName, twValue*)>
<!ELEMENT twName (#PCDATA)>
<!ELEMENT twValue (#PCDATA)>
]>
<twReport><twHead anchorID="1"><twExecVer>Release 14.7 Trace (nt)</twExecVer><twCopyright>Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.</twCopyright><twCmdLine>C:\Xilinx\14.7\ISE_DS\ISE\bin\nt\unwrapped\trce.exe -intstyle ise -v 3 -s 2 -n
3 -fastpaths -xml WarpLC.twx WarpLC.ncd -o WarpLC.twr WarpLC.pcf -ucf PLL.ucf
</twCmdLine><twDesign>WarpLC.ncd</twDesign><twDesignPath>WarpLC.ncd</twDesignPath><twPCF>WarpLC.pcf</twPCF><twPcfPath>WarpLC.pcf</twPcfPath><twDevInfo arch="spartan6" pkg="ftg256"><twDevName>xc6slx9</twDevName><twDevRange>C</twDevRange><twSpeedGrade>-2</twSpeedGrade><twSpeedVer>PRODUCTION 1.23 2013-10-13</twSpeedVer><twQuadDly>1</twQuadDly></twDevInfo><twRptInfo twRptLvl="twVerbose" twReportMinPaths="true" dlyHyperLnks="t" ><twEndptLimit>3</twEndptLimit></twRptInfo><twEnvVar name="NONE" description="No environment variables were set" /></twHead><twInfo anchorID="2">INFO:Timing:3412 - To improve timing, see the Timing Closure User Guide (UG612).</twInfo><twInfo anchorID="3">INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths option. All paths that are not constrained will be reported in the unconstrained paths section(s) of the report.</twInfo><twInfo anchorID="4">INFO:Timing:3339 - The clock-to-out numbers in this timing report are based on a 50 Ohm transmission line loading model. For the details of this model, and for more information on accounting for different loading conditions, please see the device datasheet.</twInfo><twBody><twVerboseRpt><twConst anchorID="5" twConstType="PERIOD" ><twConstHead uID="1"><twConstName UCFConstName="NET CLKIN PERIOD = 20ns HIGH;" ScopeName="">NET &quot;instance_name/clkin1&quot; PERIOD = 20 ns HIGH 50%;</twConstName><twItemCnt>0</twItemCnt><twErrCntSetup>0</twErrCntSetup><twErrCntEndPt>0</twErrCntEndPt><twErrCntHold twRaceChecked="FALSE">0</twErrCntHold><twErrCntPinLimit>0</twErrCntPinLimit><twEndPtCnt>0</twEndPtCnt><twPathErrCnt>0</twPathErrCnt><twMinPer>5.000</twMinPer></twConstHead><twPinLimitRpt anchorID="6"><twPinLimitBanner>Component Switching Limit Checks: NET &quot;instance_name/clkin1&quot; PERIOD = 20 ns HIGH 50%;</twPinLimitBanner><twPinLimit anchorID="7" type="MINLOWPULSE" name="Tdcmpw_CLKIN_50_100" slack="15.000" period="20.000" constraintValue="10.000" deviceLimit="2.500" physResource="instance_name/pll_base_inst/PLL_ADV/CLKIN1" logResource="instance_name/pll_base_inst/PLL_ADV/CLKIN1" locationPin="PLL_ADV_X0Y1.CLKIN2" clockNet="instance_name/pll_base_inst/PLL_ADV_ML_NEW_DIVCLK"/><twPinLimit anchorID="8" type="MINHIGHPULSE" name="Tdcmpw_CLKIN_50_100" slack="15.000" period="20.000" constraintValue="10.000" deviceLimit="2.500" physResource="instance_name/pll_base_inst/PLL_ADV/CLKIN1" logResource="instance_name/pll_base_inst/PLL_ADV/CLKIN1" locationPin="PLL_ADV_X0Y1.CLKIN2" clockNet="instance_name/pll_base_inst/PLL_ADV_ML_NEW_DIVCLK"/><twPinLimit anchorID="9" type="MINPERIOD" name="Tpllper_CLKIN(Finmax)" slack="17.780" period="20.000" constraintValue="20.000" deviceLimit="2.220" freqLimit="450.450" physResource="instance_name/pll_base_inst/PLL_ADV/CLKIN1" logResource="instance_name/pll_base_inst/PLL_ADV/CLKIN1" locationPin="PLL_ADV_X0Y1.CLKIN2" clockNet="instance_name/pll_base_inst/PLL_ADV_ML_NEW_DIVCLK"/></twPinLimitRpt></twConst><twConst anchorID="10" twConstType="PERIOD" ><twConstHead uID="6"><twConstName UCFConstName="" ScopeName="">PERIOD analysis for net &quot;instance_name/clkfbout&quot; derived from NET &quot;instance_name/clkin1&quot; PERIOD = 20 ns HIGH 50%; duty cycle corrected to 20 nS HIGH 10 nS </twConstName><twItemCnt>0</twItemCnt><twErrCntSetup>0</twErrCntSetup><twErrCntEndPt>0</twErrCntEndPt><twErrCntHold twRaceChecked="FALSE">0</twErrCntHold><twErrCntPinLimit>0</twErrCntPinLimit><twEndPtCnt>0</twEndPtCnt><twPathErrCnt>0</twPathErrCnt><twMinPer>2.666</twMinPer></twConstHead><twPinLimitRpt anchorID="11"><twPinLimitBanner>Component Switching Limit Checks: PERIOD analysis for net &quot;instance_name/clkfbout&quot; derived from
NET &quot;instance_name/clkin1&quot; PERIOD = 20 ns HIGH 50%;
duty cycle corrected to 20 nS HIGH 10 nS
</twPinLimitBanner><twPinLimit anchorID="12" type="MINPERIOD" name="Tbcper_I" slack="17.334" period="20.000" constraintValue="20.000" deviceLimit="2.666" freqLimit="375.094" physResource="instance_name/clkfbout_bufg/I0" logResource="instance_name/clkfbout_bufg/I0" locationPin="BUFGMUX_X2Y3.I0" clockNet="instance_name/clkfbout"/><twPinLimit anchorID="13" type="MINPERIOD" name="Tockper" slack="17.751" period="20.000" constraintValue="20.000" deviceLimit="2.249" freqLimit="444.642" physResource="CLKFB_OUT_OBUF/CLK0" logResource="instance_name/clkfbout_oddr/CK0" locationPin="OLOGIC_X0Y11.CLK0" clockNet="instance_name/clkfb_bufg_out"/><twPinLimit anchorID="14" type="MINPERIOD" name="Tpllper_CLKFB" slack="17.780" period="20.000" constraintValue="20.000" deviceLimit="2.220" freqLimit="450.450" physResource="instance_name/pll_base_inst/PLL_ADV/CLKFBOUT" logResource="instance_name/pll_base_inst/PLL_ADV/CLKFBOUT" locationPin="PLL_ADV_X0Y1.CLKFBOUT" clockNet="instance_name/clkfbout"/></twPinLimitRpt></twConst><twConst anchorID="15" twConstType="PERIOD" ><twConstHead uID="5"><twConstName UCFConstName="" ScopeName="">PERIOD analysis for net &quot;instance_name/clkout0&quot; derived from NET &quot;instance_name/clkin1&quot; PERIOD = 20 ns HIGH 50%; divided by 2.00 to 10 nS </twConstName><twItemCnt>2</twItemCnt><twErrCntSetup>0</twErrCntSetup><twErrCntEndPt>0</twErrCntEndPt><twErrCntHold twRaceChecked="TRUE">0</twErrCntHold><twErrCntPinLimit>0</twErrCntPinLimit><twEndPtCnt>2</twEndPtCnt><twPathErrCnt>0</twPathErrCnt><twMinPer>2.666</twMinPer></twConstHead><twPathRptBanner iPaths="1" iCriticalPaths="0" sType="EndPoint">Paths for end point OUTt (SLICE_X0Y2.B2), 1 path
</twPathRptBanner><twPathRpt anchorID="16"><twConstPath anchorID="17" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>8.447</twSlack><twSrc BELType="FF">CPUCLK</twSrc><twDest BELType="FF">OUTt</twDest><twTotPathDel>1.405</twTotPathDel><twClkSkew>0.000</twClkSkew><twDelConst>10.000</twDelConst><twClkUncert fSysJit="0.070" fDCMJit="0.287" fPhaseErr="0.000" sEqu="((TSJ^2 + DJ^2)^1/2) / 2 + PE">0.148</twClkUncert><twDetPath maxSiteLen="14" twPathCritProcCorner=" at Slow Process Corner"><twSrc BELType='FF'>CPUCLK</twSrc><twDest BELType='FF'>OUTt</twDest><twLogLvls>1</twLogLvls><twSrcSite>SLICE_X0Y2.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">FSBCLK</twSrcClk><twPathDel><twSite>SLICE_X0Y2.AQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.525</twDelInfo><twComp>OUTt_OBUF</twComp><twBEL>CPUCLK</twBEL></twPathDel><twPathDel><twSite>SLICE_X0Y2.B2</twSite><twDelType>net</twDelType><twFanCnt>3</twFanCnt><twDelInfo twEdge="twRising">0.541</twDelInfo><twComp>CPUCLK_OBUF</twComp></twPathDel><twPathDel><twSite>SLICE_X0Y2.CLK</twSite><twDelType>Tas</twDelType><twDelInfo twEdge="twRising">0.339</twDelInfo><twComp>OUTt_OBUF</twComp><twBEL>CPU_nAS_CPUCLKi_AND_2_o1</twBEL><twBEL>OUTt</twBEL></twPathDel><twLogDel>0.864</twLogDel><twRouteDel>0.541</twRouteDel><twTotDel>1.405</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="10.000">FSBCLK</twDestClk><twPctLog>61.5</twPctLog><twPctRoute>38.5</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner iPaths="1" iCriticalPaths="0" sType="EndPoint">Paths for end point CPUCLK (SLICE_X0Y2.A6), 1 path
</twPathRptBanner><twPathRpt anchorID="18"><twConstPath anchorID="19" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>8.827</twSlack><twSrc BELType="FF">CPUCLK</twSrc><twDest BELType="FF">CPUCLK</twDest><twTotPathDel>1.025</twTotPathDel><twClkSkew>0.000</twClkSkew><twDelConst>10.000</twDelConst><twClkUncert fSysJit="0.070" fDCMJit="0.287" fPhaseErr="0.000" sEqu="((TSJ^2 + DJ^2)^1/2) / 2 + PE">0.148</twClkUncert><twDetPath maxSiteLen="14" twPathCritProcCorner=" at Slow Process Corner"><twSrc BELType='FF'>CPUCLK</twSrc><twDest BELType='FF'>CPUCLK</twDest><twLogLvls>1</twLogLvls><twSrcSite>SLICE_X0Y2.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">FSBCLK</twSrcClk><twPathDel><twSite>SLICE_X0Y2.AQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.525</twDelInfo><twComp>OUTt_OBUF</twComp><twBEL>CPUCLK</twBEL></twPathDel><twPathDel><twSite>SLICE_X0Y2.A6</twSite><twDelType>net</twDelType><twFanCnt>3</twFanCnt><twDelInfo twEdge="twRising">0.161</twDelInfo><twComp>CPUCLK_OBUF</twComp></twPathDel><twPathDel><twSite>SLICE_X0Y2.CLK</twSite><twDelType>Tas</twDelType><twDelInfo twEdge="twRising">0.339</twDelInfo><twComp>OUTt_OBUF</twComp><twBEL>CPUCLK_rstpot1_INV_0</twBEL><twBEL>CPUCLK</twBEL></twPathDel><twLogDel>0.864</twLogDel><twRouteDel>0.161</twRouteDel><twTotDel>1.025</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="10.000">FSBCLK</twDestClk><twPctLog>84.3</twPctLog><twPctRoute>15.7</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner sType="PathClass">Hold Paths: PERIOD analysis for net &quot;instance_name/clkout0&quot; derived from
NET &quot;instance_name/clkin1&quot; PERIOD = 20 ns HIGH 50%;
divided by 2.00 to 10 nS
</twPathRptBanner><twPathRptBanner iPaths="1" iCriticalPaths="0" sType="EndPoint">Paths for end point CPUCLK (SLICE_X0Y2.A6), 1 path
</twPathRptBanner><twPathRpt anchorID="20"><twConstPath anchorID="21" twDataPathType="twDataPathMinDelay" constType="period"><twSlack>0.463</twSlack><twSrc BELType="FF">CPUCLK</twSrc><twDest BELType="FF">CPUCLK</twDest><twTotPathDel>0.463</twTotPathDel><twClkSkew>0.000</twClkSkew><twDelConst>0.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="14" twPathCritProcCorner=" at Fast Process Corner"><twSrc BELType='FF'>CPUCLK</twSrc><twDest BELType='FF'>CPUCLK</twDest><twLogLvls>1</twLogLvls><twSrcSite>SLICE_X0Y2.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="10.000">FSBCLK</twSrcClk><twPathDel><twSite>SLICE_X0Y2.AQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twFalling">0.234</twDelInfo><twComp>OUTt_OBUF</twComp><twBEL>CPUCLK</twBEL></twPathDel><twPathDel><twSite>SLICE_X0Y2.A6</twSite><twDelType>net</twDelType><twFanCnt>3</twFanCnt><twDelInfo twEdge="twFalling">0.032</twDelInfo><twComp>CPUCLK_OBUF</twComp></twPathDel><twPathDel twHoldTime="TRUE"><twSite>SLICE_X0Y2.CLK</twSite><twDelType>Tah</twDelType><twDelInfo twEdge="twFalling">0.197</twDelInfo><twComp>OUTt_OBUF</twComp><twBEL>CPUCLK_rstpot1_INV_0</twBEL><twBEL>CPUCLK</twBEL></twPathDel><twLogDel>0.431</twLogDel><twRouteDel>0.032</twRouteDel><twTotDel>0.463</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="10.000">FSBCLK</twDestClk><twPctLog>93.1</twPctLog><twPctRoute>6.9</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner iPaths="1" iCriticalPaths="0" sType="EndPoint">Paths for end point OUTt (SLICE_X0Y2.B2), 1 path
</twPathRptBanner><twPathRpt anchorID="22"><twConstPath anchorID="23" twDataPathType="twDataPathMinDelay" constType="period"><twSlack>0.671</twSlack><twSrc BELType="FF">CPUCLK</twSrc><twDest BELType="FF">OUTt</twDest><twTotPathDel>0.671</twTotPathDel><twClkSkew>0.000</twClkSkew><twDelConst>0.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="14" twPathCritProcCorner=" at Fast Process Corner"><twSrc BELType='FF'>CPUCLK</twSrc><twDest BELType='FF'>OUTt</twDest><twLogLvls>1</twLogLvls><twSrcSite>SLICE_X0Y2.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="10.000">FSBCLK</twSrcClk><twPathDel><twSite>SLICE_X0Y2.AQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twFalling">0.234</twDelInfo><twComp>OUTt_OBUF</twComp><twBEL>CPUCLK</twBEL></twPathDel><twPathDel><twSite>SLICE_X0Y2.B2</twSite><twDelType>net</twDelType><twFanCnt>3</twFanCnt><twDelInfo twEdge="twFalling">0.240</twDelInfo><twComp>CPUCLK_OBUF</twComp></twPathDel><twPathDel twHoldTime="TRUE"><twSite>SLICE_X0Y2.CLK</twSite><twDelType>Tah</twDelType><twDelInfo twEdge="twFalling">0.197</twDelInfo><twComp>OUTt_OBUF</twComp><twBEL>CPU_nAS_CPUCLKi_AND_2_o1</twBEL><twBEL>OUTt</twBEL></twPathDel><twLogDel>0.431</twLogDel><twRouteDel>0.240</twRouteDel><twTotDel>0.671</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="10.000">FSBCLK</twDestClk><twPctLog>64.2</twPctLog><twPctRoute>35.8</twPctRoute></twDetPath></twConstPath></twPathRpt><twPinLimitRpt anchorID="24"><twPinLimitBanner>Component Switching Limit Checks: PERIOD analysis for net &quot;instance_name/clkout0&quot; derived from
NET &quot;instance_name/clkin1&quot; PERIOD = 20 ns HIGH 50%;
divided by 2.00 to 10 nS
</twPinLimitBanner><twPinLimit anchorID="25" type="MINPERIOD" name="Tbcper_I" slack="7.334" period="10.000" constraintValue="10.000" deviceLimit="2.666" freqLimit="375.094" physResource="instance_name/clkout1_buf/I0" logResource="instance_name/clkout1_buf/I0" locationPin="BUFGMUX_X3Y13.I0" clockNet="instance_name/clkout0"/><twPinLimit anchorID="26" type="MINPERIOD" name="Tpllper_CLKOUT(Foutmax)" slack="8.948" period="10.000" constraintValue="10.000" deviceLimit="1.052" freqLimit="950.570" physResource="instance_name/pll_base_inst/PLL_ADV/CLKOUT0" logResource="instance_name/pll_base_inst/PLL_ADV/CLKOUT0" locationPin="PLL_ADV_X0Y1.CLKOUT0" clockNet="instance_name/clkout0"/><twPinLimit anchorID="27" type="MINPERIOD" name="Tcp" slack="9.520" period="10.000" constraintValue="10.000" deviceLimit="0.480" freqLimit="2083.333" physResource="OUTt_OBUF/CLK" logResource="CPUCLK/CK" locationPin="SLICE_X0Y2.CLK" clockNet="FSBCLK"/></twPinLimitRpt></twConst><twConst anchorID="28" twConstType="OFFSETINDELAY" ><twConstHead uID="2"><twConstName UCFConstName="NET CPU_nAS OFFSET = IN 8ns VALID 10ns BEFORE CLKIN;" ScopeName="">COMP &quot;CPU_nAS&quot; OFFSET = IN 8 ns VALID 10 ns BEFORE COMP &quot;CLKIN&quot;;</twConstName><twItemCnt>1</twItemCnt><twErrCntSetup>1</twErrCntSetup><twErrCntEndPt>1</twErrCntEndPt><twErrCntHold twRaceChecked="TRUE">0</twErrCntHold><twErrCntPinLimit>0</twErrCntPinLimit><twEndPtCnt>1</twEndPtCnt><twPathErrCnt>1</twPathErrCnt><twMinOff>8.358</twMinOff></twConstHead><twPathRptBanner iPaths="1" iCriticalPaths="1" sType="EndPoint">Paths for end point OUTt (SLICE_X0Y2.B5), 1 path
</twPathRptBanner><twPathRpt anchorID="29"><twConstOffIn anchorID="30" twDataPathType="twDataPathMaxDelay"><twSlack>-0.358</twSlack><twSrc BELType="PAD">CPU_nAS</twSrc><twDest BELType="FF">OUTt</twDest><twClkDel>-3.888</twClkDel><twClkSrc>CLKIN</twClkSrc><twClkDest>OUTt_OBUF</twClkDest><twOff>8.000</twOff><twOffSrc>CPU_nAS</twOffSrc><twOffDest>CLKIN</twOffDest><twClkUncert fSysJit="0.050" fDCMJit="0.287" fPhaseErr="0.267" sEqu="((TSJ^2 + DJ^2)^1/2) / 2 + PE">0.414</twClkUncert><twDataPath maxSiteLen="14" twPathCritProcCorner=" at Slow Process Corner"><twSrc BELType='PAD'>CPU_nAS</twSrc><twDest BELType='FF'>OUTt</twDest><twLogLvls>2</twLogLvls><twSrcSite>M4.PAD</twSrcSite><twPathDel><twSite>M4.I</twSite><twDelType>Tiopi</twDelType><twDelInfo twEdge="twFalling">1.557</twDelInfo><twComp>CPU_nAS</twComp><twBEL>CPU_nAS</twBEL><twBEL>CPU_nAS_IBUF</twBEL><twBEL>ProtoComp0.IMUX.1</twBEL></twPathDel><twPathDel><twSite>SLICE_X0Y2.B5</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twFalling">2.160</twDelInfo><twComp>CPU_nAS_IBUF</twComp></twPathDel><twPathDel><twSite>SLICE_X0Y2.CLK</twSite><twDelType>Tas</twDelType><twDelInfo twEdge="twFalling">0.339</twDelInfo><twComp>OUTt_OBUF</twComp><twBEL>CPU_nAS_CPUCLKi_AND_2_o1</twBEL><twBEL>OUTt</twBEL></twPathDel><twLogDel>1.896</twLogDel><twRouteDel>2.160</twRouteDel><twTotDel>4.056</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="0.000">FSBCLK</twDestClk><twPctLog>46.7</twPctLog><twPctRoute>53.3</twPctRoute></twDataPath><twClkPath maxSiteLen="20" twPathCritProcCorner=" at Slow Process Corner"><twSrc BELType='PAD'>CLKIN</twSrc><twDest BELType='FF'>OUTt</twDest><twLogLvls>4</twLogLvls><twSrcSite>J4.PAD</twSrcSite><twPathDel><twSite>J4.I</twSite><twDelType>Tiopi</twDelType><twDelInfo twEdge="twRising">0.902</twDelInfo><twComp>CLKIN</twComp><twBEL>CLKIN</twBEL><twBEL>instance_name/clkin1_buf</twBEL><twBEL>ProtoComp0.IMUX.3</twBEL></twPathDel><twPathDel><twSite>BUFIO2_X0Y23.I</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.368</twDelInfo><twComp>instance_name/clkin1</twComp></twPathDel><twPathDel><twSite>BUFIO2_X0Y23.DIVCLK</twSite><twDelType>Tbufcko_DIVCLK</twDelType><twDelInfo twEdge="twRising">0.179</twDelInfo><twComp>SP6_BUFIO2_INSERT_PLL1_ML_BUFIO2_0</twComp><twBEL>SP6_BUFIO2_INSERT_PLL1_ML_BUFIO2_0</twBEL></twPathDel><twPathDel><twSite>PLL_ADV_X0Y1.CLKIN2</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.733</twDelInfo><twComp>instance_name/pll_base_inst/PLL_ADV_ML_NEW_DIVCLK</twComp></twPathDel><twPathDel><twSite>PLL_ADV_X0Y1.CLKOUT0</twSite><twDelType>Tpllcko_CLK</twDelType><twDelInfo twEdge="twRising">-7.630</twDelInfo><twComp>instance_name/pll_base_inst/PLL_ADV</twComp><twBEL>instance_name/pll_base_inst/PLL_ADV</twBEL></twPathDel><twPathDel><twSite>BUFGMUX_X3Y13.I0</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.440</twDelInfo><twComp>instance_name/clkout0</twComp></twPathDel><twPathDel><twSite>BUFGMUX_X3Y13.O</twSite><twDelType>Tgi0o</twDelType><twDelInfo twEdge="twRising">0.197</twDelInfo><twComp>instance_name/clkout1_buf</twComp><twBEL>instance_name/clkout1_buf</twBEL></twPathDel><twPathDel><twSite>SLICE_X0Y2.CLK</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.923</twDelInfo><twComp>FSBCLK</twComp></twPathDel><twLogDel>-6.352</twLogDel><twRouteDel>2.464</twRouteDel><twTotDel>-3.888</twTotDel></twClkPath></twConstOffIn></twPathRpt><twPathRptBanner sType="PathClass">Hold Paths: COMP &quot;CPU_nAS&quot; OFFSET = IN 8 ns VALID 10 ns BEFORE COMP &quot;CLKIN&quot;;
</twPathRptBanner><twPathRptBanner iPaths="1" iCriticalPaths="1" sType="EndPoint">Paths for end point OUTt (SLICE_X0Y2.B5), 1 path
</twPathRptBanner><twPathRpt anchorID="31"><twConstOffIn anchorID="32" twDataPathType="twDataPathMinDelay"><twSlack>5.180</twSlack><twSrc BELType="PAD">CPU_nAS</twSrc><twDest BELType="FF">OUTt</twDest><twClkDel>-1.697</twClkDel><twClkSrc>CLKIN</twClkSrc><twClkDest>OUTt_OBUF</twClkDest><twOff>2.000</twOff><twOffSrc>CPU_nAS</twOffSrc><twOffDest>CLKIN</twOffDest><twClkUncert fSysJit="0.050" fDCMJit="0.287" fPhaseErr="0.267" sEqu="((TSJ^2 + DJ^2)^1/2) / 2 + PE">0.414</twClkUncert><twDataPath maxSiteLen="14" twPathCritProcCorner=" at Fast Process Corner"><twSrc BELType='PAD'>CPU_nAS</twSrc><twDest BELType='FF'>OUTt</twDest><twLogLvls>2</twLogLvls><twSrcSite>M4.PAD</twSrcSite><twPathDel><twSite>M4.I</twSite><twDelType>Tiopi</twDelType><twDelInfo twEdge="twRising">0.763</twDelInfo><twComp>CPU_nAS</twComp><twBEL>CPU_nAS</twBEL><twBEL>CPU_nAS_IBUF</twBEL><twBEL>ProtoComp0.IMUX.1</twBEL></twPathDel><twPathDel><twSite>SLICE_X0Y2.B5</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.937</twDelInfo><twComp>CPU_nAS_IBUF</twComp></twPathDel><twPathDel twHoldTime="TRUE"><twSite>SLICE_X0Y2.CLK</twSite><twDelType>Tah</twDelType><twDelInfo twEdge="twRising">0.197</twDelInfo><twComp>OUTt_OBUF</twComp><twBEL>CPU_nAS_CPUCLKi_AND_2_o1</twBEL><twBEL>OUTt</twBEL></twPathDel><twLogDel>0.960</twLogDel><twRouteDel>0.937</twRouteDel><twTotDel>1.897</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="0.000">FSBCLK</twDestClk><twPctLog>50.6</twPctLog><twPctRoute>49.4</twPctRoute></twDataPath><twClkPath maxSiteLen="20" twPathCritProcCorner=" at Fast Process Corner"><twSrc BELType='PAD'>CLKIN</twSrc><twDest BELType='FF'>OUTt</twDest><twLogLvls>4</twLogLvls><twSrcSite>J4.PAD</twSrcSite><twPathDel><twSite>J4.I</twSite><twDelType>Tiopi</twDelType><twDelInfo twEdge="twRising">0.367</twDelInfo><twComp>CLKIN</twComp><twBEL>CLKIN</twBEL><twBEL>instance_name/clkin1_buf</twBEL><twBEL>ProtoComp0.IMUX.3</twBEL></twPathDel><twPathDel><twSite>BUFIO2_X0Y23.I</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.230</twDelInfo><twComp>instance_name/clkin1</twComp></twPathDel><twPathDel><twSite>BUFIO2_X0Y23.DIVCLK</twSite><twDelType>Tbufcko_DIVCLK</twDelType><twDelInfo twEdge="twRising">0.130</twDelInfo><twComp>SP6_BUFIO2_INSERT_PLL1_ML_BUFIO2_0</twComp><twBEL>SP6_BUFIO2_INSERT_PLL1_ML_BUFIO2_0</twBEL></twPathDel><twPathDel><twSite>PLL_ADV_X0Y1.CLKIN2</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.296</twDelInfo><twComp>instance_name/pll_base_inst/PLL_ADV_ML_NEW_DIVCLK</twComp></twPathDel><twPathDel><twSite>PLL_ADV_X0Y1.CLKOUT0</twSite><twDelType>Tpllcko_CLK</twDelType><twDelInfo twEdge="twRising">-3.826</twDelInfo><twComp>instance_name/pll_base_inst/PLL_ADV</twComp><twBEL>instance_name/pll_base_inst/PLL_ADV</twBEL></twPathDel><twPathDel><twSite>BUFGMUX_X3Y13.I0</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.178</twDelInfo><twComp>instance_name/clkout0</twComp></twPathDel><twPathDel><twSite>BUFGMUX_X3Y13.O</twSite><twDelType>Tgi0o</twDelType><twDelInfo twEdge="twRising">0.063</twDelInfo><twComp>instance_name/clkout1_buf</twComp><twBEL>instance_name/clkout1_buf</twBEL></twPathDel><twPathDel><twSite>SLICE_X0Y2.CLK</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.865</twDelInfo><twComp>FSBCLK</twComp></twPathDel><twLogDel>-3.266</twLogDel><twRouteDel>1.569</twRouteDel><twTotDel>-1.697</twTotDel></twClkPath></twConstOffIn></twPathRpt></twConst><twConst anchorID="33" twConstType="OFFSETINDELAY" ><twConstHead uID="3"><twConstName UCFConstName="NET INt OFFSET = IN 8ns VALID 10ns BEFORE CLKIN;" ScopeName="">COMP &quot;INt&quot; OFFSET = IN 8 ns VALID 10 ns BEFORE COMP &quot;CLKIN&quot;;</twConstName><twItemCnt>1</twItemCnt><twErrCntSetup>1</twErrCntSetup><twErrCntEndPt>1</twErrCntEndPt><twErrCntHold twRaceChecked="TRUE">0</twErrCntHold><twErrCntPinLimit>0</twErrCntPinLimit><twEndPtCnt>1</twEndPtCnt><twPathErrCnt>1</twPathErrCnt><twMinOff>8.322</twMinOff></twConstHead><twPathRptBanner iPaths="1" iCriticalPaths="1" sType="EndPoint">Paths for end point OUTt (SLICE_X0Y2.B6), 1 path
</twPathRptBanner><twPathRpt anchorID="34"><twConstOffIn anchorID="35" twDataPathType="twDataPathMaxDelay"><twSlack>-0.322</twSlack><twSrc BELType="PAD">INt</twSrc><twDest BELType="FF">OUTt</twDest><twClkDel>-3.888</twClkDel><twClkSrc>CLKIN</twClkSrc><twClkDest>OUTt_OBUF</twClkDest><twOff>8.000</twOff><twOffSrc>INt</twOffSrc><twOffDest>CLKIN</twOffDest><twClkUncert fSysJit="0.050" fDCMJit="0.287" fPhaseErr="0.267" sEqu="((TSJ^2 + DJ^2)^1/2) / 2 + PE">0.414</twClkUncert><twDataPath maxSiteLen="14" twPathCritProcCorner=" at Slow Process Corner"><twSrc BELType='PAD'>INt</twSrc><twDest BELType='FF'>OUTt</twDest><twLogLvls>2</twLogLvls><twSrcSite>N4.PAD</twSrcSite><twPathDel><twSite>N4.I</twSite><twDelType>Tiopi</twDelType><twDelInfo twEdge="twFalling">1.557</twDelInfo><twComp>INt</twComp><twBEL>INt</twBEL><twBEL>INt_IBUF</twBEL><twBEL>ProtoComp0.IMUX.2</twBEL></twPathDel><twPathDel><twSite>SLICE_X0Y2.B6</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twFalling">2.124</twDelInfo><twComp>INt_IBUF</twComp></twPathDel><twPathDel><twSite>SLICE_X0Y2.CLK</twSite><twDelType>Tas</twDelType><twDelInfo twEdge="twFalling">0.339</twDelInfo><twComp>OUTt_OBUF</twComp><twBEL>CPU_nAS_CPUCLKi_AND_2_o1</twBEL><twBEL>OUTt</twBEL></twPathDel><twLogDel>1.896</twLogDel><twRouteDel>2.124</twRouteDel><twTotDel>4.020</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="0.000">FSBCLK</twDestClk><twPctLog>47.2</twPctLog><twPctRoute>52.8</twPctRoute></twDataPath><twClkPath maxSiteLen="20" twPathCritProcCorner=" at Slow Process Corner"><twSrc BELType='PAD'>CLKIN</twSrc><twDest BELType='FF'>OUTt</twDest><twLogLvls>4</twLogLvls><twSrcSite>J4.PAD</twSrcSite><twPathDel><twSite>J4.I</twSite><twDelType>Tiopi</twDelType><twDelInfo twEdge="twRising">0.902</twDelInfo><twComp>CLKIN</twComp><twBEL>CLKIN</twBEL><twBEL>instance_name/clkin1_buf</twBEL><twBEL>ProtoComp0.IMUX.3</twBEL></twPathDel><twPathDel><twSite>BUFIO2_X0Y23.I</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.368</twDelInfo><twComp>instance_name/clkin1</twComp></twPathDel><twPathDel><twSite>BUFIO2_X0Y23.DIVCLK</twSite><twDelType>Tbufcko_DIVCLK</twDelType><twDelInfo twEdge="twRising">0.179</twDelInfo><twComp>SP6_BUFIO2_INSERT_PLL1_ML_BUFIO2_0</twComp><twBEL>SP6_BUFIO2_INSERT_PLL1_ML_BUFIO2_0</twBEL></twPathDel><twPathDel><twSite>PLL_ADV_X0Y1.CLKIN2</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.733</twDelInfo><twComp>instance_name/pll_base_inst/PLL_ADV_ML_NEW_DIVCLK</twComp></twPathDel><twPathDel><twSite>PLL_ADV_X0Y1.CLKOUT0</twSite><twDelType>Tpllcko_CLK</twDelType><twDelInfo twEdge="twRising">-7.630</twDelInfo><twComp>instance_name/pll_base_inst/PLL_ADV</twComp><twBEL>instance_name/pll_base_inst/PLL_ADV</twBEL></twPathDel><twPathDel><twSite>BUFGMUX_X3Y13.I0</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.440</twDelInfo><twComp>instance_name/clkout0</twComp></twPathDel><twPathDel><twSite>BUFGMUX_X3Y13.O</twSite><twDelType>Tgi0o</twDelType><twDelInfo twEdge="twRising">0.197</twDelInfo><twComp>instance_name/clkout1_buf</twComp><twBEL>instance_name/clkout1_buf</twBEL></twPathDel><twPathDel><twSite>SLICE_X0Y2.CLK</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.923</twDelInfo><twComp>FSBCLK</twComp></twPathDel><twLogDel>-6.352</twLogDel><twRouteDel>2.464</twRouteDel><twTotDel>-3.888</twTotDel></twClkPath></twConstOffIn></twPathRpt><twPathRptBanner sType="PathClass">Hold Paths: COMP &quot;INt&quot; OFFSET = IN 8 ns VALID 10 ns BEFORE COMP &quot;CLKIN&quot;;
</twPathRptBanner><twPathRptBanner iPaths="1" iCriticalPaths="1" sType="EndPoint">Paths for end point OUTt (SLICE_X0Y2.B6), 1 path
</twPathRptBanner><twPathRpt anchorID="36"><twConstOffIn anchorID="37" twDataPathType="twDataPathMinDelay"><twSlack>5.166</twSlack><twSrc BELType="PAD">INt</twSrc><twDest BELType="FF">OUTt</twDest><twClkDel>-1.697</twClkDel><twClkSrc>CLKIN</twClkSrc><twClkDest>OUTt_OBUF</twClkDest><twOff>2.000</twOff><twOffSrc>INt</twOffSrc><twOffDest>CLKIN</twOffDest><twClkUncert fSysJit="0.050" fDCMJit="0.287" fPhaseErr="0.267" sEqu="((TSJ^2 + DJ^2)^1/2) / 2 + PE">0.414</twClkUncert><twDataPath maxSiteLen="14" twPathCritProcCorner=" at Fast Process Corner"><twSrc BELType='PAD'>INt</twSrc><twDest BELType='FF'>OUTt</twDest><twLogLvls>2</twLogLvls><twSrcSite>N4.PAD</twSrcSite><twPathDel><twSite>N4.I</twSite><twDelType>Tiopi</twDelType><twDelInfo twEdge="twRising">0.763</twDelInfo><twComp>INt</twComp><twBEL>INt</twBEL><twBEL>INt_IBUF</twBEL><twBEL>ProtoComp0.IMUX.2</twBEL></twPathDel><twPathDel><twSite>SLICE_X0Y2.B6</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.923</twDelInfo><twComp>INt_IBUF</twComp></twPathDel><twPathDel twHoldTime="TRUE"><twSite>SLICE_X0Y2.CLK</twSite><twDelType>Tah</twDelType><twDelInfo twEdge="twRising">0.197</twDelInfo><twComp>OUTt_OBUF</twComp><twBEL>CPU_nAS_CPUCLKi_AND_2_o1</twBEL><twBEL>OUTt</twBEL></twPathDel><twLogDel>0.960</twLogDel><twRouteDel>0.923</twRouteDel><twTotDel>1.883</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="0.000">FSBCLK</twDestClk><twPctLog>51.0</twPctLog><twPctRoute>49.0</twPctRoute></twDataPath><twClkPath maxSiteLen="20" twPathCritProcCorner=" at Fast Process Corner"><twSrc BELType='PAD'>CLKIN</twSrc><twDest BELType='FF'>OUTt</twDest><twLogLvls>4</twLogLvls><twSrcSite>J4.PAD</twSrcSite><twPathDel><twSite>J4.I</twSite><twDelType>Tiopi</twDelType><twDelInfo twEdge="twRising">0.367</twDelInfo><twComp>CLKIN</twComp><twBEL>CLKIN</twBEL><twBEL>instance_name/clkin1_buf</twBEL><twBEL>ProtoComp0.IMUX.3</twBEL></twPathDel><twPathDel><twSite>BUFIO2_X0Y23.I</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.230</twDelInfo><twComp>instance_name/clkin1</twComp></twPathDel><twPathDel><twSite>BUFIO2_X0Y23.DIVCLK</twSite><twDelType>Tbufcko_DIVCLK</twDelType><twDelInfo twEdge="twRising">0.130</twDelInfo><twComp>SP6_BUFIO2_INSERT_PLL1_ML_BUFIO2_0</twComp><twBEL>SP6_BUFIO2_INSERT_PLL1_ML_BUFIO2_0</twBEL></twPathDel><twPathDel><twSite>PLL_ADV_X0Y1.CLKIN2</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.296</twDelInfo><twComp>instance_name/pll_base_inst/PLL_ADV_ML_NEW_DIVCLK</twComp></twPathDel><twPathDel><twSite>PLL_ADV_X0Y1.CLKOUT0</twSite><twDelType>Tpllcko_CLK</twDelType><twDelInfo twEdge="twRising">-3.826</twDelInfo><twComp>instance_name/pll_base_inst/PLL_ADV</twComp><twBEL>instance_name/pll_base_inst/PLL_ADV</twBEL></twPathDel><twPathDel><twSite>BUFGMUX_X3Y13.I0</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.178</twDelInfo><twComp>instance_name/clkout0</twComp></twPathDel><twPathDel><twSite>BUFGMUX_X3Y13.O</twSite><twDelType>Tgi0o</twDelType><twDelInfo twEdge="twRising">0.063</twDelInfo><twComp>instance_name/clkout1_buf</twComp><twBEL>instance_name/clkout1_buf</twBEL></twPathDel><twPathDel><twSite>SLICE_X0Y2.CLK</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.865</twDelInfo><twComp>FSBCLK</twComp></twPathDel><twLogDel>-3.266</twLogDel><twRouteDel>1.569</twRouteDel><twTotDel>-1.697</twTotDel></twClkPath></twConstOffIn></twPathRpt></twConst><twConst anchorID="38" twConstType="OFFSETOUTDELAY" ><twConstHead uID="4"><twConstName UCFConstName="NET OUTt OFFSET = OUT 7ns AFTER CLKIN;" ScopeName="">COMP &quot;OUTt&quot; OFFSET = OUT 7 ns AFTER COMP &quot;CLKIN&quot;;</twConstName><twItemCnt>1</twItemCnt><twErrCntSetup>0</twErrCntSetup><twErrCntEndPt>0</twErrCntEndPt><twErrCntHold twRaceChecked="FALSE">0</twErrCntHold><twErrCntPinLimit>0</twErrCntPinLimit><twEndPtCnt>1</twEndPtCnt><twPathErrCnt>0</twPathErrCnt><twMinOff>1.078</twMinOff></twConstHead><twPathRptBanner iPaths="1" iCriticalPaths="0" sType="EndPoint">Paths for end point OUTt (M5.PAD), 1 path
</twPathRptBanner><twPathRpt anchorID="39"><twConstOffOut anchorID="40" twDataPathType="twDataPathMaxDelay"><twSlack>5.922</twSlack><twSrc BELType="FF">OUTt</twSrc><twDest BELType="PAD">OUTt</twDest><twClkDel>-4.160</twClkDel><twClkSrc>CLKIN</twClkSrc><twClkDest>OUTt_OBUF</twClkDest><twDataDel>4.824</twDataDel><twDataSrc>OUTt_OBUF</twDataSrc><twDataDest>OUTt</twDataDest><twOff>7.000</twOff><twOffSrc>CLKIN</twOffSrc><twOffDest>OUTt</twOffDest><twClkUncert fSysJit="0.050" fDCMJit="0.287" fPhaseErr="0.267" sEqu="((TSJ^2 + DJ^2)^1/2) / 2 + PE">0.414</twClkUncert><twClkPath maxSiteLen="20" twPathCritProcCorner=" at Slow Process Corner"><twSrc BELType='PAD'>CLKIN</twSrc><twDest BELType='FF'>OUTt</twDest><twLogLvls>4</twLogLvls><twSrcSite>J4.PAD</twSrcSite><twPathDel><twSite>J4.I</twSite><twDelType>Tiopi</twDelType><twDelInfo twEdge="twRising">1.037</twDelInfo><twComp>CLKIN</twComp><twBEL>CLKIN</twBEL><twBEL>instance_name/clkin1_buf</twBEL><twBEL>ProtoComp0.IMUX.3</twBEL></twPathDel><twPathDel><twSite>BUFIO2_X0Y23.I</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.643</twDelInfo><twComp>instance_name/clkin1</twComp></twPathDel><twPathDel><twSite>BUFIO2_X0Y23.DIVCLK</twSite><twDelType>Tbufcko_DIVCLK</twDelType><twDelInfo twEdge="twRising">0.190</twDelInfo><twComp>SP6_BUFIO2_INSERT_PLL1_ML_BUFIO2_0</twComp><twBEL>SP6_BUFIO2_INSERT_PLL1_ML_BUFIO2_0</twBEL></twPathDel><twPathDel><twSite>PLL_ADV_X0Y1.CLKIN2</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.842</twDelInfo><twComp>instance_name/pll_base_inst/PLL_ADV_ML_NEW_DIVCLK</twComp></twPathDel><twPathDel><twSite>PLL_ADV_X0Y1.CLKOUT0</twSite><twDelType>Tpllcko_CLK</twDelType><twDelInfo twEdge="twRising">-9.093</twDelInfo><twComp>instance_name/pll_base_inst/PLL_ADV</twComp><twBEL>instance_name/pll_base_inst/PLL_ADV</twBEL></twPathDel><twPathDel><twSite>BUFGMUX_X3Y13.I0</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.505</twDelInfo><twComp>instance_name/clkout0</twComp></twPathDel><twPathDel><twSite>BUFGMUX_X3Y13.O</twSite><twDelType>Tgi0o</twDelType><twDelInfo twEdge="twRising">0.209</twDelInfo><twComp>instance_name/clkout1_buf</twComp><twBEL>instance_name/clkout1_buf</twBEL></twPathDel><twPathDel><twSite>SLICE_X0Y2.CLK</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">1.507</twDelInfo><twComp>FSBCLK</twComp></twPathDel><twLogDel>-7.657</twLogDel><twRouteDel>3.497</twRouteDel><twTotDel>-4.160</twTotDel></twClkPath><twDataPath maxSiteLen="13" twPathCritProcCorner=" at Slow Process Corner"><twSrc BELType='FF'>OUTt</twSrc><twDest BELType='PAD'>OUTt</twDest><twLogLvls>1</twLogLvls><twSrcSite>SLICE_X0Y2.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">FSBCLK</twSrcClk><twPathDel><twSite>SLICE_X0Y2.BQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.525</twDelInfo><twComp>OUTt_OBUF</twComp><twBEL>OUTt</twBEL></twPathDel><twPathDel><twSite>M5.O</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">2.317</twDelInfo><twComp>OUTt_OBUF</twComp></twPathDel><twPathDel><twSite>M5.PAD</twSite><twDelType>Tioop</twDelType><twDelInfo twEdge="twRising">1.982</twDelInfo><twComp>OUTt</twComp><twBEL>OUTt_OBUF</twBEL><twBEL>OUTt</twBEL></twPathDel><twLogDel>2.507</twLogDel><twRouteDel>2.317</twRouteDel><twTotDel>4.824</twTotDel><twPctLog>52.0</twPctLog><twPctRoute>48.0</twPctRoute></twDataPath></twConstOffOut></twPathRpt><twPathRptBanner sType="PathClass">Fastest Paths: COMP &quot;OUTt&quot; OFFSET = OUT 7 ns AFTER COMP &quot;CLKIN&quot;;
</twPathRptBanner><twPathRptBanner iPaths="1" iCriticalPaths="0" sType="EndPoint">Paths for end point OUTt (M5.PAD), 1 path
</twPathRptBanner><twPathRpt anchorID="41"><twConstOffOut anchorID="42" twDataPathType="twDataPathMinDelay"><twSlack>-0.047</twSlack><twSrc BELType="FF">OUTt</twSrc><twDest BELType="PAD">OUTt</twDest><twClkDel>-1.603</twClkDel><twClkSrc>CLKIN</twClkSrc><twClkDest>OUTt_OBUF</twClkDest><twDataDel>1.970</twDataDel><twDataSrc>OUTt_OBUF</twDataSrc><twDataDest>OUTt</twDataDest><twOff>7.000</twOff><twOffSrc>CLKIN</twOffSrc><twOffDest>OUTt</twOffDest><twClkUncert fSysJit="0.050" fDCMJit="0.287" fPhaseErr="0.267" sEqu="((TSJ^2 + DJ^2)^1/2) / 2 + PE">0.414</twClkUncert><twClkPath maxSiteLen="20" twPathCritProcCorner=" at Fast Process Corner"><twSrc BELType='PAD'>CLKIN</twSrc><twDest BELType='FF'>OUTt</twDest><twLogLvls>4</twLogLvls><twSrcSite>J4.PAD</twSrcSite><twPathDel><twSite>J4.I</twSite><twDelType>Tiopi</twDelType><twDelInfo twEdge="twRising">0.321</twDelInfo><twComp>CLKIN</twComp><twBEL>CLKIN</twBEL><twBEL>instance_name/clkin1_buf</twBEL><twBEL>ProtoComp0.IMUX.3</twBEL></twPathDel><twPathDel><twSite>BUFIO2_X0Y23.I</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.220</twDelInfo><twComp>instance_name/clkin1</twComp></twPathDel><twPathDel><twSite>BUFIO2_X0Y23.DIVCLK</twSite><twDelType>Tbufcko_DIVCLK</twDelType><twDelInfo twEdge="twRising">0.122</twDelInfo><twComp>SP6_BUFIO2_INSERT_PLL1_ML_BUFIO2_0</twComp><twBEL>SP6_BUFIO2_INSERT_PLL1_ML_BUFIO2_0</twBEL></twPathDel><twPathDel><twSite>PLL_ADV_X0Y1.CLKIN2</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.263</twDelInfo><twComp>instance_name/pll_base_inst/PLL_ADV_ML_NEW_DIVCLK</twComp></twPathDel><twPathDel><twSite>PLL_ADV_X0Y1.CLKOUT0</twSite><twDelType>Tpllcko_CLK</twDelType><twDelInfo twEdge="twRising">-3.310</twDelInfo><twComp>instance_name/pll_base_inst/PLL_ADV</twComp><twBEL>instance_name/pll_base_inst/PLL_ADV</twBEL></twPathDel><twPathDel><twSite>BUFGMUX_X3Y13.I0</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.158</twDelInfo><twComp>instance_name/clkout0</twComp></twPathDel><twPathDel><twSite>BUFGMUX_X3Y13.O</twSite><twDelType>Tgi0o</twDelType><twDelInfo twEdge="twRising">0.059</twDelInfo><twComp>instance_name/clkout1_buf</twComp><twBEL>instance_name/clkout1_buf</twBEL></twPathDel><twPathDel><twSite>SLICE_X0Y2.CLK</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.564</twDelInfo><twComp>FSBCLK</twComp></twPathDel><twLogDel>-2.808</twLogDel><twRouteDel>1.205</twRouteDel><twTotDel>-1.603</twTotDel></twClkPath><twDataPath maxSiteLen="13" twPathCritProcCorner=" at Fast Process Corner"><twSrc BELType='FF'>OUTt</twSrc><twDest BELType='PAD'>OUTt</twDest><twLogLvls>1</twLogLvls><twSrcSite>SLICE_X0Y2.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">FSBCLK</twSrcClk><twPathDel><twSite>SLICE_X0Y2.BQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.234</twDelInfo><twComp>OUTt_OBUF</twComp><twBEL>OUTt</twBEL></twPathDel><twPathDel><twSite>M5.O</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">1.037</twDelInfo><twComp>OUTt_OBUF</twComp></twPathDel><twPathDel><twSite>M5.PAD</twSite><twDelType>Tioop</twDelType><twDelInfo twEdge="twRising">0.699</twDelInfo><twComp>OUTt</twComp><twBEL>OUTt_OBUF</twBEL><twBEL>OUTt</twBEL></twPathDel><twLogDel>0.933</twLogDel><twRouteDel>1.037</twRouteDel><twTotDel>1.970</twTotDel><twPctLog>47.4</twPctLog><twPctRoute>52.6</twPctRoute></twDataPath></twConstOffOut></twPathRpt></twConst><twConstRollupTable uID="1" anchorID="43"><twConstRollup name="instance_name/clkin1" fullName="NET &quot;instance_name/clkin1&quot; PERIOD = 20 ns HIGH 50%;" type="origin" depth="0" requirement="20.000" prefType="period" actual="5.000" actualRollup="5.332" errors="0" errorRollup="0" items="0" itemsRollup="2"/><twConstRollup name="instance_name/clkfbout" fullName="PERIOD analysis for net &quot;instance_name/clkfbout&quot; derived from NET &quot;instance_name/clkin1&quot; PERIOD = 20 ns HIGH 50%; duty cycle corrected to 20 nS HIGH 10 nS " type="child" depth="1" requirement="20.000" prefType="period" actual="2.666" actualRollup="N/A" errors="0" errorRollup="0" items="0" itemsRollup="0"/><twConstRollup name="instance_name/clkout0" fullName="PERIOD analysis for net &quot;instance_name/clkout0&quot; derived from NET &quot;instance_name/clkin1&quot; PERIOD = 20 ns HIGH 50%; divided by 2.00 to 10 nS " type="child" depth="1" requirement="10.000" prefType="period" actual="2.666" actualRollup="N/A" errors="0" errorRollup="0" items="2" itemsRollup="0"/></twConstRollupTable><twUnmetConstCnt anchorID="44">2</twUnmetConstCnt><twDataSheet anchorID="45" twNameLen="15"><twSUH2ClkList anchorID="46" twDestWidth="7" twPhaseWidth="6"><twDest>CLKIN</twDest><twSUH2Clk ><twSrc>CPU_nAS</twSrc><twSUHTime twInternalClk ="FSBCLK" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">8.358</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="t">-3.180</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>INt</twSrc><twSUHTime twInternalClk ="FSBCLK" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">8.322</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="t">-3.166</twH2ClkTime></twSUHTime></twSUH2Clk></twSUH2ClkList><twClk2OutList anchorID="47" twDestWidth="4" twPhaseWidth="6"><twSrc>CLKIN</twSrc><twClk2Out twOutPad = "OUTt" twMinTime = "-0.047" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "1.078" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out></twClk2OutList><twClk2SUList anchorID="48" twDestWidth="5"><twDest>CLKIN</twDest><twClk2SU><twSrc>CLKIN</twSrc><twRiseRise>1.553</twRiseRise></twClk2SU></twClk2SUList><twOffsetTables><twOffsetInTable anchorID="49" twDestWidth="7" twWorstWindow="5.178" twWorstSetup="8.358" twWorstHold="-3.180" twWorstSetupSlack="-0.358" twWorstHoldSlack="5.180" ><twConstName>COMP &quot;CPU_nAS&quot; OFFSET = IN 8 ns VALID 10 ns BEFORE COMP &quot;CLKIN&quot;;</twConstName><twOffInTblRow ><twSrc>CPU_nAS</twSrc><twSUHSlackTime twSetupSlack = "-0.358" twHoldSlack = "5.180" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">8.358</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="t">-3.180</twH2ClkTime></twSUHSlackTime></twOffInTblRow></twOffsetInTable><twOffsetInTable anchorID="50" twDestWidth="3" twWorstWindow="5.156" twWorstSetup="8.322" twWorstHold="-3.166" twWorstSetupSlack="-0.322" twWorstHoldSlack="5.166" ><twConstName>COMP &quot;INt&quot; OFFSET = IN 8 ns VALID 10 ns BEFORE COMP &quot;CLKIN&quot;;</twConstName><twOffInTblRow ><twSrc>INt</twSrc><twSUHSlackTime twSetupSlack = "-0.322" twHoldSlack = "5.166" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">8.322</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="t">-3.166</twH2ClkTime></twSUHSlackTime></twOffInTblRow></twOffsetInTable><twOffsetOutTable anchorID="51" twDestWidth="4" twMinSlack="5.922" twMaxSlack="5.922" twRelSkew="0.000" ><twConstName>COMP &quot;OUTt&quot; OFFSET = OUT 7 ns AFTER COMP &quot;CLKIN&quot;;</twConstName><twOffOutTblRow twOutPad = "OUTt" twSlack = "1.078" twMaxDelayCrnr="f" twMinDelay = "-0.047" twMinDelayCrnr="t" twRelSkew = "0.000" ></twOffOutTblRow></twOffsetOutTable></twOffsetTables></twDataSheet></twVerboseRpt></twBody><twSum anchorID="52"><twErrCnt>2</twErrCnt><twScore>680</twScore><twSetupScore>680</twSetupScore><twHoldScore>0</twHoldScore><twConstCov><twPathCnt>5</twPathCnt><twNetCnt>0</twNetCnt><twConnCnt>14</twConnCnt></twConstCov><twStats anchorID="53"><twMinPer>5.000</twMinPer><twFootnote number="1" /><twMaxFreq>200.000</twMaxFreq><twMinInBeforeClk>8.358</twMinInBeforeClk><twMinOutAfterClk>1.078</twMinOutAfterClk></twStats></twSum><twFoot><twFootnoteExplanation number="1" text="The minimum period statistic assumes all single cycle delays."></twFootnoteExplanation><twTimestamp>Fri Oct 29 10:38:22 2021 </twTimestamp></twFoot><twClientInfo anchorID="54"><twClientName>Trace</twClientName><twAttrList><twAttrListItem><twName>Trace Settings</twName><twValue>
Peak Memory Usage: 167 MB
</twValue></twAttrListItem></twAttrList></twClientInfo></twReport>
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