MXSE Project Status (03/27/2022 - 10:12:15)
Project File: WarpSE.xise Parser Errors: No Errors
Module Name: MXSE Implementation State: Fitted
Target Device: xc95144xl-10TQ100
  • Errors:
No Errors
Product Version:ISE 14.7
  • Warnings:
5 Warnings (0 new)
Design Goal: Balanced
  • Routing Results:
 
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
 
Environment: System Settings
  • Final Timing Score:
  
 
Current Errors [-]
No Errors Found
 
Current Warnings [-]
Synthesis WarningsNew
WARNING:Xst:647: - Input <SW<2>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. 
WARNING:Xst:1426: - The value init of the FF/Latch 0 hinder the constant cleaning in the block RESDone. You should achieve better results by setting this init to 1. 
WARNING:Xst:1426: - The value init of the FF/Latch 0 hinder the constant cleaning in the block Disable. You should achieve better results by setting this init to 1. 
WARNING:Xst:1426: - The value init of the FF/Latch RESDone hinder the constant cleaning in the block MXSE. You should achieve better results by setting this init to 1. 
WARNING:Xst:1426: - The value init of the FF/Latch Disable hinder the constant cleaning in the block MXSE. You should achieve better results by setting this init to 1. 
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis ReportCurrentSun Mar 27 10:07:11 202205 Warnings (0 new)0
Translation ReportCurrentSun Mar 27 10:07:43 2022000
CPLD Fitter Report (Text)CurrentSun Mar 27 10:08:18 202202 Warnings (1 new)3 Infos (3 new)
Power Report     
 
Secondary Reports [-]
Report NameStatusGenerated
Post-Fit Simulation Model Report  

Date Generated: 03/27/2022 - 10:12:16