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Fix I/O slowdown

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This commit is contained in:
Zane Kaminski 2024-09-24 01:11:57 -04:00
parent b8ef4d9428
commit 085ee1b13c
43 changed files with 3210 additions and 3161 deletions
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2
cpld/CNT.v
View File

@ -74,7 +74,7 @@ module CNT(
* QoS enable period is 28.124 us - 42.240 us */
reg [1:0] QS;
always @(posedge CLK) begin
if (nRESr || QoSCSr) QS[1:0] <= 1;
if (!nRESr || QoSCSr) QS[1:0] <= 1;
else if (QS==0) QS[1:0] <= 0;
else if (EFall && TimerTC) QS[1:0] <= QS+1;
end

2
cpld/CS.v
View File

@ -43,7 +43,7 @@ module CS(
//A[15:12]==4'hB || // 4096 bytes video
//A[15:12]==4'hC || // 4096 bytes video
//A[15:12]==4'hD || // 4096 bytes video
//A[15:12]==4'hE || // 4096 bytes videoz
//A[15:12]==4'hE || // 4096 bytes video
//A[15:12]==4'hF); // 3200 bytes video, 128 bytes RAM (system error space), 768 bytes sound
wire SndRAMCSWR = VidRAMCSWR64k && (
((A[15:12]==4'hF) && (A[11:8]==4'hD || A[11:8]==4'hE || A[11:8]==4'hF)) ||

6
cpld/XC95144XL/WarpSE.bld
View File

@ -28,10 +28,10 @@ NGDBUILD Design Results Summary:
Number of errors: 0
Number of warnings: 0
Total memory usage is 115060 kilobytes
Total memory usage is 118528 kilobytes
Writing NGD file "WarpSE.ngd" ...
Total REAL time to NGDBUILD completion: 23 sec
Total CPU time to NGDBUILD completion: 19 sec
Total REAL time to NGDBUILD completion: 25 sec
Total CPU time to NGDBUILD completion: 17 sec
Writing NGDBUILD log file "WarpSE.bld"...

30
cpld/XC95144XL/WarpSE.cmd_log
View File

@ -10,3 +10,33 @@ cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt
XSLTProcess WarpSE_build.xml
tsim -intstyle ise WarpSE WarpSE.nga
hprep6 -s IEEE1149 -n WarpSE -i WarpSE
xst -intstyle ise -ifn "Z:/Repos/WarpSE/cpld/XC95144XL/WarpSE.xst" -ofn "Z:/Repos/WarpSE/cpld/XC95144XL/WarpSE.syr"
ngdbuild -intstyle ise -dd _ngo -uc Z:/Repos/WarpSE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper WarpSE.ngd
XSLTProcess WarpSE_build.xml
tsim -intstyle ise WarpSE WarpSE.nga
hprep6 -s IEEE1149 -n WarpSE -i WarpSE
xst -intstyle ise -ifn "Z:/Repos/WarpSE/cpld/XC95144XL/WarpSE.xst" -ofn "Z:/Repos/WarpSE/cpld/XC95144XL/WarpSE.syr"
ngdbuild -intstyle ise -dd _ngo -uc Z:/Repos/WarpSE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper WarpSE.ngd
XSLTProcess WarpSE_build.xml
tsim -intstyle ise WarpSE WarpSE.nga
hprep6 -s IEEE1149 -n WarpSE -i WarpSE
xst -intstyle ise -ifn "Z:/Repos/WarpSE/cpld/XC95144XL/WarpSE.xst" -ofn "Z:/Repos/WarpSE/cpld/XC95144XL/WarpSE.syr"
ngdbuild -intstyle ise -dd _ngo -uc Z:/Repos/WarpSE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper WarpSE.ngd
XSLTProcess WarpSE_build.xml
tsim -intstyle ise WarpSE WarpSE.nga
hprep6 -s IEEE1149 -n WarpSE -i WarpSE
xst -intstyle ise -ifn "Z:/Repos/WarpSE/cpld/XC95144XL/WarpSE.xst" -ofn "Z:/Repos/WarpSE/cpld/XC95144XL/WarpSE.syr"
ngdbuild -intstyle ise -dd _ngo -uc Z:/Repos/WarpSE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper WarpSE.ngd
XSLTProcess WarpSE_build.xml
tsim -intstyle ise WarpSE WarpSE.nga
hprep6 -s IEEE1149 -n WarpSE -i WarpSE
xst -intstyle ise -ifn "Z:/Repos/WarpSE/cpld/XC95144XL/WarpSE.xst" -ofn "Z:/Repos/WarpSE/cpld/XC95144XL/WarpSE.syr"
ngdbuild -intstyle ise -dd _ngo -uc Z:/Repos/WarpSE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd
cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper WarpSE.ngd
XSLTProcess WarpSE_build.xml
tsim -intstyle ise WarpSE WarpSE.nga
hprep6 -s IEEE1149 -n WarpSE -i WarpSE

30
cpld/XC95144XL/WarpSE.gise
View File

@ -45,9 +45,11 @@
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="WarpSE.xml"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST" xil_pn:name="WarpSE.xst"/>
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="WarpSE_build.xml"/>
<file xil_pn:fileType="FILE_HTML" xil_pn:name="WarpSE_envsettings.html"/>
<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="WarpSE_html"/>
<file xil_pn:fileType="FILE_XRPT" xil_pn:name="WarpSE_ngdbuild.xrpt"/>
<file xil_pn:fileType="FILE_PAD_EXCEL_REPORT" xil_pn:name="WarpSE_pad.csv"/>
<file xil_pn:fileType="FILE_HTML" xil_pn:name="WarpSE_summary.html"/>
<file xil_pn:fileType="FILE_XRPT" xil_pn:name="WarpSE_xst.xrpt"/>
<file xil_pn:fileType="FILE_CMD" xil_pn:name="_impact.cmd"/>
<file xil_pn:fileType="FILE_LOG" xil_pn:name="_impact.log"/>
@ -62,20 +64,18 @@
</files>
<transforms xmlns="http://www.xilinx.com/XMLSchema">
<transform xil_pn:end_ts="1727078798" xil_pn:name="TRAN_copyInitialToXSTAbstractSynthesis" xil_pn:start_ts="1727078795">
<transform xil_pn:end_ts="1727168014" xil_pn:name="TRAN_copyInitialToXSTAbstractSynthesis" xil_pn:start_ts="1727168014">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1727078798" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-8819683973431472423" xil_pn:start_ts="1727078798">
<transform xil_pn:end_ts="1727168014" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-8819683973431472423" xil_pn:start_ts="1727168014">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1727078886" xil_pn:in_ck="5474524715461797957" xil_pn:name="TRANEXT_xstsynthesize_xc9500xl" xil_pn:prop_ck="-827049739915084467" xil_pn:start_ts="1727078798">
<transform xil_pn:end_ts="1727168122" xil_pn:in_ck="5474524715461797957" xil_pn:name="TRANEXT_xstsynthesize_xc9500xl" xil_pn:prop_ck="-827049739915084467" xil_pn:start_ts="1727168014">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/>
<status xil_pn:value="OutOfDateForOutputs"/>
<status xil_pn:value="OutputChanged"/>
<outfile xil_pn:name="WarpSE.lso"/>
<outfile xil_pn:name="WarpSE.ngc"/>
<outfile xil_pn:name="WarpSE.ngr"/>
@ -88,22 +88,20 @@
<outfile xil_pn:name="webtalk_pn.xml"/>
<outfile xil_pn:name="xst"/>
</transform>
<transform xil_pn:end_ts="1727078939" xil_pn:in_ck="-6638154780101949348" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="5069202360897704756" xil_pn:start_ts="1727078939">
<transform xil_pn:end_ts="1727168122" xil_pn:in_ck="-6638154780101949348" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="5069202360897704756" xil_pn:start_ts="1727168122">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1727079740" xil_pn:in_ck="814020912342028692" xil_pn:name="TRAN_ngdbuild" xil_pn:prop_ck="1893441463969615248" xil_pn:start_ts="1727079685">
<transform xil_pn:end_ts="1727168188" xil_pn:in_ck="814020912342028692" xil_pn:name="TRAN_ngdbuild" xil_pn:prop_ck="1893441463969615248" xil_pn:start_ts="1727168122">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<status xil_pn:value="OutOfDateForOutputs"/>
<status xil_pn:value="OutputChanged"/>
<outfile xil_pn:name="WarpSE.bld"/>
<outfile xil_pn:name="WarpSE.ngd"/>
<outfile xil_pn:name="WarpSE_ngdbuild.xrpt"/>
<outfile xil_pn:name="_ngo"/>
<outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
</transform>
<transform xil_pn:end_ts="1727079986" xil_pn:in_ck="4179227257693753" xil_pn:name="TRANEXT_vm6File_xc9500xl" xil_pn:prop_ck="3294015560432670715" xil_pn:start_ts="1727079740">
<transform xil_pn:end_ts="1727168380" xil_pn:in_ck="4179227257693753" xil_pn:name="TRANEXT_vm6File_xc9500xl" xil_pn:prop_ck="3294015560432670715" xil_pn:start_ts="1727168188">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/>
@ -121,32 +119,26 @@
<outfile xil_pn:name="WarpSE_html"/>
<outfile xil_pn:name="WarpSE_pad.csv"/>
</transform>
<transform xil_pn:end_ts="1727080023" xil_pn:in_ck="4179227257702617" xil_pn:name="TRANEXT_crtProg_xc9500" xil_pn:prop_ck="-6294026017969277533" xil_pn:start_ts="1727079986">
<transform xil_pn:end_ts="1727168414" xil_pn:in_ck="4179227257702617" xil_pn:name="TRANEXT_crtProg_xc9500" xil_pn:prop_ck="-6294026017969277533" xil_pn:start_ts="1727168380">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="WarpSE.jed"/>
</transform>
<transform xil_pn:end_ts="1727081469" xil_pn:in_ck="4179227257689331" xil_pn:name="TRAN_impactProgrammingTool_CPLD" xil_pn:prop_ck="-207801193714804843" xil_pn:start_ts="1727081468">
<transform xil_pn:end_ts="1727168477" xil_pn:in_ck="4179227257689331" xil_pn:name="TRAN_impactProgrammingTool_CPLD" xil_pn:prop_ck="-207801193714804843" xil_pn:start_ts="1727168461">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<status xil_pn:value="OutOfDateForOutputs"/>
<status xil_pn:value="OutputChanged"/>
<outfile xil_pn:name="WarpSE.svf"/>
<outfile xil_pn:name="_impact.cmd"/>
<outfile xil_pn:name="_impact.log"/>
<outfile xil_pn:name="_impactbatch.log"/>
<outfile xil_pn:name="ise_impact.cmd"/>
</transform>
<transform xil_pn:end_ts="1727081354" xil_pn:in_ck="4179227257689331" xil_pn:name="TRAN_configureTargetDevice_CPLD" xil_pn:prop_ck="-742897827381199779" xil_pn:start_ts="1727081327">
<transform xil_pn:end_ts="1727168450" xil_pn:in_ck="4179227257689331" xil_pn:name="TRAN_configureTargetDevice_CPLD" xil_pn:prop_ck="-742897827381199779" xil_pn:start_ts="1727168422">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<status xil_pn:value="OutOfDateForOutputs"/>
<status xil_pn:value="OutputChanged"/>
<outfile xil_pn:name="WarpSE.svf"/>
<outfile xil_pn:name="_impact.cmd"/>
<outfile xil_pn:name="_impact.log"/>
<outfile xil_pn:name="_impactbatch.log"/>
<outfile xil_pn:name="ise_impact.cmd"/>
</transform>
<transform xil_pn:end_ts="1727079300" xil_pn:in_ck="4179227257702617" xil_pn:name="TRAN_timRpt" xil_pn:prop_ck="111903974446" xil_pn:start_ts="1727079266">
<status xil_pn:value="AbortedRun"/>

18
cpld/XC95144XL/WarpSE.jed
View File

@ -1,5 +1,5 @@
Programmer Jedec Bit Map
Date Extracted: Mon Sep 23 04:26:50 2024
Date Extracted: Tue Sep 24 05:00:06 2024
QF93312*
QP100*
@ -246,14 +246,14 @@ L0008768 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
L0008832 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
L0008896 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00010000*
L0008960 00000000 00000000 00000000 00000000 00000000 10000000 00000000 00000000*
L0009024 00000000 00000000 00000000 00000000 00000000 01000000 00000000 00000000*
L0009088 00000100 00000000 00000000 00000000 00000000 11000000 00000000 00000000*
L0009024 00000100 00000000 00000000 00000000 00000000 01000000 00000000 00000000*
L0009088 00000000 00000000 00000000 00000000 00000000 11000000 00000000 00000000*
L0009152 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
L0009216 000000 000000 000000 000000 000000 000000 000000 000000*
L0009264 000000 000000 000000 000000 000000 000000 000000 000000*
L0009312 000000 000000 000000 000000 000000 000000 000000 000000*
L0009312 000001 000000 000000 000000 000000 000000 000000 000000*
L0009360 000000 000000 000000 000000 000000 000000 000000 000000*
L0009408 000001 000000 000000 000000 000000 000000 000000 000000*
L0009408 000000 000000 000000 000000 000000 000000 000000 000000*
L0009456 000000 000000 000000 000000 000000 000000 000000 000011*
L0009504 00000000 00000000 00011000 00000000 00000000 00000000 00000000 00000000*
L0009568 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
@ -261,14 +261,14 @@ L0009632 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
L0009696 00000000 00000000 00000000 00000000 00000000 00110000 00000000 00000000*
L0009760 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
L0009824 00000000 00000000 00011000 00000000 00001000 00000000 10000000 00000000*
L0009888 00000100 00000000 00000000 00000000 00000000 00000000 10000000 00101000*
L0009952 00000000 00000000 00000000 00000000 00000000 00000000 10000100 00101000*
L0009888 00000000 00000000 00000000 00000000 00000000 00000000 10000000 00101000*
L0009952 00000100 00000000 00000000 00000000 00000000 00000000 10000100 00101000*
L0010016 00000000 00000000 00000000 00000000 00000000 00000000 10001100 00100000*
L0010080 000000 000000 000000 000000 000000 000000 100001 001000*
L0010128 000000 000000 000110 000000 000000 010000 000000 000000*
L0010176 000001 000000 000000 000000 000010 000000 000000 000000*
L0010176 000000 000000 000000 000000 000010 000000 000000 000000*
L0010224 000000 000000 000000 000000 000010 000000 000001 000000*
L0010272 000000 000000 000000 000000 000010 010000 000001 000000*
L0010272 000001 000000 000000 000000 000010 010000 000001 000000*
L0010320 000000 000000 000000 000000 000010 000000 000001 000000*
L0010368 00000011 00000000 00000011 00000011 00000011 00000011 00000011 00000010*
L0010432 00000011 00000001 00000011 00000011 00000001 00100011 00000001 00000001*

8
cpld/XC95144XL/WarpSE.mfd
View File

@ -110,11 +110,11 @@ INPUTS | 7 | cnt/QS<0> | cnt/QoSCSr | cnt/nRESr | cnt/QS<1> | cnt/TimerTC |
INPUTMC | 7 | 0 | 17 | 6 | 0 | 0 | 5 | 0 | 16 | 3 | 0 | 0 | 8 | 2 | 6
EQ | 7 |
cnt/QS<0>.T = !cnt/QS<0> & cnt/QoSCSr
# !cnt/QS<0> & cnt/nRESr
# !cnt/QS<0> & !cnt/nRESr
# !cnt/QS<0> & cnt/QS<1> & cnt/TimerTC & !cnt/Er<0> &
cnt/Er<1>
# cnt/QS<0> & !cnt/QoSCSr & cnt/TimerTC &
!cnt/Er<0> & cnt/Er<1> & !cnt/nRESr;
!cnt/Er<0> & cnt/Er<1> & cnt/nRESr;
cnt/QS<0>.CLK = FCLK; // GCK
GLOBALS | 1 | 2 | FCLK
@ -125,9 +125,9 @@ INPUTS | 7 | cnt/QS<0> | cnt/QoSCSr | cnt/TimerTC | cnt/Er<0> | cnt/Er<1> |
INPUTMC | 7 | 0 | 17 | 6 | 0 | 3 | 0 | 0 | 8 | 2 | 6 | 0 | 5 | 0 | 16
EQ | 5 |
cnt/QS<1>.T = cnt/QS<1> & cnt/QoSCSr
# cnt/QS<1> & cnt/nRESr
# cnt/QS<1> & !cnt/nRESr
# cnt/QS<0> & !cnt/QoSCSr & cnt/TimerTC &
!cnt/Er<0> & cnt/Er<1> & !cnt/nRESr;
!cnt/Er<0> & cnt/Er<1> & cnt/nRESr;
cnt/QS<1>.CLK = FCLK; // GCK
GLOBALS | 1 | 2 | FCLK

2
cpld/XC95144XL/WarpSE.nga
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File diff suppressed because one or more lines are too long

2
cpld/XC95144XL/WarpSE.ngc
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File diff suppressed because one or more lines are too long

2
cpld/XC95144XL/WarpSE.ngd
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File diff suppressed because one or more lines are too long

2
cpld/XC95144XL/WarpSE.ngr
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File diff suppressed because one or more lines are too long

2
cpld/XC95144XL/WarpSE.pad
View File

@ -1,7 +1,7 @@
Release 8.1i - Fit P.20131013
Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
9-23-2024 4:23AM
9-24-2024 4:57AM
NOTE: This file is designed to be imported into a spreadsheet program
such as Microsoft Excel for viewing, printing and sorting. The pipe '|'

10
cpld/XC95144XL/WarpSE.rpt
View File

@ -1,7 +1,7 @@
cpldfit: version P.20131013 Xilinx Inc.
Fitter Report
Design Name: WarpSE Date: 9-23-2024, 4:23AM
Design Name: WarpSE Date: 9-24-2024, 4:57AM
Device Used: XC95144XL-10-TQ100
Fitting Status: Successful
@ -1076,17 +1076,17 @@ cnt/LTimerTC_CE <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1));
FTCPE_cnt/QS0: FTCPE port map (cnt/QS(0),cnt/QS_T(0),FCLK,'0','0');
cnt/QS_T(0) <= ((NOT cnt/QS(0) AND cnt/QoSCSr)
OR (NOT cnt/QS(0) AND cnt/nRESr)
OR (NOT cnt/QS(0) AND NOT cnt/nRESr)
OR (NOT cnt/QS(0) AND cnt/QS(1) AND cnt/TimerTC AND NOT cnt/Er(0) AND
cnt/Er(1))
OR (cnt/QS(0) AND NOT cnt/QoSCSr AND cnt/TimerTC AND
NOT cnt/Er(0) AND cnt/Er(1) AND NOT cnt/nRESr));
NOT cnt/Er(0) AND cnt/Er(1) AND cnt/nRESr));
FTCPE_cnt/QS1: FTCPE port map (cnt/QS(1),cnt/QS_T(1),FCLK,'0','0');
cnt/QS_T(1) <= ((cnt/QS(1) AND cnt/QoSCSr)
OR (cnt/QS(1) AND cnt/nRESr)
OR (cnt/QS(1) AND NOT cnt/nRESr)
OR (cnt/QS(0) AND NOT cnt/QoSCSr AND cnt/TimerTC AND
NOT cnt/Er(0) AND cnt/Er(1) AND NOT cnt/nRESr));
NOT cnt/Er(0) AND cnt/Er(1) AND cnt/nRESr));
FDCPE_cnt/QoSCSr: FDCPE port map (cnt/QoSCSr,cnt/QoSCSr_D,FCLK,'0','0');
cnt/QoSCSr_D <= ((A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND

46
cpld/XC95144XL/WarpSE.svf
View File

@ -1,5 +1,5 @@
// Created using Xilinx Cse Software [ISE - 14.7]
// Date: Mon Sep 23 04:51:50 2024
// Date: Tue Sep 24 05:03:27 2024
TRST OFF;
ENDIR IDLE;
@ -223,14 +223,14 @@ SDR 82 TDI (0005080000000000000001) ;
SDR 82 TDI (00050c0000000000000001) ;
SDR 82 TDI (0005102000000000000001) ;
SDR 82 TDI (0005200000040000000001) ;
SDR 82 TDI (0005240000080000000001) ;
SDR 82 TDI (00052800000c0000000081) ;
SDR 82 TDI (0005240000080000000081) ;
SDR 82 TDI (00052800000c0000000001) ;
SDR 82 TDI (00052c0000000000000001) ;
SDR 82 TDI (0005300000000000000001) ;
SDR 82 TDI (0005400000000000000001) ;
SDR 82 TDI (0005440000000000000001) ;
SDR 82 TDI (0005440000000000000081) ;
SDR 82 TDI (0005480000000000000001) ;
SDR 82 TDI (00054c0000000000000081) ;
SDR 82 TDI (00054c0000000000000001) ;
SDR 82 TDI (000550c000000000000003) ;
RUNTEST 20000 TCK;
SDR 82 TDI (0005800000000000600000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
@ -240,14 +240,14 @@ SDR 82 TDI (0005880000000000000001) ;
SDR 82 TDI (00058c0000300000000001) ;
SDR 82 TDI (0005900000000000000001) ;
SDR 82 TDI (0005a00004004000600001) ;
SDR 82 TDI (0005a45004000000000081) ;
SDR 82 TDI (0005a85084000000000001) ;
SDR 82 TDI (0005a45004000000000001) ;
SDR 82 TDI (0005a85084000000000081) ;
SDR 82 TDI (0005ac10c4000000000001) ;
SDR 82 TDI (0005b01084000000000001) ;
SDR 82 TDI (0005c00000080000600001) ;
SDR 82 TDI (0005c40000004000000081) ;
SDR 82 TDI (0005c40000004000000001) ;
SDR 82 TDI (0005c80080004000000001) ;
SDR 82 TDI (0005cc0080084000000001) ;
SDR 82 TDI (0005cc0080084000000081) ;
SDR 82 TDI (0005d00080004000000003) ;
RUNTEST 20000 TCK;
SDR 82 TDI (0006010303030303000300) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
@ -2210,23 +2210,23 @@ SDR 82 TDI (0005102000000000000003) TDO (00050c0000000000000001) ;
RUNTEST 1 TCK;
SDR 82 TDI (0005200000040000000003) TDO (0005102000000000000001) ;
RUNTEST 1 TCK;
SDR 82 TDI (0005240000080000000003) TDO (0005200000040000000001) ;
SDR 82 TDI (0005240000080000000083) TDO (0005200000040000000001) ;
RUNTEST 1 TCK;
SDR 82 TDI (00052800000c0000000083) TDO (0005240000080000000001) ;
SDR 82 TDI (00052800000c0000000003) TDO (0005240000080000000081) ;
RUNTEST 1 TCK;
SDR 82 TDI (00052c0000000000000003) TDO (00052800000c0000000081) ;
SDR 82 TDI (00052c0000000000000003) TDO (00052800000c0000000001) ;
RUNTEST 1 TCK;
SDR 82 TDI (0005300000000000000003) TDO (00052c0000000000000001) ;
RUNTEST 1 TCK;
SDR 82 TDI (0005400000000000000003) TDO (0005300000000000000001) ;
RUNTEST 1 TCK;
SDR 82 TDI (0005440000000000000003) TDO (0005400000000000000001) ;
SDR 82 TDI (0005440000000000000083) TDO (0005400000000000000001) ;
RUNTEST 1 TCK;
SDR 82 TDI (0005480000000000000003) TDO (0005440000000000000001) ;
SDR 82 TDI (0005480000000000000003) TDO (0005440000000000000081) ;
RUNTEST 1 TCK;
SDR 82 TDI (00054c0000000000000083) TDO (0005480000000000000001) ;
SDR 82 TDI (00054c0000000000000003) TDO (0005480000000000000001) ;
RUNTEST 1 TCK;
SDR 82 TDI (000550c000000000000003) TDO (00054c0000000000000081) ;
SDR 82 TDI (000550c000000000000003) TDO (00054c0000000000000001) ;
RUNTEST 1 TCK;
SDR 82 TDI (0005800000000000600003) TDO (000550c000000000000001) ;
RUNTEST 1 TCK;
@ -2240,23 +2240,23 @@ SDR 82 TDI (0005900000000000000003) TDO (00058c0000300000000001) ;
RUNTEST 1 TCK;
SDR 82 TDI (0005a00004004000600003) TDO (0005900000000000000001) ;
RUNTEST 1 TCK;
SDR 82 TDI (0005a45004000000000083) TDO (0005a00004004000600001) ;
SDR 82 TDI (0005a45004000000000003) TDO (0005a00004004000600001) ;
RUNTEST 1 TCK;
SDR 82 TDI (0005a85084000000000003) TDO (0005a45004000000000081) ;
SDR 82 TDI (0005a85084000000000083) TDO (0005a45004000000000001) ;
RUNTEST 1 TCK;
SDR 82 TDI (0005ac10c4000000000003) TDO (0005a85084000000000001) ;
SDR 82 TDI (0005ac10c4000000000003) TDO (0005a85084000000000081) ;
RUNTEST 1 TCK;
SDR 82 TDI (0005b01084000000000003) TDO (0005ac10c4000000000001) ;
RUNTEST 1 TCK;
SDR 82 TDI (0005c00000080000600003) TDO (0005b01084000000000001) ;
RUNTEST 1 TCK;
SDR 82 TDI (0005c40000004000000083) TDO (0005c00000080000600001) ;
SDR 82 TDI (0005c40000004000000003) TDO (0005c00000080000600001) ;
RUNTEST 1 TCK;
SDR 82 TDI (0005c80080004000000003) TDO (0005c40000004000000081) ;
SDR 82 TDI (0005c80080004000000003) TDO (0005c40000004000000001) ;
RUNTEST 1 TCK;
SDR 82 TDI (0005cc0080084000000003) TDO (0005c80080004000000001) ;
SDR 82 TDI (0005cc0080084000000083) TDO (0005c80080004000000001) ;
RUNTEST 1 TCK;
SDR 82 TDI (0005d00080004000000003) TDO (0005cc0080084000000001) ;
SDR 82 TDI (0005d00080004000000003) TDO (0005cc0080084000000081) ;
RUNTEST 1 TCK;
SDR 82 TDI (0006010303030303000303) TDO (0005d00080004000000001) ;
RUNTEST 1 TCK;

14
cpld/XC95144XL/WarpSE.syr
View File

@ -4,13 +4,13 @@ Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
Total REAL time to Xst completion: 1.00 secs
Total CPU time to Xst completion: 1.00 secs
Total CPU time to Xst completion: 0.97 secs
--> Parameter xsthdpdir set to xst
Total REAL time to Xst completion: 1.00 secs
Total CPU time to Xst completion: 1.01 secs
Total CPU time to Xst completion: 0.97 secs
--> Reading design: WarpSE.prj
@ -469,7 +469,7 @@ Design Statistics
# IOs : 79
Cell Usage :
# BELS : 621
# BELS : 620
# AND2 : 193
# AND3 : 29
# AND4 : 11
@ -477,7 +477,7 @@ Cell Usage :
# AND7 : 1
# AND8 : 1
# GND : 6
# INV : 238
# INV : 237
# OR2 : 100
# OR3 : 16
# OR4 : 4
@ -496,12 +496,12 @@ Cell Usage :
=========================================================================
Total REAL time to Xst completion: 52.00 secs
Total CPU time to Xst completion: 51.80 secs
Total REAL time to Xst completion: 53.00 secs
Total CPU time to Xst completion: 53.42 secs
-->
Total memory usage is 234836 kilobytes
Total memory usage is 237600 kilobytes
Number of errors : 0 ( 0 filtered)
Number of warnings : 2 ( 0 filtered)

6076
cpld/XC95144XL/WarpSE.vm6
View File

File diff suppressed because it is too large Load Diff

2
cpld/XC95144XL/WarpSE.xml
View File

File diff suppressed because one or more lines are too long

10
cpld/XC95144XL/WarpSE_html/fit/ascii.htm
View File

@ -3,7 +3,7 @@
cpldfit: version P.20131013 Xilinx Inc.
Fitter Report
Design Name: WarpSE Date: 9-23-2024, 4:23AM
Design Name: WarpSE Date: 9-24-2024, 4:57AM
Device Used: XC95144XL-10-TQ100
Fitting Status: Successful
@ -1078,17 +1078,17 @@ cnt/LTimerTC_CE <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1));
FTCPE_cnt/QS0: FTCPE port map (cnt/QS(0),cnt/QS_T(0),FCLK,'0','0');
cnt/QS_T(0) <= ((NOT cnt/QS(0) AND cnt/QoSCSr)
OR (NOT cnt/QS(0) AND cnt/nRESr)
OR (NOT cnt/QS(0) AND NOT cnt/nRESr)
OR (NOT cnt/QS(0) AND cnt/QS(1) AND cnt/TimerTC AND NOT cnt/Er(0) AND
cnt/Er(1))
OR (cnt/QS(0) AND NOT cnt/QoSCSr AND cnt/TimerTC AND
NOT cnt/Er(0) AND cnt/Er(1) AND NOT cnt/nRESr));
NOT cnt/Er(0) AND cnt/Er(1) AND cnt/nRESr));
FTCPE_cnt/QS1: FTCPE port map (cnt/QS(1),cnt/QS_T(1),FCLK,'0','0');
cnt/QS_T(1) <= ((cnt/QS(1) AND cnt/QoSCSr)
OR (cnt/QS(1) AND cnt/nRESr)
OR (cnt/QS(1) AND NOT cnt/nRESr)
OR (cnt/QS(0) AND NOT cnt/QoSCSr AND cnt/TimerTC AND
NOT cnt/Er(0) AND cnt/Er(1) AND NOT cnt/nRESr));
NOT cnt/Er(0) AND cnt/Er(1) AND cnt/nRESr));
FDCPE_cnt/QoSCSr: FDCPE port map (cnt/QoSCSr,cnt/QoSCSr_D,FCLK,'0','0');
cnt/QoSCSr_D <= ((A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND

8
cpld/XC95144XL/WarpSE_html/fit/defeqns.htm
View File

@ -338,17 +338,17 @@ FDCPE_cnt/LTimerTC: FDCPE port map (cnt/LTimerTC,cnt/LTimerTC_D,FCLK,'0','0',cnt
</td></tr><tr><td>
FTCPE_cnt/QS0: FTCPE port map (cnt/QS(0),cnt/QS_T(0),FCLK,'0','0');
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;cnt/QS_T(0) <= ((NOT cnt/QS(0) AND cnt/QoSCSr)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT cnt/QS(0) AND cnt/nRESr)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT cnt/QS(0) AND NOT cnt/nRESr)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT cnt/QS(0) AND cnt/QS(1) AND cnt/TimerTC AND NOT cnt/Er(0) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; cnt/Er(1))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (cnt/QS(0) AND NOT cnt/QoSCSr AND cnt/TimerTC AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT cnt/Er(0) AND cnt/Er(1) AND NOT cnt/nRESr));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT cnt/Er(0) AND cnt/Er(1) AND cnt/nRESr));
</td></tr><tr><td>
FTCPE_cnt/QS1: FTCPE port map (cnt/QS(1),cnt/QS_T(1),FCLK,'0','0');
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;cnt/QS_T(1) <= ((cnt/QS(1) AND cnt/QoSCSr)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (cnt/QS(1) AND cnt/nRESr)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (cnt/QS(1) AND NOT cnt/nRESr)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (cnt/QS(0) AND NOT cnt/QoSCSr AND cnt/TimerTC AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT cnt/Er(0) AND cnt/Er(1) AND NOT cnt/nRESr));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT cnt/Er(0) AND cnt/Er(1) AND cnt/nRESr));
</td></tr><tr><td>
FDCPE_cnt/QoSCSr: FDCPE port map (cnt/QoSCSr,cnt/QoSCSr_D,FCLK,'0','0');
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;cnt/QoSCSr_D <= ((A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND

8
cpld/XC95144XL/WarpSE_html/fit/eqns.htm
View File

@ -282,17 +282,17 @@
pterms["FB1_17_1"]=new Array("cntQS1_SPECSIG","cntQoSCSr_SPECSIG");
pterms["FB1_17_2"]=new Array("cntQS1_SPECSIG","cntnRESr_SPECSIG");
pterms["FB1_17_2"]=new Array("cntQS1_SPECSIG","/cntnRESr_SPECSIG");
pterms["FB1_17_3"]=new Array("cntQS0_SPECSIG","/cntQoSCSr_SPECSIG","cntTimerTC_SPECSIG","/cntEr0_SPECSIG","cntEr1_SPECSIG","/cntnRESr_SPECSIG");
pterms["FB1_17_3"]=new Array("cntQS0_SPECSIG","/cntQoSCSr_SPECSIG","cntTimerTC_SPECSIG","/cntEr0_SPECSIG","cntEr1_SPECSIG","cntnRESr_SPECSIG");
pterms["FB1_18_1"]=new Array("/cntQS0_SPECSIG","cntQoSCSr_SPECSIG");
pterms["FB1_18_2"]=new Array("/cntQS0_SPECSIG","cntnRESr_SPECSIG");
pterms["FB1_18_2"]=new Array("/cntQS0_SPECSIG","/cntnRESr_SPECSIG");
pterms["FB1_18_3"]=new Array("/cntQS0_SPECSIG","cntQS1_SPECSIG","cntTimerTC_SPECSIG","/cntEr0_SPECSIG","cntEr1_SPECSIG");
pterms["FB1_18_4"]=new Array("cntQS0_SPECSIG","/cntQoSCSr_SPECSIG","cntTimerTC_SPECSIG","/cntEr0_SPECSIG","cntEr1_SPECSIG","/cntnRESr_SPECSIG");
pterms["FB1_18_4"]=new Array("cntQS0_SPECSIG","/cntQoSCSr_SPECSIG","cntTimerTC_SPECSIG","/cntEr0_SPECSIG","cntEr1_SPECSIG","cntnRESr_SPECSIG");
pterms["FB2_11_1"]=new Array("/nDTACK_FSB");

2
cpld/XC95144XL/WarpSE_html/fit/summary.htm
View File

@ -30,7 +30,7 @@
<tr>
<td width="40%"> <b>Date</b>
</td>
<td width="60%">  9-23-2024, 4:23AM</td>
<td width="60%">  9-24-2024, 4:57AM</td>
</tr>
</table></span><br><span id="sumres" class="pgRef"><h5 align="center">RESOURCES SUMMARY</h5>
<table align="center" width="90%" border="1" cellspacing="0" cellpadding="0">

6
cpld/XC95144XL/WarpSE_ngdbuild.xrpt
View File

@ -5,7 +5,7 @@
The structure and the elements are likely to change over the next few releases.
This means code written to parse this file will need to be revisited each subsequent release.-->
<application stringID="NgdBuild" timeStamp="Mon Sep 23 04:22:14 2024">
<application stringID="NgdBuild" timeStamp="Tue Sep 24 04:56:19 2024">
<section stringID="User_Env">
<table stringID="User_EnvVar">
<column stringID="variable"/>
@ -76,7 +76,7 @@
<item dataType="int" stringID="NGDBUILD_NUM_FDP" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_GND" value="6"/>
<item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="35"/>
<item dataType="int" stringID="NGDBUILD_NUM_INV" value="238"/>
<item dataType="int" stringID="NGDBUILD_NUM_INV" value="237"/>
<item dataType="int" stringID="NGDBUILD_NUM_OBUF" value="32"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR2" value="100"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR3" value="16"/>
@ -91,7 +91,7 @@
<item dataType="int" stringID="NGDBUILD_NUM_AND5" value="3"/>
<item dataType="int" stringID="NGDBUILD_NUM_GND" value="72"/>
<item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="43"/>
<item dataType="int" stringID="NGDBUILD_NUM_INV" value="238"/>
<item dataType="int" stringID="NGDBUILD_NUM_INV" value="237"/>
<item dataType="int" stringID="NGDBUILD_NUM_OBUF" value="32"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR2" value="100"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR3" value="16"/>

2
cpld/XC95144XL/WarpSE_pad.csv
View File

@ -1,7 +1,7 @@
Release 8.1i - Fit P.20131013
Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
9-23-2024 4:23AM
9-24-2024 4:57AM
NOTE: This file is designed to be imported into a spreadsheet program
such as Microsoft Excel for viewing, printing and sorting. The comma ','

1 Release 8.1i - Fit P.20131013
2 Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
3 9-23-2024 4:23AM 9-24-2024 4:57AM
4 NOTE: This file is designed to be imported into a spreadsheet program
5 such as Microsoft Excel for viewing, printing and sorting. The comma ','
6 character is used as the data field separator.
7 This file is also designed to support parsing.

12
cpld/XC95144XL/WarpSE_summary.html
View File

@ -2,7 +2,7 @@
<BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>
<TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
<TD ALIGN=CENTER COLSPAN='4'><B>WarpSE Project Status</B></TD></TR>
<TD ALIGN=CENTER COLSPAN='4'><B>WarpSE Project Status (09/24/2024 - 05:00:16)</B></TD></TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Project File:</B></TD>
<TD>WarpSE.xise</TD>
@ -25,7 +25,7 @@ No Errors</TD>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Product Version:</B></TD><TD>ISE 14.7</TD>
<TD BGCOLOR='#FFFF99'><UL><LI><B>Warnings:</B></LI></UL></TD>
<TD ALIGN=LEFT><A HREF_DISABLED='Z:/Repos/WarpSE/cpld/XC95144XL\_xmsgs/*.xmsgs?&DataKey=Warning'>2 Warnings (2 new)</A></TD>
<TD ALIGN=LEFT><A HREF_DISABLED='Z:/Repos/WarpSE/cpld/XC95144XL\_xmsgs/*.xmsgs?&DataKey=Warning'>2 Warnings (0 new)</A></TD>
</TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Design Goal:</B></dif></TD>
@ -65,9 +65,9 @@ System Settings</A>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='6'><B>Detailed Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=DetailedReports"><B>[-]</B></a></TD></TR>
<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD><B>Generated</B></TD>
<TD ALIGN=LEFT><B>Errors</B></TD><TD ALIGN=LEFT><B>Warnings</B></TD><TD ALIGN=LEFT COLSPAN='2'><B>Infos</B></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='Z:/Repos/WarpSE/cpld/XC95144XL\WarpSE.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Mon Sep 23 00:08:39 2024</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='Z:/Repos/WarpSE/cpld/XC95144XL\_xmsgs/xst.xmsgs?&DataKey=Warning'>2 Warnings (2 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='Z:/Repos/WarpSE/cpld/XC95144XL\WarpSE.bld'>Translation Report</A></TD><TD>Current</TD><TD>Mon Sep 23 00:23:15 2024</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='Z:/Repos/WarpSE/cpld/XC95144XL\WarpSE.rpt'>CPLD Fitter Report (Text)</A></TD><TD>Current</TD><TD>Mon Sep 23 00:24:06 2024</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='Z:/Repos/WarpSE/cpld/XC95144XL\_xmsgs/cpldfit.xmsgs?&DataKey=Warning'>8 Warnings (1 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='Z:/Repos/WarpSE/cpld/XC95144XL\_xmsgs/cpldfit.xmsgs?&DataKey=Info'>3 Infos (3 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='Z:/Repos/WarpSE/cpld/XC95144XL\WarpSE.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Tue Sep 24 00:55:34 2024</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='Z:/Repos/WarpSE/cpld/XC95144XL\_xmsgs/xst.xmsgs?&DataKey=Warning'>2 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='Z:/Repos/WarpSE/cpld/XC95144XL\WarpSE.bld'>Translation Report</A></TD><TD>Current</TD><TD>Tue Sep 24 00:56:47 2024</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='Z:/Repos/WarpSE/cpld/XC95144XL\WarpSE.rpt'>CPLD Fitter Report (Text)</A></TD><TD>Current</TD><TD>Tue Sep 24 00:57:46 2024</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='Z:/Repos/WarpSE/cpld/XC95144XL\_xmsgs/cpldfit.xmsgs?&DataKey=Warning'>8 Warnings (1 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='Z:/Repos/WarpSE/cpld/XC95144XL\_xmsgs/cpldfit.xmsgs?&DataKey=Info'>3 Infos (3 new)</A></TD></TR>
<TR ALIGN=LEFT><TD>Power Report</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD COLSPAN='2'>&nbsp;</TD></TR>
</TABLE>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
@ -77,5 +77,5 @@ System Settings</A>
</TABLE>
<br><center><b>Date Generated:</b> 09/23/2024 - 04:48:30</center>
<br><center><b>Date Generated:</b> 09/24/2024 - 05:05:04</center>
</BODY></HTML>

6
cpld/XC95144XL/WarpSE_xst.xrpt
View File

@ -5,7 +5,7 @@
The structure and the elements are likely to change over the next few releases.
This means code written to parse this file will need to be revisited each subsequent release.-->
<application stringID="Xst" timeStamp="Mon Sep 23 04:07:07 2024">
<application stringID="Xst" timeStamp="Tue Sep 24 04:54:19 2024">
<section stringID="User_Env">
<table stringID="User_EnvVar">
<column stringID="variable"/>
@ -114,12 +114,12 @@
<item stringID="XST_IOS" value="79"/>
</section>
<section stringID="XST_CELL_USAGE">
<item dataType="int" stringID="XST_BELS" value="621">
<item dataType="int" stringID="XST_BELS" value="620">
<item dataType="int" stringID="XST_AND2" value="193"/>
<item dataType="int" stringID="XST_AND3" value="29"/>
<item dataType="int" stringID="XST_AND4" value="11"/>
<item dataType="int" stringID="XST_GND" value="6"/>
<item dataType="int" stringID="XST_INV" value="238"/>
<item dataType="int" stringID="XST_INV" value="237"/>
<item dataType="int" stringID="XST_OR2" value="100"/>
<item dataType="int" stringID="XST_VCC" value="1"/>
<item dataType="int" stringID="XST_XOR2" value="18"/>

20
cpld/XC95144XL/_impactbatch.log Normal file
View File

@ -0,0 +1,20 @@
iMPACT Version: Oct 13 2013 10:01:22
iMPACT log file Started on Tue Sep 24 05:01:22 2024
Preference Table
Name Setting
StartupClock Auto_Correction
AutoSignature False
KeepSVF False
ConcurrentMode False
UseHighz False
ConfigOnFailure Stop
UserLevel Novice
MessageLevel Detailed
svfUseTime false
SpiByteSwap Auto_Correction
AutoInfer false
SvfPlayDisplayComments false
Active mode is BS
INFO:iMPACT:2648 - Failed to close Repository.

2
cpld/XC95144XL/_ngo/netlist.lst
View File

@ -1,2 +1,2 @@
Z:\Repos\WarpSE\cpld\XC95144XL\WarpSE.ngc 1727064518
Z:\Repos\WarpSE\cpld\XC95144XL\WarpSE.ngc 1727168110
OK

4
cpld/XC95144XL/_xmsgs/xst.xmsgs
View File

@ -5,10 +5,10 @@
behavior or data corruption. It is strongly advised that
users do not edit the contents of this file. -->
<messages>
<msg type="warning" file="Xst" num="647" delta="new" >Input &lt;<arg fmt="%s" index="1">nBG_IOB</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
<msg type="warning" file="Xst" num="647" delta="old" >Input &lt;<arg fmt="%s" index="1">nBG_IOB</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
</msg>
<msg type="warning" file="Xst" num="647" delta="new" >Input &lt;<arg fmt="%s" index="1">DBG</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
<msg type="warning" file="Xst" num="647" delta="old" >Input &lt;<arg fmt="%s" index="1">DBG</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
</msg>
</messages>

5
cpld/XC95144XL/ise_impact.cmd Normal file
View File

@ -0,0 +1,5 @@
loadCdf -file "WarpSE_SVF.ipf"
setMode -bs
setcable -port auto
program -target
exit

4
cpld/XC95144XL/iseconfig/WarpSE.xreport
View File

@ -1,11 +1,11 @@
<?xml version='1.0' encoding='UTF-8'?>
<report-views version="2.0" >
<header>
<DateModified>2024-09-23T04:48:31</DateModified>
<DateModified>2024-09-24T03:02:06</DateModified>
<ModuleName>WarpSE</ModuleName>
<SummaryTimeStamp>Unknown</SummaryTimeStamp>
<SavedFilePath>Z:/Repos/WarpSE/cpld/XC95144XL/iseconfig/WarpSE.xreport</SavedFilePath>
<ImplementationReportsDirectory>Z:/Repos/WarpSE/cpld/XC95144XL</ImplementationReportsDirectory>
<ImplementationReportsDirectory>Z:/Repos/WarpSE/cpld/XC95144XL\</ImplementationReportsDirectory>
<DateInitialized>2024-09-23T04:48:22</DateInitialized>
<EnableMessageFiltering>false</EnableMessageFiltering>
</header>

4
cpld/XC95144XL/usage_statistics_webtalk.html
View File

@ -17,7 +17,7 @@
</TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Project ID (random number)</B></TD>
<TD><xtag-property name="RandomID">34fc8d42bcc44742ba4b495c3dcc8c31</xtag-property>.<xtag-property name="ProjectID">d3638d76563f443380087efc40b42837</xtag-property>.<xtag-property name="ProjectIteration">1</xtag-property></TD>
<TD><xtag-property name="RandomID">34fc8d42bcc44742ba4b495c3dcc8c31</xtag-property>.<xtag-property name="ProjectID">ef4ec25733cf47f3a41e2d880a7e4ee9</xtag-property>.<xtag-property name="ProjectIteration">1</xtag-property></TD>
<TD BGCOLOR='#FFFF99'><B>Target Package:</B></TD>
<TD><xtag-property name="TargetPackage"></xtag-property></TD>
</TR>
@ -29,7 +29,7 @@
</TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Date Generated</B></TD>
<TD><xtag-property name="Date Generated">2024-09-23T04:53:19</xtag-property></TD>
<TD><xtag-property name="Date Generated">2024-09-24T05:04:38</xtag-property></TD>
<TD BGCOLOR='#FFFF99'><B>Tool Flow</B></TD>
<TD><xtag-property name="ToolFlow">IMPACT</xtag-property></TD>
</TR>

2
cpld/XC95144XL/webtalk.log
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@ -3,7 +3,7 @@ Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved.
Project Information
--------------------
ProjectID=d3638d76563f443380087efc40b42837
ProjectID=ef4ec25733cf47f3a41e2d880a7e4ee9
ProjectIteration=1
WebTalk Summary

4
cpld/XC95144XL/webtalk_impact.xml
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@ -3,9 +3,9 @@
<!--The data in this file is primarily intended for consumption by Xilinx tools.
The structure and the elements are likely to change over the next few releases.
This means code written to parse this file will need to be revisited each subsequent release.-->
<application name="impact" timeStamp="Mon Sep 23 04:53:09 2024">
<application name="impact" timeStamp="Tue Sep 24 05:04:27 2024">
<section name="Project Information" visible="false">
<property name="ProjectID" value="d3638d76563f443380087efc40b42837"/>
<property name="ProjectID" value="ef4ec25733cf47f3a41e2d880a7e4ee9"/>
<property name="ProjectIteration" value="1"/>
</section>
<section name="iMPACT Project Info" visible="true">

4
cpld/XC95144XL/webtalk_pn.xml
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@ -3,7 +3,7 @@
<!--The data in this file is primarily intended for consumption by Xilinx tools.
The structure and the elements are likely to change over the next few releases.
This means code written to parse this file will need to be revisited each subsequent release.-->
<application name="pn" timeStamp="Mon Sep 23 04:06:41 2024">
<application name="pn" timeStamp="Tue Sep 24 04:53:42 2024">
<section name="Project Information" visible="false">
<property name="ProjectID" value="C46B8514A586483883D8F1136EA5C1F3" type="project"/>
<property name="ProjectIteration" value="0" type="project"/>
@ -13,6 +13,7 @@ This means code written to parse this file will need to be revisited each subseq
<section name="Project Statistics" visible="true">
<property name="PROP_Enable_Message_Filtering" value="false" type="design"/>
<property name="PROP_FitterReportFormat" value="HTML" type="process"/>
<property name="PROP_ImpactProjectFile" value="changed" type="process"/>
<property name="PROP_LastAppliedGoal" value="Balanced" type="design"/>
<property name="PROP_LastAppliedStrategy" value="Xilinx Default (unlocked)" type="design"/>
<property name="PROP_ManualCompileOrderImp" value="false" type="design"/>
@ -26,6 +27,7 @@ This means code written to parse this file will need to be revisited each subseq
<property name="PROP_intWbtProjectID" value="C46B8514A586483883D8F1136EA5C1F3" type="design"/>
<property name="PROP_intWorkingDirLocWRTProjDir" value="Same" type="design"/>
<property name="PROP_intWorkingDirUsed" value="No" type="design"/>
<property name="PROP_xilxSynthMaxFanout" value="100000" type="process"/>
<property name="PROP_AutoTop" value="true" type="design"/>
<property name="PROP_DevFamily" value="XC9500XL CPLDs" type="design"/>
<property name="PROP_DevDevice" value="xc95144xl" type="design"/>

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cpld/XC95144XL/xlnx_auto_0_xdb/cst.xbcd
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14
cpld/XC95144XL/xst/work/hdllib.ref
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@ -1,7 +1,7 @@
MO CNT NULL ../CNT.v vlg65/_c_n_t.bin 1727078833
MO CS NULL ../CS.v vlg22/_c_s.bin 1727078833
MO FSB NULL ../FSB.v vlg37/_f_s_b.bin 1727078832
MO IOBM NULL ../IOBM.v vlg73/_i_o_b_m.bin 1727078832
MO WarpSE NULL ../WarpSE.v vlg52/_warp_s_e.bin 1727078834
MO IOBS NULL ../IOBS.v vlg79/_i_o_b_s.bin 1727078831
MO RAM NULL ../RAM.v vlg14/_r_a_m.bin 1727078830
MO CNT NULL ../CNT.v vlg65/_c_n_t.bin 1727168066
MO CS NULL ../CS.v vlg22/_c_s.bin 1727168065
MO FSB NULL ../FSB.v vlg37/_f_s_b.bin 1727168064
MO IOBM NULL ../IOBM.v vlg73/_i_o_b_m.bin 1727168064
MO WarpSE NULL ../WarpSE.v vlg52/_warp_s_e.bin 1727168066
MO IOBS NULL ../IOBS.v vlg79/_i_o_b_s.bin 1727168063
MO RAM NULL ../RAM.v vlg14/_r_a_m.bin 1727168063

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cpld/XC95144XL/xst/work/vlg14/_r_a_m.bin
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cpld/XC95144XL/xst/work/vlg22/_c_s.bin
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cpld/XC95144XL/xst/work/vlg37/_f_s_b.bin
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cpld/XC95144XL/xst/work/vlg52/_warp_s_e.bin
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cpld/XC95144XL/xst/work/vlg73/_i_o_b_m.bin
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cpld/XC95144XL/xst/work/vlg79/_i_o_b_s.bin
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