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Better comments in RAM controller

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This commit is contained in:
Zane Kaminski 2024-10-07 07:53:56 -04:00
parent 53bc4c08bd
commit 11ea9524c4
1 changed files with 8 additions and 4 deletions
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12
cpld/RAM.v
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@ -10,9 +10,11 @@ module RAM(
output RAMReady, output RAMReady,
/* Refresh Counter Interface */ /* Refresh Counter Interface */
input RefReqIn, input RefUrgIn, input RefReqIn, input RefUrgIn,
/* DRAM and NOR flash interface */ /* DRAM interface */
output [11:0] RA, output nRAS, output reg nCAS, output [11:0] RA, output nRAS, output reg nCAS,
output nLWE, output nUWE, output nOE, output nROMOE, output nROMWE); output nLWE, output nUWE, output reg nOE,
/* NOR flash interface */
output nROMOE, output nROMWE);
/* RAM control state */ /* RAM control state */
reg [2:0] RS; reg [2:0] RS;
@ -35,8 +37,10 @@ module RAM(
reg RAMReadyReg; reg RAMReadyReg;
assign RAMReady = RAMReadyReg;//!RS[2]; assign RAMReady = RAMReadyReg;//!RS[2];
/* RAM control signals */ /* RAM /RAS */
assign nRAS = !((!nAS && RAMCS && RASEN) || RASrf); assign nRAS = !((!nAS && RAMCS && RASEN) || RASrf);
/* RAM /WE */
assign nLWE = !(!nLDS && RASEL && !nWE); assign nLWE = !(!nLDS && RASEL && !nWE);
assign nUWE = !(!nUDS && RASEL && !nWE); assign nUWE = !(!nUDS && RASEL && !nWE);