diff --git a/.gitignore b/.gitignore
index 2d3ac29..adc040a 100644
--- a/.gitignore
+++ b/.gitignore
@@ -2,12 +2,6 @@
 # Format documentation: http://kicad-pcb.org/help/file-formats/
 
 # Temporary files
-*.000
-*.bak
-*.bck
-*.kicad_pcb-bak
-*.sch-bak
-*~
 _autosave-*
 *.tmp
 *-rescue.lib
@@ -16,17 +10,6 @@ _autosave-*
 fp-info-cache
 Warp-SE-backups/*
 
-# Netlist files (exported from Eeschema)
-*.net
-
-# Autorouter files (exported from Pcbnew)
-*.dsn
-*.ses
-
-# Exported BOM files
-*.xml
-*.csv
-
 *.DS_Store
-Docs/Thumbs.db
+Documentation/Thumbs.db
 Warp-SE.kicad_prl
diff --git a/Control.kicad_sch b/Control.kicad_sch
index 98f564d..d84c2c3 100644
--- a/Control.kicad_sch
+++ b/Control.kicad_sch
@@ -582,16 +582,16 @@
   (junction (at 119.38 191.77) (diameter 0) (color 0 0 0 0)
     (uuid 15189cef-9045-423b-b4f6-a763d4e75704)
   )
-  (junction (at 246.38 157.48) (diameter 0) (color 0 0 0 0)
+  (junction (at 243.84 157.48) (diameter 0) (color 0 0 0 0)
     (uuid 17cf1c88-8d51-4538-aa76-e35ac22d0ed0)
   )
   (junction (at 129.54 191.77) (diameter 0) (color 0 0 0 0)
     (uuid 1a22eb2d-f625-4371-a918-ff1b97dc8219)
   )
-  (junction (at 233.68 157.48) (diameter 0) (color 0 0 0 0)
+  (junction (at 231.14 157.48) (diameter 0) (color 0 0 0 0)
     (uuid 2028d85e-9e27-4758-8c0b-559fad072813)
   )
-  (junction (at 231.14 20.32) (diameter 0) (color 0 0 0 0)
+  (junction (at 228.6 20.32) (diameter 0) (color 0 0 0 0)
     (uuid 234e1024-0b7f-410c-90bb-bae43af1eb25)
   )
   (junction (at 139.7 191.77) (diameter 0) (color 0 0 0 0)
@@ -600,46 +600,46 @@
   (junction (at 139.7 186.69) (diameter 0) (color 0 0 0 0)
     (uuid 35fb7c56-dc85-43f7-b954-81b8040a8500)
   )
-  (junction (at 241.3 157.48) (diameter 0) (color 0 0 0 0)
+  (junction (at 238.76 157.48) (diameter 0) (color 0 0 0 0)
     (uuid 3fa05934-8ad1-40a9-af5c-98ad298eb412)
   )
-  (junction (at 236.22 157.48) (diameter 0) (color 0 0 0 0)
+  (junction (at 233.68 157.48) (diameter 0) (color 0 0 0 0)
     (uuid 49488c82-6277-4d05-a051-6a9df142c373)
   )
   (junction (at 119.38 186.69) (diameter 0) (color 0 0 0 0)
     (uuid 560d05a7-84e4-403a-80d1-f287a4032b8a)
   )
-  (junction (at 238.76 20.32) (diameter 0) (color 0 0 0 0)
+  (junction (at 236.22 20.32) (diameter 0) (color 0 0 0 0)
     (uuid 6762c669-2824-49a2-8bd4-3f19091dd75a)
   )
   (junction (at 160.02 186.69) (diameter 0) (color 0 0 0 0)
     (uuid 7274c82d-0cb9-47de-b093-7d848f491410)
   )
-  (junction (at 236.22 20.32) (diameter 0) (color 0 0 0 0)
+  (junction (at 233.68 20.32) (diameter 0) (color 0 0 0 0)
     (uuid 83e349fb-6338-43f9-ad3f-2e7f4b8bb4a9)
   )
   (junction (at 109.22 186.69) (diameter 0) (color 0 0 0 0)
     (uuid 9de304ba-fba7-4896-b969-9d87a3522d74)
   )
-  (junction (at 248.92 157.48) (diameter 0) (color 0 0 0 0)
+  (junction (at 246.38 157.48) (diameter 0) (color 0 0 0 0)
     (uuid a48f5fff-52e4-4ae8-8faa-7084c7ae8a28)
   )
-  (junction (at 241.3 20.32) (diameter 0) (color 0 0 0 0)
+  (junction (at 238.76 20.32) (diameter 0) (color 0 0 0 0)
     (uuid a9d76dfc-52ba-46de-beb4-dab7b94ee663)
   )
-  (junction (at 233.68 20.32) (diameter 0) (color 0 0 0 0)
+  (junction (at 231.14 20.32) (diameter 0) (color 0 0 0 0)
     (uuid aae6bc05-6036-4fc6-8be7-c70daf5c8932)
   )
   (junction (at 149.86 191.77) (diameter 0) (color 0 0 0 0)
     (uuid ae8bb5ae-95ee-4e2d-8a0c-ae5b6149b4e3)
   )
-  (junction (at 243.84 157.48) (diameter 0) (color 0 0 0 0)
+  (junction (at 241.3 157.48) (diameter 0) (color 0 0 0 0)
     (uuid b7b00984-6ab1-482e-b4b4-67cac44d44da)
   )
   (junction (at 149.86 186.69) (diameter 0) (color 0 0 0 0)
     (uuid b8c8c7a1-d546-4878-9de9-463ec76dff98)
   )
-  (junction (at 238.76 157.48) (diameter 0) (color 0 0 0 0)
+  (junction (at 236.22 157.48) (diameter 0) (color 0 0 0 0)
     (uuid be5a7017-fe9d-43ea-9a6a-8fe8deb78420)
   )
   (junction (at 170.18 191.77) (diameter 0) (color 0 0 0 0)
@@ -651,30 +651,30 @@
   (junction (at 129.54 186.69) (diameter 0) (color 0 0 0 0)
     (uuid dfcef016-1bf5-4158-8a79-72d38a522877)
   )
-  (junction (at 243.84 20.32) (diameter 0) (color 0 0 0 0)
+  (junction (at 241.3 20.32) (diameter 0) (color 0 0 0 0)
     (uuid e04b8c10-725b-4bde-8cbf-66bfea5053e6)
   )
 
-  (no_connect (at 213.36 60.96) (uuid 3579cf2f-29b0-46b6-a07d-483fb5586322))
-  (no_connect (at 213.36 58.42) (uuid 73f40fda-e6eb-4f93-9482-56cf47d84a87))
+  (no_connect (at 210.82 60.96) (uuid 3579cf2f-29b0-46b6-a07d-483fb5586322))
+  (no_connect (at 210.82 58.42) (uuid 73f40fda-e6eb-4f93-9482-56cf47d84a87))
 
-  (bus_entry (at 203.2 63.5) (size 2.54 2.54)
+  (bus_entry (at 198.12 63.5) (size 2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 0a1d0cbe-85ab-4f0f-b3b1-fcef21dfb600)
   )
-  (bus_entry (at 203.2 129.54) (size 2.54 2.54)
+  (bus_entry (at 198.12 129.54) (size 2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 0a5610bb-d01a-4417-8271-dc424dd2c838)
   )
-  (bus_entry (at 203.2 71.12) (size 2.54 2.54)
+  (bus_entry (at 198.12 71.12) (size 2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 0c544a8c-9f45-4205-9bca-1d91c95d58ef)
   )
-  (bus_entry (at 203.2 27.94) (size 2.54 2.54)
+  (bus_entry (at 198.12 27.94) (size 2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 0fb27e11-fde6-4a25-adbb-e9684771b369)
   )
-  (bus_entry (at 203.2 35.56) (size 2.54 2.54)
+  (bus_entry (at 198.12 35.56) (size 2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 2f3fba7a-cf45-4bd8-9035-07e6fa0b4732)
   )
@@ -682,19 +682,19 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 3a1a39fc-8030-4c93-9d9c-d79ba6824099)
   )
-  (bus_entry (at 271.78 43.18) (size -2.54 2.54)
+  (bus_entry (at 269.24 43.18) (size -2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 3b9c5ffd-e59b-402d-8c5e-052f7ca643a4)
   )
-  (bus_entry (at 203.2 25.4) (size 2.54 2.54)
+  (bus_entry (at 198.12 25.4) (size 2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 41c18011-40db-4384-9ba4-c0158d0d9d6a)
   )
-  (bus_entry (at 203.2 30.48) (size 2.54 2.54)
+  (bus_entry (at 198.12 30.48) (size 2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 4346fe55-f906-453a-b81a-1c013104a598)
   )
-  (bus_entry (at 203.2 45.72) (size 2.54 2.54)
+  (bus_entry (at 198.12 45.72) (size 2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 456c5e47-d71e-4708-b061-1e61634d8648)
   )
@@ -702,11 +702,11 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 49b5f540-e128-4e08-bb09-f321f8e64056)
   )
-  (bus_entry (at 203.2 48.26) (size 2.54 2.54)
+  (bus_entry (at 198.12 48.26) (size 2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 49fec31e-3712-4229-8142-b191d90a97d0)
   )
-  (bus_entry (at 271.78 45.72) (size -2.54 2.54)
+  (bus_entry (at 269.24 45.72) (size -2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 4fb2577d-2e1c-480c-9060-124510b35053)
   )
@@ -714,7 +714,7 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 5a33f5a4-a470-4c04-9e2d-532b5f01a5d6)
   )
-  (bus_entry (at 203.2 73.66) (size 2.54 2.54)
+  (bus_entry (at 198.12 73.66) (size 2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 60d26b83-9c3a-4edb-93ef-ab3d9d05e8cb)
   )
@@ -722,51 +722,51 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 6133fb54-5524-482e-9ae2-adbf29aced9e)
   )
-  (bus_entry (at 271.78 38.1) (size -2.54 2.54)
+  (bus_entry (at 269.24 38.1) (size -2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 6b6d35dc-fa1d-46c5-87c0-b0652011059d)
   )
-  (bus_entry (at 271.78 35.56) (size -2.54 2.54)
+  (bus_entry (at 269.24 35.56) (size -2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 720ec55a-7c69-4064-b792-ef3dbba4eab9)
   )
-  (bus_entry (at 203.2 86.36) (size 2.54 2.54)
+  (bus_entry (at 198.12 86.36) (size 2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 765684c2-53b3-4ef7-bd1b-7a4a73d87b76)
   )
-  (bus_entry (at 203.2 127) (size 2.54 2.54)
+  (bus_entry (at 198.12 127) (size 2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 9f4abbc0-6ac3-48f0-b823-2c1c19349540)
   )
-  (bus_entry (at 203.2 78.74) (size 2.54 2.54)
+  (bus_entry (at 198.12 78.74) (size 2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid ae158d42-76cc-4911-a621-4cc28931c98b)
   )
-  (bus_entry (at 203.2 76.2) (size 2.54 2.54)
+  (bus_entry (at 198.12 76.2) (size 2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid bb5d2eae-a96e-45dd-89aa-125fe22cc2fa)
   )
-  (bus_entry (at 203.2 68.58) (size 2.54 2.54)
+  (bus_entry (at 198.12 68.58) (size 2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid c37d3f0c-41ec-4928-8869-febc821c6326)
   )
-  (bus_entry (at 203.2 33.02) (size 2.54 2.54)
+  (bus_entry (at 198.12 33.02) (size 2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid c512fed3-9770-476b-b048-e781b4f3cd72)
   )
-  (bus_entry (at 203.2 40.64) (size 2.54 2.54)
+  (bus_entry (at 198.12 40.64) (size 2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid cb1a49ef-0a06-4f40-9008-61d1d1c36198)
   )
-  (bus_entry (at 271.78 40.64) (size -2.54 2.54)
+  (bus_entry (at 269.24 40.64) (size -2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid d035bb7a-e806-42f2-ba95-a390d279aef1)
   )
-  (bus_entry (at 203.2 132.08) (size 2.54 2.54)
+  (bus_entry (at 198.12 132.08) (size 2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid d5f4d798-57d3-493b-b57c-3b6e89508879)
   )
-  (bus_entry (at 203.2 38.1) (size 2.54 2.54)
+  (bus_entry (at 198.12 38.1) (size 2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid d655bb0a-cbf9-4908-ad60-7024ff468fbd)
   )
@@ -774,11 +774,11 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid dd70858b-2f9a-4b3f-9af5-ead3a9ba57e9)
   )
-  (bus_entry (at 203.2 134.62) (size 2.54 2.54)
+  (bus_entry (at 198.12 134.62) (size 2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid e4504518-96e7-4c9e-8457-7273f5a490f1)
   )
-  (bus_entry (at 203.2 60.96) (size 2.54 2.54)
+  (bus_entry (at 198.12 60.96) (size 2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid ea77ba09-319a-49bd-ad5b-49f4c76f232c)
   )
@@ -790,57 +790,57 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid f08895dc-4dcb-4aef-a39b-5a08864cdaaf)
   )
-  (bus_entry (at 203.2 66.04) (size 2.54 2.54)
+  (bus_entry (at 198.12 66.04) (size 2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid facb0614-068b-4c9c-a466-d374df96a94c)
   )
-  (bus_entry (at 203.2 43.18) (size 2.54 2.54)
+  (bus_entry (at 198.12 43.18) (size 2.54 2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid ffa442c7-cbef-461f-8613-c211201cec06)
   )
 
-  (wire (pts (xy 264.16 93.98) (xy 269.24 93.98))
+  (wire (pts (xy 261.62 93.98) (xy 269.24 93.98))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 000b46d6-b833-4804-8f56-56d539f76d09)
   )
-  (wire (pts (xy 264.16 43.18) (xy 269.24 43.18))
+  (wire (pts (xy 261.62 43.18) (xy 266.7 43.18))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 044dde97-ee2e-473a-9264-ed4dff1893a5)
   )
-  (wire (pts (xy 236.22 20.32) (xy 238.76 20.32))
+  (wire (pts (xy 233.68 20.32) (xy 236.22 20.32))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 044de712-d3da-40ed-9c9f-d91ef285c74c)
   )
-  (bus (pts (xy 203.2 127) (xy 203.2 129.54))
+  (bus (pts (xy 198.12 127) (xy 198.12 129.54))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 05d4469c-1e3a-4add-8626-61a5e656202f)
   )
-  (bus (pts (xy 203.2 27.94) (xy 203.2 30.48))
+  (bus (pts (xy 198.12 27.94) (xy 198.12 30.48))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 07632eef-4b6a-4f3d-9e93-a91a03819c3a)
   )
-  (bus (pts (xy 203.2 38.1) (xy 203.2 40.64))
+  (bus (pts (xy 198.12 38.1) (xy 198.12 40.64))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 07a5ad0a-75f6-494c-a2f1-1c732ce92808)
   )
 
-  (wire (pts (xy 213.36 33.02) (xy 205.74 33.02))
+  (wire (pts (xy 210.82 33.02) (xy 200.66 33.02))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 08ec951f-e7eb-41cf-9589-697107a98e88)
   )
-  (wire (pts (xy 213.36 35.56) (xy 205.74 35.56))
+  (wire (pts (xy 210.82 35.56) (xy 200.66 35.56))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 09bbea88-8bd7-48ec-baae-1b4a9a11a40e)
   )
-  (wire (pts (xy 238.76 20.32) (xy 241.3 20.32))
+  (wire (pts (xy 236.22 20.32) (xy 238.76 20.32))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 0b110cbc-e477-4bdc-9c81-26a3d588d354)
   )
-  (wire (pts (xy 213.36 45.72) (xy 205.74 45.72))
+  (wire (pts (xy 210.82 45.72) (xy 200.66 45.72))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 0f0f7bb5-ade7-4a81-82b4-43be6a8ad05c)
   )
-  (bus (pts (xy 203.2 73.66) (xy 203.2 76.2))
+  (bus (pts (xy 198.12 73.66) (xy 198.12 76.2))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 0fa7ee95-c41d-4741-af62-277a9d896847)
   )
@@ -854,15 +854,15 @@
     (uuid 1628d2d6-1934-4441-83f2-554ac860b844)
   )
 
-  (wire (pts (xy 213.36 50.8) (xy 205.74 50.8))
+  (wire (pts (xy 210.82 50.8) (xy 200.66 50.8))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 162e5bdd-61a8-46a3-8485-826b5d58e1a1)
   )
-  (wire (pts (xy 213.36 81.28) (xy 205.74 81.28))
+  (wire (pts (xy 210.82 81.28) (xy 200.66 81.28))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 2102c637-9f11-48f1-aae6-b4139dc22be2)
   )
-  (wire (pts (xy 213.36 76.2) (xy 205.74 76.2))
+  (wire (pts (xy 210.82 76.2) (xy 200.66 76.2))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 272c2a78-b5f5-4b61-aed3-ec69e0e92729)
   )
@@ -870,24 +870,24 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 2a4111b7-8149-4814-9344-3b8119cd75e4)
   )
-  (bus (pts (xy 203.2 48.26) (xy 203.2 60.96))
+  (bus (pts (xy 198.12 48.26) (xy 198.12 60.96))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 2a830129-37fc-4789-92bd-5b9b102f22f9)
   )
-  (bus (pts (xy 203.2 25.4) (xy 201.93 25.4))
+  (bus (pts (xy 198.12 25.4) (xy 196.85 25.4))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 2b25e886-ded1-450a-ada1-ece4208052e4)
   )
-  (bus (pts (xy 203.2 71.12) (xy 203.2 73.66))
+  (bus (pts (xy 198.12 71.12) (xy 198.12 73.66))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 2e29b46b-b52d-4024-9d0e-39633329c3aa)
   )
 
-  (wire (pts (xy 213.36 30.48) (xy 205.74 30.48))
+  (wire (pts (xy 210.82 30.48) (xy 200.66 30.48))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 2eea20e6-112c-411a-b615-885ae773135a)
   )
-  (wire (pts (xy 213.36 48.26) (xy 205.74 48.26))
+  (wire (pts (xy 210.82 48.26) (xy 200.66 48.26))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 319c683d-aed6-4e7d-aee2-ff9871746d52)
   )
@@ -900,37 +900,37 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 386faf3f-2adf-472a-84bf-bd511edf2429)
   )
-  (bus (pts (xy 203.2 45.72) (xy 203.2 48.26))
+  (bus (pts (xy 198.12 45.72) (xy 198.12 48.26))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 3c1875f9-0737-4e5c-bf2e-bb508a74497e)
   )
-  (bus (pts (xy 203.2 40.64) (xy 203.2 43.18))
+  (bus (pts (xy 198.12 40.64) (xy 198.12 43.18))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 3e222b0d-a61b-47de-b7f8-b8f5ba798695)
   )
 
-  (wire (pts (xy 213.36 78.74) (xy 205.74 78.74))
+  (wire (pts (xy 210.82 78.74) (xy 200.66 78.74))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 3f2a6679-91d7-4b6c-bf5c-c4d5abb2bc44)
   )
-  (wire (pts (xy 264.16 38.1) (xy 269.24 38.1))
+  (wire (pts (xy 261.62 38.1) (xy 266.7 38.1))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 4160bbf7-ffff-4c5c-a647-5ee58ddecf06)
   )
-  (bus (pts (xy 271.78 35.56) (xy 271.78 38.1))
+  (bus (pts (xy 269.24 35.56) (xy 269.24 38.1))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 41b4f8c6-4973-4fc7-9118-d582bc7f31e7)
   )
 
-  (wire (pts (xy 205.74 137.16) (xy 213.36 137.16))
+  (wire (pts (xy 200.66 137.16) (xy 210.82 137.16))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 42ecdba3-f348-4384-8d4b-cd21e56f3613)
   )
-  (bus (pts (xy 271.78 40.64) (xy 271.78 43.18))
+  (bus (pts (xy 269.24 40.64) (xy 269.24 43.18))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 453c49e6-a421-425e-a761-1679eeef3b6e)
   )
-  (bus (pts (xy 203.2 25.4) (xy 203.2 27.94))
+  (bus (pts (xy 198.12 25.4) (xy 198.12 27.94))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 47993d80-a37e-426e-90c9-fd54b49ed166)
   )
@@ -944,49 +944,49 @@
     (uuid 510e8cff-0fed-461c-b55b-564e9203c44e)
   )
 
-  (wire (pts (xy 213.36 38.1) (xy 205.74 38.1))
+  (wire (pts (xy 210.82 38.1) (xy 200.66 38.1))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 56d2bc5d-fd72-4542-ab0f-053a5fd60efa)
   )
-  (wire (pts (xy 269.24 96.52) (xy 264.16 96.52))
+  (wire (pts (xy 269.24 96.52) (xy 261.62 96.52))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 5a390647-51ba-4684-b747-9001f749ff71)
   )
-  (bus (pts (xy 203.2 43.18) (xy 203.2 45.72))
+  (bus (pts (xy 198.12 43.18) (xy 198.12 45.72))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 5af1bf61-ae8c-4f02-860a-cd44f7e94bad)
   )
-  (bus (pts (xy 203.2 33.02) (xy 203.2 35.56))
+  (bus (pts (xy 198.12 33.02) (xy 198.12 35.56))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 5c0ed0bc-1292-4884-a3ed-c5a5cecec576)
   )
-  (bus (pts (xy 271.78 38.1) (xy 271.78 40.64))
+  (bus (pts (xy 269.24 38.1) (xy 269.24 40.64))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 5d418eeb-54f0-450e-8983-4abfe3268033)
   )
 
-  (wire (pts (xy 213.36 40.64) (xy 205.74 40.64))
+  (wire (pts (xy 210.82 40.64) (xy 200.66 40.64))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 5e6153e6-2c19-46de-9a8e-b310a2a07861)
   )
-  (wire (pts (xy 241.3 157.48) (xy 238.76 157.48))
+  (wire (pts (xy 238.76 157.48) (xy 236.22 157.48))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 5eb16f0d-ef1e-4549-97a1-19cd06ad7236)
   )
-  (bus (pts (xy 203.2 60.96) (xy 203.2 63.5))
+  (bus (pts (xy 198.12 60.96) (xy 198.12 63.5))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 601d6497-ec0f-4ba6-a3fa-c896457d3373)
   )
 
-  (wire (pts (xy 213.36 66.04) (xy 205.74 66.04))
+  (wire (pts (xy 210.82 66.04) (xy 200.66 66.04))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 62f15a9a-9893-486e-9ad0-ea43f88fc9e7)
   )
-  (wire (pts (xy 264.16 88.9) (xy 269.24 88.9))
+  (wire (pts (xy 261.62 88.9) (xy 269.24 88.9))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 661ca2ba-bce5-4308-99a6-de333a625515)
   )
-  (wire (pts (xy 264.16 99.06) (xy 269.24 99.06))
+  (wire (pts (xy 261.62 99.06) (xy 269.24 99.06))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 6b8c153e-62fe-42fb-aa7f-caef740ef6fd)
   )
@@ -994,7 +994,7 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 6ff9bb63-d6fd-4e32-bb60-7ac65509c2e9)
   )
-  (wire (pts (xy 264.16 45.72) (xy 269.24 45.72))
+  (wire (pts (xy 261.62 45.72) (xy 266.7 45.72))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 722636b6-8ff0-452f-9357-23deb317d921)
   )
@@ -1002,7 +1002,7 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 72366acb-6c86-4134-89df-01ed6e4dc8e0)
   )
-  (wire (pts (xy 213.36 68.58) (xy 205.74 68.58))
+  (wire (pts (xy 210.82 68.58) (xy 200.66 68.58))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 7273dd21-e834-41d3-b279-d7de727709ca)
   )
@@ -1010,15 +1010,15 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 73ee7e03-97a8-4121-b568-c25f3934a935)
   )
-  (wire (pts (xy 264.16 40.64) (xy 269.24 40.64))
+  (wire (pts (xy 261.62 40.64) (xy 266.7 40.64))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 7582a530-a952-46c1-b7eb-75006524ba29)
   )
-  (bus (pts (xy 203.2 63.5) (xy 203.2 66.04))
+  (bus (pts (xy 198.12 63.5) (xy 198.12 66.04))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 7c1b3707-10cf-45a3-beda-10b164d243e7)
   )
-  (bus (pts (xy 203.2 68.58) (xy 203.2 71.12))
+  (bus (pts (xy 198.12 68.58) (xy 198.12 71.12))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 819d5acf-863e-43cd-9c42-c5ab95883177)
   )
@@ -1027,7 +1027,7 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 82204892-ec79-4d38-a593-52fb9a9b4b87)
   )
-  (wire (pts (xy 264.16 48.26) (xy 269.24 48.26))
+  (wire (pts (xy 261.62 48.26) (xy 266.7 48.26))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 8ae05d37-86b4-45ea-800f-f1f9fb167857)
   )
@@ -1035,32 +1035,32 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 8b3ba7fc-20b6-43c4-a020-80151e1caecc)
   )
-  (bus (pts (xy 203.2 132.08) (xy 203.2 134.62))
+  (bus (pts (xy 198.12 132.08) (xy 198.12 134.62))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 977f6e5e-5425-4fc3-b917-cb32afd616f4)
   )
-  (bus (pts (xy 203.2 78.74) (xy 203.2 86.36))
+  (bus (pts (xy 198.12 78.74) (xy 198.12 86.36))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 99f3763c-685d-4adf-b2ea-99d421921562)
   )
-  (bus (pts (xy 203.2 35.56) (xy 203.2 38.1))
+  (bus (pts (xy 198.12 35.56) (xy 198.12 38.1))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 9a776d3b-6658-4201-a337-3c87e23457ac)
   )
 
-  (wire (pts (xy 238.76 157.48) (xy 236.22 157.48))
+  (wire (pts (xy 236.22 157.48) (xy 233.68 157.48))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 9cacb6ad-6bbf-4ffe-b0a4-2df24045e046)
   )
-  (wire (pts (xy 246.38 157.48) (xy 243.84 157.48))
+  (wire (pts (xy 243.84 157.48) (xy 241.3 157.48))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 9e2492fd-e074-42db-8129-fe39460dc1e0)
   )
-  (wire (pts (xy 213.36 43.18) (xy 205.74 43.18))
+  (wire (pts (xy 210.82 43.18) (xy 200.66 43.18))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 9f969b13-1795-4747-8326-93bdc304ed56)
   )
-  (wire (pts (xy 205.74 129.54) (xy 213.36 129.54))
+  (wire (pts (xy 200.66 129.54) (xy 210.82 129.54))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid a22bec73-a69c-4ab7-8d8d-f6a6b09f925f)
   )
@@ -1068,7 +1068,7 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid a239fd1d-dfbb-49fd-b565-8c3de9dcf42b)
   )
-  (wire (pts (xy 213.36 71.12) (xy 205.74 71.12))
+  (wire (pts (xy 210.82 71.12) (xy 200.66 71.12))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid a3fab380-991d-404b-95d5-1c209b047b6e)
   )
@@ -1076,11 +1076,11 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid a686ed7c-c2d1-4d29-9d54-727faf9fd6bf)
   )
-  (wire (pts (xy 264.16 86.36) (xy 269.24 86.36))
+  (wire (pts (xy 261.62 86.36) (xy 269.24 86.36))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid acb6c3f3-e677-4f35-9fc2-138ba10f33af)
   )
-  (bus (pts (xy 271.78 43.18) (xy 271.78 45.72))
+  (bus (pts (xy 269.24 43.18) (xy 269.24 45.72))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid ad4704cb-121b-40b5-b135-30265818eb69)
   )
@@ -1088,57 +1088,57 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid ad9b4029-2050-40af-938e-f925f34173a9)
   )
-  (bus (pts (xy 203.2 129.54) (xy 203.2 132.08))
+  (bus (pts (xy 198.12 129.54) (xy 198.12 132.08))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid b116c81e-2735-4fd0-8690-f9ef8d322648)
   )
-  (bus (pts (xy 203.2 86.36) (xy 203.2 127))
+  (bus (pts (xy 198.12 86.36) (xy 198.12 127))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid b21715cf-83c3-46cf-87c4-339992bbdca4)
   )
 
-  (wire (pts (xy 213.36 63.5) (xy 205.74 63.5))
+  (wire (pts (xy 210.82 63.5) (xy 200.66 63.5))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid b2b363dd-8e47-4a76-a142-e00e28334875)
   )
-  (wire (pts (xy 205.74 132.08) (xy 213.36 132.08))
+  (wire (pts (xy 200.66 132.08) (xy 210.82 132.08))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid b44c0167-50fe-4c67-94fb-5ce2e6f52544)
   )
-  (wire (pts (xy 205.74 134.62) (xy 213.36 134.62))
+  (wire (pts (xy 200.66 134.62) (xy 210.82 134.62))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid bd29b6d3-a58c-4b1f-9c20-de4efb708ab2)
   )
-  (wire (pts (xy 269.24 91.44) (xy 264.16 91.44))
+  (wire (pts (xy 269.24 91.44) (xy 261.62 91.44))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid bf8d857b-70bf-41ee-a068-5771461e04e9)
   )
-  (wire (pts (xy 213.36 27.94) (xy 205.74 27.94))
+  (wire (pts (xy 210.82 27.94) (xy 200.66 27.94))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid c15b2f75-2e10-4b71-bebb-e2b872171b92)
   )
-  (wire (pts (xy 236.22 157.48) (xy 233.68 157.48))
+  (wire (pts (xy 233.68 157.48) (xy 231.14 157.48))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid c20aea50-e9e4-4978-b938-d613d445aab7)
   )
-  (wire (pts (xy 243.84 157.48) (xy 241.3 157.48))
+  (wire (pts (xy 241.3 157.48) (xy 238.76 157.48))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid c3a69550-c4fa-45d1-9aba-0bba47699cca)
   )
-  (bus (pts (xy 203.2 76.2) (xy 203.2 78.74))
+  (bus (pts (xy 198.12 76.2) (xy 198.12 78.74))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid c8245ab0-59da-412e-8d25-e5bcfaeddeeb)
   )
-  (bus (pts (xy 203.2 30.48) (xy 203.2 33.02))
+  (bus (pts (xy 198.12 30.48) (xy 198.12 33.02))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid cd117e33-81f3-4e15-9ad9-5cbdfd6c73a8)
   )
 
-  (wire (pts (xy 264.16 114.3) (xy 269.24 114.3))
+  (wire (pts (xy 261.62 114.3) (xy 269.24 114.3))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid ceb12634-32ca-4cbf-9ff5-5e8b53ab18ad)
   )
-  (bus (pts (xy 271.78 35.56) (xy 273.05 35.56))
+  (bus (pts (xy 269.24 35.56) (xy 270.51 35.56))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid d4ef5db0-5fba-4fcd-ab64-2ef2646c5c6d)
   )
@@ -1147,27 +1147,27 @@
     (uuid d6473873-2a8d-47dc-a135-38a6bdd1a70b)
   )
 
-  (wire (pts (xy 241.3 20.32) (xy 243.84 20.32))
+  (wire (pts (xy 238.76 20.32) (xy 241.3 20.32))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid d9cf2d61-3126-40fe-a66d-ae5145f94be8)
   )
-  (wire (pts (xy 213.36 88.9) (xy 205.74 88.9))
+  (wire (pts (xy 210.82 88.9) (xy 200.66 88.9))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid dd2d59b3-ddef-491f-bb57-eb3d3820bdeb)
   )
-  (wire (pts (xy 243.84 20.32) (xy 246.38 20.32))
+  (wire (pts (xy 241.3 20.32) (xy 243.84 20.32))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid df5c9f6b-a62e-44ba-997f-b2cf3279c7d4)
   )
-  (wire (pts (xy 231.14 20.32) (xy 233.68 20.32))
+  (wire (pts (xy 228.6 20.32) (xy 231.14 20.32))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid e0b0947e-ec91-4d8a-8663-5a112b0a8541)
   )
-  (wire (pts (xy 233.68 157.48) (xy 231.14 157.48))
+  (wire (pts (xy 231.14 157.48) (xy 228.6 157.48))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid e0d7c1d9-102e-4758-a8b7-ff248f1ce315)
   )
-  (wire (pts (xy 248.92 157.48) (xy 246.38 157.48))
+  (wire (pts (xy 246.38 157.48) (xy 243.84 157.48))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid f4aae365-6c70-41da-9253-52b239e8f5e6)
   )
@@ -1175,7 +1175,7 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid f674b8e7-203d-419e-988a-58e0f9ae4fad)
   )
-  (wire (pts (xy 213.36 73.66) (xy 205.74 73.66))
+  (wire (pts (xy 210.82 73.66) (xy 200.66 73.66))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid f6a5c856-f2b5-40eb-a958-b666a0d408a0)
   )
@@ -1187,318 +1187,334 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid f9f57a55-28b5-42fe-91c2-a575e5434058)
   )
-  (bus (pts (xy 203.2 66.04) (xy 203.2 68.58))
+  (bus (pts (xy 198.12 66.04) (xy 198.12 68.58))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid fcd90b52-9d16-482f-9241-1a464de3fc0f)
   )
 
-  (wire (pts (xy 233.68 20.32) (xy 236.22 20.32))
+  (wire (pts (xy 231.14 20.32) (xy 233.68 20.32))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid fcfb3f77-487d-44de-bd4e-948fbeca3220)
   )
 
-  (label "RA11" (at 264.16 114.3 0)
+  (label "RA11" (at 261.62 114.3 0)
     (effects (font (size 1.27 1.27)) (justify left bottom))
     (uuid 113ffcdf-4c54-4e37-81dc-f91efa934ba7)
   )
-  (label "A8" (at 213.36 71.12 180)
+  (label "A8" (at 210.82 71.12 180)
     (effects (font (size 1.27 1.27)) (justify right bottom))
     (uuid 1cacb878-9da4-41fc-aa80-018bc841e19a)
   )
-  (label "A23" (at 213.36 88.9 180)
+  (label "A23" (at 210.82 88.9 180)
     (effects (font (size 1.27 1.27)) (justify right bottom))
     (uuid 1cb64bfe-d819-47e3-be11-515b04f2c451)
   )
-  (label "A5" (at 213.36 63.5 180)
+  (label "A5" (at 210.82 63.5 180)
     (effects (font (size 1.27 1.27)) (justify right bottom))
     (uuid 1de61170-5337-44c5-ba28-bd477db4bff1)
   )
-  (label "RA2" (at 264.16 45.72 0)
+  (label "RA2" (at 261.62 45.72 0)
     (effects (font (size 1.27 1.27)) (justify left bottom))
     (uuid 232ccf4f-3322-4e62-990b-290e6ff36fcd)
   )
-  (label "A15" (at 213.36 33.02 180)
+  (label "A15" (at 210.82 33.02 180)
     (effects (font (size 1.27 1.27)) (justify right bottom))
     (uuid 247ebffd-2cb6-4379-ba6e-21861fea3913)
   )
-  (label "RA10" (at 264.16 96.52 0)
+  (label "RA10" (at 261.62 96.52 0)
     (effects (font (size 1.27 1.27)) (justify left bottom))
     (uuid 2681e64d-bedc-4e1f-87d2-754aaa485bbd)
   )
-  (label "RA1" (at 264.16 86.36 0)
+  (label "RA1" (at 261.62 86.36 0)
     (effects (font (size 1.27 1.27)) (justify left bottom))
     (uuid 2ba25c40-ea42-478e-9150-1d94fa1c8ae9)
   )
-  (label "A17" (at 213.36 38.1 180)
+  (label "A17" (at 210.82 38.1 180)
     (effects (font (size 1.27 1.27)) (justify right bottom))
     (uuid 3bbbbb7d-391c-4fee-ac81-3c47878edc38)
   )
-  (label "RA4" (at 264.16 38.1 0)
+  (label "RA4" (at 261.62 38.1 0)
     (effects (font (size 1.27 1.27)) (justify left bottom))
     (uuid 42b61d5b-39d6-462b-b2cc-57656078085f)
   )
-  (label "A16" (at 213.36 35.56 180)
+  (label "A16" (at 210.82 35.56 180)
     (effects (font (size 1.27 1.27)) (justify right bottom))
     (uuid 4a53fa56-d65b-42a4-a4be-8f49c4c015bb)
   )
-  (label "A7" (at 213.36 68.58 180)
+  (label "A7" (at 210.82 68.58 180)
     (effects (font (size 1.27 1.27)) (justify right bottom))
     (uuid 4ce9470f-5633-41bf-89ac-74a810939893)
   )
-  (label "A10" (at 213.36 76.2 180)
+  (label "A10" (at 210.82 76.2 180)
     (effects (font (size 1.27 1.27)) (justify right bottom))
     (uuid 51cc007a-3378-4ce3-909c-71e94822f8d1)
   )
-  (label "A9" (at 213.36 73.66 180)
+  (label "A9" (at 210.82 73.66 180)
     (effects (font (size 1.27 1.27)) (justify right bottom))
     (uuid 5576cd03-3bad-40c5-9316-1d286895d52a)
   )
-  (label "A21" (at 213.36 48.26 180)
+  (label "A21" (at 210.82 48.26 180)
     (effects (font (size 1.27 1.27)) (justify right bottom))
     (uuid 5bab6a37-1fdf-4cf8-b571-44c962ed86e9)
   )
-  (label "RA3" (at 264.16 40.64 0)
+  (label "RA3" (at 261.62 40.64 0)
     (effects (font (size 1.27 1.27)) (justify left bottom))
     (uuid 6d7ff8c0-8a2a-4636-844f-c7210ff3e6f2)
   )
-  (label "A20" (at 213.36 45.72 180)
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     (effects (font (size 1.27 1.27)) (justify right bottom))
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     (uuid 966ee9ec-860e-45bb-af89-30bda72b2032)
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     (effects (font (size 1.27 1.27)) (justify left bottom))
     (uuid 96781640-c07e-4eea-a372-067ded96b703)
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     (effects (font (size 1.27 1.27)) (justify right bottom))
     (uuid 96ef76a5-90c3-4767-98ba-2b61887e28d3)
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     (uuid 9ed09117-33cf-45a3-85a7-2606522feaf8)
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     (effects (font (size 1.27 1.27)) (justify right bottom))
     (uuid aa23bfe3-454b-4a2b-bfe1-101c747eb84e)
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     (effects (font (size 1.27 1.27)) (justify left bottom))
     (uuid b7ac5cea-ed28-4028-87d0-45e58c709cf1)
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-  (label "RA8" (at 264.16 93.98 0)
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     (uuid c7cd39db-931a-4d86-96b8-57e6b39f58f9)
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-  (label "RA9" (at 264.16 99.06 0)
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     (effects (font (size 1.27 1.27)) (justify left bottom))
     (uuid c811ed5f-f509-4605-b7d3-da6f79935a1e)
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-  (label "A1" (at 213.36 129.54 180)
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     (effects (font (size 1.27 1.27)) (justify right bottom))
     (uuid cd50b8dc-829d-4a1d-8f2a-6471f378ba87)
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-  (label "A4" (at 213.36 137.16 180)
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     (effects (font (size 1.27 1.27)) (justify right bottom))
     (uuid cfdef906-c924-4492-999d-4de066c0bce1)
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-  (label "A2" (at 213.36 132.08 180)
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     (effects (font (size 1.27 1.27)) (justify right bottom))
     (uuid d1441985-7b63-4bf8-a06d-c70da2e3b78b)
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-  (label "A12" (at 213.36 81.28 180)
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     (effects (font (size 1.27 1.27)) (justify right bottom))
     (uuid db6412d3-e6c3-4bdd-abf4-a8f55d56df31)
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-  (label "A19" (at 213.36 43.18 180)
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     (effects (font (size 1.27 1.27)) (justify right bottom))
     (uuid eb391a95-1c1d-4613-b508-c76b8bc13a73)
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-  (label "RA5" (at 264.16 43.18 0)
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     (effects (font (size 1.27 1.27)) (justify left bottom))
     (uuid f284b1e2-75a4-4a3f-a5f4-6f05f15fb4f5)
   )
 
-  (hierarchical_label "A[23..1]" (shape input) (at 201.93 25.4 180)
+  (hierarchical_label "A[23..1]" (shape input) (at 196.85 25.4 180)
     (effects (font (size 1.27 1.27)) (justify right))
     (uuid 022502e0-e724-4b75-bc35-3c5984dbeb76)
   )
-  (hierarchical_label "Dout~{OE}" (shape output) (at 213.36 116.84 180)
+  (hierarchical_label "Dout~{OE}" (shape output) (at 210.82 116.84 180)
     (effects (font (size 1.27 1.27)) (justify right))
     (uuid 0c5dddf1-38df-43d2-b49c-e7b691dab0ab)
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-  (hierarchical_label "AccR~{W}" (shape input) (at 213.36 99.06 180)
+  (hierarchical_label "AccR~{W}" (shape input) (at 210.82 99.06 180)
     (effects (font (size 1.27 1.27)) (justify right))
     (uuid 0ce1dd44-f307-4f98-9f0d-478fd87daa64)
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-  (hierarchical_label "TCK" (shape input) (at 264.16 147.32 0)
+  (hierarchical_label "TCK" (shape input) (at 261.62 147.32 0)
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid 0e0f9829-27a5-43b2-a0ae-121d3ce72ef4)
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-  (hierarchical_label "ROM~{WE}" (shape output) (at 213.36 109.22 180)
+  (hierarchical_label "ROM~{WE}" (shape output) (at 210.82 109.22 180)
     (effects (font (size 1.27 1.27)) (justify right))
     (uuid 15ea3484-2685-47cb-9e01-ec01c6d477b8)
   )
-  (hierarchical_label "~{RAS}" (shape output) (at 264.16 116.84 0)
+  (hierarchical_label "~{RAS}" (shape output) (at 261.62 116.84 0)
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid 1855ca44-ab48-4b76-a210-97fc81d916c4)
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-  (hierarchical_label "SW1" (shape input) (at 264.16 106.68 0)
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     (effects (font (size 1.27 1.27)) (justify left))
     (uuid 18d3014d-7089-41b5-ab03-53cc0a265580)
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-  (hierarchical_label "Acc~{UDS}" (shape input) (at 213.36 106.68 180)
+  (hierarchical_label "Mac~{BG}" (shape input) (at 261.62 137.16 0)
+    (effects (font (size 1.27 1.27)) (justify left))
+    (uuid 1bf36c06-dbbd-409d-984f-9fca14389614)
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     (effects (font (size 1.27 1.27)) (justify right))
     (uuid 1bf7d0f9-0dcf-4d7c-b58c-318e3dc42bc9)
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-  (hierarchical_label "Din~{OE}" (shape output) (at 213.36 119.38 180)
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     (effects (font (size 1.27 1.27)) (justify right))
     (uuid 254f7cc6-cee1-44ca-9afe-939b318201aa)
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-  (hierarchical_label "L~{WE}" (shape output) (at 264.16 119.38 0)
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     (effects (font (size 1.27 1.27)) (justify left))
     (uuid 3457afc5-3e4f-4220-81d1-b079f653a722)
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-  (hierarchical_label "TDO" (shape output) (at 264.16 149.86 0)
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     (effects (font (size 1.27 1.27)) (justify left))
     (uuid 3934b2e9-06c8-499c-a6df-4d7b35cfb894)
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-  (hierarchical_label "Mac~{DTACK}" (shape input) (at 264.16 66.04 0)
+  (hierarchical_label "Mac~{DTACK}" (shape input) (at 261.62 66.04 0)
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid 3b65c51e-c243-447e-bee9-832d94c1630e)
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-  (hierarchical_label "TDI" (shape input) (at 264.16 142.24 0)
+  (hierarchical_label "TDI" (shape input) (at 261.62 142.24 0)
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid 3f96e159-1f3b-4ee7-a46e-e60d78f2137a)
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-  (hierarchical_label "Mac~{VMA}" (shape output) (at 264.16 58.42 0)
+  (hierarchical_label "Mac~{VMA}" (shape output) (at 261.62 58.42 0)
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid 402c62e6-8d8e-473a-a0cf-2b86e4908cd7)
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-  (hierarchical_label "~{OE}" (shape output) (at 264.16 33.02 0)
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     (effects (font (size 1.27 1.27)) (justify left))
     (uuid 406d491e-5b01-46dc-a768-fd0992cdb346)
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-  (hierarchical_label "ADoutLE1" (shape output) (at 264.16 76.2 0)
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     (uuid 44b926bf-8bdd-4191-846d-2dfabab2cecb)
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-  (hierarchical_label "Mac~{UDS}" (shape output) (at 264.16 71.12 0)
+  (hierarchical_label "Mac~{UDS}" (shape output) (at 261.62 71.12 0)
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid 4970ec6e-3725-4619-b57d-dc2c2cb86ed0)
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-  (hierarchical_label "ADoutLE0" (shape output) (at 264.16 78.74 0)
+  (hierarchical_label "ADoutLE0" (shape output) (at 261.62 78.74 0)
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid 58126faf-01a4-4f91-8e8c-ca9e47b48048)
   )
-  (hierarchical_label "Acc~{AS}" (shape input) (at 213.36 104.14 180)
+  (hierarchical_label "Acc~{AS}" (shape input) (at 210.82 104.14 180)
     (effects (font (size 1.27 1.27)) (justify right))
     (uuid 58390862-1833-41dd-9c4e-98073ea0da33)
   )
-  (hierarchical_label "Acc~{VPA}" (shape output) (at 213.36 127 180)
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     (effects (font (size 1.27 1.27)) (justify right))
     (uuid 5e755161-24a5-4650-a6e3-9836bf074412)
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-  (hierarchical_label "DinLE" (shape output) (at 264.16 81.28 0)
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     (uuid 5f48b0f2-82cf-40ce-afac-440f97643c36)
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-  (hierarchical_label "C8M" (shape input) (at 213.36 86.36 180)
+  (hierarchical_label "C8M" (shape input) (at 210.82 86.36 180)
     (effects (font (size 1.27 1.27)) (justify right))
     (uuid 6150c02b-beb5-4af1-951e-3666a285a6ea)
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-  (hierarchical_label "CKEN" (shape output) (at 264.16 104.14 0)
+  (hierarchical_label "CK25EN" (shape output) (at 261.62 101.6 0)
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     (uuid 662bafcb-dcfb-4471-a8a9-f5c777fdf249)
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-  (hierarchical_label "ROM~{CS}" (shape output) (at 264.16 27.94 0)
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     (effects (font (size 1.27 1.27)) (justify left))
     (uuid 755f94aa-38f0-4a64-a7c7-6c71cb18cddf)
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-  (hierarchical_label "TMS" (shape input) (at 264.16 144.78 0)
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     (effects (font (size 1.27 1.27)) (justify left))
     (uuid 77aa6db5-9b8d-4983-b88e-30fe5af25975)
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-  (hierarchical_label "Mac~{BERR}" (shape input) (at 264.16 60.96 0)
+  (hierarchical_label "~{IPL}2" (shape input) (at 210.82 124.46 180)
+    (effects (font (size 1.27 1.27)) (justify right))
+    (uuid 7fdb7495-883d-4f65-8d5c-ea6abbcf2fa7)
+  )
+  (hierarchical_label "Mac~{BERR}" (shape input) (at 261.62 60.96 0)
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid 88deea08-baa5-4041-beb7-01c299cf00e6)
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-  (hierarchical_label "Acc~{LDS}" (shape input) (at 213.36 101.6 180)
+  (hierarchical_label "Acc~{LDS}" (shape input) (at 210.82 101.6 180)
     (effects (font (size 1.27 1.27)) (justify right))
     (uuid 9208ea78-8dde-4b3d-91e9-5755ab5efd9a)
   )
-  (hierarchical_label "Acc~{DTACK}" (shape output) (at 213.36 96.52 180)
+  (hierarchical_label "Acc~{DTACK}" (shape output) (at 210.82 96.52 180)
     (effects (font (size 1.27 1.27)) (justify right))
     (uuid 94d24676-7ae3-483c-8bd6-88d31adf00b4)
   )
-  (hierarchical_label "C16M" (shape input) (at 213.36 53.34 180)
+  (hierarchical_label "CK20EN" (shape output) (at 261.62 104.14 0)
+    (effects (font (size 1.27 1.27)) (justify left))
+    (uuid 990318b4-8508-4e57-8496-7c497233c00c)
+  )
+  (hierarchical_label "C16M" (shape input) (at 210.82 53.34 180)
     (effects (font (size 1.27 1.27)) (justify right))
     (uuid 9c2999b2-1cf1-4204-9d23-243401b77aa3)
   )
-  (hierarchical_label "FCLK" (shape input) (at 213.36 93.98 180)
+  (hierarchical_label "FCLK" (shape input) (at 210.82 93.98 180)
     (effects (font (size 1.27 1.27)) (justify right))
     (uuid 9e136ac4-5d28-4814-9ebf-c30c372bc2ec)
   )
-  (hierarchical_label "Mac~{VPA}" (shape input) (at 264.16 63.5 0)
+  (hierarchical_label "Mac~{VPA}" (shape input) (at 261.62 63.5 0)
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid a177c3b4-b04c-490e-b3fe-d3d4d7aa24a7)
   )
-  (hierarchical_label "MacE" (shape input) (at 213.36 91.44 180)
+  (hierarchical_label "MacE" (shape input) (at 210.82 91.44 180)
     (effects (font (size 1.27 1.27)) (justify right))
     (uuid ad4d05f5-6957-42f8-b65c-c657b9a26485)
   )
-  (hierarchical_label "Mac~{AS}" (shape output) (at 264.16 73.66 0)
+  (hierarchical_label "Mac~{BR}" (shape output) (at 261.62 134.62 0)
+    (effects (font (size 1.27 1.27)) (justify left))
+    (uuid c19d260f-7d20-43d4-b891-0ff782d185d2)
+  )
+  (hierarchical_label "Mac~{AS}" (shape output) (at 261.62 73.66 0)
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid c1b11207-7c0a-49b3-a41d-2fe677d5f3b8)
   )
-  (hierarchical_label "~{CAS}" (shape output) (at 264.16 30.48 0)
+  (hierarchical_label "~{CAS}" (shape output) (at 261.62 30.48 0)
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid c6462399-f2e4-4f1a-b34a-b49a04c8bdb9)
   )
-  (hierarchical_label "Aout~{OE}" (shape output) (at 213.36 114.3 180)
+  (hierarchical_label "Aout~{OE}" (shape output) (at 210.82 114.3 180)
     (effects (font (size 1.27 1.27)) (justify right))
     (uuid ca56e1ad-54bf-4df5-a4f7-99f5d61d0de9)
   )
-  (hierarchical_label "RA[11..0]" (shape output) (at 273.05 35.56 0)
+  (hierarchical_label "RA[11..0]" (shape output) (at 270.51 35.56 0)
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid d115a0df-1034-4583-83af-ff1cb8acfa17)
   )
-  (hierarchical_label "SW0" (shape input) (at 264.16 124.46 0)
+  (hierarchical_label "SW2" (shape input) (at 261.62 124.46 0)
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid e000728f-e3c5-4fc4-86af-db9ceb3a6542)
   )
-  (hierarchical_label "Acc~{BERR}" (shape output) (at 264.16 129.54 0)
+  (hierarchical_label "Acc~{BERR}" (shape output) (at 261.62 129.54 0)
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid e45aa7d8-0254-4176-afd9-766820762e19)
   )
-  (hierarchical_label "~{RESET}" (shape input) (at 213.36 121.92 180)
+  (hierarchical_label "~{RESET}" (shape input) (at 210.82 121.92 180)
     (effects (font (size 1.27 1.27)) (justify right))
     (uuid e8274862-c966-456a-98d5-9c42f72963c1)
   )
-  (hierarchical_label "U~{WE}" (shape output) (at 264.16 121.92 0)
+  (hierarchical_label "U~{WE}" (shape output) (at 261.62 121.92 0)
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid e86e4fae-9ca7-4857-a93c-bc6a3048f887)
   )
-  (hierarchical_label "SW2" (shape input) (at 264.16 109.22 0)
+  (hierarchical_label "SW0" (shape input) (at 261.62 109.22 0)
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid ef51df0d-fc2c-482b-a0e5-e49bae94f31f)
   )
@@ -1506,7 +1522,7 @@
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid f5eb7390-4215-4bb5-bc53-f82f663cc9a5)
   )
-  (hierarchical_label "Mac~{LDS}" (shape output) (at 264.16 68.58 0)
+  (hierarchical_label "Mac~{LDS}" (shape output) (at 261.62 68.58 0)
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid f8b47531-6c06-4e54-9fc9-cd9d0f3dd69f)
   )
@@ -1697,50 +1713,50 @@
     (pin "2" (uuid 0d097421-a0c5-4647-bf62-af2ce539f56a))
   )
 
-  (symbol (lib_id "power:+3V3") (at 231.14 20.32 0) (unit 1)
+  (symbol (lib_id "power:+3V3") (at 228.6 20.32 0) (unit 1)
     (in_bom yes) (on_board yes)
     (uuid 00000000-0000-0000-0000-00006164065b)
-    (property "Reference" "#PWR0160" (id 0) (at 231.14 24.13 0)
+    (property "Reference" "#PWR0160" (id 0) (at 228.6 24.13 0)
       (effects (font (size 1.27 1.27)) hide)
     )
-    (property "Value" "+3V3" (id 1) (at 231.14 16.51 0))
-    (property "Footprint" "" (id 2) (at 231.14 20.32 0)
+    (property "Value" "+3V3" (id 1) (at 228.6 16.51 0))
+    (property "Footprint" "" (id 2) (at 228.6 20.32 0)
       (effects (font (size 1.27 1.27)) hide)
     )
-    (property "Datasheet" "" (id 3) (at 231.14 20.32 0)
+    (property "Datasheet" "" (id 3) (at 228.6 20.32 0)
       (effects (font (size 1.27 1.27)) hide)
     )
     (pin "1" (uuid f3d1575b-dd8b-4374-a1db-6847fca2df3f))
   )
 
-  (symbol (lib_id "power:GND") (at 248.92 157.48 0) (unit 1)
+  (symbol (lib_id "power:GND") (at 246.38 157.48 0) (unit 1)
     (in_bom yes) (on_board yes)
     (uuid 00000000-0000-0000-0000-00006164325e)
-    (property "Reference" "#PWR0161" (id 0) (at 248.92 163.83 0)
+    (property "Reference" "#PWR0161" (id 0) (at 246.38 163.83 0)
       (effects (font (size 1.27 1.27)) hide)
     )
-    (property "Value" "GND" (id 1) (at 248.92 161.29 0))
-    (property "Footprint" "" (id 2) (at 248.92 157.48 0)
+    (property "Value" "GND" (id 1) (at 246.38 161.29 0))
+    (property "Footprint" "" (id 2) (at 246.38 157.48 0)
       (effects (font (size 1.27 1.27)) hide)
     )
-    (property "Datasheet" "" (id 3) (at 248.92 157.48 0)
+    (property "Datasheet" "" (id 3) (at 246.38 157.48 0)
       (effects (font (size 1.27 1.27)) hide)
     )
     (pin "1" (uuid 770fb8c6-1b30-4eb3-8a91-9529085c4f1c))
   )
 
-  (symbol (lib_id "CPLD_Xilinx:XC95144XL-TQ100") (at 238.76 88.9 0) (unit 1)
+  (symbol (lib_id "CPLD_Xilinx:XC95144XL-TQ100") (at 236.22 88.9 0) (unit 1)
     (in_bom yes) (on_board yes)
     (uuid 00000000-0000-0000-0000-00006318b3c7)
-    (property "Reference" "U1" (id 0) (at 238.76 81.28 0))
-    (property "Value" "XC95144XL-TQ100" (id 1) (at 238.76 83.82 0))
-    (property "Footprint" "stdpads:TQFP-100_14x14mm_P0.5mm" (id 2) (at 238.76 88.9 0)
+    (property "Reference" "U1" (id 0) (at 236.22 81.28 0))
+    (property "Value" "XC95144XL-TQ100" (id 1) (at 236.22 83.82 0))
+    (property "Footprint" "stdpads:TQFP-100_14x14mm_P0.5mm" (id 2) (at 236.22 88.9 0)
       (effects (font (size 1.27 1.27)) hide)
     )
-    (property "Datasheet" "https://www.xilinx.com/support/documentation/data_sheets/ds056.pdf" (id 3) (at 238.76 88.9 0)
+    (property "Datasheet" "https://www.xilinx.com/support/documentation/data_sheets/ds056.pdf" (id 3) (at 236.22 88.9 0)
       (effects (font (size 1.27 1.27)) hide)
     )
-    (property "LCSC Part" "C45126" (id 4) (at 238.76 88.9 0)
+    (property "LCSC Part" "C45126" (id 4) (at 236.22 88.9 0)
       (effects (font (size 1.27 1.27)) hide)
     )
     (pin "1" (uuid 0c6899da-97e5-44e8-b9a9-b5deb4ca412a))
diff --git a/DIPSW.kicad_sch b/DIPSW.kicad_sch
index e06f5f1..eafbd50 100644
--- a/DIPSW.kicad_sch
+++ b/DIPSW.kicad_sch
@@ -318,11 +318,11 @@
     (effects (font (size 1.27 1.27)) (justify right))
     (uuid 62ed984b-c070-4de1-bd86-30aeb09fb9cd)
   )
-  (hierarchical_label "SW0" (shape output) (at 85.09 86.36 180)
+  (hierarchical_label "SW0" (shape output) (at 85.09 91.44 180)
     (effects (font (size 1.27 1.27)) (justify right))
     (uuid c1fbee58-f474-4414-9110-64abd03ed7c9)
   )
-  (hierarchical_label "SW2" (shape output) (at 85.09 91.44 180)
+  (hierarchical_label "SW2" (shape output) (at 85.09 86.36 180)
     (effects (font (size 1.27 1.27)) (justify right))
     (uuid d0292983-0ab9-4b24-b3bd-f154f790c7ec)
   )
@@ -331,7 +331,7 @@
     (in_bom yes) (on_board yes)
     (uuid 00000000-0000-0000-0000-000061a8bbd9)
     (property "Reference" "SW1" (id 0) (at 110.49 82.55 0))
-    (property "Value" "OSCSEL" (id 1) (at 110.49 95.25 0))
+    (property "Value" "CFG" (id 1) (at 110.49 95.25 0))
     (property "Footprint" "stdpads:SW_DIP_SPSTx03_Slide_DSHP03TS_P1.27mm" (id 2) (at 110.49 86.36 0)
       (effects (font (size 1.27 1.27)) hide)
     )
diff --git a/Documentation/DIPSW.png b/Documentation/DIPSW.png
deleted file mode 100644
index b83dac7..0000000
Binary files a/Documentation/DIPSW.png and /dev/null differ
diff --git a/Documentation/FrontIsom.png b/Documentation/FrontIsom.png
index 43e0b47..f53c706 100644
Binary files a/Documentation/FrontIsom.png and b/Documentation/FrontIsom.png differ
diff --git a/Documentation/GW4410A-Assembly.html b/Documentation/GW4410A-Assembly.html
index 14ab230..a590491 100644
--- a/Documentation/GW4410A-Assembly.html
+++ b/Documentation/GW4410A-Assembly.html
@@ -879,7 +879,7 @@ var config = {"dark_mode": false, "show_pads": true, "show_fabrication": false,
 ///////////////////////////////////////////////
 
 ///////////////////////////////////////////////
-var pcbdata = JSON.parse(LZString.decompressFromBase64("N4IgpgJg5mDOD6AjRB7AHiAXAAlAWwEsA7DHARgAYBmAOjIHYA2AGmxEKIE8tsr6b69Mq3YBDNKWwAmMlJoAWMgE4Recd3LyKNClKUBfEZBiweAbVAAXTgAcwPEKIBOAYxAjYl55fOUArDRSABxUrFRKNEH0QQC6Ik6iEAQArqY4ctRSHl5OXkRQADb25EHaFEZEEKL5RTxS9GUiAO4EEJYAFjzaZH6GuCDWdg7ObtnevhQBwaHYsvx+FLHxiSlp0jpUWWye3tWFxdhKjWxglXu1JccgLW2dON29rFa2B46u7ts5PjhmynJaflYZCoZBofnoUjibASSVSdQ2WxAO1y5wOAFojjoKlUagcrjcOl06I9+oNXiMPkivuYZNoQVtwpFolCQDDVvDMmMUbieBirqccfsieU2AS7tgHn1nkMcG9Rp9xj9lIwFIwVLM+DQlFJIctYWsMpsuXkhThMSLwGceZcsaLWoT7sSpQMXsN3saaZQaPSgZrtbroSs4ekEcbUcLseGzfj7eLJU8XTLtmAoHhTj4PT9ad7ZGF+EF5IwWQKJlMQnnIoWWWKiT1nWSHLAU2miBmFbkJrQpH5hLN6mDFsXKp3Aj2whEoks7bdayTpa8m6n05Tkd9sL9tQpJkC9GD5EOIKXAuW+xE/PvmrHZ/XXbLFy221TFevlPIFHxffx/QffEo3/IPw1UFwQDa4r0dOsEwbO9m2XTN12zH0NQiJRzx/JUlBVQt1WBFC0MvGcILnRMF1g1sV2pLNZG9eR5HHJkp0tQ8qLkKhaM/LUdWrcCJSdFkIASFp8jWUBYAIAoAGtYBcJwwFOHhQAAMXMedGzIx9V18Mg3wYGZZFBHpGJLJUyFBJgdwMvxGJrR0pEyG8kyRdSKOfX5TIEFg+zkJQqCLbEtLMzz9OJayeO0OzNgc0il3I+C3J0+g9J1LVfPQl9tLoRKLJC7jCN4iKpCitSYo0yj0sCndvNS/yTISpKqr86cHXy+yoNvZMSpcjsTIqvsAjYpQ0rc3rZFocEyFy5rwta0l2qczq4tMuqd36+RBpq9Llr7MahEmuNAhm1SYIW9s13izKkp2iaNuGjydyuvaiQKorjofLqztMkbuxo9aTmHWqLpWn7Htsw6SOKt7FuStaeh3HT5CkRqmN8aGlFhvt4e7EHeKoYjoI6yHTpR0FgkBPrgZu0aaDVIIgYG7HpsitrHPvOCiaVKRaBp+6wV2ymZGPMmqfGhmDqZ2aWecqGuaUWnyfp/mZbl4W+aa/bnuZ6LCafbqXwF0m6bWobgoN7beeutWnrB/H5u1zSOZJoIheSnykeMvWlcqlKkZslrxaOgm2Z1j7Oep2Wvdd43Q+5vtLNCvLGcKzWIaD+29cd52GqjjPssM0WNYlrXU7K35o/D2Ocv5nOK7zgiprFpPC5T2L2fSrmKHR2RMfkPxjeBamO+dzHcdF3GXsDlvg5R/40cz71GCrfmZ875LfJ70e8bm1nJ7Ttz256Oe197yn+8YDvGEPhfj8tx0x6g9oCBcCSiDgNY6Q8AA3KAbFEZqQAAWW0v+RgVBfLCC0DmNiwQAAyQDqa4yELTRQkQ+AIyCLAnuOhGB2XMhA+g8gghO3oBgqYZBsEqGQSEfBMDtIBCYJheQ9BmAQJBFAoIgDCyRFkEERg4DQRULQRglUaNEaMOYaCagaMEZCMiFZGQSDtBBD/DIiEMgxEQKCGomhnCAJkB4eAxRWj0HaRVPUJg6jFF/g4SqTRyhQHiI8gQ8EMjGCMEEHohxAjtEqioBQAhvDPGoO8XQRgUQKGBSccQkxdBtJgIcbwpQQh5AyOBN2PxDjGE9yEDInUmwPHIM2H+YJfB8H2OQd2UJzjon4N0OE0clSomcKUT3dJyC9FoL8Bw+YVAiEsEoUE4xjDqYX3BH0wx2lghdOpnoPQDjPpJIwfwCEFAVl0QgZhC+2TtL5nPhYyIyjtlaj8FZAJGijEYKCHQDuqzmHjLQRwy5Z8jitLudoy5ignatNYj3e52lLl+CUICspljkl/IEOebZtzIjnO0hEPxtFgXQomYMiIejJgvP2aCtagRaI3PWa48aGCIh6ALGUgypkFmwpxVoVpwFGETKJcSQp8T/RO0ZRQIQC8mHIPMUQi5WoGAAVCP06hgzHn1EhSKwRYKYYcr6REohHCIj0ESXEnlC8+U9DKBQM+tKUGitgQseehDTn8IGYa7QfhOZyocbyqpRqz70qQaCNUOo2VarDueMle4klSAtQIYEoyMm6H9RfKR3KSZ+Aaf6gFUb1EGQLKTf1PdUK4PJQwbS/qGAhFNRsKRfqPV+J1BQ7QGzCVUsSWEqFzTGXagAqc7Q+DCFVOxUUhYaztBnz4JmwtoD5FQp7kQsgWa/kNu9Dw/1iMji4LpMCaVDqQQ+WFbOth/qCyTBneOxggCewKFkDa5BkiGU9FBNqFZaa80TJ3YaUoeqvHGN3fSWZUqaG7oWPUEtkD51yDde2qFrC0EgHrA/J+L9YBvwbp/b+v9xQANwgPTYPTmHt1AaAjBZQoh+O5Sh1DgDGQLC5X02gSiwFKFgYyAsPYEbMLkFEJgyh0N0BCKUChxHXbKA4aW8ERw1nEZ7pzQZijeETOQ/s0jjHXH0dY2JhJjHwSLHBKJyjAm5M6kYURgQmFNUQMyRQVComGgrNQox3T+mAJbllnp1TUh1OidYVhuTDQiGidEa4xgEm3EJJc2QpN2khNLSyOZmQ2D3XrO460rsC83McP4cEejSn+M9IwWZI05mSOye0sBHptm0vsbI5lhQigkkJatUlgr4RUPCtoCq6N5XaKoUC9VlZem/DJZomtK1omtCWfywUpdZTaD2cYW12iGbeOBCi64trfhsu4K7D50LKXGuBAW61grmioinMi4WVxHC5AX1GkgvjpXBlyGObRObMmGMTPni15b6XrsIwm4oaTymytPZkFZPTBmCHqYwT+wy33zNgOlR9heygXOTfczd3yd3vMhbW0987OX5sI/+9THsAnIc7eh09tUmEIfA94aD/bgKvPmcHY9gHX3pPnYaxwrspRCdsfE7EpjbCSsqbZ4GrDP2CxMAwbQHn6jaOCASRwt8kwOmc/e7QVNpWlN5cF44xXrPzOSax2lxLgyuZ6Oc+Zptf22e8Obdh+eyLlca6Q0FqHyvzHw98+Z+XnMHehcl+eA2NuccYJ0roNzdnifaN94jVxXWrKPd16b0TdOrUS7BD0lrquMu0XjyxwEQXVtx5m2nrremWM+7BDwlHkCHNwJAZE7HbmC+JTIczlbaO4Ebet6j0mHCAhnxs5dh7vX2+6GLyD7RARzuJ691X2hChwSodd4jqYICWPT5ISEho6jtvRfHx34vb3BlD43dpJPj3Z8J9e0r8fZDl9m634v0yPDQ8G9+wL0/ej/fq57JSzBZ/efmZjwWzBiMj/R51XLUwQWHGnGwIyAN707w00pyUDby1EUBEwzwb04U2CCDr2C1b2iUWARxoyZCkxkWwM92q3v1xxVDnWf2Oy504U5mRX316x8WCDr272sS4XuxP04SEBOxl0GRVDc312qy0xbV4PaUu0MxaxcREOgLzys2iT4MU2B2BFLw4J6E11Xym2iTQOWwwNC2EVAK0NW0WR0Bmx40r3UKGUoF/Ts0UOG0OS1QoIs3z1sII1vyayM0R34AsKIM01qyGUmHCAi0rBOxkVTUQJZ2TxsVzFy1IymRORHzCMe3mB4TiPr0wKGViLM1oG60cKGXL372sMaX4FCVJjN1czMKWRq3QIMMOU22bxSKdgeUrHG20MR2JRBE/xb3qLBVlnzToP5W6NCJ0B1Ho3ZT4AVye21Fx1RTYXT1F3wKpRoM/1mPFypSSX4Ku16wiBN2SMvypSjUST3wN0EMaTPBkCnwN2a2M12NOIGwcJkOxT2OKwUN8RsOxS2IyOezH2xVWPkI6JaMiA02aNrSjXi1H3UKNRWSo2WyGyiXBJmzGMyOkPy1hNxhd3OLcP9QhIGJq20zwk83AUoPewnA0270ZW+Ivzyx3W0AISUU6yiIyyNWpIa2n0pIUEISZIp0RJjT4DOMG3yJjSHSaNtw9SKOL0BI9UEG1FqOaJ3X4W1F6JPX2UCyWOuytUCF8XsK7VQ0NTOzVDOOVKRJ1P6zoJ3UyNN3xPWMNVNKHQDwtx6EyK0HQKFJmxog5yQN82dNhRMLdPdWdL8IGNKO3TtNZOtK1yCKDPCDRWP1Zw9LWi9PiKRNoD9Oo1DK519Kwy2wEBIMtJ0HTPNIO0pV9JmwGO/2zM9ICPAK2WdIjPny/0AMrKtPGjDzQNgJ6H/A5RrIJIfTfBBEoBXwtNbJiXoHhP7PPEGLlXNJ2OdMSVUO8M1SnJswMwuLW3nPGyyJkKnIhFqOhMNUlxwQzIDJ3MHOHLFNHJ7PaLqOXLbOiCBzUMDOOTBFCXZM7MNToT83eJJIPiOWJJPyjSMPqAzMnLII7ixKOMNTII61RNcPEJ6HAoayqwQy1JgquQCwAM2WHSQsmH/PNJgJfK/Nzx61wqYCgJtPnXbzQvG23M/N4UShuIPM/KjRpOWzPx41woYqfJ0CEGPXvOor1K1FKQfTItANwImMIuwRy31LApzIAiQQkqQthTGO8kRh3RVCsggpItfWEU5nJ0G0D3YR6H4B1U2wnJ/JUoLHYo/N/NUvZNkvBCwSMtwLowSSA3vkfmflfiJBmCRC/h/j/kAVDn2MbKeyiB7lgVDg20eNo2oA5XQujiAWCAcqiq2VDhpUQNFxCqpm7AhCdlEw7kSiqVDj0Ssh+JCV0B7QKriqO0KwBRoXKtonivVw7zKqFydjWL/GquMVDkys90l0IWiDW2SpWUQLfBoIXgLVirqqQW7MSpiuqxAmypT18V8SSrl04KEGYWGpBFGtCslwAnWpKrUW2p0F2oatKtBVDiHKyvTy5kavkD8rfC9QSqWpirfGeSGu9GmtCoCEKrWJGukVkACHpUCqmqes+uhSiAOMiqeuctJBAzcvAw8qgx8tgz8v4CFQDzQtCtRrKW7IJSEBRo4qKu5TkBVUhNCpVEQUeOI1xpisKMYS8Jv3Gj8suX0UCp0oxu4X+P0vARxrQqZoHAmtwJJuPWCDoDpvmqpvZt3A5UJqU2prwypOxvnklrPCHP1x5sZsUKkrQT2t8nZt8S1vqto2ptCqJK5pytKE1V3ApoOK7E5kpV3HBBlqC1QivWBFBDAUCqNr1uAnhUNv+O9upjFpmJSmMRBADXBvGyM2lTDpVQ7mTKFytV8zDpZrWopzK2Tt4VZs01Jrds0zjsCx6oUyiRjr0UeOGrtp7TDq5W6sCBdr+rDvbW1oWuNtzo9tTvVq2TDvkTLtrpzrDu2RrtyUpTDulrVp0AtqqRHt9sqqFvrokWnq63TokVVuKpUKToMiDpyr02jpJlLohpDvI3dsztTq9o1s2HfHgp8lDqF03qdx6Twx/SODet1vLXPtjtSv9tfq7CfuTI7rIGhqsFhrAwgx1DJi8ug18uvwUCOEBU/VSVgT0RoidrKABWlUQe4UQJQaKWMQYAFSLQUToE2AQaWQvk93CncT+twddUeKpJ1F8yobskwYDUyvQoYfzqhR8l0HdSoe1EeJJjsnLVwaYCtXmqPtAOIbwabuAkoE1XQcYOTOAhCDQcuXqFQPT0UdXSgbWj00BQcR7CLoQf+RAUCtBGkvoaMYQQMRSi4bW0QdUbIescwOUH+NlnkI0bQaJNce5UbSdmPWcZVUuqhQXgQc2KtSYeBI8fN310tTcUieCxocDsAWcZ4S8b0ZkaqX8c7wOPcZoWcbAX1xyZweJTP2ybBHSaiWcaAUQLEcpUqdGwUcCAEa2WcfidKelsifybcZzOKJCYECybWXnp6dMk8eiccc6LsjBFQhMcL00YmdjUCpidFT8stSmdTsUXBHts7VCSYaEBYdCsbS0ASeCf3UiBavkMWelQFiitgahQicmWCmzxueQSslmayyUV0YgTub0oFkeY+fWYodCpdVMgWeYfLQFlCUUGTM7TOti21HmouZqtPXwSboRe+cTPIQ+ekYMdkG8mzS6Zecuf23qGmYJZqv+E0SkbKexehjzy6d8nEZxYcPOYEF8b+uhgpfquhdCqJYuqsa+e5YFT6u8YfINSph1T0D+cDtCqF1xhBb6uFpleOTWbGf6v+FpYjQJt+VDnkyedRcOpPRBa+b8uq16oOKwcuZNYjocXpftqpu4XUapctslx1UpdJY6p0h7BJaUfuZs0K0KuFf5f+sGJs05ZFa1bfDDRBcmGwcOsjdTpqbKrfESi0TSepbfDo090KdBt0BDedRma1cgN1aMJjaDY7yLfgaDZm3wahTMWFoBvBFGYGiST8rIJCBJfKbJu9Di1Kbdc7ZNyeazdkHJvBwaf0ctpsV8j4fngZcRhQTcVKb0BBDZeHchcCw3o6uEPebqXaZqqwg7kzc1d3fqWqe6fHfZxBaIXttbcsahXleXePahalaHa3HtdudiaPf7clcDdnfMSYYXj5pANGejcueZtCSnd7dkFRSsiLbWkiRNsKzhYdYg93E0KYeA/uf1t4Wreee9dDqpNIdEcdcnrpF4dKbMfdX1s2HYfKR8mPUo8YcfcvcrpI4lQ7VBc7vw5EfTy5c1qw5RbDZoX1o23Cffbw74rUaCdBRHsHWZd2dfvJUTQIaY6k4U8pcXbo4kRk41fI7W31tVQPbHeI7BpPYg8w97PqsKbwzMlWr4XzcE+s7Ns+dE6s4EBs+rQ2crv4XqcC0bX+s7tPRKbY+OfPp1X9bfdFfPrsnx0/SNdSQDVjLqVM+Js9M/XQ70vPqSJPZWSGdAV7q9bYTw2/qVb5dE/I2S4S7mQIUK6ZED1Tc1TYkGNfZw80Ya57Py+jv/GBJ7Y7bnTBBmUI5tcrvuv64dfU/rs6/nYGdFtDu7OBfjcPZm50Cvq6Z3evvgKtcPRseLuI3o0Y486k529q7wVZYLVy7/A2544a70x6WZcDda7m5K4i4m6OdusDSY1zb0dw/Iy+o5YIbS7wwCDbfa8E8B9leVbvdO7oRAUk+++pjxYDdK7e5Ssfbu6mGORh7e70Q+7wT87IDw3JpVU+5a94NAQKaI+LpUt4QPZ0/IywlNam7G9O7p4u9kQBeBEp6a9872fZ/gRu+FeC4J5i8R98i1EwgSbu48I+WZeC/4DUX47k87tl6iHc7Z81DiwcUZ/I1l4qoyR6STsl7C+eZ65F7J3A6+554lKJ9+T9AdJR+F6/Ft6VKW+RTwwd+o8u8uQUwcbu8uVGMNeF/+RwTNafZ6UmYk5x+59D4JVGeU/I0eQvjJ81+BH+R8mp714o8D+iqm8M+Lt96HOB9Ds96dgM/N5t+o6xaIQAYGCAfctBiNG2G8pgwcCSZerVG1q7j/NkYCH3YNg747gQe7/DipjF78f6hxeyuH8m4LR6G9CH99f7+BcKyLuYD7644qYBqoT3w7+T8EY3+7Tog77U3oYBq0Gcw75RNkZesRkbI754V9QH9ZP35X99bv9drIVrtpkn/v8X5Sfb/8qn4f6aI0Kz/bsiEVBQz9f+8Vc/mvwf5TMRM5/VhmQTb5QDfWIIBBqYmOTwDUBMA0yKYjn6gCGW7/NiMvw74EJbSRA0/opg75qhCBeAz/r62iDkCMBkJEAdCg6ToCQk2DVga/0oYBA4B1GW/gAJ/7ID6B6bXNrY0B7X81qHfRgb8lwaKBLCgg7/vIPH6Agv+fjJZKoNYG8JDGOgLQeoMoae99BL/Kfkk3eSUCmESgvxuYJIH/9fUZgpfmf1QFgDdB/ArIOfzAEOC3B3AoQYg28EGCpASTYlPgImzKDlUIg1gYjDCEf8fB0Q+hH/3TZT8q+HQVysAytj19wGSNZvktC1ARDgoICLxg/x74T8fmiSIoXP2AgQpeBOYRQT8yqHT9+oFQyZuv0cFUDwW4QLvo/2KzBQIQxXB/gQif7BQ0C9rfoRYOf6noOhGTK/sAMZY/JR+XQrftDHqFJMVQfiWwZUNXYcCh2N/OoZsNwErZahwEMofsO7AsD8hkwipnQPGF9M+h+w4gU4NlKXCaItguQJ9HoZXDGWwQVjhwNOFYDWIELXJqYmMH/BTI7wugFIOECzD6hHAtYU4P+DQjF+/g6GKCO4Z8DgRxqNBoDzyHJQvhtTSQTMOShvDUR0KAkY8MAHYizIpw5pmiMOHwJChiIzAQINKFPDYRbQjYW/1Rroi5hlDTkbSPOwaDmGvfQkccMQbFC1Buw6wXoNqHwjV2Dg3FHCInx7DEG8otkWCGWFaMxhwUWWN8KgZIjT0miZtrqMZHuClhSoy5HqLVGyjhmMQoYQiP8YUjZESo4IfQJlF+NwhXAqEau2SE194adfRELAEb6QMdU8BSdiwH2GMIAUaBWBMGJ4z7EV+7/KjKEmhzBjogUefYcclARoxox5NJaGInTEzYIy2YyZgWNCDpiTEE6SgCpQYCSl4xWEPgP+SLGMJtQEOO4ZGLcSNiAQW/d/gIz8TGJgxuKKjLWPHokZQU/YlVDIBUCIi2IwLIsa/hrE/9gSkwWcahCnyL8JSegZMTmKASWCZ+NSAFOhRTGEIz+u4gEFmMrFag/EcYtceOMwhFi/woY+MYDz0SAIOUW4NAvYnzGZiDx/AUBByhdxljCwFY18TMg7iTj3+AECEA/mAlnoWxJ46Nnj0oD5hSeE/BMQWLPGvihyhGIcYmKAmaDBA0g8CUOVljfjqYsdUPHcK8YFpXxbiI4ORPf5kJy8VAaMXhPcRDjFgI45ieCiwn7D0UxaTiSEB6QoTVhwLGzJxP0w8SRJo4z3vUG6xsT30egaMZ71cRLQ2JbJNiIpKuRkCwJSAxiRpN7LNkhxFwqiUpOEwH9CJkYg8dJJqTaSymgE5MV+DUGoSvx/E5CY5JUpoSEJiwSIIPHSQASkxGkiEN1jclqjnJMjB8rwzDFOTCxYUmGDfmwnljkx7yIsgEnDFESoxMUoBFQKIGUSNJkLLJEOIYlsQmJMU5KZCPf7sSfIUk6Bk/kimrD5J+WLyXsX/JsTJJAUmzIngkkqEqpTOP9DxPqkvjUUa0fnNhI8nRjBpssPMXBP3EDTGmvQncaYggkzYxpE+c7sFIzERkZpKaJxC1K6nLTYUw0u4TIB8wvjTE/5JDBSmhSFJRxPiRae4Nwb6JYGs4+seZAukPTAURY4nJUnjH5hOYega6RjkzHfSWWg6BqbwTPTiShG0VPsWDLsgQzCiegQQB9LQlAzjkWlA8cIUAmOT5g7PKNE9MgmRTUa+CF2kWL175SLp9aGzJuPertodxP4xJB7iLEh4oEQM3GIQj4CMyzpn/XBvI3qAcymA507mWsL0SMzXEzMi6UOzPjQzqZvOC6YsFjr/TSZWUgyjDHennjHaQ/XBpeOUCgyw4sMrGePXlkvifxCwG1K9N+kHJgJEIf3K9ISSqzXxFKA6fdNtkNTlZfiAWT9KumcTBqNFIGfgisgFgvZuVD8fIN8iUyvZWgaSizP9nszEJg5R2T+MYZENY59QEPATK7Ydwk5r43GOejTmsyqEnEwSdECBkUzCwBc3qlzOxn0t7JOZXSKWNwb7jACRs2RIhgrmc1HpscwQHIlbmaJPZHc7tP+KEaDoA5fc3ZnXOVloxAUL495L0K7Eey/pGk8IPozMn5hnZGk9qb3ydnayGplyBbC9PunmyqpXcDNL7KHmHybMx88maHNLlhTd5uc6OVEi8nryUJCcjOcZNn5LyWZict+XTUHEXS85McxqaCNglY0xKiUspvpDAmVyL4YCo+QRPmBoxG5lAYlByhMJmze5emQhpeP1lvTt5fFYEmnJwUaSlEQAghQfKIWxoUpQjSjEoiIV2RjxSyKGbQpIHyCiZPYchahEoV0yhyf1LycQpDxRy2ZD880ZhL3kvyK2GC6wnDPTniLkF8sgRVQk2kOlg5YizOcqjWisS/5X8maccjEq0yjqE8hqWeCjSd4T5/s0cWeD/BMk0F88pBaRLRlAzCFtiomRos3mwNvRqQ2vn7H9GBjkat/esSUP1E6jfWM2QJlqINHaQ7q8eUJaaOFr3V/F4o9kWy1b4y0Hm6o76G3z/6ui2W7eP8H/0CX2128nraQQLCURRJvoUaFJSUoRHfRwgAtW0XsJqVyzFhjwvyjkrqXIiRhpbJpQfxiXZLZ+7SrJWNX6jdLn+IIzpd9Gv4KjNgtwiZQnzaE/oLhoNXxFa0Zatk62/SzJTEnGW94VlhIlEf1TaWbLDKWrVYUziZFjLfMs7MhJUsGWdtQE0S25c+wRiliOllyrCHMssGrwqRMVd5TcuPBBKsI/44UWUp8TxLRlxIBpaYhGWrLqlZBIFa8P2WdtFg7DRlroBmWnKUVAsbUVe3BEvKyRz7Ohd0KqWQrvQYK+pcLUBV4r9k9AFtn0ypVOwGlBlD5dcIZWu1Z2vjHYYkrGo2IilkIr5eisxSbKECbyrUGcpNGPL+wgBBUdyMCEc0Kl0q6pSo2ZWorvlfNSYGbU9HC1PevK64fyLZa+9clKArlaFXeRirdVxwkWgrnOH0jLVyqgWL0LBZGNKl/CRVX1ypU+QbVpqzFfkrKoGqBlgxGZdqo1XJQ0VGtXcKNF1XVLgh7S41ZB3HTermh8HQsM6upjhKzqZ4aFcSuFoZrdlrwqNaqD+XTKwWEQBPH8L3TjLo1Qq/NRGs1Vss4UZK15e6hFou0dhrEb5SaovG5qIVWqztUSpdUNLzROq/IWmvg7UBolRwspaiiBVcq/KE4Q1S6MVHZrBVRqy0XR26DzrwVygYulSQ3WpK9h+tWDlWq9HAYPFvorxYjSb6yhIlISoUYkO/7BKG1cuIQS/wbURsYqX1R9bkPvUfrold6tlXwKHUmDv1RyYNQQIKW9rFhs3UGj3MiHPrCloG0IesvlVtDZurSkDTsLEHsCg2PCSpX+r6UHYMN/xYDchs+WYbLlQ+IFUmz57vq3V2gnAeUrtX3U4NGOBDVaiw3fQcNTg4buxoA0IayBJyjyLhrYEirQkmKvDdyoHC7LxNnbZ5dwPEF3KzVMgtApc1BW/rPUOK+5bevfBDoFNYm70PRspWsC0Bz7BYFJsQ33tRNWA4as+uHZCaQQfNXGAhp4FjUg1hG6SmGqQlqbnNmNfVEKKfX3qd5imuwT2smUoa9BHa5ZUSvdxDMRajmwjTvySq+9AN1mgLe9TM0X98qSquzS4I5poorN2msFp5q03ua8aHNI4Lsv81LrkVWAyrXWpCRCaF+u4bsAhpaz21K1KAlLUur+kJCRWXW5LQIGo3wdrlXG4TU2rhRBbpNZWzNZNpFowbb+8mjmolDU2JQdNHNDJR1t636qw47SzrVtqW1abWtvqy6awMa3mjM1tW2VbuEs1MiZtmxILRdvg6WZ8tOgzWsEExUPbXtE2ojRMmSFbwpYrcPeAIGoCsAGg3kshH3CawzAhAcPWiKLC6njxbYxcVyKCKuRQ7FE58PuK8OB3YBodxOC8DfF4jw7k4r0JHbrDchQqAUIOpNtpD7iNCQQVO+LnDrY0I7t4pUZHd2OjYg6hcNOk+HTt7CJQYk+OsCAnGJA2YWd/2qeCZAp3qghyfXegLTtn706cdFG+XXXH2hE6m4JOneCXBOGc6cdHheoAroqz86DdqugnQ8DF3E6J4bOsnbnVBGW9sASiAVMbH1rRBVEvYJ3WjDh2NwA4iO7Xcjv7pzBCeju5mr9GRhKhXdUQHUB7tD3e7xdJ0SXelG8iuwQdzNa+OHrbjeSF4qe2REzst2a7rd70LSMnt8isBSgE+CHVnroiO6qS6e32BbvkAnrQMnixOBesgaIMQEf40sV5IvgEJLiHepav+IwX0hNsug1xB6OH1HBzGQO98d3oiBoJVZiDPqh7hX4YLCw9CWxuaK0BxJbF6+mgb01yoaK19wQRfXCjjQvTJ9NjA/S7U/7D7uED+Zxi1g8RhTe9NJIIReJVS3759nmfvfPoAhWq19P+zpNaLcSO13BgBjfb01ANDlwDjyc8DSV6aRixZXk9xEZkQOwyPxvC37NdmcYIoADzNcGpzF+2SwE9u8FHXvlmDdiLYGetyK8Or2L8ewceq3X7pt0hwyKQIDuKLyjg+IgonBwFEwYL0sGi9HMHg0CBn6MH+YhRIWOIeoP17wR8eu2DruogFgODp6MPe7FoOi1VDXBtXbWB93gwtdrB4vVodmB8H1D/0JPSYYsJhwBDvu1ncIb1jsHKDQI7g/PDEMuHdDEEfQzbHsNQxRDzhlbK4dL2UGh8shsKPIeYO+GAdz7YI5QDUNBHeDpOWwwYcL2LRlD9Bqg5jqsOZHPDhO7w39tIM67MIo4GYJghzZC6NDyoEo6wBTywyfY4RjXXYYl1kG/wAMmo93zUzGxWjF8Uo8NT0z1GRdjRlI0IcWjFHuwMwXdDZmqh/RmIL4MYzNlYCqlJgC8PPY3siPNGijEbBY9gEmP1oujWxiYxkDjSrGFDpOj6IkiwSeRdj0xmg1usuOLGjjKx3Iw3tOP+7bdssYZFcZJh7HKYHx/3DsceNC65DQxlIc3rPWt6G+EDXxUvpoKKY3EA4P/L0z1zUZ4TY63yEUxWwNtaYriI5FamwS9NPsqY5gDieeR4mkThCFExEUTQH7ogf4FgDiacx/gKm5orTIoGJO8E0C3GVwQjF7LsnU1+lfLIgydiwMVADJxYEyd0G1KltxJjwtQgQn3T8E0pnE73pkASMJpR0vk/zIha6CdUICMhJqYQVWpdB+kPwgaf8DT8VGDbfTAyZATamoGUpj8Mqc5Mqox97PFQzicLB/5WGjyRQJhT5MJ4yTUDcHH6ZxPTLaTrp9E3RBxNTG7TiDdtDID5NzojpughGLSEBA4nKx1J+024nROJnjlFpwWH/kTNQJTIxp37AmejNCA/CxptM6EFDNFkrINZ/wHWb3a0nN903Hk3ybWi6DMqNJPkwCiZPFTEGbEPk9ggBGSnBzTCZU4jCzPKimAiafs4CkYRUBKQskAAGY8AyArxowyZGVRRVleOO/DlfVAiVHV4WxOWPCbQK6mTj6xwo+zsZyYR4q2AeE3bR4x9xuklU1gNglFXNlQIwJ5nbecUPI6zzaKC8/mErFuwLDpcUxk5nPBfnhEW6nVDecENRHE9bkD8yOefPeRCEfwPuO8l8R/SvzO3KRAMfrggmfRIDTkJCayFXqyEnaBoJuWYC2VlkCBui6RK71MW8+vVaHGfCB1cCrIE+BvLxabTAhQgAl2DqrN4uaJzsWQASwWP31sXLMcSOS6AgUu8IjC+E4QOJcsX5Z1L/R2zOJeMXup1LgaDxAJb4DcXYEJlxzbTGYt0LUIgCdS1Gmu5iX/kqly4updWqdYVLvkDy2ZFo4BJtLsZKy2ahqmcXBLvmdSzA2anmWHSWyKK02NsuBa4SBaBK5/qYv5heWoKKK3phitLJZYzxEK0yF3wZXwUt42vJpk2paWlk9ltbOpbnzMy7L4puq8BCeT2JmLAKHi8BDobxVmLBVvxEVYGEK5bKUQBlupaGsu4BLOqSUsYics9WkrotVxDYScttXXLTGFK0VYavUYBLamDdEVZVRVXwru1qpOpcwyNkBLhVFEkVeivmQLrO2Za6ekSvhXprAmYg0XDeMfRd0wjRY8NS92UwvrF8L8xkEUD5xtzDh34KDs5M/Xa61Byo5DfRjfm/EYRkXfkZINAXbdANsmIjZBv/WzsvYbG8jfrio33rO5l8PDaxvA3YbUFhgGUCYRYWjqhN9WGDcWjk3obegKm7MYhvdBAbOx364zaejM3ojmNtm39ZmO+BVSY4XmzDdBuAWzjvgUHdcpFsc35b3NsmM6XX0y2ULGx1yIw302+gXUqsW4x8eypARSJ/Nrw4LbQu63cYvofbIbY0PW2hYVdQ28CeJvNxSbZgHBGqJqOFEzdNBr2+jw1B23zbeRy27vDoX/EajOpIaBHZ4QcRmQzxiI1rbvNk7YZA2ncMSgqNQW0724U8HuGSM+HtbqdjBVlDzsFgY7JdpKJnYLsFH0b5xtPTUceR+2HbnBm29gAISkSa7aNuW1mFfGB24u87Cu+7SdvB2u7JN8G3cbgvt3o7N0WO55CRykX1dbtww+DcduN3O7s91u2TByJ+3XbYdoow3dNuD3fjh9ju24jHvu2J7Fxqe8CCWRGRqb196vQvYvsr24oc9+O/fc5uT36DmoBO+bqTtNGU7Z0Ne+3d9sV35g29sB4ndkD72dbGC3O3Gvwhi3e7yqKu5WBfupHojHG+sQmcOAoRILX9q5dggd2ApchGDkY1g9B7u7WAHxv8K4Z8wkOt9Bdii+kO8VQnshKqCFX2dIdsQEYD+Th5oU2zMAeHdVfh3OpsbCOS1kwctJw7ha6NSHIeG/LAlkdAHJHTGNqlEhUcb61H1AQsGVlkcn6VAtDkCDQgEdT7sqtDwqpzGUcTh79LAY25/uuycPWy3D5mo45bKcPfpzxYR25e2TQ5nHKej42tFrY2OuH+mIJ3aRe3OP4D4TlRvIn0eopAnO82iNKk8eIZ0kHx/wJuVCe+J9idED4zqgaBOOS1hB0IAU7cSgTQnCwFuT46uQgRipWjmgbU/kzCzqxX6pp+U6KdKA3rl9lmz+KHIcHXhQ5Y2GgWhRCxdAmUOvQ0c3jd2Pr8twHmTFQiBBhnlMUZ9JZodTAVn/9yCMnbru+BRnj5kh3xhGcuocHvYHyOg+gfL3MHaFvRKemIfB7WjPCE5/AmoeHBEh5D1Cy0fw5mJ1Q4lgh7+G6BnPFj7yRe3odgfvGfnDu2yrDt+NAu3nMLoEw0eucUPbnmIT0yQ4+dwvCGbzp52C4tuy25nGEKF48+OfYvb70emh2S+2couvnRRkl+qALCZkuj8Lyl47qTZIvBjtLou+cYZdl6oeLLnF2y6dgeRPnPL/Z/c9+diHgbLzkBG85R1+IxXQDiV7kKleUH0Wsr4F+q6wRKu9nxL1UGq4VdZ2v7mICl7g6Ne6ue7cxvl9q6QvkutXpkDV1c4he8uDXDu+E1GkFdmv8b8wfF6HcJce3lANrnE0g6NusvcHIbzl2Re5fKulQBzh5+qEjeau3nSb51wG4nvxu1XHrgF3G9OcpvfXlroly+EzcO6mAwyZN2y7LeuJC3gbkt8Htl1PHkHxbvN5W/bxRul7LrlV4c+D3WG6Hqzlt+a4md9uaXnb3N6q4d2UAn1Fbwd1O7Te7OrXG4G15O7If2v5X1AFdyO/TejGl3Q7414C6FeDvvI7b8F1u+iMXHdTNDx5GQj3cYQmVnkC46UBuP/n89gDvV3Mfj73ur3jbo2x+5oc7In30zl98MbpcB7G0EIS9zDpzcvhXd4HvBwoBknIXX3C7uLvWIg+fSXdrEWD6Q74fHuiIQHwu7G5fALxvJysdd23yg+/BiPFtDg/dQ5S4fCdAF+d0W8o97tSPMsReE25Y9viaPA4fBIh+r6nrKLGQgMew9ovRO+9gICEO+FSQNPbHcWFgFJ90SIZQnSiCR1J/CCIxinnEd5swHU/GEe0jT/TFJ//LtpQnYvJp1J/0iVIzPhj3T8Db4f+PxHBsKTxCRkdyehH0OjZEo7acuOjP9zpMYGTSfWo6IuOqx7J7oAp7od3GZsqE98+Sefa7U/LOJ77PQ7llzaWL5F5JhLsxHapYL7p4Mi8MtknD3J8Vmh2tldTOT0p/l4hUVe2n1TrHGV8K/oVDP8XjHKomMQtfqv5X3bG04RhdzdPtelbWZ9Ueg6sk99Hz7XhUCg6L4emAa207VB4kBvjRVJ5sXM/CBQd04kPD09fvRHBA3oAZzjvTZbPbjaz7sAztGtM7R3ZNhZ1+a/DHfKjp3rG3d6meDG8YLDv0W3t8XJf9Mozossp7aeCPzIv31hNY4B/mPAQoz4JxlgMc6fIf+n0FJ19Gd8AZvCP/B9o9GfR7rPbTuRyoFGdxUcvqng2Hj+kdFf3PQPiRK4m8/feIfFPgL4AiC/ePy9iCUrBl9L3l6aJMXnzzE4h+do+8Mhan8wHL2n90vPnlPeXtAR+PQnXj9JOXpmTuIcnemYrLL/PC1fivVX5X1oHUKcP6vSGWX01+G/o/G0Jjjr2j6aca/dT9PqDhJ908oQQgol2L9z5t8KAVU+xUJ4WB7j2JOHQ5Wb6j9VAe/QgnD8vC6bq+ZAkM2vyfCb73Cvgsg2vp/Dl4SQoknfTY13wD7sdJ+XfpP/ZGp7PBx/HP2n3RuH6G/Y+RvmxNiMH868COKnWnnH079yUres/zn236whXNXeIb/TsmCEDwUvP1njulai97IszPx7LNm7/roJrd+zvo/6Wpd5cpgmhPbDmi2wEARRAMc1vkBKSpk+wJCENQoR2v4l//et//hA2Gv5mQZYt/C+0U12Hh+b/QX2jtfwwBR/X/VQt/xMsFndRn/bP35w1Q/gP/g/iT3kEn+hQH+aft+Y343nsv6v61pl7Q34S/ksjpOUZnjbF8xUuAEp635olbXY4AY76oBfPvlgYBq/j+jsSb/oUQoBrwtl7Q4y/smzeOiNvr6l03knk5/+RhJr5kB+YFV6I2KvuoRb+KyDU5UBITnrhP+TTt+ZKsbqI/576kAQwEW+NARQHpInlik40IyAaXqeWG6KD64BfZvVbTAPaMoHWmpjGX44BRAfIHD2RfuQFwBxJu7S5+m/jsh0B6lh+gp+y/qawu4lgRn6ABnvKH7YmJgXfxkBN/vwFmQdvmhi8BIgemYkwDgdt43OZBiK6jWX5nQj3eD9nSAT+F8K5z9+6uoP69O0Rky5t2Alhd7Yu0yiC5Mg8QdeAz+cNHP6fe2QhoGSe/wCD5IBvvGn6KeZQY/6H+2VOp4TE6Ae8i2eenhGSgoZ/iN4/owjHN7tB2jpZ6v+a2O/46eLnqI7uBs/Gp4ZAAATUGVB/nmAFSG1vp56U+PXoYF5eoXogFmBYcKXpRe7jusEQBrXu+jdYOwY76peBAQMG6BCnll6S+EgUYGNePATYGK+e+GV5sBTAacyjyXXk8GP+nAQ14FetwR4F+ebXkIG+BI3pZCMBS/r8GSedIA4HCBI3oogyBelD0EWenaDiyHB8wYiE6g6wagbfY03kohPI6wQWAFgEOKDpMAXTriFVekNrCFBBqLiEGA8B3vgjZBgrpkGHedIdA6JBO3rc4pBT3l34ZBMQc97T+MNIJ6sOhQbRbFBwjp2jVBvASPrmQmIHqb7+BqhI6Yg1VKf5NBOnvKFX+gIdo7ouXQW0FghIoV2xkIb/kqHyO4UCME1Bv/piACM5aEAHyeOoQxKzBK/tw7c2dPlcF5eTumgRrBNAbqQsATuhKSc+woV6HYByIX2ZO6pmiL5yBnofPqkB6IUYFO6GnvL40BLGEr4lq7wXGHq+iYYwEfBzgYL4lq1AfCE/eE4Mb5Qh6PqmHiBvoWno++AYT96XIggANCnBGwZ6GPImEApiRhzoXAYGB5gUr5XubgesEMIBYoL7/IkIbwGA4imFv7cY1gRUFWhW/ibieYJoRI4ThEfsIG2eE4Q2H6hfARWGuc1YQWFm+pYSxS+BC4eaJqBWoWMFE+5olX44BY4UI5O6EJNk4DhX2EOFwosIV2FXw9iBeH3hcYfcF0QF4YoFIBsAc2FfqlTu6Fi+e4Xb5tBcwYGFbhfiBSEgetuqEEHeFzlP5chizomTHe/5q37tIeto7pkEkQSa7RBHfhhE5BREE3r5BAodRaXqi/u6GO+wPhv7ihafhREyhh4dlSQ+DQaeHwesPqYyqhOYTT77eD/mqFm+/DHqEDBBobj4b0DntOFE+BkJMFUR44bT62huwYL5SRSwdqHm+7AQpG+ciAaCErhPPqyTkINYTJFC+PCHoA1hGIbj4xMfAN0H5g2BkZGB0n0MBEvBEakz5heakX4FO+d/H+HsRTvrswFogwQX6l+TYiJF1BFipLL8RyzkVjreOfp2EDhdiJ1icOyflsh3BdAVFH9hywd46x+YUaGFO+SrGVjChgftoHlhknsqjYhMhKlGV+xIU6FJRKEJ+G4hb4bX4vhHARmGyO1UUXwusTCLI7lR4UT5CRRRJMVFb+g4U1F5RDYUxHdRTvkH79REUTH5GKBgQ1FcoaUaYG8BnwWH7z6gQShHshIOgZSYR+7gyF7ecEds4shwQTrrQRHfn370hE/p370yvIYAz8hH3sRGQMAvmFLeBoPgI5p+N0WKFmOEjmFLji0PihC2er0aqGdeL+pqEG+TTmFJhMWPjD66MMUsaFg+L0V5IAgbnqwRCOYUrrRU+Vvn2bwxiwYF6m+4kn3ZJhP0V5IdwqkcX7aOHcnpGXE10RhJExa2J45Vm32LHI8IJkb75sQ+IZOKvif4FZGVerwWFK4xpWJb4DgNTrHLimOIb16Ph3eh4Qnhbvt2AbYq+rLwtRxXuZESx1KPX4leW/MBIvhDPr5LASUsYk6l6sch/haecXrLF8x/PkjEYxwiNlGi+mscGJEICTrl7eO54q6FThbTgrEH8KYv2HSxDMavqC8KflFFixUAubHTRUUYLFuxrPJbE6+t+sbE+RIfjzGvi+sUl5ngL2AIL2yIsXV6lAk0cnLqxGOKUBUCSsRNQqeD0ZnH1+hPhPxqx9TjZ46eWsQnHYxBlPlHRx7TkbEpQYcSDGMxPKkX7PRvfD7FhR90VaHniEpB7GhM6cZYJOxgKJn5fYyca3F2x2vrHHgGjcUHEZh54pVIqoEEeK5Kge3qMRiGAQenoPesWNIarxp0cB4Lx13rIg8eoxOP7jO3ZEhHTOBEWkIXRmQiRFwY10bgy0c/3u3Fwxd8U9FOez8oqTvR+fpArNyUiP9FSKYuKZ74xAMQwx8RxcaDH1y4Mc3FvxIBDDGA+acjtiIxYTvrLwJPXj9Hv8veqr7ox+stficxgCRDI2IZMQ77W++wiaj6RUvpTE2SmELTE5OMsbLIIEBniU5sxuDNgmcwXMbrF3C3geF5sJEAgoJa+mCQVKVx88YR4Q2I/o67O+a8dTaPeYhpkSnxr3ihFLxB3icyHx/bmM47gEIXhEMe58S3qQYl0b4rChpDjXi0REofY6oOlET/5yhq3pp5MR5/mo49GP8dxHhOKtFxGuR2Hv0HzhyoSWrgxZiQbA8O4kZaFCOCjqjE5Rajoo7yR6kbU4/ItXs4nmi9kfYmAgfxgQlkR1vvElaR6IeQm1O/Msvi4hMscbZ0J1kbYFlO0SXjF6JSyHOGJJ3Dl+BIh/4aXoXG3RPzGJRGTtJJARWSa7GZOLUTVE1OmTvVHb+kock5Zx4oaaE7ybSQJG1OhTi5HahNSZXEbh4TkhJhxnkUY4lJ40XRFxJmgilFnhkob7YDxjgTEhtRWQBcY0So4QzZFIwjisl2x7SVjgXGF1BlFfg/sQ+4mxy/t2H2IEyX1HphHSUpKdRnvOPG1OWTkoE7yI0V8nkhi0d2SLOmzuIlYRXbMCnLO6ifGBMetbtSHjOQzqClrRE/tYYMAUKU6B5BF8eeo6JRQSBEYxzNGKF+JF+vimmJsoS3GVhjEW4mgxKBmxHahv0U4m0pjUq4k7hJcVDGeJpKQXHvIviWslhiXkgjHsBuKWoK8pqMQ5GqOscsPhKRYSezExJrkYTEpJZSRjF32cqeQFpJ1MXK6mRlYK7GxyzMUtAkhbMTjHSpAqQHG2x3/oakpxRcTNGfJycl0mzRt+pLHmp9yf7Fax+4Q+H++AcbPFMRNqUamlJHAZakjx3/r8k7JAcV3ExR3KUGkJR7KYKlUmpycMk2x3qQymhxwfjKn2yzqcylUpdqVeFeJBcbLwApp7myFwpK8ZCmHRm8YWnMhgKWhG9k+3oin6uDIRWlKJW0Zongm2iVfGQMwoRdL3xPyd0lpy7aeUFLJDihSmppX8U7CtBUyfrL/x3QbSnAJWPnMkoybKb2kXS0CSGmdpxcoEnypSCcKmxJQ4ugkSpjkeLLSpE6fglKppqe/wkJlxMqmUAVMe/yUJmSXGE0Jmsrkm6pNakwkGpdoXgnjozfkEk/8CUdcmup+wlqjbhDqT+nlSdyU4E8xM/KmgZRHydH6PiAqKsnbJifp+mbJUwR3EQC4aXOlgZ00dOkMiiyTulAZsyfumhCYycxFgJN0n0mZpwUj0jN+giW+6/AS0dq4RiRaVIliJ28QR7UZhVNkGqJlaQxl9gaicxnveWKc2m+KuMMs4cWTVqxZCZ9QCJlcWo+m9y5O2tIZYN4QmfTGiW4VhJb5YQmX14r6PlgpZCZX2MpZuWvlrpyFKmlipk6WsPAt4GWSUgpl0INluFYWW0mUJl5UZljVbNW+PGqTesz1q6jp0SAi5bPWviAWK084InQy2WX4GjAbYAWYsAokYlhUmjYamacqRZpVqNbD0cKkFmlWn+oVY88dFkuipZnVgFkCYjVs5liZPiAFbVWfTM1YBZjCCVYdW5ViLwLAEUqln9WUnCpRPWI1llYBZ54Ola2UUiC9htZuVrdYhZWPKHRYQDQOdae8fmT4Ei8xuoFZKSM1rlkUZ21tNlc4IvJlntWgySqj10yWW6jhWJiFyjhZbbJNZxOAIBTzj08WeZapiD+EtnzWKmUZa6c3mVllBWqsiLx5Z82fHgGZAWZNlaW+mdplDZlWe8imZPPLVkxWlmUnRNZHWVJnnZIOeHA7W7UpPQqUvWSwB3WS1kdkVZI2VchrZTPIrq14HmTNZUZyHrOz0sStgkYU2DNprZIezHuPiKAatnzbGwmCBTlA2xOYnYxurGXjk82BNlHAeE+NpTYk5O8UIlwI31lLbs21OUmw826tufYM5KETTkI2nOZTAp4biHTlI2XOSxnIeEuZTnS20uULkq5AuWLm5pZBszka5otrcb9gpkATla5MKRPaSqQeoy6x6/MByZvOW/kog1uZuQZQW5ZeihDK2Ihqmq25ruQ7lQw91FHrmuLTBR4d8IiBO4B53uVg6+58rnYw3uesC9TO5lBioz0e3QIznIe8DjhD2yfuW7kvgqeRwbYyvzmHm3OXoEbmmGHhBnl9w3QL2BipFufnlkGyonHnWiiMHhYGybLvXl+uSeShG15hrlHmN5css3ld5c7qTmBuHegm4Qew7rcbDmWrrQ6J5ADtzmsZQ+Wq6kOmEI3maauDgvmt50+Yrlk5u4GybauYHNHpRw8+hXkZQ+7BKTV5OurFo4Qp8KXn8wBqmIaS4Vef3kz5yHoXkV5Ezpjgn5J8OXmDOTGO7qn5yOtnmmGeNnnmUw/+SilX5m7qblQwmxPe7GxP+fzBQFf7hNhAF4BQPlm5PpjQ4wFe+dfmB0CBYjBIFwutG4oRs7H+DoFKULAWcez7MQWHAsvAm6/5tuv2CYQJBT5BkFBudck4FNBQ/kb5gbsGJuyjGeQiYF5BdwW7U2rqhCMIKqLQUfQkcdDw75MyDIDGwkhXpD9wIhe/nIFj+WTl92sudIX+gmeb8DqFdNqIlKFYhRwW12Kef8gHmoiXwWyFwBaYV6Fihe1mGFKhZwVm5qKDQ616++XQBUuAgPx6OFi0DHQuFFenAXuFhwK4XMh+HsYWb5hRH4Xrw/MN3yRFaKSCZhFgbt9Aig6LlWmOGtoBc672gHmsZ8hs/kRECZ2Qupm0QKXpLEgIoPktlcM5kHt5Rc/3ktmlAznsLFzEj2XogF+BukoiV0GAr0EGUnrHN6PZoyEZ42IXnjdkrYQwREQRSAWWijOe5NL3HoU5RVaFlu+CDVKw8KTil7k0HyD169FvQXwJ6AtXhsUWeRWZFmuZmVHsUhIkHIZmFY8wUgKnFsPFGjnpU3qYg9I16UJlz4L2Lp4+IteJXTt47iC7hluFWDgmFF8wQDTdg24f8Upeq0GZRnFAwgp6bO6TNcW5I6SLLpeOodEPibJIXl9Suw52XQjngPYbLqtkKfkJnncG6Lp5fU54HiVAUcxWiWhi4xXUV1BUwC3K5ZzRVN7QljYTzxHFRnmCUdYuWX0WSegJQCg9FQIkME74Evo1lMYankPgIwf4bMUeeQ+KUBXh+JQQiElDbtH5Il4KK6mKlJbDpkolRJYXhd6sJSsFiljDGpl78UJdzFLsSxUUVsl8HryXyAOOWTnjEJtpogBq1OVlhl6GQFjAhF2RSgWLQdpWTDQ6IQNTnYWPpTxnulhBeSkd+6zPUCaIbhWLz9ojuq6VxFjHp6VYOoZSDpmoUcMmWHmnGcGXa5Out6Ug6QZeQXPMaOpmVbRoRbM6JF6ZeXrggaZdnRl64ZdEB/mWReLkBltZbzD+loqh35xlXhQkVOFX6jGUOlaKi7rhQHZY6VZlEBUmU1lGZXWm3G+tBP4beMiQP74efGRCb5FtFlJbmlkniUX/eTlhUUKem5aD5OW1JRuVL4GWPVYMlunq0V2J9VlyXnlRhFqjZWLqNeVlu2IVj6nlIxVwhjFFVl9iTFLLLvhFW76B56rFixWxYFgFxZmQ1Sjlg+WbFnELRJdWbXscW/FLCRVabIxxbXikJwFeuWvFJxWhW8WBOEZiYVAmNel6W2WASFvFpkkVYcorwT8U7JVABBVwVFpbiXxWkFRZ7t4SpbRXIVFpQ8WpWMIQCXjoEIFZaloWHJiEA0UWDIREVrsbLoe4f4XpZfFAfixXYMNpYG6jkygD6Wpl/1jpD6Yk5fOUJBpZUP7RGoSOOgqVKCMbD6VN3HmXFl+BdpUelqhYG4mVJtnOWpFXHj5BmVU5c+5WV3hULbqVgZeZWVG3FF5UuVjZdmXI6tlWGWtllMMFUulI5SWVuV3ZYtDhVsZZFW3GJJjMD9lbpVFUoRSlRpWVlzdtTYZVIVcXz1lXZWWUT2uVS2X5VkZf9b9QbiH2Wdlo5YmW3O95JOzVVCVT5WFKEVQOW1VAnrkWXxIngv5wYaRDmgX6WWNBzuEMzJ5ir6rwlfQP4ORLki36nQZ0o5EWHAXGsQOjL1iwB4JeNU0QKTCNUkYS7BtX0xClkMiJIHFtYa5Oqsh3ZR03sXNWO4HybPobVdiNJnnVZApgZDVb+mChJEWWSdX+IlxB3bhA3EhM77VDlmCghYy+HtVfViOOKiYYjsS9XfV/yJjgYxD5XZB3E08oJKCplIszG9YBqn9WBQmhDRW7EoyC2KcGScWFl41UmKDVbVSqPPBBSq+qYz7EGxJlAlW1hhRXDEVKDmY+yjNfhK8Iq5mAAbm5AChETZo1GIYA085i7o8G1GMIUu2yLnzWi1WwJuCI1HyCLWU1MtWdggg4heLYlqh+ULWhIxlYoiGQgtc75a1RhUVU+FmVjQ4SI3YCebU2moMYQfIptQGoNlXLihFSWutSEb61n9r4BO1VkIxn7EqtRHom1Ltephu1EetLV61AdT7VEeOtZ7WHAZtVaja1XCJHWbgRZGHW/AVtbUoeIUdXbUK1a8ErUHQSNvHAEFgVRjbq1ttWioW1X9h7VywaMBnUcFS5U2k9V18S3ykqHFsv5xeCDN2SD6oQDYF2OrdfPBcCNgeD7d1p/Mpn3JhjgPVOwK+g6mQGOQgvDUAASBPUKWGUEIDGZw9e8zd1mErZh91V+jkJC0tMJ3Xyeq9TfqC+HhNz5JMX1L2IQ4zddz4P8Z8OlYX1Eng/z3KvOMv7u+/mYvwe+mOU/WCxD/FWyNky/sHFf11DJ6HzA48VfUoKO9YUQjRIDTfXgWe9QwYANh9Q37Ei39WtTL1i+vWyHWc9f3pTAGBh3XXJk9TPyxICuCg2Cmp9VpLwN+cX4Bc1PNbMDt5vvJ5Cd+DldmYu5ZTIVW6VBeXSj8u4KH3DsNjujn4sNSQQXm0NTDRIbkFTCUI0h2LxgXUfQ7kFPZBh2hSjpywsjXw2shNefti21FWIHnUQ97vgHfurle3kSIajZHAnw+jYcDaNU+fEVG10Rn4IGNNxpUZWNJjQdA6NAVWOUF5P4tY0aNrjfY1RcZjQmXWVZuUmydYyuvt42N1NgwIBNZbk/jeNOlfw065CdFsCy63JIHkFUYTa2yONr3lE3KNOZbDVxN/UIlCB5HdqjIg6KTZE3RVFjfVUW6IOjk3BNX9kagqEhTUxipNC5SU2sNZBtDqmw95ABAcetxq00m2v5J3jFNcibRg9NANGxCB5Uns2iLGC0nx4dV7lbc4caGle00jNUcIDzzNkzf02SNKML9Zq2wzZ02nmmzRM04oUzWlXrNSoEMjbSOxts15NqND02rNSjTtHI6mCOM3nN74Ds3U2Dzdc0HNazc41kGkxvM0XNxsD81q2NzdM0xV0Rq8S/NzzXk2regLR823NlIfS5uu9bm25euWrg25mNyeWTnouw+Tjq8Egeaa4otOLUnWfQhWEU5bARqAsUZyZeaLxywu6EG5+4hLV6CAo1LQV7ZcGjZah96B5mS2+mwIMw7nR/GXXUtp3kGRIaY7aKxYOliSDBV7UCmDtib+R7jPXc0B0IZAyt/xPpEF0yzivVY8mZKEjW4s3JPUOl4+k3Q6tNAkv6M4kNQAR31eiAIRhWtZOa30N2DUpi0IPgZ35qpfZMpov1nfkkj5SaWDNhc47raVKK40fpv6WtcUk7i6kRpha2aYVrTpDA1ZAbNSHWtRloC+Y7rZlLcow1LSY4BXMLTEptOYLq0IkpDQtT3+p6YNgySQOKm3qtnfsECmt8bTYwKVGbi9Tb26LKlUnedbVHZw8jbXvbHNxbkfVhAO8iM5dtvAKC5ttktR20Q2iYTUYNtDDQI5jtWCIO0O1w7TQHow5mOKwMNPCAIBTtS7YS1MuGlYu3YIy7fdRrtO7Ru19teCL23Eg+7TO351XzTrrFe29o2jGw17We1xF6LYG73t/bXQB3to7a+2emj7ShFeSwecHo7WgeY1IZ5WQQ3mG1zTTrq/tcebZQ2YchdYVsu0HWi00N46MzFbANOeqogIjeT0BnodNu/isKedR25ztVDNsxSFnCEOwKC75u+Ak0csA82PmHKIS3FGJ4Cjq8IXRnwLSucPPR1cwNhfthyNFzhoVEtPQBx2kSbHcx2/GEbMJ3iN6+SC1ouE7OJ1dGMnZQbBFDhTXUFQgoaRHmxriPwrCwDJXeI9y9AmNBclnEqimoK2rAZ3JyBYosJjQ2ncnIwSk4slSHlBcu3XP8CJDA1ZyjnVTDTK0rdZ0GlTnTii9xnEuMa7VGVNdxht9skRK+SBVA0A7ZvMbSAlCMrAG0zx9aC9Khw13Fzgxil4sUqJkWJT4HqdY5mGIuwMlUWI34mnclDvMlKGl3qKfKrRhwl/0veJjVjLNEC+QXsjF3iixNOuX+dJiFTHJQyLKxaudx1V105oTcmfDXKnyq13mtGEgfXCwpnUzEtdfFKPJ6SZ9bZ36dk9Y/IFW5ypmQSeM0tQDckLykt0KWjUnA2TdG+lPJg6vUiZ3LdzND5I9Ko3T12VhiXjN36IaBi/rwJM3VfTdZgMQd35do8jW1pGvnEFATMAEJS2coQMKhCEtGChfmVhsLgIUoQHGQD1gd0TRB2y8/dv91UAchT9zOwCtPS2/dwPQw096PcNj2g9aPTD0o9wBYT3kwIPXD0ZNf+Yj3OwAGqj3rW+PRT13Ntul6BA93Ge+ByF0PWz2w9DhVJ1kGfiGUwX5XMDIVyN/PT2CC9RyKIVh67bZe1/5Q+OEC8FwvXT3GEXtXYVS9Q7TL1QRTKuqAd2RSMoUneWvevbUU/BRZUnuGvR9AcBSiOva699hSd5F82vVe7MF0vXVUtGu9Gq5Vk5hmCm9U8HYNhq9s7Wb2/grvdC7/gPHYojAdUtjjY89pTS00Iqars8yjNXgW85x9hLZZ5x5nzNHkQ2CfWy5p9G7asWbAuDqORkCJ7YZRB9rJBJ0wOc7Su2lI8HTvhyNy/sX3/tNffR06QUHXgJdGJrAi6t9jPXC3I6rRvbr/tP4jx3t98HQP08tXVXy0+KHDlzCO+nCNvQNigqEukz9uvf46gCEjjP3HIMjv+C2eM/XqFa+wCNo6YIHqlkjKOe/U06YI0QHo4dem/Tp5n9f4qY4r9nuGRRuhtIUYnMI7eCShOOU/db6YI5CM2T0+n/X2aYIVHK04C6MkSniCATSfP2OR7+CHjgg33bt50g29jVXkFPxRP5PY7VfWlztvpQd469jbXDYME29nuHxlKEUs5U8E7hgqeuvxmWBruZ4Gvnl9/vRhAsVhro1Lp9ylceBru/yIh2YD3fIs4HMVTfM5GEttToqfNzvVe2ZEPA5mR8Di8WIOCDxxsC1R9u0QIRVVvYAX1oEIzjpB0M/7f+CqDXfZBHm9igxCDKDjfas7qDQxH85GDSnby3Ll/LbonLVbZswhlRpid5AJ8uCA4P7+iZABCe4RJJYmBt49NrL2Dl0nYmd++6Kf1qKTiULhRcZmBYogJ4bYsB+D9xBMjf+7g+HzzRtwmK3ODfSOGEBeSrUtQADmQ9AHhtwQ2ZjioaYQUMRD6eONpFJ4Q9Nbp4aekqm2DAA7UNoVDpQjA0oFCOaIP1bQWdhx0hOHCifQ6gWdgOkqJBUM4JDpTdzeOP1RVTZDO2MwgqMF1EoH1DRQxF4QDow+2SLDqyImnfIt+F+CqMxiKMNDprSMwEpR/wMQ4HEZkYhkatKvhGpDIZlNYH7YxitbiHDpyVUOn9SWu+mlD1Q8whnD+xHANshxNNsZTkxyCM7o6ExnLiAjOg7vE0ZfwyCO4mIzlCrQjUzBu1QjU7W2xAj3kqUbEYI8OCM85DpUOTojKCLu1A6eIyiNYjrGeXo0xBg4sbmDJ3gmi8MZgwOBl9T7Rm5CY9YsoNaDtfTSMfo0NoX3V1lg7XUT9tFpXXXkk0ZwhgcpeJuBn4p/TblYYgCJXW4wX/boSf6sCIKNJx6iFKM2Eso9P1YQ7xa9zijqjmf1KlSo68J6j17M2gyjRo/v28amyEqPD2X/ZaNVIldfSh4VM/dsXqEldfAYvFpHY1HQ4bo1V6kdzGE7A/DLRkCkPGgQPsZoRjILQOMji0E7oT+EYyM7Eoatj+hN94Y5sTxjo4PRCRjDaQUHYpq5XgIfyH2MW26WGAtnpPYzxJz4ZmabbgR68AITibisQjk9hDSUCFZarC58ifS8wYBs2ODEwUbgQ9GteI5ZAi+/dx20QJ1hhHX9pOEBUZmg8DJQeQH5bEF0mIJJFSKj1yqRL9eQVKA1WWFGrcWC0ADRuOFYpenjihZ6hLEERyAA0ONH9y4yeNmY8IpQmzWJ/PuOsQmiDWObjTo8tVaSu46AbixYOGRXLj846cg/oykj2iTjutaWMLdnY9mgfMD40FmdjMgIOMrSc+NBMFtwdHjrgg/Yytj79NNQaUIT6E1+TqYqEzBOn9lIi0NRIx472JmYhE53i7jYTE6P8I58CdbIlrsZQhCt74/3LCop6OfqMAgYzrpqgKCDUbu0LA9xMngQVIS0CTpRnxPGV5orxM0Qwk7wQ4dYk2FUyTU7d+1ztyprJNSTYVREXt2ck5H3gdPfc31u9SbB72/gQ/fn0GTyY3310j2g+QUZFYffeSWTJvQS70DxbseEtt4rHr0Pezk5pMDajver0iDyOvclP2GQOwXkF/k5JP7alhdpPw9yOmW4Yuwekn2Uw4TVq5xTEU5T2260U1i3Z98U2QSJTbLYS0CwmFjtZgFBuXxNZBpAzb1O9vjVDD/CIHYVOnmVUzsZXueBeVMzNLRjmI1G4UGc5ydAaG1MPkjUz5MVTZ7jkrdTdtMb2VGJA9r0xMvUw7UsgAAELmAMQH0AgAa5qICIATgI/C/wBACgBEACkCADKQPwGdFj9ZQMYyqdcGNRBAopXpGhbdQ5omSTA8+K01iUuTImTVi8JSTCywtTI9NyKqXsWhze/cBCS3Tw9hPIIM2FpN7VeFGWVinT4INrSpeShdDinTPvk1GmM0tM0yi4WFNV6HMgjFV2RyUM+1kwzkVKBIgzAkjgzE0lRf9M4GxNAULPTXbNsXgCZM/4QheL0xHSAzrnOcGIFaDMTSEIieK03VOoCEky0YkSOt4SImwBlg/TT03TMIgyxNRBDkkZNV7Xc0FKdN9oYfpZCWMjM0ugNepaJQmgIlDZuZZjwoEdM5jpEZo00SFM/3LcM+2IbOizPYKNR6UBsx9OmMJWozOKAtM6jN2zKOi0gEhpjKJo2E1EJkgKz0DDNX2zReMTNlMlszzN7ojs601+YnsyCJhzNI7Iz/AiMF17QK6hF7NH4rXnaTozBrs54b0lwdRD6M/uGV6LshM+bAiY+c1fSMzCSArhlekLA/r7YEEg8GKz6cyMh/T9WmPjWzJhGV7EKGTKbM2zK2BHIVMdwzTjVeAmFziaNtc6LNpIiFJo3KV3xSTD3Thc+NDFzAQYliMzuc6HitNfsqD5ez2CJnMszuTKUE54nM5dP2z8c60168YM1HNtzu9L3MhzQ0o2Sg6aMAxI4zwyB9OlouAj15ezXjPzNjkLPkx1VWU3mbWYUQ5v3NNzKyIpxlzZs0t7qmZ80/NtzpaE2Jhtmjcci3TpaHbQvaI80/x3zr8xxMiAH8KIAFAWs4R1jQT5qDp0KleiIwg6+Afh25Bjk4DpkLOOhQtZGEZeQsHQlC/hGEdnQXLDGeg4CfDsLZlSQulpbC2q28LXCyI2ELHC9NAsLGiRilaJOqG3Yrl+s+3ihyDwc6z0o4Am/0IEU3nfmiaxDYXgNdAfruSqeqiw+RZ1unvovbh4hqoyKYtIefCOE4htQAMSunnLj9pM/LKhrUAuqya5MQtaUoKecuHLUtCjCF4sOLpzMj6sMANAgquLGI9nhf1di6vPEYn0NotWoeVE1Ht9/9cYsC6ggNoyGLVkLouBL6S2YtqLwzDktRAV9YosheAhDAzAGKGcMIaLgxAYsP8ybIkgKepi34gn13kudhNRTS4Yvpx7WTktEy303Qjvili7EvDMdS+NAxL+I2DPWZCMt4uVgipoGRAZcJEkuucGSzCKxoYiGku9L4AnFkrahSyyKoQAkjkuAoss0BTjitMALo9yYIvui6AAfjtwPzWwojXfFcuHkiUMxy3CyBLlmN/PlSey577KLtTFsth+mizYt1SShSYs1LZi6sK4wCCCCtcMYK3oKvzUK3qEyEYGYcuuLPyz2hgZKTJUVy46cRvN8CTaKcuPLWiLAJ4rgS+DQtzfAhivTL5y8SKwM0VAcvlLMIp9BjLbujCIQrgy0ss8Yms7zVSLjaTItgM1g9kIz8tpmoiBLbiLUuv1YS+t6cdBiy0tRoqS1Kt5LRiwLUC6LQwqvW1kUZkTCY8SyoQBIyq0Ok4MoS4hKSr0DLMstLB1vxiBLKq30tcI5iDH6ZENmAqv4h+y8qsxyEAsYTxUyq9oyYN/tFcsWrybMSKTgBSwLpAxSc9SFVLgS3IjzCN+D6sgDfmTivfx7q5/14ilYBa3XLnxjYtPiNqyKu0mVq2avqrpEmKu7irqDqvXUWiyMuco0y73pJrfsrSsxrAC3UuFImK4XiEra4g2vTLwazDN0ILSOEvO+ajGWv2LHq/StriRa0asQSdS5VJ5rlq69yfLLzKmu1ZgjKsJfLqa6Ks8YLS7LBqgja3OvUioquusVrCMELN8CyK0at8EiKy2OCzR69mubLxbN0sgDF6zCJUIYfiWuArS3DOsir7WdpCUgOC3gtcr1C1vWAoPpXEqGTAMC74+lD5sxm89ShuTR/rXOseCAb6UJBsaVtIcYRgb8g+zrwb/6/Hiwb50MBsM6SG/ws/rC9VBs46oGyfBob0Gyfq8ZvI7yvHTpq6MsKeWo2zwniCwK4uAqBFGuJyydQVhAvYVqxCyxomFTFncbAwpiEsb6a9MjqLfG8sY4GjA9Gs+Iymh4uTMgKO6ugqzxC0IDmry2W4bizNYKv7o3xQtLMYV9efIkVjTG92Crgm3cWBAV9ZRj9F3+QqtOYfVJhWl0Nm12vrepiH2urzQInrItLAa4Zv8bhixMSSenG0G6+bBGGZsIwrG2BnEOHG3ugMb5KzuuYVPSOQIHr06M5ukqym7AKHr+FaHLUrFK/hX7oXq4kjUk+FbALBb9m2EhWrU+rk4lb8soAKMChmw0LerOmwcKyzCzhp6nL9xQ3iurLW/hVre5Ih3gB+DBHdjVbYaz8W/ins3wJXLQm0gzzCqENNZxbPcFNvErw26luIi2WygMDbiIulvqba3pyvUN3KxBhUbesydMKL2CA8ELrgW/0ISrmFXpiBbMq7abUYZblduqrt2zH5UOqq7UqRR1IcZuhGeJut7LNem+KuGrWpQgq4Ta4uOvPb+qA6v3+d2y9tWrjq574LOgAm6unLWInrI9b0a4Dx6R/qzVuMltcWSsMQgawes50EAq4jSbR1JFkI7nW/dtuISa7Dt9bHFGFsZrSq6ds2boO5dsTyOa8OuXbn+oiuYl5a5dtU7aK52tMbyW27IfLkyw0uA7ddHVv1LlRXwIjNIa5mRC7WpSQnEivLKvPI7TWzOOaeSuxIKVW5q7LpUIK6zxKLrgO6AzNMC6y+v3bbO1Osxb4u7Lr+gu/Nuu27dUjcXaLNK8xt07T61cta7lu2dt9SwKz7swrEWdsv3bXO4Kbm7Tq6sL871pdgu4L+C/hsGTCG3Qi6AfcKRuBNDQPbUD+7eanuy66eynuaYCG7oQZ7CQVnv57PpYXt9wCe2XtHIRe1Qu+TzPZXt1NDWBXul7FTUDo17rCzkWERjoPttyLcGHpxyooeE7raMw9JYjFcmYQiaOEQnO1QQ+Ofssua0bbIniyNc+67qyw8+EGFcMMhDB6Fg59fNEPS5GI2g7tLuEPvng0dEb7VsQ+zqil4ruvGY71JajuszFB++bUd1JaqcRic6S15gxjtNfvuaY7M7j7EoiUN/sL7uYRNhlh8+9Pvj7iMKAdCcqzMIAxjAB5rTTo/uDGOfIgNf3TjGt+yAfAly9EwgxjTyD0USIIjN9hwHxUtJxZ8EByge6cEiNcpH7L+8nyH0BtBge+WzNVPQC0Q+wShlFVB6QzP70DFnz0HXDB/sZqb2mpkEHQh+PtUYWB8hQ77tkhIf/UuvoIeT7BkKghA+8+klsqcotCETj7O2N/P90HWMg3z6l+zYT90Sh2GHjo/rPQeyHjB/fvmHwFH/v6aTAOoQj0hB7YcIIY+CPTBAAhz3XMHnB4Q0lOZh7nSrI2tBfuOo9ANttbmu28KAggB3r3vy02dHZsXh2oO1mAHuMU+HjaF8IAe4Q8VBeGlA/GIAejYg++Np+IYbVPtjmsB6ke6cQmNai2HuVokfz7WrbeGaSW1LUdtsOB6ihn46dBUcVbTunOiEI3+7SbbLMY3R5FHQmM0cQHgx7Kp6cggMKtdHQxBRylokx3vgDH68zEf+gcR1OoRl5R5xDrH4+80W5O3+3Cz7LAxxHN7H3WJkeyKORwge8lehwdDrzex5xT5HCrRHK3HBg++GJOCyy5zRL1GPEfdghhwLP0I4+9gSUH+iqsfj0hR6dwSIt6DQcgn5xyPTNiUhwCd8HxEvcfVHPx5pJTHqKH4iNH/dEWgLHrRzmah0EiIicmH3R/icBqvG4sfQnYkTyYvH1x/xgfrse9+t17H0PrTowLoYOWntPDToBw6fNWZAd+cKC7o8nTDRIvdAfNQ8BMNFAPyfgoYp1ydztMdLyeRAbJyycTg0p53uYph07Iv8rtFv3AuHq82oq8HoiWxBj7Xvk4cIMg2LlZ+RjiGYuM4c625ELwlp7523TyqMaeiJamF5he+7hzgbzYT+25HT0JpznWQzoTMEe+ncte6ubEW6qguenFcyrR0Hzp5TIEhMcUICCmXYNSSYhJxFdOCwHMzn6gHWp2ae5RVLHacGnt86me+n2pwp5ng2coDX9wdVFPix+WZ2NB/rri5md2n4h/CWbEA+zDP6dga62f2H7Z+2NzRcPA0usMY0MFSVFpfn4f9wA5oWcY4gZ6IkTnDZwGhcHvp1ku2YXvocxorO0NnhuRTp+Oc9gcZxaffT0iQ9I2nc+5Wcn7IZ+ChCHvp1Wee+up0kihH2s93u6z0R86eTsCx+XnHniZLPDINb54bv9w17iJjl6S0Had/nd20SS1nhDH+ujR1Kh6cxI+NbX6v7vp1duTnS6MDtanHqu1H/EYFx8jFzoF3adXnAfhODwHJ5wLQCOFB5efsH+FxeKIcl59ECuneEN2fUXh5+Xq4xfjBqtcHgvodMLnoiT8iBHZQKoeXnzyk+HdAG+4md7osm+xeC6+Z2hdZAAF7Cj7nnh7PVCXF5/qejIg+7xd6nWpz3A/1HFx8uDYoCOvVlAdzpQy6XZfqWdHI9F/qeaXc59FbcMg2CpemXzaLLM6UA505GEXPvYvKQX71c0vmF6sxRdtUgjDLAgIglxJdeX458OemXfl80xDnsy+JftkQs3WcaHAF8Je+n2CMEviXgF3JfE7j9d+cZXiaLr6KXNiwFdT4TF6od0nX6ztv4b/wCDpwouA9TYZQ1epw7oD9k5IsVXCgC2XEsWRvVfVXRA4R3/gVV81W1XvVzXolpGA/HutXQ1+1fcLY17L5aVte51Vd74/aJ76zjyG5096l9UGYrX6tTA1D5E+lmGb1S+rEOYG8+iPVQMy+nHHf6eDVvpytq+udfz1vQ8Zm76x14/rsT110snX6PYF/qdpb18/qrXG3daLToQ/BAa3Xe4wAY3XFZ5sQXUnWLvpAGUBhDewGL6bYwWK7ma9HkJ6Bj5k3R5kb0x4GQ+gQZfd8QNzVx7+0/NdJ5dNk+eCrNMFTEYSiCCes5k/ODymzDPWCsI03tmB3JU32i+Prz4YUh+gsYjN8E5kpapEwKqgOeJzc6KOBkVmoy3evTdPrZfvAKPyoez8J+y0go/Ii3Ye40xeYnN13o4MUKnDeGQsjBhHXkjMUpIo7v6eAMU3X4IxRDmWt7LFKIWFD8KWJVtwiia3QUTfzjdMMzdK+osse4hS3UzEPrlEkZBwKASHUi7f+3rKIKk/SoEozeJQLxZzdy3xCbk6Q3st2Fs2IB1pgaWmLuxwJHA8WZzdLsgIiBqoKXkjrcZMwiEwCB3ht0ct8UTyKHf/Eq2peli9qsWHei3nEBQwe35VsenJ3Qsa5x+3+wvWXO3vt0+uR3BNflau3XU9TGYT+wpUgc3r4jwjV3HJgPNap5txwKK3o2VVtd304gbfTtZd93eL349O1tJ3RpOzEY7tjJpRN37Mdghl3LtHndL3MKw0uB3Zt3BRJMWNEJQs3nd0wlX0ptx3c2LwsQThr3GcrUweEr94zG33Hy9mkTissZhAliEjL5DZ3oDz0Y+BKgioTt33REA/vgj9/qn78EjCmgX369/3qo0A5qrGBaS2yHIoPKjNnc4MnIvA+r6qd0LM/iepnHGS3iK8A8E1dD4KZ/3/+MLdp34sgt6MP/N3IIO8gwgncf3AMu3z8PemPfc/7zt0w8SMn+j3fv39D+Ch4z1MQ7eSPuMW/fW3mm1IYc4WqWQj049piqgy3DvAFiSmuj7Q/LODN1AxixA95mRzE6DPWLnS+d72QP6SUmNgUPMSOmQOCZMeAb6Pkou4/OPXNyI8nXccUsjqYOBuKj2Pzj6ZDpkrgrKzY3LjyhcFH1spTfP3B+XvfCPLZLgZ2ImBr3eIrcT+RIpP7+gyrxY0d2FuhnxRD48x3zjFTxn8CT9zcnM2AYKlF8DeP91WRcN4QTjMlqNkcX6mT/lgTMmGAU9VPfjxMy9Catyk/7MNwkM+dPflO7Ru6KUrymMEXT+7SLUt+r7xze+sJog+Pyt4CwHQE+vg+l4AsLXgyy+d/7L5U5KKnJhPhzzSrBQbphnESPwUOxLM3St+w9XMrQ3U/XHXOFcxYdeDzE8P4bz1aWgPCBGyyacbhPbfSUGz7c8dP3hBs+XPfcZ08bPnMKRge3rNzC+rPHcuVZ5TCz0C9lYeU1iWK3nj/8/6aWSJCJ2PET8FC/itjyowa3iL3DenCGWPrCqWXD749zPhDA0ilPpjyUoUZizyY+OEPzPKV4pHL/08uoqfKS+8vDL7qRY4T95y8uoRRRnFmRwLw8wMIYL6o8vaXL0LdMxWj7HgwqJT2K8yEOIvuy2P0L58JrQYz+C+fCK2io+j3OIgDcryq2l8ogPWqTA/FS1r1w8tPqrDaL53IQDs+dBrD4/IkPArPatDPlD9djavh2My+cveahq/DPqyvChEpo4A88ZAh5T4/evqKs5Y8vFre68bAgW849OvArHYt531yeA+JvFd1bcNIMVLG+Qx9d109Y6F2DymD3ArCoSVP4z4yy2m8T3q/JQlSPs/NvxNHpfex1b/V341AD9Ch/h/XVLOqpVr5FRVvuQnm8ldOqBm8H3ArIwIT32zzYRddvb/G+2kXXZ2/svVLwG/7YnyHmLhvLb7rQ5P1z8lD+yfN5u/lvD5FTVZ3q78rWHLjsQu9lKeNkQ/b3lyo+/dCTMXa8CsxhDm9V3YLDqSXvk92a9nYhCC3Hdv+725hjvnt3pilXBN/1OzNGAnrVyNEytIZkEyp4yfGGyKRM6If8HwAVvt0DoQXYfKKa4bIp+Dah+wfOuWjzuGuHyI0/oyH1R9NXwpwIvEfKH5NcYfrwqR+gmRN1gjqn/I6RFLOXqD3Tri7qHx+ILJbRG1lYfH+Asp4BomPgSfcilJ/vX9o0PgifFCOmw4Wf1Hx+/ze1CIiIUfH3R71UV/H0lLOKaJ/gvU9LKD5GfQxKcimfnF0s6oI2rZxCGf/UAsCE4sebC/FStn/HNSfanwWi2fuEK0jpsCn1Ei+fjs1J//kro/1CefBk9Ge2fKc3tSCfwBjF854MudJbmfEX30gRsy+DQjBfXpBGyem4n2PwhfvufjVKjaX3tQ3F5aIl8j491LBwP4tn1vPzUcSkX62fAc+l9RK+X/B4ozKeCSVG4snzl/baGWL1/+fbX3pSVfZmP+Ca+12B5+tfHSKl+QIfXxHI6fBX319FSmqFN860yoOF+kqSX1NS8sJX/PCWEtRtDN7fPSFhKHf2M3t+pmIJDt8VfQ+JJ+dcOooN9rImzeph3n4Rw+fcfi13BhLOaMHJ9JsJy2tjffIs1p82YvyID+/fsiH4ckD5M098Q/q30nt4zUn8XfqjdCFMaTUF4lcvGISzrk05YBn6D9kUhX9Mh2QyP8MgE/AKEKx7fY1V1+5Nm36EjbfD5FzR7f7kQ197gTJt6NQ8upq18hK7X7YhvUXP5j9YicFGV81fbP2Jg905X1sjffN06J+T4Mn2iLg/ZP3D+CsfX1vNijY2wPMy5eX/z+i/BxFsYCS7nwL9jEGX/gx7fPP7/SpqT+4z9nwz+BGwpf+v4KLM/FTtKgkDv++ni6/i36RKtfUWFzhQ/BPyr+MIMo52shks3Bsgi/P38t8bfgZFj98ze1DN92/OFuThX9385L/q/wfZbN7fYf0N8ae3v3L/LfxyA1jp/Uvyp/r+zNUs4kYPdIuhuY0HwydkfRRqsJFy7dixW4tYgtR2N/yGzpPvGzf+0Zw8Tf2DRTtvCLQPbR3fe8Z1/1Hbri4tI/13/9/bf5FMd/vf+3Zj/nU+2R9/4OnhuE3qp1x98rPH199ilT/LujvivmMJ8Dze/+gd7fwJCYR7//f5t9n/6SHv9nMQX0p9H/p6NHrqfcvcDO7odJu79MbcmWxOgLrA8Z9iI7/2Gys30u+gViRYda1YGdn1ssP/yd+Tnzxm7/z0cPgTW+7/2f+PnyW+N/34Qd/2O+fnzogF/1uWEAPjmx/0iWEANi+e/1SQnRFG+gIC+s1Bzt+gsyYsZkB9OEAOwBdANTUGPywBjs13QCSBL+pXzfQMB2O+JAPcYtX0qqlhDfQQgHa+J3wMswEFEBWvxABWlgEBIv2v+OAMpEe+1YGCgOYB40HG82X3QBe6D2EmgMUByHXz++APhyNTBe0FAOYBEK1l++3wNgj6ApyEvwBoEFiMBXbFZ+F304o21ndof0kEBAvWGsfEwZ+KgNHmZgJmwFgPX68+EfQyFXQoj3zMB7zDDa4QN3QkLGPQh/2CBWgT1+p/z8BMQJv2p/ynmYlndmFvz/+LgNksMFm32+WCM+9gOYBmSAG+QgKsBWQKT+/UH4BE+GN+hgJKBoMxoBTAJiBmWARgr3xVO0i0fOGp14+pCDkUpAN7WrAxgm5/2gB9zCWcQwK0BzaFW+rfHYBGAMJoe32awEOHf+56WJ+feCQw7/ygQ7XxnqEgKOQinBlG0wOGBU5zFG+wK0BepimB5d2YB19Rk+L1Bd+agN4BrAzFEagKUYHgMv2/uBEB0Xy+oR0lcB5sHa+qr0mscgL2+diGKwPANuEYwML+FwLbOe33GBegNOBinzQmBwOgUqvwOgj/xYB2fwi8u/35ebnwBBNAj+BQOkc+4IhQoVAJs+3fCt+oeEJBVQKlEFQNxBTv2uBOeA4BkpEQBL1FusLqDqK4n2OB0IOcs/v3uB0f0fQAQM2+UIP8BB7wD+R1GtIMQMP2dvzucXmFFB2QNBByIJaQMALhBWgL3WqIP5Bj6EiBqAKRBCQOnYXALRBQIOHsB7yr+5VzQ+GEE7+Oxk7QDDWKMS/1NBGOGn+KU3OMJoNVIF8DDG4sStBjoNX+Nfx76E/xdB5oM9BDoO6uP6wtB9f19BToKfMQYLdBHH3X+Pe26BX3wckk3GYB+/yE+1yV/2cYJP+dxh6wEwMv+3ozNuPvjjBmANTBtP2+wyAObWNSVogkoMesgV3c+2w2rY7/1UoWX0ysRPyYQgAPABtyVgujYKT+d9m2W1YN/+FyT1MKgHgB5YKVGsAV7BT/yLBNVjVAEwNzBFySnQ6YLwBFyXl6hAPE+JSSQUlAP4QZAIS+i4MTwZIPM+g4OYBy+Cd+o4PhBLIMx++4JOBYZzCB24OBBFX3XB+mDfQTwMzBcQUpB6gKPB+e22Bj4IHB+I3iwN4JMub4LTBegKyoA3yzBBwMfBMo3AsZtB5BB72/BLGC0B5gJ68FyT+QBYNMYrQJ8++YEfMawPyB/4P2QKVygB2bR6Q7QLX+nQI++vVWAh8CGzB/QIP+hRFycWgL2WoP3IhJENmBq336cY4L0BkwPtGnIkXQzAIQUYoyxoHYImEzyifB9WG2BVENGBDEPhBHIKC+wkJOBIIHohyHXBB5lwuMDpA3BRwhBBqNHNq2VE/BPX0JkB7zUBUgLfBM2FXYWkOi+iRC9OakNq+hREKce+AvBEv3AaSYI4BEILuMnenhBkkJYhxEJEh05z2SeuHghKIIXBA8FjBdIMxBk9lt+O4IYB19mnEXwM5QbYJ7WrwLMg1ALfBfXkpBu4NrBL7AUhush0+P4kt6HAMPBb4OR8LkOlGdxm3251j1BMnxohBwOghkf1Rox9FkBBrnChqDFLBlUK3BcPGshrETqBeyQohegKVBXkPshUELVBb4JNwmoJtYJgNMhPkIKhriANBYR39Bv2WUGZoK6M40JDGroJGuRoLmM2aWUGdwy6Mi0MWMk0LDB4Gx7600IBM1oN+Mq0J2hs0Po+6KX9B+0IdQ5oO2hZ0Io2B02fWE/ifOEzGuUwIGJMOamj0vTBpIjFm4mHNVyYE4BBADbCehAaHpi4AgnA0bCyA3Ew06eoVehwML+hi1XgWtjmCoophVoWlARurPC0of0NM0L0OtEb0LsC3+lVQgMKOQa6ynM4YS7gFTBQgBVjgs3Ew+QHyBGel4lly5MPaQrTnuhRmDjs5MNxQXz1Vsj0O4maMJkAeT1TQWMLcy74igMXpnTMz0NVM1ogWKncj+hiwH8QMM3miWlGxMqYVUY7+l4Q+1WJMg6mQqvTF4cS/24moDAmkBJjykBMNxUV1nry7pzlh49ClhBJmNhEsOqoiwF1h24glhOCBFhLTBd8I5n0q2ok5guMMkhKJmPCf4CXE1og1hRchdhbfB9heTGksgNhdhj43Uk1oicQW6glheITfmmdlth+lVpMGJjla7plMKHvnOefggv6wgH0qCKGM2zNEjIIMIqCcNXf0l4gzkKsNn4tICHMjyGIUwOn0q40Ccwugl/4iwHLhMgHtWVszcsRVHTM7yAYAmmyS0O7Rbh8W1xkUDGxW0PH0qfyAhWY+gqQntXhMWmCbQDgni25WhlMfTFjIODA7hY9SXhk4Daocon9kqz0vMoEj4qUDGaKmSHLh0VDBmlpjhe+lRummAklMl4mdh2qjHq3phdInZkvhUgIcEsh1mQ8JkAkhghMeZiCXhW80nYDgjsg1qDrMQDWMIQ5i/AqBGtM4FnlKrDBCyINT3hW6gLMvYlxg9Jh2QiCJ1MU9xRM0CKZwojynuksyXhR0nxCOph1A3MHhMNrEIQojw0cC5BfMR4jRWvtj1MU5ggcj42n4gTwxO2cNARFWEkeP30EAS8Ky6PkAkYbr1EQvCLkQOoFEec6yjMdMiAQMMwTkQKHTM2vDphkjzghICI0szSFEekR0rEmpmBYsgAgeDnijMW4kxwED29h2JnJo3aAqYnIlVQxiI8gXwlIeVVF+qfJmU0QCHQeHvgYKOJhw0KaHQe0yhphwiEkQ18lwYtSmbhJJi0WsCP00ef2URKyE2QNiPZsRRSXhhR0AIEjHNqj5hiRVpnAEksWvcqCJURByCYSXMxiRefUa64skpk4HlRMdZBsROjDjofJm9u+Jllkhyz3wJJg3EIV1l4qjCkCKlAaAtSnTuVpnpME7Eswsqk1k+iGyoDJi0R0/GNiM1X7MjtAvgojw5QoCCjQXZmvcnsxsQPiNFMM9wZUEd1aBHSL3Ay5iHutPwK2kbnWRHAhm82XH7Mi6A5QHAiKozmA9MVO0qRCYkSgXDC7McviHuk+GuRHphThxyLv+/pgOwxmjQSWiPTMoKkHMuyJCwLZkgQnJnTuDFjO8oZmT4PQA4Ej7ksUiZgqy4QEZuJyLhMWUx5MHAgDMxBTnGJ+k5B9Ek+gTMIPWuTjq2dfmzh+Ik2oWwkjMUZifE9MV2WIx1iCncjvWqMmxM1mTeRNKLIWVKPSYh9yW4lKM+KssK2EO7V0AxJh2UamB+EjMNFMyJWMIrKJIRk0ViCsaEXkPwjeRdZj5RokjuEPJg5QvKNTUYvSeEcoxQCKP0jMyKJJK8gU7WlUm6RdfynQQqKf8/gBhEVsl0Yx4z1hMIlJhU5hP424mtR7KJNRQcMNR+OGVR6+lNRRu0dR9TAxRKP1OByqMlk/KIYMqyxBhdqIuwIyzDObqONhdS26OxqP8IFbF3E4SPpMTn2vcOu0MwoeFiC0ylem0aPpixqLiwqaLFwzsKwakyJ12aBCp4BKJWwmFBaE+IXAGyqLTMvMh/4dRVDhRaNlYRW03IsaM+CruzTRdKK2+paKJW4SO7Ra8EyQI0PvOC10IhJ11hMjCIRMICHJMC5lRMCTQxMhJkIQ5SNRkFyOKYWJnKREJERgM6MpMXCFnMcKFpMhYE1M4pk9mLJghY2cI5MApm5MtID0R/Ji5Mw8NU2CyJn0EpntMk5iXhgqC5hr0kVMjpl4IHuGCR6piNyNpi1RUDF1Mm1DNMmFCbMppgZMhpgLMvZmtMw7CAxw5lfRTpkvRQZjdMN6M9MepjH0vpk6woZhHhWGPNM/plgxEZghYfJhjMw8jjM2J2LMPJkfhqZn8AeZnHM2ZlyaliMzM38NJgRZgzMJZkfhfyGfhpiCrMS0kPhtZn9MDZlXh+IMgxrZlYs6DHLM56OgYPZitMXyPk2y5klMN6LHMs5j9USpl4IM5m/hAdR3RA5mXMnE3Z0Ci0HgWwFDMDCEYQfcCgKF7gzKe6wRGeH0I6FmNDwVmKnQYI3IKOIg30HISvM1blsx+Gwws1ejX8EyMKOUcE6CNAncxEFnY+m0OZ6hmNqaz5muBuSGJ6IjR8xRFg4ozxDiK7eUixATRMxC8DMxvOmIhUWOI8rsNAQ7H2U6VFifOvFgqcjFlEyHlnoskmX28lljYsDQH4sQOWMsBzFuq92V0shiBks4VnkslWNFUV1y0yflg0srElax5FTle8OUaxLVkIY711syZ2VgqplmCypWVeqK1h8yfWPGxXllksn2X6xB1kxyQ2Iqsdvjik8mUisp6DhytmTis6FDSskOWSshsLOxc2MSygE0OxdWT6sbr3vKxVnOsJSXKsnlmKyqWVqsm1jmyslgKy/WKTe7VlexsFUTom2Qex6WXGse2Siy2QUpQEOJOyC2TKwc1hSyCOSi6i2LuyF2LDa9Vh+xR1mhyxE38sh1ihyh2SKsZ1jWoF1iHSGOLuxgOUWsKOMesoOSwQ2OTxuVDVGheEMbSKnQO2O6GYCHQiYsQMNey+lCCW52NF4LmUMgm1UjkAKDRGClimsS5C5xpKhmsO6F94v2DWBLJjKyvOLZkkOXn0GYjVeAlgW8RclFxj7nFx9YVFW4VkOWrFgEsYvCBBUZ086ouIEwk0RNx5WkuIluPEBDYO5xRrSw6fFG30tlmJQJuFfQKEBqQawKdxgNVFx15EHEJuLCYSJDPAKTF7BZZxtubFlm8tTVFx3rXowjlktQ7zxwBJag08COIVo61VFxviD8IxUl4s4QHFaUuM08xNTzx0MKlx7SDe6JePSYZePxe2VhI4BeNFxhlHBxGeI6wUuNqQPFiTxPzxtxSuNKxwKLWsRuO6xIlnas1VzexPjC1a7uLsoTeLGcmmUGkY1nax0+KYwMWX4qLLDHxheM9xs1maxymSzxEJB8CPeJEyqeJmybFk9Y5/33xXOF4s0lBbxWeIlIf1DzxA8Qjxe6ERyS+LAQCmClxsHD2sbFifxqkM2I1JAfwN+PrxyqFwKTWO00F+PCEwVkPxyeKlxuuO6xZWMmsfuLqsG+KHxFpzaxy+OYwUuKtkkVjnx21i/xtWKkspwkwJ0DEJxdWKnuvuPvxKOPgJYlhLUV+K4q7FnKxJ+PG8mOPcyAeIAJ42IHMc+FQJtp10spjEhxEBJnq/WIm+5kNgJRVlmQAePYJghP+od+LA4jZgqsukHGaouKw4GaCKss2Jfx6uNSsih0mxWeLTxs1gMgK2k/xC+IrxrvUp0ouMQkj3UsCd+Lbxg1lC45kMVxrFlhxw1isJ/2LJwxBLMJSFSxxDeK1aXlyuxreLcJT2LXWX0gbxG4issgUypqXeOsJNH1JqwRI8srEGzkvVmHxPFkw823U8Jj2ICJe6FR+1eLGsIIhSJluJoI+5TiJPsnUJB+Jys92IEJPmGSJIuNgJjlmaoMD24JPOO/MqiBtQOuJ4JwBk/8XqBv+RRKaJAEBv+dhLqsouEfIlAPROhmF0sxNCXMOhPLx12BqJOoDqJxKCyJuNTX8j5Cac4RLqs1WHnYHRIFx1hL4wc2xTxgxDexxGBCAID1cJiRLIQPiz+A5BNFoY1ifUdYylx2eJfqa/gbCIWBfx3sJOshxJrEshO/xPFm2JeSDvxaBOMsaxKDxIBMksixKrMGxMgJCxNTUmEGvBrRN1wwgN+Julh2grMlQJTBKssY0HJR8OSwJ0mTX8Br2PkouNfxDxOgY1FC0sUjhzxCJPjwBCFusM+JhxMJM9qexPBxEJKsBMRMJJsxOvBnRMcswCD4AvYM6JVlmq+uYHmJ7JPqhTyFbx/hOvcbXl2qlJLm8xHgW8cANJJgEyo0dNGOJlxJ3xUpJoJ+BLfxopIbCiwJRJP+K2MNeA2JnxLqsb6neqbBNAJxHghQsllaJzJMJ49ROqJ3ZBpi4+PMQklm7I6mBJJfTCEsU1FKUeJMDo2BNTafuGRJipJOsHpP4UW+IJJApOWUcYkMJNeO5JJlwdJjeJFJlpNYJfhLexppNZJKxNQgw6MwG0LEpG9+LvaqZOfMAXAH+ciUzJUVhX+5BXgBX5mzJNoKZ6n1kesxZIFQgeSLJ4fQLJR0J2c80Mo8X+K5GdZLhsmZPaadZOQic7RrJBfVbJ1NlBh1el7JOZLe+DHmo22sm1K1lECy4nzDxcODaQfs3HJ+aEI4OaCrwiNQOa5OAMgfs1XJUBEJwrwhmq/8F1s8D2nGOLCSwB5K4IzzA/m0CAPJuZD0Yl0yYkutjcIqJFYi4jFXJzZE/wT5IWQq5M3INZB9olWH3JnBkPJuBDo8wxHvJehFwIx5PQQL5MC2RNCnJEFJWQdKhrIGQFmWw6FXJeJDqQ4rRZ8KFNJqlCEU4rWE/JAmCBwXgR4wxCEgpRFNtQq7FgpBB3duPKHIpl5P/JZ5P5eR+D/JRxiopiFKCetFPuc6byew4FPYpHdybou5JUwutlQpgFKQpPFIRwbY10A9/F1sNOFpIEwjO2UlLTwa7EDosmEEpxRFs4xyAG2glKwpP5K1IutgoYFnAnwz5L4MCSD1Qll0zQQCI0sJnFvJTFO00I+FYpwFNfyClLApm5Imcr5JFwMFNopuLGlwaAxEp5lK/uXyEGIklPXcD5NYmKUDkpQVLuwIVOXJU2F8pxlKm4CxUEQvlORQDrF1I+eHMprlI1YUWAYw5lLEpalIvJ5lJLE3qHUp+f3MpfM2z4t5I8pNlLImb4nEIJVNi+BSHtYxFImcpVI149/iypr+UqwIVIYAFVJypcyGcpXtGfwG5IEp4VMF+bSBpUEUEqpSHDyp67j0pebEjEjNHGpi5ODo3FPGp0lFsp7lJWpdVMGpJ5PXci1N6pAmD/JdpJKeXFOcph1LJ4y1P56X5IIp61P566VLmQjVMSE4Hxap+BCJ+AqC8pJgR6YL1N2pyCFMpySBepN+AGpaog0pN1KgpejCmpSbHwpdSEypZGBep0xAypBQL/Jq0COp/FO2piNLOpzlOlKs5K2psFM1R35MygtFKfEpFPKQXB2xp/tABpsOD+wAjFepBnDnWfqEppX1IYpqVMmApNNvwGAPYElNNupyCHQp1jkppl1IoQdlJ0ElNOkpTvHOpqNPkIyNPYQUXF7omuH5pyFP7EdVPFptFJkm5OAVpktJmpwlLYpktI5prpUCpNiHA+8qFCpLFE1petMCQ4H0Vp75TfJYFQSpTsVoIyCBSpVmElpQlNtpBQLNpzVPPJOmklptMwvQRVKNMHtI6QGrC5maGElpKrWtwCMzTwZtODpebBH0ziF9pR1N3oz1ODEntP1pXVMlprtKxpZtN5pe1O2putMepo1OTJHQMbS6MGiOaVONpTun/hsFP6poeExAqlhXJLlJBpGoTgoFVIzp8oR8pDlLhwUoT6prJCEo7dP2p41P+pldM7QzlKK45yQHpPdPXcQtJ1CZdNopQ5zhwpdMHpndITCgmiGpPvXTI4+ySIFNPXcEdPH25Whaw+mOLsEDltsG9k48IDgHsmRUGMrfgjsCiQa4DAArsKlF9ACUDCxKG2LslqAPpouSPpcFKds99K8xjZMlp29gwiN9LBAPtkPp9ZPPpwYg/pmUH/pI9iAZwJhAZlYSdsZQHT6EdgQcDtDMaIDP3poDiAZLdjQZJ9Ifp7f3rs+8XbsTdiHsaETPsp9LIsIDOHsgDNfp/tkxilDNIZ6unIZxDKgcb9Ofp6DKoZ0DOHaq5LAZ19L2hGODvp4DK/p7oKfpADNYZ2VU5snDJqMf9IEZzUxLgF9N/p/DLfpt9PbskjO2cDDLbsudCoZo00Ps6jLoZtYFUZkDI0Z2dnfpL9J0ZEEGIGUhg4gBjJNc5jOnsUDIaMejMN6ojJpAW9loZODJn+eDJNs2jKmh+DJIZrjNtBTjNgZFjMcZt7l4ZGoCYZwDI4ZRjKUZ8jKNs1jNI6JjMJ0ZjJCZeOCCZCEGpSLbTYZdjIiZ2qgzs+dk3sATLzsirikZ4WOAczjKDsGDMMZFDKPs8TIY+1C1kZ6TJSZntjSZoTNsZZ9JHJap03+n3zQ0A1T3wpDhV84GgpYXmF6ZTp2+gqYinwvTNtOyzyh4ekPGZc+xGZ6xyYQQzKUuIzJnqldJOIygPSUn52EAvTIYB6SjWykoTVx0512ZrPzUcL2GZqGzLNoPDm0hQbBaR/uBEcCZ1BokEmcwPDlB8IzJHYuyXVqoBxGZbMkeSHzO3CHGljORjhf29r1B4sYJ4c5Z2AM30GQu+zNJUc61BoEVy2ZQLLhZ9+zUcbRD+Z4Kwx+KLKQUyzzqkAtGeZ9r0j2bFzBZsLOfYsVwhwPDmn2SKhouZLJKcX4JJZ5FxOZp4LhZr+zUccaDRZHFEPOMzMN2RDgk4PDixZZ1FBUdt15ZnzNOkqV05Z4EQZxMH3DB0i0iOHTLHRHGiyQFji/x3xzKUCzhTWNiXpY0GgKE8VFIcnenOOczUUAqzOIherLG2JR3VZaRyDY2n2+wOrL68i7zREIxx1Z54EaOkLItaimB1ZkmAxeNIgq2OrLxCHVFB4FiLUcF1GNZMGUhW+iQhmar1nYElOFWOrMeZ/VBbGzxwDZYbMu0uKy2O0bPWOcLJjZAbIqwWr1xW3zITZRxwtZ1lwTZNxxJZs3jWoobOLZEbKOkhrMlmjxxJZKch6ZaijeOJLNLR1GGtZyrKRUm2EBZ8CHNZEbIHiirKNZYbSuU2eJdwOrOSxEmgmQBS1HZPbPAopaOMSgdHbZz7FbIUbNCY7vnHZv6PycUBTxOnbD+Q9i29Z1JEpZefziSjpwrZZBHXZRbNpOMezKuTOMEZbBkCANDjzCSzTvZcHkmAvjLLJKMCmA97KMIrhgrqZ+lfZQ/xDgNiE/ZTsEfZMtQfZRTMfpAHMiAn7JfZ1uSg5cHmA5UjKKxwni3+rCUd8IjmEiqfitC6HLn6kCSPZ1MhhiNfgCSWQ1wSeHKPhVSE68pDl0c8E2x8tnmMc7XhU8AyRgy380fiPSSZAxEiriusQcc7HK5i0vnycvjiNwATmqSv2R4CAvgicAQOa8hsTiScTgtakfjsQ9jl6S9fl45XyVTiDsRGSZcQYSEak6cf4W18GYVaS5qQo5fYVxiv8Sk5WCC6cuELmu6/zmAY5OiA1Mgnu8z12+2aFs5FNzVmYqxs574js59eGWINnIjEMtzae5lzc5yfGc5OizXwNnMYIQz0bQ2BCccPpkreq+kMQIRGUc0XLueHeJaw9Pnj4/1Ni5SDGZqNnNRiPKSEufPFS5XCE9eJHD2ENnL8yE93CgNmEcIAXKK5RhGxmBXPc5VrInA+iD+opXLBBpDhNQrtBs5dhQbZpzEDwCXJ9QxWF6ZeyxQmjnIa5XbNjQmqFa5A8yG5hNAK5wjG1olHMbe/jkrC2IWpZBskm5+cP/wpDjosqTk258+AUc7En58K3K/uwSXc5/XIWK5yRf2A5365rqCeZiYXcu/XM6sieEuZsm0e5nMAVwL3OPQ3nKiEASHJZD3Mc5FliQwzzOu5APLKcxKDO5APLa5yCl/2/XLK5jXJKou3NJUOjknA5HKS0LxUW5goMh503MKSzHKWe2POmQunXq5gXKMclYRooHXjx5+3NJ5pPAK5cPJJ5aE1h5bXKSkrnI4GTdyCcbr2JigfHiyQTmg4c3m85QKEeS3cPABfPKNIHxhP0Mjk55H3ITywy0c53XL459PJl5fURM5fwCq5lYRpsYiEyccLCO5gmgW5KjC6pjnNpMgzKl5UXMK5lPJg24vJN5VrMF5uPJZYJ3O55zPO152rNNUcdxp5jPMGItLKm5+3MKIeIS15Y3OOSF4if2LvOm5H5jHwHvKtZDSLF6/XNjIYzLpkS80c5UfMeSCcinmb3K55svESWzXhZ5g3OzSpcwV5BbwuMoDGN5i9V5wefOa0SXkrCKplpgefLWg+jmO5gzNT5Ss1G5xPL957xLDa1XM95T/mgoNnIN5ZLOxk533155fL95xhBC5e3LD5OZFmWDPKD5o/IE5FPKtZERH+5pXLKctmnN5cozJZgFWr5W4BYYwjhzE9zLj5NbN2SW/ON5pWA+5q/PJ5A3J6Zi/KK8fYXTeDHVwgLfMv5JhHPcQFMC80/KMcIOQ25FvJf58HkYhkfJppm/MbqX3OH5H/Lc+J/Np5v/NBEgGEvZkrOKZ8tlRoJBXoy8U3eQGziYyG0Ig5KrlI8SLAnaMAtMM6AtLJ/7PlsCAsOAQtWXa/CEQFcArmhN7OgFY1ziMnIWQGmAuKMpAvrJg/10GqApIFq0THcaAuoFDApHR7TLHJozltMg3PG+ep14FALOEc930cIv3m+ZZTmAQc+1+8bzJEFfvn/S3ViFYcgv4wYgp/JtzKv6p/hpqFzLbIpGRgsxzNaMKCNLwkPj2Z9jmD+zNQYi2guWc0Z1+8KzNMFBzXQCigqeZ5dCQCrVmmZw1D5Zm/kUYevzkFtIAUFom0GZzgs8F3bP4FapDnWS/kpEyfB8FHgrucDEACFFaL8FB1iZIBgtshazgIsQPJ2+Y+DWcp5wr5Zgpe0aznpZBgschUSDWcVLKMcQKWnOJQo5Zqf2/m+QsJZAgspQWQtxZogoKiZqAxZrRnd8CQrsuygomZbQRSwJl2UFTp1GcBg3SFS/ENEBznrOWzKkF/6WBsJNF2SUwu6CiFJTY7QsGFsb14hygtXOnQyuQinGUFDAIdK+6A+55QqMFu5IAWPgopZGrRkYC3I2oxLP7KPlx8F8ww4oSwvcFoBxSqorKeFfgtgYjZFaMuSCCFr01swXwvBZPwtxGOQtHAVFxiF9MhGFi6HMF+omiuBgoAgBgPGFGhwMFokKVaVy3iwBgu2Yf1H7KzxzmFxqGPQNwvLBcgsMFNhD2FksO1ZdpP+5ewoEYI7NyF/9AlZ1fylZPKxlZPAoleDbDiSO1AXZvAveujyUlwGrJiFosleWrRiio5x14FzMUrpPItBOQQsi6Wu0FFvIqGFo0CtZ7IpqOcovtZ7uFXZkopdZCzMlw7rN2GUUMqOcgslhPRz5F4QG2WvfUTZ6opVFxICWOMQoNEUbMlwMbKCFNop6ZHrCtFQwozZgovtFMQsmOdm176WbJwC1nFzZpovzZQwsLZpouLZazlLZkwstFwotiwcK0DFtbNO88bN76HvhG5azhbZOIqLQSoowBfxxlF5rLWcfbLZFGwAlFYIuHZkgsLF0YvgIR0jKFGwFzFj1lnZ+optZxQrYmVJ31FjrMxFTYttFlxgMCtYt3ZPVH3Z1ovz44TmdF5YpEKHYv0oF7LYAn60gFKArHcyRVBGIzlUahwDnF4HNwZ+zgXFrRlYFzbnSK/jT/ZTApnFNDm3FyiVnFRyB3FEIw1a97iXFwUzXFB4pUZbTI3+Y5LxaPkI+Sep1NcwgqmsTp3NAEgo8yc+3NAsgqmsPQqVGZQHmZz1nfF2qE0hU1ndOOARJhoEKcCpGW9xxzM6yyIuaKfFHglFSRB5nuk2ZCWSuZ5oFsFCWXpQhQMAlSgpGs5n0OmekJGs0Qo/F3grIloBxfFBQISyxEsZeQIKQkYQqDcjTEiFVEu3CVdNKFCWXIl4UCkupVkQOrozpAaQrmxAku9GCAwFonWUZZLEpfok1ggRkPwhCh5wQlrkIUlkoKMENnzpA9LKmsGwoAleLzky2qiUuVdOElX4o4lQ5W7Oxkrm8ZoT0ut1n0ljhDNCzLK0lWfBlG+HAk47EoslA9JOFrktBQ8oVZkimE6ytkObpKbD8lskJWYBIsklIPKlCpIpElRQp0lp92GsMYLFG7ktsJegnUlA8G2FDkspQ8oVuFb4oMllqGxF5kq8lO6g0Of4u/FVJCBFwEpylqoBclT4tvOdIsNBFnOlZqKXvF3QAVZlANpoC7NNcXIqhxtpgB+3Nk62tlF1ZUQPXUBrPhyNEPOOZoXFYgVnIh5rLNC8ot7BbUpqOM0pGO/UtbFPn3CgGotKsbmCa+a0r1F/Up9ZOktwgHYIWSY0rWlS0qOlaryrp9bJwBvtjTZ0ksul2WStFZoQzZ/Uo9Fj0q2OzFl9FOkojK+yw6s+bLNChbI6sxbKrpEYvulx0t1C9ix+ltbIul8bOYsyYvOeVdLTFG0obFOkoeKaoA2lvIqrp+YrRlRYvRcJYqxloMrqoBS36l6MqpIZAlJB80vVGtembFy0rVFLEp+Qwq36l2op0lRRXBlXvL7FnEsPZIMsGlionplZ0qkAedMbJygAMgWQUxGwUzPAwspSxFfTFlOxggcXRiFl0srVEJ4p5yldWUGMst+McsvMsEsp/WQYXFlaYzVsqspvF+dL22XQJQ5LEvZ4IQpZhPaBolcQpUFMhAolYzPmFBUqwQbgvkFbkoCpTgonwFUs4C6guYip/iglnwp0F0qE90JgsJFiEqDl+gppFm/j9lZbNTa0X1Al3sqyY+ErdlrrMCFLEpdYImC+FPEuHE9sviFrsq7gcQu+FpspfO+TiuFKXOkl2Qp8FdwKrp5cvaFPQqcltdHcucguUAMPJYlsLz+FlpNYB0ktUOhIsPBdcrhI7st8FrsucsRfLeFg8tyuwIoLlmUoJF/wuJZEUu2FXwrOF7dJOFyQuCl0yCXlONFe5LEslklwvvxSfxCl2cotljsprBIwptlicqHl6vIdlOkr7lycpdlh8swWAwoqlsZH9lowstlVJDCuyguihtMrKl6Io3lGoQ3Oy8pk+r8phFw1AXlhUqfl73Ogo8oTvlXwvolV8s1FOcuj20IHxu9IprqdiyiOUYLrltCG9FiooplxIDVZOYp6lISE62MouxlQ0p7FZYq5lUXGlFPIuml20q9Z2CqC+J0pDZqosaOi0qYVnYvE+tCoVFpsMNFeLX9ZoYtBl8TmvlY4vOl0QUTFdopulUMtHFibLrlKciwVDwr6on0rdFOkA+lLctGZpYpPQkMt4lZp0blZouklwMv4VXMryQZCo0Vrss2AYipOJCCDrl8WwFqgoqRl0ks7Z+ouJls/ErQBYqFFXMvaJPq2IV+MuoxVYpnqBCuZlYoqOo7UsplHYqlwLCpCVTovYVmPxJldYsFFe0uklA4oLFwitWl3MsiVySv5l5ArjcUsouc5PSsmcspyVmsoFl2svecnDVWc2SovF4TP9B+SuvFJ3myVNSvYZVSsCKBStllTSvqVmTMNlOswIh9dULlsYJFcxAgylSeVolfSpAlWcqfClVRKlTsv/O4ypMlScpwOTn09lOEr6VEEsjlovDNofSt2FcEvXqaPAqFmyqB8pCDQlUctgOX1CwlccsH2X1DwlOkokpzmBFco0EuVsgpuVmcvYkRVy+omcrzl59Q+B7nyBcvSo/UzErslkQoeV1EpUl7ypceMysXYTJBFce5EEljdSxwEKv8l4ksCO+ypL+GkrYuEKuilCSsYu2yoSlNWI/2Y/BSlMko7qq0GfF8KsyO8ytslQkoxZfSv/FLcq6FlKomVrcr2V+mgql0el18hKsNE8oRQWRypWw4UtAVyDSmAcKtZI0VxuVlctKlG5xuVJyrESLKuJAoIvRcb8puVAItplEwsF8HysvlHKqVVIKsHleUoBVMys6szytxUMUsilaqp5wlxEXlhDWJK0qsSlR+2OVsctSlCKoi8IIL3lYyuuOACt5gKbAhVUkvZVqVzdV3KugYCV1pK8koFVWypxQ/3N/lkqpnMcQJFVkqs2ou8oDVDKv6VL8p9VP9VJVtsstQqqtpV2qs1V0ysHltwuGVFUq3lJKueEAytXlpqpzAKUtillqomwP8t582wohVcIq5lOqsdVNBFW+uUtdViKs5qtUuvZDIr22TIrZxpspalgvheodio6larM3aTioOJryxHVJCoi8w0v7V1jAEVE0tgO1nwIVrcM6OA6uCVwxUhWm7RWln0vWlm7UZlLctmlM6omkPCqBc/rJFcG6AEVO6u4GD0tEVUx0ZBEipvVCxyvV/GBkVGbM3aL0vIYWxzPVKiselubLPVVGFdl2xXHVT6sMVwMr/VgMuiCcKz/Vv0ofV74W74sMqsVCMs3ag6rpADipHVNCucVcR1M+k6o8VR+yw13isrFh6qcVASs9Cq6oWlESvfCdbRplKRWbFu6q3ZtMtJlJGtFUbMrUSZJ2A1KSrplj6o0s44pAAk4vpFUAowgcsqZcCHLyVgRRFch0IaVRSqllYmuXaUmoC+istJGsmtz0astE1cmuXFbjID6omsKUuso4a4mvaVzOKNlXSpbSpzljBTHW0lfIuEFTHUGFXgtXEBs2kFrgvgEtmr8FCS2PEdwyUuNgs0hTHWWVMQphgN/E0auwr0FzNxzmocoC1e8jxsaEq0Fvmv+AVzPc11si9mFypiFzmqykccxcFF7wc1IImeF1muDk6Wr8FoClgkyWqCFfAq7EpQWYljQvb4781SG/ajK1pswyW4QsqsVimogHQlUFA2n6FKOi/KGUVlIZB1a1PcrBFpRRQk2WoWF4IhOFLs2iF/ZR8lO4i6G5lyxFKbFa1KQoyAtwta1UkpJF2wta1aKspFQ2qC1FQuOFVqknmnFyW1VWsDoggrm1BIss1bmsWFaWuGQdmtF4GhyY6VKoOcZUpO1TWsoSG8hrmWfHM5naoiOjUp7VvAr7VKOhDYmYpY0+y1+1sopdQWrK5kCyiLFIounVQOoh19ANNZQOprFzDAq2v2rsVyoshWv2q3VnovWlv2r3Vcor1Fv2viVvAuNFAslYguitR1SWrsOz6utFd0t+1HooTFwqxR0CCEp1roq2ONOpulzOrs2DOpUVrotzZDOv/VvQrzory151YYpomSW3jEJOuF1SKHsWvOqDFsWHjZDOvg11ooRlyOo5FWYtRl8OoGCspBcVYurVIMOusYPq2h1w4p8V2usRhPwoY1xupR17YqK1o4BplBzjPZ2Oro1BzjN1+Or7FJQo5lQuuHFduoa1ibIyV0jL8mC4vIMy7X914M3k1yHlGcIoBR0uSupGtoAD1IerJyYerY6AnVWcQerzUsetrcyeuPFh4rY6keok19Up5Wxss6ZPSu6EI8yJV4IlolD2uTVoyrrk1WpmVacoEEjmtdlVyvJ1BHAr1XsrokRLGUB6Eo1UfmtglyEsC1Z2FDluysikYWvMFhyu119KA4VOZA81cWu355oCAlLs3olteruk/WsdlTyqy1e6EBVperVuXs3olZsqt1/+lLlVcrqU5Woq+xKrB1F2sN2f0oblDOtX2FevpVQ+u1K3vxI4nWpzm3WsnlNmpng9qsmYx2vr1Oo0tQY2u11jWor1EYmJ1D+on1pRS31QHwx+b2pQV3aqfOprh+11ED+1OCpPQgOsQNo6tB1xurHZ+0tFF9+uC8FCvnVmBvQ1y6ovSP6GQ166vJ13x3CV5BvG1E2Do1M0rx1iBviVvCu2W7uooVWOq9116q7YcusQN76q4N9Oo4NlOtelHOp4N96uWcLOoa136vIYPOq910Gtro2itYNKSoohBEnF1oMqMVbev00shrMV/Bu+QTbPhl17iX1OKDXVKMrAkCynQ1+eOEN4OvxluMoN17iqN16uqZlTusQNZBo41Zkho+VGvI1xur3V6LkcNP6CYNLGohkKhvcVnusCNfMogFfGunFcxjllEepk1wjOiNqeqvsURuogiepE1h+W8ghSsyVxbillMeuU1qRuJA8RujGWRuD1ZStiNSRvSN72ve+srO6VD4uKw8Jj8whareVopiPqnss/FtRqpVP4r0hrRomVjesnRtbxb1OEtqNXms71jZFqNGyt715kFRMA+rGN6SP3heQtH1JJnFVretWRTJkm+BEtORmlE+Vkyp3RCChr1LRoQsG+oaN5SJ31RcvKR4LJkVzLJJMmcossXmAuNG+rBVOGIMo/Kt/EWOCKRK8rlG2tFRM7quRVCuDnR/qquNEOAmNykuxV/xvZyeKvpZtRrM1h+veNTRrJV0KqQwnRtBVXQvhNAGqsl6SN6NicuZV2Jkl4jks3lBqpuNMyuJJtmDxNrsuANmJrTeTapjV0xs+N4Cn9wLxudVIEBEwtJqhV9arCRVJrzVpJrsW5JrLVYSMQlJqrsCIJujVbJrfREJodVyiLRNl8rylSJtvlD8zfRbRsAVhJuhNQBrKl4Jte17aq4FabzQVJsvgNrIs1MZBpQN9iAZM6Bs62BpsnVr4HsWxprnVprINNRBoPVDJjINgiqnM5NAx1rCoRRHkDoNnCsfR5/WPV4F22WriN0VzpodNrPEENMGs1MvBq0NNSMbiQZrENdmwZMvBtkVfSM6Rux1UVubN9NshsA18VF9N4GveoouozNqhqrZqyNZYpirulriIV1ehoFqtpqMNDiqtNBCvMN8ZoG02Gtxl5ptsNBGqrNDhrrF5ZrI1qSpvR3CioNLhs1MXhpiVZpqmKzGsrSvGxzNQRubFY5tCNE4vpOdUt91UESllypnNBcssXN+RrPcy5pwe2mufMG5rU1fjIE1gRRXNORtu8/hQNlkmuEZn8JiNWNh/RhWMo2+erHRhOtjBypoaFLqGEFtRqs1heG8FkpqCFcaAZNwsUu1iWp6Nb5uqcNJtaKmguqkwxo8I/mud8xzIBNRgpC1lJvC1YFrWo8xusFagvTRwiHi1v3iAltSJS135q2NI2sy1/yO2N3QWfNtEuwtBWuONSVRK1EQrhNexr8Fk4GuNtFuItdWvuNo/MyFrQueNDxsm1lWvTNTuQQtDND5NZJqqQlQuuNXRQqF/CC4ltRo/ltQu+NWJqfNjoihNouia1giLhNv5s6FZks/NnopRNb6LfNwwtJNdRoiUGrX6MU+BJMdwPxFxltUtXl1G1MtFcRN+r9FeChUtIJx9aJATtuqJkPB0Bso2sBvQVfIr7V7ZuJFD5TVZLZr5FGBsbNHkX5e06pCtkooINgVtx1FW18tjYvDokKwZMGOrJ1AZvsOXYsR132AZMBOtOc/rMnN5osStEZrVedOvDNrnDZ1suuFWk5tq1XotrN1Vo11pVujNCZpaFrnGTNPKhl1AuvTNhVtCttAVpWeVqp1cKxTN8YvKtJVsowlisV1+hp1NKupeCqMuitmuoatdZuHFDZpMRuuqKQBSxmt63EHNmZEmtI4pKt3ZrbFEvQqtw7Ad13YrQtwMkNFrutHNnVp+FZ7MnNPuv41xbgXFB5svF1MCPNURRPNGRpoyxjUetJ3getV5p3Nb7L3FW5uPNUepFAX1pz1c5vN6D1u3NwU0+tUNsqV+ms6VlRqM1wQpO2OKEEFJFtdOGAjc1BFvwqt2vs1d21MQuNrl0zmHU2gFpwl6m0GNEWvd2RP0DlcFvs2wWqgty5zIIi2sptwu2i1qFro2R1G35mFqUF92yUCeNpj8wkgy175urOgtpy1wgt5tKWsK1IXnBWVFr6YkQvu2+FtiFhm2uQCQr4l4TRSF7FrD8xyzYt8lsU22yShFn9Aa2btE1QwlsM2MFFgtStrM2wWBqF/CHpZ6mzM1pWr1tKkKatylta2z2DUtecwJtl2poojNtHAWNrltWttRtYwqO1Itr0EzwpmFTJAVt4drd58WAltKIrvl923lVBzjflIexQt9lrdtwzANt4Irdt1tr5toqmiu9trRtV2tvmmNrEFrpVSu6m1u1Z2vxt7toG1Rls98pdoKiWOm2FhdoaFW2oa2udqQC7dtp25tuJFzdshmWUz8OZlobt+tryF1doFtqOUyF5dtjt2tvYCahg0O4TWZt+dt9txtqEt6AsDtvdpCOqptvFqCsRtuiRZFdm312FuoB1cOznYdVv5F7q1B4uurb4/ayvt5YqlFOqxBZdVtHkQlUrAk1sQQkK312yVqihIx312OOt1FFW3122VrpEwewA0Euo/tlizAdTOqGtqJSZAZVuhQ8bLt20is9FGbP12tOus4Wxzt2XOv9FTq140g1vatSOzMu5YsghriygdYbVO8cKyQdbVsdFsDraoo1tTF41qPtk1u4s2OxzQdVtK6NJRQQy1txl+uywNYIqN1vDoR153Fvtb9v+121tgdDKkaOtuubFf9qOt61rV2pzBd14lo5lSDol14jsB23urCNs5rutkI2etae0D1ejrLczmLht71rPFdTWMd68VtARjrKNOjpiFIoBz2Bjs8gDjtXNbIWMa1jpec9jsxK15uuhkYJNl95rfeY0Adt6NoJq+nX9t0ckwMY0EJtuFvAMkTr/Nc+rHppNo81Y9IptiFoJeY0EgtTYjueYgzEtDNov0mRCXtPmsVug2DZt3MXieg2AwtjgoziRbRwtsguXcqLKYt4Tu70vJCFtuWsZi1TvItJmvXckyNLljttv0PvQq1utr6dF70N2wYqv1G9Nstkoq0ty7nlKPrQ61ATtZIGPyX83dtX0sTveF92rHptcsMtcCxidwzrrt2zpWdOYGjtqIume5Tq5t89uduxTrTt2doOdc2SYA7lp8dnlr8dB9oLiN9EmtB2EB167hxkBWowNy7msI5DrCtUus+dfDqGFBBt+dwOoytbTtFo79qx1nzu/tCVqqdISDkdL9shd7SDOtOVpYNG9NJ1P9rR1mLpdFMDoOdDAHgdNDoOdmVGgd9VpedmUHgdtVpJd2DuatHzsv8bVtjogutxdxDuBly7lJd/zsl1OTwZd+DuJd7LoV1DDoFqvzuPtLDoJd4Lo4dgqRlY3Duy4TTswUhuoI1YLqEdTus+dx9vUdvzrhdars+d/9vkdPKWaoSjuyCvG3ZdWLv2tisUv8681utERt0dvBmIwRAuj167mE1JjvBtKrnD19rttdLrsy6LjpCCxjWXcMHKet1rq/Zf1twFcbn91QVMcdHBhtd3js4+vjoL11RtNde4BL1BxuXctKJb1n4qTdsps2NOztZZDevidoTphNixoOdIjF9lqyoud/NEDlg+oOdPcB2VUxordi2tH1dToWNOErqd8Wtn1SgrqdC+tqdXTseVqbs7d+xos1XTqONnTt0uvytP1NzuFVuku9iqzq8ul+qsU4zubllkpa167hmdE+v8I8zqXdI3wjVQzu6dxqrlNeTq7YGxp3OZTsOd6aum1Pbu1V82v7dGxsFNdTvlVvJtlduMHNVRaqH0g2FvB+quW1i7qpNejhbik7sdlXJoLdPQvudUbsedMbual2puFda6r1Nsrq+dpsp+dQLpNNOBrFdk6soVJzsZeS6oPVYHo7N9poJdTpsYVCLoYkW0oOESOs+dfhu9NtjzNdF6pGORrs4NYZsdiQuFDN1OpZdIiqjNFLsJdCitUVLOo3pkhrVa9LtHAqZsLZlHtUNbLoY9ihrzNJLr51yMvo9SZ10NKGvGt6HpwVxhrFdZhsxlYLvrNMroQ9+GoKWirv8VyrtedHZt7N6rvcNnZoJd/ZsKwdYt+dxHr94GMTI945vp1QnotdK4r3NL+QjdxRvGcTnretTrqyVsRtDdLSsc9Abrc9tjuKVy7gddD3iyNXnsDdu4siNgRR9dS5si9rrsjdEYNvNVRpjBg3Lz4AwJqS+YLp5YwyfBP4PCSwWFdGAEIaSVVCkhWmFN5BCBHB8BFolHxgIwKUM4g1bEq97SAShUeiL5blibBTErRFzXvChbuiB5/yHq9T4P5kZLP+QMi0QB24LZ5ZXvNRBXuHGUkLG9cvJ5MhUIG0GXr1Wb4Mlmz3JS9mBAmS2YMycrCCy9kELl5JnkQqa3vv5ZL2DVx4J29kiCiBJDDYhovJ5ki3qiAXXr9t1Xpd8fwtmGXByIhzR1+5Zt0whb4J7ktzKMETUJAhnwukk0oPbBt3qo5k33KIXHBGSIzVB94KCXBIyVAYdUMSgdPOuQe4MdJ9/Pe93v2O9fvKYKk3vl6NSXZ4eXuh9z3K/Ag8Esh94IsczAScBdxk69FfPJ96kK4QFzKJ9PgIfcWlErpFSXAhdxle9WzIgR5P3Z9Lh059263R9MyyeZP3uR9wpiSFAPvChFJnTlo2WdpqYOmUI7Ol96EI4UyXuDY4UOK9lvLDtyPuy9EyQ+9qYO29mPossTkLV98yQFQbPpqSXXHycDPsvBKUC9OD7maQJkMUd6cpp99vtF9nWBqSxPrPBgvtdZrPtm9HPv19QrAA98XsM1vig+Mv4gO9QTQP+vvBahzTh69Mo0j963vMEcwKblHFEYh4SS04So1+SF3unk6w3T9OLlu9sHG9+yTn0F3Xt2BSfrlQYfuCwYo0949CAK9gstW+dvS+SnmFdGgyRh9mTnX6Evx3kKkKV5HTVq+O8mp+8nMIY0X2Ie0zJ3km3pz9Xwkl5otFpZIfrMhcvIPgFXwqCSYMycjfu9GcfrD9tfvtGq/oK9FfvVGC/tN568nE+Sz1BZlpj8hovIChovMyxWXyH9UvuWcNn179mkNF5wjHM+HfvB95/sM+zfuW9d3sQB9ftF5CbQP9yfvL9O3LhlO8nKhmPrx9K/sbqqPpN9a+CX9FzPF9T/troFXrgD7n1396vqR9l/ogDGTjR9f/tD9mAfgIEFxz9kkLb5CRxL+h/sz5UAeGhWjo7Vtjsr55zmKYK0JxQ5zm14OAvC9G4G2hefJ46bAboDyAvs9C0IYDOBQ4D1Un4DzAdPFQTjRgn7PCmMTL4DcHgkDXZI6VFRrHJVdBOGG7K4+iFGds3Lx0c3Cns4qahT923IpQnnG0D9/KmIVpXoOsTH25qKAMGwhwxwoXC7ZyoCXo0yEtmwSUlh52UkB7T2CSTTBmKdKFapbgd/KudCr5QPOh5RuDDo2EDW5tgZJOw4zUchLuuwQQcKQGTiMDEhw8Ghga2Uw9FtmeHNW49ByyQz3LhQ5YNxqVdBSYBXtsQO9AMDBXrLQpWlyDOgdD0ahwSD+QYOQQQbVA/XpgyUQZpqpPFqcRSDsDIBEe9uQjQoAfvwhe9oKK8zx0DqKBwp9B3cssQccB1vH6DiQYqQ9XHBOVM2CSDFEno5KAnkp3Pse5hyFQFfKkcYZH7obSznZV0gw4MwcSDElKv2+wdGD2XGmDz6xaDNFwcOYkXqxJnJKDHgYH93iUHUlb3MONWErpW+kWy3xnYYk+Q+Dx4EQCLQZP2zgZqEyvruDwwcq56vsrQrhwmDJwa24wwd8sJwYkyKJ02A6gco5mODsD9IEG5WQcqw9BwraH3P3RHuBJO7UnTl42hgMJBy0JIf2R5JIfMOUdI0D+IesONwZ0c2QYROqQdRDJJ0WAswco5CIfOe/dGgMWzNu63uFbocIbl5gUjXw3Id5YtTgEk2h3do4SPqDEoY4OXbGRDzNBhQYdBGDQoenIaIcFD6SQruYJ3lDpvNyaXhyBDPTL5Dlf0oDIp3gIehTgppVDZOTJgg8loe4D6moj0E1TpsBTgkDlRnPo0cNMMgErL6jAtPFenDEQhwGkkcjTdDiSBtDMgbPiMp0dDHBk9DVob9D56Ua4V0KjdCXsgYsQRpgb73hgWIeXGVZgnuHrFpDGYa+mjsXUqY2F3GqiDzu7guMDGYZkYFN2AVE4nfGN+AJqqbWo5yYdnmq+mGoFJh/xLFV7mzYfeoPgYlRHNQJeU1G7DFGivonYYraRuAlR6qkZi9YYRxG/D7DfttGJwlQMWw4eTxu40AkJYYi8hYYvGaBE7DB8GlQx404YGMTTDuGAvGe4cFSO1HZox403DFaV0co4fnDq4euQkVhvDqsTlwQ0lEq04YOdCRxPKoSzjub4cDQ+5VCMoSh2p+dFvGUfiydF4ltIPYbFwaTpN938ypReYc7DN0zHwMEdmDy7h/owQG6DeeqD92QgzREIFXDoiHvD+3iQj/PW6wvyCwjBEbbqtWFiC1+FXDqlk1QFEcwEE4fNwpeAojB1lv0lpLDIFEfDQPKTbI2DEcsLyoXDFaSMJy1l4jt4Y2wdEwH9cEZOQR43OVX4cvDyanisX1CqqBcR5FzweXGn2Hieu5FPxmzlq4l4fnJGaJswABiUj14c2qqYaOoZ4cqqyKnoj8Eckj+EeEjQzBIjq4YEjxEzMjWYYeDU4aMjisQPDO+Ii+iWC3DMliAjWFDjiUbUpDKkZgoOT0Cj0Efkj/4ezDO4akjgdw8jueI/UM4bdoGkZiQfEf56DkZ4jYsBLd2RwQjOTQIjxGAxOPXliCEUBLdaMDJ2y42rpITqgjv4duwE9zlwgEd3G9YjzuO3C/JDUewjj4crAa2wzRksgpusSzxIDUeJJcbuyjFAenNV7Mdq9xT0gnzo7gxlXGjHBlPqXocdq1wImjc0eMqi0fDdyFGEDPOWjM9iFMMy0bCqq0Z2j60btDu5qI8+0d+dU0fkmapAmjQuHOjZAvKNo6O6VAviqClERY5CnlKCz0dfiJQQrhH8Rr8LQTsSFfiCxACX+j+IOBiH0SGC9nhw5H0bs8OZFuEL0eq8Xnl4SiCThj66RViosxNwzHI1izM2i8OsSOCCXgOCXPnmCUoaPE5MQxjg8wjCbTiU5NwVjCxXkqijwRKGavkoqwIQwS3MS+CEXhE5fCVx0+YRI5bwRBCvXi9ipy0G8lsXM8RngFjelGccwM2m8tWV55q3kW8ZIT6SgfjW8S3k28w0dZASCtnNNdSs5PatD51SzHUS/LBBIA26IvPIAFbywYkHGB35LAgF08ni18RsYtjm2BQSKjFLRBIQRIygOy5KTg3W+kQv5gdBi5Fsb/SwBmy5AXmmWhRyy5aXLzmkNEVQDfP/wAum3o//Kc5U3kUo3L365vvKk8+fGB2rfMxCQHz65WPNum6cc65GfIeC2cZa5ucZC8j9Fm54cazjvdDf5IAuM8w3POenfP750Oi1MVsZt5rpwT6b/MTjttrqBqcb/mnahV5TcbdmoqmjOnfIUEYfldKIPOy5iHCaiRxjn5KfALeLnlkEBaC6573O+KiFI3l33Jljk8YMBpXIa6pyxHjQcaR5nngh5Wsbhjh3NL5Mceq8a9NMckfuq8bugrjEKC7jDcaf5p8dWC1vMrjbgMJ5pccxCMFlJ44/Kbmy5nG8h8YwWmjmf5bwXt5svK687PPJiEvOnmIUG3CwvOrO5KCF5v2SNId8zeh6fLdUFc1gW0vK65ohQeCL80ATX+o5mliCUunfLV5TUUITPcfm57q1wT53NW5U3gwTxvMTjpaBQTCccb5ZXnNMDThr5fccMgMCbL5+IbATzvMzjmIUbQbsP4cQCY283vJPjDCYHgAfIETtCbVIIf2/jmVo+iEfLj5/PID8vF1j5sCc98noY3jkCbrM3uPr5WCabu3E0sUa/Ke51piUTBfJITf0ISOBfP75xiar5J/K758MPE45vMkTpVB0T7/KW8H+A55vcdkTn2Cn5DvP5jciaH5niY+hj/IUTziYYsASZAFHMJv588cvj5MJGQHseX5zidGwa/ITawxoPy2/O85u/L+hwURPjh/N5haSZP5oCcSTMMbv5UgRz8U8fNgJhDCTJqxkTf0M7wrccb53EyHY3CdqBTJG4mUVGjjvvJdhqGGAFYIP0qmhHAFI0anFPAY+tcHLHhG4omTHCwy+foIFle3l8x5gYna+AqmT8ydMdazgZ0oBjvamAtpC2yaOj/1rJsuybmTOybGurSZmuHewWTqyd79trovMNyfjD6/1ZxT5wF8NETuiZPk9CWWHejCDQ4iUPmr8C4VYiw6S5jSPj+iQKd4iIMc/iskVFoGHNw5kKf8AMCWoickTz8usTD1yMdaIzoRUi6MbRBnoXos7HMISgYV58iXjxTP3ipIJwVZ82KfX8AnLRTjPl4lbMazNSviHKdMY05R+wZTTMeDi4lzl8mfiFjGkTmGpjj4SikTRiiMdkcHCSJTuZ2iiEnL982JUdOoBz9iqpW8i5fgzUNTkL8QcU+SyUVHioZ0DS8UXOGsMc1T3cW+TU0TbioMa8iaoibi7MblTVcS5TTkXU5EKbqicschjQqcoy29rkDeRhJuXlsPjQQ1GIySbBBOIwNjCPiNjnfnPgXnOnkLAj2G/nL9TD427OBXLC559S6GzscS5QPiJY8XMc5mWPXqrEB9jBXJy5gvjoMxXyTT/schTGdzDjncczTU6ujjIApSq8cffjgkVkQdXIrTkKaTEJaa9TzIMDwBXNATvAua58SdP574Xdo1caJ5/+CR81cYiTkKcXkBaZ4TPF3+IbPs75NCfEu5clR5nifL0DYUR5vvLD1x8eoTJ3LD1B8Yh6Qbzx8Uy1QTt3KHCisw8TZiY4i2aGjjhSY7qWhJXjTQUW8ePhFR7acB5O9Q3Jo8cvja6YHjQCaXTzcrdTAlQ7jT6dD63PtK5t8anTS3MD5a+wxTd0VfTtDDfjhaayqX8YaTUGb/jYGb0EeCdLTQ5RAT2CffC4UHATyfMIayGfaT8fI7qa0oQTPqqKuGGETTC8fiyTF3UWj3NQzMVz15XXMV5tfk15J8cL5ayxJhRCZHTmRwMueCacTMVwozNaaYuTCd4z+Get5XGeV89vIoTO9XQz/Cf/jE4GETy3Mfj8+nETzCYjje5mkTUmelxIfNETXV2N5uGad8r4Gt52meccE4lv5aCe+K+6IMThcad8t8JKTdGYauJfPO5ViZszyidrjvCYauDiZXTtFySxriZYTU6iT5Nac8cFTh8TXGeK8rZBETgSad8mYhCTicYu6Y/IaTbnPCTMWavc1Sc98TqiX5/6awTL6fX5t82692SaDTxcyyzB/MXjAfg4G6WdATXXKSTqCfGgbcwSzB6YTO8JSizKcdETcuN/T1sbicX/Lj5P/Js5ihB6TLCdGy0Gf/jFSVzYdnvtDRyamu1WGmTPcLGuoXIuTzVyuTE2dT5tyeWiw104FFfWIFvfjiCpyer07rSmz0KQWTuydmGKydmzi2dkDRSpWzVRTGzmydWzncgeTWiSeTXluFCu/gJSoaXuzJKV7Sx/n7S06WP8NKTCSd/hBTrkT8xTKXezR7gw5ZGXoCRwFSGj2agC/KXhu9AVACSwW/ClAQQCNQrOC9ATQCOgShzWAUJTq6XoCdChDCSOe/MbtCNw9SXgCS3FuCbYRqRRxhKGNgRYC5OciSIGWeNc2p+CX2f719HI3SrAR5jhOeMC63UDluOfoB9qUNSqgWWGfOa0CsyW5zdhyuSA2jy86lkkhpyVJzUZgCC5w0pzrwXsC8udpzcJtcC0aS+zXgTeGv2blz3w0dT8Nq8MLqb8dcyIHmeWI9TgAWNz8+ENJPqfWCm3syt6bBNjLZBXa9MgZNOkFtjzwVtzopldzEaafwLLGBmxHmWUp/kl4MXOI8oWwtCQecJNzfRK1wsXS51xKyQeQujzNJsh0YceX8HueJMjiz2EK7XTilueIwYIdRzqeZmJ2wZgCAKMytppAzjmecGTpeddodfSozaJLbT6wSwwNRqFw3aZoC+eabzifvLzJubbzyeeoKvCe/MoskyFSvBO5feZR5xQoH6/+BqJjqFkCY+ctzkVGbly/hP01xsGa1gsWhdOegq5gr/uJTyaJFIoModGc/8c8frzBWZBz++Z9zExHiwW+fhFSdxQJn/m3Tm/hk6IAQh5HeZnzJHjEFFucytZMzqBmebrM27259mef/TfecAzPuazzb+bKYboUfzwBbdQ+1JbzLSbiJGUVfzophgLcITgLHObQIxQqQLrATFW1eaMTsbzjuB+fiy6Bf/SwiFUT9AWuQNQsILRpFOs/Gbr6h+dOsPGcwLNRpXBo+aW4Bb3exbmu145+A5zJywKiPefeNDBfWCC+f+NXnGl5KeZaTGAMTTwhfHzGQDYTfBcnT+BfVS1/HeN2BZ6daBefNtLLALopkdg5afELluYS8Iw2UL4F0yFaBfax6ATILxlrVmsfKdzRBZwqhmY8iBlGoLiiDT59eZrzMIWz5dfV3zRhdRzME15wOBOUT8+bsTzhbFz/BdFM9hfr5WhcytyCx8zoRfULpnOgo8+ZkL5KF75vhd7zihxD+RefzzvPmizaheJM6RYJzhhdDmF+Z4mJeNSGPKheKeeIdmuw28RG/LzxGaBwCRdxYEVRa5tthbwLdIDKLjhaMTGktSGK0XTeZ+LiT9eZqzUZmyLTACX8uRe2QJtunzYRcGIrWadzP/NFxnDDxFYxbvxev3KLrS2CByqC7gqEZNDFfVY6z5lpsy7WEQixjxDG0dYyVdP2LY/gyC4QXbGhxeQ8xxefMQ+DOzWxZ7D6yfc9xbnuLtxeXa9xZ2Llxbj1exZ2MBxbOLPxdOLt0aQ58/m6VmUTejhiUqCYJY7StQU+jGnkVCRGVjj+mkBTrkWM8P2e1CfQWiG06WGCQOYjSUMdc8i6Rf6CwWI5mURmCsOfFzSUSBYoBaRzWwVxTmOai8/oVpLhMZxztYVJjlwXZzlMZiiMue5jkSWYCDMZq8EqU9S7Ja2SjkQ5jzOeRLjMdCSwpYhCyubCSssd+QyJdRCNhahz03kqSZ6TwqWIWeSN6XEqB+06iPJYjUspfWLiCsZxapo1jT50yLVizNzt+eWLmISVg/6XmLxseUkjudqLxc0Zwk2rtLNse9zlfQdjU3idjgeahTy50IWYhfDzja0+wPToTzYy0Dj8eZCQ6XLGa1AG7zxee9LS3AzzSBak8daDEFbpb+G1aciLUMZOQeIuTL+cdlUdBbzjheDLzysibuVcZLjWZfLLJtrzL5cZTF3BfdWgUDZ9sRZO59cZHzNuZYT7ca5z8ZaPjc+cHzzcf7jARaHj28c2J6+dZjxNvXj5Dp3zM8eXjcxbd5FcxnLmIs0oa8aMIFIsvzw8ZHLeQpk6+8esFyZcOxc+d3LGF0DlW5ZbjQluKLfcfvjQxatLXcbRjSgQPLqBEgLlZc/jsBavLqMzJ5l5aALsiZ++lpY/LwCdtLnNvOm7OBiLjRYrmccAILV2rgTLj1IL4Fa0ToqkDLc5e+KdCdRzDeZwTgrHrz1mbITXBbQmvOEhsDGb4LdcaoTNAUCLEC1oLbpcYTcFdTzrCfABzZf7LXCbkLdcYTQ/CbNLQidULyZZQ1mhdIrUid0LL5eIWv1XYCaBYsTNRegraicTLUFdgY1Z20Tk5fgreiZcTHJf/LNSJQgrmZoC/RkTwxidszhFasTqlZ8L9ZZNhJid2GfZf+N+ibDz3ZdB07ickrFFe5sNwekLLZbWlCRe0rS3k5gKRagL4+b3MGRf4rQOlcrL5diTq5YKL3+iKLjogMrfrGfLU+kyTUW2MLeCgZNWSfQCwFaKTLRaUrNed8rRleiotSaqT8Is6LyVfcrwO0yLWsP8WQlrtLrSanBbQV0IcOC6TviFnL+efaG0Gayr+cIGzGxa1l3xbWT9IS/M9yYOTQbueLWoC2Tdxfarz5mWTnxcDc1xYarfxb2TW2eOhRSvuLPVdWc9Veart0eoD78EZC+yeCmWxaGrjxaBLPAsNSUoQezS6XWrz2ehLOoQVCjQXhLu1c+zjkQ1C9KTCSF0oxLwyTNCs6R2r40rBzm1YdC0kTQ5D1dJLkgWpOroURzzJa9C2wUxzfoQxzvoRzUTJY9CmhzJj7OejC2YU5L0YSTCCudsiRYX5LGYTBrDOcciLoU5jrkUhrbOcNSduUlj1kR0iVPI5KVSTrCYcACiTYUZ8LYTFz8YQWOHYWlzuQldSw4VQyA0Vpr0pZf6E4QwyOJdnC2GV3ChNeZKqNdxrp6QUiYEQPC1iS38cLFNK/SRnCx4XeSS6Q/C9qR3kN4RaOR1FIy36R7Cz4QVrtAQXpl4SUCcOZl84tZciSOaFrKaRLCsiB98aEYgwJpduzSBdlqFpcALbXNlIGBbtL4owdzl5edzrbM4Jrpe7LDozdzl5cYEgzJdQkXNRzQCD+FaNSMr/tclCCEKjzUZduZ3xmzTzdVzTldU4CcZdTzldT+kuZZfLystzz7Za25XGEzLdtdHxydZ/LmICpZCMCLzyFfycOdcxFpZcG5O6grL2degY7efNrldbjL8hdOOuQibL+ldsOr01GLbtcOmH+errMjDTLMG0GZ3QAfzK+aB5FXLQlG+aeZQ5W3zTBee5UhtnLVyw+5s9cXLnEEW8ZoRvT35a3jOoWLQ5gpk6prgfzdda2FL+ZTrXdaPLPE090bZcAL/6c90ABcyLLoTC835a9TazIfLdpdLpZPPvrA8xfr1PKtr79daOqBZfLkNdtrclepOFGSArUlfH2rMjArYlZSOhztErRBa6OlBeir3B0ywUVcAb2xz15rhYLeXxz7rnhbEQmDcwrjdYwOFKCsrHhyQbeecb5cDfIrZDY+ZH1aIr/9b/L+DbAb4CffLXqb3CLFb/racL7rqebtyJdVxqN9fws8ia/ra+2f9YVcgbHdRUYbVFvLQld7CrEtSroDa6iDhbirTdy6iilfQbi+yEbHhasTXUTUriRcCOhfoCLk6bkbIRefr0nJkbnDdoallcIr+je7htlYmwvCbP8vFcDIWZfuScWZvrRPo8rP5fICPRcALODWGQfldZUuPlpoO5f95P9XAaXNqdLnxxCbyDfnrR+wCbYueLr8DQJQiVb6L8DVEBMjaSrMvlcbmVaQLT9RyrjBc4bCckmLRVfBVsvFKrZde7LzdX6Tb9bX2TuRqroyfCN4ybYy6oE3A6QQWrXVZTzw1YbJpjuuLTTc6rjTdFwjxf89WxbabuxdabPiHab3oaVls1ZXaU5VGms1e6b/TctdJ+bL0ozfNBkzeWbV2ZZxxWNuzGNc+T4Jcki8eG2rv/gYi3gwHSkKecR6gQUikz1OrSNbBTy4UFrQkTn6wOeJ8d1aZriKaCSKKcdCqNZZT26VUcdkSKSykU0iTQwxrr8sPSHdzwqlZWdazSReK7PnvSyYVeCvzZGGaJY6ihGWFLqxbRCJzayieGV7S2viXCgURkkx8lVT/qTgy6FzFTFUTii80XlzmtZC8oUSprQNaVTelaVLZqaCSXvkmS+NctTOpbJLLZwvEvOdVrDwQUrpGRVzpyz5bgcomizGa5bGaQDSifiKihGQGizLY1LXUVlrg0WAyRLcgu6UV2GIrZ6iIBfVzApfJbuucNLkrPVj9QB4FWTZlYDnJvrgxIAbnDcemDpcdruSZDTA+bKb4abXwnpeBmDpVM0vpeDrnoQTTQdddjnrZzAYdZ36g+yzTo5YDbHyYvE+XKcra+wmqSZb/rrpXYrZTZdUWdfjb2gdzrDaeTbhdYUbSvkbTc9aozfaarrSbaHTp5b/rXabzb9DbJGS3KIb59R/THdc4bn6a7LnDfnovZf7r59XBOy+YYDMKofTwbfHjsKbXrSlbozePmPzVBbIz56eTrp+dnq+6fIda5fvT4IjQlMnWfTz5fcbDbcPr7jdrbsgVnbVbcLbfjYAzmPJvrIGaQCWTfAzT9bKbuUsqr+7d5gn9Z3bCGcqbRB2wz6qTibsvgwzSlcPzImYgbsDcEzEjZEbMV3gbsjfgZQhfLrr50vbvbZnjLGawb9meA7eDf75TFzQbrde4zv7aPb49AobvabfbX4SbbFkTFidDYg7EmaUL3FekzrDZ/LUUQUzEbZTObey4reHf3xBhew7AamEbRBYCc5hZML153xBqTcPzDV3kbhZapb+ilib1mc0z6jfYLDmeQb9DZczLheg7zHcMbxle8zJja8zBGVPSQnfVq1jf47ZHdJLFFbqz3/mTLSnbICKnbh43lfLApWd8bqWaKzQVbRUrizyzgladrMfiM7uBYrmenfpbcTe07iTfTe2XM8bdfSSbsWfqTZpcaz1be6zqtwgb7WZH9+dHTrt0x6z87b1j/WZGTPGpnNVAYWbIrhl0e2dhGXVdOz8zfqb1xc2zbxdabo2fi7Q2cXc3oAWzE1ysmkzdS7vVYzc3xbi7jVdH82XaWzWssGbeXdWci1ei7YYJWrmsck5zj1ui4XlgSjXZfieqdei/aXrizj1xGf0b4SdKUBjfXcZS0Qy67YMWhTkMZik4kVhjKMWI5JMVoajoXLiloiZjFqalSeMQW7NFzQqJMUVSG3f/2W41VSVCXtiNCSZiMLfpjNan1Sq3YVTor0jiLLZlTPYVLixUU9i/XjNSV4RdiUd1zivKbpTisWzStqatiddyRBz3ZJjd3e05DXd5i13eB7MYhNignJ5Sk8Uj8SnJtivsSkcdAU7izsQ8SmqX7iuqb684sTh7BqYlTmBmh7VTmni4PbriF3d1e8Hf5iY8SgygPa08Q8V3e6aTeTacUJKVqW+7LXcZ7ecV/8T3bp7Nfkp75qdFSV3Y1L2MQTS5qc+i5sVKSMKax7aqdhiF+ndimfgT4DPbR7g8RVGfcSjSOXlvjccTx74cUu7AveNrehkNzBesPj4T0o6usdnuXoDzw7Sd95+vc2ogabESMtzu0oac8TtijA4ISajTjMSBhsac9jdzw+iJGbjTPKVDOzEr9j6XN30ceZ3TuadsUEUGHTdvbX0zMQLjp8dsUSIZ7jZvYkUheZrTYUjXW9adnuv7TbTzaaozyfbrzMvKz7PembzhaZf0/aYaTRfZLjTmaEewAfHTHCbXupdGaTnryVUX6fD7Sz3fT1fece8WzX5F3MFeoW13ju6b7iSUmqTh6ece/ixPTh+Zikx+dXjvT377HibvTQ/ZvzoPLb766ej7vKWXTJfcfkk+eAFEt2/yN8de7lfZCTIApW7z8bBBHci+EcGfD7mVl6zQCepib5dX7A/UQzR/cxiKGePufdgfbpGYAMTCJwzRBcryBGe0zsch6QnveMz7d2nEB/Lz7t/ce5dGa865CasTEA615YmdlikRzczFjyAHEicb5v/f4zhfb7sUhf15k6bFSPPN9ToWbFSjDZv7uKmiT9/aHNcfZQHkcW4bQGYpuJPH4bevYTpalc0T3eiwg4jfYThGdx78Hh8zr/aH0ozbMzHaYDiA0FMT4A4YHjmdV57BfPE0ylsTvCYkHilYnTJ3IkH8jfQHgKi4HRsbVk/mYgTviYDimdACTsA/PEBQgizFA+OWJA7T7Rg5Cz+/aZppUen73eixE5SbxeBNUB4sVe85BnYJeGay0zuSf8A1q3yzmdyZp+IVMTefZsH5vIqzqsTREA/aSb54kQk9WaX7bbiaz4fYo0rWe85P/I8H7RK6znr2qBF/aiHBwhC7vGu0dEXZWzFaUdo3fgLSm0TK7O2coF7kGKHcNkwFHg4KHLVZYD1oqKHY2cWTDQ7S7x0bb8lAqZpNQ+QG+AvyHYzbkS3Q9F6Z2byHAw+WrvIxuzJstvickofi7yaBk3aQY5L0XuknXcNTg6W+ifXaEYIKdQS8MmG7Sw5nSY3fa79ckm70w/JkK6QmHqoHm7qw5/RjKeriWCRiSqCQPS23cRjxCQSSFMV27l6QhbB3c1Sd6RZi9sSq8u6XO7Dw6IEwqfxjyMW4SEsmM5/CT6iWvYNz1nMv7zjBCUhvY5ulTGtzSfbSe1rbNjDmpW5tvbN7S+g9rjnKd78YjO0rveTTe8mHx5vKJHkUlV5vveDjdEg4G2ab97sWqWe4bcL7cZkj7t6aP7yojTryI9TukQ6xH9T1T7CI95H6bcMTReoFH7adATF0io6I3KZH+VkT9evaEYBfbYzrcj/w6mc0HF0jiwdfYRH1D0b7WI9RoK/bkHW+qua6Wc77rcitQj6d1k9ChCkB6fAH9cnH7uiZRkNo8/5BT3rkPbc3jKBPnSc/fn5xckX7+/fkEuo5hHmo8R5yijYG2/eAUE2Ex5so/ZyT/RhHNiBP7osdUHl6VfrJffjHn9dlH9GwHTY91wHlGePuaCRf7to/TH9vJ/7HyO/7n/fAkaA9zH4Eh4zQo67EqY5z5HUmykrGYDQ4g7rH5Cf754YhozrffDEFY7jHdPH/7WI+EIBGa4zeY/aTug+zHkmajHjTHd5MI/R25aaZHZJRwSso+sydA8nHlpS0zxY+RKGicQTNms3GB6dH7zi0UH5mdfqsg+njtY55KlicbHJ48YzLY+cWh45VHu474HWI63HRmfvHT8w757Y93EwWdkzw44XHBg9YeM/BwQxg4RHfKuiz8470EiWbrkyShSzUdwygzMXSTzg/jEseWyzVvbr18E68H22oHVxWaz7UE7Kzj3LCHM/Azk1WfTei/D/HgxcTHHLhiHWI4jYBVe/5cOByEVbBSHCI//AFTZInNQiyHYXb6HZQ84682Z3yvQ+WzcHJOYqKXWzHGX4ntQ9PFTQ8oMJyfgF7E5XG+XejGeQ9Pggw94n90O4nP61EnfE8aHVQ4yg81ZKHueuzGppbWrJiV2b/iX0nUJdNCFiThL1iQdZSJfGSjiQASziSOuF1YOr2HMJbN1Y2DFoVDSRHMerSSQ9xHzfGSSUgpzPk6Y5iFSiS2gcBbUOeSSIU8Mimof27NgWySzNBhb0Nfl9AU54ba1YWSYuZkiuPrRbqUSeSdSUpbsPoFzGqXR5gyWlrk+vOSCnNkCbk9Knard7SenPFbDk7eSyLdUcWU4Ki4yRmSiaUurKU8qnN1ZOSTk7T8eyTprfyV6n0paRsRyVghsGU9SFyW9SitYT5KCGFz1NZ7CjU49SunLqn+1aGnrbMKnNU+GYifk6SE1EhHzqaNbL5aoF9ygtCSBdjDjLT/LqeaoFuXtNjTufcH79LdzfnaC5WSydbUxWBmsYacw7rZ9bGXM0QcFY9bGXO6KgNWjr/vbgpBp2Dbwfbgpk7njrFA+K5KbbT7FXLjb504tDifazL7XJz7mReRnTaYzbPXI65pTbibM3IhnW3IsUtdZTrBM4br/fIx59raIrlHPPrSM9RQ6/funXbOxzeDcnTCjiHrbbf8DjgM7bJTz+5qTbozn3Oxnh+d5nHkSXLaIvu5+RcnAbM9bW5uZ4mzM8Cbedeh5S7ah5CPNXbUs+JD1Zf8rXbJkWT05TrOPIkbedYhqh7YTrVPMC7+PKrC43lRnuvN/rus4nwADZxnTvJAbUTYKSVs5fbIvKt577aILp/rgr9s9qcBmyQrVGdF5UHenrsTjHLeDasTGvNYLNjZ158vOor9Qe9ndM69nX7YNn6+uobTM6Z56Hd4TbPMYr5tekkuHba5rMo4bjfLd90idRnwfL4rKdfD5VHZF5MfJgbFc91CjHZT5yzhE7OM6z5HHdz5Zc+47RfNbneFbTnTc/pbFM7r5RlYTrifPE7W3LKh5jajnxvs9YBObsrwUMcrSM84tORdLnk/OU7Kddn5os4X5gmiOnas9/5CxX07G/OKMi9WEbuSb3n1RfM7I7OP5rRcG55/MACaVYycK88kraTYt9i84cb5tdf5uVbdrgKgKbRyDbpoKl87hHcAFjE9RnTNpqboXdGjmxa6rVApOiVXa6rdAqUnAsq6bhAuK74C5gXGye+LRnzGzcC6QF01Yi7WxegXwzcab8C+EnEzcy7WAo4FD3i2LiC5GH10LGHBetbSvCg2rL/UeiBzchi5KWObmGWpSlk8lSPelRLHC8D49k+sSo3YebOJYm7zzZzic3Y8nyMSFS3k44XEDj8n3C70EfzakXy+JCnMkVlS4U5VSk9zeH0U9R7nj3UCupeieHMUCnpqT9SzwWUXhcRqnK048ecsTKnxU5J7TTA1rs04ye4IjynDyWYHtcVan1i5DigcUqn5i6NSLNeVbYaUZrOcSl7WyR2rYvcJbfC+F72GR57AvZHSssW4QItdYXtPZ7SIS7e7QQB2nxNz2nP5f17i0hiix0+N7SI6zL5vYdrJ+ZunNvftb8M9KXSwWenQzxd7705i5tim1A304+n9vbTT87VBnf+ijrYZe97YsDxnE9xUO0bcyXw+g5HBS4T7ibfhn5ohRnx0/T76M9Y7zjxT72M7z79YTzbYy89Qqs4GXiy5Jn0g/zu5bYsb8g9deP+btLnN1pnv87b7K/bHnC/dbb58ku7TQTHrY5aueE+CnrylZ5ew/b5n3g+nkG8qdzP3IJeU/YnbDEC77c/c/z5y6Nn87zS08s7T7DfZPr5YBvkVM7PLNfevrky6MEoBcmXNVjfjwy/P7QK5Ue1/cyLv/bQbSK7VE1s5AHMzDtno/Yf7Ts9XEGA6ordHcAHX7c9nv/ZIrKDexXjBceXld364wc/EH0EjDn9DYZXFbb7eSA9jnqA4Q7E92xkVFeg7OA4AbnK+f7Gc/2nyaWznJg9OtmFfhnDxsLnky9oH5HYGX+A3LnZK5YHtHckb54h5Mtc4AMvA8SrefZukgnYDnkaXBSfHagHIg747LY4TpyjZFXCdJY7By/7E1hb5XoDPUH3K60H7487nQjxVXCncMHqOXnnaq8DXS84GXIQ9Xnq+gCHOS83nHg98HSxeCrit1cHxnZunSa5Pn1g+TWsTf8H/xA6LHFAInFg4c7188dipg6fnUq+iH7ndSHfXA/n02xndwzR/nwy7SH6K8ZipCCAX2Q/C79TadzPHk6HYbiIXPQ5aHhyYy7ChWXoyXYvyQ6+knZ7lmrva4QX5Q6QXTxZoyZC46HZ2e+Lk64IXpIzIX06+HXs0YuLtXdGHmzb8dR6UmHUJYeiz8UYXG8mQhLC5jS90iOroqTWHVzevXmw6nSF66Aa2JbQy8wC5SS6SOHRJf3Xpw/yGMqTQSUNYnSEY4RbkqWPSCSVbSIG5BbEU/2EV6XVSeIUgnysi+H8U7HkKUZGGR6Rk2WuaPS1IQpb9i7rkp7OeFk05w3GwExbnqSwyEGUOSdertZ6uY2nkNxQyAS+QymG4OSIS/QysGT4XYGTjSwG/BWmLZwyBNolrLG5IywrbQyaG9EsaS/BEOvbvNuS7LOprfE3SwzOnKA5RHyxGunZwmxHrtfOnSm81nXtdgkBI9qXgWpJHslZ+nJ1xaXAM/pHe4A6X4depH71HDbBS+ZH/S7ZHTQThnsm65HxE8s3Io6vbYEhFHRdYwnzm4xny8mzoPS4vS0o9WXbI/83dZfDnUAm5k2y7OXqo6pnBy78RRy8s3Oo8bbRFfJkLM8uX7sj64Ny+V5SsgtHd86tH8wAHbCDbtH7y6FnnCiy3gs9+Xxo/+XMnSS3Ms8C3b4lBXGo9uwEK6Q3ao43b/6dVHcK/2nT6URXHW+jHKK+i3RdxPb3W/E4ps9yX1Y6xXf6/xXWY45MOBcfbmd3G3pK+DkfY6rnNmu7HiVZ3HAW0ibGE9G3U5drHRWQ5XUA6bH4HekH4En9niW/LHsHZU3K29krF27h4wq5Q7m6QzHhFcvHU26w7mS+7EMmZc30GQpMec5/Hs48CnuS6/HJc9e3548tLH7YYMrA5B3q4764ERfy3r9SdX9K6vHpq6ZX0GT68lq7PHy448Ll45P4pq9O3QtRE7Km4fHipfx3z46k7d27XE3q8e3R24B3Djei3gE6DXbI9p3oa/p3IE4jXOQjAeG883brO9irTudgnrO+PnxS8U3yE6QrO47Qnma6zH4E9kr98+gyeE7vnOE4Z3Ja9e3pE/LX9E/sDXneonGUFonpTZU3DE4G3Cu+YnBpeAXYyfS7iza4nKzZ7Xck77XrVbnXYC8UnG67EnUk5XXVxYnXNu5GcZC+d3Du7j1a6/EnwUyXX5u7HXaLgnXvu7+Lqk4oXnHyoXY6PEyveM+xSuIj31WLsyGJSzNekoisFHDBKm+N+yoBPUyuBLWxL2W0yGNL0y2e8uITxQ2YJOLT3D2RyUWEn2xye4G0ahLBy0OAcyNmQqxwBkeyLhPhxg2RKoaOMLFL9QuySOP6yxNRF4EWTilr1Le6fe64JLWQZYXe9Bx+Vn2JS2VWs2WWqy9xQYJf2KGK72Sj3hWWd8lWSBxPWXuxk+/SyNWWaymVjH3EORElVTFiyA4C33qyt7332RRyUVE73+xS2xLe9myDBPv3GWRn3F1hQU62UCyoOOScD+J54/e/2yRmzfxw+7hxNWPsyG2V6sY2PGKL+5L3J+6eyWe66xS+4+xy2PKyw2WL3+BIeysOXux4B/+yzWRr3bWWwP/+5hyp+8px22UMOl+5QPiEiKQb2QQPLe+E3Ye+6V59AGEquLFxBe/JYnOPmJD9HW4pRKYPunH2wkuLyJkBfPo53BFxbJLi4DB/HxmlxRI1XA024+KBJ5GG/oBuK5JolhFYZuPNgnnVy4zGGtxwh7UPDuKqJzuIa4EM1jLq+IGy5GHuoPuOkPDRLww7cqDxg6mrDvXCfwujDjxZipe0DXDHBseMjxCeMx44BL4P6dG742WDBJXYc73L1Fvxhh973rfCrxhhJAqUQdCPz+JDJY+8CPf+InxPRR8PmeNpJHh87xmh82c1WP7xZxSUyCBKcJimSIJ4+MjJUnB5K8+MwVHxUtKpR4iPhpS3QKBMtxa+Nh4OR5lJ2+JIOGR4VJmYkWyLys7xtBOVKsZeAJ+3jRyxh6u1ZpIPy3+4a4uFR0JWJOLoUR50JGqHsycR+GPjpKToSR76PNpOqPwLGPxXB9h4EmQVJMh5kyT1WOJqx4aPBR7hJVmQqPeBNmP8e40yeBMmPRx5XxmJIYkhhxT3CBJKQFB7e42x5gJ0uP4P8+8as/+IUyZBAcJ1pJEJP+5H3RRL73FhMBJDRNh4aUKhJUJ7EJUuIkJypSrCMhNDOuVBmK1mTUJauI2sb3Ecy4+PaP3h7XCyJ90JUQafEQJTLxHKEe6QmWhPmxNr3qwnBPhuNtxQxV/3feIZP4xQBPfJLn3bmR+PCR9e4u+46yWQan3plEp8vROpPAWSWsG4M0PjcVUliZKGKbUWuRsZJpP4nFyJ/J5331Tc4PZR6k4qp+IJuSFuVPPFVQSp8+PXmUIPDpN2PmoH3YnB6BJrvGXxPYXNJ2mQTke5B0PqB2kX3jhtPBe6dPyxKyPWvFdqfh6MJm+zpkq0jLxVR89PefQmJ449GgeGHtjoJMoBmh7MbvJgUPofBScPxJFPyfEf4uxOVPPRR4XTxIlJUnCMY5xP9Jne5zPtxMxJ9xNz4UO8zPbpPsyTvNTPix4z45xUTPhx+TPL5xaJmx+TPC+b8PJp915kJMQJcfAugFJN+PSdBH9xJK9JFx9r3nvAJwJOL6XAB9HPuJIuJzR+7P3RwdJ6p7nPeVEKPXhO7PrcJpJSZ9D4rZ6jP0p7wwmIbNJmh8GknJMPPwxV5J8p/IwCY01JCRJ33wQiG6d+MXP8GCslHx9lJJB1Tx0pLuJBBMZAdSNVJ5Z/Oyl56FJfZ4o4xTD1JwhPT3R5+NJzZ8ZAMiwWP7Z+3WxBPrPofFZ+DpO1J3Z9tx459/PI5+KsfpInPk9DccnpJnPAZMQv4pnQvD58Qv9pK9JRR9QvVpPZPte/3PCZKyPg2daH4+AXITzQNZ1OSmAvmJLJ7u8Dc8bRbJeTQ4vaZLYv3F7NyTWUrJaMESaol9rJw5J/Wv+E4vVZNcMU9nzJ0l4Fls7CnsQ5MFyOKD4v6zYM1vQdos7KjbOmhz4uz7BJoP9XkOWr0dNiHDEOsl35ZVe8X2s+zZZNMDX2Zl66eMkyGVu+2peOLS9Ox+z6Ss7BR8Tdc18Ozx/R5+zv2IPN8vYoLAb8F2fYsTA8OCMgDeYMiTBxB07YeVDsvmB2xZZViJ8HuOFZ2dFMv9c87YMpSQO4POYlkqmMOEBzwONl/EvPh1Sv5V4Xo0YXerIKirJlV6YOir3QtZB0hr5l0lUNhzAbdlx80aKjkO8lxpoGwEFVvh0to48hyvAV8Xeo16uOWhxeZBlBKvQ+yMvkqnQOYhySucwBrkUh2bO5V42FVl9mZCFhRVzl87YPGECOKhxVNereQVHls+1d0LBk2pq+ONRx/YyR24O8J2MvGRwwOyKj1ZqxWnVWRyLFP7GMUs9TKOSV5SuRBzhQCR0Xew7BGOXRwxO97HnMG6txORfh/YAN9sOxJz7YpSj6vf48HZoN+hvNJ3DZSd3jZ0xxul7KnmO1J1Rvl2mjHn6rWOrHvZUMxxn26jkTNFN9/VyCnzZ7KhOOGByJveV8uOpR0xvEmnBo9i0OOtbPxvON9eOo1qIKm1E+OQN4XZQt7+OWR2nZeAeBOr17RvPWJ9Wn17evovAI1kt9jZVLW5vot9uvDxpo16JxplHV51vMSDo1RBUJO2x3piG7E4gHMvJOg7O1vaJw5vjF/7XJLLlO4p0kMITIvCnrrPy1jNZOsHNzsXt789CzYjZcp0DqesDqkUpzC9p4v7APNjdvLt8jvSp0Q5N5owjel99yJmqFMZmuCU+CC31aeiWZcSm8Fw8KpVwSkQh+I/+IszP/A4Ayykmd85enXCn1iofWZ43y71F3R8vm/WOZJ10QlvrFC2gWtV5oV9rvvmqbs0Z1bvvIPJHgdG35rd9LvO4nFQ9r3uoBd9QxnzOzvNmqvc0995gZeo70LzKTvwo/gQRV5t+LWoH0xLN9YwWIIkY98OoCZ0dHc97+ZSbEPBhd6w4J9+8kR+v3vt/GoB59/lVL/Agl597OFj98POQZhfdt97Yu+m87vZtgFkoHGLvYNAzvRd65ZA6uu1QpjzvgR9mFhd6LwfzI6M02qFMwzJ8PawuHhqd+4Gy2qFMOzO74QALrksDMOZWD/W1cBlBFSRRrBXMmWu297g13+pvvSRRQB59+iFvrD1PlCmPvyz1Af3d+mQ499IK7d7Xv0FHofS16DML96v4G52/vZzNM+0V38e/3PofuhzKkuD52ejINSuJ1wxFQymDY6I48gG8qSKCAJwfXEh2eaD7K1EPXEf+D+21Hd/owwm93tY5OCUqaBQk7wduvEbHuvhd9dg/VDfUnW11EfDp3veRwHvnDD1ZWxjh1fgl5FO9/hvtj7sVvj4o9fggx1gT7R1fgj3Vvj4YN4y77FwSmRvXMjP0FbIjYdRx3ECT8p1DAgJvtj49F6T+4NqT/DZ4NPENwijxv+T+EN9aj3DB94rawcjP0DN45c8hqeuiT7KstK2tE56sHZf3zhWTT7E9MggyfTT4V1L6hk9mcLFv6bCyhtj58f6bHUUFj9nVLT9OYqnqcfX1/TYsJ1c33sHsf+yFM9/T6sfF4mbFRoj1vL1GxOZkmPCRt7mfKz+ifhosfvburqfHj/Wf/BtyfU5oN3dTaN3/lGkMSWkfZ/dmHMNjv9vSnzEMUHCjgoIw+feRrDvPOXKUDz/00Tz+kMnz7+fTOW+flBlBfLmIhf9pjKNKCsTDvigwUY4Lfelcl8wJdmEussStQRAJLs1l8xfGYOWkSSG/e8KIfkymcFXhP2PQSL64lsciiwiFCRf5cupfJD+WkVvzbe7Fm/m5A2RZ1L+wfy0jCYJPYT40qAj7CZ1liNL+y680XbuW8wpf3+mzBBA8T9gBilf6hTwBa+iygYqRTBa+goOmL9XBm0jKvssTQQGWFlf37wlQZWHIGXQt/7iEqNfZkuxXIPPZfzl2s6twnIGdV9li0wCNwSL4MOULysFhr83Zb/bdffYlW8nWuAkH9/Rfohxtf5aBxfGSzgHUkpDf37zTxIr7b2ZL4NZbL59fKL59lpsYjfv3dqQTr9WLob61i6d+TfGb+/eFhFLwer9+7+b5sIAr4seQ7FS6JxEiFWsTSBtigLEdz1lMBQOMfQHrHRGChmQ3SzFSOz+Wk7h0ruQ0gYkXb+yO8dyua19QPE4PNBO2r8QW0b+7f2r4gk7r9royrO1fWUOWkzxCFdr4l0QjRzv0eJwXf+hqXfZt4Xf9CGWkhzHNWX/c08B77GOW79GoM0jz6HOqzklN9Pf68zgHlN8vflN7gHBN6XfJGDfuJSAOou+jjov3e7Qfb+/f975NfSWzvfR76zkTN9PfEcwff3zKXfK4ilelMz6oM0jbfNPYrVCCH7fgNmTk8N/7fY77M6p1Cw/oH+14A8WTE4PPQ/asVTEXb+Bvrr8YYAkiXfEN4sXylVY9G74xdf91ZFO74K2KcRTWIH8HfQUVrZa+jPfWsXMfFDVqrAsuN7HBncklLRddMtfdvf+WJQon4VlH+TtdYn7BfKeRk/phkk/wBRU/aslef9TZE/qn9+fUPSfZN8jhf8d90vS123uq9/XQtTCr9i9/LviK1GyOd/Afx5yMEekNzvx5zu8rboQfSlzvi/d+gfXmrviNgKkfV97QY2wybvS+kQld8XcBA98PvqC30erD/nYYMwckVd8HvOBjc/x4hvvooknvHemiFookaBtD6zOVn6AfKVwwRyd7IfpcvQYUgNy/Zi194T96nvlX6DV9WsrCtkLsYZ95OujX6We194DQIPOHMd95OuaKuHM1X9C/05z6/b96FMH8q6/X95Tv6lza/Oj9kQnn/tjGLJc/tX8hVA95gf303wenD+L4Ni179Vb4m/homVELyJq/q36pYMsky/eX6JJoryXvVcL3AlD64f/elhq6D8If0+nkwBj/crLc0M5z3/nMkokQW039LRHyw4G134s/aKzcsyD48/m36O/k0n/vtX6cQqX+Afh3+32Rm42/tn4Q4rD4B/4Anwsoj5G/nF3ZHgj6X0Cj5TMvD/2u5l2VEJV74foIuVEkj/vvxLOVEGYPPvG81NUKShO/HKz1z2k4+1GpoL1oogE/hd7qoNR3QYNj60YvIvQYz185/fDskxUOqJ/RYvQYP14C/9aHbMPmCR1ZP4XZ6DGSfnP4x1iv6CfoLjo1iv6ifrJD7Foojifhd6VY5x1V/YT9hqVorsYXT7nMN0rN/3BpN/lOrsYz760YHort/BT4w2iZrt/0hthq+bKjytT5t/8C0tMouqgYBv99/Vgql1cZg6fVv/4NNI9Gt4+T6f5ggV/kfr+OfP/NZw5jGfjknws4v994EJw0f7RMN/BqgVdRP6T/BqkOfhWDj/W4A2fyohV/nKTL/6v6L8iGKL/v2ENFfX9OfPv4LMEcgj/xqe41ra/byODx+fyRrHy3f/jyQL6U/ZOSeuYhkefJ8DP0Pf60/Ru/kEgL5FlY+Qn/A/7n/YNtsdI/8hfen77/E+En/cXp6DY5PHyoLJjik3/lDgzKMUs39+DYzJoGjn+ewRId2dqP9mkd3LVEp/4igtzLWZQsx3kGEu2ZfSTK/+goOZpeC//fwqSevcJrhp8KFBLRnHYwOEp3MsE8d/6usoiyZjyyCkKyi36fivABh35Ihsf+e7qSmMcaRLKlfvhY/QqYAbd+VVDAAWgBWjDIskgBt/5VsJdyR7qHfsjg2rIwAXGYBQqp4pT+fYQcsomEpP6MAagBtzowzEYwhLIAAagsTQSRCmKypAFcSvwBDgg1YOf+FAG3/oqYSQq/Mod+m5DCzoQBS+hQKvQBsszVwjCKIAFnwiuMbM6nMjwB6gHrBkHMv34e5P/+8bqWfmHAiIon/qD+MgG/chf+tX4E3u8yN/66CCIBPzIP/qD+FtALcgf+RgGaIEvKOfiY/oqGHgGCWL/+F3RzyoTCsjDkpFPK3AGPwtYBJzKtfnSosgGHMK9+xgEEAZoBj8JgcAYBuiBBAdoBJzKiQk2+F15eWsn+2prbcnYqLz54KlMQBf7zwEQqUxDp/v0ou7JlATn+W4Cmstty/P7dwnqKeQEl/h8gIbJW+I0cteT2sjTOGv4NAV6ygwY6/pH6fCqXntUBLQHQAaOApv6B8ImK5gaW/hMBy7JjAbb+08gpslMBrHoW/t6KrRBlPg7+AYoJjJ7+v2TaKgo4uioUYqLqewHFsnGYInp7AdsBcuizAXpGUf6mFONaTQHc/tYUqMp1AcUBA5irAXK6Qf6d6J4qVQHvAUbqTwHtmBqglQFQuvcBK/izAa2Q7QFwGM2K23J7qh3oZurbcvEqcZiJKnMGxwHggZcBmjq1NjkO2n4lqNByDDR5MEByU/5MXjiB8HLYgUsguIFSfsz0xIHPstiBmIEUgaSBUjTkge1yRIGrtNSBcd4+Ogi+2QjNqF3KOQivyGNop7AXpLuQRAJS0Li+nIH4vnGocdCoKEfkuYJS0Bi+OQg4sD2oEIawSPDA/YJlaPS+GUCGQCBwF4jBHHBO9NTfzLNoHL4qgVy+HNC2IALIHrC//CLQATDygYtYiFCmgUq+KoEoAh2oxdxigT1QifqmgVq+QoF4AlaBYE4BqBi8K3LWnJyBGr6LaGq++hQfyu6B8Yh1Rj5eZfJSvv3A7MyvPOGBYoGxLKFeVPIhgdleiWgssD6B/cANdEbgs2g5nImB7iBegSggm96jZr3eoHDWvmmBH94CgZm+ihReamWBsYEd3ON4OoHFgUL0OvqzaMa+p8A1vrNoplKJgRp02oGKhtt+nHQy+pmBll7mFNm+XTzegbWO11DZAsGB5hStgTGBvkinwLgUuYH2gTOBO0Dc+hOB25xs+qaBAYHjnP5+HagsYBvIAZYZgd2BAsh7gV88sU5j7DOcW4EGgc2B+nRrgUWBjo5LgZbQN4GUKA2B0YGnMGFwk4F1ArNofErmFGKCHaihZA5qvYHUvHs+22r/gQG8iuJF6mOB2oFwoFKBLYHvgb0M5YFPgRi8sEHVgRswltCQQYG+q4Fj4OyBz+qBOj4Czaj0sjOcEX4/gYZcd0hHgdDgH4FX6puBOEEEGK+B6EHqEHWBt4G8wP76TP53RmUAzb7dKpaoFH6agasgX76WqDhoiYGMtP++PEHYfooUSRDJgV9gR762FDOsHagnII5IT4bckB1QKfDzvvoUi75raLR+fEHC3i5o3fwsGooU6kEdqOXgS6JKQfu+i2h8fkfkFhCKvA1+gH7aQfoafNBbzMIaOeZ43uZB4kF2QQh+a2j2/pGBr75raO++YEjNRtxBDX6QfqIkXN60QQ5B1G42usB+RkEWQXxgZpx2gT++Zkg55tB+a2iwfjuITkHjMApB7b5pgck+UkG8QaIkRFA03qYUQkGzULh+cqgDvsRBHX4NLBlB6H5pge2Q8kGTMIpBFUEcfipBq7IdgQJ+ukFtHFzIMsAsfmtou75ZQfdeUUHhQUssvN5BQcVBNAh9UPbelu5yqLfku0IuYv8gjGS+uo66tjq7gAoUWxjVlNIYi0FD/okUVIGiJDNBp5jrQRpOeIEO3pao00EMNPNBB0Hb/uhGJn5wYEi+HIGv5KuCBL5Sga/kKr65vqrEOpAKvg9BjsRAfDK+pL4U3ESwzayUvm/eEzjCvsVIdL51KH9BjL729i6+G1QVOPG+4Ui9PHbY4ALkDMyy1hh8vjQgpb6MxDXMioGKvt3oX0ESvqqAcr5vQZqghb6vQfT8Y+DowRtUWL6zvk4ggdx42Gowmr44wUm+hijYwXncc1Szvkqw8Twk6tOcZr4swTmAlr40DNa+Ezj6RMG+YeKvgbzB/r6tnBqB1hgGvt6+nxgAGIzBEsHIvorEvhq0sgG+E9zFxvzB8XAMwZzBzNQpvgTBUb4AwR9BKME7yqD4F0G+vnHMD0ibSAGBmHxDgQe+Sr6YfN+BUNw0wcnwtL6SvmrBFFR4waK+G1R+EETB8mY+gRM4SNgqwQDkS1SbEum+L2R3PCPGgcEPENM8lNgqwYS+j0H1NGV0L0FuwRF+mQGs/i2+yqAcQdYY8Zg9oCXYmUFNUoScBL5FQRtU/iDRULnB2H5NUhO+OsFWnvnBM74SweOI7b5NUspBGCjZRnHEb0brvrY4m77WGGu+PCjfQmx+tcGGQWD0fH5XQX7gI74f6KB+TcHptvXB9v7/VLe+9S59wW2o6xwzSI+M176YeM8cy0hqSJ9B/R5fvr3BfkH/VHccRH5DwfHcJOqhQb3BgH7/VOB+U8GbwW2ocUH1wQlBe1SPvk4oqcG8welBTihZwf+MlRxFwcPBo4AFQZnBxcEA4IR+ucEkfvgEZH63wYpBvMHdQbYoDcHgGBNU7UH1wS1Bd1RNQaAhnUHAIXVBh8FvwTJIPH5lREfBECHDQUJ+pjo6fuq6HPQGfrC6NIFaQMcAVAoWOrVcxCEEIatBE9itvtoYpCFf2DghnBjGOsv+CzbUIaYYCdB4IVsAJCFGfj46DWBnQS+IR3g5Vlp8MpTuoBdSohTM/JZgzkEiIaXer/QilKh+FaSKmHZsYAyyIg/IV/DNiDD8TsIjckzSdHiQrO/gj7hVIJohpSDyEAnso1pM0lSI81A/cNQAeiFo8NqaiiFtRA/Iq0CA2DYhsiFM0q0M+nzWrGtgziEsjDD8Q6QMfvWwCyx7UKp4hcFJDnlQWnxjmDwouO7p4N3wNNhbIM4h6uLcoN3w2IRhIZR0wqzQDO1Q0YgA0EZg9VDyRs/8aSE0QA4h5iFOIVYhCiH5IRohILLaIcUhdiE8ksmQ5SEviCj8Azg6IRYhFSGQSK78+ewFIWHA+kBeISEowiGFKME4aPwBIdEhLFRF4Kq05WhqIG9qc0AuAAQArgC1AItAJiGCTHW0jEBsgMGAswC2gI66KCo8IdRsadgZ3Aoh1wLtkLhSJdhEhGIhQiGdIGnYYuBFITIh0dJ7IaKszSHqIY1SeEAFBnF8SiH7koXkW3TyEOUhl5JPIZMiWbTXIY8h6GYCIfUhqH7ZgMEAvyFGIdHSXoB+8PchtiFvIbQwCmy9IaikkKGnDskhAXwG+nCh8uKGIVn4hcHZgO+gzSGPmFtQGKFoqNIhuVDooV6AKKFxIaT20iDZgDtgySEfAqkh5KESsJkhISDZIYhA+fDSIWig/yFegIChpyEsoShM2YCEYGb8bbA4oV6AuNDM/CgWuFIs9LoAtKyOISChjaC8MMz81yFwoV9O4qH25kOQcqF00Dr8+Iz8oUJgfiGI/MrycqE9GKihwyFmUl6A/OAIoaq46qHTIGZgryHZgDhoZSFnIVvap17ogQ4A4yGTIfYAb9igobmA7dhzISyACyFrAMY0KyGUbGshbOIbIWOoE/DqZFhgbKDHIfshagghoTlWf5LKoBGhK/BPFCLsNyFMzBzq4mSwvOchtyH06qmhHyHfIajoaOoJof/oxFLvIXmhzaJcoWyh/ODBob3gBaFwoeyhFaHjjqyhLGrxoSWhhaFQoYLq4mQU5MihYMIH8BHupd7IoaSgVAiKZPpacKGYoY2hW6CmocOhSPC+mNkg5KF9oZYIOmTs8GShRKGdoSOhJJRwsMihtKGf8DpkekQGoQ2hb3COoPWhx4ACIbuhiaE5oVpEI6GxYpKh2a7FoXWhF6EraFeh6JgioVKhLOqKZNZ4lqHbFNII+R5LWLTShqEqoV2h6SE5VjqhfiEToYasAGFXoUWQCiqWoT+hy6GiaFOhhqFvoZCIm6HHbL9SLPTSoZGhlaH7oVq0raFoYRehPKHuCAhhB1DcofpEUGEylLSKdqFtrg6hEyEuAFMhAOiIQG6hMmTlVIGA+oCbmMshYNqrIVi+u/6/dBzq/YBVsMsBbTxa6qte3GGdEF6A0HCcYbAEDSEIMLxhImE/QLIhLPS7MIsIP4hV8iNyDLQHEm0IomHSYS/MxjCfKPJhtiFJMAScUiGrXlci0mG6YZJhgg4ZMAmgJQhaYYZhhhqC6v2Ak7C2MHLm9Or9gNvoywEvTIksz/Co0DSgzTAmBOjw/GFkdNPwXmHiiL64DFisMC5haOoR3r9UlDD2YXJhK4yroUS0IbDWYZoI2SH8dOM0+mGLUKZhS3B6Yf2ABmGKYRK8QfBuYfrUlmGjUI0+mWGpYRnClQiBoJph6/hfvu5AhYAusCaIpkIfIQgw/LzofhHezyG2oSrGRpbMGI6hlGHOoZY0G5LOwK+u8yFBgN6hzGF6asz+EEBjkvz0laDS0pMwjFDRiIyCunRgUog8sqiTYfWU1uAPjCWwJiGGUEDg62G/IJthWiy4EJGIBgJ7YQhS0m5qvEzSVvwnYYdhIXQ5NAthSOBLYTUhvswKUDNhR2GhLF6cXFJLYTkh3Fx+0BUg0FDOIQcSZSCP0G90TNIWWNNhZQSpLkxBYyEUYVRhtzgzIaUYIIiDYYxh5AAjYa0yTqbdAOshxvYa3FCgN0zFUhjhX5LMABGMw1SBCNmA56BY4BRg+foQUmyhrMjfYGTh3EYAoVThqXCE4dWh9OH44T3E9ODkoZjhEYxHVMNgNKE4EBGM0QAdoZHIBOGzYRihnVgQ4ELhOOErME3cfOEU4YiEi3ic4efgcKHGMPPgjICOZAuhooQDzCrhFAQy4ZpBASAUYAs8cKGCSITgKDDC4QKhzOEQINjhVqCjIY5AXWHQ4eHYrqEMgARcCOHsgEjhFoAsYbyMvYBF0rjhoryh8BYQEuGj8t7hDCgqtDmhJOHnSJqAI4gwIHThs9xh4fqiEtKU4VHhgyQqtEzhUeGB4WzhoKE4WJOIv9i1ID7SpuHJ4W3sfuH7BC9IYeHrSHeSQmGi4Rnh+YDF4UOhiSDdCGHh/FCK4RKM8GHIQqug3KHM4bfYoVIYUjnhHNyh8H7gwFICoQ3h8aFKSHBwGKHV4Vvw3eEhAIbSpeHyDj7hWeFfoSTKJYgD4VcgieHs4XjhyZ4RZBPhKGoGSKvhGqCwDBDh1uFQ4T1hVtj24RxA34B6gM7hSyGu4aNhzEGBFHAaSAjIPtPhieFVGPoaoeEp4edKt+EB4WJgTvy7bl3hTeGg/F/hVMT34QYCxRgtbP/hL+GyqHvOb6xdoUhIDeDgESosC+G+4a/hGOBN3pqAGGEWSpTwd+HXJF/cSowREK+BfoCcPN04u+GvADbhB+EtTKqAOEB+gFxAp+GLIT6hbuHXQh7h2QE6UPN+Ed5skPAsDBGivP2AFbTaPFqcvWz0CITIJbChXEmCq16ZOvcw/BEc3EwRs2EznEeInXRK8IxQSTBPqNa+7BHMEdPwo2YDgQoR4hFpQYwRvBFoMMoRQohlQrGWvpwoFudIjmEOzLA8cuBDsC2IRhGiWGmc02xEqLoRYMxyEQU8jmFo5DgwWKwCEVxhqKQbzC4RohHgNFHiihQcvhHepmgZMKCMnWoR3vjgclwiIGrcYhEGApGB0hJ5YbT8URHaEeZhwyC3vL6cxdxsEVIYRdBW4YQR++ET2KfAPNj8YcIsrIBDYUxhF+Eo4frmvEDRunKyHuKhvhcYEyCWgYNIDcrF8uc8TWg9Cn7ycWAZgb0M63pK8NFmAoGdERF4epxS0COywsScXFLQ4LJ+8q2QlzBn6JZeNRECXPa8QN5j7NMRfkLhqKeCYxHZCkNoRQpjEeRcQ2i1qrskf9z9EfURSQpdEcDszRHVEd4iMEG12g/OhRxhqFUR9/L9bqOofLK/8qqgo6h4Sg8RX+wigeV+57iRXlLQt4J+8pcRQgCJwbwhBoFuih4QmWz9UIOo9741ESCRfNAUsBHIGxHDEdEkO5zG+sqAZzLwkZOyEY5sqPikY77nuHVe24Fjsi8RQ95gkeas57gWzMoAI0F1DqaBizg+IG4UgdhAEYQhHMBGKCQUcWIG5PSRVBRagLSResD5MjUk1ZQwRJSRlCGQFN7YLJGYbItoizhfgCdBOl6mPr641RGS8IsR7mENEQ0iTRESkZAGbRFfPAP0vRFKkaRBKpGQBkG49tAJyGU4QxHagT+IoxE1EasRq173ut4kUpGWgXTI8xHmkT4EjmHLEUaRPl5Y0GFwNRGbEYIR2xFjEQteMpEHEWwMRxEGkdac57imUj5oiGA/ESiagZH3EQ/yRD4akTfO63CcvDqRDxEAsoGRhpEIWOOBxshTEacRlzCpQjgBaZE1UOYiaIpJkfqRN/4/Ed1e/GEtEcUYzyAhduuY+rbnXknBbEGymCmywJENPIj04JH1kZgQhuQg/LgGDEj5kZ9gqJEReH1Gq15dkd3yKUZsqMCRmJEVxH4chuS4kaWRrxHsEYmyhZGTeKSR4d4V4QgUgpGSqMKRrJG8kVg4i5GHADyRLmKbkZyR65GzNF0US5Fs5AIMW5HegGyRpcCHkaeRjJGnmLuR25G+oSyBCd5qdDi0cij+QUVI2XRNZNiCfEHJvs+R1YHitE6+WoyOzPoUJgqNiEwC/kEjqLqu8cz+QUVQBsF1iELckYGrslLInpi7gdNOtL4sDtaQr5FCoADBKlCWfGVIfGBp/GrI9MRZSDa6boSgMthAwUGnMDqIpFGfkUBRrPwnSHkWi4GZkPw2/YigUeOcdaBIwVWIHPwdgYIAv2EcUbFqXMCn8DIQoDI4UR2BDuZPSBXg5hSgnFhRaoikUjOcbFFSyOXMA8h1nLmwH0h+AhJRsfLBiI3MF6Rj/Lq+P5EMUdPUjhAaUeAsWUGiWPJRynzZgZbWGlGqUWmBBrzKxhWRZ14POlkBJsoJ0o6g5FF38LGgJMguUcVB3sIMSHRR5NLkUfmmUsityv5RsZaBUUfiMkECoGT8VMhKjl5B2niBIcGIU6BaQU+GAaZ0UUFRxUGpiKVB54ipUdmB85iBUYvI2YFcoMIhC0htLNmBWSyGvh0UQrppgXiYOsiMEKgaxBCfoSTI+6AESHVR676gqF4+s1BToCTIQ1iJQeCgN3pSyG8aDFHmIAx+PBh5QUzMhorOUSNR6VFQSD4gJ+wMUUzgcVE3SEE++UacUDrIqlha7P5BbtDqEAnSjVG4Ue+U68GmIK6EwchxgXtRYwEVUbEsFvaMyJpck0hLUdLy8VF5Uf5B1yDRIeNGjkEssF4svlGeUY1BiWG3UQacg0FaFK9wW1G5YeYUTODXYONRz1ELwKDMKVEXUChI/FGgzCTI58h0SDLAz/zzkTzkwYh2kFnq2oByFLoQChTJ6O3sCTJztCjR2xg0TujRwBSnsljRyt7nkTPEBNGnTETRAhSY0eNB1VDk0TGIlNH3UNTRtxj40QtB1UGikQjaE2Fv/gROkYFvkQDBVfpq7qYRLZD53FbsfEHAUVqkLJIMUX+RUEhc+tWBwHxldA5IiYFnMAbB1yR6yMrRCFFiSAfcytH80RpIObC+ahiMmFF60XvoO1EFgPhROMRnPMrR0FEC0RxQQtEUUWV0gtH1aitQtFHsxKbsO1GX/MDRPNHVgR7RItHbDEb2nHTmNvncmOFZQRZRq2TnftPSqGD/ERNhzATDjMVBblGXEJPcIFT+UQ6QPXiJ0bHRfEEhUZxIgbLBUYJIWdEIgYGBkVFZ0Q4q+hRvaNEh+VhyQXxBKdGBkBhIM5FZQWyQstHgoL1BYuBjUed64VGDUcIhJDDArFlBpVF9iHfYfT7tUWqA/Eg3TIdRmrTrvlARjT7WUfVRqqQDwSVRHVFX9u9y3VGq0EX4k9zn9ANRBVHuITHRz1HN0b3Rijpb0fXR1ciTgDCR91HAYfPRYT7XUcDRK8gz0etR51HUxLDgTVG7URnBOyAvrOtRqiFF0f3RhXL/vhhINAhXUd5Iy1FZ0UdMx9FxUbzK2YH70U3IFJig0b9RWdG10afAv1FgMXfR7tFA0S7Iu9HkUWDRAkhNyBn4UNGB0DDRCjwrPgjRIyFYIbOunL5cdGTRVhTO+MQxCmwM0dPINhTM0aXUEwC+2NQxHNH7kXz0VDFo0bQxSoBQxDwidu700UwxCPSkSAwx3DECFPQxrDGc0VCOPar60ONA+3LYWArhCByPYgsyUjFHBmm8C3JODDlwBBwu7MI4VUD/UnwcoezqMd8mWjE9YDoxB1iShrVygzKtdH3QAsy0EJuAyyAGAnpwsjE6MVriTh65SlLMm4D2MQhIruh/PLskCyjf8CPQ2jEW1vYImtDYzGSyJOph0ggc9jz2OFFqRFJ7HKExOjEpon8RTEEGtqJubEEEXHjMFzhmIHURlYD2OJf42dzwcLYg+3JdgLmQ2THyIFayiZDMYFq8E4CHorBEcow1UEkxZLKPTIdgj2j+sFsy8jGLvPg4n5GbgK9MV+wsQYL8sESgiO0cjgK5Me9Q8Dzf7IUgkjH52jlCKHCFMUY4dtjc8OMxTjFEsG90KHDlMWdgqtClMcVYgTFqiJN49THWkAnUMkiCcAZc8+EJ1M4E3+zs8N4kXQx0lK9oI2xyMXLop+zHgBYx/eobMZrQfmQmMe2Mk+zRBPoxzjHnyGpkrzEjMVVUr9B0gBJskzGlZNYx6Ga3MQrsa6iXRkXyZMz9YEcxIJEGMdRU3+yDwGMygxJlRruAoWSfCpCxaTGYYGsxfshLqGbRBjF6yGNQ0mazMXYoZ9BfMVayvhri3AUxRLGkwNocg9Y44NEx9zEzMftyZYL1cKSxRjjMsTvhaIFkYUxeV2jF1G4U97jDUOTRmHC8sQEUWjScnDwxwFibEPuKoYyUwG6GUrE40TUyAsqysSUqbDHQeK8IwrF+3vU2SrGx1nyx6rH3kZx8ptYmyrOwTqBksaMxIN5BLBCxprH1XrRwSjGquGewUzBPMVfQGEFF3G8xtGD91BQUPjFIsdqBuhBqMZYx6xISaNax2rLE0PixeV62Mc4x3WxPKKzcdjFreLSoxrEAsa3CBgJGsZGxm4A/IGewogKDcuExgV4gkh9yMohnsASgiLE1ARmBOLT7MeSxXrFZsSOynjEUqP9C6bEHCAmxw7Dq0eKM3Fg/KOax6vKvCI2xB14kPDox8bFy3vaxazEV0Pew4rQjMdSxLzLOsSMxmviFsbiYTzEpsflQxsQgsU2IWGDCbgaxBeojMl04wjhdgCbOwLKatKuxJRjrKAYM/TH1goq8KPxOMcUxR+APMuUxiZCVMb6yrnDJMbUxrzxPiFsxTTEqsv7QSQoPsXCy7lxlODexGLynSG8xppyDMQSoJKAmse0xnIJzMkSxCSyXMIexIzH0IJaBfAhyuD0ynrEvMrLsXTHosTaRaIjFsYCxg7IocfmxpEEIcdmx6zHUvNBxT/DbMaKwEbK5bHEkpzGvPFlMymw6MX/Ui7KybBXyZ2A7MebeAjBPMZgIHl6NMC6x1MCdsMWgEHHBsQSo/zEGMbqQNpGtsCCxhjGIVLOwXHEmsUOxG7G7sRJxY9TDsabCtzIIqHhxctpMsfAQtWBicf+xbLGqcZXwBDFzQZ7wcrHVlMkUEiDk0eUourGnmEPg+nHisXQU5nHKsQZxFnEasXc+ijLasdEUwjKbgM7e9nHcsXpx6dRucQbk1nFOcW56dXZPnCCURnh7lCQcZJQeeCFxVJRqeA0UGWBNFEMEF5TtFCdRwXG3lAAkuxRWbM+UFHD8lAX4oxRz9LUUanhTFD4GkpSVFIBU3nhBcf5sYFT5DKlx3JTQVDsU5VFWbAhUOQa1cWVxqFQF7ifwoFTNcWcUNxRqlvPujxQKLOJUpFQ6pLuhMlRxbNRUAPDnFKCUlpTAlK1x43EAwi1xj/DGlBKgzJQ6ZNV0WpSIlNcUmpQ4lOiUte6YlKqUxJQVdLDwBJSQOhCopJSL4VKUWKbg5CKUzni0lItkmXHY7AtxGXGJcVVxM3FDFKyUVXF9eMCUN3FalFzMCXETFJw6klRRBmFxMuzalLKUfAjylIdxCSDR0Ntx2JRyVBDx8myleBjSwPF9cHqUe4Cj3OpkOaCfcVt05R7LFBaUb3HisqRhapq0HpAwIvCrEEZ4sDLrEgFkxPGSeJaYP4aenn3g2JSB8L+gNPFXAYVmNQHyEm3hMiwNeFV+RlCennEYRyShcqSYxdCymBqmVPGGwpqA/iiVFMLxRRw4PGp4YjaXhJ6ejJBTeJzxzBzzAP+QJPEs8YrwcugWeMtcw8iagPLxungUjpPsUvHOeKTxVGCWngksFngryNn+np5m8Ulx9WJOIHLxbJBTeORCe5By8f+UR5QAoPcoMxQGkd2Me3hH4k4egvGStoTIc0gBZBisDwSB8ZlQ5PGSkPCUPfIE4OTxAQI3lOdgrhw5iPMETvFyoOTxfyA28VPcBe6OmpsEFvE77pBsKwRE+tniJ+4h8SF4+jzD0EyoiqZl8ZXQWJqTRHt4GdwUnv7xkUS58T0U2vC9xDeUNFxiZK3xCpQp8edkjfEx+NIurhw18Wss0fF+8Vx8DXhh8SNyOvEO8TeUDeFqZMrxnRTJcS3xGvFpcdF49vFvlIHi6vEtIN+UCxQlcf04cxTk0NEsnvG90NMM8xSH8Z6ehTGWLMVxDhx98ZhUG/FH8X5gtfGNxLLA3PGgSHds1Tah0BXx4/FLcGKhc/FdjNiU8XHClMsa3xTRcf9xLjCleCAJJ+7jiElEAAmx8Tnx3/GwyGnxyfFSiK3uFPGYVL+Y53G4jBzaLSJ9jG3hPPE12hFkIviagHgJE9pyjL/0beHW8WVxpAmgCagJPxTwGNQJ6fFVcabipQZJ8eNxX3HClDQJPJTvceCgmwTslFnxmmBI8SV4xfHrrA8ETJQUcLYWO3FWxB/xwxQKlFdx6dB78adxd3G6cIbxnDqCCWvxBfi8CUoJy/GvcUCUS/EUCejxQpRqCdjsX2CylMoJVXHg8YJw8gmA8Qnw9vht4RfxTURl7n9spp5M8VqUC3iOCbrScUSFKLPoEfFI8eYJKAlx8RJUMpRlFCwJFpRsCa5krjDixIhsKCKunloJIKxwkLoeStIEhODSzYi/8RUgsdpX8Dsx5/H4KOt4wfR7LK5kNAmgjKiGiAkpeM1GSWTcCZSsnAR8lPwJSUSLEmQgwfHCCaUsfTBi8ozxqpRcwAzE5/FooGysZ6K/8WLx0yzteNEJW/F1BDUJte5XNEME+UZCilbxKvGSeCUJ1fExCW4smAhlFCMJBfg8igF0LvFqeHaKdTFt4T0JIKxIKK8eavAdCe0s03BRdE4JqpTwwAHMdQlxRL7gS5jo5FAJ8JTrCddxZQlQrNMo42TBCVMJuJijQEjRTORnaD6UdCDVlKDmZlROIMZxxTyISHU0KrGlwF8JrezVMnQAIZRcti2Ul2ZYFH8J2LSeFJZxH0BBUAd4Bzi9/q6G8DId+AFwu0GjQc2oudijeEF6rzR9Nv8JDrpMIfU2+IlV7A0ycahlokqiiInysVCJMpxYiWXoOIm/CT7eYHi4iXUOqIleVACJ0uQkiY7orInMgaHuu64F6muUSAnVFPuUCXjhcQ40W5SKMFFxx5SjEhSWLRSOLpeUTFRJceqoACRXlL0EAxRCnptYZ5RPlH8AP+Jyidvx0xR/lDuUt/FrFO3ijRArFOVxhUZqiYwJLoywVOxUlAkjcUhUj5SXFNhU3FQ2ie1xS+K4VBNsBFQikgLMfXElqgNx0lSUVPsUOCRaicxUR3GMVHRUZgmsVG6JUFScVEviIFTTcVHovomCVNjs7vj8xGJULxQSVOKUiokcUJRU0PH67nZRasY7rshyookIqPMExvGATNWJKXgS8alYccyqlPTxkVjNiXTxavGnYscMiqaK8S9oAgSv8aZ2chpKkksxQvE8epdiRMxzFI2JSRKfIEbxQ4knWIM0QwS9iV2Jjdya8Z2JSRIRSKrxzxTTidPxxCY04NOJrvF68SqUJvHFEhuJR5RF4ODiilAL8bbxxlgLicqJpRSp8cUSM4l1BPAoHvFJEv3criwj8cuJ3GAB8WQx4fHFEglRofG/ifOJrMbQCWUwouFJEpE48fGOskeM9YlJcfeJP+KwSUeUHfEREkygu5RF3heJIElR8WG2xhL/jHFEVfHZWN2JX/HMxDDiAwyNRDeU9fGiVCOJP4nniSKS3HRt8Xt4yEldEvVC3fHwIM7xxRLfiU3xlogIRqRJtfGfiUkSn7ph+BPx5zz35nFxCokDEiuJ6ondFARJEkllcUQgz/GPiTuJ+XHloCAEB4nzFJaJb4lZUEVxhIy14EkS39FubNpJfYl0SQqUV/GxErzAGqZKSfFYPElrLE/xs1hdDFBkG0TcIPxJpRSCSfAJlEnweKqUMAnFEtLcwAliSUkSAEml8b5JxRJHElhJ3CCXlHmocAmzeAgJQUkMCTeU+7C2SYLoNonoCaZJkEmn8VVYjlh2SbzxcWQi+P2J9knTUVpI6UkySXFsdAniSUtANolUCSVJMUl27FTspWh45pVJgpQi1rVJPFQ48dJJKUkaCRBJkfGwOqoJ/4n1CStxmYZMSS0MUPGSCbpJ+wkrcWcxNRKaSfNxfUn7iaKUdKbiSUeI6gnC4ihJp4lalM1J64mTCfoJDUm3iUYJgQm54rRgqkklifFJkxyncdYJO+JGSWDxWmAI4u2Jp9quCZdJE2AeCWnENgl45h1JLgkGjEFJ/gnw8dkSCUkhCRjxr3DfmDdwEQlxKHsQTEnLSZEJQMkFSeOQ1SzYRjYefeZZCSCsKxzX4ncMMsY5CVZABUmlSUZ4BQk6no1JxQl4ECRJqEkkrBUJLUnPSWks/fx+ST1JaSxuoChJA0me+K0JFeJnSYssXQkaSXMU1WAUyUxJT4mvCfRgpknzSQmWt6AYSSDJ0wnSSXzJbwmfSVzJjwkrCY+Jqkl3CbdJR0mVFJcJrx595iNJtISjoMtYV0l6LIcJysl3SaV4sskIyZhJIXiSyfFJKUnLCVcSiElvLPMJK5g6cQs27TR49AKJEVH/NFNQIVRwie5xDt6nkASJPwlqVNTIpImciaeK+lTEsCyJNskVVFVQvsmzwOTRzsk8iUSJZdR7Zh7Jwcl2ybCJY2YhyXU0kIlcsU7JkSG0gHTY6my2ye7JaexRyRnJ8xT/NMnJwIn0ieTR3sk0hK/KDDRFydiJfsn+cRWJwJaQMF/gR1SKRqcwW1TK4GT8z+KXhqrQ31RU0Ezg9EbQKJ50KeDJ8DO6dorDVAXgfcnx3Kp85NRwILe8GcT25vNUdbTuEZ2GNwy9YIM+sqwsRg3JB1T+NI+My8lHiKvJ87IqSBWk88kF4OfoqsR/fGLE+8mQUfz0NAis8SngxJKEYfkO2+hhtJfJUej7hu5JVBDDcJxGd0lvdF18XKCHyazGj3Qa/J8CW4YmINXgIiLLyaPQ31SLyawSrcmDyePJr+AjyYLouOCBHoHGPkYjbHAQYHAy3APJrFjAEIhgQ+hoKd9U9bAwwPmGsCmL4AaysMiIKelkgAyCSMOGN9o94F2GsUZPye9gwyiAvHIhpPBTVNUC+kHA0vNUOTTe+Pgpe8nk5CSU7kYryTgpA8CqoN3oo8kHVO3gEdDgGKM+7chn9GLEu7xTyY7gUzIFNIwpKMqL4OYgiimi9LfJP+Ao/KpQfcTAIH9Imike5KgptCnb4IIpbNT89DdwL9Q05Lwp+CnmKT4EgAydyF/JLQxUECwpy8memK8egAyS4jfJFiGyqNQQ2xSVhkYpKSAWzJ2GNinFSKR0oUknhrkhxNQz9AsU9EZToO/JdfyvdhtQepyhKWLyJClzeKR0gSn8RgAp0SBfTH4pICmI4GhumPb89HkpMiDb7Jd2zfTXyDogsDABRkygpCkqUNoeFaTWoG/gdSkBzBQp6NQlKVUpEikRKcEgpSm2PKxGFikFKd7Em/S8Qjkgvin0Ro4p72CnsvqYFaSuKX9QySniLrR417iNIPEpdYZmSW/iUSkJKc1qD1SALvMpdPqO4JMpr8ncKT4pzyD0RpvJ31QDKRvJJqBnKaqAQby7yQlw7SlXCXPJiKjRINngw8RUaMopzyn1KQMOoOZLKT6qRyT5DrsgPyk9KS4p5CCzKecpnYbjKXpQTSDh4nPJlyn5Kb1yVKTYKcAYUKmuotMpIKk/4MbItsKoqXopUyCOaBdgMKmNyYcguKmyKQTQr1Qd2EAi/cm7KaFgwAZETHPJdylgoGfUmBgiKd9Ud3jHVDdSsKmGEJI6fimHKeUQ4HhyIb0IgyBrVC3iFaTnyVsgORBBHp4phsJiqQXi0ykhsO9ggqmPybEpCRCucLypaUZnoHcQFeE1YfRGS0C44CypjFgQKegpN1TKZPqpMNQhIDSpmSkVKWS8KrSpKa9wHdiRdDvJRSltyeDULLDeDoip/KDvVIypBClvVGye/EYFiGkp7QxI3Pz0jSk9oDr03FHEqcEpfRChqTopqyktoP6pyBhvKQ9Uoeg3jI8p81SgcGjcN1J0qbapXBK7yeypYKB2qXwppylOqcDUX8mHKSnwyanXVOsx18kXUkwpuODdeqSePQ7fKfygmOCU6LWkY9S2KR7+lamJKW/gpak+qSNs/KBFqfgp2qn8oHmp+Cl5KRTUMzq5KY6pjKDMwSspxSks1FESy8mDqSzUS2geqXaQpCmotpHIDSlPUFigjpwoUC2p60ikkDuc1SnhYC2g66m9KZspU1Tg3PESu8lPKa8Q86m0qVIpY0RDPEypfxDjqScpOanYoAm0G8kZqXfs/7xyKaFgL+zK9EopD1TEfl9I9alrKSBp9cnhqVSgTwkxKVupjKBrwDQpq6lpKfocgymeqR+pdRQTqcNULJDfHNbEDqmQKUagEvjGRrOpDJBXbFgpnqkMkP4sqGlIaaCgDJBWocIpOuoFkCmqXBB7qS/URqBYvmUp0akwkMC2t3ZVqe8pFGn1lBvJTykkadp896mqyARp6iJcKTmpRqA4acWpUmndAPOYj8ncKTU0C8JlqT6QvFz+nkBpD+DgkNfUy8nHqVxpWCBL/CxpPgTgkEMS4SlBqTRpQLib4WlGvqkWaZlAPRL/ydfI0mnNEiOpjqkykFCmv8iERmipa6DLnuCpaKkskDd6ntTZqQSpRqABacApk6kKkJActxLGqcAYIgL4XkFp4uKSAnFpeGnG4oaA757xaXbiqWl6qclp/uIPjOqQr8nUadqQnA5H6OUp0OCqkLGQ31yuqSoQusgg1NFphWncUfapJWmFaRbQVmkesL2pVWn84PpGDGk9oKqQHWlkacsoOp49aexIKykQqYVpvDg76GypwWm8zCSG+KnO4lWQBGD1ycRpdqzKvJVpzpDQJF/Ji6mraXVQfikFaUGQciBSIMOGcGlBkMdsT6kGVKxpQvQvTl8pb+KraV9OfClk8lppgTrilCcpQmnpOupSXCl0qerYQhzhKQWp2ZDZyKBpE2ni4muxjh6iaQmQapD4vKppy5Bd5qFG56mlaQnQnKAzhnpppZCjLDOGUGkekHssUOnmadmQbsLO3K1p6WTOkPYwF+iNaeGQ82nhKXkpPuoBcV5a/VQPiCQh4DYjVC8wdXSYfJNUOqmE/LY8V1ShYIUQpeInVCtUhhAraEKpx8EEqdcMS6BywZtUB1S6qUPoy1RSKU4EE+is6U6pDKkYwWiCCanCgkapDCE06Q0Q7qly6QDUTqnhYRfo3yBjyWfYcWDRwRrpfan66VDU8eCQKfk0cNSo1BjgiNQY1D2syWGcGNhG78mY1Hc82NRhniTUQzw0TEUQKKDGpkM8OunO4tigCGnw1Masj2DmBgzU3sG9hoygrNSYGIhSEEa70kycITYy1KoSoIn0qY02ienk0dig32Dp1D+GsdTDZBXUqenIie7UEXLx1Hnp5BTCWDdMetQIxGnpo5621Fnp0uSlqenUuVx0dPnpSoCl6ZHUi/AV6TKxQ2Ri1G3plPiCsZ3pHCEz8O3p5BQi8Jkg2dQRlAyJicmjQcPp1CA0OOwsSenIEYS61ekokJXpkzC21A3p1Inp6SnpE2Lj6Wqad2AAkcoY06D0RLwQEYgIXO7o74RH6UOQIcwMqBD4jpoaYcrMUNhTNriMgRFbCtfpXEhR/k3mqiGC+Ms20mFiDE8sn+mVpN/pEXgf6ZX0sqxP6R74Uxw36W/pmmAnLH/pmEgAGV+UCxwQGYphrQmi6sAZt+mA0SgZX+lP6aQwcRwsbMsBY/wv6TtggSGhXKdQf+lSYlOsUbQ7ITAZIBkVMLJBtKyoGVH+7uDK8lQZaBlH5GL0mRyYGRUwd+RxoNJcuBk2XMhKG6rvKMO+vpz3iHQZdPBUnA3UpWAC1PQZUwjUyOOqiBkZwsH0AiHSGZwZ2gI4Gf/pMhkG+qQZCMjcMIdS4BmnDkQZdslyGdr+aiAN1DN4UhkcGd3UPGDmGeoZKhnbzkOE8hktLOl0h+lqiJchD/D3+GoZOijOQb+O9IAIGa/pGTBwalrqyhlFCCn+f+mjENJhfqp6GWEZimGNCHj0QRlt6W1QoRmP6RnCMRkv6Z4ZxIhU8HoZaRkVLIwMehmwGf4ZrbSRGUkZpqyuwJ8cwhDtIXesnWwrtMJgJhknCHBhiRkLLP7ctpzsGTYZyKIsks0ZVqDOohXCAhl9cJ0ZOr6lGang7QGcbJchf+lZGY0ZPSEjGZwwZuzyCs0ZWrTLAUMZahnLIEQZgKiDITAZevBorLtu3Rl5GU8I0wAv6VsZPwiQYZX0axmXrF9MyDTk0IjUpWhoJF8IvhmLGVMZNL72GQNoBQa7IlcZZ+l+GU8IglSnGQ8ZVWEaYnchlfTnGYgIBPK5GdQZEdw0UPcZURlmIjmQQBkWGY8Oz/wjGQIw6dy60P0ZHRmsotOQRhkvKc8sqyqiGS4ZywEPGpCZYfBEGTiZehmzGdwwhBYA7L8Z56D/GSiZzRkraF8Z3sDWGXsZxCRmIM4Z9Jnv8Lo8uxlHGQvcIJk4HGcZ5Jlk6VXJu/5t1E3UR9TmtBlAv4iMWLvU0mQimREIG9T0MG2Qt1RENKPUHWIYNLYwuXxXXEqZq9Q9wsg02wzqtAvUz1zSmToZ2dAeIOKZD+gGTJNit9SvVPg0C3TwNC3Ui/DX1OHAZplerB0MOBxlQv74/Qh+tB/ULpkMGH5kmpnMxhMs4UjNSL/UwDQ2maA08TYQNEGZUDQS9h2sfplA+MhCe1xy9CVY8pmv1G6ZuDTz1Fg0PmRqmYvwBDTRNp/EbhmWmXqZFDRd/kQuIrhjZu5AdDReOk3p6UAeNEWZ2IG+8Es2pSqOyaNBw5i1mcWZNZkcnK9as0ELNiWZHDTFmS6gTDRtmeSJ0/4tmcfsXDR6OkOZQomB+nvpczo9Ml5wfkLuQOY4VrLcWjgwAXDVEZOZ4AhLmffya5nfTIdiohyV1C7QOBjiWhyy69qLmYM6wjjQikbg7kBJxEXy5zqeYTOMaIpXmcFhAdoV8qeZD+j8vIK+O5lAio1hpEhlOGxM0vIlmVq+O5nWXh+ZxOzrmVn4tTAG2F+ZgzqAWWq+ldS5XNzMRLRAWRk4PJyE/iDq63oEWh+ZUiDAWcIJ+BF48TvarIGanK4KwFlPatww+FkZOP3awhHEWfk4hoCJ+u5A9ToUWRsAVFl8TK+ZgUzZ+kS03aBA8qsKw8zu0N8R4oyRSjphYgEnmVnov/4mBChZvuayMG4C4FkXUC3M8zx+kWZAAZEsWeAcgowhkUS0MQGV0tRaR5mASOnKqlkfmRbMH3J9CmeZdKBkHIKMslnSNE4c/FkSWUnM5FmmWdiRRLRZuvk4HumCWY4B85lcOhxZhgFTmW/aE8zSMISyC5kfmepZztaG2kOYCMxmStBZLpHUWfJZXlksWYaR05nuWXu6/Fmu2h+ZNFkxWS6+vFmLyJ8K7NpaWSWR7NpJWTAc/FlU8B8s3VgHma20uVkOWZpxuqBoMBZZbozZQUeZNln8WV+88CyVCNuZ0jDZptI0W15ujLYKHwlP5FoS4gxB3poYfXh+FEKcI1bYIXHMizi0YMOZn2pNNn7uNeQdWTPp8pxGNJM4vVnjWUoYg1lzWZNcPVn2NH1ZHTZX4RUR3SroMF3K0FkzET2YGL7QWcaRdjC4vtBZRl7HWcuZr1KLfgdZ35mQAdmg3tbp2saY1cpPmRwBVyAagTuZEwo6mMQBd5nEInwBz1lqmLTU/FnZ2mqYWUA7mQiRaph/mRuZKSK5CMJZqni/3OJwMVlHWWbc0lluWbBZoohfWWHA2/KiiF0KgoyRXqKI7YEKWbSyoojMsoZZtwiiiFmBJNmCMEjZz3K6WQ/od3jiWbjZ1yTCWZhZ4NlM2cmczDzw2ZXUrTpqmFBZQLDZAmTZUxE+1nUCRNm/WQPAQtkfJPMRvNl6ARugEdb+CpAB01i3meWeiP7y2b9yL5ly2fa+ONmgAaOeDRE02S9Z1+AaWQrsgjDABp5ZBtnNMG/+Blk62ftZ9VkPmT2YJ1mq2YKYuvIXWbMeiP5AIipxXNmHwjtZktm0/oi6Olmi2cowg5G+WSVZuTBa2UkKntmXfrEMTzLBOvbZdOIK2U7ZWFntYZWRD5F76RbxBFm9arYwydkkWVsKPDww/rRZFiGyMOA063qUWXnZSX4AsZfsv/6+2HwB7FnxfqmoOAGkWVbM+dnAWReZnsz12QhZIlkZMPDI4llFkVQwEVkm2cEiYaDeJBbZ4o4GXhrZVdkffr5ZuloCInfeBNlnmWZE5tk92QIiJlmCjJ3Z6dm2Wa3Z4JkrfivZjdlr2QvZmto2Iij+MVl7Wa9Ik9lhWUIwCj4xWcFZDCiBWbbamP5SGALZEFkXSMYw1Nko2eAibD4xWcJKEjAX3i3Zm9miPLveWzKpWTbIF1lAWm/MRAQS2QVZG8w/SPlZOVlgOTN+rtlcQbvZ6Vm8wDr6TsgAOfni8CwV4VbZRSjRfh1Gg3Ls2m1Zw/6EyJ1ZjeS9CEtZmC7afrd0BDknwGQ5U1lrWeM2s+T4OVQ5FHQRiMQ5Wk6EMTCYQ1nTWfFiYiT0OduuidmmPuyKcPEhiJcoqoq3TABo/IFaiin6duziXrRBYjltzMJIToFCORNsmFCxKIWKGNrJ+paBzrAOBvdsFJg1UKCMrgbq2uAC/lD4TMls56TagTtwzQaaOSaBfGBLBiHsioFhUGd492xhMGywsSyzBgraToFOOW3MB6xugTnmjAkZiB1QGIz0hnbsHgzjMNI58JRJ7L3ewTkSOsmoonHhOVqUVYQJsW45ITlrhHE5lYBWOXQgxEiOOUyAZjmSCIsR2xLYzErskTm41GFQkHAJOZCUtEHxObA63rQ7PF45n3H3DL45+qAczLd8SQJUwDd6YfjIlOOBhxKx2pWh1Lx35H8GDbhsIl08fDkiCdVB2oHyOdtJ74HRORJUNTmHULqY7jm8eE6wDATCOXNxUjlBKvw5gNBJUN05Fcz1sBT69z66OZs5GYGPLHzwK0k2cNKwnEBeBrLoJTmkQXVG5IYSVDshZSiXOXnMSnyNge05j9ralBawKUAHORJUCRwvMjo52FadOSSRcTHGfqY+1WBaPAk594iXKEC54jmnKCX651DAudLaegiuOQa4MjlwuZbQmRCAoMraNKCLvIQsZjmR7MMpwsByjFpJtzw+sBqszjn9LIcyRLkzOfRgyLmcOTnsyPilOQKq9Tk3CGCwlnSvsDnsc6BfPPp0VzmhORi8QvTsMDnsGci1OUKe3xSvkLSyZcCscDE57ahUwMvgCzlLaBhB4LnkuWjGtznznOS5a9IKuZK5r9pXmK88CNH8OeHCNpHXUD05oPA+Xty5xcwODsMR7Ln3OekxJjngKJdx006vOcSS9Lnaufa80iRVceq5XLkIuQk5NFxjMYE6YoZnOVFSxzmcoDM55znGsD6gt8ytORa5omiunCG5Xzm4ggs5YkHaOYq5CTk6KBq5cbnlOdrIg7JNYOoGZzmpoIq8mrmDOec5uDmJFEW0qclTFF8+XBoM6H/YzDlzQSYeqcmn3lHAlbnxydQ5hBS1uYiJZbmnmAW5dbnzWcBYrbmMhM25ITSNubSEZblHZmNh5RG4WaREH6l8OIM5oLn/qYqICzlTMISQpw4zOai5nxDf6BC5SLknqVO5CjkOOT/g4YTWBpzsioEfqbVhbtoEuV7pVOHWSVcg4AL+6YY59myboiEp/+xYucOIoOCZ2FY5dfy7uZMSZXGKObMpxTDOObI5OJA1sSC5kjmTEI0w3jlEAtigdtD0uRO5SKlLueS5fLmMoDtgMzlm0TgkH6nj6G65CPp3yR+55LnIeZu5OKApOT/sx6DAeWTySuyxYte5gsDLnMa58HmoeQk5/fxv4GR5sDoXYLO5MHnxuTU5xj7DuX1UuJzzuYE5fxC4CIi5h7kU1Bx58JRfuTGpyrSceYZA/HnvMGi5zFk4DLe5tWHvYO0MuTnmOb8gHdhExG65yrluqeQgbrnyuW6pAzjUueZc8nmYYBaUDqiiqdEkzLlCuUbgOvSdWAo6RTizuWKhRrlA6NGc6emVIIK5/0LGeaLe/Dl6eehQ2KD6SK/a0rlmECx5qnl+HG55MLkxOUp5VKDueaw6FhAWeaRwEjoEeeygdnmyVNa52iDVXDy5JHmg+CZ5HLnmuUl5BnlWuUowoOA43Ha5kXlvVBp5T4gdyvJ5KnmwOu65nII69BGIpDqLOf+5PHnUeVFSDRBMmMG5QzlJeXE8BIQRuYR5wXmfcdkccXmG3jM5CbmzuTV5n3EpuRh5HXkZudmmG+miud65+oLmyfU2raCcMX25XVkVoHN5RbnCXl6U3uKFuSyw1OS3dOt5/blhhjJeW3ltubXpfTBVuRt5K3mgtPt5XbkLebN5x3k7ebIkOFmPkTfECKRAgrSeWGiWeJOABYLCSNRylng0rDgCdUipyMo4E1S3vExYT7mTcq2x+txA+TEgWTGEuoQqkoJZTDRQDTgkBPxYsFCpOHNqoTy/kLXgzHLk5h+ClxQY+TmQMZJI+aY4gSiLArD5iFCeeBSSTNqQ+Z54//zg+XKgk3KPWJ3iv3kh8j/81PkHEh14YAIbgs95mBBfeYD595AVWf95gBnn/GNsJIb0+AD5AvnTThvGdPmi+Uow4vmiqLsSCzj5oHz54SJrAujs6YYueJIQTFiC+XOOEvk3/HL03PCU+Z3ihShlRi54Qp4NgoJQ0PiY+YFYBvk4+UWgrwJv9FCxUPnW+aSCDTkg+QwEH4JilPyGRvlMvPeQ3rQyOCj5vOBe+fuxfPkGsJNYFGhEvJZ4WVjq+fHguvmg+cECbvkh8iL52vkPkKbggfnfeRH55CAk+dH5BYKW+XdEj3nmQqb5fznYWajhd4qaxl5w3Pkc+e6gvpSxkDf8+PmixiX55/zA+eRyikJ1+cn6tPmsSUT5yFCl4BzGePngiGGQuOgQsLdY1fn0+I35Cfn84B35Q/k4Alk5LfmSyBH5n+iM+avKG4IkuTI4ErzS4Dz5yLD8OBiCNvlWIvo4PJxQPDz5Ovq+lEZiYlgRBMpGvpQsMOP5Vp5FeGagYPk8+T4S/ji1+cP5v6CaOHf5Z/kj+TYQvpQWWJn5TIAbCSf5QlC2THr8DTg0TOQ8tkwjiqz53AkiYPeQ06DMcuv5jvkf6JAFnsZWAss0OYa46NbplALK+ST5Pta2WNSEX/lj+RH5L/k1xsyClWSx+Vr4T/kR+SfsIXL4BedYWfn/+YVykoKUBco4l/kx+ZZEqTjEBdxQhLpb+ck5ovlC0nQF+qAMBZ4ZUTgbxECChAVYLJyxAzRdTDsYNiAR9F007sz7NPiE7bmpTFIFUtgyBfFMyXDQ2IoFJDlG7tDoh6JiBcmsd7TyBaOQqgXluQs2ScasjNoFSgWiBb+Q+gUDuRtZTHloaA0xP3lSUORoEXhX+R95HrKbPE35mFAYQXyqpfnN+flQaJROBRD56yi6QDD5ufrIceoccmTV+aDQcRh++dj58HFOylj5JxTagZEhXfmwoJcwgR67EsT5NpGt8LZY5PlKOVMwbgXzmPlQdbT0+X+QGEGZBcz51HL0Preg14Jl+RCyngWi+bz5QbCwyKL5EAWicbUFw/nVhGNQhQWS+e0Fh1AKbIsCcvnrKOfASvlBLFBxNSwGWBr5UTny3teCefn9ObkIGAUAyMM5uJii+Wn5GQWLBQn5DFBzOVpgJAUlgks5lmDz+ZH5YLDd8PgwKAU9GRmBHRi03CQFAflBsF6MWlg6+QcFrgUJ+dVJZVCtBWf5HRkvfP85PDk9qi/wuDx2BbA5Sz6i+lX5oQU+sAF8XgU0+QUFA8BFBaCFZSi5fGkF7fmLvEk+SQVP7O6w+awGWAP51AjRsMP5FWRwheCFkvkP+bGwZlipOZox1AhF8ccFNFxgsFsYy/lH+RmBSbCekvDkUPCvPELkO/l0hRi8U8nDWJSFXzyLyQIF5/nPUIL6H/kz+Us5/wXP+biFt/DfBTgFmIVQhTyFvYKYBfSF74K5+cMFKwXDCKyF+yA5hgwINDyyWOMF7D7p7Bv5zQXsPuXyxwU0kCkFxEJ7BRIKOoX4hZ/50oVnwPr5MyxjMRGw3yk3BWsiJQWyINz5ggWRKGOCFAXzBcvel0g0Be6F7D7loR/5bzJIhQKFqfmsBQGFIoVe+QpSh1C+hZKFWJmKvByFsoWkBcrGnf5ztHMy0gUSBbs0zvgphfNGSYUo/CoFqYUhNNmFWgUWBbt5Kl4l3jmFiHz5hXoFEgWWBRW56YUFhbmFhDglhQoFlYVFhYO53Ao9qhwQ4fm/kL8FKiBveb2CzgU8EPnsbgV4mGYQ8Gx5BT4QUxR+BY64OHnwYkEFt9iIUBwQtSi9WOEFshBA7A2C0QUhKRcOcQXo+Ul5vBAyLFkFgIX9hRGsvYXBBeuFeK7g+ZOFoKnGbqOF2mBNZBCFQ4WkEKeFnYUs+TIg8mDs+fYFnRAcECn5u/lUECOFCfnahSwQLvhdBRBQz4VU+bZM3QXPKbYgUYXCmFOF3kJDBcaFEhDnBeAF0tCIVJwgWJRLBZpYWKA3hRwFlwUijHus0AUWhdBFo1Ab+esFQhAr+K759oXDhWmsvkq3BaKpYMio+SH5xnmOmoAF9EVTVATwP/nURa5544U8BdsF94UARWsFtPwkRbxFZ/n+hd2FV/nTBSogHYWfFBQwjHn3eSwQ9WBuBUcFJSmV+XYFyQX3MDogSkXU+fkFPynKVFeFJEW/SG35kQUvEMWMawJwqGGQ1BB9+fDkqIWkdKhAkvlihSkg1kX3+UMw1BDNwtf5hIU+KYC8PPk4aDRF1KDwBX1BLEVzvhv59QUoEEWQ21hMhf2FDpCKheksDEWWlJyFpIVeRRBIDAV8hfeFckUORdeFCHA2RdIxOiDv+ZBFo8hhRaf5OAV/+SUpB/k4BcAFMiAQrGAF6oU5IBMQ0AXahTkgE1B6hSVF2SnIBflF6YZORXMFpTj9hdpFGIXn4CwQb2huhfGFSUXqRV753EU9RdMUqfkpWCeFDsxehbqh24WUdAwFwkXRIMlFQkXBhYpFToUTknfJdYiiRdGFHEXRRXGF3EV5uRPYM/RXGOIFcjSHRaWFsgUoiZHsZ0XS5AP0V0VqBUxeQyBK6OYFdYW+AKdFtYWZhTJeN0WNhSdFn0VPRe9FZRGthU+cbGkCkNT5CkUeoAr873nJSmVgDqClIj8Fd4WhoDDFGkW1YGxplaAQxeeFBaBsabk0+kXbdMVIbGnk4WeF5OExoEj6q4XxBaD4DJCEYFpYa4XJoCz5+MUlsARpyQlnhdjF/qC5mGj5+OboxQgMEIWaRUzFefwAhe4FYJAaSnuFgwUPoChq7kXVBSyQTyB1BTr60MWrRX+FwpAIxaBFQEUeoLKwgEUGAnTFsvmOhVxQVJDUxb/56YYMkOyhtIUwBYhUFGkEBeRFpWm8+KtF/UUskCt8foXqqH9QbGmIhan50CgqkExpWOBe+QQJ0kUAkU5pIIWgxZ7FTfkqRXpQPsU8xZzFhaDohT8FQcXgkHquZ4VExRiQosh7hf9QqZC02AhFqIXgkCHFooXSMcnFloXryfagBlxzBYlFGJDEhdP5nkXoULCQFIW+RabFi+EBRZLFvUrlRZv5QsUrYExFpcWToJYwZ/mxRUXFRoSbRbnFHqBAlDiFQzABxc/5tkWdxf4sH/ntRY3FbEVyhTjFa0r1xfqFr6BVxSFFBsXjxeXF1UVIRfPFUuA+RVPFtcVRUEaFBUWFoKaFw8XBxRnFYoUskLN4fUXcRZOgoYXOhYWgtoVjRWVG0mloyFGF00XzxU0mfoU0Up3FZ8Vw8C1GL8XmxeGFA8WbRbwFrcWhCpyF/UX7RYtANLSktMdF1OQEXBmF50Xi2BuSt0W3GCAlkCWnebc42KActGAl0uQQJV9FUCUnNOglFYVyNPAlGCXcOQmGMkWF6ija7Uj1GuLajdqJyqvqtOyiIDXqsgqV2l0aQEok2gsqmkLk2h3qo+rqbKMaMtEc2pvaKypcJfZstbrFuu7sp8LRKpPqntqc2isasyqXbO26ekJR2jsa3gqyJbnK5CVu8vtKxxqJ2sO6rEqB2irapipcSgoljsp3GhPaiEjOqk8aG9qPGuXKi9reqviq9mxoqpxKh5zhNDyaQKpW2h/KVdJ22gtIJepvGk7aIyrGJTna6bpHFPpJNCXImv0KTCUwmhia+FQbCnXKn7qRbFolP7pnrGZsUSUqqhXaXtqM/gX5/0XqmgCRWpqH2g4O4HqdSkrshppqbHfaXMqmmgo6j2L4GqaygjqoenqKTDoYeutKX9oGeph6sjr4esQarDrEegdKLTlEOmwav9pkOmARwZpoOqIa1HoaOpwacZpOubGaqDoIcYmaP6q4OiBomipyGnklbSWKGsDKqjq5mpQ6eDqFmog6IPFSeqYcSqyZJR2a8nplJcjKmMq8Oip6aOxcOup6rXln2q2aIjqJoLp6Z7I1JT2a1yVYiG6aJnoXJeZ6CIELJdZ647mogTc+9qFMXsrKEInRevzoin71mXUOxSruOs56vyXk0cClZZkpGmCl5ZkbgHLKIKWiysIy8KV6sZZye+lo8OYgrUKyZC0IRFDgeOsCvWyACNni2ehLGEFh+KXhIjgC+ATGEFilxDiyWN8gICyGLDQIJSBMWGqw1CDJGQTyW3TMAlPMtED6bI+4mQIibk/QV9TUUNuAu6B+4CagJKUusExY6zD5VLAIbRBmkoYgTiA67Iy0smghaZVyxyDWoveItlgSpQksXKKirFpYyCxZLD8Im3jLggZpSrD6pQoIhqVT3DRIuyLM+FhC7RJMmAuxAJEYSA8UbJhlGKDmKqWc3NJQ+SDCoqUUC8iMrOAg1mTZvN6luAi+pdmu4SJryO6lSCCJbLqQekiDUWsgkew3Mk3I+WwpOP4h8Bj8YrykfVDbgJfJTGzagMd0bMjh4NIh97oNLlGlXKAw/ARwiFTwOE7AVPBxfNngZMG5IM+gwfS7MIh+5KkUIB0YeSBvyHisxBQp4K9e1ABMvj98wOhdfO9cHKAzSGJQ+4xrsW6gg8GlYLw4dmDRsCF0R1zmyLngrglLviSUcdhf4HG+7iGphGusomCeYE2MMfYmoMVQ+EhOIfJmYvCX0Pi8O8G8lLT8krTr6MZoJdhWlFm02yDp3svBuqDYIHtQhlytOGD0TJhrQE+lDiI4MEnktXRPpXUa4AjrqFTsRfwYnDXg4mFX/pBQAqDU2qBloiBXDGsSFTCASomgeZDimPJJl8HckONgpSCVILyZtBETmY0JRuQC6RCggCyzSE/gMwxbgKRMjMx/SAsY+TSOaNXMCAYUZfHwa6wEZUMQRGXyeZcRjMxYdKSgxGXg0CRgIcy5WLGQnwyIEUjMxOa8ZWkQkpDtiOQYmnip0KjQpUbwLIDhFGV2nkCgjMzJWXj0QyAn6Hkg9swhYJb0ymUkYA7COpAhfHJl/CI/zETCfGX+EKpYZcyuMGIGaRBpIBvMpOBQRcRlqGC0IL6c7PBIhnxl+oXAgO4olC4iiXeagrQStDpga1xitEK0DiAWIZ50YrTb6LmgBrC7DEbQVqnlIMdcOIyASCHSoQgKWHq0EQhE0kd04bQVtCDUPmU2tEG0t+CUyqK0hCw+ZHggn9ThtM60wrCqKY60QLnDjMKwj7g+tLG0mOQaIIGZ7rSHjGMgAqA7JD4MujzBtMc80mS+tHG0zLSJtOVlnrT8MGW0GbTsFsllCWW5tAZII2WFtFwaskhRZYNlvwbpZT1lAYzvBcKJlYl3mimq+ObSIfhMp6RrZbtUMuSq0PcwlZSnEKqhuIw+tDEwg1BF/EkgbrSihKKge1AfjLIERviVMTdle2W7DIogcdyqtBdljrRCYGA8nyETyJiKn2WbIBtliExL+H9lqKG6PK8ec6YRZFZ88XCXZe2UrEi7ZV3IQQpxGOM0cOXE1P22DS5XIQ60KWr9oIoh8XQY+B6laEzO4rwK6KDqIL0CCWU+1jTIj2VdyLVqFoUmfKX+orStWOXgqrQIoGQEZOU05aV66WTfaqMQjOX1oAVqROVZtJeM59q85TH8PciWWjSlkci4dGW0/4wEWOGl+OWnpM3axCm/4IhMKIrLKMyhabQ/CuDIESGi0JvUtuqAyGUY0bRXWjrlgz6NRGrl6tFgDN60GUSGgM3CYAwY5Uq0MjDy5XMmKOWS5dciyOWyBKLl9nzvZTw227yTgADlurSe5UXIzuVwhL7lvSHqkH3aR3nbSKblZzE4jA6WcXzW5Rq0pKCe/E9lSrTNiE6M9uX7ZaacbfEK5Tm0OurCjMcqs2WCykck7+CfqQMECdA1OLrlMDRBDGblQeVG5QUMP2VvZRXlPgzWoMKM1OgemZ34yyiElP7lPgwtDMfI7eXhtM58ntRW5c3lgTqr9P40EeU7QNf0huVRdPQ0lYyl5Z1lg+UP9JrlvWX0jH3lOeWqyJ34neWp0CTlk2Wt5S8hMuXAGMdEqjCK0PzlPgy8MGcQxIJl5U+oXaDS5X5gibQ/LFUhmUBltD1Qn2CBYBvlAwQbUMIJ3uUJZbNwYuXL5TgEQKTLKBrlV+Vv+KAI1Yj4oXrlqEQRkITwl8mkTLvlNT7KZOLlK+UBfLoo7+WnpAEZsOXP5Zv4HwKIICrlZbTyRoc8zKGF5egVB0ApoCAVZeV8qkQVKeCuMEFlOBVI5ds+fnRsZHMA+SCJCC1lbGTpdO3QXDoT5XM+alDY5WDliqEr6OHlPrR/fGzIaPzu5Zv4MBWK0DBxSgSiFcKg91Bk/OoEAhUoEvfJwXgiFW4hZvxM5UoVzSDskDoKorTxIecFkBU2tKQVlOiXyfWgS/iSCCd8rXyg5ZiKCHHhwFJ8weXFCjmyX0hSfKG0pW5ByEX8v4ySzs4VxBWdZXYVZiHz5W/4lhWX5arlbGR6RIFQaBVsZKjIWWQZ5QllSnyLsFIVtOXIFZdIwbSaFXEVT9DNSIYVeSKRdvniaPxs5d0EXhXNIXn8DQo5FTdlLEwEFR6oVhVN5W60Y2xzAGYVdeWBFVbiZhU15QQVYRWK0OYV1z6JhVrK/jQttFHoBIzYDKbM57T0MpgMUso68baZozRSyuMQ/1DgpQZQFYA1YTVgRfQttCIgnsnYjNIVLbRftGoMkpw2Mp2B4xW2gKMVNVxf2Nr4sxVjFTClqETdFXA6BIxt2KiJvRW6MhX0wYxrFQe0xgz8kQ2MNxWApaeKK7SxjBXhqIwvFUpqjxULFcQyyMwnFYgMwyDnFaYyFfQTFbwAuhHTFfFMAxWglYvkY5k7/j2qQHQ+QsvZGkjvoH75gTzuXMd0o2AvYtnZuUj+fhtK0QqNSDl+/Uq4lUYwRkLt2YiVQ4FoysSycJWMSogRaL6mFPCVnqDBvn2EtErMWOG+RJUD7jXgeMFuWJRKKJVHYeYIoELclWdh1d6SggiVL+jfESNYmzrUpBqBYpVz7BKVyJU3btuEKBjrEf1K8WooGAZez0rRnD3oopVe8iZcm3TqPjiVoBy/tFzSepXylcIoqVz9SgbBx4TSmkTKFJXtDNFcapWGvoQMawKaCJa+DpXXYh/Kv7QlXiNYZmq/tOT+I1hOnL+00rklZOvZy0g5sGAFwpXwOLqVvpVKXPA4JD64Snqc8DjYPtxKnFzxlR5KJSRswWfoaUqwBH4c4ZWhSk6VGsHVXIFKF9lEwSaVH4KFlZtRW+hFSrmVL2julbaVmZUclRbejpWaPowgUdGwlU3YuKBXSu3+IXSPIDY+tlCB/sthWvGEyhA4xbI96PFsiwJY0EWKPeiQHLJKJnruUS/ogv4wuFb8uChDdN9KZUJ4nMd0uIw+rDC4fDooGAdgo5XvgOOVpPLQyiAo7iErcmespVhc/iW+x3IVbDC4GOooGFfBMLhqKgFId5WvrgfBl5UFgt0gZ6wBSDsSk0rGbk4hB5U8yusxPH48JgOVHZWtpWQBUOK9lQFITN6lWIyIc3gKlQVsPZWwym1IubI9lX2gVZW3dG9Kz5VxUehVdmz3lRfBt3TIVTg8NMpwVUuiiLgLsigYUFWbleaybC4blWOVlOpYGFrqPZW6KvRVOFW0VQKVnNAkVZhV0SGh6HWKjFVWirwoJt73lTdKzFWqQsrxr8xAJdEY03RZBBiJ1NiSVfLKS/6X4bY6slW2UHP+lRhGvosYxsgM0cyRF1g49ErR9Uzr/v2ZTF5qVXJVOPRaVWp+lckfBaTcvySnetIhELASYkXwy5gkoYIiqTy68gRYfSD9LDAYL1lbdJ2YB/Rxfiwi47zSIcQonFBqmHGgBCABVVci/GJefpli0uVj1M+id8R5IU5Z7NmHLAnwAVUYnEnI6X56mG5V3hAoKDqYnbxBpTVg2VXAYpccTaVX3l6lAmJ1IdSEY2SUIhVgt+U9gNlgYdmnMmsgjfyZIJQitEhL5Q+QnrC72eE8FGWdrOpgz9l6rPqYZ/SKLMEikhGGtoNVx2x/opc80iGr+SAgYiJqhiShVbDncO/Z0nyNVd38mSCSPPOYx1By9Ng8ZVjSmBgp21WR3Cgo0iELVQQg79mlRgNVG/DvVktV/5ArVV+09aJUMMtV0iHDjKmYp1UbUY9VYZxQ2QdVEBUcKYNQkjxk/B+AgAwQsCdV4o4bVcKglVSpiQIieKF2KYZgw1X8YCWMdgINLFDZ/VWZVU9VaLaXrtYqj1WH7G1hZYkdqjAajlFs/oFoPyCPVXfweSJ2MD5KmVXZ4JhQgCI88dLlqIaZIh36kiCZVY1QIojJOBqZR1XitA7CMtZHiE/lzQjNiMaY+85BpUzVGcKjZCRYR1WwyCeiHe5OVMAQo0B01RMWkRyPVX+sxQF+4HLVNOQIKMCAOVXRsKDVzviuhLf+bsipmI9VDFAhoMBiGqCtIMM0v6JFfoVQj1Xawkgi1SI3VRa04KKHwtLQsuQS5Hb4Mv4RQAwUNORW1TWYzSDS5bogjiKHwn2gZ3g05HCKhFwj+nn0GuX8YIGYcjDe1RjVcJAy/u8UxVX+ILk0OpiDmDTVsQytOKKIIJnk1WLVzJhGpaNVFGiJ0GHZqqIa5expXtlHoIeiwBDZ1Q4Il+wJLHmlVKXP2UdURDmWKebUcyxGCGLgK1WCSPFsxCIMInmlpMDAgJQiS1ihVYAMghWPwro4KTB5pcPV4lUCNFYipxBd/EugIjCYdGA8T5iVKc2IjJEGVQ7eXdmkijUY6bClUFWUFDnT1Y9CDfxvOfPVBxWayARoOHSVVOf0Sekb1QuY7qHeSISY5NHbWQRwEjI+qqcQFHSAEPpQXfyTsImgIjHlEf6hcBqkIIMI1EDwRi/8mUDXZUa4PsJLOEg2deoTBFSc8wI8CPGIj1guKvMCN+wINaFSLCqRIc5+s5nqQUKCmQDPasGwsiGtGGTg2upcQZbKdbSI9rOZNEhZfGhOvmqykA0Zr4DwEF3q2NQENWQ1Rer8vO1BhDUMFHBZM5VLOLg1KEgSvOVhAIK9iFlI/DUENecqu6klmdw1xypgNSWZsCGQNVlZRLRQ3rCCylQ0NUqFojWgNWVq9zgnLACC7jHENZ2+rAz6SOTqObBqNbw1jkiulAvRQoJxqmZIBtg2rMd8ltFcNcaqjQiKbiI1sIJQ/sI1lkRqNYnQDmoPlA418bobyNY16DV4rho1/0IxYcJ86D48nAVBfHyF5ag1YCHHfG7RxDW5ILCCX36hbmY1CCDNlXAap96KEGBIrESAyhk1cv7zPNjKYgjGLEpZeZpKjIkIkVGoNSNsUQJlNeLsSlnIOoQ1oiDUbtk1Y0rTCOJB+TXNNbMFwhqmMCU19wJ9DFk1jdRjSpEhcSyoNVkgghovKo4+1FnWXACCVHAESF2mO6xTNWGsSllRULN8VTB0SKHW0vKQNa4+wzWoVWECH6gLNdVhiFX6NdM1ZUisRL9KLyqEfsM1fppYPlh0jkhNNVECVzWGutRZfDqQNYL+4VnYyh8CvWwVNejKH6gA0dRZg6q7NRp6IVlUav81sEhH0HQa3zUT0ZM8cUGQNZOVdcicWWzKYzWC6hM1kUH3ApwQEMhdpmacQoJooK01/TV3NSUY+uqPNaCcQoLxMALItzXqgsS1XMhtNedKZYCnla81AzVRMBS1OLXqgougqUGQtdR+xAIJ/tRZD5UQAiEZLFlMGk58z9FItSE1lVR64MM1SzU0Aj1CWzUflRACpcHDNQc1tnw8tdVhHT4xfBy1pLXHfNFBFzWAymWAe4YXNac1x4A0tfs1uhqAlAvRGrV0tSWCLLUT4Jq1Vs4VUSc1kMrCVNhAsrV0NaguwxnFNUvBf/xN4LC1W4BpChd87rUVNU6amtSdNTRA7UpC1BMiDLWqWAD89bArGbS1uLUdNNi1lTXqgqmYYT79BuG19+J5NYG1C0p2AlfRgLUBNb6Ya1HUWXy1KbUXpLM1GVEWfMa1izVetX/8vDiNNRZggSFGfCcgdeoIzKFBqC4htaK15bVOtQG1v1TFtRvw0wAetdlgFCIqAsTgVbVxtaf8eVCTSJS16oJFUNa1pKjTSsiUWjwVNX81zQhaQTaMATVdoO21XLUkDEGhNzXVtbYCC7UktRfQJ74qAuJefTXDjB415aX1tRPgurWT4Oa1IzW4tTcU2LXXteO1CmE7iDa1Fko7/Km1x7WJNfWIlChaBFK1GnztIaK1jbWv/PwarLWIAnL0VsjHNXi8ATVeoKm1UCDptSz8ibVTtcm1t7WDtWOyQoK7MJO1z0hCfK+QuEYmtVS15vxH0dRZbZFeSoUouXrDNSegk3x+pQG1FOTDMJPVJBGcMQo1nUx0dUFq5NFjGAWk0lUmuLNQrHXzFUcW1WCDruv+o0w8dWx0jCEKVQs2e87EMbQhRkzp2JQY/erMdaYgnHUMdTYUZkA/1VYMTlHZ0sV0gJT54jp0bBHCVE5ihnRhdD0o2nV7dIj0QpTP8Op1dsiy8DZ0JnUGVGi+BpF9dMMoUzwOdLZ1OuqedOyu8jzfQHaQb+LASOZ0+nWC6IbCoXQ/PFcFa9QPyLYWVeJXBb5YPCjoWlTp9D7aiGVR6z5XiPQ+kqJSUUV05Egv8LYgMFH+0MV029UqLHeI6XR8qODSVyI1dIl0eXQ2/LhIjXAtyS4+iDztdJqp2ghDSAnRNnV6qTveJqCDdLRMpGiB0BV1yLyTYkGwGGK1dUcg3AipdTbR+kjmEQZ1CdFiNkjc5XWvVPA49ygfiN9AXXXHlVGZeXRDdcAYvCiXdJZ1M3VEKMt11Ag1dbN1gUgdSCqFuqCLlc903AgdNJ7Rc3W9dcuqNB4eZd0qFg4iFJ10L2VtdfjRObD0CLd1PXSnSPzIj3WxCiTIguUnMBwoj3R2rpzl1wjhPMTUv3UwGNcI8WwawT4gn3U/MPSwgVGcyNcISsJ2yLhum2T5CFVR7iEE7LJISPU6dR4OoWSw9bhADUgODpzoDzBQ9TkhTODJYXlMKBZVlYDwuMQBKC48gPV49c2pEzDfdYJRdrLP8PYWQEio9Td1KCCIPHRRMDy2dECwGnWdxDQI4XQI1Ht0wiCd6CuopDCGdUdQbsj0CLz1ZnV07FgIkgJccIZ02aB5iALAYz4N0Q7IKvVdNQVGXshGPCaIfExemeHIUvUg9SLsVEgi9VLl1wjX8FF05sRshp10/DDICEWIVyLS9UxgunQfSOrl/3UdYO+RAMjy9Dc8Bgxpddz1zPWi8Fl1eg5u9V91ukCwVUtab3X0WoV0NvW2dE913XXeyFN1cfUb0XHIKvUs9dXRECJkSQ8wMBgd0fsgFPbgsDj1edGPduCwyPWcSDTAUdzF9Rj1z/Z5ePkIBfUdvkQkkPUJ8JxIO2DmEaxEP3wkSDh4VPXPEL51ykJNoAkozvWpdCuVLfUbAKvcnEgitOJI9PVDykgxciDWxN08NFyl9RNI5hFJ9YX1mPbdPB0I3XVtFH8ps/UldZwwycT09WH1f1EJ5C9E+fV89bykcaCw9SX1gMSxkNOoVul7dOKgcPnY9Sf1H7gGHln1ivWvRFhgTIg01PZ1b/Uj6dcI4pTOdU/1hhH69R51d/WriHlMJvWIlVf1VKiW9ReV78i8mCbAsSlvyJEcAMS7PMB89pVqtKDEuzwe9TbRT8h99X+IOp6PyFE1X3XLGlVIEZQYDbgm6WS8pIhMAfVR9fDELtDhdEv1gMTK7NQNa/Vbde/1Johp9Zt0VbBU9SQirx6DLg6QPPWedqPBf+gZyFSo4vUJ0Wfof+Xn9ZX1Eg1ldQwNa+hKKC8oSfVJMPJp4txSDXt0eUTnBej16g0vUczcq/WIPJhl+rHVydCYhUpH0SZ0vcygZdvsSOrRwG/ZWS56RT0ourkTzM0W6ew7dEDo+FHP5MpgPnSRdGgw8DIkInyoDg2wPNqgUOrWDR3KYPTE7Bl0i3Ylvi0xRWGZEMaKqCyBDVLqocCQPIIwPg1rUYkNyrIwzOXkHg0ZUL1RoGVl+PrqnVA5DbYNv+nudOkNFg1Kwp10OlD18kShS5jhdDENnX4mDbUNEQ3nPKENw77gqLkoHywNDVd05Xo4JMb2qZgpSC7AsdFDmPENyXX/+ObRUQ3FKLRgNg0tDUVhyXCxoNPwww15dPtgsQ2sMBhgDSHgqEN0LcydDesNAaYcTD+0FcRwwBF4chT7DV5Ahw0HFbwoHCG+sMoAeCGPpRjApw2fFaxkoDIrwDuo1w1I9M8NZw34JF7AVw3E0acwXsDlpZJgmlXTIAcNXw36fjcNqyi+9GQyeNHVXJ8NgpHwOBcNe0mbSgzR+1HQjRjRx4BAjeCNfRU/rFd2vw1RoP8N3w1PmIywfw0ZMqURpjqT3HPAwI2s0ZuRBI04jUSNEI2YjdYyYI1HDSEyVI0Ije8NLLDIjd8N9fzMjbiN9w0p5EiNtw3kjapVxw3b8OiNFxX4bGaCzsA01JS0IyBAwPbkZw1CjcKIKI34jQqNZw2bEHCNsiAsjQIUiobYjRqN7Zn1NhbR7I2ajSeRXI00jRiNAsp0vuj00DBSjUj0ko0qjYCNJw0CjTJVWo32jSKNgJWYjRyYBo2s0e6NJw2EjQnJP7RHXB6NqlX+jd6N1I2+jZCNXbABjTJVL+zajdyNuo1G7krcEY1f2PGNwY06jWvVo0ExiMrAyo000aKo0Y0mjaKNZo1TqAmNEwAFjcmNMY2pjXUOv7RqjQ6NiY17hDmNoY2YjZMShY3sMQ2NJY25ja6NZo1JaLWNjI1I9PCNpY3CdXqNWDKZjRSN/JHCjYiN46CNjVnkMmydjSfV4o0yjTCNVYg09PsgDNElJOONOhTLjS2NdY1mjRxeC42yjQIUW40w9C6NuNH1jX1wK421vmqNPo2jjaFVzo0ojZeNxo0bjSSNHY38jTCND40MjXKNw42XDU+N5aTvjZQxn40TVF2NZI0HjQqxJI26VS+NgjE9deuN340rwL+NpDGQTeqNvY3EjYQxoDIZjVBNWY2t6SV0IY3fjas8V42kMZhNI43QladBE2FSRvLRutEeDjmwTtHNZQ9hsSC/kRLRbKmA+TRRTr6qfLRNkYHgUZNhPKJQUSRRseSXvPBR5tGmfCJGOtFG0RWk+WwG0ShR2XSBHvZQ/kGa0SRN5TBW0SRRcD5kTQrRGcGyTf5RJgp8IacwjE3aUcDRDE3e0VRV2z6DQRv1c2GvUqOB1nlovnW0z/VpgaUNAk2vTI+BXkzBvoPwqg0h0Q5yTNKZ2l2IzMm98o5NkkJaUf9Chr6ETXpRek0eDpRNelECUbj1A/oIjupNQU1OTTFBA8DqUbZNQEHVQfy+Ph7k5bJRylGSTcwo7cDqUaJN9EE+0fpNN/mRSPxR5kZZTX3SHYG+TZNhlk07UaICXk1h2seILk1OvvFNx348dbywaTVeWjdSR8Bx0aAYCdGDPlfAXlFV0SpNOaDPUQFR+k228TnRY1F5dQ81phGF0YwpoJJ8QaXRB4gcuBH4ldHJUXIh29DkUZNRyYjUheI22VG0/P1NB8D5Uf+hciH+JovRPdH9TapYdeoD0Q1I/jTZLFlB91hUSKfexGHZgZdN+k2aELm1J033TVMYRFE9UcvRhuX4dYsSO01NTR1N601DTXOwe9FeLPdNzxCzUQ9R001sCGfRv9E3Ufbmvg3K0RtRK00vURPRR1EZwWdNtVEP0aOIbymnUR/Rm1Hg0sFmytHRUBpNAaDeYZGBYM39TYtNaVGgMbvJzU0fUevBq00QMc/8Kk2piEjNLALQzQDNKDHSULBZF1Kv4JgxqDEiTd5IAaY0ze+s03lxjRROF+Q0MXIUos3CMWcNgJRizYwxAhSSzVwxLNFljaeKZ8mzIFJ1JDG7jfB4F+TY0QzRMs1SzZrNoWx00UrNl+HwvkQl4AQ9SeV5AwLgBK6EQOCDqEQCcgRekCyYeAIOza0gvQzt5l7yUszp6Ru5hwRYUvuiioHgBOu8/gyHuesERVCf4Oict27wGCCQ4c0fVibI1uAVDF2WQTwUIH7NiFBP1LSQZ+jNrE/U+eKuzSu5jBZwio7Nqyr2tuasJnn2zc6ZI+Bb6FTBNATu+GXNqXnIdkXN+KQq1nnNrSD5wh3Kmc2A+bap6iiRlnXNDLmyVlXNiwyiApPOwZCe4L5BYuaY4Dlgw830tpHNpyCq8qoWugT5zS1Qvpa6kPnN5nlwhFjQbc1fuA0Kq835zVtIJqTx4DnSHAwZ5t0ge82zOa/Ok83gIE7y9rbOWPrg08g+Ar/UO7zcoElIFPrgBJpcqJAPzQPN4+iPENfNRlbbMDWQ582Q5ovNTc3HzYwW/81rILlBXZbfzbbNkU0LzRbN681CzcklLYWpJatWHdzdLDr0JZjWRMIwNQzaeP++5ASoMLSQ0SRCGRIEOC2BYAQYkkESBNKN8nnLqfS27iDILaBwhkHkBD1NRC2c0FI60o7bLEV5275xhMnwSCA0LYPRyYS/TeV5A8EkhLwtoHBWQa+EeLDEZTAYrHqU5oIt55zOQXcEoi3MZa61NgRuEm0Mv9FfvpTmawggLWDoWC3MBFIt2ayyViagXc3cUTFhai0wkbap4Tq4hAYh983SLZ0QZ6TULWHAzRzohGQt9YQvwQQta01n2HUUOi5lWF3N7BI7zegtxGVyuGdavty2LacCjrR32MYseuntQeQE4GScLdMgES3gWOQpZ9iSQiEtvXIGLfCgMG5F4LgtMS2YIcIFQJWZQNr0ZtwntAXi6DKywBsVhS33EAt5zdSxTGHiJS2xTPktqzh3eNr0VS0HFRUtDS2F4Ce0wBVFLWtZO+nWBSxKJqBAgo4sJerBUJKCzrAVSsxgU+CjkKKBrsoOIttYd+QTKvhIzmDjLSte+dbefhuQygL51tiVAIyGfEIm8Ep1RoCaDum3WFTQ3qoLFOdYOebWqpgJpIICEDPqYHiESqNmGxpTLbJYixIb6qMt7VgPLTMqgy2LAjctOkq9LeZCJrC/KpSccmTHYBV8fy29WDMtF+qacA3KzpB4rBXqq3T7LY4w4nwb0GQcU5DCSjKMu9AuSi8tFkqcWXbcEK1lXtaM9c4fgiCtuPHx2fZRgHp41WOimIBvQqpCSlEdmk/Q30pDnOhqlg69WNPSoMq5KODKjK1cyhwoWuzXaXStfj6raRR+OkoXSb5KqU1UGvytDYJj/Ph6KEIFghm0w5r10WsCTWCZmsKtTFiyrYIanBwdgpSt6oxm1G9KtK0A/ALM8FWsrT58FPgIkQqtLzlRAtgc9MqarTitEWQcraqtQXzgnNq1zpCOoCwqNq1XlaKtcK3HZJat8CBsylQcM2wQrWMc5q2eQYatUSbnShvQFdF2rZPBysqVwf6tKf7IrZP6Kq0E8my1ysoytSGtEioJoKp6ia2sesrK8z6GrepliAIFeDxVkq08KiTAOz6ZrdhAtXwFrVTKrQk/tTmtLK2eoAQ13wSEyk1gv0rJrRuViq3GrcSAL6zerYDKQa0xrUU4Ecg0dfC0E/iraS0qPTRjQMx1LqiLGMOtymo9NN2QzHVDlNDY15FRBOmMOxjjrTyNGLSjrVLYc61gpP2tU614TWKRxfkf6ADS17gwJrFgIVJuyNo89cbhXm0gVKpnrW9hL8zSpi6oll7rINEKvpTfEesgd0S0NSCwsp7ExIdiZkphYKCKnngGXusgdwK+lFlZh6BSSk+t/QqHoGiqvpTgHIeg2xFcBURQYxBgraetRxiiHCBto8aulIecm3D+cpIWbFwAbTDGMDX8cPsQ+jj4baGw1kW+YKr5OG2loPKqLnhP3i+t8Pmd8EDgN60wJljoBSwPrdKmu5IbnLRtgfklXusgVG10GBocP61kbXxt761XMpZ43G1qzHht3flxZTnIWvjMbYTgVBxobfRt27Cgbeht65KCWpo42G0IbaTsG8bEbXmwhlBfcjptcyAfyuRtmm36Wgj4Km1ybYpa/PjIbbjSB6288rJtdSC2bWZtkm15sGKaUPm32Dlg8K2UoJZ45P5tIEZtQm3zcHptLXIkBNFcMG1z8uxtUm2QbfZtAWWngg1N4w48QkuiGiC6Kr6Ufj6JbVaKQG3CmNxwgZot8jbWvGx4IHw6T60OIc1iM5VYDG2Vt7ALlVwFekQVbAVlq5UZoLBWVW3/MOcc+8batXlthLX2+eq1GiARigr5Qz6pbZTqLnjdbWB4N0pNbfVtXLpCBZ8lE+l1Do8EkkxtmXDYlkDdTLpq8E22OknG29isRDoF7JzfUlx1yHiTbe3Y60LIDH8Mc20bbWTkS237bXe0e22eTH2ZJs0AuV9qutJgSqfUZYaV9GaS1wIQUJ7WYXgR+f4AYFbM+JNYAXy+7JnmtbyUAl9tYFbj4QZYiQiFVhD851hHeBXc35ZLckxY2z5a5ddtrwKLqtGuHKgk4q3w45DfllKY8OR3qqsuv23Q7Uxq+RYfbWJYj23aPE7mZtF9BXU4f5ZspfeQb223thVmEfnXcH3WL1iqQvEh64auFv0K95CFHF2WcKbI7aLw0jHN1AAEOO3PIIm0O+as7eDtds7ucjjtReD15jTtegW13NZEICzBAv9t3QTCICTtvYLA7SDuvQifbTVwMRYi9VWCMO2JtNrtcmQo7dvWfFBGQoTtPy4TSEMt3O1GCg8a1kKHBfL5SlZS7bbtc9Zi7aOQA8RW7Utwwu247ZJWnO1aWIbtbapwLRtZrEEtpAMU7EgR+SSgwopUmFeVUwATSEVaxRa8bPeQYe0/LlfpUwWZQLQgpW6XJa9tNJCnpBOw6i2h7efAglYHUR/5OCAraI7WHviF7dHtpW50Oh/5Y2Ax7UQ6CflpIIEhFha+WKHt5e2O1q7AUYWnEBIt6FoLVaHtx2mjba0VRSoMKFcYjQi19EBQQ+2z8GX0i0SD7dDY+4gntJF0aZIRkOClo+3z7frkD3hL7VLYM+1NLWvto5Ab7cFMU+3r7frkNBGEJWklJrA+QghY34pNYPWC4PmJCudK/FGgQmftHEq37edYOLTUSjx1lErP7Q/tViLDWDJM7nyjZkyVM9wQKiftT3l8WAf8gB3mQqsUIIK/7UEF9CAl/IsSRkLPTqt8r+1jLZBswaqP7STiyB3aPIKKT96/kOhZFkpvEiiFl1lTuqCMkpX37bgdX5BRBcMgL+2hUvMtYMgz6nVGZkq/kOPZdiBBLPgdPtrETr30LyK/kPBZXkpPCuQdXB2lNaDpLsXf7fwdlMhIHSqiECrAKmlKB/HSqh6SX+2N0VcCwmSyHa6EcQISHWEFflnCHRGVwe0ZShtQawrYHYstPB0AAiQd3B3rWNQdBB1GHbXgrwIVFrZK8MBFSpodpDU4uPgd/FrufOoMG5zmBURB/B0WHFftRZE+iraVUh0H/NYdT+1iHcaqUbSWlUId9DXfUL5K7+0ErdjVO+mB7cH6jyzwVTuFgMpU0DtKiR2CGmxgGW3g+dfUY0rpHXHtdPDYytsSgNi/kDfMxqo7cKVtllCViIUCyR1XlVWINW05Kn6tnB0+rUwd3RDVHQs6ghrOsJB+llBs3vwdY6ioyg0dD0o8in8cllChrVistq3NImJVws3fJe0VWgUsDOuKesrSscutfVZTHdB0bfTsnMsdBxUXOOjARR1hjAd4Wx3rHQnQ6lXzHUbY+x3THUp1fIy69v/0ZmALrNCms3BWhIv01x29pGv0MMZX9B8wH3lU+Cf05qEpQBo4x/RhJGf0ZtH6OM8dxVXAonf0Dx2P9MxyNx31jLb5nPggDNP0kJ2mxtCdtozSKB14Fx1XIQ10BnjvHf/lMAxY1arGONXu4Ya2msaRUOr8RfAOcjGW6vyBPK5yvJD/4IdUbmBwnYK0LAgPRTS5/jgUnTWQBpHe5knGXpZ8ZYOg0Pg30DFyaRAk0EV43J05YD3mpcoC6CG2fGWtaFE4QuC5pk0g2eCSjkydQOBB5vptL5acIPlsVXJynRQgxuYpxmqdzCAk8BnGJJ01kDqdnXLuDE3cIowD4Mo4Rp2PEDdIZfZanSgQafpQ+T+WNp1WnSFu0VVgBmadd24PNAb6mjjWnWiIHcZenTsCqp1uneCsA8ZJnEG8USmjxk3mR1JAUHPyH5wFvKR0V3q6QKA2sZ0rxopQi3iejGFtZW7anXTsWXKTDRmddixEbUqdAGjvpgSdNZDencj5PEzunb+me0kejGSiIXJFnUDgoJ3Z+fmdNWKQFgLoqeYV1b1mtZ3FVeOlosYdnSEh6m2NnfZYvPLmnQcQtJTTbpHGh+a/4OKYdm2SNu/gFoUNnR+2ZRiLyPydCZ2BHpgmQ50w/GLwrp1I7uQVaCD8+PNgw2Wrqv6d9DbkFaJlNsYncuQV98xJeL6dp3pLna2d8kZC8g+Y5OB8quSdTp0bZaH6vsY9nWAMkdz8OB+dDE7TjtadWxgqZj+d/dYybUqdffhOOMnoRpC9yYMNfPnznesJG8Yv+PFkHaUL0c14a52iYGJWSJ1mrmhdksyXnVhWfZDO5jhdR52OLNnyp50J/HOWN52N8h2lCZwt8v+dWFbExA+dLnzhzvw4kWC8JrUYz5SBeNads1BATh+dnF0CctxdRizabWWdlnQSbZu2FOClRh14//gb8hTg87BJeLSdAxDuojhdns6iXUGdKDZf4AfAS52S7l/gBQjUXbmucZCN0SnGfF3aGeRyHF12aUxtn87sUNVoLXLWndhY7Z1KnRFlLE4gLspOp6BTtKAwJ21dVgWMFu4TbU5dBDI3CKtt2vS20B5dIk4+IC20Ll2ZTEQutqkAldNmpjo/FOvYvQi+XTFdEV3bZlFd3kDBXdsV8thBXTYyIV2Alpdt/9XHgJ06g0jPips4ZeoJ9gZKtJQ53hIobRqkIM5+5V3filI1lTxQcCVdqEk5PFOoqy1iNc7cut7ygpBw7vZGEK5CHwJN3vA47qqtXVvchG1a/JE4h7xmhuR1oDWVPCw2kIKT3pB01EqlXWSu0STzXUFEfrycQHb87hxvvNJ5B+o74EDBLJgggjtdQjw0zjVqf/xukTdEEzoQAt8RtijIqKiCfTKKxAUckBYkDAGVL1wzGjs1rXVtXaxaNPzE/gaV+10xLYK8w10U/Lw+v7QLygosoj7ulTPKbbjXahWNdvys1NM8S10cSij8J7pw3S+1mrSLXWtdjPwxlcn2N7oRBENqQN3Sqtjd+Bh8UO8CPVEV9qLwP13p3mSukEGyQgjd1vZ6COFKnxRyPv1ddN1vXYrc9aiQ/CDdXV0nrbi1O7S2PPyecQJv9II+EihOJezdF+j5XRlKEN3vXa5tj10M3Udd8N04ZWdcpqmy3eTdh1yWbYUCmJRvuqLdlsr43UPouJzkgtxRINx2UHzdxN3exHeEwaqdrMdqE3Vs3XLd4Bi9DAOcsW0xulHtoHrkVUG1AzEfOpWEXzVzfN7Ebt1vNe1ggLpe3XS1KCJrUQqV07X7fIR6EPTO3eiYOLqk8QE1Ed13LmlaYgJ+Pq9E+bUn6Bi6aeiWtTHdffZZbWARdgKtwU7dsHWXfBykA2jB3R00rCl+3dG1O5Vr3Pl10bVdPkHdybUDCIHdYd153X6tX0RAtayQ2rWvRF4ae/D13ada0gIVHY12lzWt3aHdmd1Cgvx8gry1WskCFdFnXS4qw93hrcjcULUP/K7d5LqIdZn+3XYvSq05GnooGGu19Ey+3d3dFPyFrR12czWsDJPmisT4pD+1W91jXSNaiTUZrTdESrUY0vrqvCj93UECKdyZ3ePdKd0Q/D2tEx0O3t0Y4zhq4mGMeRGrXDJ1C60v6N6CgD1r6Adtix1Mjf/dvxgEfJA9Cx1X2NA9P92idBA9CD3mVUft1nJ2krPZIPjl+UCkVtlPCZf0lNTAWWAgIfI40BdZ/0nkctg9KnG0Yi1y3ZBP3g6M6j7fHc8QC3KsRL/8tIQ/YeryMFhC8u4KzlwOjPqBisnvEUw9qTjwwK+ZtsyKgYrJI7JdNc2sislhkZxZMo7N9MJZhD279Lio/Fm4Pd8dRqpxJCYEFc3P9PA5wiX0PfA5ndr0+MQ9wFmUTS3ysj2GPbBt8/TbIGSyBkC4/uY9fD0gST4EislcWbvQz3rz9GvA9/JcYB3GBj0ZOKWgYqGv+eQ9VrL2Fr+m6D0V1tmuWXJTULiyMIQ+Aiw9okI6hF9OAnIesFMRcXJxPRNiM9bJrBv0ij1krf3eKj1hkQE9k3ImPV49y9Zc4KI9ZTjuPQI9yT3hOAJU2QKKyfJZcxwy+iw9dpE1PdD4w1BukZiAj5hgnfUgRfIlPcCdYaqtssgse/nWaGJcZK0j3t8drD0LMusw46ZNPQ0RET1pPROIaIqJPXc6S2XjmWg9eggkPddB8/QTLSvZg6C/IFYsttkGVJNyaK0r2aQ9np1QGZY96+od+SctQPJC5oU9GIw4Afw99zDEycJZPCXxnQuBK9mr2kc9VYT8WYYlWvg/LY/ZLWAyOPlGt9kRZAJyNrqX2bmu+jimEQM9y9DKXWWgYj3HZEC9AuLYOc+saT2nBo5Znz3L9Ms9hj2QbfitLz2ISlYs11kXcWC98L2uWUcS9j3n5T7Z1NqmOOC9+tmd2q6dvSAqWfXgzHL/Pf3ZhBWpON894TjfBCT5Ny0fPRlCTz0Q2cSAwRx/9IEQnwpjPUQ96L35PUOkIXIArWWyFT0MvXxQHLLSvXdEwy37cp09eD3rPTqEExCFPVi9MT1dQms9B1kaoVly/S3BPeK9CYWsTpgMR3hsOWx18thC9Oa9AV085CAME/jijBO0Vr1+FL3+VYWGBWa9zr0TtO699jQuvc2FhDF2veIMFr2LxF69HUraXlzRX2qmEbzslO0hxT4MOxJ/bZ7tBZajZkAih/lk7d0Eib0blQrtbQQdyThVGb0xvQ0ut1iq7eG0oOa0rHoF9oFF5YKw4Mq67W/4Eb0VvYs+MUR1RorsLu2XAoAEbGBTLPztl1DFClm9qkKm7R5Eab0a7RNIRO0KgeLs0u3fbbuQHzXDvf+kd+R9SpjtQlqjvem90NnmCu7gJBku7VLCZASyPb0dA6qEhUy4xJz87U29ShUmIEO9073FCvE9xb2QPkYKx70k4leqNQqDvbdYTO0NCsoq8FWD8CexqEThPL0dt20TvUYQS71vvd0Es73B+e7tYgqTva8sbO0oFrAthK3liQ5R1ZEtpE+GIuJR7cpgMb2RsfHtLe2FveZGxwUJ7T29nah7BdXtaH3YhBnt1kVlvSride157XB9Uszx7RRUps6OLDbtH/DCiuR9DAWYfUv4d+QkQmjw5JlKFVhgpO2ofXR94iXt7bfYVb1UtAwFuBQMSL2tfkz+NOC0C+2rOAnQwn0H7X2NRu5MuERIKuQ77U20ZVhbNOPt4KVifYp9In3BTCp90+0SfQttEXYaffvttfRCfbJ9Wn20jSklBPE2DO9QdgytoK/IXdrjvPWMrgxKBEkMngzKtKf4xTFxDDh2gQzPDJEMmrQ2Th595QyTMBiWLn0fMLPsDzYOffNQKQwWhE4Mj07+DPWgYAQLDL590X1LBD59fi3tSOwEiX3p6c2ggU6pfY0MsuXmfQ0M6o1NDM2JTowVVtekrrbdDEnNsKwDca62gwzCoMMMgU4PjFWwGi1LsIHKmwx9IHtmGaSxfcRlTcrxLu1951RYYDgEzX18Zcfl4WUGVOMMjwzf+McMornXDLGQMUSkSVcMXwzTfVOcmuCjfTG0g2ovDIiWNglBDGUMzmVTfSRhoH04nbQReJ2mlkERTdBN+BaEK1BMldqgEEZH5bZa4qUgnCnN1H0FgknkDMyFvWSV0mlxSWW96r1rAkaE/Dad+HRg8y3kMHzwrWVXmNeCvErtPK1lXvBiWCD9Rgq64F4G0mkraEJakTrNBtJpNlHLfZ6wN32MMAvl2jDBAo99DQooueZGN33IqHd9YEn4/RRUeQqIkksGraDNHAhIx0TXfV8QHygd5dvSZX3CMMnmPHUTfeEI7eYs/Y8QYX2laNT9SYIfqfnwdb08HDWQXP1U/bj9Qv3/KFD9gv0QLWLwp32pqJhR/gzs8P+kNMlnEFkG/E3utOD9Qc3XNWh9ybAfzasq5gomsDD6OvQ8hkflPj2WLdL9Av3TbE3QTs16/a7i5OBuzfCK931lfS6whP2MtGL92dXLfflstv1jASbaR331UODy9YLGtBQdiBBuWBnNDv3EZd60VeasXOTgcBjTbj99EX5iLTUgxIo55scyHdgpoBrQq+UM/R19u6b0/Xj9Hdi5bKm9RP3nVOrtSARk/YTgN1SE/VksgVDSSBnmSv1lICFk+AbhtNis81B1/fb9/vKf4FX9eIo+/dEtyCJlZTb9pf0PCjUKof25/bDI+f0u/RAtWjwL5R79ff34TCl9n86W/QwG3v2t/eogSqgVCvlG4PpkqeVsuww1/cKgMvHVZToslf20GhL9+njKLefIC/2o/WSp9/gz/Zj9Y/27pgH9Z/3YyGXmov3ynRe8A/2S/RQg5EKjzkJdfGX1YpkKCP0PDD1REv3CYCCQd9jzkmr9fwbXDPu5gP0G/Tsg+FE/fSPeX/3hwpv9BT1//csxif29/W/9fFg//Tx9T/1qpJNlo/3oA/7IOP1oA3xlxJGYip39HJ0TyOQ6+v0j4JJlERZUA2ZgiRAR0AJ9UETAjFO0bVArFS0irAPnbdp97a4sA4utgRCojI+4nANgPRm4zMnUtMdgAgPY6M6QlGDgpdSFeIxsA7cVHAM7QlEAMgOEjCGMygOifX0wYgP8A9utYb2mlsyM9Mq3veoE6zBDNWzt/9yb+DrUAwjJvVTtbQRSobVhr23RvWigKpSQrKYDT71M+KVW0AXTWKf4KkTFvXBqOYZM+NGw+b2W7cSKhekHvfO9eQreA1zt2nzPZXWaNb20IjgERvgFoeLtxzBM+LRI0y0Q/P+kFgPfSjm9jgO+MITKBb1ltr/pJb0V3EDleMKhA5tgMRZzHLlhegXJA2rMprLjvUxayxgdgtkDa6baKtUD/OoyzBrt5QOnpGJEBq0u7acGdVr+AHkDDnwE5gScaQo7vajtjgNMmCRVX7386oMDpO3WA7VqeQ2/vdYDQQpUfnMFCwMxCigh3lgzA6sDyLDeWM0DF0wcraPJDgqq3Ce9EGXtagq0JFW4/PM9/u241RB9uiT2FsICP3B4ueYDvy7tWFI1AwSWIFWCVqrCisgsnFGU7RdlHkSUbSjMAINKoZMDgkhV7W2wwQPlevMtaJTcGa8DuSiwg9ccBgSUbRR9oDBnWkJgmELN7bB9kwOSvCb5lH1FWgQcu/wANRItRIOchWx9kwPQoSh9XH2fA1dqPkVvaImaS6bz4Qh97UjtA++icwWofUEKFiFuhZyDdjrqYNAFMyD4On4Q5IM0xCmKYkRiXJTtUIPxWktA8wPUojEK5b6M7Snt5YowUIqFmH0I5XWmUYU9wgMD6d7QBS6yfloilJyFylRSOsmt5IOkfTqKmUB0sfHtYsTmg/m+ye28g3j4xGFn+ah9TAPm9BVywuTD7W8V1/CafRPtFfRug4Z97IwkiP6D4KWxYMLkzNEBg0AIqn1GfaaNGyYhg5GDtfR+g8vtPoOF+aZ92QjKjGRJIoyQ1EF85oySjB7kOUIajPKMZlzySWmDwoxqjNateLwADFqMpkhmjMeUHx0JnE782YOXHezgpox/ADWDGuUu0FaMgsrlgx8d7YP2jDBYW4zOjDBUOK3ujITgo+09fIowrwR+jCjUC7EHfV5a6LgacRmdxWVMyvODyp375bjUc4P6MRwQEEW8JRMxGZ31lOgEJMJi5dntJ+rLOacgl+aAERxc7JBH3IeGQcoI/JxsZUae6OXVWox2+Z7oO4MoEDcGHkQfRJ7NGAi8JY+DCrRFukdUI4PqNVl82cWBUCTRj+qXGJeDTKDgQ3EmwqB63E78UKH6nU/4haqhbIhDdpAPXQhDdZ0pQBSxSErNiMWdWEPRqoChz+BQ8P+Dr4PIlLVg64N4Q51Y2nHZLVrKauIhjN5xo0wesPRDzHVMQ9tt1MBpjFbJECC0DItEdENsQ4Hkx+zMQ+sdrENLGGGMC7SdoMx1o03OXWHJEnWzwDUYMnbgpXdo9bSCwGmMX0jt2PJDgboUgKMYK2b+6b3+XqHwgMCwYYDWgOURkYBGQ44DJRHGfcMYmkNrmnByQWAOunpDIYAGQ6dAUYDYAGiAZkMmQ6aAxkMoPRGCf9VeWt7Jt9j70AHm1+K9+tdlH2Cg5lZYLNUf0N8cX76XwvA172FINXqEH718UkxgbC2XwgXeXFJpio5Yo2QHfJ0EC9FWWCFkfSBuGtFDDkh0BB9g1Yg0IDPC2JVcUgc1FUOOcJIW9i1n4HjCU7AaOMZY+UMOIIOsl8J59EuSUmXETIMkFeCUIN1D4UOi0ChQnNLQUFMmIUN0+ax6Y8LAbXVDsiFTQ2PsVUN0NWNDSUNDAuVDEUPJkIVDgEy9Q/rgOUOzQ1lDnuA7QyNydcIxlR9gm5AnWHLiZBwnQ+Y1CUP1YJ7QYhq7Q0j+83BtFPdDDswHsM1DdVh58Bqw2oiBISZUW15oDNlwIH3RHTvasR2YRn3RVW08HsWy8JiMCGDDrR0Y4h7IAtRI4NvBeUPZruLsDYxFQUjDOGgow+DDlOozwg01TvBZHbDDy9ZFzeSwRYozwmBw81BLMa/Mg0PAUCxtxMPnHKlDQzV44GMcmUMQ+a8sSOAnwWPCRzUHYcWtPFgj+mGsSOBgVYNDKzUFQ+1V0vJjwps1SOBfladivMM0w8WI90OpIOKhPB75smPC2si4IFjDGOJV+tc1PYyNHS/CmsOowyTDGfqsw7TD6sPgiB81qMPmshzDuWENjLytCUNgojuS/NCNHBzDfMN42HRqFsMKw31wcUFjwjC1B2Fm3oLDgv5sw8i1OsO5baRJcLDMw1i1tJBGw6lY58I+rHrD2MO68pu+jMMQw3HDLC0Rw8zD0wBa7DHDxsP5MNOM8pR0wxUEwKxI4BU+ueLx/qjKBcMew3LiWupI4D7DCUOysPss/sMxYSZUErX8w+W1DcMitRLDUrUmVDK1d2GLQ+XDCiGKw7WyJlTdbWrDkcMDMSYtQ8ODQypl22EDwErD9sanlV3Do1o5wgk10FL4w8PDZrVuUsvDg0OcnetDU8P9w6C49rVzw2dD+tS9wwxB0UOmqN21B2ECw9dDPrVI4LR+G8NxoVbDC7I5wgxYa2GaRO9DVrVbwznDxsMxteHDMMMrw4vDuBD+IK/DBrLQw8E4NRw5wqZB4CBdDDTKYCMz0ZXDfYpgI/ZCXMMH3QvDxrVNw1csG8OVtU7w3MXxWEzy8MP96qFBj8PNtagj+5TTyMMZbMNII6fDtcPK1NSQzMNIdU7wH8PDw5e1blL0I4NDE7XvwzhoLCOHtf/D1sN1wtXhz8PtoA7DXZWaGaXDbLX6VCu15MPSUd9DKfBIngdhksMcI7O1+8M9Q4Xg3Blaw9PDZ7bILWPDCUO0I1rDicNwdWLS28MikhwMofoHYQlBLCOftRAjMzD7tXXCPhlrIHgjkiP7Nskh9HFlw1Eo6cOQIwIje4BGI/fDoCMcDLYh/8PsI5ojA7V0I0VBzMNodVvDidCTQ6ry2HUJw7HDeHX+UpkgO8NW6fYsC9hg2QlDVyJHwxUo1HUf3aNBBprBXaXJJiJTbYXJeSNnbcZUsaH5IwcVZCIdFdNGknUfYMIDsVQeNEJMYVSOnBUjZSMlIzYyC3kfQqpMKDJ3ecfty+KchZCwH+3p7H75Ue2olUwd4OBuhX0jpB2jIxe9be6kHbeh7wPTI15KsB2qg/AcGRQvfWj0AB09I7KFsMggHRsjToOyWSsjTJWz4OFKiyO/vTVR9oyIHXMj+iVKjKgddoX6JXsCNSxeheMjCyPMHTe92gIX6kQdgyOvI6Qd33UAAnedH+20cEiDW6iTfHQdG/kYmlcjzyP6xXfqdyMSZIqFjyPuHUteHZLHXb30hpUIoxxK6lRQPpTt2K1hHU9dlO2vEUmKRUpYNNF8zh1DBXfqdt2krfEd0wOBrlECVR1V7UzDTB0dzMntEQ5Uo8s+ce3bIdkdvXJxvYy03DWlHTCRbO0VHWCjlW0f+efAxe1NHfUdp9RJHXVtBYKso+dK7R08o9wMjbUDHa+9lKNgEQqjUYU5sGmtIx2R7bmu/H2ZI3UOsx3Q2IKReqNPNHeNhDGGozz5Kx2bHa7JsD2jGMcdZqO/GDajL1ASQ6sdDqOIPTsdzqNeQzCVppYcDBdDgUxWzVk0J2HS0KRuVVlcUpgsj/hBoyQE7eZ+o5PDkQaYioHwGG0TVP7NA3oC0B9gkUrCBNE9BYxUVt3CzlzpozUKefCRCsmjv/wH+M8R72EJo9FZXFLYilME2YJcUmNqFaNekAiozs1VfsKgiFL2zZH61pxoDKnZakTJWY9DslnDhC0RlCCmUmpEJKC40rRIRgpeqJrg/ng5ows6Y6O0BJgQQASVoz7WTZYVBHOjVukjo6WjBtg6+gf4oxG20hIKNQTlfjygccU9pAkBtqDxkbwE2lmPksvCcJa3XXFS+6OhoyZZPKCwOaGjvaNroz60RjChvrbS8zI3oyht86OZCl6j4HCbMqGjd97PMBLRZ/hpo5ICj834WIbwRwg3zZmjIJBfo9uk/63Pmj/mnKTfrU+jpG6Ho3ejH+bgY2TwcnAdpJW6FtLChvn5u30xHSStIJY+mPO+aAzrso/43UqAUgxqlGO4kWgM8DG0Y2O+f0MkLROE+OSc0kwUpG6jUMgt0IrcLbOEDUGc0mmKlGPaim1DgmO8BLZVebCWTUxE2dFO8Jfs+7Vb+NJjImPCLROEDYptQ9s1tGMOIU/8Ci3LXExjOIlCFtpjRc2s0mday1waY3A6Ei2kY9xj/tCLJL3o8MPtxrxjH7gsLbZjTETiY54gOOqwMve+nNJc6m5jBmMYXGqAakRVVAohHulyY+SkFcOBY7wgfmNqKp4g86qUYxmyPKA4GtFjWxzqoD/BYmMRYzygWJiUYz6ytqCdSpRjoJIXoArcy4Q0UOnDMlkRLRD0mqE8nHVB8mN86pljACEVY+5jgUBJYzVj3mNrZFgtsDKQfpQg86oug/s4p9jE0CM42TI2Msaj/nq9Y09g1IkcBMttdHzKzdiMp9gGQD1j3jLdY00tg2NTY6s4k2NjYxdtFlWupllMsYJtIGZq4TTCCm0gTpzmOWcQVj1z7JTsekIXrUdjcbJnUntjtJ6aQnOSzsYeOdMwvZCpOLisyf0EHNOcduzByqhtWXJ3Y8qw/133+KIl2WXjXUl452PMsJKQyjjYuUwwRFoI+JC5ZxCMbbzycKi0Spxtv2O76mxwH62+xnlJBG2AbWjj+lKObfT4eAgNyhog513qbFpah6DcvVRUF0PgnIs6v2OPyvNwjm2g4z6g7JCHYzAmzSIpsLtjRCamUGsKm2N6nFW4BqptIAwCVbhUisetOL0aYicKAm3l+TuF2wo8bcSyRjq3CgjjRjp5SqxtjONuqCCQMOOQ4wmq32N3RHTwIW2UbZLjQ2QcbVxgv60641JtoG0a4x5tWm0t8iwO/G0vYx352FGpXIeg1j2y48zjFPgrxipQ0uOW46/5YuOUsJzd88ZC45ptL12kow9G4FDWIQcwC7J2JWqyeW3msuE0GBotbY1t/x7TqlHjZuMONOnDjaC8iupsB6p4IHYqKeMjHHggGOoZ49ohB+x0ainjeorHcH2KCUz+sj1t8eOYemXjsqgoDPGyeCAeitXjySENbWq86mwxYwNtrHrN4wljt3WJms3jubKJbfmym2zaKpXjtONKGlYwRCDR42DK/2MFmirjfSV1ZU2yPxQIymnjweMybH8cYePkxEVkFcNJ40WK0Uy4ynHjXuPF/ixtSePh45xsdYoL4zUc0UxnslnjNMpn482K1W1NxEfjiSM+MMXjyza5bY3ju+O9mpXjHWOLxB4QU20TtNZx623k0RJU3+N3tL/jO22xjUxee3i9gFxDGAqBFH/jBxUAE3xDUBMQEyATh+2LPZ8Fj1gIrQlmlyhsTKIcmuIpglioLRGa4sKBeBOhvpriEoFYE8EC6FXC0E/8ikoQ9DY5h2ISSrAyJoEuqJKVpPL6OSuCzlwCWHrdLzIOcAriRt0dUDJZgr4cE3Q9PQh/7qfpY1BRQiRC1cJOgeIT5/zx8G6BlIhrWNzdfBO2XgySGnYtkfc4xBO5oxi86hMyE7oBonHaE8sSCKAJsdITBhNmPfaozxH/OKo+3BMLWME4loGa5hZkuhMFOfoTOAId+ls5ThNHWEOBEzzU1joTQCI7PMYTzhMHQPWCGzyKmIsCLWavPFYTR1itgXYT1korXQRjgMOF+SY+qBPI8d0smuJ6NQ31O54WSLRBWWBjvnJYIkExUFkT5qxyWKXBGzwBAukTlcHFEypjKliGQbsIAtQqWGwtPzDCY7UTTrKKMPBVblhVE5BUBRNz3vu1xfX3vo0T6bY/ME9KTQR43u0T3liDE85B/RNvSlQx3EE5WleVkxNlUP5aPKPXzQJBwxNZ7sZ8SVDLEypkJ8HF9R0dSoRsteCwsMoqZDfBXLzzvuZYD8FpE7ZkmH4E9dkTSWgFQZD1VxOcwRlRZxPmWJVB5RPHE0s8dUHVE89k7sZNqPTlHYJiNu1BPzAZY08T7xPrE6dkbZUbPJsgHRO90FktY22EFDR8JxapXQ7Am/7/FgldjIk/rKr1atgJjNnASJPLSsZxcJPyyodCtUwLrZbiNSNYOKxEBx0EkyE0eJM4kzoD8gY9qmMYXcpOcKl64PUobblKRAJAEbi+XEMho1UYS7BekOrhq3zMkzWQ9FhFgrxiGG2doD5cWBHW6vLwKaNVGFFwn+BCJk2CSAhZo/KTSfxwqHmjEXJdggusgr5cQ+KTVRgTIkEw5aO6k1q+XEPVo4aTlaOIhDOCdfzLoL2cmPynKK2jxkSreraTI+D4cDZ8lpMDoMaRFoJGkwrQHcoek2aT/V4Sk3qTLCB7I46TZmBCSlP6QFD3rRBq4nwUcTlgkZM2k5wISuMpbD18bxSvo6VKqy3Jk7yTuoQaApHsvpOIXBL82ZMZk63CKpPJQ6MwLpyTfIqTCZOFk+Z8p7LfrYPWjTnFGPpQz+DE3PyT8ZNjoJO4MnxCcUBwf6Myk2DB5uES0WMY9LK9kxT69JMXQ7xcjPoCkwxtqOjtkzmAKZMibs2TPJMYoHrgOnzjk5+glZPufHgII5NGbE5QCz0NSvcDqYPLNGRjlqAUY6wMO6W3MDRjx5N5wZ8wDGPnk0xjlqDD0XH8vEE6YBxjWvzW3MgtgCrcLZL8/GOvymwtgPzxw1+TATWVSAltb5OFArSe7mOnZfu1FoJnvjpgGUOsDCsc8LD4RmmtIFNFzRCEs8EwU8++OmCXSun8fq3oU661EFOtY7QwlMO6k5BTJKaNtYhTtJBP6iE1tJ54U8AeIHWk3bnj8FPkAvuTr5M5gPVDpfwPk7Ogzi2sUzeTXYZfvpxTSFN3SZ217KM1sGljx5McQRAgzWhxrWNsn5M4oOw1aIi/k9JTaa2y7AVsYlNZY4RToFPyhpDKpFM+cPJTi2U0Q7AugPCSTEnppfwZjMx1+lO8AKmMUD16OnGM6x28EAZTLHQ2QyTAAD2eQFZTVkw2U55M2+kzTHNM+gALTGuYKAAoAJYANgCrTK2AawAWAKB9IAAAAMIIKiAAyADoANtMNgAoAMFTEerY6K00BRGyQAUAcVPBU65DNwisAJlTjVxiQAAAXgcAZgDSDOsAM0HOQ3yAOgALTD/AEADBU6AABQCiAJwAYABOAMFTO0wgACyA6VPGGBnczlRWQCyA+VOFUwQcQIAKACyAZVMSZMshsADtAKIAjkBOACgAyQCVALJALgCPgPZD+UD9wmwAPhh4AIeAIgAoAGuYa5hNgGdAxwBlAG1TxAD/0NX8dVMNU01T5gAtU21T8VMdU0lTRxiMQL1TvgBGjYNTIgDDUyZWHgDjU5NT01OzU2AA81OrmEURtkDLU8B4a1OUgJtT21NgALtTtoD7U/oA/ECCQMQAUADBUyyAJ1ONUw4AykDOgGWJ4VOUAJSA0VOSAKAA7VMmQKk5CGymEULoqVO40+uAmVNEOS5D0dQ9UwQABVPmAMVTRxhDU6ZDTFyVU4kANVMgAIjTZ1M/ABdTIgAk0+Tob13QbFIgVNM000qAj1NC6GVTbkPbAO9TrwBTUzNTAkDfUwtTf1NLU7dCq1PrU2wAINM7U+YAe1NisWwANgCHUzB87NPNU8pAl1MJU1BOLeJEbK9SgtN9UyLTDNMeQ65DTFxvUxNTUtOfU7LTP1OUESAwANPK08DTW1Pq0z8AmtPinFDTIgACQKIAQkBw03NMIgDs08jTVfBo02FTcdlY07FTV1N40y3siIlmKp6hYABpU/HTpNOUiGTAOVONtPdTPwB00756jgCM02UAzNPVUypAbNP1U41TBtOtU9zT6dO807acVezJ0x4A1NOW0wg4T1NsAGLTdtMS0w7TDgDS019TLtMMYWfh4UDu01vAQNMbU17TYNMa0xDTWtMgADrTRABHU3VK+tPnU4bTNdPG0yw+dTSN09sAzdMPU63TotNGQ7bTVwBjU93TsoC9087T8tOI4YrTYDAe02PToNPg0yKAkNPQ00HTsNPw02HTFdNOABHTqNOqxuFTo22x0zgAONO10xccvZkp02nTGVNdNVnTQibp6LnTCED4Mittz1NF0xVT3NMs02XTi9Oc08vT2tP/074UrZkW05PTJthcYNbTFwAU053TSICS0z3TTtNzU2fTg9MHCJfTI9Mq0yAAatMT0z7TU9PecbPT89PXssgz64Bc02gzCVMzlIAzTdNC0+uA6zCsALgzsDM20+LTRDNH09CApDNy079T59PbSlQzLMCj06rT49O304IznJz+02wAgdPB08/TbADh07KAKNMJgFHTZslsAD/T/QA801xcfVyHQsTTtdNk0xP42dMQM1vTedNIk/TTwjP4M8XTCDOl03tM5dOnU1XTRtPGGIHYgfh2M3wzvwBW084z6IAH08Qzx9OSM/3ThREyM4gUcjMLgAoztDNKM5PTd9PT08wzetOv094zK9NaQMAq5jMBMy3TQsBt04XTNtNhM+IzrICRM+QziyFD00rT1DOe0zfTyTMqM37TD9OaM6HT2jOv0+/T+jOf0wAAqjt9xjN/08bTCYwcGKigQDM802iATdhZ02MzWDOLxOWkGlUhMzwA5oAl06zTbDNmABwzM9P/00QU/1AIfJMzL4CcOTjAeDPogKIzh9MfUzLTZDPSMxQz0tAiAFfTijN1MwwzKTNMM7rTx1MZM0vT1dOcMyjAeZFiGOJDvDOW04w5uzOzMzgA+9OjU+EzEjPHM1IzrtPCgFEclzOJM9cz/DOMM/NMCYBLMyszpjNIfJR88G1bM2YAE64YLkUz+DP/MxaAhzOO08CzUTOLUzsWFzM1M9fT3tPQs7czsLP9APCzqDOrMwlT6zPEfN0AqLMwWGTAdIB7M7yABzOAs2Uz+LMVM3ts4LMks1czZLNoszCzzoDUs88ztLOvMxBl393sQ58zD1PfM6yzvzMEMyUzRzN90zyzYLNxM42ACTN0M8oz5RGUs7VTjzMoM2KziLNvM6YYQzMys8LTcrNnkQqz2LP208qzp9OnM5UzBNDEs/IzNDNas/UzOrMis/qz7DM0s0azkrMcGI8gTLM7M/Kz7dN70xyzpTMn0yczoLPd7HyzzrO1M4KzvtO6s54zldNPMz4z7uRzFX6zdHyQM0EzFrOMkR3TSrN4syqz9rO8s+qzd4Cas0kzNzMNMwmzorMps8HevrPF5NKzm9OBM8yzKjM5syGzhDO4syQz3LOFs2qzTrPxMy6zZbPksxWzHrNeM8mzWTOpsxszdbPUGJmzTbM/M8GzIjNts5yz4bMgswPTDrPnMytT/LOQs3GzwrNws56zyzPes2szxrN6DgGz2bNss38zobO2sxGzy7NFsz2zGrN9s1CzQrMUs0OzSbMGs9WzpcAHsyjRR7MHeEGzmLP7M/OzYbPlM12zUbPFs9sApbN3s/Gzj7Mc016zhrP7s7WzU9QfsyyzlrOzs1izZ7P5s3azkbPlEdGzvbOxs/QzA7Pus9uzw7PPs6OzNbNpswdGSMBTs4GzCHPfs+yzv7Pns0uz0TNnMxhzN7NYc9qzkNN4c0+zkHMvsxQU47N+TXBzzbMns4qzALN/s52zaHNEs2uzMbOks9hz97ODs6xzEHO7s1BzdLNvsxGwPHMzs5Rzp7PUcyhzF7N0cyuzDHMls7ezm7MPs9JzmTMvM2OzGHw6QEpzX7O5swJzNHMEswrTInOA07pzEnNgcwZzI7NGc0RzXHNkeGZzFHMWczizC7P/s8JzjrOic5hz4nPMc6ozTnMEcy5zr7Mwc586HnMts3OzebMdswWzfnOrs3ZzTHNusyxzVLM7swizazMUfMQui0ios+iz9Apeczaz6nO0c4Sz/nPJc0FzqXMhc+lz+HPsc4RzpcBTHVQKuXNms9CzekAYs4VzXdNWc6qzgHPXszpzKXPls7hz1XNsc7JzHHO+sBh8WgTHeJmz+XPHeO1zYjOdcwBz6HNAc0iAIHN6c1Jzg3Myc5lzdLMcdTlzU5STcz2ubXOts3FzETNCc5ez3bMBc4xzFXP9c2lzerM1c8NzdXOcc8R8pnPNc1mzn7OecwdzlnPFc9ZzMTNJcxCzrrOXc1Vz13NDcxtzKMCX+NoYTXMNs4VTU3Pp6DNz7bNHcwlzJ3Pdc2dzvXMXczhzV3OJs+tze7N0s6dtjXM7c/YzLXMDUwVzb3Pec4JzcPOac1eziPPAc/ZzwXN+06FztXPhc58I4zjjc3kzk9OtcwTzsXPvc/FzqHPw8wtzPXMU831zKPP/c2jzhnPis4iTCiScGGDzSIC480KzLPPTc4TzRXMc8xpzpXPfc+uzv3P889Tza3NC84izkaCg8zjzgTOQ83xz1rMdcx9zXXPc8+TzS3OU85VzavMA8+jzcnMowEb42vMTc5LzevNWs8hz8vMlczZzZXM/c/2zknMDc1bzGvNrMzOt23MO87rze3Os80hzanOu859z9HOLc7AAy3MOc1uz6vPOc8Lz6UCNI4HzTPMMM9LzUPOy84bzEfPG87ZznvOgc/HzvvOJ86YzLTAM8wb2eXMh8zLzbPNE83NziXPac7zzyPPe86jzVbN3c6F+9vNp83jzSyGh8z+zh3NAsyTzivP182bzfPNN8wLzLfN08/Sz0hhcwNFz+vMu87DznPOk86dz5XMCs3Hz+nMJ82FzSfNuQJaY7fMV8xnzM/Ph83PzCvPu80rzYnPL81TzlbMZcxjzWkBrjdjzQfMQ85XzmfPV83LzB/Nu819zg/Mx8+bzf3OW84LzxfP/09zIZfPi87tzu/PO8/vzffPz8wPz0fOx82fz4HN+88bTjprb809zTvOIcz3z7PPP85HzWnMQCx/zqvPn8zdzQPNS6CA9jPM78/jzVfNh873zXLP980fzb/OQCxbz2AuA85fzCdOi8wQLCAv383vzpAuLs2gLZPNL8xuzK/Orc0Xz6/Ml89lzN/Md81LzRAsP8yQLKAugC4fzr/MYC8PzjnNr87TzG/Nb1P/zOvN380ALSAtUc6wLvnNc83nzyvNe87ILvAvyCyXzOTOp84QLXfPEC8gLNfNG8/Nz2gsn81wLUAs087dzdPOVUfAL4PPM8yILLAviC2QLYAsUC9ILjfN6C9/zfAvQc8RzoiSTs5Lz07Pmc1nzs3OWC3XzPgun89QL0As/88bTIPPGC0wLqgsqc/xzFgs581YLHvM6CwXzq/P6Cw4LCgvSNGEErCEZs6EL5HMxc2ILGQuoC7nz2Qs2CyrzI/Nf82PzhQvjgy569bMS842z5QvuC1ULEgsv81HzPPND874LhfP+CwYLv/MtCzx4IQsdC8ezwAsaC8dzC/MI85wL9Qt+C00LJfNjC6YYinNPc2ELr3OP89nz1QtZC8fzgXOxC5/zNAvW8xxzRQui819Q0/PTCx4LbAs1C/sL53OHC1gL8QsBC8bTqwseDqRzZQtTC2oLqnMzC+QLUgv9C+/zMgtDC8sLowt7/bJ+EwtfMy9zFQvmC0/zPQvsC4vz+fMrcz7zwwsFCysLoIumGLwQlwtfC+kLMIueC5ILfQum8wCLgwt5C8iLuAvlQGiLWsSYi2kLBvORC5kL0Qv/C1QLRwtPCyML8nMwc5o0lIvQ8z5zswvgC/SLmAsNC8cLMAsBQOSL1EjsixELMPOwi7cLlAu8i0sLF/M28z1AQos9tBsLnQtXC90LuIu9C+gLPIuAi8SLwIsvC/KLbQtkc58LVIuz8+KLewuSi5qLPAski3QLZIsV/YMzpQuTC5CLXQs4izcLJosxC7YLcQv2C6SLt0DWiyazeosfC/aLyouOi5oLcwsm8wsLugtAizKLpwuvC4XkIovbCzSLuwt0iwSLDIuPC+6Llouei8UL+vbvC3aL8HNQi+oL1wuBi9yLCYtSi2GLOAspi9ZZaYvuQOCLsrN+i1iL1Itii6qLcIvzCwiL3AtIi9qLgotei3BZ0YuVCwGLXIveCxqLRIvmiy2Lcotti0kaHYvQizsLxovxiyGLuQv9i+GLd3MT8wnqI4s5iyqLTosTi42LdgtyCyiLIItDi/tgC4vfC7mL3Yt/CwWLZovNizOLjguRi0LgO4vYi2OLdYsSiy6LiwtFi7QLsotWi2WLU/OKiwaLHIvE814LB4uTi4iLzfMni80L5IsqgReLNYuci78L+Ivfi02Lv4vFi4+LqYsKJBpOQEtGi9eLzou9iw8LfItMixuLOotDixcLr4tVi4aLIAuISyuLOQs/i6Pzf4sl80kLXdwPFe0LKgtuC/6LV4vLi1oLtQsHC66LjIvJi9BL3dHIsxRLgAvUS9WLCEt0S0GL1guMS3eLWoskS7/zRgvkSznTjvPMCzRLsYvji/RLdwtI8yhL0otQS6cLDXMsmRxLEkupC++LtfOyS6aLfYvHi0pLs4sHsyWZ8Et4S7xL+YvgS2uL+Qsei4ROtHwosykLXEu4Sz8Ln4tgS6uLbovri1ZLu4g2S2pLwfMaS6KLIEtOS+qLh4u6S5BLD4unCwR8qkviS95L9kuaS1EL2ku3i6GLQkv6S44LcAsBGLZLLgvp81FLvksfi3iLAUvmS65Llksli3/z7EsRS1RLpguiC6OL0kv4S7FLyEtMS0mLbksFS9fz4UtCC4gLDkt7i6BLOUsuS8xLdUusS3YwnkvFS64LpUsOi7RLeYs9i4FLCkv3iycLrfP5MmJLTUuSS9xLJkvDS1+LHUu1S/lL3UsDMylLXkslS8yzg0sVS6ZLI0u5S51LK0unCynz00smC1tLUku1i7tLi0uESxBLxEuJSwoLc4uUGAtjaUvbM2+LmUtaS3xLDEv3CzVLqEssSyNzAfMnS3ZLA0vnS35L2UscC0tLP0tdS39LqxUAy89LwgtAy3NLjkugy/CL10sWSxaLrEv6wL1LM0s+SzGLF0sLS85LKMt5S2jLI3MCnOtLfUvpS/DLLUtLi3jL7UsEywdLRMuzi3iTMMuUS/1LZ0sIy61L/ktgy7TLy0v0y+PzWPONS6dL+3M4yyDLaoucy3UL8UvTi3dLiLNkS/zLgMusy5TLXYttS6LLAkviy3pLIUuzi1tzTMucSxTL0Uu0i1VLo0vfS4pLasvj86JLMsuwy81LOstxi3rL+0vcywOLMeTQy6bLzMvky3LLFssySx9LcksN82NLD7NNM0/TLTNo8+0z/QBR0zqAmNOoANjTCgu1tb0Y3fzDM1YzmdPZU5TTT3P506VTRkPzM24zizPCSwlT4ctd/DtgAbM70/rz5oAKyxzLT0DD02LLU4s6s9zT9zML02nLv4BoNFO09hzZywUzu9M203nLQ0v7ixQzuBRxSyXL99MB0zDTwkC+yzozbAB6MwHLn9NhU3ZAwcsxU7/TYcvVyzsYD5RRyyAzWVMU0wlUmbMJy2VLvIDJy9rTiDMeM7bLG4CTyyFpdcv48/rzI1NUyy3LDrNty9VLgksVs2XLc9PpM5LL/9MZyztCQgv9U13z+8uvU83LisuFy9UzxctES40zXcuP0z3LPwAI020zujOR00PLNmCjy6HLpjMPuA5iHALp6JYzs8vk07YzqLNLy7nLrjNry+4z64CHS3dzECtXGIogu8uPy1azB8v5y0jL/1Pvy8rLHcupM+XLrDOVy8EycUh3yzgrpjBPy4jLIstvy+3Ln8vzTN7Lv8vrgP/Lp1P+y6AAaNOdM9/TIctx08bTjyDwWHWZKsbAM+YAaICb9FnTVr2os4fYiPQz80JkFAALM0gzlCubQJq0M5hHmo5o8uRPcxkAA1PLy38zZRgEK4wrt8CnyyrL+1MXyywzaEvuS6M2mni+YsIoK2gZi4VTuitLIforLkOGKy/LBcsmK/rLZ8uqyxNL4/OGIA4rX5jDcLYrqLPOK8Rg+vPuKztL1MsQYJ5Q4MuGy34rhQshZJntZlQrtZsAoSvR6mCAESsxFB4rhCs4wKYrpCtfy+oz3csh03/LL9NcK4ArH9NUNCAAnTMx0wIr48umMyYSUlWeYogq4is/AGiAt23ZU0DCQuhTs2tKQICtnIxAZVOryzPT68toKzzLCgscwlbJLu365IvLwoIqM0jAL1MMK/WLo5LeK2YrZCuXyw8z18sJUxdYmx0rnQgrsyu8QPMre9P4KzkrxivLK9bLEMvoK3TzT0Uq5Ki5eyu9iHMr9Cvsy7kropwrKwUr/IsJC+LYrxb6o9MrkvPuDHLAHzPVi8crUStHyybWzCs3S40Lqiu/AHHJUti3K/HL+ysAq1SLQKu4yyCrs4D5KywrVisli76QqQS7K3Cr9ysHK48rh8uvy0RAaKvgq+8rzwvi2OexWNjeAncrl40IqwsrTyunKy8r5yvxKwKLSoDQq5LmEgUzK3irdKtHK8/LwKtEq2crcSvjS6yrL4Be+Qd4HKsViw4z3KttC/SrhKueK4KrXMsXK2MrpjPXK5WS04g0q/8rMqu8q4srNQuF0kKrCUtGywoL2ytUqzRAkqvrgH8rDyt4K3yryKsCq0yr+qsSy4arDSsRyTCrPyuBMxar+KtWqzqrWQt6q4qrLKsfK2yrJTgmq+qruKu0q1qrNtNIq8LLSyt2q76rwqv+q+HUGOBBq5yrvyvwq2GrWLMRq1lLjKvsnMyrsavkq83pT/yJq2arRVMpq4cr4avWq5Gruqtgq6jLm8sHEnaqaqtJq26rxasEq0YrUatZq/arvisiq5R4wCAFqxqrlquAq2WrGastqz6rH8ukqxirrEtUom3YEqs9qx6rfateq35zQ6skK+irv0t3c0Ui3ashq5qrJatpq/2r70ulc/OrX0s+K8FLCStOq5CkdauFq+6rPKulq7Or9Eu7q/JLBss5q8yL7tQxxKursMtnq6mr6IDpq9ur7vPXqx7Lt6sGq4er/9Mrq98rp6uNq56rDKuDq5WrhMvVq+OrNyuuq4VTL6sbq2+rW6sxSx9LX6sDC57LDqt/qwlTIeahg6sqU6vnq5url6vIa+BrdMuQa23mgGu4a6+rvIDvq0hrO6tEazbLkKsVWAkcZGtrq72riKuIa7rLhGskq1Wr9GulYoHYUytAa9Kr8GuUa2xrlssca68ri6uQy3dzWeKTrThrzGvTq6xrBGs0a5xrcQtsKyUrHCtlK0jTFSsdM1UrAABSPTN1KyYztdM80vQYyDIzyxIr7uDZU3AY98umzBSRBdPOQ2ZDyisbyzKLIgCzTC+z41JO2Mcq6Ssm2HtJ20u1i0QRlIA2wISAXcviQAUAvmvZEUFrBQAha5Lze0msAN5rQUu3Sw+LzmvQS25rXfzcMrDL0WvrAA66LssgAH5r/QuBa0UrwWuha06hlIACQAVrUWv4MrFraGvtq08ziWuua0zS+CA5MqG4ZHP92HJ+bMtyq88rmHk3MKbzeWsgACVrEWuFa91hxWurTH1rZQvh6tPT+6trK5YrLEs1a3VzRmuyfgbUsMuVCHorrivAS6UzOWtda50A4Wsha5yza2s9a0NrkWsdC6Nr3nHjaxCrUEvTa+Fzs2trC6LQAbPNa8Y6WWs7awFrG2v5a31r22tha09r+2st0wNTR2urKydrCWtsAC5rM2t1a/QYnBiOKw9TN2vLawhL92tzQN1rvWtba6trr2u7a6VrB2ufayyAx2tkq5BzZ2sb8xdri3LXawUzt2tvS1kRRWu5a49rCOvPa3DrhOtva2Rzh2so699raOuycxjrPNNY69hROOtLaz5rL2vk68MY0Ot7a/1r0OEw65TryOtxaz9r1vP064ZrgOseFMUtiotg66zrZOsDa0Trg2sFa2zrMusU6yNr/OuVawerVdPC68FTWOu2zMzrLivg63hLkOuOQJzr8uvS6zzrXOvK6+fh1OtvK6OrGutOMp2sZejmiDrrlQhS63vh7OsPa3LrpOsu64rrJOvva9vTKus/q+hr6ut/a0lrouvoRPPAjusta/LLV4sG668ARuse6wTrXuu86+brRnEC67TrLVM2673YduurZvRhjsvbM5LrwMsm6wfhbuuba9zrB+GJ60jrFusp69brQeu1a5nrq17ecU1ruOt666QL0esOALHrsOue66briOsfaxXrquvxa0Lr1esA65nrGPh3U2ULeeutaziLLeuygG3rJevu6z7rwtNU65XrU2sD6+drIeuDxuHreOtCywXr/mtQ68TrvOsK653rw2vl68nrveuC64HrIAD/ayvrmetpyRLrjevO6/Hr0OFF6xTr++ul62brR+tjazTrVevn68HrV+vXUOvrTeseC5PrK1O761zrz+uz63zrPev+61VrBrPp66kyV+sbkn/rd+vkYa7rO+tgG6AbxetJ6+/rVutL61/rNeuZkE1WrS036yzr+esd64XrKBvF62gbSutv619rWBtdSzAbjTKZ67WM3Suj67frxBv366QbhuvAG8brJBtgGxgb1BviaytLdBsXa2v498vDjRHrd2vw64/r3usz6+gbVBuW6/wbaMuCGyHrOFQg68LTY+uR6xVLgBvV8KgbW+syG93rx+uQG2rr1WvL65jrIeviWKBADetEG+PrUesSG2QbT+s6G5QbehuYG/IborOKG7Xrrd4qG7nrLBtWGxobNhscG9ob3Bu6G77rEBuo65/rF+smG5nrv/kIG6wbSBte65Ibe+v2G1IbvBtyGyOr2BthGwzrphvlOlEb3hvSG+tr/htsGzwbshuL67QbxhvpGxEb2CuEG7rriBuygJob0+sUG4kbhRsn66nrykCuG3gbFcAs0RYblRvRG9Ubvhsx65wbcesxGwfrc+vbMwvrjRuhG9/rrRu+wiPrHQtqG+IbyBt+G+QbCRtl644bfBspG8UbOBuD6xMbx6RMG9MbXhvqGzkbHOt9G+3r+RuBG/PrfushG6kb4xv1a3bujJEdG07rXRtsADUbhxv7G0sbQRv6G+cbaxtpGyLrtevuQEwAWRt7G3UbcRsgG4sbr+vLG8kbXGunayUbXxsTG62+5hvMG5Yb/xsJG4CbXBvHGw4brxtOG6sbAhuQm5rrG9INa9sbltMzG/jrAxvsG70beRtEmwUboJtFG5ib6xsr612Ac2tTG/ibuxuzG7EbthtSG3UbLxunG8EbH+sXG7VrtJuXazzoC2uiGxvrnYvWG3MbJJsLGwEbqJscm28bXJsfG8HrvJtUCh4bQTMEm5vrEpsHG6Sb3Rvs6+ybwxtnGzKbVJufG9ibvJvY6xUbdxvZGwCbLJvxG6qbWptBMyMbBht962fr+ptOMoabTOvGm2IbhJsam8yb8xt2G5abIJtomysb4Ju/a9SbJhuGm1isfxtMmw/r5ptAm96bXeu+m2CbEGtOa1ibjptPsrQ9oZtumw8bPRut608bbJs+m1Kb6Jv+m/3rgZvpG7ybQtYpmyqbKJtqm+KbZZtWm966uZtxmxCbBZsi60WbPBglm8KbPhuimxmb6ptpm5qb2Zvam5ybNBt6m3KbT7Kx/c2b5Uv7G0ib/Rvum4Mb4BvSm32bChsJm73Y8puSqMObi4sT6+mbU+uZm8Cb0Zs5m36btZsBmw6b85uDm47AS5u7iyqLjxsdm9lr8OtVmxkr25vEa/Gb9ZsGm0+ya+sum0KbI5tmm56brJsbm4frFJujG9ybAOu8m9frApvKmy2bo5sRm8ibZJsnGz2b05vOG7ebe5upMn+bv+tPm//rJ5urm0AbZ5s7a5ebNpvvG/2bPJsPm/AbCFtVG52bHptim16blZvdm9abOpszmy4bc5uwW0+ydcL0m6DrjJupm+ebbZtrm6hbF5ukW9Wb15t0a3WbMFuNMrybjBtHm5eLrZuEW+2bFZtgW5KbEFs1mzeb3FsDm8ZiS60560qbDFulm2Jb5ZvEW8pb6FvkW1Bb0lvYW8ZiAlQCWytrqptjm0cbalvsW1ebsZtSW7ubMltZBAjAelsQ68hbWhuiWxObL+ubmxJbnFtKq5Rbd5uJmxcNwCA2W/rrdlu1Gx+bQxtkW72bmlsWW9pbaZKEID5bzet+W+ubUZufmzGblJuzmx5b+5uktJkbeFv3G0xbwlssWw5bBFuTm0kbCVvuWzxb41KktOUbAFuKW0Bbr5tEW++bsVuBWxxbZltcW6Fbv5sGfliosJs7G/CbYZvEmyJbqluOW+Sb8Vvfm7KbYVtr/j0gkVsAG9FbrFtdm85bQVuQWxibiVuFWzibARjl2GlbppuImyBb45s5W05bcVtbm3VbblvQW5Zb1xvDW0hbzFsoW9lbGVu5Ww0btpun60YbSVvUW/3pgUD7Wyubh1v2W11ba1s9W5tb+Vs7WwNbIfYtWwybbVuMW6ebx1toWyZbGFu6mzNbwetbMLibd1sim5lbR1tPWydb61s1W6Zbb1taWwDrYNvoi6moENtCW+Gbb5sWmyRbE1u1W4jbDVsr6yjb/EZ4m/RbP1tKW91bsuv/W2xbuNsI231bWFvI28Mg2hiKm4trnRtLWwZbK1tGWxTb4luTW5Jb9Vv5m7NbKNtGm6VbZNvlW8tbWNuRmzjbG1suW1tbfqvQG1RbjTKC286bwtus2wib7Nvi26BbXNv1G1+b51tNG5SAAtuM24uKoqjo28Bb6turW7DbL1vS2/jb/Nug2wbbyZuLW6rbZZuGW88bgNsaW9NbBVs22w5ixZv22+1b2+um25zbz1vgWzzbrluy2+jr8tsoUnQ0TZve279bo1tU2+NbUttB2zLbd6t062HbcFKe2znmxtsVW51bVVuS2/DbQNsUW+9bDNsOYnXrGdti25Vb2NvGWzTbedshW9bbtWso28PrJdtq22XbEtsV2/HbeNt02yDbtdsG24+bytsmmw7byltO21mblduu23mb9pse2046piAN247bHNvO20PbwVtu2wXbhNtd2/BbPduum+TbAdu5G7HbCesu23PbI9uXW/rbDmL5zJPb/dvT24Pbrdu02zrbYxud2w5itFtH25rbA9sBW1ObvNvbW0jbi9vX26sIJNuqG2VbL5ul21nb5dua2+pbO9s7mzXbhdueQMIbt9vr2ypb2dst27nbw9tAO6PbV9ugO7pbUdtr2+bblNsw2wDbs9tTW7vbcttXWwrbBttmG+A7qDsb2+g71Ntn21Xb89sv2yYbRNvuG4Q7f1skO3HbMDuAO+ZbwDuv22PtEVvIO6Lbjdu/283b/9vb21g7cDt722PbY61qTCvbz5vLm5DbmNtN2xrbEDsAO/w7zDvwOyA7a0LsOfJbLNu92z7baDtQO7w7mDtP2yHbydu4O+Hb2UDtG3CbKtvqO8Q7mjsyO3w7OjtJ22nrKdtE28HCtDsx2/Q7W9vaO8Hb1jvNG7Y7BtvEJB/bnhsi29/bXDtZW047p1va25hbHduKO3tbHDt+O1Pbftsz22Q7sDvyO4I7CDsFpL8bETviOxjbHVsBO+Y7RDta271bF9s/m6w7NosUEaI7iFv3W1Dbj1uZOxg7sTtMO48LKmtaM37LmmuDy1Urw8ttYb0z90urCJ+ybZkwKxIroDPZU+Aznmv1y64ryCvDK6grIVPVq0izcHhtmbtzODMZ6tWLCmvu84WTSmtHCxYrV8uOq9BzMETIPfJbAjO8QJHqZVOzOzEz8ztiayOrNTu9ywAr/ctAK1UrnTPXPi07pjOB+BB4sV143K0rpNPrnNlTB0RPc320DkhIK/AzKCupy5sraV0hMqX8R7Pwc22ZOzuga7qr47PZqxSzSzsbKys7CVNVuGXzh0L6i4C7y2u7OxQzoIi0a8/b0LurisONwOsiG1bJinRUi8i7DrOouws7fNsdqxcMZfP16x8LiLv68wS7JtZgu22rhhu5q/daWLsIDAC7KjNAu3vTNLu1gHS7Mau/q6S7rraLOMqgrLu8QOy7xTMgu96r3LvDq9g796vBuvyRKIZCu3i7wLtta5mrRLsHO1K76EuYu9SR7yDyu0DairvNq6C7xCt7q8Db1av8uwgUt/Oys1S7VrOcuxBAErsLqxQ7GLsyu9SRHhDauyK7WLNWu4ToNruGu/nbPzsOuzZrEzuUu2y7SLtiu3OrHrs3qyE71auwu7AKOLsWuzM7QbtXqyG736thu/RrJrsECso7CLsBu9S7sbvIa/G7qGu5OxJrdPMRuyyRhatkk8K7gbtKu4Or2buEi+3b4bs/oqa7Ubvpu5a7mbs7qxW7iYvouxhrvzs82EE4zrulu3q74rsGu6G7Rrv0awW7cruvi9G7+LuNu5+rzbuFi7y7casQ2DW7cHh+2Gm7JbsZu2W7+rtou7o7VksFu7GGc/6Luwq7HLvjuzEzKrvguwHrM7u/Y3/d+hs7uzq7e7sru727a7vCs0c7pSutM+UrpzuVKw4AYVPhAKArgivMCiUqc/6dO20r3TsuQ707OivQM5e7HkP2aynLKiveu0y71JFApBXzUzvbO4xbl0uty5O7R4vmK9rT5CujqxxzYeqLODB7TAtwe8U7Jystq/s7R7vus/e7amuPuxprz7taa6+7GswiAFc7N8uzVghKpmt/u5aUPTs+XUB7HjIge/gzYHtfOxB79rsRernYjHu4e/Bz8HsoO4h7x8vIeynrkLsVy5B7NGRaVe87QnsqMyJ7nDvUa3M7EnujG6R7ZgCcKxR7LVMvu7KAEVMUAB+79Sv0e0QuSIpMexnTLHsAe2x7aWvAey67BwDce0M73zt8e7ClJ5Gmewp7Wzv4e/yr8quyM8S7fItSexQrMntIStB7g/5my/gyQjNs2yp7eztqexfbGntae2/T9Ts8K0PLOEK0e/prfTNrRBw0jbS/u+Z7K1logIB71nsce7Z7m5hM0+B7jmsBe7HWHfho8LB7wnseezarXnuUMz578bN+exh7d3NBhOV7o4CVe4p71Xvlq1kLRHv0u6ozMXvqa3F7lHsNO6+7AECGewZrCVPnZq1q0Cup0yMz/7s5e1Z78lvpazAzWIv2e1VTjnttuz67gnUzS3h7+FuVSx9LPXs8u+fLaHvrK9J7Tnt2OtIY0nVue2F7fdsia6VzB3uSu8pr38vNMw+7dTtDewl7jTu0QGN7qXvVpFt7ZntmAJlT2Xu5e4t7NnuuK6t7IysjO/RrZXu/e1d70zs3e67Ld3tRe6jrjXtLq3TzLXvQ+yF7O3vpW2J7IDCI+x/r/Xvke4N7OntUe3p7uMBfe2HLs1YTGn97APs2M0D7mbNLe5x7dntFezx7JXtne1D7gNozQZM7VXu7e9j7T0C4+28ryPt5uwoLaPvs+9t7XPtY+9ErvPt9uwm7ePtPez7LL3t9y0T7w3sk+5FTdHsTeytmlPv3O7N7Fnvze3c7eXv9O3xzYPvDO5crQvv96keaHPsSS5j74Xvsawj7Uvs5u0j7x3uTa4L7pjNYe2b7ovsde9z7Evu2QHz76Kv4+697ivvve9R7/Ctjy+N7X7t2JVT7c3u0+2Vr+Xug+0z7Dnu8ext7UHtV7L3+nPvu++L7KKte+7b7lbs62wL7xvvO+w/LYfsw+0p7kTvW+6p7mfstu2BzvvsK+wPLAft6e4oAZPt5+7xOi7rTew87/3sR+wt7dPsg+wb7sftre/H7fLum+yULfrvB85b7cPt7ezb7t7sQuw77yzsJ+xMmCDhN++177nse++n7+UDe+4c7svvsK5p7A3vcK6FTEVOXOyl75Ps9rnP7mvvRy9r7kfuBM/T7BXs2gEorxXujK9WrbPvTOm77C/tp+7ardXuqu9QLOfvKq//Twvv3+/P713tZazz7Gfvj+4OzlfsnO/772/t6IPX7N8sryJ+4gRhH+7ArNjNxy8+rjjO2a0nLgzs9+yz70/vs+g5iQtsqO8Ez1YtNy5577Wsny6/7izuT+1C7GAeYKwgUNxiU6/XLHzvXu35zRAfEe53LRSs/y6prG/sE+1v7UdN6a8H733vQeJICoHJxhrAHXTtzy/ArcKtWyU4zeAeoB+D7ufvoM3wHEHgZoLQrhTOyqz279AdFy7a7Z/Pv+9WrDdBYeARcRbu4B/Jr+7uty6oHnrs++2v7rAexexwHwCsQB5hrOyjjCzdGYita+3ArCAfyW4grVrNDK2gHN/vcazYHJQvNaAoHDcv4awYHx8tGB/27/PukB6d7GAfJhs3Cl2su0L4HTasEezULDAe9e4Uru2ssB7U7VftnOw4AFzsq+3v71zuSsTjooDNU+087LkMvO7DLbzuw+4MrkgdG+x/7MLtzu3XCXbvLu8oHcbtl+1O7R3sz0+h7KPsKCwW7z/R1u0u7Dbt0B40HgAdQG9K7ifsM6Nu7/rs9BzG7fQdZu00HKHt2mye7ybtpLHUHvQcNB1MHAwcMu0MHujp+Mx66I7v1uxMHywdNu9MHVtt9+/yRiniLB7sHcQc3u/V7bjusS/MHPJynB2O7kwf7B6sHsweMuxsHhlS6B7i7DPu8gG675eQHB1W7Sbv9+6N43Qe7u6K7DwcTu78HubvSBxN7/fsCTHcHurvnB8G74IeJuwF7ybutJkCHnwd/M98HMSCIhwO7AXsFu6iHsIdXu3sHYIdPBxdbLwdku/gbaIcX+5Z7oIcHuyv7arsbuzUHsd4Cmx8HVIfzezSHKLt0hwI7ZIedB3i7F7ush5iHh7uJB7rbHHOdB09LOAcsh9278If9B5cH07vch3O79caUh5KHBAfKu5yH8TtyhyEyJwfbB+MH9wdEh7SH2Ideu2d7nQdbB8yHo7twh8qH5bv6h9XbpLtGh0iJJoc7BzqHUocrBzKHQAemB6kHIAfV+6FTFzuGM1FT2Qf/0zc7Q1xYvgUH7YzPOxwKmbOlB0X7K8sVB+t71ofyh4UQBIcgh7qHHIeWh6SrGgeDu3O7q+WKh/UHjoePB86Hgwfqu5t7q2aD+18zpoeEh9mHxIe5h2sH+YfDB/FUdFvmsyWHCYdlh3qHJIfCh817/ft7CpmHSweNh0mHzYdNe6j7bYfAQPGHrrsBB7S7yYf0hyWLybtkjB2HZwfmh6u7FYfPB+sH5IfjXIOHoTPDh1y7o4dchwuH8wdGKMuHXwerh9a764dqh5uHAIcO61qHwIdDh+yHhLuqhyS7cwfHh217p4foh9SHiYeXhweH14fqhzzYoXJThw6HM4cXB8QHr4dHh8cHcYf3h/yHe4fuuy+HrbsxhxqHJ4d2h9qHZoc1e+1rgoeHe3mHDIcah9uHQEdKh3BHKodgR+u7JYsFu7L4O4cYhyBHPwc9h+0H1zvph+sw+EePh12Hz4fER077fofphwOHaEdZh9+HCIc0R5CH7bvDlMn7YwdnhyuHF4cjh6xHVQfsRxFUtYcvS/WH54dPh3xHc4dJBxozcvtke377Hoe8K0HLyXvcB0L7O8h05NMoQYeO0CGHEC4lB+yc8nsSB587cfvoB3y7xJQnFt47WbOiRzxH4kdrh82HqYfIhyZHNxZ3h9BH3Ee7h7xH1keSRy2HdPNs+0VGn4ewR117LEfuR72HYcsPy6KSFEdsh1ZH+4f8R7f7wUcVKnyH6Ed+R9KHv4fgRye7XkeDYKFHAodXh0lHZIdeR8tCjEedh8xHCUeMB/OHVYfOe7nYiNhpR4RHWIeRR5D7wUfD2OVHrkcRRwFHJEc3y8FHt7S5R9OHGEcWh1VHpXstRwXTsUdMRx1Hs4eJR9hH1wf2R7xY5vuTCxZHLkfhR6BHXUes+w/LmJJ1R9NHREeNR7RHE3ujR61HTkcPh2FHVEcSR0NHVweYe6NHtUdtR1+HA0c/h4VHpIebh6NHGQCLRztHbkd7R7KHl0fsnDDJN0f5R06H90fHu2SHNypY2KlHx0e+RwOrg0fnRx5HQvujRzFHXEdbR+lHWEf7R817o0frC5tHwEf1RzNHAUfAB0+7oAcKR1wHYCuf+6pHeQeWlBpHB3hogMUH8lvhh8trbgdSBwJHcbijR/8gL0enR/5H70ely6EH/ntne19HIwc+R6WHr0c5h7THlYdWS2z7XQdUx/FHb0eAx4FH4Cv5+9VgvMf/R2dHQoeCx81HJ5GRxizHDYdsx+WHHMdFR1zH+fv/AKLHH6tNhytHbEd7mgSJtwe/R6zH1McFRxLHTUfpy/n7Yod9R3lHBsf8x0bHq0caagSJvIdgx/DHS0eVR5rHZMf8e1jYTIfih5NHBEcIx8tHiscXR8VHnYOlR1C+nsf2h39H6sfdhy7HxrujR8HH5sftR3zH7McCx8bHtsdY2JTHesdyx5bHCcfWx1rHbVYI2B7HsccnR/HHCseJxzbH5Me6R/bHE0ehx/rHhccax37HQMfO+/ZHZXhqxxF7Ece1x5LHa0e6R7rHcMdxR2LHNMfFx9nHVu7owJqHXcf9R9XHLcd9x67HA8cgbL1HDsfdx+HH1EeRx0m7Dccix2nHYke3Rw1HrcfIx9p78kddMyPLSkcYxxN7WMez0s37IzOFB/jHoYeS80THtAcOax4HdkfsnJX0Tccl+zXHgMe2R4zH9kcJ1LLHq8fyx0/HWccTx4HHbDnGOvnHYcfNx/PHrcdJx9rHizinoA/Ht3tFxz/HUUcue5GgUCfw+zAniEecxyWLbPtShIgno/vIJw97h4cBx2z7nugfx5ZHa8eIx6AnJcdux0w0NxszxyPHPceGxygnSsdoJw/Ls4SYJ//7JCfjx3AnPt6e8MwnnvusJ7An1UcnkSnmhCdTR8QnvsdsJ4vHd8czM8PHFsejxyAnoifdR/wn5NBcJ0v7Iie8J7fHLJycJyvHRCdfx2PHKievx3fHcBiKJ8/7CEc4J3+HAcdMxxyclCcVxzBHVcc0J1bHdCf+x1ZLZicEJwYntXtGJ2oHG4emJ2/HCKuAJ9Ync8e7R7InuifowInWgifex07HrifGB3a7GAdmJzuZzifwRxlHFfuuh8c7KMfbx+c7BGOq+51jompMabjH0ivnx4Ezl8euB1GHvftzBw3HgEeSJ3HHNieZx3YnB1MnewzHkSf2RxmHMSeYR7NH5AeMJ2IMDSedRwvHcic+3sNZGidCJ1onMic6J80n/Ccp6j0nISfCJ87HpCf9x3/HvsnBJ5RHfSd+JwMnpLv4J+RHIyezJxnH2CduJ7gnysf8J+FAbScAxwsnyUf5+6hHpScFx+Un6yfhJ2OHrEvcx1BHIcdWJ+nH0ifzJ5UnbcfJxznoZMsiR5XHdyenJ9/HjydgJznHPpSWmLsn4sffJ2QnJUc+lCUnNyfOR6Mncyd3R/4ntSe6R9cn3icfJ74n0Kf7J59HDcdHJ+Cn4McVR2EnwQdWh0Und8c7Jysn20dQp+vHMKfGR/inHxUYp47HYyfYp9L7BoewpyycDEfHJ0Anj8faJ0CnkyeOJ8MnTKc+J8AnDyfGJ5lHj0csnN0nXKeIpzynyKePJ5vHhPvJJxkH4Ad7x5+7i8S5ByPcx8dWM6fHBMdhh7pHZQd70yTHlQfVuxA9bqOUp7PHoqckp0KHL8cYB5u7LPQzJ0SnaydfJ3ynw0eYe/37+vZmu3WH7yefx1anrKc2p1DHfYfDjVGLhKcQx00nRwf92KA9AKe9xyin/4cBp8zQQae0J+6nD0emJ/anBzwRp7YnUacfR6Gn4zjzAPGnFSeJp0hH44expzyoaadnJzinESf+p+M4E9s+p1incScepyb7WLtKfLmn1qcbJyYnyEd/3VWnJac+x+MnpKc3h1i7eqcIpy6n9ydipxmnqCesS5u78VHVp26ntaf8pwHHA6c5p02noSdlp9Gn9acpp5krk6fUp9OnSadjp3O7hn5Dp/0nbKe/xwOn4acLp8SnPCebpzqnf93rO52nmieupxunvaf0J/2nq6fep8KnXaefJ8On5yePe8wHz3uyR2kHuntsAN0zzTu+hzC7CqeXpBl7M3vKp8GHRQc5J4VTeSf6R1f7zPs3x4aH16eS4OunvKcjpw179MdPJ4vE16dgcrenp6fdp0anB6f/B16naGf6p9QnSKdYZxen9idZp7hnhx0np70nZ6fwZ4+nmyekZ88+sNRwZz2nCGflp8779qd3xIxnRGfMZzOndGfSGPIru6dUZ0xnNGd1pzxnlHzM20iTEKerJ5hn+6fEZ3XHn/tsZ7T0/GdSZ8on2GfIh/JnFHMUZ5CnAmecZ0Jno6cOJ2xnK0HoZ5RnSmctpyGnK6dMjTtBHGfSZ1xny6d6Z16nsGeKZ/en56fWZ5mnV6fmZ/1AlmfKZzJnyGdk2NenCmeGZ5pnxmc0p3b7OIfQZ+ZnGIsOZ4RnVmc6Z7and3Nmp3xn/meSZ45n1Gf5pxcnIofXpyKREWeGp1FnKWfuJ7Ono/4R6xpniWeRZ55nzmd9p2ln5mfEoB5nJmfipwkn8vvuh+kHsoDdM0H7+8fpJ+c4ZDlZJ1pHjqfrgGBnVItap9GHeKeBJ4DwVWdBZ1n79vutB9Un3meTx0zbFqe+px0nc0dGjdi7w2dLpy5nHHN3+5wYFLuWJxJnlqeBZ8tnZWcYKw/LW7szZ6WnkMfcZ5cnD8v6JEtnJ2c2ZwwnLnu/splnLKdOZ9FnLGdSx7nYnbv3Z9AnNadPZ6dnq2fnZyUkl2d+pwcnLntOu+9nSCefZzlntGdnZy57WEBHZ82nI2fl+89n7ceBJ9Dn/2dzZ4Mnr2dDZyDnWCdg57SnuKeop+ycNREo5xMnv8dRJ39nmOcsJyVnX2fXZyNH+Odau2Tn3CcU5+DnwmfU54End2cJZ9tnSWeCZ4znumfjh2/Hgrt050on1WdeZz8nU2cehsF7+GdSJxzn2mdc5zFnqPv2R1QKG2fFh86nGGeS59lnOOer+8+nMkdsB3JHDWcfpz0AVgetZznkYzgdZ8Bn2keEx+qnEYd/M31nhSd4553Ak2GE58/HSGfC53QV0hhG+PbnpmdbJwg45qdu5ypn82ee54yz/OeGJ7tnl6c/Zwtnx6dUJxLnxWeC56Vnwef7ZwtnO6ds57NnROfsJ+M4ZlXi52Unkedw580HK2ex57P7qacB5y4nQeckZ5Dns/sTpwnnx2cA51lHB2eDp/nnsSdXZ9nnnkdV542nZeew54XnsmeI5+M4Tedp5ycnGeet55NnUydRB97nQufAp87nsn5fW+a7SudGZyrnDOdq56ln0MfsnLGkg+fR50XnB0fz533Yi+eU5/XnwMer56nnhWfs5z3nded7Z7Ln2+epu+Hn6edZZ9PnwWd0p2Sntudh55tnmKct5wfnMedH553AN6dd58ynH2cPp9Lnd7u1Z6+n9Wfvp9UrrmWyp0Z7B8eRen+nSqcZUyqnIGfmAD1n5QcGR+4HEPuqJ8tB09O754nnDufjZ4777Kdy58kwMOdTp4/ny+c55yC+FKcoF+XnqOeLJwdnLTDr51/n32cEF/lnACen593n5+dR5xvnh+dBR0aN7Gc1540npBeA557n8Wdv59ynD2fJZzPnuWc3Z57n4WfN57gXFecLh3f7rG6UF0IXEOch557n7mccF+0nSed8J57nBmd8FyKnAhec53IXTOcr5y/nGhfEFw/nkhd4J+QX9mfiF4uneBdt5/s4WBdKFxYXe6cX56NnIWf0p9IYfmeaF3en++cmFw4nWBdiF+4XyueeF1wXNue8Z45HfheT5wEXqheIF2IYGWf2F1pnqueX57jnAqeAvnQXd+dUpw4XTBdUF1Tn+heEF2PnTqe3Jx4XjBeZ5zMHUkfFK26HSSc659Ur4OFGM9+nvgCUnn84RtlU+x0rLkNdK0yzvSuzAP0rV8fX+wgXZ3tQXdBr/Guhq4JrfzNUa9oXxKu1xyanpLtv0DsrMmuIBwJrsQdpFyhrThdX5ye7QQaTKzir0xf9F7MXsRfRq0PnkyfMnK6jUxfOB8BrM6tYp14XJYuUiUxraxfrqxsXgWcnF+jL5EK9F+RrAxcuQ0MXH+eEuzcXI3N3FyerDxdXF1Pnras+5xgHZxdZkqarXxcga7Dnbxd3c7sXT6sHFzMXIJehJ2CXdPPLF5CXXKvrFzCX1KdwlwoLExeIl8mr0JdHF6CXgRcLh9yJ5xdQl8iXOJewl3iXAcdncCbYk6uya3hrCGsCh2iXpjPiZIHYVJcXFyxrSgeol2SXVks1ZDEE1KvUlxRrgxfCa6DnKLv0l+gz0o6fF7yXjxdogM8XgpevFxyXJYtQXizkPJcsl3JrbJdzF8KXCVMsIBOripdEl5cXKJeql7KXrEu20qVHWpdIlzqXJJfslxEX3Rf8icyX2pesl9qrxxf6lxxzPRdil0qXNJdCa3SXDpd3c4aX9xfil98XGedqly9FQkrely6XfJdPFwKXWOdClx6X8JdZBkGXNpfKl3aXuJcWlxgHv9jzNKsXsZeul/yX7peJl+MX2FExlyaXtpcXq/aXWZdLF1YhhJd5l3GXBZcJl62nZIcUl7mXWJfEl/oHlZcSxxKnFgeNO4J+VRfKRz6z9pTz6OH7J/vt+1H7+vsKs4b7/WdkhxHePDMY+2L7VvsvFzj7VhdjFye7Vyhjlxs7oXsap6J79Ocv+wLHzZfxe9v7egD65xzAKkuwMj2XgPt9l2f7nfsKswUnRkdzl5Lg+WddZ0Kzw/vv59KX05c2R47nw+cmcQP+15ebO7/7/BdTl5L7PYcbl2972/sggDuXWeQKp1nI4BdCB4eXuvvA+9H7HReQZ10XGAdIvnNrP/vLl/4Hzaf3e0vnVScYF7/H8Fe6foWr75dIV7SXFUeoV8wXfXs/51rnb6fE+2wAb7sGe0AXIfsmQFvzr5egV8x74FevJ57YJ5cre937pMfVq4/oV5cP+x+XK5cC54RXGRd0x+gXU/uku/XI3FeIVxbnglubF2uXTZckV+YHm5eBy81ncqfpQFNB4zsMV1l7NPtHl04rrFdpC0OX1ucLh6Xz7Ts8V3hXqTvSVwJXuhe+e0+XkydCMAK7QNop+4/7k5f3l9+XSMdyV5v7ClfAK5UXPocdl2szEkzauHZDAGezy0xXQgvn+8THZ5dQZ/8XvlfBCxJXy2tSl+GX4nszl1ZXv8fNqONBipu4V5JXkpdhl+TnMlc1Zxrn6/vyV3+XBjO7+95XCVNYVydU6let+72XEFcd+1BXCrNW5+eXZIelV1FzhfuhVwRXreezlw1XwFcuoNFXtAdOx+ZX8Rfq58kHL6ekV3/n5Fc7TAAAkgAAIujHylc6FNS1W9U7Aj2Xudg5U8FXgRRsfKeXcBccV/RrsOHzV3ss2ct+63eXWTvGp0hnv5eox5/TikCTV0VXLWdUQOxTO1fdU4IHzHtLVwQc6Su9gGtXWIthV7BXHas0Yah0HqGKizabB1eaGwsXLCuNeydXUqe6M5NX3odpJ9dXNQi+gP1A2euZexVXj1fTx8eXL1d0fM5D71f9x19XMNfjoDkXlttn58fbMmfA165X7AfuV1Ur51cTV1kHxVeCi1xzXGEpUwFXQgeI1+NH2lco19QYaNcbV9qn9Gvli8ikNNfCRwnbEedRO2hXhNe5V2YHblcFV5/TAAAS01fAF0eA0wBLFXogi1dZ009XQHvM13xz6NehO3Tz21c2MvLUQHsigNdHfNf411I7ZtsVO/DbFeR0fGNnaTO81CDX5Rdi15dXM1eY12ZTDEDy17HLSNdM1zFrqNdGQ6rX7tuua0fh9teTgOkrOtfT0/9XjjvlO6Q7xtcDU9QYZtfoe5bX/+di1xDX1RdQ10hAbeEn4S0rWvsM1ytXytfrVxBnhkfhVwo752ve14nXhTvA+/7X3nGB1w9b/lvVW2RzJtfh1zTrgteDV5rn+VenV1UrYtcU11dXcxjvKGQR2wygQPDXy1dO14zXNICrV27XHkMe1wvbYctt18fhBdcd+0XXBGf819w70jtZO5ebldeJ2xP7wlcW10TX2ufR122XXlct14DoBKA7gANhjtfzy73XWYD91yzX7tds18OXodu4O1+B/WGSaH7XrtfF15+XEDv32+XXZQsL15J7x1er12RXSvtsAAAASpLXNFd6wFBwCBTUGF3XbftVV/2X+PMtV5nX8BeTJ+GoNmsWJ3fzdNi8V8hXoSc6S40b7VcLh7A3R5FMC4g3JlcZl1inqDfRex/XI1df1yAA39c211LXHMD9/gTn91caV2AzWld91zVX4GfXxx9Xc5dUN3eRu3M4N+lXsVdZVxdeR1fL12EHpLuOYauRYegcN6n7ZpdzFwQ3IRtR16NX39ex15TX7DHuSAoUAhCd13TXjFeaV2A3x5eMN71nQ9cBe6AylNE6zdg3YjcNlyg3j5f8NzUnpLt6N+zRAjGLl5w3MVeZV6uXvDc5V7XXeVci1w3XDgDf183XM1fsxIx1yjcHl+o3zFchV9BXWdcsNw1XVfrkMUY7wfO2N76XBReSN9XXiVfVqzjEjHXizYY3DlfGN9SnsTdW69I3JDedM543FDfQeJs7zjFU+z+guBRO1xo3hVNApG6hHZygQLAXUDebVwF7+tCGcfOnzIcDU9U38ZdOx7ErlSfoN+SXxwAZFEezLTfRN8MXeStFl9WXZkAeFAu7Hwv9N7qX0lcdN9sXv8cYM26MfTdLIa03FZftNy5XQtelF1vH5RedMxvXkNc1szBE24s0N/97xTc3DdYzQgsVNwyAFalBN9A3SVfYLoyn4oeTN+I30zfuR103VkuQsmM3izcOU1M3xmczN2hXfeejl4bb4zeTCw83aTdpFz83RFf4F+PzGkwLN6+LwLcql083G8dEN2UX/+fdM1RX7Zdb129wlvQFyYc3aIDNIlnTZkT3y8cdgqxh6M5DdVfZ13OX6c1V7DjXQrNBQILLWLP4B9JX8xfw50vX5tcCN0sXwsS+yalL4ocvcxKX9LfXF5GX6Jf4WBy3G0uVi/BzPLeZl1WXC4cq4UK3zFebC2K3hZcStwHH6yB02EMKwrfms9y3PVfmlwq3VktDYz7JQ1x2B7tzNLfd85GH8rfu5yWLOrc0hBD0FfOGt2YLxreNl38XpLvmt6CnzvhWtxlLjcvit6a3BpdBsTSExache9a3kDekl8M3+Jdet+hsPkAut9rLmqfut/a3J7uOt9BszSuLl363Grd6l4G3AcdS0Gxho/hZYr63rrd0t5G3szfVqzG3dCyz8GG3zssRtya3Ubdkh0q3KSvKCyK3+ZfZt6W3ubf0a1K3GZRyuDi76rf5J3W3vzdO5/GeRZTNtx5zcrd2t/W39Tfst023Vbdqt6K3ibcMt/6XEejLNJW315eyt+O3fLfJt5yXFE4zty23Y7dtt/23HbfD57lwbdjTeCO3L0utt+BnAbdat3KXsbwrt72387c/F4y3WecsFwyXOtRnt9hLa7eHt5q3HrcjcxS3OeiHNPG3WbfogLy3l7eTtwA3f5A+lKxAIjcSSwm367dHty+3s4tvt2bTcbcGt1+3trfgd2W3GDdQd7SEobdMC6B3T7dJt8e36MtQd5B2Rbe0t9+3ObebtzsXd7fWyZy3+osHt9o37bfgt9YXDobj0NK3q7c1twR3VHeCVze36DO2XPR357dgd8+3iHfkl8u3pHeqt/u3j7eUdxu31Hd957UXHHcPt4x38Hfcd15nWTc1+7rnf9c8B5R4L0wgiVT7uLfZU/i3TLOEtzkofHOktyE3C4cF9Gm3/5uft+G3brfMdxZXiGdmN33nAgR0NIFAMrfkc323CHcDt2d7a/gngCq39ncWs453MndEd7/HFEYSd8yHFHc1N053PneQa6M2/ndct0J3QXfed6J3Tueew2iJBlx4d0a3lueEdzF3w+dxd38nzLhod3B3yXfmd/1Xs+d08+l3C2YZtyZ3xbdmdyJ3LHdP5+MrHfret+RnIHfZd00XKXcVdxC3VXcibiG38DeT0+h3wnfBd6l3kyeFd9B3qVd6OqV3tbfldxZ3COfi2Pd8TrfFd7B3pnfDd913TXc0d0R41XeAd4W3WXczd0x3I3d5d8IXY6thd8O3s7cOdxe3fpf8tw0rX1D3twF3kXcltxt3gNcFpye7rnfdt3u3z3Pnd2V3c3ejd9QXBXc6kKd3EXdSdzl3l3dMt5kXy6sqd7t3DHfll7N30Xfzd9Z3gEofd+R3j3cg95h3EHdXK/kyu7d7d553B3cFF3+3UKtXNJD3vovQ9+t3z3ebd/IXkmtAiJj3mYtfdw13uXdXd/l3RqsTd++3ZkedoPV35VM/d9e3lXcqq1T3BbfhAIl3Nrffd7j35PdbdxxzhnezlMvbJXf4d9J3sPc8d1ZLfPdtd+z3/reg9y93f3dXKyz3uHerd0N3OPfS93j3ehcE9ytg4XdQ9yT39Pdc9793m+cqqxj3/Hced4F3F3e694z3zXcqq/ky7ndA9+mXpPcM90UXC3eUeBD3Rvc29yGXOvcq99z3+PcFdwD31vecdxh3E7drN843wtfE16LXKSe5N//XvwD5NGnkDLrh+4pQCtdx96ErI/gcaAM7Z9f6V4q3dekOjMI0gvd+2AdXPDemNyy35jdLF5BsHhRXbAGzODcSl413Mvf69+gzxfffuyJ0Apvl91PXgzdbFyF3Dbe19yQMKtSKi433etdflyMXWHccc0TxjTbeIroH3fd41733CqvOd0mX7fdbfmX32veV96r33OesS4P37Tv1q5bTo/cMF833vxeT99mXmmCRhgGgI/dz92T3evesd1wztffgLnZMZHPr97n3Djdo9xbw0fc8erP3wPf+F6j3R3c197v3l2thMI/3tvd75y/3i7dmtwnIttRzbHh3OfcP13FXoKuv96f37/ceDro8X/du9/P3nvdq9/CXZ/eSFAf3T/dhF7/3/ffgl8gPkfqoD9/38A/H90z3b/c9uM6+uA9wD0f35veO93f37zOf+bAPFffkDw73Yndn90kaq/cPU1f3oA959xAPNRdMD/k6pA90D/b3hwdLF4K3LtTqqMAPTffj9y33PXdzN8qgetQiD4r3tocb9+IPW/et9wF7FbfCD1n303eKdT33Tld993D3Cgtr9IAP6g91d0shIA9aF4oPV7cMD07nH2AZGNwMOFeDd/IP1/cC5+YPAg/lt5Z0Mg+GD8HzNLcmD/kXm/dOD38HKg+n3m4Ptg+eD2IP2g8T98oP3Rch3moPQQ8DU14Pz/c+D7f3D0X96TYPog9aD2APqKt/9waXdemL8LIPmbfGDyEPaQ86D6L3ZrdEkIEPKQ9j96EPEg9g907nNLQKFMkPcg+xD+gP8Q+cD2yrlVxRD2UPCg8VD0oPkg/Vq3atNhR1D7kPmg/lDwUPYQ/dD/RrYAy56ee17Q8OD4Ynt/fLvaUP9Q/5DxwPGQ+894T3bQ8LD6kPSw+YD1crhvfZD+4Pd/PBDxsPN/fND6KrU0u4TnsPHXcxD4sPRw/LD8urJHCMZAgQtA9XD44Pt/c34gnqLA/C02wPpg+dD74PEIe+d3cPCnQ0D133h/f8D34PLnf/D6DBvA9PDzMPxw9O97Pw6bMS+I8Phw/PDzCP7+Jp5EyokI9Ij9CPNw9086pdBg/RD3kPmI8uJy8P4I91azBrrA/Aj2b3Fg9pdySPw3AYj0MPmw+6Dw0rJI8x90CPaA8BZ7+3KI+vD8QuxEiIj/SP1w9bD+MrJI++cHSPHQ/DD5UPVfcn9wXpcI/jO+8P2zOfD94PZg/Ej9KPmTiG2Jf3FI8e9wQPFvf/q/8PpZH6t2UL8o9xD4qPnI86jwosIo/TD0SPxo/KjzjQZo/sD/yPjI//01YPeI9TD7aPyI/Yj4KPyo8fnDaPXw9ij10PVQ/D5xwTECeTD+sPfI+ujwKPBveskE6PwY+ijwyPRQ+sS7005zgnNc6P3o8xj9v3J7tzD+nUQA9Rj+aP8EezD5x0kY8DD/YPLo9Yj2GP/9NlafmP2fdQjxaPbo8qq4oc5Y8aD4WPyY92j7GPjpclDxmP5w8MMwcPIY/Fj/aP6pdzHHWPRg+DD9GPTY+pj9WX0g9tj/iPg4/Zj8q7t/ddt/2PHg+XD4SPOY+B99JHLjch9243jWdyN+i3UE4d+GCnXddSKyGHAndmAHIrIRcktzo3Z3uFS+y4dldla6NrdjeYh2C383cvNwVLzbSXj0WHfdc3jwM3ig/3jxKPhA+r02BNSy2317wAyjtwt983KI8ILGXonXAAT3c3wE8/F1+PC/fxJ+s3iSebN//nYVNfp/I3ZIsTD/Mhqjfme44HC8vJq2IHyAdld8w31lcrZi09Ihs5y183PxcJB5038Tcc1yRPOUcCm+RPjzfGZ1RPsneIt0hPo1dhU55Xuzeb800q/CA9lzhPuVN4T2TA4gfCd0RPv8foMH4UkerUB3vLFE+R5yxPAtc0TwF7Ek/2NPC7I2s0B7JPjBfyT6J3cndgB0pXeTelwKCM2TQnecnXx/sCT8xXLgdMN50XMDeGTwzoqHcMT+pPTE+UT0EH3493MxNnTuf3PnE0JPAxBxpPm/daT2D3Ok+cB6hP6Lf+6WE0/Sz8T/AHuE8Nq/hPicuET1ZPv8chT3E0pnzeT45Pck/OT3BPMLOPjwaXiYSeT/AgyU8gt2ZXaU8ID6hLAU9Dy3rn1FdKd/b5QzQmBSZPcAcK15FPsGtIBzFPw3diT+G7sby1lwdrDk/5T8xPhU+aj+hXIlcnuy547zR1BnlP0E+pT1YXajNB9xs3kqflF2FTsgCAV6XAtk3hWxIFIDfCB04HMyvRT5A3LU/0a0kUKZf7F9JPuCspT5pPPU8UD5lPI3OLT1oFw0+/V51Po09HT+NPJU+NO4AXaLdeNxmDin36BStPZk9CCxZPok9xT3m3M9yll2pPMk+HT75Px08O96dPnpd/TxdPZI/z69dPbTdjJ35PLk+sK2xP00/ITyB93E8eoKbTtkzLT1hPFVcfT3srG09XN3U3Z3sMkLtPsKv2T4DPXU9OTwlXVnfVD5XW+zSXT2TPB08Uz2NPP5dIzy2X1HtBT1431xYF+zVPYFf+NytXWjd2a+xX7NedJ0n7xlfpVzxLq5d9V0VPlncF933nwvvcz4uXt5cIe5LPvef3Tw4A2mvkNxH38urVONR0HyQehA0XfXBZ06m098uTNqvb+DNlGFtPlDuoixdg+7AhjCEoLrDpK6gg6oCYeEbAVrORKybbBtf+23PXpFsuz87P+3iuz6CPLDsKC3S+/RgTQmBUFLRMC0lVinu0SFkrI1ul1zFbOdu7c1HPWzsxz84PF9c8WzkIVHBt8PNXuRBs95HPtEjRz3a41Yvuz5nbGTt/2xY7E1tqzFO8Kc9Fz78Pntet87KQHeDb2Ns+2WCKm77PrtdOz7HPB1ulO2XXic9la07PHc9EyIvXVOd0G9TEvClW9PVg2CCOz0TIg88Bz1SLJc8/22XPPDsVz/Hb7c/rAJ3Pac96OxnPziw4WEvVv2SoMMB3x5cDz+vPQ89uz9kraTu+257PMTuBW2vPvs/Dzy5no88eS4/pz9XRUMEAFfPJz1XPEpcLz/470NvB1ww7Sc8FzzXPSMBIh+ePLnJKOzMgFfNu6NXoPjAft2VT38/T1w+Pik+gL0twA8RP2FmExoo09yywVxswL34H6IDwL/rXow9KT43PeKFqQ4ro+WyQL8FQKjNQL13PJTuSO4Qv54+DEp2I69gdYJYoFC/YL1gvuC+8gPgvd9vNj63zCNE2oOgyZPySkGwv0C8cLzQvEjvpOwjPfefq7k/QPKJRMvjgxCgiL1QvwVDiLxfPoE/8L+ZAh9XE9RCASi+8QNQvZ89xz6U70s9jdyZAjC/qqM/VCi/i6yF7UC/KL7Ave9PcL4/XvC+nixhCJC/CZVAJui84L6ovHs/0LxgHDLTlwCn91kVzzxw3lC96LyovBi/dz3Qv/k+szyTX6s+bj1435bQ3tEDaXdeDNEbPOMdPc6eyZegUp6ePqff1V5uHixUZXcxXVJAtN517PxeRB2gXss9O58dEKV0zS/QYJ4/KzwLnZS89j/s4SQvuXRXztS+NtH/7q5eNL04vFafz2MU3NS/FL4v7z/vdLyOPm4dsTNUvbS+DL0/7tXsjL+EPQc85ByEyzlM4B3SJkCfpWygAk4oaO+XPtDOIAAUAm0xQABbbQrMFM4yRIC/zL5/7PKjGU79XehRrkUMP6y+x7Jsvy8/bL7sv+QAHLywy7tD3z5KPMrtWyfhgb5d2D3P+nS+hjx63o89iakcV9netc9mLx5u0L5IvZTtbL0bXojd6L+8vl6dAr+1iOSMBs2Cvu3t0O3/Pzjvx242gVC8Ir1qPE3vma/bXXa71j38v9S/dj043K4/B92vXMjdkIPNPX0QHHcd4K09BV307EDdd+2ePcFdye6IrcK9IN8X7Zg8ZN0DXSC9wV7pVHViQL0Y3/y+GJ/yvA1eUr1NPbM+ygL/XOzdx1xWZUAYm2N/0xOl+N3Q3ZTcMNwOXK3uKK5bP54/TyEwUz9XBYHwAoq+pN2LTiismN883gq+iV/JhLfzj0DNLUTfO8xav6TcszwhPdWdIt6NXAACKms8VT2MCxaT+Vy37kpcBqE7X0lios4SvU/S6d+yviyeydQCPPNeVMiVbTM+aT1av1M/D5wYK1A9xr2hECa83T75PKI9+r1nqqK/wcwMrsM9pF4iAsldur7/nHq8kNwAAygAA6op3wc/ATQVQYehd14hEMwCSKxD8qLPgUPe4bexsrzkvZLcdV40wPz5DWxLrLF4H7B+P3w/qgOUvbQfD57JVkxvXa6Ovorg+T2YPk69NLwo3qahDrxmvbGhULxKX3DcONyuvPS+mMxpRGY0GUPOvoi/JO0DPy68oj7Ovi5sjr2evO6/2N44P+6+jLwHHMJu718gXo+sLr+evia8+D0+vvzdqz3Kvek9az5ohas1ZQSzRTK98zyyvXfObTz9PW1cdGNrNGs02N2Kvxa8Mt5Kv6gfWrye7wG+yzdY33K+4N6GXAoeob0+nk0+IT8jPHE9EGOVPQvu5bvb0xk/2B8f7zK/se9qvaQt6d+ynlG9yQ/Hg3VdcdyWvbVfob59HLG/eXdQA7G/+98xPqs/RL6H3I3scz/pP/edTkOqvrHuar0fXAs9wM7U3ws/zZ1oDh89380rPfFfP+1LPvU9gz55HDHty4AJvI/tZV1pvFA8TT9KvxG+yrz/XXE+Krxn0YE2HoOVX1PsarwE3OleCz1GvA0+nbXZvpq88r6ZXgWcEbyQHKa+TJ1ttHm8pN15vEK8ur8uPJRfmbzEvcq+1K2hPNGTeIlcYqZfgb45v/M8Mb6zXim/n16YnW+2plzhv6Vf4b/n306/Mb64N/0+RN0hvjY+OD75v1Tsib+uPP9cY0+Rv4CsQvuYF0m+We7JvUDPyb6B7Qs8Zb1zHSx02IJ5vuG/6WzE3+W9uT6mvNqM9b8FvfW8Sz+Vvrq9Eb+6v7E/ZN+JvWs+KyZnLjK/Yz2fHmkcm59eXMBcXd3qvpqezbTYyyReK53kXho/fD1xv/m9bp7tvKf2yF+lPr3cdB5eRF2/KF3snB69+h7dvpOcxFztn409O5xtEkDi2iwdvW2eoF6uvw2a52DogOBeWF7f3n29d/BmvEoeVj7XnoO+3b8SUl2/GL9dv1zu3b/dQ8O+9T33nYO/z/EQX9BdTjyoXJY8wu7dvXYCo7yZvH2/nb4Tv92+Ap8+vG7u3b5d7r2+Xt73nJO9rba56oRfsj+EXeO/y2OdvKO/k78Gnj28wu+dvcO9c75Gncy/Wh3zvJ+cpFwanPg/078PngW/I5wLvCadC7wNP52/A57TvrO//bzZvC7Qvb8zvRWcFF8Jv5a/DV5Wv8nfhUwQgdK+1tTaLM0FJbzJvTm9tb1x7HW9p91zHMa9XXWLPJS9yTydvFS+pr0mwpu+O70MvtXvGbwwP/68UV6kn1m/z9Pa9lkDhT3VPgk9RT8JPBE/NTzBvuIdGC1XSI0/Ib91PVM+u7wFvce+61wzPdCtLr50P8M9Xby6Huu/116DXP9cKr7Fvhb28bC6rwDcrb6A3lu+pb6fX6W+27+OHun18a71vuW/4N4NvGFfGuwZ9xW8IN6VvCo/fDxVvxU9Vb4XvABc+rxWnuIzr2DSQBs+gMCGHLW86FEiTsNrZL3XvuS8eJ40wWgNsQAGzGlTf9xNv5K8E19xvm4dSGl38Oi+Kixvvbvdb71WPbO9xuPvvUTL8GEfv2PfebxyP1Y+f+5fvZKliZ8fvEpen70uPD+8Te0/vZZzr77fvoW8i95Tv44eX7zvLN+/a9+/v048oj9Nc1LSIUr/vYB/zSwCvPO/7OMAfqVsCm6/vXu8f7+fvbVabZDtCjemoH3/vUlcLt5gfVu7YHyAfeB9wH/gPxO/D5xCqS9U/76AfbI8EH/fvRB9sZNgfz++wH/Qf/W9ND5/vNhcr78/V1+9kH+wf4B9ga5AfWDR2r4fv/B+b7/Af2+/y73jnLB8QT3QfEh8UH1SP7KdP73If4h8n75IfZ+9lr9NvFa+zbwbvw8v1rw37fuAxl+bvzW/V76yvGdfbb3y75DDYa6TPis8Tl0OP/Fcu7wVvxOfWcDYfUM/Qs+pvve8+jz7vlet+7yAAAACaBh9Sx9R0d5Fd19GOWdNEsAS3ITIVe+u3lh+A59R0Ik+Zs3u0JVPjrz6Pbe/9T5XncHJsaWc3wjLp79+vig9Tb2ZvM28kbyQ3nq9BH5hrdFdcUkU3wa/zy6GvT3PhrxNB308wV713dSNsIYqLbdhZr6b3cM/JrynvvncqfuZgnEcdCx0fQE9dHyWvnI+VH4rXApvDH0WvT3fdHwi3+e+uN0Pvv9flHzJDqn1Nbzr7Zh9Qb72vi+/9r1IXSx12F4hvZq9kry4n/e8yz84ft/s2owcfOW9O7wNv4W8pB5Fvom+1+4BvFU/AY5JMza+V75VXmx/Le4xvrm+fR0lI6TKe7xxvZldOH0Nv7Kf/H55Mgx9qb/YfUXecb3dPg+8zT2tAdK/RXZ5MZu8fH3RvevvmH2xXvx8LhxjvQW/jlz3vvK/Z7yCf7e+Du+8+KJ+An45X3h8679ofeu+6H2AHKx+Ikz00SUjrH6f72ldW7+t3cR8jl6utzFgGb9mvig8+H2g3u+8pt9yflWfNV6kfRm/Un0UfOh8lH3of3YDG7zGvOmAsn/Q3cm8177FPzR+/xyx19teqT0P70J+J75RPxJ8ZH1IXCp8h72KfWe9Un3CfCx9rjyjTLIBpgF4AVQBeANtMlgAEAJYA+DMgADWvzgA2AGiAVa8AAKJc1B/ABABiQJtMDgCUgC4AKAB4AD/AXADBnwHTv8CvAEAiUgA5e2QA+MdkANIAFACYAD0AmABRoNDQUVNhn9tMqADNQGYABZ/hU22XWgBQgMszYVNCBXFiZZ+mQB8AVi9lnzIANZ8BgHWfhjP0YXWfbZd8H3WfQgWQ9HWftqGyAKWf4VMGlq9adZ9YWRH0ZZ++IB8A3PSjnyRh1lusAKOfU5oceKOfhjPJGqOfCCrhTKOfbZd2QH2fb7tCBYU7o5+2oYc0o5+VF6lro59YWfybZZ9aAB8ABZJnnyRhnMCbn20CMWv46Gefi59TgGefCCrAjWefWFmJIDEApZ9Vnx8AoHTsM8PLv59m6KOf45+3nx8AbnFln7ahzStln5UXr9Jln1hZjZ/o06i3FsBVn1OaqsBVn4YzYh9VnwgqiUCbn2VPh5i4X0IF82tVn5Bfv0BVn5UXqVRVn1hZO411n6i3QF/9n1OajUB1nwgqsQDfn4bvQgVQlf+fTZVl6JWfhu+VFxFbrF+yNx8Ad1fsMx43Ql+kX6Q3QgWWTMsz8q8fAH/Y0l+0r8tEX58zn9JfbZ/gX6Q3fF8Pn6Q3VF/XwPJfqLfPODOfpDfVnxs4Sl/rgPJfQl+MX6Q3U5pVlKxfFzsXnzxfnTO2oeoD7DPdM4Yzw6/OX3hfJq8GX01nHwDTGMszn6c+XzpfABeVF2vvXl/5+QViXl+7x7wACF8XOyRhnffOX4pHvABqX16Hv5/iX5kHv58sX8pfFRc+X6lfJ5/inDZftW9YWH2f3TMkYRh0+V9CXyZfhZ+dM4YzjoI2XwgqZ8AVX35fbZfMdDZf7F8NX8PvNZ8TQPlfdV/7gKxfgR81nyj0rF+1ryRhpQBtXxLXQl/IXyAA1tdCXwhfMddCXzxfTddCX5pfYtdtl4CMrF9k11OfdF9k13Ofz5/jVxNXhjMBz7uzk1cIKgsAbV9lHzWfml/er7Jfg0CsX7prF5+dX5lfGs+yX73AN18YX0WAJl9IgBJABAA2AHYAnNgsgGuYBACp06groAAGe5zTlADJAJSAYVPwAMioFDQsgPPTyzNg3xDfUN/pxGKzfMqg3xQA4N8iAJDf0N9isyuYnNNSAMkA1z5Y312gYrPWlGjfGN8UV0jfkwBisxQ0nNMAABrR01Rg8gC039AgaIAAACplHysglIDs34pAAAAKrkMrIPAA2kBoANpAeAB4APAAPN+WoKLfYrMcTGTfiN/Y3yyAIRyy35jflN8w3yIAqS5K3xTf8t8iAN04nNMTVwAAcnzfAACCAABa8yBhU9bXZ8feh1WvAADyrN+Sl0QYsN8g3+wzAADS/8AEIPofnN8iADbf2muSl0EA8ADZ4oQAeCyw33DfACCiAC4APp883xNXVa+UgBNXY1d63waysgDwAN/X/t9oAJsA8AD/wLgsYADwAAAAao1TTp8uALgs8ACs32LXrN9is3NPeN8E33LfxN+w37jf7DP4IIbfYtdhU6zfk+A83zWvXN9VrzbffN92QPAA/4BoACpQot/i32aCUt+w36Tf7DP434TfUN/V3yIAeucV3xPfl+wrmLDfMt9j35Xfyt/z32Xfit/L33PfU99sAOAHs99V39QAZd8635vf+98L3yIAI8t736vf298gAPWfF9+a31ffQcu33+FTk98H3yyARBiP30TfL99n36PfyzPj3yffKN803+wzCN+r38jfr99L3/Df6N9y3yA/Z98b3+A/5N9P31rfbACoRpzT9d+N383fiUCt3+3fnd+SlxQAPd8KAH3fYIAD3xLfGODD32ffR9/LMyg/Td8t323fIgCs3x3f1t9d3zg/vd/932LfRD8XwCQ/bABjn8g/8gAN35Q/6D/UP2wAtD9YP93fTD8EPyw/Q994ADjfId8UP2g/VAAYPzQ/dD8MP7g/8gD4P34AhD/iPzjfqN9139w/qD9UP5g/9D/YP0o/Kj9qP8Q/Ej8sgBrMXD88PzI/cj8CPwo/Bj8iP6o/Yj8mPzjf398gANI/uj/yP0I/jD94P8w/g99OP2Y/AD/kP9o/vD+yP/w/IACCP/o/wj/eP6I/vj9sP6Y/IgC+QOdTbj98P3o/ij/2P8Y/sT843zA/rj9BP1Y/oT/hP6k/UT8OPzE/Dj843+rfWj+WP+4/Nj+eP4Y/Pj+sPyU/Zj9kPyAArt/u37SAqLcgAN7fvt/+3ysggd8k307fP98r33ffn99sAHX779/P36ffwz+aP/0/W99DPyAAo3ujP2vfLICfe/M/V989wOdTv9+X3zM/hYBrPwM/8D8rP1k/ikCtAMkA4yF3L/3Lhz/HP0HfIgBG7ygzZz8EACc/O0w3P7Hsiz+NPwc/EABHP7c/eCwiAC8/bz+PPyIACwBL0w8/Hz+nP68/5z/U3yHfbAAiADzfogCeAGAAYtcoAEUAgt90AIQ/xd/U35M/IADgv2wAkL/Qv7C/8L8GQEi/YtfU37XfyzPovyAAmL+WADC/cL9Z37i/LD/IvyyA54DnU8S/pL/kvzi/iL/Uv/i/tL8BP2i/lICMv9i/lL8sv+LfNL+/P2A/sz9tYcnfCz+/P1k/XF8/12M/1N9lP+A/EkCUgKK/V98AoOdTlADyvyIAir8zP2fAaz8UAP/AEN9OAJwAOwAFAPAAVa//wBNX/t+gMJIrPN/EAP7fgQBoAGdg7D8gAJzUeN+dIHq/Br9eAEa/Jr9mv2HVlr/Wv12Adr+iP9LfqL/hAFWvikBrCFy/0CBhU2FT+Md8yiyAICDnU8G/ob/nnxC/Eb9Rv5sA0t8uP//A5Z9BAI3fzWCKQHrfkV8kvym/OLepLrG/HL8m3/Mg3p9i15bflIA233bfuSDS30K/QD+a31A/bABuICq/ED/AP1Tfsb+yvyAATb/wPy2/jr+NP32/WN8Dvw0A7b9wPyO/Xb8iAH8RGt/9v1O/bAAQgOO/kD/zv64/hL+9vx2/zb8rv/gg2z/TP+M/rj8cv9prrN+G3wAA4lzfogBQAGiAYVObTC/A81NF38PL6KBogJNXUb+83/AAUgBoAJMA4t8BBAPfud+5AGtMFz8Lv0K/hAAyQCgAnTNVr7NMIgCgf9NM6d+PwFNTaIBQf1Wv7QDTU2LX1QDQf8B/tN9639prYrOCAO2/ar9Sv2K/C789v6q/Cr/SvwrfjT//wP/A00ys37TMNb+235KXe7+lAOdT1t9Vr2FTPp/QIDW/Na/wALHfPN/GvzzfVa+s3++/VADGvwUArQBZ31HfYtcS31QAtD+fv8s4Dr9oEDh/xH/4fyAAmiA7v3/fLIAhAGs/UgA2AKp/at8uP2QAuH+kNyR/at8cv3p/Cn9X3zwgKr/6fxq/9H9ZP0k/IT8pP3Y/hT/pP/U/at89vzqAWn8bP/R/Q78bv3O/qt9sAEcAFn+mfzM/aMDnU+bfxAinv17f1t9jV1G/ZCA2v0oADr/agCp/Hn9isz5AKr+BCK6/hr/wAI3fa0Ben6a/yX8ZvxR/VH9JJe0/tH8O39rfxn+Wf4Z/fn9Cv25/2n9+f1k/6z+DP3u/ssCJf41/yX+NPw1/uz8v3wtMu0ymX2WfxZ9qX+WfPl+4XyRhtZ/9nyN/CF/Dy82fE39yn/eym5+IwOOfml9NOxef03+VF4Of/Z/DnxNflFfjnzxfb7tTnxN/ab8SMpufNHuzAIFfb7srn5t/pPsxawN/CT8xa/t/e5+Lf0l7swB0X2+7J5+Lf0m/swAWXxFT1587f3ef0gBvf0+ft5+vn+JfEVMfn/LorF+zT7+fn39TmoboBl9vuyBfsP8IKgN/kF+ffzBfz3/wX7hfSF+4X6hfm3+PT5hf6NPYXzt/eF8NAARfHwBEX+jTJF+4X+Rfp3/5+dRf/Z+0X3N/DF9zf8xfbV8RU+xfn3+Sv36UCP98Xxlfpl+kN4Yzwl/SX8df4l/f15JfE18yX6nofZ+/10IFggBtX9/Xql+S/xpfkv/aX5L/BV/6XyJfRl8ECrL/JGEUDCJfVl9g/5lftl++gEVfjl90Xy5fPl87X90zbZeeX+5fFZ8WX/5fYQCBX90zwV+aX90zWFnhX/FfqLdpKxFfsV8TXxc7U5q+IEVfZG/SAKlfICsxazz/lV/BXzlfF595Xwb/BV9Tz6FfJV8DX7H/5V82X9Vfz18G/3VfMf+8/9s3pP/3X9n/rV/5X1OaXuhdX6T/PV+ZX31fVLhtX0NfHwAjX6xfY1+LGBNfU18PGH2fs19jrS3/x19LXytf6f+8/+tf45+bXxdX4587X2TX+1/iX2TXx19Z/4WfZ1/7in2fl19VXG1ft19iGPP/qF/d/4Wf2muvX1+fHlN/y95Tm0yWAPAA9p+iAApAC0wEAKgAYt8fwJXTG0xbTLKAH8D/AHQAQGBAAAAA"))
+var pcbdata = JSON.parse(LZString.decompressFromBase64("N4IgpgJg5mDOD6AjRB7AHiAXAAlAWwEsA7DHARgAYBmAOjIHYA2AGmxEKIE8tsr6b69Mq3YBDNKWwAmMlJoAWMgE4Recd3LyKNClKUBfEZBiweAbVAAXTgAcwPEKIBOAYxAjYl55fOUArDRSABxUrLL8fhRBALoiTqIQBACupjhy1FIeXk5eRFAANvY4StoURkQQonmFPGRBpSIA7gQQlgAWPNpkfoa4INZ2Ds5uWd6+SnJafmFUZDR+9FKxbPGJKTzpVJlsnt5VBUXYALQlOuWV1YcNbM2tHThdPaxWtoeOru472T44ZsqMCkYKmwZD4NAmSziCWSqWkOi2oxy+xqxWu4AqyMOdTRt3anToTz6Azew0+IF2OXMMm0s22oP4EOWIFWMI28O25O+mPxZTYYAxlx4p15IFx92wj16L0GOHJYCgeH5PkRP2wZmpNFprDBQXkjCZ/IgvgoAWCoV4/F1+qaLTxDwJUv6rwcsHliqIyq+Y1+lFoUj8whBUgiUQNFWNfoD2qUNCC9BiNru+O6juJLrdSrJFNVfwmChNYT083kYaNPpNgRChZjfhLibtEodzydMp2GY9We+43kCj4MwZUkhfPDPqUPfkfZBs3miyZYuThOlb1dCszKqplE1shmMaUtdL4wBeuBoN3+/r4slzbTspX7s9nO9apkcio8nk0dj8YPvxfmvf/bgoOc62peTZEs6sqkuu5amlWvAxnGCYrNC6xpOyKrcuQ9RnMOFwHBs9A4qBC6ppBbDQV6lK/puWoIV+yHMqhsKbBy2ZYccwrnBxxFJvaKZMhA8TNHksKgLABD5AA1rALhOGA/I8KAABi5hLumq4djBapkKCdBRIWcx+FQSg/jpenyP60xBnMQR+IwfggXxjaDmRrZyppD7Zr4emUEEhY9iU8iOecPm0JZfjWbIPZ+HGTkNtornXuRHn3p2T5/L5BlBoFFDBWZmW0H5ha0HuQ6iiR9pJRB7l3muVE5rItCRPQUWDgoSjdAVTXzBQrWGfMJnxWB1Xqbe7ZeV2PpSM1fVtbl+WhdNtBBP6AXzHFF74qNLbLhN6XUTpM29f1NmDaZS1HUVJ4yLG9khTclUuVIbl7Z5B2NVl/lncZF14T5cj0CUbW2fdw3bS9yW1ft2l/MdLUg+d3XHatiN2Q54NVZDNVvWlsO6UV2WyJMnUPeiZbmYT32yEZQ1bVjr0aXjDVhfp1NSAtZOGgDAjA+tsX0Jjz2M+N734/Dc3rUFXMjlddA3TFm2Pc5iXY2NbZiyzy0nfN4J5TLFNw7Np09WVQuq6mbQEC4UlEHAsI0h4ABuUA2KIDYgAAsmQ8hBPMwZUIwwhaFub7BAAMj7ftAkoQj+YosZ8JZQSR/IMayIwfUsCH9C+3Z9CpzGwS6CoCchLnEc+4hVCB/I9DMCHsxh0E3uRF+jBBEHDe2Unldt7HjCMHX3fwp1lmR/3g4yPH2hBGOE/aPGQfDyHq0+332hp7FXerzIycL/+ZBD/Xq9jq3s92UoNcj0wvsLAf9CzHHI/l/v3Q0h3nfBz3Fcp+/gRbCBjfIe+cD4MBCDvOYQdY4+zAUoByeUR512CkIA+wRFh1BHlsMcG8FCKAnKEBO/oO733/vUSypc5jENAf/PcdlEEJzqMnPwrcoG6AWNnH+b8AwCD0Bwhus897BFYTQIE2CR66QYLA7ocx4xaAYdoeBDlUEyNjA5Y+AjYzz26OkZQX9NFr24XII+kQFGxiES3HRojH4UDMYYvukxUYMNfMFZOrc5CDxMtfU+8gJ5yCCHUH2J9BHrz/sZNmBCDEWInn6d8kQPw+JiZqKItiEmKMHgsMgSTA4c28XMSRQhfHdFoFQFJDCjJ13XkkmQixKGiIhHZJJoJ7Ir1kSA0hfg5BKACZEsuvcwkeM6kEl+/S/HzEilnYBd96CtxWkHQO38BDtILt0HsfVbHlMTr/Ce44tj6L6ds1ZG0iJMCmTQ2soiO7PwTkCQcjSjmtTHHk4shSpA7IEIIfhCctBvIeTNYZRD7LnJ7A5eBrS6C6mCH4d5nSqBfPybpQp7yOYzUgaPKpRzKCMD0JopRmT3l5WDKXWe2jwndIgcHReecOlrIoAgtJojqBIqORQWO09NHBXzlkzF8Z9k0k7u8mupTTmN1BNwkFe4r6EJpGKvunMRX8sYK3AIddM4irmNQMevzIrgl1JMhOmr16twBJQKQqSRmHJ1XwbFdTX59wCPZRgQDRXNwngCPQ/ozFN2TiAS21tbb222hkZ2rt3bii9j7Wgg9FhUHjlG6gQrU49hkXlE+8ahVUG9hOGcqbs4rSvtA1OpVWXrwbv4wQhafY9g5vGVlDd80LKUFmgIuhlAMJWsFGaf93xAQDJZetWjG1JoELMaBA655DqraIt8+dx2dtjcO7eqqB1AxISsntxl6h7hXRsvci7Y2sumNmrQ3TWWLs7su7NTdU3DsYDOhYA6pBD0HowYdj8j7KEfUfKFw6Jh9syNmmQ2L7nBR0DIIKj7n2D2bVo4MO8O2wu7QEVd46C3KFTgETONa82DsraByImSEkIa7RhhQCwhUrvgTQ0DWg56dJ3bYvdPsVVRDKgOk9W7SMoIo1e0EN7mO9UI5BvUg9SNYcvX6b9IHkPwK/cB6FAm55weDn6KDSqfYAiEIhudiHU4AiDrqEVDa8NHg5mx7NE6TOamCJ+iz87u3uqBluldvtVV6cCE5utV7l6Vz1NZgJpdVMidfRphQZn6OAakwpvzBmJOBCi+5rTXbhMvsS3esd3nQlpcbex2K6HQtEuc9myKW8pBZv4G+RQgXcP5broEZBwQdMkaCfLIKaaBCuaYKnfgyg2tlq/EwZQWa/a6VWnZJrC6o5gZ0YQ4ztXLSNYs2hpQ3WR1NTjbGezq2O5Qva7nQzIW6s7dnZlt+dX33JcA2p1bY25M/qm622Fd2QMjbqFClLomptHxfThhZZ2Rs/Zw5y+boixsPuK7WMqw3GVmu3UtydvsYeHueywqbWHkfHtZZxtH8SjOh344joEQQTtBdS1NoG9lbOSfk6nP2SnY0o6zTGF9cXLO1eZ4POLf3fPM+xHD0nn207+1BN46n92heAKK2LkDRdZipo++poXLO8e6l01XeYQJCmoYRzGSXXm5srfV/8+Xdm1dC7ey+lzB3C4QqfYPAdDkpFFKF8blezVIedJt3r6rkRlHcqF/ZGBRHep+5t8roHeWm3/1sf+lHB8TLgcZ//d+73LIDcrW3FP43s37bc8n7plvTfNbbnw5O2uM80gmFTmrUe25xhw2zw3bdBATAZ0XybzfSkk95mug+O24tEUYwptu/e8ccbPf/Gx3fr11wfkDS7AuQt17x0B+7PDW2lsizT1RiKINXeCxPfJg9U8lL47P1Re9C/hSxxPnhl/7c593cPo/8nKO953wwPfxGO8apkJvg3B89e5eQ2qiCCGOABoBpi/O8W8mIiYB0B4+TeUC3SXOZ+KyPCuca6Cuh+m2OWW+a+cwY41AG2q+dk7iesJBCWxSgQe4Ju0uqO4SJosw/a8OGetATB/+YGymTSFAM2/WEwS+10YO/WcYg2TefotBK85aYhsyHyxO4OEB4SO24Bm2auShNcWuOeVGHSzUdkPGtAg+h6SSsUxkou+Yp64h06fAPsA6M+6BUaq0KhT6B+1Bgg8h7WpBw+pUHMceLKZqg22BLKQInBdh7yiKT2mOFhYRDAERBhT+BKwRLBBh2h6Bay/h8Gqhxe3hwejeSSbh3ejercMUnS5mihxRfCAG9BRR4yFR7GN+TeIKvB+h+O5+FyQ8QegRFymBcWnh7yuoWwbeVR3QAQe4Dey2E8Ix9kIhFa+W9kNBwWDuCaNcbqVhPG0hGe+mGas2NercEQnSmSwBTeex/oQgthPmYSIYVWnR/AWgv8vhCw8WJk7aMBa+PWTulRgQamuxNRBx7eFxZGsU+uNeE8/AMgTxOR4x3QbxryE2/xdK9eKmHW1uUJOgVyGRjuzKDxiKnBJWZUIJjxX+Ie+KKJwUgJPudKxJDxkUJxiJwOtefslSUumRHefsfAuOhxE8I2ASsRwJ3QfsUQqqiJquxe/JgcgxPe5yDIxODGRhKJ5KdRURfJ8Id6G2oRSpApAR++ZOsUEKfB+B9yOpbJdBLxBpDJccQJzhL6rczO2CEW3+YSMYbhKhuRR8pQHxLpmcdAR8mp9pkcnpJinBq6NCnpYJPJhhTGIZzSM0ixGafpXQjuSRRJKi/p3pGRdJcZYGCp2OfgiEzheO3ODpvCHRvGpSrRzOASzRlpn2OZ06tR2a3pQUE8NpdZ7BQgGKNZHcIuhCXSucHejpegmhXST6TZ5ix82c6x+Wnp8JbeE5hukZcK0ZaeAh3snpICpRmo5xGZ3SYhZxoSK5+SgCGRHp2ga5dpvJq5vs5ms5fpB5ym0xYhvq14VsNsdssADsmoIabsHs3s/oG5XK0xwUkcv5g4Qmae9Qwq3Kv5vBoSIh1AfUkFPYQMMJYFucCmHMoitYJ+OgDAcKKy6FsUu2A6rpe8QFMUukZex6wUEwf8+F5Fi2UaWG0i+FYO7WY4OZlc6FDkzCDcayxO8YaFiFQeAG1ao648sgLadF8cPYpSEFQFAQqyqe0lcFKiv5gc/5Pa/yQ8vyv5AEPaxFTFKqweg8raRSv5Cl2eDFJlP5IxCS/iylkF7qQlPFySslGcG0hFgGol2lAInc6lSlrlwYgQNJtlsY9lj5RIz5Aab5+I5o5ILsX54aP5dO2xgcoesgyVzlqVmSSVCgiwJ2gMe4GKwQXpoFcyaVRYeU3FFmGSQg3spSgQJhpx3maV9V/oflG5fuP5u4vBFFBV/6QFNY74WFncLVm8eVChainVoIPcmVNV3K9VbKJ20lc1dVcwWgMFPaWVKi0461vVk1xJ04bVvx7B9QNC04ukpVQV1hRSC141HhhVlkdVgMjVwc/ic1kcWwesG1b1LV7BQ12eXSk2NcJVmh7BrKb8wNdQyFRUnS92wNR1TV4UQNkY6lyR/VIuEKyFvFUQpCkNUJNhGlM0zKwNlVilNB6Nn1JQG1y1LVz17VW181Hi+NCS1aD1vyn1tYVV1aRN0in1dcHl2NZ1kwPV9FvMFNwtG1SNf8fNd1RFsN9yHN/1R6YNOC0tTNoFgNatAgL1IhK1GNVY2aV80tMUStA6RtdVDhWNHVB1yacYm+P1NtoOVtDN4VVgkVr575IFn5YaDg3sygsYcYSgQdmioIvy/tv84OpQOZb8/t+xm+Udqtkc/twqFFXQWwSd6c2KqeiUggGK/trGmhm8U89y+d7xmiQgNJGd2FyFiipS92+dc8mhVCZqxJ/t36qecwgchGVdKdi2RkfkpCsd/om+RkIQMdzOREHdG0rqukiEgdwdCcAYONKy/t8CJoTVa1sa9du4mcvxtdugJdE9B9R6+9UKP5VCg8J2o9M9t0duJ2i8dkRV+SqtJ9oiplGqac8dGuhyZq2t7hmi9kP9J59IBNJ58g59nxWBi9A9eF+SNSBN19b8v9rU/9i9Y9HFwD11I8S9NCv9tYdFWCfupl2g+DI9QV69kFmDTdOgrUSDi8sUV9Ogx9sDdA8DCSGqzDQFF9UDp9ZBNM4If6G909SDhBgjlK39bi/DQdNJBiCwzK7UFJX9FdxJ7U9Ihdb9QFcgwQHlJDTqSDkwRKC9ujv8P5gNOZC9iDHFZjQdxKEjwixM4IcKNjsjudplYN6li84lKlJ1BDIcQ8QFfoT62ddjNFJSryM8ITP5445jFj8wMDpFW40y2D6DNFaRKCiysUN9K0QMFF/dy9AToVUDndRDBT9QPDAgj9YlKMOTi2YDCTug6TADejHF0lUckdITCTVFzjfjplMUWwe9FT6N+F/TTVvDaFK08J4OGqtD9j6F8CQMRjHT4lxYHjkTyzdQoFCdSD8lXK7DG53dyzbVU9ODpCOl1AuTwjHFDq0yGTKT1licqDxjSDR4ygqdazT6Og90oznzidblJofuhDBzHzsgWq2D8TblwYVVljNFLzqtyTzcP5AINj3TWzHFSLyLtjodQFSLkLtTHmry2Ld0STjcachSP5EQ9QvxeTuD/AiwoF0LQF/J3Q3TDL6VdAQcZDJzeFfsM0WDCcXd8jPLGhCDNBzB2lAOvj+SvsjL2FMTI8c0SDtL3SU9CrHF/ADkYr8rnD4QG0FDLj8jFLerOclT2l6rxkX9/jOrTmwTgDSDTLcrIctrHFErFr4DILesOjPzENiURD8L3r4yDrm8Y4Z1s8eoxzKTH1VCJaLBqLlin1tidxaDM904ncdyR61LuNsijdIrE4YOkbAgZdRCV8GK04QgNdd0rj+b8YxZnjld01aiabmilr8bfUbzTrWtIFX97bH1r4k92edTodeCnryj21cgAYmFET+cxNY75lI8egYrPbQ7jDubcNvbx9YL+Tg7nbLBrLLbib0LFt7L6lu7RUa64j7bh7R8qzU7vNsSvjtbB1p+fLA7wNnK99SzwNmcJkizF7YqXpvWdSmTENyas9izJoqtdV1ahGAGHDu2H1EqMjSbkjb49SiHTzlcKHkiLLdAvsdVpo76O7cTm7cKCgb22eu7yGy9tzybAQeh1DXLH1IxQT5H+zxNTHr+RbC7zSd0fLUr0tlHx7NDE7jHHUy98rMz/H/49LTDcH3HAcX9N7N1+HmrxrFNAQb4mzGj3HacYnjrzTknREqz3b3HdHoDb9dVAICwcLSHGHlnNTET4HyHoJIz1HENznaHgzJbPW2cL7/APV77xngcvM5bgX+mEWL7dn1nD7tVoII26qlz0topunGbKyYIdCU9K7Ctlouzc7xbYlOoOXq8cjvNDIBF/bBbdbsa8IunL7cXPnH7rJV86jgXfsm677zb0ckl5dXj810cuo+rvNfXez87JbnXG1m9ebsXg0qDKXH1jXvHCXc3dA8XQH9jJkmo11AG6H0tuum3/W0ba3u35bzbMYvsjbenhy63ggHngXu4DA6jJ3Aj67OcPXqcpQ8mwSFbzKIcdKHlVCeX7Nu4JQGXW9Ctd3rjG7Z1jpdLQjq3O3Cgq04bybR3nLMDrt/Q7tgaVUwaOw8VPtsoUTuVfA42DjNc0aqTcTnOmQpPFOcKnTj8/FzADjlkM0EwnTpS1FTP7UfAe4dP0URPjPpPqV8Y9PxP0wzPg4CehPdcYvXPtkDk/oCTAYVPcvFBlAeF44DPJPt0tBYK7PrKjWUjUQ6vovgvt0nc+xpv2vhBkQYK9zxO9QpxUjtvlrv5DD8FqvuvQ89z7vTv7ULPCeclG0jvwg/DsNgffz32/aYfkvEwiLHWnSNhEvrP3lCfe8nvLvplmmuguFqvFvivblQcKv/DiPEfHzcS6fJfsfqfTj4v5vCvqOHzqFlf3PtPaFYX26yfZfR4naSf/v1fhLtfXPvbvP7fW4xf7U87a8g/Uf1Pk/xvfUg/OZdfxiA/blFfff6QbfhLoKK/NDo/hLzfm/ypTqligVfGnPNPB/OrQGWlw/YWKfQFFWxOHvXfbPOrMvZvI/xkaFEQs/9/U/GQE/0p538HGnqPXh/y1578TEBfQKrGhD739iYZfUEsv0QFr9z+UA+/n1Gv7n8OehvHXkbSAE6sL++Am3qyld49ZMBJfBvsAP9Cd9ze6A5/ggKr6P9IBsvagfsXJYfJ2BDA1gcVV0gT9bI1fLgcD1z4x8+BDIHPg+jAGEDIKDIXvh+Cv4/8ZWcFS/v3z4GvYJ+BjFPl1VET/83+2lXXPoIIFb0yAug01GIPUFl904Ug+uOIOsF4JE+ig26OH3f5FhjIBvfyGHxoHutyMZvNhAEkX7usi+oA26GImn7BDjBQgvgTWCoE68F+eFGsHgK8E69M+A1RwS31EamD0hFg6QSYLXh1UugcQoyGv3qoadMh/sVgfVQnCeDVe90AvvVWV6hCoEaQvjOMnoHRCI+jQ1AQ4yQHv9GhxgrRrII+qbxkh9/HnsoLaHlDj+AffoUUJ4HaCuhpQF/n72/5896qtiGaHkKGHZD3WkqaAegLPAdDzEVQ0oLYNV4IIIBGwlYaHxcE+D6qOFfwZUKl5tC2KLfRYXMPBAKC6hpQqhN8N6H3CKkTgn4VUKBHvCH+CedHu0H9Qe0g0CIXHqGm/L89P+2vRCmnFP5K9jBglf0Hz3Qooi6+PYEIL9G0q7Jah/PefJMLxFxC0R8zCnviK56Ei4ULwqkTwOrTxhYBZFCftJT/xBCWRZvZaiZFd6ki1B3I3SLyM16siPMqMK3gSI3KCi3WbvG4QyMTjEig+vvW4aVCZFuDaOSo/ngsGlFuU6gzA46FfFVGGjdR6FIkcyM0z/DLRWo1Prv2VEUjcR+mLER1lpGEs/BqIy5PKM9HUj8wO2BynoK5HWYxReFDvrKODAGim+tokSmaI+ZxhJRWw7vuCB6HoUoxsAvzucP55bAwxwA/WC33HDwkiBgVAsX3xBR3oIBpY7MehVzgei3K+wp0X+hdFfhJRVotwTaOBH892xZWHVnXUsFxjkBb9LsemPtFcCahagzUfGJuJjDyRxYuQQL29HOjf+7Q2UT2OAFDwRxjI4kSINjEqihxbwvvlOOZGslZxdo+MaeLJHoUxSVYnlhaLZHRieWNYwcW4P5L+jkxbgqUsaIfGZivhW40Mer3MHPjeYOItCjGF4Ihj1xbLYUuWP3Gvjta9A7EZSL9hCAQxREQMTK1QmhCBRt4hCZGPZFoU6ce4j8YYOwohiSJOQ4CRmLAk4d/xN413unD3Hvh6xxVLCdH2GY7jfBZ47cQ4I8EiiAEnE9wdxIDERD3B/o3MSb0iHkSCJ6QyegOIEkODeUr/UcZxOuHfi4J7NZYcaOPFx82hUQdSdRJGHLckx9ooydMOcEvjNJvYK8T+IUzVDxJPI1LiQzdFaAMJbQpoexIrG+i2h9I8keiJF4+ThJy4syXuKgkPD/RYUrScpKQlwpVq1XfiZFL/GFiQJkwhasBLrEYi2hl8WUZ4iuGzw0xRYtyWlK2F2DrxjkoyYeIslSiGhGqYSRRPrbMtIxpk+thzH/GGSWp94gCUEOnA1wbJIkogT1OEm5Tm2VCTqRlICmHU9xwUhqQVI0n5tVB+AnibpM+q5DSpS09msYmAn0Sbq6QWae1OnCxwTJZolNlROamls3R1Ep6vpBKlNjQJi7CCdhLmn1t6gN07sWdNkRujpp04J1JKPQkRDvp/o7FHmPrZsS5+fTY6bZGAlpw7pg7B6Z5I6gwyVpUM/yXGzHbCSwpaMvqSRKul8TFp/UxmjOElESTupTNaSQaM+pyS8hlkxdkpL96WTD2vk88V0PChxCdJvY19v6K+klJOpYU6nI9N5l0AgpzYuySdXUnjTpaf1f8cNJuqSzkprk/6aLOildTUuRUOqTJIxq394Z9U4GvAKVnayWZSYgiXh2unySwphIqGfOMg7B8lZZs62X7zZnwdHGV4h2dxzhlz9So6skjuB1lEb5up8lYCVin+n+zXpKkroS2lmnEzUuElEMdtMdlXw+p8sgaYrHUmJyzB3HR0abDOm0czxLskjp1An4ezyZAITYfJLpTeSguZYqqdrOLl7if+XQ4uelPnEid85j0r6dnL6lhTMMs0zuYTP5EpT1hKqMaU3O061ys5GQ2CdrMHnqSy5Vwh1KzPBCeyu59AtmRZ2skJSzpR4HOY42OmaZhJ+ohoX5y3mmiuhh8jufaKhGY9oq2PeEXFURGJV1eGuRqkzwYChiaEfURlHbUUEvyiUkcd+UCH+rPznOPmX+ZIM/mAKAEwCh+UHQAWIoPMhuKIPCHGrgLcxb8/kvUFLSwLbixJBBSkgwUvy04eyBTDgr4DvZYFQMt+REGjKjZBZkCnBeguj51AaF68C+TCKx4uQcet8hKr7XIo0NuKpPDuDHRA4wlmeukeumsgjr39XEedNZGKxSGTBRFJdcRXwu54CLK4PsXhaQv974NHqPC1tpotsixwk6QijBTrxMg0J1Fei63rqmDDSILFsiz3mYsHpKL9FWiFes4qsXKsyWF1WiVrn4aVjzFOzf8mH0MXeLcWVikrHnSnkHEw+2isOnPOUVGQQl3QPQcIrCGOKV6mGFgPwzpat1MlefBRQpmSVBxUlhBdJUnWDmzpmesS8pZckkWxK/aR4CRTEvwRh0a5QmZpXnQbmEUpGq0ZlEfB0DpNnBpS7pIPRNT2KS+SSgEBp18Xm9JlvYGClIzKUCDcqCS6xX0ss5l0HG8JGOhstSVaNeltixpcotfCqK/4/SicAsv94FKk6UywZXUpaU3LBZlyyYNUuWX6wZl8i9KoUq6WVKVFkKSxC/IYbRKtFDy2BUCr95GRXlL8h3sCuMRJKuSQSlwVCoRWwqyMLSv2p1z2Voq86mKkxZCvRXULileKtZbYvTjjKdeByt1m3XJUvLQV1Ky5fiqNSz0VlLiuyHSt3B3KS+UK07k0pBV50OV7SvlZZBYUvk2FiUDhbADx5IjJ+1KNaZ81k6T9OoMytZJBV7Z3FTYTqIqmOyVVHjwQmqqph4kEBl5+evBTRrwnXYmrOkuDQGHehMXJpY0KjG1Zq356DhmEZqxYBauvFWrTmWjOlMqM7gEsHGTAZ1ZaP1VSARVUVT2hKqlX3yLFvKxCj0jUXGL4Zq0N1bovjVqJA1diy5YSJRSKKNFS4xNWcvcVriw1ftEtcqNmBGKvSqS6St6rcUFrZRJkA5tmuNVerZOca5Ra02rWWKm1e4LxckuYzKr5VASiFIipVU1KwldfUqGGpqWyqNReqrNfEs0UTrvFRK+GSaA7V5L+esXXJbUpdV5rClmGTZe2tHWmpflhI2dWuqyWhrXkDS+LKkpnVZqplzDLnk+s6Wah3Ctw1decvJVrJ61jyhrN6N3UqJ+lAYWtVuEeXga7V/sNNecozVAgW1m8nNRUyyzLL4BwK3NXBpfXdLb1H6thmDMzUfrpqbarDfXWLlfqnRRax5e8tgmIb1lMnC9bBvI2MaqZkGt5ZyvQogbuU/S/SZhpHWjKnlpG7Co8oI1vrF1TKwFZRu7FXqpNiK99WJWhXSbOKPGlFfbIk2Ka1N36ojTosYXrrCNAanFSkpMUKbexemk9dJX7WkqhNeM5tQOrJUobDNimhzW2tM1+0eVXaz4lmoFXDqn03mlld6Kc1h0fNsEoLRGthHXy2IMa7hXSljCUA8FI2bnL/McpPzqFoIHzN7Fi2RRQgaWpLVinGQ5bv5eW2LXqCQWwLa4zKWLbGnxrgLgohKP+LFr4SVL8FV8KFOFrFWBBo1d8mLShKvjgLUUGKVlJqEiB4KgFg28CSNoYURAgYv89OPGF8WAqZtlAIuEPGNUvzyFpCIbcKlIXrbj40iLbZNup4vzWo9W2bcNpFrgKwUlW3XH1B238l4klcIbc4TW38lWt9yIbeAgW2JbaFfsKvNEsYXpbBtyVVLYwtZSELf5vWwrfdvq3tar57Cm+ZKu60E9RFmobpDBqC1J1bIIQJjUFr9rGJFA/q2TfjoXXzM86u071cqMPR9LCC9G7TYEhjpY6HVcq11W1r9Siq4d4qhHdFuR0yr/6fipZYqqdx1CQlrfdVUitBXtQcyQujpQausRi7EleFQGGahcX+KfVSyENbIisgqUnVxKgJF8vdXK6PFAu31TetpVar1dJis3cKrZ2Rq4RUWpHWwDx2o7E19yvOozt+VW6zNxO13Ypu90y6w65OlXZSsx16qrNqvJgP8pD3E4md+Sr5VCJSh1QtIWsSmAIGoCsAiIoVI+N1D0hERzQQgPQe+HNgEgOYIsDWMzEfCHRMom0vPbPAgnZ7q96eqBFWiL06J5Ape1KPVAr2fR3U4HdPYhR9jZ71OxbPvQWzrDKwEoxetvVDFxid7vIPofpS3WBCPwvSY+8mD5CH2zB09RUAffTEbCt729ieyaBlGWWL709DqYMIPtR2b7sArUf2ILF32PAS90+pmLPqmjmQe9OZdPT1gv2XRMoG+wMIIFYb37x9YEffc/tFjl659Okc6uECATYA544IMgN1HqrzbBwgYBA51Bb1qxdoL+pPV3t8AwHgwcB4nFomQMP1FgMgVgCQbnhYGD9MMZPVXoEaBx09dOA2KzDKYfgb9rBlvZ0in04xcDR+yvSjqDrMH4Dm8Ng/PomZDwqD4hng0/oiqsKOdnWrnQ7ojR6bttOWhBVxToxJ1o4GhpnltvSpdZCV/8w3ltuB4l0UJxva+MtrCxzxDcjC/iphQMOncnUiG3Q18OoBdxbDpW9w8yt4KCAneQ25OEHSrr/Nl0thp4tvR0CFUvBhh9BCFnzqxGDD0cWsHRnc16wnMLhwEEwCYz+13wC5TQ64dyOo5/aTqBYPRh8NuG8jE9Co9Ty0NpGaj8wbpGHBSMfJKAE+IemDs0NETdQ+WfIxOCex+QA6FdKgPHuhiax8D8+/HWEAX1IHf9KOmwiCGSUBhaD4Bsva/uP2/l7cIIXggI2RhTKWAux0Rmsf4MQHNjQhj5qIe8WrGFjgVByLMYdTzGQDyYbAzeA2N4GoDjB/rscf2MLHZAOHMIHsaDqnH1YHez42/sYNLH4tfx/6NMcBO7HBkoJnA+cYhNbG8lyx91M8bX3TRDjsxrE8ifePgnBDjUK40cZP3YnuYuJjco8biaEmE99BqY0dDxO/GQTdxlk6anqT0mJjkByEyjp+MUn69CJwUw/tYZ0HJjXx/4A1XNCgZdAHMbqPAmlOsANK5AuQ3wbBOH6Po3YDCjKZbSuqFTIKYyMqerSqnRTYBs4x8ZJOHglT2AO/BOGtBwmdIipnEawE6SfMh4ap8U7yeP1jgdTrpv4YHANN+nbTu0j02ad4NemLjjUWOKiSON2nAzCxmM3SjjOhnV984fiBGfWPEmtTo4aODsfjMOmcTTpvMymfdNpmnoj+9Uxj0UNRqVDXC5HY4f+QPonUvUJ9FQCrpGj+0LZplGpSroyB9R/kQeKmM6TYo+zUJaUkOZKCbrEj6cYnF2Z8pMJgtNDOeHqGYBDnDOY4Fer9qowE6hznZKzh4ZwSUAPwe57kktsYWXxnG651jOfkYUmRP+a5ygZZDTnQrc4DPNc2F2fNJ0pSz54QOufSy6gPDyZ0dB+d5j+Aw6I2akEafXOdRN1Hhk4nRlAvBqBFHh+8++dPNQkHDnXNSieaPDYpbVHhoeOBdAsHoRzhFxQJupIsIWsLegnC6BdyQoXqFD2v82Mt/MeGWe/gUC4HM00blH4HcLi9soguVgRzoQIc7Kl0geGo4z5+i0ICYKSWoLolqZea1ijyX/Ail/MNW0KUjZXMlBoc2nHgv6jt0Q58xjL1Qu4XRET6SFKhc3N9g9zllni6qkhSgWTLj8MkPJAABmtQSM2iaEPh04KcYdPZvHCHlQqTR0E5diG+gtnAhg8T01mc1P4w9IwQeBI1mwAtmiaQUbPREC8ScHsUuqALOVHTN77MzFp7M+LHCunVWAUVrFIWdCtww1qhnWsJVaRbKB0JsVkq/FYYNgrsrlVrpMTmUAhXZYmUBknXTHCVXsmY8Qs4VcrM26It8O+3fWcd2ulrEt20IA8Q9U6GlrTqFa8wENK8pjDnpIiHCx1LBRt8B132CLh2sMkxwoRpa6jGcM6lTCfhz0qegWSXXBogcCMhqjkanFjr11uchqiu0sBjr9ke7EHEFkBh/Iu1viiFjBvNJMEa1s1OkY/Qa5ujb1x659YLZ1G0bZPDG0DFHTCBfracf64nDqD25gbp1wggb1OSGl1qyZQgnXG6RvWNmC5G8l8KyMPE4wBzMGyUAmDU2lWIQPKKzbjB6s1rOZGG7ImLZdwEbrGBTGDZVKtHpbG1sG/ZFRui34ErN2Gnch2v83SyrN32IUe1tfguba1IkdGR1J0pW8f8ZW1PEaw6kNMx8DW5nClRM29CnuZG/Lf7Q6lXV69Vm3jY/RvXvbpCMG8LYOJ23Xbvybm1TaBvaXOcKybmwzchv8lbksacYzPp8uNQMCDx206zUpODXVETAayLlbyjYmprgQby1aZ9AZ7uSrpnO91CrvdAerAykuxWbLtxXGTkpzO4XfSCKBuobpqMKle7vN2VYrd9q+3b5P12u7Tduu6UHrgD2p7opt4wyYlPj3Z4Dd7OzQVzuGwGA8ZayBcj0BD2J9i9nk1Gd8Cd2a7G93uzO3Pv72i9R9tOxXZ0gZ6TE19zAwsaftZ3wkpW2++XZzPPghtj8asPVgKiw5PmgD88C8f4h32BDv99UENoLBBhBqwD/++aHda6huT99mByA4AcIPNsSDx0ig6LDymzTUD1Ew/bhjZyKDgYIOnqoOPssiDwIah/AnQfQPxYFDtA6wG6RfDaH36FvBw9+3lnh7sgGax1rNR1n8ei1oGASEvLTBqHlWODJHEkcBIEjzAWR0NWMOKOLDMjm7ZFBUSSPqKwdah3fU+x6PqjWjiFGxRWQmOSjKj8CW+BVIKPdwSVlQJw/7V3IHHWiddi442YzR3HSjoApw8DoBZ3HqyRCwE6cwgFJHM0GaIgk4fms88kj5QMwc4fQzc6wTxozI4ZLFIg4aT6Ryo55bTxJsCTgtHk5w7/V3HUT0siU/8Axp3HHPLXJw7pRER8skj2NKMZKeNPeChuSR5EAGL+ROH1Tnx5/kXWIaSnCwXgn/CscjOGnW15QKnZYedXADbJIE8YlajdQAk5iKKLoGW5kxS7KYNu8veP237xs2APcB5gkM6R1nqMDh/hx2ct29no9g50IfWfJXeHJzjtGs6gQkLKDbz3B8Q5/v4xnn2KV576c7gfPp0lDjh5euYekOYHbaQEPQ9dMMkared04PSHYe2mkX0Ly07C9OBhtXnDxQvYmbToQvbTNxARxPqEf7PvTQh3F0C7gMgvkXW91F186odQu/nVLk+6OCCsIufnaDol4LJJdXxfnEDvfSQ+xf4xaXPL3UB1gVPEv0X0r3OFi9KudXJXrzuyEsllcCv5XyGSa3c7FfKumTfwQFzy5R15QwXd6El6a/JegH9XHVw14Ej1Umu9IdKc1yy9mPsFdXgj212PZ9PcvXnVrzV2i++cBv2XDz6l9Gb9dwGCYqJQN26+WMeulXdryU6q7gMtn7Isbkl2m89cUvvXjziN/C9efGXV9tVuF0G8DBFvE3Prp5zTp5cVuFj6zi1+i7rciuugub8N74GNeFuIgjLjt588zfdvK3eb3t469edMBLkrrkl2O5iuhuNTVbxqJ27gO36wzjpo132/RdLvrXrx/551YXcngtnY4Cd+i85MHuZ3KJ8Vzu5rf+vqAND+t2u+DfXumHp7ok0m75Mpu93M6jN0e4ffZubX27+12++WdcP+XZbwDye5bdimOX6d8YH5x2OcOi+xblFzB6OMxnwKP7hcPIdndDvczlyZD512XdFncwJZjh5aC8NtXMP7bn0CgcWB8OC9Pbyj4vGo8nPTukLMj2e4NeSnPqJCmj8vDo/QHe22wah5ZEVfhmMPbHl98fqHihVqY17/+bx7+CSeKruxmKK21Y/Pu53vgPS0TBk9jg5P32fMNJ+U/CfwP5pt2jWbt3e0kRCT9J8wEWDzKBivjowywFs8XL7PQzueOu1s8J5K0ejpxzZ9fC/RpEkz7dLZ7gzxJ3H8zEZ7Z5pgkJwvvn2z6TXUeIRNHfnphjo+5SKPHPNnmnR3GMfpxrP+epRCNW9iROBiiCfPQZlhTBPin+eqzkE6GchPgvRkBphPis+5P89XeeQlV+YP57/k8T2XNE4/D57+rqToZ3U5sJDfawyZ2p3bWjITfXJIWbpxkAZxDfebujnetY/K8LA3HQziL416kfJnivzHsrjZ/EOPwJn63yL6d9jSHevSY6DPZcMFtDOgQbh4QFXffBvxJHz3gIhnrfAZxGAczmF/jEWenRc4RtsF1c5v2EjVn4Zv95KaOeF2GQ0Pldw64h8tnY4tzwR4uGrPs7az818RxGla+IX1n5rVzxl+UfE+m4gzjR+u3WfQzvPjj+w8wFp8BeikQX6YOs+tRhedvpjpn83SvYKYfPjP9Z1Wnkdufkvwvk0MSTJ9AF1nyZkajk6J8apL60GIZxU8QQ4Q44lX+r8U5whOo0dXTvL7k91/NeDfUjon5vH0n3IinzBnCDXCCQLf+vlTnCB6hG8tPWUWuZ35N9y+fq2nnv+b+456fJZnfq39Lxd+3Qa+tvlcNn0z8She/1MhP4L7uBCAi4Ffif3KkHTW+Ahgo18SRydsbJDO9Q2f0IJ97fBLbFvvTmzzWHIznfiwrzTIN09JuJe9Bpo+vzyoz+h+4tyjyRwzZgS+PkvDfgNQ76AiM/un1f8Lzz5L8M3x/G3xCDM9N/6OVAej971H6S8eek/TcMY7D/HsVZToIQBeec9XcbOqDHsjHxS6x9qesPj92jtZEANzRwfa0G/X5yR8VRMfwjpQ6I7x9Ii4wGFXJ3eg26h12zI0S3BlHP/zt9XPEgyiNxsP/w9RK0EgxCMVAaAJZ9I4OAJ58//BgHpRkApF2sc//VtBi8gA+ALXMukNRxCwIA5L1ytgYYkggDMvXKxGp5fKGh/9ELGgOV91Mb/0fgBvQgLiY7IQZ2/8xEFgFysE7fLB4DrPfgJN9kAs1l/9fVGFTED6kZg1ysSNYw1YDSvE83SAQ/aQK3QtcIuzj81Amb1Etdpf3yADbECvyLtVA/ANQCx2SPz/gUA7AL0CDvegLYDKnMG1zgynegN4C1zWRHXpuA8QMYCoEM0GkQhA3/03op/FwOKcwbXCkmxFA9gNCDG/EgJI8OiMG0MYVEb/z4omoNwLgVe/AwKW9BzTumiDMAnIxGdHA5P2WJTA7AKoQFmIQAB9z3e13VdObSq2Qxn/Et1OB+mWoI+RT/UA3P8l7Cjwuc61RFzB9+XJoIxdeg4z3P9L5XHws975fwMQtnPSn0ACqArv0mBpg3IMgDpgTzwEJBAhkji9/PEyD8CsAyLy0YC7R7ysDdg1hn59cgggPi9iAxYP790gSX0SDWSTLwK9mA6QO0M9vQrxV8Igyp3K9vHGYPVZqvIyHCdDcCYL29IgDmAnxAQ5YM7pLfBTB4DfggBHt9pA+wLK9n6Ig25Qkg933G98kLQPoDkg2bwxD9Akg0MDksFb2RDTgifxaEKDSwJ2C9vVZFsDDg4LxpAyglEMpDlg0Nn+pvYWkOZC9BQcCeD8vYBi5C7A2SzrR7vOeCds1A1zE/QM9JgCacAQ7Ljac3vf6gqD2PPk2qCQfKHwP84XfoNB9ObHgy39j9aVzhRKrRHzVDGgh/zR9n/XZ2GCzPSLTGDuFMEJUcTyBYKADaQfx3tCAAy4M8cSGVYIBD1gxn1OBstMeBJDrHXF32CikdkLtDQxPALgDfPU4A5ghPEgMa53QzrTS9FgzL1RdHglwOs9UwnLxYDaWJQKZ9EIL4KeCdfaHn19uQo30dJRA9MLLDeoKQOCCbfU7mYIFAnMPYCEDBPBG9UQjohbDMQpIJ0C8w4bTxD+STIN7DWw24LyDw/RCAsCAwkZ07D5vNkK8Dw/Vg1ZQDgucPZ8UJR+C3hCwm32jg16e5HeD1fVIzO81AtEI/ASDAzDcNpAsFFMImfVrgZDcgvknXorwmcHb9kw8n065B/N0PewTwsf3wDfPE8O3CoQpkIfDBAN8CYxQw6g1t4Dg70ODoSDaimYJ3w8bGgi5/Z8Jl9wJDwJmCRsQEgfQEDSqjfhv/C8OvgsI5f0sDYgj3xQitvb4JHRmw37UQjawlgGgjfAkMOXCHw+hCCgFQ8TyedaOU6CFc7/PoIf8uIs0Lud2g4+yg8fQPUOshO4bZ01d+g8SJiJtQp8ktC5ra0OR1bQin1dDHQzLxUjwA+MI/C1qT0NOCfwtaiQDigqcM7pgwycPD8+fCMMgiVAYXwuDHQ8X3yQbgxkOACZfJXyzDSwxX1jMivIyPD9Y/fsNHD2fTxi4DM0byICiEeG1ChDGInCF9hwo+EIFDrI3Rj4AlwzbD6N4ot+kkQGIkYxSCNfL4LZCAIxR2ojQw3P2Jg9IkfxtIgg0gLX9mjTOB3CeWXOCkRK/TgLPCgA2egXIGonv0SDiI8bzb90g3cMG8awHIJoiGonR3CDGIyfyW1bQ3P2FDQQn4O69Z/KUPhDcwvR1QjDwjoiX9nA/EMHC1onCLQU6UYeCWiyI28MSd6MfKPmjmojCPrhJotei9CCQSlguiyo8aNewW/IaK/D8QjgzujGohQIHCK/bvwZDWI9TxEjugx/yE5JIh/1v9+I1/0g8yHDZiNtj/ffxBixIk/1kiFDHH3M8ERBawJ9DfRC2GNCgqn3zDlHbGIdDqfUhQQV58en2H9g6YY1agtg1nzD9xeLQ1Mjufax2GNE+PAMF8KYhBWX8m/dz2JiGSRyIc98YhBVSo6AhPzpjWSZgJu9dvOmL2J9A6P2GNxnWFAliefB+SXg+EVPyliKmGKNV84ogw0tALXR7xacxQlQCgVFAcimm82nOWJyihnQPwZwH5VjBFCC/TcRsN35b0k6d3HCKFuwH5FuhqdRvQ2J1j6sZwLd8OiT2MIjynXMM9jlo7X2YMH5F2OadMYzvnfk7Ylrzji6YpFlL9TfRJyyVYtfOEKdHfRBHy0AkN8NG8jwgw00wbwn2JSiS4j5CfCC/I5jiMFzQuO79HYzQx8ovw8v2Sx8tK+CCC24m2ITipo033wYcEP2Jjj+4t6L9ivY3GIwpboseJDi3PTL2DiA41f2JjQSCOLZijY52OojZY3uKujp/EZw7i042L0Z9841uMXiSeLOIGjpfU5Hy0W8dIM+9zoyuOvjM/QEg0R848+MGo6/SuOzia/a2LrjHGBmz+jL/P4GB8ooXSDOd7/YBNKDWg0iEhjYXeHyBNpKeoLztLnB/2PNNQcGLP83/UYLRj8fG7wa9xeF+WLZSfPGKAJYFAhInjuYknmhVdInb189YFPQn9DGY3eOO0GY2WPW0gMK3wZ8KYwFVsiiYihJDAkw2ePxj8FNMJFjatcWIYTO+fpS4opvcRLwS3iIKMVimY/pWJxNYkROWVlE1WK1iOjI2P6V4ERKJpj/wCuNgVi7U2NG8ew2BVGwFY+r2s90NQoMADVE5JT6M7cHeIkSTUPuP/jOgwBOv93XXKjVCkE4BJZlIEjMx1ChDIBMLB6Q3xKEE2ocJKRjTPFGKtCsEr/0YjqHd9E0jnI05GSSHQiqPexqHW5FgCrImxx1N6E0MOocOELn2KTmPE4O/CfQ3XFsisk8bFkc+YtSOUdDHNMNtCWkrMNyj/Ikp1cRpE4pN+1LYvpNBxNYtpL65hk2lm1jOHYNSIgMo3UAriAnE2L8CZQlIK8d5EysNCdaWF6KSSGQYqMGiYzbpG3i7A3MIad6I0ULmSRsCOI2iK/fpxnjZg/x20t1orSPqTzkg6KqSDHJO1OjikqUgOTPkxOHKj8kmM1agDwuyM8daWAaNuT0k9VjLiSDFqPowYzPXx6j+SKrH7QAUsFK+jksAFM2S9VIvxUdLQfePoC8I0ID2S+43IIJCGcaZw+TEU9+P6cLkx6Najrk+UOCT53QGNOdgwI0JpBeIm5xiSxPf6IucOIzZxWc2U6zH5SJImHzki4khSISTxgxiIJjVI8FMzjkqWVMeTRYkCTyS7DdmJQlDI0MOGM3DMpIAjmYthP/C1UteIZJakpVLaMpgSgLuCBYsWLci1k+OJtSvIrVPfkSsXpL1ScFAZLdTaWVNhAjpU9+RVifU9o0Yw/YzuD0TTkq4mNj0o7QPNj3U1ZNtCX4wuLjT35ceLQim7QePnjtophgr9w4l5Nwim4oeJOT8UvNL3i/kzNPbis4l6MpS00s+ITTaUyo1i0H4pyKdDL4+tKhSzU+NKajIww+PLSgUp1NTiS03w3jjv9ZPxDD8k7NO9i6k9WJjCfURlI7c+U2YwgT4Y+dNATRUsN05cug4bTgTUEwVP6CUEtki5ToRcVM51P/KVIYCJEhkEySrU4hPwSL01HQtVKEp9DWCjU8BToTtgrpNgUK0XVLfTWEypM7TOEiIFNTb0nbT4TLUtJKyUhE21LjTwMx1L1TJErsJgy5EyxK1SlE71IijT0vBJ8oUM2KK0Tn5JFj1iZk32KMSFkmZLMSX5CxJmhZwtDJwzP1Df3ciJEjiOrjc07FOWV34fP0YzLwt5TxTLk9uOSV+1cIMrSGFEYlRSvSJ6O8V56EcKbSwM+jIRTAMihMEya0p9O8VeMikK/Ti5TjJgz3UAqNHT+lSrAzSlgqjNjQN/dxLXSjXQGOjc64bdOQSLINBLaCZ0kSLnSgwaJJ4iokrdP3SRg1GM4VsEuThOQzbWlkRsmMEjmDBtrKG3rwRODnjLxybOGnU5zra+EJsbrEjgih7rVrhxs7JB1FQ8CbJLI+sUsjCkCN0sjqCJsROZ72XQIshWmQw4UeG1ZI9rELBI5H4CG0Nt1rPcFXku0BWyTtLbD6hNQnbGLKS5TCNrNYZi6Q2yDoyOHrKiADbB4jHgqsIbNNtVrS0EBTeaE1BttIbHW0e8guV0mds1bKrPdQDMz218yZbHrK8R/bRW38zGlEWw2T1bdLV6hebIG0WybqSzgTtDbTm2Jobs9m22T3wfLCC5beODH6zOoMbB6y64EWy6yigoLj2ypbFrOawguJrM9sQcoGnazVbc5JqYes4mC1s7bETHPwK5SbIDsQQ3Ggo0RsirOht4c+bLesTrOGmhzVsq63yyzs8HMyAHrZLN2zJbXLPRs7JI7NDtScuLMs4o7AnJBsFaR7MZtgs4wzezbsr2wxzUuVnIuymbZHKFzcqP7P0g4cs7KBzcsi2y7QjM4SOZN9mF+03tfAMk0nti7b+2gT8YGjDXs97V+2R89czXJ7sF7WzOVyu6Ruy1y7jN4itzTc8DzbdjMqdALtVc7qB7QXc203CgnUbXNXSlcv4GNy7ctXJ9Ae0J1EDyfc8jydyA89exvsFjd3I/ta7M3J1zOrDXNdybcr0lTyHc83Lhg/OWA2BBqDP6AI9C+OMHlc6cAvN2dHcv3J1ZeCKVzu5aHK5Hlda8p9w6Cnc5iktd/aJ9GRhAoXPNmMVtQdw8S9RYvODdGFIh2R85mbvOWMeWTd0gcs82wzrRdjHrEHyg8nSDgc93P/noc+8p3M3BdIIEwXzKHbPS6BAwB+QDB18pvKEioYxhUUAnXXvP+M0FNvOvzjPCvPPzMnJ10nzs9W/KPdh8qfNFcZ8vTTpcGHfhzfyNuQVwALT8jBwSs8zHl0YddPO8zjcoCjfMryiwAnXjcnaNA2RhTuQ/IsVc8+AqhjiqEyG8T68mQGRhGuWYxVUT8h/J/yD8wD2PyW8ffPTzETTGlQLQC+Z3tcV8qgqwKFjVgvoKoaRgvIKk8+1yLBYPVOL3y7jDnGI9PiMgpf8c3GfOKppDE5yEKeCwvJkLODGMyCYaCpgsB9k8pFmUL5CwgvZMvhMQtUKgYbAthdAqWTDkLHGYQtHyGQZD1BI/84wvxhYtPKBQcATeZAUKS3RwonBZjTWjULeC33KhiE4u9C8LaLNwrzsAi5wu8KjC9QsqDJTZ1NDzljJmi2BdC5H1iLZ7YQ1adIi3wojzK8hBQFggi1wqSLC8nIoCt4ixxlEIy8vV2kL04Dh1kMRCugA4cDCVT2bzK80tmqKyMNArqKTnGoqGDRPC/37z7jVosWhR8ltAGLAkoqx6KminAuGLOitoruMpioV2ANJCtoJ6K3M+JI8ykReLPfBJg5eLvRBnZbIPpTkQAzNQdiwAOWyXpcbEANUyV7KxMR/IdPoSwcjhGC8/OcdiWz3UB4uWCfKQrwZz4sEfwXMLs+HLOL3iipgoZ4c/Yqc8bRUmyqzDKNr3BKvI+4o28mOEoE+w4SyLymUW/YKORLgvdrJBYss970mCsSjRJI5KcINLHcu0aZIKzY0K4jHd8bXmkwxc6Wb1RLCjY2VxLgvFVDoElsqEsmCos3UH8zB5br3w4B6ETnD4yvU0F6dBS9v0G95KAtF5zkMWsEvDb9VZHSC85X2HvD5SyHG2oTUUEps9JSwOF5zXEjzxFLQc64uDpb9GxRxoesk4ki8uS9cPJy3irUrCwcyF4u+LjSh1ATRZsiFH1LiwM1CuLrpIAlv1ASb2KVKp4pdzr8DOWUpz9j1X5kJLxSu0v9Ldi8/XYC/SyyFdjtOCBBjLXSpTjwQ2vVkodL5ARXJwLetMSJIYFikt1Ylt0MQzugMxRorPyTC9b3ZR4DdIH9AyDBqioMGy0Yums+CyUyXJjnHCAWA3c3qzEjWyqsrALk8gssCsXMhY1aob/RzO6KqzXosjz+yxvUTg+y3VCnLxymcukLRy8sq4D2RdovmY6y1aDAw2yyfRnyuygcsPK3c2mBbLzykT1nKJikws3L89EICIKxaMcr3Sbyk8oXKb9acsLzF6GvTXLFi9D1nKViiVLWL75T0l1A2vbYtc9lbTUsOKy5QZ2VsASmz284xCVmwMxjS24ukQ5bW0tv9niopGwqNvD4svpZbJvR+K4tP4uRtASd7DHda0Ykhgqu/GEs+xwKzYsxKOsCEv3Jssy0qAhES8W04rWKrxEsSCKlEvZZsSjMggq8SkSo0TnrIOGJKNs4W3wrapCuKpKP0LCumZZQhksEqyQrioVK6bPiuWCIyyRiEqWSn3wjsWQzkpMqtyGSsFCVUZ9AnwwbYgkpLrmL0uJs+oWUIMrggPMthcLkZQELKKyncoWMrUJ1H3LBy98o7K+TbyrLKfvBBK3sdULOyiqjykz25SAEzFDLKey4srzsIq3yu3LVoIcuYKO7ZNEiqe4XuwKrVyt8vXKwqiT1ZJuyosu6gO4T9TPL2EXKo0L7XQKowRvoA8saqAqruSvLOq8qr8LYXOqodVFyp8oWNBq453iqmq6Ir5Mxq0quiqNPVONfLrMwCpnyZqnqsbLRqhavrLryvqtiTbdVYsR10Y8rGno3DAwzspYoJjDqxMmE6t9BAQVp0Ox1WSXjiNmoS/JAx1WGStPjmoBZkNxzsCkvjio0UmwurLQKVCT4ZPAGuixEfbaxuqrOG60RxGMY1Wvd8GcXERSKyTQy9y7q2nAGUUa06tCpzq1HERxO4VGxurTwi6sa4xyAw3+rO4BrLRx0EPONBrKa6LGjgaaxQS2dKWDa0RxIobEuxqIQRjAxqZeeQi5roFWrFJqIja92IImoJnHGQdyG6qzhvs9XB0cx0ImrBqJa2uGRxOTSUPZxluPVhurS/QbDDwGeJ2JKQ64QbDcswATy3IAZ8msmv1vFRy1qrV7WKFpMbaqIsVCJPO2u+hOoQ8oGst7cCr5IOHNGQPtf3CqqENAcu/mWMVUCPWQNDjftGQKYEews6tLaqh1/xOkW2ri17ak50TqCrCosDrGoHUFSLklR2uR9g6qOutrw6p2rYjGob2tTri6juGTruSamD0gY60up5S/gMEF+hFAN2vTqI6jcijq8wM1GLtGIcvJnyc6jhw7qJyrKzHBMENOo9rY6+10LqBPX1T7rO62uDnrBof2q3cxUvapAqDqzzPUVepGNCZ8esdJ2rVd66MiSDHPI+tMN/IJIM0dq1WjAutcIpxxvq7IZw1zSSjatSHgvDYQBfq/DdRTLZc6fevJiHDRChaRTkK+uPpq1CnEwRT6hI3Abkjb/1wS/af2XOtrIg+ukcalNVEZs4Gw+u8UNCeXG/9C/brOtrzWLuDwam4mpQ8EDib/2/iyG25BAb/0uvzQbsBS+vVYjouJUZQsjKBpCybjGhtoigasBpuNSkChoHB7DOdSIbP66wtfrQlWHHwjxG7+vkpBjE+qEabrQdTygAsf+vIS/AE2rNqQQH/LFjYYtULvMjjBA1uMdqpKv7yQExq3gMZS7PQqQqDfqMmrna3y10b4DOxv+MesWxrpNQq/qoSsbG5xo8bkfAE3aqXGkxrnLK8lwuHqr9aAo8RfazrXw9zQ8YurLvG3CHdqvEaAo1Romo4q/z2yrxs6tGFBh07oC0QAoYcTdTJuPKs6nyAqxwmlJsysPyE52Kb7GsuvVygG7YFv0+ABM1Hymm9PVcTYmgSPibhy/gphpmm9Tj4tkYAZs6aIUbpsx9emvKr5N2a+jBv0hmtpp/LWuOZrHdSbEpsSqQmqGMzwVmhZt09tm5pq6b1m4qyyKoYnr2OcdUCcD1A67UaV3t3UZBHqam6hgH8RzmlVDsc67Z5tub6sIzwAqMzKZuarJTX8kQtbTV5qubZirRE+aa0I5r+apqrY1Zpd7EFt090xMsrmJIWh5uSq6sO+FdMEWt3JuJzmu5u+a4m28oSbOrUDH5rgW3sFBajcnUQhb7mzxpOavK/7nhaKWvZsZbXTfFqhaiWvps7LmcZFuxbY8nlppaCWnps5bpm31wLdF3TDAQ8mXOV2+cN3aeuTdI3JfX0xdPZl0ndlW+Vr5MQE98CadtgZvAotQQWgqDpvoHhDbRdAND2nyym+fUURGbW02fpNhaApIZLyYor1b4tKgA1bdQwKGshs0XqsLzpXMsrTwKjd1qecD67UCTt1q5H0wbQ2+0qDbGoFpy9b2CcNsLzFHZUwTaEqx/NhdI27AG9bE2kt3EjZ7bNrTaZ8v1vjbtq31pigU20toHrLWi5xDas2k8mxRfE2toLaY23wDjblTetpza87NtqzbU2ltsrtdcayCq5fuNUO7aquCKD7bl8/pJ5cvbXTyKKSXGdona/gBBU6hp20EilbjQVrkXzXTNdsXbqFWNHHrtgGjBNAj4N1pvyCQCYD6hlTeSjrFYoXdt20AkQIqza5soi09rym3sApxvoUluSs+oXdsVN4IFHSDgFTEYjyLV6i1uyb/3KNFzqmaBU0g6l0rqEbrkqoVziKAOpfNzAQUEDt/afKcIr0EFTLDtmMuin5u/z162ayPTFIxa3rSvPG9Wag6gG63LTN0cTXlqmMBOMvI84+GDeKQFVhltVnBajuEbo4hBE/QeoZUvuwk0plCoVjoH5E4aROkhRy1jofphEwOOkxE6dxNDmFuiFOts11UpGt22Y73Pbjs1qHbfOKIJteVWXoaX46NCo6YjUUqviW8dTRNAi/ZLRHQBCU3QXlRjezsfhHO+/nsNKtUuKQpbhfxEl5HvM+LM77+eMEDh7OlcxxpguliqIU/OevDrQg1KLo47RHPeqDUIETLRuJMCbYQ6xUGh+UvpMEHqEY7ou8xBk6eyFzqgU3CATrY6JGhBSkRWjeLukdMtX7UacbDSrr8MOYlnkviWuqmvpi6tXToK6IdaxB67Iu7LpyLY4VWvagv4HmuZj/gbXk1pxs4YyGoPshxljhRjTyoSsSGaUiDBJiWgoYYwk3sF3aciieuWY9wbbo26juwtural28OVSLfyY7o4Kru3bonB9ujiIId1WRZvcLnuwsC26EO/vIrB7wzbtTFuoCsETFPugHu+6nc37ofQHMvbo4Kh0h7tPbMi0xvB7WuQ7t/pHu/43W72YUYX26yKE8BcLQ6AovcKceoIqNofCwjtbcZ8isF+gQOxItQ7/Ac6GJ70i8oq9ci2mD2BBEcHBFJ7c21nuVNMVBQqrbwOyU1ei2e/hwkLc2tBWF6UlPnszqBe19yoRx88JDphkfU4D4p0XBXqZ6pCi7uUA5e6dvHBae5Xq3b17e3LJ6IPGXsOdjEcfMXpdPfPVQNvnS3t3aovC3sdbrmiphJdHWdZvTaAXG0Rp7z7c6zWcYPMop96AkXdrzaJwVXpdLae7/3hJ8XcPt/bWmadtZJ120cFKgDemm1j7gA/F11wVW5PvnbM+wk2ArSOyVO4Vl9Z4KPRi5DnoW84+oAj8xwaUX1B89M6vsigpfccF89q+q9mMdxwHn1Awr4CxwUcO+6x1Aw5EexwYBm+xnwH7btKP0s1nuTJSCje+0DIbhMMPQDq9i+6z1AwbUALGK8o0FfvU4vSiZ037cnd3JC7AvPvpGdQMP7wWBVuhZxpAvWkKuR8qSh/zTwfW80JnzHy06HZ7O2rezv6vW37UTan+zXtOcg4E1yG103RMzghLXIAfNaiO03ppdj1QAda5E+p01AGv3OAft7w5Vot7Ire1AcnrIoCZrP9oWhxtjbwoayFOB0Buu0IHwm7AY5ai25IiCrAwC5F9763ZNCng4DOgaD6weyvL39V0DBCxbeoCPsYHBwZgZj6n3fPuUNj0m0NfA+oRCyFwqacAK6QHIKvu6pZUv6kIUG4WfwfSAQnxgXpcyamOQCioI4rhxHSPUDKTdBi2yPQawfOR3CNB0uH6jYwnQYGVlBoXHMzKA2QYFhs4esIgzxBzSxUHewDpLqBjBk/sZq8Qvwf0GdAeQnIzfB1hhMGG4Vg2GSPByQeiGNEg8ssh5EUuF+0cGkMLHYeqWzHAlJEPwLHZ1qRcnAlQh4KIPKHVSp0RxmCHCJcQH8WqJzTYhuHBGwWjXIeSRPB2GtTQAQqoezgBwHtNfA9CBhGy4E0yYCBcCaS0CJtEgvIerzCEEYYYyPEEGzbx+hjtKCGj0VkhJ8ZgxYYbgphmBAv6qg56nNAyUSKDWda9XYdKh9htgahiDyqmNdNjh3xJ70jh4c2D6dhitqJEDh0KhlMVoOFHuHtaV4ZVE1nRCjT0e274dOGM22eEbdaBwQYjb8kJTAEGeB4PuBGSFWgfHBWB8EfMciUQPtA7IB3apI6RBsjojR3a2tA0QYseSpWQ8wVMjhx9MQke9hkmlfqRZavSOFxHR4gkemSiRzuipHSODljdZiRzvuQwQy2keMRO+1xIw0KR3kf77JiExCZG+wyQZFHlEWkfqtsM6vr0BpE92rSMriPzCxQ88RUZ7CVR7HTsgth5N0Bi3TV9tHBAY9bggHyezXoQMH/Y0bWci4Xey0Y0+/UPohdPc0cHbmcXdqBBE4ZU07p4B+T2rhlTfxFdGfRrNs9Haq37Q9H/wV0f0x82oMY2rrECtvO6oB8uojHQxt8Fqr1WJMfd6Z8301pB8XHyi9HEnXVHnacxu0fl7dYmDvzHVekscBGAXKiN9HUSUXsQTqxwMZHRLC43spd4xjt3kEax37k57EEjscbGGeKXuZ7Nesdzxc4DO3rfsxlV3qMgTRk3vpagfPCx5c3euuwnH0XRccrHk8z0Z6D0EEIq3tboN8B6CAB0nv57Zx5PJOVNxxfORhTxgYIPGMilsY96VXTTEDAQ4Imm3HrTU4jraNcCQqPHEeyvP/62exKBZcgO+pHbaPxw8el7jx/9zj7o+gZVLHtyMPugm1xiCfT7mB4uSz6yx75zmIXXBCc7Lk5I40Rxx22PJYwljPCZ/7hWk8pwnlTHynf7fAI9qInKJhKuObvxrZu1UiJ9YLVCMCJeB57o2ulsYmvK5ic4M/MVGF7tZEDiafaNnNFv7zEcDOMqtUjN3JQjZCuqoxhuJzZthdJJ4p1Ssni2SaYZ5JjSffKmQAACFzAaIF6AQAdy1EBEAJwGth3YAgBQAiAJSBABVIX4AxGOtMuWshQK7hQBMRDLXB68enIoOdcTQZzB69sUGOnYJP8REJoJP5JOhCmgYMKcSL8/PybJIsvYbU6gHDXqw/RF/TuhCBJsDyYWAy8drz3A88DycXC9otajmhQNctDvJ89LBTKnzEXNkSnm1AqbsolO9r0ymzlQGAOLmR5KaTonVCDHa9BwOKe6mwpxfr6U2ppzwvo81LqYqYt0cEIaoliJ3VmSDifPQyBK0Z11CnBvWqTUGndVqD5xEpsHVlIPJmuEJCMQ3Ch41Aab6Ota70GuE0avLYjucm70Vya3qkRFwr18YpiuhLoPEZ6bWnKeSRienopz6YKNzFeRXBJEp/6cHoXlJqbWoO4fjABNkEZbx0jHqiaeijl0GryPhvpwGZ6m5erQFvM0ZsKZo6AZsLFGn2WR1ESN5gqacSnikVukGHG2Ib3wRjDAEyXpLcIbyn4JpzJFLRGZo2gmnoEJ7Gpm4QgDonAvJo6YpmMKBKaG91ET7B+n0Z8xzxno0CWb3goZmYeFmqELeiymPEPmfRCZpxNBQ6yoYvzGmY6MdjbJ+0Hr2b5AAumeqsCZyFi19oZrOnOKdZtRRJnkcbyaWIEZp9ESmu0ZrGhnTwQaZ9hU0J3TTh/yDPSGQyccWbK9FEAQRV9oZkZVOJFplukGcXC/G3SmwMTdWNn5ZgKY4ZI9ADo+mTvXVEshlZy5F+nM5zczxIAOyKACnFEImmydeZrBn9nQ5/7xEAnYUQHyBrptsckN/Yb6Az1EbbPWagUrEL1DAV08CclM9IK1XT1JAoUyjEh5zrX7qBIn/L2DW54ef+Np5scvbne5niYSt55r8vHmO5luYXme5oYIwSeQO6exGEG6dCBlBvWlEqQikIpQ5hZ6GzxVVIZhw1SyQu4vzSIdO6hqXrr5sDGfmbjAOAfRQfCCWxwVjagG+wbPUqCoS862C0jmZ1NObzrq2A4u8JUkDJVypG6JzxWhy4cudAX1eV7zeHN0MhoAX7cZfT11+jc/RqyLogwjjAX5u/mX0jVOKfvnMpoBY+QdOc+YX6TYxfxIX4F9LHT4KFoOkPRD5pCCvmf5pK0e9klNgIHg35g+iChuFyXz2in5qhZxrawYhboXpF+MGaQ5F/BbvntaLCVoWrRM5VKyByJBc2w3zdTF40mRb+YMI6xAReLll+PaJMX6FmjXLhlvFhZo06EHP2SIebb5SlzOePBaicS6ObJLkNFrCUSNvFnPloXWtYjWwFGsZfVPQLZsvsyZH5phjPmbF1pv8gf5q9k6NzF/KYuipFsxfhAf+dJffm4p4uUkRcFm+b/mRiThcjnT5vpRGJKamBd1RE5mpVjg84IJdzFFNEYn2xEl7Jm+xEjSpc1xdF1aHB1FM0pYwXeYFxZo0Cl3Rfm0aNIxbkXKFvKCunzam6aUMXJg+bXUckcb0g6P5tBY95i+6tjyhD5+yFfmtl9ZYdR0sA2fCgzMARYdR7zY6K9zZ6Mhp0Qu4ZfTvgsplVDAXBl0llVRD5vG07RaFpIekWAkW+Hr9Tl6xdEy26pxffaalOhLCXwoHTjyNaOYylm8DZeug4i9dZheFxA5pFd4XdCIRHBW4V4vyjQBGmOev8E8NpZ/8KlzbF8HcVnD2KW4tf5doXT+BRc7irl6xEOWlkVYNpXL6ToxlL1F5friXvFVCk2W8V2pd5XsEapYIpIlCiOEXl9FmLFnkMOrXAWieRFbUXAFh5ehWj1FlYfTvlvgBqVPlxlZ+Wdlt5UcWKV23lboolmhYOWxFxTKqXdFo1dA0uliVajRLIZaZKWSgOVZfQ/54uSid7ltZbyWfmWRdpXtl8+axyzvNldvmHF6JdpXZFn2DJA65hubmWm58yEEpIqvpgLyS3H+qDob/P0BoMl55SYStNMNNa31KwZNbzt+lBZhv8k1/dLvKc1oZdLWkYf4wTXq136HLXiW+11TXIqjNcLWt7YtbzWb9Ntdcz5I97ntG3Jhs05WlVl5krZeV2Vde9TMRUkEWogRnmHGqsc5dBwqKQEpezpFkBA54bPKdapWgp3haPB/mAhc5DAlqkuo0bjGxjCWplXqVvMHUM9cSXHKF7zQbZAI9bubsdNBsvnxQ91EvnVF9dcFD3UNBtVxWKqGgUXZ184tcTfprVYnXN1wIC1XMkXBaxNYcUo3RX31vBDbQGFoCAeN51lDbqXfcRfy3WOVkdxA3SOMdZ4zLVyDeq0Y6J1c2WL10sngWbGSjYgUFVgvAlW4NvaZaWGlkkqw2LbSDcA3F10QR/XMaX5cUWkN1hpGon1+LHg3wV4kVvX6NkukJX3Fu9d1rRMnFdI34N4TcE2cNjbmo26lnPj42NOMVdoIgQUjeCg9N1pdI3L1mjZI27+w9FYbaNyOfk2g4WZe0b5l98kWXC+odaPn2Fsvsw3ral5cg2S0c1ZWNjl+v083pFvZfIWKHELcuX6/DiLm6VjO5de9aOFoy0WOodBbtLYLd5d5WGVqLa2Rfl9AINnwtxdb6NTV6/wk2iVu0tTYWNyaiPWdRbfAcS1N1LbsdpVhiF4WSl9GgcSlNsdycKLZ2TfPXUSIjdo4QV4v2LlPMVRb+XyF4LcXXtVoLZiMvNwRdyTJ1/fipWZs2Dd63SVvlds27BrrfFWDilrbFWhF7bd/i0VhPk2XqthVaW2nPWFfE3eVubbK3VVybbK2eePVd40DV1LZApQNE1Zz9xtqlVtX9tiED3VGNg4vMXKcVRZs35txhpSWwMLYHuXPtmjQsWLo6HbeVbFqTbB2HDd7cG2VtyNdrn65xub7nNWutbP1U9A0ff0q1/HcnpG1rls1bc1yKso5CdzKEp2b/akYzqIYuNdp3idm/QZ3s9PHbZ3UxRnfQTNeltfp3udjndZ3b9UnazXhBlzcHXFrNKSYB7cBAx05iaElDS9ew4EOxx6qS+A/DrB/PzV24UZHCMaq4JbMXhyUOtCMaD6CfCo89QT9Dl2l4V7MXgG2k+tO5OaDDnoZ6tXsNcl+MFAwe1L6zPoHh5qW3f9B7d0MSBoGPC3esii4GBENwUDI3dD2PME4tngddscM+IipoyXV34IlbST2spPcAoai4R+Aqks4WXaLhmI1HHOocRL3cT2tdtSt7Cn0dPenBN1ZzHNGc9+tjyh4KY8IL2jV+aRgFQgFsLBJpaDhgAUWw7pfmpe9svDl2MkXYo1QO913edXeaX/C/ho9lXbN2vrYuDn39dm6gcir5vXaBXi9+jpN2l9/NnpBl0OXan3V9nDjD0R9hXhOKpWU/dO46Ud3YPJ9FocILjM2Vhm33vdhTfOpoKaPdwoycGvatVjdgdpl2qsmfbHR+9n3fb3z9h/Y2ZUuIfcaw5dm/brgHNsgF3n7QABdOhJdiNEj39Rdn3Ak/0FHNr1yV3sKiAHIZPdPAYDwoYLFk9l7Pz2Qh8g6ykQbYhsKGiDrKWxQN1rCJwOnJNRCJF64BA2PMtKZPY7hc+bg+9Ig9hthYOyVPOCMloFhnHNHW2N2zV3+DzCKLgZD9mUURruGwm4P+BhWhUOMEFvc61m+QoSAgoxLA96z+KCqQ0OjDmjo55TD6PU73FDr2ZupFEE9FIPdDztAqkHS04mkPm+CqTbIqDr0sxmvD7Q97CfK3CjikcF/tFYP/QFHNqlcjAg4t55pUllT3qDlw8b36gQJawjyEWQ4Bs/8aPcIO7JAGwfbaI7A4iOoD/SGfMdDng/y4HI0o8COhDnvZiN8jwI5nRaj9hFQEPDpI/f2qj1o86Qo1rHdjWcd4/QeExIxCCbK17LCJb1B62REGOdAZAwmP3GiecEdB6x4HcaKAaY+1oljsY817S2SY8YgS3AY9mP1j5GI3r+1+6e51FrPSC/3cFgweb3IpqTgWnHSX/YcMSkTwWWDHSdogEWM1o1Yajb4OKdiQX+RfzuPd96N1dU7vfsln3rjl8C5nyw5wMStUkMJeZwVbW8z9AYTxJd5xQDwE/EpZvWIVi4wTjmGBOXkfox+OApmsBjn3j+2f6j09s46eOho5bTeObjyOaJPjZkpA4QLjwaCNW/aKFd5Zi/Mk++PmjMPQb9yT6jvoWGotVEDn3cXheZw89xI0+r6Oz7xatUF3Qnv2S/SA+uPzGW44wpM4BE55PVT1CQtn5TpGcuO+lKU+W9/jv+dFPxQl46BWrM2fc+PXj8+cIGAFXP3uPrjoagoxc/W4gx2VgU2ux3sfQ49RIB1h6djU/QHUrUOD8i0/YJSYdw5DP/N09haUY/FfW5OUZ1mdn9+TwWTTXW/VxXxOQae5cccsT6NxLRVTqVHS2zj7vuOikz7k7brEztRGTPnTnP0QgG9iyEd3kTgOjb2zM0fc5O9YaikKUWZK070cmTyU4QXgD0oHp0w6L3PAOcIZMx1O0VYfdKAj9p0+zn8IroFN2Hj0jhd0cIcim5OvENjFXOV9644+sAiVc8XOdz3s9jPFwg09pPP697nP2dzmuAP3BzxNSvPS/JzzPAADnc9JI6T9s/rpGTgA4aj5CPaZKQB9787rOSkYs7TOCaqM/qQLpts7YpW6KNF0T5zuM8e3dTg4oFVoL45BvPlzZaeag01iM59LOjKNDLnzz+C9tPLkOBdjO1zmk9UUpDhc4BO9IZ7wowxzo/e6OY1xzeZ2UdTg0kcfWlNfHB09cCRImmdvo98tJgGQ2XT/GwS5v0eL+iZ/yuLsS9LbOLhQCEvWUsndFbfLKS+d85q+E04NVLiS6c33M/0/cm9DSGoaNsu9QwMujBaBpMM4WSI2vrqFQzgusfDB+usun66PmCNTHQ8y0BXrKowkbS6HLOyN4AsI2AbM43XCsukjWrMiMz6/w2SNtU9JwyNnVxmw8vv607nkaijfyIyNyjVqHqNijeK+sQsbSK6MuzB9BjaNc6Sbq6NnbbGMNiq6AoyGMEFbELGM4gT096PvTzEfCAllopSJw4uv1PNIUdphgOw2jQrFZR71WxG6vlYjq7QbWr41LgUt0e9WhkeY2EJ2VAQUmeGMrIZadRLqSHo3Gvwd0vwwUEFXq86vzZoIx5ZsB/ow/WFara5WszlHvXqN0I9wkeV7uZzDljsUPaZNQnSNeK+TIlzrXqMga7ghP01B4NP+nRNVCiCMlWfxf/BhFdq75xHlZtUqvxksG+WU9Qea79TTs85QaR1YxwhAJi137zGvtrx5QFs2MBa+G2sbvGydj9roHceUSgA2wWvZFEm4DAIMYYz5JzFJFiYBVanBXuu8jem6dtkbs9kpuUN4NOcqSb5EOZrAb/G6lRNDKG7dWKmGRiGvobtG/DT4boG4BvzEZMskS7IW6/flfKY1dBwEpqBTowY5h8baMmUb1bXCBOpm8u3i11GD2uQhmrZ8oCb1a8IOWNEP2Zqw2h69TEubuWIe2A1heTZu/Y/ZMsT8FY6f5v2jP+Z6wjaNq5FvOjbzngRDbplmupvzeWAPRnr3VC1no7lFENvrC0wmNmKsLjveu9VVO+juTYyG/juLZmcXaV3UqO8wVzGWmodu8jG4jLv7biFE03MFX256uKbzBQuoqFLa4OuHDdO+dUtrvG9gUk7jG57vSMoO4xv276O6Phw7jG9kU/aeQSwZcb6dbNZm4Hq+G2p73mCCVu7ue5XvolUG4DvtaJTofkIKrKdpZxnYO9gwFN9bWMh4a7ZMQ0zNCrNBYI0ozR55Nr2qIsIMVBqlUblYwUhos0XHuNexc0di2g0a7sUULO6ccKMzvx6ozRQyLrta6jxHDJy9pYP7wi2pBh4Gm+PNaZ1IZWu2jQB6YAMjFJEtwJbv+fQKhbxe+fvmVKrAow8HzozIPcHte4mvmVNlQCJZ7/B85DKlah4oemH6QS3u+rx9bAwT0ZVJtv7kVHvSjIHvh8b51u3ND9jc6bHF/phbeh44eo8ZBmIQI7qB6ApF4BR7juJHzh93H5tbw0FibMQ3F3GZKOI1ZJHvW+lWgerke/4ZYceGq5I6726A/R5cGm/BUuGL0jtx5Um6PzgIGdLWYen7yR41Q5zZtKJvK0W6Cb3Gbp8RjQaKcfZzKMHlB5Cwgn5llpr5BOiicfgnwdM2xc2JJ78fM4gW/4ZPH9h5Du9HxWZyxyH/J8rBM71dCcfepHuJGG0n/hjhRGmO+6qZmRup+q7on8p4Meer066cftGMx+JuLHsnkUfMb7J7Up2H7x40ee4bHSIefHlZhCeoHiBjEQy0kZ+Ke5nyp/9uJ8MIU2Lcn1J8mwXBQG2DSLsyCgqQ4by+6hxehetXEfhrsAQmG4jPJ7NUzMY66yfJ+M72PuUbvR6GErnjg8dVrMRPCgUNWIoO540DMa+Eebn2K+q6Bbc/AefY7xu7Q0ZVce+6fAn31XWwJn1Z+MRTnhh6ReSjkWoCf8sBRiQrybqF9DNpn3wf4wFGWYGpu6FbfGJfnb9+XgRs7rZRVsUn1W+11qDpePlusXzaW1bMnnvDNUdEZh7yfTGI+aofrnhxhIR7H2R/dVrzsw3ufnqKWpVueblLu2m97jm4cYymT25+fAA8br9U5Y1Nn4fAYAuLavrHol6lfjroVjxeR0Be4WvzH9qGFekHlh5ef+X+3FRfbXhhmmvFr1l41weHyF/0ZzoUl/1ewXmdiLu0Fcl79ffFKl9VezVX6FJfdYrlDDf36+l9lfJdYnGZeynoV9Sp7X2R8YuvT7Nc0Lmy0OroBkYU0GASTUfY/4vPoLRmFTaej5mQStnNEa6BpC14sA9y3ut5zfq3ugGkL83/E1ze557N+Yyi35eZybS39t9p6ATSt+MQe3g9J9OJd3S+R1TnWsD5ZEKefHuRp34ua8xBKHM+neM5ntF6UycNd7zmN3iG1IRF3hKY3e+rMSmne455yhXaNZ6d8sVz3mMMrhTnKihNxAoLukGd73/gZ3gn3y858rUE2qZ7QJgZwNOcdd2zC7yOT2ke37s4QkWPffkAD49mWaO6CVOv3puD3xc1Z84Q/nZ93M6hJsAD9juj0Od47OKR9Tmw/nKHbC18APtD5BRpku9/U4YPoj7DZMPqj6BmN0fOHLnSP8D41x8aUD425SZjdDTg1R9TitmcPwaCBSAPi9BFQ+mIT9ZK7ybj83MQsbd6Q/6kEPY4/AGOT+MgzvfD84+McccFcl8sFj+cpmEF9/o+5PzGcveDPhhGkpc2fd7A/Mqf4E+wsPrj6UoZsjj5yQyaUvGMNhPsmo0o0lmT4k/NSez+JJZP0z7IwbFIpH8/YPlz5rmPTrRsQPtL5A/3nXNxa1OclVOT5bx7sBL9Wmb31kK/fEvgL8foaEf/srFsvvd6JHKOJTo3eGb8/FOdFgH99ygc+P+Aq+KtVj7/fJGPL4Y+QUQcH4xmv5T9jhcv2ktY/yMLd8wxfjgT8pw/PrkfO4TaaT44+GbwvDE+6P8xF8YZv2r9hWtZ5ykhxePwdE0IYoIOBG+9YQ95ig+LGz8Eyd3mKC6+LPxAyO+LLM1HK+RifyeXe36Zg8W/1vgmkNNMpwANOd6axcnI/TtL97XhN8EFFRh9PpZGTNWP4j4B+K6Mmi2s34f/sG+iP6Jde+evmj/u+OP3KQC+s6b2a/f9sX4laYlELz7O+5Pkl6tJ0fm5l0+oUAH76sMsEfpI/rv3b9ZHIfw77x+IQWb6y/YPuFGX4oPqn6KxpKJ+GY+Et2d63Bsf9N/qvM3/9yG3P249RVbc1UX+DFFL/5tfcJfq9ql/EzOX/+Gi+aX5haaXEX4raVfxMw1+s2sX9V/8B7U1uxlfrPW1/lzTX5N+d56L8bAJ3k45xHrmLBh4QKyFL4dQl3lQEd+S9xT4znHfkIRx+lPxBEd+lb078b7nMHhAhAMUU97SmdremwgvFP699D/YoWn7Iw+sUP6IhKfh/gCIU/wVYA/eySGxt405gD5G03f6P+M/rMIG0II0DE95M+PwAP8apHP6j+9+Olxz+dn3frBYQ/CPx39Do+GWz+RwMCDvab+y/1PX/eq/qP9Bwavuv6BmeEaBAU2dPnhGX5tvmuFJnZ/selc++Pxtln+hAWb9jQya9f9XfvPqW0QYV/7+ggwMCYIErQQvkf8yRrvBD/r+1qH2HD/h/nhH3bC5mf+KYOEblG7/t0R/+Mh+vjcjX/PR9j6/eFFktwj/z0Aa30qQpaBABE3y/eVNyewj/0UA23xneWuC/+Kb0U+rvxH+ArG5+R/39+GU1TOnvzzmPCHwQ9/wDYIfwm4Jf0QBNhAIBnu0U+PlTNsEM392cP1yoBDAIBmBG0+KqFNmI/2QQZ/1X+72AIBduwYBC/x7+BkS++L/17AL33H+x/1v+LSgQOSB2t+sXzQOanxqQEgLi0fSxZSaX3j+/ygUBagKx0tf1eYeqgn+2gO6+TDCU6ofw6MV324eDOFD+YcFm+XhiKyefya+gUHy+1fxaE6pyJGDgP0B06Hg+vpmEWk/wlOtI0Cg0P1n+mexUQpzmryPAIP+OPxv2wAL+Cu/2OCEAOiBs3zHusAPCBHH0ScSAMSU/CRZSN3yL+bDR/+igOwBHgMMBeQKcBap3a+poCyBI/0hmzWFOcqQIoByBBA+X70SBtAMH+ifxpgcQILYn7xCBmcCiB7QLT+oQPGwGBFJotX38Bi/zqBl70Cg1NigQL0kw+bgKUB6iDR+IQKJ+yANyBWgOG0KbzU+KjVDsdALT+gSDHQvAPoBHHxboJALIwwgNNAKwIdWVQNOB+AJwBz/zKBCU0f+yiEwBNQOKBTIhfQAv2Yuxb0N+KVhHwRoR1+3wP1+DTUNG5iGNaMwyDMRvz+BWawrW94zN+tphPIPwOhBbpkUmlvxYuipgkGrphBBivyBBaIIwova0PSvp2OOqhgpGpXH1UI/yd+C72sKvxxJBHvxasNSyUBX8C3eUpCKmJIMD+RI3JBRwLD+J73kEIexH+OnkveA4Bd26gMh+02Uu+9cEz+JH1xSb/25BqfxfeXqSDWAoLvetLFtU2QJ5BRQQBSeBVD+Ffyg+vmSBA+QPkIuXy1BtIJ9+tIxzC2QNRgmHw2Sy2mmAHf0IUhIO1oFoJH+2p2lBDnXtBgwKNBvCG1BxQMqBZoLdBswNlO7/2NBF/yCBfoNtBggOEYrn3GSFOh3+XoIWYtgJnAq73FBGf2SB1IIsI+QLyoZ/wZBSgMv+liBQ8F1B+szIxQBSYK3Q+QJeBKvhRSypWyBhAI5BWiHu+HAJYBhuBQ8yVgsB2QTO80gKt+RxyWWcKQ54OoM7+CmA7BjILlBWYNe6fYIMB+7x387oKZBOgJjMigBJe3INMBLIPfajYN/iVQLJc0n25BCf3sYMZmtQswPhOc4M3B+QNtUeoM/U2QOFONnxuIvBBDBc/2CBNxH92/QMTBk4P2+A/0zBroPPubQMfB1IIIoSQNDBMn3VYjTlqBzRgyBzDQpBPgJQ+vYNmBswAPBd6CHBJQPK+AEKOBnoNq+34OJBk/1bwKoIpY9AOdB/7yysMZ17+HQPS6Kb3tBff2pBEUDCBzQPlB+YDtBSEPqBG4LngFQKmB8ENQSY4Mn+24JtBFu02BqwPpB06EghxYPUwk4K2+uYPhcYoOaMXIL2BAkIMwRwJ66pEIghSgPOBXoMkhRYPsMbtjhSRojrQ9wLf+roK6BaQLYhg8DeBUX2RBV1loGsIIVMekKxBiIJbGgkXJ2PpjXatA3RBSvUshrpgMhEIKbWybiMhIZmxBiZlshLkJMhv/WRB7kPBBSvWchvkNMhMgOnO+xCWWv9ADIolhrAUQDQMVdDowe9TdGgRmAwMUNmA+ojXMjpDFQgFloe4HEyAbo2PwV7BihWUNSheghxoS5gLidYkKhZEUYO/tHzgqKHKhUUKIEVUNccEUMBAh0nPmRwgDUhUIuUNaCroRrVqeHUKYQdQGUeAynmYfUMK2g0K0SncA6h74CzgY0MdwTUMiAiPBfMSXjIihUK7QFZCro+FmShtUIWhVdDqinyEKhApDoC+RhjQ/FjdGtTwDgKV3ShfAV+0XzBnM/4FuIg5iLgdAgyh7eXwQw8DdGTUBZszKjuQBmH2hsyTFmj0K/gD0J+YiNj7Mr0Prgbo10At2h402exEMJ5l+0pfFahW4CcsdVXgQRBEKUNSXuha5ioiaMJ7oqMAeMKMIRh5V0foscF+h0UQMWRcDBhWMIqY3SDCMCyH64dVQT+KnxfuPIICQVMIKMMWzpwfOGyhdwWPy0D3AkOnFBAVMITwvoEIsc8HAoVMMyQhnA8MlNVowVMJfAvsxfuP/CfqbMPu4qC2WGDbTlh1Wnsg0sOnMolm0sVogQe90EHM5IP2wL92q0JQGNhvCCJsZyiSyJhGmAUVmrYwUBfub7FMeUVk6ciwEksK5lzgVMPgoWU32uOWDqq/kw5qqFjygncR9hdsNU0/4DDgf5jfEsXBfu4lHEQLZlhuPFiJQRBkfMF3x1KL92V0MlHThYZSvg0dze0RlktAUcFNUJCVG6J5hI8LViEsKjThQfAUrhbKCAsvlC7MxcOVKL5kjeW03Thf+D6MQFkHAROHThArGJwy9wscPhDSsDvFsUkKVtU4ML2IiPDDocDzygXcDTc2fnzh76SVUggFzhS8LTuicDNaFcPGQM8OXuRqx3h1MT1A0d2wQpok7ho2EUA0d0KQ4sO7MhlipUFWCkQfqnXMF1FkAJ8NjC5ljbIx+RPhhnSQs1hBXoNxBasDOH/M2jDOUZLl+gfAQXMr0JzuS8IgRaiFlKHd17AxCHBhSLE1Qx8PK0P8MnMt8x40FWEb6fWm7MFJACk38jGylsP1gFJETuJRGxQ6cPXoK5kTuEElXMt8Mdho9x8mVCMSKoXXMSOJ2o8+COUQoCJiMVNHMsmeyCY0d1ZQfCNAsEwDXo98KCoNiHMsYznvMlN2rYsCJCAp6DM0MXQq8SFhfhrSkcYj1WcsFRgcgy9z6gNcCmIelhRmt5h8oqCIQCZIxMIVKgfG+CFgRnND4sjyk/gDSyLcMvCBuYBF0AzlhJeQQjA0zINAspWiYAGiPIwB9F8RLviBugSMawmnjphUGh8RQ5i7o01AcRL8PthF6xssDiOAw6libg3JBJu3mUSRocAyRaiTMRXFl+yJkHvUJhFnQYlmjh4N0pYo1gcg5MTrg96hyGE0OqRIhgN4dS3e8f5lo46nSBunjwAg1SIrIvsBXoZfU4Oa5jqCrixxog82qRfFgDAxswo01JEHMXI1GRDi0GR1SKCqvZmYyDbXcRSyLqhbt17q+ySGRf4ObUomjtwb0OvWv0FcWT6EmRolkwwmyPBuz5kvaSyOJh/SL7CIQWQwqKGehSlgIUfARlWncTM0Q2yfQwdGqRpWn8ANGkWAMcF2RL2W1aCyNz4/yLBhEKObMNlVksIyOBRfyLhRgKP1WiyMMoVaBmQvK3U6syI/krqjIaFi2yh6KPBRvKypupyH+Rp/wGhvK3ShCASH0TRFYag+Htw1SLKym4i1WtiEZR2/RzIpCypRM6BpRlYFagWqwrQe42qRkvBZ+4Kw/QullOBm6ngWfRjcIuyKgswYHBWL0nxhpoF5YkUCw2MaF5RpSAyAwOwZROKIX+D7TqWuqN2RtcGQQ2kKChWIzi+ahhQkTZinhrZjvQHZjnM2UMPkfFjOURcHHMg5mpGI5iXM/Zl5QoiJjww5GZUnZmyh9cWc0y5h08SFhvMW5gEYAihYsoOEwsrl0QeoFn3M55lYMyLAjRXsOssD5hbMw/RkAy9zjAWaM/M9UJ/Mf+CQsAFnPmSdltUsCKBg4FlUsTBCQssFjdsw+UMs2SOQsz0Ma4BaLjRB5kJUXSN8RG0MjhRFkosMSMpYAaL00FFnowMSOoshFh7RQ5gYsbaN6g0ljKRbFmoUHFgLAYlkEsqFh+kJ0I1KqingsXAUCKi6L/wklh0ssaNNKxkFrR0FiUsyUJthxwTrRmnk0sR6MhQsaP0s1Cmos2SJcsxswT6SaPssQljQstln0w36PYsEennMPJxl4Oo01amGFKQOiCasqOlW06VQ7WHOGTMY5QdWme1HekIObWCGJ2MGemQxJw1HyewUQ0CPji0yZlQxjkM1aY9T3GqVlbIpZDVCDz3wxBoUIx07mM8P+QgxvBDmaknmVYvLGqav0HIxOASkRCVSYxHEKgxqVlRKsGMv0EEMExbGNL48PRbG5qI/8Sy1XI3mSmy5qiVsJ5AUxb1mJ4nDQOsNfUTsZGFOsVKCxqsWTnIgiBKwlOQyyT1kUQaWWxsmWVZs69D/qBmOsxOz2KyJFXBs5WVQSuOWRscNgWySmKpqytg6yq1lMxuNihI9GCpyVmORsftmByeWRuswdjAhZNgZIHOScxPNg+yNNgCM3KHjs7Ni5IP/Ajs9NieyRtmZQkdhFya1haMj3mDsqfx+sJ2V4qYWIJs22SVsnznyuB2ScxdLxiyZWI1s+OQKxoLz1saOQ5sM2QUqCPGxyqJFaylFRaxMdn06PmJhyEKAyxaFU2yJmKCoUwDjsEtnxs6ORmxQthKxuWWZsbtjyxiWKGx5+FSx3OUhyQQBbBBx0xGsmMtR3xGj03OUQgXhiYwHNkUR2mM4WSNhps/REhs52JCx5tifwO1l24ltlbgCfQexb1luxl2Oy4ZijexAJAXIn2PAu8YEBxqHkuxW4VP4P2IthkOMXUSAMxO8nWZYACBE+MOJ2yyOK7QGiBrIEOIYIu4FzgxBEBxD6VlqNZHqWBOOxxF2NxxQJT7QP2MT4TeBrAlNTd+SQk+uU5CpoQWKZxg2BXIzkkieltQTwk2E9IubC3ggOK1RBDU9I37CAQNZCJxlcFFx71UtBs5lXWGZAWQEXRrIQ6iwqleFjgjONRIbWKWsAuM/+PF1OynpHHYx/23M6OPkxQWWNxymKRIF1hrIJcBhsD9H4Oj2M1xutlusVkE9sjEi5sRmPuscuLm6B1l8oFgJW0g2SWs+2CtxN2iYIgAVNxe9R5x/WINxcT2r+72Oaw/ON+qsuNQS0uVFxGfg1xigFjsCuJlxgOJ4+PtiWsiuP6BzODzg+1jVx4uP7IumNEBguJrIXx0MxcTG5xT2LMxy1gjxDeIjIemODxSyDJyPuPtxgOOBRoNg9xruLfobmPAqLuMpyp3DRhcdjtx4zxrIGeOGxbeJiyuuBbwYlHDxZtjjxV/zlsk2J7xzHHqxQdBVIPePaIxNn1ssAJbxTmK0+FAOPxrNhxQ1eP3xF+PEoGuKuQKlncxZ3kLxRUKkQrNg8xOeOy0a2IPItWUjx8ePyQT+KTxTCG9x2vU/0yuPWQdlX+4gOJtxetjpQ5FDRx1WJ6xsAPNxGNnMYu+OtxegF4qHtlHxjuL1W22Idx05CKxhBFoCSeOgJ36FRI7rx1Iv2Nlspbx3IlBNhx1BI24KuygJGBL9IvbFaaq1nAk/ByKx8ilyQDuJVx+FR4JtUwlx/yAQqbBMfgHBI24UeMps+WPPxZBMvyQhOPxK5CKgFvHnxLwyesSunSI4OIpxK5C6QM739+shPICehOr+yBIYJ9eEQsYBMHwc5AKowbEAJEFUnIGhMmQwhNpAwUT/8HcFRhloJMJfpAMImqn9+nhJPaqT2px6BP1xyC1zEGuIIJ+FW8I/VgkJ/BK8Jeql+4DuOFxRQT/8a9GAwOePHxsRKrwreEBxICA0xIRMTw1eK3xsRIgqgRPNOkWO8JslljxahIjIDhHcJWhJCxrhOJgz+JrxsRPIw9tQKJp1magM6GpsReKHx4UHDuP1jHxi2P8J6InqiltRjwSRM6JfSKBsbuNyxn1ThQ+BK4JERM5CPAL1xMNhqJIzjoJMthXIHfR548BIjIJtG3AmxKVsIKFJsykNWJfpENMBHCgJixIuJ4F2MBMxKwqiFFL8K+OSQoeNuJa4WbxeWTzxknme89xMHxGmMuJzBE3xp1hOJoFz3xneIOJ2BJxxtxL1AuxPJx9ROkoIaQdxzRJRmwNxOq7RNBsSlGzY2ROLxMNjZEZrWmJXxKDs+JLtwQuPGJYeKxJMCEBxMRNRJD526JOBPwqiJLQJ5xNRJsJPFxJhLNRQ4zAY3Awzx09jfolVkIIFv0ChXJP5JqVkFJLLX0KYpMQM043ucHwJ9Aofxys4pKEmkpLoGQpK8hcpJ0gOUM4MqpKt63JPJavJIch5kKEMCpJ96QpJLcWpNNJMpItCuILXs8gN6wurCvIvWUw+9OKs2EiHhm9pK1QLHAgQqWF7qXzQywcDBIwvpOwwtmFX4XaE9gXpWL0M5CdJKcAjJM2HjgiSijesZNzQGTCWI7ZgjJQ+EXIBkW7ovpICwJuCzJSKF9JYTy8wTXgzQ4ZL2McZP24+iyyQ6ZOg4/WCQEMZNsQ5FRNwoZIXQhZK7QXmC34gpHDgvpJe8dSHVxlXh7JO5DLg/ymhQbZIheCcH9WBcBzJKGxPgsiBaUDZK+syFDnJWWFjJ2mBuQQ9zLJu0mQonZN1qEZPHuziGjJ3ZL2MrjEWwLZIXJ1iAywO5OycEZI+4r1DAwBLAjJZJAiwpSkw2j5KmmMHDu+6GBvJu2AyYRqzeQN5KHJJZMTQEZJPJ8ZIBIBZOBM0CE2Qr51gQyuk+YS5N6gpZLgpubAxwV5OrJWzifJAGDPJR5P8QM5LrJ8MzgpnpKPQaFJwpeqi5uD/SC+/5NFqVm0IQL5MbIojiYYy3z6QP2FIp+5L2YdUX3ghFNCQ6bBkCnGDgpuZPBQz6C/JWzlvJ2DAjm6FLRkGaGwYf5NIpNzD2YPk2WIyFMI+3yBSQe6CUpXH2yCcHGQphXDl6qFTgpqd2eQDAFIpolMYQBFJZqgODdJgZOopTFP/xZZKloGOATJ+KAYpoFLEpXKDspiBiqo2FIYpKFLhwXlOvcPlJ4p9ZKPJpUG4pllOu8l33/AHlD8pZnz+4h5IipRZLqQQVIipAlNnJy3CPJl6h+wc7HQCwlK7yULGci98AipRFKQQaXl8QyVIspi9BkpyVLwpi9HEp6VN4Q45KgQCnwipzcCmYn5KbQLdEip+VDipFYBapqVKSplPXfJYVIbJzyIapaVI6pKVLnY5+2Gpk1ELwxTF/uHVKKpFVKs2R5MEyeVPCEZ6HGp5VKx0bqnGp1VMIIFOB8cHVISplZK7JHVMwp+FKspUWSip0ZLLJKWkuwJFKOKogNQp3VIjGl5Jep7Rj2orbF3JZ8T6wFFIfJWcS2pjjFfJANMypzFJ9JP1LzJbFU4pLaXG4vFI2psWl7JI8CEpK2EepclNcpTlKq0bWE4Q4yGWpj1N6p2DFTJR5LupbeBKmU0yJp5NEuwmlNAQeNOYQqVJqQhaDxpWNIkQU5JK0OlPepx1NMpVlJ8ogNIYAnJIOxHWltJk70d0/FIspCBizorZPMpmVMaCKb1fQ/FLwpQYQTucFOOpvoSrJpFPOppwHFpDZMcQQmA1pj1XcpI1EtwutKspEhG0wRtPCpCNUGpZtIbJuhFdJYtLMp4UBy4CBgLsxtNvSB+yTObmAYpFRCkO3VCmmYGIygiNlWOWbUNUSDg1SgEG9yZpizyvpKign1HDpK7ijpMwGTQCxV2ckdJJi0dMTpSDks4CdOW4xGKNJOYADp8Dl8EXowDpJsAqo6zRTpodKnApQCLpOCjagiDgjpF3XjpWbUhSSDhIYFE2zp9dOZ2j1LTp7dLjpWWhmAwdI7pGpNgcmdNEmDAAzp8wGVMzdMHpvb0NcjdJVGcGOg8GFDbpY9OnpQvy+MXdP7p1iBbpE9KnAA9MYxf/TNYNY1jpBHmLp1/S3pq9LQx69MbJXrSnpvdJHpR2CTpdznLpgdPnp49K9aj1xzpSlzzp19KzpK9JshS9KnA6dIvpJGP9pqdLDpC9NHAh9KnAt9OkxB9IAZ9IHPp/9KzsaeGPpydNbBeINCh2cmJBJSTdOplHaRXIJKSjp2WYvKAowJSRtOQfFvgpaDIZQK1/IiwH4o9cEIZAJ1oZXhntwJSQpRej0ww4Z2EAJSRdByzD18y6EE824KD4/DPSSBDwU22xi4ZBSWsIWz0o4eENUcQgA4ZvCHoZUjMGctDKIsyKSME6e1oZ1h0JSmjPz8gLRxOn6FkcqjKwZ9Tl24rJyO6151EZjBNlIN3RgpKjLVeIxH/OsjmpOWfGq46KT0Zxj3MWACmMZarxQm4B1kc8ezH4EgzHQsjnYo/DxF+oTN1wy/xie/jKewgnl9BQfCrwZKRrA5DL+Y1u2ccqTPoW8fBPa2SU8ZbjIOmUTK3AWjI/W1qG4ZWTJYitV0i+5qJQO+IMOqyzFVwjPBySEUDBe1/nwOOSS7oQfBDSnPA6ZNB0Ba49VYZNpD6Z133ws5TKPmaFEEy0TkyZb9CKOSTN8GD6ByStYF4OR3XmZDDI5wP0hookzI3WOSVmSmzMTgh0j6cdx08OKzMGRySRymnSHj4ugACOOSToZETPvJ6fDOZehyO6tzLMcQVRMOzzMMOBSTc6lh2eZ1hy+ZfaGMeJS1qEjzKSOHzEYwHvBBZbtjBZf+EGZtoL8OfzGDADzIMG2S0uZD7Q0ZMzNkWhLFnWBmw6ZjBzBZGfnqSQzNBZYyh8WvTOJZOHCyOBSXSwY/CjggC2aZszMNEmFBsIizML8qfAUozLPWZQKWBY51lhZAimJwWLNagqAkhZbLKZZH4GFZfNKHphzA4c44TzegQGlZnzE/pMv3RMcrKY8CrL0KbtQm0irLV+pJh8o8rLsgsrIE8MrOAZudPVyurNVZJoFocGrLugo72EGR2LtJIiVUcNgwES/jgxhtfRPiZjgEaUvg4S0zKMcQ/kliBSRo6KCGcSZjnOYQ/VXiJTlccK/g8c2SX6SM/WdZ6STpw/wTViJTkCcETlziYrKSyPM2t8LAGScJgQdZmTm/+HflwSJTjQML60jiObPuSH3nTZVThXiN2g6I5KWTKLTh7CDbNjiiFPRSzyW9i0flicTThr8/rJbZSgH2xTkyUMTV2Ox4CGSQGtz2MGhCl8RjwnZ1rQ/m8YGUBytzl6g8AicZpFjwHRmOQZOAXZFZGVu63QAOxXjvEkfw3ZhnG880cHe8zaUEQVmgUcZ7PZeBhi5xXCzHZzAUziNIBQQ5cwXZT7LvZ+kCZ0B7MXZbV0rwoKgXZAjV3Z02Oxw27Ni4f7M+Ysi3j8nMIhe1DmUSGKEA55QLg5X8B0UC7NkWZjIDokCjQ5RtQ5Zf4PceY7J3ZdaBKSdCFIQiHISmxHMaoP7ILsZeGocZci3ZKEmFCRjMKG9DOvZv7OmZrpA+8MHOcwhjn0kLXgY5ML0McO7NY5dUQ8Z1mFRO77I7OazNWBhczQ5V0Q9ZiizEoaHK2E0ZFkcCnN+QC7IdWARDCZzanU5OORSZYnIU2gHN0ZlYBzOZHO45ih1+OrHKA5RHMzoX3yM5BSWA2pHOWGVxFo56WBV8ZnKI5sbK18HnOccjNV6WliDA5sHNXCC/ys5SHOC5V/x85JbKMpY7Os5vnLIw87LgGEPGSc2NwF8rXGU5hKVixCXI6ghD2Sc4FjsSV1hy5d4ivZY7NhQ8TMnyNyxK5OHIzZD6lY5YtmRw/TmoofHILYjIyqcjXK6cKEi4ojWE4cNSGE5jHLi5b63a5bHJLZsUPS8XHM85pHEFWC7PkRRjMy5+fim5nXL6cDJBS5P7Ni57Thmg8ThnZ3HPVYsySa5hHOcckgnoBK3KQ5Y9Xo547K25QVCpurHKJspDIqwbwny52XJu5oYhk5aXINsKhSIWo3JeQ9TjXa7MxK5cnJxSF3OacKEm3sw8BUKw9EG51HK6533MKc/HNCZoJHe5rHL25/3NCJbtkC553NK0spCm5fXP+547A25SyAnY2PMFE7nLG5+3KYY+i1C55HKzEZPJi5SHIXMOnKs5hKU0wDkGnZfYSMZ4JWh5+YBkYipjLYgPJ8SVDIfGCjNq56XJUcbPImciXPqcjPP4SaHIUZMTlp5z3NjBEGCTMX1Og5Z3KI5j2RoQqPNV5+Mzm5sWNdJipl6kCHOJ5wvIAQIXOp55HJNQ0UA8qmOyYuOkMlZgBm0KPiTrsDJGucDvMNJX9OHc0nn2pI7RuIQJk95/wMeaGnOd55mXB8gfKWqQSSHG3vNZMal0fsEfMVMQfNd5SrOrcsYBD5ESST5kfK0u/NIWWcgKFpEaAbcQZzFZmnyuODriCmoTOiYAJ2J8OjJUcHfSBWxPnUZmQF9MhflYyJQmUZ9fKIZxPhYZObJH6sAR0iNWnr5vDNp8OTHSSdahcByAXqsK4MzGiTIdcn9AOIvphsU4QRLJhtOrQlSABCTfNnQM/O4CU4xjOM/NcZI/OD4pDOrQ2/KL5hjOcc3NBmCnzmwZcYgfZ6zgwQZKX356e0ucGTMr58WDv5c2LYwmY18BKPn7EfTns+ZOEucDZ0f5JLwU2lzlbO//LAhpCHv5Vp0zGQjJR8D/Pr5BEKAFATIL5zKF/5PjNL52OEucn/Mf5DfIOCExy/O9fLSZV/KsZHfMC+aAs10sXEwFuDLZCojDD0eAur53dgOpmAvwFW/CEQmAtb56QEhQN/LwQhfIPKfkBo5RYnWiq/ETm//KgF3AujmhKSg4HZ2QCm0n+Uj/K2EspA6qsFzEFV1EkFNDGYFW/Lv5DZTKZMgoP5zziwu3DJP5O/O3IAjIv5IEU95HAroE92GecVMS/5fP0AFRBPv2mYwnAhcx0F1AqH5/GA6q+F3/5nZDEoHVW0OdfOWod5zewMRgguQguH5gQp4FXXLM+dPLCFogv/5voMHZDV2cmT8DqZnmQbcKCHqSayBaZKyAbcENmvgvpi8MUISgQlYgiF1XCSODbgGZRArgopQvcCozMf5+Qp35oxiI5GQoZZV/NWZtQqWZ3go+kpzLWQ0aDn5FXG2ZvFHEORfJMgQa19MUJCqFBbC6FBICeZSCWuZ4ikMOO/N6UDzOTQ5zN7EV/JeZtQpeZ9QvWFowq8QoIWEmfzNGFALJDCEtmBZywuOZlzhPOegqmF4wp++rDOWFdhwWFiLOZZyaGz8CwEoFAdBRmfgoGUzQqx00RzyFnTJR8BLJkcMihoOzzi1RKnJBF4wqPMRjJkUjB2ecPLIqFmQoMForLaFrLORFVRzyFPQssC9NnqOeQt2ZCwsFZ26EOF5wpt4GIrOFnaAlZM9MF6aTR+ct3QjaUTVpFfGLNGDIt9MUfMP8vIFZFTIpYusvkhc2tDBcHIuOGWrIN+IkRZFgovrcLIqAaNrL7WGDNHZzLkQhiKUL5qLiP5b1lr2E+GFAFfPNsaTOFAtfJVFWordIyjPNsRDOFA7fJVF7DOQCQPBq0L2PWieOJXBo2WEFNoqKy2yVROGBkkZnWNXeZwjwhHNiX5tI31Fs6A5sL73e4WEOLh6e3VFL3zuyB/KVFQkIWwr3zToiEPFBD7OjC3e3DFIYvpCVpw5sEYsSgwF36y7/OlpNX2zFwEKv6AClGyE/MaCwAtGyoAqJGqYt2BRIPa+VYs/Q5tgIhpYvAO5tlwZPor7C4WXu0AJ1zFyWE1FQK2jCR517F+fmjChApVFRotVgZApbFzewpGQVmUG6YpTFFlkEFc4qHFJDHmJD6FGyOYqLKzAvXFBYqqiFGGLFqJw1pApFts56U8BJ5BiFdotCFutMXFTLA6BJ5CPF2mKb2zKF9CCgtHFXYs3FEAKTsfYqDYYekHFj3iDC9HUNFb4tuqPAIVFhSHiFY70xGtTPbBXQDSFloPVYSItLcOQsUx1LLbFJ7U54DxAghSR1Rc5QsNsmEoUh4qhqFGEoBF0YSagykPglDLJIlgyIwl7Qqg+iUFaFGEqxFbYpfAG6wwl+ItLcwwosBGyWOZlEtz4otieZxoQCOGEs2F6oSeF1fy4lnaGnFHmE+ZQkvmFcLkRZjPDWsuwrrBOdD+ZotgeFckoSxnmMBSWEppAlwrqyKwrbFEkjJs5oPhZAkvT4a1leFmKMaCaLMpy5EsxZ6oXrwbv1e6jB0aCQItwlVGNol1kkCWREpoOuLl/MTkvGZbYs2KgCwwlCEtxcKIuolaIrhcriHMlb1Q2ZQUoRFuErYljQUJFcErUWOkrRUsUvSlXRyt5Gb0vpsvQ6KhpF8SNYB6C7w2NZbvJEiJUtJc4yAVM+SG3aNUvKlCfOjMdUuqlOGMLy7tVoGywyFFAIIucVUqKlVox3pVJC5FQ7Oc2WfNt+kkvS09TkQF0iEjFJfOIFaoq0ke/Kz8y4vIJVDKr5K0quZq/NQFC0szSC/LsMsAQtF0/L4FOEQdFg/OG0oQowMA/KIFAAvLmLop75bIndFu0ruFXzW0+vooWZ+grhcu0TWlT/I2lFfLUFK0uigc0sl4qErz5MgqCZkktqevAvJofn0LFUMqwF7I0zFOnMf5eiGxww4ofO//NohhkqP2GMpq+kkqVh70p+lf4t0YJF3+lRMo2g2c2sFwMrhcYtiWlsgqYwh4ukFM/PCZPYLPFggrf5O4vuu8TP8F4fzvFjMt16t4t3FuQumlwX3W6FMpYFQEpVs8uBoFK0vxlDDPWlZMoDAHS3FlqMu/FR0s4FT4s3g+aLOlGeJI+Y1Ho6mYy8FnkvMyHAuFQW701l9gvEFKX1VlpxBn5QTLbFisr2lVMt9Cq4rllhMtzKVTIze4uySF0Ep8U6Qu+F9ktRcSEtqFxEvjIpW3+Fvkq6AOEvDlGUqOK6q3+FLkrolUzNqFYUrolkwts6yzJ4lBMuTMQn0Tl/QpCGgwuZcBzORlBkrklrQuJFEkpElswpUF7zLMlzwuuFFzLkl2wrmFNcpzonzJ2F8cmUlUohoWhwvUl0YU0lxcu4lukqn2A8oylRkqIFMiFMl7KSrlzGGCODks+Fycool/KD+FsIpZlqOhO+wcojlXkohFJQvwlQ7Cvm8ctXlwUuelhKADl4hjJFnzCil4UvPl2csw+m8ESleIoLl4SSFZ5It3lMUrrlYwpylbAGjWeUpAZTziqlQrjpF7UpalACuGlVIqVC/8slF9bn/lYov3pyIOAVkCojaECr5FjUu1Z4wGAVMCqAVHRU5FUotxBNvwJB7EuJB6rjfAiotbcXIKIVY4pCGYYqIVeotWlYRz4+X4vvJs6HIVQEsMCluCIVZopo6AjBq0RCr75p0toi+bwulfCqZ8pwOdFh0vcO17UelrCtl2cjQF5n0sMOXB3koAYtoVmQHVcYol+lVCvkoGYtYYZCsUVMYpoUHvnko4MrklSYtUVWiuJ4wB00V84vnYm5zKBO4t6kQflsVZsvbFMBxEV0/w/go5xFKp4tcxFioaol4rrF1kSo+AsqyoJ9SiyJCucVl9XU4FCvsVUh3oVK0otK0iq7qcSpHFzCpVlQVDIFRCooF1Mo8F6rnAwbiuy5FDUcVNn3NlB+0lKGQL1lMSuW4j0uNlESvPaVsoR49+1UVdsuiluguEVrDD0VsKD3OlipllvgtaVaioVlL4tUVSiuqiw+0MVzZyvFT2FUVzMrbFnMpCVlStvlH8hGV8sDKVgss72hSpk+74roV8WAPFJDGyVriuY+1ss/qnity+xSpAapoEcFr8qsFrSsssPMp8SFStHQusvqVJSv/AYSqJsBSuG0Est2ViSoVlPSuoVDCppl+EUiVQEuGVLiueVGsoXFEysCVDypmVqys+IAQoZliytyQz/w9CwQpyVFYvtlPyr2VZAHAlXspiIPsqHU8EUCgKcoJA+Bz9aIcvZYpW1JVm8teYgC0pVMct+4xDQ/eq8uYlxu0JVi8u+KAh09al8tTlHKr1U8UtLlScr9ayUrToRcvVc69BjlrQtFVKwohlokqZ84wNkltcuPCV3Qrl0YXWFfrWElKqs+ZoqqUlTEpIZMKuPak8poItQklVg8uSQw8uNVo8phZ/Cs+Yvcqnl6fFFVlkohlNktlVXwjZVd1WsijKqxl68tpVr8vBFneyfem8qGo6+w9V0UsSlfrSJVb8uPCnKozlZ8rtVDgL5VfkvqOgqsflW6RaOSqtflKIvNVn8pAA38sF++Up9MLUulc+rMTMBaq7k3UseaRjSoMpaqgVO9MLVoCrXp4CprVhIiNCBaqbVZasQ6JatchiCprVVatgVI0r3mfp3GlQwuJBvMy4FPgS5BRczL5o9DDF6c2r5G/LwU701nVd+ma0Mw0nViFNweLhQ4VtPkkZAHT75o/IiMdM2EFe6sviJs2dF3fP+0kwA3+2IrXV9r2hm3oodcnSGUZrF3X5br3nVE3Mb5u/JsM7s2f5FlnHV0M2fV6WAW08wQsZyArW0JMH4SIGsN4T02yZDrjxsONwBMZihIFpr33VY7ExlgIub2z8hQ1uModcuiR208inUFEQyGMX6tYymwBB0GQxQ+PguYFKOhagP/JUCwQqo1E/O4F94ow1K9RoQIgsEFVGuEFAgsI1pMi18jGukFI6qQFtGrIeLhVYFKgtfVnOHfVNjHPVlyEXV6PhtiImtXVOGooSKs2b22KulFUEtHZqQswOzGpRQ9kuyF+BxR0qKAKFPokv4Q7w8lO/P/kgC0M15mpg19KtD4ZmrhFH0iTlhmoQlLQsGRhmpol9QtaFhmsYlMGtIl2iX2Ugwtz5RcpR0uFHGFccDEE8GqlVKPhlVhmuElMwsr4UWumFwk0+ZcWtklawtS18Gu1VMGt1VzGrKy8LKv5/ctC1JcouFw8uK1JIrm+Vmqi16koS1SfHg1DqpR8Tqpc1PwpGMBm2s1jmq0Q68us1oItKUPi261UIv8lOmoBF8IvqOzWr01pIsS1pbyilzzhRFPmr5VI2qq1gWv5Z0AsigEiX88FWvymk2uG0zfEpF9at1CDIsWMviQO12UzbV/eR5FJRUAVubRpFh2tO1TuXO1N2vFFoiCCK8HV7VYCv21T2ou1KfN5AwhjrV4uzGl+CrlFgGrfoYSsBlAnQU1qSv0kwmoXVG0p1FM6o2l8iuY1CvAh1JooA6m6rEV9mo8QvCoXkK4I41giux1yGriYoiq4V0msqQ8yqkVYGUmAd6uFACOqfVeiq+lDCjw16iqh1b6rJloOoC1YWD0Vk0rq1QGoTFsMsg1YGphl4SsR1Np0kl1isqM8Gqj2TEpHFVGtQ1rkvQ1Muqw1z4ro14c2WV/ysK00Or1WzstI1zulSV1SuY1VFXmVOxQVqdM1ohamtwV3stlFMEu01Y2vK+jwAM1DmtXlaEv51ACCpVOEv61u8tjl3hgd1TEv81OmqJVBTmkEQ7081pcvc1Q7181JEuc1Q7yFVKZyDW5WvFVoevW1yqttV3OqklLcuswARzj1Dco1VgvCHe6qtblOetfA2WpVVfzOK1NqsNVpmsT1u8s7BTvCS1FqtDmeWqOFhkti19WpRZc8tAEQ7yJVbqqG1CcrXlBepd1GUpqEgS3d1RssG17WsPliUpt1lYsylKeoiO0aun1X8i0Y4ervlo2qj1yarZIPQlr16aqqOmevDUuUtzVv8ualHRR+1A0uASuhNu1P4xalD2qV6l+pO1KCuFFvUp3pV+swVGBWRe5+rOGVUuP11atP1BIBwV473+19TMB1NhGzRrYtLcyouzRFCsh118GzRNCvp1TqPZYDCs2lzZgPqLCpNF2aLR1xOtOI2aKx16uOXQt8Lx1OBrJROeSJ1A2QOIk5kvVbYvJ1oiKp1b0uQRQEDp1OosnMWisgN6llgsAMrANOLE51oMsnMRisTFZAsYN84vMVn6H4NcSqzF+CLsVGArENTishl4SKINeSuCVolkPkXisENCASeKfiu8VQhreIQSuAFwBrCV0hsth3Lx2l0Sv0NNCviVdcPgNSSvRl4BqAlaBiARPWEyV8KvCRzVnnFfSNwNThpWleuu7MaKuilWsrMN7sP2VcTCVlkhqKVM4GYFQRvWVKyqoRJYt5lZeE8NXiuhVVCKgF4yujI2aMbF0RpkNOHDCVauvThBhs7lW3lLQ0Br+V1c2yNNCpcNhBuL0uusuVOhrAlHssF+OKtQO2fImlsEqQsRKpkQNC3XMZKqd1HqJHQrupnxv8M3lnutjREyJ91ScvXM/utaF65mD1mctoNMuxzlYmw3W65mj1p4CDWQ5nzg8eshRLcX4lyeo/heevT16fBWN0Wuz1UAVLi8qvz1Rxv2ZPzOL1bRpbiZevlGnPH2NJqur1saNWNVestVoFkqYZMsAQexpzGreusl88tGNrqsclv8J71YuLONvGKNlvqr6NA+sG17Rp71R8qrR4apRFExq5V8+tLR8auX1gCwWNa+tSlbxpLlV8q+NFbApFe+veBb2r/lO9L3Mzao6K5Jrf1OLhalScOKlZJqru1JolctJrC4tUspNjJrv1PUqNcVUrpNJ+ugxnkKfp6DLwV9TNz5xIKqNfgTHVY6CsNiGoYYFGAKN76paQ+Ru84i6ofVpSOQNMptQNQ6S75yW1INPWF3V6flwNqhrcFR6t8NDGrPVmBvpuOZzb5eEMnMd6uJ8COsnMz6sVNwGNYN2Ao/VLBu0FkpqENHBos1XBtTiwGtIFQCLcNbpqQgUpuDNxwt5gSMrCNCwokNlPJ/5oMAAU3ZjNN+1GSNihtY1tkAf5eBuNNDEClNmht418vHAO4pojNbKhiN6pr2FW8OSw8prdNgKUtwVZojN4hMNN5RvLN1/P0NmSvkFwQsnMgYOUF5AjlNypvNWHVRdlbxsl12GsqNMXTH+YQsh2GhqZeKdhqNxJogliQtxVmmsap2mv+N42owo+BxhNxmtykjhu6N4wss1jKN3kPWtT0NQs3NXmpGNNoha1EWubMmmGD1bmvWNSyHm1TmvmNmmDYlwWuWNGxvC14xo/NDctq12xvS1QggCO9xorlGWsZ465ni1KWtAtWHQ7lWwr+Z+xpq1JwruN35t+QpWo94QFrdsSCXr1cFoK1AFvxNquFnllzidVq5vPwBFuiOp5sBF68vaNR5vjkgS0otA2spZZFoW1B5o6wLWs21QBpvN02om1bFofNPaRxFGJpfNQWozNq2uyRzxuQtnFvMsIlt21eaqecDIqpNj2qOMvJs5N5appFslvpFH2pUtsDO5Fylo5NSI15A6lrQZ3Ipkt2lt9aWlpmKr2vnNmfIHV+CtFNXkzuao6p/Vd3leKq6tlNH20+IKpp1FJJXwFK/O/mjlo1NeEJJKm6vNN820u+OERNNXG0PVBpoB2wmVsFOpvW2vsKvVPTgZmNclkV9puUZHWydN7lvyW36uctaOzPB76uL5SGxz4vpuJBHWyMVV/KTFHW09NOZoKtlVtg1x0Q1K5Gp7geYtWa7/Ig1Um1no0VpGoXMzGU8H3AFDloJAF0ozN3ZyxMn73gFXVvqwdlpLNPW2vB5ZoFshIQ0yi6prNy22cI76obNkVumty/N4QZApJKbZqE1LltytBwToFbGAqt+Gpz433ndWMwV0QSspKtzZ2ecPht825BpHN0p3N5p6v38y3mGt+ZvzGSM1stSAqoFC0x8toIQ0FZ1tctxGrE1Bs3mtINp7NLlvWtygvCFUmxBCgmoI19JRgIvGq41SNu6AF0qkFuU26trGt2taO3att0qYFrM3qtNGoh2QNvV48ZoEYvJ2et0VsMFkVumo6ZtetbVu3BZuvHeFurtJWmrnW/Wxa1juCK2icA6125sSW7cj3NOEqOcNmqv5dmvu2HWoaFi/i5ta5qvNF0Wv8HFomFufCOcvmpaFScqOcr5s+cRctv0/ak/NgyN1t0Wt/NZW3At5iACOhtuS1HyE+ZRzlNt13E5tjjGgtOWr+ZhtvgtvMFqEFtpuFeko9t6FqEE9epdt2FrNt7CxsoreoIt88qOcrmt+FBm1FtHWs865xSFtPtqdkVWy3hdFua2fNuM1wbCVWstuItYlpu2SttYtEpUmoPFq+E9R01tAlqNsqAm9toltTEVR0rtkloP1HbgZFIuyO1H2rHcbUv0tkrIPKRxlbtX2rGabdsFNmltwgTdrWcjdqsailuSq52u7t/IpJ2v2vU1/+pSFZ/ODez1Tst+VrXi7uCctFfKhqnlpfVTl2agW9tVN7DzXtvlqoenc1BOk/O3VCNX1NDNhFqhAwGtEVszi4UGTNU/KCMYTCtN8/NTehtWStXlrsE17nACc6p3txTIVNG9p/tlVpXt5NWswp/KPmi9psZVNVatYDohuiQQTN8NV3t0GsK1SMpuqi/UQ1q1vvtCPHHNlzmxlN1SE6V/zY1lV2QdkmsuVm9pQdh1rrSpDoOtAynoF2tW0FgNu0eH9sECv1uftqCVftjNrgdMTJZtkErZtDRqL5TRpuq68DXNPNoNqNCi3NRQqeqgsiPN+5uwdZ+ATt6EnVWwjuG1T5rauRUAjtytoPtUjmWZd5u0d32CLt0trAdTCGW1b5p7ikYAq18trAdJxGAtOFpBqRUFNtiwvsdDVEttdto+qy3H/NVtsF417lZ4PzLWFJep8djepg1RWsCdFWsLB7DpsdCdtuF2DuHoAdqcdzNViQIdqx088uEdmjuhsq9okdCwrclKjqotEJpydKdsNuqsg61GdvftFLLXN+duMdt5pztwjrVtvFtKdJjqvVnNh6EoTqhFs2padWapzVc5qkt87gO117iLVOlqBMK0DrV3TuHc32r6dPdt2M7BGGd9dpEi12tFqzdvJM8zqZNO7l6dUzuHtH2puq/To0tfapi+lloANsYqgdk3jBVbOrAdMyJ2lzBtOdMBth1CNRgNNOoRqEBpR1CNXQNJBvYd8SBOl+OubSN9rcFQioIdDGvR1cDoetxorwh2tWoNjCu0drnm1FMZwYd84oud0LrYN46p/tSiq51CTugdqOEaCf/O1qXZvVCGLpud0Gr7laDp8dw5rRl19pwdVQMrw8uv8ptEMkleuu1qTStxcd1u1qSiodlpTrlw3Sso1wDvnFWRsZdeiuBV0joMRspCSNqNSSmdSviN2tRiZ0yqY1vzu2VwEvcdLSBWlortxdlTIi+nsvU1/DsHVqLiEd17hEdtuuJVNCxUdPes6Nxjps12Et6N+To91Etv1dTKt91qTrZVAeu/tMNGRNdruMdS+rmN6johQyaqWN5jpcdaxu0dkTt7ECquMdOxs+Nzjr9douvWFwjp2N8kvcdvjp2lUYj1dgTpuNITosdo8r0l6DtxN7KXr1abrL1wbpRdrUlnlvxtAEWrs71gJstdnqu8dqsgDVeTq1dxrrvllLNLdIatG1RbrZVEasqdyJpbdNTrRNeCEbdyhKxNQlusd6bpRNabp21RJpt5JJsP1h+XGdfJsmd1rLHtZ2o/1SzuLVR+oXdZlpGdlUsf1k7q/1gzrVZK7pmdTpkv1y7uf1W7q2d7doSFFluSFSIj2SgDGZZFWRUBrIPG5pQzohyYOq5z5nYhT7u6SnKBHBeqgpByXKxWSYPfAoTNa4ZchQhQEBd2sTkXMdEOLyUsqSyWf3jBXcFic+K1e+MoLJSyPXz+CoOnBsTiA9iHqdBP7vD++oJicJqQnBeHufdt/C/B2HqqqrfwxSdoM4crTTPoBYMZB/TnSRroLfd3XOdpwUSJS9HqfEUQoBSvyPw9yhmf+aHpm5QVDhVSHsW5DVEohSrDH5tUXP2NoM4OcHqlIiP2pBvS0NpTLGEBxcJ75/JBAojoPm0yHvhACn2pBnyBjZunrTBwYKJFGnv2B+nrwKDTmPMpEMRRMTnk9S4O9BdnosKB4Lc6/3Iw+7EK2m9XMkEAAIBSaV3qS2XCgBAKUTEfTgC9aozU90/O89fn2jFhtO2S+YJQ8X+24Z56RY5inoS9bntTYXoMMwq/JU9goLugqZzW55npQ8fRmRSopD09eyX6YKnJK9xntGI9TjM9AkKow3HOy9pEOY99nq9BzXuc9n7vq9RHNi9r7qvdYrMi9l4M0R8TNC9YYIDom/OG9pHsvMsKX69QYMy9CzO69J4JVEWnKS9+cF4dt0z2dnmWo9nYOq5NHoXel4gV5KHqa+e3t49cSFy+b4jHByTg/dRI1ew6HrNIcC1pGiWhGFpOSqB2lkk9nAUO9NDHO9PLA45V3o+9+3vlgngPF6VTjcMNn3OSVHvQiGQMgsFOmuSD53u9xkmU9Tykw+QrE35iWlXed4jQh0PrVGRj2wZ4Pr8+dwW/dAOGAhR3uq5WvVO9G3A49MBHa+ePoa941ue9ySGx9YnsveaPrK5rlsh+SPqoZUnpI+cXDkZHPpfekPsM9z2jveoPvq5+10ohgPu65PyER9v3t49QGHmBErAi9iBji9RPrc96WhLBcvptltXt598xAA9XBE59SMOp9Z4NZ9ZPoV5LXtq+Svr2Sryqg+VPq69vaGn+WPq+5CvteBI7ozG7kMMcevRd9oJGbespLHd4wGchKhT16vvrdRfvMQ67vviwhkOS2BhU99ZkIqlxZnD9qrIJ6iHnqwVDkD9Yu1nt63vWKhQqC+DnIguF+wG65nKE4ENEmB53vTg2JGP2OXgV5ZKhzK+bD0Yefqear2RaEsBPY5uiVqO+Fho5FnLzw04H1EUssehwJXrY+DC053foOoOkQX+BSURs7fohmyUwDZTfvzYcSADZGCAj2m9HlGYrIr95e0QR5fv/YxNDWowUAc5EnGn9YziJFnBNLJ9bDL9vHvsQzfspqvHrxQMXG+k5/uq5NCPrYofT+9d/p2owRDi5X2Tr9HUGH9Ljgpl+bAIwAjKoifuFW9Z7qWWg0iL97rrhondA+sMTl1woALW4EAdAD1CCf2UULX9CAeKOs9CY5JnNv2OHE/92jlByGISg5KjIg4yR0X9DnMCykRxCGxAdo52rBr2pnoXkBtL326yBoDl/sH2TykM9+UzH9y3Gx+EbO/9LUl2odfJF6QNFGkQUQjZdiMAO6fWvdvKsH91mDLBEbKXgSJTgDa/s2EZ1HkDUAfvJmAa2A0gdo5x+QEDYgaX9vpw1mh1CKG2/uE4PAYu0tHM5sY+w4DhtOY5WvnOoToRDZO/oakDAZDZ2fvmk+/utVuAfIDCgdIDmKPOoqV24Z1qJcIIAb+9lXwJ+vgZmyKbIMRFga1R2vsymNgc7oKnXG5p/vzYONl49SFA8DKQeq5DN0LmPUgSDcXL4sb+00pNXqthjvq/lPRy6du7ubqDh1SKjZNbQTZU3MNHlqD8fNQVlHjhUs9mOStPRWkJMN2MbpEj9CxzZsDQfj9W9k6DbQY09vQY2OrQaBMPQbqDw8G6D02BxBf+rT9YFU4ZYChQSkaA1m4yL8gbV2WFxgfGRfU1pqBVSdwfpGeRxAZQS/Znz8GwdUpBhig44GCODQyWOubIiH6SyKCmZhmrQGT1uDy8BFeSlB791SO+s2jy+DdFXP0RtCuDlYGRIPwePaa8QeDfOMHkofDygYnsnINlR06wIbODRWIRDpLwODuWOhDwIeGIb8H+RHcrpiLwsP9uIY54+IYGUaVH+RrMJQS5zDzw/yLcJ+wewofDRpDiIZuq11mxw5IZhD3hB6eRIcZuIVMKMtwfA0xMWLQaGh+DNM2wdfCKlxc8hmIYDow+Wvl2DJwdhD/kzJwsodJegoZ9Qs5tHd5ltGliwe4UTKNqQdIecIoNiGacoaLEhAZ1DRoY247+GqRo2DRD5oeDI8lA5qEIY3IKD1uDn+B7iiJLVwlobHgzaWNDhlU0VTIdhD6vH4wloZo6dIaihtoaeUwIYVDTFTkaxIYjDhg2TI8lCCqp8RkU7L1uD/ZioeaRHjx+HB8wEYfdJTKNakrd2TD1Ia5KwbwyFZIb4+lwcpD28CjDqCTNDoYaDshoetDAYa2x5YeVu9qnWwtwa6JINQJD6we3686CxDxmKtsWYc2uyaHKMCFVOBRMyxDo4bDxCYbK0/oYHDzoYnEJIbWDSRMMVMIbbDmYa9IfoeTQ6yFqRJiGUMm9wmYLhFNDyodCowWBXIZQOOmUoajI04fNDx1x5DMoZbDbrrFDg4ZrDJ4dEIG4ZIUb4Z4eEdkfDGTofaCmyZRfSOcd5CBKD2arKD6odXdmpI2yKDi1dvBFqq0EaBM/sjGDLFwkxMEaQjtVX8BMEcJgyEclZM6OvguxnQjo1UwjiEf0gOEe99PoFQjW7vi08EeN5VEbgjKftxBdrIEdIiSmCqkQviTnnmCbEfdZKXi88rbIX8PEcMi0fhC8zCVpiKXmi87CQAaKXgS8Q/nUaUkcaS7EcSmrwSH8xbIeCPgxK8CZVIq3nPTgMIVq8rbJUjTXhBC6cXy8EIRrC2bJdmDYSH8avk+mw3kz8Y3msjmISbZsoVxC0iW7iiSyRCrvlEjm3nJCwbLJmcfhu87sTCWV3l7ZE/iCjOCUj+93nAi+iS+89yxZCVbNBxMUcPgduEAD75BHZ9rM25goRkUDn1N5AUxguWXMR54S2+wq7N55Jyz5Rp3PyjGa33ZY7Jswd3mvwp9vfZ57KtWfCF0cN7KRmkmAsZ77KzCui3eUb7LzMBtJS84FHw5GvJRW4NAN5KvMX8Q5DLBCPPA540e1oUHJ/Z+UZQ1WHPSjM0e3gTKmw5EPFs8q0cU5YvPG8Qwko5BHOmjKXia0TnLGjR0ZI5mKPm5+POt6bnIW8MPPFCWbGS9Q0cSmBNU45Q3IK8vHPB5WPIK8QnLHZInOW8DZXE5W4UIo8XhORunKqi9sy34AQqU5Btni8anKu5fmnuWu0iiFgHJC6iSwBjhnNPEikZ+jkXPejlnOyjgoXl4dnMxj1vSQgJ0dqe90fV0BPxxjmkap8y0bqm2jAi5hvMqm4hNF5p0eZjC/yO5wsxDmljjpjE3iy56HLVmhLyYw0Ma5mGISy513Jz8CKEm5BXJdO5mOK5Isdm8Dhwq560a8m3Mdq5f3KrsbXOE5wPIuiJKABOl0dymasd+jX0aVjPPPyjcseZ5+Ualj3nLuj8cz5I2vLx5uUwhGxIc5jJc3qpuPNW5P3h25g3PNjMOEsSOMf/G2P3J5zmDdGf6B55EseL8053nQV3JEMOfh6DcvNK5yRrxxx01q5VXMKh11nZ5dXKMsjjku5v0Z1j6cbB5wnIW56cYIUrMem5CAWTjlscOjGelbQcvN9jLsWFjtsczm/Zlx5EPMSWgcapjhvPihSvODjdaG7jVPMi5bo0mRcvKgNrhkl5znKENCV1M5vMRkYbo0UAsio05W0y7M6BQXjL3Kewc8anBrMYFjJ5jHjzPMyQEGCHjp4BR514S5u/cfS2g8Yphj0a7j6cB49rPh15bGAhhkGO2jQ3JRhQqFZjq3LqqSjlVDpQet5RbVsg0kxFSSI1bm5H3T5tvIj570LZFY7JyscXFAT5EYuc/8ch8WVzrsEfNB85RiD9/eTt5I+jQTb9nATc2lgTe2pCSTvNSsMCeD5xCcATwpIz5mCXtZycV58K9UISnfhcidCbIS9kQRkZMX4jzPm0GMiVoTnPn1iokfWcaBlZi3rNoTIvi5iLCf8AXrIYTIDVciwsRoTsvjES6kad8gUS0jMd1oiKmJLCViSN8d4sMjybKiikIS68qif/8fXgAQzYUzFxISLiHYV8iLkeiZvvksT3vm/isZxd8mfn9ZEfm8jXCb98tgRYj6/hT8GicmC3UUz8+DRrOO9zm5rhmxSY0X7im0Sr8QKW6cSKTTOENiaiMpyeiP0WriCkaSTN8W4jA/niTQidH8USc8j90Xn8E/jmijbKyTHKgXi0bPOKXicumaofNRqUeYjdMb389IGZ5q3POG+yX1ihvL38D0iKj5mVLQJQ3rwxjjaTPQ0qjC7OqjluwyGdUZajIDQ8QTUY+5q2gP2r4BYyqOA6jfUe4Fr7OmTnUdoTpN0Gj/SflgAHLqTDZUmjB0Yhev/LmjBybr2hftGjTSbOTqHJ2jx4UuTYMe3j3CfOj80cOjHPnOjvcesi+TX2jBsZgOsI1O55cdjOfFHV5bSfSQRMaG5svg+jvXJhesvmxjKEkvyUhzgYgMdQ4TCqOmCcb+5wvjhjJXKF5aKahj6wRe8widBjVnNRjwiZ0WH3Pwivj2njp0bBTeMci5OEHERUfkxjOEABTZMYHi/yZujrseN2SidpjFKaLo/nKeThyaLKJvOpT/KcZjXKerobyYcT51VaTn3ODOlYGJDgvINsnvnFjscc72dEuljD3LguMtmaj/sHlTVdOVj1yePO0XNk5Htz0cWsbzjLXONT+sY65+PLHOBqabjY5yYWU0b5TIQ3ljQKaf5NsephA51fuDsbbjDieW5+Mb+ORXQ9j5QO783sYdThJwJ2/sd5j72NO5nsfEu4caVTDUVeYbqYjjCafAwx8a1TEJxoYKccq5G0f5hP3MNTpJ0PKPPLLY8uHYuhcd+jxcfYupcYhTuJ30RVcYheCTlTTYMfyjK2kOsqXPdTZpy3AUHKLjV0ajTRPLejdOB7jfqZs8A6YHjvMewsI8eL8rXCZ5mqfJji/jgG5KZ+QC02R6q8eKj9fmXTPPMTjk6dr8mcbTjaHOnTH3P3jZXnHTaacPTg3hHT58bHTwN0BT/aaCo7oKu5f5OHTMjtGj+UdFIAqd5j2yTzUddpNZldgj5HA0gTmCa4MwlwoTtvKIThxUgTlzi/0QGfVJcCcP87VRMWXvLku8Bngz6CadyAGaGT/6dAzcPPwTkEdgzkGYUut7lT5f6fwTtrK60IpsYioARvSEmTXMJSEozZAQkIagxKifyMjAnCdDCaAQZirGYTaP6XyS5AQAyemXICjSTlSHAVoCn2FtCTAR8GvUQ4Ce708CMgT4CF6vUTomeFo2ibtS9sMkCnXkGicgQsjC0UiCKgTMT7YQ0CNgREzSyWSNBmbjCpaSAROmbbCAEVysOjm28rGZMzFGQRCJ5jnJ60RmifAXcCOaXIzPgWHStGXthgQXGirmdSCYQSIiFEQcC2QQTSnUSczaQQ6imUWSNpQQYyaKSARYWY7SVmazYNGRCiqQQSCWKqqT6DJqTg6vEirNT7jT7yyj+WfKBknk5RrGQfhELwU8hUajw4kXR8+Rtto5GsqzIccazBPzzaD7SENWJNgCdhtvZkngoQlAR6zuBpA4wGu84fUeSJKyekCbfUZRcRG/Z9AXSRfceAWoKhKzCUz/8qajQFzWYWzQs3S23/nmzCAQdpkCmWzIcf2zTKkj6acb/80UQxQp2Yh4aAUeTc2cOjN2Z0Bh2c2zPlXw53/jORMRvem+YLezWPNysVyFY1G2YQCNqi++O2fuzdlDxj32ZheNAR+jb2dhTg5iHIzosDuhFEMJUQsj6f3PIC6Kcj6QvPRzAQrqzCMb/MuhJRzlt3Ge5AWJTyATw6UOatNpiJWzYObQFVOZDjQOZwi5OY8QpMayFLcSuIv2dZTpNhxq9Oc4CvGrpzfca0YDMcsQIOaqzbBPCC/OcBzqCQ5jXOYKzCAVsg0XKezkuf8mFWbod+mZCGsqfoCUgmMznzA/mdWfjTRdjy5ZOcptcpqx0xXMxzBtmDs9qc1zZ2flzWQr84aOYlsZfI99LXMcCJqbezxceDsCudBIP2dsgVuZFzIcdNzA2ZyRAufpDvGu9zkOd2kuudsK+PKLsvqcVzqQWYOeeHjz8QRDTd2aqzBkcQyEudSCp4B/5WeeHxucb1zhD2esd3KNzNjDlNpcxoB0gS1zollng8POtz12dDYP3NRzHt3zzggWdz8uFbz0oU+IMecbzI0QLWUptrzWaf9zfcYrzTgoBzqQQ6cAaSSsUpoRQXafoC72fCRB5Gx+FGV2za5jvFVPOTz6+aTzeec3gR8eQt5OY/g4GrZzQhpfZlOY9YpBplQyVvpuseFFxUiC7z1ebXzh8D7zqaA0Ch+aDz8FAPju+ZRzT/lPjW+aweMudKzMEuS9w+YQCbpDvTXOd14bOKdkl2fHz2OLfjRudlzPeIt5e2Kd9Zo2A6qVhns1w3BArpnAkofKKsGY0dgtplwL26WaCgbSaD9+tzAhBZ+D4GfQL1BewzFQehiwIDoLazloLmBZQz7AyRYOBeBifQS4L3ESRBOzs3qeWdGinEdSSVGdYjohauCqOgYzryRmjWolfSA6WWCeGM/SChbEjBqUYzM0ekjcEUULqXhAyYhey8dAQmi+hbeCTYQ+CNMfIirgRq8SbOUziU2BCJ6B8zdUz0Tg0R68mmcOSGkflgumYizvkbxCRme1m+3hEzCWbcj7hcszXSS8jtmbyizkbeCeUXpC8WZCLsUfsYhUV5CyFtGiiRawyxJRPIxKSxCvsQlCBUR8Lmcwgq38eZAdVznNwg1yzVlqzzP8zZIiQXKLuUZVzq+YKjK7Nqz1+dZmFUZ/54+eX0CRjeCL5vCjtUe6zpTlaj/sDNzg2eqW/Zkv5o2YZmkskAFYxdwWdlFmzIBdoWI0e8F5RYmj62eDzM0cFZ22baLi0cuzSxY2gGWnrzXky2L3gr84u6b2jr2c2L5NFY1OxeOjmKPdzV0baQX2fDzd3gej/2dWLz0fVOlcDmLuMZWL0+YpjaOj7zl80JC6MduliOdnQIMe/zQQohjy5hgLEOy5mkMe2LaG2+8SMacFROf+jYGGdFeHW+jZ+cQLXxdBC5RcJjjOfdGJMeALx+fjmyFk6L3OYJjegjjZ8ed6mPKbTzKcyJ44uYpL8cxl4RDvKLRsZpLYsZVzL+cFjKXKrzQvL5jrGXRYhDyG8huYgL8af9mI3P5LMMdNj9+d3THJftzRqb1j3xfzjmsadz3ecNjZ32kCPxcX8spekCdRYtj0WbqL1sekzOpd8jUeY1LYS2djl/PZL7sYUCtpYpKKxYNLfsbCGNJY7jImbzzOccECwpdljMRmjj4pZFL8cfQtfnCxzlceizPJZ3jXwibzipeRwocbLTb2fzjcZYLz0eZiNHKmjL/ecnjC8iHzbRaDLSRdeL79lbT2pZNj8WDnztxc1LrPDaz4+bPj9peZLhUJOQ2+drLh8cJz7oznj+6YQLzKY3jZ+eB4pBpXj3pf38+Rt7L9+dDLyG2fzZ2d3j4Zel5kZeHjwZZoYp8fLC+izZCnpa+aLxdXz70NvjpeYfTj8ZFo+pfuzqQxN5yec5hn6dQL3Is4LZCZkiPBbPLeBavA3IvQLqCZoL2BdSseCfYLUMUaCACfPLSvUILd5foL36d5SD5YgTWBaYLJCfILXJvVCWCfvLS+hAT8wcOxpGZSFSSRdCohZTC8Fe4CZqWfF0hd/SzjhIYmqQAiQYQwC6WeNCXGafS0YV4zyXmjCAmcvS6SXjIEGTgr7LHEzJhfV8+YWpLAWadpVheUi5YSUzrFerCamehCdYXmUSeborOh2HCKIU8L04V6SuRZEr/hbMzpe0ErZkSMO1UI+LAEXEr2YUoyYETv5kUWC51pW4rtEShxZpVcLTvn3CfefUCah1fCHaWsK2KRIM0NRHCd4Uwi14RiLVGZPCQmT0yn4R7S+SV/C1UUNSKhZIMQEQ0rClYXCrGRcr3/W8zwKQ/CVEQpSc/SwiNKRui94QIiLmaxSl4WirOEWErpEXHS/FYfC8zGTKmldSrBaWUivlZmW2WcoTrxlns7NqzzPdUqLKIWKrBigtLq+eJGNWcXL/ZeRSJtiazrxfdqUxPJLii1CZAQl6LVaAEZmukGLfRfSSt/xGzR7ENpfwlUh9ASmzObI4YsxfHz7tVAB8JcQLHUtyDO5dg5iiBKw/+bmLxAxQ5++drLG1b2LV2fqcduOhLEZbDCW8DOLTVaDYj2eKr51dOrC+dL2uiVaLGZej225BXLh0e1FwOemrC53BzjxaMZXQGhzlkPRSqsARz7hdX5sfnBL5Anq5KksOrQvOL18JYEIWnJBryJYYgZKQBrgArw6qLmhzl1bZgtOe2r73GBzeHQwMLOfbLVxAwMnOfjzCBkf23ASzzRjSFzK+eeTE9H3LlNbprbJdrLgh1ZzzNYHaFpaOrLYT5LmucxT7NaFLxufwimjL5zAtZsO5jnfzvNZw4FXL2rah2L9duYhLCe08E00QfUuDUKO3xeLjLNaLLkKcYkUtfHz3BylL9Jb/2xTLDzD1aHCEqYyiN1Yf2LsYALCUzoiMPutrde03a+ybmL1BnYQrpcprw1iDj9teN2kPr7LZefwiPLBLzAZbou+TkrzPNflTXPvfzacehSVac1zqKZ9rXeZqQuDXjr2pfVrL3v+LWPOhSdeedrIdbHzrxYgCW1inzGdYLZfFctLl9Q9rlZbzrkgg3zlNarrDZcQLrAT3zCBc72b1SPzRLEt28Eq7L7CHcOzDSvzdVZUVPdbbzMJYUaaUVHLEPB4CbZc1zk5f/qG/1zrH+fV8tdbWrNdbwQwBd1rFWHXLEBYfTb2afjeZdXzcDXgLXteQa2FCPLP8Z/lP5aNc6BbzAWoXrc6BZ2zV5fAgkrNfLtTUGCvrQvr5aG/L0fvPrD5dvrAFaoMUyjvrXvoIT+bnNA4kTKq7UsILl9f/rUfqalHblPLIDcgTj9bgbxGelFTEaELyldpgiqTCr6DYkLNPjhmqqQICHCaKSClZMiuFdAiFkRqiT6RsiTrInSwibIrmDc8ihmbQb9DZYCCldsTpmY8rHKeKGLDbCiCQ0iimsrGSgaXZTGuFDSmRYriuviIyUaSyiHDc6SKhZOi6VbyiaUL5C6FaFOamRkyzx3Bj5DchY9UQyTn0WEyrUVST0WcMrfUXT8PURSr2jZiCMmeeiPaVGieSfsLl0XtiGVdkbg9cczDUWBgyVdCoq0RKTGaVJSjZzHADyWoOGiH2i46VrSIF00ykVe/mjpAyL0KTviYScOiiSciTfGX8be0X6i8mW8bbUV+ieVYELrbkKrAjtJrqsmKzlNYKolVeeTIUwaLtVfqzYRwGT91d3rlTdarHWesioyc6rDUaZ8kyd6rXVYmTnadGLQ1dl2+OlGrcDTWTzzmIIbwoNr9Te2Tc1fKB7gqdrutdBgxyedrtyYQL4zduTFGU5rczf2Lahw+Tp1d3r6zbAFlNa2bNxZTL3ybUQDxZNrDKYJrwzdjOtKeCzmza6u3xYzrZKf+LsOaJTgNf6sSKYJAoNdRT/+JxzIZflTHzZhreObxTzZaQgcKdYY6JfdGUKaxLCzeubuJeZrwKYJLVYBObxJbbrqURDSbWcprHDfmbNte5TYZLObaVXpr0LcJkTNfrrg51ZrhLc9TSUU5riUG5r5uYmVsfl1zPpbgu8qJmCdLeVTTqfFr2qabsg9fJboqdjrRqaB46pcTrSTYEYfLfVrRLc1rHqeMSXed3rywl6rkrddTppYzrNLZVzFted8cefKLWgzrrQadO4qec+LbFczztZZachPJICqrcLTAISZbCacDrheZdON8dDrVLYxOmacjrOaaGhz+Y1jsaYTrqpZdbKdZ7TjreCzZpfYuWdbaLVrdzrdRZbTcgq+r/qeShJdYtr+reXzZze3Zg6ZpL56ZrL2JePTW1arAe6dbrbKnFC86aZL3Zcjm66ZNbfdcfT0GiHLMMazbwWaOrabffzU9ffZjdcnrXN1jbC5YPrj6dL8z1frT+TnALdWYfTC7L4w0JbqLr6aZL2JY/TBRc6dEEYYL6riX0NQzWcp5bAz79egbXLhqaRGZYLX9eQzwFceaj9enbkkVhinyGfLGbSnbWGY3bQMXwz/BZgzjBc3b4FZYMUGcnm6DJQb+CtUSVV0JiRCX8eJNnoTskcpiVCXDZlMUEjoke1SIkeGc9qVRWEkf4j83W4S3Efm68kYfbrjyFi3vmLZwxkg78fi/bzqQcj8HaZYqyU3iXqRUSNCeVimGU0SQaQVewjYNihiSpe4jdMS0aWQ7/scihWaS3i9sUbiTGXXip0W78tcTHitbIMS0tzXapSbsj08VKTVkcY7LyTMjfHTo7GHco7ScTN88cT7SZfm0jUcW7SOcWMTlTnbSTfnY7VnWSTNSQI7pcUU79pQ9i1aUyTWfnYykna/ig4WLSYnbbZyz0Ti/cRiTQ8Q3iLpOfiInR47cJyni6aSjZfjmbSrHbijL7as7nbKETfHaKTv7fVixnZ8j+nfn8NCR07ffgtUGna5ic8RbSqnbkG94QU7aSd1YlnfrimnYHiTlw2NUnfsTfneSjBVaWWkXLFE77UaT5QOy7WOAdjiPOy7o6GgQP7K6TTl3LIKHyejthjRIfaeGTa8XOxYybfot7NsMYiOZ5MyebSvOHajvUaoeCV1Griyd67yhk2TQ3J8M49Wfjq3MiMi1ZOTbVzy8xyeq7y7U2rYqeGMBeDWjeqeW7i3ezTwby3CnycN52qVeTQ6b27O3cdjZhgBw+YMx5MLxpupzfm7PLHeLrMaK7gsXBTxsYu7gsWhTbFXmeYWARTtyC8eZGGRjrXD+583XRTCsdWudcGxT+MxkesWN+7rmO/uH3YxjG3DaM1WnZ5E3Ye7VKbpjC11u79PIweV3YnjY1xPancdOjFsTjZWXb9S1Nem7cd0TEiPby7KtxZjbKbjuT8CW7CHf5jacaPy3NaB7fsWLmDseTTR+TFLGnPjTD8n3ae8aF5fPatzKsZBqD8J5j4MZSeHqFA5QPJa5nsRNTXybeedPae7dz0PgZscOjfPf1r83b/4qqb+TR+TNr3aYvu09AfZRPe/0dtaJ7/Ful7I3YTirteCi5venQntbt7/TDjThD3y0PHyTTvPZK0jablTlVz/rWaZF7zNVuUeab+7Ht3y0TvfB5+cdD7ZaYV7lcWAi7PN17VWjrz83dMwodaT739Ax5Tcfy0W31bjxccz7Brd5Tyt3qtgaYnZhffUcqPYrAGHwnTBhlhW48ZZ5a8X62C6a7rMIdo4d+au5S8fqMzfZXTm6ar7ZKx3TEPDp6FvD3jU9bp6FfZPTQ/di06vAvT+PYrAx8GvT93fP04BY05D6bp6NQmfT6vZ6p+9aJ7pwOPrYEd/jZowQTKCTILQCaXSfBeAzx7YAzkiG4Lt/Qj5dPUP7p/cAb7vOP7/6ev7ICRP70Gfv7P6cQzN/Ywzn/dhDt/bf7OGagTm6Vv7V2tT5B/cgbMmJgrlngw716S4jkibAyJ4ufbyXloSb7fc70Kk/bXnfAUH6V4TGA7IUaheoSh8S4STrJ4SsiUEwEiYc78A8BAtqXsSNxHkTX7dgyMsToHCGTCGLCQwy6HeE76GUw5GiUic2sWWUuiTJK5cXDSL8mMSgXmsTKQXMSlsXsSUylsSybOBWf3l87/Sho6TtnS7kDmybg6qy7sdFKrS3bboLSbvjI3fyMNVagTbfefkDHKq7u3ccMvSeV59XeMHFBFPZzXf3VeuPa7TTesu8yZ/ZH7KYsE2cfZayb3agzYujZg7+7Oyfx7F+Sm71XabRc3b8H5t3OTeXdB0m1Z/Z9yeoUhB1GjcQ+O0t2ZCHSrB0B6g7SHw3e9Tvdxuj1abB13uavjeg/TuIKaK7+Cke753eN1uLXJTf0a8EgKlJzj7Mk54Cj9CJ6f+7i2lB7XfbBUgPZxT9D0BU+KZi5hKbBU9Q/s5mCle7E3bKHKPcCHxQ9ejn6oKH16dnT/Wk5zGQ83DbqbGHlEzpLIQ/pub6cCHmw+FTqw8I2Wg7C4jPb77itw1zrPeWUcgw57vPckS3PZljn6qPAmvbXjVCnOUwvbW75yhtTEvY4HRKya5xaaQe2mXl7lqbW0o6zyH2iR74uqb0H9w+dT4I6Khbqd17sGSy52Q5OHxvdR7C+nW5pfcCHOon2TGw+ukEafRHDnWjTUQ+zKzveE11639LPPZd7Kxi97GKbJuUCz97rw8MoQfY+Hz8kJH4fdl7edSj7AI8g19I7j7WPOLqtI70H5+hT7Zg8yUhZeV7YOq5Gc+ej7Qq2jbIQ9sVRfduuySn8Ico7i6ySiaIlfZ4U1L0aTzKfVHm8au5jfefkXeRXT5XaO0Bo43TgvfUU49V77C2gcBNfdPTTI+wokPdtHoSiV5NPf1HHWEKHpQ9a+C/fvj4ur6Y25dJ7ro4IQFPY1uO9WQLX6Y/rgA+QK2CaP7kY/AHe/dAHYUKf7n/YTHM7eaD0fM/76iijHSbSIT0bkzH//dHb+/Zou4Gf37yY+3bQPmv7JY5wT6Y8grDEZ9O17bIzlGQySGDaozjY+wbeTNQ4eDajCcJxYz2FdiEJDZ7HYWAIrBAUdZovmobDSXA15FZzZK2iorDY6nH0GS6SyTjgy84685rpewroyR4bDY7XHAaUKu43KmSSUVmSLnKIkkaSxCzbOXHxQy2Saiz7zJfWV9ijYCzRKW+SKVeOSgVaSCvsWpSOaQCLVThuSE44/Hfjb0yr46CbhFfeScjfnHXyXsb2FdxS/aSjCXEoSbv49BS8mWbHkKRiLMKTr5CE+kyxdkHiKKRSbg4QxSVjdiruQvAn/mdwnhKRAnoIXfH/bJJSpnb/HyFd0bsKUrZlvOVdtRulFpRZFNWeZhMU7KqLtZY3ZRrVqLa/eXZpXYgLRg43ZLgwYbq+cEnFg9qrbVcNui8ASHXebabz7PMQrTacH19JcHY1a8HjZOmUwJa6bck99AGzbX7/7LGbs7JA5StZEnNQdWrSlaqrc9AOzxVYsnJ2eOLSXOsnRxdVzuHOX4Ok9g5Zgwur21bcn11eLjrnKObZpbMDK9aartnISrgU/HmNzYE5BeytNf1f05wqw0nzzYWZA7TebHt1U5nzaHrxnOJ4vzdxT2nIRrgLcOZBnNulqNYin/baQ5FnKxr81aCnHxYKnIQwRbGbemZdHPJL81dPH6Lep9wGCxb61fC5lgWKr7U9qrDU5q5jbYXHHNbTjyXI1zNrYy58XP5rftdGnY6IprIteG5vVYfz4vp1rjk+q5PXO5bwvqBrStf5bDDIaGQrfx53XK9zJtYWng9aqrRXKDzx04m5xtb8ns3KSiFtaGnNpe2rGnrtr8ebhSWremrB3N1b81ZO5Hpe2roJHjLprY3B5rb+na9etbXzaG9Me3tb9vrMwTraSnP0+TLytZB5MM8HrN06h53rax5b3OzLTVaBngbZerNA5FHEOdh5deIjb3k8+nZk+xnpPPVbFPLJnibZp5ygOynDPLx5lARJLRvLqi2bb1HXPJb7/E9jwbM+StIM5U5IvKrzg04l5lba5uf7RrbkfSnrivIbbT07V5YAumrpmHbb1I115F6z9H61egjRU7N5zjyHb4EaLa6BZhM6PkXbDDkaUKY4oLoFZOcYdRILafNLHO7lPL973gb4DbNnls6qCF9cNnk7YfLNs6NnIFcfrus7PbFs5rH0FbEciSUoyMqQQr1qSfbVE70yr7bQro6VTp3Y7fS9MT7Hsc7S5g44C7JqSobbaQ5itDaozMHdaSvqQdSkRdjn0sVdSCc+wosaU9SGsXXHV48w7/De3HZPbwyYaWTuXwiPH3YRI7xc8QyvqXi7jYUDnrnaonaE9ge/sS8bena7n5EQJS+aSfHple07oneuiqTaPizldTSSXbi08mSQn98VbSc/Wi74mSQHIXbYbAXeS7ymRULfnZkrI89giMhe47/4/DnSaUIiyg9Fcqg7KLHE83AfMwZnN8+nORTYhexXYMHdWYEnQ2lq75jeMnlXZRbqGmOujXcabLXaG0bXeizsk+yMW306b41Z8uHg76bfUdsMojhcnyt0GJ+k6QXUgadLa/dm7GxdeL63csnHE4W7u1dsnW3d1QB2cIXINW27iC71e9SHcniBcO7Xk/x5NN1yH8+Z5HILwCnxk5u7b1ewXyPbCnRr0/UkU8T973YoQkxaBrwzx+7s9f+7HMQxzPM+B7GOZxYuKfm6fQ/yzAw45i9Q/yzq1wR7HU7wXRj3BzLE62u6PZlzq1yholxcRbGDxJrOi9I7005oXxPbpLcxb3uLMaanTz2p7jbb57CuZ0X08O5LTPedSlLakXbPf17Qdadi2veFrE079i/PfDLgvffkv3g5bHi7F7VefEXoJDdz7eetecS52nhvaV7eM/rnES4lba/ef40rayXRHAunzC7cX105z7ni6tr8eejiqI8NbeC4t7Rk9yXmwnenlPc2IntbKXVWl+nM09d7AM7aXnveBnqU5j7fraWnMfZjrzecZuUynjLCS+/tIy9hnFtdD7gy9DbvS/Rnxk+T7WM+fnWWgLrqGTNLmfdWQHc6mXCNLz7Zzfy0E/apnxfaly5M+VugmQBbmhmr7985qn3fb6MLM/FuQPXZnb8/XZDy+5nPS/77Oo9WbzNUuXE5cpeZy9nrY/ZL7LAR0XkrVYXa/fn7406X7FYBX7Dk+MnBH1xbli637ms937J5YfLYA/NnaK4dnCrRqaF/ZP7ubR1nL/djHyIMILGK4vLOK8JXHdp1nlPXAzp5ZJXR7ff7v5dx60zF8SlK7nkSDcYjkA5PSFc5gHwc6vSCA7DnSA/vSHY4IHloCwrX6XGS8c93n36UsiCmUIHI47bSgKgznc8SgyDDa5XNA/Ez6mR/8hc8lXTA84bKmU4HAaS5XrA/XH1c6oyfA73HBGSEHRHabnYg9IyAyWlS2mWkH1hdEyUKTHndw4JAqlcInVGXOYD0Ukrdo6Uy5E/fiimSEyi8+dXtlaVXUmTXnd6TkyyWZlXkxBnnkq9Uy/aSViC+lCbBAXQ0n49Ub+mVsSF86ybSyzKXGg/ybN8+0jT8/lH6BVKbHM4S0LvSqb6vfMHlUfazR7Nya0k8mzTg/zoUyebXLXccMyk9gX66rgGvTamLYGSMeU1ewXjCmjoKC+VH6wUmbw66JuWC5En0Q9wXNC7nXNk/6X8Q4270ta/kmQ6GbNi+SH1C6iHG672bpdYWHvk55H38lObW66mHHxfHzmCke7aS+0SVQ/ubCL0GHTzcaHYKgUXMZbPSM4BSnD+c6HOOdkXPQ72IALYGHdQ5BbVYBGH4LeDHp4O0XN8/PXGi5A3J6+qnWo+/kpi6g3yw4sXUQ7WHrU8vXOiTsXTi6w30ufzXQI5w3hw/cXxw7JGw0+8X5w98XFrbdXMlUCXVw4hHrLcI1oI8iXJG/2Hq05cSUhZVLrI9RKyS8g1BG5vXVGReyR05rX9G6NLwm+hHcrYu7cI8VbOfcRHMDpYnKI8en8m4xH6C+fnCg5t73U4JHeI6+nC6+ZHpeauHJI9o35I4FHs9bNHYdXRnR1etqMy/lreCV038+Yj7bI8mXMm65HKM8k3Zm9OnNa+M3M5dnXwo5DbJtapRpZf2btQ9Ky0ba3Xso8OX8o7C3lS5039o9pnro41H7E+uX2o87r4t3NHjy6aLDChNHxbcI1hKr4XFm/NHE9bFnztxVHos5/z1NwVHzo5w3aIlBXqm89HEK9dJPCg8EPbZrXuyHhXUQ7j6SK9Pr4Y7qz+BVtn2K8LH7s/LVOs4rHEbXxX1Y7pXAA89nw25frqK6m3eY7PrJ7eWMY299aNK/63mK9fcxK9W3pK9m3l7fyr+1UHVAWVUxdWJE4gWQjxOOU4aJHDCyttlix2+Au30WT8xEWIj22ZUSy71j8MhJQsxwWNe3Xcm8udmPTkDmOu3kWRHQP+LO30pUB38NiqxVNTByG+M1F/WOWyvmJVFAjQByc2T6yo2S+ytnHVzsAOeyc3VRyI2WmyBzGWyLWKuy8OTh3a2XNKUO/B3XxVlydWT8yXxV+yodiaxZ2XeyfNhXuTuL5y2WPuybpVkW3OUx33pUZ3l2S4VstSC4tO5+s/2ROKDJX2yu2NJ3tWIl3Z2RWynWTcW+XCR3iOU2x4uWGySBOmxeeOx3au/UxupV6ySu50xROXZYo2J4+LORRxzWRe3h2Sv04u/N3NO+WxBOT+sPWV537ORu3XOW0x2u/WyLyB2x6u8xy52Q2xOHEzxZ2SF3K2OwECu8t34WPlyM5vonxReQbHK+4UfNGuxdRNe3jiABxRxIh3RAW+x8JMT3jKCHwQuN5xqMmLtQhL8Jce+T3Duwyxh7AwJYOIz3/mQkI0OJT3Ism/oCONjBSOOBo2Oixxhe7eGqOMr3Rez2+blwdxkuONoM4B73Ce4h3iJP1VNOJuDf7ABqGuOMgn1xQ42oKgxNZGn3HOO44F1GP+q+Mk4DlV1xrxIIaKHBsYZeM+IAeJ332eOVxdhIj2DgIHo1JMGUccjTx1xK1xXskTxzBNOyJHBX3vhKe4G1gO3ZuNf3PJQMS7eNIJF299xCxNv3T24HxNJPiyI+OpJJ+9Cy/+8JxBmAw4XJXbxiRJOK+HCCya+5E4z+8qJNcBh3LaHv3ltUXx7NECg1++nxUfFS4Z+6VxgxI13JB+fxORN5y+B/VxwJIB3G+6TxKJKf3MeKH3WWRO3LxOhJ3HBnQ7eKYP6nCgPGJJKy9pU9x/xJB3CWQHxueNxofB+7xhB/93t2/0xC+Oly7+8+JGB6xbkO9qx5eIN3vWGZJHeJN3qu44PFOKGysBLPxVRKyy1EKvxZORI4SjlAJlXYfx1WQAJ2RPi021FKyP+JL3n0OqyZWQSJue5E4QEX5qx+/lxJnFvx1JPAJj260QD+/d3bKLgJte4myvWKoJ8OR3xfuLRL7u4pyN+9LIq8k53AB5Z3lnGIJYR56ynOB7+he42NuwIKP28iCRQRPd3h0nEJKR6WyOeV4JF+7x3NR4UJV1CagPWQqPqhJUPUOR939JM4PYIGryjR5xxdVDQ7l4U73H1DXrmhM73Ax/GQNQkqJ3R+lilTiiPCDMcsm+4DDZu1u5NhPAP/h7BAiRUcJj0OcJdVCK5GxML3YsQqJexLskKc5KJiR6W4+tnyJnBNv3ic6yJyuMv3U3BVsqRLGJbxKePXQNtsZB9xodx5eJVB6qyS3NCJdB4VoZx+MPTB6OPx5lYPS3Gnzm++6PX3rX+pRIj2EdeRJhRKm46UPpJfx6W45AlGJXx9S4r2iJUZJLePVXDRPhJJAPSJ6qPN1DhPKxIuPU3GhPHhM/3RewP97JPpPH1G1rU2NiPp4G+KTthyPHJ5OIQJOtxNxJ5Pa9HrFDxJuou3H5oEhIQPLJ4244p7SJQxPW4GBL+JGJ55P5GFBPKJ/lPpxI1xTB9ZPkJ45PZcj33sJ+IXCR7BPbNnRJGh+BPFBCpJHZFxJS3GFspJOnx6RKm4tp7JsIeO33jXWxJDx7x3/DklChJPCJS3ALwCR9/3jJ7d+HJOPLkrNAwPhH1JZpLzs4Z8VJ0pLW3x+g0o2pP5lbuTOVPJLVJO28lZHzAsa3NijPO4xuylpPjPQhhjPApLjPehWzPSpJXbyVSzPSZ9ZGbuUX5BZ99na3vPd98gTEEp0n2hfKb4gYOV2B5zcojyA12cTBoZu8g+OG+30Z+mCj23Z6YZEYzIVPKlPtHzGPwEyod2zgTnPnu1d2cB3DEGFBd2IB3EZyrTQhXexzOc59rBle3D2O/HHP9ez8ZgO912ae1HPCEn7PVe2vPFOCz2Me0JYjvDYVrewfZpYiTgIDSvPXjOlJC57L2P56Cgw+2iZ8Hw+Y+cj/Pu53LmoF9wZptZQ+1YnX2/+zJwpYhL2Q4QH2+Yk/PBR14XNLCGhj57d2YL2OLV+0oHWvg/PDSrHxHZ5DLL+1bMkjyzE8F4HP156IIJEVovAF4n2O+0keKCL72pF+qNke/VDdRubP3CjnP/agSOBvHslTfHGcgtfNuY/BnrThxSQ5LKcCNKrIOMl7oOn9QYOEl+YOhtaEvYL0Z5gyO4O88KqYml4EOxfr5VTfFUv0e3ShMLFBwIqsUOxzKMvWl8svFcoTEqhzKOZh2fPDl8r2Sh3j4iPEZ46h1klCYjMOgRwnQqzzWHNC2kO6koTEjh1L2io6hZLcTNVtl8ivX4Hr1wV/hZ9l4CO3B1H4mKNAvXlAIObB0JYTXAM2aRzxZWhS9V8l9ivp6FSORV9T40jBovOR2yvaOioO6l7woWYg6ONgiil1Ykavt3i5Z6LETVYh2W1oF6sgCewivprFiWdqpivu+pPr++vm3YLMmOyxzTyWdlGOs7pbyUDLJrtDngci17mvCBXMWexz0Ky1/Akyzv4KC1+2v0162Ov+sglc9ulUisGHVF5hAN+FEPP1Ci4Ckjz6Y06ovMaTNooULsevNDM14j6ovMRDLxE3/xvVdOA4VeIngBNeoHTS5+b6OOscMUArxEoAOPVQPNROAN5q0hKget31+Bdo6NkVVIg+vjNTVeZFBevnXC0Z91+E1ON/0Z3e+N1GN6V4TmmsHd03fPf33RlhKiaVnFC7PhKlUZ/eh925N4P5tYlohLN9xvp4Ze0FlkxvcWnAONN+bOlonYZ5N6mV3YmFvhKnFd3Ygn2zg9hv5HzIFN16evEv2JvaiGg1czC3gQN5VvhN4EY9Dtev+jL1MlGs+vTDKwPYspuvl1/Dk/GovMvDKgoUoKh02tFCF1t/Y1emlFvUFDXBtQ70Mgt5bQsJM/VJN+WYcpkrXMlS1vFR691BN+MehKrD0DN95vTXH3V7t9sZgUGQvhKmdvcd/o6Mt/EZRWejvHWCiFat/Dv4N/tv4wM0F1l0NlQfD9vDCg65AQqgoXt9tvrUHtv5t+5vvZELmDt8I1MN+NqGTdPdzmzVd+CvwoAl7wSIvWEvjRHt1qQzxZJxNK21CnjkoLJBQlBwHXTsjHvap2UduTQBFnFGMv1g5wQvd8uQoeuuhzV4rEa995VXLIrEkevhhgwuYoIWvzoJcoXvoeom0TzNrELl5HvwksvvGeuPvF98Qovl+vv3l8fvmWtscjttrEwQD1dx95CvaIjJE99+nvjyFf4AD6hZc70zdP98Svc7zvv/MNb1dohSduTQQldomiOI9/nvhIniO3d6nvoD4DofWrnvfTMJEVeDB1A94EoWiBX1Pd7BeC0ES169+WZczEJQdWv/9O95IfVWv3v3V9zUfbv8MJ94ofdWvPvhJtGv5QfGvxw1mMXUrBakUEEfw2h2vALRd+PeR/1dxgEfyxjy84j75MbvGASQj6GK4yCkfL2u2dx7ZNEwCXkfMj9TEoj7KlZlr+1WoeR0H8/wdzqW7BZ2j7Yx932Ik2H/sK+zZ7hoNsMhSAjeG0B0B/9kXOfsSzo42iZWKvefQGsw/nOLrNYacw/na568fNt7O0geBkekKUFWQAyTFOXVdvZ2lJY9c/8fRQWCMADhy6GoKSfTtniebj7fkrhkZBR+Scf6T+Fu/sFb+wRkL2bPe7BmWgKfrj+TglaGcuhT6TSD1qAGR5z57UAtafX52cXqJ3AGzN7l7/CSAGj+2/t3ubtroT5cBY8Raf6zLzus/Ia0PLQpdIz7zwHj6X2Y8Sxd9j8FO3T4U2az9cfvOLSfbFeVuACM/eZj/mf+0pAIWz9yfJcEWfaUPWfzsVrBNT9H0rj9NQ/GEafDz8hh5+GCM4e3zSCnrif8t+diVANsMphBFqT5mgQOa/hAi5rtJT2jYObPdofRSCe0FvD9ivs2+wZ2mLgXywfk0UXgoSL/SOmd1JImUwxfDxlRffMzsfYeyKO8L83BZ2lLIhbpnEnwrJfNRxJfVL8iMjRxJfuRiSfShyqfZrW5QwRhZfqL68odz8SK3jtGP7zI5fzfGCXZhx5fT9/CXDl7Jf/l9p7Er58MPVFyf1hERfsr6Ff7T6n2zL+Vf4S7CvzL7sOwr+sOZL9Svwr8MOdz49Qvq09i8hxWQsL7xfSaWMvGL4LEY8WBC+2gL2tr89ivWGMMFr8nSEg1mfNBGJf4cXJWZL50vmdx8qAr6MEGzKHiXd7JfDL59fOL6VfKL+afU0Jhf1+3Vfgd0wOYY9nb5kGuA+WjalKa3Tf1XWmd826e0QJks4+jWzfhb4Ufx+nzfuxnQigPSLgBb4alO7vm3m4DGdlb44K1b4rf0j6Mfqft4vDZgDeX2k2whfNB0118Nvf81FID1+AeFpyZY2N81vAi0R86N4rK29154Pa6BBy0wSe/2mBvMdAHAYN41SoQvwSUN8nvCjNPuy741vmqgPuqYmRvZ7NkV+CTcIgep9voOjv+Jd6KhcU2Hf+N/vfAizfEv6uvf3b7of06AsZAOkvVHN4ff/mGVvAd5ff9WDQdjhnf5w+XZv1l3A/RjxgUna9ROd5mlvjhi8Nd5nFvOd6hmrJFQ/nMM/eCH/5vF177fMH+5vt186Md4jzFCt7HfuhwXfF6H/fvg3TvRH8/uv79NvU4uXRPiO7R5J2R6JF1Y//7/Pu3GXffxYGV1Md7yMyzQtvqRgkFTFhtv1g5OQgc2vCjt9LvRmmLmhH4IhI64rv1g71QfSiSyJt8HfxH6I49j11vwH7vgzWlHf/74t2lH6IZF+XVv9mqIk+H/fatH8U/rE3k1sn4cs8d7A/KHwvy6F5Fvon7M/2d4E/WlkBASsojv7FhY/5miKmIL401dpNB0Xd+sHQ1HslAOlEvtt/tMPn4JgpmuGsNBwB0E98i/NmoB0il/S/lUIBwe96HY0X4BwW99cQyzIB0Zr8i/vmtK/eX9cwy2uiHR9+WaxzNK/W950cFcuHyV94vywkta/d9/q/LX/ycmWrNIskuHyT95HX2WsG/JepHXQTs/y/9+6/jaP2uZWvG/DX9qi4D+Wa6ks6/lD+LArepgK8D5NSDLJgKyD9c/OX//AXWtc/KX6qqOD+S/SRzvMBD+0Sw1gO/ZiiYf+X9vMvMW31F+WD1F+Whf5X75Vl39IfCPEGFKH7Yf834u/T37W/zX46dWs752Vd3Uf+jQh/E+TEfq1/PyE2gMf+jQR/cj7bfmj/pXmUGh/e7SR/oDhh/hj7R/AA+PvkP+qaW/pR/Gj5PdGof7Vnb9OOp4mwZg1Cs/6gaKZZzposX99IZFTOA/zhCoZbP/LRkiNX5VfmounHqsDLc2WmDQx75kUKhOcXDH5Duy3fEv4EZYjLVh/3un5C+JzOw+RNF8jP6M+Tmb50AY/Rrls5/ADvZ/f0vyZqFmVFvjNQsoMsCZ37+Gs6MvN/e0wI9iv/Ad7FmcZhv6YsGApcZbH8mPrfvt/TFmAF1v8E/H66KZTjHro14QgF0TLtrI6+9/cv8jhz5n05cruA/+okZ/IuusuL4td//77fMr/Kd/jZk0FJv+cHSsp9/Pn6uQsv44dfsKyu+nKqwp92jglypKStn6doBf6Odtii3C1Ar5/Q7/qp/frdeKf56V1DJT/Sf8b/Wn9OoHv9r/3P8cI8TP6i2H7+vbMql/6H6k8Hv4uU5il60wQoSZ8H9XCqgoTfUn+b/cHuX/Ys3r/dv9L/8v/z/1jOn/g9HL/+svH/8BxbvFP+QO7d/qZd5iaN1Dm1dUaI8PuQrJUt36kdAbIy/7aLpZZKhO/AYjjlj/58/sKZs5ZTse/Zc5c+Bv/V79MnFOZTOhPv2fybZk5cRq/U8Qi5UMcEuUL8jLla0YnmRHXGVUb/w6/NLlrmRQAnr9cqDblObQBv36/JplZcEdtdr8DhWtGFb8rrGBZHACZv3OyCFkaAKEsRPh3/waoSgC79CRZerANv03aeeUb/wQlEddATRv/AEUR1zclAQDP/wghQJYRAMB/GZl95R//cixcRUYkHb9UjAxFQ3wSv0UA9gCDHSL/EBBmAIadDwwKjCFZBgDCLBRFBADh3V4fEdt6311weVkLWX+McwDVWWPdfu1JWWToPVkofwEARwDS318sWlgLAOx/c0BNA1cAz6B3AJsApwC2g01ZVeljHyp/CNBiqAGWL+QVVD6WCqhPH10UKkEKqAcfXRQnHwSA9Z8LFGZBdIRFA2VHPgYiqF+0B/keFA0wDWZwgIxddRQ+SDtYPWBxn3yAiJ9oJH/OSoDBVmKoNeB5NWWFNOZSygUZV0cCgN+eYLk2gKyfNlgsgzziNICdAVYkHJ9IgNRIRv4egIyfCxR4gIY5D45dFGqfHoDKn2jcMC9VGU6AhYCrbw65Qp89IBf4ZrBBgPWAlaAJ+VYkcYC0aBUYKYDVahz0SW96gMpOaNxc6C2eZKhqbxz0RG9gHj6fU4C7axSAsrdvCFnPbIZUgJMWOOFqgMeAvC4FPXqAtp8aLj+feoD7GRzHPgEZWAaA2odIOj09c4COzmfkaEDAnmOAiRIGKHM9fYDCtE36L75tgNeAiyx/gLWA7EC5GFwYZYCB5h+vGJ4kQLwSZ6oAAVhAnbRO5igBeoD4nwHmHd8IQNBAgeZAb0goVgwun2JA/MF6gJqAgeZL325YNRBfgJxArYC6cCGfeECNzzKAidA4NRRAoi9Y2TwUBECsXn/9QjV5QL0eY3EFtGlA1RkUImWfHMdgQI+A7ED8LC2A3UC+gM+qZL0YgK1AzkDEL1VAurUKQKOAiQMnhxpAvPBwgKHOMUCSiAdA0vJQP2tAlSgRQMgOZ0CSQIhAnkDjQJW9U/8eL1ChP7tvXwsUaF8ZWG3gckCBGHyOSMDMXzFAgvB0XzZYQEgUX3rqYuYOgN2LaMCnkC5ZUMCTX3rqUl82WHVOdvVNRDpfGQoaXwWArygZWDvQBpYKwKZfHoDOX0wKNl9MJAbAksCtKByoLOgc9RWgJy96wOVfDYCRX0LAob9smG0OKsCpXzFA98MmKCsMbV9o3DtoRV9WJBbA3L0kwLnA3sCO0E8EZsCpwL7A3V9CwP1facD+wOKodig8wO8JTg44wLxfHPRrX2TA+MDLgPtfUyhN2idfHPQXX1JAzMCxQJOQbq9cwN+HOIhfX0LA/18xQPo0fh48PFj1Gi4w30LAiN8c9Fi/ZsDlwLoWRK8rDHAgn8CNGlDPLR9WuBIKTtVFCgQg5ApLALrfcMciwGcKQ0xnymASbCC4fxrKPrc1nVqKLCCkIPJ/AAc9wO8SNCDFCmsA3M4Z7VwVE6975COfYN4Z2D6WJZ9lbjHYKkEzn2ZqMdhinyufUl4UNXcfPZ82rkmTX90P5zyAkSkK7zO0Lih4ahmGEJ9xTgqAkSkqgN6fGR5DVFifIk4fn1kgt+B3n1aAzkxUn0ACEp9sam8fMShnn1pqASD8n0BAJp8eINGAgyDOTFsfT1874EZuFiDaPRMg7iCTn3gUWp9TII8wHM5OnyoefzxQhR8g1N45kx6fVJk+ny2cPhBsFHpxb0DOTDNAS59GUAUgvYJvIKmfVu4EoMJfepAKXX2UUZ8hILXiPaMIoPufTyCbpXZfPiD8oOQhfSCsoOxqHWVBnCYgkGoDGFn2O58HIPjiFZw9PRsgqt5wQKqMSyDBZDEBNqD+IJoYZL1moKRjMnAKn2mArZxi7Fyg97JT4gBjWKCAX2bSCaDXXxCglSCm7Fyglx9PIMb8B188oNcgi58mABC/C/9PMn/sSF9bIIjA5x84X05MBF9PsH/sC8CtnDRfFRAzoKdfC6D0wNKgjWI6Ykp1BJYrHz2gi6CCwKG0ECMnLk4jZZkPoPLAt6C6Xw+giN83oLrA4BdOXwwpU1By5lBg9V9voJ0UD6CxX1fAbsCoYJjfBGDDX1sMDy9xoOTxEig0YNHAzkw+AGHA1rs5X1cghV9ToO6oaGCkpiTApGC60hcQVcCCYKnArZw9kCjfD6DtwPpg/sDdoO9fMKCzXysfI6COYKmZLmCboNLeEyg+YORgrZUB4C5gy19fVF5QF6D2YPheRmDzsVZZbGpA33e0fMIQ305MRWCiFGrgGsCwoNAggmCyYMhYeFlKYPqMOFRk3zgg9H98uyojNUJy32EdXN9wxwbfH3la30LyW2Dp3TJ/OwDj20tgvYxM3yLWbN9IVB8A40AW3ytgqt8VWRhMPu15jiFNMqBQgMy0KHwQe2IpdWV3tCq3Rng08CmhfigI4LdHeOCVNVwoX+Q44IBoBqhTRHNfOO8q8BCoOgRZ5V+6XshwcDTgzbQW0BLgk+BS3hzgzLR83m01FBk3LnLghqh64Org9OC6ejscaODC4Kbg5IZTyXxYIhRXmgCONPAm4AFfFVBP8Srg87QKYLc3frAWeB+gqeCE4MEASeCgcVLg4sAwUF+QKFc4RhCoEwhqKF/kFjBahBQZKeB9tCiyB4wG4OoAJuCtdCzg9+oi4KwZXPgT4Lbg6fs1miwpYHUr4KUZaODL4KbguhlO4JzIO+DOGRpgEKhh4Pe0LuRoZHjgfzwE2HZfY9QL0EfgtSg94HAlFKAXAAIAVwAagAcKOCAZTHkURiAWQDQgEEBcIDR/cXYw4IPmfwg5REZ4dbgpzBMOfBDUUEIQ7qgJBhYQUhCdSnK4Dox04OoQ0/hpgCu4I6IWaQARQxBmAGYQmuD8EL2WG+CFzlPg1hChG1z4ThDgjnwQpwJ44L4Q+hC/Um1acbBhEIKpFW4Wfg4QtKEc4KPJAL1OeCu4NkgVELQ2dPgruCgETRDfGyEQ/MJQEL0QjWF1uATeXg58EOSsJhDdwESiVBALEIquT7hGMHMQql4gmDM4fWBt4PwQ4nBpGAc4BaFSqXkQkR8Q4DoQuRC4HijgkOhDAjeFAOlybX7QK7gKBiopSH1yEKbGUclqunuuU4hZEJZpEX14kIUZSRCiuQ94dRD+UQDpbbQbCGiQlpBYkKFSAxCwLHcQnR5slkUQoEESKHyQqGEPwFMQ1aAnEPF6V+hAkLSQ0pD2mDaQmBD3IDgQhBD7AFhgURDGPFMQ78AoQDWAWEAaRWwQ9TVcEOOxEBxSbkF4eLJU0EaQLBxJQhJ4BZCo4LLJaHhGEKZ4Ejh1TkkQzZD5kJVRAxEWaTPAdhC5OFVRGZANQF9AMQQdkM62Kckt8gTQaQQAsnOQ8MlNwGCAEJD05FuQ7slXkNm9bZDDkPoQ2iBBWV+Qq6h/kKLoLxCgUMvmUclb51yhRQQDt0vfL5DNZUGMOwQLty9mWxDNwGBCcXg/9yp4eFDWzAxQ9FF0Xw1AVzBrkKeMJepsUJEwSvhCSiJsCOACUL0AS/g3t2PmbFD19SBQ3ZCCqW+Q95CbkMRQl5CzxU74J5CjkOxQlQlHkL+QllDF4AMyAVC/yEhQw3ZUtQu3GLwNQFWgMrVMUPMQzcBDMHJQljAo4L5QjVhRUJeyfFDFUPVQpFCLlnAQcVC9FmVQjXAQ+D5Q+UYneDpQ2pDNwHnwA5DGUERQ7FD+DlpQy5E7UI1AMcho+AtQ2ClNwHCiIFCgUHgobpC3gF6QlwBEEIYMDUA6IC4PHKpRkNZAcgAsEPJ/HBCQoVHZK1DvSG14LKxKEKTodboutUCoDwQk4Oy7c6ozeBzCfhDU0I2gdNCKsAIUQegGPF/grnhi0Jrg7Lt85EsEPNC24M3AGtC8hErQ2eUX+2W6JNDujXrQgGxL3wrQw79O0LHUOvhm0MHoP4Qpex7QnUpClDizFvhTwTF4EPQByFrQzgUkwJASZKEB0LiYfUMQ9CXQntDAGAXQ/7giFh7QysQSvwnQvvhIUnCZGdCKEHwEUFIK/hD0I0Rl0JsQPtD3fFzQjtChmxASLShlJHS6O6YV6EapfwhbhDrQx9DIVCUWUdDaQFsUCGZdojn4b8FeUIv7Z7xl0K/YXCg/UIcAANCg0ObWOBg2oBDANBDmIFqAaNCXYLP/PfQlllhDLr5LsCjoLW4M4NoDZLBjRlxqXsQcMPZEBnBTEJ4+R7QygVvmapDuSkkYCsAjiiKwfDDC5iYw+Eg60BIwrW5a4LigljCdczYwoZp/OU0QZXMG5ShXP9BFyFYwrTpnljQhLjCBMMnORrBmELZuHeDWRgowaJC5uh6pCjD/IB0Q3pwYMNlAODD+kM6sJjD4IGGQlDCxkLQwkUAY0MYnPBCG31OuYTDSMOxQhNhiMJs7KHANQEcwyjDEIGowmMlXkPmJTjCPMIg4DUAthD4wkTD/yW8whKZZMIuZAlDbMONGcuE7kKLoV/BjRhF4AlCh4HcwyeI8SA1AVbUx0HCwkLCPQgh4BLCvMOAYXFNosMZGe1CfMJUAdRD+qBdQ0rDqkKAiQMlPUMuKejCDHgZQvqxbGGCwkrDD3kkwka9Ci2qZLMx9MMwcWiBtwHogJCAmQHQQ8ZD0MJDg3bcsMJmQmzCwnm2Q85IKiAcw2zCEGUnoFzDpsPbiHUAvkXywgSRbrnWwhFgAsKqw1E8S4E9wPbCNbjBAZbCIsNogZrDtkMPuebDKsJOw67C0sLRQhphL4h1AbLRFKTRQsWwBOhew7O50sOW6JPgc6jSeF1D6sIQZCdBOKU9Q/bC0uGShQ6kwcJOwjT171kBwuRch2mWQbFCcyD77IdpFEUFsdLCPsKNiIk9DsOywxwQyHhxwm7Db50WwtHDwSCawt+5EcOmQXTC2AF6wgZD+sLpANLhgIAjQjBCJkMswm0l2wXayE29CcOf+TnC1sPuwrPVecJtiHbDIfm43bbCgagRYKUwvh2xwubCecI43OLpTsNxwikZ2LV8UHUAckAXeZXC/sJlwgXCMKBx1MEAHUL/FSzgtKCFw6wpx7lpGBcwooLS4Z7xZnFP/WBD4EMDQgzDhfmahQCBGQGZw0bCLMIwwkotmrj/OUj97jE8QxtFvcPbiQKgv72OeM44sMBtiQKgr7TUUXQgKQUgEQgMB5gd4OLpfcIIw6NwGGFuuIPC/cLM0GdQ+n3Tw5PC7gLhAm/gM8OuOBm5A8PS6X5g88M0UGgdiCGuOP5Zw8LJcLshrjhXaBWoI8KnBXyZjhnl1CPCv2DOULPD6Hgjw+zgG8ITwo2IM0JiIYk48rDTw5hpPrnrqGoD7jHmhQeg28JmUN6pOFiIuRvCKum25XPDdgNj1JPDC5nLw9tDB4EXwovCw8JSEM1hl6GpwkABacJyaBigkMOrCYbDUMKjQ93DxsMybGUU7SUIcG05/uXXgQoDGJCRlUHk0rxW0QU4VCh8NDIDXGX+5dBAHQOyGej1A7g7PHi4iJxorIi9bHA+OGMxVkCQYCbQ4QPgIuc41XmwOJXYUCPqBIsB8bUS9KRxECKeUVflvOE/ebAjzlWQneWAICKwDV/kCh3S2Z/Df8JQRTECf8ON9AZQ0vF0EZa0ZeSzLAAj6PU2HDICl+SN5dvw9HlwLMgUkzG72DICYmX+5fWBMkC2gsF8BHXqA7YUesDVwwiRUxCFfeAiFCJyoVNRMZlfw1s4ZWFJgfeVA7nvWNlgdCKMZORImVHqAjyVxCKGfCECzCMVMfgjtCJWFcQjleGtwkwCNykDpPXl2ihEfcwopMTIghgt3BCIGKZQ3CKIGBkAfYOmgCuk9kmfKTiI/CPwg8WAq/DEKdtZ1chCIwIjggI7fUKFu3F/wuw0sCLJcT/CfpzSvFIimCOAI4ww4BEAIv/CqeQKIsAjyCINYcB1NCOIIirAgmVfwhs5gBAD/fz0KWUKA27kMCLSI5ojSOGZveAi6iI/4CsVKiKIvDIiqCLKIpigBiKm9PlEaCOqIuAjji34SOAQVOUPkZ4CH4VKIxjB7sBKIhXktCjxjGYi6Zz/eQJ4JiPq5ZqxUQJwRZAj6CMVYajIBGSOItVgOiK05PYj+iNb/Jz116EQvHIj2CKnMAosPLBVdc3VpCMHVDAQ25XkI8l4UBGUI74jaPXP4GMInPW+wa4j+zF0I+WB9CKDwmRAjCM3DEwj5CNtfJMwLCOIEKwj0WFRvX4ivliTMBwiB2RNg8iCRVxiI5GAninxIyIjk8jxIjwiCSLugIkj0INTfbPIcf1CItPJ4HFcI4kjdr1pIiIirCgpIskjEiPogkx9yOmVaPOZ+THJWfSCbsivuZjVSbky0Xkiyt1kGUZ8XmCBmYQxqwNdfaUiJSMLtfbQ5Z2Y1SFAtfBK0Qj5+TFLIR7R5xlw1eecAnyPAcSlVSIFI+zpYaB6HfxBtSIa0Szh70DsEAJoiIUFIvj84NR+oLzpHSPF1SUj0thK0aj4UdHEJAaCFSL6AvWYtKCtIojh11XemC0FTSPYBVHV9kyy0N94MdSz3Bp9rSKSYGXU42Sy0HMpbSIDIrSDXRGW+KjV/liDI5LCgdSBUSqCwuGDHTHUG/Xs6aWZ/SJ/VbHAEaQzmADoDmTLItAFvSJ9Rdl99MFVmBfVTXlAjF4iGJzeI+o1B1Sq0dU43SLg+Zfh7OkDgW8CJo2+wMUiNyFHIkYxltUa0a84ByIBTIMjh6A31fxBd9xCwRrR0sHZ1FdoKYI0yI+8xyJV8WcjyhGY1a7hRYPy0XlhUwKBzGciNsjW1JEgBXzuaVasjyKE8Ox9XihpWb0jUqHgUd1AC4k/VQGBSkB+gqZRH1hr1b8jgMOHInJAvdW/I3fDhyMPxNMjmLSBSKrROaArI/bBbyMnI88jAfkvIpCiByOPI+Uj2xXgo+hAroNuUBPUwLAq5KrQQKNjInzpToL/Iz9DVSIyAZUiTOW/vGYssYMa0DhAGdWC4RV9GtFJIX4cCqCw4ezpWeDwSHV4WoGbI43lkKIwo9TA+yKnItwx6KOgjZCixKJ9gCcjaQGAfBdVCKMOMUSioxBrgCcjWUj71IFxGYJGXU10XCn8Rd04d+063akj9lyNMZYx9qVnaakZnClMooIjl8hNQYyiU8KYAQHobKIso924rKKXacyil0gHgByiT328SDhAXKI7iWyjeQLMo15tvKPsozkiFg3Dgmm5kpgrIz8i0nzfEerdCpmCiarpIqLbI3RJFnyS9RUiUqNdfNKioqOjQfbRSuFVI+0iOOm/aa8jQXke0ez1lNX1ImKidfQAoiqj9IMRSORcAmktI/rp/JmXVTbBzPRwUVtMjtGdI/bRYqKdIvQEPSNq9aqjM4FLIiKiitxLIvidnEOLIy5AwyJpuRbCATAwQbBRYcm4yHiDAxykInsj8FRVuYolOqMHIpjpsuAr4EUjL5n3I3ajkKIXIjjptJXnIpCAGtHDBZcjOtRPIv1IS3Q8mf8j2XyVYBJZ9qJnxNLpspS2ooSjTqLsI70jqokuo9XQeKJvI97QFQTSWB8iA4H+otqsmKP2+eBQSPDDWV8igKL3uEcjqqJsQH6DdYjZfI8i3yI46YvJItUBgR8j/qKQgDQjvSL6RYGjRvUEov6isaM2oo8jakEyohiBCaLmonCinqK/AV6Q5qKGQfLAVbiwwUCjmKNOg3FI1UFjI8Ch6KNho2iiXhgFov+coaJgQbmiWVjzAjijCKLQ9QGj+KApg8SV0KOpo4SijqIHIqSiYX0Voraj1aPeoiBA5KJk1GWjSaLVo5SiEqIk9dSjjaKxoifUdKOPmFN9UxyXaSFJc6ksojgozSAdo5yimSJiKZ2jgqNnae2jPaN8oiRcXaI8op2jcqFzqT6oZSQp6b2jkCh8omHo5dHcokKj23xtJYMBgAyLKbaY8wG3Id3ZzMWo2FRxerGKwxvZ7FBToj7h5pHbuTOjSim/2aZgLCCLo9Rp5pGG2Iui8bDiDSDlQmVxoimhapBgoPMAPVGyDdOipZUGQfQjGhA6uIujoozTkFAwTYmRSLRhNuErosuiSqzvUdyQP7iLo0rC7JBDmMR48wAZsNOjEDHno3kZ0mBBfJidPMiLAYWwjGT9AICJfng8wnNlmMyKoXMhk6MROLslUHGngIjkTqFjudIQrQBUcdggzoRooWs4lOi4iURQtnju4f8gU6MJGdIQlEFf5LOil6M1QeJkQpnbDKYRF+ivo5JAZsDMkMBjnHH/o3cMt6MvomBjrEDrYeBjk6MmTObot6NXMPMAKjEkeZ+ijGXMCNKYf6MgObhkOIMu4Qc5U7iLoqho2hHS0bJIMhks6VqgzNgoYsJQjJBswGjl8GMrQMoR91kQY7BizdnZSMei0GJt2MTluOUNUSrhdJSB2auiVNmYYotRq6KM2fLh/xgzoluixEAByWMUaGMjNGwMyGNIZAqheQz2EIhjq6MUYtAivwBfohujj6M2wHNkldGWpC+jUGKQY7KhQGL4Y4SwYCLm+IRi7GN2KH6sFiGqrQJ4T6O45aP4Q2EEYojkvGPP6HEjvCOZwcJopr1HyIJiTnGrQXyj6qGQ8DVB2imQ8dIBfKIEKXkUadkHYVlxAgEiY4xAkmOQMDJjJ6hCY/H8GCxWkYJjYmMKY0KjGrgTo0dly+B7or+js6ITEUF4GGVgY9c8AeD6cWQYFVE9Reuji6M+wUC8q6MvrKy5OmNsYmujVGVaYvBiE+CKoVOJm6LMY+u8MMnkYzujtz0YBRxi+6Pj4RkgiOS0YbEpU+EWYxBjXEFwYB8YsGAXo36Z1zzcJeJlaVE2Yy5ByGIXo3aJ8iOVaE5j9lBWuHfgtbkJSYejA1Cb4EBgxWWWY+bDez2ZuGRxjEGhsIMRo9A7osdQZmMaYouiXwAmY4cw2mJ5oXS9sdUcYqFAiL3puWxjXJAdAwZj1mLSMU5hRmNYY9PxU0HXospin8LqCF+jd6PEJRxkOsEPo6UwiqGeRU+jOtHPo2hkEGPvo9XNJHhlWQljT4O2YD5AcWOwoEBjAWh0YqpiiXlhWYUj2WNaZB20gGOZYrYCP1jHox45IGIhYaBii6NTouBiSWMcYh9UGWLaqJZiWVkKApxltmM0Yoi8RiB05O5iFWN+eQTJLmPNUeu9tWI0Y0RAkmXVYihisSKSZC1xmWRIY55gj63q5WhiBWMFkKZjDOzMvIc4mmLv0K1iW6DaYjmpAnkFYuZjCWD6mRxjW6Nivd1ihmNyMQoDXEjGY1RiwhgreMVie6ifqExlNrUhY2NjzzwFIQ2lzekCeKVjfGK+Ed/Ao2LHovxj6ABto42diqA5FCJi7jH5IYpiqSNto5ZgiBhiY4R9MmLdoxR8HUFrY0fJS2PCYtJi62K2MEel3alyYksoG2KfrXJivCPGvZtjO2NlZKtipjhKYkRwY92R0DYpIKhiaVzw9ii78KCpdij1KaioUKnYYo0pF/Ewqa7IXHUi8J4p34E3Yi0pWKmFCPAIwcho6dTZ8rB13bEBqKhfNHv052N9KRipISkzKCSo6olhKZ8iuKjERaRIMSkBKASowhg/YrjYABi/3ZkpASnFRL/ciSj42Ukp2SmnQJSo/yLZGArI6SjR2L9j0Sg5KYyoIoC12RDj9KmY7f9jUyhNKWSxBDyFKAu0KnEk4cxgvJm1KJqJqsjDKYvw7Q2SfZuRlSm/mCjjFSg1KLvxiOPPYpCoTSjoYtdi7SlNKTnIt2OMqGdBrSh/Y2/RkOMdKaeBnSkQpQ+dTig9KTChkyhvY/bZYykQPYu0VSncqUMpQkwU4sUpVolSyFaxBSn86Au0JONeyXkpzthE4mkoH2KQ4tkp3ZS4vCAd/Z3vkILhr4WC8DVIZGJ6yKzjlgn2uKMgRj24eOUo0uTTYZziGmFc4gMRX8QQZeCplvAw/BEhnOPi0QeIhkynMXGhKBESTRzi3Dx38LvwouNkOKu4PPADrGPBUuFxaEfwAuLf2ShQNvF5iIlRnOIfVSLw9DAyhMEA84GNKIHkySGc4urRqKhs4vtAJjzy4x4oVbxZ3TLjt2NT0GwlyuM8Q9djayGmhBY8VdmWCCIApUG2oaoj541e8P/gPsKC4/pjkKiDok4gesiqWcbx0uhh4OzjW8DK8Ybjw7js47/5xuJKwb/ZrES2KDridd3s48bil4Df3G81uvF1iKY95uITKSQQtUQj2bmlVogSeYmgYPG+iG7iSuAyNAJtzuMm6MEAXQ2OiY7iGuO+KFUo0Ozf3D30gyle6dIhRuMSTaWJv9jsNM5i1uOZYcuYej2OKRJZZuJOICY9iuPa4y4oI9ka4urjj2i58Fuo4MAPYmkYFjza4yDZaKn6444FL2LYqOgJNjzyoSK1c9A/QZzjS8GW2KnjoeP+4lUo72OB4vRsr2IOocHiAmw2NGmEEGWC4g2Yaj2loO7jCQntzSGFUeJc4nPwN2JaPSpBZvBXY70ppuMG8GXjLuJAkD4IJeLOyKmInPGF42HA7OKjgdHj0qC146EpyKlF8SzjVuJoqHBZ+6L1Nd+IOti1GOyRzeJC4t5F1+gQZWrjP2LSMb0pduKpKZ3jFeNd4pxkcslXkT3j9OM3Y33iBOP9443irSgt3efAPgnU4d3xFeLl49jjsOOt4sXjyOOk7AXjvuJo4xPjnOJIUX0p+Sh0rIrjuuLtKOpxReKR43PjXMH8yNHi0OMD43LjseLQ4nyZHuIL4v0pHeF2KBLjqKmU4hBl0+P22OQZvEzBAS+iU+Oe8MtkejzzdBPju+I6PaPil3DywRHcleOFKZvwIaEO4vTiZOL148yoq+LdYILgRlFuwUHwf+Fe3Evi35lX4iHdXqXFCR+9MiRp4wBh7ljjvXFh9+NxTUHwqsFigH3jteOWCK4Zmj1V4q/jfFjHWI3juvAmYSoVTuI+Cbwkj4Cm4zXBVll4QJKw4+M840FYY0VF4zvi5FiAEtPiKeLGWO5Bi+OJ484oP+KqyVLjjShf4r7jHeIf427i79Ei8G/j6+IR4EfwZFBxEE4oG+POKcRQQGPJ4rvxtw2gUdmhGeO/mF4URPg84vvi35ijgfToguCH4sgScEDf4srwiBMNKT4YnPFwE7fdNuOC8TASaricIzXpwgPgcGipYmJpgS9oudh52UAwPyhhieAxBSTVCDYQSf2ecZ2D78Pggnb4hLi3bEtiNBK52R+k1BNNggQoJBNnsEkpnyj5geZoBAF8olChVyjvgZcoagnkExAxrYMMokQTrBK2dEtwrBKQxWwD9BPIgxrob/GQwUwTRBM1lRwSK2KUEsSIFBP8E3yotBLjo2scJ2MWsZipp2KOKaCoDI19KBdiw8VHoDzwFeLQqE9jxuPSoehIjKh6461UufDyEyDZD2PuQOWwshLHcM9jeKioqAjZCeJSxJITKeLbqJiozKlYqJ9iVfCKE3W15RiYqLSp+KjRKDioHgQA2P9jZbGaEwDjBhMsqbDISSlacQgl4QEg48fgTEnsqWDjSNl6E92wcKlo43Sp+hLQ46BBDKm6EtDjWnFMqVJ5zKl2EsYTiShsqPUAICWmExypPSmTKeYS3Kgn4uicusNeI6ITzOO1Dc3o2vCq4rCoXhMmCOLiI7AMYUJM3ONBsH4SvOK0+ZMhBhm+idLjy5mszTpwDZiS474k9Zki4lgDPoVysa7hfSi+E1gk7oES4w1UYRIDoNLj/MAAjIcgsuO844ESgIHxElUgBCSxEkrjMbFZDfxAc+Km5WUppKLIJC7I6uIvQJ3EScw28Q+4WuLIJB3gMKm24mGwqRPSE5oxhWFREg25I5iW48ETYRL0beHig7EX1a7iJuMlE9wtleLrxZbiyCSycNbilmSYqD4S6uJ2KTri5Anv4wAx9uIjIZF4juPq47gk5RMW4vWALuNRE35EvJge40kTYSSF4hudcsXGGZ7izRMm6azMxuMAMJkTjRIMwH7iNYiVsJmgAeO5E1ESrOHFEyY9FQ0dEvaIRRJSxEES7RKNqBHiORPx4i4peyVREhkT8hIx440TkxOKE3HioczIqWoTURPoQEnjWhJ5Eq21b2NT0fGxURMQ0ETACeNN4ssTsQG8tUni1RMfCVniqcUJEr3w9oi54q2wMhgt4/njURNtE5bwNeLsqAETxeNYYOeB3hOBuFIIExNQqMglLRJm49lgJxLkCBbj5eKHE3ISDRPV4mIwReNRE8igtuOrydsSV9AkqSoT1xON47Ph8bB0JHgZbeOpY0oSOxNPE2p57eJZE4SorxPsJHcT+Knd49cSdRK943OhjxI3E4yp5+OfErMp7SnODZcTC+O5KBgkoiXH4vPiLRO/4vDjY+O7EugSWOPjxP0T5ONT4sgkkRP22DjjTCWpEiPj1cVzE+MSQ+IYJdMT+OOM4pMSK+LTKO3xSRM5EmW1dWG9iGgI0JNuE7cSkJL04tvikiTgkrviqMD5xAcT++OYk7cSpxILteiSw8ThUBMom+LkCYPjyJNEJB8TK+PTKY8SHVGX48GR1CSJEyLwpJO8xLfg7vF348fdfswP417wj+IrgMsTVJLfmc/jLEG1EtrwBBO/EyYIhwIdE15selkMCY0TgJMG8OASwJNWiAwgoBIYJJIY5SgcIb3FGJNAElKJBRIgE2hZyQn1EtETqKmskuMSR/CQEtMTCJLwWHLJSRNwkgySApONKHgSGJN8kwgTZy1gkosSDihYEpfFXJPoExGY47FYk9KSaBMnE8CT6BOERVKSTRJPmBKSWJNMkkRZ+mFikj8Tr+OHMJqB82JArC5ABGg8EtUI6qlZSJqTfKIuaZQSwhICqJSgIhP/rC2oepM0EyBMGpNEEzTBfKJakkHxAhODGM5wqDC6k8tjjZ2Gk3wSLBO6k8dk2pLbYoQxxpNCEhwTe7EMoTaTSYHakgaTdBO2ko+t1eDGaaQTkwAtqCShqQGME91BiqhWk8wS9BIpcMzjRBmR0YrBRuiTDLES/DFekhqwIwxQYC6o5kHQUB0N1ECRxPSh+e3qMcRRcamHQWLgcblhDB3hENCzQfA93lGBDPXRxcE9aYfCkZKJsb6ptxF3xFBJYZIuqIBpEeDiMCD56alvQX8xmajQfGxhF0GPgOkNruAfxDdBnZhQSRDQfOJ7QPpE+EGBDSbxPoWZk4vJ44mb6bgM6ZMziatBLNUxkt15pkixDC9oJ8BDyUmSsQw0wN9ACKBeDITg2aixk10N5ZLxkp240rilktBFf3mlgb+1lhUvWGDArkGHDZWTosAuWCpwfpIhkgTBXEDHgdWTDsDYBZm5+w0vWUjB9USRDQWSHZNexFBIkhmawUDAtUUZuJ4l0agEwR2ScZOuUP2TPkDpDbkoYalHgz+gyZI+ki6pLkUOkTQwiZM+kgb4QbnJksOTeEAT+bWS4tH10ATBb4GpIYEMWY2MMAfpNxDrSE2hT4N+QAfo2qGteDvoYAzEwT+QwZLCwXmSY5MqPXdIn6iKCGjBIcC7DeqoCGk9k4OTI5PdkybBPZPgEYEMw2FYEv2TXZN/7RuDexD8wPYMtgzrkj2SbKKPgYEMHVE7k83k/+IXk2G5fMCG2aW4BZPHqb6oN5MNuEShC+RVGHISlw1MIR7wVRmV4K2T3MCnkh0M5oDZqKQdQeFNk2+TfPzLSEDgNZMNI8gS7ZKdxPzBN0Es7feTvuGtI1HFTg2dk0LAMZKcuMz5jsHcwC3Zn5I7kluS75PU7HmTZ5KCoKcwHQ17khzBiVX5k+Fxh5MPkleSD+zoRddBd5IdDKzg88Wr6OqIHQzzkw7Bl5KxiGGTA5LPk+eScZIxky+T5Rmnk3GTosFgUuWTmFIgUgAYlZNDkneTsuSrSQkRqFP/kn+TTXk4aL+St/grkx8IiFLfkvhSeBn06PzBIFKVkoeSxKD8wAzI4FJnkq/4BJgZxJGTlEguqVgd2YnBkpGwNFJBRN2SbUCUUnBEMUUHkkxSJ5LMU7VotFOJklrB8tXEUm+SqakRwZXRoZP4UzOTJJi0ocRTuFIxqFRpbLhhk7RTwagXkAy545MBqIlguTzoUimSWsECMWuSaZO7QHMJAJOBDRmSVECOwa/cD+3Hk7bA0lNhDFBTVsDO8QXFAFO3k3JTruFFk7ZEbsCWZaeTyKHuqYJTkunlDX6SGakxqfxT9FJJqeA0a0AvkqbBXFKLk15tUj3JwIw9I5KcU+pSQukquJpT6lNAuJ2IX5MOwUvIm/Q/k0+TUhnyuU4MIKGdwXIDZe1hDReSW5KWUz4MJFNIQdnoN8RQSMhSMansMbGSqFI8U4B5Cahhk+hTycDRyHGTAlIxqdCQ4CSuUuxTCcCZqdGSolPZqB0NkZJewcZBOal2Uhf585OR6OgQ2ZOimLZS/lM/0JuTXsIxqDmpWZPmUg+S/u2mUxZSLLHkqNpTEcFuU9uT+lIlqITpp5P6Um3B5aj3kw2Sw8B12OWTKlL1qdglYVJtwCuhapihU77g7jgIYUFTO5KpUg2TCFK2UhRtyVNhDPZT1cB+kRuSjlPFwG0gmCUiUmGpIk3uDKOTosE1bEXjbFM+k6/Y2FPOUiXAY3hJDd5ShVNKQ0hSflMOwAvZiKgBU1xsbcFP+EhAF5ObkwAIJcBxEB0NonEpUrupvZK6U0+TxVMJklfQlVNJdDFS6lPPgBqgpjwfky7EaQCfgFFS6lIPgE9AxB39DaWT/4GkQglST5KKQNuBoom07X+TpEDbgfYgoFNWUwAJQ1PoBc1SGVPQIPhsg1OEU4wwA1JB7NhTA5IDUktACw02wKJS24Dt8EsNBVLQQIwlRVMdU5bh9mOeUm6xM8HNhJGS01OnONY9vlN9ktuAb9jBxMAc1VOjwNVBzVIjUg+ACpPekg1SQ1LToN+45w3tk5PAI9G5ki1SC1PtUykMbVJ3wOJB25MUU7VBB83tqYxSYA1tUxMQF1ICUuxTl8HmJB1Tn8ET2VIkJ1NxqERAxnFJJe5S/DHX+Akkt1LGQb1dM1PYUqxBL1Ljkw2TyCAMyRDFVgz9UsZBnzD/qVYMvVLdMImw8ulqUs2SEQV5sEMNXVKsQBeC7lM9UtBE3TFOoftSdZKdxCDTzMkzUntT/VP8QODS71K7wW/iINP0kHFSclKsQSrB3LjXUk9SkNLSuO9TmFNkIHXZNVL3UjaxP7CX2EkNMVOoIAjB4kDaU8JBHdgqUl9TaNNlQ9uSENKSQIGQBVI7U6gguNJxU2NTjCDY0yOTWVMY0oagmFLTU2aAJkEjknxTqCGTgY1Tr1IV6X3B3pIU03ejDyDLUywh1uU3udxS18GugKsNc5MVUppAYNjXDTZT7CCmFf2waVKKCcJAXs1TeYNT/VMDOJp5oNMe8cJAA4EW6MDTBCHO0MjTf1LowXbUSMyeEl6SKWB1KTOIzqjZqALTrqn8pFUh85IeqMtIKQPFwN6pz9yhqL6pclPv3RWoHlPFwoEkUtM+kiGoalM+qF5SBwgsuBGoXqnqUvxTxHVhJERTkan8U4LTnFJOUkq46ak+k4WpPnSpLOGTqagRUjLTmlOAwEWTOTFZqZpSIVIaggw5Jujwmew9j3EFqb6p6tOwdMWowhgDwN/4MnRlqHnBJajvDRrTnFMz6d141ak1Ub6o5tC1qH+0janLmJXB9aiFdHWp7NhWqKSdU6g6lBchk6lT+Ouo+PmrqNaTGoCFwOfITtKTqUaojtPbqcGwzpP4gQeoe6wE8b/FkmNhqPJoXtMsE17RwmijIN3IYVMnqdgUf2mu0ggwjlGXqSspR6kl6QHTTtIh04PIQdPdqMHSIGR0gW7TftKB0xHTNSSe02kwhYk7qBrA8dMvoSJiodKJ0q7SC6lJ0p+sYdKiEyCVpkLC/FcjKEKZ8Fsj+UVzOShxjwmZ00owqRK39PNo9llBmXVAG7EQbetCqYHZ8G8030LZOVrA7VT/rbJYnTmn3NQ4pdKF0iXS5dLtvBXTs/El05XTH0OSIed4mdPV0legbaTV0qu8W0JqJD3gedLfQ645aQ3cOeXTZ8IwoTVUp1neZGi5n7HEiETAF0L10pXTj0SpUEcNGdJN0hXSnkGN00XSW0P/UZ5ttdIN0pxRrVU54QXSQ9JYxO/hHdIHIEugPZBzg7XSndNA0UqAahAt0n7894HLULVMo9L90kPSBGjD07PTMUXUUGmZ4Inz0m+ogkGL0rdJ60PgScvTBF3zUMOA1dMT0njQepLz0tPS6RIzHX3Awjkt0htQgoCz0ivSQ9OZnTCJ89MPmUOFPL0LfRhCalHQCEfTxkEYQw+YRCSV04PT4FmH08vT59JqURfSRdN70+BZZ9PZ09fTD5kuWIPTedPgWXfTw9IL0ofRudNH0u3SYBjV07AYs0KKUYmA59P30h9YK/m10tkgW0JkwV+ZxIg5YLGDeNEURGA5XRF/g+9Q9g1T05/TBNAb5H/T19PBuHnhQDM6QE0BwblbwAfT/YGgMmG5T/g706bgSvx74LZDxIiv0rxZlpUgM+OQ3tmwMy+pSNzt0tAzJ9I9UBdDTMAgQoPTTBDduXnE4DOX0k/QiRD3003ST9H5oOfSqDIORM1VNMF7qGLhJEm0YOfSuDJ40Fsi30MoMwxAHEV4MrfS6DOuHUBDhDM/0/9F2ELzafgzRDLkMwfTllD3ouAygDP/hRik1dPUMrG4fEO10qAzXFgLQHvT9DMyREdCMDLEUjREBsl90qfS7dKzEfOC9DNwM7BFNDKV0/g4iDK4VKwzSDLwMtlBm9LO8GQzHGBV4L3TBNF6UEgz79JUM0mBpDMOUbgQBDk4M0BCfNOj3PzTTjk5+baxMGiMuRIy96g4aWmZlqDhYUBoxFH08O+pFGkAaBHhjMX/qSWI36jcuYhoZGjyMfvRvLnvqXjof6n8uNRogrkEoWrJ0jMSMJozIGhQaJGxlGiQaf+pcEgYadhoOjJhWIApcGhoHOzpCGnmxEhpRjJWMARpu60dY6hoRckoaGJM+jIwaZhoW/CWMpho4BzmMj7JsjJk2QaA9WBqMpRpR4PGMiozVVja+Z2wv6kGMyNAJlXyM8fS/FMPrdRo/aTcA+dtR7X8aKBBK1WQVOaSQKxfkYBtnjIdg1khf63eMvJj63z+M+AwbzUAKYBsHdl8op9C3jMgTKEzfGkGKQEybYOBMuXZ9GleMuEy6ILCo5q4DFHQ1FHTUCJD0CwwM2MmtM5RBSV/wrEzqdA8pBXliTLimSmxln3dqQqh+jEGtdqtGbSj0P/laTP/wi/symCllNh0eNDaQToiuTJD0Fs0VHDsFAqZkCFaA2kyrBRD0H6RBTKduekziLgpM8kyBFkKFej1STMAw6xBCUkQdNRRJgTgI33MOTj9oRUy5TMWtRIw9TJicKdUNZhASMeA5TO/47EjTOKFNBiD3Jg35OUylNXHQm4jnmIiQexhzGhfwvMBT4PMUbIJ6PRI1b0zRxMQYm/YoZhMiIQi2BW4DRdCxCOJGe8VdTL1/MVlIZC3fH0z9TKRIxdCVORwFQOYIAy1MhPhW6A6mbJJZEEIFEPRbiGGrTa0spghmF3RcRhEIi/tleHiZPMzQ/wqQbEy5yX4Scxp7jilMg0yQ9Bj/OMzUNH9M9sypTI5M28xIVBpMxq03ZjrM+pxtTNNM/ugAmXVMoky5rioZAs0LZhKmXAVZzJjmHMz6kknMtdCaiJxM+oEUzLVMis0SzNjMnsy1zxjM+B1uGTftQ0znTKlMhK0w5g+Tafkm9HM9cxphb3dqAAY5zJqITxis9wZ0M8zFRn8RXczuzMVGb9hG0X7Ml8zx2FPuYczmWRPMuqTHmhASRc1leiFMCKBWijmOXnYWLj/VIgY/Rn+Mf/EkLNjAQs9PoFQs6JptjiLWLCzpijgsmzI+dgMYIgZZ4Ggs3iJkLLpXEIDmrgaGeszWqNNMp8QBzKJYGOgvvRJMjxw1P3iwVizzTPZ/Tx9aTMVlej8IBVMFa9EECK65IUzUHn0gcZ9aTN0FICxnGT5M+IckxVZMqnl8Eg+fMUzW/gvfbcy6TIQRK6JjTPlM8+ZrCiVMtizx4SzLHszuiPwSSp8NzKFQF+4LbC05EUz1f3gpIsyWzSAsexlcRnzMuSyhCIbM1ug8tNzMrMzQNClITMysHQLhABxyzOV/PSyLTOPPEhIhgKlMnIlQ7iMsh8yj+QLhMyybzItmTyyVzNfMtRRRgzJSNhAvvlB0JyzErJjme7QFzPstWyyrLLg9Rqk8Y1B0GSz6kHPfNBRvQKCsov8wdFf5GsyCplewMsz3LNA0AHAJzO8syOE20BHMpDUxLMN0DNiHLJfRBx8HzLCs4fJhrNKspv9+rOccL01P7mxlB8z0Tm1/EEjUzNSsoSynQIfMpE4gLCzFeazbzOqs1fkZrOks3kz/iVZQEL9bTIbMY7iHTJ2KEuhzrJicTG03TOusl0yvTMHoZhpfTKyWcxR4JVFM9IAhqNvMSFJQzPzlN2ZtuSt/W6yAVGesuUzezI0MoD8OzMUWN6yebxbM3s5o7gpvIkVWrMcM0FAvLP8s99I2z1qsnhEI9BnM4syeEQfaaszerMSMEYZaLNQoVugRV0Ys1szaEg9MrNh4PmhUamzCmChmcmyXzNmtY99VPxAsuizfJmLhDqzCTKvhQ2UezK0I9GyCrM6tGOYzWGQI1cyyFHXM0czObJhslHTP+Xhswoj4zLR+dbQuz0VGdvlo7io/bSyLzIMWH4IMCNyszeExsEZMx8yRbNnfDNivrLUUe6zzzM/MvGz6bPDeRtEmbIzYwCzUFmJsnqytbLAs5Kp8FE4iUiyz2jpYWCyMLJ8ga1ESLPQs72zyLKDs8bcGCw9stCycLI7WdLpA7IIsqBIELIDs7Czif04iCiy7+yos8pimhSI4r4RogP/UaQNDbVb+dChkzB6mEpZRgMLs3fCyvHyWAYDc7ICmcxZf3ULsn8iCrWDUX55aUEDI3zZHUVCYVMRyEDh2fSA6gMiJMm1/UTVebJhh/Ut45oCO0An9DrYm7MHso/wOticEbShdgOIDCq0BgPns4uyuFUQvLsC0OMz2LZ43hlbTVLZQ+j4YMuyxwRF2JogKeCLs8firQEsSA+yV7KAieu9l7PH46+yoWTHs8UIZMDLvIezlvHaRLAjkFnwDcO1pPR6gJRwV7P1sNezO/BXs6fciXnXsmMpZhg7s8uB7ZiOWTqDqmGHs69ZUQL7s+5YnUMCeFVQhAyXceeEsXkzs8bwEHKIvauzrKl1YJBhuhUPsl35/gOIc4BzKEI14C+UApl04jpjsHILtSpAVGDQcrmZR4NpA44Yu7LtKKigHQM1EGPR+OK0wbxggIGypThzvSRieYtBOAz9KShyCmB5sBmZSHK2ApBz4tkIcjigeHNBLXBzVGXYcktMUHMcI+4SuyIxM8piDCDHucfinkGWI/RzD7Io0DQEeoFQkHqZK7NwYL3IF7Osc05g+iXHsmuQ7vXy6XlgkdiNwjuyf+C+tShVJGHE6G1A77JejPChbHKvsirwgnJ8SO0oGeEAcvpFoHNTklRhqOi+UCJyxUHyI93BxHMo4fc88Lgu0I+z0nNXvFhyC2GeAmC5M/RF2LXRIKDiIPOzSslgvExyQnJAvSpyAnPtvUpyaHMIxORzUOCzsyTEp7OIqWbxs5CXPDJzWZn62YgiUnJkckxiiL3icxvjfkiQYB2kd7KOcEVEp7PMyMrYLBA7soeTanLR+eGBzMkjmWhzRHPaBf+yRHJ/IZ6pwgz9KcTC2nLKYJ+zmjEQcwf4GnJTApRyNnPH47AYmnMscq5zesAfs05yCHPVvSC8CnKzsgBytIQCY/h909TGaEZDR8hKQMpjQfF+cu/tyIL2+YwSE1E7yGcBrpIqYP2zpoFBcn5yo7PVyf5yoXKBcubcMIKRckfQgXJLKOFzEExRcjM9W70p/JZYHBiE8HBzs7K5UtFQGnM3s7tBXDBIc1ezBcGpcqxzZWGowRc8a7PlUDFAHBgbs9TYs4A1mBwZgMKR2duyvcBTA7uyOjC18XVShHOatQVYXcBZjNuy05hdwT+hOXMns9VS1oBns390XcBBYCuzGXMZUsTYV7IGyMnAXcCVcyYhW/hdwRKJjKiMcvhgHBnLsgu0mnD7k+lyz7MMGCbSbXMtctzo3bFVchey6giiFWVzx7Ofstlzs9ngck4RuXNb2JGZenMsSF1yV7KL4Q1SgWPH47VprXMoHYByIHJOs7kiI0HNwAxyC7VNcuVSBBAZc/SRJGCTc0xyNXPXQYB47HNzc/ZSBsk5c+RBz8Df6YeyUJl5ktB5vHMzc+xh8an8cy1zAnP2UhtyInNCc/ZT+oBF2a1BBcBFAiZznkX4SdnoClEScu2t2ejFsXBY0nOjcyGEenNT0HM5btJIQDpy8nLzwDHTCnL7c4khzcBUaAhzInLpc27wqnKZc7dzFnLLcpq8GnMCED2TCjhacqZybcEmYedyx6DOwHi5MnKDcwZwR3NScwZyH3P6SBJzRbWcCfGphbGMqVpz23LQ449y+5Pzcq+zAnOhwTcwFpjWcm3B03MjcrZypsFA81ZzjnJFcyh4jnP3Ah9zD3IIc85yqXL3crTiIHIg85NyYynuc0uTUPLIk55z/cFPcklz3nPC+fSixr3DHKQY14RxchFzg8jxxZFy47LD5Fi4aPKY84HSlGXhcmFz0dOtRdjzY8l48jFzmPPwLTXokVIBc8Fz+Wmc6QTyoKybPTLsBUiQBBuQ01Ci8JCBlIXyWMNk4VEXwnaxa7K3ZdTzj/iG2d/AlPNrQN35zeS44KLx0sHrFCcYNZii8e8xbbBNQTzCFHBUCFB5NPJEqbzk9Agz+LEoXPK0mCwFbPN+Yb6N8iQs8ooICvDaJYzyEOXpsbnE9PPV5ULzdPPlULdk8/ic8iCRCnH2pbPcMJnq0BZMdPP9+HVxmsCi8WjZq/mu+QjTivDS8nLzfkhk5SLz0vKK8lHkiCXyJa/wtUHs8zzzIbB1EWMgnmmLnIrJcvP9jErzCvOn3KXw2vJ2sLuQtGPi8YioRQUyUHp4QY0FIbrydTA88wlBgAQX6IW4avIm8smwYHPV5VzypbGuYFwg+vKwIHVAOvN0cBzz5cHW84UEFvGRePggdvN/uRryYiCQBY2SpfE+YwzzRvM5obTzWsGP+ebzSOQK80bybUEs8i7yQ/h68jzyTvIoBQbzgXyDApIjR2UfKImx/fgU8+7AAfI08uYgq4EkYUHyovJlqUjl0gWh8iPRYfNrIczzSI34wTbw0CTmyNXByvAEUamxvPMh8uHzSvMMwVHz8fMK8gmTEfOqiUbynMBi8hcUe/mQwC3hdHEapbigdUCNUeJw6gUm8pZBMvImOTVgmfIU9R8oWMTNsOoIUwykQDZxTvIeg+nytkDe8le4qfNDkgny02EscX3MwfP62bOjHymJ4ZSEOIhAYx8pgqFG8nRk7EkhkA7yEtmMDa3o4nEpyFryqfFZ8ubzMjG85BnyeAX18j7wfAiS8+rzLPICELXzRjAmcYnytfN+yXcNyvFuiAmxlvKl8wHz2vP/ddzlJgRFsd7zTfOUBXYFQ/J188XzVfLSiW3ys1Lu8yXoEvPj80rzMKQUcH+AJfKv0t9lIkhF867yPnKEEli5bPDfGOYg+jGd6VcxbTBzGMiNTYMqmOMw0H1p6Qvz4RjJWbjzAEghmNlpG/LfsFvz17BL8ys8ME0BgBvyu/Nv6XvzW/P78tOy/vKxYsbF5PMGvfh5JSku8jCYT2j2ZWHBofJHMDpiygTB88LzTmGn8kP5gvKqYa9ocsHB89gl8WIh8mzyT9gZY+LRtvPc8uNizmKlsc/z8WPi8yGxcfJaYQVtkfPpAQoCHATv8r0guODmYVbUgfI+9XBhPWjC86Ly6HK/dOLy5/ISYEq9P/mB8/eyV/IT8q2yg+AX80rznVgvsqAKCfOAiLB9M9gT8seh673wPSrzcvWJYsiQLAQd8rVj35ma8i3zI2P8Be3zjmNQcoALYqgyxSO8v/MK857zm7OHMBPygUF/8qgLffMACsALLQTO8lSgW0BS8q7zdvKLvN5DqbHP0I7yoKDHIH3zBoGQYpAL6ArCk2ALhERT83bz43PCoy0Rq7ji8lLyEmEvMb/zD/LP4JtVV/J/805hGiH/8mHyqHK0oJ/yDfRMCzxA3/IWsinhT+CKye/ydAsZQbnFFfKJeQwL0Atl8hJgfoSZ8gvBAArEAz/5afPKoQ0xGfIF8h0DfhhceCnyyHIt0T2wMvK2edxTYAWCC/IjtxBF8peAmHL0WCXzKfMACzQKSfPcC7sRVAp1QQnzyH1SCmPydAgp4Tg4vvIDoBrzLRBbuVawbfIf84NQIARN83m9J6DZ8hALGbx/8a3zwWiIcjiEafPKCl/yqS2d8lljXAoJ8j3y0rwlQEPziwBcIFQKFfPGCgn46bzGC9VDWgqU9esVI/I0CkHsY/Nr5EoLcguPUMJ4NAs2Ch0ksH0y9GPzM/IQoRb0ygtz8ijzh21beXhAh/KN6LFzcqGuCyvzyIOeRc+xh/O7Yq4Ly/Lb8sOzxr014Z4KbgrzsClifgoeC7wjvgveCl4K/guBCi5Bh/Lf7dOy7ST8wT5AJ/KROFhSXek38vALUFK+qb/zpzEFwSnZ4fPfwWELlPKM89/y2XMZ5Xfz/PJ1U3eQjrHsC9zBgiDP85zyH3M/MNzyaQtJCuKCvPOP89eT3KCf8/fz3MGLmJzyCYEJC9b9sQuowG7IjAqX88hTd4WACofov5MsJS0EIArxqLELSvJgC0LA0QsK8loLgolhC7LytfJQC0uTBQvQCjULOQrXgN34qvN5CroF8Ap6CmBSqS2IC5UKs0C1C0rynUDHWL+SH3na8gQLQsC0oNnzd6ENCh1ZzfJYCrZS6QqW86YLMQspWNcVuAv9wMc9HPMO8xdybzT18+AywwpaCHPyXOESwPEKrvMD8kULFQqu8z+AvQqGWBPz1grjCmfzvvNqwUuIhMFiqMKSlAsJcnvg9AoRCiBT/fO5CzzDLQrwQUsKEfLwUpZV+QrTCqJwzAqdDArA9lisC6NTL5Ox8oGx7AurCnyp0AuGC9zB+wpl82ThJ5IMgLwK6AwKwbZEuAtF8oML/YnaC5nz85McoMILufIQUpkR6gvZ8vuS91gjCxcKRQoigJIK6fLnCvmY0gu8CvcKKwryC7IK5FPPC5wKy3M3kbMK4rwQU/cKygu18iBS+fOqCjoLWQvXCqIKSAsZCmAJzfOVCy+TTaDyCzbVUFLa+boKXwoKwccK1fIQU4cKSfOGC6sLi4FDsdgKzwqmCs4KEIu98p7yaAogUwHR9QrG82kL32gl8zMLgFOvCxPzUFOYkZgL3yQgUlXzcIqOCiBTNfPW8xMK3bIkmFCZ7grdyFiLO/KN6VFzDKOr6GvyPgp/KB+EAQqb8+xTaBgr8tiLUSFYi7vzI8gEijiLaejqwa/Ri/M4ivFzMMLbBUdlQ1Jy4ZLy01FDUrr4VPJRCvvB5Aur+LTzqyDvFWsL38C0imfyt/LnUwmRdgRJCg+BVviP87QLbIvMC7kKtvkGcANTxAucikViA1Ln8ysLfmBzUzIluQo5C/+A1KG5CkjRLIpZ+RsK41OG0IUKXHnjwfixZ/KH6HNSUjnACyfyGCGMi6AKFPRHwfSLRvItC/+AnbG1C0rB48DoC9UKCoqCi/yK8gql0MSgvIrQJAgLI1O5Tc0K5oDCGZNSxgrOCvSLUIsTC21S3wAheWKp9VUsisNTjQoyQCvAynx7FF0psdCLC1SLY/FLC9QL/4DoEKLztAttUmaL0QrrCztTwOEWi0yKq6T88lHzWiAvOZkLrAs7UuRAcfJZCyxAG1JWiuCLs6OOipwKThHOQW84KfNPCztSLuJnC5IKVEAbUidgHorEQpfAqLjZ8+ULM8AzucILi8DolHcK3orQQBu4mfMPCtBBVgtwi9IL3ouzgtwLZOBLwXYL8gsiimtAJfOKCoGL8wpqitBAqgq18kCKwEB+inVAAIuTwAkkgbAaCztSXoqxi4wMG1PuirXyXvlqi4ud+gr+i1LwBwsZGW1TFwiQi30KoYoWigPyzw2jwVxsJAvmCmmLJeAj8vCL+YvBip7z5yQLUqYLilHpijmKrvMoi6aKRYvW81STUYpz8xiLPnPDHE1pdWlEiiTznWk1iz4K1YrgYQSKAqn1ikELFIr4uY9shcG1iviK3BNrOA2LdYu4i62KZIuVJAbCIQpNi+CyH8OFNDb0DnXG8b60ZpVIVPq1obU+lCvkPLQQNDK1gbTJlRA1u7P9ioF1ErSE9A6UMDSCtbA0rpTCtfA1E4tWaP5044vutSRUTRQ62UF1w4t82JRVYDV82Jg1A4syteF0+rUKtAhUbLSyWXnU0lTetekMVpWUNQuKrFSzFZq1xDSatYm1gjT0NLjYojWtoNG0vDRSlIa1+rVrFdQ11NiAwB5V5DUg2eG0fYqF1EkoolQwFIOK4lSPOeeKyZTPIta0KFRsNOG17DRnFEnj9rRFlWsgy4q0VDpUodlDikzjtHKj3bsjwqI1dbTVw7TZVVo1wyjTtVCVn/1FtHo1M7WTtc10ahWjtK10NbSztKfUnXXh8R11WhVVtTt1mVTIkucxltULlINZK7R91A2041yT1XY0SXOLyNPUc3VS2A41TjT/cyN11hV1tIvUVJV5tB6hl4v7lSBL1Qi9tGBKXjT9tEUYDVSQS3W0GtQLdPLZWqNPlH3wo7SwZVeUQTT/cmt0t5QT40F5X5UG1D+KEpRLtb+KgpRRFP+K59RbdQBLZjThNMrZo9XX1E1yB3WES4hLOsIuCv/oWpSHtRd0ADBLfbHTuTR3pSe1N3XukoITjZwrVbRK2TQAMH4z+2PDHDqVe7XpNAXZg4MeknLNwqIVHRijigQnEK9Z2fOo8SwEw8PBWaINq/i34BdD25F2iHaxfVF+geBZ/EWcS6mCBSDQaXng14S/UvRRj9PhUhNAR/hoBd8BX1nAoVaw4GGimHjRMlG3sS0Ff8E/gTpYt4R8SuvATCAVRRTI5cHFxQRA74FVWI1ps5h2sEpKn6gcWJ5BIbHykbcprrnJ4AmxS5gFgUTRfvDWgdfBd6EE0dblxKBJBHLxzzAjGDZhc/jXkE/9rTImwxY5R2T9SVpwCdFlMCgIiFEnyarR44GORHYp+ulmAAQRg4FKyABZ4FDuCdZL5+jgRNlF+ul4JTBAu+h3xZeFqulvgb2EeItz0FWiF5He8WD42VD0IVZL5aIE+WVZdJCquIkRWYU9k8xg9AH66XLZLksNMBmM7nxxoAAZnKCsFVKCA+BxQZmSpEDIw7v0aUL2SnPgXwH66VpZRrB7QaS9qACkgpVQ09A3QCGw+oDufIKZmDEAwckJCoK1TSrBbCG9kNeDmPCicarBXJCowMl9IcAmhYrAdZXVgx5EGUsg6asCKUs/UOnyV0CAiTbRNW3mYbYgLHE/4/59ESmlIVFLStCrUZx9UyOcoIJBMCDO0AmpfuGlSnpBKUWAXTcw04EVSu/4zlFbcJ5BWPnIoVtgC0P+AXhwxUp+kHjQfWFhTM2hH1niS7LsOf0XIDtBbzDdIR9FFiHsMT18J0DXCFzAhnliMm0kbEs10EtE6sDowKcEJpn4GUmwohnzAFRoUpnmII0x2ajKyWmYhhGz8YNLd8JDSANKbFAZS4G81UUO1FAhCEETZCw4ndAN4Imx1hh1w6qYc0oXoXriyEImmDOB6ogxaaUMA9HDSyYZPnhEMCaYIbi39OrAkrFzEBGZgMGohJtKJ0HqhHiCGPlGPOtKAOlpAFeBbuQTQYmZ6kEvgYOBKFGBCJOZR0ql0YNKhUGYwa450tHUDPNK/UtBAWHQqExybHsgeKg5QHCgQIk3SxDEQ4DTxETMiAg/qCRAvZksCN6g6yGfoKuBlBUwIcZ4iEEgxXdLLkGs4RWZOnFRwPfwv7xFkkOB5432RcIZq0RGobdKnXNsGKAznbBzgQLIigj38PDJPuDoZBNBbBkKQFBBy6GUQcIIDCFEaAxBsImQtZIgISgMQcmtYMq+yB/AmV2tQWDKUMsYQfe1YMqrQVqktemfRCDK9EjppB9KoQmvwboz70tfS2wZAEBPQCRBzTNsGD9LNkB0QfigQXzrHFIUdlRI0PZLsQB8qZAIBMqBJEPIDMniLMTKnvkxsHtJiZRK+cj5c9BmCe0JE2BBQSTLLAnoYM6EiPnUy0TKt4XMwRTKYMuxAAUDlEFBSzmhvBWBGal4T4B2YV9K2QgsykzL3cjMy5C1FEGGyd945dEMymlMb2G0ykIAPizX2fmoJMu8yq9VP8FZkkPIF4PAyuXopKG1oZfwd+XZQU/oAZLfSthB2SFiypjKi+RNAR94IOL2Qd4Vd6DSynUof0pr5dlLdPlgJCzVUspXgTT5lSgjNPMiIsEKkFEIEsuyyn6QTBUcCtLLcSj1WEoYjPiWSyWtKMsX1Oug2suEyx9K/IFhwITK4su7NLvAhMvwQDa1pGAxwYOR3mRm1DA94UpxEBQIbeBmy9D4GwgMFC9o4cH70F6JNgAMgELKlMphtKKFbvnlsD4tOsqCRfzK9kGUFYhUqvjcylSjAhU/gMHEkspEy67KAUy8yjLKHsqQgUFK8uCyFJXQMflBSqEhwghtUcn5LsoutXAhgfh0ywIUq8CDSE7L4i0eOKeI7spAiQM4IeNP6UbLbBi16QeJT+kQNJHLp9zbwPUwVPhICGGgK/CWyoJAkcuSmFgh1sp7SOHL8RgMy8DKocvvCCHLLAkBWctK1MoCyoDKWMQiym0L3MqXtMmh+HKQyj9cF6EEoZbLwhkMsUuAscoIy/nKJOiPQSbKLBh4Ge2oEcuvS8IYkhnLS6zL7sr38LvBqcoVymB1vCDxY2ahAMvCGXmweMCFyhQIZ1E7woTK0cqYQWJYK4BGymXLpXCihKDEYcqhCEShv+IGy5LK9QkjQbrLEcpNypkQIulRy9LVLNE/wWbLscuQCb3LnUGWoJ1y2Qj/vC6xpcsoyptUgpisy90pFcs9vX7CHctjyoAxjkrkaC3KEwyBUI3L0tTKBKihfcuFynJU3EPPeBmwRMzTyvzKofBuCZAJFFWuQRkRvHHLyoaE/6nxy4i18H1KwUzKospNyv5ZnDHdyH7LLAjneaPQWctCymYJQ8u8QY74GwX9yjrAmiEIQGKAD4JDCbvK70tKy8hAR8rby4nLvOPny66xKst4sXLKW0AyeTXL18rJYz/RmZNgJNkJ2kS3+Vj5aGCGoGvLu+kZsevKshRaWVW5nKGT8LgIjcwCMPApf3gN4fKdq6CfyvXKSAmvyzVTPcqmytVijWnNyyjKLtl+IVXKoQhd+edhCEBAKmvLqSBAyoPLt8v85B/BYCpAia75wgFY+LT4z8u/YCLKmspDCL/Ls8Anyi9DGC324ob4d8W4CP/KL8opymYJkCo+yDvKXokPy/9KHMpby9VxoCsHyyLKhqCYiu7UgGhrGJ4YGBhfpSZMdEpArbpxtQCvBbBAreiqlKwTfKMj6QQqOdQwJP3pcIDEKtRKTcvcIhOCqJgBiHgqLLD4K8tU/OE4K/9NRCrfrcQqOCqDpAEYI2kBiMCg8f2MSwyjRIiPpZQr10kUK4izxCsbeHUBxKGeGC0Zi4V4uKxLuRWMKi0jfEg8KtQrxCs0Ki0ApCsfcW/oqpSK4qlLQ6JtMhNyGul2LJAF7rP66YEJtvLgeHTlIipeyOndJ3xhfE1JLRRBsgLoksjDFDCUD+RyKPgFcJUqg68IoxS/fWUgiijjFHXDhOk3aCor8MSug4orqxQLYHp8p0zQhRSV4PhyKAzJGsQzvNjD0ipSKuu9RML+vNMUYiu1SMQiObAT/VOlxn1GKoFZxiviK5980irWwP0V3rLZoqCDgAR+sux8+uHRlViUHziBS5T9civT2Zdp+yVslWYr+uiDvSrEeb2OKn353JWbOZdo3PyElbyDv+gAlUFImit7QTiU+b3VI1IZ79i9FQvll2nM/O7IiGWXaSJzTio1s+N8uCAgBIYq4HB2K+2z3IJ1zcLJnbNWg9ZAMd1eKyqDcC0XFDZJ/IIm0aQVWivMg+eE9xUeKzZ8eLi3FQ+4UPn+KzQU1rHf5b4qfxVxKyGD3isdFeYrNtHuKl4qq73RY37zz4uww8v8430NsEH814OjgWL8OSui1LQxqtHrFPYhjmX5K5FZDbCmPLTpGajDwsUq74CY6cdNjxQsgoEB+ukzgfA4CXCxFSIqqYm8lGcQaDhJiR3BBSuskJI4SYhcvAlwARRJibzKpbDJcBllTSo7lMUrg9RJifV8CXF1VJFL7SpDAVV9KYlHAqkhCmXZfBjlJzQ5KyyUkUqNKvYh1JR1KvizeSuFKjVJ+xFDKg0qYU1qEIaUgypQkBl8qSD9KymIWf0UxUwgH0iRS3y8qSEuFDMrpJXS6TcCSYhTKm0qopRJiBMqLSvslEmIwrzFKk0rwys1K/Ur+iqzUhSUhSqjKhsr+gS1KiuUqrlEhDkrsyuxiGq8+d05KyIqxYRCldLpZJSqudB8OSstVNgrsijyogYINH3cKacqHiFMKjDCABypeXewcEQDg9wiFyvUK5KpWnx6CWcrQinnKpt8PjMeaHcrqpTx/dwpoiJnK9EzjrwiKtLRfQDhwAb4jLjQUB8xSWhGsLOE+MDQ+Wny0rkSMV9NpLC76I99Z4SzuPZKxYTbIAuEWkF9gICqbEDPREhIwKrayp+pNzALhY+D25B+SsuEKSFgq7Erq4RPaeeSB+jXoFNF4QGjhPZLV0GwEICw3DkFy08MVkrS0VqTSWkgq4KJr0i+RPZLJkX6IRyyWrASQMX5kECHhREopcqOWcdg8bLFECNKZVlVQfWzN0Cwq0rIgZEcMhPCE6IH6FZZHDPc9bPB+KuDUfeE2UD7AfDAwsh4RHbBb4D2S+Dxc4CvhIDEICvOgQpQTsnfMZSrK7hHQW4hSKr4kaVgyFAw+YSrsBI2YeGzN3hYq/iECkvW0eyq9kriQFnh4bKsq7OA2AQHgXSyTKuwEPZK8YNsQRwzHkEMqvj5xKm0qgRRdKpwsCyroVHYQAKqF4NLhaFRO0GkMPXIfKvVsoSqvKscEdyraEgyq1yq7djzY5krWbXeI/BUAdFVwByroonsRF9FVxUyqzdBN1DfKzpw2sq0DbRAAdFEcWTBV+lrjKNE7/kCMeir1cXqhS64E3h6q+fAurO55DZKYcBasSyzqYhqqyx4o0TgoL+D6KqagZqrYcKfgVyq01gO/M1plqpowWCxQQCAsXPTdKpB7JhBHLLr01yqfUOrhEBAGEFeaJllG4VURGjAQKHf4cL8RET1yZPwEvzmgUPJHquSheSxNUEyqlnh2KHksFcw2souUKtBJLAOmNaAaMEcFOs5EtESKMXLAvjIsCiq/qryqn/gEvxUqUiqKqrYRcL8+anoq43hKUX7fAxEpqvBoGard6Akq8/Rw+GIqlqwoarDUvKz0UFXMfDBpqsssgmro8pyQb2IL31u0KGrO0BHMSyzVYQcq+ARqtB7hSeEAqqhQUEAh4U5wcCrPZJ7yyOFzmEpqAKrRasnKp/J2fLBIeX4pUCtUQAp/gEHmUSZKUINaeQr1tC7wKOoN3kewNHShrFlqwWFdfkcYBcghPJrecH9USEAs+X4aEMsgapoIIScsLNpzZB9RSEyGhiR1Nuk1aqkxFNYYPEtqo2rrate0vfQamTp0gR1VARnuAEwFQ0r+Zbh1VFDqqYAUgUHoraiYThmlDfLzr3psE74OPmKyyDUXyQzlCSgXrwzqnRQQgUSKcqi5TDbgrwFZMFNcA6CvARRwurUadHnePwEG53+0AxRpdN0Bceo66qWQI8DG6orqr+RkCEwOGuqd8WfkFoR6ZSwPRthwMKnBU75jzGa0RqklFhjq6lSn0KHIhoEjVHTqqhca5VKVZuqI9CLqpeqa9Xrq1eqI6rW0Kurt4IaBWOrmNXjq4L5EGhaowurTvgyAPUjT6qslUJUFtCgQCtBw6vmJMeqdcJ7BIfR12SfQ4eqivkKMx+qiLE3q2Gg8FD7q5+riwDvSW+r/llQBC28PpCJWUBrt6p3uLGDp3lFy3uqyKvvq17ZYyMvqyBrndUvq1aiL4oTUC/h4GpQQLCUsGo3WC/tL1gUhXNRX5gv7X8wbPkvUFHCwMggDXyVKGuEWMhqDjTjvTcQjtAMibiUmGtTAmhq8Gq/dHPU1qEtVVOqchm0SThqFIQkoLDgcGoONTRVh70XQzSUUgS2AYB98mm6WGRrRSrIauCgAfirQKrUBqwq5aoE0vzIaz0rFGqvmMhqkyuqBWRr16rIwXuVNFQz8ahqyMG4lCuDGpDEa6xrZyw31IRq2fnf80zUnGpSBKvYnhzgDABrQ6DkayKkA5UMVJRrF0MmNAJr9GsXQ8PVDFQoowhrHSoaBDxrCtAymAuUJGtca29Jd6pCBLTAJEnyaTwQ1PmxADhqyfSwlfN4IysIajyVNARVgrVpcTVOBEpqnGoUBM0r7NTcahD5OysKa3yUqPlBoqJrNwKw+Pb8TIlaaqLIjv3iasBLIlThoqRqaYIA+epqtWhUa/gFhms3oSc1HPjugnBrDGq6anhrTGtMlAj52mqsavJqIGLpo1hrVmubS5UcDIjMamVNZ7039H40JPki1DZrhGrwQLihbSJOa5xrOUHb1HZrFmqz8NrUtWlma3KgtkLIa0SUOPjO4b+8Spn7Ed5qxsE/VRp5M6uea+Zqw4H8aiXJ/wK8a95ql0BYa3JrTmsuaHJqiGquayXhA9XBawAET2m2avxqzAQosfZq+wgBazFqvdR6ah74M8QIaqRqFGsABRFqLmvzAb5rAAUqwcXUSpldK+95IWpwa7sqbZ30RWocvmvLim2cXmuJak8j73l+auJrP1DzgNT5KcDha41055Fqeclr4WsU+dGAGFGRa6d585EEa9FqP6pRwsFrsWvDqr9ggWuia//omUAoSWlqkwNlanw8cGt0a6AE5Wpmahurp3ilaqFqZGL/FUVq8wMuaz35mMAtaspqV4OOahZqrWuLAXqR5WriQH+qSFDxa3sBJmugBADCO6vMIXVq9UMS1Dpqo31PeYFEampVa5xqZ3iJaz0YKJWuYePTCmpclI5Z7Wvga+Fq1PgroG5qaw0Xqirhs2twarPUBvhBCQNr1AzuahXh1GtI4PizJvmFQbVrK2tnoaWqcXFLiJdI9aqlMWjyONV8o50w4OiNCZDKu2o7agwgnKL3Kplx+2qCKSxKZBL/6JtqSig9godqR0BHarcr+8k7akyjUfwaCCdqL+weksdrxkotRcF8yQqPUsIRTwHfIu6Bk7zCEEcwdqMxqam4j2t+RQroM4HS03drv2AU6fjpB8L+Cb1REulE6GTodIi0eZ9rpOlV4JMokcXXiQv5VeE6ivPFnYnU6IZRkkHkaDjpQ0tY6C+hgGjC6Qzo6+GboUwwwugMdG9QIRn85VzprOluES/YCGgo6dzp+GChhQsiHOh3a61oeVhbSHzoueG5jJ3FAumuqKR4l4Bg62jA6+Dj2L25wOti6QfCGOo2sKTpkumo6zuB3qM4BPIRWOpPa3LoUhBaEC9qsaLE6aZhmJUKo8roH2ut01ro4uFlQMjr9mSRsZdomulfa6TrZSqHYRbpz2qa07rp6NL8UY9r5koG6HTqpHjMUNTqUcLG6FashqO2SwnUyNKCea84livU6jroxOtqkwqq/Z2ek8joH4US2Lng+Dyfaz2I9dGa6Vkpb2r46P9rlmDDYVroYuiyDTzr4XFa6S018lJ0oVnh92vC6bXgj4IfxOjpw8NNAYIhcKL5vKjrNFTA60zoqOvwPVDqj4kPatB90blo6iLpyRGMoCfBYtCDwRCRQcAFQW2JmOuVEdog2Ou84ILrOKF9mE9qbMFsuTihlEg46El5xnnJEAOA9VipeLYI++CwPBDqcuk7IFIQxupwQd6iBOoi6kLr+Osm6xrr2uv06yXwtbH54Jrquul60Bv1Gup66ymIfGsHw8e9GOuZiUboaus26/TqywRSEP746uvTnS8Nyuos61ZKQEHteS0RLmjs6yc1vDDmYZVg1itL+czSzKEuMrkqu6n/Sw5h0uq9KilrgVCS6hrQluSxwebq4utiK07q6+BsqYTrv20G6YLr8LDU66KYm8P862jo/r1a0GTovOqqK+ScBiAi68ihPoW061jpsuoXID1KfTgGw8F8SlnxxXTo8jzefSYhrSosciX0GtCY4ctCLHIfmfSD+tknS8TQbJXZ64MQUXxRgT4VBesm8ZR1joDcIAJ8XSlv4cTR8cWawKFd36nU0RnrzXxOE5SRnqh6fGXqrNXE6OvNKeh+QD7qkaDnze+DmGvE0DiVBetVwIfVZOjrI4fsXwF1UQYxFn2Z6ghqdeqzTcvtScV66UlhIYLp6wmjjoBV6njDC/HV6i+V1SK961jopnXnQHjDxeoN6wPrKoK1657qSmy0gtXrVhE8MBXqE+t86DZw5MPtfZ7rcaM16j9dLBF786yDg+ucEPPrXgQp6X0N1oEzWZIpS+qh6NOBfaK3CAhxO5gzQAOCCFBKgElKa4Br6iHZ1oGUAQHoHp2b62FAhUF9osfECHAKqRvq+tCDAOFRfaMvRDvrYiPLACfqgwHr6vvr5CvrSWyiuNCn66yjPhh76jk5PCKXKhgsquqX6sfqOCkcowsA9+qPK7cqBwEH6+WBAelP69fqG+oX6yHRJ+q76yM0r+vn64/qfukr6rh5q+ubfV+4HunV6ddrJWXfkCpLR+vP6qOj/+p3Ub/rzpM16d58CHCP6wopa+sP6wAbn+vB6IQrH+tb6wOjJeCQGzfqvBO36xAacoDgG6AarqDv6hfrfMjP6zvqo6L3qWfqW+vQGtwrf+soUIgaV+rtorVM0BvH6m0wQBs8ol0wyBt765Ab4BuyKI8Al+qH6/fqfuwYGm/qZAlgG4gbkihgG7AaRBoRMwyiV8hoGgOCwdAEGzgb/CjC4GQa+Bo1YeQbJBorYlMjlBuSKQt86+vIGtvrUBvEG2gaFrmjIAAaJBrMKjQaD+sMGzyjeeHwGhQbYXHMMLQbCikCuXQb2BooGn/rXYIeqRwa5yphstgaN+t9o6MVbBsKKAIbfBuv6uwaHCksG1xzQhsKKNyiQhqf69QbjZ3H7FHoEtkB6V/rLRFAGt7TwBrdAwIb3CiyG2IaOBviGkCtx+136nAb3CgiG5fr++s/6/7py+uiGzcMQemqG8waEhvycSAaShv3KjnVhBvSG/2rMhqEGqwaP+qb6noawhsMwsPYvBtCKIYa1BoaGwoaYhuYGvgabBtMGjoazapYufYrhhq3sRYaxhq36vN9xO2yGkYaY7lWGjAb63x2VTHoOoG26FKwGmTmGlt4uhpSCfobcBouGyIa4hvGG48qW4iWG40AHhp2Gygb8XN2dcKiKwEjQRUjoqJ56rgheqNFIunovhorIjKi1yIg+DTzZSNGfMEbvhpyomF9coC2otUjKoNypE4CLSK++HDDQeEBon4bCMPqWaTVMRpQSI1pzSOTtGjD6QxaohEbfhrlMXqiRqEq0fW9/hrlI4SioRorIoaiGn3pGtsj2iCxG9xEAOnfQeBQkRuvIudzY4NTEAnFvSLxq0EaYwIJG+airoJbQARF1dU2tbBRzGqB1Q6wHeoII5UdBkBgo6MNFSONS+BRVRoZGqbtPhrAhJUa4yLZo2UaU9QLIskbJRv11HMjlMNPgnT90yKJGs8EWqONGrEbtyE5oxka2aP8BTKlIyKrI10aQyNVMl0aRRqdG63rfuhgYI8ihRotGnXZ2KOlG8oJnOoXNNaj6mRhk2uB5yMNxIhRGRBN64QwDqLpGvm1jqIuowjD5RvOoyWDdlNZSYqjVyKzGwURNyMeorMbuMFqHPci0xuzGz6jlaKzG8Gh0KPJo3ZThiAfI0mMsxpbjKCiK4Bgon2T29TAoxUrdlP1EL8jujR+ghNRmBDmon8jjIP4U3uESKMxonGTckED1XGjwaMIw0F54KOJoxMb0xobG/SQlxrjGmsadFi3GpvY2yPloq6CsNBxogiifRqUcWe8CqCwkLMbdRACaKijYRrUWIWj+aP20bsaxaKvGvMbNlyPI1miuRsxsOWiGaLrGt4QqaJ0WZOCIEEko3Sj7xurGxHUwJuTg2mRYyM5wQiikxsko42joJvA0cqiNKLSfc2QHpEgm62jVYqkG1r5cehDowHo8JpjosIqFhtZKfCaZwFnaIiaI6Njogobjyqomi/sA6Ir6j7tiJt9osiaWJru6ZibqJpImt2LTrMWscetiyH4cPpYeAl1eFIZhzEvHbvoGEG3MUYDuKz3wbIZHs225baZbtNns7kIhyVwLGP4XAnFeeOBChjTmShp6EBXgGwRBVgWMhEgvBmFc6TNTEDbwbSbgpyno27SFXPoCL5YlJt/dPBpv2AYQOSaXi0cFPfApJvureybroVb+CYyMcEEm2j0/JvqGZ9zyIm8m0ZyL117ADTz8ajmc6QJ3Jskm90QhFzCmnJRos3964KaN/hLrPOBU8EnAvvNj8kvQbKbgszSMTUggeUenGaIPJrugU+0ZJvimq1zhcxnEKKa/wMWSSKaypq4cjucSQOzgOAYlsyysUGlAPQCnQqad4ABPe6sVbBOwM0gAAV0mxLLYsSgBHgJSSEXIcaaS613wzQhhpqDzSbqvMH6mlVcJJoSQbqaXizEQMqb0PKeCESa40swcrvM5poJoeqaT4s7Is+KiqujG2Ct2jF9WbZTSjnhCJnlg0uooRV9WAmjoCLB+kl5o+EJXpoAwEUDolnum/xDE2Weg/kIPxvrcusDWAhAm76a1EDpfVgIlMmDSukEHJx3ZeOBgHlBm7LgTevZ6fXqhK0w5MKa4ZtWFSuF44I1SdLUUZqSm/e0KMnQUPGbQqHxgpIIuCVEmuviGppf4DQj8amgoBhtlEiSm9zwDGwvQN6bGWN3q7sJ9xuDSlBgo3ySCSuDeZuJmoGabpq3CVurWAgemwnAFuK7zR5AwpsqBBqbZZo5m/fEO5wLsJYZwXFMdKG5RZoKBcDKvUlfmR5Su6rsCGGb9Zqmy4uEB5MJwMCEdZsxmjmbpkgK1QmalZoQsWCD8/I7tCLjJ6V1QGQraDybpN2b5CtwiUcZ6cRkKn3Ks2j9m72bEfDZ6KUh3Zt9mjaBfCo4DZUwg5ojaF2bPZu6QI68ZPMt1TDkkAWAWMJV80V2BWlAgJWx0PcUVVAYVJVLPbHzmlaVAjD9FbObUlTV4smxC5DP+KlBLRWOGf94VHltFYtA1DVqQIrI5kGldOqJQ7C7Ax6VK5qBsTXTXpQ+QA0UTFj0VQubKcm8JecVc5piyceaVpUzm+sVh5rbFZRI05sGYBMVKjnCyBDA/PlXm22xi5s11D+gkZXCQVpYdpRaMNuanZCqBKVh0NTJQT/kKRjl6WcVp5r/FDKZvrn3moYDpRhj2DP5t5tOmootuL1VdYqr9nXBaBSVMLjZVKmgaFkY02I44XAr7W2wbaQylXxsQpQgW3eVRiHVWYBae9QbBZSF/5roS5iS1xXjQZE00FpFBf6pO3SQWt348VmTVTxDZQTiIE1UsFp2sEhblVXH2EN9GNKyvLXouCD/mzMDn5vFqyGwYFqg+JXwQyuAW3yU1KnMlXQgXJV8eH0qaFoolXx5rSqUIf18mFvdKnBahPn4W+BaCFrAS8fZONn3mpQ5xFpEWihas9SlYF6ilCG7AjqUCXxYWhKau/nUW4hb4VPDavAMgFrwueVUIRh8WTRbzFvcLK+ZNFtaa5+h6jnUIAuUo2CqOJQhjwFc+FxaeFtBwP1qOpV7K8haqFyLqpEJbFvfA0yULFu8lVRa2FoJAMNZFFu4lAxaLARCW3KsnZuPbfsVLhnmANk1zmmagDtrQYFSWik1zmmkoDtrY/HPsD2qUXEKWz3I0lvkKlHTd7HyW/lwH/AakpOagA3+8ymwvzkYQNJkNfNopOwZjnmujNCEWlqBWLpaIiDnoublQYDhAg9KD+UfKMQiD0rD8ujABmFNEDHkmlsLwFatRP3ejZpbrWkl5euqqWGwocTlGdEvQJuiIvNy9FVhSCLT89nyIiF3mzpbdpGWfA1AJ+Xi8YW8DUHf5eLwJ9gPSrF14vEGBXFAHrSeWgBQD0tFvO5bwDgPSppUrlqtOCZa7EjOWvjDXTVZ8TaQr5hGW9PYovGQvAFaavP32BVASj2FjfHQw9A+WxZakVumW15bjEDc/B5bJeVX4ejoblqq7MFbbMHH2cTkgVuLJDZbDOQbKf5adloe8siRjlo6WlHlrgneWpXwoY0ZWi5gBBHG8+5az5uZQP5b/SSbNLpxSVsSpVpbCVsFW3pbcVpJpPlbYVqxWrlbAvDRWoRh2Vqp8WVbFkHhIBDlMVvv2A1ADluO86FbqVsscYVb5WDiFSMaFlm2gyzwMzXZKorhjmV58/A4zVorlZXzRSqtW8ryHmHBW4VCaDg18qUqc4BlKgXx5c1K2HOAugS6cXXyaFm9WjZlivAWywJYc4Bs1B4IQytDW51b9qUHg4VDGDm+jH0q3VoZZb6NrSpzgYPUCvH1fHOBomvTWqpDV4G7K5NaN1lXgQ1r41vVWVeAkyoK8Fy8iuHUlcNbHVoJNe1beeBDW/KRzVvpsPeD8pCrW0pQGllLWhuqCvELKwta/Wu7Wz5lc1tdK/tbxELkIKN9u1r+ZVNaopQK8Bl9E1vslArxKytDWuNbg1okw3c0G5XOCdeU7VvU5buwN1qdW61bPrKNEVDKh1pUCeo5N1vy8uo5AFkzW2SV11pHW6J0G2qB8DEJQxnhMktwJvGAmAU1dhvDHQvyvWgMiZ3o17G+QOdrUMwfW98YTIWfW56hX1v/WyvJP1rA295oX6W/WsdiGlqKrQ5s2fP8AfmteHAuQFAhjnjzaL4JRvOQ2g4IHxiEDCEKqblw2lOoeASbVLzZVF1tFS9QQwmuNUOwofCUwmXMbox2sar4LBW5pT0VGVQS3QCyCbAcBLOAyq32ZIrI5VSMXbkgSNqzmBGtNfDNsfwFSsDKbK0Algv0gSv1Ncxiyf2RZNsj6feNRvLB0FYt5cn6BDfLDg1jrDYrPb2MDOBpHIkY27W83BT1NJXY0NsUDVDIwdD429uBfN2sMSGxKNqrzZTaCNrI2rMRAIVI28acpNrd+ezb+JxaK2ja5BVwyfkEmNp3Cfzbwsi42lGsF5B824Tb0LSRYDzbDNoz8YzbIW1wixjBDq0c23gLqvM1zHdlYtpiwmJcNivE23OtxEx+sULb7NgNWtu9v5pSFLDoeZp1QRfpShRvNB+ZRvKq2n81c1iYWOraUCCi23mAmtp1QJ3BWtvZEbyUdmH2EI3NcjHQlMoEx7n62gcb3wv8IVT4IC0XCfnzKlWq2wRzbFokVWbapUHMla9oWdLqzXiNsNqJEYi0tCj4kbDbRiEWLJ25eJREVfmbqRj/QyrbTEHYnNigWJXw4B1YeNu76eBa4ICYMtbamlma24trS8z/waTb6tq2rHmwetvCmWbbhQkG2r18CtQ+KfSQ6tpDSbZtRvSAW67b0yplzebQNNpmmJMDFF1JjOra9EHAyjDJ9bHfCnypdHWB26UgOts224ltUYVtsFbaoQhQRUQRsNsKQH80sxG01SraWtrzLZLi4ds62nGbq6Bx2/N4jEM1zfBhzfM+2pZt2dqJix4gTZtS8BSU0utv4O9ad3EPuOMwh9Aj6bdFuBi2CKOb0JHPsKXQZCtl28lppdu9myXaldsNyZbdxLLl29Xa7hvHtVXaLkHl2+txRdq12z30amV4mnEZk+nlFLFIhxWLQYUE3rH6IY54hXD6MJnIrdr/FDtBLRSB5EMVNRByKj3brdsdcNXdvYgAVQ88dSBqyAV0LdqQBDVJRPwAVMm9g9qxdQPahIU5hA8UZ1BaKhVJcvi92vcUiJC49N3bndvt2rPVuaDTFKiI+xV4oDYqC9vNWQ4UJipL2v8VlhXL2gtgQxTbDP0UYU1kVUYU2z2D2wF0i9qKyb0r0tkzGHxFg9ojFXXoSLh722vaKWh7Fa1FXvk0+YIVg9rpdaJgMSoj2lL5NeGvFcmat3jn2tXdfKHD+KfaOxV/PF94x9vT2zwwnxV2QMWVKCSNFPvbtvIr24L43Q3r2l3bT9sdDYAFroS7FMz4fxX4cRUVOfg+K96aSPm5EACVgHjhVN/aLARHTRfagCnb2m88F3jv253aQ9vplZaglZWD2zfb6qnP22SwlXVPiz+aWStlFJRQNCJ1IZRAuGqCqoBb9wmVVGRRRSpQO3E1sDtsW6D00DtiatGx3Vprq1UcrtxRsPsa8hR5Kh6w1St0BYpBvJUIO4hrCZgIO3YyuGvu4cyUkshclW2gBFrgGCiVbaBEW5ZpL5RKqXiUg/3DakQ61xW5KulqBDpYlPQwfFp4O+Baz2VNaxOlBJVSMXuURww4WzA7mDoYOs2wtDqg+F4UYyrUO0yV7VAaWFA7DGsYGVSU5Duh20YVMyqkO3Vq+BgUlMQ6VQQsOjA6QxJPeEw6cdr4OgOUDDvQlLg6ewR1kxg62Dtz2+rB15VwOthqQjscOoI7/XQFkg9aUDqZa1mhHFr0OikYEjpCla8J5VUX5UI7GalDmYXbEJmRaWLEgzGRaa0YO2s9aLgsrCtzARk5SjvA2l8sKjoGCJ9aUXBKO2o6qjpxcGo6JcW7ajdJGjvqW9dK1Bz36SQYy+iIHSvoRUD6O2vpJ+lTwQHYm+ifSVvoqB2P6e8qHbSDZYfoukgH6K0BCnBH6BehKOFcTOvpkvFX6Ody7EgGOzKq1+macHo6Zjv2OqPBuVglGazBxnAUcQ46BPil6o/oFjsUVGqgMWKvneplbPEQLWGp2dxq81464HnnZJ9gisGsKctdbPHKbADBqiKq7H46vMGBOqmMdXkj+DFpVoy6cDR1b2UuqCnBdHDhOy9Bo82N7U9g+ozqwKnQ32XROwvAHhsGjUE7S4B6zFVbayz8wepZQOQJOhuAqc3PjCk6YsDy0F47ygVpOvYtl9COrRk6EOT+oCHhlFMu9DfpXi05O9IdgtK8wW5RPk1UwfHlSWhV9Bbw21gywChx1eRpOwTI7ORlOzuzyTpNravpGPRwofhc28CG2cTlroA8oDUpkYzDOD24VRhYY9TkE2gNsA06WVoRLHeAdTpk5ctA70o1Oilb3RmVO0zl+TtIquhBQOSdOvZK0tij8C0igKrF4HVbjF1FOtYFGvNeO6foPPKDO1zEsW2X0VfNqaoFTN06ozoi5GM6HAV9O0M6/Mn1idk7NCBFKU4djToiIMoF52S6QeNNT+gJqwFaZp1lMOzR0vEzOj74uFQOO/pdf3idQS47rNwLy/WNJMBa5X945NNhOg9dqzsscCU6gPgrO1s7IzqwPeWN5TtdIbzlOztIq5M7WfGFOiih0zuN7eM7uBHicac7LmkVOyM6AUv9jac7p82McGM6T/GacXM7CHj0oCvhCzqCXVFKFGRR5Ms7x8phLJE6qzuAWPNM9TpUIerNWzs2nM2gtplvO4uNDaBEMXfolTrSIP3saTqIEmTlPzuVrYWNhzucod7N1HHHOxbBXg2lHGk7kMoHjdc70pXUcKC69litO+07qOhxWv06+iUdO8/NEaByMTc6C22PQVbTazofzY9AMPlfOlk7ELql8VshyKV3tXU7Zy0JIbSV/83pOw94JCEejcC6S1Lm5XQlXSW9aehQjTp5O3qxozpJOi9KOtyo8wyiCvAraEChoNrZ6QXMBt2SqQS6s2gDs53o2ekCYcS6MEymUGsZhLvHGGppRPPku1DNFLqku1OSZLs4mOlghIoBOpS6yjvQCVS6xLuk8+Dag6oe24N5GJEVFa7b/5wlWr94msidiTOg+xVOBKF0PtC1FFbbmHjy8LsU7Q2BdD7QOFS0a+G8PtF4ZaoEd32yMf5hSgWBbEWpshgPFFPLN7lyAmIEsnFTeL09WAQjq77tW8AOBW99IHhBWg4EOitWuHK6HLuuvZdoAflP+IhcZlqpqK94YFH2KjIEXSiqu5y7S9sMoAl1S8jxjYT5qbzgcWXVrmApdMg4sW3/6AErwrpLFSVpw7zgcHMUIMXv2ZbtY9oX6ZO9/ipiBBtpoe0lQZ35wXAxeBFaAGvaIeK66DSR+Pq7luwjFY4NH7mXoocVaWLIeYq6GARQYKx5lrsm+cT9lu1FvCr4Lrumu2b4TrpO7ARgaroJYw66UImAhHa6Ku3JWzAF2VO0eGK7p/kGuze5bHE8BUa7orvpW5xrZrriMG48iAXBu7Ix5VoYBC1wQbpRQhOq36CGu7y7UZVpKfO93Lpcu3/jNrnqu11rMCBeu+y6KvldvGG6QDWuu9jUPtEbFbFjKrkhu8Or7rohu0G7JvmU/WfI+4veu9K5PrqyzMZK3YqNW++QWUgi/SmIwpQj4gzUSypTa0OBL+BLKxpq7oSs1cW7VmtrhZR1hboAanJACGorKhNq/yDEEVOlL5TCqtW6OuXjVVf4lboY5BJqC1lj1Kq5HWrUoLW7a1v9dG2SjbphTFW72ulPieMqRbvnOwx5V1qua3UqxrjBNd5qr73lun5qfSv5um26cYPVunFr/bu1u8T4esTlu/W7emom5NrVjbvsay8g9bvNuwVqdFoKudVV7fituzrUs0Ngal6jKYg1al344aMNK+VU1OKH1PO7c2vYofRrDSs6a5oxG3XDuh753izIXHvBuWqdQyvg72x8W69ZK7tUIH+qrvzaMd40j6t1YQu72QNWa4P5CbnNuxT5E7uxiI4Ucjt1GeBlgjCNCQ0wgTBkmCpbG3kiuXDou3inu4o7J7rnupXoF7oaMDtrN7ohMjEEs7B8MK8rk5vtZMz5aLMp8K3w61EYsiqSJnGWoViyFkC3ZG+65TIkk0jkL7pfMjixFOW5EASyzmss8pSgfGQMiNOZQfGIQTkyJcm85fflDrNp3KnxE6Tcs+LkPvBeFUUzN/XUm0Hxlkl4a391EHoVsqA7n7q9IfSy77vb6NpUpTKvu2fpmkHq5bIJrQXmO2uA5TLitWfoyHu0s0eLmBwfu7SyvhpR5EDh9LIYe9TlYHqMZI/AoY0gejKy5RIC8ng7uq2RtWh6vlTFZFas7OToe4R6PWFR8l+6iOVrzR6MT7v2rOBFDOR/umjlQ2AABAB7twTDCWVD4nGWFZAjL2S0e8GxwazJWcY7lknykM7smHoV5GR71eTMemJxS5h58xgZCUhEemB79HqJFdJBzPUQe5mUwwnqWbzxQHrhrW5KvHpA/V/kXHpAe3xUpZQceifpYVSoZGx7MvIFkssyLHowewB6QeRMe++7/HthSFR7xjtyVOD1dHs2g4raCXP+8t+a8HssfeY6eqDlMzlBIfLye5Jp0gNVO3oCOzKfujs7mKOmsiblUfO7m7h7Lmky8t4Yrfz/uyHzb5o7M9G1GnsB+OUz6bVI5YeapTPJtYxwSFkzMw9ASLvcbLyzhsnicIZ0CrIoe1U63/XqrWctCnANygmyZnqAup7gerIme3Rxy5ozYkZ6K+mwoViyBnsscMp6MQlCFH+YeLIsW1p6tnvZsqIkAvLWe5azgrSj8EKkWrIEeuxI5nqLMmh6PnqmelKznntfO+WjEbJ4en56gImGe1DUKFgisjqUmIVVO1XBp+USenB6inusenjgqY3Xmm2VAnqp8aubvqz92iB7GNGke/kbHHsRe8R6BCCieo57zHoDoXAFCnp4s4EZ+u3Tm+R69CFAjeRKC/NVCaJpB2tbaPC40LNUE12Kz+3Zell6R2h5e6YpOXsIspl65BMDlOuxmXqfrQV747Nt5fl7RXrfscV7ZXsos0fycmxCpdRYOtpOi2wZvMstBXLafzRMWbOFsNvVe39KPVDE2uD5WMn+khSU3NoOCfNAdFkM2i9BbBmBgD3gIQqyDOjKzvhClQLbnXp1UMmw2NpRCYtA+KNi24U5vXtgwbwF+NrAFM17+gW1e9DKrbW8lcN6Q8r93IN6TXoOCNIgpSqc21jIogPQlYN6shUTeqN64iUAFf9QTKFi2smESAiYegzY0NoLekfLTLz9e7jay3vcWoGx03rLetw5ONqM2hvLz2gdeq7peNReFbpYVNr+WPwIPDrq8izo0BSLe3CKcNqnyz5g83rVexTbM3um21TbQQlTewnaQhidwDBq81xCJBPzPto1egmB5Nt+2nV69FkFild7whgOwaTaGdo1eln5ptpo6Geq9/F6WcLIhtr7Gs9613rG21yoiHST2uIKZtvQtD2QhIQW2597iFxF8+7h3Xr2eDbaxWrte8c8Otr225C1T5j9FI7bwMpA+gML4dsSCYBZAISh226VgFjvISrawdqyFMPaygo9QArUX3u3emna7XoKK6nbhSDtelc9qdte27XL/plB2x7a09vXe3Fh4Ps0RdoLPUAR2zUQ1/jA+1YZSij3FUpVdHWT0oQkdmD/e7XLCPqJ2nD6Wirfe1YV/1DhAvD7ShWE+9oKGdpjeuK06tvO2lEJtwy/OUT6fzXk+tnywSCmy8T64dpcQvPzKPL4fLrcgGl5aVHQI+hhofT7ldoGGqoI9PqqW5oxeBjwkKXbtdrWGrrcjPqZaEz7fWgc+43bxCpc+9ewDdqMK6z6PPts+/QTfNNc6nPk6hlMGL6gZBizueQYQvu4CJQZU8FUGWAJLBi8GXpYikjWGIXAMukteiIYT+jMGH9I4voDwdeB9crsGaL6fEicGML6RUDcGAwsgvq8Ge0xHUiS+gIZekiS+7SbEMiq+u6AYhmaGOIZGvoSGH4Twcr3LfgcDykm0LIZmWJMSbr78hkIQOr7XSx6GDwR1psSYSoZ/wGqGM5xx0jK+1SYnxzm+gcJyog6GPNKdcvPS+qoyhnmGBQJKZk0IDYYxhkAalIJfUtGGFEIZhmrBX1LF5pxytL7gpvXCynKrvqPQPb6ObrgO6pNMWOVe/F7FsHX8SgJMPvrFM4QZiH/ewCFlhEdmbXKAPtbcCKZtcqD28VRM5L38Yl6LAUSgdEQRMyHAv0Uc6CZ0WDLAhE/+TMUu7Ngy4qFVrHR+twV/qiEckvAzvBDewRC6kpCOn/lELsqSzrRIfr6JS4NM8HQQPwJqfpD+AH6NZj38cdgKfoTYQAVOiQn9KQZSgrZCGD6isBeOR7MGfq8wAX7Xs37azP1kvrkGIn62Ak0IHlQWCKB+ikEHBkFZaD7ROH5+gr6YuD38HThVfu0YXH6VfuWmxdRPvqXWHjBH/1New37vEE4JQMdMfqEDW7TGpAje6X7jpq4VDn7UNH8m/X7lfuB4E3AQqwN+yQhFsCkmx37PHt6+ljEnBT5+4X7yCWZ+oP6rBk60CaavvvD+h2aUPre+rSaSnjR+CDLlSpYIJLJHJrD+4NLZdJ0UDX6X0FswVIxhpy7AlcEkVPp62P7NHpFQcabrGI1+i2E9frHuCwUhftEmx9YTftZ+2Go6WEi+86Bc/sxqUP7jkF+IDT0ls2cknjAGQCk1CN7h0WzwAf6KXqh+158T4B7+y7M28IooZGpO/r9+0Sbmatb+o1oisEgsO/l0/s8U0T8ofsPPFxT0Anh+uP7g0svmVjUbdvd+yBgdfuH+tWb5RmawCDL+iG8QJLjr/vlObv6z/uItTn72/qP+on6m/q+9cjU6/uDSmv6+GBZ+huxLqg/QbwUf/suqZhrmPs1+sE7wXDkFcn7zsHIEff6eEPjgDZIMfvCGDlhNSC9Sd0kOBix+5dLeXJR+u0FfUtwB3d6+QLzS9kQH/q0QuYY/6B1+hf6SAfgBy76V/qgBvWJYcpjA347g+CQFKP680ocIkAGD/orS61sSFnwBm4hkpnfexRYMcApYT+Rx7qVCQ4YK2jYoH4YSxKkB+EyddrO1SQGyltVwZ4ZxYX+GaQHvZrsk41oEMFUBv4ZwkBUB72bfhi+GDQGvPtz0LEElYFom8e0jAfMBltqOBi+BHQG4Ns1DcKiGUx2KMoLjeCQFVtb5tr7e0EJV7HR2/V7FNsN2YDD/AdYyehhEUJU2oe5dMpsQEKUW0CtwgEJAohbe5gicIiO0uN64tuItZIHqbEK2lEJ4gYK2xAxr/qdW116sRMECUIHeJS82jXxESiLm+N6Qwl8BoBaLXqqBuD5bFtKB2EZzJV82mB0Flrje5jqoQhUOCiiIQstYGlNkrClsWoGd+X+YWUFBgYdcVSkt5pVvIYH45GNejoGd+X8ABoG9YD4aCXwOFrjvQXzZfGmB1axMgd0yzcxmdpk299V5gf3ek6L3hVL8H7ah3uiy8Zxe3qHe94U9YKCxBTb31RuBynJRgf4TYEIBgcKBja1e4Qde4D5ehR36OzagIHZeBd7NNVrzRj7a7j01WvMcir4+ozKdOlneg96jMovaJDbydqcyzREM/ghBmlNdZEHevHbtgfWeAbyllV0dBw4kmEq2u96NMtKKCXyQKFMdYEZqwUU+xEHfG1A+jd7VhS+sB35TgWnQsYGVPjQ+mnbbMsptWj76QB3Ca1oRPrggVQQhgdDxMba/3jdNAIwL3tpBoYGWfh+sU0BsPrGB1VAOduFBiM0mCBF80/58LQciF3Rcdu4+4Xw7/kHez5A5ga3xMnb7WrmB+oQMdoRBuYGcvH3e3UGHXGH6JDaMQatBkPhCvMx2joV3SmVBwkG5gcwIDna2qECykXiZwp3e4Xx7Qea24UhxAd1CVWAP7HF2pwqzkVc+72aQwYs+zz7jLVHIGMHfPteG02CkEnjySz77/FDBgz7xCqEEDMGnPtzaaMGbPpN2q9sYhJxGLNh4crJGbOiORn76csH5gUaeXo6lCO54ukYywadodr5awdJGVkZyKEFGGcST+i5GX5hKwZP6fkZ5CE7BkkYoasKoKUY6FqvEmY7Rwf3eGUZwcvdWHipn5qVGWzBt0TVGUeg2nE1GDDRHjp9lChAisE2ICsHQUJ3BokSLLOilMVjcQvH3DAxKWNPBwQIgeB/ecrbBdUJQTUgicyRVWMxzMBxYPFi2QjxxEr4e+C0YjAwqathYZn7szgPB41z0LQAhgU6GqHNFTNjKTsp+2OLRuiXBreq73lvOX4hHKLJdZ8GIsCQh+ZU980IQR65DkFxcE8G8LDHWHCGy6LPk3pxqXRPBtVjrmM4VKvAisDIhh5U3kMLwHVxoIYvB69Z38AIhqiGqokDApJbkwYd2LEEu2PqOgkBuIdXu39aTyAGlEn8/GHEKriGgNuEhm0ZR2NM+ie79cniYjEFBIdEQPtqHBKEu1wSUXBCpL1ojBCaOgFxyyBLaKFABpU1UwObO0yFFSiB/3AQTCXANHxGwtkALqEwgQUBkDm4gOyGQQDHOO/VTIeTccyH3jmvwszD0IBshhqAOICOAIzKRQENAHiAxsKTB2NCH/DtJFqSnmP6wLvBlmTqqe7g9qHlGWWxtLF8YKbUsYMDhMm808BdfUoTodD2oHYEl8XHfe2hdSDbAq9h2QFTwPYISpD9IAf7xyDtUtKHSuGLIZZjq6u9IWuqmqB6bNuC0fFZA/bhVmUqh1MRiyFC895k0fDaq6QkkodKhr0lpQzjsc5JiWAMUCeqSobv+MhhhlhmhueqwKQscbKGllV+IXRBW6rihrs9MoaTKuKHFof6wRQEpcWShwqGIjjShiaGuqURZNqHRSHO4cqHZ5QZhYm608AuhoOwE+nQ1B6GY0CGbOqpmJDWhqSVLoZrC9ZbhxJ+hqcEp6GWh4aG8YJHgZVgkwMGqaC8H+k2EPSizpvgOi6bwqJbMRRYC1sx1Y5kkYYrIDskcHSSOKKxUUBYIPWZQ5m6hi3hhFgTgzF9CYdBQEVBUYYrlNHxnCAiwSmG1sQHAVGbHEBoONHw/s2jglmYmKiZYURqSYeZhzmHwVrph3sQ4oZIOYBDAGt3quKHjGrvJJZkTyLFh21bzAkpauKG0vwDaV26/SHuSC9aUNT9a6WG+Yb2RJ6HBZAoolBlCYOVh4TJiYf5hg2H4KFQEPWG0YdjhM2GmYexh671OeG5hm2HOOhDWxxBGDjFh3WGSYAZZDWGQyXnRWKHEtBlhynggUldhj3gA2hTKg2GM4CdhwaBBhUFhr1bxhlFhy2HfKRFh+xg4ofjA+2G1sX9hcOGysoblSKGQ33Nhh2GgMCDWFOGBYbvEBNbrYdThx0NRUpLhiOw7glBo4OHNwMGqTcF+sCtUKN9IYY3WtGRI4eWGMNYA2k1fEqG6YWFh7LRy4sGqTsqA2mqag2GWfn9W7VQG6ubh1ODGUHUlOuHojhzh0uGn4wPJNVBc4dHAvWGZ4aLhktbx4duh9YIbpHnhyuGzmpum42GSoeuavGHp4fhZD6Hn0FLgLeHtYdVQKeG5GFOhhHgzQG7IArR+4aW5J+GG4bEW4+GVkOjg6GR7JQ+hk5AoyUDUg2GT4cfgjOH94dha2mGsYdLhgPhl4KAR4+HUWqvhhGQ/4cycdGiA2k/hj6GIYIlhxo5gEYQRhuHq3uARslqG4Y8EBCphrD2ogNp63uARhlryEddK/+GWWqIRuWGzSC2QzuGSWo+h3lqG4caOFcgp0zTaguGDYdaJKQgoEf3hkwg7+BJhl2G/uzHuaeDaFoZhZbooyXiQH2HGUFl4GuGm4e5KhRHzAhoRv7t9WqHh9WGxEYM2ANpUr14R81r+sGT+orFrwjFawxGlFpKhoVrIEeXh0uHIcBvgzHV14bdalGGtYfGhwT5N4enoaHaGYQDaohG1EZXqdPhFEaSJJLJI2o/hqKUGYQIQTGHf4a2xOAZ49JER4aHLEdARzF9OEbza0+GzSJWhrNrT4esRwuHQcGLa6eCnAmMR63TVYcfkCrk6qhsQO+HXbqDB9aTd5CUu5qTKkcbGMulNenaNR9baqmh4RpH5CpbMFBDQ7MLyBpGDCtcK9wbTYLaRzgqmkdUK02qzhpQjZpGDCvo8zUkxke+QTo6cnrtJKPaKivhlWkYT/uHgBcrSCIpGLPbSsWWlV3bDHs2R6kBfdqNoHEq3ZSWR7F7FMSdldgGHiDplHsFUPrElbOCUvmuRw2xwoOCBc5H3Oun+B96fMn/8VPaWPs6KzqLn/g2R04qfkeCO76E9SsWR3QENnr53eGVkjsHilZGRjKHFKvaZir2RyvaCCLXFNdpG9uU+4yUvIOmBdXMaSpig//N6+XE/VUrC9tKQzzEIUd0BYYU2MAJR2FHUdHoFC5He9qlzDP4UUe0+IA7dkdb2olGHkZ4dbJ7z/1K2i90kDv9+A+pwjvQOzoqP5WiO6YTbFr5RtA6BSoClSoVmDrNaWsqNgVAOmLd5SsiBOsFaUBVKpDwJtsOFCMqHiClR/Q6WDr1K7VGa6o4OigFD5G4O2u54FuOLfg7zHBYlJ4phDqWVXiUn/FaaiQ6RQT1NaQ7LUbIle1jrDoUO80raJCLqlQ6spQnlRFGAyD1KoVGDUeIRxTFg0foOysqsSCCdHYVTDrsNZQ6hxKAW+Qj5DuMOVsr9IBdR4mBGyuXMcQ6E0c6K9OV3DsFkWNH/ZXK+Hw7FUeIlAI73ke1RyFGzMEzR8NGZ+THKrVGimt0BInFPMWpOYIEUjvRRoVGq0b8WrVH1VQyOmtGJypwmitjy6tb8y7VeIeRaDZJV7vHRgEyGghaOidGKltnR6dH1IfaOuYhAFQUBp3IhXHtGFdHp7v0fd4LV0Y9wpV68szgGF6HPrKEm5Zpzlq34Xyap00FOTKHq5lyCbszMoZdlO9HmzMyh3wU70euWuFR1JvMrZ5aHofvFU4J1Hoeh0QVTgl9BfaHAMcdCX98f0Z0mhPpWgMyhhQVFgkXIFZxHJruCRkEH0cezJDG98HN6aSaMP2fhuaBoJxqIh/pLrLfSxrgldjLgGCk70ZfwkjG5fpIMDB0yVsRKNwUoesppW0CU0kIdMCkt0ECmtDHNkC/YH/l2Mb2YBXg6MYqIm5B5QogCPDHJgU6giAJwMac1XjVMnGZvCck4rKACKszMyWKDR9J+/xvgBayn0fOW9wJgcyvRvfBb6oU9cytyMZ8CYAsz0aKwNhAvsyPR+jguGTvRzlbHwiTza7dIaSs4GzH5lEYYKXQQMm3/RZBOMYkrQsy8MossQzGNLFmpC8lr/qkxzUgNMYzSff9UqWUYKicTrEhpEIMtHLhhmplubptCM9liXwf6UVlcgmpZfbgERVSxswiH+iRopyI8JUfgmPB+Zr0MY+CshBnnLSgbprsFK97FAOERogkoZpLMfOGasd0dIbhRUoqx66IzqPyxjminIjaxsGGbJU6SMrHwUCW226UisZ4pXmwsYJPCLLGFBKlrfS57Ju2pUx0hsZfgeLVEsfKxwu0Emy4oarHKzkqxnDx6sfWx66I+WRYxtW0NUiFfBOBu+j8dA7Hpse2x3rH1hTLgOzVcgjKCL0k7NQuxidb4zOh2k8JLsYlsGfFUsdexllYTyJexx7GHxuUyXbGb4CQlVLHUYXi4f65yG3EJEtaGzKmymFMc1omOD8DPKyOFQHHcxoRxw7GeTO+x07HnyTa256aNUm1fK7HRmXKR+dxWDBrGWwH7tGJx8QrScYMKknGcf0YQcnH2SJpx+twiccpx2nH4HHpxiNpGcdZxyZCuSPCo1ZpQZUYQEA1VmmVFYjL9YzMcnjAj8F6WytyyGBRmObl3VmUZIXHQOQbkPCFTKTqjEuz1luPMD7wWlkL+r6wLno1x7Zb2boUcFXHvmBgQQpwFcfmWtmxmnBlx99gMruMuguKIVulxyhUeMAGW/WI5si5BGFbjLuRdXFAjFTd495aVlql8N5E2VoT/EkosxVPgKlMJKPi4FJBMvNRKF6HfHiw1YcYWlR6Wu3HOd0xxqXGncZCNSXGiGVbtdgUwKURu1nx9MCY1RhBeGSncGIUDUCgFQvHBBRRWkHzc8ekFH5bmzlbtF8VXcdbtHpVbcZTxw+LxGAKu2PHkVtLmOxJ7hzVW2uga8cNnNvAFlorx25UwKT8NdLxu8d1xpwoZOTfk9ZaIrvPwVu0PBQNQQu9jLryNQjhlVsU5Szg68a1x1HzK8YuYSfGUeX/RMvHiVubvTm63hut+eLHkdFWaJo1Z1rnxueT/VtjWgXx2si9W3db98dGbB/Bn8fU5HvQahUXWh/HXXVsYCuA51uuKXhDIsuWZEkpWhQDWqJM4NgLWh+hBhR5xouVN1oUcQAn2mBEtYrwRlxjWrx0rfFQJvxHG1utWxzAB1oY8K9bcCZvW7LUSSly1Stb4WUDxltah7uMux40XGCSOO/p69TIJlPGkEs7W2eVj1nnla/HLHCkHOeH78YQJ3vVyuHdu4y7B9RXWgQn51kpZb/HeCbESjgmJCZRFSdaQCe4Gqo5wCeNxrt0L1ugJ5bUqSmxNeAnBCZkJ7AnQf2RXMBMOij/Wuuwe2MMJ+Qq/SkfWkdpjCfshGSHt/AMJqwmk2jcaWpHtIYWcSwmkIOfWhwm/GEPu8y6PiObW8Pbgin4eG3hlnxQO+ICadEFOFA7kgJCJo3F1blwYAImQ/mtROuzy/nz2567fnkpsIsUNUmaA0GBq9oXgoi95c2ZvFva6gOEmCcU0iZEYN0d6xRhTdSbboFO3bG6Gnhr2yImSEGiJmomX9xXZRC9NdHu3cG6nHhAOuk9XCn3siImX92kZcJ4L9rRsDvYIGDBQSImCjHrvD6Q+wRNSTO85yVaA46wl8YqJ399frCwI1LN/9vkx4KIdeBfwu2xGQKkYTYnaohD2YYndibeuIl4JiciJ5XRjiZKJ4M9b0y2Agonv9pmmYomQun/2yFgfvJPx5SLQX0um6VQKkGJfOI67prD4S3IHrF7Kpx4xvqCxaorFwNpgW18HrDugwEm/ibgGQGaXBEyFbGw6wPF0O/gqclLAqcZqFszZah9R6FMOwJG+xqPaoV8UDswRpx5UDuBJlepioZcEdYVjrG7AvEmvlkpJ1GDySeklZ2isYLSUQQ6JuKYoFoRtX2Osbw4YnjJCGknxptBJ7LJeSc4FXeqj2o5J70Io3zWeKpDaSazQuEmvibFiVuqXBGhJ3/4fmQVJ8EnlhkFg34nVSb5+E8iFSYeMQ0gPX0BJ+Em9SY/ApEmIcnJod5k7hHRJs0n/CfJlTw6IGPFJnkmSSaTgRK8HSamxJqNtRkHRgtj+3iILBqhkYAMiSo6EmL9J70mjLtugEn9qJQSYr0mwybuMCMmijvkKkMnVytcJv4KIybNYGZH3ho5ww1VmuAIxs3DkkHOWosoKPT/I69HgGFGAvXkHHz8YR9HJcM8fPxhX0alMKMQMsBPIWDHqyb/5HOBf0erJsJ9QMqz+drJpMZUedsnjggHx1PR8/jL6aDG6yfUmlEEAHErJ390UQQis0smJwRQmZDHCya3eIbZpUBnAPMmQhg+OPTgSHpRBSp8v0oFskcnFydcQEXDUSFnJ6yQqgRnJvfAP4APFBcnNEA04Pz5pkQxwJ1S7a0VMZbRgmFzETD4xlHRlRuAKzIfJ/85G4Bcs4smCyf7ObT58ydPJwPYswRPJsxA8zmCBUCmGUHBOF94w2PfYIE4AKfZYTsmxNhI+GyjllrHUS95UKdNx8IBcvg7JzUgFzji9WCn2mHAp9/5P8ZNwGexAvQ0yb5byKbVGRygXoenOHz0cND4w30B5ycSYICnsKf3eQCmzECNEDCnsyb4w6CnXvlop9Rh4KatMp76hTXPx+L4EtiSxzCsfibe+OF83eljA775k4ZXFD6bFKdtfR1h/JhVBarZX6AIUEO6lMBum82UqDuu+eWCv0pslDj585HzhzWU6XwS+GdaDKbrBBuRDseJlaw77KfsmyynioYS+Xy9G4HVVZynwuBzarv4mODwJsLB8YIS+VeGi6CCphuRccaLoAmGpTATYFymg2ogpsmcfKaeIFJrwqfpm1MVw2pa2IAmSFHTuySn9KaRhTerlElfoZwk1RR1ENSndJXVJ2SnSqc+ICxqOPgKpzRAELAe+PSmV4Fj8D8CEvi/Ap8ZYJTMpml92qYNm6ymO1uap8NrvKa24KQNTJUGpuqnYJQJx8YBaOFDGZJi3vk/Abibklqmph0Yl7qOMS0Z57o+1IhBAJk/aKhBt7o+1VamN7vWp7anHAdmRoOq0UZ52iTVEUZ+2md4HdreR98LzqeC+G6nRvIosSlGsoTh2p6mLqZGK/zqyDq7PC5pJ9qlyNnyqKFn2v6nzfK3gPz41kG+pp4wDxTb24QKWNX3edT6ZwquphSEHqYYixIr6DpKgx6naUewenna3qcv29a0nvJtOAEG5kZ5RwrywtWlRmg7IlX4lfA7pNpJpnVGxag+2410J3rG20g7QUaFhurafVrIOsmnIGHVR8tGxtvpp3VHcIoG8bQ6jSpFKE1HfBnu2+rALUYsOGPzZ9XzRoI5IPrjdZw7bUcg+x40DUfdKuFcPUdNRn0KNOB9RiOrltuG0dQ6+adG86mmQ0c1R8mn2DsjRyJV9afLeq1BzDpzR98KhUHVpjNG4duVp+g7Myvw4B1HbaZk+m1GrabOVCWnzaYgUfw7Xmx+2gWnhUerRp2m8DoiOjT7G0Zn5TsqrUHiO8KZoge21LA746Y523tGI6ZnCseUJqaT6ZdGvuiV6Fo67Q0nRplpR0enazdGc6csB+dq86aXasdGmWklejIbkQQaOjrbt0f0+vdG/PoPR/BUN3mdUhJBQUgOYDd5/gFswXzJDPLfQamKSAecm53A9Ps3wY0F8/HdyWXySAajEcWSJUAxOw+4EcD++AFgH6V+YELL4Tte6VsL16ZROwSEFNhDyQ8KOAdK029BTwo4B/5430GnpitLu0DHplghcWlk293Ih6YxaS+BT5P4UmF5L6eHQZPxdvu0/ZxSYgb1IW+nJ6cJVI1g/6efp4fwd6a6BajAAGd+IXrjz6OrOkbzLqiaQwXAscsuwVCFdXLjyiigoGb3pn+mIiAQhajAK4LwITemCcFwZjLAfghFY2UwXIprS/hzpEFlMTzCZ6YHpgTAbeyQBhzp/6axSdAHGGeAZ8fFx0qUZbHBf3iECzoZZMrpE8M8u8HBwIBnncDrgk3BhGdIwVOEKAd9mCRmMPm8QbXtZSE9k85hFsEwhcXAqPnQeOBmYor9k4YhFyHglLjhFGYXuVJSSGelBrsgSAeZoCRmw+IYZ25lxZNEZwdLWGZEZl3UTsAnp0+TaMMLwfumuGclKRphzsDMZgTA3sFAZ0mAH3OvaAnEjsAuUJRTAmYoBgigUGdtwHenuP2kwbZNIGa/po2SYmlcZjqAkMAcZoRnCjNgO2LHwivCo9umhdDeOvfCp0By8J/7WMHNWBzLQWHyZphnHkHHplURKmY1C5dK5/TfQcm0OGeFCPuTl6fiZi2F0tl/eDPDl0qcYZxn7R2qZokRJ6awPDXKjvtSZ0OE0GcrOBRnMGZ0Z0b1VGczTIhnNEUiZ/REFmZEMNlzpmYzShaCAmaGhWf6Lau+4YZmeMDfEWhnZTFCi4NKSmbYZ7pmKmbYZ9yLm/qOZz1owgthqEpgp0HYZ05n4AQfcuO9urjqwVZmlFPeZnenWtF1ciBmmqF2olGTudmSZ+VKVZMBsZpmLKq6ZrW4emZzKGDB97H7+kD1V3OMZg5mnU1KZnZhsMFW+r2J/cAxZvKbPmARwDxnimaeuCRmoaD6mtFm+masgU/6zmfsZyRnEZp6g9xmN7FRZghE9KMZesM8WtldmniGt7BOSr/ofSckiyvJnzp5Zoy6BWY5ZoSLhWc9mzlnqJnZZ8VnRWalZlxS1QjFZuVmzLqcBpZY3TFbQT+mKGcQ0xikFmasZpAgsy0RZtzp8/AVJcpmnGf9UwUkPKDcZ2/AsdAXpksSM8AzNFemEJ24QeXgN6Y8BfjBvfmdZ6OgFNkd+AuxAWb4/H/APpIfwShRx9xMBc1mUmZwIa6xqmZlKpzT9qSkpR+nZNtVZrE9CTtDZm9S2GA4BrRIGCFLeX+mMmac0zFbAGazZzVmL4RFQbBmOkBzZ+JmPWfLmN0xNlx3gZBnqyGWYtclq2aXwYejrOHQZ8tmM2awZ3jDi2c+IPBmXWdaITrKFmeCILXx9RnHYGZmNWbGQVngJmZ1Z0dmKyR+qApmK2ag5DhmDWezZmR14mYnZqxAC2d4ZjVnyCDo04dmR6bGQEciKAYXZt1gv1NtIIE67GdfU49m80sjZzVnaMBYZ3+qm8B6GTxn/0gSik5QgmenhVVAxortJVVmU2bki+wwo2fbgeJmn/j1WI1nqmYA501moy2qZ5pBDWfL+JvK6sFr9XVniEKrZiEi/WfrweJnR/X/zCtnNLBPZiDnF2dEccDnemc1Z/gZEWajgUdnrPIYZ10hZSEHZzNnwPWHwXtm+6eMTbUgaOcTZkbhKotbZmZnfvAHZxtmJmYFYENTBcxGZnfxaGf1GABYb6cPBQ1mVnBhZ79mZ2eReWBm+OezIfHR7mfTuA5gK2emMjhm2Odci83oPmbiXLjgK2aYQQtm6OZrZpdmfWao5sZB14GSZsjnLsUk5lhmiOdXZjDm80qw5w9nHEBMZptLsWdfUlGoa0pA5h9TKvh05tr5KSH48HemXgVmIe9n/2eJZqxBr2YQ5kDnX1J66E+BslxE55qEkGeTxGTmEeAc5+TnOL20+0wC9YrGxEVmAqmUJG+lpIeBchgsrNOOcTE7e7Cy5ziYekale49sTWgK5/a5HYoK5vzghIvy5wVm2JghGBrmlWeOpwdU8Ji4NeQRoVLrk3M1udi4ZqqowxRZhoFZyhgYNUytJ6Yw/ZRk0fCIZcoZNTWH8PDAA6xq0NHxeGRcUxOKorCgFZbmVwSqsVE4XFMkZJGGHrWm5m004HlkVcoYHTUIGjGpa4CVNBom4VK5qqA1QUnT2YiYuQSRhl9zvBg0CHMILGUJwP/kkYaxdd7nEzVG5vVZXlKjNH4I8Y0jSyw1suHHNKWb0NSisKl0YPKY1JGGD+SRUu61Yebu51cJ6OiisLw14efv2Tbm96c5hQI0SPBQ+fGoelTdhPHnS8g7NYuEtubdPUs0SbGowb/pBBVW50IU3+hp5y+4RXPJ59I16L0oZ4nnezV658WTE2VCNX7m4VL10Ws1eeZuUhHnSuABOIv6Uec655LmsmY3a92KkRHa5sU07giG5+bnSDQV50pmxYhjOQaptzimwc7muzCTsJHnJCQfjV7QjuZ5hAIg4oYrM7bmFuYhqzpm/uyjNXXmxuapLfI1beZmUmZk5TTfEHVTFAJiNNBRmzkJwbQ1zklE/QnBMzXQiInnfHyENL70AhW95ws0bu0/eb7mPefTJtnnneagNIx5RedfCB3nWKad5r+CDedT5uFSonwXhRPm+ubm0xlEkuO+4XtdlecgYJnn3rFwNUPm2XIyyCvmphV1c4vnMDV95pGp8+auhFcmFGanTZm9A4Qb2f7mM+Zv2VXmqwRd52iRV3PZ5hPnM+ehwebQa+eYwIfmXehr5msmhairWBvneKa55oroTeZV5p3n5UrehVfm+eczxoWEez3xqF8UWpIYuD0mQKyVwABM4+SNyVMYyEzP53Ln5tyOwU/nIE1v59SYLuVFZi/m0rCFZsJjX+fUu/ln3+ZhnTSZ5LTXZbUJ9JkMmfQBjJncsFAAUAEsAGwALJg9AWEALAFPikAAAAGET4uQAdAA7JhsAFAAYBeEMP4YevG3mQot8gDQFmAX/IdTk1gBCBZ9aCSAAAC9DgDMAMgY4QCogvyHhQGMmN2AIABgF0AB8gFEATgAwACcAGAX7JhAAJkB8BZ5gUm5XylvaDwACAAoF3wAcfzWoJkA/IcCyLBDYADaAUQB3ICcAFAAkgAqAeSAXAAfAKyGqoA1hNgBn3DwAI0ARABQAdyx3LFdAHMBrgFKAXgXiACxVeq5WBfYFzgXzAG4F3gX0Bf4FrAXI8yZAcgXKBa+sMIAFAEkFxyGjgGkFkUBZBfkFt4BFBeUFoSAwADUFtywb8JcgLQWxPF0FskADBaMFsAATBdwgMwX9AEEgYSBiACgAGAWmQGsFjgWHAFUgR0AzpoQFygAyQGQFyQBQAD4F+fQZMFbWDylhsLAAPAXHBd+AQgWfbOOAROpXBZEFygXqBd2kbwWCIGwgUoAGBYSAZgWQAByF2wXfgHsFkQAKhaJ2Va781jHgNoXRBZ9AcQWvBZEAPyGAoY8AOQWFBaUFlQWwhfUFyIWfWHChnQW9BbYAeIXjBfMAUwWcuZsACwWvTmGFrgXVIAcFjAXzR0FxbtYaheEFuYWdIAWF1fRlhechnYA1haCFjYXQhfCF13DtoGiF/YW4hcMF44XfgFOF5Y5UhZEAISBRABEgTIXDJhEAYYW8hfR4QoX4BZEp0oXUBYaF8yAqhYF2QBBahfqFggXNdGsgEgXE2jcF8wBOhe3dRwBHIYCh/oWmBbUgIYW2BY4F64WeBfGFrEWWdimFrnY8ReeF9wW3he6FlEAWhc+F8kBvhYcAYIXNhf+FlCAvIaiFvYWE9FiF/QXQRcSFk4XkhbOFi4WrBcZFkYW1QDGFtgAJhcygMO9cRZ/0HYB2hbEFgulFhYogHwWVha+FwIWRRd+F1QXthclF3YXXJmBFuUWEhaSF3kAUhbSF2EWMhayFxEW1ReRFgoWiiwQFijyMRZwAcoW2RdeESY5V9HkgAkXzAEIFmCzjgBUeMmAyRd/AdkjYNtNFnoWnIb6F8YWBhfpFq4W7BZuF1kWMBZaKOEzZhcoF/KRWABWrPkXDgH8hwUWAhfWFkIWbRYiFu0XkKZEAR0XDhflFl0WyxeVFogBLBeJNHMXRhbzFrUXQxdaodxpV9ETFtUBSxcbAQBUPhbRAGsWfhbrFrYWGxcjQlyBeku0FmUWDhZAAI4WFRfBFpUXIRfdFuEWvRbYAJEXZQHyF5sBURcEEkAAgxb6AbUWzMm4uJCDIxe1FpoWH/BJFhMXDRd+ACkXaBcchjMWtRazFxyYGRZsF5kXbhZ5gdwjb4mLFo0WooBNFqkW0xaOAacXhRdlAUUW/hdtFxcX7RebF1cWQRedFxUXXRc7F7sXR3V7FjUX+xZAAK8X1FFBiOE4QJfmF40X3hZ8F6CXLRdgl60X5xYBFzQXpRdqgWUXWxbQlrcWMJZ3F6EX0hdEgBEWDxZ9Fo8WURf9FgABVR76LxZDFu4XrRiBMdOB8RfvFw/9iBcP/EiXH7HaOr4yyYA4gegXMxbpFn8WcJbMATUX8JdDF0C9lxe8UbExRxb+AcJzGwCkxKcWZBZgllYAaJfFFpiBGxclgFcXGJbXFjcX2xet+cwWuxcuFtUX/xfzF01lcgeASISHuRbEFmZzTJYrFngAqxcol2sWxRYQljBDMC2QlxyXUJbBFscXtxaMmZsBNJe0lq8XgKALeI5b5JbMAYlcXeVTF/kWwpYslqiWrJbnFmyWNBet+VA4WxfXFtsX0JY7FyEWUpc8l3MWWRYHFjAW9JcsyLoBspfqsayAaQBClnABCpf8FyyXmQGslqKXnNkqllCWnRYSlnKWkpcdAVKW8JfSlq4iJJaUhgKX5haClnqWlhbNF6sXBpbgl+sW6JYqlh0XxpeYlyaWIReSlvoBZpealnSXWpYWl3YxJJeWl14XVpc1AXqWBRfCl2cXIpYXF6KWhOFil5cAmJeqlliXEpbYlk6WWBcalvsXzpfml3yXZ7qWlg0WXheMl+6WzJY2l56WrRdKlkaWeQDGluKWJpc3Fv6W6pYBl38WmRaalgCXqTBXaTZwRsE6lkyW1pfylysXzRaFF4qWhpcRlt6XRpf2l1GXDpfRlqaX/pZmloGXcJZBl3SWrpZy6YmWYZcel/qXVhapl7aXaJYlFxCWPpYclr6WnJZql1iXMZdZlv8XcZe8l/GX9JediHmXToFJliCWCpYplmcWEZdel3aWYpfFll0Bvpecl2qXXJdllnGXgZbxl5XICZZrfQswjJa6ljsXYZcglzWWtpeGl2mXkZfpliWX4paZl46XTZfVFrSW5pc5lsGXdjELeW6XoZdVlh6X1pcdlzaXBZZdl3WWxZZiFyWXfpeZlmWWGpbll82WFZctl/SWMxxVl7qXw5bJl0KWnZejlmmXY5fsl+OXPZZcllIWU5bNl9mWLZbhgLmXp+2zl+2W+ZYLliKX4Jddl5A4UZY9ltGXy5amOH2WvJZalnyWrZYIjDt5IZZ5F3mWI5Y1lqOWW5Z2lkWX3pZLlqqWjZellk2XK5d9ltKWA5cHlhmSG5eCl8eXyZcnll6XW5eLljuWDZYTlo6XppeXlvuWLpYHlpWXk0E3ltWXzJYGlwuWdZZnlumXPpaPlsuXjZYrl06W2Zb9ljmXLpcDlomob5dzl9WWd5fhl6iWi5aflt2WX5dvAQ2WpZYxlpeXP5dTl6uX05drlv+WtXQAVh2WJ5ZAVkqXH5dsl0WW55YOln6WT5ZZls+X5Zf7l6aA23l+MO+dspdylq/m75YFlqeXhZZwV2eXD5agV4+WvZdPl+BWq5e/lmuXyRE2cTehn/CMl6hXn/FoVi0X6FbKlnYW45fnlmBWk5bgVwGWEFa4VpBWXVF4VnLsqFexXPKWgFfzl3eXtZf3l8BX25fdl1+Wu5fflnuXiFbTl0hW5YBNgPYxKFZDlwRXlJbhloqXRFaRl3RXIFZ2AaBXE5e9l4xXEFdMV5BX15ZKAtBWm5c0V0BXsFfKlvWXS5YMVxeWP5dkVzhXV5dalyMA7YMsVkeXFRZQcNRXhFcpl+xW25b2lpxXyQBcVwhXk5Y4VleX/Zdal0DaKFdAbARXVFZoV2xX75dSVg+W9FZYVt+WwlaMV3JXz5fSlr0mYTDiV8kAXxcSlxJWylcjlzBXqZcCV8RW8FYZlghW2FaIVhpWSFYvl6aAZjiKV/hX2lamlzpWhFfKVuhW95enlxhXn5f1lmpXQldgV8JXsZbyVn+X1cioQJRXWlZKVuZWbFe6VuxWllYYVoJWJFfwVheXNlfqViJWdle4V5BgDleKVmZXrFb8VnpWhZbEVuyXmFecV1hXu5fql0ZWTFfGVo6BSlpaVl5WoZbeV7eWNFY+VmOWdFfSVtZXfldqV25WAVfuVxpXQxfDoZ5XplYhV0pX5ldOVipXzla+V3BWflcyVv5XDFZRV7ZW0VbEl5e6+FefF7FXjlfeVs5WtFeWVy5WBlc7lxmX/laxls6XuFfBvWJXwVZLFnFWTlYwVxlWAle0VlZWIFYRVklWkVekVrZWuVYUVtqX/EghltpWoZbtlreW85b6l5uWCVYcV+FWQlfZVslXOVa/lqJX/bOpV5RWrFYFVhlX8VaZVi5X+leJV2AAsleGVnJXUVbGVgiWNkl5VrFX+VfpVqFX1Vf8VrBXRVZZVm1W7VY5V3uWnVfRVlARXVdpV91XPBa6VoVWLVZFV5lXrVeqVxFWNlelVu5WKVeDVu4WbzTDVlRWPVbVVp6XhVZ9VuNXvlYTVyVWk1bcVwFWPFeBVlnZK3hpVrNXI1dxV6NXFlctVwlWmFaLV21XSVbqV8lXZVc8VklFM1dNV7NX1Fa9VmFWwFbFVxxWJVdbVqVXS1cdVoFWCJfIVsFW3VYSV2tXBVeAVvNXeld9V+NWMlbHVktX2FcnV8tWCJf0K2dXw1fnVzBCo1aXVmNX81atVwtX11YDVvVWg1anV9FWoOB7V+JWtxb7V5JWtZdjV89WiVZbVq9X21f1VuRXDVebmcxXq1d7VhdXzVYbVt9Wm1dWVnVWhlcDV9xX5Fa7V+VXvEkMlmZWVVdvlhZWRFc1VtJXglckV1xWt1dTV29W7hZiVqZWD1afV4DXPVdzV09WV1YLVj9XL1bbV5FWf1ciV/JWfIFXBzZwioF8V0jX+ZbQ1xtWtVcw165WpFYnV3DWd1fRVpjWt3RtlpDWSZcAVl9XnZaHVv1XP1Zo15NWO1YNVhjX59CE1pTxh5aVV0eWw5fQVk9XQNbPV8DXxVcg1m5W5Nbo1h5WFFfMaOwSN5ZDl5DXxNdQ1lJX0NaqV6jXx1Zw1ztWK1crMszXPhtY1nNX2NZs1zjWMNauVwZWDNb41pzWCJeU1unoRNeVVsTXNNehV5dXPla413zW2Vag169WYNb/V8yBgtfH7dzX+1bI17TWKNffV5tX7Nc3VkZXt1dg15zXTNfMV/TA0tYk1h+XV1YvV0dWv1do1m9WBNbuFlLWesDK16zXX1Z01mLXWVf0V3VXv1bq1wrXQZe8VjxBmtbxVzLXotZ81jrX1la612rXEtcU15LWu/p3yRVXbZfC1kDWONbA19rX/Vdk1gLWFNd2VpTXZtdbfRDWwtbHljzWNVe81uzXqtfW1xzXNte5VlLXo4EG1+tXltba10bW1tYc1/LX+Nd61wTWdtdsMPbX1NZzliLWB1ai12FXh1e1VrDXslZkVl7WktcygFLWXRgs1xbW2NaO1lbWHtZk1p7WHVdB16bXwdfe1rfIbta01u7Wstd01kdX9Nd4187Xf1ZR1lzWTYE9QjHXItfI1kbWTtbx17DXntcC1t7WBYHASVTWFtYO19LXPNda17HXVtYR1vLWkdbp1hrW0dagQMnXftYp1/7XpNdy1ibXDNZ61sHXide/1T7XApY01pbWvNbh1qnWgdftVkHXedcvlyzIR3ih1lnXytcqVuFXuNb81/HXadYu1kzXgtZcKQXWMtax1ynX9ddi1zrX4te61qbWttZm1hnWENYt1tnXJNb6VqrXqdeB1mVWTda7V4rWFVdC1r7XG5Zh171WOdfh1sXX7dcm1stXXtb51l3XFtyZ10TWddZa1j3XKtao107XEdbV1v3WitbN1kFA3ddh1+7XldZ41mnWedez1oLW0dfkofPWw9et1gHWDdbi1/zWCdfo1p3XCoC7eYtYG2hrVo9W61cx1xXXC9Zt1sbXE1fF1jbXCdeb1y8D23n8RIjWOlZI1w7Xq9ZF1tdWM9e51rPXh9e5V+9XMTCyloDXO9cXV8nXhtdn1r3WVdeg1mPWpdbqMsfX29fX1rqWFdfZ1mvXRdfn1wfXG9eM1uDWuZafQqvXB1c919PXvddV133Wl9ZM1mdW29dJF15WzVdD15/W09Zy16/Wo9Yl1x3XuVZlKY/Xf9bpVqfXWdYL18PWi9cN1kvXF9ab17lWF7p/1ifXZldgN3XXbNb71x7WF9Y/11A2TNYzV1fXx9Y71s/WADb+1qTW59bf1/fWCtcP10NXSDZP1x9XJ9Y318/XU9co14A3aDYS1g/WideO0TKWyDdP1pJWU9Yq1zg2INb31ng36Db4N/a4oDcwNyFXp9cANsQ29NYkNh3XeDZH1nlWmDegNiNW2DcoN4XXqDd314vWfdZTV9XX59HElzQ25Df/1hQ2qDZf1rg2VDej1qQ31DbuOWQ3yDeENobWrdZ311/W7DbANtQ3HlYf1/JAn9esNoA3xDcMN9/XjDbL13SXQVYwNlw3j1a319w39Dc8NkI26DeR1kfWnlecNoQ2YjaF17fX4jdsNxI3JDeSNx5X9lbSNlg2sDZ0Nqw29DZsN4I2kDaMN+TXP9bg1yZWVDOYNtTXD1YoNso2sjYqN5Q3cjdUNhw3HleaVqI30ja712I2e9YQNvA2udZv143Xajec19qASdcZ5LQ3mjdcN27Whjcv1mg2vDaH1og24NYI1ho3ZjeI10o24DZn17I3Kjfr1o3XS9YmN9KWe2vMN6I2BjcyNuI32jdx1lY3b9cpVxppW9ZmNiw3n1ZENvXXa9dt18bXQDdWNu/XJjb3Vvo3ijfkN3Y3FDey1g427dYb1lmXdxc9F7iXtld9Fk8X/RfgFwcAShdQAMoXnNfpamUwTiULMO8W2RYfF4kXWhZDlt8XN9dRAHQBaRcGFkw2EBn4Go2qRMGJlsiW+Za4ga42gjcBFhiXDjeQNswXxhZVFnsXwjYwF9E2K2hl2Gk2wJfIlyCX6TcWNjw33paCYUY3vjemlqE2uJd+AbIXeJbYAY8W+gFRFs1BkTZQF4MW0TcOM/0xbxbqF+8WiReIF/E3ijcJNuk3Pxfwl78W1QG6NhRWeTZhBDpGFtdpNtjW/BbaNxk36JYlNiE3MZfZN9yXVRZON0MWrTb7sfk3I1b5lh02GTaUN503I9ddNk2XpTfhF2U3vRZsFuE2lTYRNjmBVTdRNq8WUPHzMFoQpJZxNvU2WhdLaIyWjTbY11SWvxfUl8038jctN3WI4zC9s4o2PBaPVgM2a40dN4M2pRZdNo43XJfdNrCXJdaJ1lM3SzEwNys2JBftNms2gzdBNpk2GzdZNnuWIzf3F2E2+Jb9FrRoQAAElwMWUTcxFu4Xo4GgxZ/xsTYIF5vpiRfZe7KXGcZQEJuWvZFJN7MWuTZ8gNER8LEisMxTrcmKN9IBPBaJN44BZTFrN/s37QFioO43/pebNjyWvTfTVmsNl4AATaRHQXBDl883MEMvNo4Brzb7NnHXTJdDNxs3CDd+N9KXBEDO8eS08CuXgbKWfzZWgPmWALZFN/Y2YqBAtoc2ajbWNorWB/rowJfQ7xRo9OC3cICMgRC2pimQtm43gLZANsM23RY4lj0WZTbVAOU2YzfHN+E3JzYEl9EXZzfVNq8X4gmBAO2wGMVwF+8WFNuIFuWDOpbolMIBxTkYgOgWTTcYFsk39zYojQagLPoGybKW/qG+gfyWPNcDN0i2nTaKsNC3qjbclls3wDYUVu2x9cnwPWXXXxcxqDsXCzCkF3s21LbrNiZLuDa6N4s2u1YUiuS31dpzNky3GwDMtnwXVLYv10U2Uo0HNrS3WzZH19bzToDQ2py2ZlcUt0y3qzZBNoC3rLYfN443MLavFhaTz7Hktgk2XLeUt1nWPLY4N282NLYot0C2wjZfN0+wH6Mctoy21QFCt1y3wrcCNqy2+Iayt9C2jNYeN+Ul8rZLPX7wFLeStxVXzLYitmLXbSWitlA3wLdDF+K2pSQatpK2VGjCtns3WrZ819q3OjfsNuy3nNYCtwux//katga2SraGtsq2Mraitsa3vDYtN+y3vjXqto3pnLbmtlK2WrcWtyK2KrZst8a3yTb+AfS3prcPgWa3wKvmtlS2LLc8tlC2MzE0t0I2MLa6tjAWNpISt4K2oZeKt3a33Ldut9K2DrdGtqo2nreqttNXT7GiZc62+rcNNpq23LcgltK3RDaWtw62OrbAtmq2cdKFmTa3CraoFqG3SrfKN9S3lrcBtpI2TreRsP9A0bcutpS3mrZ+t4a3Y5YBtlk3fLd0trtWHs2Jt/q2rre+tmG3frbht/62fLaBtvy3uFb6zLOxQgi2tkK3MbYWt7G3yrapt8E3sreet5G35PGcPBm3IbZ2tsm2WbYptm3XRba+Nyi2crdit0MX8EXBt/m3PrcFtm63FbY+N5W2B9clN8Y31bdetmoYZbaaN4y25behtgqXYbfeNy5XDbeLVsY2YrZetjTxZLYtt7a2mbflt223Wbftt8RXHbY3V523OrcltpqGY8Het9G2vre9tysW7bdwNg22Obfxt6S3NSWlt9exErdltr22bbejt323Y7Ydt+O28jYJtnm2CrZJtwa29bf2ttq3c7dst/O3dNPDtou3rrdStrO3jtaVt8u3jrcTt+Txy/kLtxm3SbYzt0KWY7YbtuO3HrYTt3K2KI1hBdu207c7trG2bzfZt/u287Zbt5HEhqhTtj62Ohd1tuu39bZztqe3utZHNmE3DxYVN/iXJzYAAKWElti3LxbZFo6lODELpdM2VzZx/I4BUjE7N96ZfCMpFjiAaRbUlqS3h9ZEAAyYa5YYpaOlr2gIt45wqRPYNqmWz8LY8PEAOJckgfIB2dYAdoSAQHaMlqkTWAF/tgg21bZ2V1+3m9Y/t+X4/6Utt58B2SNgd1o2sdYAdokwgHbYACB38gFAdwaXwHYsmQh2oHYwdmd0g7aRtpqXEHfftisBvYRwccBw0HeMl9wjvYN0Nie2YtbMwZxgJVbwdkAACHaId/+27cPgw/h3bTc8F3JjVbdyY84WPTc5Nl+22ADftpBWT7etlxiAFtdYd+2CcDdgwoR2HcNwdjoBgHbId4h3NHbJAER3RNe+1HLmJHeBt4GXaHYUd+h3T7f9DEcXRNdUdtqV1Hb0wgx2Mld4dkR39Hb6Qwx3SHdAd4x2xHaZAMx2/LcsdzxXFHd+MIPWxBYcdv834DZwdlKA3He8dsB2XHfwduJ3fHcwQ8R3xbfMd9mWgnYrVkJ3XOWJliJ2/7Z6QhJ3AHZ0dxJ3IHY8d+3CvHcgd5J3q2Kod+B3mRcyd7UXsncs4cqAVHbAlxx23jf9Qwp3tHYqdvR3BHc8d3R2fHbC1kx3UnaqtwJ25HaQd6x36ii9mis21H1/NyJ2w9eid9yBYndKd3p3ynf6d0R2Unf8dtJ3RnZAAeR3gnYmdyepCXGmdvJ32Hewdzp2YneKdvh24nbKd4R2kncGdvx24HYltmh2xnbodmVYqDF+0XJ3WnbmdnpWFnbeAJZ2enYKdvp2SnbIdqp3THa2dx3X6nePt/Z2QGzCd+YXjnawdoY2fnYcAP52BHYBd1Z2gXYGdnkWhnc2dkZ3wXeedqx3XnaQzcxAPnYvNr53l1cRd2UBkXfidwF3Lncqdu52NnYed9J3v5YhdmAWQnaryYl3Znfydjp3qXa6dtZ3rnYdwox26Xeqd422XbbqdvF29nYJd/hNlHfsdz53OXY0d7l3zne6dlF2uXbRdml3gXcFd0F2cXbUN5l2qQH2dqbk7HbC1uF3gTbJds53FnYud9x2VnZud2l3MXfudmp3HnYsdsV2snd1dm6SodcNdpx2acJNd352zXaudi13+Xdud6136Xdtdxl3uBe1d38BdXYYodl22Hfhdql2VXZ5d9F3o3ctdtV3/XaFdgJ3cXZ2d8Z2CXcZmCN21HfaduV2Y3YVd3l2fXcVd9Z3k3bBdrV2HXYad/Z2GYSldg12ZXZOdhF2PXaRdr13lndRdhN2MXaNFm13hXeDtp5203ZedjrBoMTNcF13a3ajdvl2yQFjd1V2lXdzd1t3i3Y1dmm2y3Z7d/F2+3YoxcpajnaHdo13yNfJd7QWm3f+d5V2p3ZBd4Z3Z3YcNkN2/7AJd6Sos3badtw363fld012i3ZHdtZ293exdg93kjaPd2BwCXcpJs93SXfXdht2KXa3did3nHepdgV2k3Zndzm3U3d2dx12CXeREGF3XhdddnN2/3bzd692C3Zbd312rXfbdgN3O3eod+1353fFdxd28gurdnkXoPYvd+N2tHfzduN3b3bjd+92GXe2d0D2K3dfdw2p33dld2D34MLHd813EPaLd8j3A3co99N3sPfLN5h3IVBJd+j33Xavdz12b3cLdu931Xf3d4D253ao9yF3wPZ14Zp3pXb49ut3CPdHd4j3x3aU90T3APfE9ge2m9efd1l3k6Fw98J3V3bdd0/Cv3c3d4T2WPfU9lD2S3c1dw93y3ek9xd21En1dvD3DPZg9gT24PaE9hD2d3aQ9xN3LPaA9rT2EHds9ll39nZ4UKTEWnYU94d2RPZ4dn921PbI9sT2H3Yk9mz3MPbA9+z2QEhom0L2OXcU90j2inbM9zz3WPdi9ij2QPc49hh34Fzk9mt2wvbXdzLWN3Yx4bL3J3a89tt3SJY7dlN3JPfGdv0AwHEc9gz2yvaM9yr3KXcy9gD2fPc096e3ZHcS9it2WvaDl0HA6PYy9iL2svY89mr3cvY09uL2/PdFdob3IXZG91YM2vdhd5z2CPcy9pj3vXfM9mL25vfy9pr26HZW9vYxIPZYdjb2Fjei9qb2SPcm93r36vdQ9xr2Evak9wL2RvZydwd2OvZc94z3BPcbd6r2GPdq96d3+vYrtzbWdPZ8dDhwmnfG98L3dvau91T2evb9dvr35vYG97T2AvZ1dl73k+nB98r3Tna+9792fvdc93d28vfY9gr2jvZVZZqs1vag9873u9cu97b3m3Zy9iz27vas9x92zpeB9kb3oIjR9zr2TPaq96b3fvdm9uH2Dvce95r2VWWhdln2Pva69qL2YfeQ92n3fPYR9/z2lvee9/n2uwMF9zb3Jvcp97d2ZvZp914WsXZ59p92kfdDdlb3SxHl9i72tvZU95j3qfb297n38fcO9qx2mfdGkPX3yfYN9+D3rvch92721fYa90t3efcJ95poYU2t9wY2KfcN9nb3jfdU9tj20Pdqd7t2nveR9lVkTBLe99L2Ifb99pX3f3Zx9v72A/Ye9zX3pfdD95ppw3Yj9yN30fcvdtz3vvY59uP2uffF9gH3m7cG9kP3tfbD9uBhPfauNrP3GPZ99qn2VfZN9gv34fcB94v2+fe2AKt2K/ct1qv2iPbt96H2bvdh9hv2NfYZ9rX2/7BG9ocwB3ZXd972Ffch9mP3Lvcd94yX1fbN9132LfZVZP/xOzZmdjP3Wfcx90z3c/c+9lV3Z/eu1CX2m/cR95P3S/db99JB2/fd1xX2a/eV9zn3Vfbn9533rPaT9kv3h/ZVZN930/ezdyf3o/av92P2d/dx9/b2F/cf9lv31oEpaHj21/ff9/X3L/e79o326/f99vH3A/btdjJ2h/dgcEb2cPfP9qJ22fe693v2xfad9+72XfYADt33UluTGN/3z3fADqf2v/Zn9vv3sA7p9+L28A6X93VpuPbS99f2hffQDkX3MA+89/v3//cH94/3n/bpAWT3UA/md5gPsfZ/9+P3YA8T9zgOn/aQDwOC9Pb4D752BA+39kh2sA7v9nAOH/bEDwAPV9b5ccf3I/cz9733IA9996AO9/cItg/2i/aP98QPPaUQgkL35Pc0Djf3s/ax9uQPCnf0D+f24A6Dd1SBGfckDtpBpA+Ndzf32fft9v337A/v9+n2gfcQD0wPrpaCodwPP3c8DjAOHfYoDxQOqA4W94P3xnfraVr3Qg4q92QPvA70DqIP9/cL91a2aA72dhIPRvfJ0kAP8PZIDz/2dA9r9m/36/coDwwOsg5UDuh3cg9W9pIOMfesDrf3Ug7KDmAO//ccDjj2ag9qUUJ36g8795T2Sg+v9vP3b/YyDxv2jA6l9kwPGyVg8Tgkeg+0D9z3mg8GD8oPog8qDn43FvfGD3IPFTAe0jQPGA4/96APp/dF9tgOKg8yD5YO4g86D2DxUfaIDj93kg/CDlgPIg4UD4YOB/YCDrgPYHDWDzf1pg9t92YOe/ZuD/YPFg8OD+43jg6sd3IPmffOD/j2hA76D94OoA5aD3wOlA/8D5v2Tg8MaQ4xXg4gDsEPdA4hD9IODA5+Dk22xg/iDroOz3pK9pz2J/aKDnYOyA72Dur2Dg5GDqoOHg9WDroO2XaBDib3SA/6D7/35A6+Du4OOA4pDrEOdjEldhEO6Q6RD0oP5g9aD0332g4J9/4Oug71dzkPig+5DgYOQQ6GDtEOyQ6ODjD3KQ8wxZ13Ng7ADm33EQ5z9uYPJQ4WD5kOBQ/N9nIPhQ7T9pUPiA5VDrkO1Q4+DnwPUQ4cD0QPWQ9hDxcpZAFFDwkP6Q/ID24PpQ/uDmEOhQ52MNv2aQ6j9+0PxQ4ZDuwPzQ78D6gPqg7dD+S0a5DtDloPdg9YDkkPvg5lD34O5Q7ZD+S1Mls9DrQO3g5ND8EPeQ8hDmIPJfZWD+MPKrDP9pMOrA+r9h0PiQ/+9mMOMQ+zD60PajtxD9r3LA6YDq4PBA8ZDqMOtQ8tD10PdQ52MCD2ww95DiMPPg8bD50OWQ5bDx13cg5QD/MPaw8aDrwPTQ7SDp0OLQ9wDoMPWw7jMWj3hw+2D8MOiQ8jDksOXQ+MDnMPrTf099b38Q6NDsUPUw+RD9MP/Q6hDwMOrQ+DDgaAJgA7DjUOofbTDq8OMw6WD2MOEA8eDnslyTCkDhcOCQ6XDosOVw4T96cPTw9nD9t51A4KDsn2vfZTDmwP1Q4bD1cO+w/XDisPgvcvD4X36w79DycOAw9iDuMPoI5S9073ePZrDxcPOw+XD7sOII+1Dxf2/w+CDpnCDQ4uDhoPCw59Dx0OmQ97D9oON7ajNniWGLe3tic2HAERNgqq2ABElyY3i5HlZeEzlzejF3hriRfjF7+2BTcvNiS2zTdgFgm2Mpa4jiw3jnHLFtjWV7fEV8E417do1p83PTdNtnyXOIl3uwE32SJkjjzW5I8bFhSPKrd8t2iO6LejN3IXGLbjN5i3OsPYjq8XPvBo8PS7arijFxoWpTmIFxGIQ5draUrhjTZJNp+29zcHtx+wwuGd5LcO7pZzl+Ey/Id0j0WXRFCbtwzXlI5kd1SPK7D8j0J3V/ZJ/AjoQo9Ltka3lxaOt8kOfI6NccwI7YJMhZnWgo7/N0KP3pfCjxSOMo5iji5xso9+MXJi8o47F4KOKJZSjym20o8RtoP28NYbtNf21JwSj/KO+ZcKjlKNGo5Wt2UP6tdaj9wjkkh5lzqPZI/qjpW3eo7xtrMOQbZFFGZ3vAO110aOdI/Gjg23Jo+ptk8PMo8CFIaOGSBGjmqOCo+Wjh23Vo7Ft5QOZ7e6+gIiATOqjxsBao8gl7qPkwEOjlW2fw42j06OxCnRtwMmko7qj4W34beKjgyP1o7KjrKO5o+4GnaPLo72jj6P/rbujo23mw9+j4y6s7Fj5DqPdo66j/aP/bbBjp238I4mtq8Wno9NnG02k9cWj1nWbo/4gJGPA7ZRjgm2p3DOjl6OyMDhjsaOQY7at/GOatdKj123Yo4AZDFJAY7ej66OEY8bFr6P0o/6j2PXW2jij5JwmY9MtHGPWY7Cj6mOztbLDmaPfI4ZjoIDpncSj/mPko8pj1KPmTaOj6EPIY+Jj+VkFiguj5mOCpdxjvfRhY8z19D2Bo/pj/e72o75jq6PNY8FjoqOdY7XDumPxY8NjoV31Y5lj96OOHfljiKPvZaMjswB6LdMjxiOmLeYjkyBEzbnNh/sW2Lx/HiPGhb4j4gWBI+/N5MX7Y7TFx+2CzeftyGP0Y8gFFRXpI9B6L0OldZt1/SOOY6SlqKPsJZOjys2E49NVpOPJxY+9pY29I4tj9j3XY/djpwBYzdAAU8Wzxasj703CCztFc+3eI/tKUOPtLvDj45wUxfS16OPTTcLNsSOZ7c7Y+MnAFRKVguPSI8st+G3046ajyR2OTezjx6OLysbj/OOc5cLjrCPhjY+NieO+o6lN6i29xc3t+U3uBaYj2UBEBYoAX2P2Lfrjmpo8449OByO1QBjFx8Ww47PNiOOTY6xAMc5dzY0l/uPc47rUROPF49Hju62yLcTlZ2PM461F6eOubYUVoxoiBjfjheOOxaXj98Pe9dXj0uOaI83j6E26I7HNz2PzI+9jlAs2I8Pt0SXxgEILHJUyYCDjy+OQ47jFtuPb447jyOP+Re7jyS3vI8hjgeO3jK2NxKWR4+BD4uPRZbXjqaPv1azjwBOu1eAT6hOpI4/j+hOvLe2gGBOAnfLjkyPK47Mj6uOETYnAI+Oj7YwFiDNJ2pwTnU2MzZbjghO7I6IToSPHpbIT0SO1rec19GP22rATicXP47+tzh3+E7Sd1hPabc0Trs2D1Xfj8BO9E7ZtgxOFY/ujkZ3BE/ojj2Pd469j/eP3wAkTjBO522w6NqVcE7MAK+P+I8IT5h3oHaPVy821E97jjRPkzbMT8wILE90TnhP7raXF2xPwY6MT/+PpHZnjuOOLyu0TzSO6E9pD7O35I8MT+xO4E9ott2OhE6rjuAX4BbhQdxO0TaoLHSZz491NhROoJYCT8h3iE/vj2oBH468j5+ONo6oTx/mqIOHj7hPsk97ty5WmE7WjjlXjE58NoBOLytvhaJPtI+TD6xOfNcGTxWPObYcTxBPnE+QT/eO3wAqTtGOEEwmT+yPak9jF+pOlE8CTu+OQk9aTmOOKE6tjv6P3CK2TzJPek5TjqBOBk7yTrS2Rk/CT0MXZfAIxbpO/9ayTm5OV47uThJPkY4ETgpPIzeMjxxPhE6QT0RPJzbKTmc21TckT/2PVmlkTi+PfE/wTvZOaE/VAQ5PVE+OTnuPY47OTzaOBdg0fHpPLE9iT7+Omxe+j4ZPkk50t0ZP2E8rNmFPJk+Tj6ZO/bZLjn5OCY7+TxJ2aLYBTopOgU5KT1EXFAHWT55P9+38pWFOdk+vjhpOZlaCTzuOH7bRT8hP2k7jjiqOCHS4TvFO+k9Tj6BP6U5pj46XHk9Rj7lPxBd5TqlOIE93D/pPck8VTkWOZZcWTre3lk9BT5iPhVBEAOuPuTeJXDVPtk/kT3ZOb44OTppOjk5EjsJPVU+5Nrs3rU6uT2VPPk4YTsU37k6BtlVOCbY4T6d14TNxTmJO5U9uT3VPf48hN/5PRzaNTxU2TU/3juoAuU+5N0s2aPAKKHxPcTf1N7M2BbZJ/LoXSNfzN9FPTk5Dt9s2LAPQj3kW8za1jpCWiU71VgNP+49TTk5x07j9Nqs2K07Njz2ggRfXj6NOmU63jhBO4053t5iOD7chTjxPoDD+CQ1k5gxtTwkWiBazN0gWc0+sgPNOPNYLT8VOizYJtjv1GPH6cIQAm0+7Nku25Y9jl8U2So+VTklPnzchjldPR07toDdPwJb2t7dO04/bT5hPatcNTneP409KTyyP0E+c1jZEDPFIjJuPg48nTp8XGrdzT++2fBYXT9RPXU408S5FpPEjAUmO7Ta3Tx2Od0+vToZOa04PTlSPMU9fTzdJCqDPTwU2fbcrT8Qoo04NTmNPt44Yj41O4BYElhM3zU+fT6yOwmMqmRNoM06cj44AXI+KNtyPqU/EtzyOTk4lTzFOVY7ITWGOgY/hjy9OVo71T3WPMJcPTljO4o7r6djONY8rFjDP2Y8njpwOR9fRjoTPjY+BjqDOJo54zy2OQ7ekzhooFo/JjpaOuM4OjxTPII8xTlTPKRbtj5pO+pbEzv1PkI/1j8qOZnec8WTPOM/kz7jOsM67dlqPZo6AliY4rM4pjmzOtM7szvWOuY8czm/x/DbUzjjPXM8AtqmPtM8Jjk6OKo6wxYTOSE9Ez1tPbo+CziGPdM4qjt0YAo+hl7GPZY7czxGPYs4ejyVOZnfehCLPDM4ITzTP0s48z5qOzM8ASOKOcs5czjTO0s7ZjkzPpo4cz8zOLk9a4CrOBY4Kz6rOMs+OjjaPWM8SzprPUs8Czp2O904fDrzPrY+sE3LO5M96zhqO2s6VjgTOAGSG8brOHY7GzhTOis/gDwbPSs+mz5zO/M5Ez0KXjM4mzn6Ops7iqSYBZs5ZjlrOhY+2z0zPls6hj9NZ9M6xj9TPms6qz47PFs8kz7hXWM4oWA7PTY6Oz82OTs+vVu9O8M4fTwoXCM9rjkjPQxZsj8sp9iA/Ty+OqM6OAGjPmHbozrVPQpYAzl1OiY8Ez9VgXs6izt7Oeo4+zlhP4M+ij3bOEYn5jgzPRs7Hj0GP0c9GD5TOKo41+kbPrM/mz2zP+s9FjurPzk7PKJLPXo8izzbPos7xjonPaY5JzmZ3uBXJzgLOCc6Cz+7O2E80T0nOiLfWzpnOjM5Zz7WO2c85jqXX0Y4ZTbnPKs8pz9zPqc5FdsWO6c/kuZHPmc9RzmLP+c5MTtGOws6r8dXOxc81z1nPtc7JTwXOLM/edkXO8s/qTo3OJc5Nzp5OpE7CzqrnLc/xzr+OcbeceO3OgM4Njm/wnc6ljlLO5s95zvrPq08P9+LOLM6Rz53OKc4Dz8bOPc4Rz6bOLc99z67Oes8jzhbOlc/szkrPzs5vFtqU8c4jz13ORbZqz4POQ7dYz53wDc/yz27P3s+jzme3C8/ykYvPrc9LztHPy846zuKPifGrzrbP68+VjxvPX9XDznnOc88+jvPPic5Vz9POtqgZzsmP/M/lzpPOqc6Dz29OcM57T+9O+09lAQjOn08HTzRORsEbsfphQc98T8HPIc6Ml6HO/zbhzjFPlM7tDLgsSfeSzhPP/c+7zwnP7s9rTx6OD89SsfN5m8/Fzg/JJc4GzqXXOk+FROXObs4VzwrOU888z5/PKzZ+JO/Obc4fz1vPMU5fzjBUs867z/RPA84zjmnO085ALwBWwC9Hzs/O+c6/z4rOzs5fz6yEQA+ljq3OW8+QLpbOf85x/Iux/89rzrXOcC4ezy03f8+ZGQguP89azoAvi09/zxeBKC7HzxXOJ8/Zz/vOX86joBgvEC8gLiTOBc7Rj6/OpyDfzxPPOC6jzkgueC+9Nys3p8Q4LiAvhC+YLqXOidcmVXMOlpPjzkfP388YLz/OZC6fzuQu+C4oLzvOEC6kL5PP1C+gLs7P5C7nsKqOrs+ULwQu9C/HzqAvlc9pz6GI17BUkyQuZk+kL6wvU86MLvguSkEcL2lO7s5ELnXPnk/cL6lP4C5ULoQv9C5cL7/PNC4qtv/OdC6CLywumC9CL4c2p88BTpZOfs8ElmQBk047cZfOb9D4jtfOIc6XJ5yO4Ylcjiq33I5bTigAn46XTk6O+C8azqIuLC6cLkIuJM8vzuOPr85kzqovT85iLtQu4i9wLts2KU9ATpQuNs8Nzogvjc58L03OIk5x/Z7Pmi8Oz/ovbc8GL+3O0FRGLoiCei9FzkvOqC+8LgwubC5gLilP9s7GL17OJi8ALqYvPc73dEYu1s/mLrAv78/dz3YuCbc6TmbPNi5Rz7YvTi5WL1wu8C4CE3HOzC96LxYvVC+oLs4uX4/wLoY4ri41zm4vxM47T1YvUC9/z3R8ji5dz1ov3i7uLsIupM74LkEuMC79z8Yuli7Lzj4uOk9/zyovQS+zz8Evli/aL0gv2E5hLzGP9tfhLrYvES7rz5EuGi8KLgjpAi+qLrwukS8hLlAvpc8aL3zP0S/ALmourC+4L3wupE4ZL86Pni4WLmvPiS+IL2kuOi+hLwouNi6ZL3QuWS9iLtkuhi78Lwou5i7hLk/OES7eLrEvJS+mLuzIZS8ULuUvzC5aL8Uu2i+4Lr7OnE+SLiyPD4+IzxfO0Y4yLu2k+U5xNjfP8i9ozwov6M//T51O98/7z4wu82k8LnJOIS+xL+ovdM+vzrBiBC61L6kuSS4FLnEu0TdzjqJOfi76LvkuBi8DL0Qu3U9pIwghXS51T90vlS72L3MBc4/2V+Mv5U4lLgEv7i86L2kiUrcpLv0u3S6VLrMuoS+4VzpOMDF9LhUvgi9ZL4su6S5zLra84C+5L44uAC9uL7Evoy5mL5a917o1Ll4veS8VLmkvWy/ZL9suxIn5IdMuI08TLmsvBS9LLys2dswrLokvey4DL/supS45Liq3py5HLr5OdS/HLoMvhi+WvUaSwy9eLqsvMy5vTlgvbC+dL4cvdy57L/cv1y8PL2QuhS5GOTsv8y8rLzEu+y6TLwNPr85bCVcufU/nL58vyi+XLs8B3y94TyMuFy5VL38s17A1pP8u4k52LqMuBy9VLkCu0y7PL7AvIK8XL2dIKrdpMsCuCU/+Lq8uN467T+BPEi97TveO2ACEl1i2TS+eTs0udlQtLggWrS71nAou17CKL+dOHS6LTp0vGi7Dz0Uvoi+1LscuMK8fNzHPUk69L5cvCBlQrt3P0K9gz/PPWC6nL3iu4K5OLgSv5k9Ozh4v6c74r3PPH88ML6SuryhxTxsuwS9Yrosv2K8BLxSv7BJnL64uIy8mLhCugK5TLnH9Zc9krnvP5K80rusvfKirDlaXCS90rucv+S8Ar5Mu6FtEE/XOxK+bLiSu7E8mz2guRi7jzrsueS/grxyvzi4pTn3O/K6bLv4ve86PLtPPjC6GTHSvfi70riCvAq8+L0QSmK9Cr1Sv/S4crr8ur88KL3yv7y9nLi8u2K8ErvvPjy8aL1yvmK6pLwsuny43LtsvoK6sr0yvz89JL7iuRjirztyvwq/Mr7Muby82k2Kvwy/srgCvMq7JLkY4O87KrgsuEy/UrwqvIq7cL5cvU7Nyruyv8q9GrySvPs4SL1lOki9nz/Cuk0+NLpM3Ac7CYve4KM7kT8ivci+oz60uoc9tLmHO+pd3z+ivbC9YzvEa6q6QLwMvPS4LzuKPsuznVmyv5S7yrx8vPy6qrqCv6s78lrkuCS5ermau3q4yrj6vEK+8z/DpE9d+rzUuHy7UryquNK/ar7hWtE5Xulqv4q5bLvquQ89Ydqq5rq64LoGvDK6xT8GXlK/Br7suAq5RrjnO0a4iADGvnC6Jrp0upU/LSMmvai6xrpyv4a8VD1KuMS6hr96uYa5LLoBOqa5d+Gmvqy7Zr2suR9curynouq73LgGveq7prwNOqa8CgbmuDy7Gr68vHs4erxrQpa8vLmWuNC/5r+WuW4kVrgqv5q6Eri6v5a9JrxGueq/0rxKuG87Xu1H9pq7irg2uEq4prnWuTa6HzzAu0q4qr1mvla4UronWBa40jpmvmS/Sr0Wvea4nLhRXLq/R1/WvZq+hrp2vsM6wrwpOK4/ZTwSXeaXWrv2P+2g2dHRIdq7hTnIuKjDyLyiubS+oru0uhTbor5jP7q/gZCxQNa7mrzyv/U84r6quhs6kfLZ0za+6rwOvHa61roquoq6lTqqEha/PLkWvDa6truuu1/fbyfOug65rr8avpc/rr5ZpO6+rrwuupK7kL+uuEiKGryGvPa5brsWvQs/brrc2A6+bry2vp68ej+uvStfnrlmvAa+9rzcvnk/rr0umK6+Fr9euva+Dr2GuOa/br9TgB643ro+v2a/YT+uu8IPHr16uD66nrzeuS65Wz/e629PPrw+vu69lrk+vWHbzrtevJ68Xrp+vPq5fr4BIz67/rh2uL68/rlWu5a9zr3euVK+Zr/+vka6XrtvPc69Xru+v/q4frgBvL675r6BvX67nrtBvza6rriBuh69qztPO/a7Hr92uxS4QbjyvEk/az5BvX6/7rsBuRq67r4hvta9Ibh6uO68YbjMula8gbztPLneZT2NOZ87wrqc2j4DSLkSIMi8mSBOv7xYorp6u1QG3zjyOSi7aTsousq5Ar2jh368frrBup45ST5+u7C6UV3KO4G49r8BuP65Yb2uugS/VTtM3OG9HLguuaG68r4SuzG5y5veum64wbxBvAG+Br/YuC6SNjixu1y81r4xue68sr1WO1G8wbnhuLK5H1zpP5o/wbyuuF6+cbjRut65jLhkjto88bj8uiG+sbnbPvK4ZIudHwm/3rqhuIq6/rrtXQm6a1hJv/y/UboJvj69yb3OOAY4Kb8Cuom+Kbq+vNE+9L8puMm8cbrJu2q5qbrcuiBlUbipu0K+ybqBugE+9L/JuGm8JrpBvGq7OjmRvj84hr++umm5oLhivkK/ib/pvxK66b52uOq48AgJuqm58bnJvam+Qrx0hlm+ob35PMs6GbyYNYf1mb9yv5m+CbuGvr85hMUwv8a/8ruZvmm/iL0OuWU/DrkROCM+6AURuLnAyL7auyK+jF6RvMDbkb4ovSi77j5RvNnElrjpv+K+Obps3i66AbnRvQa5GbxnOwq6Rr7ZuGU92b1Jvvq+hb4fOCa+ubyZvbC86T7LtSY7tr+BvDG6Kb1Zvum9Kb9VO3a4cbgZuXG+xrrFv0a+BbuSuMW7WL9VPDyoobliuJm4arpFu5tcbr8lvom+0bqlv1a5pbsyu6W9Mb9xvGa7Jb9FvWW9sb9xuua75b+quDK/prs5vBa62b0FuWm7EL9VOgW8Ob1quBW/pLiq3TyIVbm5ufa9xLrVvqa6lbm6uja/6rzZw9a7VbuFvFW+wbnpuDW8ZbkVujm91bmJukK7XsbGIdW41b8IuXW4Rri1uLa5Wb5Jvh68Wb5YwOpaNbzGun671L4FP8M9+z1dLo6+PjqRO3m/jrj5vHI/2rnIvU66Or9OuTq84gLOulG9NbxCCLm9Hl2yuCG8ib+FulU7/j/CWAE4hb4wvaHg5b0VuZW6Cr8QWG67dbsVvMW7MTouAG25rbpKvlH3tg+1v1W8bb+luC6XwSVtuTW+ALsxO8G6Zb8qumG8Hrv1uSG8FbzKWy09xbgxvx26SbnZvaG6HbutvYG8ub2FufW6Lb/VOSm+DL1duGy/Xb+2uF26MbydvWG+nbxCC9G4PbvFuj24Jbk9uTG81bl1u36+Db8mvBm7ZbhPXc28Cl/NuIm6cbrdveM71b9ZuH29Ab71vCG+PbpdubG+KrrVueMirbh1v3W4Db84cB29briauH25HbrtvLW8db7RuK2/7bp9vaa4pb2VuIO4YboDvC26tbv9veC4g7ltusO55rrluw24jr5i3UE/PFgHOCxYS2XcqeLYzT/i3OIFPDIS34sBEtj+R5G7+b7GudzpHt5h3I7a7tvqWe7a4btmOL8/Bb1xvm6l78gTvPbbHtoW2/i5g77hWdqFDJwy2a7eZt9DPxK6U7hRXwpFk7gW3rbfHtuFvtO7g1nwTq7Y7t4u3l7a07ntuzs/uMTdG1O/M72u2L08U76zupdds7rW2I7aXtpzujO5c7onXnBI9t/Tv07cM7zdvjO+c13Tv/O51tgzuFO+87ttuNo5U79zv1O6jt7u367bE7sKOQu6vFimR7C5mthzuNO8ztsTO0u9DF9wT57Y87yLvIM+i7wduQ7eBoEZRwu8XtkrvLO/cr/LuGO+bg6rvyRc878m2rO5i7o9Omnfi77LvEu5E75LvLG6KjhruCDDSHZrurbcC7qLvgu587kfX1uApIUbuirda7hW32u/K7/vPvye670e2LO687ybuOu8xTm5B4HD5t4rvxu9K7rbvlu9sLwrv9u4S74TvjgFE7gbvvLam77hX+O7m7jG3au8274DvMrZO7tPPdu707iLvDu7q75zvtu5Dt1buzO/W7xzu2u/q7u7udO84JL7uau5+7l7vC26G7yjwRu6K7i7ugu9e73G2uW4hbt7Jalvs74Hucu6S7vLvwe67VgLINyux7wTuFu807sHv/u/7zyru8lq4VZHuJu9R7hG2qq6o7x5vURcdmujuiK9/l7spTuGyLhFP7U8aTlRPSNdCTx0vbC/6KIsWdE6mToz3Em6qgIjvtLf4zkO3gWGHFzVOrE4QbuZPCW94bmEXu05wrwRuXE7YARE3CK42r1qX/jY1SHnu6k757oVOUU9I1zNv/m8hjwuzRHxGb8cWJe+GrlLvfU8dbu6v+87d4O3uZU7DTyhv8W5/jkQvme5BT0pPZgBebpdotq/CXBNu8E9N7wVOoZeFTnkuzq+zr/vOP52tlpXuUe8ib1Xvb28ijyTvsa6T73bWU+/p7tPuZe6hFu5uBG++zlauEBdKQEPuX0Q7bpc3dq+bju1Po+8oF2Pu8s6F786u08/zoT3u8++9Twpu/e9urrPunK8BUDvvxe4zryBOvG8YTwvuA+4jb+M2IU4N7o1WiBjdrjNPee4b7qkALe5zVlvuE+9sL9vI5+6eL7FWPk5pT33vCU49LvvuCbf4NySPO+73769ue+9bLifuDS+Yju4SLU7iI1FcNgIj7+FOo+/2T/nvI1Z3zq3vsa/CA13Wh+/Tb3wX+u9H7l3uJO9LbrRuIW5/7hPXTvYd74fvcu5OL9PvQO4WTxauHm8D708WF85n78sAw+/88E3v6+7f783vHU8el+Pus28xTnPvhHTP7hjPmy/gHhFuqrbd72wuSB5O9sgf7S7gH8fukB+KTlnv/ReUgAABJAAARAdP0B+XyZBCaxjbqE3v4HBIFzA3smK11nNWv+6crozD2kaEHqHWHA7Hbj8Pom9YT6/uy+84Hrge0B5jrv+xxkm2AEzDhB7xNy7OY+46KCQf0takHk63BkN0H2s4h84UHp3vsI83rlQeWB7ZTtgfJzfUH/7OOe43AGVAGcL4PcqAF+8vtr6wCLcDAEwfgoYUbpjOiB8ltkNCBsLDQ6yvSQ/nbpQfqm74z82pVB6Eb9QekBfo7xjXn9kLAZDD9B6zTt5OjB8CH1TXgh947/vvEMMyHq/D5B47dxQe7B+UH4uukh517kAAAAAleB60Hy7oZU0/AIbDx0+bjkQf/B/Dj/IfsTEKHxRvre8xD7hWZB7aHoFyFtcExDEJyoEqHq8Ouw7NDp0OJh+L0UsO3TZqHxwflq6Eb+ofNB5jbjwfgAlGHtBDa+8/TrofDB8b74weCh4/FxjPC0/X7x8OTA/pw3YfiZYWHnRAr27iH0CPxw5RD+Ye5mkmHpYewW9AHls3ah5WTtgB6h7cHvgf1QBuH6BkDDmyHqdOxB5OHvoezh5CHi4ewh7+D4J2QR4QZF3DpnfuHjYPmW73D54ebw/Aj0TW0R/KgMx2HB+L73DP9S7L7+ofUh/cH0cA8LBPARnCfB/2HyPvDh9yH44feh8elswffw7RNqkfncOIjkAO8R8eHqof9w55D28PUQ55Hhl3CR74bzXulq9wruof6h7Z7+/vm5gyQUof5oXBH0QeAh5gd04e0xdZH/sOCJYvwhUecBfGH94fFh9iHvkesR4PDwUe3h7pAA0fA3dFHjXvsK4lH7Xu/h5AAAAAlJoeth+mgPLxno+wHgVPcB6MH/Affm4GH7/u3R45IzSPZ7Ed7xbv3K/wNy0ej+5nt7Aizo4LyEpXgx5gHvHvxK/DH2BOiR+nz0vuhG4dHzYeoU+mgaH94CI9H/xOvR+OHn0faK/OHxdPBh/l73MfWSOYdxeAvU9+7uFvkx4JHyMeNo4jwmMeVFfjH//vru6AHlKMGx62d34eE07YAB0fAR+aHjN9/KJGmfMfW48LH5fvix9Z1wgfyx8T7nQb2JqDH2sfYe+/bnsfqB6bHyGPNBp9o01X2x7/Nzsepe730NcfDI9WHyUf7R4dH8kegR7liNtq5qJom3wecB6RTpvvP+9LHwDOCbfao/2jUvb/13cfU+9XHkAepHdJT7PvDme3Hpcfve7rHzdujx8QH1Mete/THuoeBJYvH4ce1djQsrE26R98TwXNKESzNycffgDrUAbDRTimHxgfYR7LH7GuNhHIGHmXPBdwn0Mebi/vNjcuaB7TzoiefnDVjpPXSJ+/HhBvKJ5w75dPZEEmd+if9tcYn/PunG5Yn9HupO5BkYiftde4no7uGe74n+If2Jcgn20foJ/tHgSWZR7SH6kwU7MVVjNPUJ+2AXE3spawn3QfPlLIngqXZx+/7i+thc6ljkSfQJ7EnkgvqJ5s7i+tVM6MnzBCdJ9gH5svxJ7V7k5u5VYv5+YoSJ5snpif9+4cnjPu1m/SllyfDJ4wL4yeVx+Yn/3uTx7tH/sfhG6NLtBOKR+gMRjupBOyLuzhiRZGGTs2YaDCAThkCB41Hm3uJtFBiYVu/9fJMeY3KxeFNhnuA7eLbjivvh7l7qnvvOBmktfWpY7Dly7uTgHx7ynvbC7HaYBs2kCRTyzW6p8KnuHuCe9C7x0gqp8ENmqec5Y6nhqf3u7Ozg9LZ7Cv5Ro3mddqn+Ru/u5GnqXW08A/goS56I00jvKeMjYzbpbuEO/mnz7Lvc5lcU1XVp8uN9aeKe7mnonWFp9akoGI64BUV/aenx6OnzaeTp+2n06TLp+wNvCfZp9unkfXTp5VCRxhHp52N8geXp5fblbv7p8eFni2Slaunmaeyu9enx5Wsp5v8dLovp5aNmcfhp/BnhRX3p5v8V8BYx9ynp6fM642nv6fTu5UOMcoLXASj6afii9+n1ieZ7au4XGe+Vbl1wafQZ+O7hGfCe+GsMmeUW/uloafMZ+Jn2LvKp7XmPGeAFaZnm6esZ5on2Kf7vHJnlaWCZ5LH7meWZ6PT1r56Z/xnymfCZ7Bnnmezs51kVcoOZ+11oWe4Z+Zn/ifCJ7YFCWfOZ6pnoqf4e+gMVexNZ6VnqWfhZ6JntWenK4qoONCRQ72n9GfdJ/hn2WfXO8hnseZFemrHjZ18p9hz22fRZ8xT82fQYn1D52eQZ+ln6me7Z987h2fEEyvgGGfXZ9Or92fTZ/Ej4OfrUzDntaf6p9VniSenW/o8OLQ+p8mnpPXlZ5+nmWePZ4q7jWf7BP6njAvM5+en7Oeo55Jnmo6Jp7ansTWuZ5NnpOftG9n3bYAK58lnjbvi54DnnOeqe9inxuetZ/9nnWeQp6kn5AfJ++Yt3SBK+84th6eOh8aFhKfiBaSnzqWUp5BANKf804ynzFO6BgtnnKfsVb9n42eS56Tn8yepdeszQxpWp6bnkHuMZ5Fn0ueNo9WzFqfqp8Lno2eVZ6Pn2ueIW8tDNOfK58Zn7Weup8antPOYkXGnveeu5/Xn1ufj58hj03nd/EHOOOeDp4Tn6+fHJ53bji3ILBB8D32rZ++nluee55fns7O/56hn3KhAF+unmufQF6Vbs22gDAF2aIeppbXnq+e0F+8noluX04gX6tZQ5+gX2Ges5+/nm+eBJ8QX/NYgZ7RnmBfD54IXhAf/W+4VpefQYmhn8hfw58On5heqB7A71+eSF8dn1GfV5+tngqfI5+oX7Gu354Nngafm56YXjef0F+tbum35KGkXi+fZF5tnxOeFF+I7jW23hhUXqafL58oXuBfjp5H1nefdF4zn/RfYF+fnoxfubcgJdmeBZ7uloue5F6oXzRfk55Rt9xFbF4Znhxf1F5AXwheFm7YXiul+Z48X8xfHF8MXmmfJrdxaUxf9tc8XsReNF58Xpyf1rc479xf959x7iOeYl5YXqdupdfYXnafvmmBn0Re3Z9SXvheUm/7zzJehF5QXp+fv291n063S+Quz+heRF8YXrxfeF5KnuJfJraqXkfQyF5Wn3JeUl+8XtJfT24yXlpfyymWn32eOl54X+RfYl7AX7q2sTHvnpJfeu+GXpxfRl4wX0+xwl/zn9OfIl6CX+peRl+6Xu9uideD2zaSC570XtRfol66XgpfWF4UVqcgG54/nw2f9l7yXw5fGl7GX162bF87ni5eD57WX2ZeNl4l1vsenm7gnl0eePOaMLd1h6B57ocg8TYBXuC2vEmkAa/wWR+fH+HOZ7deU8JojNjDnhYpph4PHtHvN543HzFPLOIYcMM5SY/jHuqfxF+cXuufc1l5FBZBiZaxX3keux4XAbqf0u/xXjGPbVCJXy5ev26obipfVeINnL6gaV6eX9Bv6V/JXwcXKV7XTzFfaV8yb/fvip+3b+ZfKPC5XqeMWV+SXvleL+8Z7tuemp8pX49ldIDFX6ZfGm/5Xhle0V7tgtHQFV+xX/Jebl6FX6AxZV4TdDVeSV8RXqVef59RXvVeJ8p5X1leC2/KXjleMBbkiz7TTGrhXw1fu++NXiRenK9VXoeXq0QNXw0fSV4et+BepdfdX22JAOih14lfvV6NXgVff25cX5uo9V9PEC1fxV6VXyVfw16Uzqnu9V/FOWNfFV5xXuZfFF9C72VfFUPXT4NfeV/jX53vbu79XonWA14BMO/4vV597hNeVV5zXh+00181X65fBV6zX9Lu6Z5zeY9pHV9DX51fE150zirvep7bX4xpBl8wQ+FfbB59Xt7vQl6vFsafaTHbXrhfh14nr5VebV+omda8DnYHXnJeh16dXypvu15CzjaOHodPtlUcV14YX2RB117QrhlfisAwKcOR0bZPITwXZ1/Gb+deS17enhNQp1/3X2pfD187XjdeT16XX7xRp1/aXtdfX1+PXhdfg8jXrR9eL15dn69e2V9vXqxfEZ5B0z9en1/5VvKfQN6tX9le71/u72fwgN47Xqtei17JXpDe9LYPIVDeZ16PX/iuGV6/U3Dfv15fX9Debu8w3iDf7Ldg6ftfgN7g3/DeRbZPXh9fl19o3q9f6N8+jwjfCVWI3wdfSN4xH6tf/150gFFoz1+tVNDfeN4w331fKN7CXhHguN9XXnjeEV67XwjeK6Wg3ljef17I30dekV9xX2+fK8G8SE2JK19E38jfxN/HXjW2tN5KKCtf818tXulfwN8M3163jN+y7U9OzN7jXjNfXl58nozfUdEWl5UrdN7k3t9f+N/k8GzfBYlmADzeR17DXhlfU8Tm12AkAt7nXvjesN67V09eYV5g3xUW6N9/XgjfvN/zxPdwZMHrXtjfJ7ai3l9PfN/NX8Leb18i3iTeOLd83sDO8t7A3grerN408XzeasdK3hDfLN8Dn4xffN88YdLfEt4Y35LeQt9VZF7Iat4s38rf6t+5t4zfuV663iVexN7HX3reTl/63lBFmt9U3oLe2t/63iDFJt703tTeXV403mhf+t7AOwbfC1/03kbfpV4+7rRhlCh2akTfPN7/XrLeit9c3n5wS0HW3xzejl/SXrZeQiP23vDeWt/Y35LeCXGe02Ff7t6m3+Tent4mX5jeDt8C3j7fjt+6tzjfvt7e3hbfpt/+3jAWlCDaDO7eSN/VLw7ekt7B30+xRLmarOLetxYS397evN/h3+UkcN6B36Hf4N+634bf1N8zXrRfbV5Q37HfuN5h337f0d8K3grucZ9J3mTfyd4i3/Helt8J3yNeOT0h3h1fgd9h31reMd+gMVtekd+U32TeKd6O3q/vQp5kn8KeBJaHHr5edRZ3RngJsi9XNvIvll8oFzc3eWZzVvSf++8YN6VwQ0/N7kx29x8AHo1evJ6c3ktu/x/KnjfuGjo13yEftd48nyVf9d6u3npe+DYaO4gZzd+1ADpGgp88n5LeRNSoMaJgCLYt3nifgp6jL95fURdYj9nvLx5ASZ7S9h8TrzM3v06St39P3xcPnoofj+4QTU4Ah4+MdgU3Ld8Z33dPe+7KnhDOQ7ZD36JoL28xdlPefd/379Pfhd77n1geUB4RN2jvZR/MgcRvbIBN75oXI98ht6Pfrp7j3me2AdFaKJPfBnYL30Se0+5gz5FfM96xz7PfxG/QL202u95Mnnve0O/93hE2RG+jb7Me5YDYwe6Sw99qT+veDTdJ7pveeO79Hs2fjhmaaJ95UM9T3zbeq08P7/veuK/l7rfexmjvQXffC98lX4vfdS5F3kkehG/gFqOuop8vHiXAdmmhcsefI++X37NOdbbX330fQh7nH07uB2m33z6f5B9H3l3er99735xet55OnwA+z9/MDzvf/Tcv3tPeID+Z3ovuxR5tH/ueb+8TT+Sfop8ASNgUmWmH83wfP9+nT7/fZ07/T2PeN96JjvA+ge5ADiDOx96cb6/eqJ5RXgvOqD/eC4IgL9+73+g/kD4N39XvOJfubsveB5/7TrMeh0/IcGIx8D6N6Qg/HxZX35y2f9+Fnlvfmx4lGqHvQJYQPjg+Ve64Pm3elI6YP93uFD9b8tg+QD+UPug/VD4n32/fw28wP3Xuo26f34ceCRjEP7EwJD4MH4g/F7ZkPq+e5D8hjqw/qD5H3/Q+wD6QP13vND9O7ixEdD4XtpQ/m05UPove1D+1X25u0D7Dr/g/TD6KFz5fZ99Ot86tuBgIP5CfM06nTpFPczdkPig+Z7YDU5FoSe/cPoI+DD5CP7w+j9+0b7I/Pml0P6Z3aD88P/ffMM97niI++D6cH8vewU74ASvu12xso8cfFE4fHlfuu47FTl8f227GaPGv+Vd37yXvnV8oHsI/NG//H+muLyspTv/vle6L35gfS94aPgQ/ZQF3toQ+itZcQHpxP2jqogpp3998TomriBbZETs2sE+VDngBZTGcPoYfTdeXravIsQRU+XaICLaTgYEBe2Hf6jzWkLZmD/keJQ5xHowf7j9VH+4/Ph6hL592auxd4fSE2KiaIFRXOFiOMa1pMJmePki3Xj+NHgUePj/5VsE/wE8RKX4++a/+Pneo9Bn4mNTKxidBPxEokT8hP1nWXj5AjpoOXh8PDhQOIT/BPp7hCzDiz8sOLj6mie/pcoApKU73Hj4eP794C8j8hwk/VQ9hP94+EI6+D5k/vj7rEFE/BS/+PlW425M4mXxtkrDuPsqE4QB+PtjWOT+NDrk/fQ//dqIO+T+lPgU+k15Qjr/WbKpSsPCZJUCePg5Ovj9VPvU/2T+hPok+xw+xHnk+ow5VP5k/BT8kztE/OVh/4Nul4KGCAHE+/VAnF5E/ZT5NPzk/iT/NPpU+yT8pPvE+qT8Rb/vOG0JtaEvALw53H/NEOxfH54i2PA9HD9Q/M++KPiFuG3133fiZnBvqWNsfIz8bAaM+PT9jP8iPXV/j3qsE4qqMhjc5sl8/HzM/yDDQzysW5T8xHlA+kz4KoKYBHxiusaOhhF/5V8fmoz/zRGM+wg7jPsY+Wd4AgzQlPZpRw1vAMz4Ydis/Oz8uD7s+m16J3g83mjDPBQ9oxz32SJLOKz/bP75pjT9zPrv2TV+z3gpzJkCNq9BRi8mHPzgxRz5zPrs+8z+W37GuWaIbPtukY4DFhfc/lz8rP0KXqz+9D/M/W94MULDBsucHPmaAbz6zPjs+jz/HPk8/az4EnkM/Nj46gZs/Pz8PPqE+1z9BD2ufJ973tiXe4j/CGe/pd80kbnE2Pmn2PriZijZsoqgxKHfS11XfA0+KIGsYoaAsN0+3ld/P7xnfsoEP3o3es96dL0qB8L6vrTSOiL8TaYY/Km7IvireRIgI1zKHaL+dn+i/Zj8lX5i/Rt+vr9amLvMIv0ifuL9Iv76Aqd6kTm3gaL/t7z/tiL8YvglPeL+23pl3EA6e8Z0YPxlX9yQS4y/DT9cXv5Vcd64O3gBQARAB8gBsmKAB8/cSlsCWpMWpPhEfNE5biT8AQbHUv1IpwQBJXlAAdL8i9wQODL6MvvIBTL6ml8y+bT/Q7l5RbL7sX3BfPBbx/OS+4d6MX/4/1XHKMJS7HCqh1xJWftY79mE/vT5NH+E/FRfjHhYpLL41P9hOjMWivyue4r+BDuCPbA99Pr4Oax6zP3y/y2//UAK/pL7ynkK+i47+3kve6j5L7u/e6h6dH6fvhx7AZaqUa+/D31/vOj+nH0VOF55Dtk8rRbDbH5cfar43X8CfiU8TPgSeVyvqlaS+vx60vsNfxr4WrhY+1h+av55uZ9+EPkhIcnnl+BBASEHaPxFPIR96v6kWdzcyPjaP2vya4NukgMD4AYa+QJ+WFr2Q/i8WvjHPJr7PP4tDJfhxoa6+Qx41lu6/6x/5z6C+HAAAARVWP5M3v9dBgbIvWyizTwSYQ5Yqv3gAkIJUl/q/WC/dQUGuh8/tGbj2qj8W3jkA6i58PmAvpKERv4mXkb+d30Hubi/Rvvi+NTdb1rpBcb5zlsS2Cb6Rrom/Q2+MP6juHAAAAZQAAdWdHuC+ZXl0GiQbKM8zTVC/H6Gyl2zzkPAJ2cFf8J96PjaOtx6DAWrmXXYjPW3Yyl6ob4EByL7Lbqa/ghupDo52pb41cbufC27lvli/l8mwOF7p7G/sd1W+aJoMXjW/kt+kGqR9Y0Fydg2/q57hbzW/ib6vF9m+zb6Hz3gwoz6tvzdubb8UvqXWxb+ZUc2/Jb4PPtW+v56Knt2/KO7pv5weHAAdH1q/Jd7p6EuAgigrQPa+ze+9HgXuMj7/37Pu9TEZXV2jgJ4+vuyf7r9/HhW/k77RLICfnZ7mv4I+E14evyfPlr9PH8KfETdgvja/KGlHGBjlY76X7pMXDr7TFnC+To+m0NnokhAYH4JeC+6KPii+B96dLtu/OJmoATu/nl4Z70Y/Jz6MmX6/XE8D3qvejK/gcMlB674wn9B2m79ITno/IV5RL1Pl575mP/FO3c7HviNeoD5CbhuPSoGHv7VO09/mPhq/iR5MPsvuHR8r3hSfH7EkvxsYqILvHz0eer4Tv7o+4b4urwpXi8fevhMfK/aKnku+Ez97v4/f+85fWh++LDcLvki/qj7BfG/ey77CnuAWHR/174ce6s1dPoK2bD+SPxfvF7+RT5e+rgAhX4Xuoq7123I/Px5GvhnfIH//v/dOnr/pro3ake53Hoh/8t8Z3qB+me+Dvxo/Q7+KF9a+0TeWFHoItnSfvgseX74/71FP376xvndGdSHLrwh+br9GvtCvSH8N3nO+nK43R3exuDGof0R/l44Wvn6/GH6WP/Cvp79vvwBJk0Hl+K/mub+Trg6uU263z46vm95Ov5WPANvIR+DvGD/IfomOzH5mb0dvBd5BbtDuIW9wqTiYj85hbw9u6H8L7px/CSM9mhmfP26G3yB/PH4En5x/PZpxbvx+Nt8W3n9v1T9Ib7x+5FKg77tvud8ASGJ/2m4I779vAn+xr4J/T+jif1DuGV4yfmKALH/dvl2uYn6GdfJ+Nz+Afop/W2JSflluEn6F839a/QBKfp8+Os5if0MvKn/5XtJ+nK5AfizAsn83btp/rH4qtjdB6n9PP9p+zH/zp8jvpa4af0x++n+Sfux/iH4ifnp+K87Mf+pvpn9ofgJ/HH6Cfsx++m6WfsrePH9Wf9J/1n5+rvNu/q9q3hNez7+tHyI/Fj+iPxAWb75wPwAFNnElj3i3bU+fvg6/X776vnB/W+9QLhG/gg8ZHxUWhj7Efne+Ze/3v0svEKEWlr5+txZ+fxR+Rj5Of3g/Gr8vv+/etHJnv+Y7eIgxCOvfJD6/3hw/SD5j3rxezj4LzlfXGgnYPgo/wD57vqR+iY5xf+SGKj9APqm+fW4YP2m+YH9F3uB/sD8vHqH7UBCofmpOHn+4fp5/eH8t715/Lh6ML9z6UH+/v//uxM4kf0qfAH/Q78z63D5EfjO+jn7ofoV+Q6/PvtMemr9kn2QBK+/OGYyi9+ef7o4AVUTXNhu/l8mHzoy1Yb65f+EfwO61sMpbCA+mdsso41/gN0Hf5b7AHgSfVLkl+WcAodfNfxVfLX7qvrW+jXBUlNuk2TDNf1ZeT78gfhle7X5K5stOnX7qnl1/Kd7dfozLR5iMh4yBiZeDf7e+ud/EvjtwPX83DmN+fX+Aj61fqn4DflyFwdO9fgtfQ36F38N/M34V6Vx+d0YtfvY3839tv6UvjX9VZzieeRdjf+a/XX4rfpcuq3/oD0TW63677sN/G36Qr41+A8DgP2t/U39/vyxeC35VRIC+O8kdf/t+Er8Hfzt/VS+7f9FgU39zfst+wr6HfoT15fgdfnN/zN4nf9N+E3+nf7U/Pd7Hf+d/Lt57P9Duk3+Zk1f2234gfiJ/lH5pfhV+K79SL1h+Nk7AwVMHU7fufidP7x/Zf4JOhb6xfp0uc6EffgI/QX+uTkHeIX8Jfm1/sa7WFH9/gN7Bf5Z+0b8hf/huL7/pv2UAAAE1Wb42vlHS26SkxDNO6JmIF3grp54AZW/Pf97hH//f6W8/aOdPmHfLaGgW998W37O/gP+kfhBNQ1MwN0j/SX/xfxnfL37lfqCfr37gFv6+kP+IX7N5ModBvw8pwb6RTqG/N+nX3pO+nK/6R/4YBj7EFvG/Kb67v+g+zJ8xvhBeW33rIVf2pP5lvove2t5kN0B/yb47F6T+R77T72o/Tn/qPla+zx6Hnu9/vTfYf08r1X/Qfnh/338F71e/cH9QL+um1yvkfyV+B35/HuT+rH/7jhdG8fzjHmh/fX4ifmV/wzZUfi5+9QGVf2LFQxgLyLh+Jx+s/kVPHIZbvx6Owv4MKvPfvn//fo2/6D/+f+T/pc4S/4jLj76uXwm/oP/FHjA+y+8QFhB+I76pKUMZH77Qf7q+335i/qOO7P7efqXWMn+6Hz1OFH5H7o1fd75FHjL+Xa8kfTT+t7/rfypv2v7LjoL+iv5M/iw+I7/N4WR/+Y8i/jo/qv7j7/h+bO+yWjq+cv767jDOBv8cDgF+5VYW/iXElv6u73XfAP+Y/gz/oX7g/3Xv/QBaPj5+v0oXv6L/Zv4Nfgj/3n5VZEjDtv4AHlb/0v48/jpOzv6Rf3r+i79Pvow+r35hf5q/1H+ufw4VuBm8Tyr/X38Ejjl/V+7q/7l/n8/rpyVv075/vjd+qG4C/tk3Ov5CbiunM84lf+H+L/cR//b+oX9g/kO/948iASvvNZOy5xo3bD5yHtI/h8+I//oeRP4Jth7vPZoV3wI/N04A//r/Qj/Hv9b/ot95612aGf9Il8l+Zn7a/1n+I19QPg7+8f6Yfgn/OP7itz5iSf6QvidOiD4p/xw+Xn+Fvte/IY8YIe0YjsErnyo/fn/Ktql/qh5e/5X+MzK5/9X/ef9a/kY+Bf4o9ye/de+CgIn+Fzcf5zh/Kv9l/zA30j9MH67++O5dVm3/1L6N/rZ/qj+1/vveRX4hbhwYCMWEf+A/8j8538ePTf8G/n7/fRaZARUAvAEqALwA7JksAAgBLAH5FkAAmb+cAGwAGb4AAURNqJ2ACAAkgGyYHADJAFwAUADwAN2AuAAL/6EX3YDeAZXQpACglqgAAB+kAKQBMAEsgTABeaWMmVAA8ADsmVAAGwDMAHv+EBcdmrQBlgC0l+AXwvnh6If+Rv8Tm1gAh/9vf2ppB/4QFmaBPgHDQjUXETcdmr1+p//C+Q52p/9Yj20PJ/7n/1BPBiin/q0z7ciH/ivuU2ln/spOObptqnf+yk5GvSlpj/8EEl7Vj/5M4pIpj/8dms1Az/8DgT4BiI+P/1iOjPGP/1BO/6WP/laZHfQS/8tACfAAt+EP/TlOMDtR/4ICzNTtIAMfQEAD7/7IQAgASZxEQaEACrTKxwGiAIP/Mf+n/8HTBT/0//sAYY/+nwB4AEwAM+ACExIf+rEcGMRD/1QTrHSIf+VpkhwBj/0ins8YMf+I14815L/3MPqu/Mf+JnFH4Bn/zWvl+UHgB4XxydJj/woAX9AMf+qCdw2hj/ytMuX1Kf+kU8CAFz/xGvLgAuf+JnEkAEwAMdmr6AM/+hP8feTqAI5uqagTABk/8IAHhfECKhAA1iOI1QQAGoJ2JwLoAtUAWktBx6fACEFhqLc8eNgCRAGOjxX/mQAx0e4XxERhWAK3/rYgWf+198F/7EAPgfgv/B6AVgCWH4gmW8AeP/QIBjo9eAG/OSCAeF8QQAFgDe/5OjxsAQoAzMeNgDBYBYAKnNiNedWqGosBJbGANkAUJLQQS3t8sgG8AKuvjv/ISWI/8FAFCS1YjoY+LSWQktUE6mv2qAY4RDga1QCVTbagHoAekAjm6/m8SgFIm21AC4Av7On/9HAGEZyf/jEANIBAktagH9AKAAcscYYBwQDsUCz/yElhzdc/ekwCbAFxAOqAYIJDGAwwCTOKZwCWAVObR2agHRhgEGAM2AUJLEa8mBhJgHrAJLAGkAxD+nwBQ55pAOZvhzdeoAmwDGh42AKYAQ0PEa8GwctJYAjxsAdAAskeNgDiAHSjxsAY5ANIB6g8L/6yAPUHjf/ZQBrg8iAGOAJSHjYAiYBegCQAAcfwuAcQAgG+nwAjChpAP3tmAApAwKICWAF/AJhAbvbQQS9lELAHkgCkgAQAGwAdgBDYBMgHcsAQAOoWhZtQACHx1GFpQAJIAZIB4BbwABSQBo0JkA3YstJZ0gIZAUyAylg50tw1C0gIoAPSAkQAjIDmQHnSzGMKMLKQASQBOsJCgK/YOdLXMofICBQG69y5ASaAc6WGjRRhYAAA00RZ9oHkAKqA8OARwAAAAqHH9bEBkgH1AcpAAAACv5DWxA8AAfYBoAB9gHgAPAA8AATQEkMFtAedLf7wcoDOQHCgKZAHmxV0BgoDFQEsgJEAHtiL0BCoD3QEiAAHZKMLLgeAAA5M0BAABBAAAWgUgeAWGw8ci5niwZvgAAeV1Ab4Lef+rICaQEaiwAANKewF9gIibDowZIAUwG7218FkEAeAAWqJCAANzFZAWyAr2AogAXACZ/xNAVwPBm+ZIAuB4cDzDARniWQA8AAHR7lgLQAFsAeAAnsB65hgAHgAAAANQ4Fgn/FwA9cx4AC6gPqHrqA86WSr8xQESgLdAdKA1kBooCNRa5wEjAfUPeAWuoDyMAmgKZvkaAhm+KYCzQFmoHgAOOANAAlnBbQH2gNhBE6A1kBsoCNRbigMlAUyA5cBIgBnm4LgIfATfsMYwrICXQF3gMXAd6A98Bc4DPQHfgLfAU+AtgASadXwFLgOoAHOAkMBgEDwIEfgJEACqbMCBv4DgIEgAFSLghAwMBSECkTaoQIQFo+AiCBTIB5/6YQKlAThAuCBt4CtJb3gJggTyAlUBGosOQG/gO5AbhAr8B7ID+QFugJogXBAgCB9ED5QFYQKDAWwADyoowt1wGbgO3AY/AXcB+4DDwG+CwoACeAhQAZ4D5gAXgIdARhQa8BcECoIFaSx4gVuAncBe4CRAC6gIPAcmAo8BIkDTwHngLtAVJAhyAMkC2AAV924gfIADcBikD+IHKQLYAKpAoSBx4CtIESQJ0gVeAjv+TIBg+5GQJMgXxAqgAAkCVIFqQI0gaJA+QA4kC/ACSQPsgSKA3kBa4DjIG8QKUgYJA9SBwkDvIG+QP8gdJAhyBIgBLpjOQNCgWZA8KBXkCbIF+QLsgbFAkUBxECQAAKQNcge5AiyBnkDIoFpQJigXpAuKBBkCKIHyQJCgaZAtyB5kCQACWQIigdZAsSB2kDLwGZQMcgXRAnKBVUC8oG1QPqgalApqBtkCWoGlQJFASxAjqBLkCwoEeQKsgZpAvqB6UCBoHpQJFAf6A4KBo0DkoHjQIagZNAnyBzUDdIGzQMcgXJAkAAuYD8wHUgEiniAAYsBpYDywG2IErATKArMBJECfwFoQMIgWwATlO+EDsIGwQNugUFAy6BQECboEgAHETvdAv8BTIA3E6fQKQgZb/X6Bb0CQv4AwMege9A4aBykAWgBJADgQljsEQA4MCIACQwIIAFjsb6B80C/ZYQwKhgQ3MGGBqMCEYFVgJEAGnAXMWmMDoYEKm3xgdjAtgAhP8+xZEwLJALDA+GBiMCRAABgDsFmwAEQAJoDRACeADAAPUPFAAhQBLQHF6AvARGA6cByoDnoEgAHpgWwARmBzMDWYHswMmHlzAk0BPMCmQDGQDpgWSAIWBlgAWYFswKHAWLAu0B3MD6h7KgOygQLAkAAcsCFYGiwM5gSrAiWBasCpYEVQP5gbLApmB8sCRYFKwL1gfAAVWByoD2oGjJUdHg9A5UBw0D7YHdgK+gTTA5GBIABKABSQDJAK7ApCBOZA7BZewJ9gY7ApkAmcA7BZmoE9gAyApwAnABdgD5AHgAAzfT2AXA9ywEgUH/NiaA4gA5YDAgBoADHYPpAkAA9mwxQEsIEjgdHArwAscD44GJwMhqinAtOBfoBM4G2QOdAXzAkyADN9lIBN7FlgeHAeAW8AsIc7hqBDgauArSWdcCG4GgAIZgc3A1uBWwBnQHZQM9gMP/IIAm4CNkDKQDDAc0AwWB/cCjgAdwGdAcbAmMBBSAM/71D0TAUWA1MB6YCQYFaQgDAexApiBbAAnUABwIYgdRApUBIcCPYFUQMDAXvAnOB20Dz4G7wJPgSIAIiAh8C2IFCgMvgeUEHeBz8C74FsAEWAI/AxiBH8CcoGdwM9gUfAi+Bv8Dc4BhwKugexApCBrUA7Ba7211AZGAgAA4kaA0QAUAAjgDwCxsmHbANQWU4DETapZSOANwPVuBpoD4ABSADQACaAe0BpQQLwGjgJyAJZMYmBOUD2oGEADkgCgAASWDN8DJgiAHoQXpMfsB1sBFBZHABYQQzfNoASgt6h5VAFYQbQg1UBYYDd7bnS0EAIfA72BIgBfYFvQPjAGIgoOBbsDP4HbQM9gJ7APSYuoDwSDrwLTARmAv0BF0CEBbKQHgQSIAZm+8ABWwEmgLjgSaAhm+uoDCEFUADjgfkAFoAQ4CmwH1DwdAVQAVSBxCCPMDZwICQDIgiRBwcC/QF8wNIgYhAt6BIQAw4FSABsAGRApkAuoA3EEDjw8QWwAbUYfIDxEFhILkQSAATuAoSCHYGxILjAHYLXKBY0CCoETQKigetAgKBwSCPYGDgECQT4gkGBc8Bv4HHwN9AWwAEoACSDJEEgwM6gHYLeMBxCpdEFsABTARwPVuBR8B04FKAGzgRMAUBBr0CqkH/wNkABHAwUBUcCY4HwAE3AWnAI4AJcDzpZjgDsFoog5RBqiC9EEbwI0QWUg42BgcD3EGxIPgQP4g/JB10CqkHDQO8QRsg8ZBuSCwEEEQKqQdtA7ZB4CC3oGFgKiQbIgpCB8WhikFAINKQQAgvmBN8D34G3IN9ANcg2+BLIDjJgOTEsAUP/fv+LgDh/6fAGgAQ/vDm6E/8l/7T/3DPsCgwQSi/8p/4r/0cAYibdf+xACWI5gANaAYibPf+4QC9e5EAMeAWUnSKeaPQl/7B919GO//G/+CgCyk73/xRQWsnGB26KDyk4wOx+QR//GB2iKDmj596Hf/v//WQBZScgAFwoN7gSCAAlBkADpAD/INgASPkBABYADlAGICxQAdCg3GBxHhNgEP7xwAWf/Ea8+otCAHKmDP/iZxH5BFACCUHUAMZQXQAngBjACeAEsAPRQewAxFB7pxuAFX/0iAT8g6fexCYeAHCAJ4AWIAlFBjhEpAFz/xkARKg+QBEqClAGyoNUAUPfK/+GgDjjBaALAAboAUVBIX9QfayoOMAVygswBQwCYQHWAMRcN4AkziOZBvAHOAO8AW4Ax4BDo9PAEuAJ8AR7vbwBkgDwgFOj0inl+bOwBYQDQgGOzSiAREAmIBqQDA0Ec3WAGHYA54BeaDLAHpALAAdAA7IBC/9cgHmHwKAfUAx2axQDCgFlAJmAY/vKoBwjdagHEAIIrn8gitB08CtgAzAOn/h0ArIBXQDeAA9APn/jA7foBRGdpAABoNLQSMAv5BYwD3UH7AKmAa0A2YBnwB5gEwgKElosA4YBKwCsQHToPWAdCA6dB2wD0QFroL2AZMAw4Bh6Dp0HunA9MGcAwFBbrQrgEs3wX/nug3v+9wD/TCz/w2HjYA1oBbwDLhgvoNDQd8Ax2a+wx/gHcD0BAbP/YEBRADQQHcD0EEk8fP2W3A9Q0EPoK0lnCAyFws/9EQHcXE2AaiA2YwyGDMQHIYNxAfqAfEBBkxZTYgCxsmJYAeAAsf9RABKQGMmAQAdv+8AAnYBMi2smLZMWUATsBJgB0AF9QEAAA"))
 ///////////////////////////////////////////////
 
 ///////////////////////////////////////////////
diff --git a/Documentation/PWB.png b/Documentation/PWB.png
deleted file mode 100644
index 7ed2b1f..0000000
Binary files a/Documentation/PWB.png and /dev/null differ
diff --git a/Documentation/Schematic.pdf b/Documentation/Schematic.pdf
new file mode 100644
index 0000000..524d0b6
Binary files /dev/null and b/Documentation/Schematic.pdf differ
diff --git a/Documentation/UpdateSystem.png b/Documentation/UpdateSystem.png
deleted file mode 100644
index a6c6fad..0000000
Binary files a/Documentation/UpdateSystem.png and /dev/null differ
diff --git a/MC68k.kicad_sch b/MC68k.kicad_sch
index 389dd82..7dc2e43 100644
--- a/MC68k.kicad_sch
+++ b/MC68k.kicad_sch
@@ -1233,7 +1233,7 @@
     (property "Reference" "#PWR0101" (id 0) (at 30.48 57.15 0)
       (effects (font (size 1.27 1.27)) hide)
     )
-    (property "Value" "+5V" (id 1) (at 30.48 49.53 0))
+    (property "Value" "+5V" (id 1) (at 33.02 50.8 0))
     (property "Footprint" "" (id 2) (at 30.48 53.34 0)
       (effects (font (size 1.27 1.27)) hide)
     )
diff --git a/PDS.kicad_sch b/PDS.kicad_sch
index 4bc8273..4954711 100644
--- a/PDS.kicad_sch
+++ b/PDS.kicad_sch
@@ -695,34 +695,34 @@
     )
   )
 
-  (junction (at 69.85 92.71) (diameter 0) (color 0 0 0 0)
+  (junction (at 72.39 91.44) (diameter 0) (color 0 0 0 0)
     (uuid 064853d1-fee5-4dc2-a187-8cbdd26d3919)
   )
-  (junction (at 69.85 59.69) (diameter 0) (color 0 0 0 0)
+  (junction (at 72.39 58.42) (diameter 0) (color 0 0 0 0)
     (uuid 098afe52-27f0-4ec0-bf39-4eb766d2a851)
   )
-  (junction (at 69.85 62.23) (diameter 0) (color 0 0 0 0)
+  (junction (at 72.39 60.96) (diameter 0) (color 0 0 0 0)
     (uuid 11cae898-6e02-4314-87c3-bfa88f249303)
   )
-  (junction (at 69.85 69.85) (diameter 0) (color 0 0 0 0)
+  (junction (at 72.39 68.58) (diameter 0) (color 0 0 0 0)
     (uuid 127b0e8c-8b10-4db4-b691-908ac98caaf1)
   )
   (junction (at 33.02 157.48) (diameter 0) (color 0 0 0 0)
     (uuid 1bb16fed-1537-47fa-90f6-8dc136da5d16)
   )
-  (junction (at 69.85 100.33) (diameter 0) (color 0 0 0 0)
+  (junction (at 72.39 99.06) (diameter 0) (color 0 0 0 0)
     (uuid 2ff15691-c9f8-4e08-a694-3230522780fc)
   )
-  (junction (at 69.85 135.89) (diameter 0) (color 0 0 0 0)
+  (junction (at 72.39 134.62) (diameter 0) (color 0 0 0 0)
     (uuid 41fc1c23-edd4-45a5-8036-7f62b013770f)
   )
-  (junction (at 69.85 95.25) (diameter 0) (color 0 0 0 0)
+  (junction (at 72.39 93.98) (diameter 0) (color 0 0 0 0)
     (uuid 5da06777-0696-4bb2-8c9a-78c96b4b3e90)
   )
   (junction (at 93.98 162.56) (diameter 0) (color 0 0 0 0)
     (uuid 63892cea-0371-47b0-925d-c40106168946)
   )
-  (junction (at 69.85 67.31) (diameter 0) (color 0 0 0 0)
+  (junction (at 72.39 66.04) (diameter 0) (color 0 0 0 0)
     (uuid 741561bb-6157-4c58-bb00-0f2a32b21238)
   )
   (junction (at 38.1 137.16) (diameter 0) (color 0 0 0 0)
@@ -734,41 +734,40 @@
   (junction (at 43.18 162.56) (diameter 0) (color 0 0 0 0)
     (uuid 858b182d-fdce-45a6-8c3a-626e9f7a9971)
   )
-  (junction (at 69.85 64.77) (diameter 0) (color 0 0 0 0)
+  (junction (at 72.39 63.5) (diameter 0) (color 0 0 0 0)
     (uuid 8c4cd1a2-9a92-4fba-aa2e-8b86c17dce10)
   )
   (junction (at 53.34 162.56) (diameter 0) (color 0 0 0 0)
     (uuid 8ecc0874-e7f5-4102-a6b7-0222cf1fccc2)
   )
-  (junction (at 69.85 72.39) (diameter 0) (color 0 0 0 0)
+  (junction (at 72.39 71.12) (diameter 0) (color 0 0 0 0)
     (uuid 92419cc9-1070-47aa-876c-2cf8f5a03a47)
   )
-  (junction (at 69.85 74.93) (diameter 0) (color 0 0 0 0)
+  (junction (at 72.39 73.66) (diameter 0) (color 0 0 0 0)
     (uuid d5128f0b-0a4f-4337-a7f7-9a3dfe4ad4f9)
   )
-  (junction (at 69.85 97.79) (diameter 0) (color 0 0 0 0)
+  (junction (at 72.39 96.52) (diameter 0) (color 0 0 0 0)
     (uuid e6235600-87cc-4c82-b15f-34fb66b9bf0e)
   )
-  (junction (at 69.85 77.47) (diameter 0) (color 0 0 0 0)
+  (junction (at 72.39 76.2) (diameter 0) (color 0 0 0 0)
     (uuid fed6a1e7-e233-4dff-87e0-8992a65c8dd0)
   )
 
-  (no_connect (at 69.85 85.09) (uuid 03d57b22-a0ad-4d3d-9d1c-5573371e6c2f))
+  (no_connect (at 72.39 83.82) (uuid 03d57b22-a0ad-4d3d-9d1c-5573371e6c2f))
   (no_connect (at 102.87 66.04) (uuid 100bf17a-7951-4909-be51-25d2aab32c49))
-  (no_connect (at 69.85 82.55) (uuid 159c8092-f459-40eb-b409-c2cace814e6e))
-  (no_connect (at 69.85 123.19) (uuid 2949af22-2432-469e-9f07-eee60be8acbd))
-  (no_connect (at 69.85 118.11) (uuid 356199c8-c0f7-4995-bef0-53ad752a30c5))
+  (no_connect (at 72.39 81.28) (uuid 159c8092-f459-40eb-b409-c2cace814e6e))
+  (no_connect (at 72.39 121.92) (uuid 2949af22-2432-469e-9f07-eee60be8acbd))
+  (no_connect (at 72.39 116.84) (uuid 356199c8-c0f7-4995-bef0-53ad752a30c5))
   (no_connect (at 38.1 60.96) (uuid 39614f9f-2df5-492b-a093-45b7a48e295d))
-  (no_connect (at 69.85 120.65) (uuid 3997254a-8057-4464-ba07-e37f0720cbd8))
+  (no_connect (at 72.39 119.38) (uuid 3997254a-8057-4464-ba07-e37f0720cbd8))
   (no_connect (at 38.1 63.5) (uuid 3cfddd47-0913-4692-89bb-8a69d22be5a7))
-  (no_connect (at 102.87 68.58) (uuid 60a7dcc1-b459-4b69-be02-f48b66a815f0))
-  (no_connect (at 69.85 87.63) (uuid 68f7174d-ce7a-41b4-89f8-dd7e3ded57a1))
-  (no_connect (at 69.85 125.73) (uuid 7983b95c-14e4-4dec-ab4e-09c81071d9de))
+  (no_connect (at 72.39 86.36) (uuid 68f7174d-ce7a-41b4-89f8-dd7e3ded57a1))
+  (no_connect (at 72.39 124.46) (uuid 7983b95c-14e4-4dec-ab4e-09c81071d9de))
   (no_connect (at 38.1 58.42) (uuid 85621d90-361e-49b6-9449-b54a16cce021))
   (no_connect (at 102.87 134.62) (uuid 85ec87eb-bb51-43f3-adf5-d04ca264762d))
-  (no_connect (at 69.85 128.27) (uuid 914ccec4-572a-4ec0-b281-596368eea274))
-  (no_connect (at 69.85 113.03) (uuid a9ff0621-eacb-4187-ba89-29f236eec881))
-  (no_connect (at 69.85 115.57) (uuid cb0f5a26-0827-4807-aea7-55b25947b9d5))
+  (no_connect (at 72.39 127) (uuid 914ccec4-572a-4ec0-b281-596368eea274))
+  (no_connect (at 72.39 111.76) (uuid a9ff0621-eacb-4187-ba89-29f236eec881))
+  (no_connect (at 72.39 114.3) (uuid cb0f5a26-0827-4807-aea7-55b25947b9d5))
   (no_connect (at 102.87 83.82) (uuid fbca7d5b-4a19-4f46-9697-74b3068179aa))
 
   (bus_entry (at 43.18 73.66) (size 2.54 2.54)
@@ -928,7 +927,7 @@
     (uuid ff203a9b-3d2e-4e1d-a6f0-12d16e5120fb)
   )
 
-  (wire (pts (xy 69.85 69.85) (xy 69.85 67.31))
+  (wire (pts (xy 72.39 68.58) (xy 72.39 66.04))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 00c9c1c9-df78-4bf8-a378-9edee7dafbe3)
   )
@@ -972,7 +971,7 @@
     (uuid 1bb31f70-f39f-469b-987a-0b43542d02c8)
   )
 
-  (wire (pts (xy 69.85 95.25) (xy 69.85 97.79))
+  (wire (pts (xy 72.39 93.98) (xy 72.39 96.52))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 1d6c2d6c-bee0-401d-9749-98f17833afdd)
   )
@@ -993,7 +992,7 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 2fea3f9c-a97b-4a77-88f7-98b3d8a00622)
   )
-  (wire (pts (xy 69.85 67.31) (xy 69.85 64.77))
+  (wire (pts (xy 72.39 66.04) (xy 72.39 63.5))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 3019c847-3ccf-490a-9dd6-694227c3fba5)
   )
@@ -1010,7 +1009,7 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 3742a313-c63e-4807-a7bf-be5a0ae2c781)
   )
-  (wire (pts (xy 69.85 62.23) (xy 69.85 59.69))
+  (wire (pts (xy 72.39 60.96) (xy 72.39 58.42))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 3a4d7b94-8b26-4555-b396-f2e88aea5db3)
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@@ -1061,10 +1060,6 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 5080cf4c-abda-4232-b279-44d0e6b9bde3)
   )
-  (wire (pts (xy 113.03 63.5) (xy 113.03 68.58))
-    (stroke (width 0) (type default) (color 0 0 0 0))
-    (uuid 57881c8f-ea31-4450-bce6-89885e0a9bfd)
-  )
   (wire (pts (xy 102.87 93.98) (xy 107.95 93.98))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 5891aa7f-2e48-4492-8db1-d54810991036)
@@ -1091,7 +1086,12 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 5f8cf0a3-5039-4ac4-8310-e201f8c0505f)
   )
-  (wire (pts (xy 69.85 72.39) (xy 69.85 69.85))
+  (bus (pts (xy 45.72 68.58) (xy 46.99 68.58))
+    (stroke (width 0) (type default) (color 0 0 0 0))
+    (uuid 61f8db63-6e8e-4258-ad83-bbd4865253ee)
+  )
+
+  (wire (pts (xy 72.39 71.12) (xy 72.39 68.58))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 6428332e-b689-4aa8-86bb-3bee31b6f177)
   )
@@ -1116,11 +1116,11 @@
     (uuid 73cd58cf-64e3-4c8e-aa18-418cbbd5eda2)
   )
 
-  (wire (pts (xy 69.85 80.01) (xy 69.85 77.47))
+  (wire (pts (xy 72.39 78.74) (xy 72.39 76.2))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 7401f61b-dc36-4f5a-ba3e-b101a22bf1fc)
   )
-  (wire (pts (xy 69.85 64.77) (xy 69.85 62.23))
+  (wire (pts (xy 72.39 63.5) (xy 72.39 60.96))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 76a87642-211c-44f2-a488-190d6dc3728e)
   )
@@ -1162,10 +1162,6 @@
     (uuid 7fb4b15d-ec89-4bf7-876e-be4946b25d3f)
   )
 
-  (wire (pts (xy 102.87 63.5) (xy 113.03 63.5))
-    (stroke (width 0) (type default) (color 0 0 0 0))
-    (uuid 7fd11519-eb9e-4413-8ca2-e43e38c699f6)
-  )
   (wire (pts (xy 38.1 119.38) (xy 43.18 119.38))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 84e154cc-34e9-48ac-ab7e-fc52b3bc90d0)
@@ -1196,7 +1192,7 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 99c0b885-9395-4eaa-a204-8d7dea094883)
   )
-  (wire (pts (xy 69.85 133.35) (xy 69.85 135.89))
+  (wire (pts (xy 72.39 132.08) (xy 72.39 134.62))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 9b4851fe-4e2f-4de0-a685-8e53004d88aa)
   )
@@ -1218,7 +1214,7 @@
     (uuid a48abe71-c26f-4733-9578-7b7091fac6a2)
   )
 
-  (wire (pts (xy 69.85 92.71) (xy 69.85 95.25))
+  (wire (pts (xy 72.39 91.44) (xy 72.39 93.98))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid a4971cc2-2bc0-4979-86df-10f6aaaa3b65)
   )
@@ -1234,7 +1230,7 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid ab26a42e-b7f6-4a80-b26c-c01085e448c7)
   )
-  (wire (pts (xy 69.85 77.47) (xy 69.85 74.93))
+  (wire (pts (xy 72.39 76.2) (xy 72.39 73.66))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid ad4fcc27-bf1e-4e2e-ab26-9b8032da7693)
   )
@@ -1242,6 +1238,10 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid b02d02f6-d244-430b-bb33-eb4c9b09ade2)
   )
+  (bus (pts (xy 110.49 93.98) (xy 111.76 93.98))
+    (stroke (width 0) (type default) (color 0 0 0 0))
+    (uuid b4cc6bb1-3547-4184-a6ad-61770c704cbd)
+  )
 
   (wire (pts (xy 38.1 104.14) (xy 43.18 104.14))
     (stroke (width 0) (type default) (color 0 0 0 0))
@@ -1260,7 +1260,7 @@
     (uuid c374668c-56af-42dd-a650-35352e96de63)
   )
 
-  (wire (pts (xy 69.85 74.93) (xy 69.85 72.39))
+  (wire (pts (xy 72.39 73.66) (xy 72.39 71.12))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid c7524402-4dbd-4d05-888d-edab7e79a150)
   )
@@ -1273,7 +1273,7 @@
     (uuid c9472688-f970-4de5-b835-517dfc9f706b)
   )
 
-  (wire (pts (xy 72.39 59.69) (xy 69.85 59.69))
+  (wire (pts (xy 74.93 58.42) (xy 72.39 58.42))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid cfec88d2-05ea-4320-9be6-2559d89ee700)
   )
@@ -1294,7 +1294,7 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid e2349eb5-0f2d-4c2a-b154-1cfe1ab9cd91)
   )
-  (wire (pts (xy 77.47 130.81) (xy 69.85 130.81))
+  (wire (pts (xy 80.01 129.54) (xy 72.39 129.54))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid e3903eeb-8b72-4b40-a088-cbbba270c01b)
   )
@@ -1303,7 +1303,7 @@
     (uuid e6c527f0-095b-4282-abfa-4a716c6205f5)
   )
 
-  (wire (pts (xy 69.85 97.79) (xy 69.85 100.33))
+  (wire (pts (xy 72.39 96.52) (xy 72.39 99.06))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid e73ef891-c9f9-42ab-894b-b2580ee0b0a1)
   )
@@ -1324,7 +1324,7 @@
     (uuid eb2a54fb-5e1e-4ee1-a74e-d6a2abf55d80)
   )
 
-  (wire (pts (xy 69.85 90.17) (xy 69.85 92.71))
+  (wire (pts (xy 72.39 88.9) (xy 72.39 91.44))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid ec1ade12-3e4c-4517-be56-01c5cfbeed11)
   )
@@ -1350,11 +1350,11 @@
     (uuid f387380a-e1fb-449a-8c5f-ba931e8194a3)
   )
 
-  (wire (pts (xy 72.39 100.33) (xy 69.85 100.33))
+  (wire (pts (xy 74.93 99.06) (xy 72.39 99.06))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid f46fb303-7470-41c0-b6e8-4553c1d6503f)
   )
-  (wire (pts (xy 72.39 135.89) (xy 69.85 135.89))
+  (wire (pts (xy 74.93 134.62) (xy 72.39 134.62))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid f58742f8-e57e-4646-a6f5-0463e0eceeb8)
   )
@@ -1541,7 +1541,7 @@
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid 0208dcec-5844-41d6-8382-4437ac8ac82d)
   )
-  (hierarchical_label "~{IPL}2" (shape output) (at 69.85 107.95 0)
+  (hierarchical_label "~{IPL}2" (shape output) (at 72.39 106.68 0)
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid 1569382e-a4f5-4166-a19c-b78580f8c980)
   )
@@ -1561,7 +1561,7 @@
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid 4208e41d-1d0a-40b9-bf94-fcbeb6562f9d)
   )
-  (hierarchical_label "~{IPL}1" (shape output) (at 69.85 105.41 0)
+  (hierarchical_label "~{IPL}1" (shape output) (at 72.39 104.14 0)
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid 4625ef31-ba9f-4b3e-8ebc-93b4658ad74a)
   )
@@ -1573,7 +1573,7 @@
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid 60d30b2f-02cb-42f2-b2ed-c84cb33e3e36)
   )
-  (hierarchical_label "A[23..1]" (shape bidirectional) (at 45.72 68.58 0)
+  (hierarchical_label "A[23..1]" (shape bidirectional) (at 46.99 68.58 0)
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid 710852c3-85af-44f2-af12-adc5798f2795)
   )
@@ -1581,15 +1581,15 @@
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid 933a17ae-06d4-4de3-aae1-d3835cc0d957)
   )
-  (hierarchical_label "D[15..0]" (shape bidirectional) (at 110.49 93.98 0)
+  (hierarchical_label "D[15..0]" (shape bidirectional) (at 111.76 93.98 0)
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid 96815f61-f3f5-43c2-b68f-856577233f16)
   )
-  (hierarchical_label "~{BERR}" (shape output) (at 69.85 110.49 0)
+  (hierarchical_label "~{BERR}" (shape output) (at 72.39 109.22 0)
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid a2ead14b-89a8-4438-a7df-7876de28e69a)
   )
-  (hierarchical_label "~{IPL}0" (shape output) (at 69.85 102.87 0)
+  (hierarchical_label "~{IPL}0" (shape output) (at 72.39 101.6 0)
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid a6694369-d7a9-41d0-a88e-8a3c16982564)
   )
@@ -1605,6 +1605,14 @@
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid df3e0d78-29b1-4811-9600-571610f4b8a8)
   )
+  (hierarchical_label "~{BG}" (shape output) (at 102.87 68.58 0)
+    (effects (font (size 1.27 1.27)) (justify left))
+    (uuid dfa923af-e317-49a2-8f50-ed13e05cb0c1)
+  )
+  (hierarchical_label "~{BR}" (shape input) (at 102.87 63.5 0)
+    (effects (font (size 1.27 1.27)) (justify left))
+    (uuid ee8a6fd8-1e7f-4e43-ab8e-8f82128f2170)
+  )
 
   (symbol (lib_id "GW_Connector:MacSEPDS") (at 34.29 100.33 0) (unit 1)
     (in_bom yes) (on_board yes)
@@ -1651,15 +1659,15 @@
     (pin "A9" (uuid 8c4e0e15-73c5-4a3c-af3e-a7a172316f69))
   )
 
-  (symbol (lib_id "GW_Connector:MacSEPDS") (at 66.04 101.6 0) (unit 2)
+  (symbol (lib_id "GW_Connector:MacSEPDS") (at 68.58 100.33 0) (unit 2)
     (in_bom yes) (on_board yes)
     (uuid 00000000-0000-0000-0000-00005f6df4c8)
-    (property "Reference" "J1" (id 0) (at 62.5348 52.9082 0))
-    (property "Value" "MacSEPDS" (id 1) (at 62.5348 55.2196 0))
-    (property "Footprint" "stdpads:DIN41612_R_3x32_Male_Vertical_THT" (id 2) (at 66.04 55.88 0)
+    (property "Reference" "J1" (id 0) (at 65.0748 51.6382 0))
+    (property "Value" "MacSEPDS" (id 1) (at 65.0748 53.9496 0))
+    (property "Footprint" "stdpads:DIN41612_R_3x32_Male_Vertical_THT" (id 2) (at 68.58 54.61 0)
       (effects (font (size 1.27 1.27)) hide)
     )
-    (property "Datasheet" "" (id 3) (at 66.04 55.88 0)
+    (property "Datasheet" "" (id 3) (at 68.58 54.61 0)
       (effects (font (size 1.27 1.27)) hide)
     )
     (pin "B1" (uuid a2d090b5-bdc2-4863-87f2-2ea46a246d3d))
@@ -1741,33 +1749,33 @@
     (pin "C9" (uuid 0844b132-5386-469c-86ff-d527c8a00608))
   )
 
-  (symbol (lib_id "power:+5V") (at 72.39 100.33 0) (unit 1)
+  (symbol (lib_id "power:+5V") (at 74.93 99.06 0) (unit 1)
     (in_bom yes) (on_board yes)
     (uuid 00000000-0000-0000-0000-00005f6e26cc)
-    (property "Reference" "#PWR0143" (id 0) (at 72.39 104.14 0)
+    (property "Reference" "#PWR0143" (id 0) (at 74.93 102.87 0)
       (effects (font (size 1.27 1.27)) hide)
     )
-    (property "Value" "+5V" (id 1) (at 72.39 96.52 0))
-    (property "Footprint" "" (id 2) (at 72.39 100.33 0)
+    (property "Value" "+5V" (id 1) (at 74.93 95.25 0))
+    (property "Footprint" "" (id 2) (at 74.93 99.06 0)
       (effects (font (size 1.27 1.27)) hide)
     )
-    (property "Datasheet" "" (id 3) (at 72.39 100.33 0)
+    (property "Datasheet" "" (id 3) (at 74.93 99.06 0)
       (effects (font (size 1.27 1.27)) hide)
     )
     (pin "1" (uuid 6287def5-62b2-4024-b166-e38fa9a13630))
   )
 
-  (symbol (lib_id "power:GND") (at 72.39 59.69 0) (unit 1)
+  (symbol (lib_id "power:GND") (at 74.93 58.42 0) (unit 1)
     (in_bom yes) (on_board yes)
     (uuid 00000000-0000-0000-0000-00005f6e368e)
-    (property "Reference" "#PWR0144" (id 0) (at 72.39 66.04 0)
+    (property "Reference" "#PWR0144" (id 0) (at 74.93 64.77 0)
       (effects (font (size 1.27 1.27)) hide)
     )
-    (property "Value" "GND" (id 1) (at 72.39 63.5 0))
-    (property "Footprint" "" (id 2) (at 72.39 59.69 0)
+    (property "Value" "GND" (id 1) (at 74.93 62.23 0))
+    (property "Footprint" "" (id 2) (at 74.93 58.42 0)
       (effects (font (size 1.27 1.27)) hide)
     )
-    (property "Datasheet" "" (id 3) (at 72.39 59.69 0)
+    (property "Datasheet" "" (id 3) (at 74.93 58.42 0)
       (effects (font (size 1.27 1.27)) hide)
     )
     (pin "1" (uuid 3b6dd4ee-11c2-4737-a9fa-7ec95710931c))
@@ -1821,17 +1829,17 @@
     (pin "1" (uuid e6f9345b-cf9f-4319-8dda-75e3abf6a605))
   )
 
-  (symbol (lib_id "power:GND") (at 77.47 130.81 0) (unit 1)
+  (symbol (lib_id "power:GND") (at 80.01 129.54 0) (unit 1)
     (in_bom yes) (on_board yes)
     (uuid 00000000-0000-0000-0000-00005f6e6fcb)
-    (property "Reference" "#PWR0149" (id 0) (at 77.47 137.16 0)
+    (property "Reference" "#PWR0149" (id 0) (at 80.01 135.89 0)
       (effects (font (size 1.27 1.27)) hide)
     )
-    (property "Value" "GND" (id 1) (at 77.47 134.62 0))
-    (property "Footprint" "" (id 2) (at 77.47 130.81 0)
+    (property "Value" "GND" (id 1) (at 80.01 133.35 0))
+    (property "Footprint" "" (id 2) (at 80.01 129.54 0)
       (effects (font (size 1.27 1.27)) hide)
     )
-    (property "Datasheet" "" (id 3) (at 77.47 130.81 0)
+    (property "Datasheet" "" (id 3) (at 80.01 129.54 0)
       (effects (font (size 1.27 1.27)) hide)
     )
     (pin "1" (uuid d5ddcb68-69ee-47bb-947f-7c80028aafb7))
@@ -2027,33 +2035,17 @@
     (pin "1" (uuid 40147430-75f3-4901-978e-fbb941026134))
   )
 
-  (symbol (lib_id "power:GND") (at 113.03 68.58 0) (unit 1)
-    (in_bom yes) (on_board yes)
-    (uuid 00000000-0000-0000-0000-000061704865)
-    (property "Reference" "#PWR0156" (id 0) (at 113.03 74.93 0)
-      (effects (font (size 1.27 1.27)) hide)
-    )
-    (property "Value" "GND" (id 1) (at 113.03 72.39 0))
-    (property "Footprint" "" (id 2) (at 113.03 68.58 0)
-      (effects (font (size 1.27 1.27)) hide)
-    )
-    (property "Datasheet" "" (id 3) (at 113.03 68.58 0)
-      (effects (font (size 1.27 1.27)) hide)
-    )
-    (pin "1" (uuid 22962f40-7568-4570-bdcf-54a33dacd259))
-  )
-
-  (symbol (lib_id "power:-5V") (at 69.85 138.43 180) (unit 1)
+  (symbol (lib_id "power:-5V") (at 72.39 137.16 180) (unit 1)
     (in_bom yes) (on_board yes)
     (uuid 00000000-0000-0000-0000-00006176540d)
-    (property "Reference" "#PWR0109" (id 0) (at 69.85 140.97 0)
+    (property "Reference" "#PWR0109" (id 0) (at 72.39 139.7 0)
       (effects (font (size 1.27 1.27)) hide)
     )
-    (property "Value" "-5V" (id 1) (at 69.85 142.24 0))
-    (property "Footprint" "" (id 2) (at 69.85 138.43 0)
+    (property "Value" "-5V" (id 1) (at 72.39 140.97 0))
+    (property "Footprint" "" (id 2) (at 72.39 137.16 0)
       (effects (font (size 1.27 1.27)) hide)
     )
-    (property "Datasheet" "" (id 3) (at 69.85 138.43 0)
+    (property "Datasheet" "" (id 3) (at 72.39 137.16 0)
       (effects (font (size 1.27 1.27)) hide)
     )
     (pin "1" (uuid 53972f30-0e63-44ba-8151-bc725f5d8800))
@@ -2075,17 +2067,17 @@
     (pin "1" (uuid 9bd119a1-3f5e-4d3e-99ad-3842a1f9d5e1))
   )
 
-  (symbol (lib_id "power:+12V") (at 72.39 135.89 0) (unit 1)
+  (symbol (lib_id "power:+12V") (at 74.93 134.62 0) (unit 1)
     (in_bom yes) (on_board yes)
     (uuid 00000000-0000-0000-0000-000061774c31)
-    (property "Reference" "#PWR0111" (id 0) (at 72.39 139.7 0)
+    (property "Reference" "#PWR0111" (id 0) (at 74.93 138.43 0)
       (effects (font (size 1.27 1.27)) hide)
     )
-    (property "Value" "+12V" (id 1) (at 72.39 132.08 0))
-    (property "Footprint" "" (id 2) (at 72.39 135.89 0)
+    (property "Value" "+12V" (id 1) (at 74.93 130.81 0))
+    (property "Footprint" "" (id 2) (at 74.93 134.62 0)
       (effects (font (size 1.27 1.27)) hide)
     )
-    (property "Datasheet" "" (id 3) (at 72.39 135.89 0)
+    (property "Datasheet" "" (id 3) (at 74.93 134.62 0)
       (effects (font (size 1.27 1.27)) hide)
     )
     (pin "1" (uuid 5ae5dfb4-7aa0-4370-8d85-5e29d928370c))
diff --git a/RAMROM.kicad_sch b/RAMROM.kicad_sch
index d0c8b30..6e8e435 100644
--- a/RAMROM.kicad_sch
+++ b/RAMROM.kicad_sch
@@ -436,9 +436,15 @@
     )
   )
 
+  (junction (at 156.21 115.57) (diameter 0) (color 0 0 0 0)
+    (uuid 124ce659-22a5-4a84-b30d-e5ec849b4e60)
+  )
   (junction (at 265.43 111.76) (diameter 0) (color 0 0 0 0)
     (uuid 24fbbd33-4896-414c-ba79-167809dd0e90)
   )
+  (junction (at 166.37 120.65) (diameter 0) (color 0 0 0 0)
+    (uuid 36e0febe-ee03-4736-a347-1125cc37f35b)
+  )
   (junction (at 265.43 106.68) (diameter 0) (color 0 0 0 0)
     (uuid 54ea3c91-f824-4ee5-a744-4634dc7b3e93)
   )
@@ -454,9 +460,15 @@
   (junction (at 125.73 115.57) (diameter 0) (color 0 0 0 0)
     (uuid 856c0384-2dfc-47d2-a66c-a145c3149f14)
   )
+  (junction (at 156.21 120.65) (diameter 0) (color 0 0 0 0)
+    (uuid c0bd1545-59cd-44cf-988b-e20f15f0765b)
+  )
   (junction (at 135.89 120.65) (diameter 0) (color 0 0 0 0)
     (uuid cad44c02-7fd2-4e9a-b93a-e1b73d6a3ee6)
   )
+  (junction (at 146.05 115.57) (diameter 0) (color 0 0 0 0)
+    (uuid d3ee6eac-d3bf-4f23-b360-491cc573114b)
+  )
   (junction (at 275.59 111.76) (diameter 0) (color 0 0 0 0)
     (uuid da8cef22-8613-4e08-9b41-406c689b1603)
   )
@@ -471,10 +483,6 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 01422660-08c8-48f3-98ca-26cbe7f98f5b)
   )
-  (bus_entry (at 205.74 114.3) (size -2.54 2.54)
-    (stroke (width 0) (type default) (color 0 0 0 0))
-    (uuid 077985bd-c8a6-43b8-af30-1141a8334306)
-  )
   (bus_entry (at 69.85 118.11) (size 2.54 -2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 08bb8c58-1868-4a96-8aaa-36d9e141ec38)
@@ -655,10 +663,6 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 88fb8817-4ee2-4465-a9af-37fedc8b835b)
   )
-  (bus_entry (at 205.74 68.58) (size -2.54 2.54)
-    (stroke (width 0) (type default) (color 0 0 0 0))
-    (uuid 8aaa3345-c586-4729-9584-3137be876023)
-  )
   (bus_entry (at 69.85 90.17) (size 2.54 -2.54)
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 8b9c1722-a1fd-4391-b4b4-854b2cc1549f)
@@ -857,10 +861,6 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 02895aea-3803-4b34-aaa6-c68c91c22fb6)
   )
-  (bus (pts (xy 203.2 114.3) (xy 203.2 116.84))
-    (stroke (width 0) (type default) (color 0 0 0 0))
-    (uuid 02ef6ba5-01cf-4775-8ed2-2f5400027aad)
-  )
   (bus (pts (xy 69.85 74.93) (xy 69.85 77.47))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 0577beb6-fe9c-49d6-88c3-b0dc41d06ee3)
@@ -1041,10 +1041,6 @@
     (uuid 427ea469-a00c-48a4-8283-a7d9e027923d)
   )
 
-  (wire (pts (xy 210.82 114.3) (xy 205.74 114.3))
-    (stroke (width 0) (type default) (color 0 0 0 0))
-    (uuid 44c331f8-33e4-4ba1-bb1e-3071cc175bfd)
-  )
   (wire (pts (xy 210.82 76.2) (xy 205.74 76.2))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 4612f9f0-1343-4ba7-94dd-7d3e9fc08dad)
@@ -1130,6 +1126,10 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 60ca4740-3009-4486-93d6-c2502818122b)
   )
+  (wire (pts (xy 146.05 120.65) (xy 156.21 120.65))
+    (stroke (width 0) (type default) (color 0 0 0 0))
+    (uuid 631fad6b-39ab-4683-8f03-06d96c2cffa8)
+  )
   (wire (pts (xy 77.47 107.95) (xy 72.39 107.95))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 63ace593-9960-4666-bb08-47e6f085cee8)
@@ -1151,6 +1151,10 @@
     (uuid 6c3ce6af-6581-49de-9e44-109535b22e0f)
   )
 
+  (wire (pts (xy 146.05 115.57) (xy 156.21 115.57))
+    (stroke (width 0) (type default) (color 0 0 0 0))
+    (uuid 6cbd23ab-044d-4d6c-a58a-ab9085806702)
+  )
   (wire (pts (xy 210.82 66.04) (xy 205.74 66.04))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 6d401fdd-c1f6-4321-96c4-4843b6143be9)
@@ -1246,10 +1250,6 @@
     (uuid 840a2ba2-91b3-4f28-9c93-d358b4ac2daa)
   )
 
-  (wire (pts (xy 210.82 68.58) (xy 205.74 68.58))
-    (stroke (width 0) (type default) (color 0 0 0 0))
-    (uuid 845f389f-ac5c-4af4-aa4f-3b1355707a5f)
-  )
   (wire (pts (xy 77.47 87.63) (xy 72.39 87.63))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 874dbaf8-adf6-4f01-81a0-e037bac53346)
@@ -1300,10 +1300,6 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 93579848-3c8e-40db-a11f-27e2944f5ed1)
   )
-  (bus (pts (xy 203.2 71.12) (xy 203.2 76.2))
-    (stroke (width 0) (type default) (color 0 0 0 0))
-    (uuid 9379168f-48ca-4895-ae2a-f80925ada292)
-  )
   (bus (pts (xy 105.41 77.47) (xy 105.41 80.01))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 95bbe087-b236-4671-a367-256052c9a762)
@@ -1395,6 +1391,11 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid b13ec6aa-ced8-41c3-a177-f5f5e220aa52)
   )
+
+  (wire (pts (xy 156.21 115.57) (xy 166.37 115.57))
+    (stroke (width 0) (type default) (color 0 0 0 0))
+    (uuid b16f84f3-f0f9-4259-bc5f-fc9ce360b3ba)
+  )
   (bus (pts (xy 203.2 127) (xy 203.2 129.54))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid b1a9dace-99c0-47cc-a010-0c83878d27cc)
@@ -1462,7 +1463,7 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid c34f5129-9516-486b-b322-ada2d7baa6ba)
   )
-  (bus (pts (xy 203.2 68.58) (xy 203.2 71.12))
+  (bus (pts (xy 203.2 68.58) (xy 203.2 76.2))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid c35b1d90-5923-4fad-9651-259dd8ec2387)
   )
@@ -1484,6 +1485,10 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid c96fb61f-984b-4e24-874e-ad2f1e86f9d7)
   )
+  (wire (pts (xy 156.21 120.65) (xy 166.37 120.65))
+    (stroke (width 0) (type default) (color 0 0 0 0))
+    (uuid ca6a2ccc-3fc7-4ad2-a324-eb2962fcbcc3)
+  )
   (bus (pts (xy 203.2 96.52) (xy 203.2 99.06))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid cb84ef73-1c8b-46e2-9c22-3f1a4b886d2c)
@@ -1596,7 +1601,7 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid e9597133-3d67-41f8-aabc-5b61d8d3c3c1)
   )
-  (bus (pts (xy 203.2 116.84) (xy 203.2 119.38))
+  (bus (pts (xy 203.2 114.3) (xy 203.2 119.38))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid ec07f7cb-1f5a-4e22-8c50-0af8d56c5b06)
   )
@@ -1662,6 +1667,10 @@
     (uuid fe2b05f5-675b-44d0-956c-c5829b7c692a)
   )
 
+  (label "RA11" (at 210.82 71.12 180)
+    (effects (font (size 1.27 1.27)) (justify right bottom))
+    (uuid 008a590c-a485-4884-9974-ba5a4616cbf5)
+  )
   (label "A6" (at 210.82 38.1 180)
     (effects (font (size 1.27 1.27)) (justify right bottom))
     (uuid 01caafb3-af8a-4642-870c-c290b286d040)
@@ -1742,10 +1751,6 @@
     (effects (font (size 1.27 1.27)) (justify right bottom))
     (uuid 3afae848-3ba1-40f3-a73d-cfa98c2ff8b2)
   )
-  (label "A18" (at 210.82 114.3 180)
-    (effects (font (size 1.27 1.27)) (justify right bottom))
-    (uuid 3b199d04-ad2b-4bc0-b66c-8629e7796fdd)
-  )
   (label "D11" (at 231.14 104.14 0)
     (effects (font (size 1.27 1.27)) (justify left bottom))
     (uuid 4102ae0e-3d75-40cd-957b-0b4db5d3f5ee)
@@ -1762,14 +1767,14 @@
     (effects (font (size 1.27 1.27)) (justify right bottom))
     (uuid 4e1a7683-466d-4d67-bce5-496395f4b0d5)
   )
+  (label "RA8" (at 210.82 114.3 180)
+    (effects (font (size 1.27 1.27)) (justify right bottom))
+    (uuid 4f19a2b5-c53b-41d5-a9fa-fe21ce685968)
+  )
   (label "D4" (at 97.79 85.09 0)
     (effects (font (size 1.27 1.27)) (justify left bottom))
     (uuid 5125c4d9-cf5c-4fe5-9dc8-c939e40fcd6f)
   )
-  (label "A18" (at 210.82 68.58 180)
-    (effects (font (size 1.27 1.27)) (justify right bottom))
-    (uuid 56801e6d-c4ab-4f7b-8289-2119a52fa227)
-  )
   (label "D6" (at 97.79 87.63 0)
     (effects (font (size 1.27 1.27)) (justify left bottom))
     (uuid 58728297-c362-4c70-a751-4d60ffa81b1a)
@@ -1930,6 +1935,14 @@
     (effects (font (size 1.27 1.27)) (justify right bottom))
     (uuid b4203b01-a27f-440d-ad64-759637213d6e)
   )
+  (label "RA8" (at 210.82 68.58 180)
+    (effects (font (size 1.27 1.27)) (justify right bottom))
+    (uuid b60503d0-fd39-4ca5-a75c-73f752ee1e77)
+  )
+  (label "RA11" (at 210.82 119.38 180)
+    (effects (font (size 1.27 1.27)) (justify right bottom))
+    (uuid b6074471-20ba-4542-8f37-04be07af178d)
+  )
   (label "A15" (at 210.82 81.28 180)
     (effects (font (size 1.27 1.27)) (justify right bottom))
     (uuid b830f01d-0d9c-451a-9ac4-3e5744deb516)
@@ -2039,10 +2052,6 @@
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid 44cd273f-f3a1-4b9a-83a6-972b276409e1)
   )
-  (hierarchical_label "B" (shape input) (at 210.82 71.12 180)
-    (effects (font (size 1.27 1.27)) (justify right))
-    (uuid 495ef5b6-8285-4e01-ae9b-3f1afeab01f1)
-  )
   (hierarchical_label "~{OE}" (shape input) (at 97.79 135.89 0)
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid 504cb9e4-5572-4208-bc9d-30a7efff8b9a)
@@ -2075,10 +2084,6 @@
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid 91637a62-ec43-463a-9edc-420af478d9cb)
   )
-  (hierarchical_label "B" (shape input) (at 210.82 119.38 180)
-    (effects (font (size 1.27 1.27)) (justify right))
-    (uuid 9e40d895-a947-4b33-a248-0d0dda788e56)
-  )
   (hierarchical_label "~{RAS}" (shape input) (at 97.79 92.71 0)
     (effects (font (size 1.27 1.27)) (justify left))
     (uuid a1223b95-aa11-427a-b201-9190a86a68be)
@@ -2582,6 +2587,50 @@
     (pin "1" (uuid d590efe6-8b8a-49ca-a2b8-1c8b75eb0589))
   )
 
+  (symbol (lib_id "Device:C_Small") (at 166.37 118.11 0) (unit 1)
+    (in_bom yes) (on_board yes)
+    (uuid 288541b7-4c27-4a3d-a164-daf4be300490)
+    (property "Reference" "C51" (id 0) (at 167.64 116.84 0)
+      (effects (font (size 1.27 1.27)) (justify left))
+    )
+    (property "Value" "10u" (id 1) (at 167.64 119.38 0)
+      (effects (font (size 1.27 1.27)) (justify left))
+    )
+    (property "Footprint" "stdpads:C_0805" (id 2) (at 166.37 118.11 0)
+      (effects (font (size 1.27 1.27)) hide)
+    )
+    (property "Datasheet" "~" (id 3) (at 166.37 118.11 0)
+      (effects (font (size 1.27 1.27)) hide)
+    )
+    (property "LCSC Part" "C15850" (id 4) (at 166.37 118.11 0)
+      (effects (font (size 1.27 1.27)) hide)
+    )
+    (pin "1" (uuid 595404d6-c1b3-4bbd-91de-e465514e5162))
+    (pin "2" (uuid 6eac18c8-4e96-4799-97cb-b578f159a843))
+  )
+
+  (symbol (lib_id "Device:C_Small") (at 156.21 118.11 0) (unit 1)
+    (in_bom yes) (on_board yes)
+    (uuid 7ea41be9-54e8-47ac-8fd2-9913b35b7ed9)
+    (property "Reference" "C50" (id 0) (at 157.48 116.84 0)
+      (effects (font (size 1.27 1.27)) (justify left))
+    )
+    (property "Value" "10u" (id 1) (at 157.48 119.38 0)
+      (effects (font (size 1.27 1.27)) (justify left))
+    )
+    (property "Footprint" "stdpads:C_0805" (id 2) (at 156.21 118.11 0)
+      (effects (font (size 1.27 1.27)) hide)
+    )
+    (property "Datasheet" "~" (id 3) (at 156.21 118.11 0)
+      (effects (font (size 1.27 1.27)) hide)
+    )
+    (property "LCSC Part" "C15850" (id 4) (at 156.21 118.11 0)
+      (effects (font (size 1.27 1.27)) hide)
+    )
+    (pin "1" (uuid cb0ba17e-ff65-4279-b8b0-6f07c22a6481))
+    (pin "2" (uuid 2eb3ac88-11fd-4806-9c22-515eebc22488))
+  )
+
   (symbol (lib_id "power:GND") (at 275.59 111.76 0) (unit 1)
     (in_bom yes) (on_board yes)
     (uuid 98a835a6-2a9b-4a90-9b44-451f01d50d0c)
@@ -2620,19 +2669,19 @@
     (pin "2" (uuid c2cedebd-33c7-4889-9977-33f1c49e5e6f))
   )
 
-  (symbol (lib_id "power:GND") (at 146.05 120.65 0) (unit 1)
+  (symbol (lib_id "power:GND") (at 166.37 120.65 0) (unit 1)
     (in_bom yes) (on_board yes)
-    (uuid c7ccb402-2065-48b9-b3c6-8970af29b229)
-    (property "Reference" "#PWR0157" (id 0) (at 146.05 127 0)
+    (uuid dd546e6f-4429-48b7-9308-c650e538ed3c)
+    (property "Reference" "#PWR0132" (id 0) (at 166.37 127 0)
       (effects (font (size 1.27 1.27)) hide)
     )
-    (property "Value" "GND" (id 1) (at 146.05 124.46 0))
-    (property "Footprint" "" (id 2) (at 146.05 120.65 0)
+    (property "Value" "GND" (id 1) (at 166.37 124.46 0))
+    (property "Footprint" "" (id 2) (at 166.37 120.65 0)
       (effects (font (size 1.27 1.27)) hide)
     )
-    (property "Datasheet" "" (id 3) (at 146.05 120.65 0)
+    (property "Datasheet" "" (id 3) (at 166.37 120.65 0)
       (effects (font (size 1.27 1.27)) hide)
     )
-    (pin "1" (uuid d80dcff9-10e2-49a6-a256-1e79e51db9dc))
+    (pin "1" (uuid 4b037cb4-52c0-4073-8911-d1899fddecbc))
   )
 )
diff --git a/WarpSE-backups/WarpSE-2022-03-27_224248.zip b/WarpSE-backups/WarpSE-2022-03-27_224248.zip
new file mode 100644
index 0000000..f89d46e
Binary files /dev/null and b/WarpSE-backups/WarpSE-2022-03-27_224248.zip differ
diff --git a/WarpSE-backups/WarpSE-2022-03-27_225509.zip b/WarpSE-backups/WarpSE-2022-03-27_225509.zip
new file mode 100644
index 0000000..c4d610e
Binary files /dev/null and b/WarpSE-backups/WarpSE-2022-03-27_225509.zip differ
diff --git a/WarpSE-backups/WarpSE-2022-03-27_230357.zip b/WarpSE-backups/WarpSE-2022-03-27_230357.zip
new file mode 100644
index 0000000..a4523d8
Binary files /dev/null and b/WarpSE-backups/WarpSE-2022-03-27_230357.zip differ
diff --git a/WarpSE-backups/WarpSE-2022-03-27_234203.zip b/WarpSE-backups/WarpSE-2022-03-27_234203.zip
new file mode 100644
index 0000000..1eafe49
Binary files /dev/null and b/WarpSE-backups/WarpSE-2022-03-27_234203.zip differ
diff --git a/Warp-SE-cache.lib b/WarpSE-cache.lib
similarity index 100%
rename from Warp-SE-cache.lib
rename to WarpSE-cache.lib
diff --git a/WarpSE.4410A-gerber.zip b/WarpSE.4410A-gerber.zip
index bf595c9..c1c4463 100644
Binary files a/WarpSE.4410A-gerber.zip and b/WarpSE.4410A-gerber.zip differ
diff --git a/Warp-SE.kicad_pcb b/WarpSE.kicad_pcb
similarity index 81%
rename from Warp-SE.kicad_pcb
rename to WarpSE.kicad_pcb
index 3c057bf..0ed600c 100644
--- a/Warp-SE.kicad_pcb
+++ b/WarpSE.kicad_pcb
@@ -110,7 +110,7 @@
   (net 40 "/Buf/MacA22")
   (net 41 "/Buf/MacA23")
   (net 42 "/Control/Mac~{BERR}")
-  (net 43 "/MC68k/~{IPL}2")
+  (net 43 "/Control/~{IPL}2")
   (net 44 "/MC68k/~{IPL}1")
   (net 45 "/MC68k/~{IPL}0")
   (net 46 "/Control/MacE")
@@ -126,7 +126,7 @@
   (net 56 "unconnected-(J1-PadB26)")
   (net 57 "unconnected-(J1-PadB27)")
   (net 58 "unconnected-(J1-PadB28)")
-  (net 59 "unconnected-(J1-PadC5)")
+  (net 59 "/Control/Mac~{BR}")
   (net 60 "unconnected-(J1-PadC11)")
   (net 61 "/Buf/MacD0")
   (net 62 "/Buf/MacD1")
@@ -216,101 +216,98 @@
   (net 146 "/Buf/Acc~{R}W")
   (net 147 "unconnected-(U1-Pad39)")
   (net 148 "unconnected-(U1-Pad49)")
-  (net 149 "unconnected-(U1-Pad58)")
+  (net 149 "/Control/SW2")
   (net 150 "unconnected-(U1-Pad68)")
   (net 151 "Net-(Q1-Pad1)")
   (net 152 "unconnected-(U1-Pad71)")
-  (net 153 "unconnected-(U1-Pad72)")
-  (net 154 "unconnected-(U1-Pad73)")
-  (net 155 "Net-(U16-Pad2)")
-  (net 156 "Net-(U16-Pad3)")
-  (net 157 "Net-(U16-Pad4)")
-  (net 158 "Net-(U16-Pad5)")
-  (net 159 "Net-(U16-Pad6)")
-  (net 160 "Net-(U16-Pad7)")
-  (net 161 "Net-(U16-Pad8)")
-  (net 162 "Net-(U16-Pad9)")
-  (net 163 "/Buf/AccD6")
-  (net 164 "/Buf/AccD7")
-  (net 165 "/Buf/AccD5")
-  (net 166 "/Buf/AccD3")
-  (net 167 "/Buf/AccD1")
-  (net 168 "/Buf/AccD0")
-  (net 169 "/Buf/AccD2")
-  (net 170 "/Buf/AccD4")
-  (net 171 "/Buf/AccD14")
-  (net 172 "/Buf/AccD15")
-  (net 173 "/Buf/AccD13")
-  (net 174 "/Buf/AccD11")
-  (net 175 "/Buf/AccD9")
-  (net 176 "/Buf/AccD8")
-  (net 177 "/Buf/AccD10")
-  (net 178 "/Buf/AccD12")
-  (net 179 "/Buf/AccA1")
-  (net 180 "/Buf/AccA2")
-  (net 181 "/Buf/AccA3")
-  (net 182 "Net-(U13-Pad2)")
-  (net 183 "Net-(U13-Pad3)")
-  (net 184 "Net-(U13-Pad4)")
-  (net 185 "Net-(U13-Pad5)")
-  (net 186 "Net-(U13-Pad6)")
-  (net 187 "Net-(U13-Pad7)")
-  (net 188 "Net-(U13-Pad8)")
-  (net 189 "Net-(U13-Pad9)")
-  (net 190 "/Buf/AccA4")
-  (net 191 "unconnected-(U1-Pad99)")
-  (net 192 "unconnected-(U7-Pad12)")
-  (net 193 "unconnected-(U7-Pad13)")
-  (net 194 "unconnected-(U7-Pad15)")
-  (net 195 "unconnected-(U7-Pad17)")
-  (net 196 "unconnected-(U7-Pad19)")
-  (net 197 "unconnected-(U12-Pad10)")
-  (net 198 "Net-(U15-Pad2)")
-  (net 199 "Net-(U15-Pad3)")
-  (net 200 "Net-(U15-Pad4)")
-  (net 201 "Net-(U15-Pad5)")
-  (net 202 "Net-(U15-Pad6)")
-  (net 203 "Net-(U15-Pad7)")
-  (net 204 "Net-(U15-Pad8)")
-  (net 205 "Net-(U15-Pad9)")
-  (net 206 "Net-(U19-Pad2)")
-  (net 207 "Net-(U19-Pad3)")
-  (net 208 "Net-(U19-Pad4)")
-  (net 209 "Net-(U19-Pad5)")
-  (net 210 "Net-(U19-Pad6)")
-  (net 211 "Net-(U19-Pad7)")
-  (net 212 "Net-(U19-Pad8)")
-  (net 213 "Net-(U19-Pad9)")
-  (net 214 "Net-(U21-Pad2)")
-  (net 215 "Net-(U21-Pad3)")
-  (net 216 "Net-(U21-Pad4)")
-  (net 217 "Net-(U21-Pad5)")
-  (net 218 "Net-(U21-Pad6)")
-  (net 219 "Net-(U21-Pad7)")
-  (net 220 "Net-(U21-Pad8)")
-  (net 221 "Net-(U21-Pad9)")
-  (net 222 "Net-(R5-Pad1)")
-  (net 223 "Net-(C47-Pad1)")
-  (net 224 "unconnected-(U12-Pad11)")
-  (net 225 "unconnected-(U12-Pad12)")
-  (net 226 "unconnected-(U14-Pad11)")
-  (net 227 "unconnected-(U14-Pad18)")
-  (net 228 "unconnected-(U14-Pad21)")
-  (net 229 "unconnected-(U14-Pad22)")
-  (net 230 "unconnected-(U14-Pad28)")
-  (net 231 "/Prog/UTCK")
-  (net 232 "Net-(C48-Pad1)")
-  (net 233 "/Prog/JTAG~{OE}")
-  (net 234 "/Control/SW0")
-  (net 235 "Net-(R9-Pad2)")
-  (net 236 "/Prog/UTMS")
-  (net 237 "/Prog/UTDI")
-  (net 238 "unconnected-(U14-Pad29)")
-  (net 239 "unconnected-(U14-Pad30)")
-  (net 240 "unconnected-(U14-Pad31)")
-  (net 241 "unconnected-(U1-Pad92)")
-  (net 242 "/RAMROM/B")
-  (net 243 "unconnected-(J1-PadC4)")
+  (net 153 "/Control/Mac~{BG}")
+  (net 154 "Net-(U16-Pad2)")
+  (net 155 "Net-(U16-Pad3)")
+  (net 156 "Net-(U16-Pad4)")
+  (net 157 "Net-(U16-Pad5)")
+  (net 158 "Net-(U16-Pad6)")
+  (net 159 "Net-(U16-Pad7)")
+  (net 160 "Net-(U16-Pad8)")
+  (net 161 "Net-(U16-Pad9)")
+  (net 162 "/Buf/AccD6")
+  (net 163 "/Buf/AccD7")
+  (net 164 "/Buf/AccD5")
+  (net 165 "/Buf/AccD3")
+  (net 166 "/Buf/AccD1")
+  (net 167 "/Buf/AccD0")
+  (net 168 "/Buf/AccD2")
+  (net 169 "/Buf/AccD4")
+  (net 170 "/Buf/AccD14")
+  (net 171 "/Buf/AccD15")
+  (net 172 "/Buf/AccD13")
+  (net 173 "/Buf/AccD11")
+  (net 174 "/Buf/AccD9")
+  (net 175 "/Buf/AccD8")
+  (net 176 "/Buf/AccD10")
+  (net 177 "/Buf/AccD12")
+  (net 178 "/Buf/AccA1")
+  (net 179 "/Buf/AccA2")
+  (net 180 "/Buf/AccA3")
+  (net 181 "Net-(U13-Pad2)")
+  (net 182 "Net-(U13-Pad3)")
+  (net 183 "Net-(U13-Pad4)")
+  (net 184 "Net-(U13-Pad5)")
+  (net 185 "Net-(U13-Pad6)")
+  (net 186 "Net-(U13-Pad7)")
+  (net 187 "Net-(U13-Pad8)")
+  (net 188 "Net-(U13-Pad9)")
+  (net 189 "/Buf/AccA4")
+  (net 190 "unconnected-(U1-Pad99)")
+  (net 191 "unconnected-(U7-Pad12)")
+  (net 192 "unconnected-(U7-Pad13)")
+  (net 193 "unconnected-(U7-Pad15)")
+  (net 194 "unconnected-(U7-Pad17)")
+  (net 195 "unconnected-(U7-Pad19)")
+  (net 196 "unconnected-(U12-Pad10)")
+  (net 197 "Net-(U15-Pad2)")
+  (net 198 "Net-(U15-Pad3)")
+  (net 199 "Net-(U15-Pad4)")
+  (net 200 "Net-(U15-Pad5)")
+  (net 201 "Net-(U15-Pad6)")
+  (net 202 "Net-(U15-Pad7)")
+  (net 203 "Net-(U15-Pad8)")
+  (net 204 "Net-(U15-Pad9)")
+  (net 205 "Net-(U19-Pad2)")
+  (net 206 "Net-(U19-Pad3)")
+  (net 207 "Net-(U19-Pad4)")
+  (net 208 "Net-(U19-Pad5)")
+  (net 209 "Net-(U19-Pad6)")
+  (net 210 "Net-(U19-Pad7)")
+  (net 211 "Net-(U19-Pad8)")
+  (net 212 "Net-(U19-Pad9)")
+  (net 213 "Net-(U21-Pad2)")
+  (net 214 "Net-(U21-Pad3)")
+  (net 215 "Net-(U21-Pad4)")
+  (net 216 "Net-(U21-Pad5)")
+  (net 217 "Net-(U21-Pad6)")
+  (net 218 "Net-(U21-Pad7)")
+  (net 219 "Net-(U21-Pad8)")
+  (net 220 "Net-(U21-Pad9)")
+  (net 221 "Net-(R5-Pad1)")
+  (net 222 "Net-(C47-Pad1)")
+  (net 223 "unconnected-(U12-Pad11)")
+  (net 224 "unconnected-(U12-Pad12)")
+  (net 225 "unconnected-(U14-Pad11)")
+  (net 226 "unconnected-(U14-Pad18)")
+  (net 227 "unconnected-(U14-Pad21)")
+  (net 228 "unconnected-(U14-Pad22)")
+  (net 229 "unconnected-(U14-Pad28)")
+  (net 230 "/Prog/UTCK")
+  (net 231 "Net-(C48-Pad1)")
+  (net 232 "/Prog/JTAG~{OE}")
+  (net 233 "/Control/SW0")
+  (net 234 "Net-(R9-Pad2)")
+  (net 235 "/Prog/UTMS")
+  (net 236 "/Prog/UTDI")
+  (net 237 "unconnected-(U14-Pad29)")
+  (net 238 "unconnected-(U14-Pad30)")
+  (net 239 "unconnected-(U14-Pad31)")
+  (net 240 "unconnected-(J1-PadC4)")
 
   (footprint "stdpads:C_0805" (layer "F.Cu")
     (tedit 5F02840E) (tstamp 00000000-0000-0000-0000-000061aa276d)
@@ -533,7 +530,7 @@
   )
 
   (footprint "stdpads:TQFP-100_14x14mm_P0.5mm" (layer "F.Cu")
-    (tedit 608E5AA2) (tstamp 00000000-0000-0000-0000-000061aa27ee)
+    (tedit 623FE1FB) (tstamp 00000000-0000-0000-0000-000061aa27ee)
     (at 119.25 109.1 90)
     (descr "TQFP, 100 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_gullwing_generator.py")
     (tags "TQFP QFP")
@@ -709,13 +706,13 @@
     (pad "57" smd roundrect locked (at 3 -7.6625 180) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 3 "+3V3") (pinfunction "VCCINT") (pintype "power_in") (tstamp 4f91f338-1b66-422c-86de-03e72a556e0f))
     (pad "58" smd roundrect locked (at 2.5 -7.6625 180) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 149 "unconnected-(U1-Pad58)") (pinfunction "P58") (pintype "bidirectional") (tstamp cdf9c545-8a1d-4c9a-8d6a-5787de4538f2))
+      (net 112 "/Clk.sch/CK25EN") (pinfunction "P58") (pintype "bidirectional") (tstamp cdf9c545-8a1d-4c9a-8d6a-5787de4538f2))
     (pad "59" smd roundrect locked (at 2 -7.6625 180) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 112 "/Clk.sch/CK25EN") (pinfunction "P59") (pintype "bidirectional") (tstamp 937dab94-1c82-403f-b9ab-95532eabf8a6))
+      (net 90 "/Clk.sch/CK20EN") (pinfunction "P59") (pintype "bidirectional") (tstamp 937dab94-1c82-403f-b9ab-95532eabf8a6))
     (pad "60" smd roundrect locked (at 1.5 -7.6625 180) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 89 "/Control/SW1") (pinfunction "P60") (pintype "bidirectional") (tstamp 6748843f-41d5-4d2f-a4ff-b76c5102b250))
     (pad "61" smd roundrect locked (at 1 -7.6625 180) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 90 "/Clk.sch/CK20EN") (pinfunction "P61") (pintype "bidirectional") (tstamp e8a4c937-a024-46ca-a71e-46b3ca37d2a2))
+      (net 233 "/Control/SW0") (pinfunction "P61") (pintype "bidirectional") (tstamp e8a4c937-a024-46ca-a71e-46b3ca37d2a2))
     (pad "62" smd roundrect locked (at 0.5 -7.6625 180) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pinfunction "GND") (pintype "power_in") (tstamp 2e51e057-1947-4d21-a3f6-9eb8462b44ff))
     (pad "63" smd roundrect locked (at 0 -7.6625 180) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
@@ -727,7 +724,7 @@
     (pad "66" smd roundrect locked (at -1.5 -7.6625 180) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 108 "/Control/U~{WE}") (pinfunction "P66") (pintype "bidirectional") (tstamp 4113668a-7174-4879-9d8e-b0a439f81192))
     (pad "67" smd roundrect locked (at -2 -7.6625 180) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 234 "/Control/SW0") (pinfunction "P67") (pintype "bidirectional") (tstamp cd1e8667-4c4a-4a7a-bf06-848b85a7d65f))
+      (net 149 "/Control/SW2") (pinfunction "P67") (pintype "bidirectional") (tstamp cd1e8667-4c4a-4a7a-bf06-848b85a7d65f))
     (pad "68" smd roundrect locked (at -2.5 -7.6625 180) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 150 "unconnected-(U1-Pad68)") (pinfunction "P68") (pintype "bidirectional") (tstamp a0a5d0a4-a7cb-4b68-a7f6-f52edd783f00))
     (pad "69" smd roundrect locked (at -3 -7.6625 180) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
@@ -737,9 +734,9 @@
     (pad "71" smd roundrect locked (at -4 -7.6625 180) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 152 "unconnected-(U1-Pad71)") (pinfunction "P71") (pintype "bidirectional") (tstamp 5de699a0-8e78-42e4-a21b-25af88842003))
     (pad "72" smd roundrect locked (at -4.5 -7.6625 180) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 153 "unconnected-(U1-Pad72)") (pinfunction "P72") (pintype "bidirectional") (tstamp f79df066-f4c1-4a01-aa2d-a465c0fa33b0))
+      (net 59 "/Control/Mac~{BR}") (pinfunction "P72") (pintype "bidirectional") (tstamp f79df066-f4c1-4a01-aa2d-a465c0fa33b0))
     (pad "73" smd roundrect locked (at -5 -7.6625 180) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 154 "unconnected-(U1-Pad73)") (pinfunction "P73") (pintype "bidirectional") (tstamp cdae85c4-a027-406f-ad74-320f917fab2f))
+      (net 153 "/Control/Mac~{BG}") (pinfunction "P73") (pintype "bidirectional") (tstamp cdae85c4-a027-406f-ad74-320f917fab2f))
     (pad "74" smd roundrect locked (at -5.5 -7.6625 180) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 33 "/Control/Mac~{VMA}") (pinfunction "P74") (pintype "bidirectional") (tstamp 8aa21d04-edaf-4abd-8ed5-fa1bdaf504cc))
     (pad "75" smd roundrect locked (at -6 -7.6625 180) (size 1.475 0.3) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
@@ -777,21 +774,21 @@
     (pad "91" smd roundrect locked (at -7.6625 1.5 180) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 25 "/Control/~{RESET}") (pinfunction "P91") (pintype "bidirectional") (tstamp 89b5ccc3-c10b-48d7-a86f-36cbfc26b498))
     (pad "92" smd roundrect locked (at -7.6625 2 180) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 241 "unconnected-(U1-Pad92)") (pinfunction "P92") (pintype "bidirectional") (tstamp f242e5e3-fb96-4828-ab2b-04c6df1b3046))
+      (net 43 "/Control/~{IPL}2") (pinfunction "P92") (pintype "bidirectional") (tstamp f242e5e3-fb96-4828-ab2b-04c6df1b3046))
     (pad "93" smd roundrect locked (at -7.6625 2.5 180) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 95 "/Control/Acc~{VPA}") (pinfunction "P93") (pintype "bidirectional") (tstamp 8477c54f-22cc-4b78-9377-85bfa7ffd131))
     (pad "94" smd roundrect locked (at -7.6625 3 180) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 179 "/Buf/AccA1") (pinfunction "P94") (pintype "bidirectional") (tstamp e008843d-783a-4912-8036-cea298d035ca))
+      (net 178 "/Buf/AccA1") (pinfunction "P94") (pintype "bidirectional") (tstamp e008843d-783a-4912-8036-cea298d035ca))
     (pad "95" smd roundrect locked (at -7.6625 3.5 180) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 180 "/Buf/AccA2") (pinfunction "P95") (pintype "bidirectional") (tstamp 9010a9ab-0ecd-4366-be3d-95924dbe5786))
+      (net 179 "/Buf/AccA2") (pinfunction "P95") (pintype "bidirectional") (tstamp 9010a9ab-0ecd-4366-be3d-95924dbe5786))
     (pad "96" smd roundrect locked (at -7.6625 4 180) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 181 "/Buf/AccA3") (pinfunction "P96") (pintype "bidirectional") (tstamp e747b6bf-8bb2-4713-a684-4bd43a977081))
+      (net 180 "/Buf/AccA3") (pinfunction "P96") (pintype "bidirectional") (tstamp e747b6bf-8bb2-4713-a684-4bd43a977081))
     (pad "97" smd roundrect locked (at -7.6625 4.5 180) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 190 "/Buf/AccA4") (pinfunction "P97") (pintype "bidirectional") (tstamp 7897ad60-f470-43ac-8982-287a56c6d927))
+      (net 189 "/Buf/AccA4") (pinfunction "P97") (pintype "bidirectional") (tstamp 7897ad60-f470-43ac-8982-287a56c6d927))
     (pad "98" smd roundrect locked (at -7.6625 5 180) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 3 "+3V3") (pinfunction "VCCINT") (pintype "power_in") (tstamp c1350963-8af9-4d3c-9668-da2f12b3a445))
     (pad "99" smd roundrect locked (at -7.6625 5.5 180) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 191 "unconnected-(U1-Pad99)") (pinfunction "I/O/GSR") (pintype "bidirectional+no_connect") (tstamp 8dbc5ef0-d2ba-49ab-ac7c-cb38e68d68e6))
+      (net 190 "unconnected-(U1-Pad99)") (pinfunction "I/O/GSR") (pintype "bidirectional+no_connect") (tstamp 8dbc5ef0-d2ba-49ab-ac7c-cb38e68d68e6))
     (pad "100" smd roundrect locked (at -7.6625 6 180) (size 0.3 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pinfunction "GND") (pintype "power_in") (tstamp d467f626-5f23-4eb8-9884-b7e763482b73))
     (model "${KICAD6_3DMODEL_DIR}/Package_QFP.3dshapes/TQFP-100_14x14mm_P0.5mm.wrl"
@@ -1028,13 +1025,13 @@
     (pad "1" smd roundrect locked (at -3.175 -8.255 270) (size 3.048 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 2 "+5V") (pinfunction "VDD") (pintype "power_in") (tstamp ec659530-bc58-4925-bb03-b6f93ed0c61b))
     (pad "2" smd roundrect locked (at -3.175 -6.985 270) (size 3.048 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 172 "/Buf/AccD15") (pinfunction "I/O0") (pintype "bidirectional") (tstamp f487e740-61ea-48e8-a052-40ab7e8322a0))
+      (net 171 "/Buf/AccD15") (pinfunction "I/O0") (pintype "bidirectional") (tstamp f487e740-61ea-48e8-a052-40ab7e8322a0))
     (pad "3" smd roundrect locked (at -3.175 -5.715 270) (size 3.048 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 173 "/Buf/AccD13") (pinfunction "I/O1") (pintype "bidirectional") (tstamp 669e6a27-8017-46ad-8cea-e2126d2bf40f))
+      (net 172 "/Buf/AccD13") (pinfunction "I/O1") (pintype "bidirectional") (tstamp 669e6a27-8017-46ad-8cea-e2126d2bf40f))
     (pad "4" smd roundrect locked (at -3.175 -4.445 270) (size 3.048 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 174 "/Buf/AccD11") (pinfunction "I/O2") (pintype "bidirectional") (tstamp 9c7706f6-1591-43a2-b50e-44d393a156e4))
+      (net 173 "/Buf/AccD11") (pinfunction "I/O2") (pintype "bidirectional") (tstamp 9c7706f6-1591-43a2-b50e-44d393a156e4))
     (pad "5" smd roundrect locked (at -3.175 -3.175 270) (size 3.048 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 175 "/Buf/AccD9") (pinfunction "I/O3") (pintype "bidirectional") (tstamp 5c804a35-7bd9-40cb-add0-ed5e8ecff2da))
+      (net 174 "/Buf/AccD9") (pinfunction "I/O3") (pintype "bidirectional") (tstamp 5c804a35-7bd9-40cb-add0-ed5e8ecff2da))
     (pad "6" smd roundrect locked (at -3.175 -1.905 270) (size 3.048 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 108 "/Control/U~{WE}") (pinfunction "~{WE}") (pintype "input") (tstamp 30d34aad-e85d-4c5c-a39f-8e5efbe6f997))
     (pad "7" smd roundrect locked (at -3.175 -0.635 270) (size 3.048 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
@@ -1072,13 +1069,13 @@
     (pad "23" smd roundrect locked (at 3.175 -1.905 270) (size 3.048 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 128 "/Control/~{CAS}") (pinfunction "~{CAS}") (pintype "input") (tstamp 80da54a9-3a34-42f0-81b7-962ace4dc8d4))
     (pad "24" smd roundrect locked (at 3.175 -3.175 270) (size 3.048 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 176 "/Buf/AccD8") (pinfunction "I/O4") (pintype "bidirectional") (tstamp cd1df91d-2a2f-4083-802b-b7f9ad374be4))
+      (net 175 "/Buf/AccD8") (pinfunction "I/O4") (pintype "bidirectional") (tstamp cd1df91d-2a2f-4083-802b-b7f9ad374be4))
     (pad "25" smd roundrect locked (at 3.175 -4.445 270) (size 3.048 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 177 "/Buf/AccD10") (pinfunction "I/O5") (pintype "bidirectional") (tstamp 10424698-82f9-4556-a0e6-68a0c7553e40))
+      (net 176 "/Buf/AccD10") (pinfunction "I/O5") (pintype "bidirectional") (tstamp 10424698-82f9-4556-a0e6-68a0c7553e40))
     (pad "26" smd roundrect locked (at 3.175 -5.715 270) (size 3.048 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 178 "/Buf/AccD12") (pinfunction "I/O6") (pintype "bidirectional") (tstamp 4fa96ba9-e75e-4bca-b52c-826bb9f921f3))
+      (net 177 "/Buf/AccD12") (pinfunction "I/O6") (pintype "bidirectional") (tstamp 4fa96ba9-e75e-4bca-b52c-826bb9f921f3))
     (pad "27" smd roundrect locked (at 3.175 -6.985 270) (size 3.048 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 171 "/Buf/AccD14") (pinfunction "I/O7") (pintype "bidirectional") (tstamp 11831d8e-3347-4947-a7ab-520a174c1695))
+      (net 170 "/Buf/AccD14") (pinfunction "I/O7") (pintype "bidirectional") (tstamp 11831d8e-3347-4947-a7ab-520a174c1695))
     (pad "28" smd roundrect locked (at 3.175 -8.255 270) (size 3.048 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pinfunction "GND") (pintype "power_in") (tstamp d5aaefbd-0670-426a-9974-3956d6cdf7ff))
     (model "${KICAD6_3DMODEL_DIR}/Package_SO.3dshapes/SOIC-28W_7.5x18.7mm_P1.27mm.wrl"
@@ -1089,267 +1086,257 @@
   )
 
   (footprint "stdpads:DIN41612_R_3x32_Male_Vertical_THT" (layer "F.Cu")
-    (tedit 5EAFCB80) (tstamp 00000000-0000-0000-0000-000061aa2ab1)
+    (tedit 623FF44F) (tstamp 00000000-0000-0000-0000-000061aa2ab1)
     (at 205.74 129.54 180)
     (descr "DIN41612 connector, type R, Vertical, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf")
     (tags "DIN 41612 IEC 60603 R")
     (property "Sheetfile" "PDS.kicad_sch")
     (property "Sheetname" "PDS")
-    (path "/00000000-0000-0000-0000-00005f6da71d/00000000-0000-0000-0000-00005f6e0ccf")
+    (path "/00000000-0000-0000-0000-00005f6da71d/00000000-0000-0000-0000-00005f6df4c8")
     (attr through_hole)
     (fp_text reference "J1" (at 2.54 -9.13) (layer "F.SilkS") hide
       (effects (font (size 1 1) (thickness 0.15)))
-      (tstamp 99ebd9bc-6773-4cb2-9a09-e94482736750)
+      (tstamp eb31df50-a295-4dda-b5ba-1a5aa3b04c63)
     )
     (fp_text value "MacSEPDS" (at 2.54 87.87) (layer "F.Fab")
       (effects (font (size 1 1) (thickness 0.15)))
-      (tstamp ae83a3f6-3f75-4909-b54e-02391a5e8602)
+      (tstamp ee950767-c415-4afa-99a3-b8f647d86b7a)
     )
     (fp_text user "${REFERENCE}" (at 2.54 39.37) (layer "F.Fab")
       (effects (font (size 1 1) (thickness 0.15)))
-      (tstamp 0abaabe0-e7db-4fc8-b2b0-fe7ae0b1eae0)
+      (tstamp ce71bfd1-7a89-4f8c-a5c0-41c5060d3ce4)
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-    (pad "" np_thru_hole circle locked (at 2.24 -5.63 180) (size 2.85 2.85) (drill 2.85) (layers *.Cu *.Mask) (tstamp bd218b5b-0c7d-458d-9d01-a0723c28b2da))
-    (pad "" np_thru_hole circle locked (at 2.24 84.37 180) (size 2.85 2.85) (drill 2.85) (layers *.Cu *.Mask) (tstamp eb2e8f88-6666-4b23-8f1f-70a3cae8636f))
-    (pad "A1" thru_hole roundrect locked (at 0 0 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.1612896774)
-      (net 8 "unconnected-(J1-PadA1)") (pinfunction "FC2") (pintype "unspecified+no_connect") (tstamp 148174b7-7efa-4489-a0ea-89e88c442fc2))
-    (pad "A2" thru_hole circle locked (at 0 2.54 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
-      (net 9 "unconnected-(J1-PadA2)") (pinfunction "FC1") (pintype "unspecified+no_connect") (tstamp b4e4378f-da7a-4b0d-a311-112f88b6c2d1))
-    (pad "A3" thru_hole circle locked (at 0 5.08 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
-      (net 10 "unconnected-(J1-PadA3)") (pinfunction "FC0") (pintype "unspecified+no_connect") (tstamp cbb339df-bc51-4ff2-aa60-5cc0518d506b))
-    (pad "A4" thru_hole circle locked (at 0 7.62 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
-      (net 11 "/Buf/MacA1") (pinfunction "A1") (pintype "unspecified") (tstamp d4b3a93e-2f0d-4412-8ae4-d938c3a4f800))
-    (pad "A5" thru_hole circle locked (at 0 10.16 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
-      (net 12 "/Buf/MacA2") (pinfunction "A2") (pintype "unspecified") (tstamp db31b4e9-30cf-4eea-bc89-40dbdbf42a40))
-    (pad "A6" thru_hole circle locked (at 0 12.7 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
-      (net 13 "/Buf/MacA3") (pinfunction "A3") (pintype "unspecified") (tstamp 60249ebb-6b7b-4153-8411-2ccc1e5f161c))
-    (pad "A7" thru_hole circle locked (at 0 15.24 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
-      (net 14 "/Buf/MacA4") (pinfunction "A4") (pintype "unspecified") (tstamp bb36aab6-164f-47d7-9da9-8421cd04a65d))
-    (pad "A8" thru_hole circle locked (at 0 17.78 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
-      (net 15 "/Buf/MacA5") (pinfunction "A5") (pintype "unspecified") (tstamp db7b030b-e22e-44ce-abd8-114e0a010e6f))
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-      (net 17 "/Buf/MacA7") (pinfunction "A7") (pintype "unspecified") (tstamp cf1bd08d-b86c-4970-a2aa-284cb05a919c))
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+      (net 31 "/Control/Mac~{DTACK}") (pinfunction "~{DTACK}") (pintype "unspecified") (tstamp 0ca58393-50dd-4bea-8a11-5b5ec61cffbc))
+    (pad "C7" thru_hole circle (at 5.08 15.24 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
+      (net 30 "/Buf/Mac~{R}W") (pinfunction "R~{W}") (pintype "unspecified") (tstamp f951d8ba-2c57-4629-a1bf-5ec3bcd4746c))
+    (pad "C8" thru_hole circle (at 5.08 17.78 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
+      (net 29 "/Control/Mac~{LDS}") (pinfunction "~{LDS}") (pintype "unspecified") (tstamp 7e53fa29-6a07-4611-acbc-c6bd5b9df1b3))
+    (pad "C9" thru_hole circle (at 5.08 20.32 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
+      (net 28 "/Control/Mac~{UDS}") (pinfunction "~{UDS}") (pintype "unspecified") (tstamp 7a27ae7d-7aa2-406d-81fa-8922f63c26f6))
+    (pad "C10" thru_hole circle (at 5.08 22.86 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
+      (net 27 "/Control/Mac~{AS}") (pinfunction "~{AS}") (pintype "unspecified") (tstamp 84ee4f02-6c31-4de6-9e06-5cb5a45b190b))
+    (pad "C11" thru_hole circle (at 5.08 25.4 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
+      (net 60 "unconnected-(J1-PadC11)") (pinfunction "~{PMCYC}") (pintype "unspecified+no_connect") (tstamp 854b4f0a-c0bd-42a9-bad4-63d50b689749))
+    (pad "C12" thru_hole circle (at 5.08 27.94 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
+      (net 25 "/Control/~{RESET}") (pinfunction "~{RESET}") (pintype "unspecified") (tstamp 40bde622-1027-4119-83e2-88a571ae6eb4))
+    (pad "C13" thru_hole circle (at 5.08 30.48 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
+      (net 2 "+5V") (pinfunction "+5V") (pintype "unspecified") (tstamp 21e5c940-d2ba-4952-b543-29de6dd4472d))
+    (pad "C14" thru_hole circle (at 5.08 33.02 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
+      (net 61 "/Buf/MacD0") (pinfunction "D0") (pintype "unspecified") (tstamp ccd508cf-447a-4117-9e63-a3740cbc795f))
+    (pad "C15" thru_hole circle (at 5.08 35.56 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
+      (net 62 "/Buf/MacD1") (pinfunction "D1") (pintype "unspecified") (tstamp 90e90294-66c8-4609-bfb0-8ff86480f89d))
+    (pad "C16" thru_hole circle (at 5.08 38.1 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
+      (net 63 "/Buf/MacD2") (pinfunction "D2") (pintype "unspecified") (tstamp 2ab4147c-5e37-45aa-b469-1ae5cc32940e))
+    (pad "C17" thru_hole circle (at 5.08 40.64 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
+      (net 64 "/Buf/MacD3") (pinfunction "D3") (pintype "unspecified") (tstamp 19415055-5e7b-470c-aef0-d28867224113))
+    (pad "C18" thru_hole circle (at 5.08 43.18 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
+      (net 65 "/Buf/MacD4") (pinfunction "D4") (pintype "unspecified") (tstamp 5ab0f846-44d7-4a8f-b8bd-fc0ff41065a2))
+    (pad "C19" thru_hole circle (at 5.08 45.72 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
+      (net 66 "/Buf/MacD5") (pinfunction "D5") (pintype "unspecified") (tstamp aeb9fb16-f6db-4390-9129-2378f922d8fe))
+    (pad "C20" thru_hole circle (at 5.08 48.26 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
+      (net 67 "/Buf/MacD6") (pinfunction "D6") (pintype "unspecified") (tstamp c2f62722-6a25-4e24-a3b6-49be9d7b375c))
+    (pad "C21" thru_hole circle (at 5.08 50.8 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
+      (net 68 "/Buf/MacD7") (pinfunction "D7") (pintype "unspecified") (tstamp 6799179c-83f3-417e-9b57-5189f7ad96cb))
+    (pad "C22" thru_hole circle (at 5.08 53.34 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
+      (net 69 "/Buf/MacD8") (pinfunction "D8") (pintype "unspecified") (tstamp a2f553d7-6fab-4e5f-9980-3d30da6e00f2))
+    (pad "C23" thru_hole circle (at 5.08 55.88 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
+      (net 70 "/Buf/MacD9") (pinfunction "D9") (pintype "unspecified") (tstamp df8786b5-7d99-4e08-bab6-df8aad12e736))
+    (pad "C24" thru_hole circle (at 5.08 58.42 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
+      (net 71 "/Buf/MacD10") (pinfunction "D10") (pintype "unspecified") (tstamp eeea8724-953c-4ef0-a7e9-191339ad0956))
+    (pad "C25" thru_hole circle (at 5.08 60.96 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
+      (net 72 "/Buf/MacD11") (pinfunction "D11") (pintype "unspecified") (tstamp 76b043de-f422-4edf-9684-453b8ade44c1))
+    (pad "C26" thru_hole circle (at 5.08 63.5 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
+      (net 73 "/Buf/MacD12") (pinfunction "D12") (pintype "unspecified") (tstamp 7f09ef6e-d48f-4bc4-aa15-fa132066dea4))
+    (pad "C27" thru_hole circle (at 5.08 66.04 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
+      (net 74 "/Buf/MacD13") (pinfunction "D13") (pintype "unspecified") (tstamp 83fd4113-ac5e-410a-b16d-10e01a6f5dee))
+    (pad "C28" thru_hole circle (at 5.08 68.58 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
+      (net 75 "/Buf/MacD14") (pinfunction "D14") (pintype "unspecified") (tstamp 1be3b479-25be-42a9-b844-3bdf064d4e71))
+    (pad "C29" thru_hole circle (at 5.08 71.12 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
+      (net 76 "/Buf/MacD15") (pinfunction "D15") (pintype "unspecified") (tstamp 2cd8d581-723b-40c1-996d-16e806b7842c))
+    (pad "C30" thru_hole circle (at 5.08 73.66 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
+      (net 1 "GND") (pinfunction "GND") (pintype "unspecified") (tstamp 32c7e4c1-c154-4442-b7cc-43cdc290bad0))
+    (pad "C31" thru_hole circle (at 5.08 76.2 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
+      (net 77 "unconnected-(J1-PadC31)") (pinfunction "NC") (pintype "unspecified+no_connect") (tstamp f68d433e-19a1-4fef-8264-f50196ee2eab))
+    (pad "C32" thru_hole circle (at 5.08 78.74 180) (size 1.55 1.55) (drill 1) (layers *.Cu *.Mask)
+      (net 6 "-12V") (pinfunction "-12V") (pintype "unspecified") (tstamp 2c36cd1f-f34a-4954-9e62-8bcebfc23a52))
+    (model "${KICAD6_3DMODEL_DIR}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x32_P2.54mm_Vertical.wrl"
+      (offset (xyz 0 0 -1.6))
       (scale (xyz 1 1 1))
-      (rotate (xyz 0 0 0))
+      (rotate (xyz 0 180 0))
+    )
+    (model "${KICAD6_3DMODEL_DIR}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x32_P2.54mm_Vertical.wrl"
+      (offset (xyz 2.54 0 -1.6))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 180 0))
+    )
+    (model "${KICAD6_3DMODEL_DIR}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x32_P2.54mm_Vertical.wrl"
+      (offset (xyz 5.08 0 -1.6))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 180 0))
     )
   )
 
@@ -1455,21 +1442,21 @@
     (pad "11" smd roundrect locked (at 2.925 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 102 "/Buf/ADoutLE1") (pinfunction "~{LE}") (pintype "input") (tstamp dbb1cf9f-40b6-43aa-b239-a8fdf686407f))
     (pad "12" smd roundrect locked (at 2.275 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 162 "Net-(U16-Pad9)") (pinfunction "Q7") (pintype "tri_state") (tstamp 41538273-2874-4c63-aae7-e36a6af6770c))
+      (net 161 "Net-(U16-Pad9)") (pinfunction "Q7") (pintype "tri_state") (tstamp 41538273-2874-4c63-aae7-e36a6af6770c))
     (pad "13" smd roundrect locked (at 1.625 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 161 "Net-(U16-Pad8)") (pinfunction "Q6") (pintype "tri_state") (tstamp 81b1104a-bee7-4456-883c-d213d6f66a7c))
+      (net 160 "Net-(U16-Pad8)") (pinfunction "Q6") (pintype "tri_state") (tstamp 81b1104a-bee7-4456-883c-d213d6f66a7c))
     (pad "14" smd roundrect locked (at 0.975 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 160 "Net-(U16-Pad7)") (pinfunction "Q5") (pintype "tri_state") (tstamp b9a5a3f2-2526-4e06-9fcb-94514624247c))
+      (net 159 "Net-(U16-Pad7)") (pinfunction "Q5") (pintype "tri_state") (tstamp b9a5a3f2-2526-4e06-9fcb-94514624247c))
     (pad "15" smd roundrect locked (at 0.325 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 159 "Net-(U16-Pad6)") (pinfunction "Q4") (pintype "tri_state") (tstamp 37c9130d-a898-4b7a-b7e5-f17655f3583c))
+      (net 158 "Net-(U16-Pad6)") (pinfunction "Q4") (pintype "tri_state") (tstamp 37c9130d-a898-4b7a-b7e5-f17655f3583c))
     (pad "16" smd roundrect locked (at -0.325 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 158 "Net-(U16-Pad5)") (pinfunction "Q3") (pintype "tri_state") (tstamp d70b5307-ccfb-4193-8f99-6e9bbdd3e368))
+      (net 157 "Net-(U16-Pad5)") (pinfunction "Q3") (pintype "tri_state") (tstamp d70b5307-ccfb-4193-8f99-6e9bbdd3e368))
     (pad "17" smd roundrect locked (at -0.975 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 157 "Net-(U16-Pad4)") (pinfunction "Q2") (pintype "tri_state") (tstamp 777fa452-b9c0-42cc-85c1-5539c64aebd6))
+      (net 156 "Net-(U16-Pad4)") (pinfunction "Q2") (pintype "tri_state") (tstamp 777fa452-b9c0-42cc-85c1-5539c64aebd6))
     (pad "18" smd roundrect locked (at -1.625 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 156 "Net-(U16-Pad3)") (pinfunction "Q1") (pintype "tri_state") (tstamp 574f3bbd-9c4e-4619-a54b-f709ef0424dd))
+      (net 155 "Net-(U16-Pad3)") (pinfunction "Q1") (pintype "tri_state") (tstamp 574f3bbd-9c4e-4619-a54b-f709ef0424dd))
     (pad "19" smd roundrect locked (at -2.275 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 155 "Net-(U16-Pad2)") (pinfunction "Q0") (pintype "tri_state") (tstamp 21c2ec32-a187-4dd0-a29f-3467f1a22778))
+      (net 154 "Net-(U16-Pad2)") (pinfunction "Q0") (pintype "tri_state") (tstamp 21c2ec32-a187-4dd0-a29f-3467f1a22778))
     (pad "20" smd roundrect locked (at -2.925 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 2 "+5V") (pinfunction "Vcc") (pintype "power_in") (tstamp 9e86c834-6cfc-4610-84e4-62c4680fb507))
     (model "${KICAD6_3DMODEL_DIR}/Package_SO.3dshapes/TSSOP-20_4.4x6.5mm_P0.65mm.wrl"
@@ -2133,41 +2120,41 @@
     (pad "1" smd roundrect locked (at -2.925 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pinfunction "~{OE}") (pintype "input") (tstamp 5cab60fc-a830-419a-8ae3-6825a7c2ff4d))
     (pad "2" smd roundrect locked (at -2.275 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 172 "/Buf/AccD15") (pinfunction "D0") (pintype "input") (tstamp 2b377fd7-5633-48ff-bffb-4372c656aab3))
+      (net 171 "/Buf/AccD15") (pinfunction "D0") (pintype "input") (tstamp 2b377fd7-5633-48ff-bffb-4372c656aab3))
     (pad "3" smd roundrect locked (at -1.625 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 171 "/Buf/AccD14") (pinfunction "D1") (pintype "input") (tstamp fb02330c-655f-4779-bacc-e54da67f9a4d))
+      (net 170 "/Buf/AccD14") (pinfunction "D1") (pintype "input") (tstamp fb02330c-655f-4779-bacc-e54da67f9a4d))
     (pad "4" smd roundrect locked (at -0.975 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 173 "/Buf/AccD13") (pinfunction "D2") (pintype "input") (tstamp bf5b73e2-c3b5-4c17-97cc-cadd5cee3570))
+      (net 172 "/Buf/AccD13") (pinfunction "D2") (pintype "input") (tstamp bf5b73e2-c3b5-4c17-97cc-cadd5cee3570))
     (pad "5" smd roundrect locked (at -0.325 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 178 "/Buf/AccD12") (pinfunction "D3") (pintype "input") (tstamp 18186462-fac5-44e8-bf56-a49b410a39c5))
+      (net 177 "/Buf/AccD12") (pinfunction "D3") (pintype "input") (tstamp 18186462-fac5-44e8-bf56-a49b410a39c5))
     (pad "6" smd roundrect locked (at 0.325 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 174 "/Buf/AccD11") (pinfunction "D4") (pintype "input") (tstamp d3f468a3-31bc-4516-9d4a-4ce2a2f5e2e6))
+      (net 173 "/Buf/AccD11") (pinfunction "D4") (pintype "input") (tstamp d3f468a3-31bc-4516-9d4a-4ce2a2f5e2e6))
     (pad "7" smd roundrect locked (at 0.975 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 177 "/Buf/AccD10") (pinfunction "D5") (pintype "input") (tstamp 3a8ee9ba-3dbf-4d4f-a629-59991b26b30d))
+      (net 176 "/Buf/AccD10") (pinfunction "D5") (pintype "input") (tstamp 3a8ee9ba-3dbf-4d4f-a629-59991b26b30d))
     (pad "8" smd roundrect locked (at 1.625 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 175 "/Buf/AccD9") (pinfunction "D6") (pintype "input") (tstamp af7df8d1-ef76-4410-b77c-c816ed611265))
+      (net 174 "/Buf/AccD9") (pinfunction "D6") (pintype "input") (tstamp af7df8d1-ef76-4410-b77c-c816ed611265))
     (pad "9" smd roundrect locked (at 2.275 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 176 "/Buf/AccD8") (pinfunction "D7") (pintype "input") (tstamp 1ee50ec9-678e-4a6f-a491-f18467be5f8b))
+      (net 175 "/Buf/AccD8") (pinfunction "D7") (pintype "input") (tstamp 1ee50ec9-678e-4a6f-a491-f18467be5f8b))
     (pad "10" smd roundrect locked (at 2.925 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pinfunction "GND") (pintype "power_in") (tstamp 28b268fd-6c80-45a9-899b-58bca4052ea0))
     (pad "11" smd roundrect locked (at 2.925 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 102 "/Buf/ADoutLE1") (pinfunction "~{LE}") (pintype "input") (tstamp 2b87b625-cebf-4f09-9678-7bfe458d82d8))
     (pad "12" smd roundrect locked (at 2.275 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 221 "Net-(U21-Pad9)") (pinfunction "Q7") (pintype "tri_state") (tstamp 153f3854-d9eb-48e5-88ca-8f721c2f0f28))
+      (net 220 "Net-(U21-Pad9)") (pinfunction "Q7") (pintype "tri_state") (tstamp 153f3854-d9eb-48e5-88ca-8f721c2f0f28))
     (pad "13" smd roundrect locked (at 1.625 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 220 "Net-(U21-Pad8)") (pinfunction "Q6") (pintype "tri_state") (tstamp cf100840-35af-4ec9-828b-617f7509fd6b))
+      (net 219 "Net-(U21-Pad8)") (pinfunction "Q6") (pintype "tri_state") (tstamp cf100840-35af-4ec9-828b-617f7509fd6b))
     (pad "14" smd roundrect locked (at 0.975 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 219 "Net-(U21-Pad7)") (pinfunction "Q5") (pintype "tri_state") (tstamp afd134e0-70da-4044-aded-c30f52da7035))
+      (net 218 "Net-(U21-Pad7)") (pinfunction "Q5") (pintype "tri_state") (tstamp afd134e0-70da-4044-aded-c30f52da7035))
     (pad "15" smd roundrect locked (at 0.325 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 218 "Net-(U21-Pad6)") (pinfunction "Q4") (pintype "tri_state") (tstamp cd5e68be-7c50-4185-a37b-545c38d3ea77))
+      (net 217 "Net-(U21-Pad6)") (pinfunction "Q4") (pintype "tri_state") (tstamp cd5e68be-7c50-4185-a37b-545c38d3ea77))
     (pad "16" smd roundrect locked (at -0.325 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 217 "Net-(U21-Pad5)") (pinfunction "Q3") (pintype "tri_state") (tstamp 39cbc029-c8cd-4709-845c-ff4ad73b792f))
+      (net 216 "Net-(U21-Pad5)") (pinfunction "Q3") (pintype "tri_state") (tstamp 39cbc029-c8cd-4709-845c-ff4ad73b792f))
     (pad "17" smd roundrect locked (at -0.975 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 216 "Net-(U21-Pad4)") (pinfunction "Q2") (pintype "tri_state") (tstamp 20353c55-0e82-479f-bf59-21dee1c21c1f))
+      (net 215 "Net-(U21-Pad4)") (pinfunction "Q2") (pintype "tri_state") (tstamp 20353c55-0e82-479f-bf59-21dee1c21c1f))
     (pad "18" smd roundrect locked (at -1.625 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 215 "Net-(U21-Pad3)") (pinfunction "Q1") (pintype "tri_state") (tstamp 6bdd8da1-562e-4e2b-9371-d9df3e7bb9de))
+      (net 214 "Net-(U21-Pad3)") (pinfunction "Q1") (pintype "tri_state") (tstamp 6bdd8da1-562e-4e2b-9371-d9df3e7bb9de))
     (pad "19" smd roundrect locked (at -2.275 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 214 "Net-(U21-Pad2)") (pinfunction "Q0") (pintype "tri_state") (tstamp 4475185c-fac0-4d58-b438-8c4a17e62800))
+      (net 213 "Net-(U21-Pad2)") (pinfunction "Q0") (pintype "tri_state") (tstamp 4475185c-fac0-4d58-b438-8c4a17e62800))
     (pad "20" smd roundrect locked (at -2.925 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 2 "+5V") (pinfunction "Vcc") (pintype "power_in") (tstamp 67e2f597-715d-4b54-991a-499a27ee9427))
     (model "${KICAD6_3DMODEL_DIR}/Package_SO.3dshapes/TSSOP-20_4.4x6.5mm_P0.65mm.wrl"
@@ -2215,41 +2202,41 @@
     (pad "1" smd roundrect locked (at -2.925 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pinfunction "~{OE}") (pintype "input") (tstamp 0eecb19e-07f6-4113-b7ba-63ff299b6fda))
     (pad "2" smd roundrect locked (at -2.275 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 164 "/Buf/AccD7") (pinfunction "D0") (pintype "input") (tstamp 478a6b54-94c2-45bb-8801-459c173ee3f6))
+      (net 163 "/Buf/AccD7") (pinfunction "D0") (pintype "input") (tstamp 478a6b54-94c2-45bb-8801-459c173ee3f6))
     (pad "3" smd roundrect locked (at -1.625 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 163 "/Buf/AccD6") (pinfunction "D1") (pintype "input") (tstamp 2607000a-a698-4750-b27a-e04092e1207c))
+      (net 162 "/Buf/AccD6") (pinfunction "D1") (pintype "input") (tstamp 2607000a-a698-4750-b27a-e04092e1207c))
     (pad "4" smd roundrect locked (at -0.975 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 165 "/Buf/AccD5") (pinfunction "D2") (pintype "input") (tstamp 212dba09-de0a-4700-aa49-096474c063fd))
+      (net 164 "/Buf/AccD5") (pinfunction "D2") (pintype "input") (tstamp 212dba09-de0a-4700-aa49-096474c063fd))
     (pad "5" smd roundrect locked (at -0.325 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 170 "/Buf/AccD4") (pinfunction "D3") (pintype "input") (tstamp c0e3f5ee-edf0-47a8-a52f-e925dab549e9))
+      (net 169 "/Buf/AccD4") (pinfunction "D3") (pintype "input") (tstamp c0e3f5ee-edf0-47a8-a52f-e925dab549e9))
     (pad "6" smd roundrect locked (at 0.325 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 166 "/Buf/AccD3") (pinfunction "D4") (pintype "input") (tstamp c4e14cc1-6bd6-4ab5-90c1-075b0edfcfd6))
+      (net 165 "/Buf/AccD3") (pinfunction "D4") (pintype "input") (tstamp c4e14cc1-6bd6-4ab5-90c1-075b0edfcfd6))
     (pad "7" smd roundrect locked (at 0.975 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 169 "/Buf/AccD2") (pinfunction "D5") (pintype "input") (tstamp 5b22f467-4b8f-419b-9576-87fc0198091c))
+      (net 168 "/Buf/AccD2") (pinfunction "D5") (pintype "input") (tstamp 5b22f467-4b8f-419b-9576-87fc0198091c))
     (pad "8" smd roundrect locked (at 1.625 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 167 "/Buf/AccD1") (pinfunction "D6") (pintype "input") (tstamp f08f2552-7550-4fa7-aa4c-d3fb9740e318))
+      (net 166 "/Buf/AccD1") (pinfunction "D6") (pintype "input") (tstamp f08f2552-7550-4fa7-aa4c-d3fb9740e318))
     (pad "9" smd roundrect locked (at 2.275 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 168 "/Buf/AccD0") (pinfunction "D7") (pintype "input") (tstamp de95acaf-7546-40d5-b6d9-0c184d5304a4))
+      (net 167 "/Buf/AccD0") (pinfunction "D7") (pintype "input") (tstamp de95acaf-7546-40d5-b6d9-0c184d5304a4))
     (pad "10" smd roundrect locked (at 2.925 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pinfunction "GND") (pintype "power_in") (tstamp 70fd601b-196b-445a-90a3-b933d9609c44))
     (pad "11" smd roundrect locked (at 2.925 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 102 "/Buf/ADoutLE1") (pinfunction "~{LE}") (pintype "input") (tstamp 64084fd5-6eab-4356-bab7-9b5dd04f980a))
     (pad "12" smd roundrect locked (at 2.275 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 213 "Net-(U19-Pad9)") (pinfunction "Q7") (pintype "tri_state") (tstamp 576d1234-d0d2-4948-ba27-ac4426a5769c))
+      (net 212 "Net-(U19-Pad9)") (pinfunction "Q7") (pintype "tri_state") (tstamp 576d1234-d0d2-4948-ba27-ac4426a5769c))
     (pad "13" smd roundrect locked (at 1.625 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 212 "Net-(U19-Pad8)") (pinfunction "Q6") (pintype "tri_state") (tstamp 6bd7dde8-b059-4843-90ad-7102f138014b))
+      (net 211 "Net-(U19-Pad8)") (pinfunction "Q6") (pintype "tri_state") (tstamp 6bd7dde8-b059-4843-90ad-7102f138014b))
     (pad "14" smd roundrect locked (at 0.975 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 211 "Net-(U19-Pad7)") (pinfunction "Q5") (pintype "tri_state") (tstamp 7e592db9-81f6-4915-8e68-7ab9da53e026))
+      (net 210 "Net-(U19-Pad7)") (pinfunction "Q5") (pintype "tri_state") (tstamp 7e592db9-81f6-4915-8e68-7ab9da53e026))
     (pad "15" smd roundrect locked (at 0.325 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 210 "Net-(U19-Pad6)") (pinfunction "Q4") (pintype "tri_state") (tstamp d01e867b-6c59-4d63-bc2f-aa7f154c6d29))
+      (net 209 "Net-(U19-Pad6)") (pinfunction "Q4") (pintype "tri_state") (tstamp d01e867b-6c59-4d63-bc2f-aa7f154c6d29))
     (pad "16" smd roundrect locked (at -0.325 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 209 "Net-(U19-Pad5)") (pinfunction "Q3") (pintype "tri_state") (tstamp 9c5b6cd2-cdb7-4c09-a9a1-794b38770bd5))
+      (net 208 "Net-(U19-Pad5)") (pinfunction "Q3") (pintype "tri_state") (tstamp 9c5b6cd2-cdb7-4c09-a9a1-794b38770bd5))
     (pad "17" smd roundrect locked (at -0.975 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 208 "Net-(U19-Pad4)") (pinfunction "Q2") (pintype "tri_state") (tstamp 0f5a76bc-1ca1-494c-98b8-620881904cc5))
+      (net 207 "Net-(U19-Pad4)") (pinfunction "Q2") (pintype "tri_state") (tstamp 0f5a76bc-1ca1-494c-98b8-620881904cc5))
     (pad "18" smd roundrect locked (at -1.625 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 207 "Net-(U19-Pad3)") (pinfunction "Q1") (pintype "tri_state") (tstamp 2ecb55af-8b52-461a-ae9a-8c15fa1220fa))
+      (net 206 "Net-(U19-Pad3)") (pinfunction "Q1") (pintype "tri_state") (tstamp 2ecb55af-8b52-461a-ae9a-8c15fa1220fa))
     (pad "19" smd roundrect locked (at -2.275 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 206 "Net-(U19-Pad2)") (pinfunction "Q0") (pintype "tri_state") (tstamp 2c46df1c-38d5-46d5-8cc1-7a46ef4e30a4))
+      (net 205 "Net-(U19-Pad2)") (pinfunction "Q0") (pintype "tri_state") (tstamp 2c46df1c-38d5-46d5-8cc1-7a46ef4e30a4))
     (pad "20" smd roundrect locked (at -2.925 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 2 "+5V") (pinfunction "Vcc") (pintype "power_in") (tstamp 16bed042-b143-4950-afef-d32814b3fee5))
     (model "${KICAD6_3DMODEL_DIR}/Package_SO.3dshapes/TSSOP-20_4.4x6.5mm_P0.65mm.wrl"
@@ -2317,21 +2304,21 @@
     (pad "11" smd roundrect locked (at 2.925 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 100 "/Buf/DinLE") (pinfunction "~{LE}") (pintype "input") (tstamp ac682979-294f-4173-ba8f-eec84ee884b3))
     (pad "12" smd roundrect locked (at 2.275 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 176 "/Buf/AccD8") (pinfunction "Q7") (pintype "tri_state") (tstamp a80b5f93-0d9f-4852-8797-cccea85d4f04))
+      (net 175 "/Buf/AccD8") (pinfunction "Q7") (pintype "tri_state") (tstamp a80b5f93-0d9f-4852-8797-cccea85d4f04))
     (pad "13" smd roundrect locked (at 1.625 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 175 "/Buf/AccD9") (pinfunction "Q6") (pintype "tri_state") (tstamp 672b7132-44f4-4869-b409-de2cc213fe25))
+      (net 174 "/Buf/AccD9") (pinfunction "Q6") (pintype "tri_state") (tstamp 672b7132-44f4-4869-b409-de2cc213fe25))
     (pad "14" smd roundrect locked (at 0.975 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 177 "/Buf/AccD10") (pinfunction "Q5") (pintype "tri_state") (tstamp b68919b7-e00c-44e4-aeae-fa4fec7dcbee))
+      (net 176 "/Buf/AccD10") (pinfunction "Q5") (pintype "tri_state") (tstamp b68919b7-e00c-44e4-aeae-fa4fec7dcbee))
     (pad "15" smd roundrect locked (at 0.325 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 174 "/Buf/AccD11") (pinfunction "Q4") (pintype "tri_state") (tstamp 6a6c5c79-b363-41f0-a52e-f48b6c0a16d0))
+      (net 173 "/Buf/AccD11") (pinfunction "Q4") (pintype "tri_state") (tstamp 6a6c5c79-b363-41f0-a52e-f48b6c0a16d0))
     (pad "16" smd roundrect locked (at -0.325 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 178 "/Buf/AccD12") (pinfunction "Q3") (pintype "tri_state") (tstamp 395c1555-7061-4a70-94e3-e43b97e06976))
+      (net 177 "/Buf/AccD12") (pinfunction "Q3") (pintype "tri_state") (tstamp 395c1555-7061-4a70-94e3-e43b97e06976))
     (pad "17" smd roundrect locked (at -0.975 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 173 "/Buf/AccD13") (pinfunction "Q2") (pintype "tri_state") (tstamp 029562ac-786f-499b-9c1a-ff49e7c0dc88))
+      (net 172 "/Buf/AccD13") (pinfunction "Q2") (pintype "tri_state") (tstamp 029562ac-786f-499b-9c1a-ff49e7c0dc88))
     (pad "18" smd roundrect locked (at -1.625 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 171 "/Buf/AccD14") (pinfunction "Q1") (pintype "tri_state") (tstamp 5d3611bb-f89a-44f2-b057-cce26aeb41c5))
+      (net 170 "/Buf/AccD14") (pinfunction "Q1") (pintype "tri_state") (tstamp 5d3611bb-f89a-44f2-b057-cce26aeb41c5))
     (pad "19" smd roundrect locked (at -2.275 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 172 "/Buf/AccD15") (pinfunction "Q0") (pintype "tri_state") (tstamp 18b55a51-c16b-459e-a931-12db11a8cd2b))
+      (net 171 "/Buf/AccD15") (pinfunction "Q0") (pintype "tri_state") (tstamp 18b55a51-c16b-459e-a931-12db11a8cd2b))
     (pad "20" smd roundrect locked (at -2.925 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 2 "+5V") (pinfunction "Vcc") (pintype "power_in") (tstamp 2fcd4b55-5973-46ca-9907-6b862d6cb8d7))
     (model "${KICAD6_3DMODEL_DIR}/Package_SO.3dshapes/TSSOP-20_4.4x6.5mm_P0.65mm.wrl"
@@ -2379,21 +2366,21 @@
     (pad "1" smd roundrect locked (at -2.925 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 98 "/Buf/Dout~{OE}") (pinfunction "~{OE}") (pintype "input") (tstamp b52003f2-1fc1-448b-87ef-8f69b8ecc342))
     (pad "2" smd roundrect locked (at -2.275 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 214 "Net-(U21-Pad2)") (pinfunction "D0") (pintype "input") (tstamp c4a21fd3-a6ae-44a9-bc78-0e41f084f553))
+      (net 213 "Net-(U21-Pad2)") (pinfunction "D0") (pintype "input") (tstamp c4a21fd3-a6ae-44a9-bc78-0e41f084f553))
     (pad "3" smd roundrect locked (at -1.625 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 215 "Net-(U21-Pad3)") (pinfunction "D1") (pintype "input") (tstamp 1552cb74-e6ef-475b-be3a-ac1973bcee7d))
+      (net 214 "Net-(U21-Pad3)") (pinfunction "D1") (pintype "input") (tstamp 1552cb74-e6ef-475b-be3a-ac1973bcee7d))
     (pad "4" smd roundrect locked (at -0.975 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 216 "Net-(U21-Pad4)") (pinfunction "D2") (pintype "input") (tstamp b0d88b62-d36e-4c30-ae05-19c227bab69d))
+      (net 215 "Net-(U21-Pad4)") (pinfunction "D2") (pintype "input") (tstamp b0d88b62-d36e-4c30-ae05-19c227bab69d))
     (pad "5" smd roundrect locked (at -0.325 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 217 "Net-(U21-Pad5)") (pinfunction "D3") (pintype "input") (tstamp a73ff104-0c6d-45d0-bae7-11c93ea99539))
+      (net 216 "Net-(U21-Pad5)") (pinfunction "D3") (pintype "input") (tstamp a73ff104-0c6d-45d0-bae7-11c93ea99539))
     (pad "6" smd roundrect locked (at 0.325 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 218 "Net-(U21-Pad6)") (pinfunction "D4") (pintype "input") (tstamp 681a9760-4754-4abd-8a6a-2f3a3629407e))
+      (net 217 "Net-(U21-Pad6)") (pinfunction "D4") (pintype "input") (tstamp 681a9760-4754-4abd-8a6a-2f3a3629407e))
     (pad "7" smd roundrect locked (at 0.975 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 219 "Net-(U21-Pad7)") (pinfunction "D5") (pintype "input") (tstamp c8568d2f-e1ae-470b-b325-7b36a73728f4))
+      (net 218 "Net-(U21-Pad7)") (pinfunction "D5") (pintype "input") (tstamp c8568d2f-e1ae-470b-b325-7b36a73728f4))
     (pad "8" smd roundrect locked (at 1.625 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 220 "Net-(U21-Pad8)") (pinfunction "D6") (pintype "input") (tstamp dbc23591-a27c-4594-80fa-27289fc43c4a))
+      (net 219 "Net-(U21-Pad8)") (pinfunction "D6") (pintype "input") (tstamp dbc23591-a27c-4594-80fa-27289fc43c4a))
     (pad "9" smd roundrect locked (at 2.275 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 221 "Net-(U21-Pad9)") (pinfunction "D7") (pintype "input") (tstamp c0911561-f597-436b-ba64-8b9fe00d794c))
+      (net 220 "Net-(U21-Pad9)") (pinfunction "D7") (pintype "input") (tstamp c0911561-f597-436b-ba64-8b9fe00d794c))
     (pad "10" smd roundrect locked (at 2.925 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pinfunction "GND") (pintype "power_in") (tstamp 1eac5711-3d08-4bd2-b36d-1f40e1383058))
     (pad "11" smd roundrect locked (at 2.925 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
@@ -2481,21 +2468,21 @@
     (pad "11" smd roundrect locked (at 2.925 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 100 "/Buf/DinLE") (pinfunction "~{LE}") (pintype "input") (tstamp 9d82db09-acf7-4995-b9e2-ee4880ef807f))
     (pad "12" smd roundrect locked (at 2.275 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 168 "/Buf/AccD0") (pinfunction "Q7") (pintype "tri_state") (tstamp 3d0b06cd-f307-46fd-b638-838f0316ae0f))
+      (net 167 "/Buf/AccD0") (pinfunction "Q7") (pintype "tri_state") (tstamp 3d0b06cd-f307-46fd-b638-838f0316ae0f))
     (pad "13" smd roundrect locked (at 1.625 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 167 "/Buf/AccD1") (pinfunction "Q6") (pintype "tri_state") (tstamp 8d1f65e7-9d1e-4fd0-9610-34411f179160))
+      (net 166 "/Buf/AccD1") (pinfunction "Q6") (pintype "tri_state") (tstamp 8d1f65e7-9d1e-4fd0-9610-34411f179160))
     (pad "14" smd roundrect locked (at 0.975 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 169 "/Buf/AccD2") (pinfunction "Q5") (pintype "tri_state") (tstamp f40d48e8-598d-4ccc-8a0b-def9b39c654d))
+      (net 168 "/Buf/AccD2") (pinfunction "Q5") (pintype "tri_state") (tstamp f40d48e8-598d-4ccc-8a0b-def9b39c654d))
     (pad "15" smd roundrect locked (at 0.325 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 166 "/Buf/AccD3") (pinfunction "Q4") (pintype "tri_state") (tstamp 0274c4ac-b8cc-42b3-ab74-385180d83b7d))
+      (net 165 "/Buf/AccD3") (pinfunction "Q4") (pintype "tri_state") (tstamp 0274c4ac-b8cc-42b3-ab74-385180d83b7d))
     (pad "16" smd roundrect locked (at -0.325 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 170 "/Buf/AccD4") (pinfunction "Q3") (pintype "tri_state") (tstamp 7a2cf07e-8b4e-471c-853b-e681f5ef8c1b))
+      (net 169 "/Buf/AccD4") (pinfunction "Q3") (pintype "tri_state") (tstamp 7a2cf07e-8b4e-471c-853b-e681f5ef8c1b))
     (pad "17" smd roundrect locked (at -0.975 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 165 "/Buf/AccD5") (pinfunction "Q2") (pintype "tri_state") (tstamp f5b367d8-199c-4a5a-b20b-3aecf0b0b366))
+      (net 164 "/Buf/AccD5") (pinfunction "Q2") (pintype "tri_state") (tstamp f5b367d8-199c-4a5a-b20b-3aecf0b0b366))
     (pad "18" smd roundrect locked (at -1.625 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 163 "/Buf/AccD6") (pinfunction "Q1") (pintype "tri_state") (tstamp 61a48cf0-fcc6-4766-9f6f-ad4fcb43e34c))
+      (net 162 "/Buf/AccD6") (pinfunction "Q1") (pintype "tri_state") (tstamp 61a48cf0-fcc6-4766-9f6f-ad4fcb43e34c))
     (pad "19" smd roundrect locked (at -2.275 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 164 "/Buf/AccD7") (pinfunction "Q0") (pintype "tri_state") (tstamp ba0b98a1-d42d-473c-bfbf-d58e82afedc2))
+      (net 163 "/Buf/AccD7") (pinfunction "Q0") (pintype "tri_state") (tstamp ba0b98a1-d42d-473c-bfbf-d58e82afedc2))
     (pad "20" smd roundrect locked (at -2.925 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 2 "+5V") (pinfunction "Vcc") (pintype "power_in") (tstamp 1d6843cd-8a7c-42cf-aaaf-29ee23fe78c8))
     (model "${KICAD6_3DMODEL_DIR}/Package_SO.3dshapes/TSSOP-20_4.4x6.5mm_P0.65mm.wrl"
@@ -2543,21 +2530,21 @@
     (pad "1" smd roundrect locked (at -2.925 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 98 "/Buf/Dout~{OE}") (pinfunction "~{OE}") (pintype "input") (tstamp ea7f0e0d-02e9-4f29-8d50-6b70163a30dd))
     (pad "2" smd roundrect locked (at -2.275 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 206 "Net-(U19-Pad2)") (pinfunction "D0") (pintype "input") (tstamp 6aa2b36c-c06c-4e6e-910b-f1d002c87bc0))
+      (net 205 "Net-(U19-Pad2)") (pinfunction "D0") (pintype "input") (tstamp 6aa2b36c-c06c-4e6e-910b-f1d002c87bc0))
     (pad "3" smd roundrect locked (at -1.625 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 207 "Net-(U19-Pad3)") (pinfunction "D1") (pintype "input") (tstamp d5509e75-efbb-4959-ac05-d328117ce896))
+      (net 206 "Net-(U19-Pad3)") (pinfunction "D1") (pintype "input") (tstamp d5509e75-efbb-4959-ac05-d328117ce896))
     (pad "4" smd roundrect locked (at -0.975 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 208 "Net-(U19-Pad4)") (pinfunction "D2") (pintype "input") (tstamp f6f81491-79d4-4e44-a7f0-ebfd1730f516))
+      (net 207 "Net-(U19-Pad4)") (pinfunction "D2") (pintype "input") (tstamp f6f81491-79d4-4e44-a7f0-ebfd1730f516))
     (pad "5" smd roundrect locked (at -0.325 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 209 "Net-(U19-Pad5)") (pinfunction "D3") (pintype "input") (tstamp e90ed0fc-d9ab-4625-ad20-0cdb50e55861))
+      (net 208 "Net-(U19-Pad5)") (pinfunction "D3") (pintype "input") (tstamp e90ed0fc-d9ab-4625-ad20-0cdb50e55861))
     (pad "6" smd roundrect locked (at 0.325 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 210 "Net-(U19-Pad6)") (pinfunction "D4") (pintype "input") (tstamp 2114a500-e565-430d-8f37-11feef5e819d))
+      (net 209 "Net-(U19-Pad6)") (pinfunction "D4") (pintype "input") (tstamp 2114a500-e565-430d-8f37-11feef5e819d))
     (pad "7" smd roundrect locked (at 0.975 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 211 "Net-(U19-Pad7)") (pinfunction "D5") (pintype "input") (tstamp 145654d5-d88f-4ea3-813d-a69e135bc641))
+      (net 210 "Net-(U19-Pad7)") (pinfunction "D5") (pintype "input") (tstamp 145654d5-d88f-4ea3-813d-a69e135bc641))
     (pad "8" smd roundrect locked (at 1.625 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 212 "Net-(U19-Pad8)") (pinfunction "D6") (pintype "input") (tstamp b0376c07-e6aa-4806-b092-98376a86393f))
+      (net 211 "Net-(U19-Pad8)") (pinfunction "D6") (pintype "input") (tstamp b0376c07-e6aa-4806-b092-98376a86393f))
     (pad "9" smd roundrect locked (at 2.275 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 213 "Net-(U19-Pad9)") (pinfunction "D7") (pintype "input") (tstamp 9d982260-d8a6-4c83-907d-1ac6a6481d5f))
+      (net 212 "Net-(U19-Pad9)") (pinfunction "D7") (pintype "input") (tstamp 9d982260-d8a6-4c83-907d-1ac6a6481d5f))
     (pad "10" smd roundrect locked (at 2.925 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pinfunction "GND") (pintype "power_in") (tstamp 380d8034-62e9-44fe-9b1c-5017f20e4828))
     (pad "11" smd roundrect locked (at 2.925 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
@@ -2645,21 +2632,21 @@
     (pad "11" smd roundrect locked (at 2.925 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 102 "/Buf/ADoutLE1") (pinfunction "~{LE}") (pintype "input") (tstamp f1094bec-16e4-47ce-82c8-290bc5dbd1e9))
     (pad "12" smd roundrect locked (at 2.275 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 205 "Net-(U15-Pad9)") (pinfunction "Q7") (pintype "tri_state") (tstamp 69fee2b6-79d2-4e30-8f1d-940d76f81724))
+      (net 204 "Net-(U15-Pad9)") (pinfunction "Q7") (pintype "tri_state") (tstamp 69fee2b6-79d2-4e30-8f1d-940d76f81724))
     (pad "13" smd roundrect locked (at 1.625 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 204 "Net-(U15-Pad8)") (pinfunction "Q6") (pintype "tri_state") (tstamp 46527809-00be-48b3-9e9f-fa56a0b54fbf))
+      (net 203 "Net-(U15-Pad8)") (pinfunction "Q6") (pintype "tri_state") (tstamp 46527809-00be-48b3-9e9f-fa56a0b54fbf))
     (pad "14" smd roundrect locked (at 0.975 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 203 "Net-(U15-Pad7)") (pinfunction "Q5") (pintype "tri_state") (tstamp 0992eb2a-0f40-407a-820e-66ce9d87ed54))
+      (net 202 "Net-(U15-Pad7)") (pinfunction "Q5") (pintype "tri_state") (tstamp 0992eb2a-0f40-407a-820e-66ce9d87ed54))
     (pad "15" smd roundrect locked (at 0.325 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 202 "Net-(U15-Pad6)") (pinfunction "Q4") (pintype "tri_state") (tstamp 94dab3c0-eca7-4516-9595-b544f7592a01))
+      (net 201 "Net-(U15-Pad6)") (pinfunction "Q4") (pintype "tri_state") (tstamp 94dab3c0-eca7-4516-9595-b544f7592a01))
     (pad "16" smd roundrect locked (at -0.325 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 201 "Net-(U15-Pad5)") (pinfunction "Q3") (pintype "tri_state") (tstamp 4c35e7c2-4ef8-47a8-aa87-457b49ab6507))
+      (net 200 "Net-(U15-Pad5)") (pinfunction "Q3") (pintype "tri_state") (tstamp 4c35e7c2-4ef8-47a8-aa87-457b49ab6507))
     (pad "17" smd roundrect locked (at -0.975 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 200 "Net-(U15-Pad4)") (pinfunction "Q2") (pintype "tri_state") (tstamp 0017eb4c-b93d-4b2a-a553-b57511ae010a))
+      (net 199 "Net-(U15-Pad4)") (pinfunction "Q2") (pintype "tri_state") (tstamp 0017eb4c-b93d-4b2a-a553-b57511ae010a))
     (pad "18" smd roundrect locked (at -1.625 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 199 "Net-(U15-Pad3)") (pinfunction "Q1") (pintype "tri_state") (tstamp 9593e1da-33e6-4070-a381-140d6f3fe88d))
+      (net 198 "Net-(U15-Pad3)") (pinfunction "Q1") (pintype "tri_state") (tstamp 9593e1da-33e6-4070-a381-140d6f3fe88d))
     (pad "19" smd roundrect locked (at -2.275 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 198 "Net-(U15-Pad2)") (pinfunction "Q0") (pintype "tri_state") (tstamp 9718d903-9566-4e57-8944-1dbb6a7eb755))
+      (net 197 "Net-(U15-Pad2)") (pinfunction "Q0") (pintype "tri_state") (tstamp 9718d903-9566-4e57-8944-1dbb6a7eb755))
     (pad "20" smd roundrect locked (at -2.925 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 2 "+5V") (pinfunction "Vcc") (pintype "power_in") (tstamp 207a26d2-9e7b-40f5-abf5-3b727821c637))
     (model "${KICAD6_3DMODEL_DIR}/Package_SO.3dshapes/TSSOP-20_4.4x6.5mm_P0.65mm.wrl"
@@ -2715,33 +2702,33 @@
     (pad "5" smd roundrect locked (at -0.325 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 103 "/Buf/AccA5") (pinfunction "D3") (pintype "input") (tstamp a0f2b264-b7fb-4ccd-99d1-4f7e6c7ca96a))
     (pad "6" smd roundrect locked (at 0.325 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 190 "/Buf/AccA4") (pinfunction "D4") (pintype "input") (tstamp be8027be-f321-4805-8635-6dc847b81a2e))
+      (net 189 "/Buf/AccA4") (pinfunction "D4") (pintype "input") (tstamp be8027be-f321-4805-8635-6dc847b81a2e))
     (pad "7" smd roundrect locked (at 0.975 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 181 "/Buf/AccA3") (pinfunction "D5") (pintype "input") (tstamp c3e738d4-02a9-4aa8-a333-e032080b16c6))
+      (net 180 "/Buf/AccA3") (pinfunction "D5") (pintype "input") (tstamp c3e738d4-02a9-4aa8-a333-e032080b16c6))
     (pad "8" smd roundrect locked (at 1.625 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 180 "/Buf/AccA2") (pinfunction "D6") (pintype "input") (tstamp 180d3178-9888-4028-a633-341bcff70f6f))
+      (net 179 "/Buf/AccA2") (pinfunction "D6") (pintype "input") (tstamp 180d3178-9888-4028-a633-341bcff70f6f))
     (pad "9" smd roundrect locked (at 2.275 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 179 "/Buf/AccA1") (pinfunction "D7") (pintype "input") (tstamp 88902f8c-57c5-4b87-8f2a-4050cc7e1df2))
+      (net 178 "/Buf/AccA1") (pinfunction "D7") (pintype "input") (tstamp 88902f8c-57c5-4b87-8f2a-4050cc7e1df2))
     (pad "10" smd roundrect locked (at 2.925 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pinfunction "GND") (pintype "power_in") (tstamp a3de692f-76db-4a42-9fd2-44609668c541))
     (pad "11" smd roundrect locked (at 2.925 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 102 "/Buf/ADoutLE1") (pinfunction "~{LE}") (pintype "input") (tstamp 7eecdbcc-749c-49d1-8a81-195f60462cf1))
     (pad "12" smd roundrect locked (at 2.275 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 189 "Net-(U13-Pad9)") (pinfunction "Q7") (pintype "tri_state") (tstamp 26cdd93d-45a1-4a5d-8dea-474ce92eb677))
+      (net 188 "Net-(U13-Pad9)") (pinfunction "Q7") (pintype "tri_state") (tstamp 26cdd93d-45a1-4a5d-8dea-474ce92eb677))
     (pad "13" smd roundrect locked (at 1.625 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 188 "Net-(U13-Pad8)") (pinfunction "Q6") (pintype "tri_state") (tstamp eae2871d-744c-4a4b-b0a0-3e5e9d544b70))
+      (net 187 "Net-(U13-Pad8)") (pinfunction "Q6") (pintype "tri_state") (tstamp eae2871d-744c-4a4b-b0a0-3e5e9d544b70))
     (pad "14" smd roundrect locked (at 0.975 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 187 "Net-(U13-Pad7)") (pinfunction "Q5") (pintype "tri_state") (tstamp 4a0d4c1d-522e-4086-b3fa-c2351bba62bd))
+      (net 186 "Net-(U13-Pad7)") (pinfunction "Q5") (pintype "tri_state") (tstamp 4a0d4c1d-522e-4086-b3fa-c2351bba62bd))
     (pad "15" smd roundrect locked (at 0.325 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 186 "Net-(U13-Pad6)") (pinfunction "Q4") (pintype "tri_state") (tstamp d43b7467-4d6b-4c36-b328-b8f9a21f0d40))
+      (net 185 "Net-(U13-Pad6)") (pinfunction "Q4") (pintype "tri_state") (tstamp d43b7467-4d6b-4c36-b328-b8f9a21f0d40))
     (pad "16" smd roundrect locked (at -0.325 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 185 "Net-(U13-Pad5)") (pinfunction "Q3") (pintype "tri_state") (tstamp 348f453a-3f2a-4bd1-b8dd-7aa38ce2619f))
+      (net 184 "Net-(U13-Pad5)") (pinfunction "Q3") (pintype "tri_state") (tstamp 348f453a-3f2a-4bd1-b8dd-7aa38ce2619f))
     (pad "17" smd roundrect locked (at -0.975 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 184 "Net-(U13-Pad4)") (pinfunction "Q2") (pintype "tri_state") (tstamp fa21c759-c8a3-4042-b92a-6d6a73206c72))
+      (net 183 "Net-(U13-Pad4)") (pinfunction "Q2") (pintype "tri_state") (tstamp fa21c759-c8a3-4042-b92a-6d6a73206c72))
     (pad "18" smd roundrect locked (at -1.625 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 183 "Net-(U13-Pad3)") (pinfunction "Q1") (pintype "tri_state") (tstamp 6b5a1ed5-b351-4582-af12-9cd9d1bf06d9))
+      (net 182 "Net-(U13-Pad3)") (pinfunction "Q1") (pintype "tri_state") (tstamp 6b5a1ed5-b351-4582-af12-9cd9d1bf06d9))
     (pad "19" smd roundrect locked (at -2.275 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 182 "Net-(U13-Pad2)") (pinfunction "Q0") (pintype "tri_state") (tstamp e2e2bf40-7caf-4426-b2c3-b68b52e31467))
+      (net 181 "Net-(U13-Pad2)") (pinfunction "Q0") (pintype "tri_state") (tstamp e2e2bf40-7caf-4426-b2c3-b68b52e31467))
     (pad "20" smd roundrect locked (at -2.925 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 2 "+5V") (pinfunction "Vcc") (pintype "power_in") (tstamp 3c36da5c-133a-4ed4-8757-815d1812ec18))
     (model "${KICAD6_3DMODEL_DIR}/Package_SO.3dshapes/TSSOP-20_4.4x6.5mm_P0.65mm.wrl"
@@ -2789,21 +2776,21 @@
     (pad "1" smd roundrect locked (at -2.925 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 99 "/Buf/Aout~{OE}") (pinfunction "~{OE}") (pintype "input") (tstamp 56824245-ea02-4fd1-b18a-b9c0c51fd5d6))
     (pad "2" smd roundrect locked (at -2.275 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 155 "Net-(U16-Pad2)") (pinfunction "D0") (pintype "input") (tstamp b73af911-855d-4952-b3ae-bbd5f16ff6e2))
+      (net 154 "Net-(U16-Pad2)") (pinfunction "D0") (pintype "input") (tstamp b73af911-855d-4952-b3ae-bbd5f16ff6e2))
     (pad "3" smd roundrect locked (at -1.625 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 156 "Net-(U16-Pad3)") (pinfunction "D1") (pintype "input") (tstamp d97a8b9d-d009-461d-8bc7-d5f28418e057))
+      (net 155 "Net-(U16-Pad3)") (pinfunction "D1") (pintype "input") (tstamp d97a8b9d-d009-461d-8bc7-d5f28418e057))
     (pad "4" smd roundrect locked (at -0.975 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 157 "Net-(U16-Pad4)") (pinfunction "D2") (pintype "input") (tstamp 2a6c753c-96de-4d33-8b45-29aba34482cc))
+      (net 156 "Net-(U16-Pad4)") (pinfunction "D2") (pintype "input") (tstamp 2a6c753c-96de-4d33-8b45-29aba34482cc))
     (pad "5" smd roundrect locked (at -0.325 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 158 "Net-(U16-Pad5)") (pinfunction "D3") (pintype "input") (tstamp 1d19a87d-31cd-4603-96c5-ee6087d80752))
+      (net 157 "Net-(U16-Pad5)") (pinfunction "D3") (pintype "input") (tstamp 1d19a87d-31cd-4603-96c5-ee6087d80752))
     (pad "6" smd roundrect locked (at 0.325 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 159 "Net-(U16-Pad6)") (pinfunction "D4") (pintype "input") (tstamp f4618723-5941-418d-b6da-edc07bef531b))
+      (net 158 "Net-(U16-Pad6)") (pinfunction "D4") (pintype "input") (tstamp f4618723-5941-418d-b6da-edc07bef531b))
     (pad "7" smd roundrect locked (at 0.975 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 160 "Net-(U16-Pad7)") (pinfunction "D5") (pintype "input") (tstamp 35b1aeb2-13ad-4240-996e-73bf70fc81aa))
+      (net 159 "Net-(U16-Pad7)") (pinfunction "D5") (pintype "input") (tstamp 35b1aeb2-13ad-4240-996e-73bf70fc81aa))
     (pad "8" smd roundrect locked (at 1.625 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 161 "Net-(U16-Pad8)") (pinfunction "D6") (pintype "input") (tstamp 4b8bbe84-cdbf-4d44-ac41-1e734be10179))
+      (net 160 "Net-(U16-Pad8)") (pinfunction "D6") (pintype "input") (tstamp 4b8bbe84-cdbf-4d44-ac41-1e734be10179))
     (pad "9" smd roundrect locked (at 2.275 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 162 "Net-(U16-Pad9)") (pinfunction "D7") (pintype "input") (tstamp cee17392-d84c-47cc-9caa-ba7960bf6a02))
+      (net 161 "Net-(U16-Pad9)") (pinfunction "D7") (pintype "input") (tstamp cee17392-d84c-47cc-9caa-ba7960bf6a02))
     (pad "10" smd roundrect locked (at 2.925 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pinfunction "GND") (pintype "power_in") (tstamp 8623de3a-9387-48e2-899f-8b4ff31afe35))
     (pad "11" smd roundrect locked (at 2.925 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
@@ -2871,21 +2858,21 @@
     (pad "1" smd roundrect locked (at -2.925 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 99 "/Buf/Aout~{OE}") (pinfunction "~{OE}") (pintype "input") (tstamp 80158fc2-d0a2-468a-aace-8a6d2deb2ce2))
     (pad "2" smd roundrect locked (at -2.275 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 198 "Net-(U15-Pad2)") (pinfunction "D0") (pintype "input") (tstamp 25b2705b-3b5a-4323-8b6c-130dda861310))
+      (net 197 "Net-(U15-Pad2)") (pinfunction "D0") (pintype "input") (tstamp 25b2705b-3b5a-4323-8b6c-130dda861310))
     (pad "3" smd roundrect locked (at -1.625 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 199 "Net-(U15-Pad3)") (pinfunction "D1") (pintype "input") (tstamp f45ea608-ac36-4090-b150-0d55915f6878))
+      (net 198 "Net-(U15-Pad3)") (pinfunction "D1") (pintype "input") (tstamp f45ea608-ac36-4090-b150-0d55915f6878))
     (pad "4" smd roundrect locked (at -0.975 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 200 "Net-(U15-Pad4)") (pinfunction "D2") (pintype "input") (tstamp 1d2b9444-0831-4c92-8cac-a7a09f6148a6))
+      (net 199 "Net-(U15-Pad4)") (pinfunction "D2") (pintype "input") (tstamp 1d2b9444-0831-4c92-8cac-a7a09f6148a6))
     (pad "5" smd roundrect locked (at -0.325 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 201 "Net-(U15-Pad5)") (pinfunction "D3") (pintype "input") (tstamp cf883ae8-17a8-4ef9-b4f1-9d850cc04326))
+      (net 200 "Net-(U15-Pad5)") (pinfunction "D3") (pintype "input") (tstamp cf883ae8-17a8-4ef9-b4f1-9d850cc04326))
     (pad "6" smd roundrect locked (at 0.325 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 202 "Net-(U15-Pad6)") (pinfunction "D4") (pintype "input") (tstamp ebbc9bcb-6e08-4d7a-957b-b4fa32005def))
+      (net 201 "Net-(U15-Pad6)") (pinfunction "D4") (pintype "input") (tstamp ebbc9bcb-6e08-4d7a-957b-b4fa32005def))
     (pad "7" smd roundrect locked (at 0.975 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 203 "Net-(U15-Pad7)") (pinfunction "D5") (pintype "input") (tstamp 7927f00b-8d8a-41dd-b731-c36dba6c63ef))
+      (net 202 "Net-(U15-Pad7)") (pinfunction "D5") (pintype "input") (tstamp 7927f00b-8d8a-41dd-b731-c36dba6c63ef))
     (pad "8" smd roundrect locked (at 1.625 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 204 "Net-(U15-Pad8)") (pinfunction "D6") (pintype "input") (tstamp 822a09b7-db9e-424c-9e2f-b5830b2cd498))
+      (net 203 "Net-(U15-Pad8)") (pinfunction "D6") (pintype "input") (tstamp 822a09b7-db9e-424c-9e2f-b5830b2cd498))
     (pad "9" smd roundrect locked (at 2.275 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 205 "Net-(U15-Pad9)") (pinfunction "D7") (pintype "input") (tstamp 444c71e3-ec31-48a0-9191-8256613d1ec5))
+      (net 204 "Net-(U15-Pad9)") (pinfunction "D7") (pintype "input") (tstamp 444c71e3-ec31-48a0-9191-8256613d1ec5))
     (pad "10" smd roundrect locked (at 2.925 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pinfunction "GND") (pintype "power_in") (tstamp e9d39c14-0459-48c1-8221-bea9f3cf07dd))
     (pad "11" smd roundrect locked (at 2.925 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
@@ -2953,21 +2940,21 @@
     (pad "1" smd roundrect locked (at -2.925 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 99 "/Buf/Aout~{OE}") (pinfunction "~{OE}") (pintype "input") (tstamp 0c421bb2-1b4b-4635-8af3-29f51038d51a))
     (pad "2" smd roundrect locked (at -2.275 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 182 "Net-(U13-Pad2)") (pinfunction "D0") (pintype "input") (tstamp 73f8215c-d44b-49ba-b3d4-9f3d0a65771f))
+      (net 181 "Net-(U13-Pad2)") (pinfunction "D0") (pintype "input") (tstamp 73f8215c-d44b-49ba-b3d4-9f3d0a65771f))
     (pad "3" smd roundrect locked (at -1.625 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 183 "Net-(U13-Pad3)") (pinfunction "D1") (pintype "input") (tstamp a518ef05-e608-478c-8335-5dda1862c284))
+      (net 182 "Net-(U13-Pad3)") (pinfunction "D1") (pintype "input") (tstamp a518ef05-e608-478c-8335-5dda1862c284))
     (pad "4" smd roundrect locked (at -0.975 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 184 "Net-(U13-Pad4)") (pinfunction "D2") (pintype "input") (tstamp 0e090379-9ed4-42db-8b26-ded1ead3b85f))
+      (net 183 "Net-(U13-Pad4)") (pinfunction "D2") (pintype "input") (tstamp 0e090379-9ed4-42db-8b26-ded1ead3b85f))
     (pad "5" smd roundrect locked (at -0.325 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 185 "Net-(U13-Pad5)") (pinfunction "D3") (pintype "input") (tstamp a3380ad7-3d53-424f-829e-b11524f0816c))
+      (net 184 "Net-(U13-Pad5)") (pinfunction "D3") (pintype "input") (tstamp a3380ad7-3d53-424f-829e-b11524f0816c))
     (pad "6" smd roundrect locked (at 0.325 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 186 "Net-(U13-Pad6)") (pinfunction "D4") (pintype "input") (tstamp ec3b7a78-ac40-4741-bd72-fd008734308d))
+      (net 185 "Net-(U13-Pad6)") (pinfunction "D4") (pintype "input") (tstamp ec3b7a78-ac40-4741-bd72-fd008734308d))
     (pad "7" smd roundrect locked (at 0.975 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 187 "Net-(U13-Pad7)") (pinfunction "D5") (pintype "input") (tstamp 4c01c98a-86e4-4722-a803-378317f7ca96))
+      (net 186 "Net-(U13-Pad7)") (pinfunction "D5") (pintype "input") (tstamp 4c01c98a-86e4-4722-a803-378317f7ca96))
     (pad "8" smd roundrect locked (at 1.625 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 188 "Net-(U13-Pad8)") (pinfunction "D6") (pintype "input") (tstamp adecacb7-d2dd-4313-af75-e7844acb5fa4))
+      (net 187 "Net-(U13-Pad8)") (pinfunction "D6") (pintype "input") (tstamp adecacb7-d2dd-4313-af75-e7844acb5fa4))
     (pad "9" smd roundrect locked (at 2.275 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 189 "Net-(U13-Pad9)") (pinfunction "D7") (pintype "input") (tstamp d6964480-43d3-46b2-8209-3e63b7b061eb))
+      (net 188 "Net-(U13-Pad9)") (pinfunction "D7") (pintype "input") (tstamp d6964480-43d3-46b2-8209-3e63b7b061eb))
     (pad "10" smd roundrect locked (at 2.925 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pinfunction "GND") (pintype "power_in") (tstamp 92c8f4ba-57a0-4b44-a303-4d654bc72976))
     (pad "11" smd roundrect locked (at 2.925 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
@@ -3037,13 +3024,13 @@
     (pad "1" smd roundrect locked (at -3.175 -8.255 270) (size 3.048 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 2 "+5V") (pinfunction "VDD") (pintype "power_in") (tstamp be4944a1-2a04-4fd3-a868-9a8df4d6ee6b))
     (pad "2" smd roundrect locked (at -3.175 -6.985 270) (size 3.048 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 164 "/Buf/AccD7") (pinfunction "I/O0") (pintype "bidirectional") (tstamp 3041f7db-e951-4626-970f-e8f6a7f113e6))
+      (net 163 "/Buf/AccD7") (pinfunction "I/O0") (pintype "bidirectional") (tstamp 3041f7db-e951-4626-970f-e8f6a7f113e6))
     (pad "3" smd roundrect locked (at -3.175 -5.715 270) (size 3.048 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 165 "/Buf/AccD5") (pinfunction "I/O1") (pintype "bidirectional") (tstamp bac8c790-4bc2-46d8-b68d-146eb0c799a2))
+      (net 164 "/Buf/AccD5") (pinfunction "I/O1") (pintype "bidirectional") (tstamp bac8c790-4bc2-46d8-b68d-146eb0c799a2))
     (pad "4" smd roundrect locked (at -3.175 -4.445 270) (size 3.048 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 166 "/Buf/AccD3") (pinfunction "I/O2") (pintype "bidirectional") (tstamp 4f60051c-3f61-446c-8fe2-bf94aec3bb6c))
+      (net 165 "/Buf/AccD3") (pinfunction "I/O2") (pintype "bidirectional") (tstamp 4f60051c-3f61-446c-8fe2-bf94aec3bb6c))
     (pad "5" smd roundrect locked (at -3.175 -3.175 270) (size 3.048 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 167 "/Buf/AccD1") (pinfunction "I/O3") (pintype "bidirectional") (tstamp 208c5902-a62d-4450-b4b2-606d1efcdf8e))
+      (net 166 "/Buf/AccD1") (pinfunction "I/O3") (pintype "bidirectional") (tstamp 208c5902-a62d-4450-b4b2-606d1efcdf8e))
     (pad "6" smd roundrect locked (at -3.175 -1.905 270) (size 3.048 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 109 "/Control/L~{WE}") (pinfunction "~{WE}") (pintype "input") (tstamp 0ca81039-f4dd-4e3d-8519-783ea34fdb4c))
     (pad "7" smd roundrect locked (at -3.175 -0.635 270) (size 3.048 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
@@ -3081,13 +3068,13 @@
     (pad "23" smd roundrect locked (at 3.175 -1.905 270) (size 3.048 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 128 "/Control/~{CAS}") (pinfunction "~{CAS}") (pintype "input") (tstamp cd8e5299-a812-4353-9812-c14fcddea1fc))
     (pad "24" smd roundrect locked (at 3.175 -3.175 270) (size 3.048 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 168 "/Buf/AccD0") (pinfunction "I/O4") (pintype "bidirectional") (tstamp 589437bd-c603-4589-98e8-81859baabc27))
+      (net 167 "/Buf/AccD0") (pinfunction "I/O4") (pintype "bidirectional") (tstamp 589437bd-c603-4589-98e8-81859baabc27))
     (pad "25" smd roundrect locked (at 3.175 -4.445 270) (size 3.048 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 169 "/Buf/AccD2") (pinfunction "I/O5") (pintype "bidirectional") (tstamp 8af70cd2-72a1-47fa-940c-8aec358d7238))
+      (net 168 "/Buf/AccD2") (pinfunction "I/O5") (pintype "bidirectional") (tstamp 8af70cd2-72a1-47fa-940c-8aec358d7238))
     (pad "26" smd roundrect locked (at 3.175 -5.715 270) (size 3.048 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 170 "/Buf/AccD4") (pinfunction "I/O6") (pintype "bidirectional") (tstamp 5d07f9df-70ca-4eee-826b-24b104e0b876))
+      (net 169 "/Buf/AccD4") (pinfunction "I/O6") (pintype "bidirectional") (tstamp 5d07f9df-70ca-4eee-826b-24b104e0b876))
     (pad "27" smd roundrect locked (at 3.175 -6.985 270) (size 3.048 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 163 "/Buf/AccD6") (pinfunction "I/O7") (pintype "bidirectional") (tstamp 6ed6226f-a885-4cef-8379-9ae3a1291787))
+      (net 162 "/Buf/AccD6") (pinfunction "I/O7") (pintype "bidirectional") (tstamp 6ed6226f-a885-4cef-8379-9ae3a1291787))
     (pad "28" smd roundrect locked (at 3.175 -8.255 270) (size 3.048 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pinfunction "GND") (pintype "power_in") (tstamp baae0a6d-4348-48f8-8641-83ee2ae7acd7))
     (model "${KICAD6_3DMODEL_DIR}/Package_SO.3dshapes/SOIC-28W_7.5x18.7mm_P1.27mm.wrl"
@@ -3407,10 +3394,10 @@
 
   (footprint "stdpads:Fiducial" (layer "F.Cu")
     (tedit 5F1BCA76) (tstamp 00000000-0000-0000-0000-000061aa2e86)
-    (at 105.283 44.958)
+    (at 105.283 42.418)
     (descr "Circular Fiducial, 1mm bare copper top; 2mm keepout (Level A)")
     (tags "marker")
-    (property "Sheetfile" "Warp-SE.kicad_sch")
+    (property "Sheetfile" "WarpSE.kicad_sch")
     (property "Sheetname" "")
     (path "/00000000-0000-0000-0000-000061b2122f")
     (attr smd)
@@ -3432,7 +3419,7 @@
     (at 207.772 39.878)
     (descr "Circular Fiducial, 1mm bare copper top; 2mm keepout (Level A)")
     (tags "marker")
-    (property "Sheetfile" "Warp-SE.kicad_sch")
+    (property "Sheetfile" "WarpSE.kicad_sch")
     (property "Sheetname" "")
     (path "/00000000-0000-0000-0000-000061b21230")
     (attr smd)
@@ -3454,7 +3441,7 @@
     (at 210.312 135.382)
     (descr "Circular Fiducial, 1mm bare copper top; 2mm keepout (Level A)")
     (tags "marker")
-    (property "Sheetfile" "Warp-SE.kicad_sch")
+    (property "Sheetfile" "WarpSE.kicad_sch")
     (property "Sheetname" "")
     (path "/00000000-0000-0000-0000-000061b21231")
     (attr smd)
@@ -3476,7 +3463,7 @@
     (at 111.125 127.508)
     (descr "Circular Fiducial, 1mm bare copper top; 2mm keepout (Level A)")
     (tags "marker")
-    (property "Sheetfile" "Warp-SE.kicad_sch")
+    (property "Sheetfile" "WarpSE.kicad_sch")
     (property "Sheetname" "")
     (path "/00000000-0000-0000-0000-000061b21232")
     (attr smd)
@@ -3493,119 +3480,114 @@
       (solder_mask_margin 0.5) (clearance 0.575) (tstamp 0c777f73-7cf1-44ca-90c3-293c57cb23f9))
   )
 
-  (footprint "stdpads:PasteHole_1.1mm_PTH" (layer "F.Cu")
-    (tedit 5E892B4B) (tstamp 00000000-0000-0000-0000-000061aa2e9a)
-    (at 105.283 42.418)
+  (footprint "stdpads:PasteHole_1.152mm_NPTH" (layer "F.Cu")
+    (tedit 5F27B084) (tstamp 00000000-0000-0000-0000-000061aa2e9a)
+    (at 105.283 39.878)
     (descr "Circular Fiducial, 1mm bare copper top; 2mm keepout (Level A)")
     (tags "marker")
-    (property "Sheetfile" "Warp-SE.kicad_sch")
+    (property "Sheetfile" "WarpSE.kicad_sch")
     (property "Sheetname" "")
     (path "/00000000-0000-0000-0000-000061b21233")
-    (zone_connect 2)
     (attr exclude_from_pos_files)
     (fp_text reference "H1" (at 0 0) (layer "F.Fab")
       (effects (font (size 0.4 0.4) (thickness 0.1)))
-      (tstamp ad77f3d5-5b2d-43f0-bbdc-48e12865b4d5)
+      (tstamp 94150b5c-e98d-4600-9819-2691a4419d6a)
     )
     (fp_text value " " (at 0 2) (layer "F.Fab") hide
       (effects (font (size 0.508 0.508) (thickness 0.127)))
-      (tstamp 5c4a0728-1725-4ff8-9b7a-77f23aaa784b)
+      (tstamp df31ae44-bde1-4227-a51a-fa8d974b58c2)
     )
-    (fp_circle (center 0 0) (end 1 0) (layer "F.Fab") (width 0.1) (fill none) (tstamp 49115797-89af-45b2-8cf5-5a21453ea59b))
-    (pad "1" thru_hole circle locked (at 0 0) (size 2 2) (drill 1.1) (layers *.Cu *.Mask)
-      (net 1 "GND") (pinfunction "1") (pintype "input") (zone_connect 2) (tstamp 060512a9-c723-4f37-bda5-e0c7bffbe3ef))
+    (fp_circle (center 0 0) (end 1 0) (layer "F.Fab") (width 0.1) (fill none) (tstamp 58c44d9a-2777-4ad7-b6ab-de8d81c3be8f))
+    (pad "" np_thru_hole circle locked (at 0 0) (size 1.152 1.152) (drill 1.152) (layers *.Cu *.Mask)
+      (solder_mask_margin 0.148) (tstamp 06f11a1f-e9b4-4a4c-b5ed-80dd332ac87c))
   )
 
-  (footprint "stdpads:PasteHole_1.1mm_PTH" (layer "F.Cu")
-    (tedit 5E892B4B) (tstamp 00000000-0000-0000-0000-000061aa2e9f)
+  (footprint "stdpads:PasteHole_1.152mm_NPTH" (layer "F.Cu")
+    (tedit 5F27B084) (tstamp 00000000-0000-0000-0000-000061aa2e9f)
     (at 210.312 39.878)
     (descr "Circular Fiducial, 1mm bare copper top; 2mm keepout (Level A)")
     (tags "marker")
-    (property "Sheetfile" "Warp-SE.kicad_sch")
+    (property "Sheetfile" "WarpSE.kicad_sch")
     (property "Sheetname" "")
     (path "/00000000-0000-0000-0000-000061b21234")
-    (zone_connect 2)
     (attr exclude_from_pos_files)
     (fp_text reference "H2" (at 0 0) (layer "F.Fab")
       (effects (font (size 0.4 0.4) (thickness 0.1)))
-      (tstamp 7365e946-609f-4087-91a9-ab6314494d9e)
+      (tstamp 1ed6e7c3-238a-4d65-b937-d89d3486a20c)
     )
     (fp_text value " " (at 0 2) (layer "F.Fab") hide
       (effects (font (size 0.508 0.508) (thickness 0.127)))
-      (tstamp e9437a71-8323-4310-bc06-46e370fc8692)
+      (tstamp d3452038-5304-4a73-a247-5f97cfeb4b37)
     )
-    (fp_circle (center 0 0) (end 1 0) (layer "F.Fab") (width 0.1) (fill none) (tstamp cc4d6061-2845-4d3f-a4f9-82eeb84d6d9f))
-    (pad "1" thru_hole circle locked (at 0 0) (size 2 2) (drill 1.1) (layers *.Cu *.Mask)
-      (net 1 "GND") (pinfunction "1") (pintype "input") (zone_connect 2) (tstamp ae2f20a1-e7ea-476f-849c-7b9cd6336caf))
+    (fp_circle (center 0 0) (end 1 0) (layer "F.Fab") (width 0.1) (fill none) (tstamp bc565fbd-1a82-4697-be9e-b0a518d64185))
+    (pad "" np_thru_hole circle locked (at 0 0) (size 1.152 1.152) (drill 1.152) (layers *.Cu *.Mask)
+      (solder_mask_margin 0.148) (tstamp 26291562-7203-4a30-af30-f39d4ee0e44e))
   )
 
-  (footprint "stdpads:PasteHole_1.1mm_PTH" (layer "F.Cu")
-    (tedit 5E892B4B) (tstamp 00000000-0000-0000-0000-000061aa2ea4)
+  (footprint "stdpads:PasteHole_1.152mm_NPTH" (layer "F.Cu")
+    (tedit 5F27B084) (tstamp 00000000-0000-0000-0000-000061aa2ea4)
     (at 210.312 137.922)
     (descr "Circular Fiducial, 1mm bare copper top; 2mm keepout (Level A)")
     (tags "marker")
-    (property "Sheetfile" "Warp-SE.kicad_sch")
+    (property "Sheetfile" "WarpSE.kicad_sch")
     (property "Sheetname" "")
     (path "/00000000-0000-0000-0000-000061b21235")
-    (zone_connect 2)
     (attr exclude_from_pos_files)
     (fp_text reference "H3" (at 0 0) (layer "F.Fab")
       (effects (font (size 0.4 0.4) (thickness 0.1)))
-      (tstamp 8aaed559-750b-472b-894b-2b6ccd4cd152)
+      (tstamp 1e79101a-82ec-4117-b509-e98cba1aeea6)
     )
     (fp_text value " " (at 0 2) (layer "F.Fab") hide
       (effects (font (size 0.508 0.508) (thickness 0.127)))
-      (tstamp 3462298c-5fb7-4a78-9752-757db05e4f02)
+      (tstamp ec159aa9-f30c-4bb6-81b3-fa229c615c1c)
     )
-    (fp_circle (center 0 0) (end 1 0) (layer "F.Fab") (width 0.1) (fill none) (tstamp 0e1b2330-902f-44c5-95d2-35ce578033f5))
-    (pad "1" thru_hole circle locked (at 0 0) (size 2 2) (drill 1.1) (layers *.Cu *.Mask)
-      (net 1 "GND") (pinfunction "1") (pintype "input") (zone_connect 2) (tstamp 9f3fb268-4adb-494c-bee1-1e44ed59066a))
+    (fp_circle (center 0 0) (end 1 0) (layer "F.Fab") (width 0.1) (fill none) (tstamp 29756439-d88f-4a3a-88a2-46dfd81a7b9b))
+    (pad "" np_thru_hole circle locked (at 0 0) (size 1.152 1.152) (drill 1.152) (layers *.Cu *.Mask)
+      (solder_mask_margin 0.148) (tstamp ef7a2911-7794-4b89-92d3-508dbde7265c))
   )
 
-  (footprint "stdpads:PasteHole_1.1mm_PTH" (layer "F.Cu")
-    (tedit 5E892B4B) (tstamp 00000000-0000-0000-0000-000061aa2ea9)
+  (footprint "stdpads:PasteHole_1.152mm_NPTH" (layer "F.Cu")
+    (tedit 5F27B084) (tstamp 00000000-0000-0000-0000-000061aa2ea9)
     (at 196.469 137.922)
     (descr "Circular Fiducial, 1mm bare copper top; 2mm keepout (Level A)")
     (tags "marker")
-    (property "Sheetfile" "Warp-SE.kicad_sch")
+    (property "Sheetfile" "WarpSE.kicad_sch")
     (property "Sheetname" "")
     (path "/00000000-0000-0000-0000-000061b21236")
-    (zone_connect 2)
     (attr exclude_from_pos_files)
     (fp_text reference "H4" (at 0 0) (layer "F.Fab")
       (effects (font (size 0.4 0.4) (thickness 0.1)))
-      (tstamp 6ce1ef29-54bf-433b-96fb-ebe6a98b45df)
+      (tstamp cdb048c1-4ea1-44e8-8784-5f6e9f8f36ec)
     )
     (fp_text value " " (at 0 2) (layer "F.Fab") hide
       (effects (font (size 0.508 0.508) (thickness 0.127)))
-      (tstamp 78af2a9a-abb1-4791-b530-b0d1493db715)
+      (tstamp a02b1365-9adc-4f7a-a36f-67ef8f9323c2)
     )
-    (fp_circle (center 0 0) (end 1 0) (layer "F.Fab") (width 0.1) (fill none) (tstamp cd9f56be-5bae-456b-9216-92d527ecc325))
-    (pad "1" thru_hole circle locked (at 0 0) (size 2 2) (drill 1.1) (layers *.Cu *.Mask)
-      (net 1 "GND") (pinfunction "1") (pintype "input") (zone_connect 2) (tstamp 252fea0a-4c4c-48be-8742-874c6a852160))
+    (fp_circle (center 0 0) (end 1 0) (layer "F.Fab") (width 0.1) (fill none) (tstamp 8ab75cb5-395c-41a2-8192-3394753455d9))
+    (pad "" np_thru_hole circle locked (at 0 0) (size 1.152 1.152) (drill 1.152) (layers *.Cu *.Mask)
+      (solder_mask_margin 0.148) (tstamp 4d46809f-aa9a-4b39-9beb-5e23f30b9459))
   )
 
-  (footprint "stdpads:PasteHole_1.1mm_PTH" (layer "F.Cu")
-    (tedit 5E892B4B) (tstamp 00000000-0000-0000-0000-000061aa2eae)
+  (footprint "stdpads:PasteHole_1.152mm_NPTH" (layer "F.Cu")
+    (tedit 5F27B084) (tstamp 00000000-0000-0000-0000-000061aa2eae)
     (at 113.665 127.508)
     (descr "Circular Fiducial, 1mm bare copper top; 2mm keepout (Level A)")
     (tags "marker")
-    (property "Sheetfile" "Warp-SE.kicad_sch")
+    (property "Sheetfile" "WarpSE.kicad_sch")
     (property "Sheetname" "")
     (path "/00000000-0000-0000-0000-00005ed15a93")
-    (zone_connect 2)
     (attr exclude_from_pos_files)
     (fp_text reference "H5" (at 0 0) (layer "F.Fab")
       (effects (font (size 0.4 0.4) (thickness 0.1)))
-      (tstamp 1fbe489d-85b4-442a-8181-f265276990d8)
+      (tstamp 629aa444-579f-4f5d-b2c6-1ed5c22e2d02)
     )
     (fp_text value " " (at 0 2) (layer "F.Fab") hide
       (effects (font (size 0.508 0.508) (thickness 0.127)))
-      (tstamp 3c6ad259-02cb-40c7-94d2-038b74bb32d4)
+      (tstamp 5361a35a-92c7-4739-a6c4-a5feb551e2ce)
     )
-    (fp_circle (center 0 0) (end 1 0) (layer "F.Fab") (width 0.1) (fill none) (tstamp 03580f54-6820-4247-a0e9-d372e61b6563))
-    (pad "1" thru_hole circle locked (at 0 0) (size 2 2) (drill 1.1) (layers *.Cu *.Mask)
-      (net 1 "GND") (pinfunction "1") (pintype "input") (zone_connect 2) (tstamp 782fe704-bac4-4183-bbf9-e5eba3aa48c2))
+    (fp_circle (center 0 0) (end 1 0) (layer "F.Fab") (width 0.1) (fill none) (tstamp c1ad0b54-b385-4083-bb9b-b38ac9b0f4ff))
+    (pad "" np_thru_hole circle locked (at 0 0) (size 1.152 1.152) (drill 1.152) (layers *.Cu *.Mask)
+      (solder_mask_margin 0.148) (tstamp 3509cfd1-9e05-4bc6-9c04-f9651483e33f))
   )
 
   (footprint "stdpads:R_0603" (layer "F.Cu")
@@ -3776,7 +3758,7 @@
     (pad "1" smd roundrect locked (at -0.8 0 270) (size 0.7 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 3 "+3V3") (pintype "passive") (tstamp e7ef34c8-2f27-4f2e-a04e-3995d435eb4b))
     (pad "2" smd roundrect locked (at 0.8 0 270) (size 0.7 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 234 "/Control/SW0") (pintype "passive") (tstamp 6f4be99a-c11d-45bd-be74-a81cef4a9f91))
+      (net 149 "/Control/SW2") (pintype "passive") (tstamp 6f4be99a-c11d-45bd-be74-a81cef4a9f91))
     (model "${KICAD6_3DMODEL_DIR}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl"
       (offset (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -3953,13 +3935,13 @@
     (pad "5" smd roundrect locked (at -5.5625 -5.08 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 113 "/Buf/AccA10") (pinfunction "A7") (pintype "input") (tstamp a0224162-d9b0-409e-9ee2-9a0df4e0deec))
     (pad "6" smd roundrect locked (at -5.5625 -3.81 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 179 "/Buf/AccA1") (pinfunction "A6") (pintype "input") (tstamp 17fa583a-e8a4-471a-8354-97fac0a77f2a))
+      (net 178 "/Buf/AccA1") (pinfunction "A6") (pintype "input") (tstamp 17fa583a-e8a4-471a-8354-97fac0a77f2a))
     (pad "7" smd roundrect locked (at -5.5625 -2.54 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 180 "/Buf/AccA2") (pinfunction "A5") (pintype "input") (tstamp caace717-2ecc-4078-aad0-7c612c71327a))
+      (net 179 "/Buf/AccA2") (pinfunction "A5") (pintype "input") (tstamp caace717-2ecc-4078-aad0-7c612c71327a))
     (pad "8" smd roundrect locked (at -5.5625 -1.27 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 181 "/Buf/AccA3") (pinfunction "A4") (pintype "input") (tstamp bc36ff5a-833f-4be2-9f0a-5127fae1d0ea))
+      (net 180 "/Buf/AccA3") (pinfunction "A4") (pintype "input") (tstamp bc36ff5a-833f-4be2-9f0a-5127fae1d0ea))
     (pad "9" smd roundrect locked (at -5.5625 0 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 190 "/Buf/AccA4") (pinfunction "A3") (pintype "input") (tstamp 1f31a32b-d036-41e8-8994-ca923eb44abc))
+      (net 189 "/Buf/AccA4") (pinfunction "A3") (pintype "input") (tstamp 1f31a32b-d036-41e8-8994-ca923eb44abc))
     (pad "10" smd roundrect locked (at -5.5625 1.27 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 103 "/Buf/AccA5") (pinfunction "A2") (pintype "input") (tstamp 33e2588e-ed24-4d40-afc4-97fbcfd35c21))
     (pad "11" smd roundrect locked (at -5.5625 2.54 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
@@ -3967,23 +3949,23 @@
     (pad "12" smd roundrect locked (at -5.5625 3.81 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 105 "/Buf/AccA7") (pinfunction "A0") (pintype "input") (tstamp 02d024bb-0117-475f-a291-f3e2c8e03bea))
     (pad "13" smd roundrect locked (at -5.5625 5.08 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 168 "/Buf/AccD0") (pinfunction "D0") (pintype "bidirectional") (tstamp 4b6ec3f1-7243-4277-823f-498263c2937b))
+      (net 167 "/Buf/AccD0") (pinfunction "D0") (pintype "bidirectional") (tstamp 4b6ec3f1-7243-4277-823f-498263c2937b))
     (pad "14" smd roundrect locked (at -3.81 6.8375 90) (size 0.6 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 167 "/Buf/AccD1") (pinfunction "D1") (pintype "bidirectional") (tstamp b28b0e1a-ed94-40af-a4e9-618160c73e5d))
+      (net 166 "/Buf/AccD1") (pinfunction "D1") (pintype "bidirectional") (tstamp b28b0e1a-ed94-40af-a4e9-618160c73e5d))
     (pad "15" smd roundrect locked (at -2.54 6.8375 90) (size 0.6 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 169 "/Buf/AccD2") (pinfunction "D2") (pintype "bidirectional") (tstamp 1fedcdd6-c0df-4a9d-8dca-2fe689b2cbf5))
+      (net 168 "/Buf/AccD2") (pinfunction "D2") (pintype "bidirectional") (tstamp 1fedcdd6-c0df-4a9d-8dca-2fe689b2cbf5))
     (pad "16" smd roundrect locked (at -1.27 6.8375 90) (size 0.6 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pinfunction "GND") (pintype "power_in") (tstamp 5aee2a62-07f5-4ee0-b70c-379984071f32))
     (pad "17" smd roundrect locked (at 0 6.8375 90) (size 0.6 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 166 "/Buf/AccD3") (pinfunction "D3") (pintype "bidirectional") (tstamp c97b029c-370e-4ada-ad20-4d2abb56062a))
+      (net 165 "/Buf/AccD3") (pinfunction "D3") (pintype "bidirectional") (tstamp c97b029c-370e-4ada-ad20-4d2abb56062a))
     (pad "18" smd roundrect locked (at 1.27 6.8375 90) (size 0.6 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 170 "/Buf/AccD4") (pinfunction "D4") (pintype "bidirectional") (tstamp 384ba97d-dfae-4525-a5e3-3ae90fd70547))
+      (net 169 "/Buf/AccD4") (pinfunction "D4") (pintype "bidirectional") (tstamp 384ba97d-dfae-4525-a5e3-3ae90fd70547))
     (pad "19" smd roundrect locked (at 2.54 6.8375 90) (size 0.6 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 165 "/Buf/AccD5") (pinfunction "D5") (pintype "bidirectional") (tstamp 957b3945-9861-48c7-94c2-5f9b4440a5ad))
+      (net 164 "/Buf/AccD5") (pinfunction "D5") (pintype "bidirectional") (tstamp 957b3945-9861-48c7-94c2-5f9b4440a5ad))
     (pad "20" smd roundrect locked (at 3.81 6.8375 90) (size 0.6 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 163 "/Buf/AccD6") (pinfunction "D6") (pintype "bidirectional") (tstamp 9a5e84aa-0b5d-4bfd-8a89-c52f73f687d9))
+      (net 162 "/Buf/AccD6") (pinfunction "D6") (pintype "bidirectional") (tstamp 9a5e84aa-0b5d-4bfd-8a89-c52f73f687d9))
     (pad "21" smd roundrect locked (at 5.5625 5.08 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 164 "/Buf/AccD7") (pinfunction "D7") (pintype "bidirectional") (tstamp 720c6ba9-92f5-47e4-8cf3-11236c979e5d))
+      (net 163 "/Buf/AccD7") (pinfunction "D7") (pintype "bidirectional") (tstamp 720c6ba9-92f5-47e4-8cf3-11236c979e5d))
     (pad "22" smd roundrect locked (at 5.5625 3.81 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 129 "/Control/ROM~{CS}") (pinfunction "~{CS}") (pintype "input") (tstamp 72420e1e-a1a1-4420-9718-bb38d69f6b84))
     (pad "23" smd roundrect locked (at 5.5625 2.54 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
@@ -3997,9 +3979,9 @@
     (pad "27" smd roundrect locked (at 5.5625 -2.54 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 139 "/Buf/AccA17") (pinfunction "A8") (pintype "input") (tstamp 05117a90-2e75-4d30-91fb-d38f2d1135aa))
     (pad "28" smd roundrect locked (at 5.5625 -3.81 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 140 "/Buf/AccA18") (pinfunction "A13") (pintype "input") (tstamp e056aa0f-1147-4066-be47-658056763fa4))
+      (net 116 "/Control/RA8") (pinfunction "A13") (pintype "input") (tstamp e056aa0f-1147-4066-be47-658056763fa4))
     (pad "29" smd roundrect locked (at 5.5625 -5.08 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 242 "/RAMROM/B") (pinfunction "A14") (pintype "input") (tstamp efc597cb-3661-4d5e-bf41-96d71b0ca6eb))
+      (net 111 "/Control/RA11") (pinfunction "A14") (pintype "input") (tstamp efc597cb-3661-4d5e-bf41-96d71b0ca6eb))
     (pad "30" smd roundrect locked (at 3.81 -6.8375 90) (size 0.6 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 106 "/Buf/AccA8") (pinfunction "A17") (pintype "input") (tstamp a7d081e7-de50-4c38-a4cc-9954909d57e8))
     (pad "31" smd roundrect locked (at 2.54 -6.8375 90) (size 0.6 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
@@ -4082,9 +4064,9 @@
     (pad "1" smd roundrect locked (at 0 -6.8375 90) (size 0.6 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 107 "/Buf/AccA9") (pinfunction "A18") (pintype "input") (tstamp 0f0365f6-61ee-42be-b427-48cac09e3831))
     (pad "2" smd roundrect locked (at -1.27 -6.8375 90) (size 0.6 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 179 "/Buf/AccA1") (pinfunction "A16") (pintype "input") (tstamp a21e7064-3192-4168-b7b4-c7f078a7c84a))
+      (net 178 "/Buf/AccA1") (pinfunction "A16") (pintype "input") (tstamp a21e7064-3192-4168-b7b4-c7f078a7c84a))
     (pad "3" smd roundrect locked (at -2.54 -6.8375 90) (size 0.6 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 181 "/Buf/AccA3") (pinfunction "A15") (pintype "input") (tstamp 22281398-ce0e-457e-b0d0-a45fd35f13e5))
+      (net 180 "/Buf/AccA3") (pinfunction "A15") (pintype "input") (tstamp 22281398-ce0e-457e-b0d0-a45fd35f13e5))
     (pad "4" smd roundrect locked (at -3.81 -6.8375 90) (size 0.6 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 105 "/Buf/AccA7") (pinfunction "A12") (pintype "input") (tstamp f97cea0e-2fcc-483c-8e7e-0285bf8ddb84))
     (pad "5" smd roundrect locked (at -5.5625 -5.08 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
@@ -4092,9 +4074,9 @@
     (pad "6" smd roundrect locked (at -5.5625 -3.81 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 103 "/Buf/AccA5") (pinfunction "A6") (pintype "input") (tstamp 88f0f9d2-e118-4fc1-be8b-70f51a43f8c6))
     (pad "7" smd roundrect locked (at -5.5625 -2.54 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 190 "/Buf/AccA4") (pinfunction "A5") (pintype "input") (tstamp b6492bbc-fec4-4d41-a1f7-deb7937e2a25))
+      (net 189 "/Buf/AccA4") (pinfunction "A5") (pintype "input") (tstamp b6492bbc-fec4-4d41-a1f7-deb7937e2a25))
     (pad "8" smd roundrect locked (at -5.5625 -1.27 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 180 "/Buf/AccA2") (pinfunction "A4") (pintype "input") (tstamp 4e792223-e3f4-4e28-ae17-c0dea415381a))
+      (net 179 "/Buf/AccA2") (pinfunction "A4") (pintype "input") (tstamp 4e792223-e3f4-4e28-ae17-c0dea415381a))
     (pad "9" smd roundrect locked (at -5.5625 0 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 113 "/Buf/AccA10") (pinfunction "A3") (pintype "input") (tstamp d0410b71-6be8-48ba-8898-1688caf461dc))
     (pad "10" smd roundrect locked (at -5.5625 1.27 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
@@ -4104,23 +4086,23 @@
     (pad "12" smd roundrect locked (at -5.5625 3.81 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 137 "/Buf/AccA15") (pinfunction "A0") (pintype "input") (tstamp da82a1bc-165c-475b-860f-f72bb7d9b777))
     (pad "13" smd roundrect locked (at -5.5625 5.08 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 176 "/Buf/AccD8") (pinfunction "D0") (pintype "bidirectional") (tstamp 35130ed9-96f4-47ef-8cf4-5af49b81596f))
+      (net 175 "/Buf/AccD8") (pinfunction "D0") (pintype "bidirectional") (tstamp 35130ed9-96f4-47ef-8cf4-5af49b81596f))
     (pad "14" smd roundrect locked (at -3.81 6.8375 90) (size 0.6 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 175 "/Buf/AccD9") (pinfunction "D1") (pintype "bidirectional") (tstamp 67e43b65-6718-4517-bb9e-aa7427451b6a))
+      (net 174 "/Buf/AccD9") (pinfunction "D1") (pintype "bidirectional") (tstamp 67e43b65-6718-4517-bb9e-aa7427451b6a))
     (pad "15" smd roundrect locked (at -2.54 6.8375 90) (size 0.6 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 177 "/Buf/AccD10") (pinfunction "D2") (pintype "bidirectional") (tstamp a0c5009c-2bbd-42e1-b528-4225041fce3b))
+      (net 176 "/Buf/AccD10") (pinfunction "D2") (pintype "bidirectional") (tstamp a0c5009c-2bbd-42e1-b528-4225041fce3b))
     (pad "16" smd roundrect locked (at -1.27 6.8375 90) (size 0.6 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pinfunction "GND") (pintype "power_in") (tstamp 16362899-091d-4a99-a280-162941a4b288))
     (pad "17" smd roundrect locked (at 0 6.8375 90) (size 0.6 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 174 "/Buf/AccD11") (pinfunction "D3") (pintype "bidirectional") (tstamp b83681e5-995c-4d3c-8f3e-1d8a55962f50))
+      (net 173 "/Buf/AccD11") (pinfunction "D3") (pintype "bidirectional") (tstamp b83681e5-995c-4d3c-8f3e-1d8a55962f50))
     (pad "18" smd roundrect locked (at 1.27 6.8375 90) (size 0.6 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 178 "/Buf/AccD12") (pinfunction "D4") (pintype "bidirectional") (tstamp a708cf5d-cdb9-41a9-b8cb-aa9f61504936))
+      (net 177 "/Buf/AccD12") (pinfunction "D4") (pintype "bidirectional") (tstamp a708cf5d-cdb9-41a9-b8cb-aa9f61504936))
     (pad "19" smd roundrect locked (at 2.54 6.8375 90) (size 0.6 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 173 "/Buf/AccD13") (pinfunction "D5") (pintype "bidirectional") (tstamp 300f85ea-2d7b-4ea1-8372-037181ebcbc5))
+      (net 172 "/Buf/AccD13") (pinfunction "D5") (pintype "bidirectional") (tstamp 300f85ea-2d7b-4ea1-8372-037181ebcbc5))
     (pad "20" smd roundrect locked (at 3.81 6.8375 90) (size 0.6 1.475) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 171 "/Buf/AccD14") (pinfunction "D6") (pintype "bidirectional") (tstamp 46b69dc7-96f4-432d-8b25-5d53ade8b605))
+      (net 170 "/Buf/AccD14") (pinfunction "D6") (pintype "bidirectional") (tstamp 46b69dc7-96f4-432d-8b25-5d53ade8b605))
     (pad "21" smd roundrect locked (at 5.5625 5.08 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 172 "/Buf/AccD15") (pinfunction "D7") (pintype "bidirectional") (tstamp 9e4f0a1b-805b-4cd4-82f7-f07c3859366d))
+      (net 171 "/Buf/AccD15") (pinfunction "D7") (pintype "bidirectional") (tstamp 9e4f0a1b-805b-4cd4-82f7-f07c3859366d))
     (pad "22" smd roundrect locked (at 5.5625 3.81 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 129 "/Control/ROM~{CS}") (pinfunction "~{CS}") (pintype "input") (tstamp 16f523b6-dad5-472d-9057-914491a71dc9))
     (pad "23" smd roundrect locked (at 5.5625 2.54 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
@@ -4128,9 +4110,9 @@
     (pad "24" smd roundrect locked (at 5.5625 1.27 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 127 "/Control/~{OE}") (pinfunction "~{OE}") (pintype "input") (tstamp 1de69b98-543a-42c7-bd09-107c4579996a))
     (pad "25" smd roundrect locked (at 5.5625 0 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 242 "/RAMROM/B") (pinfunction "A11") (pintype "input") (tstamp c1b3f2d2-9c3b-444e-9923-9ac5b0837dc8))
+      (net 111 "/Control/RA11") (pinfunction "A11") (pintype "input") (tstamp c1b3f2d2-9c3b-444e-9923-9ac5b0837dc8))
     (pad "26" smd roundrect locked (at 5.5625 -1.27 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 140 "/Buf/AccA18") (pinfunction "A9") (pintype "input") (tstamp 33e18f06-d838-448a-aaac-1dac5360c793))
+      (net 116 "/Control/RA8") (pinfunction "A9") (pintype "input") (tstamp 33e18f06-d838-448a-aaac-1dac5360c793))
     (pad "27" smd roundrect locked (at 5.5625 -2.54 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 139 "/Buf/AccA17") (pinfunction "A8") (pintype "input") (tstamp ebb5cfff-1a6c-4f38-be65-71de9b6de216))
     (pad "28" smd roundrect locked (at 5.5625 -3.81 90) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
@@ -4216,15 +4198,15 @@
     (fp_line (start 12.1158 12.1158) (end -12.1158 12.1158) (layer "F.Fab") (width 0.1) (tstamp aa755bc1-2ff4-4ef7-a144-ba55e8e19414))
     (fp_line (start -12.1158 12.1158) (end -12.1158 -10.9728) (layer "F.Fab") (width 0.1) (tstamp fb7128c0-b4c5-4b72-91e6-92a4ff2431e0))
     (pad "1" smd roundrect locked (at 0 -11.8) (size 0.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 170 "/Buf/AccD4") (pinfunction "D4") (pintype "bidirectional") (tstamp fa8802c1-4002-4793-8cfc-d0885041f8c4))
+      (net 169 "/Buf/AccD4") (pinfunction "D4") (pintype "bidirectional") (tstamp fa8802c1-4002-4793-8cfc-d0885041f8c4))
     (pad "2" smd roundrect locked (at -1.27 -11.8) (size 0.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 166 "/Buf/AccD3") (pinfunction "D3") (pintype "bidirectional") (tstamp 1fc1aae0-0eae-41c5-9777-47e2572701d2))
+      (net 165 "/Buf/AccD3") (pinfunction "D3") (pintype "bidirectional") (tstamp 1fc1aae0-0eae-41c5-9777-47e2572701d2))
     (pad "3" smd roundrect locked (at -2.54 -11.8) (size 0.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 169 "/Buf/AccD2") (pinfunction "D2") (pintype "bidirectional") (tstamp e179250e-63b3-4501-a23f-c5cdaf626bc0))
+      (net 168 "/Buf/AccD2") (pinfunction "D2") (pintype "bidirectional") (tstamp e179250e-63b3-4501-a23f-c5cdaf626bc0))
     (pad "4" smd roundrect locked (at -3.81 -11.8) (size 0.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 167 "/Buf/AccD1") (pinfunction "D1") (pintype "bidirectional") (tstamp 8eef3042-fce1-4ee7-a6c0-5730bd16e769))
+      (net 166 "/Buf/AccD1") (pinfunction "D1") (pintype "bidirectional") (tstamp 8eef3042-fce1-4ee7-a6c0-5730bd16e769))
     (pad "5" smd roundrect locked (at -5.08 -11.8) (size 0.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 168 "/Buf/AccD0") (pinfunction "D0") (pintype "bidirectional") (tstamp 6b4649b0-06e8-4f50-a010-03821dab6017))
+      (net 167 "/Buf/AccD0") (pinfunction "D0") (pintype "bidirectional") (tstamp 6b4649b0-06e8-4f50-a010-03821dab6017))
     (pad "6" smd roundrect locked (at -6.35 -11.8) (size 0.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 132 "/Control/Acc~{AS}") (pinfunction "AS") (pintype "output") (tstamp 2405909b-745f-4534-b823-133bfeec3ff7))
     (pad "7" smd roundrect locked (at -7.62 -11.8) (size 0.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
@@ -4236,7 +4218,7 @@
     (pad "10" smd roundrect locked (at -11.8 -10.16) (size 1.7 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 135 "/Control/Acc~{DTACK}") (pinfunction "DTACK") (pintype "input") (tstamp cef5f600-44c7-40de-b0a4-def06aa90956))
     (pad "11" smd roundrect locked (at -11.8 -8.89) (size 1.7 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 226 "unconnected-(U14-Pad11)") (pinfunction "BG") (pintype "output+no_connect") (tstamp 908403ff-123f-42ff-b082-07454035953d))
+      (net 225 "unconnected-(U14-Pad11)") (pinfunction "BG") (pintype "output+no_connect") (tstamp 908403ff-123f-42ff-b082-07454035953d))
     (pad "12" smd roundrect locked (at -11.8 -7.62) (size 1.7 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 2 "+5V") (pinfunction "BGACK") (pintype "input") (tstamp a3df2fe9-c245-4926-9dd3-6275668de431))
     (pad "13" smd roundrect locked (at -11.8 -6.35) (size 1.7 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
@@ -4250,41 +4232,41 @@
     (pad "17" smd roundrect locked (at -11.8 -1.27) (size 1.7 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pinfunction "GND") (pintype "power_in") (tstamp ecb3e1a7-0a76-4edc-a0bc-e5e74b1bb69f))
     (pad "18" smd roundrect locked (at -11.8 0) (size 1.7 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 227 "unconnected-(U14-Pad18)") (pinfunction "NC") (pintype "no_connect") (tstamp 2788fe34-8346-4053-b56b-5466313f12fb))
+      (net 226 "unconnected-(U14-Pad18)") (pinfunction "NC") (pintype "no_connect") (tstamp 2788fe34-8346-4053-b56b-5466313f12fb))
     (pad "19" smd roundrect locked (at -11.8 1.27) (size 1.7 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 25 "/Control/~{RESET}") (pinfunction "HALT") (pintype "bidirectional") (tstamp 0f2b2f03-fcc6-4003-8d12-b77b786d4970))
     (pad "20" smd roundrect locked (at -11.8 2.54) (size 1.7 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 25 "/Control/~{RESET}") (pinfunction "RESET") (pintype "input") (tstamp 7d08fd25-151a-49fb-a530-fef9f19739c4))
     (pad "21" smd roundrect locked (at -11.8 3.81) (size 1.7 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 228 "unconnected-(U14-Pad21)") (pinfunction "VMA") (pintype "output+no_connect") (tstamp 0ca489b9-d618-4def-974d-fdc0a4ac4d94))
+      (net 227 "unconnected-(U14-Pad21)") (pinfunction "VMA") (pintype "output+no_connect") (tstamp 0ca489b9-d618-4def-974d-fdc0a4ac4d94))
     (pad "22" smd roundrect locked (at -11.8 5.08) (size 1.7 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 229 "unconnected-(U14-Pad22)") (pinfunction "E") (pintype "output+no_connect") (tstamp 1f69e6d1-fa79-4e77-9f38-18d52cefafcf))
+      (net 228 "unconnected-(U14-Pad22)") (pinfunction "E") (pintype "output+no_connect") (tstamp 1f69e6d1-fa79-4e77-9f38-18d52cefafcf))
     (pad "23" smd roundrect locked (at -11.8 6.35) (size 1.7 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 95 "/Control/Acc~{VPA}") (pinfunction "VPA") (pintype "input") (tstamp d2372d18-b860-4f8a-8092-679bceca32fd))
     (pad "24" smd roundrect locked (at -11.8 7.62) (size 1.7 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 96 "/Control/Acc~{BERR}") (pinfunction "BERR") (pintype "input") (tstamp 44b7265d-d9a2-477c-936d-55e55b561c9f))
     (pad "25" smd roundrect locked (at -11.8 8.89) (size 1.7 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 43 "/MC68k/~{IPL}2") (pinfunction "IPL2") (pintype "input") (tstamp 511667a9-d576-401e-847a-880ac0a3df94))
+      (net 43 "/Control/~{IPL}2") (pinfunction "IPL2") (pintype "input") (tstamp 511667a9-d576-401e-847a-880ac0a3df94))
     (pad "26" smd roundrect locked (at -11.8 10.16) (size 1.7 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 44 "/MC68k/~{IPL}1") (pinfunction "IPL1") (pintype "input") (tstamp 91f08920-44de-4b0a-9b9b-2e25378fe785))
     (pad "27" smd roundrect locked (at -10.16 11.8) (size 0.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 45 "/MC68k/~{IPL}0") (pinfunction "IPL0") (pintype "input") (tstamp 2024858b-9f96-46ab-b1ea-a42c509cebb1))
     (pad "28" smd roundrect locked (at -8.89 11.8) (size 0.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 230 "unconnected-(U14-Pad28)") (pinfunction "FC2") (pintype "output+no_connect") (tstamp 986cde6b-0b66-41f3-920b-f1f1d4bc4c14))
+      (net 229 "unconnected-(U14-Pad28)") (pinfunction "FC2") (pintype "output+no_connect") (tstamp 986cde6b-0b66-41f3-920b-f1f1d4bc4c14))
     (pad "29" smd roundrect locked (at -7.62 11.8) (size 0.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 238 "unconnected-(U14-Pad29)") (pinfunction "FC1") (pintype "output+no_connect") (tstamp 37909a65-24a5-4242-a45f-9e62a7a43e26))
+      (net 237 "unconnected-(U14-Pad29)") (pinfunction "FC1") (pintype "output+no_connect") (tstamp 37909a65-24a5-4242-a45f-9e62a7a43e26))
     (pad "30" smd roundrect locked (at -6.35 11.8) (size 0.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 239 "unconnected-(U14-Pad30)") (pinfunction "FC0") (pintype "output+no_connect") (tstamp e04da002-370f-4bdd-a94f-b1593eb81a11))
+      (net 238 "unconnected-(U14-Pad30)") (pinfunction "FC0") (pintype "output+no_connect") (tstamp e04da002-370f-4bdd-a94f-b1593eb81a11))
     (pad "31" smd roundrect locked (at -5.08 11.8) (size 0.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 240 "unconnected-(U14-Pad31)") (pinfunction "NC") (pintype "no_connect") (tstamp a5bd57a5-1a96-42c6-a7a2-1599585f5b4a))
+      (net 239 "unconnected-(U14-Pad31)") (pinfunction "NC") (pintype "no_connect") (tstamp a5bd57a5-1a96-42c6-a7a2-1599585f5b4a))
     (pad "32" smd roundrect locked (at -3.81 11.8) (size 0.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 179 "/Buf/AccA1") (pinfunction "A1") (pintype "output") (tstamp 849254a6-60dd-44dc-a84b-b07e555a10e5))
+      (net 178 "/Buf/AccA1") (pinfunction "A1") (pintype "output") (tstamp 849254a6-60dd-44dc-a84b-b07e555a10e5))
     (pad "33" smd roundrect locked (at -2.54 11.8) (size 0.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 180 "/Buf/AccA2") (pinfunction "A2") (pintype "output") (tstamp f73cb806-92b7-472c-b3c7-6fe4a66b6e16))
+      (net 179 "/Buf/AccA2") (pinfunction "A2") (pintype "output") (tstamp f73cb806-92b7-472c-b3c7-6fe4a66b6e16))
     (pad "34" smd roundrect locked (at -1.27 11.8) (size 0.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 181 "/Buf/AccA3") (pinfunction "A3") (pintype "output") (tstamp d71ea5c3-7092-4c97-960b-4a73bdcab149))
+      (net 180 "/Buf/AccA3") (pinfunction "A3") (pintype "output") (tstamp d71ea5c3-7092-4c97-960b-4a73bdcab149))
     (pad "35" smd roundrect locked (at 0 11.8) (size 0.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 190 "/Buf/AccA4") (pinfunction "A4") (pintype "output") (tstamp e2be8986-ee1e-4f3c-b1a2-43a22fd0e34b))
+      (net 189 "/Buf/AccA4") (pinfunction "A4") (pintype "output") (tstamp e2be8986-ee1e-4f3c-b1a2-43a22fd0e34b))
     (pad "36" smd roundrect locked (at 1.27 11.8) (size 0.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 103 "/Buf/AccA5") (pinfunction "A5") (pintype "output") (tstamp 1233ac0a-0c1b-42c3-8437-69d4a567497b))
     (pad "37" smd roundrect locked (at 2.54 11.8) (size 0.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
@@ -4330,27 +4312,27 @@
     (pad "57" smd roundrect locked (at 11.8 -6.35) (size 1.7 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pinfunction "GND") (pintype "power_in") (tstamp 1977c94d-c0c5-4c34-b52f-56f9b5911e99))
     (pad "58" smd roundrect locked (at 11.8 -7.62) (size 1.7 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 172 "/Buf/AccD15") (pinfunction "D15") (pintype "bidirectional") (tstamp 2df4d6a8-94d6-444c-9f19-a39377d932d5))
+      (net 171 "/Buf/AccD15") (pinfunction "D15") (pintype "bidirectional") (tstamp 2df4d6a8-94d6-444c-9f19-a39377d932d5))
     (pad "59" smd roundrect locked (at 11.8 -8.89) (size 1.7 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 171 "/Buf/AccD14") (pinfunction "D14") (pintype "bidirectional") (tstamp 7ff78ba9-3a07-4635-bb73-df8c5a06d752))
+      (net 170 "/Buf/AccD14") (pinfunction "D14") (pintype "bidirectional") (tstamp 7ff78ba9-3a07-4635-bb73-df8c5a06d752))
     (pad "60" smd roundrect locked (at 11.8 -10.16) (size 1.7 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 173 "/Buf/AccD13") (pinfunction "D13") (pintype "bidirectional") (tstamp e79fc384-74dc-484b-a360-270761f9e177))
+      (net 172 "/Buf/AccD13") (pinfunction "D13") (pintype "bidirectional") (tstamp e79fc384-74dc-484b-a360-270761f9e177))
     (pad "61" smd roundrect locked (at 10.16 -11.8) (size 0.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 178 "/Buf/AccD12") (pinfunction "D12") (pintype "bidirectional") (tstamp a92b5d70-d2fe-4e69-830f-499c4831fb42))
+      (net 177 "/Buf/AccD12") (pinfunction "D12") (pintype "bidirectional") (tstamp a92b5d70-d2fe-4e69-830f-499c4831fb42))
     (pad "62" smd roundrect locked (at 8.89 -11.8) (size 0.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 174 "/Buf/AccD11") (pinfunction "D11") (pintype "bidirectional") (tstamp 83f8b749-16fc-4dd1-b6e2-dad2001aedb5))
+      (net 173 "/Buf/AccD11") (pinfunction "D11") (pintype "bidirectional") (tstamp 83f8b749-16fc-4dd1-b6e2-dad2001aedb5))
     (pad "63" smd roundrect locked (at 7.62 -11.8) (size 0.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 177 "/Buf/AccD10") (pinfunction "D10") (pintype "bidirectional") (tstamp 134ea8a2-71b4-4ab9-b373-3d125b1061c3))
+      (net 176 "/Buf/AccD10") (pinfunction "D10") (pintype "bidirectional") (tstamp 134ea8a2-71b4-4ab9-b373-3d125b1061c3))
     (pad "64" smd roundrect locked (at 6.35 -11.8) (size 0.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 175 "/Buf/AccD9") (pinfunction "D9") (pintype "bidirectional") (tstamp 538f7d13-9de1-49ec-8920-750f8dd5b8b0))
+      (net 174 "/Buf/AccD9") (pinfunction "D9") (pintype "bidirectional") (tstamp 538f7d13-9de1-49ec-8920-750f8dd5b8b0))
     (pad "65" smd roundrect locked (at 5.08 -11.8) (size 0.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 176 "/Buf/AccD8") (pinfunction "D8") (pintype "bidirectional") (tstamp 6a0a28ba-f3ad-4de1-b0fb-e44f80f24930))
+      (net 175 "/Buf/AccD8") (pinfunction "D8") (pintype "bidirectional") (tstamp 6a0a28ba-f3ad-4de1-b0fb-e44f80f24930))
     (pad "66" smd roundrect locked (at 3.81 -11.8) (size 0.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 164 "/Buf/AccD7") (pinfunction "D7") (pintype "bidirectional") (tstamp ea624fb8-25d8-450c-8169-8fe8220b6b64))
+      (net 163 "/Buf/AccD7") (pinfunction "D7") (pintype "bidirectional") (tstamp ea624fb8-25d8-450c-8169-8fe8220b6b64))
     (pad "67" smd roundrect locked (at 2.54 -11.8) (size 0.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 163 "/Buf/AccD6") (pinfunction "D6") (pintype "bidirectional") (tstamp 2e58f8b1-ed86-4060-be2f-431c8d1ba4de))
+      (net 162 "/Buf/AccD6") (pinfunction "D6") (pintype "bidirectional") (tstamp 2e58f8b1-ed86-4060-be2f-431c8d1ba4de))
     (pad "68" smd roundrect locked (at 1.27 -11.8) (size 0.6 1.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 165 "/Buf/AccD5") (pinfunction "D5") (pintype "bidirectional") (tstamp c593d195-4fa6-4295-afc1-ecc37aa8dfe9))
+      (net 164 "/Buf/AccD5") (pinfunction "D5") (pintype "bidirectional") (tstamp c593d195-4fa6-4295-afc1-ecc37aa8dfe9))
     (model "${KIPRJMOD}/../stdpads.3dshapes/PLCC-68.wrl"
       (offset (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -5079,7 +5061,7 @@
     (fp_line (start -0.7 1.52) (end -0.7 -1.52) (layer "F.Fab") (width 0.1) (tstamp fd577e5c-bb72-4120-a110-9a2d0450d648))
     (fp_line (start 0.7 0.95) (end 0.15 1.52) (layer "F.Fab") (width 0.1) (tstamp ffcc17d8-fb69-497d-a593-c0e9f3244f9f))
     (pad "1" smd roundrect locked (at 1.05 0.95 270) (size 1.35 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 232 "Net-(C48-Pad1)") (pinfunction "B") (pintype "input") (tstamp 78c256b6-ad0d-4dad-b34a-070003989701))
+      (net 231 "Net-(C48-Pad1)") (pinfunction "B") (pintype "input") (tstamp 78c256b6-ad0d-4dad-b34a-070003989701))
     (pad "2" smd roundrect locked (at 1.05 -0.95 270) (size 1.35 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pinfunction "E") (pintype "passive") (tstamp 2e16ce1e-5b21-4ce7-97ad-9c70625edb53))
     (pad "3" smd roundrect locked (at -1.05 0 270) (size 1.35 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
@@ -5093,7 +5075,7 @@
 
   (footprint "stdpads:SW_DIP_SPSTx03_Slide_DSHP03TS_P1.27mm" (layer "F.Cu")
     (tedit 61F985D1) (tstamp 00000000-0000-0000-0000-000061e3a70c)
-    (at 107.95 123.19)
+    (at 107.823 123.19)
     (descr "SMD 8x-dip-switch SPST KingTek_DSHP03TS, Slide, row spacing 7.62 mm (300 mils), body size  (see http://www.kingtek.net.cn/pic/201601201417455112.pdf)")
     (tags "SMD DIP Switch SPST Slide 7.62mm 300mil")
     (property "LCSC Part" "C319051")
@@ -5107,7 +5089,7 @@
       (effects (font (size 0.8128 0.8128) (thickness 0.2032)))
       (tstamp cd503c7f-9d9e-406a-a8c1-47bf6f62750d)
     )
-    (fp_text value "OSCSEL" (at 0 1.905) (layer "F.Fab")
+    (fp_text value "CFG" (at 0 1.905) (layer "F.Fab")
       (effects (font (size 0.8128 0.8128) (thickness 0.2032)))
       (tstamp 4597e3d8-b37c-4ec8-b9d0-e7f089110eb5)
     )
@@ -5178,11 +5160,11 @@
     (pad "3" smd roundrect (at 1.27 3.81 90) (size 1.524 0.76) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pintype "passive") (tstamp 2f670324-aec0-491f-a8b2-53fe0726a16c))
     (pad "4" smd roundrect (at 1.27 -3.81 90) (size 1.524 0.76) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 234 "/Control/SW0") (pintype "passive") (tstamp 1b5d7dc9-5cfd-464e-b180-00317aa95f69))
+      (net 149 "/Control/SW2") (pintype "passive") (tstamp 1b5d7dc9-5cfd-464e-b180-00317aa95f69))
     (pad "5" smd roundrect (at 0 -3.81 90) (size 1.524 0.76) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 89 "/Control/SW1") (pintype "passive") (tstamp ac261603-5336-4692-858c-6a924eba379b))
     (pad "6" smd roundrect (at -1.27 -3.81 90) (size 1.524 0.76) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 90 "/Clk.sch/CK20EN") (pintype "passive") (tstamp 7222144b-bb37-4ff5-af64-15b27f61dd19))
+      (net 233 "/Control/SW0") (pintype "passive") (tstamp 7222144b-bb37-4ff5-af64-15b27f61dd19))
     (model "${KICAD6_3DMODEL_DIR}/Button_Switch_SMD.3dshapes/SW_DIP_SPSTx03_Slide_KingTek_DSHP03TS_W7.62mm_P1.27mm.wrl"
       (offset (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -5226,7 +5208,7 @@
     (pad "1" smd roundrect locked (at -0.8 0 270) (size 0.7 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 3 "+3V3") (pintype "passive") (tstamp b507f3c7-dd52-44a5-be46-b7c93b1c846c))
     (pad "2" smd roundrect locked (at 0.8 0 270) (size 0.7 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 90 "/Clk.sch/CK20EN") (pintype "passive") (tstamp e7885e9c-df74-4495-8a56-dc04059fb63f))
+      (net 233 "/Control/SW0") (pintype "passive") (tstamp e7885e9c-df74-4495-8a56-dc04059fb63f))
     (model "${KICAD6_3DMODEL_DIR}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl"
       (offset (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -5312,7 +5294,7 @@
     (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer "F.Fab") (width 0.1) (tstamp aadc967e-601d-4b5c-aac2-858b15694bbc))
     (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer "F.Fab") (width 0.1) (tstamp ed721ea8-a898-4756-a80a-8c04f5a0a037))
     (pad "1" smd roundrect locked (at -0.75 0 180) (size 0.85 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 223 "Net-(C47-Pad1)") (pintype "passive") (tstamp a0479d36-9940-4f42-9dba-783a16f258d5))
+      (net 222 "Net-(C47-Pad1)") (pintype "passive") (tstamp a0479d36-9940-4f42-9dba-783a16f258d5))
     (pad "2" smd roundrect locked (at 0.75 0 180) (size 0.85 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pintype "passive") (tstamp 61d3bbb9-ba8a-40c7-8c78-384d83332c59))
     (model "${KICAD6_3DMODEL_DIR}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl"
@@ -5358,7 +5340,7 @@
     (pad "1" smd roundrect locked (at -0.8 0 180) (size 0.7 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 2 "+5V") (pintype "passive") (tstamp debac77d-00fa-4b1a-81a6-13a783740175))
     (pad "2" smd roundrect locked (at 0.8 0 180) (size 0.7 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 233 "/Prog/JTAG~{OE}") (pintype "passive") (tstamp c082e35e-6c51-4400-ada6-ef959e0f58ef))
+      (net 232 "/Prog/JTAG~{OE}") (pintype "passive") (tstamp c082e35e-6c51-4400-ada6-ef959e0f58ef))
     (model "${KICAD6_3DMODEL_DIR}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl"
       (offset (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -5402,7 +5384,7 @@
     (pad "1" smd roundrect locked (at -0.8 0) (size 0.7 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 3 "+3V3") (pintype "passive") (tstamp a23d15ff-967a-4127-975b-fcec5cc72b53))
     (pad "2" smd roundrect locked (at 0.8 0) (size 0.7 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 235 "Net-(R9-Pad2)") (pintype "passive") (tstamp 542fed75-d832-4cce-b639-4d3f6a0db321))
+      (net 234 "Net-(R9-Pad2)") (pintype "passive") (tstamp 542fed75-d832-4cce-b639-4d3f6a0db321))
     (model "${KICAD6_3DMODEL_DIR}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl"
       (offset (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -5412,7 +5394,7 @@
 
   (footprint "stdpads:R_0603" (layer "F.Cu")
     (tedit 5EE29B72) (tstamp 00000000-0000-0000-0000-000061e4429d)
-    (at 193.95 58.85 180)
+    (at 194.15 58.85 180)
     (tags "resistor")
     (property "LCSC Part" "C25804")
     (property "Sheetfile" "Prog.kicad_sch")
@@ -5444,7 +5426,7 @@
     (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer "F.Fab") (width 0.1) (tstamp d6ce28b4-8cf4-4945-b8b6-d106aa3884a8))
     (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer "F.Fab") (width 0.1) (tstamp f5917c08-7bbe-41aa-9d72-ae9bf4c65661))
     (pad "1" smd roundrect locked (at -0.8 0 180) (size 0.7 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 232 "Net-(C48-Pad1)") (pintype "passive") (tstamp e0448b07-5467-4e45-afd1-8ca804a4b1bb))
+      (net 231 "Net-(C48-Pad1)") (pintype "passive") (tstamp e0448b07-5467-4e45-afd1-8ca804a4b1bb))
     (pad "2" smd roundrect locked (at 0.8 0 180) (size 0.7 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pintype "passive") (tstamp f9e8542b-7bb7-4a2d-976e-5d3e0748232e))
     (model "${KICAD6_3DMODEL_DIR}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl"
@@ -5490,19 +5472,19 @@
     (fp_line (start 3.25 -2.2) (end 3.25 2.2) (layer "F.Fab") (width 0.15) (tstamp aeba96ec-4762-40d3-9820-f9cdc67a3d62))
     (fp_line (start -3.25 1.2) (end -3.25 -2.2) (layer "F.Fab") (width 0.15) (tstamp e6950bbe-404c-42c3-bdd3-2cbf7bdf8117))
     (pad "1" smd roundrect locked (at -2.925 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 233 "/Prog/JTAG~{OE}") (pinfunction "~{OE}") (pintype "input") (tstamp 772715cf-3eca-43c7-acd6-2732c79f89ef))
+      (net 232 "/Prog/JTAG~{OE}") (pinfunction "~{OE}") (pintype "input") (tstamp 772715cf-3eca-43c7-acd6-2732c79f89ef))
     (pad "2" smd roundrect locked (at -2.275 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pinfunction "D0") (pintype "input") (tstamp a52f23f7-43bc-449e-b964-ceff7e98d2c4))
     (pad "3" smd roundrect locked (at -1.625 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 237 "/Prog/UTDI") (pinfunction "D1") (pintype "input") (tstamp d9048e70-e339-407d-b1d8-66fcd1a67a13))
+      (net 236 "/Prog/UTDI") (pinfunction "D1") (pintype "input") (tstamp d9048e70-e339-407d-b1d8-66fcd1a67a13))
     (pad "4" smd roundrect locked (at -0.975 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pinfunction "D2") (pintype "input") (tstamp 6163081d-6e3b-47c6-a34a-625765e408f3))
     (pad "5" smd roundrect locked (at -0.325 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 236 "/Prog/UTMS") (pinfunction "D3") (pintype "input") (tstamp 3c90b4d0-9010-4787-ad47-6da11bca7418))
+      (net 235 "/Prog/UTMS") (pinfunction "D3") (pintype "input") (tstamp 3c90b4d0-9010-4787-ad47-6da11bca7418))
     (pad "6" smd roundrect locked (at 0.325 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pinfunction "D4") (pintype "input") (tstamp 295ee819-de42-43e8-bbff-ab0cae618a87))
     (pad "7" smd roundrect locked (at 0.975 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 231 "/Prog/UTCK") (pinfunction "D5") (pintype "input") (tstamp 474d9598-e0f7-4b3f-93c4-c75ccd11f104))
+      (net 230 "/Prog/UTCK") (pinfunction "D5") (pintype "input") (tstamp 474d9598-e0f7-4b3f-93c4-c75ccd11f104))
     (pad "8" smd roundrect locked (at 1.625 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pinfunction "D6") (pintype "input") (tstamp 47ede5b7-6f1c-4575-9f97-f4d39a6d4872))
     (pad "9" smd roundrect locked (at 2.275 2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
@@ -5512,21 +5494,21 @@
     (pad "11" smd roundrect locked (at 2.925 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 2 "+5V") (pinfunction "~{LE}") (pintype "input") (tstamp 39334a2d-98c0-4282-a8cf-00331ddbfb55))
     (pad "12" smd roundrect locked (at 2.275 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 192 "unconnected-(U7-Pad12)") (pinfunction "Q7") (pintype "tri_state+no_connect") (tstamp 7dfbff39-1af8-457d-b0c0-769c06f3e139))
+      (net 191 "unconnected-(U7-Pad12)") (pinfunction "Q7") (pintype "tri_state+no_connect") (tstamp 7dfbff39-1af8-457d-b0c0-769c06f3e139))
     (pad "13" smd roundrect locked (at 1.625 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 193 "unconnected-(U7-Pad13)") (pinfunction "Q6") (pintype "tri_state+no_connect") (tstamp b1fb6367-dc1d-47d7-abeb-05e72df2f751))
+      (net 192 "unconnected-(U7-Pad13)") (pinfunction "Q6") (pintype "tri_state+no_connect") (tstamp b1fb6367-dc1d-47d7-abeb-05e72df2f751))
     (pad "14" smd roundrect locked (at 0.975 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 79 "/Control/TCK") (pinfunction "Q5") (pintype "tri_state") (tstamp 455fb6a9-339d-4b61-b7d7-bb64b376a82a))
     (pad "15" smd roundrect locked (at 0.325 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 194 "unconnected-(U7-Pad15)") (pinfunction "Q4") (pintype "tri_state+no_connect") (tstamp 4168f532-dc2d-4589-9e89-57ce7d7d6fdb))
+      (net 193 "unconnected-(U7-Pad15)") (pinfunction "Q4") (pintype "tri_state+no_connect") (tstamp 4168f532-dc2d-4589-9e89-57ce7d7d6fdb))
     (pad "16" smd roundrect locked (at -0.325 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 78 "/Control/TMS") (pinfunction "Q3") (pintype "tri_state") (tstamp 89564127-1647-4466-b053-6afef8602e27))
     (pad "17" smd roundrect locked (at -0.975 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 195 "unconnected-(U7-Pad17)") (pinfunction "Q2") (pintype "tri_state+no_connect") (tstamp 150bbb56-2806-4fec-84b0-1bebaa68bbd6))
+      (net 194 "unconnected-(U7-Pad17)") (pinfunction "Q2") (pintype "tri_state+no_connect") (tstamp 150bbb56-2806-4fec-84b0-1bebaa68bbd6))
     (pad "18" smd roundrect locked (at -1.625 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 81 "/Control/TDI") (pinfunction "Q1") (pintype "tri_state") (tstamp 8e8424f4-04cf-4407-8ca1-d88f78e90b98))
     (pad "19" smd roundrect locked (at -2.275 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 196 "unconnected-(U7-Pad19)") (pinfunction "Q0") (pintype "tri_state+no_connect") (tstamp 2d2a26ca-c83a-4fe1-b655-a617b0454f13))
+      (net 195 "unconnected-(U7-Pad19)") (pinfunction "Q0") (pintype "tri_state+no_connect") (tstamp 2d2a26ca-c83a-4fe1-b655-a617b0454f13))
     (pad "20" smd roundrect locked (at -2.925 -2.95) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 2 "+5V") (pinfunction "Vcc") (pintype "power_in") (tstamp c54610e8-7083-4ba7-9382-3836d5af5ad4))
     (model "${KICAD6_3DMODEL_DIR}/Package_SO.3dshapes/TSSOP-20_4.4x6.5mm_P0.65mm.wrl"
@@ -5570,7 +5552,7 @@
     (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer "F.Fab") (width 0.1) (tstamp 8b11ebf5-b4ed-41ce-aaeb-80c3e21aded9))
     (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer "F.Fab") (width 0.1) (tstamp ee0895ff-bec2-4dc0-a9f3-a14c5a497fd0))
     (pad "1" smd roundrect locked (at -0.75 0 180) (size 0.85 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 232 "Net-(C48-Pad1)") (pintype "passive") (tstamp 855b5c66-dd0f-46c6-9847-62901ab5e1d1))
+      (net 231 "Net-(C48-Pad1)") (pintype "passive") (tstamp 855b5c66-dd0f-46c6-9847-62901ab5e1d1))
     (pad "2" smd roundrect locked (at 0.75 0 180) (size 0.85 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pintype "passive") (tstamp 0c9e165d-bf99-412e-8178-abc28f381d1b))
     (model "${KICAD6_3DMODEL_DIR}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl"
@@ -5658,7 +5640,7 @@
     (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer "F.Fab") (width 0.1) (tstamp 5e6399d5-d248-492b-927e-6286bbd076a0))
     (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer "F.Fab") (width 0.1) (tstamp a7ed8fc0-46e2-4215-a072-23b27125b932))
     (pad "1" smd roundrect locked (at -0.8 0) (size 0.7 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 222 "Net-(R5-Pad1)") (pintype "passive") (tstamp fb61220a-2da9-49b8-b8c9-5424dc2d22fc))
+      (net 221 "Net-(R5-Pad1)") (pintype "passive") (tstamp fb61220a-2da9-49b8-b8c9-5424dc2d22fc))
     (pad "2" smd roundrect locked (at 0.8 0) (size 0.7 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pintype "passive") (tstamp 1c2c5ff6-f853-4e05-a23c-4d2b63bacf41))
     (model "${KICAD6_3DMODEL_DIR}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl"
@@ -5708,9 +5690,9 @@
     (pad "1" smd roundrect locked (at -4.445 2.475 180) (size 1.95 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pinfunction "GND") (pintype "power_in") (tstamp 89f00848-cc26-46cd-887f-ccb67881d67c))
     (pad "2" smd roundrect locked (at -3.175 2.475 180) (size 1.95 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 231 "/Prog/UTCK") (pinfunction "TXD") (pintype "output") (tstamp 58c507ec-6931-4b57-b5bb-2882e6358d65))
+      (net 230 "/Prog/UTCK") (pinfunction "TXD") (pintype "output") (tstamp 58c507ec-6931-4b57-b5bb-2882e6358d65))
     (pad "3" smd roundrect locked (at -1.905 2.475 180) (size 1.95 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 235 "Net-(R9-Pad2)") (pinfunction "RXD") (pintype "input") (tstamp 69d8fa74-a525-4fff-a855-e998a98df879))
+      (net 234 "Net-(R9-Pad2)") (pinfunction "RXD") (pintype "input") (tstamp 69d8fa74-a525-4fff-a855-e998a98df879))
     (pad "4" smd roundrect locked (at -0.635 2.475 180) (size 1.95 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 3 "+3V3") (pinfunction "V3") (pintype "passive") (tstamp 3e16dff3-76e1-416e-8717-628673dac9fd))
     (pad "5" smd roundrect locked (at 0.635 2.475 180) (size 1.95 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
@@ -5718,23 +5700,23 @@
     (pad "6" smd roundrect locked (at 1.905 2.475 180) (size 1.95 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 85 "Net-(J3-Pad2)") (pinfunction "UD-") (pintype "bidirectional") (tstamp 2d57a82b-2ef5-4222-b479-4b11587795ce))
     (pad "7" smd roundrect locked (at 3.175 2.475 180) (size 1.95 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 223 "Net-(C47-Pad1)") (pinfunction "XI") (pintype "input") (tstamp d601e927-6252-41c1-b1e7-f5468c07bdf8))
+      (net 222 "Net-(C47-Pad1)") (pinfunction "XI") (pintype "input") (tstamp d601e927-6252-41c1-b1e7-f5468c07bdf8))
     (pad "8" smd roundrect locked (at 4.445 2.475 180) (size 1.95 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 7 "Net-(C46-Pad1)") (pinfunction "XO") (pintype "output") (tstamp baeafbcb-e79a-4679-93d1-210bd5eb6d3c))
     (pad "9" smd roundrect locked (at 4.445 -2.475 180) (size 1.95 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 80 "/Prog/TDO") (pinfunction "~{CTS}") (pintype "input") (tstamp 352e147e-13f5-44a3-ad5c-c88a6f448c17))
     (pad "10" smd roundrect locked (at 3.175 -2.475 180) (size 1.95 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 197 "unconnected-(U12-Pad10)") (pinfunction "~{DSR}") (pintype "input+no_connect") (tstamp 47fe9fdd-a375-4fd9-9f81-aef1e8953e29))
+      (net 196 "unconnected-(U12-Pad10)") (pinfunction "~{DSR}") (pintype "input+no_connect") (tstamp 47fe9fdd-a375-4fd9-9f81-aef1e8953e29))
     (pad "11" smd roundrect locked (at 1.905 -2.475 180) (size 1.95 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 224 "unconnected-(U12-Pad11)") (pinfunction "~{RI}") (pintype "input+no_connect") (tstamp 5f9b49b8-6e74-4ff6-b23c-940c1939a097))
+      (net 223 "unconnected-(U12-Pad11)") (pinfunction "~{RI}") (pintype "input+no_connect") (tstamp 5f9b49b8-6e74-4ff6-b23c-940c1939a097))
     (pad "12" smd roundrect locked (at 0.635 -2.475 180) (size 1.95 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 225 "unconnected-(U12-Pad12)") (pinfunction "~{DCD}") (pintype "input+no_connect") (tstamp 276d37ea-f762-4bd6-9fe6-efc7033cfa79))
+      (net 224 "unconnected-(U12-Pad12)") (pinfunction "~{DCD}") (pintype "input+no_connect") (tstamp 276d37ea-f762-4bd6-9fe6-efc7033cfa79))
     (pad "13" smd roundrect locked (at -0.635 -2.475 180) (size 1.95 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 237 "/Prog/UTDI") (pinfunction "~{DTR}") (pintype "output") (tstamp 91a33c7d-476e-46a9-b463-ec89c591c216))
+      (net 236 "/Prog/UTDI") (pinfunction "~{DTR}") (pintype "output") (tstamp 91a33c7d-476e-46a9-b463-ec89c591c216))
     (pad "14" smd roundrect locked (at -1.905 -2.475 180) (size 1.95 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 236 "/Prog/UTMS") (pinfunction "~{RTS}") (pintype "output") (tstamp 9130217e-bd76-4d78-87b0-59df4012a0be))
+      (net 235 "/Prog/UTMS") (pinfunction "~{RTS}") (pintype "output") (tstamp 9130217e-bd76-4d78-87b0-59df4012a0be))
     (pad "15" smd roundrect locked (at -3.175 -2.475 180) (size 1.95 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 222 "Net-(R5-Pad1)") (pinfunction "R232") (pintype "input") (tstamp 5a053c7d-54b4-48c3-882d-1bd6aefe7168))
+      (net 221 "Net-(R5-Pad1)") (pinfunction "R232") (pintype "input") (tstamp 5a053c7d-54b4-48c3-882d-1bd6aefe7168))
     (pad "16" smd roundrect locked (at -4.445 -2.475 180) (size 1.95 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 3 "+3V3") (pinfunction "VCC") (pintype "power_in") (tstamp 293f0b75-8e0d-40d7-b565-5ef2a151a0a5))
     (model "${KICAD6_3DMODEL_DIR}/Package_SO.3dshapes/SOIC-16_3.9x9.9mm_P1.27mm.wrl"
@@ -5830,7 +5812,7 @@
     (pad "1" smd roundrect locked (at -4.25 0 270) (size 4.5 2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 7 "Net-(C46-Pad1)") (pinfunction "1") (pintype "passive") (tstamp a29c776a-9228-4de9-845f-f1dbf8bb6417))
     (pad "2" smd roundrect locked (at 4.25 0 270) (size 4.5 2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 223 "Net-(C47-Pad1)") (pinfunction "2") (pintype "passive") (tstamp de2427a2-bd9f-43e5-8704-406223f5593b))
+      (net 222 "Net-(C47-Pad1)") (pinfunction "2") (pintype "passive") (tstamp de2427a2-bd9f-43e5-8704-406223f5593b))
     (model "${KICAD6_3DMODEL_DIR}/Crystal.3dshapes/Crystal_SMD_HC49-SD.wrl"
       (offset (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -5875,7 +5857,7 @@
     (pad "2" smd roundrect locked (at 1.05 -0.95 90) (size 1.35 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 1 "GND") (pinfunction "E") (pintype "passive") (tstamp 4941d75e-3420-4e22-b2d9-eedec11faae7))
     (pad "3" smd roundrect locked (at -1.05 0 90) (size 1.35 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 233 "/Prog/JTAG~{OE}") (pinfunction "C") (pintype "passive") (tstamp 6ef160b4-aa27-491d-83bc-ae6b3d7073a5))
+      (net 232 "/Prog/JTAG~{OE}") (pinfunction "C") (pintype "passive") (tstamp 6ef160b4-aa27-491d-83bc-ae6b3d7073a5))
     (model "${KICAD6_3DMODEL_DIR}/Package_TO_SOT_SMD.3dshapes/SOT-23.wrl"
       (offset (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -5885,7 +5867,7 @@
 
   (footprint "stdpads:R_0603" (layer "F.Cu")
     (tedit 5EE29B72) (tstamp 00000000-0000-0000-0000-000061f6ee37)
-    (at 193.95 57.35 180)
+    (at 194.15 57.35 180)
     (tags "resistor")
     (property "LCSC Part" "C25804")
     (property "Sheetfile" "Prog.kicad_sch")
@@ -5917,7 +5899,7 @@
     (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer "F.Fab") (width 0.1) (tstamp c169d4f7-7f35-4e3a-a8f8-4aa4ea657a99))
     (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer "F.Fab") (width 0.1) (tstamp c4ef9db5-c0a9-4aa1-bb66-2b4c5d4e634a))
     (pad "1" smd roundrect locked (at -0.8 0 180) (size 0.7 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
-      (net 232 "Net-(C48-Pad1)") (pintype "passive") (tstamp 76012139-afda-434f-b918-9289c79819c1))
+      (net 231 "Net-(C48-Pad1)") (pintype "passive") (tstamp 76012139-afda-434f-b918-9289c79819c1))
     (pad "2" smd roundrect locked (at 0.8 0 180) (size 0.7 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
       (net 84 "/Prog/USB5V") (pintype "passive") (tstamp c479e255-bad9-42ab-b617-a8cb33103219))
     (model "${KICAD6_3DMODEL_DIR}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl"
@@ -6105,7 +6087,7 @@
 
   (footprint "stdpads:R_0603" (layer "F.Cu")
     (tedit 5EE29B72) (tstamp 3bc7767a-00a7-4fd2-b1dd-712a03697300)
-    (at 193.95 55.55 180)
+    (at 194.15 55.55 180)
     (tags "resistor")
     (property "LCSC Part" "C25804")
     (property "Sheetfile" "Prog.kicad_sch")
@@ -6147,6 +6129,94 @@
     )
   )
 
+  (footprint "stdpads:C_0805" (layer "F.Cu")
+    (tedit 5F02840E) (tstamp 52570ba9-3557-474e-a52f-d4f12ee58e0f)
+    (at 144.995 47.625)
+    (tags "capacitor")
+    (property "LCSC Part" "C15850")
+    (property "Sheetfile" "RAMROM.kicad_sch")
+    (property "Sheetname" "RAMROM")
+    (path "/00000000-0000-0000-0000-00005f723900/7ea41be9-54e8-47ac-8fd2-9913b35b7ed9")
+    (solder_mask_margin 0.05)
+    (solder_paste_margin -0.025)
+    (attr smd)
+    (fp_text reference "C50" (at 0 0) (layer "F.Fab")
+      (effects (font (size 0.254 0.254) (thickness 0.0635)))
+      (tstamp 6b167a04-e916-4cd4-963a-ba11507aa3f4)
+    )
+    (fp_text value "10u" (at 0 0.35) (layer "F.Fab")
+      (effects (font (size 0.254 0.254) (thickness 0.0635)))
+      (tstamp 611153db-4c27-4f70-a6fc-d84b10a27aa1)
+    )
+    (fp_text user "${REFERENCE}" (at 0 0) (layer "F.SilkS") hide
+      (effects (font (size 0.254 0.254) (thickness 0.0635)))
+      (tstamp 96a8fd33-ff4a-4555-8c9d-fab9d072df55)
+    )
+    (fp_line (start -0.4064 0.8) (end 0.4064 0.8) (layer "F.SilkS") (width 0.1524) (tstamp 109cbdc1-1ff2-4911-abc7-4f523e3e71ba))
+    (fp_line (start -0.4064 -0.8) (end 0.4064 -0.8) (layer "F.SilkS") (width 0.1524) (tstamp 9ffdd751-a079-4b22-9827-d5f3f5954ba5))
+    (fp_line (start -1.7 1) (end -1.7 -1) (layer "F.CrtYd") (width 0.05) (tstamp 061cb87a-6c0d-422a-b3ba-e6f458f64bc6))
+    (fp_line (start 1.7 -1) (end 1.7 1) (layer "F.CrtYd") (width 0.05) (tstamp 62946308-209c-4ce6-85e7-6a964f2f4de2))
+    (fp_line (start -1.7 -1) (end 1.7 -1) (layer "F.CrtYd") (width 0.05) (tstamp db1c29a2-fa7a-4129-b1ff-e1a4b1241512))
+    (fp_line (start 1.7 1) (end -1.7 1) (layer "F.CrtYd") (width 0.05) (tstamp dd0aa49e-980f-4c81-9e8e-d129ac5cb944))
+    (fp_line (start 1 -0.625) (end 1 0.625) (layer "F.Fab") (width 0.15) (tstamp 37da0939-4944-4631-9bac-eb6a6d78ef8a))
+    (fp_line (start -1 0.625) (end -1 -0.625) (layer "F.Fab") (width 0.15) (tstamp 49e9fb44-168d-432f-9962-ed5ba590c595))
+    (fp_line (start -1 -0.625) (end 1 -0.625) (layer "F.Fab") (width 0.15) (tstamp b189579e-550b-486b-9063-19f2e3f057bd))
+    (fp_line (start 1 0.625) (end -1 0.625) (layer "F.Fab") (width 0.15) (tstamp c3ff7203-b0de-4420-a2aa-d5ec5398b992))
+    (pad "1" smd roundrect locked (at -0.85 0) (size 1.05 1.4) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
+      (net 2 "+5V") (pintype "passive") (tstamp 2c725b8b-8f1f-425b-8b79-ce1b0ba2efdc))
+    (pad "2" smd roundrect locked (at 0.85 0) (size 1.05 1.4) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
+      (net 1 "GND") (pintype "passive") (tstamp 6eccdc42-ec1c-462f-bd73-7d3b125871b3))
+    (model "${KICAD6_3DMODEL_DIR}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl"
+      (offset (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (footprint "stdpads:C_0805" (layer "F.Cu")
+    (tedit 5F02840E) (tstamp aa5441ca-47c4-4a42-9649-468560e3a9a1)
+    (at 152.185 47.625 180)
+    (tags "capacitor")
+    (property "LCSC Part" "C15850")
+    (property "Sheetfile" "RAMROM.kicad_sch")
+    (property "Sheetname" "RAMROM")
+    (path "/00000000-0000-0000-0000-00005f723900/288541b7-4c27-4a3d-a164-daf4be300490")
+    (solder_mask_margin 0.05)
+    (solder_paste_margin -0.025)
+    (attr smd)
+    (fp_text reference "C51" (at 0 0) (layer "F.Fab")
+      (effects (font (size 0.254 0.254) (thickness 0.0635)))
+      (tstamp abc30536-6470-446a-b028-9489bce2d34c)
+    )
+    (fp_text value "10u" (at 0 0.35) (layer "F.Fab")
+      (effects (font (size 0.254 0.254) (thickness 0.0635)))
+      (tstamp 62a0889a-882a-4758-9d46-e481b57e6d60)
+    )
+    (fp_text user "${REFERENCE}" (at 0 0) (layer "F.SilkS") hide
+      (effects (font (size 0.254 0.254) (thickness 0.0635)))
+      (tstamp 7595d8bd-ae7b-4345-9aa5-9f394244f333)
+    )
+    (fp_line (start -0.4064 -0.8) (end 0.4064 -0.8) (layer "F.SilkS") (width 0.1524) (tstamp 9fe35466-98e5-4907-9e9d-ee288b8b6ea0))
+    (fp_line (start -0.4064 0.8) (end 0.4064 0.8) (layer "F.SilkS") (width 0.1524) (tstamp c95af83c-ab25-4869-8e3a-ecbcc3e5d211))
+    (fp_line (start 1.7 -1) (end 1.7 1) (layer "F.CrtYd") (width 0.05) (tstamp 02e27ebd-58d1-4012-8f5d-6935a1977bd4))
+    (fp_line (start -1.7 -1) (end 1.7 -1) (layer "F.CrtYd") (width 0.05) (tstamp 29975d8e-c889-4764-b706-d9db9944027d))
+    (fp_line (start -1.7 1) (end -1.7 -1) (layer "F.CrtYd") (width 0.05) (tstamp 6a2d3c83-14d0-47e6-b07e-4c4244edef92))
+    (fp_line (start 1.7 1) (end -1.7 1) (layer "F.CrtYd") (width 0.05) (tstamp 916be088-e4ca-4498-836b-6e84c0e3aed4))
+    (fp_line (start 1 0.625) (end -1 0.625) (layer "F.Fab") (width 0.15) (tstamp 0394566c-3481-4650-98b7-cd28aa658d60))
+    (fp_line (start -1 0.625) (end -1 -0.625) (layer "F.Fab") (width 0.15) (tstamp 18499716-addb-45e9-90cf-da13238beb7b))
+    (fp_line (start 1 -0.625) (end 1 0.625) (layer "F.Fab") (width 0.15) (tstamp 65076ef7-72a2-477a-a977-1ea25119fac7))
+    (fp_line (start -1 -0.625) (end 1 -0.625) (layer "F.Fab") (width 0.15) (tstamp fb61fbed-e477-428c-9fb9-3ef1a6172281))
+    (pad "1" smd roundrect locked (at -0.85 0 180) (size 1.05 1.4) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
+      (net 2 "+5V") (pintype "passive") (tstamp 93a1f52f-1110-4e4a-acc8-f1cd70dc6091))
+    (pad "2" smd roundrect locked (at 0.85 0 180) (size 1.05 1.4) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
+      (net 1 "GND") (pintype "passive") (tstamp 1aff344f-cb2a-4854-81fe-891efaee1fc8))
+    (model "${KICAD6_3DMODEL_DIR}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl"
+      (offset (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
   (footprint "stdpads:C_0805" (layer "F.Cu")
     (tedit 5F02840E) (tstamp d0787926-f73e-44d3-9a2a-ce71b91b1cba)
     (at 148.6 67.85)
@@ -6191,22 +6261,20 @@
     )
   )
 
-  (gr_line (start 112.854 121.539) (end 113.1715 121.8565) (layer "F.SilkS") (width 0.22) (tstamp 144264be-1fbb-49a5-90d0-78f8a1ac17f5))
-  (gr_line (start 112.854 124.9045) (end 113.1715 124.587) (layer "F.SilkS") (width 0.22) (tstamp 15d38fa0-21e7-4f4f-826e-727b57eae1ea))
-  (gr_line (start 112.854 124.9045) (end 112.854 123.952) (layer "F.SilkS") (width 0.22) (tstamp 250f72d2-1dab-46ec-a897-32bf8e176a02))
-  (gr_line (start 123.1265 122.4915) (end 123.1265 121.539) (layer "F.SilkS") (width 0.22) (tstamp 5583cd91-5a29-48e5-ae9b-ca9814203ee7))
-  (gr_line (start 123.1265 124.9045) (end 123.444 124.587) (layer "F.SilkS") (width 0.22) (tstamp 66abce42-3ffc-456e-aab1-fecffc912033))
-  (gr_line (start 123.1265 121.539) (end 122.809 121.8565) (layer "F.SilkS") (width 0.22) (tstamp 6c864d85-37de-41d9-a2ed-9e7d556bb188))
-  (gr_line (start 112.854 121.539) (end 112.5365 121.8565) (layer "F.SilkS") (width 0.22) (tstamp 7f6ac661-877b-4e0e-8d28-a625030359b6))
-  (gr_line (start 123.1265 121.539) (end 123.444 121.8565) (layer "F.SilkS") (width 0.22) (tstamp c220246a-b192-400c-b6b0-7a7698605f3b))
-  (gr_line (start 112.854 122.4915) (end 112.854 121.539) (layer "F.SilkS") (width 0.22) (tstamp c4ce2d0a-d024-4c63-904e-0471b83406ef))
-  (gr_line (start 112.854 124.9045) (end 112.5365 124.587) (layer "F.SilkS") (width 0.22) (tstamp d43b4e3f-930d-4cca-9e80-690431f9de68))
-  (gr_line (start 123.1265 124.9045) (end 122.809 124.587) (layer "F.SilkS") (width 0.22) (tstamp f41cb64d-0472-45eb-ab38-35b96600c3b2))
-  (gr_line (start 123.1265 124.9045) (end 123.1265 123.952) (layer "F.SilkS") (width 0.22) (tstamp fc93760d-9415-4ab2-8d70-efe3f9bc3d73))
-  (gr_arc (start 103.251 39.878) (mid 103.846159 38.441159) (end 105.283 37.846) (layer "Edge.Cuts") (width 0.15) (tstamp 00000000-0000-0000-0000-000061aa30c0))
+  (gr_line (start 113.108 121.539) (end 113.4255 121.8565) (layer "F.SilkS") (width 0.22) (tstamp 144264be-1fbb-49a5-90d0-78f8a1ac17f5))
+  (gr_line (start 113.108 124.9045) (end 113.4255 124.587) (layer "F.SilkS") (width 0.22) (tstamp 15d38fa0-21e7-4f4f-826e-727b57eae1ea))
+  (gr_line (start 113.108 124.9045) (end 113.108 123.952) (layer "F.SilkS") (width 0.22) (tstamp 250f72d2-1dab-46ec-a897-32bf8e176a02))
+  (gr_line (start 123.5075 122.4915) (end 123.5075 121.539) (layer "F.SilkS") (width 0.22) (tstamp 5583cd91-5a29-48e5-ae9b-ca9814203ee7))
+  (gr_line (start 123.5075 124.9045) (end 123.825 124.587) (layer "F.SilkS") (width 0.22) (tstamp 66abce42-3ffc-456e-aab1-fecffc912033))
+  (gr_line (start 123.5075 121.539) (end 123.19 121.8565) (layer "F.SilkS") (width 0.22) (tstamp 6c864d85-37de-41d9-a2ed-9e7d556bb188))
+  (gr_line (start 113.108 121.539) (end 112.7905 121.8565) (layer "F.SilkS") (width 0.22) (tstamp 7f6ac661-877b-4e0e-8d28-a625030359b6))
+  (gr_line (start 123.5075 121.539) (end 123.825 121.8565) (layer "F.SilkS") (width 0.22) (tstamp c220246a-b192-400c-b6b0-7a7698605f3b))
+  (gr_line (start 113.108 122.4915) (end 113.108 121.539) (layer "F.SilkS") (width 0.22) (tstamp c4ce2d0a-d024-4c63-904e-0471b83406ef))
+  (gr_line (start 113.108 124.9045) (end 112.7905 124.587) (layer "F.SilkS") (width 0.22) (tstamp d43b4e3f-930d-4cca-9e80-690431f9de68))
+  (gr_line (start 123.5075 124.9045) (end 123.19 124.587) (layer "F.SilkS") (width 0.22) (tstamp f41cb64d-0472-45eb-ab38-35b96600c3b2))
+  (gr_line (start 123.5075 124.9045) (end 123.5075 123.952) (layer "F.SilkS") (width 0.22) (tstamp fc93760d-9415-4ab2-8d70-efe3f9bc3d73))
   (gr_arc (start 105.283 129.54) (mid 103.846159 128.944841) (end 103.251 127.508) (layer "Edge.Cuts") (width 0.15) (tstamp 00000000-0000-0000-0000-000061aa30c1))
   (gr_arc (start 192.405 129.54) (mid 193.841841 130.135159) (end 194.437 131.572) (layer "Edge.Cuts") (width 0.15) (tstamp 00000000-0000-0000-0000-000061aa30c2))
-  (gr_arc (start 210.312 37.846) (mid 211.748841 38.441159) (end 212.344 39.878) (layer "Edge.Cuts") (width 0.15) (tstamp 00000000-0000-0000-0000-000061aa30c3))
   (gr_arc (start 196.469 139.954) (mid 195.032159 139.358841) (end 194.437 137.922) (layer "Edge.Cuts") (width 0.15) (tstamp 00000000-0000-0000-0000-000061aa30c4))
   (gr_arc (start 212.344 137.922) (mid 211.748841 139.358841) (end 210.312 139.954) (layer "Edge.Cuts") (width 0.15) (tstamp 00000000-0000-0000-0000-000061aa30c5))
   (gr_line (start 210.312 37.846) (end 105.283 37.846) (layer "Edge.Cuts") (width 0.15) (tstamp 00000000-0000-0000-0000-000061aa30c6))
@@ -6215,6 +6283,8 @@
   (gr_line (start 194.437 137.922) (end 194.437 131.572) (layer "Edge.Cuts") (width 0.15) (tstamp 00000000-0000-0000-0000-000061aa30c9))
   (gr_line (start 210.312 139.954) (end 196.469 139.954) (layer "Edge.Cuts") (width 0.15) (tstamp 00000000-0000-0000-0000-000061aa30ca))
   (gr_line (start 212.344 39.878) (end 212.344 137.922) (layer "Edge.Cuts") (width 0.15) (tstamp 00000000-0000-0000-0000-000061aa30cb))
+  (gr_arc (start 103.251 39.878) (mid 103.846159 38.441159) (end 105.283 37.846) (layer "Edge.Cuts") (width 0.15) (tstamp 0db8fa35-6c5e-4370-aa3a-e91e24139198))
+  (gr_arc (start 210.312 37.846) (mid 211.748841 38.441159) (end 212.344 39.878) (layer "Edge.Cuts") (width 0.15) (tstamp 2dca7c5a-467d-47ee-a380-a533a42da748))
   (gr_text "WarpSE" (at 152.4 41.148) (layer "F.SilkS") (tstamp 00000000-0000-0000-0000-000061aa2765)
     (effects (font (size 1.524 1.524) (thickness 0.3) italic))
   )
@@ -6230,37 +6300,37 @@
   (gr_text "Garrett’s Workshop" (at 129.54 40.894) (layer "F.SilkS") (tstamp 00000000-0000-0000-0000-000061aa2769)
     (effects (font (size 1.524 1.524) (thickness 0.225)))
   )
-  (gr_text ": Fast ROM" (at 123.7615 122.01525) (layer "F.SilkS") (tstamp 00000000-0000-0000-0000-000061e3d270)
+  (gr_text ": Fast ROM" (at 124.1425 122.01525) (layer "F.SilkS") (tstamp 00000000-0000-0000-0000-000061e3d270)
     (effects (font (size 0.9 0.9) (thickness 0.2032)) (justify left))
   )
-  (gr_text ": Motherboard ROM" (at 123.7615 124.42825) (layer "F.SilkS") (tstamp 00000000-0000-0000-0000-000061e3d271)
+  (gr_text ": Motherboard ROM" (at 124.1425 124.42825) (layer "F.SilkS") (tstamp 00000000-0000-0000-0000-000061e3d271)
     (effects (font (size 0.9 0.9) (thickness 0.2032)) (justify left))
   )
-  (gr_text "2" (at 107.95 117.729) (layer "F.SilkS") (tstamp 244a9bff-fad0-4070-811a-ad148eff6f83)
+  (gr_text "2" (at 107.823 117.729) (layer "F.SilkS") (tstamp 244a9bff-fad0-4070-811a-ad148eff6f83)
     (effects (font (size 0.9 0.9) (thickness 0.2032)))
   )
-  (gr_text ": 25 MHz" (at 113.489 122.047) (layer "F.SilkS") (tstamp 2a596aef-a82c-4147-ada8-ecbb4db64871)
+  (gr_text ": 25 MHz" (at 113.743 122.047) (layer "F.SilkS") (tstamp 2a596aef-a82c-4147-ada8-ecbb4db64871)
     (effects (font (size 0.9 0.9) (thickness 0.2032)) (justify left))
   )
-  (gr_text "2" (at 122.125 124.46) (layer "F.SilkS") (tstamp 2db23844-6d10-4822-b1c5-16d9c14240b6)
+  (gr_text "2" (at 122.506 124.46) (layer "F.SilkS") (tstamp 2db23844-6d10-4822-b1c5-16d9c14240b6)
     (effects (font (size 0.9 0.9) (thickness 0.2032)))
   )
-  (gr_text ": 20 MHz" (at 113.489 124.46) (layer "F.SilkS") (tstamp 56b9ba9c-ef55-40f5-a49b-05bb311a7d0e)
+  (gr_text ": 20 MHz" (at 113.743 124.46) (layer "F.SilkS") (tstamp 56b9ba9c-ef55-40f5-a49b-05bb311a7d0e)
     (effects (font (size 0.9 0.9) (thickness 0.2032)) (justify left))
   )
-  (gr_text "1" (at 106.68 117.729) (layer "F.SilkS") (tstamp 7a5bb9e0-84ed-4003-b1cd-dcbf4250fe8a)
+  (gr_text "1" (at 106.553 117.729) (layer "F.SilkS") (tstamp 7a5bb9e0-84ed-4003-b1cd-dcbf4250fe8a)
     (effects (font (size 0.9 0.9) (thickness 0.2032)))
   )
-  (gr_text "3" (at 109.22 117.729) (layer "F.SilkS") (tstamp 88c19d7e-539d-4c4e-8a1c-c36d32707ae8)
+  (gr_text "3" (at 109.093 117.729) (layer "F.SilkS") (tstamp 88c19d7e-539d-4c4e-8a1c-c36d32707ae8)
     (effects (font (size 0.9 0.9) (thickness 0.2032)))
   )
-  (gr_text "1" (at 111.887 124.46) (layer "F.SilkS") (tstamp b5bd2d1b-8163-4c49-96e3-b5ffab0682a4)
+  (gr_text "1" (at 112.141 124.46) (layer "F.SilkS") (tstamp b5bd2d1b-8163-4c49-96e3-b5ffab0682a4)
     (effects (font (size 0.9 0.9) (thickness 0.2032)))
   )
-  (gr_text "2" (at 122.125 122.047) (layer "F.SilkS") (tstamp b7f14af0-1466-496f-9c89-91ec2add13be)
+  (gr_text "2" (at 122.506 122.047) (layer "F.SilkS") (tstamp b7f14af0-1466-496f-9c89-91ec2add13be)
     (effects (font (size 0.9 0.9) (thickness 0.2032)))
   )
-  (gr_text "1" (at 111.887 122.047) (layer "F.SilkS") (tstamp dd4a6f3e-0bb0-434c-b292-098cf15d078e)
+  (gr_text "1" (at 112.141 122.047) (layer "F.SilkS") (tstamp dd4a6f3e-0bb0-434c-b292-098cf15d078e)
     (effects (font (size 0.9 0.9) (thickness 0.2032)))
   )
 
@@ -6305,11 +6375,7 @@
   (segment (start 181.05 112.55) (end 181.05 111.85) (width 0.5) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1958))
   (segment (start 189.55 112.55) (end 189.55 111.85) (width 0.5) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1959))
   (segment (start 181.05 111.85) (end 181.2 111.7) (width 0.5) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa195b))
-  (segment (start 181.05 103.45) (end 180.2 103.45) (width 0.6) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa195c))
-  (segment (start 189.55 103.45) (end 188.7 103.45) (width 0.6) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa195d))
-  (segment (start 189.55 112.55) (end 188.7 112.55) (width 0.6) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1961))
   (segment (start 166.575 104.951) (end 166.751 104.775) (width 0.6) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1963))
-  (segment (start 181.05 112.55) (end 180.2 112.55) (width 0.6) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1964))
   (segment (start 189.55 94.35) (end 188.7 94.35) (width 0.6) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1965))
   (segment (start 176.65 68.5) (end 175.55 68.5) (width 0.45) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa196b))
   (segment (start 165.608 104.951) (end 166.575 104.951) (width 0.6) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa196d))
@@ -6375,12 +6441,10 @@
   (segment (start 181.05 93.65) (end 181.2 93.5) (width 0.5) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1a3c))
   (segment (start 176.65 101.65) (end 175.55 101.65) (width 0.45) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1a3d))
   (segment (start 176.65 101.65) (end 177.75 101.65) (width 0.45) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1a3f))
-  (segment (start 181.05 94.35) (end 180.2 94.35) (width 0.6) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1a40))
   (segment (start 127.635 61.341) (end 127.635 59.3725) (width 0.6) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1a44))
   (segment (start 117.25 116.7625) (end 117.25 115.65) (width 0.3) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1a46))
   (segment (start 111.5875 108.6) (end 110.45 108.6) (width 0.3) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1a50))
   (segment (start 111.5875 112.1) (end 112.7 112.1) (width 0.3) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1a74))
-  (segment (start 111.5875 115.1) (end 110.45 115.1) (width 0.3) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1a77))
   (segment (start 111.5875 115.1) (end 111.5875 115.6375) (width 0.3) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1a78))
   (segment (start 111.5875 115.6375) (end 111.6 115.65) (width 0.3) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1a7a))
   (segment (start 111.5875 112.1) (end 110.45 112.1) (width 0.3) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1a7c))
@@ -6434,7 +6498,6 @@
   (segment (start 176.65 110.75) (end 177.75 110.75) (width 0.45) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ba5))
   (segment (start 176.65 119.85) (end 176.65 120.45) (width 0.45) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ba6))
   (segment (start 136.9175 100.711) (end 135.509 100.711) (width 0.6) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ba7))
-  (segment (start 176.65 119.85) (end 175.55 119.85) (width 0.45) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ba8))
   (segment (start 198.833 52.5) (end 199.0725 52.2605) (width 0.8) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ec8))
   (segment (start 197.866 52.5) (end 198.833 52.5) (width 0.8) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ec9))
   (segment (start 196.899 52.5) (end 196.6595 52.2605) (width 0.8) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ecb))
@@ -6499,11 +6562,7 @@
   (segment (start 128.2 114.6) (end 128.05 114.45) (width 0.5) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fca))
   (segment (start 128.05 114.45) (end 128.05 114.35) (width 0.5) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fcc))
   (segment (start 128.9 114.6) (end 128.2 114.6) (width 0.5) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fcd))
-  (segment (start 117.5 118.75) (end 117.5 119.45) (width 0.5) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fcf))
-  (segment (start 117.5 119.45) (end 117.65 119.6) (width 0.5) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fd0))
   (segment (start 117.5 118.75) (end 116.7 118.75) (width 0.5) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fd1))
-  (segment (start 125.5 118.75) (end 125.5 119.45) (width 0.5) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fd3))
-  (segment (start 125.5 119.45) (end 125.35 119.6) (width 0.5) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fd4))
   (segment (start 128.9 114.6) (end 128.9 115.4) (width 0.5) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fd6))
   (segment (start 116.25 101.4375) (end 116.25 100.3) (width 0.3) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fd8))
   (segment (start 116.25 101.4375) (end 116.25 102.55) (width 0.3) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fda))
@@ -6515,7 +6574,6 @@
   (segment (start 131.572 99.871) (end 130.605 99.871) (width 0.6) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ff4))
   (segment (start 132.539 99.871) (end 132.715 99.695) (width 0.6) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ff5))
   (segment (start 131.572 99.871) (end 132.539 99.871) (width 0.6) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ff7))
-  (segment (start 131.572 99.871) (end 131.572 100.838) (width 0.6) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ff9))
   (segment (start 111.5875 115.1) (end 112.7 115.1) (width 0.3) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa2005))
   (segment (start 148.385 76.63) (end 148.209 76.454) (width 0.6) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa200a))
   (segment (start 149.352 76.63) (end 148.385 76.63) (width 0.6) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa200b))
@@ -6552,19 +6610,30 @@
   (segment (start 196.2 41.15) (end 195.5 41.15) (width 0.5) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061fa33c4))
   (segment (start 195.5 41.15) (end 195.35 41) (width 0.5) (layer "F.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061fa33c6))
   (segment (start 122.85 66.545228) (end 122.85 66.55) (width 1.27) (layer "F.Cu") (net 1) (tstamp 05bcb62f-e639-408b-893f-71715cd8f94a))
+  (segment (start 176.65 95.8) (end 177.75 95.8) (width 0.45) (layer "F.Cu") (net 1) (tstamp 05f0e0ab-c9bc-4dad-a674-e29888f06bec))
+  (segment (start 125.35 119.65) (end 125.5 119.5) (width 0.5) (layer "F.Cu") (net 1) (tstamp 09fe178f-bfb5-4139-9310-827cb6a7872f))
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@@ -6750,77 +6790,39 @@
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   (via (at 149.225 84.3915) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ad8))
   (via (at 147.955 85.6615) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ad9))
@@ -6834,14 +6836,11 @@
   (via (at 163.83 69.4055) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ae2))
   (via (at 165.1 69.4055) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ae3))
   (via (at 165.1 67.5005) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ae4))
-  (via (at 203.581 38.6715) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1aed))
   (via (at 135.509 100.711) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1aee))
   (via (at 161.671 96.901) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1af1))
   (via (at 161.671 98.171) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1af3))
   (via (at 158.877 98.171) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1af5))
-  (via (at 112.141 38.6715) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1af6))
   (via (at 158.877 96.901) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1af7))
-  (via (at 107.061 38.6715) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1af8))
   (via (at 184.05 65.25) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1b63))
   (via (at 138.303 101.981) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1b65))
   (via (at 186.25 65.25) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1b66))
@@ -6885,9 +6884,9 @@
   (via (at 116.85 99.05) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1eda))
   (via (at 121.25 98.35) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1edd))
   (via (at 120.74 97.48) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ede))
-  (via (at 108.45 109.3) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1edf))
-  (via (at 107.35 109.6) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ee0))
-  (via (at 106.25 109.9) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ee1))
+  (via (at 108.35 109.2) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1edf))
+  (via (at 107.25 109.5) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ee0))
+  (via (at 105.85 109.5) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ee1))
   (via (at 107.25 104.55) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ee2))
   (via (at 109.9 105.5) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ee3))
   (via (at 113 92.65) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ee4))
@@ -6899,7 +6898,7 @@
   (via (at 115.4 79.65) (size 1) (drill 0.5) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ef0))
   (via (at 114.15 80.95) (size 1) (drill 0.5) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ef2))
   (via (at 152.3365 80.7085) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ef4))
-  (via (at 153.797 103.759) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ef7))
+  (via (at 153.67 103.5685) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ef7))
   (via (at 114.15 78.35) (size 1) (drill 0.5) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ef9))
   (via (at 120.45 96.35) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1efa))
   (via (at 173.228 56.515) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1efb))
@@ -6916,16 +6915,12 @@
   (via (at 147.32 93.98) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1f0b))
   (via (at 146.177 102.8065) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1f0c))
   (via (at 142.367 102.8065) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1f0d))
-  (via (at 157.48 100.1395) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1f0e))
   (via (at 142.113 111.76) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1f0f))
-  (via (at 140.462 120.015) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1f10))
-  (via (at 138.938 120.015) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1f11))
-  (via (at 137.414 120.015) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1f12))
   (via (at 162.179 72.7075) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1f13))
   (via (at 140.7795 75.438) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1f14))
   (via (at 143.891 75.565) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1f15))
-  (via (at 139.7 87.757) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1f16))
-  (via (at 140.97 88.138) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1f17))
+  (via (at 139.7 88.2015) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1f16))
+  (via (at 140.95 88.2) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1f17))
   (via (at 142.24 89.154) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1f18))
   (via (at 126.25 90.3) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1f19))
   (via (at 130.35 90.3) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1f1c))
@@ -6938,7 +6933,6 @@
   (via (at 165.862 72.517) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1f2c))
   (via (at 164.592 72.644) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1f2d))
   (via (at 163.449 72.898) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1f2e))
-  (via (at 165.7985 76.327) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1f2f))
   (via (at 170.815 82.1055) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1f30))
   (via (at 171.577 82.7405) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1f31))
   (via (at 172.339 83.3755) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1f32))
@@ -6948,8 +6942,7 @@
   (via (at 148.717 102.9335) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fa7))
   (via (at 149.987 103.6955) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fa8))
   (via (at 151.257 103.759) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fa9))
-  (via (at 156.21 101.4095) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1faa))
-  (via (at 154.94 102.6795) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fab))
+  (via (at 154.813 102.4255) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fab))
   (via (at 198.882 94.0435) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fac))
   (via (at 108.75 107.95) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1faf))
   (via (at 109.45 108.9) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fb2))
@@ -6962,9 +6955,9 @@
   (via (at 126.6 100.3) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fc6))
   (via (at 126.6 98.6) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fc9))
   (via (at 128.05 114.35) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fcb))
-  (via (at 117.7 119.6) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fce))
+  (via (at 117.75 119.6) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fce))
   (via (at 116.7 118.75) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fd2))
-  (via (at 125.35 119.6) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fd5))
+  (via (at 125.35 119.65) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fd5))
   (via (at 128.9 115.4) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fd7))
   (via (at 116.25 100.3) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fd9))
   (via (at 116.25 102.55) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1fdb))
@@ -6988,7 +6981,7 @@
   (via (at 152.4 93.98) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ff1))
   (via (at 130.429 99.695) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ff3))
   (via (at 132.715 99.695) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ff6))
-  (via (at 131.572 100.838) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ff8))
+  (via (at 131.572 100.8) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ff8))
   (via (at 143.764 113.284) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ffa))
   (via (at 147.955 116.332) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ffb))
   (via (at 146.685 116.332) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa1ffc))
@@ -7001,8 +6994,7 @@
   (via (at 156.845 116.332) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa2003))
   (via (at 158.115 116.332) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa2004))
   (via (at 112.7 115.1) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa2006))
-  (via (at 129.05 104.6) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa2007))
-  (via (at 128.15 103.6) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa2008))
+  (via (at 129.05 104.65) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa2007))
   (via (at 148.209 76.454) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa2009))
   (via (at 150.495 76.454) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa200c))
   (via (at 123.952 77.597) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa200f))
@@ -7015,7 +7007,7 @@
   (via (at 146.685 57.658) (size 0.6) (drill 0.3) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa21d0))
   (via (at 125.25 115.65) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061aa21d4))
   (via (at 197.55 63.9) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061ab74e0))
-  (via (at 192.55 119.05) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061acf2a7))
+  (via (at 192.85 119.05) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061acf2a7))
   (via (at 194.25 116.25) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061acf2b7))
   (via (at 195.95 116.25) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061acf2c5))
   (via (at 197.35 109.3) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061acf2c7))
@@ -7042,7 +7034,7 @@
   (via (at 175.7 41.9) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061f9476d))
   (via (at 197.05 41) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061fa33c3))
   (via (at 195.35 41) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061fa33c5))
-  (via (at 142.85 120.015) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061fa7363))
+  (via (at 143.256 120.015) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061fa7363))
   (via (at 147.6 120.015) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061fa7365))
   (via (at 162.55 123.8) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061fa7371))
   (via (at 171.95 114.15) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061fa7380))
@@ -7050,91 +7042,408 @@
   (via (at 166.5 96.95) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061fa738a))
   (via (at 167.5 98.25) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061fa7398))
   (via (at 173.85 98.25) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061fa73a0))
-  (via (at 129.6 117.65) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061fa73a8))
-  (via (at 128.55 117.3) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061fa73b6))
+  (via (at 128.524 117.1575) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061fa73b6))
   (via (at 108.75 98.15) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061fadf8b))
-  (via (at 108.95 96.95) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061fae53f))
+  (via (at 108.75 96.75) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 00000000-0000-0000-0000-000061fae53f))
+  (via (at 105.156 110.236) (size 0.5) (drill 0.2) (layers "F.Cu" "B.Cu") (net 1) (tstamp 004ddc1b-89bc-4bb9-81f0-fc90a1d5faef))
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diff --git a/WarpSE.kicad_prl b/WarpSE.kicad_prl
new file mode 100644
index 0000000..c910594
--- /dev/null
+++ b/WarpSE.kicad_prl
@@ -0,0 +1,75 @@
+{
+  "board": {
+    "active_layer": 0,
+    "active_layer_preset": "All Layers",
+    "auto_track_width": true,
+    "hidden_nets": [],
+    "high_contrast_mode": 0,
+    "net_color_mode": 1,
+    "opacity": {
+      "pads": 1.0,
+      "tracks": 1.0,
+      "vias": 1.0,
+      "zones": 0.6
+    },
+    "ratsnest_display_mode": 0,
+    "selection_filter": {
+      "dimensions": true,
+      "footprints": true,
+      "graphics": true,
+      "keepouts": true,
+      "lockedItems": true,
+      "otherItems": true,
+      "pads": true,
+      "text": true,
+      "tracks": true,
+      "vias": true,
+      "zones": true
+    },
+    "visible_items": [
+      0,
+      1,
+      2,
+      3,
+      4,
+      5,
+      8,
+      9,
+      10,
+      11,
+      12,
+      13,
+      14,
+      15,
+      16,
+      17,
+      18,
+      19,
+      20,
+      21,
+      22,
+      23,
+      24,
+      25,
+      26,
+      27,
+      28,
+      29,
+      30,
+      32,
+      33,
+      34,
+      35,
+      36
+    ],
+    "visible_layers": "fffffff_ffffffff",
+    "zone_display_mode": 0
+  },
+  "meta": {
+    "filename": "WarpSE.kicad_prl",
+    "version": 3
+  },
+  "project": {
+    "files": []
+  }
+}
diff --git a/Warp-SE.kicad_pro b/WarpSE.kicad_pro
similarity index 98%
rename from Warp-SE.kicad_pro
rename to WarpSE.kicad_pro
index 1759815..7928a1f 100644
--- a/Warp-SE.kicad_pro
+++ b/WarpSE.kicad_pro
@@ -33,9 +33,9 @@
         "other_text_thickness": 0.15,
         "other_text_upright": false,
         "pads": {
-          "drill": 0.762,
-          "height": 1.524,
-          "width": 1.524
+          "drill": 0.0,
+          "height": 0.4,
+          "width": 0.4
         },
         "silk_line_width": 0.12,
         "silk_text_italic": false,
@@ -395,7 +395,7 @@
     "pinned_symbol_libs": []
   },
   "meta": {
-    "filename": "Warp-SE.kicad_pro",
+    "filename": "WarpSE.kicad_pro",
     "version": 1
   },
   "net_settings": {
@@ -427,7 +427,7 @@
     "last_paths": {
       "gencad": "",
       "idf": "",
-      "netlist": "Warp-SE.net",
+      "netlist": "WarpSE.net",
       "specctra_dsn": "",
       "step": "",
       "vrml": ""
@@ -466,7 +466,7 @@
       "workbook_filename": ""
     },
     "page_layout_descr_file": "",
-    "plot_directory": "",
+    "plot_directory": "Documentation/",
     "spice_adjust_passive_values": false,
     "spice_external_command": "spice \"%I\"",
     "subpart_first_id": 65,
@@ -485,26 +485,26 @@
       "00000000-0000-0000-0000-000061b3a5f1",
       "Power"
     ],
-    [
-      "00000000-0000-0000-0000-00005f72f108",
-      "MC68k"
-    ],
     [
       "00000000-0000-0000-0000-000060941922",
       "Buf"
     ],
+    [
+      "00000000-0000-0000-0000-00005f72f108",
+      "MC68k"
+    ],
     [
       "00000000-0000-0000-0000-00005f723900",
       "RAMROM"
     ],
-    [
-      "00000000-0000-0000-0000-000061350d21",
-      "Clk.sch"
-    ],
     [
       "00000000-0000-0000-0000-00005f723173",
       "Control"
     ],
+    [
+      "00000000-0000-0000-0000-000061350d21",
+      "Clk.sch"
+    ],
     [
       "00000000-0000-0000-0000-000061a87b62",
       "DIPSW"
diff --git a/WarpSE.kicad_sch b/WarpSE.kicad_sch
new file mode 100644
index 0000000..326c79b
--- /dev/null
+++ b/WarpSE.kicad_sch
@@ -0,0 +1,1837 @@
+(kicad_sch (version 20211123) (generator eeschema)
+
+  (uuid a5be2cb8-c68d-4180-8412-69a6b4c5b1d4)
+
+  (paper "A4")
+
+  (lib_symbols
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+      (property "Reference" "FID" (id 0) (at 0 5.08 0)
+        (effects (font (size 1.27 1.27)))
+      )
+      (property "Value" "Fiducial" (id 1) (at 0 3.175 0)
+        (effects (font (size 1.27 1.27)))
+      )
+      (property "Footprint" "" (id 2) (at 0 0 0)
+        (effects (font (size 1.27 1.27)) hide)
+      )
+      (property "Datasheet" "~" (id 3) (at 0 0 0)
+        (effects (font (size 1.27 1.27)) hide)
+      )
+      (property "ki_keywords" "fiducial marker" (id 4) (at 0 0 0)
+        (effects (font (size 1.27 1.27)) hide)
+      )
+      (property "ki_description" "Fiducial Marker" (id 5) (at 0 0 0)
+        (effects (font (size 1.27 1.27)) hide)
+      )
+      (property "ki_fp_filters" "Fiducial*" (id 6) (at 0 0 0)
+        (effects (font (size 1.27 1.27)) hide)
+      )
+      (symbol "Fiducial_0_1"
+        (circle (center 0 0) (radius 1.27)
+          (stroke (width 0.508) (type default) (color 0 0 0 0))
+          (fill (type background))
+        )
+      )
+    )
+    (symbol "Mechanical:MountingHole" (pin_names (offset 1.016)) (in_bom yes) (on_board yes)
+      (property "Reference" "H" (id 0) (at 0 5.08 0)
+        (effects (font (size 1.27 1.27)))
+      )
+      (property "Value" "MountingHole" (id 1) (at 0 3.175 0)
+        (effects (font (size 1.27 1.27)))
+      )
+      (property "Footprint" "" (id 2) (at 0 0 0)
+        (effects (font (size 1.27 1.27)) hide)
+      )
+      (property "Datasheet" "~" (id 3) (at 0 0 0)
+        (effects (font (size 1.27 1.27)) hide)
+      )
+      (property "ki_keywords" "mounting hole" (id 4) (at 0 0 0)
+        (effects (font (size 1.27 1.27)) hide)
+      )
+      (property "ki_description" "Mounting Hole without connection" (id 5) (at 0 0 0)
+        (effects (font (size 1.27 1.27)) hide)
+      )
+      (property "ki_fp_filters" "MountingHole*" (id 6) (at 0 0 0)
+        (effects (font (size 1.27 1.27)) hide)
+      )
+      (symbol "MountingHole_0_1"
+        (circle (center 0 0) (radius 1.27)
+          (stroke (width 1.27) (type default) (color 0 0 0 0))
+          (fill (type none))
+        )
+      )
+    )
+  )
+
+  (junction (at 73.66 71.12) (diameter 0) (color 0 0 0 0)
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+      (uuid 89a8e170-a222-41c0-b545-c9f4c5604011)
+    )
+    (pin "R~{W}" bidirectional (at 38.1 73.66 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 9529c01f-e1cd-40be-b7f0-83780a544249)
+    )
+    (pin "~{VMA}" bidirectional (at 38.1 101.6 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid d68e5ddb-039c-483f-88a3-1b0b7964b482)
+    )
+    (pin "~{VPA}" output (at 38.1 114.3 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 6f580eb1-88cc-489d-a7ca-9efa5e590715)
+    )
+    (pin "~{DTACK}" output (at 38.1 111.76 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid b13e8448-bf35-4ec0-9c70-3f2250718cc2)
+    )
+    (pin "~{RESET}" bidirectional (at 38.1 40.64 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 5c7d6eaf-f256-4349-8203-d2e836872231)
+    )
+    (pin "~{IPL}0" output (at 38.1 48.26 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid dde8619c-5a8c-40eb-9845-65e6a654222d)
+    )
+    (pin "~{IPL}1" output (at 38.1 50.8 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid c7df8431-dcf5-4ab4-b8f8-21c1cafc5246)
+    )
+    (pin "~{IPL}2" output (at 38.1 53.34 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid d38aa458-d7c4-47af-ba08-2b6be506a3fd)
+    )
+    (pin "~{BERR}" output (at 38.1 116.84 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 3a41dd27-ec14-44d5-b505-aad1d829f79a)
+    )
+    (pin "E" output (at 38.1 134.62 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 0dfdfa9f-1e3f-4e14-b64b-12bde76a80c7)
+    )
+    (pin "C8M" output (at 38.1 132.08 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid e7d81bce-286e-41e4-9181-3511e9c0455e)
+    )
+    (pin "C16M" output (at 38.1 129.54 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 98fe66f3-ec8b-4515-ae34-617f2124a7ec)
+    )
+    (pin "~{BG}" output (at 38.1 124.46 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid a4f30452-13ce-41db-a994-304cf064bc1c)
+    )
+    (pin "~{BR}" input (at 38.1 121.92 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 0da2a34a-5106-4597-b573-3c36f99a32d1)
+    )
+  )
+
+  (sheet (at 81.28 66.04) (size 25.4 76.2)
+    (stroke (width 0) (type solid) (color 0 0 0 0))
+    (fill (color 0 0 0 0.0000))
+    (uuid 00000000-0000-0000-0000-00005f723173)
+    (property "Sheet name" "Control" (id 0) (at 81.28 66.04 0)
+      (effects (font (size 1.27 1.27)) (justify left bottom))
+    )
+    (property "Sheet file" "Control.kicad_sch" (id 1) (at 81.28 142.24 0)
+      (effects (font (size 1.27 1.27)) (justify left top))
+    )
+    (pin "~{RESET}" input (at 81.28 73.66 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 810ed4ff-ffe2-4032-9af6-fb5ada3bae5b)
+    )
+    (pin "FCLK" input (at 106.68 68.58 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid f2480d0c-9b08-4037-9175-b2369af04d4c)
+    )
+    (pin "Mac~{AS}" output (at 81.28 99.06 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid eac8d865-0226-4958-b547-6b5592f39713)
+    )
+    (pin "Mac~{VMA}" output (at 81.28 101.6 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 443bc73a-8dc0-4e2f-a292-a5eff00efa5b)
+    )
+    (pin "Mac~{DTACK}" input (at 81.28 111.76 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid cc75e5ae-3348-4e7a-bd16-4df685ee47bd)
+    )
+    (pin "Mac~{VPA}" input (at 81.28 114.3 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 83021f70-e61e-4ad3-bae7-b9f02b28be4f)
+    )
+    (pin "Mac~{BERR}" input (at 81.28 116.84 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid a25b7e01-1754-4cc9-8a14-3d9c461e5af5)
+    )
+    (pin "MacE" input (at 81.28 134.62 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 014d13cd-26ad-4d0e-86ad-a43b541cab14)
+    )
+    (pin "C8M" input (at 81.28 132.08 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 7744b6ee-910d-401d-b730-65c35d3d8092)
+    )
+    (pin "C16M" input (at 81.28 129.54 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 633292d3-80c5-4986-be82-ce926e9f09f4)
+    )
+    (pin "Acc~{DTACK}" output (at 106.68 76.2 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid dda1e6ca-91ec-4136-b90b-3c54d79454b9)
+    )
+    (pin "Acc~{BERR}" output (at 106.68 71.12 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid d0cd3439-276c-41ba-b38d-f84f6da38415)
+    )
+    (pin "Acc~{UDS}" input (at 106.68 81.28 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid b854a395-bfc6-4140-9640-75d4f9296771)
+    )
+    (pin "Acc~{LDS}" input (at 106.68 78.74 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid f5bf5b4a-5213-48af-a5cd-0d67969d2de6)
+    )
+    (pin "Acc~{AS}" input (at 106.68 83.82 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 89c9afdc-c346-4300-a392-5f9dd8c1e5bd)
+    )
+    (pin "~{OE}" output (at 106.68 111.76 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 8b7bbefd-8f78-41f8-809c-2534a5de3b39)
+    )
+    (pin "Mac~{UDS}" output (at 81.28 106.68 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 78f9c3d3-3556-46f6-9744-05ad54b330f0)
+    )
+    (pin "Mac~{LDS}" output (at 81.28 104.14 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 1427bb3f-0689-4b41-a816-cd79a5202fd0)
+    )
+    (pin "Acc~{VPA}" output (at 106.68 73.66 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 59cb2966-1e9c-4b3b-b3c8-7499378d8dde)
+    )
+    (pin "AccR~{W}" input (at 81.28 71.12 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 590fefcc-03e7-45d6-b6c9-e51a7c3c36c4)
+    )
+    (pin "L~{WE}" output (at 106.68 114.3 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 14094ad2-b562-4efa-8c6f-51d7a3134345)
+    )
+    (pin "U~{WE}" output (at 106.68 116.84 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid cbebc05a-c4dd-4baf-8c08-196e84e08b27)
+    )
+    (pin "~{RAS}" output (at 106.68 119.38 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid f7447e92-4293-41c4-be3f-69b30aad1f17)
+    )
+    (pin "~{CAS}" output (at 106.68 121.92 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 637f12be-fa48-4ce4-96b2-04c21a8795c8)
+    )
+    (pin "ROM~{CS}" output (at 106.68 106.68 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 5ff19d63-2cb4-438b-93c4-e66d37a05329)
+    )
+    (pin "DinLE" output (at 81.28 88.9 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid fa00d3f4-bb71-4b1d-aa40-ae9267e2c41f)
+    )
+    (pin "Dout~{OE}" output (at 81.28 78.74 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 616287d9-a51f-498c-8b91-be46a0aa3a7f)
+    )
+    (pin "Aout~{OE}" output (at 81.28 76.2 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid a599509f-fbb9-4db4-9adf-9e96bab1138d)
+    )
+    (pin "Din~{OE}" output (at 81.28 81.28 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 8bdea5f6-7a53-427a-92b8-fd15994c2e8c)
+    )
+    (pin "RA[11..0]" output (at 106.68 124.46 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 1cb22080-0f59-4c18-a6e6-8685ef44ec53)
+    )
+    (pin "A[23..1]" input (at 81.28 68.58 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 701e1517-e8cf-46f4-b538-98e721c97380)
+    )
+    (pin "ADoutLE0" output (at 81.28 83.82 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 235067e2-1686-40fe-a9a0-61704311b2b1)
+    )
+    (pin "ADoutLE1" output (at 81.28 86.36 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 31f91ec8-56e4-4e08-9ccd-012652772211)
+    )
+    (pin "ROM~{WE}" output (at 106.68 109.22 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid be41ac9e-b8ba-4089-983b-b84269707f1c)
+    )
+    (pin "SW0" input (at 106.68 91.44 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 98861672-254d-432b-8e5a-10d885a5ffdc)
+    )
+    (pin "SW1" input (at 106.68 93.98 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 5e7c3a32-8dda-4e6a-9838-c94d1f165575)
+    )
+    (pin "CK25EN" output (at 106.68 86.36 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 5f31b97b-d794-46d6-bbd9-7a5638bcf704)
+    )
+    (pin "TDI" input (at 106.68 134.62 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 3c9169cc-3a77-4ae0-8afc-cbfc472a28c5)
+    )
+    (pin "TMS" input (at 106.68 137.16 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 3e57b728-64e6-4470-8f27-a43c0dd85050)
+    )
+    (pin "TCK" input (at 106.68 132.08 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid bac7c5b3-99df-445a-ade9-1e608bbbe27e)
+    )
+    (pin "TDO" output (at 106.68 139.7 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 75b944f9-bf25-4dc7-8104-e9f80b4f359b)
+    )
+    (pin "SW2" input (at 106.68 96.52 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 2165c9a4-eb84-4cb6-a870-2fdc39d2511b)
+    )
+    (pin "Mac~{BR}" output (at 81.28 121.92 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 6ce84655-15b6-4143-aed8-826f523d6c72)
+    )
+    (pin "Mac~{BG}" input (at 81.28 124.46 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid db830c04-994e-4195-9fb2-da435a828685)
+    )
+    (pin "~{IPL}2" input (at 81.28 93.98 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid ba115b22-e951-466b-81a5-2aff6a5a2fea)
+    )
+    (pin "CK20EN" output (at 106.68 88.9 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 7c667b90-41cd-4e2a-9850-b6f11e7f3d28)
+    )
+  )
+
+  (sheet (at 114.3 99.06) (size 15.24 27.94)
+    (stroke (width 0) (type solid) (color 0 0 0 0))
+    (fill (color 0 0 0 0.0000))
+    (uuid 00000000-0000-0000-0000-00005f723900)
+    (property "Sheet name" "RAMROM" (id 0) (at 114.3 99.06 0)
+      (effects (font (size 1.27 1.27)) (justify left bottom))
+    )
+    (property "Sheet file" "RAMROM.kicad_sch" (id 1) (at 114.3 127 0)
+      (effects (font (size 1.27 1.27)) (justify left top))
+    )
+    (pin "~{RAS}" input (at 114.3 119.38 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid cbde200f-1075-469a-89f8-abbdcf30e36a)
+    )
+    (pin "D[15..0]" bidirectional (at 114.3 104.14 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 3249bd81-9fd4-4194-9b4f-2e333b2195b8)
+    )
+    (pin "~{CAS}" input (at 114.3 121.92 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 718e5c6d-0e4c-46d8-a149-2f2bfc54c7f1)
+    )
+    (pin "~{OE}" input (at 114.3 111.76 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 9e0e6fc0-a269-4822-b93d-4c5e6689ff11)
+    )
+    (pin "RA[11..0]" input (at 114.3 124.46 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 90f81af1-b6de-44aa-a46b-6504a157ce6c)
+    )
+    (pin "L~{WE}" input (at 114.3 114.3 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 1b023dd4-5185-4576-b544-68a05b9c360b)
+    )
+    (pin "U~{WE}" input (at 114.3 116.84 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid a64aeb89-c24a-493b-9aab-87a6be930bde)
+    )
+    (pin "ROM~{CS}" input (at 114.3 106.68 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 946404ba-9297-43ec-9d67-30184041145f)
+    )
+    (pin "A[23..1]" input (at 114.3 101.6 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 76afa8e0-9b3a-439d-843c-ad039d3b6354)
+    )
+    (pin "ROM~{WE}" input (at 114.3 109.22 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid a76a574b-1cac-43eb-81e6-0e2e278cea39)
+    )
+  )
+
+  (sheet (at 81.28 25.4) (size 25.4 30.48)
+    (stroke (width 0) (type solid) (color 0 0 0 0))
+    (fill (color 0 0 0 0.0000))
+    (uuid 00000000-0000-0000-0000-00005f72f108)
+    (property "Sheet name" "MC68k" (id 0) (at 81.28 25.4 0)
+      (effects (font (size 1.27 1.27)) (justify left bottom))
+    )
+    (property "Sheet file" "MC68k.kicad_sch" (id 1) (at 81.28 55.88 0)
+      (effects (font (size 1.27 1.27)) (justify left top))
+    )
+    (pin "A[23..1]" output (at 81.28 27.94 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 20caf6d2-76a7-497e-ac56-f6d31eb9027b)
+    )
+    (pin "D[15..0]" bidirectional (at 81.28 35.56 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 2f291a4b-4ecb-4692-9ad2-324f9784c0d4)
+    )
+    (pin "~{AS}" output (at 106.68 27.94 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid f447e585-df78-4239-b8cb-4653b3837bb1)
+    )
+    (pin "R~{W}" output (at 81.28 30.48 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 62a1f3d4-027d-4ecf-a37a-6fcf4263e9d2)
+    )
+    (pin "~{LDS}" output (at 106.68 35.56 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 3a70978e-dcc2-4620-a99c-514362812927)
+    )
+    (pin "~{UDS}" output (at 106.68 33.02 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 319639ae-c2c5-486d-93b1-d03bb1b64252)
+    )
+    (pin "~{DTACK}" input (at 106.68 40.64 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid fc4ad874-c922-4070-89f9-7262080469d8)
+    )
+    (pin "~{VPA}" input (at 106.68 43.18 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid a5c8e189-1ddc-4a66-984b-e0fd1529d346)
+    )
+    (pin "~{RESET}" bidirectional (at 81.28 40.64 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid c71f56c1-5b7c-4373-9716-fffac482104c)
+    )
+    (pin "~{BERR}" input (at 106.68 48.26 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 1ab71a3c-340b-469a-ada5-4f87f0b7b2fa)
+    )
+    (pin "~{IPL}0" input (at 81.28 48.26 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid dbe92a0d-89cb-4d3f-9497-c2c1d93a3018)
+    )
+    (pin "~{IPL}1" input (at 81.28 50.8 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 97581b9a-3f6b-4e88-8768-6fdb60e6aca6)
+    )
+    (pin "~{IPL}2" input (at 81.28 53.34 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 13bbfffc-affb-4b43-9eb1-f2ed90a8a919)
+    )
+    (pin "CLK" input (at 106.68 53.34 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 71f8d568-0f23-4ff2-8e60-1600ce517a48)
+    )
+  )
+
+  (sheet (at 40.64 66.04) (size 25.4 25.4)
+    (stroke (width 0) (type solid) (color 0 0 0 0))
+    (fill (color 0 0 0 0.0000))
+    (uuid 00000000-0000-0000-0000-000060941922)
+    (property "Sheet name" "Buf" (id 0) (at 40.64 66.04 0)
+      (effects (font (size 1.27 1.27)) (justify left bottom))
+    )
+    (property "Sheet file" "Buf.kicad_sch" (id 1) (at 40.64 96.52 0)
+      (effects (font (size 1.27 1.27)) (justify left top))
+    )
+    (pin "AccA[23..1]" bidirectional (at 66.04 68.58 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid f19c9655-8ddb-411a-96dd-bd986870c3c6)
+    )
+    (pin "MacA[23..1]" bidirectional (at 40.64 71.12 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid a0dee8e6-f88a-4f05-aba0-bab3aafdf2bc)
+    )
+    (pin "AccD[15..0]" bidirectional (at 66.04 73.66 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid d7e5a060-eb57-4238-9312-26bc885fc97d)
+    )
+    (pin "MacD[15..0]" bidirectional (at 40.64 78.74 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 901440f4-e2a6-4447-83cc-f58a2b26f5c4)
+    )
+    (pin "Dout~{OE}" input (at 66.04 78.74 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 2c60448a-e30f-46b2-89e1-a44f51688efc)
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+    (path "/00000000-0000-0000-0000-00005f723900/00000000-0000-0000-0000-000061871415"
+      (reference "U10") (unit 1) (value "39SF040") (footprint "stdpads:PLCC-32")
+    )
+    (path "/00000000-0000-0000-0000-00005f723900/00000000-0000-0000-0000-00006187142d"
+      (reference "U11") (unit 1) (value "39SF040") (footprint "stdpads:PLCC-32")
+    )
+    (path "/00000000-0000-0000-0000-000061aa52c4/00000000-0000-0000-0000-000061acf498"
+      (reference "U12") (unit 1) (value "CH340G") (footprint "stdpads:SOIC-16_3.9mm")
+    )
+    (path "/00000000-0000-0000-0000-000060941922/00000000-0000-0000-0000-000060941f85"
+      (reference "U13") (unit 1) (value "74AHCT573PW") (footprint "stdpads:TSSOP-20_4.4x6.5mm_P0.65mm")
+    )
+    (path "/00000000-0000-0000-0000-00005f72f108/00000000-0000-0000-0000-00006187db31"
+      (reference "U14") (unit 1) (value "MC68HC000FN20") (footprint "stdpads:PLCC-68")
+    )
+    (path "/00000000-0000-0000-0000-000060941922/00000000-0000-0000-0000-00006094447d"
+      (reference "U15") (unit 1) (value "74AHCT573PW") (footprint "stdpads:TSSOP-20_4.4x6.5mm_P0.65mm")
+    )
+    (path "/00000000-0000-0000-0000-000060941922/00000000-0000-0000-0000-000061398c8d"
+      (reference "U16") (unit 1) (value "74AHCT573PW") (footprint "stdpads:TSSOP-20_4.4x6.5mm_P0.65mm")
+    )
+    (path "/00000000-0000-0000-0000-000060941922/00000000-0000-0000-0000-00006169e1c7"
+      (reference "U17") (unit 1) (value "74AHCT573PW") (footprint "stdpads:TSSOP-20_4.4x6.5mm_P0.65mm")
+    )
+    (path "/00000000-0000-0000-0000-000060941922/00000000-0000-0000-0000-00006169e1cd"
+      (reference "U18") (unit 1) (value "74AHCT573PW") (footprint "stdpads:TSSOP-20_4.4x6.5mm_P0.65mm")
+    )
+    (path "/00000000-0000-0000-0000-000060941922/00000000-0000-0000-0000-000060976b52"
+      (reference "U19") (unit 1) (value "74AHCT573PW") (footprint "stdpads:TSSOP-20_4.4x6.5mm_P0.65mm")
+    )
+    (path "/00000000-0000-0000-0000-000060941922/00000000-0000-0000-0000-000060976b58"
+      (reference "U20") (unit 1) (value "74AHCT573PW") (footprint "stdpads:TSSOP-20_4.4x6.5mm_P0.65mm")
+    )
+    (path "/00000000-0000-0000-0000-000060941922/00000000-0000-0000-0000-000060991695"
+      (reference "U21") (unit 1) (value "74AHCT573PW") (footprint "stdpads:TSSOP-20_4.4x6.5mm_P0.65mm")
+    )
+    (path "/00000000-0000-0000-0000-000060941922/00000000-0000-0000-0000-0000609916a8"
+      (reference "U22") (unit 1) (value "74AHCT573PW") (footprint "stdpads:TSSOP-20_4.4x6.5mm_P0.65mm")
+    )
+    (path "/00000000-0000-0000-0000-000060941922/00000000-0000-0000-0000-0000617fd7c9"
+      (reference "U23") (unit 1) (value "74AHCT573PW") (footprint "stdpads:TSSOP-20_4.4x6.5mm_P0.65mm")
+    )
+    (path "/00000000-0000-0000-0000-000060941922/00000000-0000-0000-0000-0000617fcc42"
+      (reference "U24") (unit 1) (value "74AHCT573PW") (footprint "stdpads:TSSOP-20_4.4x6.5mm_P0.65mm")
+    )
+    (path "/00000000-0000-0000-0000-000061aa52c4/00000000-0000-0000-0000-0000616f4596"
+      (reference "Y1") (unit 1) (value "12M") (footprint "stdpads:Crystal_HC49-SMD")
+    )
+  )
+)
diff --git a/Warp-SE.kicad_sch b/WarpSE.kicad_sch-bak
similarity index 92%
rename from Warp-SE.kicad_sch
rename to WarpSE.kicad_sch-bak
index 13351a5..22798f0 100644
--- a/Warp-SE.kicad_sch
+++ b/WarpSE.kicad_sch-bak
@@ -34,11 +34,11 @@
         )
       )
     )
-    (symbol "Mechanical:MountingHole_Pad" (pin_numbers hide) (pin_names (offset 1.016) hide) (in_bom yes) (on_board yes)
-      (property "Reference" "H" (id 0) (at 0 6.35 0)
+    (symbol "Mechanical:MountingHole" (pin_names (offset 1.016)) (in_bom yes) (on_board yes)
+      (property "Reference" "H" (id 0) (at 0 5.08 0)
         (effects (font (size 1.27 1.27)))
       )
-      (property "Value" "MountingHole_Pad" (id 1) (at 0 4.445 0)
+      (property "Value" "MountingHole" (id 1) (at 0 3.175 0)
         (effects (font (size 1.27 1.27)))
       )
       (property "Footprint" "" (id 2) (at 0 0 0)
@@ -50,64 +50,18 @@
       (property "ki_keywords" "mounting hole" (id 4) (at 0 0 0)
         (effects (font (size 1.27 1.27)) hide)
       )
-      (property "ki_description" "Mounting Hole with connection" (id 5) (at 0 0 0)
+      (property "ki_description" "Mounting Hole without connection" (id 5) (at 0 0 0)
         (effects (font (size 1.27 1.27)) hide)
       )
-      (property "ki_fp_filters" "MountingHole*Pad*" (id 6) (at 0 0 0)
+      (property "ki_fp_filters" "MountingHole*" (id 6) (at 0 0 0)
         (effects (font (size 1.27 1.27)) hide)
       )
-      (symbol "MountingHole_Pad_0_1"
-        (circle (center 0 1.27) (radius 1.27)
+      (symbol "MountingHole_0_1"
+        (circle (center 0 0) (radius 1.27)
           (stroke (width 1.27) (type default) (color 0 0 0 0))
           (fill (type none))
         )
       )
-      (symbol "MountingHole_Pad_1_1"
-        (pin input line (at 0 -2.54 90) (length 2.54)
-          (name "1" (effects (font (size 1.27 1.27))))
-          (number "1" (effects (font (size 1.27 1.27))))
-        )
-      )
-    )
-    (symbol "power:GND" (power) (pin_names (offset 0)) (in_bom yes) (on_board yes)
-      (property "Reference" "#PWR" (id 0) (at 0 -6.35 0)
-        (effects (font (size 1.27 1.27)) hide)
-      )
-      (property "Value" "GND" (id 1) (at 0 -3.81 0)
-        (effects (font (size 1.27 1.27)))
-      )
-      (property "Footprint" "" (id 2) (at 0 0 0)
-        (effects (font (size 1.27 1.27)) hide)
-      )
-      (property "Datasheet" "" (id 3) (at 0 0 0)
-        (effects (font (size 1.27 1.27)) hide)
-      )
-      (property "ki_keywords" "power-flag" (id 4) (at 0 0 0)
-        (effects (font (size 1.27 1.27)) hide)
-      )
-      (property "ki_description" "Power symbol creates a global label with name \"GND\" , ground" (id 5) (at 0 0 0)
-        (effects (font (size 1.27 1.27)) hide)
-      )
-      (symbol "GND_0_1"
-        (polyline
-          (pts
-            (xy 0 0)
-            (xy 0 -1.27)
-            (xy 1.27 -1.27)
-            (xy 0 -2.54)
-            (xy -1.27 -1.27)
-            (xy 0 -1.27)
-          )
-          (stroke (width 0) (type default) (color 0 0 0 0))
-          (fill (type none))
-        )
-      )
-      (symbol "GND_1_1"
-        (pin power_in line (at 0 0 270) (length 0) hide
-          (name "GND" (effects (font (size 1.27 1.27))))
-          (number "1" (effects (font (size 1.27 1.27))))
-        )
-      )
     )
   )
 
@@ -117,24 +71,15 @@
   (junction (at 78.74 73.66) (diameter 0) (color 0 0 0 0)
     (uuid 475ed8b3-90bf-48cd-bce5-d8f48b689541)
   )
-  (junction (at 33.02 176.53) (diameter 0) (color 0 0 0 0)
-    (uuid 53e34696-241f-47e5-a477-f469335c8a61)
-  )
   (junction (at 71.12 59.69) (diameter 0) (color 0 0 0 0)
     (uuid 7c00778a-4692-4f9b-87d5-2d355077ce1e)
   )
   (junction (at 71.12 68.58) (diameter 0) (color 0 0 0 0)
     (uuid 90e761f6-1432-4f73-ad28-fa8869b7ec31)
   )
-  (junction (at 40.64 176.53) (diameter 0) (color 0 0 0 0)
-    (uuid 9390234f-bf3f-46cd-b6a0-8a438ec76e9f)
-  )
   (junction (at 76.2 62.23) (diameter 0) (color 0 0 0 0)
     (uuid a07b6b2b-7179-4297-b163-5e47ffbe76d3)
   )
-  (junction (at 48.26 176.53) (diameter 0) (color 0 0 0 0)
-    (uuid a90361cd-254c-4d27-ae1f-9a6c85bafe28)
-  )
   (junction (at 78.74 40.64) (diameter 0) (color 0 0 0 0)
     (uuid b78cb2c1-ae4b-4d9b-acd8-d7fe342342f2)
   )
@@ -198,10 +143,6 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 18ca5aef-6a2c-41ac-9e7f-bf7acb716e53)
   )
-  (wire (pts (xy 48.26 176.53) (xy 40.64 176.53))
-    (stroke (width 0) (type default) (color 0 0 0 0))
-    (uuid 18d11f32-e1a6-4f29-8e3c-0bfeb07299bd)
-  )
   (wire (pts (xy 127 81.28) (xy 106.68 81.28))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 1e48966e-d29d-4521-8939-ec8ac570431d)
@@ -222,7 +163,7 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 269f19c3-6824-45a8-be29-fa58d70cbb42)
   )
-  (wire (pts (xy 40.64 114.3) (xy 81.28 114.3))
+  (wire (pts (xy 40.64 127) (xy 81.28 127))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 283c990c-ae5a-4e41-a3ad-b40ca29fe90e)
   )
@@ -248,7 +189,7 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 34c0bee6-7425-4435-8857-d1fe8dfb6d89)
   )
-  (wire (pts (xy 40.64 106.68) (xy 81.28 106.68))
+  (wire (pts (xy 40.64 109.22) (xy 81.28 109.22))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 38cfe839-c630-43d3-a9ec-6a89ba9e318a)
   )
@@ -274,11 +215,11 @@
     (uuid 44035e53-ff94-45ad-801f-55a1ce042a0d)
   )
 
-  (wire (pts (xy 40.64 116.84) (xy 81.28 116.84))
+  (wire (pts (xy 40.64 129.54) (xy 81.28 129.54))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 49575217-40b0-4890-8acf-12982cca52b5)
   )
-  (wire (pts (xy 40.64 109.22) (xy 81.28 109.22))
+  (wire (pts (xy 40.64 111.76) (xy 81.28 111.76))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 4cafb73d-1ad8-4d24-acf7-63d78095ae46)
   )
@@ -295,23 +236,27 @@
     (uuid 582622a2-fad4-4737-9a80-be9fffbba8ab)
   )
 
-  (wire (pts (xy 40.64 104.14) (xy 81.28 104.14))
+  (wire (pts (xy 40.64 106.68) (xy 81.28 106.68))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 5889287d-b845-4684-b23e-663811b25d27)
   )
+  (wire (pts (xy 40.64 116.84) (xy 81.28 116.84))
+    (stroke (width 0) (type default) (color 0 0 0 0))
+    (uuid 5f307aaa-c78d-466a-b5f1-e9749b8abb96)
+  )
   (wire (pts (xy 40.64 53.34) (xy 81.28 53.34))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 62e8c4d4-266c-4e53-8981-1028251d724c)
   )
-  (wire (pts (xy 55.88 176.53) (xy 48.26 176.53))
-    (stroke (width 0) (type default) (color 0 0 0 0))
-    (uuid 6325c32f-c82a-4357-b022-f9c7e76f412e)
-  )
   (bus (pts (xy 71.12 59.69) (xy 111.76 59.69))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 63489ebf-0f52-43a6-a0ab-158b1a7d4988)
   )
 
+  (wire (pts (xy 40.64 119.38) (xy 81.28 119.38))
+    (stroke (width 0) (type default) (color 0 0 0 0))
+    (uuid 665158e2-2e89-40cf-858d-d80a34677763)
+  )
   (wire (pts (xy 106.68 111.76) (xy 114.3 111.76))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 6a2bcc72-047b-4846-8583-1109e3552669)
@@ -381,10 +326,6 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 84f2ad5c-d152-445e-a7aa-9d4631eecac2)
   )
-  (wire (pts (xy 33.02 176.53) (xy 25.4 176.53))
-    (stroke (width 0) (type default) (color 0 0 0 0))
-    (uuid 8cdc8ef9-532e-4bf5-9998-7213b9e692a2)
-  )
   (wire (pts (xy 73.66 71.12) (xy 81.28 71.12))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 91fe070a-a49b-4bc5-805a-42f23e10d114)
@@ -397,10 +338,6 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid 9c607e49-ee5c-4e85-a7da-6fede9912412)
   )
-  (wire (pts (xy 40.64 176.53) (xy 33.02 176.53))
-    (stroke (width 0) (type default) (color 0 0 0 0))
-    (uuid 9e813ec2-d4ce-4e2e-b379-c6fedb4c45db)
-  )
   (wire (pts (xy 106.68 109.22) (xy 114.3 109.22))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid a0e7a81b-2259-4f8d-8368-ba75f2004714)
@@ -435,7 +372,7 @@
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid be4b72db-0e02-4d9b-844a-aff689b4e648)
   )
-  (wire (pts (xy 40.64 111.76) (xy 81.28 111.76))
+  (wire (pts (xy 40.64 124.46) (xy 81.28 124.46))
     (stroke (width 0) (type default) (color 0 0 0 0))
     (uuid c1bac86f-cbf6-4c5b-b60d-c26fa73d9c09)
   )
@@ -542,38 +479,21 @@
     (uuid fe14c012-3d58-4e5e-9a37-4b9765a7f764)
   )
 
-  (symbol (lib_id "power:GND") (at 48.26 176.53 0) (unit 1)
-    (in_bom yes) (on_board yes)
-    (uuid 00000000-0000-0000-0000-00005cc8bafd)
-    (property "Reference" "#PWR0132" (id 0) (at 48.26 182.88 0)
-      (effects (font (size 1.27 1.27)) hide)
-    )
-    (property "Value" "GND" (id 1) (at 48.387 180.9242 0))
-    (property "Footprint" "" (id 2) (at 48.26 176.53 0)
-      (effects (font (size 1.27 1.27)) hide)
-    )
-    (property "Datasheet" "" (id 3) (at 48.26 176.53 0)
-      (effects (font (size 1.27 1.27)) hide)
-    )
-    (pin "1" (uuid 67bb613e-fef7-4add-b665-d588fcb40f13))
-  )
-
-  (symbol (lib_id "Mechanical:MountingHole_Pad") (at 55.88 173.99 0) (unit 1)
+  (symbol (lib_id "Mechanical:MountingHole") (at 55.88 173.99 0) (unit 1)
     (in_bom yes) (on_board yes)
     (uuid 00000000-0000-0000-0000-00005ed15a93)
-    (property "Reference" "H5" (id 0) (at 58.42 172.6946 0)
+    (property "Reference" "H5" (id 0) (at 58.42 173.99 0)
       (effects (font (size 1.27 1.27)) (justify left))
     )
     (property "Value" " " (id 1) (at 58.42 175.006 0)
       (effects (font (size 1.27 1.27)) (justify left))
     )
-    (property "Footprint" "stdpads:PasteHole_1.1mm_PTH" (id 2) (at 55.88 173.99 0)
+    (property "Footprint" "stdpads:PasteHole_1.152mm_NPTH" (id 2) (at 55.88 173.99 0)
       (effects (font (size 1.27 1.27)) hide)
     )
     (property "Datasheet" "~" (id 3) (at 55.88 173.99 0)
       (effects (font (size 1.27 1.27)) hide)
     )
-    (pin "1" (uuid 69e1082c-8471-453c-b3a7-6648df2618e2))
   )
 
   (symbol (lib_id "Mechanical:Fiducial") (at 25.4 181.61 0) (unit 1)
@@ -644,86 +564,82 @@
     )
   )
 
-  (symbol (lib_id "Mechanical:MountingHole_Pad") (at 25.4 173.99 0) (unit 1)
+  (symbol (lib_id "Mechanical:MountingHole") (at 25.4 173.99 0) (unit 1)
     (in_bom yes) (on_board yes)
     (uuid 00000000-0000-0000-0000-000061b21233)
-    (property "Reference" "H1" (id 0) (at 27.94 172.6946 0)
+    (property "Reference" "H1" (id 0) (at 27.94 173.99 0)
       (effects (font (size 1.27 1.27)) (justify left))
     )
     (property "Value" " " (id 1) (at 27.94 175.006 0)
       (effects (font (size 1.27 1.27)) (justify left))
     )
-    (property "Footprint" "stdpads:PasteHole_1.1mm_PTH" (id 2) (at 25.4 173.99 0)
+    (property "Footprint" "stdpads:PasteHole_1.152mm_NPTH" (id 2) (at 25.4 173.99 0)
       (effects (font (size 1.27 1.27)) hide)
     )
     (property "Datasheet" "~" (id 3) (at 25.4 173.99 0)
       (effects (font (size 1.27 1.27)) hide)
     )
-    (pin "1" (uuid 73de999d-cdc3-4d25-803d-363f3e918253))
   )
 
-  (symbol (lib_id "Mechanical:MountingHole_Pad") (at 33.02 173.99 0) (unit 1)
+  (symbol (lib_id "Mechanical:MountingHole") (at 33.02 173.99 0) (unit 1)
     (in_bom yes) (on_board yes)
     (uuid 00000000-0000-0000-0000-000061b21234)
-    (property "Reference" "H2" (id 0) (at 35.56 172.6946 0)
+    (property "Reference" "H2" (id 0) (at 35.56 173.99 0)
       (effects (font (size 1.27 1.27)) (justify left))
     )
     (property "Value" " " (id 1) (at 35.56 175.006 0)
       (effects (font (size 1.27 1.27)) (justify left))
     )
-    (property "Footprint" "stdpads:PasteHole_1.1mm_PTH" (id 2) (at 33.02 173.99 0)
+    (property "Footprint" "stdpads:PasteHole_1.152mm_NPTH" (id 2) (at 33.02 173.99 0)
       (effects (font (size 1.27 1.27)) hide)
     )
     (property "Datasheet" "~" (id 3) (at 33.02 173.99 0)
       (effects (font (size 1.27 1.27)) hide)
     )
-    (pin "1" (uuid 9faad16b-7ecd-46b4-b009-a3b5688fdc1e))
   )
 
-  (symbol (lib_id "Mechanical:MountingHole_Pad") (at 40.64 173.99 0) (unit 1)
+  (symbol (lib_id "Mechanical:MountingHole") (at 40.64 173.99 0) (unit 1)
     (in_bom yes) (on_board yes)
     (uuid 00000000-0000-0000-0000-000061b21235)
-    (property "Reference" "H3" (id 0) (at 43.18 172.6946 0)
+    (property "Reference" "H3" (id 0) (at 43.18 173.99 0)
       (effects (font (size 1.27 1.27)) (justify left))
     )
     (property "Value" " " (id 1) (at 43.18 175.006 0)
       (effects (font (size 1.27 1.27)) (justify left))
     )
-    (property "Footprint" "stdpads:PasteHole_1.1mm_PTH" (id 2) (at 40.64 173.99 0)
+    (property "Footprint" "stdpads:PasteHole_1.152mm_NPTH" (id 2) (at 40.64 173.99 0)
       (effects (font (size 1.27 1.27)) hide)
     )
     (property "Datasheet" "~" (id 3) (at 40.64 173.99 0)
       (effects (font (size 1.27 1.27)) hide)
     )
-    (pin "1" (uuid e990b5ec-f70e-4ffa-bc73-9e5eee4b6cbf))
   )
 
-  (symbol (lib_id "Mechanical:MountingHole_Pad") (at 48.26 173.99 0) (unit 1)
+  (symbol (lib_id "Mechanical:MountingHole") (at 48.26 173.99 0) (unit 1)
     (in_bom yes) (on_board yes)
     (uuid 00000000-0000-0000-0000-000061b21236)
-    (property "Reference" "H4" (id 0) (at 50.8 172.6946 0)
+    (property "Reference" "H4" (id 0) (at 50.8 173.99 0)
       (effects (font (size 1.27 1.27)) (justify left))
     )
     (property "Value" " " (id 1) (at 50.8 175.006 0)
       (effects (font (size 1.27 1.27)) (justify left))
     )
-    (property "Footprint" "stdpads:PasteHole_1.1mm_PTH" (id 2) (at 48.26 173.99 0)
+    (property "Footprint" "stdpads:PasteHole_1.152mm_NPTH" (id 2) (at 48.26 173.99 0)
       (effects (font (size 1.27 1.27)) hide)
     )
     (property "Datasheet" "~" (id 3) (at 48.26 173.99 0)
       (effects (font (size 1.27 1.27)) hide)
     )
-    (pin "1" (uuid 69607e7c-0042-4e3a-8fa1-ce24ac796e72))
   )
 
-  (sheet (at 26.67 27.94) (size 13.97 93.98)
+  (sheet (at 26.67 25.4) (size 13.97 106.68)
     (stroke (width 0) (type solid) (color 0 0 0 0))
     (fill (color 0 0 0 0.0000))
     (uuid 00000000-0000-0000-0000-00005f6da71d)
-    (property "Sheet name" "PDS" (id 0) (at 26.67 27.94 0)
+    (property "Sheet name" "PDS" (id 0) (at 26.67 25.4 0)
       (effects (font (size 1.27 1.27)) (justify left bottom))
     )
-    (property "Sheet file" "PDS.kicad_sch" (id 1) (at 26.67 121.92 0)
+    (property "Sheet file" "PDS.kicad_sch" (id 1) (at 26.67 132.08 0)
       (effects (font (size 1.27 1.27)) (justify left top))
     )
     (pin "A[23..1]" bidirectional (at 40.64 71.12 0)
@@ -754,11 +670,11 @@
       (effects (font (size 1.27 1.27)) (justify right))
       (uuid d68e5ddb-039c-483f-88a3-1b0b7964b482)
     )
-    (pin "~{VPA}" output (at 40.64 106.68 0)
+    (pin "~{VPA}" output (at 40.64 109.22 0)
       (effects (font (size 1.27 1.27)) (justify right))
       (uuid 6f580eb1-88cc-489d-a7ca-9efa5e590715)
     )
-    (pin "~{DTACK}" output (at 40.64 104.14 0)
+    (pin "~{DTACK}" output (at 40.64 106.68 0)
       (effects (font (size 1.27 1.27)) (justify right))
       (uuid b13e8448-bf35-4ec0-9c70-3f2250718cc2)
     )
@@ -778,22 +694,30 @@
       (effects (font (size 1.27 1.27)) (justify right))
       (uuid d38aa458-d7c4-47af-ba08-2b6be506a3fd)
     )
-    (pin "~{BERR}" output (at 40.64 109.22 0)
+    (pin "~{BERR}" output (at 40.64 111.76 0)
       (effects (font (size 1.27 1.27)) (justify right))
       (uuid 3a41dd27-ec14-44d5-b505-aad1d829f79a)
     )
-    (pin "E" output (at 40.64 116.84 0)
+    (pin "E" output (at 40.64 129.54 0)
       (effects (font (size 1.27 1.27)) (justify right))
       (uuid 0dfdfa9f-1e3f-4e14-b64b-12bde76a80c7)
     )
-    (pin "C8M" output (at 40.64 114.3 0)
+    (pin "C8M" output (at 40.64 127 0)
       (effects (font (size 1.27 1.27)) (justify right))
       (uuid e7d81bce-286e-41e4-9181-3511e9c0455e)
     )
-    (pin "C16M" output (at 40.64 111.76 0)
+    (pin "C16M" output (at 40.64 124.46 0)
       (effects (font (size 1.27 1.27)) (justify right))
       (uuid 98fe66f3-ec8b-4515-ae34-617f2124a7ec)
     )
+    (pin "~{BG}" output (at 40.64 119.38 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid a4f30452-13ce-41db-a994-304cf064bc1c)
+    )
+    (pin "~{BR}" input (at 40.64 116.84 0)
+      (effects (font (size 1.27 1.27)) (justify right))
+      (uuid 0da2a34a-5106-4597-b573-3c36f99a32d1)
+    )
   )
 
   (sheet (at 81.28 66.04) (size 25.4 73.66)
@@ -822,27 +746,27 @@
       (effects (font (size 1.27 1.27)) (justify left))
       (uuid 443bc73a-8dc0-4e2f-a292-a5eff00efa5b)
     )
-    (pin "Mac~{DTACK}" input (at 81.28 104.14 180)
+    (pin "Mac~{DTACK}" input (at 81.28 106.68 180)
       (effects (font (size 1.27 1.27)) (justify left))
       (uuid cc75e5ae-3348-4e7a-bd16-4df685ee47bd)
     )
-    (pin "Mac~{VPA}" input (at 81.28 106.68 180)
+    (pin "Mac~{VPA}" input (at 81.28 109.22 180)
       (effects (font (size 1.27 1.27)) (justify left))
       (uuid 83021f70-e61e-4ad3-bae7-b9f02b28be4f)
     )
-    (pin "Mac~{BERR}" input (at 81.28 109.22 180)
+    (pin "Mac~{BERR}" input (at 81.28 111.76 180)
       (effects (font (size 1.27 1.27)) (justify left))
       (uuid a25b7e01-1754-4cc9-8a14-3d9c461e5af5)
     )
-    (pin "MacE" input (at 81.28 116.84 180)
+    (pin "MacE" input (at 81.28 129.54 180)
       (effects (font (size 1.27 1.27)) (justify left))
       (uuid 014d13cd-26ad-4d0e-86ad-a43b541cab14)
     )
-    (pin "C8M" input (at 81.28 114.3 180)
+    (pin "C8M" input (at 81.28 127 180)
       (effects (font (size 1.27 1.27)) (justify left))
       (uuid 7744b6ee-910d-401d-b730-65c35d3d8092)
     )
-    (pin "C16M" input (at 81.28 111.76 180)
+    (pin "C16M" input (at 81.28 124.46 180)
       (effects (font (size 1.27 1.27)) (justify left))
       (uuid 633292d3-80c5-4986-be82-ce926e9f09f4)
     )
@@ -974,6 +898,14 @@
       (effects (font (size 1.27 1.27)) (justify right))
       (uuid 2165c9a4-eb84-4cb6-a870-2fdc39d2511b)
     )
+    (pin "Mac~{BR}" output (at 81.28 116.84 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid 6ce84655-15b6-4143-aed8-826f523d6c72)
+    )
+    (pin "Mac~{BG}" input (at 81.28 119.38 180)
+      (effects (font (size 1.27 1.27)) (justify left))
+      (uuid db830c04-994e-4195-9fb2-da435a828685)
+    )
   )
 
   (sheet (at 114.3 96.52) (size 15.24 27.94)
@@ -1240,14 +1172,14 @@
     )
   )
 
-  (sheet (at 26.67 127) (size 13.97 5.08)
+  (sheet (at 26.67 139.7) (size 13.97 5.08)
     (stroke (width 0) (type solid) (color 0 0 0 0))
     (fill (color 0 0 0 0.0000))
     (uuid 00000000-0000-0000-0000-000061b3a5f1)
-    (property "Sheet name" "Power" (id 0) (at 26.67 127 0)
+    (property "Sheet name" "Power" (id 0) (at 26.67 139.7 0)
       (effects (font (size 1.27 1.27)) (justify left bottom))
     )
-    (property "Sheet file" "Power.kicad_sch" (id 1) (at 26.67 132.08 0)
+    (property "Sheet file" "Power.kicad_sch" (id 1) (at 26.67 144.78 0)
       (effects (font (size 1.27 1.27)) (justify left top))
     )
   )
@@ -1256,11 +1188,11 @@
     (path "/" (page "1"))
     (path "/00000000-0000-0000-0000-00005f6da71d" (page "2"))
     (path "/00000000-0000-0000-0000-000061b3a5f1" (page "3"))
-    (path "/00000000-0000-0000-0000-00005f72f108" (page "5"))
     (path "/00000000-0000-0000-0000-000060941922" (page "4"))
+    (path "/00000000-0000-0000-0000-00005f72f108" (page "5"))
     (path "/00000000-0000-0000-0000-00005f723900" (page "6"))
-    (path "/00000000-0000-0000-0000-000061350d21" (page "8"))
     (path "/00000000-0000-0000-0000-00005f723173" (page "7"))
+    (path "/00000000-0000-0000-0000-000061350d21" (page "8"))
     (path "/00000000-0000-0000-0000-000061a87b62" (page "9"))
     (path "/00000000-0000-0000-0000-000061aa52c4" (page "10"))
   )
@@ -1359,7 +1291,7 @@
     (path "/00000000-0000-0000-0000-000061b3a5f1/00000000-0000-0000-0000-000061b3d39e"
       (reference "#PWR0131") (unit 1) (value "+3V3") (footprint "")
     )
-    (path "/00000000-0000-0000-0000-00005cc8bafd"
+    (path "/00000000-0000-0000-0000-00005f723900/dd546e6f-4429-48b7-9308-c650e538ed3c"
       (reference "#PWR0132") (unit 1) (value "GND") (footprint "")
     )
     (path "/00000000-0000-0000-0000-00005f723900/00000000-0000-0000-0000-00006144a3ad"
@@ -1431,12 +1363,6 @@
     (path "/00000000-0000-0000-0000-00005f6da71d/00000000-0000-0000-0000-0000616f0982"
       (reference "#PWR0155") (unit 1) (value "+12V") (footprint "")
     )
-    (path "/00000000-0000-0000-0000-00005f6da71d/00000000-0000-0000-0000-000061704865"
-      (reference "#PWR0156") (unit 1) (value "GND") (footprint "")
-    )
-    (path "/00000000-0000-0000-0000-00005f723900/c7ccb402-2065-48b9-b3c6-8970af29b229"
-      (reference "#PWR0157") (unit 1) (value "GND") (footprint "")
-    )
     (path "/00000000-0000-0000-0000-00005f723173/00000000-0000-0000-0000-0000616131f5"
       (reference "#PWR0158") (unit 1) (value "+3V3") (footprint "")
     )
@@ -1716,6 +1642,12 @@
     (path "/00000000-0000-0000-0000-000061aa52c4/00000000-0000-0000-0000-000061f5861d"
       (reference "C49") (unit 1) (value "2u2") (footprint "stdpads:C_0603")
     )
+    (path "/00000000-0000-0000-0000-00005f723900/7ea41be9-54e8-47ac-8fd2-9913b35b7ed9"
+      (reference "C50") (unit 1) (value "10u") (footprint "stdpads:C_0805")
+    )
+    (path "/00000000-0000-0000-0000-00005f723900/288541b7-4c27-4a3d-a164-daf4be300490"
+      (reference "C51") (unit 1) (value "10u") (footprint "stdpads:C_0805")
+    )
     (path "/00000000-0000-0000-0000-000061b2122f"
       (reference "FID1") (unit 1) (value "Fiducial") (footprint "stdpads:Fiducial")
     )
@@ -1729,19 +1661,19 @@
       (reference "FID4") (unit 1) (value "Fiducial") (footprint "stdpads:Fiducial")
     )
     (path "/00000000-0000-0000-0000-000061b21233"
-      (reference "H1") (unit 1) (value " ") (footprint "stdpads:PasteHole_1.1mm_PTH")
+      (reference "H1") (unit 1) (value " ") (footprint "stdpads:PasteHole_1.152mm_NPTH")
     )
     (path "/00000000-0000-0000-0000-000061b21234"
-      (reference "H2") (unit 1) (value " ") (footprint "stdpads:PasteHole_1.1mm_PTH")
+      (reference "H2") (unit 1) (value " ") (footprint "stdpads:PasteHole_1.152mm_NPTH")
     )
     (path "/00000000-0000-0000-0000-000061b21235"
-      (reference "H3") (unit 1) (value " ") (footprint "stdpads:PasteHole_1.1mm_PTH")
+      (reference "H3") (unit 1) (value " ") (footprint "stdpads:PasteHole_1.152mm_NPTH")
     )
     (path "/00000000-0000-0000-0000-000061b21236"
-      (reference "H4") (unit 1) (value " ") (footprint "stdpads:PasteHole_1.1mm_PTH")
+      (reference "H4") (unit 1) (value " ") (footprint "stdpads:PasteHole_1.152mm_NPTH")
     )
     (path "/00000000-0000-0000-0000-00005ed15a93"
-      (reference "H5") (unit 1) (value " ") (footprint "stdpads:PasteHole_1.1mm_PTH")
+      (reference "H5") (unit 1) (value " ") (footprint "stdpads:PasteHole_1.152mm_NPTH")
     )
     (path "/00000000-0000-0000-0000-00005f6da71d/00000000-0000-0000-0000-00005f6dd05a"
       (reference "J1") (unit 1) (value "MacSEPDS") (footprint "stdpads:DIN41612_R_3x32_Male_Vertical_THT")
@@ -1804,7 +1736,7 @@
       (reference "R16") (unit 1) (value "10k") (footprint "stdpads:R_0603")
     )
     (path "/00000000-0000-0000-0000-000061a87b62/00000000-0000-0000-0000-000061a8bbd9"
-      (reference "SW1") (unit 1) (value "OSCSEL") (footprint "stdpads:SW_DIP_SPSTx03_Slide_DSHP03TS_P1.27mm")
+      (reference "SW1") (unit 1) (value "CFG") (footprint "stdpads:SW_DIP_SPSTx03_Slide_DSHP03TS_P1.27mm")
     )
     (path "/00000000-0000-0000-0000-00005f723173/00000000-0000-0000-0000-00006318b3c7"
       (reference "U1") (unit 1) (value "XC95144XL-TQ100") (footprint "stdpads:TQFP-100_14x14mm_P0.5mm")
diff --git a/cpld/CS.v b/cpld/CS.v
index 55470b3..1b2705d 100644
--- a/cpld/CS.v
+++ b/cpld/CS.v
@@ -1,4 +1,6 @@
 module CS(
+	/* Setting input */
+	input MotherboardROMEN,
 	/* MC68HC000 interface */
 	input [23:08] A, input CLK, input nRES, input nWE, 
 	/* AS cycle detection */
@@ -42,11 +44,14 @@ module CS(
 		(A[15:12]==4'hF && (A[11:8]==4'hD || A[11:8]==4'hE || A[11:8]==4'hF)) ||
 		(A[15:12]==4'hA && (A[11:8]==4'h1 || A[11:8]==4'h2 || A[11:8]==4'h3)));
 
-	assign ROMCS = A[23:20]==4'h4 || (A[23:20]==4'h0 && Overlay);
+	assign ROMCS = (A[23:20]==4'h4 && !MotherboardROMEN) || 
+				   (A[23:20]==4'h8 &&  MotherboardROMEN) || 
+				   (A[23:20]==4'h0 && Overlay);
 
 	/* Select signals - IOB domain */
 	assign IACS = A[23:08]==16'hFFFF; // IACK
-	assign IOCS = A[23:20]==4'h5 || // SCSI
+	assign IOCS = (A[23:20]==4'h4 && MotherboardROMEN) || // Motherboard ROM
+				  A[23:20]==4'h5 || // SCSI
 	              A[23:20]==4'h8 || // empty
 	              A[23:20]==4'h9 || // SCC read/reset
 	              A[23:20]==4'hA || // empty
diff --git a/cpld/FSB.v b/cpld/FSB.v
index 9876a12..f323c45 100644
--- a/cpld/FSB.v
+++ b/cpld/FSB.v
@@ -4,7 +4,7 @@ module FSB(
 	/* AS cycle detection */
 	output BACT,
 	/* Ready inputs */
-	input Ready0, input Ready1, input Ready2,
+	input Ready0, input Ready1, input Ready2, input Disable,
 	/* BERR inputs */
 	input BERR0, input BERR1,
 	/* Interrupt acknowledge select */
@@ -18,9 +18,9 @@ module FSB(
 	/* Ready and BERR "remember" */
 	reg Ready0r, Ready1r, Ready2r;
 	reg BERR0r, BERR1r;
-	wire Ready = (Ready0 || Ready0r) && 
-					 (Ready1 || Ready1r) && 
-					 (Ready2 || Ready2r);
+	wire Ready = ~Disable && (Ready0 || Ready0r) && 
+							 (Ready1 || Ready1r) && 
+							 (Ready2 || Ready2r);
 	wire BERR = (BERR0 || BERR0r || BERR1 || BERR1r);
 	assign nBERR = ~(~nAS && BERR);
 	always @(posedge FCLK) begin
diff --git a/cpld/IOBM.v b/cpld/IOBM.v
index 6c5435e..9699bf8 100644
--- a/cpld/IOBM.v
+++ b/cpld/IOBM.v
@@ -1,12 +1,13 @@
 module IOBM(
 	/* PDS interface */
 	input C16M, input C8M, input E,
-	output reg nAS, output reg nLDS, output reg nUDS, output reg nVMA,
-	input nDTACK, input nVPA, input nBERR, input nRES,
+	output nBR, output reg nASout, output reg nLDS, output reg nUDS, output reg nVMA,
+	input nASin, input nBG, input nDTACK, input nVPA, input nBERR, input nRES,
 	/* PDS address and data latch control */
 	output nAoutOE, output reg nDoutOE, output reg ALE0, output reg nDinLE,
 	/* IO bus slave port interface */
-	output reg IOACT, output reg IOBERR, input IOREQ, input IOLDS, input IOUDS, input IOWE);
+	output reg IOACT, output reg IOBERR, 
+	input Park, input IOREQ, input IOLDS, input IOUDS, input IOWE);
 
 	/* I/O bus slave port input synchronization */
 	reg IOREQr = 0;
@@ -51,11 +52,23 @@ module IOBM(
 		else if (ES==0) nVMA <= 1;
 	end
 
+	/* Bus Request/Grant control */
+	assign nBR = Park;
+	reg BGr0 = 0;
+	reg BGr1 = 0;
+	reg BG = 0;
+	always @(posedge C16M) begin
+		BGr0 <= ~nBG;
+		BGr1 <= BGr0;
+		if (BGr1 && nASin) BG <= 1;
+		else if (~BGr0) BG <= 0;
+	end
+
 	/* I/O bus state */
 	reg [2:0] IOS = 0;
 	always @(posedge C16M) begin
 		if (IOS==0) begin
-			if (IOREQr) begin
+			if (IOREQr && BG) begin
 				if (~C8M) begin
 					IOS <= 1;
 				end else begin
@@ -107,7 +120,7 @@ module IOBM(
 	end
 
 	/* PDS address and data latch control */
-	assign nAoutOE = 0;
+	assign nAoutOE = ~BG;
 	always @(negedge C16M) begin nDinLE <= IOS==4 || IOS==5; end
 	always @(posedge C16M) begin
 		nDoutOE <= ~(IOWE && (IOS==1 || IOS==2 || IOS==3 || 
@@ -116,7 +129,7 @@ module IOBM(
 
 	/* AS, DS control */
 	always @(negedge C16M) begin
-		nAS <= ~(IOS==1 || IOS==2 || IOS==3 || IOS==4 || IOS==5);
+		nASout <= ~(IOS==1 || IOS==2 || IOS==3 || IOS==4 || IOS==5);
 		nLDS <= ~(IOLDS && (((IOS==1 || IOS==2) && ~IOWE) || IOS==3 || IOS==4 || IOS==5));
 		nUDS <= ~(IOUDS && (((IOS==1 || IOS==2) && ~IOWE) || IOS==3 || IOS==4 || IOS==5));
 	end
diff --git a/cpld/MXSE.ucf b/cpld/MXSE.ucf
index 3ff732a..d63b818 100644
--- a/cpld/MXSE.ucf
+++ b/cpld/MXSE.ucf
@@ -1,76 +1,3 @@
-#PACE: Start of Constraints generated by PACE
-#PACE: Start of PACE I/O Pin Assignments
-NET "A_FSB[10]"  LOC = "P8"  ;
-NET "A_FSB[11]"  LOC = "P9"  ;
-NET "A_FSB[12]"  LOC = "P10"  ;
-NET "A_FSB[13]"  LOC = "P11"  ;
-NET "A_FSB[14]"  LOC = "P12"  ;
-NET "A_FSB[15]"  LOC = "P13"  ;
-NET "A_FSB[16]"  LOC = "P14"  ;
-NET "A_FSB[17]"  LOC = "P15"  ;
-NET "A_FSB[18]"  LOC = "P16"  ;
-NET "A_FSB[19]"  LOC = "P17"  ;
-NET "A_FSB[1]"  LOC = "P94"  ;
-NET "A_FSB[20]"  LOC = "P18"  ;
-NET "A_FSB[21]"  LOC = "P19"  ;
-NET "A_FSB[22]"  LOC = "P20"  ;
-NET "A_FSB[23]"  LOC = "P24"  ;
-NET "A_FSB[2]"  LOC = "P95"  ;
-NET "A_FSB[3]"  LOC = "P96"  ;
-NET "A_FSB[4]"  LOC = "P97"  ;
-NET "A_FSB[5]"  LOC = "P2"  ;
-NET "A_FSB[6]"  LOC = "P3"  ;
-NET "A_FSB[7]"  LOC = "P4"  ;
-NET "A_FSB[8]"  LOC = "P6"  ;
-NET "A_FSB[9]"  LOC = "P7"  ;
-NET "CLK2X_IOB"  LOC = "P22"  ;
-NET "CLK_FSB"  LOC = "P27"  ;
-NET "CLK_IOB"  LOC = "P23"  ;
-NET "E_IOB"  LOC = "P25"  ;
-NET "nADoutLE0"  LOC = "P85"  ;
-NET "nADoutLE1"  LOC = "P82"  ;
-NET "nAoutOE"  LOC = "P87"  ;
-NET "nAS_FSB"  LOC = "P32"  ;
-NET "nAS_IOB"  LOC = "P81"  ;
-NET "nBERR_FSB"  LOC = "P70"  ;
-NET "nBERR_IOB"  LOC = "P76"  ;
-NET "nCAS"  LOC = "P36"  ;
-NET "nDinLE"  LOC = "P86"  ;
-NET "nDinOE"  LOC = "P90"  ;
-NET "nDoutOE"  LOC = "P89"  ;
-NET "nDTACK_FSB"  LOC = "P28"  ;
-NET "nDTACK_IOB"  LOC = "P78"  ;
-NET "nLDS_FSB"  LOC = "P30"  ;
-NET "nLDS_IOB"  LOC = "P79"  ;
-NET "nOE"  LOC = "P37"  ;
-NET "nRAMLWE"  LOC = "P65"  ;
-NET "nRAMUWE"  LOC = "P66"  ;
-NET "nRAS"  LOC = "P64"  ;
-NET "nRES"  LOC = "P91"  ;
-NET "nROMCS"  LOC = "P35"  ;
-NET "nROMWE"  LOC = "P34"  ;
-NET "nUDS_FSB"  LOC = "P33"  ;
-NET "nUDS_IOB"  LOC = "P80"  ;
-NET "nVMA_IOB"  LOC = "P74"  ;
-NET "nVPA_FSB"  LOC = "P93"  ;
-NET "nVPA_IOB"  LOC = "P77"  ;
-NET "nWE_FSB"  LOC = "P29"  ;
-NET "RA[0]"  LOC = "P53"  ;
-NET "RA[10]"  LOC = "P55"  ;
-NET "RA[11]"  LOC = "P63"  ;
-NET "RA[1]"  LOC = "P50"  ;
-NET "RA[2]"  LOC = "P43"  ;
-NET "RA[3]"  LOC = "P41"  ;
-NET "RA[4]"  LOC = "P40"  ;
-NET "RA[5]"  LOC = "P42"  ;
-NET "RA[6]"  LOC = "P46"  ;
-NET "RA[7]"  LOC = "P52"  ;
-NET "RA[8]"  LOC = "P54"  ;
-NET "RA[9]"  LOC = "P56"  ;
-
-#PACE: Start of PACE Area Constraints
-#PACE: Start of PACE Prohibit Constraints
-#PACE: End of Constraints generated by PACE
 #Created by Constraints Editor (xc95144xl-tq100-10) - 2022/02/07
 NET "CLK_FSB" TNM_NET = CLK_FSB;
 TIMESPEC TS_CLK_FSB = PERIOD "CLK_FSB" 25 MHz HIGH 50%;
@@ -78,3 +5,87 @@ NET "CLK2X_IOB" TNM_NET = CLK2X_IOB;
 TIMESPEC TS_CLK2X_IOB = PERIOD "CLK2X_IOB" 15.6672 MHz HIGH 50%;
 NET "CLK_IOB" TNM_NET = CLK_IOB;
 TIMESPEC TS_CLK_IOB = PERIOD "CLK_IOB" 7.8336 MHz HIGH 50%;
+#PACE: Start of Constraints generated by PACE
+
+#PACE: Start of PACE I/O Pin Assignments
+NET "A_FSB<10>"  LOC = "P8"  ; 
+NET "A_FSB<11>"  LOC = "P9"  ; 
+NET "A_FSB<12>"  LOC = "P10"  ; 
+NET "A_FSB<13>"  LOC = "P11"  ; 
+NET "A_FSB<14>"  LOC = "P12"  ; 
+NET "A_FSB<15>"  LOC = "P13"  ; 
+NET "A_FSB<16>"  LOC = "P14"  ; 
+NET "A_FSB<17>"  LOC = "P15"  ; 
+NET "A_FSB<18>"  LOC = "P16"  ; 
+NET "A_FSB<19>"  LOC = "P17"  ; 
+NET "A_FSB<1>"  LOC = "P94"  ; 
+NET "A_FSB<20>"  LOC = "P18"  ; 
+NET "A_FSB<21>"  LOC = "P19"  ; 
+NET "A_FSB<22>"  LOC = "P20"  ; 
+NET "A_FSB<23>"  LOC = "P24"  ; 
+NET "A_FSB<2>"  LOC = "P95"  ; 
+NET "A_FSB<3>"  LOC = "P96"  ; 
+NET "A_FSB<4>"  LOC = "P97"  ; 
+NET "A_FSB<5>"  LOC = "P2"  ; 
+NET "A_FSB<6>"  LOC = "P3"  ; 
+NET "A_FSB<7>"  LOC = "P4"  ; 
+NET "A_FSB<8>"  LOC = "P6"  ; 
+NET "A_FSB<9>"  LOC = "P7"  ; 
+NET "CLK20EN"  LOC = "P59"  ;
+NET "CLK25EN"  LOC = "P58"  ;
+NET "CLK2X_IOB"  LOC = "P22"  ; 
+NET "CLK_FSB"  LOC = "P27"  ; 
+NET "CLK_IOB"  LOC = "P23"  ; 
+NET "E_IOB"  LOC = "P25"  ; 
+NET "nADoutLE0"  LOC = "P85"  ; 
+NET "nADoutLE1"  LOC = "P82"  ; 
+NET "nAoutOE"  LOC = "P87"  ; 
+NET "nAS_FSB"  LOC = "P32"  ; 
+NET "nAS_IOB"  LOC = "P81"  ; 
+NET "nBERR_FSB"  LOC = "P70"  ; 
+NET "nBERR_IOB"  LOC = "P76"  ; 
+NET "nBG_IOB"  LOC = "P73"  ;
+NET "nBR_IOB"  LOC = "P72"  ;
+NET "nCAS"  LOC = "P36"  ; 
+NET "nDinLE"  LOC = "P86"  ; 
+NET "nDinOE"  LOC = "P90"  ; 
+NET "nDoutOE"  LOC = "P89"  ; 
+NET "nDTACK_FSB"  LOC = "P28"  ; 
+NET "nDTACK_IOB"  LOC = "P78"  ; 
+NET "nIPL2"  LOC = "P92"  ;
+NET "nLDS_FSB"  LOC = "P30"  ; 
+NET "nLDS_IOB"  LOC = "P79"  ; 
+NET "nOE"  LOC = "P37"  ; 
+NET "nRAMLWE"  LOC = "P65"  ; 
+NET "nRAMUWE"  LOC = "P66"  ; 
+NET "nRAS"  LOC = "P64"  ; 
+NET "nRES"  LOC = "P91"  ; 
+NET "nROMCS"  LOC = "P35"  ; 
+NET "nROMWE"  LOC = "P34"  ; 
+NET "nUDS_FSB"  LOC = "P33"  ; 
+NET "nUDS_IOB"  LOC = "P80"  ; 
+NET "nVMA_IOB"  LOC = "P74"  ; 
+NET "nVPA_FSB"  LOC = "P93"  ; 
+NET "nVPA_IOB"  LOC = "P77"  ; 
+NET "nWE_FSB"  LOC = "P29"  ; 
+NET "RA<0>"  LOC = "P53"  ; 
+NET "RA<10>"  LOC = "P55"  ; 
+NET "RA<11>"  LOC = "P63"  ; 
+NET "RA<1>"  LOC = "P50"  ; 
+NET "RA<2>"  LOC = "P43"  ; 
+NET "RA<3>"  LOC = "P41"  ; 
+NET "RA<4>"  LOC = "P40"  ; 
+NET "RA<5>"  LOC = "P42"  ; 
+NET "RA<6>"  LOC = "P46"  ; 
+NET "RA<7>"  LOC = "P52"  ; 
+NET "RA<8>"  LOC = "P54"  ; 
+NET "RA<9>"  LOC = "P56"  ; 
+NET "SW<0>"  LOC = "P61"  ;
+NET "SW<1>"  LOC = "P60"  ;
+NET "SW<2>"  LOC = "P67"  ;
+
+#PACE: Start of PACE Area Constraints
+
+#PACE: Start of PACE Prohibit Constraints
+
+#PACE: End of Constraints generated by PACE
diff --git a/cpld/MXSE.v b/cpld/MXSE.v
index 48922df..48ad708 100644
--- a/cpld/MXSE.v
+++ b/cpld/MXSE.v
@@ -17,8 +17,11 @@ module MXSE(
 	output nAS_IOB,
 	output nUDS_IOB,
 	output nLDS_IOB,
+	output nBR_IOB,
+	input nBG_IOB,
 	input nBERR_IOB,
 	input nRES,
+	input nIPL2,
 	output nROMCS,
 	output nRAMLWE,
 	output nRAMUWE,
@@ -32,7 +35,15 @@ module MXSE(
 	output nAoutOE,
 	output nDoutOE,
 	output nDinOE,
-	output nDinLE);
+	output nDinLE,
+	input [2:0] SW,
+	output CLK20EN,
+	output CLK25EN);
+
+	/* DIP switches */
+	assign CLK20EN =  SW[0];
+	assign CLK25EN = !SW[0];
+	wire MotherboardROMEN = !SW[1];
 
 	/* AS cycle detection */
 	wire BACT;
@@ -42,6 +53,8 @@ module MXSE(
 	
 	wire IOCS, SCSICS, IOPWCS, IACS, ROMCS, RAMCS, SndRAMCSWR;
 	CS cs(
+		/* Setting input */
+		MotherboardROMEN,
 		/* MC68HC000 interface */
 		A_FSB[23:08], CLK_FSB, nRES, nWE_FSB,
 		/*  AS cycle detection */
@@ -64,7 +77,7 @@ module MXSE(
 		nRAMLWE, nRAMUWE, nOE, nROMCS, nROMWE);
 
 	wire Ready_IOBS, BERR_IOBS;
-	wire IOREQ, IOACT, IOBERR;
+	wire Park, IOREQ, IOACT, IOBERR;
 	wire ALE0S, ALE0M, ALE1;
 	assign nADoutLE0 = ~(ALE0S || ALE0M);
 	assign nADoutLE1 = ~ALE1;
@@ -84,16 +97,22 @@ module MXSE(
 		ALE0S, IORW0, IOL0, IOU0,
 		/* FIFO secondary level control */
 		ALE1);
-		
+	
+	wire nAS_IOBout, nLDS_IOBout, nUDS_IOBout, nVMA_IOBout;
+	assign nAS_IOB = nAoutOE ? 1'bZ : nAS_IOBout;
+	assign nLDS_IOB = nAoutOE ? 1'bZ : nLDS_IOBout;
+	assign nUDS_IOB = nAoutOE ? 1'bZ : nUDS_IOBout;
+	assign nVMA_IOB = nAoutOE ? 1'bZ : nVMA_IOBout;
 	IOBM iobm(
 		/* PDS interface */
 		CLK2X_IOB, CLK_IOB, E_IOB,
-		nAS_IOB, nLDS_IOB, nUDS_IOB, nVMA_IOB,
-		nDTACK_IOB, nVPA_IOB, nBERR_IOB, nRES,
+		nBR_IOB, nAS_IOBout, nLDS_IOBout, nUDS_IOBout, nVMA_IOBout,
+		nAS_IOB, nBG_IOB, nDTACK_IOB, nVPA_IOB, nBERR_IOB, nRES,
 		/* PDS address and data latch control */
 		nAoutOE, nDoutOE, ALE0M, nDinLE,
 		/* IO bus slave port interface */
-		IOACT, IOBERR, IOREQ, IOL0, IOU0, IORW0);
+		IOACT, IOBERR,
+		Park, IOREQ, IOL0, IOU0, IORW0);
 
 	wire TimeoutA, TimeoutB;
 	CNT cnt(
@@ -103,6 +122,22 @@ module MXSE(
 		RefReq, RefUrgent, RefAck,
 		/* Timeout signals */
 		TimeoutA, TimeoutB);
+
+	/* Accelerator Disable Control */
+	reg RESr0 = 0;
+	reg RESr1 = 0;
+	reg RESr2 = 0;
+	reg IPL2r0 = 0;
+	reg IPL2r1 = 0;
+	reg RESDone = 0;
+	reg Disable = 0;
+	assign Park = ~Disable;
+	always @(posedge CLK_FSB) begin
+		RESr0  <= ~nRES;  RESr1  <= RESr0;  RESr2  <= RESr1;
+		IPL2r0 <= ~nIPL2; IPL2r1 <= IPL2r0;
+		if ( RESr0 &&  RESr1 && RESr2 && ~RESDone && IPL2r0 && IPL2r1) Disable <= 1;
+		if (~RESr0 && ~RESr1 && RESr2) RESDone <= 1;
+	end
 	
 	FSB fsb(
 		/* MC68HC000 interface */
@@ -110,7 +145,7 @@ module MXSE(
 		/* AS cycle detection */
 		BACT,
 		/* Ready and IA inputs */
-		Ready_RAM, Ready_IOBS, ~(SndRAMCSWR && ~TimeoutA),
+		Ready_RAM, Ready_IOBS, ~(SndRAMCSWR && ~TimeoutA), Disable,
 		/* BERR inputs */
 		(~SCSICS && TimeoutB), BERR_IOBS,
 		/* Interrupt acknowledge select */
diff --git a/cpld/XC95144XL/MXSE 2.cmd_log b/cpld/XC95144XL/MXSE 2.cmd_log
deleted file mode 100644
index 4493a01..0000000
--- a/cpld/XC95144XL/MXSE 2.cmd_log	
+++ /dev/null
@@ -1,166 +0,0 @@
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-ngdbuild -intstyle ise -dd _ngo -uc C:/Users/zanek/Documents/GitHub/SE-030/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
-cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
-XSLTProcess MXSE_build.xml 
-tsim -intstyle ise MXSE MXSE.nga 
-taengine -intstyle ise -f MXSE -w --format html1 -l MXSE_html/tim/timing_report.htm 
-hprep6 -s IEEE1149 -n MXSE -i MXSE 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-ngdbuild -intstyle ise -dd _ngo -uc C:/Users/zanek/Documents/GitHub/SE-030/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
-cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
-XSLTProcess MXSE_build.xml 
-tsim -intstyle ise MXSE MXSE.nga 
-taengine -intstyle ise -f MXSE -w --format html1 -l MXSE_html/tim/timing_report.htm 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-ngdbuild -intstyle ise -dd _ngo -uc C:/Users/zanek/Documents/GitHub/SE-030/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-ngdbuild -intstyle ise -dd _ngo -uc C:/Users/zanek/Documents/GitHub/SE-030/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
-cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
-XSLTProcess MXSE_build.xml 
-tsim -intstyle ise MXSE MXSE.nga 
-taengine -intstyle ise -f MXSE -w --format html1 -l MXSE_html/tim/timing_report.htm 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-ngdbuild -intstyle ise -dd _ngo -uc C:/Users/zanek/Documents/GitHub/SE-030/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
-cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
-XSLTProcess MXSE_build.xml 
-tsim -intstyle ise MXSE MXSE.nga 
-taengine -intstyle ise -f MXSE -w --format html1 -l MXSE_html/tim/timing_report.htm 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-ngdbuild -intstyle ise -dd _ngo -uc C:/Users/zanek/Documents/GitHub/SE-030/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
-cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
-XSLTProcess MXSE_build.xml 
-tsim -intstyle ise MXSE MXSE.nga 
-taengine -intstyle ise -f MXSE -w --format html1 -l MXSE_html/tim/timing_report.htm 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-ngdbuild -intstyle ise -dd _ngo -uc C:/Users/zanek/Documents/GitHub/SE-030/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
-cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
-XSLTProcess MXSE_build.xml 
-tsim -intstyle ise MXSE MXSE.nga 
-taengine -intstyle ise -f MXSE -w --format html1 -l MXSE_html/tim/timing_report.htm 
-hprep6 -s IEEE1149 -n MXSE -i MXSE 
--cwd "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL" timingan_cpld -intstyle ise "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.vm6" 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-ngdbuild -intstyle ise -dd _ngo -uc C:/Users/zanek/Documents/GitHub/SE-030/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
-cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
-XSLTProcess MXSE_build.xml 
-tsim -intstyle ise MXSE MXSE.nga 
-taengine -intstyle ise -f MXSE -w --format html1 -l MXSE_html/tim/timing_report.htm 
--cwd "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL" timingan_cpld -intstyle ise "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.vm6" 
-hprep6 -s IEEE1149 -n MXSE -i MXSE 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-ngdbuild -intstyle ise -dd _ngo -uc C:/Users/zanek/Documents/GitHub/SE-030/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
-cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
-XSLTProcess MXSE_build.xml 
-tsim -intstyle ise MXSE MXSE.nga 
-hprep6 -s IEEE1149 -n MXSE -i MXSE 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-ngdbuild -intstyle ise -dd _ngo -uc C:/Users/zanek/Documents/GitHub/SE-030/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
-cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
-XSLTProcess MXSE_build.xml 
-tsim -intstyle ise MXSE MXSE.nga 
-hprep6 -s IEEE1149 -n MXSE -i MXSE 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-ngdbuild -intstyle ise -dd _ngo -uc C:/Users/zanek/Documents/GitHub/SE-030/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
-cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
-XSLTProcess MXSE_build.xml 
-tsim -intstyle ise MXSE MXSE.nga 
-hprep6 -s IEEE1149 -n MXSE -i MXSE 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-ngdbuild -intstyle ise -dd _ngo -uc C:/Users/zanek/Documents/GitHub/SE-030/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
-cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
-XSLTProcess MXSE_build.xml 
-tsim -intstyle ise MXSE MXSE.nga 
-hprep6 -s IEEE1149 -n MXSE -i MXSE 
-taengine -intstyle ise -f MXSE -w --format html1 -l MXSE_html/tim/timing_report.htm 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-ngdbuild -intstyle ise -dd _ngo -uc C:/Users/zanek/Documents/GitHub/SE-030/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
-cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
-XSLTProcess MXSE_build.xml 
-tsim -intstyle ise MXSE MXSE.nga 
-hprep6 -s IEEE1149 -n MXSE -i MXSE 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-ngdbuild -intstyle ise -dd _ngo -uc C:/Users/zanek/Documents/GitHub/SE-030/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
-cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
-XSLTProcess MXSE_build.xml 
-tsim -intstyle ise MXSE MXSE.nga 
-hprep6 -s IEEE1149 -n MXSE -i MXSE 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-ngdbuild -intstyle ise -dd _ngo -uc C:/Users/zanek/Documents/GitHub/SE-030/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
-cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
-XSLTProcess MXSE_build.xml 
-tsim -intstyle ise MXSE MXSE.nga 
-hprep6 -s IEEE1149 -n MXSE -i MXSE 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-ngdbuild -intstyle ise -dd _ngo -uc C:/Users/zanek/Documents/GitHub/SE-030/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
-cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
-XSLTProcess MXSE_build.xml 
-tsim -intstyle ise MXSE MXSE.nga 
-taengine -intstyle ise -f MXSE -w --format html1 -l MXSE_html/tim/timing_report.htm 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-ngdbuild -intstyle ise -dd _ngo -uc C:/Users/zanek/Documents/GitHub/SE-030/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
-cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
-XSLTProcess MXSE_build.xml 
-tsim -intstyle ise MXSE MXSE.nga 
-hprep6 -s IEEE1149 -n MXSE -i MXSE 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-ngdbuild -intstyle ise -dd _ngo -uc C:/Users/zanek/Documents/GitHub/SE-030/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
-cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
-XSLTProcess MXSE_build.xml 
-tsim -intstyle ise MXSE MXSE.nga 
-hprep6 -s IEEE1149 -n MXSE -i MXSE 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-ngdbuild -intstyle ise -dd _ngo -uc C:/Users/zanek/Documents/GitHub/SE-030/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
-cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
-XSLTProcess MXSE_build.xml 
-tsim -intstyle ise MXSE MXSE.nga 
-hprep6 -s IEEE1149 -n MXSE -i MXSE 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-ngdbuild -intstyle ise -dd _ngo -uc C:/Users/zanek/Documents/GitHub/SE-030/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
-cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
-XSLTProcess MXSE_build.xml 
-tsim -intstyle ise MXSE MXSE.nga 
-hprep6 -s IEEE1149 -n MXSE -i MXSE 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-ngdbuild -intstyle ise -dd _ngo -uc C:/Users/zanek/Documents/GitHub/SE-030/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
-cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
-XSLTProcess MXSE_build.xml 
-tsim -intstyle ise MXSE MXSE.nga 
-hprep6 -s IEEE1149 -n MXSE -i MXSE 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-ngdbuild -intstyle ise -dd _ngo -uc C:/Users/zanek/Documents/GitHub/SE-030/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
-cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
-XSLTProcess MXSE_build.xml 
-tsim -intstyle ise MXSE MXSE.nga 
-hprep6 -s IEEE1149 -n MXSE -i MXSE 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-ngdbuild -intstyle ise -dd _ngo -uc C:/Users/zanek/Documents/GitHub/SE-030/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
-cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
-XSLTProcess MXSE_build.xml 
-tsim -intstyle ise MXSE MXSE.nga 
-hprep6 -s IEEE1149 -n MXSE -i MXSE 
-taengine -intstyle ise -f MXSE -w --format html1 -l MXSE_html/tim/timing_report.htm 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-ngdbuild -intstyle ise -dd _ngo -uc C:/Users/zanek/Documents/GitHub/SE-030/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/MXSE.syr" 
-ngdbuild -intstyle ise -dd _ngo -uc C:/Users/zanek/Documents/GitHub/SE-030/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
-cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
-xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "C:/Users/zanek/Documents/GitHub/Warp-SE/cpld/XC95144XL/MXSE.syr" 
-ngdbuild -intstyle ise -dd _ngo -uc C:/Users/zanek/Documents/GitHub/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
-cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
-XSLTProcess MXSE_build.xml 
-tsim -intstyle ise MXSE MXSE.nga 
-taengine -intstyle ise -f MXSE -w --format html1 -l MXSE_html/tim/timing_report.htm 
-hprep6 -s IEEE1149 -n MXSE -i MXSE 
diff --git a/cpld/XC95144XL/MXSE 2.gyd b/cpld/XC95144XL/MXSE 2.gyd
deleted file mode 100644
index d1053fd..0000000
--- a/cpld/XC95144XL/MXSE 2.gyd	
+++ /dev/null
@@ -1,117 +0,0 @@
-Pin Freeze File:  version P.20131013
-
-95144XL100 XC95144XL-10-TQ100
-A_FSB<10> S:PIN89
-A_FSB<11> S:PIN86
-A_FSB<12> S:PIN92
-A_FSB<13> S:PIN82
-A_FSB<14> S:PIN93
-A_FSB<15> S:PIN80
-A_FSB<16> S:PIN95
-A_FSB<17> S:PIN96
-A_FSB<18> S:PIN76
-A_FSB<19> S:PIN73
-A_FSB<1> S:PIN90
-A_FSB<20> S:PIN71
-A_FSB<21> S:PIN68
-A_FSB<22> S:PIN9
-A_FSB<23> S:PIN66
-A_FSB<2> S:PIN16
-A_FSB<3> S:PIN78
-A_FSB<4> S:PIN56
-A_FSB<5> S:PIN15
-A_FSB<6> S:PIN19
-A_FSB<7> S:PIN20
-A_FSB<8> S:PIN64
-A_FSB<9> S:PIN12
-CLK2X_IOB S:PIN22
-CLK_FSB S:PIN23
-CLK_IOB S:PIN27
-E_IOB S:PIN49
-nAS_FSB S:PIN13
-nBERR_IOB S:PIN18
-nDTACK_IOB S:PIN54
-nLDS_FSB S:PIN25
-nRES S:PIN99
-nUDS_FSB S:PIN52
-nVPA_IOB S:PIN59
-nWE_FSB S:PIN61
-RA<11> S:PIN63
-RA<10> S:PIN65
-RA<0> S:PIN87
-RA<1> S:PIN35
-RA<2> S:PIN91
-RA<3> S:PIN39
-RA<4> S:PIN94
-RA<5> S:PIN50
-RA<6> S:PIN53
-RA<7> S:PIN55
-RA<8> S:PIN58
-RA<9> S:PIN60
-nADoutLE0 S:PIN67
-nADoutLE1 S:PIN29
-nAS_IOB S:PIN10
-nAoutOE S:PIN70
-nBERR_FSB S:PIN14
-nCAS S:PIN74
-nDTACK_FSB S:PIN11
-nDinLE S:PIN72
-nDinOE S:PIN97
-nDoutOE S:PIN8
-nLDS_IOB S:PIN6
-nOE S:PIN17
-nRAMLWE S:PIN77
-nRAMUWE S:PIN79
-nRAS S:PIN24
-nROMCS S:PIN42
-nROMWE S:PIN81
-nUDS_IOB S:PIN7
-nVMA_IOB S:PIN33
-nVPA_FSB S:PIN85
-
-
-;The remaining section of the .gyd file is for documentation purposes only.
-;It shows where your internal equations were placed in the last successful fit.
-
-PARTITION FB1_1 EXP14_ nDTACK_FSB_OBUF EXP15_ $OpTx$FX_DC$606
-		 EXP16_ nBERR_FSB_OBUF fsb/Ready1r
-PARTITION FB1_9 EXP17_ fsb/VPA__or00001/fsb/VPA__or00001_D2 nOE_OBUF fsb/Ready2r
-		 EXP18_ EXP19_ fsb/VPA EXP20_
-		 $OpTx$FX_DC$602 EXP21_
-PARTITION FB2_1 iobm/VPArr iobm/VPArf iobm/RESrr iobm/RESrf
-		 iobm/IOREQr cnt/RefCnt<3> cnt/RefCnt<2> cnt/RefCnt<1>
-		 fsb/BERR1r cnt/RefDone nLDS_IOB_OBUF nUDS_IOB_OBUF
-		 cnt/TimeoutBPre nDoutOE_OBUF TimeoutB TimeoutA
-		 nAS_IOB_OBUF iobs/IOReady
-PARTITION FB3_1 EXP22_ EXP23_ IORW0 iobs/IOACTr
-		 nRAS_OBUF iobs/Clear1 fsb/ASrf ALE0S
-		 iobs/PS_FSM_FFd2 EXP24_ nADoutLE1_OBUF iobs/PS_FSM_FFd1
-		 IOREQ iobm/ETACK nVMA_IOB_OBUF EXP25_
-		 iobs/IORW1 ram/BACTr
-PARTITION FB4_1 ram/RASEL RA_0_OBUF cs/nOverlay1
-PARTITION FB4_5 EXP26_ iobs/Load1 EXP27_ RA_2_OBUF
-		 EXP28_ iobs/Once EXP29_ RA_4_OBUF
-		 EXP30_ ram/RAMDIS1 EXP31_ fsb/BERR0r
-		 nDinOE_OBUF EXP32_
-PARTITION FB5_1 IOACT RA_1_OBUF iobm/IOS_FSM_FFd7 iobm/IOS_FSM_FFd6
-		 iobm/IOS_FSM_FFd5 iobm/IOS_FSM_FFd4 iobm/BERRrr RA_3_OBUF
-		 iobm/BERRrf cnt/RefCnt<0> iobm/IOS_FSM_FFd8 nROMCS_OBUF
-		 ALE0M iobm/IOS_FSM_FFd2 BERR_IOBS iobm/IOS_FSM_FFd3
-		 EXP33_ IOBERR
-PARTITION FB6_1 iobm/Er2 nCAS_OBUF iobm/DTACKrr iobm/DTACKrf
-		 RefAck nRAMLWE_OBUF iobs/IOU1 iobs/IOL1
-		 nRAMUWE_OBUF iobm/ES<3> iobm/ES<1> nROMWE_OBUF
-		 iobm/ES<0> IOU0 nVPA_FSB_OBUF IOL0
-		 iobm/ES<4> iobm/ES<2>
-PARTITION FB7_1 cnt/RefCnt<5> RA_5_OBUF cnt/RefCnt<4> cs/nOverlay0
-		 ram/RS_FSM_FFd3 RA_6_OBUF fsb/Ready0r ram/RS_FSM_FFd1
-		 RA_7_OBUF ram/Once ram/RAMDIS2 RA_8_OBUF
-		 ram/RS_FSM_FFd2 cnt/RefCnt<7> RA_9_OBUF cnt/RefCnt<6>
-		 ram/RAMReady EXP34_
-PARTITION FB8_2 A_FSB_19_IBUF$BUF0
-PARTITION FB8_6 A_FSB_21_IBUF$BUF0
-PARTITION FB8_9 nADoutLE0_OBUF
-PARTITION FB8_12 nAoutOE_OBUF
-PARTITION FB8_15 nDinLE_OBUF
-PARTITION FB8_17 iobm/IOS_FSM_FFd1 iobm/Er
-
diff --git a/cpld/XC95144XL/MXSE 2.mfd b/cpld/XC95144XL/MXSE 2.mfd
deleted file mode 100644
index 04543fc..0000000
--- a/cpld/XC95144XL/MXSE 2.mfd	
+++ /dev/null
@@ -1,2810 +0,0 @@
-MDF Database:  version 1.0
-MDF_INFO | MXSE | XC95144XL-10-TQ100
-MACROCELL | 2 | 14 | nVMA_IOB_OBUF
-ATTRIBUTES | 4621058 | 0
-OUTPUTMC | 3 | 2 | 14 | 2 | 13 | 2 | 15
-INPUTS | 15 | nVMA_IOB  | iobm/ES<0>  | iobm/ES<1>  | iobm/ES<2>  | iobm/ES<3>  | iobm/ES<4>  | IOACT  | iobm/VPArf  | iobm/VPArr  | A_FSB<14>  | A_FSB<13>  | A_FSB<23>  | A_FSB<21>  | A_FSB<22>  | cs/nOverlay1
-INPUTMC | 10 | 2 | 14 | 5 | 12 | 5 | 10 | 5 | 17 | 5 | 9 | 5 | 16 | 4 | 0 | 1 | 1 | 1 | 0 | 3 | 2
-INPUTP | 5 | 147 | 136 | 105 | 109 | 15
-EXPORTS | 1 | 2 | 15
-EQ | 8 | 
-   nVMA_IOB.T = !nVMA_IOB & !iobm/ES<0> & !iobm/ES<1> & !iobm/ES<2> & 
-	!iobm/ES<3> & !iobm/ES<4>
-	# nVMA_IOB & iobm/ES<0> & iobm/ES<1> & iobm/ES<2> & 
-	!iobm/ES<3> & !iobm/ES<4> & IOACT & iobm/VPArf & iobm/VPArr;
-   nVMA_IOB.CLK = CLK2X_IOB;	// GCK
-    nVMA_IOB_OBUF.EXP  =  !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21>
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 3 | 2 | cs/nOverlay1
-ATTRIBUTES | 8553280 | 0
-OUTPUTMC | 44 | 6 | 9 | 3 | 8 | 2 | 0 | 6 | 6 | 0 | 6 | 0 | 11 | 0 | 12 | 2 | 15 | 6 | 10 | 0 | 0 | 2 | 14 | 6 | 11 | 6 | 7 | 6 | 3 | 2 | 7 | 3 | 4 | 2 | 11 | 3 | 12 | 6 | 16 | 2 | 4 | 4 | 11 | 0 | 9 | 0 | 3 | 0 | 2 | 0 | 4 | 0 | 5 | 0 | 8 | 0 | 10 | 0 | 15 | 0 | 17 | 2 | 3 | 2 | 9 | 2 | 13 | 3 | 1 | 3 | 6 | 3 | 7 | 3 | 11 | 3 | 14 | 3 | 16 | 3 | 17 | 6 | 5 | 6 | 8 | 6 | 13 | 6 | 15
-INPUTS | 6 | cs/nOverlay0  | nAS_FSB  | fsb/ASrf  | A_FSB<10>  | ram/RASEL  | A_FSB<1>
-INPUTMC | 3 | 6 | 3 | 2 | 6 | 3 | 0
-INPUTP | 3 | 21 | 143 | 144
-EXPORTS | 1 | 3 | 1
-EQ | 5 | 
-   cs/nOverlay1.D = cs/nOverlay0;
-   cs/nOverlay1.CLK = CLK_FSB;	// GCK
-   cs/nOverlay1.CE = nAS_FSB & !fsb/ASrf;
-    cs/nOverlay1.EXP  =  A_FSB<10> & !ram/RASEL
-	# ram/RASEL & A_FSB<1>
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 6 | 9 | ram/Once
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 10 | 6 | 9 | 6 | 10 | 6 | 16 | 6 | 7 | 6 | 4 | 3 | 14 | 3 | 16 | 3 | 17 | 6 | 8 | 6 | 15
-INPUTS | 16 | ram/Once  | nAS_FSB  | fsb/ASrf  | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | cnt/RefDone  | ram/RAMDIS2  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | A_FSB<21>  | RA_7_OBUF.EXP
-INPUTMC | 12 | 6 | 9 | 2 | 6 | 3 | 2 | 6 | 12 | 6 | 7 | 6 | 4 | 1 | 9 | 6 | 10 | 6 | 0 | 6 | 15 | 6 | 13 | 6 | 8
-INPUTP | 4 | 21 | 105 | 15 | 109
-EXPORTS | 1 | 6 | 10
-IMPORTS | 1 | 6 | 8
-EQ | 26 | 
-   ram/Once.T = ram/Once & nAS_FSB & !fsb/ASrf
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !ram/Once & 
-	!nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
-	!ram/RS_FSM_FFd3
-;Imported pterms FB7_9
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !ram/Once & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !nAS_FSB & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
-	!ram/RS_FSM_FFd3 & fsb/ASrf;
-   ram/Once.CLK = CLK_FSB;	// GCK
-    ram/Once.EXP  =  !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & ram/Once & 
-	!cnt/RefDone & !ram/RAMDIS2 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
-	!ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & 
-	fsb/ASrf
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & ram/Once & !cnt/RefDone & !ram/RAMDIS2 & !nAS_FSB & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & 
-	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & ram/Once & !cnt/RefDone & !ram/RAMDIS2 & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & 
-	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 1 | 9 | cnt/RefDone
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 19 | 1 | 9 | 6 | 10 | 3 | 0 | 6 | 12 | 6 | 4 | 3 | 13 | 6 | 16 | 3 | 1 | 3 | 11 | 3 | 12 | 3 | 14 | 3 | 16 | 3 | 17 | 6 | 0 | 6 | 5 | 6 | 9 | 6 | 13 | 6 | 15 | 6 | 17
-INPUTS | 10 | cnt/RefDone  | RefAck  | cnt/RefCnt<0>  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<1>  | cnt/RefCnt<2>  | cnt/RefCnt<3>  | cnt/RefCnt<4>  | cnt/RefCnt<7>
-INPUTMC | 10 | 1 | 9 | 5 | 4 | 4 | 9 | 6 | 0 | 6 | 15 | 1 | 7 | 1 | 6 | 1 | 5 | 6 | 2 | 6 | 13
-EQ | 5 | 
-   !cnt/RefDone.D = !cnt/RefDone & !RefAck
-	# !cnt/RefCnt<0> & !cnt/RefCnt<5> & !cnt/RefCnt<6> & 
-	!cnt/RefCnt<1> & !cnt/RefCnt<2> & !cnt/RefCnt<3> & !cnt/RefCnt<4> & 
-	!cnt/RefCnt<7>;
-   cnt/RefDone.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 3 | 9 | iobs/Once
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 14 | 3 | 9 | 4 | 14 | 2 | 2 | 2 | 16 | 1 | 17 | 2 | 8 | 3 | 5 | 2 | 12 | 2 | 0 | 2 | 1 | 2 | 3 | 3 | 7 | 3 | 8 | 3 | 10
-INPUTS | 10 | A_FSB<22>  | iobs/Once  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nAS_FSB  | fsb/ASrf  | A_FSB<23>  | A_FSB<20>  | EXP28_.EXP  | EXP29_.EXP
-INPUTMC | 6 | 3 | 9 | 2 | 8 | 2 | 11 | 2 | 6 | 3 | 8 | 3 | 10
-INPUTP | 4 | 15 | 21 | 105 | 114
-IMPORTS | 2 | 3 | 8 | 3 | 10
-EQ | 24 | 
-   !iobs/Once.D = nAS_FSB & !fsb/ASrf
-	# A_FSB<23> & !iobs/Once & iobs/PS_FSM_FFd2
-	# !A_FSB<23> & !A_FSB<20> & !iobs/Once
-	# A_FSB<22> & !iobs/Once & iobs/PS_FSM_FFd2
-	# A_FSB<22> & !iobs/Once & iobs/PS_FSM_FFd1
-;Imported pterms FB4_9
-	# A_FSB<23> & !iobs/Once & iobs/PS_FSM_FFd1
-	# !iobs/Once & iobs/PS_FSM_FFd2 & !nADoutLE1
-	# !iobs/Once & iobs/PS_FSM_FFd1 & !nADoutLE1
-	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & !iobs/Once
-	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 & 
-	!iobs/Once
-;Imported pterms FB4_8
-	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & 
-	!iobs/Once
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1 & !iobs/Once
-;Imported pterms FB4_11
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<19> & !iobs/Once
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<18> & !iobs/Once
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<17> & !iobs/Once
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<16> & !iobs/Once
-	# !A_FSB<23> & A_FSB<21> & !iobs/Once & nWE_FSB;
-   iobs/Once.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 4 | 14 | BERR_IOBS
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 9 | 4 | 14 | 1 | 8 | 0 | 14 | 0 | 1 | 0 | 5 | 0 | 3 | 0 | 12 | 0 | 13 | 0 | 16
-INPUTS | 8 | BERR_IOBS  | nAS_FSB  | fsb/ASrf  | iobs/Once  | IOBERR  | iobs/PS_FSM_FFd2  | iobs/IOACTr  | nADoutLE1
-INPUTMC | 7 | 4 | 14 | 2 | 6 | 3 | 9 | 4 | 17 | 2 | 8 | 2 | 3 | 2 | 10
-INPUTP | 1 | 21
-EQ | 8 | 
-   BERR_IOBS.T = BERR_IOBS & nAS_FSB & !fsb/ASrf
-	# iobs/Once & BERR_IOBS & !IOBERR & 
-	!iobs/PS_FSM_FFd2 & !iobs/IOACTr & nADoutLE1
-	# iobs/Once & !BERR_IOBS & IOBERR & !nAS_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/IOACTr & nADoutLE1
-	# iobs/Once & !BERR_IOBS & IOBERR & 
-	!iobs/PS_FSM_FFd2 & !iobs/IOACTr & fsb/ASrf & nADoutLE1;
-   BERR_IOBS.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 4 | 17 | IOBERR
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 5 | 4 | 14 | 4 | 17 | 1 | 17 | 4 | 16 | 4 | 0
-INPUTS | 17 | nBERR_IOB  | IOBERR  | iobm/IOS_FSM_FFd3  | CLK_IOB  | iobm/ETACK  | iobm/BERRrf  | iobm/BERRrr  | iobm/IOS_FSM_FFd4  | iobm/IOS_FSM_FFd5  | iobm/IOS_FSM_FFd6  | iobm/IOS_FSM_FFd7  | iobm/IOREQr  | iobm/DTACKrf  | iobm/DTACKrr  | iobm/RESrf  | iobm/RESrr  | EXP33_.EXP
-INPUTMC | 15 | 4 | 17 | 4 | 15 | 2 | 13 | 4 | 8 | 4 | 6 | 4 | 5 | 4 | 4 | 4 | 3 | 4 | 2 | 1 | 4 | 5 | 3 | 5 | 2 | 1 | 3 | 1 | 2 | 4 | 16
-INPUTP | 2 | 28 | 42
-EXPORTS | 1 | 4 | 0
-IMPORTS | 1 | 4 | 16
-EQ | 24 | 
-   IOBERR.T = nBERR_IOB & IOBERR & iobm/IOS_FSM_FFd3 & 
-	CLK_IOB & iobm/ETACK
-	# !nBERR_IOB & !IOBERR & iobm/IOS_FSM_FFd3 & 
-	CLK_IOB & iobm/ETACK
-	# nBERR_IOB & IOBERR & iobm/IOS_FSM_FFd3 & 
-	CLK_IOB & iobm/BERRrf & iobm/BERRrr
-;Imported pterms FB5_17
-	# nBERR_IOB & IOBERR & iobm/IOS_FSM_FFd3 & 
-	CLK_IOB & iobm/DTACKrf & iobm/DTACKrr
-	# nBERR_IOB & IOBERR & iobm/IOS_FSM_FFd3 & 
-	CLK_IOB & iobm/RESrf & iobm/RESrr
-	# !nBERR_IOB & !IOBERR & iobm/IOS_FSM_FFd3 & 
-	CLK_IOB & iobm/BERRrf & iobm/BERRrr
-	# !nBERR_IOB & !IOBERR & iobm/IOS_FSM_FFd3 & 
-	CLK_IOB & iobm/DTACKrf & iobm/DTACKrr
-	# !nBERR_IOB & !IOBERR & iobm/IOS_FSM_FFd3 & 
-	CLK_IOB & iobm/RESrf & iobm/RESrr;
-   IOBERR.CLK = CLK2X_IOB;	// GCK
-    IOBERR.EXP  =  !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd5 & 
-	!iobm/IOS_FSM_FFd6 & CLK_IOB & !iobm/IOS_FSM_FFd7 & !iobm/IOREQr & 
-	iobm/DTACKrf & iobm/DTACKrr
-	# !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd5 & 
-	!iobm/IOS_FSM_FFd6 & CLK_IOB & !iobm/IOS_FSM_FFd7 & !iobm/IOREQr & 
-	iobm/RESrf & iobm/RESrr
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 2 | 2 | IORW0
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 7 | 2 | 2 | 1 | 13 | 1 | 10 | 1 | 11 | 2 | 0 | 2 | 1 | 2 | 3
-INPUTS | 12 | IORW0  | iobs/IORW1  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nADoutLE1  | A_FSB<23>  | iobs/Once  | nWE_FSB  | nAS_FSB  | fsb/ASrf  | EXP23_.EXP  | iobs/IOACTr.EXP
-INPUTMC | 9 | 2 | 2 | 2 | 16 | 2 | 8 | 2 | 11 | 2 | 10 | 3 | 9 | 2 | 6 | 2 | 1 | 2 | 3
-INPUTP | 3 | 105 | 98 | 21
-IMPORTS | 2 | 2 | 1 | 2 | 3
-EQ | 60 | 
-   IORW0.T = IORW0 & !iobs/IORW1 & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & !nADoutLE1
-	# !IORW0 & iobs/IORW1 & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & !nADoutLE1
-	# A_FSB<23> & !iobs/Once & IORW0 & !nWE_FSB & 
-	!nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<23> & !iobs/Once & IORW0 & !nWE_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-	# A_FSB<23> & !iobs/Once & !IORW0 & nWE_FSB & 
-	!nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-;Imported pterms FB3_2
-	# A_FSB<23> & !iobs/Once & !IORW0 & nWE_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !iobs/Once & 
-	IORW0 & !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !iobs/Once & 
-	IORW0 & !nWE_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
-	fsb/ASrf & nADoutLE1
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !iobs/Once & 
-	!IORW0 & nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !iobs/Once & 
-	!IORW0 & nWE_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
-	fsb/ASrf & nADoutLE1
-;Imported pterms FB3_1
-	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !iobs/Once & IORW0 & !nWE_FSB & !nAS_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !iobs/Once & IORW0 & !nWE_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !iobs/Once & IORW0 & !nWE_FSB & !nAS_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !iobs/Once & IORW0 & !nWE_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-;Imported pterms FB3_4
-	# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & 
-	!iobs/Once & IORW0 & !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & 
-	!iobs/Once & IORW0 & !nWE_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & 
-	!iobs/Once & IORW0 & !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & 
-	!iobs/Once & IORW0 & !nWE_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1;
-   IORW0.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 6 | 3 | cs/nOverlay0
-ATTRIBUTES | 4367104 | 0
-OUTPUTMC | 3 | 3 | 2 | 6 | 3 | 6 | 4
-INPUTS | 11 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | cs/nOverlay0  | nAS_FSB  | fsb/ASrf  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | cs/nOverlay1
-INPUTMC | 6 | 6 | 3 | 2 | 6 | 6 | 12 | 6 | 7 | 6 | 4 | 3 | 2
-INPUTP | 5 | 105 | 15 | 109 | 114 | 21
-EXPORTS | 1 | 6 | 4
-EQ | 12 | 
-   cs/nOverlay0.T = !A_FSB<23> & A_FSB<22> & !A_FSB<21> & !A_FSB<20> & 
-	!cs/nOverlay0 & !nAS_FSB
-	# !A_FSB<23> & A_FSB<22> & !A_FSB<21> & !A_FSB<20> & 
-	!cs/nOverlay0 & fsb/ASrf;
-   cs/nOverlay0.CLK = CLK_FSB;	// GCK
-   !cs/nOverlay0.AR = nRES;	// GSR
-    cs/nOverlay0.EXP  =  A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
-	# A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
-	# nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
-	!ram/RS_FSM_FFd3 & !fsb/ASrf
-GLOBALS | 2 | 2 | CLK_FSB | 4 | nRES
-
-MACROCELL | 5 | 15 | IOL0
-ATTRIBUTES | 8553280 | 0
-OUTPUTMC | 1 | 1 | 10
-INPUTS | 5 | iobs/IOL1  | nADoutLE1  | nLDS_FSB  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1
-INPUTMC | 4 | 5 | 7 | 2 | 10 | 2 | 8 | 2 | 11
-INPUTP | 1 | 37
-EQ | 4 | 
-   IOL0.D = !nLDS_FSB & nADoutLE1
-	# iobs/IOL1 & !nADoutLE1;
-   IOL0.CLK = CLK_FSB;	// GCK
-   IOL0.CE = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1;
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 5 | 13 | IOU0
-ATTRIBUTES | 8553280 | 0
-OUTPUTMC | 1 | 1 | 11
-INPUTS | 5 | iobs/IOU1  | nADoutLE1  | nUDS_FSB  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1
-INPUTMC | 4 | 5 | 6 | 2 | 10 | 2 | 8 | 2 | 11
-INPUTP | 1 | 82
-EQ | 4 | 
-   IOU0.D = !nUDS_FSB & nADoutLE1
-	# iobs/IOU1 & !nADoutLE1;
-   IOU0.CLK = CLK_FSB;	// GCK
-   IOU0.CE = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1;
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 1 | 15 | TimeoutA
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 8 | 1 | 15 | 0 | 11 | 0 | 9 | 0 | 2 | 0 | 3 | 0 | 8 | 0 | 10 | 0 | 17
-INPUTS | 10 | TimeoutA  | nAS_FSB  | fsb/ASrf  | cnt/RefCnt<0>  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<1>  | cnt/RefCnt<2>  | cnt/RefCnt<3>  | cnt/RefCnt<4>
-INPUTMC | 9 | 1 | 15 | 2 | 6 | 4 | 9 | 6 | 0 | 6 | 15 | 1 | 7 | 1 | 6 | 1 | 5 | 6 | 2
-INPUTP | 1 | 21
-EQ | 8 | 
-   TimeoutA.T = TimeoutA & nAS_FSB & !fsb/ASrf
-	# !TimeoutA & !nAS_FSB & !cnt/RefCnt<0> & 
-	!cnt/RefCnt<5> & !cnt/RefCnt<6> & !cnt/RefCnt<1> & !cnt/RefCnt<2> & 
-	!cnt/RefCnt<3> & !cnt/RefCnt<4>
-	# !TimeoutA & !cnt/RefCnt<0> & !cnt/RefCnt<5> & 
-	!cnt/RefCnt<6> & !cnt/RefCnt<1> & !cnt/RefCnt<2> & !cnt/RefCnt<3> & 
-	!cnt/RefCnt<4> & fsb/ASrf;
-   TimeoutA.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 1 | 14 | TimeoutB
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 4 | 1 | 14 | 3 | 15 | 0 | 5 | 0 | 16
-INPUTS | 12 | TimeoutB  | nAS_FSB  | fsb/ASrf  | cnt/TimeoutBPre  | cnt/RefCnt<0>  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<1>  | cnt/RefCnt<2>  | cnt/RefCnt<3>  | cnt/RefCnt<4>  | cnt/RefCnt<7>
-INPUTMC | 11 | 1 | 14 | 2 | 6 | 1 | 12 | 4 | 9 | 6 | 0 | 6 | 15 | 1 | 7 | 1 | 6 | 1 | 5 | 6 | 2 | 6 | 13
-INPUTP | 1 | 21
-EQ | 8 | 
-   TimeoutB.T = TimeoutB & nAS_FSB & !fsb/ASrf
-	# !TimeoutB & cnt/TimeoutBPre & !nAS_FSB & 
-	!cnt/RefCnt<0> & !cnt/RefCnt<5> & !cnt/RefCnt<6> & !cnt/RefCnt<1> & 
-	!cnt/RefCnt<2> & !cnt/RefCnt<3> & !cnt/RefCnt<4> & !cnt/RefCnt<7>
-	# !TimeoutB & cnt/TimeoutBPre & !cnt/RefCnt<0> & 
-	!cnt/RefCnt<5> & !cnt/RefCnt<6> & !cnt/RefCnt<1> & !cnt/RefCnt<2> & 
-	!cnt/RefCnt<3> & !cnt/RefCnt<4> & !cnt/RefCnt<7> & fsb/ASrf;
-   TimeoutB.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 1 | 12 | cnt/TimeoutBPre
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 2 | 1 | 14 | 1 | 12
-INPUTS | 11 | cnt/TimeoutBPre  | nAS_FSB  | fsb/ASrf  | cnt/RefCnt<0>  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<1>  | cnt/RefCnt<2>  | cnt/RefCnt<3>  | cnt/RefCnt<4>  | cnt/RefCnt<7>
-INPUTMC | 10 | 1 | 12 | 2 | 6 | 4 | 9 | 6 | 0 | 6 | 15 | 1 | 7 | 1 | 6 | 1 | 5 | 6 | 2 | 6 | 13
-INPUTP | 1 | 21
-EQ | 8 | 
-   cnt/TimeoutBPre.T = cnt/TimeoutBPre & nAS_FSB & !fsb/ASrf
-	# !cnt/TimeoutBPre & !nAS_FSB & !cnt/RefCnt<0> & 
-	!cnt/RefCnt<5> & !cnt/RefCnt<6> & !cnt/RefCnt<1> & !cnt/RefCnt<2> & 
-	!cnt/RefCnt<3> & !cnt/RefCnt<4> & !cnt/RefCnt<7>
-	# !cnt/TimeoutBPre & !cnt/RefCnt<0> & !cnt/RefCnt<5> & 
-	!cnt/RefCnt<6> & !cnt/RefCnt<1> & !cnt/RefCnt<2> & !cnt/RefCnt<3> & 
-	!cnt/RefCnt<4> & !cnt/RefCnt<7> & fsb/ASrf;
-   cnt/TimeoutBPre.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 3 | 15 | fsb/BERR0r
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 9 | 3 | 15 | 0 | 14 | 0 | 1 | 0 | 5 | 0 | 3 | 0 | 12 | 0 | 13 | 0 | 16 | 3 | 16
-INPUTS | 9 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | fsb/BERR0r  | TimeoutB  | nAS_FSB  | fsb/ASrf  | nWE_FSB
-INPUTMC | 3 | 3 | 15 | 1 | 14 | 2 | 6
-INPUTP | 6 | 105 | 15 | 109 | 114 | 21 | 98
-EXPORTS | 1 | 3 | 16
-EQ | 8 | 
-   !fsb/BERR0r.D = !TimeoutB & !fsb/BERR0r
-	# nAS_FSB & !fsb/ASrf
-	# !A_FSB<23> & A_FSB<22> & !A_FSB<21> & A_FSB<20> & 
-	!fsb/BERR0r;
-   fsb/BERR0r.CLK = CLK_FSB;	// GCK
-    fsb/BERR0r.EXP  =  A_FSB<23> & nWE_FSB & !nAS_FSB
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & nWE_FSB & 
-	!nAS_FSB
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 1 | 8 | fsb/BERR1r
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 8 | 1 | 8 | 0 | 14 | 0 | 1 | 0 | 5 | 0 | 3 | 0 | 12 | 0 | 13 | 0 | 16
-INPUTS | 4 | BERR_IOBS  | fsb/BERR1r  | nAS_FSB  | fsb/ASrf
-INPUTMC | 3 | 4 | 14 | 1 | 8 | 2 | 6
-INPUTP | 1 | 21
-EQ | 3 | 
-   !fsb/BERR1r.D = !BERR_IOBS & !fsb/BERR1r
-	# nAS_FSB & !fsb/ASrf;
-   fsb/BERR1r.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 6 | 6 | fsb/Ready0r
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 4 | 6 | 6 | 0 | 12 | 0 | 0 | 0 | 15
-INPUTS | 8 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | cs/nOverlay1  | fsb/Ready0r  | ram/RAMReady  | nAS_FSB  | fsb/ASrf
-INPUTMC | 4 | 3 | 2 | 6 | 6 | 6 | 16 | 2 | 6
-INPUTP | 4 | 105 | 15 | 109 | 21
-EQ | 6 | 
-   !fsb/Ready0r.D = nAS_FSB & !fsb/ASrf
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
-	!fsb/Ready0r & !ram/RAMReady
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !fsb/Ready0r & !ram/RAMReady;
-   fsb/Ready0r.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 0 | 6 | fsb/Ready1r
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 7 | 0 | 6 | 0 | 12 | 0 | 0 | 0 | 2 | 0 | 3 | 0 | 5 | 0 | 15
-INPUTS | 17 | nAS_FSB  | fsb/ASrf  | A_FSB<23>  | fsb/Ready1r  | iobs/IOReady  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<14>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | nWE_FSB  | A_FSB<13>  | nBERR_FSB_OBUF.EXP
-INPUTMC | 5 | 2 | 6 | 0 | 6 | 1 | 17 | 3 | 2 | 0 | 5
-INPUTP | 12 | 21 | 105 | 15 | 109 | 114 | 147 | 117 | 123 | 155 | 153 | 98 | 136
-IMPORTS | 1 | 0 | 5
-EQ | 20 | 
-   !fsb/Ready1r.D = nAS_FSB & !fsb/ASrf
-	# A_FSB<23> & !fsb/Ready1r & !iobs/IOReady
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r & 
-	!iobs/IOReady
-	# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & 
-	!fsb/Ready1r & !iobs/IOReady
-	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & 
-	!fsb/Ready1r & !iobs/IOReady
-;Imported pterms FB1_6
-	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & !iobs/IOReady & 
-	!nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & !iobs/IOReady & 
-	!nADoutLE1;
-   fsb/Ready1r.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 0 | 11 | fsb/Ready2r
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 7 | 0 | 11 | 0 | 9 | 0 | 2 | 0 | 3 | 0 | 8 | 0 | 10 | 0 | 17
-INPUTS | 21 | A_FSB<9>  | A_FSB<15>  | A_FSB<14>  | A_FSB<13>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | nWE_FSB  | TimeoutA  | fsb/Ready2r  | A_FSB<8>  | nOE_OBUF.EXP
-INPUTMC | 4 | 3 | 2 | 1 | 15 | 0 | 11 | 0 | 10
-INPUTP | 17 | 19 | 134 | 147 | 136 | 146 | 140 | 143 | 105 | 15 | 109 | 114 | 117 | 123 | 155 | 153 | 98 | 103
-IMPORTS | 1 | 0 | 10
-EQ | 35 | 
-   !fsb/Ready2r.D = A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
-	# A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
-	# A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
-	# A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
-	# A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
-;Imported pterms FB1_11
-	# nAS_FSB & !fsb/ASrf
-	# A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
-	# A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
-	# A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r;
-   fsb/Ready2r.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 0 | 14 | fsb/VPA
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 5 | 0 | 14 | 5 | 14 | 0 | 12 | 0 | 13 | 0 | 15
-INPUTS | 9 | fsb/BERR1r  | fsb/VPA  | nAS_FSB  | fsb/VPA__or00001/fsb/VPA__or00001_D2  | BERR_IOBS  | fsb/BERR0r  | $OpTx$FX_DC$602  | EXP19_.EXP  | EXP20_.EXP
-INPUTMC | 8 | 1 | 8 | 0 | 14 | 0 | 9 | 4 | 14 | 3 | 15 | 0 | 16 | 0 | 13 | 0 | 15
-INPUTP | 1 | 21
-IMPORTS | 2 | 0 | 13 | 0 | 15
-EQ | 65 | 
-   fsb/VPA.D = BERR_IOBS & fsb/VPA & !nAS_FSB
-	# fsb/BERR0r & fsb/VPA & !nAS_FSB
-	# fsb/BERR1r & fsb/VPA & !nAS_FSB
-	# fsb/VPA & !nAS_FSB & 
-	fsb/VPA__or00001/fsb/VPA__or00001_D2
-	# fsb/VPA & !nAS_FSB & !$OpTx$FX_DC$602
-;Imported pterms FB1_14
-	# BERR_IOBS & fsb/VPA & fsb/ASrf
-	# fsb/BERR0r & fsb/VPA & fsb/ASrf
-	# fsb/BERR1r & fsb/VPA & fsb/ASrf
-	# fsb/VPA & fsb/ASrf & 
-	fsb/VPA__or00001/fsb/VPA__or00001_D2
-	# fsb/VPA & fsb/ASrf & !$OpTx$FX_DC$602
-;Imported pterms FB1_13
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !fsb/Ready0r & fsb/VPA & fsb/ASrf & !ram/RAMReady
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	fsb/Ready1r & !nAS_FSB & !fsb/VPA__or00001/fsb/VPA__or00001_D2 & 
-	$OpTx$FX_DC$602
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	fsb/Ready1r & fsb/ASrf & !fsb/VPA__or00001/fsb/VPA__or00001_D2 & 
-	$OpTx$FX_DC$602
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	iobs/IOReady & !nAS_FSB & !fsb/VPA__or00001/fsb/VPA__or00001_D2 & 
-	$OpTx$FX_DC$602
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	!nAS_FSB & !fsb/VPA__or00001/fsb/VPA__or00001_D2 & 
-	$OpTx$FX_DC$602 & !$OpTx$FX_DC$606
-;Imported pterms FB1_16
-	# !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB & 
-	$OpTx$FX_DC$606
-	# !fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf & 
-	$OpTx$FX_DC$606
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
-	!fsb/Ready0r & fsb/VPA & !nAS_FSB & !ram/RAMReady
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
-	!fsb/Ready0r & fsb/VPA & fsb/ASrf & !ram/RAMReady
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !fsb/Ready0r & fsb/VPA & !nAS_FSB & !ram/RAMReady
-;Imported pterms FB1_17
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	iobs/IOReady & fsb/ASrf & !fsb/VPA__or00001/fsb/VPA__or00001_D2 & 
-	$OpTx$FX_DC$602
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	fsb/ASrf & !fsb/VPA__or00001/fsb/VPA__or00001_D2 & 
-	$OpTx$FX_DC$602 & !$OpTx$FX_DC$606;
-   fsb/VPA.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 5 | 7 | iobs/IOL1
-ATTRIBUTES | 8553280 | 0
-OUTPUTMC | 1 | 5 | 15
-INPUTS | 2 | nLDS_FSB  | iobs/Load1
-INPUTMC | 1 | 3 | 5
-INPUTP | 1 | 37
-EQ | 3 | 
-   iobs/IOL1.D = !nLDS_FSB;
-   iobs/IOL1.CLK = CLK_FSB;	// GCK
-   iobs/IOL1.CE = iobs/Load1;
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 2 | 16 | iobs/IORW1
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 3 | 2 | 2 | 2 | 16 | 2 | 15
-INPUTS | 9 | A_FSB<23>  | A_FSB<21>  | iobs/IORW1  | nADoutLE1  | iobs/Once  | A_FSB<20>  | nWE_FSB  | EXP25_.EXP  | ram/BACTr.EXP
-INPUTMC | 5 | 2 | 16 | 2 | 10 | 3 | 9 | 2 | 15 | 2 | 17
-INPUTP | 4 | 105 | 109 | 114 | 98
-IMPORTS | 2 | 2 | 15 | 2 | 17
-EQ | 21 | 
-   !iobs/IORW1.T = iobs/Once
-	# !nADoutLE1
-	# !A_FSB<23> & !A_FSB<20>
-	# nWE_FSB & iobs/IORW1
-	# !A_FSB<23> & A_FSB<21> & !iobs/IORW1
-;Imported pterms FB3_16
-	# !nWE_FSB & !iobs/IORW1
-	# nAS_FSB & !fsb/ASrf
-	# !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
-	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21>
-	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1
-;Imported pterms FB3_15
-	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21>
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1
-;Imported pterms FB3_18
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<19>
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<18>
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<17>
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<16>;
-   iobs/IORW1.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 1 | 17 | iobs/IOReady
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 9 | 0 | 6 | 0 | 12 | 1 | 17 | 0 | 0 | 0 | 2 | 0 | 3 | 0 | 5 | 0 | 15 | 0 | 16
-INPUTS | 8 | iobs/IOReady  | nAS_FSB  | fsb/ASrf  | iobs/Once  | IOBERR  | iobs/PS_FSM_FFd2  | iobs/IOACTr  | nADoutLE1
-INPUTMC | 7 | 1 | 17 | 2 | 6 | 3 | 9 | 4 | 17 | 2 | 8 | 2 | 3 | 2 | 10
-INPUTP | 1 | 21
-EQ | 8 | 
-   iobs/IOReady.T = iobs/IOReady & nAS_FSB & !fsb/ASrf
-	# iobs/Once & IOBERR & iobs/IOReady & 
-	!iobs/PS_FSM_FFd2 & !iobs/IOACTr & nADoutLE1
-	# iobs/Once & !IOBERR & !iobs/IOReady & !nAS_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/IOACTr & nADoutLE1
-	# iobs/Once & !IOBERR & !iobs/IOReady & 
-	!iobs/PS_FSM_FFd2 & !iobs/IOACTr & fsb/ASrf & nADoutLE1;
-   iobs/IOReady.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 5 | 6 | iobs/IOU1
-ATTRIBUTES | 8553280 | 0
-OUTPUTMC | 1 | 5 | 13
-INPUTS | 2 | nUDS_FSB  | iobs/Load1
-INPUTMC | 1 | 3 | 5
-INPUTP | 1 | 82
-EQ | 3 | 
-   iobs/IOU1.D = !nUDS_FSB;
-   iobs/IOU1.CLK = CLK_FSB;	// GCK
-   iobs/IOU1.CE = iobs/Load1;
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 6 | 10 | ram/RAMDIS2
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 6 | 6 | 10 | 2 | 4 | 5 | 5 | 5 | 8 | 6 | 9 | 6 | 11
-INPUTS | 17 | ram/RAMDIS2  | nAS_FSB  | fsb/ASrf  | ram/Once  | cnt/RefDone  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | A_FSB<9>  | ram/RASEL  | ram/Once.EXP
-INPUTMC | 13 | 6 | 10 | 2 | 6 | 6 | 9 | 1 | 9 | 6 | 12 | 6 | 7 | 6 | 4 | 6 | 0 | 6 | 15 | 6 | 13 | 3 | 2 | 3 | 0 | 6 | 9
-INPUTP | 4 | 21 | 105 | 15 | 19
-EXPORTS | 1 | 6 | 11
-IMPORTS | 1 | 6 | 9
-EQ | 26 | 
-   ram/RAMDIS2.T = ram/RAMDIS2 & nAS_FSB & !fsb/ASrf
-	# ram/Once & !cnt/RefDone & !ram/RAMDIS2 & !nAS_FSB & 
-	ram/RS_FSM_FFd2 & ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3 & 
-	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-	# ram/Once & !cnt/RefDone & !ram/RAMDIS2 & 
-	ram/RS_FSM_FFd2 & ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3 & 
-	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & ram/Once & 
-	!cnt/RefDone & !ram/RAMDIS2 & !nAS_FSB & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
-	cnt/RefCnt<7>
-;Imported pterms FB7_10
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & ram/Once & 
-	!cnt/RefDone & !ram/RAMDIS2 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
-	!ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & 
-	fsb/ASrf
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & ram/Once & !cnt/RefDone & !ram/RAMDIS2 & !nAS_FSB & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & 
-	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & ram/Once & !cnt/RefDone & !ram/RAMDIS2 & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & 
-	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf;
-   ram/RAMDIS2.CLK = CLK_FSB;	// GCK
-    ram/RAMDIS2.EXP  =  A_FSB<9> & ram/RASEL
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 0 | 1 | nDTACK_FSB_OBUF
-ATTRIBUTES | 8815362 | 0
-OUTPUTMC | 5 | 0 | 1 | 0 | 0 | 0 | 2 | 0 | 3 | 0 | 17
-INPUTS | 9 | fsb/BERR1r  | nDTACK_FSB  | BERR_IOBS  | fsb/BERR0r  | $OpTx$FX_DC$602  | nAS_FSB  | fsb/ASrf  | EXP14_.EXP  | EXP15_.EXP
-INPUTMC | 8 | 1 | 8 | 0 | 1 | 4 | 14 | 3 | 15 | 0 | 16 | 2 | 6 | 0 | 0 | 0 | 2
-INPUTP | 1 | 21
-IMPORTS | 2 | 0 | 0 | 0 | 2
-EQ | 82 | 
-   nDTACK_FSB.D = BERR_IOBS & nDTACK_FSB
-	# fsb/BERR0r & nDTACK_FSB
-	# fsb/BERR1r & nDTACK_FSB
-	# nAS_FSB & !fsb/ASrf
-	# nDTACK_FSB & !$OpTx$FX_DC$602
-;Imported pterms FB1_1
-	# A_FSB<23> & !fsb/Ready1r & !iobs/IOReady & 
-	nDTACK_FSB
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
-	!fsb/Ready0r & nDTACK_FSB & !ram/RAMReady
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r & 
-	!iobs/IOReady & nDTACK_FSB
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !fsb/Ready0r & nDTACK_FSB & !ram/RAMReady
-	# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & 
-	!fsb/Ready1r & !iobs/IOReady & nDTACK_FSB
-;Imported pterms FB1_18
-	# A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	nDTACK_FSB
-	# A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	nDTACK_FSB
-	# A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	nDTACK_FSB
-	# A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	nDTACK_FSB
-	# A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	nDTACK_FSB
-;Imported pterms FB1_3
-	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & 
-	!fsb/Ready1r & !iobs/IOReady & nDTACK_FSB
-	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & !iobs/IOReady & 
-	nDTACK_FSB & !nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & !iobs/IOReady & 
-	nDTACK_FSB & !nADoutLE1
-	# A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	nDTACK_FSB
-	# A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	nDTACK_FSB
-;Imported pterms FB1_4
-	# A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	nDTACK_FSB
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	fsb/Ready1r & $OpTx$FX_DC$602
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	iobs/IOReady & $OpTx$FX_DC$602;
-   nDTACK_FSB.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 3 | 0 | ram/RASEL
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 12 | 5 | 1 | 6 | 14 | 4 | 1 | 3 | 7 | 4 | 7 | 3 | 11 | 6 | 1 | 6 | 5 | 6 | 8 | 6 | 11 | 3 | 2 | 6 | 10
-INPUTS | 13 | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd3  | ram/RS_FSM_FFd1  | A_FSB<23>  | cnt/RefDone  | nAS_FSB  | ram/BACTr  | fsb/ASrf  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | RA_0_OBUF.EXP  | EXP32_.EXP
-INPUTMC | 11 | 6 | 12 | 6 | 4 | 6 | 7 | 1 | 9 | 2 | 17 | 2 | 6 | 6 | 0 | 6 | 15 | 6 | 13 | 3 | 1 | 3 | 17
-INPUTP | 2 | 105 | 21
-IMPORTS | 2 | 3 | 1 | 3 | 17
-EQ | 50 | 
-   ram/RASEL.D = !ram/RS_FSM_FFd2 & ram/RS_FSM_FFd3
-	# ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
-	!ram/RS_FSM_FFd3
-	# A_FSB<23> & !cnt/RefDone & !nAS_FSB & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr
-	# A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-;Imported pterms FB4_2
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
-	!nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# !cnt/RefDone & nAS_FSB & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & 
-	!fsb/ASrf
-	# !cnt/RefDone & nAS_FSB & ram/RS_FSM_FFd1 & 
-	ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & 
-	!fsb/ASrf
-;Imported pterms FB4_18
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !ram/Once & 
-	!nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !ram/Once & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & fsb/ASrf
-	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & !nAS_FSB & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr
-	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
-	!nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr
-;Imported pterms FB4_17
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !nAS_FSB & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
-	fsb/ASrf
-	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
-	cnt/RefCnt<7>
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
-	cnt/RefCnt<7>
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
-	cnt/RefCnt<7>;
-   ram/RASEL.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 6 | 12 | ram/RS_FSM_FFd2
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 17 | 6 | 9 | 6 | 10 | 3 | 0 | 6 | 12 | 6 | 7 | 6 | 4 | 5 | 4 | 3 | 13 | 6 | 13 | 3 | 1 | 3 | 14 | 3 | 16 | 3 | 17 | 6 | 3 | 6 | 5 | 6 | 8 | 6 | 17
-INPUTS | 10 | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd3  | cnt/RefDone  | ram/RS_FSM_FFd1  | cnt/RefCnt<6>  | ram/BACTr  | cnt/RefCnt<7>  | cnt/RefCnt<5>  | RA_8_OBUF.EXP  | cnt/RefCnt<7>.EXP
-INPUTMC | 10 | 6 | 12 | 6 | 4 | 1 | 9 | 6 | 7 | 6 | 15 | 2 | 17 | 6 | 13 | 6 | 0 | 6 | 11 | 6 | 13
-IMPORTS | 2 | 6 | 11 | 6 | 13
-EQ | 28 | 
-   !ram/RS_FSM_FFd2.T = ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3
-	# cnt/RefDone & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
-	# !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & 
-	!cnt/RefCnt<5> & ram/BACTr
-	# !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & 
-	!cnt/RefCnt<6> & ram/BACTr
-	# !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & ram/BACTr & 
-	!cnt/RefCnt<7>
-;Imported pterms FB7_12
-	# nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & 
-	!cnt/RefCnt<5> & !fsb/ASrf
-	# nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & 
-	!cnt/RefCnt<6> & !fsb/ASrf
-	# nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & 
-	!cnt/RefCnt<7> & !fsb/ASrf
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB & 
-	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
-;Imported pterms FB7_14
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
-	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf
-	# !cnt/RefDone & nAS_FSB & ram/RS_FSM_FFd2 & 
-	ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & 
-	!fsb/ASrf;
-   ram/RS_FSM_FFd2.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 6 | 7 | ram/RS_FSM_FFd1
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 22 | 6 | 9 | 6 | 10 | 3 | 0 | 6 | 12 | 6 | 7 | 6 | 4 | 5 | 4 | 3 | 13 | 6 | 16 | 3 | 1 | 3 | 11 | 3 | 12 | 3 | 14 | 3 | 16 | 3 | 17 | 6 | 3 | 6 | 5 | 6 | 8 | 6 | 11 | 6 | 13 | 6 | 15 | 6 | 17
-INPUTS | 10 | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | ram/Once  | nAS_FSB  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | fsb/ASrf  | A_FSB<21>
-INPUTMC | 6 | 3 | 2 | 6 | 9 | 6 | 12 | 6 | 7 | 6 | 4 | 2 | 6
-INPUTP | 4 | 105 | 15 | 21 | 109
-EQ | 13 | 
-   ram/RS_FSM_FFd1.T = ram/RS_FSM_FFd2 & ram/RS_FSM_FFd3
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !ram/Once & 
-	!nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
-	!ram/RS_FSM_FFd3
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !ram/Once & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !nAS_FSB & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
-	!ram/RS_FSM_FFd3 & fsb/ASrf;
-   ram/RS_FSM_FFd1.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 6 | 4 | ram/RS_FSM_FFd3
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 15 | 6 | 9 | 6 | 10 | 3 | 0 | 6 | 12 | 6 | 7 | 6 | 4 | 3 | 13 | 6 | 13 | 3 | 1 | 3 | 14 | 6 | 3 | 6 | 5 | 6 | 8 | 6 | 11 | 6 | 17
-INPUTS | 11 | A_FSB<23>  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | ram/Once  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | cnt/RefDone  | cnt/RefCnt<5>  | cs/nOverlay0.EXP  | RA_6_OBUF.EXP
-INPUTMC | 10 | 6 | 12 | 6 | 7 | 6 | 4 | 6 | 9 | 6 | 15 | 6 | 13 | 1 | 9 | 6 | 0 | 6 | 3 | 6 | 5
-INPUTP | 1 | 105
-IMPORTS | 2 | 6 | 3 | 6 | 5
-EQ | 27 | 
-   !ram/RS_FSM_FFd3.T = A_FSB<23> & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
-	!ram/RS_FSM_FFd3
-	# ram/Once & cnt/RefDone & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
-	# ram/Once & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
-	!ram/RS_FSM_FFd3 & !cnt/RefCnt<5>
-	# ram/Once & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
-	!ram/RS_FSM_FFd3 & !cnt/RefCnt<6>
-	# ram/Once & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
-	!ram/RS_FSM_FFd3 & !cnt/RefCnt<7>
-;Imported pterms FB7_4
-	# A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
-	# A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
-	# nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
-	!ram/RS_FSM_FFd3 & !fsb/ASrf
-;Imported pterms FB7_6
-	# !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
-	# !cnt/RefDone & !nAS_FSB & ram/RS_FSM_FFd2 & 
-	ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
-	cnt/RefCnt<7>
-	# !cnt/RefDone & ram/RS_FSM_FFd2 & ram/RS_FSM_FFd1 & 
-	ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & 
-	fsb/ASrf;
-   ram/RS_FSM_FFd3.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 2 | 8 | iobs/PS_FSM_FFd2
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 20 | 3 | 9 | 4 | 14 | 2 | 2 | 5 | 15 | 5 | 13 | 2 | 15 | 1 | 17 | 2 | 8 | 2 | 10 | 3 | 5 | 2 | 7 | 2 | 12 | 2 | 5 | 2 | 0 | 2 | 1 | 2 | 3 | 2 | 9 | 2 | 11 | 2 | 13 | 3 | 8
-INPUTS | 11 | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | iobs/IOACTr  | iobs/Once  | nADoutLE1  | A_FSB<23>  | A_FSB<20>  | nAS_FSB  | fsb/ASrf  | ALE0S.EXP  | EXP24_.EXP
-INPUTMC | 8 | 2 | 8 | 2 | 11 | 2 | 3 | 3 | 9 | 2 | 10 | 2 | 6 | 2 | 7 | 2 | 9
-INPUTP | 3 | 105 | 114 | 21
-IMPORTS | 2 | 2 | 7 | 2 | 9
-EQ | 31 | 
-   !iobs/PS_FSM_FFd2.D = iobs/PS_FSM_FFd2 & iobs/PS_FSM_FFd1 & 
-	iobs/IOACTr
-	# !iobs/PS_FSM_FFd2 & iobs/PS_FSM_FFd1 & 
-	!iobs/IOACTr
-	# iobs/Once & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
-	nADoutLE1
-	# !A_FSB<23> & !A_FSB<20> & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & nADoutLE1
-	# nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
-	!fsb/ASrf & nADoutLE1
-;Imported pterms FB3_8
-	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<19> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & nWE_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-;Imported pterms FB3_10
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<18> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<17> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<16> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1;
-   iobs/PS_FSM_FFd2.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 5 | 12 | iobm/ES<0>
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 7 | 2 | 14 | 5 | 12 | 5 | 10 | 5 | 17 | 5 | 9 | 5 | 16 | 2 | 13
-INPUTS | 7 | iobm/ES<0>  | iobm/Er  | iobm/Er2  | iobm/ES<1>  | iobm/ES<2>  | iobm/ES<3>  | iobm/ES<4>
-INPUTMC | 7 | 5 | 12 | 7 | 17 | 5 | 0 | 5 | 10 | 5 | 17 | 5 | 9 | 5 | 16
-EQ | 6 | 
-   !iobm/ES<0>.T = iobm/ES<0> & !iobm/Er & iobm/Er2
-	# !iobm/ES<0> & !iobm/ES<1> & !iobm/ES<2> & 
-	!iobm/ES<3> & !iobm/ES<4> & iobm/Er
-	# !iobm/ES<0> & !iobm/ES<1> & !iobm/ES<2> & 
-	!iobm/ES<3> & !iobm/ES<4> & !iobm/Er2;
-   iobm/ES<0>.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 5 | 10 | iobm/ES<1>
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 7 | 2 | 14 | 5 | 12 | 5 | 10 | 5 | 17 | 5 | 9 | 5 | 16 | 2 | 13
-INPUTS | 4 | iobm/ES<0>  | iobm/ES<1>  | iobm/Er  | iobm/Er2
-INPUTMC | 4 | 5 | 12 | 5 | 10 | 7 | 17 | 5 | 0
-EQ | 4 | 
-   !iobm/ES<1>.D = iobm/ES<0> & iobm/ES<1>
-	# !iobm/ES<0> & !iobm/ES<1>
-	# !iobm/Er & iobm/Er2;
-   iobm/ES<1>.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 4 | 15 | iobm/IOS_FSM_FFd3
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 11 | 4 | 17 | 4 | 15 | 4 | 0 | 4 | 13 | 4 | 12 | 1 | 16 | 7 | 14 | 1 | 13 | 1 | 10 | 1 | 11 | 4 | 16
-INPUTS | 10 | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd4  | CLK_IOB  | iobm/ETACK  | iobm/BERRrf  | iobm/BERRrr  | iobm/DTACKrf  | iobm/DTACKrr  | iobm/RESrf  | iobm/RESrr
-INPUTMC | 9 | 4 | 15 | 4 | 5 | 2 | 13 | 4 | 8 | 4 | 6 | 5 | 3 | 5 | 2 | 1 | 3 | 1 | 2
-INPUTP | 1 | 42
-EQ | 9 | 
-   !iobm/IOS_FSM_FFd3.D = !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd4
-	# !iobm/IOS_FSM_FFd4 & CLK_IOB & iobm/ETACK
-	# !iobm/IOS_FSM_FFd4 & CLK_IOB & iobm/BERRrf & 
-	iobm/BERRrr
-	# !iobm/IOS_FSM_FFd4 & CLK_IOB & iobm/DTACKrf & 
-	iobm/DTACKrr
-	# !iobm/IOS_FSM_FFd4 & CLK_IOB & iobm/RESrf & 
-	iobm/RESrr;
-   iobm/IOS_FSM_FFd3.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 5 | 17 | iobm/ES<2>
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 6 | 2 | 14 | 5 | 12 | 5 | 17 | 5 | 9 | 5 | 16 | 2 | 13
-INPUTS | 7 | iobm/ES<0>  | iobm/ES<2>  | iobm/ES<1>  | iobm/Er  | iobm/Er2  | iobm/ES<3>  | iobm/ES<4>
-INPUTMC | 7 | 5 | 12 | 5 | 17 | 5 | 10 | 7 | 17 | 5 | 0 | 5 | 9 | 5 | 16
-EQ | 6 | 
-   !iobm/ES<2>.D = !iobm/ES<0> & !iobm/ES<2>
-	# !iobm/ES<1> & !iobm/ES<2>
-	# !iobm/Er & iobm/Er2
-	# iobm/ES<0> & iobm/ES<1> & iobm/ES<2>
-	# !iobm/ES<2> & !iobm/ES<3> & iobm/ES<4>;
-   iobm/ES<2>.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 2 | 11 | iobs/PS_FSM_FFd1
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 16 | 3 | 9 | 2 | 2 | 5 | 15 | 5 | 13 | 2 | 15 | 2 | 8 | 2 | 10 | 3 | 5 | 2 | 7 | 2 | 12 | 2 | 5 | 2 | 0 | 2 | 1 | 2 | 3 | 2 | 9 | 3 | 8
-INPUTS | 10 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | iobs/PS_FSM_FFd2  | nADoutLE1  | cs/nOverlay1  | A_FSB<19>  | A_FSB<16>  | nWE_FSB  | nADoutLE1_OBUF.EXP
-INPUTMC | 4 | 2 | 8 | 2 | 10 | 3 | 2 | 2 | 10
-INPUTP | 6 | 105 | 15 | 109 | 117 | 153 | 98
-EXPORTS | 1 | 2 | 12
-IMPORTS | 1 | 2 | 10
-EQ | 14 | 
-   iobs/PS_FSM_FFd1.D = ;Imported pterms FB3_11
-	  iobs/PS_FSM_FFd2
-	# iobs/PS_FSM_FFd1 & iobs/IOACTr;
-   iobs/PS_FSM_FFd1.CLK = CLK_FSB;	// GCK
-    iobs/PS_FSM_FFd1.EXP  =  !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<19> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<16> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & nWE_FSB & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 5 | 9 | iobm/ES<3>
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 6 | 2 | 14 | 5 | 12 | 5 | 17 | 5 | 9 | 5 | 16 | 2 | 13
-INPUTS | 6 | iobm/ES<3>  | iobm/Er  | iobm/Er2  | iobm/ES<0>  | iobm/ES<1>  | iobm/ES<2>
-INPUTMC | 6 | 5 | 9 | 7 | 17 | 5 | 0 | 5 | 12 | 5 | 10 | 5 | 17
-EQ | 4 | 
-   iobm/ES<3>.T = iobm/ES<3> & !iobm/Er & iobm/Er2
-	# iobm/ES<0> & iobm/ES<1> & iobm/ES<2> & iobm/Er
-	# iobm/ES<0> & iobm/ES<1> & iobm/ES<2> & !iobm/Er2;
-   iobm/ES<3>.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 5 | 16 | iobm/ES<4>
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 5 | 2 | 14 | 5 | 12 | 5 | 17 | 5 | 16 | 2 | 13
-INPUTS | 7 | iobm/ES<4>  | iobm/Er  | iobm/Er2  | iobm/ES<0>  | iobm/ES<1>  | iobm/ES<2>  | iobm/ES<3>
-INPUTMC | 7 | 5 | 16 | 7 | 17 | 5 | 0 | 5 | 12 | 5 | 10 | 5 | 17 | 5 | 9
-EQ | 8 | 
-   iobm/ES<4>.T = iobm/ES<4> & !iobm/Er & iobm/Er2
-	# iobm/ES<0> & iobm/ES<1> & iobm/ES<2> & 
-	iobm/ES<3> & iobm/Er
-	# iobm/ES<0> & iobm/ES<1> & iobm/ES<2> & 
-	iobm/ES<3> & !iobm/Er2
-	# iobm/ES<0> & iobm/ES<1> & !iobm/ES<2> & 
-	!iobm/ES<3> & iobm/ES<4>;
-   iobm/ES<4>.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 4 | 5 | iobm/IOS_FSM_FFd4
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 10 | 4 | 15 | 4 | 0 | 4 | 12 | 1 | 16 | 7 | 14 | 1 | 13 | 1 | 10 | 1 | 11 | 4 | 1 | 4 | 17
-INPUTS | 1 | iobm/IOS_FSM_FFd5
-INPUTMC | 1 | 4 | 4
-EQ | 2 | 
-   iobm/IOS_FSM_FFd4.D = iobm/IOS_FSM_FFd5;
-   iobm/IOS_FSM_FFd4.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 4 | 4 | iobm/IOS_FSM_FFd5
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 9 | 4 | 5 | 4 | 0 | 4 | 12 | 1 | 16 | 1 | 13 | 1 | 10 | 1 | 11 | 4 | 1 | 4 | 17
-INPUTS | 1 | iobm/IOS_FSM_FFd6
-INPUTMC | 1 | 4 | 3
-EQ | 2 | 
-   iobm/IOS_FSM_FFd5.D = iobm/IOS_FSM_FFd6;
-   iobm/IOS_FSM_FFd5.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 4 | 3 | iobm/IOS_FSM_FFd6
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 9 | 4 | 4 | 4 | 0 | 4 | 12 | 1 | 16 | 1 | 13 | 1 | 10 | 1 | 11 | 4 | 1 | 4 | 17
-INPUTS | 1 | iobm/IOS_FSM_FFd7
-INPUTMC | 1 | 4 | 2
-EQ | 2 | 
-   iobm/IOS_FSM_FFd6.D = iobm/IOS_FSM_FFd7;
-   iobm/IOS_FSM_FFd6.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 4 | 2 | iobm/IOS_FSM_FFd7
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 9 | 4 | 3 | 4 | 0 | 4 | 12 | 1 | 16 | 1 | 13 | 1 | 10 | 1 | 11 | 4 | 1 | 4 | 17
-INPUTS | 3 | CLK_IOB  | iobm/IOREQr  | iobm/IOS_FSM_FFd8
-INPUTMC | 2 | 1 | 4 | 4 | 10
-INPUTP | 1 | 42
-EQ | 2 | 
-   iobm/IOS_FSM_FFd7.D = !CLK_IOB & iobm/IOREQr & iobm/IOS_FSM_FFd8;
-   iobm/IOS_FSM_FFd7.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 4 | 9 | cnt/RefCnt<0>
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 11 | 1 | 9 | 1 | 15 | 1 | 14 | 1 | 12 | 6 | 0 | 6 | 14 | 1 | 7 | 1 | 6 | 1 | 5 | 6 | 2 | 6 | 13
-INPUTS | 0
-EQ | 2 | 
-   cnt/RefCnt<0>.T = Vcc;
-   cnt/RefCnt<0>.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 6 | 0 | cnt/RefCnt<5>
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 19 | 1 | 9 | 1 | 15 | 1 | 14 | 1 | 12 | 6 | 10 | 3 | 0 | 6 | 12 | 6 | 4 | 6 | 14 | 6 | 13 | 3 | 11 | 6 | 11 | 3 | 1 | 3 | 14 | 3 | 16 | 6 | 0 | 6 | 5 | 6 | 9 | 6 | 17
-INPUTS | 9 | cnt/RefCnt<0>  | cnt/RefCnt<1>  | cnt/RefCnt<2>  | cnt/RefCnt<3>  | cnt/RefCnt<4>  | cnt/RefDone  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<7>
-INPUTMC | 9 | 4 | 9 | 1 | 7 | 1 | 6 | 1 | 5 | 6 | 2 | 1 | 9 | 6 | 0 | 6 | 15 | 6 | 13
-EXPORTS | 1 | 6 | 17
-EQ | 5 | 
-   cnt/RefCnt<5>.T = cnt/RefCnt<0> & cnt/RefCnt<1> & cnt/RefCnt<2> & 
-	cnt/RefCnt<3> & cnt/RefCnt<4>;
-   cnt/RefCnt<5>.CLK = CLK_FSB;	// GCK
-    cnt/RefCnt<5>.EXP  =  !cnt/RefDone & cnt/RefCnt<5> & cnt/RefCnt<6> & 
-	cnt/RefCnt<7>
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 6 | 15 | cnt/RefCnt<6>
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 18 | 1 | 9 | 1 | 15 | 1 | 14 | 1 | 12 | 6 | 10 | 3 | 0 | 6 | 12 | 6 | 4 | 6 | 13 | 3 | 11 | 6 | 11 | 3 | 1 | 3 | 14 | 3 | 16 | 6 | 0 | 6 | 5 | 6 | 9 | 6 | 16
-INPUTS | 11 | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | ram/Once  | nAS_FSB  | ram/RS_FSM_FFd1  | fsb/ASrf  | cnt/RefDone  | ram/BACTr  | A_FSB<21>  | RA_9_OBUF.EXP
-INPUTMC | 7 | 3 | 2 | 6 | 9 | 6 | 7 | 2 | 6 | 1 | 9 | 2 | 17 | 6 | 14
-INPUTP | 4 | 105 | 15 | 21 | 109
-EXPORTS | 1 | 6 | 16
-IMPORTS | 1 | 6 | 14
-EQ | 14 | 
-   cnt/RefCnt<6>.T = ;Imported pterms FB7_15
-	  cnt/RefCnt<0> & cnt/RefCnt<5> & cnt/RefCnt<1> & 
-	cnt/RefCnt<2> & cnt/RefCnt<3> & cnt/RefCnt<4>;
-   cnt/RefCnt<6>.CLK = CLK_FSB;	// GCK
-    cnt/RefCnt<6>.EXP  =  !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !ram/Once & 
-	!nAS_FSB & !ram/RS_FSM_FFd1
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !ram/Once & 
-	!ram/RS_FSM_FFd1 & fsb/ASrf
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !ram/RS_FSM_FFd1 & fsb/ASrf
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 2 | 3 | iobs/IOACTr
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 6 | 4 | 14 | 1 | 17 | 2 | 8 | 2 | 10 | 2 | 12 | 2 | 2
-INPUTS | 18 | IOACT  | A_FSB<14>  | A_FSB<22>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | iobs/Once  | IORW0  | nWE_FSB  | nAS_FSB  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nADoutLE1  | fsb/ASrf  | A_FSB<13>
-INPUTMC | 8 | 4 | 0 | 3 | 2 | 3 | 9 | 2 | 2 | 2 | 8 | 2 | 11 | 2 | 10 | 2 | 6
-INPUTP | 10 | 147 | 15 | 114 | 117 | 123 | 155 | 153 | 98 | 21 | 136
-EXPORTS | 1 | 2 | 2
-EQ | 18 | 
-   iobs/IOACTr.D = IOACT;
-   iobs/IOACTr.CLK = CLK_FSB;	// GCK
-    iobs/IOACTr.EXP  =  A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & 
-	!iobs/Once & IORW0 & !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & 
-	!iobs/Once & IORW0 & !nWE_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & 
-	!iobs/Once & IORW0 & !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & 
-	!iobs/Once & IORW0 & !nWE_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 1 | 7 | cnt/RefCnt<1>
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 10 | 1 | 9 | 1 | 15 | 1 | 14 | 1 | 12 | 6 | 0 | 6 | 14 | 1 | 6 | 1 | 5 | 6 | 2 | 6 | 13
-INPUTS | 1 | cnt/RefCnt<0>
-INPUTMC | 1 | 4 | 9
-EQ | 2 | 
-   cnt/RefCnt<1>.T = cnt/RefCnt<0>;
-   cnt/RefCnt<1>.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 1 | 6 | cnt/RefCnt<2>
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 9 | 1 | 9 | 1 | 15 | 1 | 14 | 1 | 12 | 6 | 0 | 6 | 14 | 1 | 5 | 6 | 2 | 6 | 13
-INPUTS | 2 | cnt/RefCnt<0>  | cnt/RefCnt<1>
-INPUTMC | 2 | 4 | 9 | 1 | 7
-EQ | 2 | 
-   cnt/RefCnt<2>.T = cnt/RefCnt<0> & cnt/RefCnt<1>;
-   cnt/RefCnt<2>.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 1 | 5 | cnt/RefCnt<3>
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 8 | 1 | 9 | 1 | 15 | 1 | 14 | 1 | 12 | 6 | 0 | 6 | 14 | 6 | 2 | 6 | 13
-INPUTS | 3 | cnt/RefCnt<0>  | cnt/RefCnt<1>  | cnt/RefCnt<2>
-INPUTMC | 3 | 4 | 9 | 1 | 7 | 1 | 6
-EQ | 2 | 
-   cnt/RefCnt<3>.T = cnt/RefCnt<0> & cnt/RefCnt<1> & cnt/RefCnt<2>;
-   cnt/RefCnt<3>.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 6 | 2 | cnt/RefCnt<4>
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 7 | 1 | 9 | 1 | 15 | 1 | 14 | 1 | 12 | 6 | 0 | 6 | 14 | 6 | 13
-INPUTS | 4 | cnt/RefCnt<0>  | cnt/RefCnt<1>  | cnt/RefCnt<2>  | cnt/RefCnt<3>
-INPUTMC | 4 | 4 | 9 | 1 | 7 | 1 | 6 | 1 | 5
-EQ | 3 | 
-   cnt/RefCnt<4>.T = cnt/RefCnt<0> & cnt/RefCnt<1> & cnt/RefCnt<2> & 
-	cnt/RefCnt<3>;
-   cnt/RefCnt<4>.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 2 | 13 | iobm/ETACK
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 5 | 4 | 17 | 4 | 15 | 4 | 0 | 4 | 13 | 2 | 12
-INPUTS | 16 | nVMA_IOB  | iobm/ES<0>  | iobm/ES<1>  | iobm/ES<2>  | iobm/ES<3>  | iobm/ES<4>  | A_FSB<23>  | A_FSB<21>  | A_FSB<18>  | iobs/PS_FSM_FFd2  | nADoutLE1  | A_FSB<17>  | A_FSB<14>  | A_FSB<13>  | A_FSB<22>  | cs/nOverlay1
-INPUTMC | 9 | 2 | 14 | 5 | 12 | 5 | 10 | 5 | 17 | 5 | 9 | 5 | 16 | 2 | 8 | 2 | 10 | 3 | 2
-INPUTP | 7 | 105 | 109 | 123 | 155 | 147 | 136 | 15
-EXPORTS | 1 | 2 | 12
-EQ | 11 | 
-   iobm/ETACK.D = !nVMA_IOB & !iobm/ES<0> & !iobm/ES<1> & !iobm/ES<2> & 
-	!iobm/ES<3> & iobm/ES<4>;
-   iobm/ETACK.CLK = CLK2X_IOB;	// GCK
-    iobm/ETACK.EXP  =  !A_FSB<23> & A_FSB<21> & !A_FSB<18> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<17> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1 & !iobs/PS_FSM_FFd2 & nADoutLE1
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 1 | 4 | iobm/IOREQr
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 5 | 4 | 2 | 4 | 10 | 4 | 0 | 4 | 12 | 4 | 17
-INPUTS | 1 | IOREQ
-INPUTMC | 1 | 2 | 12
-EQ | 2 | 
-   iobm/IOREQr.D = IOREQ;
-   !iobm/IOREQr.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 4 | 10 | iobm/IOS_FSM_FFd8
-ATTRIBUTES | 8553220 | 0
-OUTPUTMC | 5 | 4 | 2 | 4 | 10 | 4 | 0 | 4 | 12 | 4 | 1
-INPUTS | 4 | iobm/IOS_FSM_FFd8  | iobm/IOS_FSM_FFd1  | CLK_IOB  | iobm/IOREQr
-INPUTMC | 3 | 4 | 10 | 7 | 16 | 1 | 4
-INPUTP | 1 | 42
-EQ | 3 | 
-   !iobm/IOS_FSM_FFd8.D = !iobm/IOS_FSM_FFd8 & !iobm/IOS_FSM_FFd1
-	# !CLK_IOB & iobm/IOREQr & !iobm/IOS_FSM_FFd1;
-   iobm/IOS_FSM_FFd8.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 3 | 5 | iobs/Load1
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 3 | 5 | 7 | 5 | 6 | 2 | 10
-INPUTS | 10 | nADoutLE1  | iobs/Once  | A_FSB<23>  | A_FSB<20>  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nAS_FSB  | fsb/ASrf  | EXP26_.EXP  | EXP27_.EXP
-INPUTMC | 7 | 2 | 10 | 3 | 9 | 2 | 8 | 2 | 11 | 2 | 6 | 3 | 4 | 3 | 6
-INPUTP | 3 | 105 | 114 | 21
-IMPORTS | 2 | 3 | 4 | 3 | 6
-EQ | 18 | 
-   !iobs/Load1.D = iobs/Once
-	# !nADoutLE1
-	# !A_FSB<23> & !A_FSB<20>
-	# nAS_FSB & !fsb/ASrf
-	# !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
-;Imported pterms FB4_5
-	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21>
-	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<19>
-	# !A_FSB<23> & A_FSB<21> & nWE_FSB
-;Imported pterms FB4_7
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<18>
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<17>
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<16>
-	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21>
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1;
-   iobs/Load1.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 2 | 17 | ram/BACTr
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 11 | 3 | 0 | 6 | 12 | 3 | 13 | 6 | 16 | 3 | 1 | 3 | 12 | 3 | 14 | 3 | 17 | 6 | 15 | 6 | 17 | 2 | 16
-INPUTS | 8 | nAS_FSB  | fsb/ASrf  | A_FSB<23>  | A_FSB<21>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>
-INPUTMC | 1 | 2 | 6
-INPUTP | 7 | 21 | 105 | 109 | 117 | 123 | 155 | 153
-EXPORTS | 1 | 2 | 16
-EQ | 6 | 
-   !ram/BACTr.D = nAS_FSB & !fsb/ASrf;
-   ram/BACTr.CLK = CLK_FSB;	// GCK
-    ram/BACTr.EXP  =  !A_FSB<23> & A_FSB<21> & !A_FSB<19>
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<18>
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<17>
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<16>
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 4 | 0 | IOACT
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 2 | 2 | 14 | 2 | 3
-INPUTS | 13 | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd4  | iobm/IOS_FSM_FFd5  | iobm/IOS_FSM_FFd6  | iobm/IOS_FSM_FFd7  | iobm/IOREQr  | iobm/IOS_FSM_FFd8  | CLK_IOB  | iobm/ETACK  | iobm/BERRrf  | iobm/BERRrr  | RA_1_OBUF.EXP  | IOBERR.EXP
-INPUTMC | 12 | 4 | 15 | 4 | 5 | 4 | 4 | 4 | 3 | 4 | 2 | 1 | 4 | 4 | 10 | 2 | 13 | 4 | 8 | 4 | 6 | 4 | 1 | 4 | 17
-INPUTP | 1 | 42
-IMPORTS | 2 | 4 | 1 | 4 | 17
-EQ | 33 | 
-   !IOACT.D = !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd4 & 
-	!iobm/IOS_FSM_FFd5 & !iobm/IOS_FSM_FFd6 & !iobm/IOS_FSM_FFd7 & 
-	!iobm/IOREQr
-	# !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd4 & 
-	!iobm/IOS_FSM_FFd5 & !iobm/IOS_FSM_FFd6 & !iobm/IOS_FSM_FFd7 & 
-	!iobm/IOS_FSM_FFd8
-	# !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd5 & 
-	!iobm/IOS_FSM_FFd6 & CLK_IOB & !iobm/IOS_FSM_FFd7 & iobm/ETACK & 
-	!iobm/IOREQr
-	# !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd5 & 
-	!iobm/IOS_FSM_FFd6 & CLK_IOB & !iobm/IOS_FSM_FFd7 & iobm/ETACK & 
-	!iobm/IOS_FSM_FFd8
-	# !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd5 & 
-	!iobm/IOS_FSM_FFd6 & CLK_IOB & !iobm/IOS_FSM_FFd7 & !iobm/IOREQr & 
-	iobm/BERRrf & iobm/BERRrr
-;Imported pterms FB5_2
-	# !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd5 & 
-	!iobm/IOS_FSM_FFd6 & CLK_IOB & !iobm/IOS_FSM_FFd7 & !iobm/IOS_FSM_FFd8 & 
-	iobm/BERRrf & iobm/BERRrr
-	# !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd5 & 
-	!iobm/IOS_FSM_FFd6 & CLK_IOB & !iobm/IOS_FSM_FFd7 & !iobm/IOS_FSM_FFd8 & 
-	iobm/DTACKrf & iobm/DTACKrr
-	# !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd5 & 
-	!iobm/IOS_FSM_FFd6 & CLK_IOB & !iobm/IOS_FSM_FFd7 & !iobm/IOS_FSM_FFd8 & 
-	iobm/RESrf & iobm/RESrr
-;Imported pterms FB5_18
-	# !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd5 & 
-	!iobm/IOS_FSM_FFd6 & CLK_IOB & !iobm/IOS_FSM_FFd7 & !iobm/IOREQr & 
-	iobm/DTACKrf & iobm/DTACKrr
-	# !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd5 & 
-	!iobm/IOS_FSM_FFd6 & CLK_IOB & !iobm/IOS_FSM_FFd7 & !iobm/IOREQr & 
-	iobm/RESrf & iobm/RESrr;
-   IOACT.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 6 | 13 | cnt/RefCnt<7>
-ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 16 | 1 | 9 | 1 | 14 | 1 | 12 | 6 | 10 | 3 | 0 | 6 | 12 | 6 | 4 | 3 | 11 | 6 | 13 | 3 | 1 | 3 | 14 | 3 | 16 | 6 | 0 | 6 | 5 | 6 | 9 | 6 | 11
-INPUTS | 18 | cnt/RefCnt<0>  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<1>  | cnt/RefCnt<2>  | cnt/RefCnt<3>  | cnt/RefCnt<4>  | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | fsb/ASrf  | A_FSB<21>  | nAS_FSB  | cnt/RefDone  | ram/RS_FSM_FFd2  | cnt/RefCnt<7>
-INPUTMC | 14 | 4 | 9 | 6 | 0 | 6 | 15 | 1 | 7 | 1 | 6 | 1 | 5 | 6 | 2 | 3 | 2 | 6 | 7 | 6 | 4 | 2 | 6 | 1 | 9 | 6 | 12 | 6 | 13
-INPUTP | 4 | 105 | 15 | 109 | 21
-EXPORTS | 1 | 6 | 12
-EQ | 12 | 
-   cnt/RefCnt<7>.T = cnt/RefCnt<0> & cnt/RefCnt<5> & cnt/RefCnt<6> & 
-	cnt/RefCnt<1> & cnt/RefCnt<2> & cnt/RefCnt<3> & cnt/RefCnt<4>;
-   cnt/RefCnt<7>.CLK = CLK_FSB;	// GCK
-    cnt/RefCnt<7>.EXP  =  !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
-	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf
-	# !cnt/RefDone & nAS_FSB & ram/RS_FSM_FFd2 & 
-	ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & 
-	!fsb/ASrf
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 7 | 17 | iobm/Er
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 6 | 5 | 12 | 5 | 10 | 5 | 17 | 5 | 9 | 5 | 16 | 5 | 0
-INPUTS | 1 | E_IOB
-INPUTP | 1 | 77
-EQ | 2 | 
-   iobm/Er.D = E_IOB;
-   !iobm/Er.CLK = CLK_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK_IOB
-
-MACROCELL | 5 | 4 | RefAck
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 2 | 1 | 9 | 2 | 4
-INPUTS | 2 | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1
-INPUTMC | 2 | 6 | 12 | 6 | 7
-EQ | 2 | 
-   RefAck.D = ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1;
-   RefAck.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 5 | 0 | iobm/Er2
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 5 | 5 | 12 | 5 | 10 | 5 | 17 | 5 | 9 | 5 | 16
-INPUTS | 1 | iobm/Er
-INPUTMC | 1 | 7 | 17
-EQ | 2 | 
-   iobm/Er2.D = iobm/Er;
-   iobm/Er2.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 4 | 13 | iobm/IOS_FSM_FFd2
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 2 | 7 | 16 | 1 | 13
-INPUTS | 9 | iobm/IOS_FSM_FFd3  | CLK_IOB  | iobm/ETACK  | iobm/BERRrf  | iobm/BERRrr  | iobm/DTACKrf  | iobm/DTACKrr  | iobm/RESrf  | iobm/RESrr
-INPUTMC | 8 | 4 | 15 | 2 | 13 | 4 | 8 | 4 | 6 | 5 | 3 | 5 | 2 | 1 | 3 | 1 | 2
-INPUTP | 1 | 42
-EQ | 8 | 
-   iobm/IOS_FSM_FFd2.D = iobm/IOS_FSM_FFd3 & CLK_IOB & iobm/ETACK
-	# iobm/IOS_FSM_FFd3 & CLK_IOB & iobm/BERRrf & 
-	iobm/BERRrr
-	# iobm/IOS_FSM_FFd3 & CLK_IOB & iobm/DTACKrf & 
-	iobm/DTACKrr
-	# iobm/IOS_FSM_FFd3 & CLK_IOB & iobm/RESrf & 
-	iobm/RESrr;
-   iobm/IOS_FSM_FFd2.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 1 | 1 | iobm/VPArf
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 1 | 2 | 14
-INPUTS | 1 | nVPA_IOB
-INPUTP | 1 | 96
-EQ | 2 | 
-   iobm/VPArf.D = !nVPA_IOB;
-   !iobm/VPArf.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 1 | 0 | iobm/VPArr
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 1 | 2 | 14
-INPUTS | 1 | nVPA_IOB
-INPUTP | 1 | 96
-EQ | 2 | 
-   iobm/VPArr.D = !nVPA_IOB;
-   iobm/VPArr.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 4 | 12 | ALE0M
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 1 | 7 | 8
-INPUTS | 7 | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd4  | iobm/IOS_FSM_FFd5  | iobm/IOS_FSM_FFd6  | iobm/IOS_FSM_FFd7  | iobm/IOREQr  | iobm/IOS_FSM_FFd8
-INPUTMC | 7 | 4 | 15 | 4 | 5 | 4 | 4 | 4 | 3 | 4 | 2 | 1 | 4 | 4 | 10
-EQ | 7 | 
-   !ALE0M.D = !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd4 & 
-	!iobm/IOS_FSM_FFd5 & !iobm/IOS_FSM_FFd6 & !iobm/IOS_FSM_FFd7 & 
-	!iobm/IOREQr
-	# !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd4 & 
-	!iobm/IOS_FSM_FFd5 & !iobm/IOS_FSM_FFd6 & !iobm/IOS_FSM_FFd7 & 
-	!iobm/IOS_FSM_FFd8;
-   ALE0M.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 2 | 7 | ALE0S
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 2 | 7 | 8 | 2 | 8
-INPUTS | 9 | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | nADoutLE1  | cs/nOverlay1  | A_FSB<19>  | nWE_FSB
-INPUTMC | 4 | 2 | 8 | 2 | 11 | 2 | 10 | 3 | 2
-INPUTP | 5 | 105 | 15 | 109 | 117 | 98
-EXPORTS | 1 | 2 | 8
-EQ | 10 | 
-   ALE0S.D = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1;
-   ALE0S.CLK = CLK_FSB;	// GCK
-    ALE0S.EXP  =  !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<19> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & nWE_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 2 | 12 | IOREQ
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 1 | 1 | 4
-INPUTS | 11 | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | iobs/IOACTr  | iobs/Once  | nADoutLE1  | A_FSB<23>  | A_FSB<20>  | nAS_FSB  | fsb/ASrf  | iobs/PS_FSM_FFd1.EXP  | iobm/ETACK.EXP
-INPUTMC | 8 | 2 | 8 | 2 | 11 | 2 | 3 | 3 | 9 | 2 | 10 | 2 | 6 | 2 | 11 | 2 | 13
-INPUTP | 3 | 105 | 114 | 21
-IMPORTS | 2 | 2 | 11 | 2 | 13
-EQ | 28 | 
-   !IOREQ.D = !iobs/PS_FSM_FFd2 & iobs/PS_FSM_FFd1
-	# iobs/PS_FSM_FFd1 & iobs/IOACTr
-	# iobs/Once & !iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & !A_FSB<20> & !iobs/PS_FSM_FFd2 & 
-	nADoutLE1
-	# nAS_FSB & !iobs/PS_FSM_FFd2 & !fsb/ASrf & 
-	nADoutLE1
-;Imported pterms FB3_12
-	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<19> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<16> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & nWE_FSB & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-;Imported pterms FB3_14
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<18> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<17> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1 & !iobs/PS_FSM_FFd2 & nADoutLE1;
-   IOREQ.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 2 | 6 | fsb/ASrf
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 44 | 3 | 2 | 6 | 9 | 3 | 9 | 4 | 14 | 2 | 2 | 6 | 3 | 1 | 15 | 1 | 14 | 1 | 12 | 3 | 15 | 1 | 8 | 6 | 6 | 0 | 6 | 0 | 10 | 0 | 13 | 2 | 15 | 1 | 17 | 6 | 10 | 0 | 1 | 3 | 0 | 6 | 11 | 6 | 7 | 3 | 17 | 2 | 8 | 3 | 5 | 2 | 17 | 2 | 12 | 3 | 13 | 6 | 16 | 0 | 12 | 0 | 15 | 0 | 16 | 2 | 0 | 2 | 1 | 2 | 3 | 3 | 1 | 3 | 12 | 3 | 14 | 3 | 16 | 6 | 5 | 6 | 8 | 6 | 13 | 6 | 15 | 6 | 17
-INPUTS | 1 | nAS_FSB
-INPUTP | 1 | 21
-EQ | 2 | 
-   fsb/ASrf.D = !nAS_FSB;
-   !fsb/ASrf.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 4 | 8 | iobm/BERRrf
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 6 | 4 | 17 | 4 | 15 | 4 | 0 | 4 | 13 | 4 | 1 | 4 | 16
-INPUTS | 1 | nBERR_IOB
-INPUTP | 1 | 28
-EQ | 2 | 
-   iobm/BERRrf.D = !nBERR_IOB;
-   !iobm/BERRrf.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 4 | 6 | iobm/BERRrr
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 6 | 4 | 17 | 4 | 15 | 4 | 0 | 4 | 13 | 4 | 1 | 4 | 16
-INPUTS | 1 | nBERR_IOB
-INPUTP | 1 | 28
-EQ | 2 | 
-   iobm/BERRrr.D = !nBERR_IOB;
-   iobm/BERRrr.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 5 | 3 | iobm/DTACKrf
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 5 | 4 | 16 | 4 | 15 | 4 | 13 | 4 | 1 | 4 | 17
-INPUTS | 1 | nDTACK_IOB
-INPUTP | 1 | 88
-EQ | 2 | 
-   iobm/DTACKrf.D = !nDTACK_IOB;
-   !iobm/DTACKrf.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 5 | 2 | iobm/DTACKrr
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 5 | 4 | 16 | 4 | 15 | 4 | 13 | 4 | 1 | 4 | 17
-INPUTS | 1 | nDTACK_IOB
-INPUTP | 1 | 88
-EQ | 2 | 
-   iobm/DTACKrr.D = !nDTACK_IOB;
-   iobm/DTACKrr.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 7 | 16 | iobm/IOS_FSM_FFd1
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 1 | 4 | 10
-INPUTS | 1 | iobm/IOS_FSM_FFd2
-INPUTMC | 1 | 4 | 13
-EQ | 2 | 
-   iobm/IOS_FSM_FFd1.D = iobm/IOS_FSM_FFd2;
-   iobm/IOS_FSM_FFd1.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 1 | 3 | iobm/RESrf
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 5 | 4 | 16 | 4 | 15 | 4 | 13 | 4 | 1 | 4 | 17
-INPUTS | 1 | nRES
-INPUTP | 1 | 160
-EQ | 2 | 
-   iobm/RESrf.D = !nRES;
-   !iobm/RESrf.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 1 | 2 | iobm/RESrr
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 5 | 4 | 16 | 4 | 15 | 4 | 13 | 4 | 1 | 4 | 17
-INPUTS | 1 | nRES
-INPUTP | 1 | 160
-EQ | 2 | 
-   iobm/RESrr.D = !nRES;
-   iobm/RESrr.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 2 | 5 | iobs/Clear1
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 1 | 2 | 10
-INPUTS | 3 | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nADoutLE1
-INPUTMC | 3 | 2 | 8 | 2 | 11 | 2 | 10
-EQ | 2 | 
-   iobs/Clear1.D = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & !nADoutLE1;
-   iobs/Clear1.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 3 | 13 | ram/RAMDIS1
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 3 | 2 | 4 | 5 | 5 | 5 | 8
-INPUTS | 10 | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | A_FSB<23>  | cnt/RefDone  | nAS_FSB  | ram/BACTr  | fsb/ASrf  | EXP30_.EXP  | EXP31_.EXP
-INPUTMC | 8 | 6 | 12 | 6 | 7 | 6 | 4 | 1 | 9 | 2 | 17 | 2 | 6 | 3 | 12 | 3 | 14
-INPUTP | 2 | 105 | 21
-IMPORTS | 2 | 3 | 12 | 3 | 14
-EQ | 38 | 
-   ram/RAMDIS1.D = ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1
-	# !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3
-	# !ram/RS_FSM_FFd2 & ram/RS_FSM_FFd1 & 
-	!ram/RS_FSM_FFd3
-	# A_FSB<23> & !cnt/RefDone & !nAS_FSB & 
-	!ram/RS_FSM_FFd1 & !ram/BACTr
-	# A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 & 
-	!ram/BACTr & fsb/ASrf
-;Imported pterms FB4_13
-	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & !nAS_FSB & 
-	!ram/RS_FSM_FFd1 & !ram/BACTr
-	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
-	!nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
-	!nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr
-;Imported pterms FB4_12
-	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-;Imported pterms FB4_15
-	# A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 & 
-	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# ram/Once & !cnt/RefDone & !ram/RS_FSM_FFd1 & 
-	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-	# !cnt/RefDone & ram/RS_FSM_FFd2 & ram/RS_FSM_FFd3 & 
-	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-	# !cnt/RefDone & nAS_FSB & !ram/RS_FSM_FFd1 & 
-	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & !fsb/ASrf;
-   ram/RAMDIS1.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 6 | 16 | ram/RAMReady
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 4 | 6 | 6 | 0 | 12 | 0 | 0 | 0 | 15
-INPUTS | 12 | A_FSB<21>  | cs/nOverlay1  | cnt/RefDone  | nAS_FSB  | ram/RS_FSM_FFd1  | ram/BACTr  | A_FSB<23>  | A_FSB<22>  | ram/Once  | fsb/ASrf  | cnt/RefCnt<6>.EXP  | EXP34_.EXP
-INPUTMC | 8 | 3 | 2 | 1 | 9 | 6 | 7 | 2 | 17 | 6 | 9 | 2 | 6 | 6 | 15 | 6 | 17
-INPUTP | 4 | 109 | 21 | 105 | 15
-IMPORTS | 2 | 6 | 15 | 6 | 17
-EQ | 33 | 
-   !ram/RAMReady.D = A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
-	!nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
-	!nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr
-	# !A_FSB<21> & !cs/nOverlay1 & !cnt/RefDone & 
-	!nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr
-	# !A_FSB<21> & !cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !nAS_FSB & !ram/RS_FSM_FFd1
-;Imported pterms FB7_16
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !ram/Once & 
-	!nAS_FSB & !ram/RS_FSM_FFd1
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !ram/Once & 
-	!ram/RS_FSM_FFd1 & fsb/ASrf
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !ram/RS_FSM_FFd1 & fsb/ASrf
-;Imported pterms FB7_18
-	# ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3
-	# !ram/RS_FSM_FFd2 & ram/RS_FSM_FFd1
-	# !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3
-	# A_FSB<23> & !cnt/RefDone & !nAS_FSB & 
-	!ram/RS_FSM_FFd1 & !ram/BACTr
-	# A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 & 
-	!ram/BACTr & fsb/ASrf
-;Imported pterms FB7_1
-	# !cnt/RefDone & cnt/RefCnt<5> & cnt/RefCnt<6> & 
-	cnt/RefCnt<7>;
-   ram/RAMReady.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 1 | 16 | nAS_IOB_OBUF
-ATTRIBUTES | 8684290 | 0
-INPUTS | 5 | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd4  | iobm/IOS_FSM_FFd5  | iobm/IOS_FSM_FFd6  | iobm/IOS_FSM_FFd7
-INPUTMC | 5 | 4 | 15 | 4 | 5 | 4 | 4 | 4 | 3 | 4 | 2
-EQ | 3 | 
-   nAS_IOB.D = !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd4 & 
-	!iobm/IOS_FSM_FFd5 & !iobm/IOS_FSM_FFd6 & !iobm/IOS_FSM_FFd7;
-   !nAS_IOB.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 5 | 1 | nCAS_OBUF
-ATTRIBUTES | 8684290 | 0
-INPUTS | 1 | ram/RASEL
-INPUTMC | 1 | 3 | 0
-EQ | 2 | 
-   nCAS.D = !ram/RASEL;
-   !nCAS.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 7 | 14 | nDinLE_OBUF
-ATTRIBUTES | 8684290 | 0
-INPUTS | 2 | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd4
-INPUTMC | 2 | 4 | 15 | 4 | 5
-EQ | 2 | 
-   !nDinLE.D = !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd4;
-   !nDinLE.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 1 | 13 | nDoutOE_OBUF
-ATTRIBUTES | 8684290 | 0
-INPUTS | 7 | IORW0  | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd4  | iobm/IOS_FSM_FFd5  | iobm/IOS_FSM_FFd6  | iobm/IOS_FSM_FFd7  | iobm/IOS_FSM_FFd2
-INPUTMC | 7 | 2 | 2 | 4 | 15 | 4 | 5 | 4 | 4 | 4 | 3 | 4 | 2 | 4 | 13
-EQ | 5 | 
-   nDoutOE.D = !IORW0
-	# !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd4 & 
-	!iobm/IOS_FSM_FFd5 & !iobm/IOS_FSM_FFd6 & !iobm/IOS_FSM_FFd7 & 
-	!iobm/IOS_FSM_FFd2;
-   nDoutOE.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 1 | 10 | nLDS_IOB_OBUF
-ATTRIBUTES | 8684290 | 0
-INPUTS | 7 | IOL0  | IORW0  | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd4  | iobm/IOS_FSM_FFd5  | iobm/IOS_FSM_FFd6  | iobm/IOS_FSM_FFd7
-INPUTMC | 7 | 5 | 15 | 2 | 2 | 4 | 15 | 4 | 5 | 4 | 4 | 4 | 3 | 4 | 2
-EQ | 6 | 
-   nLDS_IOB.D = !IOL0
-	# IORW0 & !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd4 & 
-	!iobm/IOS_FSM_FFd5
-	# !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd4 & 
-	!iobm/IOS_FSM_FFd5 & !iobm/IOS_FSM_FFd6 & !iobm/IOS_FSM_FFd7;
-   !nLDS_IOB.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 1 | 11 | nUDS_IOB_OBUF
-ATTRIBUTES | 8684290 | 0
-INPUTS | 7 | IOU0  | IORW0  | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd4  | iobm/IOS_FSM_FFd5  | iobm/IOS_FSM_FFd6  | iobm/IOS_FSM_FFd7
-INPUTMC | 7 | 5 | 13 | 2 | 2 | 4 | 15 | 4 | 5 | 4 | 4 | 4 | 3 | 4 | 2
-EQ | 6 | 
-   nUDS_IOB.D = !IOU0
-	# IORW0 & !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd4 & 
-	!iobm/IOS_FSM_FFd5
-	# !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd4 & 
-	!iobm/IOS_FSM_FFd5 & !iobm/IOS_FSM_FFd6 & !iobm/IOS_FSM_FFd7;
-   !nUDS_IOB.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 3 | 1 | RA_0_OBUF
-ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 3 | 0
-INPUTS | 13 | A_FSB<22>  | cs/nOverlay1  | cnt/RefDone  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | ram/BACTr  | fsb/ASrf  | nAS_FSB  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | ram/RS_FSM_FFd3  | cs/nOverlay1.EXP
-INPUTMC | 11 | 3 | 2 | 1 | 9 | 6 | 12 | 6 | 7 | 2 | 17 | 2 | 6 | 6 | 0 | 6 | 15 | 6 | 13 | 6 | 4 | 3 | 2
-INPUTP | 2 | 15 | 21
-EXPORTS | 1 | 3 | 0
-IMPORTS | 1 | 3 | 2
-EQ | 15 | 
-   RA<0> = ;Imported pterms FB4_3
-	  A_FSB<10> & !ram/RASEL
-	# ram/RASEL & A_FSB<1>;
-    RA_0_OBUF.EXP  =  A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
-	!nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# !cnt/RefDone & nAS_FSB & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & 
-	!fsb/ASrf
-	# !cnt/RefDone & nAS_FSB & ram/RS_FSM_FFd1 & 
-	ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & 
-	!fsb/ASrf
-
-MACROCELL | 4 | 1 | RA_1_OBUF
-ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 4 | 0
-INPUTS | 15 | A_FSB<11>  | ram/RASEL  | A_FSB<2>  | iobm/IOS_FSM_FFd4  | iobm/IOS_FSM_FFd5  | iobm/IOS_FSM_FFd6  | CLK_IOB  | iobm/IOS_FSM_FFd7  | iobm/IOS_FSM_FFd8  | iobm/BERRrf  | iobm/BERRrr  | iobm/DTACKrf  | iobm/DTACKrr  | iobm/RESrf  | iobm/RESrr
-INPUTMC | 12 | 3 | 0 | 4 | 5 | 4 | 4 | 4 | 3 | 4 | 2 | 4 | 10 | 4 | 8 | 4 | 6 | 5 | 3 | 5 | 2 | 1 | 3 | 1 | 2
-INPUTP | 3 | 140 | 24 | 42
-EXPORTS | 1 | 4 | 0
-EQ | 11 | 
-   RA<1> = A_FSB<11> & !ram/RASEL
-	# ram/RASEL & A_FSB<2>;
-    RA_1_OBUF.EXP  =  !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd5 & 
-	!iobm/IOS_FSM_FFd6 & CLK_IOB & !iobm/IOS_FSM_FFd7 & !iobm/IOS_FSM_FFd8 & 
-	iobm/BERRrf & iobm/BERRrr
-	# !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd5 & 
-	!iobm/IOS_FSM_FFd6 & CLK_IOB & !iobm/IOS_FSM_FFd7 & !iobm/IOS_FSM_FFd8 & 
-	iobm/DTACKrf & iobm/DTACKrr
-	# !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd5 & 
-	!iobm/IOS_FSM_FFd6 & CLK_IOB & !iobm/IOS_FSM_FFd7 & !iobm/IOS_FSM_FFd8 & 
-	iobm/RESrf & iobm/RESrr
-
-MACROCELL | 3 | 7 | RA_2_OBUF
-ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 3 | 8
-INPUTS | 10 | A_FSB<12>  | ram/RASEL  | A_FSB<3>  | A_FSB<14>  | A_FSB<13>  | A_FSB<23>  | A_FSB<21>  | iobs/Once  | A_FSB<22>  | cs/nOverlay1
-INPUTMC | 3 | 3 | 0 | 3 | 9 | 3 | 2
-INPUTP | 7 | 146 | 127 | 147 | 136 | 105 | 109 | 15
-EXPORTS | 1 | 3 | 8
-EQ | 6 | 
-   RA<2> = A_FSB<12> & !ram/RASEL
-	# ram/RASEL & A_FSB<3>;
-    RA_2_OBUF.EXP  =  !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & 
-	!iobs/Once
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1 & !iobs/Once
-
-MACROCELL | 4 | 7 | RA_3_OBUF
-ATTRIBUTES | 264962 | 0
-INPUTS | 3 | A_FSB<13>  | ram/RASEL  | A_FSB<4>
-INPUTMC | 1 | 3 | 0
-INPUTP | 2 | 136 | 92
-EQ | 2 | 
-   RA<3> = A_FSB<13> & !ram/RASEL
-	# ram/RASEL & A_FSB<4>;
-
-MACROCELL | 3 | 11 | RA_4_OBUF
-ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 3 | 12
-INPUTS | 11 | A_FSB<14>  | ram/RASEL  | A_FSB<5>  | A_FSB<22>  | A_FSB<21>  | cnt/RefDone  | ram/RS_FSM_FFd1  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | cs/nOverlay1
-INPUTMC | 7 | 3 | 0 | 1 | 9 | 6 | 7 | 6 | 0 | 6 | 15 | 6 | 13 | 3 | 2
-INPUTP | 4 | 147 | 23 | 15 | 109
-EXPORTS | 1 | 3 | 12
-EQ | 8 | 
-   RA<4> = A_FSB<14> & !ram/RASEL
-	# ram/RASEL & A_FSB<5>;
-    RA_4_OBUF.EXP  =  A_FSB<22> & !A_FSB<21> & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-
-MACROCELL | 6 | 1 | RA_5_OBUF
-ATTRIBUTES | 264962 | 0
-INPUTS | 3 | A_FSB<15>  | ram/RASEL  | A_FSB<6>
-INPUTMC | 1 | 3 | 0
-INPUTP | 2 | 134 | 29
-EQ | 2 | 
-   RA<5> = A_FSB<15> & !ram/RASEL
-	# ram/RASEL & A_FSB<6>;
-
-MACROCELL | 6 | 5 | RA_6_OBUF
-ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 6 | 4
-INPUTS | 14 | A_FSB<16>  | ram/RASEL  | A_FSB<7>  | A_FSB<22>  | cs/nOverlay1  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | cnt/RefDone  | nAS_FSB  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | fsb/ASrf
-INPUTMC | 10 | 3 | 0 | 3 | 2 | 6 | 12 | 6 | 7 | 6 | 4 | 1 | 9 | 6 | 0 | 6 | 15 | 6 | 13 | 2 | 6
-INPUTP | 4 | 153 | 30 | 15 | 21
-EXPORTS | 1 | 6 | 4
-EQ | 10 | 
-   RA<6> = A_FSB<16> & !ram/RASEL
-	# ram/RASEL & A_FSB<7>;
-    RA_6_OBUF.EXP  =  !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
-	# !cnt/RefDone & !nAS_FSB & ram/RS_FSM_FFd2 & 
-	ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
-	cnt/RefCnt<7>
-	# !cnt/RefDone & ram/RS_FSM_FFd2 & ram/RS_FSM_FFd1 & 
-	ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & 
-	fsb/ASrf
-
-MACROCELL | 6 | 8 | RA_7_OBUF
-ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 6 | 9
-INPUTS | 13 | A_FSB<17>  | ram/RASEL  | A_FSB<8>  | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | ram/Once  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | fsb/ASrf  | A_FSB<21>  | nAS_FSB
-INPUTMC | 7 | 3 | 0 | 3 | 2 | 6 | 9 | 6 | 12 | 6 | 7 | 6 | 4 | 2 | 6
-INPUTP | 6 | 155 | 103 | 105 | 15 | 109 | 21
-EXPORTS | 1 | 6 | 9
-EQ | 10 | 
-   RA<7> = A_FSB<8> & ram/RASEL
-	# A_FSB<17> & !ram/RASEL;
-    RA_7_OBUF.EXP  =  !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !ram/Once & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !nAS_FSB & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
-	!ram/RS_FSM_FFd3 & fsb/ASrf
-
-MACROCELL | 6 | 11 | RA_8_OBUF
-ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 6 | 12
-INPUTS | 13 | A_FSB<18>  | ram/RASEL  | nAS_FSB  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | cnt/RefCnt<5>  | fsb/ASrf  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | ram/RAMDIS2.EXP
-INPUTMC | 9 | 3 | 0 | 6 | 7 | 6 | 4 | 6 | 0 | 2 | 6 | 6 | 15 | 6 | 13 | 3 | 2 | 6 | 10
-INPUTP | 4 | 123 | 21 | 105 | 15
-EXPORTS | 1 | 6 | 12
-IMPORTS | 1 | 6 | 10
-EQ | 11 | 
-   RA<8> = A_FSB<18> & !ram/RASEL
-;Imported pterms FB7_11
-	# A_FSB<9> & ram/RASEL;
-    RA_8_OBUF.EXP  =  nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & 
-	!cnt/RefCnt<5> & !fsb/ASrf
-	# nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & 
-	!cnt/RefCnt<6> & !fsb/ASrf
-	# nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & 
-	!cnt/RefCnt<7> & !fsb/ASrf
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB & 
-	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
-
-MACROCELL | 6 | 14 | RA_9_OBUF
-ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 6 | 15
-INPUTS | 9 | A_FSB<19>  | ram/RASEL  | A_FSB<20>  | cnt/RefCnt<0>  | cnt/RefCnt<5>  | cnt/RefCnt<1>  | cnt/RefCnt<2>  | cnt/RefCnt<3>  | cnt/RefCnt<4>
-INPUTMC | 7 | 3 | 0 | 4 | 9 | 6 | 0 | 1 | 7 | 1 | 6 | 1 | 5 | 6 | 2
-INPUTP | 2 | 117 | 114
-EXPORTS | 1 | 6 | 15
-EQ | 4 | 
-   RA<9> = A_FSB<20> & ram/RASEL
-	# A_FSB<19> & !ram/RASEL;
-    RA_9_OBUF.EXP  =  cnt/RefCnt<0> & cnt/RefCnt<5> & cnt/RefCnt<1> & 
-	cnt/RefCnt<2> & cnt/RefCnt<3> & cnt/RefCnt<4>
-
-MACROCELL | 0 | 5 | nBERR_FSB_OBUF
-ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 0 | 6
-INPUTS | 20 | nAS_FSB  | BERR_IOBS  | TimeoutB  | fsb/BERR0r  | fsb/BERR1r  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<14>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | nWE_FSB  | fsb/Ready1r  | iobs/IOReady  | nADoutLE1  | A_FSB<13>
-INPUTMC | 8 | 4 | 14 | 1 | 14 | 3 | 15 | 1 | 8 | 3 | 2 | 0 | 6 | 1 | 17 | 2 | 10
-INPUTP | 12 | 21 | 105 | 15 | 109 | 114 | 147 | 117 | 123 | 155 | 153 | 98 | 136
-EXPORTS | 1 | 0 | 6
-EQ | 12 | 
-   nBERR_FSB = nAS_FSB
-	# !BERR_IOBS & !TimeoutB & !fsb/BERR0r & !fsb/BERR1r
-	# !A_FSB<23> & A_FSB<22> & !A_FSB<21> & A_FSB<20> & 
-	!BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r;
-    nBERR_FSB_OBUF.EXP  =  A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & !iobs/IOReady & 
-	!nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & !iobs/IOReady & 
-	!nADoutLE1
-
-MACROCELL | 0 | 10 | nOE_OBUF
-ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 0 | 11
-INPUTS | 21 | nWE_FSB  | nAS_FSB  | fsb/ASrf  | A_FSB<8>  | A_FSB<15>  | A_FSB<14>  | A_FSB<13>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | TimeoutA  | fsb/Ready2r
-INPUTMC | 4 | 2 | 6 | 3 | 2 | 1 | 15 | 0 | 11
-INPUTP | 17 | 98 | 21 | 103 | 134 | 147 | 136 | 146 | 140 | 143 | 105 | 15 | 109 | 114 | 117 | 123 | 155 | 153
-EXPORTS | 1 | 0 | 11
-EQ | 14 | 
-   !nOE = nWE_FSB & !nAS_FSB;
-    nOE_OBUF.EXP  =  nAS_FSB & !fsb/ASrf
-	# A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
-	# A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
-	# A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
-
-MACROCELL | 5 | 11 | nROMWE_OBUF
-ATTRIBUTES | 264962 | 0
-INPUTS | 2 | nWE_FSB  | nAS_FSB
-INPUTP | 2 | 98 | 21
-EQ | 1 | 
-   !nROMWE = !nWE_FSB & !nAS_FSB;
-
-MACROCELL | 5 | 14 | nVPA_FSB_OBUF
-ATTRIBUTES | 264962 | 0
-INPUTS | 2 | fsb/VPA  | nAS_FSB
-INPUTMC | 1 | 0 | 14
-INPUTP | 1 | 21
-EQ | 1 | 
-   !nVPA_FSB = fsb/VPA & !nAS_FSB;
-
-MACROCELL | 7 | 8 | nADoutLE0_OBUF
-ATTRIBUTES | 264962 | 0
-INPUTS | 2 | ALE0M  | ALE0S
-INPUTMC | 2 | 4 | 12 | 2 | 7
-EQ | 1 | 
-   nADoutLE0 = !ALE0M & !ALE0S;
-
-MACROCELL | 3 | 16 | nDinOE_OBUF
-ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 3 | 17
-INPUTS | 14 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | cs/nOverlay1  | ram/Once  | nAS_FSB  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | fsb/ASrf  | cnt/RefDone  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | fsb/BERR0r.EXP
-INPUTMC | 10 | 3 | 2 | 6 | 9 | 6 | 12 | 6 | 7 | 2 | 6 | 1 | 9 | 6 | 0 | 6 | 15 | 6 | 13 | 3 | 15
-INPUTP | 4 | 105 | 15 | 109 | 21
-EXPORTS | 1 | 3 | 17
-IMPORTS | 1 | 3 | 15
-EQ | 19 | 
-   nDinOE = ;Imported pterms FB4_16
-	  A_FSB<23> & nWE_FSB & !nAS_FSB
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & nWE_FSB & 
-	!nAS_FSB;
-    nDinOE_OBUF.EXP  =  !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !nAS_FSB & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
-	fsb/ASrf
-	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
-	cnt/RefCnt<7>
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
-	cnt/RefCnt<7>
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
-	cnt/RefCnt<7>
-
-MACROCELL | 2 | 4 | nRAS_OBUF
-ATTRIBUTES | 264962 | 0
-INPUTS | 8 | RefAck  | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | ram/RAMDIS2  | nAS_FSB  | ram/RAMDIS1  | A_FSB<21>
-INPUTMC | 4 | 5 | 4 | 3 | 2 | 6 | 10 | 3 | 13
-INPUTP | 4 | 105 | 15 | 21 | 109
-EQ | 5 | 
-   !nRAS = RefAck
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
-	!ram/RAMDIS2 & !nAS_FSB & !ram/RAMDIS1
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/RAMDIS2 & !nAS_FSB & !ram/RAMDIS1;
-
-MACROCELL | 7 | 1 | A_FSB_19_IBUF$BUF0
-ATTRIBUTES | 264962 | 0
-INPUTS | 1 | A_FSB<19>
-INPUTP | 1 | 117
-EQ | 1 | 
-   RA<11> = A_FSB<19>;
-
-MACROCELL | 7 | 5 | A_FSB_21_IBUF$BUF0
-ATTRIBUTES | 264962 | 0
-INPUTS | 1 | A_FSB<21>
-INPUTP | 1 | 109
-EQ | 1 | 
-   RA<10> = A_FSB<21>;
-
-MACROCELL | 2 | 10 | nADoutLE1_OBUF
-ATTRIBUTES | 8815366 | 0
-OUTPUTMC | 22 | 3 | 8 | 4 | 14 | 2 | 2 | 5 | 15 | 5 | 13 | 0 | 5 | 2 | 16 | 1 | 17 | 0 | 2 | 2 | 8 | 3 | 5 | 2 | 12 | 2 | 5 | 2 | 10 | 0 | 4 | 2 | 0 | 2 | 1 | 2 | 3 | 2 | 7 | 2 | 9 | 2 | 11 | 2 | 13
-INPUTS | 6 | iobs/Clear1  | nADoutLE1  | iobs/Load1  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | iobs/IOACTr
-INPUTMC | 6 | 2 | 5 | 2 | 10 | 3 | 5 | 2 | 8 | 2 | 11 | 2 | 3
-EXPORTS | 1 | 2 | 11
-EQ | 5 | 
-   !nADoutLE1.D = iobs/Load1
-	# !iobs/Clear1 & !nADoutLE1;
-   nADoutLE1.CLK = CLK_FSB;	// GCK
-    nADoutLE1_OBUF.EXP  =  iobs/PS_FSM_FFd2
-	# iobs/PS_FSM_FFd1 & iobs/IOACTr
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 5 | 5 | nRAMLWE_OBUF
-ATTRIBUTES | 264962 | 0
-INPUTS | 5 | nWE_FSB  | nLDS_FSB  | ram/RAMDIS2  | nAS_FSB  | ram/RAMDIS1
-INPUTMC | 2 | 6 | 10 | 3 | 13
-INPUTP | 3 | 98 | 37 | 21
-EQ | 2 | 
-   !nRAMLWE = !nWE_FSB & !nLDS_FSB & !ram/RAMDIS2 & !nAS_FSB & 
-	!ram/RAMDIS1;
-
-MACROCELL | 5 | 8 | nRAMUWE_OBUF
-ATTRIBUTES | 264962 | 0
-INPUTS | 5 | nWE_FSB  | nUDS_FSB  | ram/RAMDIS2  | nAS_FSB  | ram/RAMDIS1
-INPUTMC | 2 | 6 | 10 | 3 | 13
-INPUTP | 3 | 98 | 82 | 21
-EQ | 2 | 
-   !nRAMUWE = !nWE_FSB & !nUDS_FSB & !ram/RAMDIS2 & !nAS_FSB & 
-	!ram/RAMDIS1;
-
-MACROCELL | 4 | 11 | nROMCS_OBUF
-ATTRIBUTES | 264962 | 0
-INPUTS | 5 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | cs/nOverlay1
-INPUTMC | 1 | 3 | 2
-INPUTP | 4 | 105 | 15 | 109 | 114
-EQ | 3 | 
-   !nROMCS = !A_FSB<23> & A_FSB<22> & !A_FSB<21> & !A_FSB<20>
-	# !A_FSB<23> & !A_FSB<21> & !A_FSB<20> & 
-	!cs/nOverlay1;
-
-MACROCELL | 7 | 11 | nAoutOE_OBUF
-ATTRIBUTES | 264962 | 0
-INPUTS | 0
-EQ | 1 | 
-   nAoutOE = Gnd;
-
-MACROCELL | 0 | 9 | fsb/VPA__or00001/fsb/VPA__or00001_D2
-ATTRIBUTES | 133888 | 0
-OUTPUTMC | 4 | 0 | 14 | 0 | 12 | 0 | 13 | 0 | 16
-INPUTS | 21 | A_FSB<8>  | A_FSB<15>  | A_FSB<14>  | A_FSB<13>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | nWE_FSB  | TimeoutA  | fsb/Ready2r  | A_FSB<9>  | EXP17_.EXP
-INPUTMC | 4 | 3 | 2 | 1 | 15 | 0 | 11 | 0 | 8
-INPUTP | 17 | 103 | 134 | 147 | 136 | 146 | 140 | 143 | 105 | 15 | 109 | 114 | 117 | 123 | 155 | 153 | 98 | 19
-IMPORTS | 1 | 0 | 8
-EQ | 33 | 
-   fsb/VPA__or00001/fsb/VPA__or00001_D2 = A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
-	# A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
-	# A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
-	# A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
-	# A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
-;Imported pterms FB1_9
-	# A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
-	# A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
-	# A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r;
-
-MACROCELL | 0 | 16 | $OpTx$FX_DC$602
-ATTRIBUTES | 133888 | 0
-OUTPUTMC | 7 | 0 | 14 | 0 | 1 | 0 | 3 | 0 | 12 | 0 | 13 | 0 | 16 | 0 | 15
-INPUTS | 25 | TimeoutB  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<9>  | A_FSB<8>  | A_FSB<15>  | A_FSB<14>  | A_FSB<13>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | BERR_IOBS  | fsb/BERR0r  | fsb/BERR1r  | iobs/IOReady  | fsb/ASrf  | fsb/VPA__or00001/fsb/VPA__or00001_D2  | $OpTx$FX_DC$602  | $OpTx$FX_DC$606
-INPUTMC | 9 | 1 | 14 | 4 | 14 | 3 | 15 | 1 | 8 | 1 | 17 | 2 | 6 | 0 | 9 | 0 | 16 | 0 | 3
-INPUTP | 16 | 105 | 15 | 109 | 114 | 19 | 103 | 134 | 147 | 136 | 146 | 140 | 143 | 117 | 123 | 155 | 153
-EXPORTS | 1 | 0 | 15
-EQ | 14 | 
-   $OpTx$FX_DC$602 = !TimeoutB
-	# !A_FSB<23> & A_FSB<22> & !A_FSB<21> & A_FSB<20>;
-    $OpTx$FX_DC$602.EXP  =  A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	iobs/IOReady & fsb/ASrf & !fsb/VPA__or00001/fsb/VPA__or00001_D2 & 
-	$OpTx$FX_DC$602
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	fsb/ASrf & !fsb/VPA__or00001/fsb/VPA__or00001_D2 & 
-	$OpTx$FX_DC$602 & !$OpTx$FX_DC$606
-
-MACROCELL | 0 | 3 | $OpTx$FX_DC$606
-ATTRIBUTES | 133888 | 0
-OUTPUTMC | 4 | 0 | 12 | 0 | 15 | 0 | 16 | 0 | 2
-INPUTS | 28 | A_FSB<9>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<13>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | nWE_FSB  | A_FSB<15>  | A_FSB<14>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<23>  | TimeoutA  | fsb/Ready2r  | nDTACK_FSB  | A_FSB<8>  | BERR_IOBS  | fsb/BERR0r  | fsb/BERR1r  | fsb/Ready1r  | $OpTx$FX_DC$602  | iobs/IOReady  | EXP16_.EXP
-INPUTMC | 11 | 3 | 2 | 1 | 15 | 0 | 11 | 0 | 1 | 4 | 14 | 3 | 15 | 1 | 8 | 0 | 6 | 0 | 16 | 1 | 17 | 0 | 4
-INPUTP | 17 | 19 | 15 | 109 | 114 | 136 | 117 | 123 | 155 | 153 | 98 | 134 | 147 | 146 | 140 | 143 | 105 | 103
-EXPORTS | 1 | 0 | 2
-IMPORTS | 1 | 0 | 4
-EQ | 27 | 
-   $OpTx$FX_DC$606 = A_FSB<22> & !A_FSB<21> & A_FSB<20>
-	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB
-;Imported pterms FB1_5
-	# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB
-	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !nWE_FSB & !nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !nWE_FSB & !nADoutLE1;
-    $OpTx$FX_DC$606.EXP  =  A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	nDTACK_FSB
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	fsb/Ready1r & $OpTx$FX_DC$602
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	iobs/IOReady & $OpTx$FX_DC$602
-
-MACROCELL | 0 | 0 | EXP14_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 0 | 1
-INPUTS | 17 | A_FSB<23>  | fsb/Ready1r  | iobs/IOReady  | nDTACK_FSB  | A_FSB<22>  | cs/nOverlay1  | fsb/Ready0r  | ram/RAMReady  | A_FSB<21>  | A_FSB<20>  | A_FSB<14>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | nWE_FSB  | EXP21_.EXP
-INPUTMC | 7 | 0 | 6 | 1 | 17 | 0 | 1 | 3 | 2 | 6 | 6 | 6 | 16 | 0 | 17
-INPUTP | 10 | 105 | 15 | 109 | 114 | 147 | 117 | 123 | 155 | 153 | 98
-EXPORTS | 1 | 0 | 1
-IMPORTS | 1 | 0 | 17
-EQ | 37 | 
-       EXP14_.EXP  =  A_FSB<23> & !fsb/Ready1r & !iobs/IOReady & 
-	nDTACK_FSB
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
-	!fsb/Ready0r & nDTACK_FSB & !ram/RAMReady
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r & 
-	!iobs/IOReady & nDTACK_FSB
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !fsb/Ready0r & nDTACK_FSB & !ram/RAMReady
-	# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & 
-	!fsb/Ready1r & !iobs/IOReady & nDTACK_FSB
-;Imported pterms FB1_18
-	# A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	nDTACK_FSB
-	# A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	nDTACK_FSB
-	# A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	nDTACK_FSB
-	# A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	nDTACK_FSB
-	# A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	nDTACK_FSB
-
-MACROCELL | 0 | 2 | EXP15_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 0 | 1
-INPUTS | 25 | A_FSB<13>  | A_FSB<22>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | nWE_FSB  | fsb/Ready1r  | iobs/IOReady  | nDTACK_FSB  | A_FSB<14>  | A_FSB<21>  | nADoutLE1  | A_FSB<9>  | A_FSB<15>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<23>  | TimeoutA  | fsb/Ready2r  | A_FSB<8>  | $OpTx$FX_DC$606.EXP
-INPUTMC | 8 | 3 | 2 | 0 | 6 | 1 | 17 | 0 | 1 | 2 | 10 | 1 | 15 | 0 | 11 | 0 | 3
-INPUTP | 17 | 136 | 15 | 114 | 117 | 123 | 155 | 153 | 98 | 147 | 109 | 19 | 134 | 146 | 140 | 143 | 105 | 103
-EXPORTS | 1 | 0 | 1
-IMPORTS | 1 | 0 | 3
-EQ | 37 | 
-       EXP15_.EXP  =  A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & 
-	!fsb/Ready1r & !iobs/IOReady & nDTACK_FSB
-	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & !iobs/IOReady & 
-	nDTACK_FSB & !nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & !iobs/IOReady & 
-	nDTACK_FSB & !nADoutLE1
-	# A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	nDTACK_FSB
-	# A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	nDTACK_FSB
-;Imported pterms FB1_4
-	# A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	nDTACK_FSB
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	fsb/Ready1r & $OpTx$FX_DC$602
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	iobs/IOReady & $OpTx$FX_DC$602
-
-MACROCELL | 0 | 4 | EXP16_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 0 | 3
-INPUTS | 12 | A_FSB<14>  | A_FSB<22>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | nWE_FSB  | A_FSB<21>  | nADoutLE1  | A_FSB<13>
-INPUTMC | 2 | 3 | 2 | 2 | 10
-INPUTP | 10 | 147 | 15 | 114 | 117 | 123 | 155 | 153 | 98 | 109 | 136
-EXPORTS | 1 | 0 | 3
-EQ | 8 | 
-       EXP16_.EXP  =  A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB
-	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !nWE_FSB & !nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !nWE_FSB & !nADoutLE1
-
-MACROCELL | 0 | 8 | EXP17_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 0 | 9
-INPUTS | 20 | A_FSB<9>  | A_FSB<15>  | A_FSB<14>  | A_FSB<13>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | nWE_FSB  | TimeoutA  | fsb/Ready2r  | A_FSB<8>
-INPUTMC | 3 | 3 | 2 | 1 | 15 | 0 | 11
-INPUTP | 17 | 19 | 134 | 147 | 136 | 146 | 140 | 143 | 105 | 15 | 109 | 114 | 117 | 123 | 155 | 153 | 98 | 103
-EXPORTS | 1 | 0 | 9
-EQ | 12 | 
-       EXP17_.EXP  =  A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
-	# A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
-	# A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
-
-MACROCELL | 0 | 12 | EXP18_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 0 | 13
-INPUTS | 30 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | cs/nOverlay1  | fsb/Ready0r  | fsb/VPA  | fsb/ASrf  | ram/RAMReady  | A_FSB<9>  | A_FSB<8>  | A_FSB<15>  | A_FSB<14>  | A_FSB<13>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | BERR_IOBS  | fsb/BERR0r  | fsb/BERR1r  | fsb/Ready1r  | nAS_FSB  | fsb/VPA__or00001/fsb/VPA__or00001_D2  | $OpTx$FX_DC$602  | iobs/IOReady  | $OpTx$FX_DC$606
-INPUTMC | 13 | 3 | 2 | 6 | 6 | 0 | 14 | 2 | 6 | 6 | 16 | 4 | 14 | 3 | 15 | 1 | 8 | 0 | 6 | 0 | 9 | 0 | 16 | 1 | 17 | 0 | 3
-INPUTP | 17 | 105 | 15 | 109 | 19 | 103 | 134 | 147 | 136 | 146 | 140 | 143 | 114 | 117 | 123 | 155 | 153 | 21
-EXPORTS | 1 | 0 | 13
-EQ | 26 | 
-       EXP18_.EXP  =  !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !fsb/Ready0r & fsb/VPA & fsb/ASrf & !ram/RAMReady
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	fsb/Ready1r & !nAS_FSB & !fsb/VPA__or00001/fsb/VPA__or00001_D2 & 
-	$OpTx$FX_DC$602
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	fsb/Ready1r & fsb/ASrf & !fsb/VPA__or00001/fsb/VPA__or00001_D2 & 
-	$OpTx$FX_DC$602
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	iobs/IOReady & !nAS_FSB & !fsb/VPA__or00001/fsb/VPA__or00001_D2 & 
-	$OpTx$FX_DC$602
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	!nAS_FSB & !fsb/VPA__or00001/fsb/VPA__or00001_D2 & 
-	$OpTx$FX_DC$602 & !$OpTx$FX_DC$606
-
-MACROCELL | 0 | 13 | EXP19_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 0 | 14
-INPUTS | 8 | BERR_IOBS  | fsb/VPA  | fsb/ASrf  | fsb/BERR0r  | fsb/BERR1r  | fsb/VPA__or00001/fsb/VPA__or00001_D2  | $OpTx$FX_DC$602  | EXP18_.EXP
-INPUTMC | 8 | 4 | 14 | 0 | 14 | 2 | 6 | 3 | 15 | 1 | 8 | 0 | 9 | 0 | 16 | 0 | 12
-EXPORTS | 1 | 0 | 14
-IMPORTS | 1 | 0 | 12
-EQ | 33 | 
-       EXP19_.EXP  =  BERR_IOBS & fsb/VPA & fsb/ASrf
-	# fsb/BERR0r & fsb/VPA & fsb/ASrf
-	# fsb/BERR1r & fsb/VPA & fsb/ASrf
-	# fsb/VPA & fsb/ASrf & 
-	fsb/VPA__or00001/fsb/VPA__or00001_D2
-	# fsb/VPA & fsb/ASrf & !$OpTx$FX_DC$602
-;Imported pterms FB1_13
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !fsb/Ready0r & fsb/VPA & fsb/ASrf & !ram/RAMReady
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	fsb/Ready1r & !nAS_FSB & !fsb/VPA__or00001/fsb/VPA__or00001_D2 & 
-	$OpTx$FX_DC$602
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	fsb/Ready1r & fsb/ASrf & !fsb/VPA__or00001/fsb/VPA__or00001_D2 & 
-	$OpTx$FX_DC$602
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	iobs/IOReady & !nAS_FSB & !fsb/VPA__or00001/fsb/VPA__or00001_D2 & 
-	$OpTx$FX_DC$602
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	!nAS_FSB & !fsb/VPA__or00001/fsb/VPA__or00001_D2 & 
-	$OpTx$FX_DC$602 & !$OpTx$FX_DC$606
-
-MACROCELL | 0 | 15 | EXP20_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 0 | 14
-INPUTS | 13 | fsb/Ready1r  | fsb/VPA  | iobs/IOReady  | nAS_FSB  | $OpTx$FX_DC$606  | fsb/ASrf  | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | fsb/Ready0r  | ram/RAMReady  | A_FSB<21>  | $OpTx$FX_DC$602.EXP
-INPUTMC | 9 | 0 | 6 | 0 | 14 | 1 | 17 | 0 | 3 | 2 | 6 | 3 | 2 | 6 | 6 | 6 | 16 | 0 | 16
-INPUTP | 4 | 21 | 105 | 15 | 109
-EXPORTS | 1 | 0 | 14
-IMPORTS | 1 | 0 | 16
-EQ | 23 | 
-       EXP20_.EXP  =  !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB & 
-	$OpTx$FX_DC$606
-	# !fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf & 
-	$OpTx$FX_DC$606
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
-	!fsb/Ready0r & fsb/VPA & !nAS_FSB & !ram/RAMReady
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
-	!fsb/Ready0r & fsb/VPA & fsb/ASrf & !ram/RAMReady
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !fsb/Ready0r & fsb/VPA & !nAS_FSB & !ram/RAMReady
-;Imported pterms FB1_17
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	iobs/IOReady & fsb/ASrf & !fsb/VPA__or00001/fsb/VPA__or00001_D2 & 
-	$OpTx$FX_DC$602
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	fsb/ASrf & !fsb/VPA__or00001/fsb/VPA__or00001_D2 & 
-	$OpTx$FX_DC$602 & !$OpTx$FX_DC$606
-
-MACROCELL | 0 | 17 | EXP21_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 0 | 0
-INPUTS | 21 | A_FSB<9>  | A_FSB<15>  | A_FSB<14>  | A_FSB<13>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | nWE_FSB  | TimeoutA  | fsb/Ready2r  | nDTACK_FSB  | A_FSB<8>
-INPUTMC | 4 | 3 | 2 | 1 | 15 | 0 | 11 | 0 | 1
-INPUTP | 17 | 19 | 134 | 147 | 136 | 146 | 140 | 143 | 105 | 15 | 109 | 114 | 117 | 123 | 155 | 153 | 98 | 103
-EXPORTS | 1 | 0 | 0
-EQ | 25 | 
-       EXP21_.EXP  =  A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	nDTACK_FSB
-	# A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	nDTACK_FSB
-	# A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	nDTACK_FSB
-	# A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	nDTACK_FSB
-	# A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	nDTACK_FSB
-
-MACROCELL | 2 | 0 | EXP22_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 2 | 1
-INPUTS | 18 | A_FSB<14>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | iobs/Once  | IORW0  | nWE_FSB  | nAS_FSB  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nADoutLE1  | fsb/ASrf  | A_FSB<13>
-INPUTMC | 7 | 3 | 2 | 3 | 9 | 2 | 2 | 2 | 8 | 2 | 11 | 2 | 10 | 2 | 6
-INPUTP | 11 | 147 | 15 | 109 | 114 | 117 | 123 | 155 | 153 | 98 | 21 | 136
-EXPORTS | 1 | 2 | 1
-EQ | 16 | 
-       EXP22_.EXP  =  A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !iobs/Once & IORW0 & !nWE_FSB & !nAS_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !iobs/Once & IORW0 & !nWE_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !iobs/Once & IORW0 & !nWE_FSB & !nAS_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !iobs/Once & IORW0 & !nWE_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-
-MACROCELL | 2 | 1 | EXP23_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 2 | 2
-INPUTS | 13 | A_FSB<23>  | iobs/Once  | IORW0  | nWE_FSB  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | fsb/ASrf  | nADoutLE1  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | nAS_FSB  | EXP22_.EXP
-INPUTMC | 7 | 3 | 9 | 2 | 2 | 2 | 8 | 2 | 11 | 2 | 6 | 2 | 10 | 2 | 0
-INPUTP | 6 | 105 | 98 | 15 | 109 | 114 | 21
-EXPORTS | 1 | 2 | 2
-IMPORTS | 1 | 2 | 0
-EQ | 31 | 
-       EXP23_.EXP  =  A_FSB<23> & !iobs/Once & !IORW0 & nWE_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !iobs/Once & 
-	IORW0 & !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !iobs/Once & 
-	IORW0 & !nWE_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
-	fsb/ASrf & nADoutLE1
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !iobs/Once & 
-	!IORW0 & nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !iobs/Once & 
-	!IORW0 & nWE_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
-	fsb/ASrf & nADoutLE1
-;Imported pterms FB3_1
-	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !iobs/Once & IORW0 & !nWE_FSB & !nAS_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !iobs/Once & IORW0 & !nWE_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !iobs/Once & IORW0 & !nWE_FSB & !nAS_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !iobs/Once & IORW0 & !nWE_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-
-MACROCELL | 2 | 9 | EXP24_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 2 | 8
-INPUTS | 12 | A_FSB<23>  | A_FSB<21>  | A_FSB<18>  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nADoutLE1  | A_FSB<17>  | A_FSB<16>  | A_FSB<14>  | A_FSB<13>  | A_FSB<22>  | cs/nOverlay1
-INPUTMC | 4 | 2 | 8 | 2 | 11 | 2 | 10 | 3 | 2
-INPUTP | 8 | 105 | 109 | 123 | 155 | 153 | 147 | 136 | 15
-EXPORTS | 1 | 2 | 8
-EQ | 10 | 
-       EXP24_.EXP  =  !A_FSB<23> & A_FSB<21> & !A_FSB<18> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<17> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<16> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-
-MACROCELL | 2 | 15 | EXP25_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 2 | 16
-INPUTS | 11 | nWE_FSB  | iobs/IORW1  | nAS_FSB  | fsb/ASrf  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | cs/nOverlay1  | nVMA_IOB_OBUF.EXP
-INPUTMC | 6 | 2 | 16 | 2 | 6 | 2 | 8 | 2 | 11 | 3 | 2 | 2 | 14
-INPUTP | 5 | 98 | 21 | 105 | 15 | 109
-EXPORTS | 1 | 2 | 16
-IMPORTS | 1 | 2 | 14
-EQ | 9 | 
-       EXP25_.EXP  =  !nWE_FSB & !iobs/IORW1
-	# nAS_FSB & !fsb/ASrf
-	# !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
-	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21>
-	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1
-;Imported pterms FB3_15
-	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21>
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1
-
-MACROCELL | 3 | 4 | EXP26_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 3 | 5
-INPUTS | 6 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | cs/nOverlay1  | A_FSB<19>  | nWE_FSB
-INPUTMC | 1 | 3 | 2
-INPUTP | 5 | 105 | 15 | 109 | 117 | 98
-EXPORTS | 1 | 3 | 5
-EQ | 4 | 
-       EXP26_.EXP  =  !A_FSB<23> & !A_FSB<22> & !A_FSB<21>
-	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<19>
-	# !A_FSB<23> & A_FSB<21> & nWE_FSB
-
-MACROCELL | 3 | 6 | EXP27_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 3 | 5
-INPUTS | 9 | A_FSB<23>  | A_FSB<21>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | A_FSB<14>  | A_FSB<13>  | A_FSB<22>  | cs/nOverlay1
-INPUTMC | 1 | 3 | 2
-INPUTP | 8 | 105 | 109 | 123 | 155 | 153 | 147 | 136 | 15
-EXPORTS | 1 | 3 | 5
-EQ | 6 | 
-       EXP27_.EXP  =  !A_FSB<23> & A_FSB<21> & !A_FSB<18>
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<17>
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<16>
-	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21>
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1
-
-MACROCELL | 3 | 8 | EXP28_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 3 | 9
-INPUTS | 9 | A_FSB<23>  | iobs/Once  | iobs/PS_FSM_FFd1  | iobs/PS_FSM_FFd2  | nADoutLE1  | A_FSB<22>  | A_FSB<21>  | cs/nOverlay1  | RA_2_OBUF.EXP
-INPUTMC | 6 | 3 | 9 | 2 | 11 | 2 | 8 | 2 | 10 | 3 | 2 | 3 | 7
-INPUTP | 3 | 105 | 15 | 109
-EXPORTS | 1 | 3 | 9
-IMPORTS | 1 | 3 | 7
-EQ | 11 | 
-       EXP28_.EXP  =  A_FSB<23> & !iobs/Once & iobs/PS_FSM_FFd1
-	# !iobs/Once & iobs/PS_FSM_FFd2 & !nADoutLE1
-	# !iobs/Once & iobs/PS_FSM_FFd1 & !nADoutLE1
-	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & !iobs/Once
-	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 & 
-	!iobs/Once
-;Imported pterms FB4_8
-	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & 
-	!iobs/Once
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1 & !iobs/Once
-
-MACROCELL | 3 | 10 | EXP29_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 3 | 9
-INPUTS | 8 | A_FSB<23>  | A_FSB<21>  | A_FSB<19>  | iobs/Once  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | nWE_FSB
-INPUTMC | 1 | 3 | 9
-INPUTP | 7 | 105 | 109 | 117 | 123 | 155 | 153 | 98
-EXPORTS | 1 | 3 | 9
-EQ | 5 | 
-       EXP29_.EXP  =  !A_FSB<23> & A_FSB<21> & !A_FSB<19> & !iobs/Once
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<18> & !iobs/Once
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<17> & !iobs/Once
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<16> & !iobs/Once
-	# !A_FSB<23> & A_FSB<21> & !iobs/Once & nWE_FSB
-
-MACROCELL | 3 | 12 | EXP30_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 3 | 13
-INPUTS | 9 | A_FSB<22>  | A_FSB<21>  | cnt/RefDone  | nAS_FSB  | ram/RS_FSM_FFd1  | ram/BACTr  | fsb/ASrf  | cs/nOverlay1  | RA_4_OBUF.EXP
-INPUTMC | 6 | 1 | 9 | 6 | 7 | 2 | 17 | 2 | 6 | 3 | 2 | 3 | 11
-INPUTP | 3 | 15 | 109 | 21
-EXPORTS | 1 | 3 | 13
-IMPORTS | 1 | 3 | 11
-EQ | 17 | 
-       EXP30_.EXP  =  A_FSB<22> & !A_FSB<21> & !cnt/RefDone & !nAS_FSB & 
-	!ram/RS_FSM_FFd1 & !ram/BACTr
-	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
-	!nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
-	!nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr
-;Imported pterms FB4_12
-	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-
-MACROCELL | 3 | 14 | EXP31_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 3 | 13
-INPUTS | 14 | A_FSB<23>  | cnt/RefDone  | ram/RS_FSM_FFd1  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | A_FSB<22>  | cs/nOverlay1  | ram/BACTr  | fsb/ASrf  | ram/Once  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd3  | nAS_FSB
-INPUTMC | 11 | 1 | 9 | 6 | 7 | 6 | 0 | 6 | 15 | 6 | 13 | 3 | 2 | 2 | 17 | 2 | 6 | 6 | 9 | 6 | 12 | 6 | 4
-INPUTP | 3 | 105 | 15 | 21
-EXPORTS | 1 | 3 | 13
-EQ | 10 | 
-       EXP31_.EXP  =  A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 & 
-	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# ram/Once & !cnt/RefDone & !ram/RS_FSM_FFd1 & 
-	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-	# !cnt/RefDone & ram/RS_FSM_FFd2 & ram/RS_FSM_FFd3 & 
-	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-	# !cnt/RefDone & nAS_FSB & !ram/RS_FSM_FFd1 & 
-	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & !fsb/ASrf
-
-MACROCELL | 3 | 17 | EXP32_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 3 | 0
-INPUTS | 12 | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | ram/Once  | nAS_FSB  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | fsb/ASrf  | A_FSB<21>  | cnt/RefDone  | ram/BACTr  | nDinOE_OBUF.EXP
-INPUTMC | 8 | 3 | 2 | 6 | 9 | 6 | 12 | 6 | 7 | 2 | 6 | 1 | 9 | 2 | 17 | 3 | 16
-INPUTP | 4 | 105 | 15 | 21 | 109
-EXPORTS | 1 | 3 | 0
-IMPORTS | 1 | 3 | 16
-EQ | 26 | 
-       EXP32_.EXP  =  !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !ram/Once & 
-	!nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !ram/Once & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & fsb/ASrf
-	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & !nAS_FSB & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr
-	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
-	!nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr
-;Imported pterms FB4_17
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !nAS_FSB & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
-	fsb/ASrf
-	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
-	cnt/RefCnt<7>
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
-	cnt/RefCnt<7>
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
-	cnt/RefCnt<7>
-
-MACROCELL | 4 | 16 | EXP33_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 4 | 17
-INPUTS | 10 | nBERR_IOB  | IOBERR  | iobm/IOS_FSM_FFd3  | CLK_IOB  | iobm/DTACKrf  | iobm/DTACKrr  | iobm/RESrf  | iobm/RESrr  | iobm/BERRrf  | iobm/BERRrr
-INPUTMC | 8 | 4 | 17 | 4 | 15 | 5 | 3 | 5 | 2 | 1 | 3 | 1 | 2 | 4 | 8 | 4 | 6
-INPUTP | 2 | 28 | 42
-EXPORTS | 1 | 4 | 17
-EQ | 10 | 
-       EXP33_.EXP  =  nBERR_IOB & IOBERR & iobm/IOS_FSM_FFd3 & 
-	CLK_IOB & iobm/DTACKrf & iobm/DTACKrr
-	# nBERR_IOB & IOBERR & iobm/IOS_FSM_FFd3 & 
-	CLK_IOB & iobm/RESrf & iobm/RESrr
-	# !nBERR_IOB & !IOBERR & iobm/IOS_FSM_FFd3 & 
-	CLK_IOB & iobm/BERRrf & iobm/BERRrr
-	# !nBERR_IOB & !IOBERR & iobm/IOS_FSM_FFd3 & 
-	CLK_IOB & iobm/DTACKrf & iobm/DTACKrr
-	# !nBERR_IOB & !IOBERR & iobm/IOS_FSM_FFd3 & 
-	CLK_IOB & iobm/RESrf & iobm/RESrr
-
-MACROCELL | 6 | 17 | EXP34_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 6 | 16
-INPUTS | 9 | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd3  | ram/RS_FSM_FFd1  | A_FSB<23>  | cnt/RefDone  | nAS_FSB  | ram/BACTr  | fsb/ASrf  | cnt/RefCnt<5>.EXP
-INPUTMC | 7 | 6 | 12 | 6 | 4 | 6 | 7 | 1 | 9 | 2 | 17 | 2 | 6 | 6 | 0
-INPUTP | 2 | 105 | 21
-EXPORTS | 1 | 6 | 16
-IMPORTS | 1 | 6 | 0
-EQ | 10 | 
-       EXP34_.EXP  =  ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3
-	# !ram/RS_FSM_FFd2 & ram/RS_FSM_FFd1
-	# !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3
-	# A_FSB<23> & !cnt/RefDone & !nAS_FSB & 
-	!ram/RS_FSM_FFd1 & !ram/BACTr
-	# A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 & 
-	!ram/BACTr & fsb/ASrf
-;Imported pterms FB7_1
-	# !cnt/RefDone & cnt/RefCnt<5> & cnt/RefCnt<6> & 
-	cnt/RefCnt<7>
-
-PIN | A_FSB<9> | 64 | 0 | N/A | 19 | 9 | 0 | 11 | 0 | 12 | 0 | 9 | 6 | 10 | 0 | 2 | 0 | 3 | 0 | 8 | 0 | 16 | 0 | 17
-PIN | A_FSB<8> | 64 | 0 | N/A | 103 | 10 | 0 | 11 | 0 | 12 | 0 | 9 | 6 | 8 | 0 | 2 | 0 | 3 | 0 | 8 | 0 | 10 | 0 | 16 | 0 | 17
-PIN | A_FSB<15> | 64 | 0 | N/A | 134 | 10 | 0 | 11 | 0 | 12 | 0 | 9 | 6 | 1 | 0 | 2 | 0 | 3 | 0 | 8 | 0 | 10 | 0 | 16 | 0 | 17
-PIN | A_FSB<14> | 64 | 0 | N/A | 147 | 21 | 3 | 7 | 2 | 0 | 0 | 6 | 0 | 11 | 0 | 12 | 2 | 14 | 0 | 0 | 2 | 3 | 2 | 13 | 2 | 9 | 3 | 11 | 0 | 9 | 0 | 2 | 0 | 3 | 0 | 4 | 0 | 5 | 0 | 8 | 0 | 10 | 0 | 16 | 0 | 17 | 3 | 6
-PIN | A_FSB<13> | 64 | 0 | N/A | 136 | 20 | 3 | 7 | 2 | 0 | 0 | 6 | 0 | 11 | 0 | 12 | 2 | 14 | 0 | 3 | 2 | 3 | 2 | 13 | 2 | 9 | 4 | 7 | 0 | 9 | 0 | 2 | 0 | 4 | 0 | 5 | 0 | 8 | 0 | 10 | 0 | 16 | 0 | 17 | 3 | 6
-PIN | A_FSB<12> | 64 | 0 | N/A | 146 | 10 | 0 | 11 | 0 | 12 | 0 | 9 | 3 | 7 | 0 | 2 | 0 | 3 | 0 | 8 | 0 | 10 | 0 | 16 | 0 | 17
-PIN | A_FSB<11> | 64 | 0 | N/A | 140 | 10 | 0 | 11 | 0 | 12 | 0 | 9 | 4 | 1 | 0 | 2 | 0 | 3 | 0 | 8 | 0 | 10 | 0 | 16 | 0 | 17
-PIN | A_FSB<10> | 64 | 0 | N/A | 143 | 10 | 0 | 11 | 0 | 12 | 0 | 9 | 0 | 17 | 0 | 2 | 0 | 3 | 0 | 8 | 0 | 10 | 0 | 16 | 3 | 2
-PIN | A_FSB<23> | 64 | 0 | N/A | 105 | 52 | 6 | 9 | 3 | 9 | 2 | 2 | 6 | 3 | 3 | 15 | 6 | 6 | 0 | 6 | 0 | 11 | 0 | 12 | 2 | 16 | 6 | 10 | 0 | 0 | 3 | 0 | 6 | 11 | 6 | 7 | 6 | 4 | 2 | 8 | 3 | 5 | 2 | 12 | 3 | 13 | 6 | 16 | 0 | 5 | 3 | 14 | 2 | 4 | 4 | 11 | 0 | 9 | 0 | 16 | 0 | 2 | 0 | 3 | 0 | 8 | 0 | 10 | 0 | 15 | 0 | 17 | 2 | 1 | 2 | 7 | 2 | 9 | 2 | 11 | 2 | 13 | 2 | 14 | 2 | 15 | 2 | 17 | 3 | 4 | 3 | 6 | 3 | 7 | 3 | 8 | 3 | 10 | 3 | 16 | 3 | 17 | 6 | 8 | 6 | 13 | 6 | 15 | 6 | 17
-PIN | A_FSB<22> | 64 | 0 | N/A | 15 | 48 | 6 | 9 | 3 | 9 | 2 | 1 | 6 | 3 | 3 | 15 | 6 | 6 | 0 | 6 | 0 | 11 | 0 | 12 | 2 | 15 | 6 | 10 | 0 | 0 | 2 | 14 | 6 | 11 | 6 | 7 | 3 | 17 | 2 | 7 | 3 | 4 | 2 | 11 | 3 | 12 | 6 | 16 | 0 | 5 | 3 | 14 | 2 | 4 | 4 | 11 | 0 | 9 | 0 | 16 | 0 | 3 | 0 | 2 | 0 | 4 | 0 | 8 | 0 | 10 | 0 | 15 | 0 | 17 | 2 | 0 | 2 | 3 | 2 | 9 | 2 | 13 | 3 | 1 | 3 | 6 | 3 | 7 | 3 | 8 | 3 | 11 | 3 | 16 | 6 | 5 | 6 | 8 | 6 | 13 | 6 | 15
-PIN | A_FSB<21> | 64 | 0 | N/A | 109 | 45 | 6 | 8 | 3 | 8 | 2 | 1 | 6 | 3 | 3 | 15 | 6 | 6 | 0 | 6 | 0 | 11 | 0 | 12 | 2 | 16 | 6 | 9 | 0 | 0 | 2 | 17 | 3 | 16 | 6 | 7 | 3 | 17 | 2 | 7 | 3 | 4 | 2 | 11 | 3 | 12 | 6 | 16 | 0 | 5 | 3 | 11 | 2 | 4 | 7 | 5 | 4 | 11 | 0 | 9 | 0 | 16 | 0 | 3 | 0 | 2 | 0 | 4 | 0 | 8 | 0 | 10 | 0 | 15 | 0 | 17 | 2 | 0 | 2 | 9 | 2 | 13 | 2 | 14 | 2 | 15 | 3 | 6 | 3 | 7 | 3 | 10 | 6 | 13 | 6 | 15
-PIN | A_FSB<20> | 64 | 0 | N/A | 114 | 25 | 3 | 9 | 2 | 1 | 6 | 3 | 3 | 15 | 0 | 6 | 0 | 11 | 0 | 12 | 2 | 16 | 0 | 0 | 2 | 8 | 3 | 5 | 2 | 12 | 6 | 14 | 0 | 5 | 2 | 3 | 4 | 11 | 0 | 9 | 0 | 16 | 0 | 3 | 0 | 2 | 0 | 4 | 0 | 8 | 0 | 10 | 0 | 17 | 2 | 0
-PIN | A_FSB<19> | 64 | 0 | N/A | 117 | 22 | 2 | 17 | 2 | 0 | 0 | 6 | 0 | 11 | 0 | 12 | 2 | 3 | 0 | 0 | 2 | 7 | 3 | 4 | 2 | 11 | 6 | 14 | 7 | 1 | 0 | 9 | 0 | 3 | 0 | 2 | 0 | 4 | 0 | 5 | 0 | 8 | 0 | 10 | 0 | 16 | 0 | 17 | 3 | 10
-PIN | A_FSB<18> | 64 | 0 | N/A | 123 | 21 | 3 | 6 | 2 | 0 | 0 | 6 | 0 | 11 | 0 | 12 | 2 | 13 | 0 | 0 | 2 | 3 | 2 | 17 | 2 | 9 | 6 | 11 | 0 | 9 | 0 | 3 | 0 | 2 | 0 | 4 | 0 | 5 | 0 | 8 | 0 | 10 | 0 | 16 | 0 | 17 | 3 | 10
-PIN | A_FSB<17> | 64 | 0 | N/A | 155 | 21 | 3 | 6 | 2 | 0 | 0 | 6 | 0 | 11 | 0 | 12 | 2 | 13 | 0 | 0 | 2 | 3 | 2 | 17 | 2 | 9 | 6 | 8 | 0 | 9 | 0 | 3 | 0 | 2 | 0 | 4 | 0 | 5 | 0 | 8 | 0 | 10 | 0 | 16 | 0 | 17 | 3 | 10
-PIN | A_FSB<16> | 64 | 0 | N/A | 153 | 21 | 3 | 6 | 2 | 0 | 0 | 6 | 0 | 11 | 0 | 12 | 2 | 9 | 0 | 0 | 2 | 3 | 2 | 17 | 2 | 11 | 6 | 5 | 0 | 9 | 0 | 3 | 0 | 2 | 0 | 4 | 0 | 5 | 0 | 8 | 0 | 10 | 0 | 16 | 0 | 17 | 3 | 10
-PIN | CLK2X_IOB | 4096 | 0 | N/A | 33 | 33 | 2 | 14 | 4 | 17 | 5 | 12 | 5 | 10 | 4 | 15 | 5 | 17 | 5 | 9 | 5 | 16 | 4 | 5 | 4 | 4 | 4 | 3 | 4 | 2 | 2 | 13 | 4 | 10 | 4 | 0 | 5 | 0 | 4 | 13 | 1 | 0 | 4 | 12 | 4 | 6 | 5 | 2 | 7 | 16 | 1 | 2 | 1 | 13 | 1 | 4 | 1 | 1 | 4 | 8 | 5 | 3 | 1 | 3 | 1 | 16 | 7 | 14 | 1 | 10 | 1 | 11
-PIN | CLK_FSB | 8192 | 0 | N/A | 35 | 50 | 3 | 2 | 6 | 9 | 1 | 9 | 3 | 9 | 4 | 14 | 2 | 2 | 6 | 3 | 5 | 15 | 5 | 13 | 1 | 15 | 1 | 14 | 1 | 12 | 3 | 15 | 1 | 8 | 6 | 6 | 0 | 6 | 0 | 11 | 0 | 14 | 5 | 7 | 2 | 16 | 1 | 17 | 5 | 6 | 6 | 10 | 0 | 1 | 3 | 0 | 6 | 12 | 6 | 7 | 6 | 4 | 2 | 8 | 2 | 11 | 4 | 9 | 6 | 0 | 6 | 15 | 2 | 3 | 1 | 7 | 1 | 6 | 1 | 5 | 6 | 2 | 3 | 5 | 2 | 17 | 6 | 13 | 5 | 4 | 2 | 7 | 2 | 12 | 2 | 5 | 3 | 13 | 6 | 16 | 2 | 10 | 2 | 6 | 5 | 1
-PIN | nAS_FSB | 64 | 0 | N/A | 21 | 50 | 3 | 2 | 6 | 9 | 3 | 9 | 4 | 14 | 2 | 2 | 6 | 3 | 1 | 15 | 1 | 14 | 1 | 12 | 3 | 15 | 1 | 8 | 6 | 6 | 0 | 6 | 5 | 8 | 0 | 14 | 2 | 15 | 1 | 17 | 6 | 10 | 0 | 1 | 3 | 0 | 6 | 11 | 6 | 7 | 3 | 17 | 2 | 8 | 3 | 5 | 2 | 17 | 2 | 12 | 2 | 6 | 3 | 13 | 6 | 16 | 0 | 5 | 0 | 10 | 5 | 11 | 5 | 14 | 3 | 14 | 2 | 4 | 5 | 5 | 0 | 12 | 0 | 15 | 2 | 0 | 2 | 1 | 2 | 3 | 3 | 1 | 3 | 12 | 3 | 16 | 6 | 5 | 6 | 8 | 6 | 13 | 6 | 15 | 6 | 17
-PIN | nWE_FSB | 64 | 0 | N/A | 98 | 25 | 2 | 15 | 2 | 2 | 0 | 6 | 0 | 11 | 2 | 16 | 0 | 0 | 2 | 7 | 3 | 4 | 2 | 11 | 0 | 10 | 5 | 11 | 3 | 15 | 5 | 5 | 5 | 8 | 0 | 9 | 0 | 3 | 0 | 2 | 0 | 4 | 0 | 5 | 0 | 8 | 0 | 17 | 2 | 0 | 2 | 1 | 2 | 3 | 3 | 10
-PIN | nBERR_IOB | 64 | 0 | N/A | 28 | 4 | 4 | 17 | 4 | 8 | 4 | 6 | 4 | 16
-PIN | CLK_IOB | 16448 | 0 | N/A | 42 | 9 | 4 | 17 | 4 | 15 | 4 | 2 | 4 | 10 | 4 | 0 | 4 | 13 | 4 | 1 | 4 | 16 | 7 | 17
-PIN | nRES | 65600 | 0 | N/A | 160 | 3 | 1 | 3 | 1 | 2 | 6 | 3
-PIN | nLDS_FSB | 64 | 0 | N/A | 37 | 3 | 5 | 15 | 5 | 7 | 5 | 5
-PIN | nUDS_FSB | 64 | 0 | N/A | 82 | 3 | 5 | 13 | 5 | 6 | 5 | 8
-PIN | E_IOB | 64 | 0 | N/A | 77 | 1 | 7 | 17
-PIN | nVPA_IOB | 64 | 0 | N/A | 96 | 2 | 1 | 1 | 1 | 0
-PIN | nDTACK_IOB | 64 | 0 | N/A | 88 | 2 | 5 | 3 | 5 | 2
-PIN | A_FSB<1> | 64 | 0 | N/A | 144 | 1 | 3 | 2
-PIN | A_FSB<2> | 64 | 0 | N/A | 24 | 1 | 4 | 1
-PIN | A_FSB<3> | 64 | 0 | N/A | 127 | 1 | 3 | 7
-PIN | A_FSB<4> | 64 | 0 | N/A | 92 | 1 | 4 | 7
-PIN | A_FSB<5> | 64 | 0 | N/A | 23 | 1 | 3 | 11
-PIN | A_FSB<6> | 64 | 0 | N/A | 29 | 1 | 6 | 1
-PIN | A_FSB<7> | 64 | 0 | N/A | 30 | 1 | 6 | 5
-PIN | nVMA_IOB | 536871040 | 0 | N/A | 56
-PIN | nDTACK_FSB | 536871040 | 0 | N/A | 18
-PIN | nAS_IOB | 536871040 | 0 | N/A | 17
-PIN | nCAS | 536871040 | 0 | N/A | 118
-PIN | nDinLE | 536871040 | 0 | N/A | 116
-PIN | nDoutOE | 536871040 | 0 | N/A | 13
-PIN | nLDS_IOB | 536871040 | 0 | N/A | 11
-PIN | nUDS_IOB | 536871040 | 0 | N/A | 12
-PIN | RA<0> | 536871040 | 0 | N/A | 141
-PIN | RA<1> | 536871040 | 0 | N/A | 58
-PIN | RA<2> | 536871040 | 0 | N/A | 145
-PIN | RA<3> | 536871040 | 0 | N/A | 62
-PIN | RA<4> | 536871040 | 0 | N/A | 149
-PIN | RA<5> | 536871040 | 0 | N/A | 79
-PIN | RA<6> | 536871040 | 0 | N/A | 86
-PIN | RA<7> | 536871040 | 0 | N/A | 90
-PIN | RA<8> | 536871040 | 0 | N/A | 95
-PIN | RA<9> | 536871040 | 0 | N/A | 97
-PIN | nBERR_FSB | 536871040 | 0 | N/A | 22
-PIN | nOE | 536871040 | 0 | N/A | 26
-PIN | nROMWE | 536871040 | 0 | N/A | 135
-PIN | nVPA_FSB | 536871040 | 0 | N/A | 139
-PIN | nADoutLE0 | 536871040 | 0 | N/A | 107
-PIN | nDinOE | 536871040 | 0 | N/A | 157
-PIN | nRAS | 536871040 | 0 | N/A | 36
-PIN | RA<11> | 536871040 | 0 | N/A | 102
-PIN | RA<10> | 536871040 | 0 | N/A | 104
-PIN | nADoutLE1 | 536871040 | 0 | N/A | 47
-PIN | nRAMLWE | 536871040 | 0 | N/A | 125
-PIN | nRAMUWE | 536871040 | 0 | N/A | 130
-PIN | nROMCS | 536871040 | 0 | N/A | 68
-PIN | nAoutOE | 536871040 | 0 | N/A | 112
diff --git a/cpld/XC95144XL/MXSE 2.nga b/cpld/XC95144XL/MXSE 2.nga
deleted file mode 100644
index d0fe8bb..0000000
--- a/cpld/XC95144XL/MXSE 2.nga	
+++ /dev/null
@@ -1,3 +0,0 @@
-XILINX-XDB 0.1 STUB 0.1 ASCII
-XILINX-XDM V1.6e
-$73647<,Fz_t)HW_EA'254)L880(B~[x%D[[AE#>98%H<?=;%MsP}"APVNH(;>=.E023>"Hx]r/JUQKC%436+B5WY^T<<94$NrW|!@_WMI/:=<!D3]SPZ76;2.D|Yv+FY]GG!07:'OS\<64$NrW|!@_WMI/:=<!EYR\TQY7911/C}Zw$GZ\@F"18;$NT]Q_T^310>"Hx]r/JUQKC%436+C_XV~xe`|jn`of`Zhb|V;:7)ATy&E\ZBD,?:9"\?<;%MsP}"APVNH(;>=.TKN54=#Gy^s(KVPDB&543(C9;1/C}Zw$GZ\@F"18?$O=<<4$NrW|!@_WMI/:=8!D334?!Iw\q.MTRJL$725*A4XX]U;=:5+OqV{ C^XLJ.=<; K2^RW[4703-E{Xu*IX^F@ 361&M8T\YQ=129'KuR,ORTHN*907,F\U7?3-E{Xu*IX^F@ 361&LR[S]ZP00:8 JvSp-LSSIM+614-A]VXX]U:=55+OqV{ C^XLJ.=<; JXQ]SPZ45<2.D|Yv+FY]GG!07>'OS\Rz|ilpfjdkblVdnxR?>;%MsP}"APVNH(;>9.P30?!Iw\q.MTRJL$725*POJ=2.Yi{*8;)294?6.n2";6=4?)!*3>5<7!8:0$<>?0;3345<689:"==5'1623>41783;<<='>0:*2<56=91:;6<6?0(33?-4?89094=>52923-46< ::;<7=?0180456.:81#?=>?:2234?5789#+$>;?0;1645<4=9:"==5'3423>637839><='k;)634?2783>;<$??;)6645<3=9:188>?)028,36783<;<=49012*55=/?9:;6:>?0;5345/682"2<=>59123><678 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\ No newline at end of file
diff --git a/cpld/XC95144XL/MXSE 2.ngc b/cpld/XC95144XL/MXSE 2.ngc
deleted file mode 100644
index 46db088..0000000
--- a/cpld/XC95144XL/MXSE 2.ngc	
+++ /dev/null
@@ -1,3 +0,0 @@
-XILINX-XDB 0.1 STUB 0.1 ASCII
-XILINX-XDM V1.6e
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\ No newline at end of file
diff --git a/cpld/XC95144XL/MXSE 2.ngd b/cpld/XC95144XL/MXSE 2.ngd
deleted file mode 100644
index 3dfd89e..0000000
--- a/cpld/XC95144XL/MXSE 2.ngd	
+++ /dev/null
@@ -1,3 +0,0 @@
-XILINX-XDB 0.1 STUB 0.1 ASCII
-XILINX-XDM V1.6e
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\ No newline at end of file
diff --git a/cpld/XC95144XL/MXSE 2.ngr b/cpld/XC95144XL/MXSE 2.ngr
deleted file mode 100644
index 55fd813..0000000
--- a/cpld/XC95144XL/MXSE 2.ngr	
+++ /dev/null
@@ -1,3 +0,0 @@
-XILINX-XDB 0.1 STUB 0.1 ASCII
-XILINX-XDM V1.6e
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\ No newline at end of file
diff --git a/cpld/XC95144XL/MXSE 2.pnx b/cpld/XC95144XL/MXSE 2.pnx
deleted file mode 100644
index 500291d..0000000
--- a/cpld/XC95144XL/MXSE 2.pnx	
+++ /dev/null
@@ -1,18 +0,0 @@
-<?xml version='1.0' encoding='utf-8' ?>
-<!DOCTYPE ibis [
-<!ELEMENT ibis (part, pin+)>
-<!ELEMENT part EMPTY>
-<!ELEMENT pin EMPTY>
-<!ATTLIST part
-  arch   CDATA #REQUIRED
-  device CDATA #REQUIRED
-  spg    CDATA #REQUIRED
-  pkg    CDATA #REQUIRED>
-<!ATTLIST pin
-  nm     CDATA #REQUIRED
-  no     CDATA #REQUIRED
-  iostd  (TTL|LVTTL|LVCMOS2|NA) "NA"
-  sr     (SLOW|FAST|slow|fast) "SLOW"
-  dir    (BIDIR|bidir|INPUT|input|OUTPUT|output) "BIDIR">
-]>
-<ibis><part arch="xc9500xl" device="XC95144XL" pkg="TQ100" spg="-10"/><pin dir="input" nm="A_FSB&lt;9&gt;" no="12"/><pin dir="input" nm="A_FSB&lt;8&gt;" no="64"/><pin dir="input" nm="A_FSB&lt;15&gt;" no="80"/><pin dir="input" nm="A_FSB&lt;14&gt;" no="93"/><pin dir="input" nm="A_FSB&lt;13&gt;" no="82"/><pin dir="input" nm="A_FSB&lt;12&gt;" no="92"/><pin dir="input" nm="A_FSB&lt;11&gt;" no="86"/><pin dir="input" nm="A_FSB&lt;10&gt;" no="89"/><pin dir="input" nm="A_FSB&lt;23&gt;" no="66"/><pin dir="input" nm="A_FSB&lt;22&gt;" no="9"/><pin dir="input" nm="A_FSB&lt;21&gt;" no="68"/><pin dir="input" nm="A_FSB&lt;20&gt;" no="71"/><pin dir="input" nm="A_FSB&lt;19&gt;" no="73"/><pin dir="input" nm="A_FSB&lt;18&gt;" no="76"/><pin dir="input" nm="A_FSB&lt;17&gt;" no="96"/><pin dir="input" nm="A_FSB&lt;16&gt;" no="95"/><pin dir="input" nm="CLK2X_IOB" no="22"/><pin dir="input" nm="CLK_FSB" no="23"/><pin dir="input" nm="nAS_FSB" no="13"/><pin dir="input" nm="nWE_FSB" no="61"/><pin dir="input" nm="nBERR_IOB" no="18"/><pin dir="input" nm="CLK_IOB" no="27"/><pin dir="input" nm="nRES" no="99"/><pin dir="input" nm="nLDS_FSB" no="25"/><pin dir="input" nm="nUDS_FSB" no="52"/><pin dir="input" nm="E_IOB" no="49"/><pin dir="input" nm="nVPA_IOB" no="59"/><pin dir="input" nm="nDTACK_IOB" no="54"/><pin dir="input" nm="A_FSB&lt;1&gt;" no="90"/><pin dir="input" nm="A_FSB&lt;2&gt;" no="16"/><pin dir="input" nm="A_FSB&lt;3&gt;" no="78"/><pin dir="input" nm="A_FSB&lt;4&gt;" no="56"/><pin dir="input" nm="A_FSB&lt;5&gt;" no="15"/><pin dir="input" nm="A_FSB&lt;6&gt;" no="19"/><pin dir="input" nm="A_FSB&lt;7&gt;" no="20"/><pin dir="output" nm="nVMA_IOB" no="33" sr="fast"/><pin dir="output" nm="nDTACK_FSB" no="11" sr="fast"/><pin dir="output" nm="nAS_IOB" no="10" sr="fast"/><pin dir="output" nm="nCAS" no="74" sr="fast"/><pin dir="output" nm="nDinLE" no="72" sr="fast"/><pin dir="output" nm="nDoutOE" no="8" sr="fast"/><pin dir="output" nm="nLDS_IOB" no="6" sr="fast"/><pin dir="output" nm="nUDS_IOB" no="7" sr="fast"/><pin dir="output" nm="RA&lt;0&gt;" no="87" sr="fast"/><pin dir="output" nm="RA&lt;1&gt;" no="35" sr="fast"/><pin dir="output" nm="RA&lt;2&gt;" no="91" sr="fast"/><pin dir="output" nm="RA&lt;3&gt;" no="39" sr="fast"/><pin dir="output" nm="RA&lt;4&gt;" no="94" sr="fast"/><pin dir="output" nm="RA&lt;5&gt;" no="50" sr="fast"/><pin dir="output" nm="RA&lt;6&gt;" no="53" sr="fast"/><pin dir="output" nm="RA&lt;7&gt;" no="55" sr="fast"/><pin dir="output" nm="RA&lt;8&gt;" no="58" sr="fast"/><pin dir="output" nm="RA&lt;9&gt;" no="60" sr="fast"/><pin dir="output" nm="nBERR_FSB" no="14" sr="fast"/><pin dir="output" nm="nOE" no="17" sr="fast"/><pin dir="output" nm="nROMWE" no="81" sr="fast"/><pin dir="output" nm="nVPA_FSB" no="85" sr="fast"/><pin dir="output" nm="nADoutLE0" no="67" sr="fast"/><pin dir="output" nm="nDinOE" no="97" sr="fast"/><pin dir="output" nm="nRAS" no="24" sr="fast"/><pin dir="output" nm="RA&lt;11&gt;" no="63" sr="fast"/><pin dir="output" nm="RA&lt;10&gt;" no="65" sr="fast"/><pin dir="output" nm="nADoutLE1" no="29" sr="fast"/><pin dir="output" nm="nRAMLWE" no="77" sr="fast"/><pin dir="output" nm="nRAMUWE" no="79" sr="fast"/><pin dir="output" nm="nROMCS" no="42" sr="fast"/><pin dir="output" nm="nAoutOE" no="70" sr="fast"/></ibis>
diff --git a/cpld/XC95144XL/MXSE 2.rpt b/cpld/XC95144XL/MXSE 2.rpt
deleted file mode 100644
index add4798..0000000
--- a/cpld/XC95144XL/MXSE 2.rpt	
+++ /dev/null
@@ -1,1797 +0,0 @@
- 
-cpldfit:  version P.20131013                        Xilinx Inc.
-                                  Fitter Report
-Design Name: MXSE                                Date: 12-11-2021,  6:24AM
-Device Used: XC95144XL-10-TQ100
-Fitting Status: Successful
-
-*************************  Mapped Resource Summary  **************************
-
-Macrocells     Product Terms    Function Block   Registers      Pins           
-Used/Tot       Used/Tot         Inps Used/Tot    Used/Tot       Used/Tot       
-110/144 ( 76%) 439 /720  ( 61%) 244/432 ( 56%)   84 /144 ( 58%) 67 /81  ( 83%)
-
-** Function Block Resources **
-
-Function    Mcells      FB Inps     Pterms      IO          
-Block       Used/Tot    Used/Tot    Used/Tot    Used/Tot    
-FB1           9/18       36/54       80/90      11/11*
-FB2          18/18*      35/54       34/90       6/10
-FB3          14/18       35/54       77/90       6/10
-FB4          10/18       36/54       82/90      10/10*
-FB5          17/18       35/54       47/90       4/10
-FB6          18/18*      24/54       37/90      10/10*
-FB7          17/18       35/54       76/90      10/10*
-FB8           7/18        8/54        6/90      10/10*
-             -----       -----       -----      -----    
-            110/144     244/432     439/720     67/81 
-
-* - Resource is exhausted
-
-** Global Control Resources **
-
-Signal 'CLK2X_IOB' mapped onto global clock net GCK1.
-Signal 'CLK_FSB' mapped onto global clock net GCK2.
-Signal 'CLK_IOB' mapped onto global clock net GCK3.
-Global output enable net(s) unused.
-Signal 'nRES' mapped onto global set/reset net GSR.
-
-** Pin Resources **
-
-Signal Type    Required     Mapped  |  Pin Type            Used    Total 
-------------------------------------|------------------------------------
-Input         :   31          31    |  I/O              :    63      73
-Output        :   32          32    |  GCK/IO           :     3       3
-Bidirectional :    0           0    |  GTS/IO           :     0       4
-GCK           :    3           3    |  GSR/IO           :     1       1
-GTS           :    0           0    |
-GSR           :    1           1    |
-                 ----        ----
-        Total     67          67
-
-** Power Data **
-
-There are 110 macrocells in high performance mode (MCHP).
-There are 0 macrocells in low power mode (MCLP).
-End of Mapped Resource Summary
-**************************  Errors and Warnings  ***************************
-
-WARNING:Cpld - Unable to retrieve the path to the iSE Project Repository. Will
-   use the default filename of 'MXSE.ise'.
-*************************  Summary of Mapped Logic  ************************
-
-** 32 Outputs **
-
-Signal                                Total Total Loc     Pin  Pin     Pin     Pwr  Slew Reg Init
-Name                                  Pts   Inps          No.  Type    Use     Mode Rate State
-nDTACK_FSB                            23    32    FB1_2   11   I/O     O       STD  FAST RESET
-nBERR_FSB                             3     9     FB1_6   14   I/O     O       STD  FAST 
-nOE                                   1     2     FB1_11  17   I/O     O       STD  FAST 
-nLDS_IOB                              3     7     FB2_11  6    I/O     O       STD  FAST RESET
-nUDS_IOB                              3     7     FB2_12  7    I/O     O       STD  FAST RESET
-nDoutOE                               2     7     FB2_14  8    I/O     O       STD  FAST RESET
-nAS_IOB                               1     5     FB2_17  10   I/O     O       STD  FAST RESET
-nRAS                                  3     8     FB3_5   24   I/O     O       STD  FAST 
-nADoutLE1                             2     3     FB3_11  29   I/O     O       STD  FAST SET
-nVMA_IOB                              2     9     FB3_15  33   I/O     O       STD  FAST RESET
-RA<0>                                 2     3     FB4_2   87   I/O     O       STD  FAST 
-RA<2>                                 2     3     FB4_8   91   I/O     O       STD  FAST 
-RA<4>                                 2     3     FB4_12  94   I/O     O       STD  FAST 
-nDinOE                                2     6     FB4_17  97   I/O     O       STD  FAST 
-RA<1>                                 2     3     FB5_2   35   I/O     O       STD  FAST 
-RA<3>                                 2     3     FB5_8   39   I/O     O       STD  FAST 
-nROMCS                                2     5     FB5_12  42   I/O     O       STD  FAST 
-nCAS                                  1     1     FB6_2   74   I/O     O       STD  FAST RESET
-nRAMLWE                               1     5     FB6_6   77   I/O     O       STD  FAST 
-nRAMUWE                               1     5     FB6_9   79   I/O     O       STD  FAST 
-nROMWE                                1     2     FB6_12  81   I/O     O       STD  FAST 
-nVPA_FSB                              1     2     FB6_15  85   I/O     O       STD  FAST 
-RA<5>                                 2     3     FB7_2   50   I/O     O       STD  FAST 
-RA<6>                                 2     3     FB7_6   53   I/O     O       STD  FAST 
-RA<7>                                 2     3     FB7_9   55   I/O     O       STD  FAST 
-RA<8>                                 2     3     FB7_12  58   I/O     O       STD  FAST 
-RA<9>                                 2     3     FB7_15  60   I/O     O       STD  FAST 
-RA<11>                                1     1     FB8_2   63   I/O     O       STD  FAST 
-RA<10>                                1     1     FB8_6   65   I/O     O       STD  FAST 
-nADoutLE0                             1     2     FB8_9   67   I/O     O       STD  FAST 
-nAoutOE                               0     0     FB8_12  70   I/O     O       STD  FAST 
-nDinLE                                1     2     FB8_15  72   I/O     O       STD  FAST RESET
-
-** 78 Buried Nodes **
-
-Signal                                Total Total Loc     Pwr  Reg Init
-Name                                  Pts   Inps          Mode State
-$OpTx$FX_DC$606                       5     12    FB1_4   STD  
-fsb/Ready1r                           7     17    FB1_7   STD  RESET
-fsb/VPA__or00001/fsb/VPA__or00001_D2  8     20    FB1_10  STD  
-fsb/Ready2r                           9     22    FB1_12  STD  RESET
-fsb/VPA                               22    30    FB1_15  STD  RESET
-$OpTx$FX_DC$602                       2     5     FB1_17  STD  
-iobm/VPArr                            1     1     FB2_1   STD  RESET
-iobm/VPArf                            1     1     FB2_2   STD  RESET
-iobm/RESrr                            1     1     FB2_3   STD  RESET
-iobm/RESrf                            1     1     FB2_4   STD  RESET
-iobm/IOREQr                           1     1     FB2_5   STD  RESET
-cnt/RefCnt<3>                         1     3     FB2_6   STD  RESET
-cnt/RefCnt<2>                         1     2     FB2_7   STD  RESET
-cnt/RefCnt<1>                         1     1     FB2_8   STD  RESET
-fsb/BERR1r                            2     4     FB2_9   STD  RESET
-cnt/RefDone                           2     10    FB2_10  STD  RESET
-cnt/TimeoutBPre                       3     11    FB2_13  STD  RESET
-TimeoutB                              3     12    FB2_15  STD  RESET
-TimeoutA                              3     10    FB2_16  STD  RESET
-iobs/IOReady                          4     8     FB2_18  STD  RESET
-IORW0                                 18    20    FB3_3   STD  RESET
-iobs/IOACTr                           1     1     FB3_4   STD  RESET
-iobs/Clear1                           1     3     FB3_6   STD  RESET
-fsb/ASrf                              1     1     FB3_7   STD  RESET
-ALE0S                                 1     2     FB3_8   STD  RESET
-iobs/PS_FSM_FFd2                      14    19    FB3_9   STD  RESET
-iobs/PS_FSM_FFd1                      2     3     FB3_12  STD  RESET
-IOREQ                                 14    19    FB3_13  STD  RESET
-iobm/ETACK                            1     6     FB3_14  STD  RESET
-iobs/IORW1                            16    19    FB3_17  STD  RESET
-ram/BACTr                             1     2     FB3_18  STD  RESET
-ram/RASEL                             20    15    FB4_1   STD  RESET
-cs/nOverlay1                          2     3     FB4_3   STD  RESET
-iobs/Load1                            14    18    FB4_6   STD  RESET
-iobs/Once                             17    18    FB4_10  STD  RESET
-ram/RAMDIS1                           18    15    FB4_14  STD  RESET
-fsb/BERR0r                            3     8     FB4_16  STD  RESET
-IOACT                                 10    15    FB5_1   STD  RESET
-iobm/IOS_FSM_FFd7                     1     3     FB5_3   STD  RESET
-iobm/IOS_FSM_FFd6                     1     1     FB5_4   STD  RESET
-
-Signal                                Total Total Loc     Pwr  Reg Init
-Name                                  Pts   Inps          Mode State
-iobm/IOS_FSM_FFd5                     1     1     FB5_5   STD  RESET
-iobm/IOS_FSM_FFd4                     1     1     FB5_6   STD  RESET
-iobm/BERRrr                           1     1     FB5_7   STD  RESET
-iobm/BERRrf                           1     1     FB5_9   STD  RESET
-cnt/RefCnt<0>                         0     0     FB5_10  STD  RESET
-iobm/IOS_FSM_FFd8                     2     4     FB5_11  STD  SET
-ALE0M                                 2     7     FB5_13  STD  RESET
-iobm/IOS_FSM_FFd2                     4     9     FB5_14  STD  RESET
-BERR_IOBS                             4     8     FB5_15  STD  RESET
-iobm/IOS_FSM_FFd3                     5     10    FB5_16  STD  RESET
-IOBERR                                8     11    FB5_18  STD  RESET
-iobm/Er2                              1     1     FB6_1   STD  RESET
-iobm/DTACKrr                          1     1     FB6_3   STD  RESET
-iobm/DTACKrf                          1     1     FB6_4   STD  RESET
-RefAck                                1     2     FB6_5   STD  RESET
-iobs/IOU1                             2     2     FB6_7   STD  RESET
-iobs/IOL1                             2     2     FB6_8   STD  RESET
-iobm/ES<3>                            3     6     FB6_10  STD  RESET
-iobm/ES<1>                            3     4     FB6_11  STD  RESET
-iobm/ES<0>                            3     7     FB6_13  STD  RESET
-IOU0                                  3     5     FB6_14  STD  RESET
-IOL0                                  3     5     FB6_16  STD  RESET
-iobm/ES<4>                            4     7     FB6_17  STD  RESET
-iobm/ES<2>                            5     7     FB6_18  STD  RESET
-cnt/RefCnt<5>                         1     5     FB7_1   STD  RESET
-cnt/RefCnt<4>                         1     4     FB7_3   STD  RESET
-cs/nOverlay0                          2     7     FB7_4   STD  RESET
-ram/RS_FSM_FFd3                       11    14    FB7_5   STD  RESET
-fsb/Ready0r                           3     8     FB7_7   STD  RESET
-ram/RS_FSM_FFd1                       5     10    FB7_8   STD  RESET
-ram/Once                              5     10    FB7_10  STD  RESET
-ram/RAMDIS2                           7     15    FB7_11  STD  RESET
-ram/RS_FSM_FFd2                       13    14    FB7_13  STD  RESET
-cnt/RefCnt<7>                         1     7     FB7_14  STD  RESET
-cnt/RefCnt<6>                         1     6     FB7_16  STD  RESET
-ram/RAMReady                          16    15    FB7_17  STD  RESET
-iobm/IOS_FSM_FFd1                     1     1     FB8_17  STD  RESET
-iobm/Er                               1     1     FB8_18  STD  RESET
-
-** 35 Inputs **
-
-Signal                                Loc     Pin  Pin     Pin     
-Name                                          No.  Type    Use     
-A_FSB<9>                              FB1_3   12   I/O     I
-nAS_FSB                               FB1_5   13   I/O     I
-A_FSB<5>                              FB1_8   15   I/O     I
-A_FSB<2>                              FB1_9   16   I/O     I
-nBERR_IOB                             FB1_12  18   I/O     I
-A_FSB<6>                              FB1_14  19   I/O     I
-A_FSB<7>                              FB1_15  20   I/O     I
-CLK2X_IOB                             FB1_17  22~  GCK/I/O GCK
-nRES                                  FB2_2   99~  GSR/I/O GSR/I
-A_FSB<22>                             FB2_15  9    I/O     I
-CLK_FSB                               FB3_2   23~  GCK/I/O GCK
-nLDS_FSB                              FB3_6   25   I/O     I
-CLK_IOB                               FB3_8   27~  GCK/I/O GCK/I
-A_FSB<10>                             FB4_5   89   I/O     I
-A_FSB<1>                              FB4_6   90   I/O     I
-A_FSB<12>                             FB4_9   92   I/O     I
-A_FSB<14>                             FB4_11  93   I/O     I
-A_FSB<16>                             FB4_14  95   I/O     I
-A_FSB<17>                             FB4_15  96   I/O     I
-E_IOB                                 FB5_17  49   I/O     I
-A_FSB<18>                             FB6_5   76   I/O     I
-A_FSB<3>                              FB6_8   78   I/O     I
-A_FSB<15>                             FB6_11  80   I/O     I
-A_FSB<13>                             FB6_14  82   I/O     I
-A_FSB<11>                             FB6_17  86   I/O     I
-nUDS_FSB                              FB7_5   52   I/O     I
-nDTACK_IOB                            FB7_8   54   I/O     I
-A_FSB<4>                              FB7_11  56   I/O     I
-nVPA_IOB                              FB7_14  59   I/O     I
-nWE_FSB                               FB7_17  61   I/O     I
-A_FSB<8>                              FB8_5   64   I/O     I
-A_FSB<23>                             FB8_8   66   I/O     I
-A_FSB<21>                             FB8_11  68   I/O     I
-A_FSB<20>                             FB8_14  71   I/O     I
-A_FSB<19>                             FB8_17  73   I/O     I
-
-Legend:
-Pin No. - ~ - User Assigned
-**************************  Function Block Details  ************************
-Legend:
-Total Pt     - Total product terms used by the macrocell signal
-Imp Pt       - Product terms imported from other macrocells
-Exp Pt       - Product terms exported to other macrocells
-               in direction shown
-Unused Pt    - Unused local product terms remaining in macrocell
-Loc          - Location where logic was mapped in device
-Pin Type/Use - I  - Input             GCK - Global Clock
-               O  - Output            GTS - Global Output Enable
-              (b) - Buried macrocell  GSR - Global Set/Reset
-X            - Signal used as input to the macrocell logic.
-Pin No.      - ~  - User Assigned
-*********************************** FB1  ***********************************
-Number of function block inputs used/remaining:               36/18
-Number of signals used by logic mapping into function block:  36
-Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
-Name                Pt      Pt    Pt  Pt               #    Type    Use
-(unused)              0       0   \/5   0     FB1_1         (b)     (b)
-nDTACK_FSB           23      18<-   0   0     FB1_2   11    I/O     O
-(unused)              0       0   /\5   0     FB1_3   12    I/O     I
-$OpTx$FX_DC$606       5       3<- /\3   0     FB1_4         (b)     (b)
-(unused)              0       0   /\3   2     FB1_5   13    I/O     I
-nBERR_FSB             3       0   \/2   0     FB1_6   14    I/O     O
-fsb/Ready1r           7       2<-   0   0     FB1_7         (b)     (b)
-(unused)              0       0     0   5     FB1_8   15    I/O     I
-(unused)              0       0   \/3   2     FB1_9   16    I/O     I
-fsb/VPA__or00001/fsb/VPA__or00001_D2
-                      8       3<-   0   0     FB1_10        (b)     (b)
-nOE                   1       0   \/4   0     FB1_11  17    I/O     O
-fsb/Ready2r           9       4<-   0   0     FB1_12  18    I/O     I
-(unused)              0       0   \/5   0     FB1_13        (b)     (b)
-(unused)              0       0   \/5   0     FB1_14  19    I/O     I
-fsb/VPA              22      17<-   0   0     FB1_15  20    I/O     I
-(unused)              0       0   /\5   0     FB1_16        (b)     (b)
-$OpTx$FX_DC$602       2       0   /\2   1     FB1_17  22    GCK/I/O GCK
-(unused)              0       0   \/5   0     FB1_18        (b)     (b)
-
-Signals Used by Logic in Function Block
-  1: $OpTx$FX_DC$602   13: A_FSB<20>         25: fsb/BERR1r 
-  2: $OpTx$FX_DC$606   14: A_FSB<21>         26: fsb/Ready0r 
-  3: A_FSB<10>         15: A_FSB<22>         27: fsb/Ready1r 
-  4: A_FSB<11>         16: A_FSB<23>         28: fsb/Ready2r 
-  5: A_FSB<12>         17: A_FSB<8>          29: fsb/VPA 
-  6: A_FSB<13>         18: A_FSB<9>          30: fsb/VPA__or00001/fsb/VPA__or00001_D2 
-  7: A_FSB<14>         19: BERR_IOBS         31: iobs/IOReady 
-  8: A_FSB<15>         20: TimeoutA          32: nADoutLE1 
-  9: A_FSB<16>         21: TimeoutB          33: nAS_FSB 
- 10: A_FSB<17>         22: cs/nOverlay1      34: nDTACK_FSB 
- 11: A_FSB<18>         23: fsb/ASrf          35: nWE_FSB 
- 12: A_FSB<19>         24: fsb/BERR0r        36: ram/RAMReady 
-
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-nDTACK_FSB           X.XXXXXXXXXXXXXXXXXX.XXXXXXX..XXXXXX.... 32
-$OpTx$FX_DC$606      .....XX.XXXXXXX......X.........X..X..... 12
-nBERR_FSB            ............XXXX..X.X..XX.......X....... 9
-fsb/Ready1r          .....XX.XXXXXXXX.....XX...X...XXX.X..... 17
-fsb/VPA__or00001/fsb/VPA__or00001_D2 
-                     ..XXXXXXXXXXXXXXXX.X.X.....X......X..... 20
-nOE                  ................................X.X..... 2
-fsb/Ready2r          ..XXXXXXXXXXXXXXXX.X.XX....X....X.X..... 22
-fsb/VPA              XXXXXXXXXXXXXXXXXXX..XXXXXX.XXX.X..X.... 30
-$OpTx$FX_DC$602      ............XXXX....X................... 5
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
-*********************************** FB2  ***********************************
-Number of function block inputs used/remaining:               35/19
-Number of signals used by logic mapping into function block:  35
-Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
-Name                Pt      Pt    Pt  Pt               #    Type    Use
-iobm/VPArr            1       0     0   4     FB2_1         (b)     (b)
-iobm/VPArf            1       0     0   4     FB2_2   99    GSR/I/O GSR/I
-iobm/RESrr            1       0     0   4     FB2_3         (b)     (b)
-iobm/RESrf            1       0     0   4     FB2_4         (b)     (b)
-iobm/IOREQr           1       0     0   4     FB2_5   1     GTS/I/O (b)
-cnt/RefCnt<3>         1       0     0   4     FB2_6   2     GTS/I/O (b)
-cnt/RefCnt<2>         1       0     0   4     FB2_7         (b)     (b)
-cnt/RefCnt<1>         1       0     0   4     FB2_8   3     GTS/I/O (b)
-fsb/BERR1r            2       0     0   3     FB2_9   4     GTS/I/O (b)
-cnt/RefDone           2       0     0   3     FB2_10        (b)     (b)
-nLDS_IOB              3       0     0   2     FB2_11  6     I/O     O
-nUDS_IOB              3       0     0   2     FB2_12  7     I/O     O
-cnt/TimeoutBPre       3       0     0   2     FB2_13        (b)     (b)
-nDoutOE               2       0     0   3     FB2_14  8     I/O     O
-TimeoutB              3       0     0   2     FB2_15  9     I/O     I
-TimeoutA              3       0     0   2     FB2_16        (b)     (b)
-nAS_IOB               1       0     0   4     FB2_17  10    I/O     O
-iobs/IOReady          4       0     0   1     FB2_18        (b)     (b)
-
-Signals Used by Logic in Function Block
-  1: BERR_IOBS         13: cnt/RefCnt<3>      25: iobm/IOS_FSM_FFd5 
-  2: IOBERR            14: cnt/RefCnt<4>      26: iobm/IOS_FSM_FFd6 
-  3: IOL0              15: cnt/RefCnt<5>      27: iobm/IOS_FSM_FFd7 
-  4: IOREQ             16: cnt/RefCnt<6>      28: iobs/IOACTr 
-  5: IORW0             17: cnt/RefCnt<7>      29: iobs/IOReady 
-  6: IOU0              18: cnt/RefDone        30: iobs/Once 
-  7: RefAck            19: cnt/TimeoutBPre    31: iobs/PS_FSM_FFd2 
-  8: TimeoutA          20: fsb/ASrf           32: nADoutLE1 
-  9: TimeoutB          21: fsb/BERR1r         33: nAS_FSB 
- 10: cnt/RefCnt<0>     22: iobm/IOS_FSM_FFd2  34: nRES 
- 11: cnt/RefCnt<1>     23: iobm/IOS_FSM_FFd3  35: nVPA_IOB 
- 12: cnt/RefCnt<2>     24: iobm/IOS_FSM_FFd4 
-
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-iobm/VPArr           ..................................X..... 1
-iobm/VPArf           ..................................X..... 1
-iobm/RESrr           .................................X...... 1
-iobm/RESrf           .................................X...... 1
-iobm/IOREQr          ...X.................................... 1
-cnt/RefCnt<3>        .........XXX............................ 3
-cnt/RefCnt<2>        .........XX............................. 2
-cnt/RefCnt<1>        .........X.............................. 1
-fsb/BERR1r           X..................XX...........X....... 4
-cnt/RefDone          ......X..XXXXXXXXX...................... 10
-nLDS_IOB             ..X.X.................XXXXX............. 7
-nUDS_IOB             ....XX................XXXXX............. 7
-cnt/TimeoutBPre      .........XXXXXXXX.XX............X....... 11
-nDoutOE              ....X................XXXXXX............. 7
-TimeoutB             ........XXXXXXXXX.XX............X....... 12
-TimeoutA             .......X.XXXXXXX...X............X....... 10
-nAS_IOB              ......................XXXXX............. 5
-iobs/IOReady         .X.................X.......XXXXXX....... 8
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
-*********************************** FB3  ***********************************
-Number of function block inputs used/remaining:               35/19
-Number of signals used by logic mapping into function block:  35
-Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
-Name                Pt      Pt    Pt  Pt               #    Type    Use
-(unused)              0       0   \/4   1     FB3_1         (b)     (b)
-(unused)              0       0   \/5   0     FB3_2   23    GCK/I/O GCK
-IORW0                18      13<-   0   0     FB3_3         (b)     (b)
-iobs/IOACTr           1       0   /\4   0     FB3_4         (b)     (b)
-nRAS                  3       0     0   2     FB3_5   24    I/O     O
-iobs/Clear1           1       0     0   4     FB3_6   25    I/O     I
-fsb/ASrf              1       0     0   4     FB3_7         (b)     (b)
-ALE0S                 1       0   \/4   0     FB3_8   27    GCK/I/O GCK/I
-iobs/PS_FSM_FFd2     14       9<-   0   0     FB3_9   28    I/O     (b)
-(unused)              0       0   /\5   0     FB3_10        (b)     (b)
-nADoutLE1             2       0   \/2   1     FB3_11  29    I/O     O
-iobs/PS_FSM_FFd1      2       2<- \/5   0     FB3_12  30    I/O     (b)
-IOREQ                14       9<-   0   0     FB3_13        (b)     (b)
-iobm/ETACK            1       0   /\4   0     FB3_14  32    I/O     (b)
-nVMA_IOB              2       0   \/2   1     FB3_15  33    I/O     O
-(unused)              0       0   \/5   0     FB3_16        (b)     (b)
-iobs/IORW1           16      11<-   0   0     FB3_17  34    I/O     (b)
-ram/BACTr             1       0   /\4   0     FB3_18        (b)     (b)
-
-Signals Used by Logic in Function Block
-  1: A_FSB<13>         13: RefAck            25: iobs/IORW1 
-  2: A_FSB<14>         14: cs/nOverlay1      26: iobs/Load1 
-  3: A_FSB<16>         15: fsb/ASrf          27: iobs/Once 
-  4: A_FSB<17>         16: iobm/ES<0>        28: iobs/PS_FSM_FFd1 
-  5: A_FSB<18>         17: iobm/ES<1>        29: iobs/PS_FSM_FFd2 
-  6: A_FSB<19>         18: iobm/ES<2>        30: nADoutLE1 
-  7: A_FSB<20>         19: iobm/ES<3>        31: nAS_FSB 
-  8: A_FSB<21>         20: iobm/ES<4>        32: nVMA_IOB 
-  9: A_FSB<22>         21: iobm/VPArf        33: nWE_FSB 
- 10: A_FSB<23>         22: iobm/VPArr        34: ram/RAMDIS1 
- 11: IOACT             23: iobs/Clear1       35: ram/RAMDIS2 
- 12: IORW0             24: iobs/IOACTr      
-
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-IORW0                XXXXXXXXXX.X.XX.........X.XXXXX.X....... 20
-iobs/IOACTr          ..........X............................. 1
-nRAS                 .......XXX..XX................X..XX..... 8
-iobs/Clear1          ...........................XXX.......... 3
-fsb/ASrf             ..............................X......... 1
-ALE0S                ...........................XX........... 2
-iobs/PS_FSM_FFd2     XXXXXXXXXX...XX........X..XXXXX.X....... 19
-nADoutLE1            ......................X..X...X.......... 3
-iobs/PS_FSM_FFd1     .......................X...XX........... 3
-IOREQ                XXXXXXXXXX...XX........X..XXXXX.X....... 19
-iobm/ETACK           ...............XXXXX...........X........ 6
-nVMA_IOB             ..........X....XXXXXXX.........X........ 9
-iobs/IORW1           XXXXXXXXXX...XX.........X.XXXXX.X....... 19
-ram/BACTr            ..............X...............X......... 2
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
-*********************************** FB4  ***********************************
-Number of function block inputs used/remaining:               36/18
-Number of signals used by logic mapping into function block:  36
-Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
-Name                Pt      Pt    Pt  Pt               #    Type    Use
-ram/RASEL            20      15<-   0   0     FB4_1         (b)     (b)
-RA<0>                 2       2<- /\5   0     FB4_2   87    I/O     O
-cs/nOverlay1          2       0   /\2   1     FB4_3         (b)     (b)
-(unused)              0       0     0   5     FB4_4         (b)     
-(unused)              0       0   \/4   1     FB4_5   89    I/O     I
-iobs/Load1           14       9<-   0   0     FB4_6   90    I/O     I
-(unused)              0       0   /\5   0     FB4_7         (b)     (b)
-RA<2>                 2       0   \/2   1     FB4_8   91    I/O     O
-(unused)              0       0   \/5   0     FB4_9   92    I/O     I
-iobs/Once            17      12<-   0   0     FB4_10        (b)     (b)
-(unused)              0       0   /\5   0     FB4_11  93    I/O     I
-RA<4>                 2       0   \/3   0     FB4_12  94    I/O     O
-(unused)              0       0   \/5   0     FB4_13        (b)     (b)
-ram/RAMDIS1          18      13<-   0   0     FB4_14  95    I/O     I
-(unused)              0       0   /\5   0     FB4_15  96    I/O     I
-fsb/BERR0r            3       0   \/2   0     FB4_16        (b)     (b)
-nDinOE                2       2<- \/5   0     FB4_17  97    I/O     O
-(unused)              0       0   \/5   0     FB4_18        (b)     (b)
-
-Signals Used by Logic in Function Block
-  1: A_FSB<10>         13: A_FSB<23>         25: iobs/Once 
-  2: A_FSB<12>         14: A_FSB<3>          26: iobs/PS_FSM_FFd1 
-  3: A_FSB<13>         15: A_FSB<5>          27: iobs/PS_FSM_FFd2 
-  4: A_FSB<14>         16: TimeoutB          28: nADoutLE1 
-  5: A_FSB<16>         17: cnt/RefCnt<5>     29: nAS_FSB 
-  6: A_FSB<17>         18: cnt/RefCnt<6>     30: nWE_FSB 
-  7: A_FSB<18>         19: cnt/RefCnt<7>     31: ram/BACTr 
-  8: A_FSB<19>         20: cnt/RefDone       32: ram/Once 
-  9: A_FSB<1>          21: cs/nOverlay0      33: ram/RASEL 
- 10: A_FSB<20>         22: cs/nOverlay1      34: ram/RS_FSM_FFd1 
- 11: A_FSB<21>         23: fsb/ASrf          35: ram/RS_FSM_FFd2 
- 12: A_FSB<22>         24: fsb/BERR0r        36: ram/RS_FSM_FFd3 
-
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-ram/RASEL            ..........XXX...XXXX.XX.....X.XX.XXX.... 15
-RA<0>                X.......X.......................X....... 3
-cs/nOverlay1         ....................X.X.....X........... 3
-iobs/Load1           ..XXXXXX.XXXX........XX.XXXXXX.......... 18
-RA<2>                .X...........X..................X....... 3
-iobs/Once            ..XXXXXX.XXXX........XX.XXXXXX.......... 18
-RA<4>                ...X..........X.................X....... 3
-ram/RAMDIS1          ..........XXX...XXXX.XX.....X.XX.XXX.... 15
-fsb/BERR0r           .........XXXX..X......XX....X........... 8
-nDinOE               .........XXXX...............XX.......... 6
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
-*********************************** FB5  ***********************************
-Number of function block inputs used/remaining:               35/19
-Number of signals used by logic mapping into function block:  35
-Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
-Name                Pt      Pt    Pt  Pt               #    Type    Use
-IOACT                10       5<-   0   0     FB5_1         (b)     (b)
-RA<1>                 2       0   /\3   0     FB5_2   35    I/O     O
-iobm/IOS_FSM_FFd7     1       0     0   4     FB5_3         (b)     (b)
-iobm/IOS_FSM_FFd6     1       0     0   4     FB5_4         (b)     (b)
-iobm/IOS_FSM_FFd5     1       0     0   4     FB5_5   36    I/O     (b)
-iobm/IOS_FSM_FFd4     1       0     0   4     FB5_6   37    I/O     (b)
-iobm/BERRrr           1       0     0   4     FB5_7         (b)     (b)
-RA<3>                 2       0     0   3     FB5_8   39    I/O     O
-iobm/BERRrf           1       0     0   4     FB5_9   40    I/O     (b)
-cnt/RefCnt<0>         0       0     0   5     FB5_10        (b)     (b)
-iobm/IOS_FSM_FFd8     2       0     0   3     FB5_11  41    I/O     (b)
-nROMCS                2       0     0   3     FB5_12  42    I/O     O
-ALE0M                 2       0     0   3     FB5_13        (b)     (b)
-iobm/IOS_FSM_FFd2     4       0     0   1     FB5_14  43    I/O     (b)
-BERR_IOBS             4       0     0   1     FB5_15  46    I/O     (b)
-iobm/IOS_FSM_FFd3     5       0     0   0     FB5_16        (b)     (b)
-(unused)              0       0   \/5   0     FB5_17  49    I/O     I
-IOBERR                8       5<- \/2   0     FB5_18        (b)     (b)
-
-Signals Used by Logic in Function Block
-  1: A_FSB<11>         13: fsb/ASrf           25: iobm/IOS_FSM_FFd7 
-  2: A_FSB<13>         14: iobm/BERRrf        26: iobm/IOS_FSM_FFd8 
-  3: A_FSB<20>         15: iobm/BERRrr        27: iobm/RESrf 
-  4: A_FSB<21>         16: iobm/DTACKrf       28: iobm/RESrr 
-  5: A_FSB<22>         17: iobm/DTACKrr       29: iobs/IOACTr 
-  6: A_FSB<23>         18: iobm/ETACK         30: iobs/Once 
-  7: A_FSB<2>          19: iobm/IOREQr        31: iobs/PS_FSM_FFd2 
-  8: A_FSB<4>          20: iobm/IOS_FSM_FFd1  32: nADoutLE1 
-  9: BERR_IOBS         21: iobm/IOS_FSM_FFd3  33: nAS_FSB 
- 10: CLK_IOB           22: iobm/IOS_FSM_FFd4  34: nBERR_IOB 
- 11: IOBERR            23: iobm/IOS_FSM_FFd5  35: ram/RASEL 
- 12: cs/nOverlay1      24: iobm/IOS_FSM_FFd6 
-
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-IOACT                .........X...XXXXXX.XXXXXXXX............ 15
-RA<1>                X.....X...........................X..... 3
-iobm/IOS_FSM_FFd7    .........X........X......X.............. 3
-iobm/IOS_FSM_FFd6    ........................X............... 1
-iobm/IOS_FSM_FFd5    .......................X................ 1
-iobm/IOS_FSM_FFd4    ......................X................. 1
-iobm/BERRrr          .................................X...... 1
-RA<3>                .X.....X..........................X..... 3
-iobm/BERRrf          .................................X...... 1
-cnt/RefCnt<0>        ........................................ 0
-iobm/IOS_FSM_FFd8    .........X........XX.....X.............. 4
-nROMCS               ..XXXX.....X............................ 5
-ALE0M                ..................X.XXXXXX.............. 7
-iobm/IOS_FSM_FFd2    .........X...XXXXX..X.....XX............ 9
-BERR_IOBS            ........X.X.X...............XXXXX....... 8
-iobm/IOS_FSM_FFd3    .........X...XXXXX..XX....XX............ 10
-IOBERR               .........XX..XXXXX..X.....XX.....X...... 11
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
-*********************************** FB6  ***********************************
-Number of function block inputs used/remaining:               24/30
-Number of signals used by logic mapping into function block:  24
-Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
-Name                Pt      Pt    Pt  Pt               #    Type    Use
-iobm/Er2              1       0     0   4     FB6_1         (b)     (b)
-nCAS                  1       0     0   4     FB6_2   74    I/O     O
-iobm/DTACKrr          1       0     0   4     FB6_3         (b)     (b)
-iobm/DTACKrf          1       0     0   4     FB6_4         (b)     (b)
-RefAck                1       0     0   4     FB6_5   76    I/O     I
-nRAMLWE               1       0     0   4     FB6_6   77    I/O     O
-iobs/IOU1             2       0     0   3     FB6_7         (b)     (b)
-iobs/IOL1             2       0     0   3     FB6_8   78    I/O     I
-nRAMUWE               1       0     0   4     FB6_9   79    I/O     O
-iobm/ES<3>            3       0     0   2     FB6_10        (b)     (b)
-iobm/ES<1>            3       0     0   2     FB6_11  80    I/O     I
-nROMWE                1       0     0   4     FB6_12  81    I/O     O
-iobm/ES<0>            3       0     0   2     FB6_13        (b)     (b)
-IOU0                  3       0     0   2     FB6_14  82    I/O     I
-nVPA_FSB              1       0     0   4     FB6_15  85    I/O     O
-IOL0                  3       0     0   2     FB6_16        (b)     (b)
-iobm/ES<4>            4       0     0   1     FB6_17  86    I/O     I
-iobm/ES<2>            5       0     0   0     FB6_18        (b)     (b)
-
-Signals Used by Logic in Function Block
-  1: fsb/VPA            9: iobs/IOL1         17: nLDS_FSB 
-  2: iobm/ES<0>        10: iobs/IOU1         18: nUDS_FSB 
-  3: iobm/ES<1>        11: iobs/Load1        19: nWE_FSB 
-  4: iobm/ES<2>        12: iobs/PS_FSM_FFd1  20: ram/RAMDIS1 
-  5: iobm/ES<3>        13: iobs/PS_FSM_FFd2  21: ram/RAMDIS2 
-  6: iobm/ES<4>        14: nADoutLE1         22: ram/RASEL 
-  7: iobm/Er           15: nAS_FSB           23: ram/RS_FSM_FFd1 
-  8: iobm/Er2          16: nDTACK_IOB        24: ram/RS_FSM_FFd2 
-
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-iobm/Er2             ......X................................. 1
-nCAS                 .....................X.................. 1
-iobm/DTACKrr         ...............X........................ 1
-iobm/DTACKrf         ...............X........................ 1
-RefAck               ......................XX................ 2
-nRAMLWE              ..............X.X.XXX................... 5
-iobs/IOU1            ..........X......X...................... 2
-iobs/IOL1            ..........X.....X....................... 2
-nRAMUWE              ..............X..XXXX................... 5
-iobm/ES<3>           .XXXX.XX................................ 6
-iobm/ES<1>           .XX...XX................................ 4
-nROMWE               ..............X...X..................... 2
-iobm/ES<0>           .XXXXXXX................................ 7
-IOU0                 .........X.XXX...X...................... 5
-nVPA_FSB             X.............X......................... 2
-IOL0                 ........X..XXX..X....................... 5
-iobm/ES<4>           .XXXXXXX................................ 7
-iobm/ES<2>           .XXXXXXX................................ 7
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
-*********************************** FB7  ***********************************
-Number of function block inputs used/remaining:               35/19
-Number of signals used by logic mapping into function block:  35
-Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
-Name                Pt      Pt    Pt  Pt               #    Type    Use
-cnt/RefCnt<5>         1       0   /\1   3     FB7_1         (b)     (b)
-RA<5>                 2       0     0   3     FB7_2   50    I/O     O
-cnt/RefCnt<4>         1       0     0   4     FB7_3         (b)     (b)
-cs/nOverlay0          2       0   \/3   0     FB7_4         (b)     (b)
-ram/RS_FSM_FFd3      11       6<-   0   0     FB7_5   52    I/O     I
-RA<6>                 2       0   /\3   0     FB7_6   53    I/O     O
-fsb/Ready0r           3       0     0   2     FB7_7         (b)     (b)
-ram/RS_FSM_FFd1       5       0     0   0     FB7_8   54    I/O     I
-RA<7>                 2       0   \/3   0     FB7_9   55    I/O     O
-ram/Once              5       3<- \/3   0     FB7_10        (b)     (b)
-ram/RAMDIS2           7       3<- \/1   0     FB7_11  56    I/O     I
-RA<8>                 2       1<- \/4   0     FB7_12  58    I/O     O
-ram/RS_FSM_FFd2      13       8<-   0   0     FB7_13        (b)     (b)
-cnt/RefCnt<7>         1       0   /\4   0     FB7_14  59    I/O     I
-RA<9>                 2       0   \/1   2     FB7_15  60    I/O     O
-cnt/RefCnt<6>         1       1<- \/5   0     FB7_16        (b)     (b)
-ram/RAMReady         16      11<-   0   0     FB7_17  61    I/O     I
-(unused)              0       0   /\5   0     FB7_18        (b)     (b)
-
-Signals Used by Logic in Function Block
-  1: A_FSB<15>         13: A_FSB<9>          25: fsb/ASrf 
-  2: A_FSB<16>         14: cnt/RefCnt<0>     26: fsb/Ready0r 
-  3: A_FSB<17>         15: cnt/RefCnt<1>     27: nAS_FSB 
-  4: A_FSB<18>         16: cnt/RefCnt<2>     28: ram/BACTr 
-  5: A_FSB<19>         17: cnt/RefCnt<3>     29: ram/Once 
-  6: A_FSB<20>         18: cnt/RefCnt<4>     30: ram/RAMDIS2 
-  7: A_FSB<21>         19: cnt/RefCnt<5>     31: ram/RAMReady 
-  8: A_FSB<22>         20: cnt/RefCnt<6>     32: ram/RASEL 
-  9: A_FSB<23>         21: cnt/RefCnt<7>     33: ram/RS_FSM_FFd1 
- 10: A_FSB<6>          22: cnt/RefDone       34: ram/RS_FSM_FFd2 
- 11: A_FSB<7>          23: cs/nOverlay0      35: ram/RS_FSM_FFd3 
- 12: A_FSB<8>          24: cs/nOverlay1     
-
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-cnt/RefCnt<5>        .............XXXXX...................... 5
-RA<5>                X........X.....................X........ 3
-cnt/RefCnt<4>        .............XXXX....................... 4
-cs/nOverlay0         .....XXXX.............X.X.X............. 7
-ram/RS_FSM_FFd3      ......XXX.........XXXX.XX.X.X...XXX..... 14
-RA<6>                .X........X....................X........ 3
-fsb/Ready0r          ......XXX..............XXXX...X......... 8
-ram/RS_FSM_FFd1      ......XXX..............XX.X.X...XXX..... 10
-RA<7>                ..X........X...................X........ 3
-ram/Once             ......XXX..............XX.X.X...XXX..... 10
-ram/RAMDIS2          ......XXX.........XXXX.XX.X.XX..XXX..... 15
-RA<8>                ...X........X..................X........ 3
-ram/RS_FSM_FFd2      ......XXX.........XXXX.XX.XX....XXX..... 14
-cnt/RefCnt<7>        .............XXXXXXX.................... 7
-RA<9>                ....XX.........................X........ 3
-cnt/RefCnt<6>        .............XXXXXX..................... 6
-ram/RAMReady         ......XXX.........XXXX.XX.XXX...XXX..... 15
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
-*********************************** FB8  ***********************************
-Number of function block inputs used/remaining:               8/46
-Number of signals used by logic mapping into function block:  8
-Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
-Name                Pt      Pt    Pt  Pt               #    Type    Use
-(unused)              0       0     0   5     FB8_1         (b)     
-RA<11>                1       0     0   4     FB8_2   63    I/O     O
-(unused)              0       0     0   5     FB8_3         (b)     
-(unused)              0       0     0   5     FB8_4         (b)     
-(unused)              0       0     0   5     FB8_5   64    I/O     I
-RA<10>                1       0     0   4     FB8_6   65    I/O     O
-(unused)              0       0     0   5     FB8_7         (b)     
-(unused)              0       0     0   5     FB8_8   66    I/O     I
-nADoutLE0             1       0     0   4     FB8_9   67    I/O     O
-(unused)              0       0     0   5     FB8_10        (b)     
-(unused)              0       0     0   5     FB8_11  68    I/O     I
-nAoutOE               0       0     0   5     FB8_12  70    I/O     O
-(unused)              0       0     0   5     FB8_13        (b)     
-(unused)              0       0     0   5     FB8_14  71    I/O     I
-nDinLE                1       0     0   4     FB8_15  72    I/O     O
-(unused)              0       0     0   5     FB8_16        (b)     
-iobm/IOS_FSM_FFd1     1       0     0   4     FB8_17  73    I/O     I
-iobm/Er               1       0     0   4     FB8_18        (b)     (b)
-
-Signals Used by Logic in Function Block
-  1: ALE0M              4: A_FSB<21>           7: iobm/IOS_FSM_FFd3 
-  2: ALE0S              5: E_IOB               8: iobm/IOS_FSM_FFd4 
-  3: A_FSB<19>          6: iobm/IOS_FSM_FFd2 
-
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-RA<11>               ..X..................................... 1
-RA<10>               ...X.................................... 1
-nADoutLE0            XX...................................... 2
-nAoutOE              ........................................ 0
-nDinLE               ......XX................................ 2
-iobm/IOS_FSM_FFd1    .....X.................................. 1
-iobm/Er              ....X................................... 1
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
-*******************************  Equations  ********************************
-
-********** Mapped Logic **********
-
-
-$OpTx$FX_DC$602 <= ((NOT TimeoutB)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20)));
-
-
-$OpTx$FX_DC$606 <= ((A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB)
-	OR (A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
-	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
-	cs/nOverlay1 AND NOT nWE_FSB AND NOT nADoutLE1)
-	OR (A_FSB(13) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
-	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
-	cs/nOverlay1 AND NOT nWE_FSB AND NOT nADoutLE1)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20))
-	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB));
-
-FDCPE_ALE0M: FDCPE port map (ALE0M,ALE0M_D,CLK2X_IOB,'0','0');
-ALE0M_D <= ((NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-	NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND NOT iobm/IOS_FSM_FFd7 AND 
-	NOT iobm/IOREQr)
-	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-	NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND NOT iobm/IOS_FSM_FFd7 AND 
-	NOT iobm/IOS_FSM_FFd8));
-
-FDCPE_ALE0S: FDCPE port map (ALE0S,ALE0S_D,CLK_FSB,'0','0');
-ALE0S_D <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1);
-
-FTCPE_BERR_IOBS: FTCPE port map (BERR_IOBS,BERR_IOBS_T,CLK_FSB,'0','0');
-BERR_IOBS_T <= ((BERR_IOBS AND nAS_FSB AND NOT fsb/ASrf)
-	OR (iobs/Once AND BERR_IOBS AND NOT IOBERR AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND nADoutLE1)
-	OR (iobs/Once AND NOT BERR_IOBS AND IOBERR AND NOT nAS_FSB AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND nADoutLE1)
-	OR (iobs/Once AND NOT BERR_IOBS AND IOBERR AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND fsb/ASrf AND nADoutLE1));
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-FDCPE_IOACT: FDCPE port map (IOACT,IOACT_D,CLK2X_IOB,'0','0');
-IOACT_D <= ((NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND 
-	NOT iobm/IOS_FSM_FFd6 AND CLK_IOB AND NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOS_FSM_FFd8 AND 
-	iobm/BERRrf AND iobm/BERRrr)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND 
-	NOT iobm/IOS_FSM_FFd6 AND CLK_IOB AND NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOS_FSM_FFd8 AND 
-	iobm/DTACKrf AND iobm/DTACKrr)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND 
-	NOT iobm/IOS_FSM_FFd6 AND CLK_IOB AND NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOS_FSM_FFd8 AND 
-	iobm/RESrf AND iobm/RESrr)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND 
-	NOT iobm/IOS_FSM_FFd6 AND CLK_IOB AND NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOREQr AND 
-	iobm/DTACKrf AND iobm/DTACKrr)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND 
-	NOT iobm/IOS_FSM_FFd6 AND CLK_IOB AND NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOREQr AND 
-	iobm/RESrf AND iobm/RESrr)
-	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-	NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND NOT iobm/IOS_FSM_FFd7 AND 
-	NOT iobm/IOREQr)
-	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-	NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND NOT iobm/IOS_FSM_FFd7 AND 
-	NOT iobm/IOS_FSM_FFd8)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND 
-	NOT iobm/IOS_FSM_FFd6 AND CLK_IOB AND NOT iobm/IOS_FSM_FFd7 AND iobm/ETACK AND 
-	NOT iobm/IOREQr)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND 
-	NOT iobm/IOS_FSM_FFd6 AND CLK_IOB AND NOT iobm/IOS_FSM_FFd7 AND iobm/ETACK AND 
-	NOT iobm/IOS_FSM_FFd8)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND 
-	NOT iobm/IOS_FSM_FFd6 AND CLK_IOB AND NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOREQr AND 
-	iobm/BERRrf AND iobm/BERRrr));
-
-FTCPE_IOBERR: FTCPE port map (IOBERR,IOBERR_T,CLK2X_IOB,'0','0');
-IOBERR_T <= ((nBERR_IOB AND IOBERR AND iobm/IOS_FSM_FFd3 AND 
-	CLK_IOB AND iobm/DTACKrf AND iobm/DTACKrr)
-	OR (nBERR_IOB AND IOBERR AND iobm/IOS_FSM_FFd3 AND 
-	CLK_IOB AND iobm/RESrf AND iobm/RESrr)
-	OR (NOT nBERR_IOB AND NOT IOBERR AND iobm/IOS_FSM_FFd3 AND 
-	CLK_IOB AND iobm/BERRrf AND iobm/BERRrr)
-	OR (NOT nBERR_IOB AND NOT IOBERR AND iobm/IOS_FSM_FFd3 AND 
-	CLK_IOB AND iobm/DTACKrf AND iobm/DTACKrr)
-	OR (NOT nBERR_IOB AND NOT IOBERR AND iobm/IOS_FSM_FFd3 AND 
-	CLK_IOB AND iobm/RESrf AND iobm/RESrr)
-	OR (nBERR_IOB AND IOBERR AND iobm/IOS_FSM_FFd3 AND 
-	CLK_IOB AND iobm/ETACK)
-	OR (NOT nBERR_IOB AND NOT IOBERR AND iobm/IOS_FSM_FFd3 AND 
-	CLK_IOB AND iobm/ETACK)
-	OR (nBERR_IOB AND IOBERR AND iobm/IOS_FSM_FFd3 AND 
-	CLK_IOB AND iobm/BERRrf AND iobm/BERRrr));
-
-FDCPE_IOL0: FDCPE port map (IOL0,IOL0_D,CLK_FSB,'0','0',IOL0_CE);
-IOL0_D <= ((NOT nLDS_FSB AND nADoutLE1)
-	OR (iobs/IOL1 AND NOT nADoutLE1));
-IOL0_CE <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1);
-
-FDCPE_IOREQ: FDCPE port map (IOREQ,IOREQ_D,CLK_FSB,'0','0');
-IOREQ_D <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND 
-	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
-	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND 
-	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND 
-	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB AND 
-	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND 
-	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND 
-	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21) AND 
-	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	cs/nOverlay1 AND NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT iobs/PS_FSM_FFd2 AND iobs/PS_FSM_FFd1)
-	OR (iobs/PS_FSM_FFd1 AND iobs/IOACTr)
-	OR (iobs/Once AND NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND NOT iobs/PS_FSM_FFd2 AND 
-	nADoutLE1)
-	OR (nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT fsb/ASrf AND 
-	nADoutLE1));
-
-FTCPE_IORW0: FTCPE port map (IORW0,IORW0_T,CLK_FSB,'0','0');
-IORW0_T <= ((EXP22_.EXP)
-	OR (A_FSB(23) AND NOT iobs/Once AND NOT IORW0 AND nWE_FSB AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT iobs/Once AND 
-	IORW0 AND NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT iobs/Once AND 
-	IORW0 AND NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND 
-	fsb/ASrf AND nADoutLE1)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT iobs/Once AND 
-	NOT IORW0 AND nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT iobs/Once AND 
-	NOT IORW0 AND nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND 
-	fsb/ASrf AND nADoutLE1)
-	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND 
-	NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND 
-	NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1)
-	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND 
-	NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND 
-	NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1)
-	OR (IORW0 AND NOT iobs/IORW1 AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND NOT nADoutLE1)
-	OR (NOT IORW0 AND iobs/IORW1 AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND NOT nADoutLE1)
-	OR (A_FSB(23) AND NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND 
-	NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (A_FSB(23) AND NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1)
-	OR (A_FSB(23) AND NOT iobs/Once AND NOT IORW0 AND nWE_FSB AND 
-	NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1));
-
-FDCPE_IOU0: FDCPE port map (IOU0,IOU0_D,CLK_FSB,'0','0',IOU0_CE);
-IOU0_D <= ((NOT nUDS_FSB AND nADoutLE1)
-	OR (iobs/IOU1 AND NOT nADoutLE1));
-IOU0_CE <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1);
-
-
-RA(0) <= ((A_FSB(10) AND NOT ram/RASEL)
-	OR (ram/RASEL AND A_FSB(1)));
-
-
-RA(1) <= ((A_FSB(11) AND NOT ram/RASEL)
-	OR (ram/RASEL AND A_FSB(2)));
-
-
-RA(2) <= ((A_FSB(12) AND NOT ram/RASEL)
-	OR (ram/RASEL AND A_FSB(3)));
-
-
-RA(3) <= ((A_FSB(13) AND NOT ram/RASEL)
-	OR (ram/RASEL AND A_FSB(4)));
-
-
-RA(4) <= ((A_FSB(14) AND NOT ram/RASEL)
-	OR (ram/RASEL AND A_FSB(5)));
-
-
-RA(5) <= ((A_FSB(15) AND NOT ram/RASEL)
-	OR (ram/RASEL AND A_FSB(6)));
-
-
-RA(6) <= ((A_FSB(16) AND NOT ram/RASEL)
-	OR (ram/RASEL AND A_FSB(7)));
-
-
-RA(7) <= ((A_FSB(8) AND ram/RASEL)
-	OR (A_FSB(17) AND NOT ram/RASEL));
-
-
-RA(8) <= ((A_FSB(9) AND ram/RASEL)
-	OR (A_FSB(18) AND NOT ram/RASEL));
-
-
-RA(9) <= ((A_FSB(20) AND ram/RASEL)
-	OR (A_FSB(19) AND NOT ram/RASEL));
-
-
-RA(10) <= A_FSB(21);
-
-
-RA(11) <= A_FSB(19);
-
-FDCPE_RefAck: FDCPE port map (RefAck,RefAck_D,CLK_FSB,'0','0');
-RefAck_D <= (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1);
-
-FTCPE_TimeoutA: FTCPE port map (TimeoutA,TimeoutA_T,CLK_FSB,'0','0');
-TimeoutA_T <= ((TimeoutA AND nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT TimeoutA AND NOT nAS_FSB AND NOT cnt/RefCnt(0) AND 
-	NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND 
-	NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4))
-	OR (NOT TimeoutA AND NOT cnt/RefCnt(0) AND NOT cnt/RefCnt(5) AND 
-	NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND NOT cnt/RefCnt(3) AND 
-	NOT cnt/RefCnt(4) AND fsb/ASrf));
-
-FTCPE_TimeoutB: FTCPE port map (TimeoutB,TimeoutB_T,CLK_FSB,'0','0');
-TimeoutB_T <= ((TimeoutB AND nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT TimeoutB AND cnt/TimeoutBPre AND NOT nAS_FSB AND 
-	NOT cnt/RefCnt(0) AND NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND 
-	NOT cnt/RefCnt(2) AND NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4) AND NOT cnt/RefCnt(7))
-	OR (NOT TimeoutB AND cnt/TimeoutBPre AND NOT cnt/RefCnt(0) AND 
-	NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND 
-	NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4) AND NOT cnt/RefCnt(7) AND fsb/ASrf));
-
-FTCPE_cnt/RefCnt0: FTCPE port map (cnt/RefCnt(0),'1',CLK_FSB,'0','0');
-
-FTCPE_cnt/RefCnt1: FTCPE port map (cnt/RefCnt(1),cnt/RefCnt(0),CLK_FSB,'0','0');
-
-FTCPE_cnt/RefCnt2: FTCPE port map (cnt/RefCnt(2),cnt/RefCnt_T(2),CLK_FSB,'0','0');
-cnt/RefCnt_T(2) <= (cnt/RefCnt(0) AND cnt/RefCnt(1));
-
-FTCPE_cnt/RefCnt3: FTCPE port map (cnt/RefCnt(3),cnt/RefCnt_T(3),CLK_FSB,'0','0');
-cnt/RefCnt_T(3) <= (cnt/RefCnt(0) AND cnt/RefCnt(1) AND cnt/RefCnt(2));
-
-FTCPE_cnt/RefCnt4: FTCPE port map (cnt/RefCnt(4),cnt/RefCnt_T(4),CLK_FSB,'0','0');
-cnt/RefCnt_T(4) <= (cnt/RefCnt(0) AND cnt/RefCnt(1) AND cnt/RefCnt(2) AND 
-	cnt/RefCnt(3));
-
-FTCPE_cnt/RefCnt5: FTCPE port map (cnt/RefCnt(5),cnt/RefCnt_T(5),CLK_FSB,'0','0');
-cnt/RefCnt_T(5) <= (cnt/RefCnt(0) AND cnt/RefCnt(1) AND cnt/RefCnt(2) AND 
-	cnt/RefCnt(3) AND cnt/RefCnt(4));
-
-FTCPE_cnt/RefCnt6: FTCPE port map (cnt/RefCnt(6),cnt/RefCnt_T(6),CLK_FSB,'0','0');
-cnt/RefCnt_T(6) <= (cnt/RefCnt(0) AND cnt/RefCnt(5) AND cnt/RefCnt(1) AND 
-	cnt/RefCnt(2) AND cnt/RefCnt(3) AND cnt/RefCnt(4));
-
-FTCPE_cnt/RefCnt7: FTCPE port map (cnt/RefCnt(7),cnt/RefCnt_T(7),CLK_FSB,'0','0');
-cnt/RefCnt_T(7) <= (cnt/RefCnt(0) AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND 
-	cnt/RefCnt(1) AND cnt/RefCnt(2) AND cnt/RefCnt(3) AND cnt/RefCnt(4));
-
-FDCPE_cnt/RefDone: FDCPE port map (cnt/RefDone,cnt/RefDone_D,CLK_FSB,'0','0');
-cnt/RefDone_D <= ((NOT cnt/RefDone AND NOT RefAck)
-	OR (NOT cnt/RefCnt(0) AND NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND 
-	NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4) AND 
-	NOT cnt/RefCnt(7)));
-
-FTCPE_cnt/TimeoutBPre: FTCPE port map (cnt/TimeoutBPre,cnt/TimeoutBPre_T,CLK_FSB,'0','0');
-cnt/TimeoutBPre_T <= ((cnt/TimeoutBPre AND nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT cnt/TimeoutBPre AND NOT nAS_FSB AND NOT cnt/RefCnt(0) AND 
-	NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND 
-	NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4) AND NOT cnt/RefCnt(7))
-	OR (NOT cnt/TimeoutBPre AND NOT cnt/RefCnt(0) AND NOT cnt/RefCnt(5) AND 
-	NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND NOT cnt/RefCnt(3) AND 
-	NOT cnt/RefCnt(4) AND NOT cnt/RefCnt(7) AND fsb/ASrf));
-
-FTCPE_cs/nOverlay0: FTCPE port map (cs/nOverlay0,cs/nOverlay0_T,CLK_FSB,NOT nRES,'0');
-cs/nOverlay0_T <= ((NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND 
-	NOT cs/nOverlay0 AND NOT nAS_FSB)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND 
-	NOT cs/nOverlay0 AND fsb/ASrf));
-
-FDCPE_cs/nOverlay1: FDCPE port map (cs/nOverlay1,cs/nOverlay0,CLK_FSB,'0','0',cs/nOverlay1_CE);
-cs/nOverlay1_CE <= (nAS_FSB AND NOT fsb/ASrf);
-
-FDCPE_fsb/ASrf: FDCPE port map (fsb/ASrf,NOT nAS_FSB,NOT CLK_FSB,'0','0');
-
-FDCPE_fsb/BERR0r: FDCPE port map (fsb/BERR0r,fsb/BERR0r_D,CLK_FSB,'0','0');
-fsb/BERR0r_D <= ((NOT TimeoutB AND NOT fsb/BERR0r)
-	OR (nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND 
-	NOT fsb/BERR0r));
-
-FDCPE_fsb/BERR1r: FDCPE port map (fsb/BERR1r,fsb/BERR1r_D,CLK_FSB,'0','0');
-fsb/BERR1r_D <= ((NOT BERR_IOBS AND NOT fsb/BERR1r)
-	OR (nAS_FSB AND NOT fsb/ASrf));
-
-FDCPE_fsb/Ready0r: FDCPE port map (fsb/Ready0r,fsb/Ready0r_D,CLK_FSB,'0','0');
-fsb/Ready0r_D <= ((nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-	NOT fsb/Ready0r AND NOT ram/RAMReady)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT fsb/Ready0r AND NOT ram/RAMReady));
-
-FDCPE_fsb/Ready1r: FDCPE port map (fsb/Ready1r,fsb/Ready1r_D,CLK_FSB,'0','0');
-fsb/Ready1r_D <= ((A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
-	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
-	cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND NOT iobs/IOReady AND 
-	NOT nADoutLE1)
-	OR (A_FSB(13) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
-	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
-	cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND NOT iobs/IOReady AND 
-	NOT nADoutLE1)
-	OR (nAS_FSB AND NOT fsb/ASrf)
-	OR (A_FSB(23) AND NOT fsb/Ready1r AND NOT iobs/IOReady)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT fsb/Ready1r AND 
-	NOT iobs/IOReady)
-	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-	NOT fsb/Ready1r AND NOT iobs/IOReady)
-	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-	NOT fsb/Ready1r AND NOT iobs/IOReady));
-
-FDCPE_fsb/Ready2r: FDCPE port map (fsb/Ready2r,fsb/Ready2r_D,CLK_FSB,'0','0');
-fsb/Ready2r_D <= ((nAS_FSB AND NOT fsb/ASrf)
-	OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(8) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(9) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(9) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(8) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r));
-
-FDCPE_fsb/VPA: FDCPE port map (fsb/VPA,fsb/VPA_D,CLK_FSB,'0','0');
-fsb/VPA_D <= ((EXP18_.EXP)
-	OR (BERR_IOBS AND fsb/VPA AND fsb/ASrf)
-	OR (fsb/BERR0r AND fsb/VPA AND fsb/ASrf)
-	OR (fsb/BERR1r AND fsb/VPA AND fsb/ASrf)
-	OR (fsb/VPA AND fsb/ASrf AND 
-	fsb/VPA__or00001/fsb/VPA__or00001_D2)
-	OR (fsb/VPA AND fsb/ASrf AND NOT $OpTx$FX_DC$602)
-	OR ($OpTx$FX_DC$602.EXP)
-	OR (NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND NOT nAS_FSB AND 
-	$OpTx$FX_DC$606)
-	OR (NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND fsb/ASrf AND 
-	$OpTx$FX_DC$606)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-	NOT fsb/Ready0r AND fsb/VPA AND NOT nAS_FSB AND NOT ram/RAMReady)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-	NOT fsb/Ready0r AND fsb/VPA AND fsb/ASrf AND NOT ram/RAMReady)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT fsb/Ready0r AND fsb/VPA AND NOT nAS_FSB AND NOT ram/RAMReady)
-	OR (BERR_IOBS AND fsb/VPA AND NOT nAS_FSB)
-	OR (fsb/BERR0r AND fsb/VPA AND NOT nAS_FSB)
-	OR (fsb/BERR1r AND fsb/VPA AND NOT nAS_FSB)
-	OR (fsb/VPA AND NOT nAS_FSB AND 
-	fsb/VPA__or00001/fsb/VPA__or00001_D2)
-	OR (fsb/VPA AND NOT nAS_FSB AND NOT $OpTx$FX_DC$602));
-
-
-fsb/VPA__or00001/fsb/VPA__or00001_D2 <= ((A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(9) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(8) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(9) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(8) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r));
-
-FDCPE_iobm/BERRrf: FDCPE port map (iobm/BERRrf,NOT nBERR_IOB,NOT CLK2X_IOB,'0','0');
-
-FDCPE_iobm/BERRrr: FDCPE port map (iobm/BERRrr,NOT nBERR_IOB,CLK2X_IOB,'0','0');
-
-FDCPE_iobm/DTACKrf: FDCPE port map (iobm/DTACKrf,NOT nDTACK_IOB,NOT CLK2X_IOB,'0','0');
-
-FDCPE_iobm/DTACKrr: FDCPE port map (iobm/DTACKrr,NOT nDTACK_IOB,CLK2X_IOB,'0','0');
-
-FTCPE_iobm/ES0: FTCPE port map (iobm/ES(0),iobm/ES_T(0),CLK2X_IOB,'0','0');
-iobm/ES_T(0) <= ((iobm/ES(0) AND NOT iobm/Er AND iobm/Er2)
-	OR (NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND 
-	NOT iobm/ES(3) AND NOT iobm/ES(4) AND iobm/Er)
-	OR (NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND 
-	NOT iobm/ES(3) AND NOT iobm/ES(4) AND NOT iobm/Er2));
-
-FDCPE_iobm/ES1: FDCPE port map (iobm/ES(1),iobm/ES_D(1),CLK2X_IOB,'0','0');
-iobm/ES_D(1) <= ((iobm/ES(0) AND iobm/ES(1))
-	OR (NOT iobm/ES(0) AND NOT iobm/ES(1))
-	OR (NOT iobm/Er AND iobm/Er2));
-
-FDCPE_iobm/ES2: FDCPE port map (iobm/ES(2),iobm/ES_D(2),CLK2X_IOB,'0','0');
-iobm/ES_D(2) <= ((NOT iobm/ES(0) AND NOT iobm/ES(2))
-	OR (NOT iobm/ES(1) AND NOT iobm/ES(2))
-	OR (NOT iobm/Er AND iobm/Er2)
-	OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2))
-	OR (NOT iobm/ES(2) AND NOT iobm/ES(3) AND iobm/ES(4)));
-
-FTCPE_iobm/ES3: FTCPE port map (iobm/ES(3),iobm/ES_T(3),CLK2X_IOB,'0','0');
-iobm/ES_T(3) <= ((iobm/ES(3) AND NOT iobm/Er AND iobm/Er2)
-	OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND iobm/Er)
-	OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND NOT iobm/Er2));
-
-FTCPE_iobm/ES4: FTCPE port map (iobm/ES(4),iobm/ES_T(4),CLK2X_IOB,'0','0');
-iobm/ES_T(4) <= ((iobm/ES(4) AND NOT iobm/Er AND iobm/Er2)
-	OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND 
-	iobm/ES(3) AND iobm/Er)
-	OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND 
-	iobm/ES(3) AND NOT iobm/Er2)
-	OR (iobm/ES(0) AND iobm/ES(1) AND NOT iobm/ES(2) AND 
-	NOT iobm/ES(3) AND iobm/ES(4)));
-
-FDCPE_iobm/ETACK: FDCPE port map (iobm/ETACK,iobm/ETACK_D,CLK2X_IOB,'0','0');
-iobm/ETACK_D <= (NOT nVMA_IOB AND NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND 
-	NOT iobm/ES(3) AND iobm/ES(4));
-
-FDCPE_iobm/Er: FDCPE port map (iobm/Er,E_IOB,NOT CLK_IOB,'0','0');
-
-FDCPE_iobm/Er2: FDCPE port map (iobm/Er2,iobm/Er,CLK2X_IOB,'0','0');
-
-FDCPE_iobm/IOREQr: FDCPE port map (iobm/IOREQr,IOREQ,NOT CLK2X_IOB,'0','0');
-
-FDCPE_iobm/IOS_FSM_FFd1: FDCPE port map (iobm/IOS_FSM_FFd1,iobm/IOS_FSM_FFd2,CLK2X_IOB,'0','0');
-
-FDCPE_iobm/IOS_FSM_FFd2: FDCPE port map (iobm/IOS_FSM_FFd2,iobm/IOS_FSM_FFd2_D,CLK2X_IOB,'0','0');
-iobm/IOS_FSM_FFd2_D <= ((iobm/IOS_FSM_FFd3 AND CLK_IOB AND iobm/ETACK)
-	OR (iobm/IOS_FSM_FFd3 AND CLK_IOB AND iobm/BERRrf AND 
-	iobm/BERRrr)
-	OR (iobm/IOS_FSM_FFd3 AND CLK_IOB AND iobm/DTACKrf AND 
-	iobm/DTACKrr)
-	OR (iobm/IOS_FSM_FFd3 AND CLK_IOB AND iobm/RESrf AND 
-	iobm/RESrr));
-
-FDCPE_iobm/IOS_FSM_FFd3: FDCPE port map (iobm/IOS_FSM_FFd3,iobm/IOS_FSM_FFd3_D,CLK2X_IOB,'0','0');
-iobm/IOS_FSM_FFd3_D <= ((NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4)
-	OR (NOT iobm/IOS_FSM_FFd4 AND CLK_IOB AND iobm/ETACK)
-	OR (NOT iobm/IOS_FSM_FFd4 AND CLK_IOB AND iobm/BERRrf AND 
-	iobm/BERRrr)
-	OR (NOT iobm/IOS_FSM_FFd4 AND CLK_IOB AND iobm/DTACKrf AND 
-	iobm/DTACKrr)
-	OR (NOT iobm/IOS_FSM_FFd4 AND CLK_IOB AND iobm/RESrf AND 
-	iobm/RESrr));
-
-FDCPE_iobm/IOS_FSM_FFd4: FDCPE port map (iobm/IOS_FSM_FFd4,iobm/IOS_FSM_FFd5,CLK2X_IOB,'0','0');
-
-FDCPE_iobm/IOS_FSM_FFd5: FDCPE port map (iobm/IOS_FSM_FFd5,iobm/IOS_FSM_FFd6,CLK2X_IOB,'0','0');
-
-FDCPE_iobm/IOS_FSM_FFd6: FDCPE port map (iobm/IOS_FSM_FFd6,iobm/IOS_FSM_FFd7,CLK2X_IOB,'0','0');
-
-FDCPE_iobm/IOS_FSM_FFd7: FDCPE port map (iobm/IOS_FSM_FFd7,iobm/IOS_FSM_FFd7_D,CLK2X_IOB,'0','0');
-iobm/IOS_FSM_FFd7_D <= (NOT CLK_IOB AND iobm/IOREQr AND iobm/IOS_FSM_FFd8);
-
-FDCPE_iobm/IOS_FSM_FFd8: FDCPE port map (iobm/IOS_FSM_FFd8,iobm/IOS_FSM_FFd8_D,CLK2X_IOB,'0','0');
-iobm/IOS_FSM_FFd8_D <= ((NOT iobm/IOS_FSM_FFd8 AND NOT iobm/IOS_FSM_FFd1)
-	OR (NOT CLK_IOB AND iobm/IOREQr AND NOT iobm/IOS_FSM_FFd1));
-
-FDCPE_iobm/RESrf: FDCPE port map (iobm/RESrf,NOT nRES,NOT CLK2X_IOB,'0','0');
-
-FDCPE_iobm/RESrr: FDCPE port map (iobm/RESrr,NOT nRES,CLK2X_IOB,'0','0');
-
-FDCPE_iobm/VPArf: FDCPE port map (iobm/VPArf,NOT nVPA_IOB,NOT CLK2X_IOB,'0','0');
-
-FDCPE_iobm/VPArr: FDCPE port map (iobm/VPArr,NOT nVPA_IOB,CLK2X_IOB,'0','0');
-
-FDCPE_iobs/Clear1: FDCPE port map (iobs/Clear1,iobs/Clear1_D,CLK_FSB,'0','0');
-iobs/Clear1_D <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND NOT nADoutLE1);
-
-FDCPE_iobs/IOACTr: FDCPE port map (iobs/IOACTr,IOACT,CLK_FSB,'0','0');
-
-FDCPE_iobs/IOL1: FDCPE port map (iobs/IOL1,NOT nLDS_FSB,CLK_FSB,'0','0',iobs/Load1);
-
-FTCPE_iobs/IORW1: FTCPE port map (iobs/IORW1,iobs/IORW1_T,CLK_FSB,'0','0');
-iobs/IORW1_T <= ((iobs/Once)
-	OR (NOT nADoutLE1)
-	OR (nVMA_IOB_OBUF.EXP)
-	OR (NOT nWE_FSB AND NOT iobs/IORW1)
-	OR (nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21))
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19))
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18))
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17))
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16))
-	OR (NOT A_FSB(23) AND NOT A_FSB(20))
-	OR (nWE_FSB AND iobs/IORW1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT iobs/IORW1));
-
-FTCPE_iobs/IOReady: FTCPE port map (iobs/IOReady,iobs/IOReady_T,CLK_FSB,'0','0');
-iobs/IOReady_T <= ((iobs/IOReady AND nAS_FSB AND NOT fsb/ASrf)
-	OR (iobs/Once AND IOBERR AND iobs/IOReady AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND nADoutLE1)
-	OR (iobs/Once AND NOT IOBERR AND NOT iobs/IOReady AND NOT nAS_FSB AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND nADoutLE1)
-	OR (iobs/Once AND NOT IOBERR AND NOT iobs/IOReady AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND fsb/ASrf AND nADoutLE1));
-
-FDCPE_iobs/IOU1: FDCPE port map (iobs/IOU1,NOT nUDS_FSB,CLK_FSB,'0','0',iobs/Load1);
-
-FDCPE_iobs/Load1: FDCPE port map (iobs/Load1,iobs/Load1_D,CLK_FSB,'0','0');
-iobs/Load1_D <= ((iobs/Once)
-	OR (NOT nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21))
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19))
-	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18))
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17))
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16))
-	OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21))
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	cs/nOverlay1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(20))
-	OR (nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1));
-
-FDCPE_iobs/Once: FDCPE port map (iobs/Once,iobs/Once_D,CLK_FSB,'0','0');
-iobs/Once_D <= ((RA_2_OBUF.EXP)
-	OR (A_FSB(23) AND NOT iobs/Once AND iobs/PS_FSM_FFd1)
-	OR (NOT iobs/Once AND iobs/PS_FSM_FFd2 AND NOT nADoutLE1)
-	OR (NOT iobs/Once AND iobs/PS_FSM_FFd1 AND NOT nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND NOT iobs/Once)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
-	NOT iobs/Once)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND NOT iobs/Once)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND NOT iobs/Once)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND NOT iobs/Once)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND NOT iobs/Once)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT iobs/Once AND nWE_FSB)
-	OR (nAS_FSB AND NOT fsb/ASrf)
-	OR (A_FSB(23) AND NOT iobs/Once AND iobs/PS_FSM_FFd2)
-	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND NOT iobs/Once)
-	OR (A_FSB(22) AND NOT iobs/Once AND iobs/PS_FSM_FFd2)
-	OR (A_FSB(22) AND NOT iobs/Once AND iobs/PS_FSM_FFd1));
-
-FDCPE_iobs/PS_FSM_FFd1: FDCPE port map (iobs/PS_FSM_FFd1,iobs/PS_FSM_FFd1_D,CLK_FSB,'0','0');
-iobs/PS_FSM_FFd1_D <= ((iobs/PS_FSM_FFd2)
-	OR (iobs/PS_FSM_FFd1 AND iobs/IOACTr));
-
-FDCPE_iobs/PS_FSM_FFd2: FDCPE port map (iobs/PS_FSM_FFd2,iobs/PS_FSM_FFd2_D,CLK_FSB,'0','0');
-iobs/PS_FSM_FFd2_D <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21) AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	cs/nOverlay1 AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (iobs/PS_FSM_FFd2 AND iobs/PS_FSM_FFd1 AND 
-	iobs/IOACTr)
-	OR (NOT iobs/PS_FSM_FFd2 AND iobs/PS_FSM_FFd1 AND 
-	NOT iobs/IOACTr)
-	OR (iobs/Once AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND 
-	nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND 
-	NOT fsb/ASrf AND nADoutLE1));
-
-
-nADoutLE0 <= (NOT ALE0M AND NOT ALE0S);
-
-FDCPE_nADoutLE1: FDCPE port map (nADoutLE1,nADoutLE1_D,CLK_FSB,'0','0');
-nADoutLE1_D <= ((iobs/Load1)
-	OR (NOT iobs/Clear1 AND NOT nADoutLE1));
-
-FDCPE_nAS_IOB: FDCPE port map (nAS_IOB,nAS_IOB_D,NOT CLK2X_IOB,'0','0');
-nAS_IOB_D <= (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-	NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND NOT iobm/IOS_FSM_FFd7);
-
-
-nAoutOE <= '0';
-
-
-nBERR_FSB <= ((nAS_FSB)
-	OR (NOT BERR_IOBS AND NOT TimeoutB AND NOT fsb/BERR0r AND NOT fsb/BERR1r)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND 
-	NOT BERR_IOBS AND NOT fsb/BERR0r AND NOT fsb/BERR1r));
-
-FDCPE_nCAS: FDCPE port map (nCAS,NOT ram/RASEL,NOT CLK_FSB,'0','0');
-
-FDCPE_nDTACK_FSB: FDCPE port map (nDTACK_FSB,nDTACK_FSB_D,CLK_FSB,'0','0');
-nDTACK_FSB_D <= ((EXP21_.EXP)
-	OR (A_FSB(23) AND NOT fsb/Ready1r AND NOT iobs/IOReady AND 
-	nDTACK_FSB)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-	NOT fsb/Ready0r AND nDTACK_FSB AND NOT ram/RAMReady)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT fsb/Ready1r AND 
-	NOT iobs/IOReady AND nDTACK_FSB)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT fsb/Ready0r AND nDTACK_FSB AND NOT ram/RAMReady)
-	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-	NOT fsb/Ready1r AND NOT iobs/IOReady AND nDTACK_FSB)
-	OR ($OpTx$FX_DC$606.EXP)
-	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-	NOT fsb/Ready1r AND NOT iobs/IOReady AND nDTACK_FSB)
-	OR (A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
-	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
-	cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND NOT iobs/IOReady AND 
-	nDTACK_FSB AND NOT nADoutLE1)
-	OR (A_FSB(13) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
-	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
-	cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND NOT iobs/IOReady AND 
-	nDTACK_FSB AND NOT nADoutLE1)
-	OR (A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND 
-	nDTACK_FSB)
-	OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND 
-	nDTACK_FSB)
-	OR (BERR_IOBS AND nDTACK_FSB)
-	OR (fsb/BERR0r AND nDTACK_FSB)
-	OR (fsb/BERR1r AND nDTACK_FSB)
-	OR (nAS_FSB AND NOT fsb/ASrf)
-	OR (nDTACK_FSB AND NOT $OpTx$FX_DC$602));
-
-FDCPE_nDinLE: FDCPE port map (nDinLE,nDinLE_D,NOT CLK2X_IOB,'0','0');
-nDinLE_D <= (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4);
-
-
-nDinOE <= ((A_FSB(23) AND nWE_FSB AND NOT nAS_FSB)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND nWE_FSB AND 
-	NOT nAS_FSB));
-
-FDCPE_nDoutOE: FDCPE port map (nDoutOE,nDoutOE_D,CLK2X_IOB,'0','0');
-nDoutOE_D <= ((NOT IORW0)
-	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-	NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND NOT iobm/IOS_FSM_FFd7 AND 
-	NOT iobm/IOS_FSM_FFd2));
-
-FDCPE_nLDS_IOB: FDCPE port map (nLDS_IOB,nLDS_IOB_D,NOT CLK2X_IOB,'0','0');
-nLDS_IOB_D <= ((NOT IOL0)
-	OR (IORW0 AND NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-	NOT iobm/IOS_FSM_FFd5)
-	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-	NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND NOT iobm/IOS_FSM_FFd7));
-
-
-nOE <= NOT ((nWE_FSB AND NOT nAS_FSB));
-
-
-nRAMLWE <= NOT ((NOT nWE_FSB AND NOT nLDS_FSB AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND 
-	NOT ram/RAMDIS1));
-
-
-nRAMUWE <= NOT ((NOT nWE_FSB AND NOT nUDS_FSB AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND 
-	NOT ram/RAMDIS1));
-
-
-nRAS <= NOT (((RefAck)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-	NOT ram/RAMDIS2 AND NOT nAS_FSB AND NOT ram/RAMDIS1)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND NOT ram/RAMDIS1)));
-
-
-nROMCS <= NOT (((NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20))
-	OR (NOT A_FSB(23) AND NOT A_FSB(21) AND NOT A_FSB(20) AND 
-	NOT cs/nOverlay1)));
-
-
-nROMWE <= NOT ((NOT nWE_FSB AND NOT nAS_FSB));
-
-FDCPE_nUDS_IOB: FDCPE port map (nUDS_IOB,nUDS_IOB_D,NOT CLK2X_IOB,'0','0');
-nUDS_IOB_D <= ((NOT IOU0)
-	OR (IORW0 AND NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-	NOT iobm/IOS_FSM_FFd5)
-	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-	NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND NOT iobm/IOS_FSM_FFd7));
-
-FTCPE_nVMA_IOB: FTCPE port map (nVMA_IOB,nVMA_IOB_T,CLK2X_IOB,'0','0');
-nVMA_IOB_T <= ((NOT nVMA_IOB AND NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND 
-	NOT iobm/ES(3) AND NOT iobm/ES(4))
-	OR (nVMA_IOB AND iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND 
-	NOT iobm/ES(3) AND NOT iobm/ES(4) AND IOACT AND iobm/VPArf AND iobm/VPArr));
-
-
-nVPA_FSB <= NOT ((fsb/VPA AND NOT nAS_FSB));
-
-FDCPE_ram/BACTr: FDCPE port map (ram/BACTr,ram/BACTr_D,CLK_FSB,'0','0');
-ram/BACTr_D <= (nAS_FSB AND NOT fsb/ASrf);
-
-FTCPE_ram/Once: FTCPE port map (ram/Once,ram/Once_T,CLK_FSB,'0','0');
-ram/Once_T <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/Once AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3 AND fsb/ASrf)
-	OR (ram/Once AND nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3));
-
-FDCPE_ram/RAMDIS1: FDCPE port map (ram/RAMDIS1,ram/RAMDIS1_D,CLK_FSB,'0','0');
-ram/RAMDIS1_D <= ((RA_4_OBUF.EXP)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND NOT nAS_FSB AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
-	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (ram/Once AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
-	OR (NOT cnt/RefDone AND ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
-	OR (NOT cnt/RefDone AND nAS_FSB AND NOT ram/RS_FSM_FFd1 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND NOT fsb/ASrf)
-	OR (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1)
-	OR (NOT ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3)
-	OR (NOT ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3)
-	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT nAS_FSB AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/BACTr AND fsb/ASrf));
-
-FTCPE_ram/RAMDIS2: FTCPE port map (ram/RAMDIS2,ram/RAMDIS2_T,CLK_FSB,'0','0');
-ram/RAMDIS2_T <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND ram/Once AND 
-	NOT cnt/RefDone AND NOT ram/RAMDIS2 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
-	fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND fsb/ASrf)
-	OR (ram/RAMDIS2 AND nAS_FSB AND NOT fsb/ASrf)
-	OR (ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND 
-	ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
-	OR (ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND 
-	ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND fsb/ASrf)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND ram/Once AND 
-	NOT cnt/RefDone AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND 
-	cnt/RefCnt(7)));
-
-FDCPE_ram/RAMReady: FDCPE port map (ram/RAMReady,ram/RAMReady_D,CLK_FSB,'0','0');
-ram/RAMReady_D <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
-	NOT ram/RS_FSM_FFd1 AND fsb/ASrf)
-	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/Once AND NOT ram/RS_FSM_FFd1 AND fsb/ASrf)
-	OR (cnt/RefCnt(5).EXP)
-	OR (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3)
-	OR (NOT ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1)
-	OR (NOT ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3)
-	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT nAS_FSB AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/BACTr AND fsb/ASrf)
-	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (NOT A_FSB(21) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (NOT A_FSB(21) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/Once AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd1));
-
-FDCPE_ram/RASEL: FDCPE port map (ram/RASEL,ram/RASEL_D,CLK_FSB,'0','0');
-ram/RASEL_D <= ((A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT cnt/RefDone AND nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
-	NOT fsb/ASrf)
-	OR (NOT cnt/RefDone AND nAS_FSB AND ram/RS_FSM_FFd1 AND 
-	ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
-	NOT fsb/ASrf)
-	OR (nDinOE_OBUF.EXP)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND fsb/ASrf)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND NOT nAS_FSB AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (NOT ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3)
-	OR (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3)
-	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT nAS_FSB AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7)));
-
-FTCPE_ram/RS_FSM_FFd1: FTCPE port map (ram/RS_FSM_FFd1,ram/RS_FSM_FFd1_T,CLK_FSB,'0','0');
-ram/RS_FSM_FFd1_T <= ((ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/Once AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3 AND fsb/ASrf));
-
-FTCPE_ram/RS_FSM_FFd2: FTCPE port map (ram/RS_FSM_FFd2,ram/RS_FSM_FFd2_T,CLK_FSB,'0','0');
-ram/RS_FSM_FFd2_T <= ((nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-	NOT cnt/RefCnt(5) AND NOT fsb/ASrf)
-	OR (nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-	NOT cnt/RefCnt(6) AND NOT fsb/ASrf)
-	OR (nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-	NOT cnt/RefCnt(7) AND NOT fsb/ASrf)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT nAS_FSB AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND fsb/ASrf)
-	OR (NOT cnt/RefDone AND nAS_FSB AND ram/RS_FSM_FFd2 AND 
-	ram/RS_FSM_FFd1 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
-	NOT fsb/ASrf)
-	OR (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3)
-	OR (cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-	NOT cnt/RefCnt(5) AND ram/BACTr)
-	OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-	NOT cnt/RefCnt(6) AND ram/BACTr)
-	OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND ram/BACTr AND 
-	NOT cnt/RefCnt(7)));
-
-FTCPE_ram/RS_FSM_FFd3: FTCPE port map (ram/RS_FSM_FFd3,ram/RS_FSM_FFd3_T,CLK_FSB,'0','0');
-ram/RS_FSM_FFd3_T <= ((A_FSB(22) AND NOT A_FSB(21) AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (A_FSB(22) AND cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3 AND NOT fsb/ASrf)
-	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (NOT cnt/RefDone AND NOT nAS_FSB AND ram/RS_FSM_FFd2 AND 
-	ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND 
-	cnt/RefCnt(7))
-	OR (NOT cnt/RefDone AND ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND 
-	ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
-	fsb/ASrf)
-	OR (A_FSB(23) AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3)
-	OR (ram/Once AND cnt/RefDone AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3 AND NOT cnt/RefCnt(5))
-	OR (ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3 AND NOT cnt/RefCnt(6))
-	OR (ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3 AND NOT cnt/RefCnt(7)));
-
-Register Legend:
- FDCPE (Q,D,C,CLR,PRE,CE); 
- FTCPE (Q,D,C,CLR,PRE,CE); 
- LDCP  (Q,D,G,CLR,PRE); 
-
-******************************  Device Pin Out *****************************
-
-Device : XC95144XL-10-TQ100
-
-
-   --------------------------------------------------  
-  /100 98  96  94  92  90  88  86  84  82  80  78  76  \
- |   99  97  95  93  91  89  87  85  83  81  79  77    |
- | 1                                               75  | 
- | 2                                               74  | 
- | 3                                               73  | 
- | 4                                               72  | 
- | 5                                               71  | 
- | 6                                               70  | 
- | 7                                               69  | 
- | 8                                               68  | 
- | 9                                               67  | 
- | 10                                              66  | 
- | 11                                              65  | 
- | 12                                              64  | 
- | 13              XC95144XL-10-TQ100              63  | 
- | 14                                              62  | 
- | 15                                              61  | 
- | 16                                              60  | 
- | 17                                              59  | 
- | 18                                              58  | 
- | 19                                              57  | 
- | 20                                              56  | 
- | 21                                              55  | 
- | 22                                              54  | 
- | 23                                              53  | 
- | 24                                              52  | 
- | 25                                              51  | 
- |   27  29  31  33  35  37  39  41  43  45  47  49    |
-  \26  28  30  32  34  36  38  40  42  44  46  48  50  /
-   --------------------------------------------------  
-
-
-Pin Signal                         Pin Signal                        
-No. Name                           No. Name                          
-  1 KPR                              51 VCC                           
-  2 KPR                              52 nUDS_FSB                      
-  3 KPR                              53 RA<6>                         
-  4 KPR                              54 nDTACK_IOB                    
-  5 VCC                              55 RA<7>                         
-  6 nLDS_IOB                         56 A_FSB<4>                      
-  7 nUDS_IOB                         57 VCC                           
-  8 nDoutOE                          58 RA<8>                         
-  9 A_FSB<22>                        59 nVPA_IOB                      
- 10 nAS_IOB                          60 RA<9>                         
- 11 nDTACK_FSB                       61 nWE_FSB                       
- 12 A_FSB<9>                         62 GND                           
- 13 nAS_FSB                          63 RA<11>                        
- 14 nBERR_FSB                        64 A_FSB<8>                      
- 15 A_FSB<5>                         65 RA<10>                        
- 16 A_FSB<2>                         66 A_FSB<23>                     
- 17 nOE                              67 nADoutLE0                     
- 18 nBERR_IOB                        68 A_FSB<21>                     
- 19 A_FSB<6>                         69 GND                           
- 20 A_FSB<7>                         70 nAoutOE                       
- 21 GND                              71 A_FSB<20>                     
- 22 CLK2X_IOB                        72 nDinLE                        
- 23 CLK_FSB                          73 A_FSB<19>                     
- 24 nRAS                             74 nCAS                          
- 25 nLDS_FSB                         75 GND                           
- 26 VCC                              76 A_FSB<18>                     
- 27 CLK_IOB                          77 nRAMLWE                       
- 28 KPR                              78 A_FSB<3>                      
- 29 nADoutLE1                        79 nRAMUWE                       
- 30 KPR                              80 A_FSB<15>                     
- 31 GND                              81 nROMWE                        
- 32 KPR                              82 A_FSB<13>                     
- 33 nVMA_IOB                         83 TDO                           
- 34 KPR                              84 GND                           
- 35 RA<1>                            85 nVPA_FSB                      
- 36 KPR                              86 A_FSB<11>                     
- 37 KPR                              87 RA<0>                         
- 38 VCC                              88 VCC                           
- 39 RA<3>                            89 A_FSB<10>                     
- 40 KPR                              90 A_FSB<1>                      
- 41 KPR                              91 RA<2>                         
- 42 nROMCS                           92 A_FSB<12>                     
- 43 KPR                              93 A_FSB<14>                     
- 44 GND                              94 RA<4>                         
- 45 TDI                              95 A_FSB<16>                     
- 46 KPR                              96 A_FSB<17>                     
- 47 TMS                              97 nDinOE                        
- 48 TCK                              98 VCC                           
- 49 E_IOB                            99 nRES                          
- 50 RA<5>                           100 GND                           
-
-
-Legend :  NC  = Not Connected, unbonded pin
-         PGND = Unused I/O configured as additional Ground pin
-         TIE  = Unused I/O floating -- must tie to VCC, GND or other signal
-         KPR  = Unused I/O with weak keeper (leave unconnected)
-         VCC  = Dedicated Power Pin
-         GND  = Dedicated Ground Pin
-         TDI  = Test Data In, JTAG pin
-         TDO  = Test Data Out, JTAG pin
-         TCK  = Test Clock, JTAG pin
-         TMS  = Test Mode Select, JTAG pin
-  PROHIBITED  = User reserved pin
-****************************  Compiler Options  ****************************
-
-Following is a list of all global compiler options used by the fitter run.
-
-Device(s) Specified                         : xc95144xl-10-TQ100
-Optimization Method                         : SPEED
-Multi-Level Logic Optimization              : ON
-Ignore Timing Specifications                : OFF
-Default Register Power Up Value             : LOW
-Keep User Location Constraints              : ON
-What-You-See-Is-What-You-Get                : OFF
-Exhaustive Fitting                          : OFF
-Keep Unused Inputs                          : OFF
-Slew Rate                                   : FAST
-Power Mode                                  : STD
-Ground on Unused IOs                        : OFF
-Set I/O Pin Termination                     : KEEPER
-Global Clock Optimization                   : ON
-Global Set/Reset Optimization               : ON
-Global Ouput Enable Optimization            : ON
-Input Limit                                 : 54
-Pterm Limit                                 : 25
diff --git a/cpld/XC95144XL/MXSE 2.syr b/cpld/XC95144XL/MXSE 2.syr
deleted file mode 100644
index 4a8f658..0000000
--- a/cpld/XC95144XL/MXSE 2.syr	
+++ /dev/null
@@ -1,474 +0,0 @@
-Release 14.7 - xst P.20131013 (nt)
-Copyright (c) 1995-2013 Xilinx, Inc.  All rights reserved.
---> Parameter TMPDIR set to xst/projnav.tmp
-
-
-Total REAL time to Xst completion: 0.00 secs
-Total CPU time to Xst completion: 0.36 secs
- 
---> Parameter xsthdpdir set to xst
-
-
-Total REAL time to Xst completion: 0.00 secs
-Total CPU time to Xst completion: 0.36 secs
- 
---> Reading design: MXSE.prj
-
-TABLE OF CONTENTS
-  1) Synthesis Options Summary
-  2) HDL Compilation
-  3) Design Hierarchy Analysis
-  4) HDL Analysis
-  5) HDL Synthesis
-     5.1) HDL Synthesis Report
-  6) Advanced HDL Synthesis
-     6.1) Advanced HDL Synthesis Report
-  7) Low Level Synthesis
-  8) Partition Report
-  9) Final Report
-
-=========================================================================
-*                      Synthesis Options Summary                        *
-=========================================================================
----- Source Parameters
-Input File Name                    : "MXSE.prj"
-Input Format                       : mixed
-Ignore Synthesis Constraint File   : NO
-
----- Target Parameters
-Output File Name                   : "MXSE"
-Output Format                      : NGC
-Target Device                      : XC9500XL CPLDs
-
----- Source Options
-Top Module Name                    : MXSE
-Automatic FSM Extraction           : YES
-FSM Encoding Algorithm             : Auto
-Safe Implementation                : No
-Mux Extraction                     : Yes
-Resource Sharing                   : YES
-
----- Target Options
-Add IO Buffers                     : YES
-MACRO Preserve                     : YES
-XOR Preserve                       : YES
-Equivalent register Removal        : YES
-
----- General Options
-Optimization Goal                  : Speed
-Optimization Effort                : 1
-Keep Hierarchy                     : Yes
-Netlist Hierarchy                  : As_Optimized
-RTL Output                         : Yes
-Hierarchy Separator                : /
-Bus Delimiter                      : <>
-Case Specifier                     : Maintain
-Verilog 2001                       : YES
-
----- Other Options
-Clock Enable                       : YES
-wysiwyg                            : NO
-
-=========================================================================
-
-
-=========================================================================
-*                          HDL Compilation                              *
-=========================================================================
-Compiling verilog file "../RAM.v" in library work
-Compiling verilog file "../IOBS.v" in library work
-Module <RAM> compiled
-Compiling verilog file "../IOBM.v" in library work
-Module <IOBS> compiled
-Compiling verilog file "../FSB.v" in library work
-Module <IOBM> compiled
-Compiling verilog file "../CS.v" in library work
-Module <FSB> compiled
-Compiling verilog file "../CNT.v" in library work
-Module <CS> compiled
-Compiling verilog file "../MXSE.v" in library work
-Module <CNT> compiled
-Module <MXSE> compiled
-No errors in compilation
-Analysis of file <"MXSE.prj"> succeeded.
- 
-
-=========================================================================
-*                     Design Hierarchy Analysis                         *
-=========================================================================
-Analyzing hierarchy for module <MXSE> in library <work>.
-
-Analyzing hierarchy for module <CS> in library <work>.
-
-Analyzing hierarchy for module <RAM> in library <work>.
-
-Analyzing hierarchy for module <IOBS> in library <work>.
-
-Analyzing hierarchy for module <IOBM> in library <work>.
-
-Analyzing hierarchy for module <CNT> in library <work>.
-
-Analyzing hierarchy for module <FSB> in library <work>.
-
-
-=========================================================================
-*                            HDL Analysis                               *
-=========================================================================
-Analyzing top module <MXSE>.
-Module <MXSE> is correct for synthesis.
- 
-Analyzing module <CS> in library <work>.
-Module <CS> is correct for synthesis.
- 
-Analyzing module <RAM> in library <work>.
-Module <RAM> is correct for synthesis.
- 
-Analyzing module <IOBS> in library <work>.
-Module <IOBS> is correct for synthesis.
- 
-Analyzing module <IOBM> in library <work>.
-Module <IOBM> is correct for synthesis.
- 
-Analyzing module <CNT> in library <work>.
-Module <CNT> is correct for synthesis.
- 
-Analyzing module <FSB> in library <work>.
-Module <FSB> is correct for synthesis.
- 
-
-=========================================================================
-*                           HDL Synthesis                               *
-=========================================================================
-
-Performing bidirectional port resolution...
-
-Synthesizing Unit <CS>.
-    Related source file is "../CS.v".
-    Found 1-bit register for signal <nOverlay0>.
-    Found 1-bit register for signal <nOverlay1>.
-    Summary:
-	inferred   2 D-type flip-flop(s).
-Unit <CS> synthesized.
-
-
-Synthesizing Unit <RAM>.
-    Related source file is "../RAM.v".
-    Found finite state machine <FSM_0> for signal <RS>.
-    -----------------------------------------------------------------------
-    | States             | 8                                              |
-    | Transitions        | 18                                             |
-    | Inputs             | 6                                              |
-    | Outputs            | 9                                              |
-    | Clock              | CLK                       (rising_edge)        |
-    | Power Up State     | 000                                            |
-    | Encoding           | automatic                                      |
-    | Implementation     | automatic                                      |
-    -----------------------------------------------------------------------
-    Found 1-bit register for signal <nCAS>.
-    Found 1-bit register for signal <BACTr>.
-    Found 1-bit register for signal <Once>.
-    Found 1-bit register for signal <RAMDIS1>.
-    Found 1-bit register for signal <RAMDIS2>.
-    Found 1-bit register for signal <RAMReady>.
-    Found 1-bit register for signal <RASEL>.
-    Found 1-bit register for signal <RefRAS>.
-    Summary:
-	inferred   1 Finite State Machine(s).
-	inferred   6 D-type flip-flop(s).
-Unit <RAM> synthesized.
-
-
-Synthesizing Unit <IOBS>.
-    Related source file is "../IOBS.v".
-    Found finite state machine <FSM_1> for signal <PS>.
-    -----------------------------------------------------------------------
-    | States             | 4                                              |
-    | Transitions        | 10                                             |
-    | Inputs             | 5                                              |
-    | Outputs            | 5                                              |
-    | Clock              | CLK                       (rising_edge)        |
-    | Power Up State     | 00                                             |
-    | Encoding           | automatic                                      |
-    | Implementation     | automatic                                      |
-    -----------------------------------------------------------------------
-    Found 1-bit register for signal <BERR>.
-    Found 1-bit register for signal <IOREQ>.
-    Found 1-bit register for signal <IORW0>.
-    Found 1-bit register for signal <IOL0>.
-    Found 1-bit register for signal <IOU0>.
-    Found 1-bit register for signal <ALE0>.
-    Found 1-bit register for signal <ALE1>.
-    Found 1-bit register for signal <Clear1>.
-    Found 1-bit register for signal <IOACTr>.
-    Found 1-bit register for signal <IOL1>.
-    Found 1-bit register for signal <IOReady>.
-    Found 1-bit register for signal <IORW1>.
-    Found 1-bit register for signal <IOU1>.
-    Found 1-bit register for signal <Load1>.
-    Found 1-bit register for signal <Once>.
-    Summary:
-	inferred   1 Finite State Machine(s).
-	inferred   9 D-type flip-flop(s).
-Unit <IOBS> synthesized.
-
-
-Synthesizing Unit <IOBM>.
-    Related source file is "../IOBM.v".
-    Found finite state machine <FSM_2> for signal <IOS>.
-    -----------------------------------------------------------------------
-    | States             | 8                                              |
-    | Transitions        | 15                                             |
-    | Inputs             | 6                                              |
-    | Outputs            | 9                                              |
-    | Clock              | C16M                      (rising_edge)        |
-    | Power Up State     | 000                                            |
-    | Encoding           | automatic                                      |
-    | Implementation     | automatic                                      |
-    -----------------------------------------------------------------------
-    Found 1-bit register for signal <IOBERR>.
-    Found 1-bit register for signal <IOACT>.
-    Found 1-bit register for signal <nAS>.
-    Found 1-bit register for signal <nLDS>.
-    Found 1-bit register for signal <nUDS>.
-    Found 1-bit register for signal <nDinLE>.
-    Found 1-bit register for signal <nDoutOE>.
-    Found 1-bit register for signal <ALE0>.
-    Found 1-bit register for signal <nVMA>.
-    Found 1-bit register for signal <BERRrf>.
-    Found 1-bit register for signal <BERRrr>.
-    Found 1-bit register for signal <DTACKrf>.
-    Found 1-bit register for signal <DTACKrr>.
-    Found 1-bit register for signal <Er>.
-    Found 1-bit register for signal <Er2>.
-    Found 5-bit up counter for signal <ES>.
-    Found 1-bit register for signal <ETACK>.
-    Found 1-bit register for signal <IOREQr>.
-    Found 1-bit register for signal <RESrf>.
-    Found 1-bit register for signal <RESrr>.
-    Found 1-bit register for signal <VPArf>.
-    Found 1-bit register for signal <VPArr>.
-    Summary:
-	inferred   1 Finite State Machine(s).
-	inferred   1 Counter(s).
-	inferred  20 D-type flip-flop(s).
-Unit <IOBM> synthesized.
-
-
-Synthesizing Unit <CNT>.
-    Related source file is "../CNT.v".
-    Found 1-bit register for signal <TimeoutA>.
-    Found 1-bit register for signal <TimeoutB>.
-    Found 8-bit up counter for signal <RefCnt>.
-    Found 1-bit register for signal <RefDone>.
-    Found 1-bit register for signal <TimeoutBPre>.
-    Summary:
-	inferred   1 Counter(s).
-Unit <CNT> synthesized.
-
-
-Synthesizing Unit <FSB>.
-    Related source file is "../FSB.v".
-    Found 1-bit register for signal <nDTACK>.
-    Found 1-bit register for signal <ASrf>.
-    Found 1-bit register for signal <BERR0r>.
-    Found 1-bit register for signal <BERR1r>.
-    Found 1-bit register for signal <Ready0r>.
-    Found 1-bit register for signal <Ready1r>.
-    Found 1-bit register for signal <Ready2r>.
-    Found 1-bit register for signal <VPA>.
-    Summary:
-	inferred   1 D-type flip-flop(s).
-Unit <FSB> synthesized.
-
-
-Synthesizing Unit <MXSE>.
-    Related source file is "../MXSE.v".
-Unit <MXSE> synthesized.
-
-
-=========================================================================
-HDL Synthesis Report
-
-Macro Statistics
-# Counters                                             : 2
- 5-bit up counter                                      : 1
- 8-bit up counter                                      : 1
-# Registers                                            : 58
- 1-bit register                                        : 58
-
-=========================================================================
-
-=========================================================================
-*                       Advanced HDL Synthesis                          *
-=========================================================================
-
-Analyzing FSM <FSM_2> for best encoding.
-Optimizing FSM <iobm/IOS/FSM> on signal <IOS[1:8]> with one-hot encoding.
--------------------
- State | Encoding
--------------------
- 000   | 00000001
- 001   | 00000010
- 010   | 00000100
- 011   | 00001000
- 100   | 00010000
- 101   | 00100000
- 110   | 01000000
- 111   | 10000000
--------------------
-Analyzing FSM <FSM_1> for best encoding.
-Optimizing FSM <iobs/PS/FSM> on signal <PS[1:2]> with johnson encoding.
--------------------
- State | Encoding
--------------------
- 00    | 00
- 11    | 01
- 10    | 11
- 01    | 10
--------------------
-Analyzing FSM <FSM_0> for best encoding.
-Optimizing FSM <ram/RS/FSM> on signal <RS[1:3]> with user encoding.
--------------------
- State | Encoding
--------------------
- 000   | 000
- 010   | 010
- 101   | 101
- 001   | 001
- 011   | 011
- 100   | 100
- 111   | 111
- 110   | 110
--------------------
-
-=========================================================================
-Advanced HDL Synthesis Report
-
-Macro Statistics
-# FSMs                                                 : 3
-# Counters                                             : 2
- 5-bit up counter                                      : 1
- 8-bit up counter                                      : 1
-# Registers                                            : 38
- Flip-Flops                                            : 38
-
-=========================================================================
-
-=========================================================================
-*                         Low Level Synthesis                           *
-=========================================================================
-
-Optimizing unit <MXSE> ...
-
-Optimizing unit <CS> ...
-  implementation constraint: INIT=r	 : nOverlay0
-  implementation constraint: INIT=r	 : nOverlay1
-
-Optimizing unit <RAM> ...
-  implementation constraint: INIT=r	 : RAMReady
-  implementation constraint: INIT=r	 : RASEL
-  implementation constraint: INIT=r	 : RAMDIS1
-  implementation constraint: INIT=r	 : RefRAS
-  implementation constraint: INIT=r	 : RAMDIS2
-  implementation constraint: INIT=r	 : Once
-  implementation constraint: INIT=r	 : RS_FSM_FFd1
-  implementation constraint: INIT=r	 : RS_FSM_FFd2
-  implementation constraint: INIT=r	 : RS_FSM_FFd3
-
-Optimizing unit <IOBS> ...
-  implementation constraint: INIT=r	 : IOACTr
-  implementation constraint: INIT=r	 : PS_FSM_FFd2
-  implementation constraint: INIT=r	 : Once
-  implementation constraint: INIT=r	 : PS_FSM_FFd1
-
-Optimizing unit <FSB> ...
-  implementation constraint: INIT=r	 : ASrf
-
-Optimizing unit <IOBM> ...
-  implementation constraint: INIT=r	 : ETACK
-  implementation constraint: INIT=r	 : IOREQr
-  implementation constraint: INIT=r	 : IOS_FSM_FFd1
-  implementation constraint: INIT=r	 : IOS_FSM_FFd2
-  implementation constraint: INIT=r	 : IOS_FSM_FFd3
-  implementation constraint: INIT=r	 : IOS_FSM_FFd4
-  implementation constraint: INIT=r	 : IOS_FSM_FFd5
-  implementation constraint: INIT=r	 : IOS_FSM_FFd6
-  implementation constraint: INIT=r	 : IOS_FSM_FFd7
-  implementation constraint: INIT=s	 : IOS_FSM_FFd8
-
-Optimizing unit <CNT> ...
-  implementation constraint: INIT=r	 : RefDone
-  implementation constraint: INIT=r	 : RefCnt_7
-  implementation constraint: INIT=r	 : RefCnt_6
-  implementation constraint: INIT=r	 : RefCnt_5
-  implementation constraint: INIT=r	 : RefCnt_4
-  implementation constraint: INIT=r	 : RefCnt_3
-  implementation constraint: INIT=r	 : RefCnt_2
-  implementation constraint: INIT=r	 : RefCnt_1
-  implementation constraint: INIT=r	 : RefCnt_0
-
-=========================================================================
-*                           Partition Report                            *
-=========================================================================
-
-Partition Implementation Status
--------------------------------
-
-  No Partitions were found in this design.
-
--------------------------------
-
-=========================================================================
-*                            Final Report                               *
-=========================================================================
-Final Results
-RTL Top Level Output File Name     : MXSE.ngr
-Top Level Output File Name         : MXSE
-Output Format                      : NGC
-Optimization Goal                  : Speed
-Keep Hierarchy                     : Yes
-Target Technology                  : XC9500XL CPLDs
-Macro Preserve                     : YES
-XOR Preserve                       : YES
-Clock Enable                       : YES
-wysiwyg                            : NO
-
-Design Statistics
-# IOs                              : 67
-
-Cell Usage :
-# BELS                             : 570
-#      AND2                        : 160
-#      AND3                        : 20
-#      AND4                        : 15
-#      AND5                        : 1
-#      AND6                        : 3
-#      AND7                        : 1
-#      AND8                        : 3
-#      GND                         : 6
-#      INV                         : 243
-#      OR2                         : 92
-#      OR3                         : 8
-#      OR4                         : 5
-#      VCC                         : 1
-#      XOR2                        : 12
-# FlipFlops/Latches                : 84
-#      FD                          : 57
-#      FDCE                        : 27
-# IO Buffers                       : 67
-#      IBUF                        : 35
-#      OBUF                        : 32
-=========================================================================
-
-
-Total REAL time to Xst completion: 3.00 secs
-Total CPU time to Xst completion: 3.01 secs
- 
---> 
-
-Total memory usage is 232788 kilobytes
-
-Number of errors   :    0 (   0 filtered)
-Number of warnings :    0 (   0 filtered)
-Number of infos    :    0 (   0 filtered)
-
diff --git a/cpld/XC95144XL/MXSE 2.tspec b/cpld/XC95144XL/MXSE 2.tspec
deleted file mode 100644
index fa7edb3..0000000
--- a/cpld/XC95144XL/MXSE 2.tspec	
+++ /dev/null
@@ -1,393 +0,0 @@
-TS_CLK2X_IOB:FROM:IOBERR.Q:TO:IOBERR.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:IOBERR.D:666
-TS_CLK2X_IOB:FROM:iobm/DTACKrf.Q:TO:IOBERR.D:666
-TS_CLK2X_IOB:FROM:iobm/DTACKrr.Q:TO:IOBERR.D:666
-TS_CLK2X_IOB:FROM:iobm/RESrf.Q:TO:IOBERR.D:666
-TS_CLK2X_IOB:FROM:iobm/RESrr.Q:TO:IOBERR.D:666
-TS_CLK2X_IOB:FROM:iobm/BERRrf.Q:TO:IOBERR.D:666
-TS_CLK2X_IOB:FROM:iobm/BERRrr.Q:TO:IOBERR.D:666
-TS_CLK2X_IOB:FROM:iobm/ETACK.Q:TO:IOBERR.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/IOS_FSM_FFd3.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd4.Q:TO:iobm/IOS_FSM_FFd3.D:666
-TS_CLK2X_IOB:FROM:iobm/ETACK.Q:TO:iobm/IOS_FSM_FFd3.D:666
-TS_CLK2X_IOB:FROM:iobm/BERRrf.Q:TO:iobm/IOS_FSM_FFd3.D:666
-TS_CLK2X_IOB:FROM:iobm/BERRrr.Q:TO:iobm/IOS_FSM_FFd3.D:666
-TS_CLK2X_IOB:FROM:iobm/DTACKrf.Q:TO:iobm/IOS_FSM_FFd3.D:666
-TS_CLK2X_IOB:FROM:iobm/DTACKrr.Q:TO:iobm/IOS_FSM_FFd3.D:666
-TS_CLK2X_IOB:FROM:iobm/RESrf.Q:TO:iobm/IOS_FSM_FFd3.D:666
-TS_CLK2X_IOB:FROM:iobm/RESrr.Q:TO:iobm/IOS_FSM_FFd3.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd8.Q:TO:iobm/IOS_FSM_FFd7.D:666
-TS_CLK2X_IOB:FROM:iobm/IOREQr.Q:TO:iobm/IOS_FSM_FFd7.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd8.Q:TO:iobm/IOS_FSM_FFd8.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/IOS_FSM_FFd8.D:666
-TS_CLK2X_IOB:FROM:iobm/IOREQr.Q:TO:iobm/IOS_FSM_FFd8.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd7.Q:TO:IOACT.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd8.Q:TO:IOACT.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:IOACT.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd4.Q:TO:IOACT.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd5.Q:TO:IOACT.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd6.Q:TO:IOACT.D:666
-TS_CLK2X_IOB:FROM:iobm/IOREQr.Q:TO:IOACT.D:666
-TS_CLK2X_IOB:FROM:iobm/DTACKrf.Q:TO:IOACT.D:666
-TS_CLK2X_IOB:FROM:iobm/DTACKrr.Q:TO:IOACT.D:666
-TS_CLK2X_IOB:FROM:iobm/RESrf.Q:TO:IOACT.D:666
-TS_CLK2X_IOB:FROM:iobm/RESrr.Q:TO:IOACT.D:666
-TS_CLK2X_IOB:FROM:iobm/BERRrf.Q:TO:IOACT.D:666
-TS_CLK2X_IOB:FROM:iobm/BERRrr.Q:TO:IOACT.D:666
-TS_CLK2X_IOB:FROM:iobm/ETACK.Q:TO:IOACT.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/IOS_FSM_FFd2.D:666
-TS_CLK2X_IOB:FROM:iobm/ETACK.Q:TO:iobm/IOS_FSM_FFd2.D:666
-TS_CLK2X_IOB:FROM:iobm/BERRrf.Q:TO:iobm/IOS_FSM_FFd2.D:666
-TS_CLK2X_IOB:FROM:iobm/BERRrr.Q:TO:iobm/IOS_FSM_FFd2.D:666
-TS_CLK2X_IOB:FROM:iobm/DTACKrf.Q:TO:iobm/IOS_FSM_FFd2.D:666
-TS_CLK2X_IOB:FROM:iobm/DTACKrr.Q:TO:iobm/IOS_FSM_FFd2.D:666
-TS_CLK2X_IOB:FROM:iobm/RESrf.Q:TO:iobm/IOS_FSM_FFd2.D:666
-TS_CLK2X_IOB:FROM:iobm/RESrr.Q:TO:iobm/IOS_FSM_FFd2.D:666
-TS_CLK_FSB:FROM:cs/nOverlay0.Q:TO:cs/nOverlay1.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:cs/nOverlay1.CE:400
-TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/Once.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/Once.D:400
-TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/Once.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/Once.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/Once.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/Once.D:400
-TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:cnt/RefDone.D:400
-TS_CLK_FSB:FROM:RefAck.Q:TO:cnt/RefDone.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:cnt/RefDone.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:cnt/RefDone.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:cnt/RefDone.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefDone.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefDone.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefDone.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefDone.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/RefDone.D:400
-TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/Once.D:400
-TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:iobs/Once.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/Once.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/Once.D:400
-TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/Once.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/Once.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:BERR_IOBS.D:400
-TS_CLK_FSB:FROM:BERR_IOBS.Q:TO:BERR_IOBS.D:400
-TS_CLK_FSB:FROM:iobs/Once.Q:TO:BERR_IOBS.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:BERR_IOBS.D:400
-TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:BERR_IOBS.D:400
-TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:BERR_IOBS.D:400
-TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:IORW0.D:400
-TS_CLK_FSB:FROM:iobs/Once.Q:TO:IORW0.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:IORW0.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:IORW0.D:400
-TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:IORW0.D:400
-TS_CLK_FSB:FROM:IORW0.Q:TO:IORW0.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:IORW0.D:400
-TS_CLK_FSB:FROM:iobs/IORW1.Q:TO:IORW0.D:400
-TS_CLK_FSB:FROM:cs/nOverlay0.Q:TO:cs/nOverlay0.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:cs/nOverlay0.D:400
-TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:IOL0.D:400
-TS_CLK_FSB:FROM:iobs/IOL1.Q:TO:IOL0.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:IOL0.CE:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:IOL0.CE:400
-TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:IOU0.D:400
-TS_CLK_FSB:FROM:iobs/IOU1.Q:TO:IOU0.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:IOU0.CE:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:IOU0.CE:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:TimeoutA.D:400
-TS_CLK_FSB:FROM:TimeoutA.Q:TO:TimeoutA.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:TimeoutA.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:TimeoutA.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:TimeoutA.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:TimeoutA.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:TimeoutA.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:TimeoutA.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:TimeoutA.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:TimeoutB.D:400
-TS_CLK_FSB:FROM:TimeoutB.Q:TO:TimeoutB.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:TimeoutB.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:TimeoutB.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:TimeoutB.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:TimeoutB.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:TimeoutB.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:TimeoutB.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:TimeoutB.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:TimeoutB.D:400
-TS_CLK_FSB:FROM:cnt/TimeoutBPre.Q:TO:TimeoutB.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:cnt/TimeoutBPre.D:400
-TS_CLK_FSB:FROM:cnt/TimeoutBPre.Q:TO:cnt/TimeoutBPre.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:cnt/TimeoutBPre.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:cnt/TimeoutBPre.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:cnt/TimeoutBPre.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/TimeoutBPre.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/TimeoutBPre.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/TimeoutBPre.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/TimeoutBPre.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/TimeoutBPre.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/BERR0r.D:400
-TS_CLK_FSB:FROM:TimeoutB.Q:TO:fsb/BERR0r.D:400
-TS_CLK_FSB:FROM:fsb/BERR0r.Q:TO:fsb/BERR0r.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/BERR1r.D:400
-TS_CLK_FSB:FROM:BERR_IOBS.Q:TO:fsb/BERR1r.D:400
-TS_CLK_FSB:FROM:fsb/BERR1r.Q:TO:fsb/BERR1r.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/Ready0r.D:400
-TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:fsb/Ready0r.D:400
-TS_CLK_FSB:FROM:fsb/Ready0r.Q:TO:fsb/Ready0r.D:400
-TS_CLK_FSB:FROM:ram/RAMReady.Q:TO:fsb/Ready0r.D:400
-TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:fsb/Ready1r.D:400
-TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:fsb/Ready1r.D:400
-TS_CLK_FSB:FROM:fsb/Ready1r.Q:TO:fsb/Ready1r.D:400
-TS_CLK_FSB:FROM:iobs/IOReady.Q:TO:fsb/Ready1r.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/Ready1r.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/Ready2r.D:400
-TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:fsb/Ready2r.D:400
-TS_CLK_FSB:FROM:TimeoutA.Q:TO:fsb/Ready2r.D:400
-TS_CLK_FSB:FROM:fsb/Ready2r.Q:TO:fsb/Ready2r.D:400
-TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:fsb/VPA.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/VPA.D:400
-TS_CLK_FSB:FROM:fsb/Ready0r.Q:TO:fsb/VPA.D:400
-TS_CLK_FSB:FROM:ram/RAMReady.Q:TO:fsb/VPA.D:400
-TS_CLK_FSB:FROM:fsb/VPA.Q:TO:fsb/VPA.D:400
-TS_CLK_FSB:FROM:BERR_IOBS.Q:TO:fsb/VPA.D:400
-TS_CLK_FSB:FROM:fsb/BERR0r.Q:TO:fsb/VPA.D:400
-TS_CLK_FSB:FROM:fsb/BERR1r.Q:TO:fsb/VPA.D:400
-TS_CLK_FSB:FROM:fsb/Ready1r.Q:TO:fsb/VPA.D:400
-TS_CLK_FSB:FROM:TimeoutA.Q:TO:fsb/VPA.D:400
-TS_CLK_FSB:FROM:fsb/Ready2r.Q:TO:fsb/VPA.D:400
-TS_CLK_FSB:FROM:TimeoutB.Q:TO:fsb/VPA.D:400
-TS_CLK_FSB:FROM:iobs/IOReady.Q:TO:fsb/VPA.D:400
-TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:fsb/VPA.D:400
-TS_CLK_FSB:FROM:iobs/Load1.Q:TO:iobs/IOL1.CE:400
-TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/IORW1.D:400
-TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/IORW1.D:400
-TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:iobs/IORW1.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/IORW1.D:400
-TS_CLK_FSB:FROM:iobs/IORW1.Q:TO:iobs/IORW1.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/IORW1.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/IORW1.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/IOReady.D:400
-TS_CLK_FSB:FROM:iobs/IOReady.Q:TO:iobs/IOReady.D:400
-TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/IOReady.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/IOReady.D:400
-TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:iobs/IOReady.D:400
-TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/IOReady.D:400
-TS_CLK_FSB:FROM:iobs/Load1.Q:TO:iobs/IOU1.CE:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RAMDIS2.D:400
-TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RAMDIS2.D:400
-TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RAMDIS2.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RAMDIS2.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RAMDIS2.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RAMDIS2.D:400
-TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RAMDIS2.D:400
-TS_CLK_FSB:FROM:ram/RAMDIS2.Q:TO:ram/RAMDIS2.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RAMDIS2.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RAMDIS2.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RAMDIS2.D:400
-TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:nDTACK_FSB_OBUF.D:400
-TS_CLK_FSB:FROM:TimeoutA.Q:TO:nDTACK_FSB_OBUF.D:400
-TS_CLK_FSB:FROM:fsb/Ready2r.Q:TO:nDTACK_FSB_OBUF.D:400
-TS_CLK_FSB:FROM:nDTACK_FSB_OBUF.Q:TO:nDTACK_FSB_OBUF.D:400
-TS_CLK_FSB:FROM:fsb/Ready1r.Q:TO:nDTACK_FSB_OBUF.D:400
-TS_CLK_FSB:FROM:iobs/IOReady.Q:TO:nDTACK_FSB_OBUF.D:400
-TS_CLK_FSB:FROM:fsb/Ready0r.Q:TO:nDTACK_FSB_OBUF.D:400
-TS_CLK_FSB:FROM:ram/RAMReady.Q:TO:nDTACK_FSB_OBUF.D:400
-TS_CLK_FSB:FROM:BERR_IOBS.Q:TO:nDTACK_FSB_OBUF.D:400
-TS_CLK_FSB:FROM:fsb/BERR0r.Q:TO:nDTACK_FSB_OBUF.D:400
-TS_CLK_FSB:FROM:fsb/BERR1r.Q:TO:nDTACK_FSB_OBUF.D:400
-TS_CLK_FSB:FROM:TimeoutB.Q:TO:nDTACK_FSB_OBUF.D:400
-TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:nDTACK_FSB_OBUF.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:nDTACK_FSB_OBUF.D:400
-TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RASEL.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RASEL.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RASEL.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RASEL.D:400
-TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RASEL.D:400
-TS_CLK_FSB:FROM:ram/BACTr.Q:TO:ram/RASEL.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RASEL.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RASEL.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RASEL.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RASEL.D:400
-TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RASEL.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RS_FSM_FFd2.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RS_FSM_FFd2.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RS_FSM_FFd2.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RS_FSM_FFd2.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RS_FSM_FFd2.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RS_FSM_FFd2.D:400
-TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RS_FSM_FFd2.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RS_FSM_FFd2.D:400
-TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RS_FSM_FFd2.D:400
-TS_CLK_FSB:FROM:ram/BACTr.Q:TO:ram/RS_FSM_FFd2.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RS_FSM_FFd1.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RS_FSM_FFd1.D:400
-TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RS_FSM_FFd1.D:400
-TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RS_FSM_FFd1.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RS_FSM_FFd1.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RS_FSM_FFd1.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RS_FSM_FFd3.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RS_FSM_FFd3.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RS_FSM_FFd3.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RS_FSM_FFd3.D:400
-TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RS_FSM_FFd3.D:400
-TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RS_FSM_FFd3.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RS_FSM_FFd3.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RS_FSM_FFd3.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RS_FSM_FFd3.D:400
-TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RS_FSM_FFd3.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/PS_FSM_FFd2.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/PS_FSM_FFd2.D:400
-TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/PS_FSM_FFd2.D:400
-TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:iobs/PS_FSM_FFd2.D:400
-TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:iobs/PS_FSM_FFd2.D:400
-TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/PS_FSM_FFd2.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/PS_FSM_FFd2.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/PS_FSM_FFd1.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/PS_FSM_FFd1.D:400
-TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:iobs/PS_FSM_FFd1.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<5>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<5>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<5>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefCnt<5>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/RefCnt<5>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:cnt/RefCnt<6>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<6>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<6>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<6>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefCnt<6>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/RefCnt<6>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<1>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<2>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<2>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<3>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<3>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<3>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<4>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<4>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<4>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefCnt<4>.D:400
-TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/Load1.D:400
-TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/Load1.D:400
-TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:iobs/Load1.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/Load1.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/Load1.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/Load1.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/BACTr.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:cnt/RefCnt<7>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:cnt/RefCnt<7>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<7>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<7>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<7>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefCnt<7>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/RefCnt<7>.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:RefAck.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:RefAck.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:ALE0S.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:ALE0S.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:IOREQ.D:400
-TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:IOREQ.D:400
-TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:IOREQ.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:IOREQ.D:400
-TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:IOREQ.D:400
-TS_CLK_FSB:FROM:iobs/Once.Q:TO:IOREQ.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:IOREQ.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/Clear1.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/Clear1.D:400
-TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/Clear1.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RAMDIS1.D:400
-TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RAMDIS1.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RAMDIS1.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RAMDIS1.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RAMDIS1.D:400
-TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RAMDIS1.D:400
-TS_CLK_FSB:FROM:ram/BACTr.Q:TO:ram/RAMDIS1.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RAMDIS1.D:400
-TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RAMDIS1.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RAMDIS1.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RAMDIS1.D:400
-TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RAMReady.D:400
-TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RAMReady.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RAMReady.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RAMReady.D:400
-TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RAMReady.D:400
-TS_CLK_FSB:FROM:ram/BACTr.Q:TO:ram/RAMReady.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RAMReady.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RAMReady.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RAMReady.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RAMReady.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RAMReady.D:400
-TS_CLK_FSB:FROM:ram/RASEL.Q:TO:nCAS_OBUF.D:400
-TS_CLK_FSB:FROM:iobs/Load1.Q:TO:nADoutLE1_OBUF.D:400
-TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:nADoutLE1_OBUF.D:400
-TS_CLK_FSB:FROM:iobs/Clear1.Q:TO:nADoutLE1_OBUF.D:400
-TS_CLK2X_IOB:FROM:nVMA_IOB_OBUF.Q:TO:nVMA_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:nVMA_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:nVMA_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:nVMA_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:nVMA_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:nVMA_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:IOACT.Q:TO:nVMA_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/VPArf.Q:TO:nVMA_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/VPArr.Q:TO:nVMA_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/ES<0>.D:666
-TS_CLK2X_IOB:FROM:iobm/Er2.Q:TO:iobm/ES<0>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/ES<0>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/ES<0>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/ES<0>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:iobm/ES<0>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/ES<1>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/ES<1>.D:666
-TS_CLK2X_IOB:FROM:iobm/Er2.Q:TO:iobm/ES<1>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/ES<2>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/ES<2>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/ES<2>.D:666
-TS_CLK2X_IOB:FROM:iobm/Er2.Q:TO:iobm/ES<2>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/ES<2>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:iobm/ES<2>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/ES<3>.D:666
-TS_CLK2X_IOB:FROM:iobm/Er2.Q:TO:iobm/ES<3>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/ES<3>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/ES<3>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/ES<3>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:iobm/ES<4>.D:666
-TS_CLK2X_IOB:FROM:iobm/Er2.Q:TO:iobm/ES<4>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/ES<4>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/ES<4>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/ES<4>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/ES<4>.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd5.Q:TO:iobm/IOS_FSM_FFd4.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd6.Q:TO:iobm/IOS_FSM_FFd5.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd7.Q:TO:iobm/IOS_FSM_FFd6.D:666
-TS_CLK2X_IOB:FROM:nVMA_IOB_OBUF.Q:TO:iobm/ETACK.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/ETACK.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/ETACK.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/ETACK.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/ETACK.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:iobm/ETACK.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:ALE0M.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd4.Q:TO:ALE0M.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd5.Q:TO:ALE0M.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd6.Q:TO:ALE0M.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd7.Q:TO:ALE0M.D:666
-TS_CLK2X_IOB:FROM:iobm/IOREQr.Q:TO:ALE0M.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd8.Q:TO:ALE0M.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/IOS_FSM_FFd1.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:nAS_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd4.Q:TO:nAS_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd5.Q:TO:nAS_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd6.Q:TO:nAS_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd7.Q:TO:nAS_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:nDinLE_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd4.Q:TO:nDinLE_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:nDoutOE_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd4.Q:TO:nDoutOE_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd5.Q:TO:nDoutOE_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd6.Q:TO:nDoutOE_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd7.Q:TO:nDoutOE_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:nDoutOE_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:nLDS_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd4.Q:TO:nLDS_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd5.Q:TO:nLDS_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd6.Q:TO:nLDS_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd7.Q:TO:nLDS_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:nUDS_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd4.Q:TO:nUDS_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd5.Q:TO:nUDS_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd6.Q:TO:nUDS_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd7.Q:TO:nUDS_IOB_OBUF.D:666
diff --git a/cpld/XC95144XL/MXSE 2.vm6 b/cpld/XC95144XL/MXSE 2.vm6
deleted file mode 100644
index b8ad9c0..0000000
--- a/cpld/XC95144XL/MXSE 2.vm6	
+++ /dev/null
@@ -1,8379 +0,0 @@
-NDS Database:  version P.20131013
-
-NDS_INFO | xc9500xl | 95144XL100 | XC95144XL-10-TQ100
-
-DEVICE | 95144XL | 95144XL100 | 
-
-NETWORK | MXSE | 0 | 0 | 16391
-
-INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_9_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<9> | 9483 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | A_FSB | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_9_IBUF | 9299 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-
-INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_8_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<8> | 9484 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | A_FSB | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_8_IBUF | 9300 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-
-INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_15_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<15> | 9485 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | A_FSB | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_15_IBUF | 9301 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-
-INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_14_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<14> | 9486 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | A_FSB | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-
-INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_13_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<13> | 9487 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | A_FSB | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-
-INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_12_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<12> | 9488 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | A_FSB | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_12_IBUF | 9304 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-
-INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_11_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<11> | 9489 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | A_FSB | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_11_IBUF | 9305 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-
-INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_10_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<10> | 9490 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | A_FSB | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_10_IBUF | 9306 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-
-INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_23_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<23> | 9491 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | A_FSB | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-
-INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_22_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<22> | 9492 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | A_FSB | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-
-INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_21_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<21> | 9493 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | A_FSB | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-
-INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_20_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<20> | 9494 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | A_FSB | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-
-INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_19_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<19> | 9495 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | A_FSB | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-
-INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_18_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<18> | 9496 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | A_FSB | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-
-INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_17_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<17> | 9497 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | A_FSB | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-
-INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_16_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<16> | 9498 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | A_FSB | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-
-INPUT_INSTANCE | 0 | 0 | NULL | CLK2X_IOB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 2
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | CLK2X_IOB | 9499 | PI | 577 | 0 | MXSE_COPY_0_COPY_0 | CLK2X_IOB;CLK2X_IOB;CLK2X_IOB | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 3 | 5 | II_FCLK
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 7 | 5 | II_FCLKINV
-NODE | FCLK-IO_3 | 9316 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
-
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | nVMA_IOB_OBUF | MXSE_COPY_0_COPY_0 | 2155877376 | 16 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nVMA_IOB_OBUF | 9318 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOB_OBUF.Q | nVMA_IOB_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9359 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9360 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9362 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9364 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9365 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOACT | 9385 | ? | 648 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOACT.Q | IOACT | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/VPArf | 9393 | ? | 648 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/VPArf.Q | iobm/VPArf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/VPArr | 9394 | ? | 648 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/VPArr.Q | iobm/VPArr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nVMA_IOB_OBUF$Q | 9317 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOB_OBUF.Q | nVMA_IOB_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | nVMA_IOB_OBUF | 9318 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOB_OBUF.Q | nVMA_IOB_OBUF | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | nVMA_IOB_OBUF.EXP | 10020 | ? | 615 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOB_OBUF.EXP | nVMA_IOB_OBUF | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | nVMA_IOB_OBUF.SI | nVMA_IOB_OBUF | 0 | 15 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nVMA_IOB_OBUF | 9318 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOB_OBUF.Q | nVMA_IOB_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9359 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9360 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9362 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9364 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9365 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOACT | 9385 | ? | 648 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOACT.Q | IOACT | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/VPArf | 9393 | ? | 648 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/VPArf.Q | iobm/VPArf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/VPArr | 9394 | ? | 648 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/VPArr.Q | iobm/VPArr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nVMA_IOB_OBUF.D1 | 9519 | ? | 648 | 4096 | nVMA_IOB_OBUF | NULL | NULL | nVMA_IOB_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nVMA_IOB_OBUF.D2 | 9520 | ? | 648 | 4096 | nVMA_IOB_OBUF | NULL | NULL | nVMA_IOB_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 6 | IV_FALSE | nVMA_IOB_OBUF | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4>
-SPPTERM | 9 | IV_TRUE | nVMA_IOB_OBUF | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4> | IV_TRUE | IOACT | IV_TRUE | iobm/VPArf | IV_TRUE | iobm/VPArr
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | nVMA_IOB_OBUF.EXP | 10009 | ? | 615 | 0 | nVMA_IOB_OBUF | NULL | NULL | nVMA_IOB_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 4 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1
-
-SRFF_INSTANCE | nVMA_IOB_OBUF.REG | nVMA_IOB_OBUF | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nVMA_IOB_OBUF.D | 9518 | ? | 648 | 0 | nVMA_IOB_OBUF | NULL | NULL | nVMA_IOB_OBUF.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nVMA_IOB_OBUF.Q | 9521 | ? | 661 | 0 | nVMA_IOB_OBUF | NULL | NULL | nVMA_IOB_OBUF.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-INPUT_INSTANCE | 0 | 0 | NULL | CLK_FSB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 2
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | CLK_FSB | 9500 | PI | 578 | 0 | MXSE_COPY_0_COPY_0 | CLK_FSB;CLK_FSB;CLK_FSB | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 3 | 5 | II_FCLK
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 7 | 5 | II_FCLKINV
-NODE | FCLK-IO_1 | 9320 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 7 | 5 | II_FCLKINV
-
-INPUT_INSTANCE | 0 | 0 | NULL | nAS_FSB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | nAS_FSB | 9506 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | cs/nOverlay1 | MXSE_COPY_0_COPY_0 | 2155873280 | 7 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay0 | 9332 | ? | 598 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9306 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9354 | ? | 646 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_1_IBUF | 9410 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_1_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | cs/nOverlay1.EXP | 10037 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.EXP | cs/nOverlay1 | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | cs/nOverlay1.SI | cs/nOverlay1 | 0 | 6 | 4
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay0 | 9332 | ? | 598 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9306 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9354 | ? | 646 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_1_IBUF | 9410 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_1_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cs/nOverlay1.D1 | 9523 | ? | 590 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cs/nOverlay1.D2 | 9524 | ? | 590 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | cs/nOverlay0
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | cs/nOverlay1.EXP | 10024 | ? | 0 | 0 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 2 | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | ram/RASEL
-SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_1_IBUF
-OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | cs/nOverlay1.CE | 9525 | ? | 592 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 10 | 9 | MC_SI_CE
-SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-
-SRFF_INSTANCE | cs/nOverlay1.REG | cs/nOverlay1 | 0 | 3 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cs/nOverlay1.D | 9522 | ? | 590 | 0 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | cs/nOverlay1.CE | 9525 | ? | 592 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 10 | 9 | MC_SI_CE
-SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cs/nOverlay1.Q | 9526 | ? | 645 | 0 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | ram/Once | MXSE_COPY_0_COPY_0 | 2155877376 | 17 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9322 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS2 | 9350 | ? | 619 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_7_OBUF.EXP | 10069 | ? | 593 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_7_OBUF.EXP | RA_7_OBUF | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/Once | 9322 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | ram/Once.EXP | 10070 | ? | 619 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.EXP | ram/Once | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | ram/Once.SI | ram/Once | 0 | 16 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9322 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS2 | 9350 | ? | 619 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_7_OBUF.EXP | 10069 | ? | 593 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_7_OBUF.EXP | RA_7_OBUF | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/Once.D1 | 9528 | ? | 593 | 4096 | ram/Once | NULL | NULL | ram/Once.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/Once.D2 | 9529 | ? | 593 | 4096 | ram/Once | NULL | NULL | ram/Once.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | RA_7_OBUF.EXP
-SPPTERM | 3 | IV_TRUE | ram/Once | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | ram/Once.EXP | 10059 | ? | 619 | 0 | ram/Once | NULL | NULL | ram/Once.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 13 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_TRUE | ram/Once | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RAMDIS2 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf
-SPPTERM | 14 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_TRUE | ram/Once | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
-SPPTERM | 14 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_TRUE | ram/Once | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RAMDIS2 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf
-
-SRFF_INSTANCE | ram/Once.REG | ram/Once | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/Once.D | 9527 | ? | 593 | 0 | ram/Once | NULL | NULL | ram/Once.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/Once.Q | 9530 | ? | 645 | 0 | ram/Once | NULL | NULL | ram/Once.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | cnt/RefDone | MXSE_COPY_0_COPY_0 | 2155873536 | 11 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RefAck | 9389 | ? | 594 | 0 | MXSE_COPY_0_COPY_0 | NULL | RefAck.Q | RefAck | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9372 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9376 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9377 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9378 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9379 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | cnt/RefDone.SI | cnt/RefDone | 0 | 10 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RefAck | 9389 | ? | 594 | 0 | MXSE_COPY_0_COPY_0 | NULL | RefAck.Q | RefAck | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9372 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9376 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9377 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9378 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9379 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/RefDone.D1 | 9532 | ? | 594 | 4096 | cnt/RefDone | NULL | NULL | cnt/RefDone.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/RefDone.D2 | 9533 | ? | 594 | 4096 | cnt/RefDone | NULL | NULL | cnt/RefDone.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_FALSE | cnt/RefDone | IV_FALSE | RefAck
-SPPTERM | 8 | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<4> | IV_FALSE | cnt/RefCnt<7>
-
-SRFF_INSTANCE | cnt/RefDone.REG | cnt/RefDone | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/RefDone.D | 9531 | ? | 594 | 0 | cnt/RefDone | NULL | NULL | cnt/RefDone.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/RefDone.Q | 9534 | ? | 645 | 0 | cnt/RefDone | NULL | NULL | cnt/RefDone.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-INPUT_INSTANCE | 0 | 0 | NULL | nWE_FSB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | nWE_FSB | 9502 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobs/Once | MXSE_COPY_0_COPY_0 | 2155873536 | 11 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP28_.EXP | 10041 | ? | 595 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP28_.EXP | EXP28_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP29_.EXP | 10042 | ? | 595 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP29_.EXP | EXP29_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobs/Once.SI | iobs/Once | 0 | 10 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP28_.EXP | 10041 | ? | 595 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP28_.EXP | EXP28_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP29_.EXP | 10042 | ? | 595 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP29_.EXP | EXP29_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/Once.D1 | 9536 | ? | 595 | 4096 | iobs/Once | NULL | NULL | iobs/Once.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/Once.D2 | 9537 | ? | 595 | 4096 | iobs/Once | NULL | NULL | iobs/Once.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | EXP28_.EXP
-SPPTERM | 1 | IV_TRUE | EXP29_.EXP
-SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-SPPTERM | 3 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd2
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | iobs/Once
-SPPTERM | 3 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd2
-SPPTERM | 3 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd1
-
-SRFF_INSTANCE | iobs/Once.REG | iobs/Once | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/Once.D | 9535 | ? | 595 | 0 | iobs/Once | NULL | NULL | iobs/Once.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/Once.Q | 9538 | ? | 640 | 0 | iobs/Once | NULL | NULL | iobs/Once.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | BERR_IOBS | MXSE_COPY_0_COPY_0 | 2155877376 | 9 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9325 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOBERR | 9327 | ? | 650 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9375 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | BERR_IOBS | 9325 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | BERR_IOBS.SI | BERR_IOBS | 0 | 8 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9325 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOBERR | 9327 | ? | 650 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9375 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | BERR_IOBS.D1 | 9540 | ? | 596 | 4096 | BERR_IOBS | NULL | NULL | BERR_IOBS.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | BERR_IOBS.D2 | 9541 | ? | 596 | 4096 | BERR_IOBS | NULL | NULL | BERR_IOBS.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 3 | IV_TRUE | BERR_IOBS | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-SPPTERM | 6 | IV_TRUE | iobs/Once | IV_TRUE | BERR_IOBS | IV_FALSE | IOBERR | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_TRUE | ALE1
-SPPTERM | 7 | IV_TRUE | iobs/Once | IV_FALSE | BERR_IOBS | IV_TRUE | IOBERR | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_TRUE | ALE1
-SPPTERM | 7 | IV_TRUE | iobs/Once | IV_FALSE | BERR_IOBS | IV_TRUE | IOBERR | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1
-
-SRFF_INSTANCE | BERR_IOBS.REG | BERR_IOBS | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | BERR_IOBS.D | 9539 | ? | 596 | 0 | BERR_IOBS | NULL | NULL | BERR_IOBS.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | BERR_IOBS.Q | 9542 | ? | 620 | 0 | BERR_IOBS | NULL | NULL | BERR_IOBS.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-INPUT_INSTANCE | 0 | 0 | NULL | nBERR_IOB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | nBERR_IOB | 9501 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | nBERR_IOB_IBUF | 9326 | ? | 672 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
-
-INPUT_INSTANCE | 0 | 0 | NULL | CLK_IOB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 2
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | CLK_IOB | 9507 | PI | 579 | 0 | MXSE_COPY_0_COPY_0 | CLK_IOB;CLK_IOB;CLK_IOB | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | CLK_IOB_IBUF | 9369 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 7 | 5 | II_FCLKINV
-NODE | FCLK-IO_4 | 9370 | ? | 666 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 7 | 5 | II_FCLKINV
-
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | IOBERR | MXSE_COPY_0_COPY_0 | 2155877376 | 18 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_IOB_IBUF | 9326 | ? | 672 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOBERR | 9327 | ? | 650 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9361 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9369 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ETACK | 9380 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9399 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9400 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9366 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd5 | 9367 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd5.Q | iobm/IOS_FSM_FFd5 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd6 | 9368 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd6.Q | iobm/IOS_FSM_FFd6 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd7 | 9371 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd7.Q | iobm/IOS_FSM_FFd7 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOREQr | 9381 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrf | 9402 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrr | 9403 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrf | 9405 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrr | 9406 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP33_.EXP | 10053 | ? | 650 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP33_.EXP | EXP33_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | IOBERR | 9327 | ? | 650 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | IOBERR.EXP | 10054 | ? | 665 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.EXP | IOBERR | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | IOBERR.SI | IOBERR | 0 | 17 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_IOB_IBUF | 9326 | ? | 672 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOBERR | 9327 | ? | 650 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9361 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9369 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ETACK | 9380 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9399 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9400 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9366 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd5 | 9367 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd5.Q | iobm/IOS_FSM_FFd5 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd6 | 9368 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd6.Q | iobm/IOS_FSM_FFd6 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd7 | 9371 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd7.Q | iobm/IOS_FSM_FFd7 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOREQr | 9381 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrf | 9402 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrr | 9403 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrf | 9405 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrr | 9406 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP33_.EXP | 10053 | ? | 650 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP33_.EXP | EXP33_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | IOBERR.D1 | 9544 | ? | 650 | 4096 | IOBERR | NULL | NULL | IOBERR.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | IOBERR.D2 | 9545 | ? | 650 | 4096 | IOBERR | NULL | NULL | IOBERR.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | EXP33_.EXP
-SPPTERM | 5 | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | IOBERR | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/ETACK
-SPPTERM | 5 | IV_FALSE | nBERR_IOB_IBUF | IV_FALSE | IOBERR | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/ETACK
-SPPTERM | 6 | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | IOBERR | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | IOBERR.EXP | 10051 | ? | 665 | 0 | IOBERR | NULL | NULL | IOBERR.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 8 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd5 | IV_FALSE | iobm/IOS_FSM_FFd6 | IV_TRUE | CLK_IOB_IBUF | IV_FALSE | iobm/IOS_FSM_FFd7 | IV_FALSE | iobm/IOREQr | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr
-SPPTERM | 8 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd5 | IV_FALSE | iobm/IOS_FSM_FFd6 | IV_TRUE | CLK_IOB_IBUF | IV_FALSE | iobm/IOS_FSM_FFd7 | IV_FALSE | iobm/IOREQr | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr
-
-SRFF_INSTANCE | IOBERR.REG | IOBERR | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | IOBERR.D | 9543 | ? | 650 | 0 | IOBERR | NULL | NULL | IOBERR.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | IOBERR.Q | 9546 | ? | 650 | 0 | IOBERR | NULL | NULL | IOBERR.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_IOB | CLK2X_IOB
-
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | IORW0 | MXSE_COPY_0_COPY_0 | 2155877376 | 13 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9328 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW1 | 9346 | ? | 615 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP23_.EXP | 10013 | ? | 597 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP23_.EXP | EXP23_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr.EXP | 10014 | ? | 597 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.EXP | iobs/IOACTr | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | IORW0 | 9328 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | IORW0.SI | IORW0 | 0 | 12 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9328 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW1 | 9346 | ? | 615 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP23_.EXP | 10013 | ? | 597 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP23_.EXP | EXP23_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr.EXP | 10014 | ? | 597 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.EXP | iobs/IOACTr | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | IORW0.D1 | 9548 | ? | 597 | 4096 | IORW0 | NULL | NULL | IORW0.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | IORW0.D2 | 9549 | ? | 597 | 4096 | IORW0 | NULL | NULL | IORW0.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | EXP23_.EXP
-SPPTERM | 1 | IV_TRUE | iobs/IOACTr.EXP
-SPPTERM | 5 | IV_TRUE | IORW0 | IV_FALSE | iobs/IORW1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_FALSE | ALE1
-SPPTERM | 5 | IV_FALSE | IORW0 | IV_TRUE | iobs/IORW1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_FALSE | ALE1
-SPPTERM | 8 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_TRUE | IORW0 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 8 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_TRUE | IORW0 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1
-SPPTERM | 8 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_FALSE | IORW0 | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-
-SRFF_INSTANCE | IORW0.REG | IORW0 | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | IORW0.D | 9547 | ? | 597 | 0 | IORW0 | NULL | NULL | IORW0.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | IORW0.Q | 9550 | ? | 682 | 0 | IORW0 | NULL | NULL | IORW0.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-INPUT_INSTANCE | 0 | 0 | NULL | nRES_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 2
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | nRES | 9503 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | nRES_IBUF | 9330 | ? | 677 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 9 | 5 | II_FSRINV
-NODE | FSR-IO_5 | 9331 | ? | 599 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 9 | 5 | II_FSRINV
-
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cs/nOverlay0 | MXSE_COPY_0_COPY_0 | 2155877376 | 13 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay0 | 9332 | ? | 598 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FSR-IO_5 | 9331 | ? | 599 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 9 | 5 | II_FSRINV
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cs/nOverlay0 | 9332 | ? | 598 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | cs/nOverlay0.EXP | 10067 | ? | 624 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.EXP | cs/nOverlay0 | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | cs/nOverlay0.SI | cs/nOverlay0 | 0 | 11 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay0 | 9332 | ? | 598 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cs/nOverlay0.D1 | 9552 | ? | 598 | 4096 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cs/nOverlay0.D2 | 9553 | ? | 598 | 6144 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | cs/nOverlay0 | IV_FALSE | nAS_FSB_IBUF
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | cs/nOverlay0 | IV_TRUE | fsb/ASrf
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | cs/nOverlay0.EXP | 10056 | ? | 624 | 0 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | fsb/ASrf
-
-SRFF_INSTANCE | cs/nOverlay0.REG | cs/nOverlay0 | 0 | 3 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cs/nOverlay0.D | 9551 | ? | 598 | 0 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 3 | 8 | SRFF_R
-NODE | FSR-IO_5 | 9331 | ? | 599 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 9 | 5 | II_FSRINV
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cs/nOverlay0.Q | 9554 | ? | 598 | 0 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-INPUT_INSTANCE | 0 | 0 | NULL | nLDS_FSB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | nLDS_FSB | 9504 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | nLDS_FSB_IBUF | 9344 | ? | 613 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | IOL0 | MXSE_COPY_0_COPY_0 | 2155873280 | 6 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOL1 | 9345 | ? | 600 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOL1.Q | iobs/IOL1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nLDS_FSB_IBUF | 9344 | ? | 613 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | IOL0 | 9333 | ? | 681 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOL0.Q | IOL0 | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | IOL0.SI | IOL0 | 0 | 5 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOL1 | 9345 | ? | 600 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOL1.Q | iobs/IOL1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nLDS_FSB_IBUF | 9344 | ? | 613 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | IOL0.D1 | 9556 | ? | 600 | 4096 | IOL0 | NULL | NULL | IOL0.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | IOL0.D2 | 9557 | ? | 600 | 4096 | IOL0 | NULL | NULL | IOL0.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_FALSE | nLDS_FSB_IBUF | IV_TRUE | ALE1
-SPPTERM | 2 | IV_TRUE | iobs/IOL1 | IV_FALSE | ALE1
-OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | IOL0.CE | 9558 | ? | 601 | 4096 | IOL0 | NULL | NULL | IOL0.SI | 10 | 9 | MC_SI_CE
-SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
-
-SRFF_INSTANCE | IOL0.REG | IOL0 | 0 | 3 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | IOL0.D | 9555 | ? | 600 | 0 | IOL0 | NULL | NULL | IOL0.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | IOL0.CE | 9558 | ? | 601 | 4096 | IOL0 | NULL | NULL | IOL0.SI | 10 | 9 | MC_SI_CE
-SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | IOL0.Q | 9559 | ? | 681 | 0 | IOL0 | NULL | NULL | IOL0.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-INPUT_INSTANCE | 0 | 0 | NULL | nUDS_FSB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | nUDS_FSB | 9505 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | nUDS_FSB_IBUF | 9348 | ? | 617 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | IOU0 | MXSE_COPY_0_COPY_0 | 2155873280 | 6 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOU1 | 9349 | ? | 602 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOU1.Q | iobs/IOU1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nUDS_FSB_IBUF | 9348 | ? | 617 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | IOU0 | 9334 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOU0.Q | IOU0 | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | IOU0.SI | IOU0 | 0 | 5 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOU1 | 9349 | ? | 602 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOU1.Q | iobs/IOU1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nUDS_FSB_IBUF | 9348 | ? | 617 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | IOU0.D1 | 9561 | ? | 602 | 4096 | IOU0 | NULL | NULL | IOU0.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | IOU0.D2 | 9562 | ? | 602 | 4096 | IOU0 | NULL | NULL | IOU0.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_FALSE | nUDS_FSB_IBUF | IV_TRUE | ALE1
-SPPTERM | 2 | IV_TRUE | iobs/IOU1 | IV_FALSE | ALE1
-OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | IOU0.CE | 9563 | ? | 603 | 4096 | IOU0 | NULL | NULL | IOU0.SI | 10 | 9 | MC_SI_CE
-SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
-
-SRFF_INSTANCE | IOU0.REG | IOU0 | 0 | 3 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | IOU0.D | 9560 | ? | 602 | 0 | IOU0 | NULL | NULL | IOU0.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | IOU0.CE | 9563 | ? | 603 | 4096 | IOU0 | NULL | NULL | IOU0.SI | 10 | 9 | MC_SI_CE
-SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | IOU0.Q | 9564 | ? | 682 | 0 | IOU0 | NULL | NULL | IOU0.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | TimeoutA | MXSE_COPY_0_COPY_0 | 2155877376 | 11 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9335 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9372 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9376 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9377 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9378 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9379 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | TimeoutA | 9335 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | TimeoutA.SI | TimeoutA | 0 | 10 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9335 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9372 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9376 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9377 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9378 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9379 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | TimeoutA.D1 | 9566 | ? | 604 | 4096 | TimeoutA | NULL | NULL | TimeoutA.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | TimeoutA.D2 | 9567 | ? | 604 | 4096 | TimeoutA | NULL | NULL | TimeoutA.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 3 | IV_TRUE | TimeoutA | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-SPPTERM | 9 | IV_FALSE | TimeoutA | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<4>
-SPPTERM | 9 | IV_FALSE | TimeoutA | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<4> | IV_TRUE | fsb/ASrf
-
-SRFF_INSTANCE | TimeoutA.REG | TimeoutA | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | TimeoutA.D | 9565 | ? | 604 | 0 | TimeoutA | NULL | NULL | TimeoutA.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | TimeoutA.Q | 9568 | ? | 620 | 0 | TimeoutA | NULL | NULL | TimeoutA.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | TimeoutB | MXSE_COPY_0_COPY_0 | 2155877376 | 13 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutB | 9336 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimeoutBPre | 9337 | ? | 606 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.Q | cnt/TimeoutBPre | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9372 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9376 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9377 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9378 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9379 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | TimeoutB | 9336 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | TimeoutB.SI | TimeoutB | 0 | 12 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutB | 9336 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimeoutBPre | 9337 | ? | 606 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.Q | cnt/TimeoutBPre | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9372 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9376 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9377 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9378 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9379 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | TimeoutB.D1 | 9570 | ? | 605 | 4096 | TimeoutB | NULL | NULL | TimeoutB.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | TimeoutB.D2 | 9571 | ? | 605 | 4096 | TimeoutB | NULL | NULL | TimeoutB.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 3 | IV_TRUE | TimeoutB | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-SPPTERM | 11 | IV_FALSE | TimeoutB | IV_TRUE | cnt/TimeoutBPre | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<4> | IV_FALSE | cnt/RefCnt<7>
-SPPTERM | 11 | IV_FALSE | TimeoutB | IV_TRUE | cnt/TimeoutBPre | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<4> | IV_FALSE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf
-
-SRFF_INSTANCE | TimeoutB.REG | TimeoutB | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | TimeoutB.D | 9569 | ? | 605 | 0 | TimeoutB | NULL | NULL | TimeoutB.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | TimeoutB.Q | 9572 | ? | 620 | 0 | TimeoutB | NULL | NULL | TimeoutB.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/TimeoutBPre | MXSE_COPY_0_COPY_0 | 2155877376 | 12 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimeoutBPre | 9337 | ? | 606 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.Q | cnt/TimeoutBPre | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9372 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9376 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9377 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9378 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9379 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/TimeoutBPre | 9337 | ? | 606 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.Q | cnt/TimeoutBPre | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | cnt/TimeoutBPre.SI | cnt/TimeoutBPre | 0 | 11 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimeoutBPre | 9337 | ? | 606 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.Q | cnt/TimeoutBPre | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9372 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9376 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9377 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9378 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9379 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/TimeoutBPre.D1 | 9574 | ? | 606 | 4096 | cnt/TimeoutBPre | NULL | NULL | cnt/TimeoutBPre.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/TimeoutBPre.D2 | 9575 | ? | 606 | 4096 | cnt/TimeoutBPre | NULL | NULL | cnt/TimeoutBPre.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 3 | IV_TRUE | cnt/TimeoutBPre | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-SPPTERM | 10 | IV_FALSE | cnt/TimeoutBPre | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<4> | IV_FALSE | cnt/RefCnt<7>
-SPPTERM | 10 | IV_FALSE | cnt/TimeoutBPre | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<4> | IV_FALSE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf
-
-SRFF_INSTANCE | cnt/TimeoutBPre.REG | cnt/TimeoutBPre | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/TimeoutBPre.D | 9573 | ? | 606 | 0 | cnt/TimeoutBPre | NULL | NULL | cnt/TimeoutBPre.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/TimeoutBPre.Q | 9576 | ? | 606 | 0 | cnt/TimeoutBPre | NULL | NULL | cnt/TimeoutBPre.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/BERR0r | MXSE_COPY_0_COPY_0 | 2155873536 | 10 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9338 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutB | 9336 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | fsb/BERR0r | 9338 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | fsb/BERR0r.EXP | 10046 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.EXP | fsb/BERR0r | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | fsb/BERR0r.SI | fsb/BERR0r | 0 | 9 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9338 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutB | 9336 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | fsb/BERR0r.D1 | 9578 | ? | 607 | 4096 | fsb/BERR0r | NULL | NULL | fsb/BERR0r.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | fsb/BERR0r.D2 | 9579 | ? | 607 | 4096 | fsb/BERR0r | NULL | NULL | fsb/BERR0r.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_FALSE | TimeoutB | IV_FALSE | fsb/BERR0r
-SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/BERR0r
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | fsb/BERR0r.EXP | 10033 | ? | 0 | 0 | fsb/BERR0r | NULL | NULL | fsb/BERR0r.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 3 | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF
-SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF
-
-SRFF_INSTANCE | fsb/BERR0r.REG | fsb/BERR0r | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | fsb/BERR0r.D | 9577 | ? | 607 | 0 | fsb/BERR0r | NULL | NULL | fsb/BERR0r.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | fsb/BERR0r.Q | 9580 | ? | 620 | 0 | fsb/BERR0r | NULL | NULL | fsb/BERR0r.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/BERR1r | MXSE_COPY_0_COPY_0 | 2155873536 | 5 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9325 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9339 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | fsb/BERR1r | 9339 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | fsb/BERR1r.SI | fsb/BERR1r | 0 | 4 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9325 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9339 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | fsb/BERR1r.D1 | 9582 | ? | 608 | 4096 | fsb/BERR1r | NULL | NULL | fsb/BERR1r.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | fsb/BERR1r.D2 | 9583 | ? | 608 | 4096 | fsb/BERR1r | NULL | NULL | fsb/BERR1r.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_FALSE | BERR_IOBS | IV_FALSE | fsb/BERR1r
-SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-
-SRFF_INSTANCE | fsb/BERR1r.REG | fsb/BERR1r | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | fsb/BERR1r.D | 9581 | ? | 608 | 0 | fsb/BERR1r | NULL | NULL | fsb/BERR1r.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | fsb/BERR1r.Q | 9584 | ? | 620 | 0 | fsb/BERR1r | NULL | NULL | fsb/BERR1r.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/Ready0r | MXSE_COPY_0_COPY_0 | 2155873536 | 9 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready0r | 9340 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMReady | 9409 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | fsb/Ready0r | 9340 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | fsb/Ready0r.SI | fsb/Ready0r | 0 | 8 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready0r | 9340 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMReady | 9409 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | fsb/Ready0r.D1 | 9586 | ? | 609 | 4096 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | fsb/Ready0r.D2 | 9587 | ? | 609 | 4096 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_FALSE | ram/RAMReady
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_FALSE | ram/RAMReady
-
-SRFF_INSTANCE | fsb/Ready0r.REG | fsb/Ready0r | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | fsb/Ready0r.D | 9585 | ? | 609 | 0 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | fsb/Ready0r.Q | 9588 | ? | 620 | 0 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/Ready1r | MXSE_COPY_0_COPY_0 | 2155873536 | 18 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9341 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9347 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_FSB_OBUF.EXP | 9993 | ? | 610 | 0 | MXSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.EXP | nBERR_FSB_OBUF | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | fsb/Ready1r | 9341 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | fsb/Ready1r.SI | fsb/Ready1r | 0 | 17 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9341 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9347 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_FSB_OBUF.EXP | 9993 | ? | 610 | 0 | MXSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.EXP | nBERR_FSB_OBUF | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | fsb/Ready1r.D1 | 9590 | ? | 610 | 4096 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | fsb/Ready1r.D2 | 9591 | ? | 610 | 4096 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | nBERR_FSB_OBUF.EXP
-SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-SPPTERM | 3 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady
-SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady
-SPPTERM | 11 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady
-SPPTERM | 11 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady
-
-SRFF_INSTANCE | fsb/Ready1r.REG | fsb/Ready1r | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | fsb/Ready1r.D | 9589 | ? | 610 | 0 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | fsb/Ready1r.Q | 9592 | ? | 620 | 0 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/Ready2r | MXSE_COPY_0_COPY_0 | 2155873536 | 22 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9299 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9301 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9304 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9305 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9306 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9335 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9342 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9300 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nOE_OBUF.EXP | 9995 | ? | 611 | 0 | MXSE_COPY_0_COPY_0 | NULL | nOE_OBUF.EXP | nOE_OBUF | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | fsb/Ready2r | 9342 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | fsb/Ready2r.SI | fsb/Ready2r | 0 | 21 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9299 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9301 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9304 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9305 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9306 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9335 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9342 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9300 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nOE_OBUF.EXP | 9995 | ? | 611 | 0 | MXSE_COPY_0_COPY_0 | NULL | nOE_OBUF.EXP | nOE_OBUF | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | fsb/Ready2r.D1 | 9594 | ? | 611 | 4096 | fsb/Ready2r | NULL | NULL | fsb/Ready2r.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | fsb/Ready2r.D2 | 9595 | ? | 611 | 4096 | fsb/Ready2r | NULL | NULL | fsb/Ready2r.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | nOE_OBUF.EXP
-SPPTERM | 19 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r
-SPPTERM | 19 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r
-SPPTERM | 19 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r
-SPPTERM | 19 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r
-SPPTERM | 19 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r
-
-SRFF_INSTANCE | fsb/Ready2r.REG | fsb/Ready2r | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | fsb/Ready2r.D | 9593 | ? | 611 | 0 | fsb/Ready2r | NULL | NULL | fsb/Ready2r.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | fsb/Ready2r.Q | 9596 | ? | 620 | 0 | fsb/Ready2r | NULL | NULL | fsb/Ready2r.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | fsb/VPA | MXSE_COPY_0_COPY_0 | 2155873280 | 10 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9339 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9343 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA__or00001/fsb/VPA__or00001_D2.UIM | 9480 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA__or00001/fsb/VPA__or00001_D2.Q | fsb/VPA__or00001/fsb/VPA__or00001_D2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9325 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9338 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$602.UIM | 9481 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$602.Q | $OpTx$FX_DC$602 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP19_.EXP | 9997 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP19_.EXP | EXP19_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP20_.EXP | 9998 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP20_.EXP | EXP20_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | fsb/VPA | 9343 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | fsb/VPA.SI | fsb/VPA | 0 | 9 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9339 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9343 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA__or00001/fsb/VPA__or00001_D2.UIM | 9480 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA__or00001/fsb/VPA__or00001_D2.Q | fsb/VPA__or00001/fsb/VPA__or00001_D2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9325 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9338 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$602.UIM | 9481 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$602.Q | $OpTx$FX_DC$602 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP19_.EXP | 9997 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP19_.EXP | EXP19_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP20_.EXP | 9998 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP20_.EXP | EXP20_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | fsb/VPA.D1 | 9598 | ? | 612 | 4096 | fsb/VPA | NULL | NULL | fsb/VPA.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | fsb/VPA.D2 | 9599 | ? | 612 | 4096 | fsb/VPA | NULL | NULL | fsb/VPA.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | EXP19_.EXP
-SPPTERM | 1 | IV_TRUE | EXP20_.EXP
-SPPTERM | 3 | IV_TRUE | BERR_IOBS | IV_TRUE | fsb/VPA | IV_FALSE | nAS_FSB_IBUF
-SPPTERM | 3 | IV_TRUE | fsb/BERR0r | IV_TRUE | fsb/VPA | IV_FALSE | nAS_FSB_IBUF
-SPPTERM | 3 | IV_TRUE | fsb/BERR1r | IV_TRUE | fsb/VPA | IV_FALSE | nAS_FSB_IBUF
-SPPTERM | 3 | IV_TRUE | fsb/VPA | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | fsb/VPA__or00001/fsb/VPA__or00001_D2.UIM
-SPPTERM | 3 | IV_TRUE | fsb/VPA | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | $OpTx$FX_DC$602.UIM
-
-SRFF_INSTANCE | fsb/VPA.REG | fsb/VPA | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | fsb/VPA.D | 9597 | ? | 612 | 0 | fsb/VPA | NULL | NULL | fsb/VPA.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | fsb/VPA.Q | 9600 | ? | 612 | 0 | fsb/VPA | NULL | NULL | fsb/VPA.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/IOL1 | MXSE_COPY_0_COPY_0 | 2155873280 | 3 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nLDS_FSB_IBUF | 9344 | ? | 613 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Load1 | 9383 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/IOL1 | 9345 | ? | 600 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOL1.Q | iobs/IOL1 | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobs/IOL1.SI | iobs/IOL1 | 0 | 2 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nLDS_FSB_IBUF | 9344 | ? | 613 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Load1 | 9383 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/IOL1.D1 | 9602 | ? | 613 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/IOL1.D2 | 9603 | ? | 613 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_FALSE | nLDS_FSB_IBUF
-OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | iobs/IOL1.CE | 9604 | ? | 614 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 10 | 9 | MC_SI_CE
-SPPTERM | 1 | IV_TRUE | iobs/Load1
-
-SRFF_INSTANCE | iobs/IOL1.REG | iobs/IOL1 | 0 | 3 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/IOL1.D | 9601 | ? | 613 | 0 | iobs/IOL1 | NULL | NULL | iobs/IOL1.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | iobs/IOL1.CE | 9604 | ? | 614 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 10 | 9 | MC_SI_CE
-SPPTERM | 1 | IV_TRUE | iobs/Load1
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/IOL1.Q | 9605 | ? | 600 | 0 | iobs/IOL1 | NULL | NULL | iobs/IOL1.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | iobs/IORW1 | MXSE_COPY_0_COPY_0 | 2155877632 | 10 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW1 | 9346 | ? | 615 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP25_.EXP | 10021 | ? | 615 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP25_.EXP | EXP25_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr.EXP | 10022 | ? | 615 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.EXP | ram/BACTr | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/IORW1 | 9346 | ? | 615 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobs/IORW1.SI | iobs/IORW1 | 0 | 9 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW1 | 9346 | ? | 615 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP25_.EXP | 10021 | ? | 615 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP25_.EXP | EXP25_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr.EXP | 10022 | ? | 615 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.EXP | ram/BACTr | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/IORW1.D1 | 9607 | ? | 615 | 4096 | iobs/IORW1 | NULL | NULL | iobs/IORW1.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/IORW1.D2 | 9608 | ? | 615 | 4096 | iobs/IORW1 | NULL | NULL | iobs/IORW1.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | iobs/Once
-SPPTERM | 1 | IV_FALSE | ALE1
-SPPTERM | 1 | IV_TRUE | EXP25_.EXP
-SPPTERM | 1 | IV_TRUE | ram/BACTr.EXP
-SPPTERM | 2 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF
-SPPTERM | 2 | IV_TRUE | nWE_FSB_IBUF | IV_TRUE | iobs/IORW1
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/IORW1
-
-SRFF_INSTANCE | iobs/IORW1.REG | iobs/IORW1 | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/IORW1.D | 9606 | ? | 615 | 0 | iobs/IORW1 | NULL | NULL | iobs/IORW1.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/IORW1.Q | 9609 | ? | 615 | 0 | iobs/IORW1 | NULL | NULL | iobs/IORW1.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobs/IOReady | MXSE_COPY_0_COPY_0 | 2155877376 | 9 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9347 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOBERR | 9327 | ? | 650 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9375 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/IOReady | 9347 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobs/IOReady.SI | iobs/IOReady | 0 | 8 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9347 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOBERR | 9327 | ? | 650 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9375 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/IOReady.D1 | 9611 | ? | 616 | 4096 | iobs/IOReady | NULL | NULL | iobs/IOReady.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/IOReady.D2 | 9612 | ? | 616 | 4096 | iobs/IOReady | NULL | NULL | iobs/IOReady.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 3 | IV_TRUE | iobs/IOReady | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-SPPTERM | 6 | IV_TRUE | iobs/Once | IV_TRUE | IOBERR | IV_TRUE | iobs/IOReady | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_TRUE | ALE1
-SPPTERM | 7 | IV_TRUE | iobs/Once | IV_FALSE | IOBERR | IV_FALSE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_TRUE | ALE1
-SPPTERM | 7 | IV_TRUE | iobs/Once | IV_FALSE | IOBERR | IV_FALSE | iobs/IOReady | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1
-
-SRFF_INSTANCE | iobs/IOReady.REG | iobs/IOReady | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/IOReady.D | 9610 | ? | 616 | 0 | iobs/IOReady | NULL | NULL | iobs/IOReady.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/IOReady.Q | 9613 | ? | 620 | 0 | iobs/IOReady | NULL | NULL | iobs/IOReady.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/IOU1 | MXSE_COPY_0_COPY_0 | 2155873280 | 3 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nUDS_FSB_IBUF | 9348 | ? | 617 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Load1 | 9383 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/IOU1 | 9349 | ? | 602 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOU1.Q | iobs/IOU1 | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobs/IOU1.SI | iobs/IOU1 | 0 | 2 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nUDS_FSB_IBUF | 9348 | ? | 617 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Load1 | 9383 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/IOU1.D1 | 9615 | ? | 617 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/IOU1.D2 | 9616 | ? | 617 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_FALSE | nUDS_FSB_IBUF
-OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | iobs/IOU1.CE | 9617 | ? | 618 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 10 | 9 | MC_SI_CE
-SPPTERM | 1 | IV_TRUE | iobs/Load1
-
-SRFF_INSTANCE | iobs/IOU1.REG | iobs/IOU1 | 0 | 3 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/IOU1.D | 9614 | ? | 617 | 0 | iobs/IOU1 | NULL | NULL | iobs/IOU1.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | iobs/IOU1.CE | 9617 | ? | 618 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 10 | 9 | MC_SI_CE
-SPPTERM | 1 | IV_TRUE | iobs/Load1
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/IOU1.Q | 9618 | ? | 602 | 0 | iobs/IOU1 | NULL | NULL | iobs/IOU1.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | ram/RAMDIS2 | MXSE_COPY_0_COPY_0 | 2155877376 | 18 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS2 | 9350 | ? | 619 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9322 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9299 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9354 | ? | 646 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once.EXP | 10070 | ? | 619 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.EXP | ram/Once | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/RAMDIS2 | 9350 | ? | 619 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | ram/RAMDIS2.EXP | 10071 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.EXP | ram/RAMDIS2 | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | ram/RAMDIS2.SI | ram/RAMDIS2 | 0 | 17 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS2 | 9350 | ? | 619 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9322 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9299 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9354 | ? | 646 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once.EXP | 10070 | ? | 619 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.EXP | ram/Once | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/RAMDIS2.D1 | 9620 | ? | 619 | 4096 | ram/RAMDIS2 | NULL | NULL | ram/RAMDIS2.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/RAMDIS2.D2 | 9621 | ? | 619 | 4096 | ram/RAMDIS2 | NULL | NULL | ram/RAMDIS2.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | ram/Once.EXP
-SPPTERM | 3 | IV_TRUE | ram/RAMDIS2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-SPPTERM | 10 | IV_TRUE | ram/Once | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
-SPPTERM | 10 | IV_TRUE | ram/Once | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RAMDIS2 | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf
-SPPTERM | 13 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_TRUE | ram/Once | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | ram/RAMDIS2.EXP | 10060 | ? | 0 | 0 | ram/RAMDIS2 | NULL | NULL | ram/RAMDIS2.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 2 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | ram/RASEL
-
-SRFF_INSTANCE | ram/RAMDIS2.REG | ram/RAMDIS2 | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/RAMDIS2.D | 9619 | ? | 619 | 0 | ram/RAMDIS2 | NULL | NULL | ram/RAMDIS2.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/RAMDIS2.Q | 9622 | ? | 619 | 0 | ram/RAMDIS2 | NULL | NULL | ram/RAMDIS2.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | nDTACK_FSB_OBUF | MXSE_COPY_0_COPY_0 | 2155873280 | 10 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9339 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_FSB_OBUF.UIM | 9353 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9325 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9338 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$602.UIM | 9481 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$602.Q | $OpTx$FX_DC$602 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP14_.EXP | 9989 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP14_.EXP | EXP14_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP15_.EXP | 9990 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP15_.EXP | EXP15_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nDTACK_FSB_OBUF | 9352 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | nDTACK_FSB_OBUF.UIM | 9353 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | nDTACK_FSB_OBUF.SI | nDTACK_FSB_OBUF | 0 | 9 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9339 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_FSB_OBUF.UIM | 9353 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9325 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9338 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$602.UIM | 9481 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$602.Q | $OpTx$FX_DC$602 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP14_.EXP | 9989 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP14_.EXP | EXP14_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP15_.EXP | 9990 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP15_.EXP | EXP15_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nDTACK_FSB_OBUF.D1 | 9624 | ? | 620 | 4096 | nDTACK_FSB_OBUF | NULL | NULL | nDTACK_FSB_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nDTACK_FSB_OBUF.D2 | 9625 | ? | 620 | 4096 | nDTACK_FSB_OBUF | NULL | NULL | nDTACK_FSB_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | EXP14_.EXP
-SPPTERM | 1 | IV_TRUE | EXP15_.EXP
-SPPTERM | 2 | IV_TRUE | BERR_IOBS | IV_TRUE | nDTACK_FSB_OBUF.UIM
-SPPTERM | 2 | IV_TRUE | fsb/BERR0r | IV_TRUE | nDTACK_FSB_OBUF.UIM
-SPPTERM | 2 | IV_TRUE | fsb/BERR1r | IV_TRUE | nDTACK_FSB_OBUF.UIM
-SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-SPPTERM | 2 | IV_TRUE | nDTACK_FSB_OBUF.UIM | IV_FALSE | $OpTx$FX_DC$602.UIM
-
-SRFF_INSTANCE | nDTACK_FSB_OBUF.REG | nDTACK_FSB_OBUF | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nDTACK_FSB_OBUF.D | 9623 | ? | 620 | 0 | nDTACK_FSB_OBUF | NULL | NULL | nDTACK_FSB_OBUF.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nDTACK_FSB_OBUF.Q | 9626 | ? | 620 | 0 | nDTACK_FSB_OBUF | NULL | NULL | nDTACK_FSB_OBUF.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RASEL | MXSE_COPY_0_COPY_0 | 2155873280 | 14 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9384 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_0_OBUF.EXP | 10036 | ? | 621 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_0_OBUF.EXP | RA_0_OBUF | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP32_.EXP | 10048 | ? | 621 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP32_.EXP | EXP32_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/RASEL | 9354 | ? | 646 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | ram/RASEL.SI | ram/RASEL | 0 | 13 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9384 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_0_OBUF.EXP | 10036 | ? | 621 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_0_OBUF.EXP | RA_0_OBUF | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP32_.EXP | 10048 | ? | 621 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP32_.EXP | EXP32_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/RASEL.D1 | 9628 | ? | 621 | 4096 | ram/RASEL | NULL | NULL | ram/RASEL.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/RASEL.D2 | 9629 | ? | 621 | 4096 | ram/RASEL | NULL | NULL | ram/RASEL.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | RA_0_OBUF.EXP
-SPPTERM | 1 | IV_TRUE | EXP32_.EXP
-SPPTERM | 2 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd3
-SPPTERM | 3 | IV_TRUE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 6 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
-SPPTERM | 6 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
-SPPTERM | 7 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
-
-SRFF_INSTANCE | ram/RASEL.REG | ram/RASEL | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/RASEL.D | 9627 | ? | 621 | 0 | ram/RASEL | NULL | NULL | ram/RASEL.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/RASEL.Q | 9630 | ? | 646 | 0 | ram/RASEL | NULL | NULL | ram/RASEL.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | ram/RS_FSM_FFd2 | MXSE_COPY_0_COPY_0 | 2155877632 | 11 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9384 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_8_OBUF.EXP | 10072 | ? | 622 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_8_OBUF.EXP | RA_8_OBUF | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7>.EXP | 10073 | ? | 622 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.EXP | cnt/RefCnt<7> | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | ram/RS_FSM_FFd2.SI | ram/RS_FSM_FFd2 | 0 | 10 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9384 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_8_OBUF.EXP | 10072 | ? | 622 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_8_OBUF.EXP | RA_8_OBUF | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7>.EXP | 10073 | ? | 622 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.EXP | cnt/RefCnt<7> | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/RS_FSM_FFd2.D1 | 9632 | ? | 622 | 4096 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/RS_FSM_FFd2.D2 | 9633 | ? | 622 | 4096 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | RA_8_OBUF.EXP
-SPPTERM | 1 | IV_TRUE | cnt/RefCnt<7>.EXP
-SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 3 | IV_TRUE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 4 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<5> | IV_TRUE | ram/BACTr
-SPPTERM | 4 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<6> | IV_TRUE | ram/BACTr
-SPPTERM | 4 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | ram/BACTr | IV_FALSE | cnt/RefCnt<7>
-
-SRFF_INSTANCE | ram/RS_FSM_FFd2.REG | ram/RS_FSM_FFd2 | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/RS_FSM_FFd2.D | 9631 | ? | 622 | 0 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/RS_FSM_FFd2.Q | 9634 | ? | 645 | 0 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | ram/RS_FSM_FFd1 | MXSE_COPY_0_COPY_0 | 2155877376 | 11 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9322 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | ram/RS_FSM_FFd1.SI | ram/RS_FSM_FFd1 | 0 | 10 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9322 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/RS_FSM_FFd1.D1 | 9636 | ? | 623 | 4096 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/RS_FSM_FFd1.D2 | 9637 | ? | 623 | 4096 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd3
-SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf
-SPPTERM | 9 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 9 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf
-
-SRFF_INSTANCE | ram/RS_FSM_FFd1.REG | ram/RS_FSM_FFd1 | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/RS_FSM_FFd1.D | 9635 | ? | 623 | 0 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/RS_FSM_FFd1.Q | 9638 | ? | 645 | 0 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | ram/RS_FSM_FFd3 | MXSE_COPY_0_COPY_0 | 2155877632 | 12 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9322 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay0.EXP | 10067 | ? | 624 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.EXP | cs/nOverlay0 | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_6_OBUF.EXP | 10068 | ? | 624 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.EXP | RA_6_OBUF | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | ram/RS_FSM_FFd3.SI | ram/RS_FSM_FFd3 | 0 | 11 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9322 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay0.EXP | 10067 | ? | 624 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.EXP | cs/nOverlay0 | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_6_OBUF.EXP | 10068 | ? | 624 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.EXP | RA_6_OBUF | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/RS_FSM_FFd3.D1 | 9640 | ? | 624 | 4096 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/RS_FSM_FFd3.D2 | 9641 | ? | 624 | 4096 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | cs/nOverlay0.EXP
-SPPTERM | 1 | IV_TRUE | RA_6_OBUF.EXP
-SPPTERM | 4 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 5 | IV_TRUE | ram/Once | IV_TRUE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 5 | IV_TRUE | ram/Once | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<5>
-SPPTERM | 5 | IV_TRUE | ram/Once | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<6>
-SPPTERM | 5 | IV_TRUE | ram/Once | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<7>
-
-SRFF_INSTANCE | ram/RS_FSM_FFd3.REG | ram/RS_FSM_FFd3 | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/RS_FSM_FFd3.D | 9639 | ? | 624 | 0 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/RS_FSM_FFd3.Q | 9642 | ? | 645 | 0 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobs/PS_FSM_FFd2 | MXSE_COPY_0_COPY_0 | 2155873536 | 12 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9375 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE0S.EXP | 10015 | ? | 625 | 0 | MXSE_COPY_0_COPY_0 | NULL | ALE0S.EXP | ALE0S | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP24_.EXP | 10016 | ? | 625 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP24_.EXP | EXP24_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobs/PS_FSM_FFd2.SI | iobs/PS_FSM_FFd2 | 0 | 11 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9375 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE0S.EXP | 10015 | ? | 625 | 0 | MXSE_COPY_0_COPY_0 | NULL | ALE0S.EXP | ALE0S | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP24_.EXP | 10016 | ? | 625 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP24_.EXP | EXP24_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/PS_FSM_FFd2.D1 | 9644 | ? | 625 | 4096 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/PS_FSM_FFd2.D2 | 9645 | ? | 625 | 4096 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | ALE0S.EXP
-SPPTERM | 1 | IV_TRUE | EXP24_.EXP
-SPPTERM | 3 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/IOACTr
-SPPTERM | 3 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/PS_FSM_FFd1 | IV_FALSE | iobs/IOACTr
-SPPTERM | 4 | IV_TRUE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_FALSE | fsb/ASrf | IV_TRUE | ALE1
-
-SRFF_INSTANCE | iobs/PS_FSM_FFd2.REG | iobs/PS_FSM_FFd2 | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/PS_FSM_FFd2.D | 9643 | ? | 625 | 0 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/PS_FSM_FFd2.Q | 9646 | ? | 643 | 0 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | iobm/ES<0> | MXSE_COPY_0_COPY_0 | 2155877632 | 8 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9359 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9388 | ? | 666 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9390 | ? | 656 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9360 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9362 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9364 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9365 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/ES<0> | 9359 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/ES<0>.SI | iobm/ES<0> | 0 | 7 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9359 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9388 | ? | 666 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9390 | ? | 656 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9360 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9362 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9364 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9365 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/ES<0>.D1 | 9648 | ? | 651 | 4096 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/ES<0>.D2 | 9649 | ? | 651 | 4096 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 3 | IV_TRUE | iobm/ES<0> | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2
-SPPTERM | 6 | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4> | IV_TRUE | iobm/Er
-SPPTERM | 6 | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4> | IV_FALSE | iobm/Er2
-
-SRFF_INSTANCE | iobm/ES<0>.REG | iobm/ES<0> | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/ES<0>.D | 9647 | ? | 651 | 0 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/ES<0>.Q | 9650 | ? | 661 | 0 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobm/ES<1> | MXSE_COPY_0_COPY_0 | 2155873536 | 5 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9359 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9360 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9388 | ? | 666 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9390 | ? | 656 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/ES<1> | 9360 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/ES<1>.SI | iobm/ES<1> | 0 | 4 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9359 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9360 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9388 | ? | 666 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9390 | ? | 656 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/ES<1>.D1 | 9652 | ? | 652 | 4096 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/ES<1>.D2 | 9653 | ? | 652 | 4096 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1>
-SPPTERM | 2 | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1>
-SPPTERM | 2 | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2
-
-SRFF_INSTANCE | iobm/ES<1>.REG | iobm/ES<1> | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/ES<1>.D | 9651 | ? | 652 | 0 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/ES<1>.Q | 9654 | ? | 661 | 0 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobm/IOS_FSM_FFd3 | MXSE_COPY_0_COPY_0 | 2155873536 | 11 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9361 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9366 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9369 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ETACK | 9380 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9399 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9400 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrf | 9402 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrr | 9403 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrf | 9405 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrr | 9406 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/IOS_FSM_FFd3 | 9361 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/IOS_FSM_FFd3.SI | iobm/IOS_FSM_FFd3 | 0 | 10 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9361 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9366 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9369 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ETACK | 9380 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9399 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9400 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrf | 9402 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrr | 9403 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrf | 9405 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrr | 9406 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/IOS_FSM_FFd3.D1 | 9656 | ? | 653 | 4096 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/IOS_FSM_FFd3.D2 | 9657 | ? | 653 | 4096 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd4
-SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/ETACK
-SPPTERM | 4 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr
-SPPTERM | 4 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr
-SPPTERM | 4 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr
-
-SRFF_INSTANCE | iobm/IOS_FSM_FFd3.REG | iobm/IOS_FSM_FFd3 | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/IOS_FSM_FFd3.D | 9655 | ? | 653 | 0 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/IOS_FSM_FFd3.Q | 9658 | ? | 682 | 0 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_IOB | CLK2X_IOB
-
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobm/ES<2> | MXSE_COPY_0_COPY_0 | 2155873536 | 8 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9359 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9362 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9360 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9388 | ? | 666 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9390 | ? | 656 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9364 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9365 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/ES<2> | 9362 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/ES<2>.SI | iobm/ES<2> | 0 | 7 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9359 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9362 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9360 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9388 | ? | 666 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9390 | ? | 656 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9364 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9365 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/ES<2>.D1 | 9660 | ? | 654 | 4096 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/ES<2>.D2 | 9661 | ? | 654 | 4096 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<2>
-SPPTERM | 2 | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2>
-SPPTERM | 2 | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2
-SPPTERM | 3 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2>
-SPPTERM | 3 | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_TRUE | iobm/ES<4>
-
-SRFF_INSTANCE | iobm/ES<2>.REG | iobm/ES<2> | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/ES<2>.D | 9659 | ? | 654 | 0 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/ES<2>.Q | 9662 | ? | 661 | 0 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/PS_FSM_FFd1 | MXSE_COPY_0_COPY_0 | 2155873280 | 11 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nADoutLE1_OBUF.EXP | 10017 | ? | 626 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.EXP | nADoutLE1_OBUF | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | iobs/PS_FSM_FFd1.EXP | 10018 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.EXP | iobs/PS_FSM_FFd1 | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | iobs/PS_FSM_FFd1.SI | iobs/PS_FSM_FFd1 | 0 | 10 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nADoutLE1_OBUF.EXP | 10017 | ? | 626 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.EXP | nADoutLE1_OBUF | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/PS_FSM_FFd1.D1 | 9664 | ? | 626 | 4096 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/PS_FSM_FFd1.D2 | 9665 | ? | 626 | 4096 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | nADoutLE1_OBUF.EXP
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | iobs/PS_FSM_FFd1.EXP | 10007 | ? | 640 | 0 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
-
-SRFF_INSTANCE | iobs/PS_FSM_FFd1.REG | iobs/PS_FSM_FFd1 | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/PS_FSM_FFd1.D | 9663 | ? | 626 | 0 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/PS_FSM_FFd1.Q | 9666 | ? | 643 | 0 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobm/ES<3> | MXSE_COPY_0_COPY_0 | 2155877376 | 7 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9364 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9388 | ? | 666 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9390 | ? | 656 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9359 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9360 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9362 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/ES<3> | 9364 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/ES<3>.SI | iobm/ES<3> | 0 | 6 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9364 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9388 | ? | 666 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9390 | ? | 656 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9359 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9360 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9362 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/ES<3>.D1 | 9668 | ? | 655 | 4096 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/ES<3>.D2 | 9669 | ? | 655 | 4096 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 3 | IV_TRUE | iobm/ES<3> | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2
-SPPTERM | 4 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_TRUE | iobm/Er
-SPPTERM | 4 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_FALSE | iobm/Er2
-
-SRFF_INSTANCE | iobm/ES<3>.REG | iobm/ES<3> | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/ES<3>.D | 9667 | ? | 655 | 0 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/ES<3>.Q | 9670 | ? | 661 | 0 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobm/ES<4> | MXSE_COPY_0_COPY_0 | 2155877376 | 8 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9365 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9388 | ? | 666 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9390 | ? | 656 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9359 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9360 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9362 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9364 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/ES<4> | 9365 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/ES<4>.SI | iobm/ES<4> | 0 | 7 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9365 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9388 | ? | 666 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9390 | ? | 656 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9359 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9360 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9362 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9364 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/ES<4>.D1 | 9672 | ? | 656 | 4096 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/ES<4>.D2 | 9673 | ? | 656 | 4096 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 3 | IV_TRUE | iobm/ES<4> | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2
-SPPTERM | 5 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_TRUE | iobm/ES<3> | IV_TRUE | iobm/Er
-SPPTERM | 5 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_TRUE | iobm/ES<3> | IV_FALSE | iobm/Er2
-SPPTERM | 5 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_TRUE | iobm/ES<4>
-
-SRFF_INSTANCE | iobm/ES<4>.REG | iobm/ES<4> | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/ES<4>.D | 9671 | ? | 656 | 0 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/ES<4>.Q | 9674 | ? | 661 | 0 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/IOS_FSM_FFd4 | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd5 | 9367 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd5.Q | iobm/IOS_FSM_FFd5 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/IOS_FSM_FFd4 | 9366 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/IOS_FSM_FFd4.SI | iobm/IOS_FSM_FFd4 | 0 | 1 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd5 | 9367 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd5.Q | iobm/IOS_FSM_FFd5 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/IOS_FSM_FFd4.D1 | 9676 | ? | 657 | 4096 | iobm/IOS_FSM_FFd4 | NULL | NULL | iobm/IOS_FSM_FFd4.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/IOS_FSM_FFd4.D2 | 9677 | ? | 657 | 4096 | iobm/IOS_FSM_FFd4 | NULL | NULL | iobm/IOS_FSM_FFd4.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | iobm/IOS_FSM_FFd5
-
-SRFF_INSTANCE | iobm/IOS_FSM_FFd4.REG | iobm/IOS_FSM_FFd4 | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/IOS_FSM_FFd4.D | 9675 | ? | 657 | 0 | iobm/IOS_FSM_FFd4 | NULL | NULL | iobm/IOS_FSM_FFd4.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/IOS_FSM_FFd4.Q | 9678 | ? | 682 | 0 | iobm/IOS_FSM_FFd4 | NULL | NULL | iobm/IOS_FSM_FFd4.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/IOS_FSM_FFd5 | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd6 | 9368 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd6.Q | iobm/IOS_FSM_FFd6 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/IOS_FSM_FFd5 | 9367 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd5.Q | iobm/IOS_FSM_FFd5 | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/IOS_FSM_FFd5.SI | iobm/IOS_FSM_FFd5 | 0 | 1 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd6 | 9368 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd6.Q | iobm/IOS_FSM_FFd6 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/IOS_FSM_FFd5.D1 | 9680 | ? | 658 | 4096 | iobm/IOS_FSM_FFd5 | NULL | NULL | iobm/IOS_FSM_FFd5.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/IOS_FSM_FFd5.D2 | 9681 | ? | 658 | 4096 | iobm/IOS_FSM_FFd5 | NULL | NULL | iobm/IOS_FSM_FFd5.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | iobm/IOS_FSM_FFd6
-
-SRFF_INSTANCE | iobm/IOS_FSM_FFd5.REG | iobm/IOS_FSM_FFd5 | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/IOS_FSM_FFd5.D | 9679 | ? | 658 | 0 | iobm/IOS_FSM_FFd5 | NULL | NULL | iobm/IOS_FSM_FFd5.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/IOS_FSM_FFd5.Q | 9682 | ? | 682 | 0 | iobm/IOS_FSM_FFd5 | NULL | NULL | iobm/IOS_FSM_FFd5.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/IOS_FSM_FFd6 | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd7 | 9371 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd7.Q | iobm/IOS_FSM_FFd7 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/IOS_FSM_FFd6 | 9368 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd6.Q | iobm/IOS_FSM_FFd6 | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/IOS_FSM_FFd6.SI | iobm/IOS_FSM_FFd6 | 0 | 1 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd7 | 9371 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd7.Q | iobm/IOS_FSM_FFd7 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/IOS_FSM_FFd6.D1 | 9684 | ? | 659 | 4096 | iobm/IOS_FSM_FFd6 | NULL | NULL | iobm/IOS_FSM_FFd6.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/IOS_FSM_FFd6.D2 | 9685 | ? | 659 | 4096 | iobm/IOS_FSM_FFd6 | NULL | NULL | iobm/IOS_FSM_FFd6.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | iobm/IOS_FSM_FFd7
-
-SRFF_INSTANCE | iobm/IOS_FSM_FFd6.REG | iobm/IOS_FSM_FFd6 | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/IOS_FSM_FFd6.D | 9683 | ? | 659 | 0 | iobm/IOS_FSM_FFd6 | NULL | NULL | iobm/IOS_FSM_FFd6.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/IOS_FSM_FFd6.Q | 9686 | ? | 682 | 0 | iobm/IOS_FSM_FFd6 | NULL | NULL | iobm/IOS_FSM_FFd6.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/IOS_FSM_FFd7 | MXSE_COPY_0_COPY_0 | 2155873280 | 4 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9369 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOREQr | 9381 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd8 | 9382 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd8.Q | iobm/IOS_FSM_FFd8 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/IOS_FSM_FFd7 | 9371 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd7.Q | iobm/IOS_FSM_FFd7 | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/IOS_FSM_FFd7.SI | iobm/IOS_FSM_FFd7 | 0 | 3 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9369 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOREQr | 9381 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd8 | 9382 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd8.Q | iobm/IOS_FSM_FFd8 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/IOS_FSM_FFd7.D1 | 9688 | ? | 660 | 4096 | iobm/IOS_FSM_FFd7 | NULL | NULL | iobm/IOS_FSM_FFd7.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/IOS_FSM_FFd7.D2 | 9689 | ? | 660 | 4096 | iobm/IOS_FSM_FFd7 | NULL | NULL | iobm/IOS_FSM_FFd7.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 3 | IV_FALSE | CLK_IOB_IBUF | IV_TRUE | iobm/IOREQr | IV_TRUE | iobm/IOS_FSM_FFd8
-
-SRFF_INSTANCE | iobm/IOS_FSM_FFd7.REG | iobm/IOS_FSM_FFd7 | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/IOS_FSM_FFd7.D | 9687 | ? | 660 | 0 | iobm/IOS_FSM_FFd7 | NULL | NULL | iobm/IOS_FSM_FFd7.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/IOS_FSM_FFd7.Q | 9690 | ? | 682 | 0 | iobm/IOS_FSM_FFd7 | NULL | NULL | iobm/IOS_FSM_FFd7.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_IOB | CLK2X_IOB
-
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<0> | MXSE_COPY_0_COPY_0 | 2155877376 | 1 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/RefCnt<0> | 9372 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | cnt/RefCnt<0>.SI | cnt/RefCnt<0> | 0 | 0 | 2
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/RefCnt<0>.D1 | 9692 | ? | 627 | 4096 | cnt/RefCnt<0> | NULL | NULL | cnt/RefCnt<0>.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/RefCnt<0>.D2 | 9693 | ? | 627 | 4096 | cnt/RefCnt<0> | NULL | NULL | cnt/RefCnt<0>.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 0 | IV_DC
-
-SRFF_INSTANCE | cnt/RefCnt<0>.REG | cnt/RefCnt<0> | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/RefCnt<0>.D | 9691 | ? | 627 | 0 | cnt/RefCnt<0> | NULL | NULL | cnt/RefCnt<0>.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/RefCnt<0>.Q | 9694 | ? | 637 | 0 | cnt/RefCnt<0> | NULL | NULL | cnt/RefCnt<0>.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<5> | MXSE_COPY_0_COPY_0 | 2155877376 | 10 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9372 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9376 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9377 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9378 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9379 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | cnt/RefCnt<5>.EXP | 10066 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.EXP | cnt/RefCnt<5> | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | cnt/RefCnt<5>.SI | cnt/RefCnt<5> | 0 | 9 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9372 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9376 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9377 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9378 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9379 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/RefCnt<5>.D1 | 9696 | ? | 628 | 0 | cnt/RefCnt<5> | NULL | NULL | cnt/RefCnt<5>.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/RefCnt<5>.D2 | 9697 | ? | 628 | 4096 | cnt/RefCnt<5> | NULL | NULL | cnt/RefCnt<5>.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 5 | IV_TRUE | cnt/RefCnt<0> | IV_TRUE | cnt/RefCnt<1> | IV_TRUE | cnt/RefCnt<2> | IV_TRUE | cnt/RefCnt<3> | IV_TRUE | cnt/RefCnt<4>
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | cnt/RefCnt<5>.EXP | 10055 | ? | 645 | 0 | cnt/RefCnt<5> | NULL | NULL | cnt/RefCnt<5>.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 4 | IV_FALSE | cnt/RefDone | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
-
-SRFF_INSTANCE | cnt/RefCnt<5>.REG | cnt/RefCnt<5> | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/RefCnt<5>.D | 9695 | ? | 628 | 0 | cnt/RefCnt<5> | NULL | NULL | cnt/RefCnt<5>.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/RefCnt<5>.Q | 9698 | ? | 645 | 0 | cnt/RefCnt<5> | NULL | NULL | cnt/RefCnt<5>.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<6> | MXSE_COPY_0_COPY_0 | 2155877376 | 12 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9322 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9384 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_9_OBUF.EXP | 10074 | ? | 629 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.EXP | RA_9_OBUF | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | cnt/RefCnt<6>.EXP | 10075 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.EXP | cnt/RefCnt<6> | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | cnt/RefCnt<6>.SI | cnt/RefCnt<6> | 0 | 11 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9322 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9384 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_9_OBUF.EXP | 10074 | ? | 629 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.EXP | RA_9_OBUF | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/RefCnt<6>.D1 | 9700 | ? | 629 | 0 | cnt/RefCnt<6> | NULL | NULL | cnt/RefCnt<6>.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/RefCnt<6>.D2 | 9701 | ? | 629 | 4096 | cnt/RefCnt<6> | NULL | NULL | cnt/RefCnt<6>.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | RA_9_OBUF.EXP
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | cnt/RefCnt<6>.EXP | 10064 | ? | 645 | 0 | cnt/RefCnt<6> | NULL | NULL | cnt/RefCnt<6>.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | fsb/ASrf
-SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
-SPPTERM | 6 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
-SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | fsb/ASrf
-
-SRFF_INSTANCE | cnt/RefCnt<6>.REG | cnt/RefCnt<6> | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/RefCnt<6>.D | 9699 | ? | 629 | 0 | cnt/RefCnt<6> | NULL | NULL | cnt/RefCnt<6>.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/RefCnt<6>.Q | 9702 | ? | 645 | 0 | cnt/RefCnt<6> | NULL | NULL | cnt/RefCnt<6>.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/IOACTr | MXSE_COPY_0_COPY_0 | 2155873280 | 19 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOACT | 9385 | ? | 648 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOACT.Q | IOACT | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9328 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/IOACTr | 9375 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | iobs/IOACTr.EXP | 10014 | ? | 597 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.EXP | iobs/IOACTr | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | iobs/IOACTr.SI | iobs/IOACTr | 0 | 18 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOACT | 9385 | ? | 648 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOACT.Q | IOACT | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9328 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/IOACTr.D1 | 9704 | ? | 630 | 4096 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/IOACTr.D2 | 9705 | ? | 630 | 4096 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | IOACT
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | iobs/IOACTr.EXP | 10003 | ? | 597 | 0 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 15 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | iobs/Once | IV_TRUE | IORW0 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 15 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | iobs/Once | IV_TRUE | IORW0 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1
-SPPTERM | 15 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | iobs/Once | IV_TRUE | IORW0 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 15 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | iobs/Once | IV_TRUE | IORW0 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1
-
-SRFF_INSTANCE | iobs/IOACTr.REG | iobs/IOACTr | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/IOACTr.D | 9703 | ? | 630 | 0 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/IOACTr.Q | 9706 | ? | 640 | 0 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<1> | MXSE_COPY_0_COPY_0 | 2155877376 | 2 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9372 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/RefCnt<1> | 9376 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | cnt/RefCnt<1>.SI | cnt/RefCnt<1> | 0 | 1 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9372 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/RefCnt<1>.D1 | 9708 | ? | 631 | 0 | cnt/RefCnt<1> | NULL | NULL | cnt/RefCnt<1>.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/RefCnt<1>.D2 | 9709 | ? | 631 | 4096 | cnt/RefCnt<1> | NULL | NULL | cnt/RefCnt<1>.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | cnt/RefCnt<0>
-
-SRFF_INSTANCE | cnt/RefCnt<1>.REG | cnt/RefCnt<1> | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/RefCnt<1>.D | 9707 | ? | 631 | 0 | cnt/RefCnt<1> | NULL | NULL | cnt/RefCnt<1>.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/RefCnt<1>.Q | 9710 | ? | 637 | 0 | cnt/RefCnt<1> | NULL | NULL | cnt/RefCnt<1>.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<2> | MXSE_COPY_0_COPY_0 | 2155877376 | 3 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9372 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9376 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/RefCnt<2> | 9377 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | cnt/RefCnt<2>.SI | cnt/RefCnt<2> | 0 | 2 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9372 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9376 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/RefCnt<2>.D1 | 9712 | ? | 632 | 0 | cnt/RefCnt<2> | NULL | NULL | cnt/RefCnt<2>.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/RefCnt<2>.D2 | 9713 | ? | 632 | 4096 | cnt/RefCnt<2> | NULL | NULL | cnt/RefCnt<2>.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_TRUE | cnt/RefCnt<0> | IV_TRUE | cnt/RefCnt<1>
-
-SRFF_INSTANCE | cnt/RefCnt<2>.REG | cnt/RefCnt<2> | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/RefCnt<2>.D | 9711 | ? | 632 | 0 | cnt/RefCnt<2> | NULL | NULL | cnt/RefCnt<2>.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/RefCnt<2>.Q | 9714 | ? | 637 | 0 | cnt/RefCnt<2> | NULL | NULL | cnt/RefCnt<2>.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<3> | MXSE_COPY_0_COPY_0 | 2155877376 | 4 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9372 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9376 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9377 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/RefCnt<3> | 9378 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | cnt/RefCnt<3>.SI | cnt/RefCnt<3> | 0 | 3 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9372 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9376 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9377 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/RefCnt<3>.D1 | 9716 | ? | 633 | 0 | cnt/RefCnt<3> | NULL | NULL | cnt/RefCnt<3>.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/RefCnt<3>.D2 | 9717 | ? | 633 | 4096 | cnt/RefCnt<3> | NULL | NULL | cnt/RefCnt<3>.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 3 | IV_TRUE | cnt/RefCnt<0> | IV_TRUE | cnt/RefCnt<1> | IV_TRUE | cnt/RefCnt<2>
-
-SRFF_INSTANCE | cnt/RefCnt<3>.REG | cnt/RefCnt<3> | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/RefCnt<3>.D | 9715 | ? | 633 | 0 | cnt/RefCnt<3> | NULL | NULL | cnt/RefCnt<3>.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/RefCnt<3>.Q | 9718 | ? | 637 | 0 | cnt/RefCnt<3> | NULL | NULL | cnt/RefCnt<3>.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<4> | MXSE_COPY_0_COPY_0 | 2155877376 | 5 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9372 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9376 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9377 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9378 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/RefCnt<4> | 9379 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | cnt/RefCnt<4>.SI | cnt/RefCnt<4> | 0 | 4 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9372 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9376 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9377 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9378 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/RefCnt<4>.D1 | 9720 | ? | 634 | 0 | cnt/RefCnt<4> | NULL | NULL | cnt/RefCnt<4>.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/RefCnt<4>.D2 | 9721 | ? | 634 | 4096 | cnt/RefCnt<4> | NULL | NULL | cnt/RefCnt<4>.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 4 | IV_TRUE | cnt/RefCnt<0> | IV_TRUE | cnt/RefCnt<1> | IV_TRUE | cnt/RefCnt<2> | IV_TRUE | cnt/RefCnt<3>
-
-SRFF_INSTANCE | cnt/RefCnt<4>.REG | cnt/RefCnt<4> | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/RefCnt<4>.D | 9719 | ? | 634 | 0 | cnt/RefCnt<4> | NULL | NULL | cnt/RefCnt<4>.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/RefCnt<4>.Q | 9722 | ? | 637 | 0 | cnt/RefCnt<4> | NULL | NULL | cnt/RefCnt<4>.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/ETACK | MXSE_COPY_0_COPY_0 | 2155873280 | 17 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nVMA_IOB_OBUF | 9318 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOB_OBUF.Q | nVMA_IOB_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9359 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9360 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9362 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9364 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9365 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/ETACK | 9380 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | iobm/ETACK.EXP | 10019 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.EXP | iobm/ETACK | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | iobm/ETACK.SI | iobm/ETACK | 0 | 16 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nVMA_IOB_OBUF | 9318 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOB_OBUF.Q | nVMA_IOB_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9359 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9360 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9362 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9364 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9365 | ? | 661 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/ETACK.D1 | 9724 | ? | 661 | 4096 | iobm/ETACK | NULL | NULL | iobm/ETACK.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/ETACK.D2 | 9725 | ? | 661 | 4096 | iobm/ETACK | NULL | NULL | iobm/ETACK.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 6 | IV_FALSE | nVMA_IOB_OBUF | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_TRUE | iobm/ES<4>
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | iobm/ETACK.EXP | 10008 | ? | 640 | 0 | iobm/ETACK | NULL | NULL | iobm/ETACK.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
-SPPTERM | 6 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
-
-SRFF_INSTANCE | iobm/ETACK.REG | iobm/ETACK | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/ETACK.D | 9723 | ? | 661 | 0 | iobm/ETACK | NULL | NULL | iobm/ETACK.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/ETACK.Q | 9726 | ? | 667 | 0 | iobm/ETACK | NULL | NULL | iobm/ETACK.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/IOREQr | MXSE_COPY_0_COPY_0 | 2424308736 | 2 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOREQ | 9397 | ? | 662 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOREQ.Q | IOREQ | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK-IO_3 | 9316 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/IOREQr | 9381 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/IOREQr.SI | iobm/IOREQr | 0 | 1 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOREQ | 9397 | ? | 662 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOREQ.Q | IOREQ | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/IOREQr.D1 | 9728 | ? | 662 | 4096 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/IOREQr.D2 | 9729 | ? | 662 | 4096 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | IOREQ
-
-SRFF_INSTANCE | iobm/IOREQr.REG | iobm/IOREQr | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/IOREQr.D | 9727 | ? | 662 | 0 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK-IO_3 | 9316 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/IOREQr.Q | 9730 | ? | 670 | 0 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | Inv+PrldHigh+OptxMapped | iobm/IOS_FSM_FFd8 | MXSE_COPY_0_COPY_0 | 2155873024 | 5 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd8 | 9382 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd8.Q | iobm/IOS_FSM_FFd8 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9404 | ? | 664 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9369 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOREQr | 9381 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/IOS_FSM_FFd8 | 9382 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd8.Q | iobm/IOS_FSM_FFd8 | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/IOS_FSM_FFd8.SI | iobm/IOS_FSM_FFd8 | 0 | 4 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd8 | 9382 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd8.Q | iobm/IOS_FSM_FFd8 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9404 | ? | 664 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9369 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOREQr | 9381 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/IOS_FSM_FFd8.D1 | 9732 | ? | 664 | 4096 | iobm/IOS_FSM_FFd8 | NULL | NULL | iobm/IOS_FSM_FFd8.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/IOS_FSM_FFd8.D2 | 9733 | ? | 664 | 4096 | iobm/IOS_FSM_FFd8 | NULL | NULL | iobm/IOS_FSM_FFd8.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_FALSE | iobm/IOS_FSM_FFd8 | IV_FALSE | iobm/IOS_FSM_FFd1
-SPPTERM | 3 | IV_FALSE | CLK_IOB_IBUF | IV_TRUE | iobm/IOREQr | IV_FALSE | iobm/IOS_FSM_FFd1
-
-SRFF_INSTANCE | iobm/IOS_FSM_FFd8.REG | iobm/IOS_FSM_FFd8 | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/IOS_FSM_FFd8.D | 9731 | ? | 664 | 0 | iobm/IOS_FSM_FFd8 | NULL | NULL | iobm/IOS_FSM_FFd8.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/IOS_FSM_FFd8.Q | 9734 | ? | 670 | 0 | iobm/IOS_FSM_FFd8 | NULL | NULL | iobm/IOS_FSM_FFd8.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_IOB | CLK2X_IOB
-
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobs/Load1 | MXSE_COPY_0_COPY_0 | 2155873536 | 11 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP26_.EXP | 10038 | ? | 635 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP26_.EXP | EXP26_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP27_.EXP | 10039 | ? | 635 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP27_.EXP | EXP27_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/Load1 | 9383 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobs/Load1.SI | iobs/Load1 | 0 | 10 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP26_.EXP | 10038 | ? | 635 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP26_.EXP | EXP26_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP27_.EXP | 10039 | ? | 635 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP27_.EXP | EXP27_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/Load1.D1 | 9736 | ? | 635 | 4096 | iobs/Load1 | NULL | NULL | iobs/Load1.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/Load1.D2 | 9737 | ? | 635 | 4096 | iobs/Load1 | NULL | NULL | iobs/Load1.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | iobs/Once
-SPPTERM | 1 | IV_FALSE | ALE1
-SPPTERM | 1 | IV_TRUE | EXP26_.EXP
-SPPTERM | 1 | IV_TRUE | EXP27_.EXP
-SPPTERM | 2 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF
-SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-SPPTERM | 2 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
-
-SRFF_INSTANCE | iobs/Load1.REG | iobs/Load1 | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/Load1.D | 9735 | ? | 635 | 0 | iobs/Load1 | NULL | NULL | iobs/Load1.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/Load1.Q | 9738 | ? | 647 | 0 | iobs/Load1 | NULL | NULL | iobs/Load1.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | ram/BACTr | MXSE_COPY_0_COPY_0 | 2155873536 | 9 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/BACTr | 9384 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | ram/BACTr.EXP | 10022 | ? | 615 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.EXP | ram/BACTr | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | ram/BACTr.SI | ram/BACTr | 0 | 8 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/BACTr.D1 | 9740 | ? | 636 | 4096 | ram/BACTr | NULL | NULL | ram/BACTr.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/BACTr.D2 | 9741 | ? | 636 | 4096 | ram/BACTr | NULL | NULL | ram/BACTr.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | ram/BACTr.EXP | 10011 | ? | 615 | 0 | ram/BACTr | NULL | NULL | ram/BACTr.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF
-
-SRFF_INSTANCE | ram/BACTr.REG | ram/BACTr | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/BACTr.D | 9739 | ? | 636 | 0 | ram/BACTr | NULL | NULL | ram/BACTr.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/BACTr.Q | 9742 | ? | 645 | 0 | ram/BACTr | NULL | NULL | ram/BACTr.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | IOACT | MXSE_COPY_0_COPY_0 | 2155873536 | 14 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9361 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9366 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd5 | 9367 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd5.Q | iobm/IOS_FSM_FFd5 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd6 | 9368 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd6.Q | iobm/IOS_FSM_FFd6 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd7 | 9371 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd7.Q | iobm/IOS_FSM_FFd7 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOREQr | 9381 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd8 | 9382 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd8.Q | iobm/IOS_FSM_FFd8 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9369 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ETACK | 9380 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9399 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9400 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_1_OBUF.EXP | 10052 | ? | 665 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.EXP | RA_1_OBUF | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOBERR.EXP | 10054 | ? | 665 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.EXP | IOBERR | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | IOACT | 9385 | ? | 648 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOACT.Q | IOACT | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | IOACT.SI | IOACT | 0 | 13 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9361 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9366 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd5 | 9367 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd5.Q | iobm/IOS_FSM_FFd5 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd6 | 9368 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd6.Q | iobm/IOS_FSM_FFd6 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd7 | 9371 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd7.Q | iobm/IOS_FSM_FFd7 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOREQr | 9381 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd8 | 9382 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd8.Q | iobm/IOS_FSM_FFd8 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9369 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ETACK | 9380 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9399 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9400 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_1_OBUF.EXP | 10052 | ? | 665 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.EXP | RA_1_OBUF | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOBERR.EXP | 10054 | ? | 665 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.EXP | IOBERR | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | IOACT.D1 | 9744 | ? | 665 | 4096 | IOACT | NULL | NULL | IOACT.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | IOACT.D2 | 9745 | ? | 665 | 4096 | IOACT | NULL | NULL | IOACT.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | RA_1_OBUF.EXP
-SPPTERM | 1 | IV_TRUE | IOBERR.EXP
-SPPTERM | 6 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd5 | IV_FALSE | iobm/IOS_FSM_FFd6 | IV_FALSE | iobm/IOS_FSM_FFd7 | IV_FALSE | iobm/IOREQr
-SPPTERM | 6 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd5 | IV_FALSE | iobm/IOS_FSM_FFd6 | IV_FALSE | iobm/IOS_FSM_FFd7 | IV_FALSE | iobm/IOS_FSM_FFd8
-SPPTERM | 7 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd5 | IV_FALSE | iobm/IOS_FSM_FFd6 | IV_TRUE | CLK_IOB_IBUF | IV_FALSE | iobm/IOS_FSM_FFd7 | IV_TRUE | iobm/ETACK | IV_FALSE | iobm/IOREQr
-SPPTERM | 7 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd5 | IV_FALSE | iobm/IOS_FSM_FFd6 | IV_TRUE | CLK_IOB_IBUF | IV_FALSE | iobm/IOS_FSM_FFd7 | IV_TRUE | iobm/ETACK | IV_FALSE | iobm/IOS_FSM_FFd8
-SPPTERM | 8 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd5 | IV_FALSE | iobm/IOS_FSM_FFd6 | IV_TRUE | CLK_IOB_IBUF | IV_FALSE | iobm/IOS_FSM_FFd7 | IV_FALSE | iobm/IOREQr | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr
-
-SRFF_INSTANCE | IOACT.REG | IOACT | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | IOACT.D | 9743 | ? | 665 | 0 | IOACT | NULL | NULL | IOACT.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | IOACT.Q | 9746 | ? | 648 | 0 | IOACT | NULL | NULL | IOACT.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_IOB | CLK2X_IOB
-
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<7> | MXSE_COPY_0_COPY_0 | 2155877376 | 19 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9372 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9376 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9377 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9378 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9379 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | cnt/RefCnt<7>.EXP | 10073 | ? | 622 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.EXP | cnt/RefCnt<7> | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | cnt/RefCnt<7>.SI | cnt/RefCnt<7> | 0 | 18 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9372 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9376 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9377 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9378 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9379 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/RefCnt<7>.D1 | 9748 | ? | 637 | 0 | cnt/RefCnt<7> | NULL | NULL | cnt/RefCnt<7>.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/RefCnt<7>.D2 | 9749 | ? | 637 | 4096 | cnt/RefCnt<7> | NULL | NULL | cnt/RefCnt<7>.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 7 | IV_TRUE | cnt/RefCnt<0> | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<1> | IV_TRUE | cnt/RefCnt<2> | IV_TRUE | cnt/RefCnt<3> | IV_TRUE | cnt/RefCnt<4>
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | cnt/RefCnt<7>.EXP | 10062 | ? | 622 | 0 | cnt/RefCnt<7> | NULL | NULL | cnt/RefCnt<7>.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf
-SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf
-SPPTERM | 8 | IV_FALSE | cnt/RefDone | IV_TRUE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_FALSE | fsb/ASrf
-
-SRFF_INSTANCE | cnt/RefCnt<7>.REG | cnt/RefCnt<7> | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/RefCnt<7>.D | 9747 | ? | 637 | 0 | cnt/RefCnt<7> | NULL | NULL | cnt/RefCnt<7>.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/RefCnt<7>.Q | 9750 | ? | 645 | 0 | cnt/RefCnt<7> | NULL | NULL | cnt/RefCnt<7>.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-INPUT_INSTANCE | 0 | 0 | NULL | E_IOB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | E_IOB | 9508 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | E_IOB_IBUF | 9387 | ? | 587 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | E_IOB_IBUF | 0 | 5 | II_IMUX
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/Er | MXSE_COPY_0_COPY_0 | 2424308736 | 2 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | E_IOB_IBUF | 9387 | ? | 587 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | E_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK-IO_4 | 9370 | ? | 666 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/Er | 9388 | ? | 666 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/Er.SI | iobm/Er | 0 | 1 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | E_IOB_IBUF | 9387 | ? | 587 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | E_IOB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/Er.D1 | 9752 | ? | 587 | 4096 | iobm/Er | NULL | NULL | iobm/Er.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/Er.D2 | 9753 | ? | 587 | 4096 | iobm/Er | NULL | NULL | iobm/Er.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | E_IOB_IBUF
-
-SRFF_INSTANCE | iobm/Er.REG | iobm/Er | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/Er.D | 9751 | ? | 587 | 0 | iobm/Er | NULL | NULL | iobm/Er.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK-IO_4 | 9370 | ? | 666 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/Er.Q | 9754 | ? | 666 | 0 | iobm/Er | NULL | NULL | iobm/Er.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_IOB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | RefAck | MXSE_COPY_0_COPY_0 | 2155873280 | 3 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | RefAck | 9389 | ? | 594 | 0 | MXSE_COPY_0_COPY_0 | NULL | RefAck.Q | RefAck | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | RefAck.SI | RefAck | 0 | 2 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RefAck.D1 | 9756 | ? | 638 | 4096 | RefAck | NULL | NULL | RefAck.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RefAck.D2 | 9757 | ? | 638 | 4096 | RefAck | NULL | NULL | RefAck.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1
-
-SRFF_INSTANCE | RefAck.REG | RefAck | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RefAck.D | 9755 | ? | 638 | 0 | RefAck | NULL | NULL | RefAck.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RefAck.Q | 9758 | ? | 594 | 0 | RefAck | NULL | NULL | RefAck.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/Er2 | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9388 | ? | 666 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/Er2 | 9390 | ? | 656 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/Er2.SI | iobm/Er2 | 0 | 1 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9388 | ? | 666 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/Er2.D1 | 9760 | ? | 666 | 4096 | iobm/Er2 | NULL | NULL | iobm/Er2.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/Er2.D2 | 9761 | ? | 666 | 4096 | iobm/Er2 | NULL | NULL | iobm/Er2.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | iobm/Er
-
-SRFF_INSTANCE | iobm/Er2.REG | iobm/Er2 | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/Er2.D | 9759 | ? | 666 | 0 | iobm/Er2 | NULL | NULL | iobm/Er2.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/Er2.Q | 9762 | ? | 656 | 0 | iobm/Er2 | NULL | NULL | iobm/Er2.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/IOS_FSM_FFd2 | MXSE_COPY_0_COPY_0 | 2155873280 | 10 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9361 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9369 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ETACK | 9380 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9399 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9400 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrf | 9402 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrr | 9403 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrf | 9405 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrr | 9406 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/IOS_FSM_FFd2 | 9391 | ? | 680 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/IOS_FSM_FFd2.SI | iobm/IOS_FSM_FFd2 | 0 | 9 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9361 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9369 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ETACK | 9380 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9399 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9400 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrf | 9402 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrr | 9403 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrf | 9405 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrr | 9406 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/IOS_FSM_FFd2.D1 | 9764 | ? | 667 | 4096 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/IOS_FSM_FFd2.D2 | 9765 | ? | 667 | 4096 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 3 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/ETACK
-SPPTERM | 4 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr
-SPPTERM | 4 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr
-SPPTERM | 4 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr
-
-SRFF_INSTANCE | iobm/IOS_FSM_FFd2.REG | iobm/IOS_FSM_FFd2 | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/IOS_FSM_FFd2.D | 9763 | ? | 667 | 0 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/IOS_FSM_FFd2.Q | 9766 | ? | 680 | 0 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_IOB | CLK2X_IOB
-
-INPUT_INSTANCE | 0 | 0 | NULL | nVPA_IOB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | nVPA_IOB | 9509 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | nVPA_IOB_IBUF | 9392 | ? | 669 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/VPArf | MXSE_COPY_0_COPY_0 | 2424308736 | 2 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nVPA_IOB_IBUF | 9392 | ? | 669 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK-IO_3 | 9316 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/VPArf | 9393 | ? | 648 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/VPArf.Q | iobm/VPArf | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/VPArf.SI | iobm/VPArf | 0 | 1 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nVPA_IOB_IBUF | 9392 | ? | 669 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/VPArf.D1 | 9768 | ? | 668 | 4096 | iobm/VPArf | NULL | NULL | iobm/VPArf.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/VPArf.D2 | 9769 | ? | 668 | 4096 | iobm/VPArf | NULL | NULL | iobm/VPArf.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_FALSE | nVPA_IOB_IBUF
-
-SRFF_INSTANCE | iobm/VPArf.REG | iobm/VPArf | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/VPArf.D | 9767 | ? | 668 | 0 | iobm/VPArf | NULL | NULL | iobm/VPArf.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK-IO_3 | 9316 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/VPArf.Q | 9770 | ? | 648 | 0 | iobm/VPArf | NULL | NULL | iobm/VPArf.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/VPArr | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nVPA_IOB_IBUF | 9392 | ? | 669 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/VPArr | 9394 | ? | 648 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/VPArr.Q | iobm/VPArr | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/VPArr.SI | iobm/VPArr | 0 | 1 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nVPA_IOB_IBUF | 9392 | ? | 669 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/VPArr.D1 | 9772 | ? | 669 | 4096 | iobm/VPArr | NULL | NULL | iobm/VPArr.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/VPArr.D2 | 9773 | ? | 669 | 4096 | iobm/VPArr | NULL | NULL | iobm/VPArr.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_FALSE | nVPA_IOB_IBUF
-
-SRFF_INSTANCE | iobm/VPArr.REG | iobm/VPArr | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/VPArr.D | 9771 | ? | 669 | 0 | iobm/VPArr | NULL | NULL | iobm/VPArr.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/VPArr.Q | 9774 | ? | 648 | 0 | iobm/VPArr | NULL | NULL | iobm/VPArr.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | ALE0M | MXSE_COPY_0_COPY_0 | 2155873536 | 8 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9361 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9366 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd5 | 9367 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd5.Q | iobm/IOS_FSM_FFd5 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd6 | 9368 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd6.Q | iobm/IOS_FSM_FFd6 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd7 | 9371 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd7.Q | iobm/IOS_FSM_FFd7 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOREQr | 9381 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd8 | 9382 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd8.Q | iobm/IOS_FSM_FFd8 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ALE0M | 9395 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ALE0M.Q | ALE0M | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | ALE0M.SI | ALE0M | 0 | 7 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9361 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9366 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd5 | 9367 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd5.Q | iobm/IOS_FSM_FFd5 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd6 | 9368 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd6.Q | iobm/IOS_FSM_FFd6 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd7 | 9371 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd7.Q | iobm/IOS_FSM_FFd7 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOREQr | 9381 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd8 | 9382 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd8.Q | iobm/IOS_FSM_FFd8 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ALE0M.D1 | 9776 | ? | 670 | 4096 | ALE0M | NULL | NULL | ALE0M.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ALE0M.D2 | 9777 | ? | 670 | 4096 | ALE0M | NULL | NULL | ALE0M.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 6 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd5 | IV_FALSE | iobm/IOS_FSM_FFd6 | IV_FALSE | iobm/IOS_FSM_FFd7 | IV_FALSE | iobm/IOREQr
-SPPTERM | 6 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd5 | IV_FALSE | iobm/IOS_FSM_FFd6 | IV_FALSE | iobm/IOS_FSM_FFd7 | IV_FALSE | iobm/IOS_FSM_FFd8
-
-SRFF_INSTANCE | ALE0M.REG | ALE0M | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ALE0M.D | 9775 | ? | 670 | 0 | ALE0M | NULL | NULL | ALE0M.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ALE0M.Q | 9778 | ? | 0 | 0 | ALE0M | NULL | NULL | ALE0M.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | ALE0S | MXSE_COPY_0_COPY_0 | 2155873280 | 10 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ALE0S | 9396 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ALE0S.Q | ALE0S | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | ALE0S.EXP | 10015 | ? | 625 | 0 | MXSE_COPY_0_COPY_0 | NULL | ALE0S.EXP | ALE0S | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | ALE0S.SI | ALE0S | 0 | 9 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ALE0S.D1 | 9780 | ? | 639 | 4096 | ALE0S | NULL | NULL | ALE0S.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ALE0S.D2 | 9781 | ? | 639 | 4096 | ALE0S | NULL | NULL | ALE0S.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | ALE0S.EXP | 10004 | ? | 625 | 0 | ALE0S | NULL | NULL | ALE0S.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-
-SRFF_INSTANCE | ALE0S.REG | ALE0S | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ALE0S.D | 9779 | ? | 639 | 0 | ALE0S | NULL | NULL | ALE0S.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ALE0S.Q | 9782 | ? | 0 | 0 | ALE0S | NULL | NULL | ALE0S.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | IOREQ | MXSE_COPY_0_COPY_0 | 2155873536 | 12 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9375 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1.EXP | 10018 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.EXP | iobs/PS_FSM_FFd1 | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ETACK.EXP | 10019 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.EXP | iobm/ETACK | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | IOREQ | 9397 | ? | 662 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOREQ.Q | IOREQ | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | IOREQ.SI | IOREQ | 0 | 11 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9375 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1.EXP | 10018 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.EXP | iobs/PS_FSM_FFd1 | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ETACK.EXP | 10019 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.EXP | iobm/ETACK | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | IOREQ.D1 | 9784 | ? | 640 | 4096 | IOREQ | NULL | NULL | IOREQ.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | IOREQ.D2 | 9785 | ? | 640 | 4096 | IOREQ | NULL | NULL | IOREQ.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | iobs/PS_FSM_FFd1.EXP
-SPPTERM | 1 | IV_TRUE | iobm/ETACK.EXP
-SPPTERM | 2 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/PS_FSM_FFd1
-SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/IOACTr
-SPPTERM | 3 | IV_TRUE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
-SPPTERM | 4 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | fsb/ASrf | IV_TRUE | ALE1
-
-SRFF_INSTANCE | IOREQ.REG | IOREQ | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | IOREQ.D | 9783 | ? | 640 | 0 | IOREQ | NULL | NULL | IOREQ.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | IOREQ.Q | 9786 | ? | 662 | 0 | IOREQ | NULL | NULL | IOREQ.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | fsb/ASrf | MXSE_COPY_0_COPY_0 | 2424308736 | 2 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK-IO_1 | 9320 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | fsb/ASrf.SI | fsb/ASrf | 0 | 1 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | fsb/ASrf.D1 | 9788 | ? | 641 | 4096 | fsb/ASrf | NULL | NULL | fsb/ASrf.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | fsb/ASrf.D2 | 9789 | ? | 641 | 4096 | fsb/ASrf | NULL | NULL | fsb/ASrf.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_FALSE | nAS_FSB_IBUF
-
-SRFF_INSTANCE | fsb/ASrf.REG | fsb/ASrf | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | fsb/ASrf.D | 9787 | ? | 641 | 0 | fsb/ASrf | NULL | NULL | fsb/ASrf.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK-IO_1 | 9320 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | fsb/ASrf.Q | 9790 | ? | 645 | 0 | fsb/ASrf | NULL | NULL | fsb/ASrf.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/BERRrf | MXSE_COPY_0_COPY_0 | 2424308736 | 2 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_IOB_IBUF | 9326 | ? | 672 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK-IO_3 | 9316 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/BERRrf | 9399 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/BERRrf.SI | iobm/BERRrf | 0 | 1 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_IOB_IBUF | 9326 | ? | 672 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/BERRrf.D1 | 9792 | ? | 671 | 4096 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/BERRrf.D2 | 9793 | ? | 671 | 4096 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_FALSE | nBERR_IOB_IBUF
-
-SRFF_INSTANCE | iobm/BERRrf.REG | iobm/BERRrf | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/BERRrf.D | 9791 | ? | 671 | 0 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK-IO_3 | 9316 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/BERRrf.Q | 9794 | ? | 667 | 0 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/BERRrr | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_IOB_IBUF | 9326 | ? | 672 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/BERRrr | 9400 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/BERRrr.SI | iobm/BERRrr | 0 | 1 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_IOB_IBUF | 9326 | ? | 672 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/BERRrr.D1 | 9796 | ? | 672 | 4096 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/BERRrr.D2 | 9797 | ? | 672 | 4096 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_FALSE | nBERR_IOB_IBUF
-
-SRFF_INSTANCE | iobm/BERRrr.REG | iobm/BERRrr | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/BERRrr.D | 9795 | ? | 672 | 0 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/BERRrr.Q | 9798 | ? | 667 | 0 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-INPUT_INSTANCE | 0 | 0 | NULL | nDTACK_IOB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | nDTACK_IOB | 9510 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | nDTACK_IOB_IBUF | 9401 | ? | 674 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/DTACKrf | MXSE_COPY_0_COPY_0 | 2424308736 | 2 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_IOB_IBUF | 9401 | ? | 674 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK-IO_3 | 9316 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/DTACKrf | 9402 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/DTACKrf.SI | iobm/DTACKrf | 0 | 1 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_IOB_IBUF | 9401 | ? | 674 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/DTACKrf.D1 | 9800 | ? | 673 | 4096 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/DTACKrf.D2 | 9801 | ? | 673 | 4096 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_FALSE | nDTACK_IOB_IBUF
-
-SRFF_INSTANCE | iobm/DTACKrf.REG | iobm/DTACKrf | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/DTACKrf.D | 9799 | ? | 673 | 0 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK-IO_3 | 9316 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/DTACKrf.Q | 9802 | ? | 667 | 0 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/DTACKrr | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_IOB_IBUF | 9401 | ? | 674 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/DTACKrr | 9403 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/DTACKrr.SI | iobm/DTACKrr | 0 | 1 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_IOB_IBUF | 9401 | ? | 674 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/DTACKrr.D1 | 9804 | ? | 674 | 4096 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/DTACKrr.D2 | 9805 | ? | 674 | 4096 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_FALSE | nDTACK_IOB_IBUF
-
-SRFF_INSTANCE | iobm/DTACKrr.REG | iobm/DTACKrr | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/DTACKrr.D | 9803 | ? | 674 | 0 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/DTACKrr.Q | 9806 | ? | 667 | 0 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/IOS_FSM_FFd1 | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9391 | ? | 680 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/IOS_FSM_FFd1 | 9404 | ? | 664 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/IOS_FSM_FFd1.SI | iobm/IOS_FSM_FFd1 | 0 | 1 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9391 | ? | 680 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/IOS_FSM_FFd1.D1 | 9808 | ? | 675 | 4096 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/IOS_FSM_FFd1.D2 | 9809 | ? | 675 | 4096 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | iobm/IOS_FSM_FFd2
-
-SRFF_INSTANCE | iobm/IOS_FSM_FFd1.REG | iobm/IOS_FSM_FFd1 | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/IOS_FSM_FFd1.D | 9807 | ? | 675 | 0 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/IOS_FSM_FFd1.Q | 9810 | ? | 664 | 0 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/RESrf | MXSE_COPY_0_COPY_0 | 2424308736 | 2 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nRES_IBUF | 9330 | ? | 677 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK-IO_3 | 9316 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/RESrf | 9405 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/RESrf.SI | iobm/RESrf | 0 | 1 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nRES_IBUF | 9330 | ? | 677 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/RESrf.D1 | 9812 | ? | 676 | 4096 | iobm/RESrf | NULL | NULL | iobm/RESrf.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/RESrf.D2 | 9813 | ? | 676 | 4096 | iobm/RESrf | NULL | NULL | iobm/RESrf.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_FALSE | nRES_IBUF
-
-SRFF_INSTANCE | iobm/RESrf.REG | iobm/RESrf | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/RESrf.D | 9811 | ? | 676 | 0 | iobm/RESrf | NULL | NULL | iobm/RESrf.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK-IO_3 | 9316 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/RESrf.Q | 9814 | ? | 667 | 0 | iobm/RESrf | NULL | NULL | iobm/RESrf.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/RESrr | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nRES_IBUF | 9330 | ? | 677 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/RESrr | 9406 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/RESrr.SI | iobm/RESrr | 0 | 1 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nRES_IBUF | 9330 | ? | 677 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/RESrr.D1 | 9816 | ? | 677 | 4096 | iobm/RESrr | NULL | NULL | iobm/RESrr.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/RESrr.D2 | 9817 | ? | 677 | 4096 | iobm/RESrr | NULL | NULL | iobm/RESrr.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_FALSE | nRES_IBUF
-
-SRFF_INSTANCE | iobm/RESrr.REG | iobm/RESrr | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/RESrr.D | 9815 | ? | 677 | 0 | iobm/RESrr | NULL | NULL | iobm/RESrr.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/RESrr.Q | 9818 | ? | 667 | 0 | iobm/RESrr | NULL | NULL | iobm/RESrr.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/Clear1 | MXSE_COPY_0_COPY_0 | 2155873280 | 4 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/Clear1 | 9407 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Clear1.Q | iobs/Clear1 | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobs/Clear1.SI | iobs/Clear1 | 0 | 3 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/Clear1.D1 | 9820 | ? | 643 | 4096 | iobs/Clear1 | NULL | NULL | iobs/Clear1.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/Clear1.D2 | 9821 | ? | 643 | 4096 | iobs/Clear1 | NULL | NULL | iobs/Clear1.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 3 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_FALSE | ALE1
-
-SRFF_INSTANCE | iobs/Clear1.REG | iobs/Clear1 | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/Clear1.D | 9819 | ? | 643 | 0 | iobs/Clear1 | NULL | NULL | iobs/Clear1.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/Clear1.Q | 9822 | ? | 647 | 0 | iobs/Clear1 | NULL | NULL | iobs/Clear1.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RAMDIS1 | MXSE_COPY_0_COPY_0 | 2155873280 | 11 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9384 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP30_.EXP | 10044 | ? | 644 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP30_.EXP | EXP30_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP31_.EXP | 10045 | ? | 644 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP31_.EXP | EXP31_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/RAMDIS1 | 9408 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | ram/RAMDIS1.SI | ram/RAMDIS1 | 0 | 10 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9384 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP30_.EXP | 10044 | ? | 644 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP30_.EXP | EXP30_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP31_.EXP | 10045 | ? | 644 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP31_.EXP | EXP31_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/RAMDIS1.D1 | 9824 | ? | 644 | 4096 | ram/RAMDIS1 | NULL | NULL | ram/RAMDIS1.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/RAMDIS1.D2 | 9825 | ? | 644 | 4096 | ram/RAMDIS1 | NULL | NULL | ram/RAMDIS1.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | EXP30_.EXP
-SPPTERM | 1 | IV_TRUE | EXP31_.EXP
-SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1
-SPPTERM | 2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3
-SPPTERM | 3 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
-SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
-
-SRFF_INSTANCE | ram/RAMDIS1.REG | ram/RAMDIS1 | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/RAMDIS1.D | 9823 | ? | 644 | 0 | ram/RAMDIS1 | NULL | NULL | ram/RAMDIS1.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/RAMDIS1.Q | 9826 | ? | 0 | 0 | ram/RAMDIS1 | NULL | NULL | ram/RAMDIS1.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | ram/RAMReady | MXSE_COPY_0_COPY_0 | 2155873536 | 13 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9384 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9322 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6>.EXP | 10075 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.EXP | cnt/RefCnt<6> | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP34_.EXP | 10076 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP34_.EXP | EXP34_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/RAMReady | 9409 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | ram/RAMReady.SI | ram/RAMReady | 0 | 12 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9384 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9322 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6>.EXP | 10075 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.EXP | cnt/RefCnt<6> | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP34_.EXP | 10076 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP34_.EXP | EXP34_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/RAMReady.D1 | 9828 | ? | 645 | 4096 | ram/RAMReady | NULL | NULL | ram/RAMReady.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/RAMReady.D2 | 9829 | ? | 645 | 4096 | ram/RAMReady | NULL | NULL | ram/RAMReady.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | cnt/RefCnt<6>.EXP
-SPPTERM | 1 | IV_TRUE | EXP34_.EXP
-SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
-SPPTERM | 6 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
-SPPTERM | 6 | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
-SPPTERM | 6 | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
-SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1
-
-SRFF_INSTANCE | ram/RAMReady.REG | ram/RAMReady | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/RAMReady.D | 9827 | ? | 645 | 0 | ram/RAMReady | NULL | NULL | ram/RAMReady.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/RAMReady.Q | 9830 | ? | 620 | 0 | ram/RAMReady | NULL | NULL | ram/RAMReady.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_1_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<1> | 9511 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | A_FSB | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_1_IBUF | 9410 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_1_IBUF | 0 | 5 | II_IMUX
-
-INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_2_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<2> | 9512 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | A_FSB | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_2_IBUF | 9411 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_2_IBUF | 0 | 5 | II_IMUX
-
-INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_3_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<3> | 9513 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | A_FSB | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_3_IBUF | 9412 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_3_IBUF | 0 | 5 | II_IMUX
-
-INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_4_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<4> | 9514 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | A_FSB | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_4_IBUF | 9413 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_4_IBUF | 0 | 5 | II_IMUX
-
-INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_5_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<5> | 9515 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | A_FSB | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_5_IBUF | 9414 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_5_IBUF | 0 | 5 | II_IMUX
-
-INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_6_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<6> | 9516 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | A_FSB | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_6_IBUF | 9415 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_6_IBUF | 0 | 5 | II_IMUX
-
-INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_7_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<7> | 9517 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | A_FSB | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_7_IBUF | 9416 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_7_IBUF | 0 | 5 | II_IMUX
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | nAS_IOB_OBUF | MXSE_COPY_0_COPY_0 | 2424308736 | 6 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9361 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9366 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd5 | 9367 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd5.Q | iobm/IOS_FSM_FFd5 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd6 | 9368 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd6.Q | iobm/IOS_FSM_FFd6 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd7 | 9371 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd7.Q | iobm/IOS_FSM_FFd7 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK-IO_3 | 9316 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nAS_IOB_OBUF | 9417 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAS_IOB_OBUF.Q | nAS_IOB_OBUF | 0 | 0 | MC_Q
-
-SIGNAL_INSTANCE | nAS_IOB_OBUF.SI | nAS_IOB_OBUF | 0 | 5 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9361 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9366 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd5 | 9367 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd5.Q | iobm/IOS_FSM_FFd5 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd6 | 9368 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd6.Q | iobm/IOS_FSM_FFd6 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd7 | 9371 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd7.Q | iobm/IOS_FSM_FFd7 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nAS_IOB_OBUF.D1 | 9832 | ? | 678 | 4096 | nAS_IOB_OBUF | NULL | NULL | nAS_IOB_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nAS_IOB_OBUF.D2 | 9833 | ? | 678 | 4096 | nAS_IOB_OBUF | NULL | NULL | nAS_IOB_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 5 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd5 | IV_FALSE | iobm/IOS_FSM_FFd6 | IV_FALSE | iobm/IOS_FSM_FFd7
-
-SRFF_INSTANCE | nAS_IOB_OBUF.REG | nAS_IOB_OBUF | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nAS_IOB_OBUF.D | 9831 | ? | 678 | 0 | nAS_IOB_OBUF | NULL | NULL | nAS_IOB_OBUF.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK-IO_3 | 9316 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nAS_IOB_OBUF.Q | 9834 | ? | 0 | 0 | nAS_IOB_OBUF | NULL | NULL | nAS_IOB_OBUF.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | nCAS_OBUF | MXSE_COPY_0_COPY_0 | 2424308736 | 2 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9354 | ? | 646 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK-IO_1 | 9320 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nCAS_OBUF | 9418 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nCAS_OBUF.Q | nCAS_OBUF | 0 | 0 | MC_Q
-
-SIGNAL_INSTANCE | nCAS_OBUF.SI | nCAS_OBUF | 0 | 1 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9354 | ? | 646 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nCAS_OBUF.D1 | 9836 | ? | 646 | 4096 | nCAS_OBUF | NULL | NULL | nCAS_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nCAS_OBUF.D2 | 9837 | ? | 646 | 4096 | nCAS_OBUF | NULL | NULL | nCAS_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_FALSE | ram/RASEL
-
-SRFF_INSTANCE | nCAS_OBUF.REG | nCAS_OBUF | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nCAS_OBUF.D | 9835 | ? | 646 | 0 | nCAS_OBUF | NULL | NULL | nCAS_OBUF.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK-IO_1 | 9320 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nCAS_OBUF.Q | 9838 | ? | 0 | 0 | nCAS_OBUF | NULL | NULL | nCAS_OBUF.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped+Ce | nDinLE_OBUF | MXSE_COPY_0_COPY_0 | 2424308992 | 3 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9361 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9366 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK-IO_3 | 9316 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nDinLE_OBUF | 9419 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinLE_OBUF.Q | nDinLE_OBUF | 0 | 0 | MC_Q
-
-SIGNAL_INSTANCE | nDinLE_OBUF.SI | nDinLE_OBUF | 0 | 2 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9361 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9366 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nDinLE_OBUF.D1 | 9840 | ? | 679 | 4096 | nDinLE_OBUF | NULL | NULL | nDinLE_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nDinLE_OBUF.D2 | 9841 | ? | 679 | 4096 | nDinLE_OBUF | NULL | NULL | nDinLE_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd4
-
-SRFF_INSTANCE | nDinLE_OBUF.REG | nDinLE_OBUF | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nDinLE_OBUF.D | 9839 | ? | 679 | 0 | nDinLE_OBUF | NULL | NULL | nDinLE_OBUF.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK-IO_3 | 9316 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nDinLE_OBUF.Q | 9842 | ? | 0 | 0 | nDinLE_OBUF | NULL | NULL | nDinLE_OBUF.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | nDoutOE_OBUF | MXSE_COPY_0_COPY_0 | 2155873280 | 8 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9328 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9361 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9366 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd5 | 9367 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd5.Q | iobm/IOS_FSM_FFd5 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd6 | 9368 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd6.Q | iobm/IOS_FSM_FFd6 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd7 | 9371 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd7.Q | iobm/IOS_FSM_FFd7 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9391 | ? | 680 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nDoutOE_OBUF | 9420 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDoutOE_OBUF.Q | nDoutOE_OBUF | 0 | 0 | MC_Q
-
-SIGNAL_INSTANCE | nDoutOE_OBUF.SI | nDoutOE_OBUF | 0 | 7 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9328 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9361 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9366 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd5 | 9367 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd5.Q | iobm/IOS_FSM_FFd5 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd6 | 9368 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd6.Q | iobm/IOS_FSM_FFd6 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd7 | 9371 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd7.Q | iobm/IOS_FSM_FFd7 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9391 | ? | 680 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nDoutOE_OBUF.D1 | 9844 | ? | 680 | 4096 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nDoutOE_OBUF.D2 | 9845 | ? | 680 | 4096 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_FALSE | IORW0
-SPPTERM | 6 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd5 | IV_FALSE | iobm/IOS_FSM_FFd6 | IV_FALSE | iobm/IOS_FSM_FFd7 | IV_FALSE | iobm/IOS_FSM_FFd2
-
-SRFF_INSTANCE | nDoutOE_OBUF.REG | nDoutOE_OBUF | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nDoutOE_OBUF.D | 9843 | ? | 680 | 0 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_2 | 9315 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nDoutOE_OBUF.Q | 9846 | ? | 0 | 0 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | nLDS_IOB_OBUF | MXSE_COPY_0_COPY_0 | 2424308736 | 8 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOL0 | 9333 | ? | 681 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOL0.Q | IOL0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9328 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9361 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9366 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd5 | 9367 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd5.Q | iobm/IOS_FSM_FFd5 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd6 | 9368 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd6.Q | iobm/IOS_FSM_FFd6 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd7 | 9371 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd7.Q | iobm/IOS_FSM_FFd7 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK-IO_3 | 9316 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nLDS_IOB_OBUF | 9421 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nLDS_IOB_OBUF.Q | nLDS_IOB_OBUF | 0 | 0 | MC_Q
-
-SIGNAL_INSTANCE | nLDS_IOB_OBUF.SI | nLDS_IOB_OBUF | 0 | 7 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOL0 | 9333 | ? | 681 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOL0.Q | IOL0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9328 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9361 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9366 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd5 | 9367 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd5.Q | iobm/IOS_FSM_FFd5 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd6 | 9368 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd6.Q | iobm/IOS_FSM_FFd6 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd7 | 9371 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd7.Q | iobm/IOS_FSM_FFd7 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nLDS_IOB_OBUF.D1 | 9848 | ? | 681 | 4096 | nLDS_IOB_OBUF | NULL | NULL | nLDS_IOB_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nLDS_IOB_OBUF.D2 | 9849 | ? | 681 | 4096 | nLDS_IOB_OBUF | NULL | NULL | nLDS_IOB_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_FALSE | IOL0
-SPPTERM | 4 | IV_TRUE | IORW0 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd5
-SPPTERM | 5 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd5 | IV_FALSE | iobm/IOS_FSM_FFd6 | IV_FALSE | iobm/IOS_FSM_FFd7
-
-SRFF_INSTANCE | nLDS_IOB_OBUF.REG | nLDS_IOB_OBUF | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nLDS_IOB_OBUF.D | 9847 | ? | 681 | 0 | nLDS_IOB_OBUF | NULL | NULL | nLDS_IOB_OBUF.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK-IO_3 | 9316 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nLDS_IOB_OBUF.Q | 9850 | ? | 0 | 0 | nLDS_IOB_OBUF | NULL | NULL | nLDS_IOB_OBUF.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | nUDS_IOB_OBUF | MXSE_COPY_0_COPY_0 | 2424308736 | 8 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOU0 | 9334 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOU0.Q | IOU0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9328 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9361 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9366 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd5 | 9367 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd5.Q | iobm/IOS_FSM_FFd5 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd6 | 9368 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd6.Q | iobm/IOS_FSM_FFd6 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd7 | 9371 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd7.Q | iobm/IOS_FSM_FFd7 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLK-IO_3 | 9316 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nUDS_IOB_OBUF | 9422 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nUDS_IOB_OBUF.Q | nUDS_IOB_OBUF | 0 | 0 | MC_Q
-
-SIGNAL_INSTANCE | nUDS_IOB_OBUF.SI | nUDS_IOB_OBUF | 0 | 7 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOU0 | 9334 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOU0.Q | IOU0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9328 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9361 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9366 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd5 | 9367 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd5.Q | iobm/IOS_FSM_FFd5 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd6 | 9368 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd6.Q | iobm/IOS_FSM_FFd6 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd7 | 9371 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd7.Q | iobm/IOS_FSM_FFd7 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nUDS_IOB_OBUF.D1 | 9852 | ? | 682 | 4096 | nUDS_IOB_OBUF | NULL | NULL | nUDS_IOB_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nUDS_IOB_OBUF.D2 | 9853 | ? | 682 | 4096 | nUDS_IOB_OBUF | NULL | NULL | nUDS_IOB_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_FALSE | IOU0
-SPPTERM | 4 | IV_TRUE | IORW0 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd5
-SPPTERM | 5 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd5 | IV_FALSE | iobm/IOS_FSM_FFd6 | IV_FALSE | iobm/IOS_FSM_FFd7
-
-SRFF_INSTANCE | nUDS_IOB_OBUF.REG | nUDS_IOB_OBUF | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nUDS_IOB_OBUF.D | 9851 | ? | 682 | 0 | nUDS_IOB_OBUF | NULL | NULL | nUDS_IOB_OBUF.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLK-IO_3 | 9316 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nUDS_IOB_OBUF.Q | 9854 | ? | 0 | 0 | nUDS_IOB_OBUF | NULL | NULL | nUDS_IOB_OBUF.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | OptxMapped | RA_0_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 13 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9384 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1.EXP | 10037 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.EXP | cs/nOverlay1 | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_0_OBUF | 9423 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_0_OBUF.Q | RA_0_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | RA_0_OBUF.EXP | 10036 | ? | 621 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_0_OBUF.EXP | RA_0_OBUF | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | RA_0_OBUF.SI | RA_0_OBUF | 0 | 13 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9384 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1.EXP | 10037 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.EXP | cs/nOverlay1 | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_0_OBUF.D1 | 9856 | ? | 0 | 4096 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_0_OBUF.D2 | 9857 | ? | 0 | 4096 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | cs/nOverlay1.EXP
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | RA_0_OBUF.EXP | 10023 | ? | 621 | 0 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
-SPPTERM | 7 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
-SPPTERM | 7 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
-SPPTERM | 8 | IV_FALSE | cnt/RefDone | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_FALSE | fsb/ASrf
-SPPTERM | 8 | IV_FALSE | cnt/RefDone | IV_TRUE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_FALSE | fsb/ASrf
-
-SRFF_INSTANCE | RA_0_OBUF.REG | RA_0_OBUF | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_0_OBUF.D | 9855 | ? | 0 | 0 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.XOR | 0 | 7 | ALU_F
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_0_OBUF.Q | 9858 | ? | 0 | 0 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.REG | 0 | 8 | SRFF_Q
-
-MACROCELL_INSTANCE | OptxMapped | RA_1_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 15 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9305 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9354 | ? | 646 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_2_IBUF | 9411 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_2_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9366 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd5 | 9367 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd5.Q | iobm/IOS_FSM_FFd5 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd6 | 9368 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd6.Q | iobm/IOS_FSM_FFd6 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9369 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd7 | 9371 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd7.Q | iobm/IOS_FSM_FFd7 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd8 | 9382 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd8.Q | iobm/IOS_FSM_FFd8 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9399 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9400 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrf | 9402 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrr | 9403 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrf | 9405 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrr | 9406 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_1_OBUF | 9424 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.Q | RA_1_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | RA_1_OBUF.EXP | 10052 | ? | 665 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.EXP | RA_1_OBUF | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | RA_1_OBUF.SI | RA_1_OBUF | 0 | 15 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9305 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9354 | ? | 646 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_2_IBUF | 9411 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_2_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9366 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd5 | 9367 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd5.Q | iobm/IOS_FSM_FFd5 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd6 | 9368 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd6.Q | iobm/IOS_FSM_FFd6 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9369 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd7 | 9371 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd7.Q | iobm/IOS_FSM_FFd7 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd8 | 9382 | ? | 670 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd8.Q | iobm/IOS_FSM_FFd8 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9399 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9400 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrf | 9402 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrr | 9403 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrf | 9405 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrr | 9406 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_1_OBUF.D1 | 9860 | ? | 0 | 4096 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_1_OBUF.D2 | 9861 | ? | 0 | 4096 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_TRUE | A_FSB_11_IBUF | IV_FALSE | ram/RASEL
-SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_2_IBUF
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | RA_1_OBUF.EXP | 10049 | ? | 665 | 0 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 8 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd5 | IV_FALSE | iobm/IOS_FSM_FFd6 | IV_TRUE | CLK_IOB_IBUF | IV_FALSE | iobm/IOS_FSM_FFd7 | IV_FALSE | iobm/IOS_FSM_FFd8 | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr
-SPPTERM | 8 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd5 | IV_FALSE | iobm/IOS_FSM_FFd6 | IV_TRUE | CLK_IOB_IBUF | IV_FALSE | iobm/IOS_FSM_FFd7 | IV_FALSE | iobm/IOS_FSM_FFd8 | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr
-SPPTERM | 8 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd5 | IV_FALSE | iobm/IOS_FSM_FFd6 | IV_TRUE | CLK_IOB_IBUF | IV_FALSE | iobm/IOS_FSM_FFd7 | IV_FALSE | iobm/IOS_FSM_FFd8 | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr
-
-SRFF_INSTANCE | RA_1_OBUF.REG | RA_1_OBUF | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_1_OBUF.D | 9859 | ? | 0 | 0 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.XOR | 0 | 7 | ALU_F
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_1_OBUF.Q | 9862 | ? | 0 | 0 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.REG | 0 | 8 | SRFF_Q
-
-MACROCELL_INSTANCE | OptxMapped | RA_2_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 10 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9304 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9354 | ? | 646 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_3_IBUF | 9412 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_3_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_2_OBUF | 9425 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.Q | RA_2_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | RA_2_OBUF.EXP | 10040 | ? | 595 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.EXP | RA_2_OBUF | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | RA_2_OBUF.SI | RA_2_OBUF | 0 | 10 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9304 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9354 | ? | 646 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_3_IBUF | 9412 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_3_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_2_OBUF.D1 | 9864 | ? | 0 | 4096 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_2_OBUF.D2 | 9865 | ? | 0 | 4096 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_TRUE | A_FSB_12_IBUF | IV_FALSE | ram/RASEL
-SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_3_IBUF
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | RA_2_OBUF.EXP | 10027 | ? | 595 | 0 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 5 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/Once
-
-SRFF_INSTANCE | RA_2_OBUF.REG | RA_2_OBUF | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_2_OBUF.D | 9863 | ? | 0 | 0 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.XOR | 0 | 7 | ALU_F
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_2_OBUF.Q | 9866 | ? | 0 | 0 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.REG | 0 | 8 | SRFF_Q
-
-MACROCELL_INSTANCE | OptxMapped | RA_3_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 3 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9354 | ? | 646 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_4_IBUF | 9413 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_4_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_3_OBUF | 9426 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.Q | RA_3_OBUF | 0 | 0 | MC_Q
-
-SIGNAL_INSTANCE | RA_3_OBUF.SI | RA_3_OBUF | 0 | 3 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9354 | ? | 646 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_4_IBUF | 9413 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_4_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_3_OBUF.D1 | 9868 | ? | 0 | 4096 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_3_OBUF.D2 | 9869 | ? | 0 | 4096 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | ram/RASEL
-SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_4_IBUF
-
-SRFF_INSTANCE | RA_3_OBUF.REG | RA_3_OBUF | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_3_OBUF.D | 9867 | ? | 0 | 0 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.XOR | 0 | 7 | ALU_F
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_3_OBUF.Q | 9870 | ? | 0 | 0 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.REG | 0 | 8 | SRFF_Q
-
-MACROCELL_INSTANCE | OptxMapped | RA_4_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 11 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9354 | ? | 646 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_5_IBUF | 9414 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_5_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_4_OBUF | 9427 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.Q | RA_4_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | RA_4_OBUF.EXP | 10043 | ? | 644 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.EXP | RA_4_OBUF | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | RA_4_OBUF.SI | RA_4_OBUF | 0 | 11 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9354 | ? | 646 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_5_IBUF | 9414 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_5_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_4_OBUF.D1 | 9872 | ? | 0 | 4096 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_4_OBUF.D2 | 9873 | ? | 0 | 4096 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | ram/RASEL
-SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_5_IBUF
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | RA_4_OBUF.EXP | 10030 | ? | 644 | 0 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
-SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
-SPPTERM | 7 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
-
-SRFF_INSTANCE | RA_4_OBUF.REG | RA_4_OBUF | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_4_OBUF.D | 9871 | ? | 0 | 0 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.XOR | 0 | 7 | ALU_F
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_4_OBUF.Q | 9874 | ? | 0 | 0 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.REG | 0 | 8 | SRFF_Q
-
-MACROCELL_INSTANCE | OptxMapped | RA_5_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 3 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9301 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9354 | ? | 646 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_6_IBUF | 9415 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_6_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_5_OBUF | 9428 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.Q | RA_5_OBUF | 0 | 0 | MC_Q
-
-SIGNAL_INSTANCE | RA_5_OBUF.SI | RA_5_OBUF | 0 | 3 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9301 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9354 | ? | 646 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_6_IBUF | 9415 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_6_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_5_OBUF.D1 | 9876 | ? | 0 | 4096 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_5_OBUF.D2 | 9877 | ? | 0 | 4096 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | ram/RASEL
-SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_6_IBUF
-
-SRFF_INSTANCE | RA_5_OBUF.REG | RA_5_OBUF | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_5_OBUF.D | 9875 | ? | 0 | 0 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.XOR | 0 | 7 | ALU_F
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_5_OBUF.Q | 9878 | ? | 0 | 0 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.REG | 0 | 8 | SRFF_Q
-
-MACROCELL_INSTANCE | OptxMapped | RA_6_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 14 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9354 | ? | 646 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_7_IBUF | 9416 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_7_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_6_OBUF | 9429 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.Q | RA_6_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | RA_6_OBUF.EXP | 10068 | ? | 624 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.EXP | RA_6_OBUF | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | RA_6_OBUF.SI | RA_6_OBUF | 0 | 14 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9354 | ? | 646 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_7_IBUF | 9416 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_7_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_6_OBUF.D1 | 9880 | ? | 0 | 4096 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_6_OBUF.D2 | 9881 | ? | 0 | 4096 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | ram/RASEL
-SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_7_IBUF
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | RA_6_OBUF.EXP | 10057 | ? | 624 | 0 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 5 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 8 | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
-SPPTERM | 8 | IV_FALSE | cnt/RefDone | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf
-
-SRFF_INSTANCE | RA_6_OBUF.REG | RA_6_OBUF | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_6_OBUF.D | 9879 | ? | 0 | 0 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.XOR | 0 | 7 | ALU_F
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_6_OBUF.Q | 9882 | ? | 0 | 0 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.REG | 0 | 8 | SRFF_Q
-
-MACROCELL_INSTANCE | OptxMapped | RA_7_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 13 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9354 | ? | 646 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9300 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9322 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_7_OBUF | 9430 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_7_OBUF.Q | RA_7_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | RA_7_OBUF.EXP | 10069 | ? | 593 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_7_OBUF.EXP | RA_7_OBUF | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | RA_7_OBUF.SI | RA_7_OBUF | 0 | 13 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9354 | ? | 646 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9300 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9322 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_7_OBUF.D1 | 9884 | ? | 0 | 4096 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_7_OBUF.D2 | 9885 | ? | 0 | 4096 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | ram/RASEL
-SPPTERM | 2 | IV_TRUE | A_FSB_17_IBUF | IV_FALSE | ram/RASEL
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | RA_7_OBUF.EXP | 10058 | ? | 593 | 0 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf
-SPPTERM | 9 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 9 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf
-
-SRFF_INSTANCE | RA_7_OBUF.REG | RA_7_OBUF | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_7_OBUF.D | 9883 | ? | 0 | 0 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.XOR | 0 | 7 | ALU_F
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_7_OBUF.Q | 9886 | ? | 0 | 0 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.REG | 0 | 8 | SRFF_Q
-
-MACROCELL_INSTANCE | OptxMapped | RA_8_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 13 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9354 | ? | 646 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS2.EXP | 10071 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.EXP | ram/RAMDIS2 | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_8_OBUF | 9431 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_8_OBUF.Q | RA_8_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | RA_8_OBUF.EXP | 10072 | ? | 622 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_8_OBUF.EXP | RA_8_OBUF | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | RA_8_OBUF.SI | RA_8_OBUF | 0 | 13 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9354 | ? | 646 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS2.EXP | 10071 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.EXP | ram/RAMDIS2 | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_8_OBUF.D1 | 9888 | ? | 0 | 4096 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_8_OBUF.D2 | 9889 | ? | 0 | 4096 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | ram/RAMDIS2.EXP
-SPPTERM | 2 | IV_TRUE | A_FSB_18_IBUF | IV_FALSE | ram/RASEL
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | RA_8_OBUF.EXP | 10061 | ? | 622 | 0 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | fsb/ASrf
-SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | fsb/ASrf
-SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<7> | IV_FALSE | fsb/ASrf
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
-
-SRFF_INSTANCE | RA_8_OBUF.REG | RA_8_OBUF | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_8_OBUF.D | 9887 | ? | 0 | 0 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.XOR | 0 | 7 | ALU_F
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_8_OBUF.Q | 9890 | ? | 0 | 0 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.REG | 0 | 8 | SRFF_Q
-
-MACROCELL_INSTANCE | OptxMapped | RA_9_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 9 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9354 | ? | 646 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9372 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9376 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9377 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9378 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9379 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_9_OBUF | 9432 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.Q | RA_9_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | RA_9_OBUF.EXP | 10074 | ? | 629 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.EXP | RA_9_OBUF | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | RA_9_OBUF.SI | RA_9_OBUF | 0 | 9 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9354 | ? | 646 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9372 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9376 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9377 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9378 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9379 | ? | 637 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_9_OBUF.D1 | 9892 | ? | 0 | 4096 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_9_OBUF.D2 | 9893 | ? | 0 | 4096 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | ram/RASEL
-SPPTERM | 2 | IV_TRUE | A_FSB_19_IBUF | IV_FALSE | ram/RASEL
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | RA_9_OBUF.EXP | 10063 | ? | 629 | 0 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 6 | IV_TRUE | cnt/RefCnt<0> | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<1> | IV_TRUE | cnt/RefCnt<2> | IV_TRUE | cnt/RefCnt<3> | IV_TRUE | cnt/RefCnt<4>
-
-SRFF_INSTANCE | RA_9_OBUF.REG | RA_9_OBUF | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_9_OBUF.D | 9891 | ? | 0 | 0 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.XOR | 0 | 7 | ALU_F
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_9_OBUF.Q | 9894 | ? | 0 | 0 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.REG | 0 | 8 | SRFF_Q
-
-MACROCELL_INSTANCE | OptxMapped | nBERR_FSB_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 20 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9325 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutB | 9336 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9338 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9339 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9341 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9347 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nBERR_FSB_OBUF | 9433 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.Q | nBERR_FSB_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | nBERR_FSB_OBUF.EXP | 9993 | ? | 610 | 0 | MXSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.EXP | nBERR_FSB_OBUF | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | nBERR_FSB_OBUF.SI | nBERR_FSB_OBUF | 0 | 20 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9325 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutB | 9336 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9338 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9339 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9341 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9347 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nBERR_FSB_OBUF.D1 | 9896 | ? | 0 | 4096 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nBERR_FSB_OBUF.D2 | 9897 | ? | 0 | 4096 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | nAS_FSB_IBUF
-SPPTERM | 4 | IV_FALSE | BERR_IOBS | IV_FALSE | TimeoutB | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r
-SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | BERR_IOBS | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | nBERR_FSB_OBUF.EXP | 9981 | ? | 610 | 0 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 13 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_FALSE | ALE1
-SPPTERM | 13 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_FALSE | ALE1
-
-SRFF_INSTANCE | nBERR_FSB_OBUF.REG | nBERR_FSB_OBUF | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nBERR_FSB_OBUF.D | 9895 | ? | 0 | 0 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.XOR | 0 | 7 | ALU_F
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nBERR_FSB_OBUF.Q | 9898 | ? | 0 | 0 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.REG | 0 | 8 | SRFF_Q
-
-MACROCELL_INSTANCE | Inv+OptxMapped | nOE_OBUF | MXSE_COPY_0_COPY_0 | 2155872512 | 21 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9300 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9301 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9304 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9305 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9306 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9335 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9342 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nOE_OBUF | 9434 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nOE_OBUF.Q | nOE_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | nOE_OBUF.EXP | 9995 | ? | 611 | 0 | MXSE_COPY_0_COPY_0 | NULL | nOE_OBUF.EXP | nOE_OBUF | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | nOE_OBUF.SI | nOE_OBUF | 0 | 21 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9300 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9301 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9304 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9305 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9306 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9335 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9342 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nOE_OBUF.D1 | 9900 | ? | 0 | 4096 | nOE_OBUF | NULL | NULL | nOE_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nOE_OBUF.D2 | 9901 | ? | 0 | 4096 | nOE_OBUF | NULL | NULL | nOE_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | nOE_OBUF.EXP | 9983 | ? | 611 | 0 | nOE_OBUF | NULL | NULL | nOE_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-SPPTERM | 19 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r
-SPPTERM | 19 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r
-SPPTERM | 19 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r
-
-SRFF_INSTANCE | nOE_OBUF.REG | nOE_OBUF | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nOE_OBUF.D | 9899 | ? | 0 | 0 | nOE_OBUF | NULL | NULL | nOE_OBUF.XOR | 0 | 7 | ALU_F
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nOE_OBUF.Q | 9902 | ? | 0 | 0 | nOE_OBUF | NULL | NULL | nOE_OBUF.REG | 0 | 8 | SRFF_Q
-
-MACROCELL_INSTANCE | Inv+OptxMapped | nROMWE_OBUF | MXSE_COPY_0_COPY_0 | 2155872512 | 2 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nROMWE_OBUF | 9435 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.Q | nROMWE_OBUF | 0 | 0 | MC_Q
-
-SIGNAL_INSTANCE | nROMWE_OBUF.SI | nROMWE_OBUF | 0 | 2 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nROMWE_OBUF.D1 | 9904 | ? | 0 | 4096 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nROMWE_OBUF.D2 | 9905 | ? | 0 | 4096 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF
-
-SRFF_INSTANCE | nROMWE_OBUF.REG | nROMWE_OBUF | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nROMWE_OBUF.D | 9903 | ? | 0 | 0 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.XOR | 0 | 7 | ALU_F
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nROMWE_OBUF.Q | 9906 | ? | 0 | 0 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.REG | 0 | 8 | SRFF_Q
-
-MACROCELL_INSTANCE | Inv+OptxMapped | nVPA_FSB_OBUF | MXSE_COPY_0_COPY_0 | 2155872512 | 2 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9343 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nVPA_FSB_OBUF | 9436 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVPA_FSB_OBUF.Q | nVPA_FSB_OBUF | 0 | 0 | MC_Q
-
-SIGNAL_INSTANCE | nVPA_FSB_OBUF.SI | nVPA_FSB_OBUF | 0 | 2 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9343 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nVPA_FSB_OBUF.D1 | 9908 | ? | 0 | 4096 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nVPA_FSB_OBUF.D2 | 9909 | ? | 0 | 4096 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_TRUE | fsb/VPA | IV_FALSE | nAS_FSB_IBUF
-
-SRFF_INSTANCE | nVPA_FSB_OBUF.REG | nVPA_FSB_OBUF | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nVPA_FSB_OBUF.D | 9907 | ? | 0 | 0 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.XOR | 0 | 7 | ALU_F
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nVPA_FSB_OBUF.Q | 9910 | ? | 0 | 0 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.REG | 0 | 8 | SRFF_Q
-
-MACROCELL_INSTANCE | OptxMapped | nADoutLE0_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 2 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE0M | 9395 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ALE0M.Q | ALE0M | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE0S | 9396 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ALE0S.Q | ALE0S | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nADoutLE0_OBUF | 9437 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.Q | nADoutLE0_OBUF | 0 | 0 | MC_Q
-
-SIGNAL_INSTANCE | nADoutLE0_OBUF.SI | nADoutLE0_OBUF | 0 | 2 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE0M | 9395 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ALE0M.Q | ALE0M | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE0S | 9396 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ALE0S.Q | ALE0S | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nADoutLE0_OBUF.D1 | 9912 | ? | 0 | 4096 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nADoutLE0_OBUF.D2 | 9913 | ? | 0 | 4096 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_FALSE | ALE0M | IV_FALSE | ALE0S
-
-SRFF_INSTANCE | nADoutLE0_OBUF.REG | nADoutLE0_OBUF | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nADoutLE0_OBUF.D | 9911 | ? | 0 | 0 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.XOR | 0 | 7 | ALU_F
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nADoutLE0_OBUF.Q | 9914 | ? | 0 | 0 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.REG | 0 | 8 | SRFF_Q
-
-MACROCELL_INSTANCE | OptxMapped | nDinOE_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 14 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9322 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r.EXP | 10046 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.EXP | fsb/BERR0r | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nDinOE_OBUF | 9438 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinOE_OBUF.Q | nDinOE_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | nDinOE_OBUF.EXP | 10047 | ? | 621 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinOE_OBUF.EXP | nDinOE_OBUF | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | nDinOE_OBUF.SI | nDinOE_OBUF | 0 | 14 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9322 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r.EXP | 10046 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.EXP | fsb/BERR0r | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nDinOE_OBUF.D1 | 9916 | ? | 0 | 4096 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nDinOE_OBUF.D2 | 9917 | ? | 0 | 4096 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | fsb/BERR0r.EXP
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | nDinOE_OBUF.EXP | 10034 | ? | 621 | 0 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1
-SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | fsb/ASrf
-SPPTERM | 8 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
-SPPTERM | 8 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
-SPPTERM | 8 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
-
-SRFF_INSTANCE | nDinOE_OBUF.REG | nDinOE_OBUF | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nDinOE_OBUF.D | 9915 | ? | 0 | 0 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.XOR | 0 | 7 | ALU_F
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nDinOE_OBUF.Q | 9918 | ? | 0 | 0 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.REG | 0 | 8 | SRFF_Q
-
-MACROCELL_INSTANCE | Inv+OptxMapped | nRAS_OBUF | MXSE_COPY_0_COPY_0 | 2155872512 | 8 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RefAck | 9389 | ? | 594 | 0 | MXSE_COPY_0_COPY_0 | NULL | RefAck.Q | RefAck | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS2 | 9350 | ? | 619 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS1 | 9408 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nRAS_OBUF | 9439 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.Q | nRAS_OBUF | 0 | 0 | MC_Q
-
-SIGNAL_INSTANCE | nRAS_OBUF.SI | nRAS_OBUF | 0 | 8 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RefAck | 9389 | ? | 594 | 0 | MXSE_COPY_0_COPY_0 | NULL | RefAck.Q | RefAck | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS2 | 9350 | ? | 619 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS1 | 9408 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nRAS_OBUF.D1 | 9920 | ? | 0 | 4096 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nRAS_OBUF.D2 | 9921 | ? | 0 | 4096 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | RefAck
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RAMDIS1
-SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RAMDIS1
-
-SRFF_INSTANCE | nRAS_OBUF.REG | nRAS_OBUF | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nRAS_OBUF.D | 9919 | ? | 0 | 0 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.XOR | 0 | 7 | ALU_F
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nRAS_OBUF.Q | 9922 | ? | 0 | 0 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.REG | 0 | 8 | SRFF_Q
-
-MACROCELL_INSTANCE | OptxMapped | A_FSB_19_IBUF$BUF0 | MXSE_COPY_0_COPY_0 | 2155872256 | 1 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | A_FSB_19_IBUF$BUF0 | 9440 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.Q | A_FSB_19_IBUF$BUF0 | 0 | 0 | MC_Q
-
-SIGNAL_INSTANCE | A_FSB_19_IBUF$BUF0.SI | A_FSB_19_IBUF$BUF0 | 0 | 1 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | A_FSB_19_IBUF$BUF0.D1 | 9924 | ? | 0 | 4096 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | A_FSB_19_IBUF$BUF0.D2 | 9925 | ? | 0 | 4096 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | A_FSB_19_IBUF
-
-SRFF_INSTANCE | A_FSB_19_IBUF$BUF0.REG | A_FSB_19_IBUF$BUF0 | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | A_FSB_19_IBUF$BUF0.D | 9923 | ? | 0 | 0 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.XOR | 0 | 7 | ALU_F
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | A_FSB_19_IBUF$BUF0.Q | 9926 | ? | 0 | 0 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.REG | 0 | 8 | SRFF_Q
-
-MACROCELL_INSTANCE | OptxMapped | A_FSB_21_IBUF$BUF0 | MXSE_COPY_0_COPY_0 | 2155872256 | 1 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | A_FSB_21_IBUF$BUF0 | 9441 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.Q | A_FSB_21_IBUF$BUF0 | 0 | 0 | MC_Q
-
-SIGNAL_INSTANCE | A_FSB_21_IBUF$BUF0.SI | A_FSB_21_IBUF$BUF0 | 0 | 1 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | A_FSB_21_IBUF$BUF0.D1 | 9928 | ? | 0 | 4096 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | A_FSB_21_IBUF$BUF0.D2 | 9929 | ? | 0 | 4096 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | A_FSB_21_IBUF
-
-SRFF_INSTANCE | A_FSB_21_IBUF$BUF0.REG | A_FSB_21_IBUF$BUF0 | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | A_FSB_21_IBUF$BUF0.D | 9927 | ? | 0 | 0 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.XOR | 0 | 7 | ALU_F
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | A_FSB_21_IBUF$BUF0.Q | 9930 | ? | 0 | 0 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.REG | 0 | 8 | SRFF_Q
-
-MACROCELL_INSTANCE | Inv+PrldHigh+OptxMapped | nADoutLE1_OBUF | MXSE_COPY_0_COPY_0 | 2155873024 | 7 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Clear1 | 9407 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Clear1.Q | iobs/Clear1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Load1 | 9383 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9375 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nADoutLE1_OBUF | 9442 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | nADoutLE1_OBUF.EXP | 10017 | ? | 626 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.EXP | nADoutLE1_OBUF | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | nADoutLE1_OBUF.SI | nADoutLE1_OBUF | 0 | 6 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Clear1 | 9407 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Clear1.Q | iobs/Clear1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Load1 | 9383 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9375 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nADoutLE1_OBUF.D1 | 9932 | ? | 647 | 4096 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nADoutLE1_OBUF.D2 | 9933 | ? | 647 | 4096 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | iobs/Load1
-SPPTERM | 2 | IV_FALSE | iobs/Clear1 | IV_FALSE | ALE1
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | nADoutLE1_OBUF.EXP | 10006 | ? | 626 | 0 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 1 | IV_TRUE | iobs/PS_FSM_FFd2
-SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/IOACTr
-
-SRFF_INSTANCE | nADoutLE1_OBUF.REG | nADoutLE1_OBUF | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nADoutLE1_OBUF.D | 9931 | ? | 647 | 0 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | FCLKIO_0 | 9319 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nADoutLE1_OBUF.Q | 9934 | ? | 647 | 0 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
-
-MACROCELL_INSTANCE | Inv+OptxMapped | nRAMLWE_OBUF | MXSE_COPY_0_COPY_0 | 2155872512 | 5 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nLDS_FSB_IBUF | 9344 | ? | 613 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS2 | 9350 | ? | 619 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS1 | 9408 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nRAMLWE_OBUF | 9444 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.Q | nRAMLWE_OBUF | 0 | 0 | MC_Q
-
-SIGNAL_INSTANCE | nRAMLWE_OBUF.SI | nRAMLWE_OBUF | 0 | 5 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nLDS_FSB_IBUF | 9344 | ? | 613 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS2 | 9350 | ? | 619 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS1 | 9408 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nRAMLWE_OBUF.D1 | 9936 | ? | 0 | 4096 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nRAMLWE_OBUF.D2 | 9937 | ? | 0 | 4096 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 5 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nLDS_FSB_IBUF | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RAMDIS1
-
-SRFF_INSTANCE | nRAMLWE_OBUF.REG | nRAMLWE_OBUF | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nRAMLWE_OBUF.D | 9935 | ? | 0 | 0 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.XOR | 0 | 7 | ALU_F
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nRAMLWE_OBUF.Q | 9938 | ? | 0 | 0 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.REG | 0 | 8 | SRFF_Q
-
-MACROCELL_INSTANCE | Inv+OptxMapped | nRAMUWE_OBUF | MXSE_COPY_0_COPY_0 | 2155872512 | 5 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nUDS_FSB_IBUF | 9348 | ? | 617 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS2 | 9350 | ? | 619 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS1 | 9408 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nRAMUWE_OBUF | 9445 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.Q | nRAMUWE_OBUF | 0 | 0 | MC_Q
-
-SIGNAL_INSTANCE | nRAMUWE_OBUF.SI | nRAMUWE_OBUF | 0 | 5 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nUDS_FSB_IBUF | 9348 | ? | 617 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS2 | 9350 | ? | 619 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS1 | 9408 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nRAMUWE_OBUF.D1 | 9940 | ? | 0 | 4096 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nRAMUWE_OBUF.D2 | 9941 | ? | 0 | 4096 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 5 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nUDS_FSB_IBUF | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RAMDIS1
-
-SRFF_INSTANCE | nRAMUWE_OBUF.REG | nRAMUWE_OBUF | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nRAMUWE_OBUF.D | 9939 | ? | 0 | 0 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.XOR | 0 | 7 | ALU_F
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nRAMUWE_OBUF.Q | 9942 | ? | 0 | 0 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.REG | 0 | 8 | SRFF_Q
-
-MACROCELL_INSTANCE | Inv+OptxMapped | nROMCS_OBUF | MXSE_COPY_0_COPY_0 | 2155872512 | 5 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nROMCS_OBUF | 9446 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.Q | nROMCS_OBUF | 0 | 0 | MC_Q
-
-SIGNAL_INSTANCE | nROMCS_OBUF.SI | nROMCS_OBUF | 0 | 5 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nROMCS_OBUF.D1 | 9944 | ? | 0 | 4096 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nROMCS_OBUF.D2 | 9945 | ? | 0 | 4096 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | cs/nOverlay1
-
-SRFF_INSTANCE | nROMCS_OBUF.REG | nROMCS_OBUF | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nROMCS_OBUF.D | 9943 | ? | 0 | 0 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.XOR | 0 | 7 | ALU_F
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nROMCS_OBUF.Q | 9946 | ? | 0 | 0 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.REG | 0 | 8 | SRFF_Q
-
-MACROCELL_INSTANCE | FbkInv+Merge+OptxMapped | nAoutOE_OBUF | MXSE_COPY_0_COPY_0 | 2155907072 | 0 | 1
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nAoutOE_OBUF$Q | 9447 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 0 | 0 | MC_Q
-
-SIGNAL_INSTANCE | nAoutOE_OBUF.SI | nAoutOE_OBUF | 0 | 0 | 2
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nAoutOE_OBUF.D1 | 9948 | ? | 0 | 4096 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nAoutOE_OBUF.D2 | 9949 | ? | 0 | 4096 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 0 | IV_ZERO
-
-SRFF_INSTANCE | nAoutOE_OBUF.REG | nAoutOE_OBUF | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nAoutOE_OBUF.D | 9947 | ? | 0 | 0 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.XOR | 0 | 7 | ALU_F
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nAoutOE_OBUF.Q | 9950 | ? | 0 | 0 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.REG | 0 | 8 | SRFF_Q
-
-OUTPUT_INSTANCE | 0 | nVMA_IOB | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nVMA_IOB_OBUF$Q | 9317 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOB_OBUF.Q | nVMA_IOB_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nVMA_IOB | 9448 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVMA_IOB | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | nDTACK_FSB | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nDTACK_FSB_OBUF | 9352 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nDTACK_FSB | 9449 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_FSB | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | nAS_IOB | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nAS_IOB_OBUF | 9417 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAS_IOB_OBUF.Q | nAS_IOB_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nAS_IOB | 9450 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_IOB | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | nCAS | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nCAS_OBUF | 9418 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nCAS_OBUF.Q | nCAS_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nCAS | 9451 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nCAS | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | nDinLE | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nDinLE_OBUF | 9419 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinLE_OBUF.Q | nDinLE_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nDinLE | 9452 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDinLE | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | nDoutOE | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nDoutOE_OBUF | 9420 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDoutOE_OBUF.Q | nDoutOE_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nDoutOE | 9453 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDoutOE | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | nLDS_IOB | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nLDS_IOB_OBUF | 9421 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nLDS_IOB_OBUF.Q | nLDS_IOB_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nLDS_IOB | 9454 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_IOB | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | nUDS_IOB | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nUDS_IOB_OBUF | 9422 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nUDS_IOB_OBUF.Q | nUDS_IOB_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nUDS_IOB | 9455 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_IOB | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | RA<0> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_0_OBUF | 9423 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_0_OBUF.Q | RA_0_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<0> | 9456 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<0> | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | RA<1> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_1_OBUF | 9424 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.Q | RA_1_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<1> | 9457 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<1> | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | RA<2> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_2_OBUF | 9425 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.Q | RA_2_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<2> | 9458 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<2> | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | RA<3> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_3_OBUF | 9426 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.Q | RA_3_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<3> | 9459 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<3> | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | RA<4> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_4_OBUF | 9427 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.Q | RA_4_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<4> | 9460 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<4> | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | RA<5> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_5_OBUF | 9428 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.Q | RA_5_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<5> | 9461 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<5> | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | RA<6> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_6_OBUF | 9429 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.Q | RA_6_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<6> | 9462 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<6> | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | RA<7> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_7_OBUF | 9430 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_7_OBUF.Q | RA_7_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<7> | 9463 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<7> | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | RA<8> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_8_OBUF | 9431 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_8_OBUF.Q | RA_8_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<8> | 9464 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<8> | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | RA<9> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_9_OBUF | 9432 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.Q | RA_9_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<9> | 9465 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<9> | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | nBERR_FSB | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nBERR_FSB_OBUF | 9433 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.Q | nBERR_FSB_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nBERR_FSB | 9466 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_FSB | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | nOE | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nOE_OBUF | 9434 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nOE_OBUF.Q | nOE_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nOE | 9467 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nOE | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | nROMWE | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nROMWE_OBUF | 9435 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.Q | nROMWE_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nROMWE | 9468 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nROMWE | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | nVPA_FSB | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nVPA_FSB_OBUF | 9436 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVPA_FSB_OBUF.Q | nVPA_FSB_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nVPA_FSB | 9469 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVPA_FSB | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | nADoutLE0 | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nADoutLE0_OBUF | 9437 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.Q | nADoutLE0_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nADoutLE0 | 9470 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nADoutLE0 | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | nDinOE | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nDinOE_OBUF | 9438 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinOE_OBUF.Q | nDinOE_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nDinOE | 9471 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDinOE | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | nRAS | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nRAS_OBUF | 9439 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.Q | nRAS_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nRAS | 9472 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRAS | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | RA<11> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | A_FSB_19_IBUF$BUF0 | 9440 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.Q | A_FSB_19_IBUF$BUF0 | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<11> | 9473 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<11> | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | RA<10> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | A_FSB_21_IBUF$BUF0 | 9441 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.Q | A_FSB_21_IBUF$BUF0 | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<10> | 9474 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<10> | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | nADoutLE1 | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nADoutLE1_OBUF | 9442 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nADoutLE1 | 9475 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nADoutLE1 | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | nRAMLWE | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nRAMLWE_OBUF | 9444 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.Q | nRAMLWE_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nRAMLWE | 9476 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRAMLWE | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | nRAMUWE | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nRAMUWE_OBUF | 9445 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.Q | nRAMUWE_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nRAMUWE | 9477 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRAMUWE | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | nROMCS | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nROMCS_OBUF | 9446 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.Q | nROMCS_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nROMCS | 9478 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nROMCS | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | nAoutOE | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nAoutOE_OBUF$Q | 9447 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nAoutOE | 9479 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAoutOE | 0 | 6 | OI_OUT
-
-MACROCELL_INSTANCE | SoftPfbk | fsb/VPA__or00001/fsb/VPA__or00001_D2 | MXSE_COPY_0_COPY_0 | 2181038080 | 21 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9300 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9301 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9304 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9305 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9306 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9335 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9342 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9299 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP17_.EXP | 9994 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP17_.EXP | EXP17_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | fsb/VPA__or00001/fsb/VPA__or00001_D2.UIM | 9480 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA__or00001/fsb/VPA__or00001_D2.Q | fsb/VPA__or00001/fsb/VPA__or00001_D2 | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | fsb/VPA__or00001/fsb/VPA__or00001_D2.SI | fsb/VPA__or00001/fsb/VPA__or00001_D2 | 0 | 21 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9300 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9301 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9304 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9305 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9306 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9335 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9342 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9299 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP17_.EXP | 9994 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP17_.EXP | EXP17_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | fsb/VPA__or00001/fsb/VPA__or00001_D2.D1 | 9952 | ? | 612 | 4096 | fsb/VPA__or00001/fsb/VPA__or00001_D2 | NULL | NULL | fsb/VPA__or00001/fsb/VPA__or00001_D2.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | fsb/VPA__or00001/fsb/VPA__or00001_D2.D2 | 9953 | ? | 612 | 4096 | fsb/VPA__or00001/fsb/VPA__or00001_D2 | NULL | NULL | fsb/VPA__or00001/fsb/VPA__or00001_D2.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | EXP17_.EXP
-SPPTERM | 19 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r
-SPPTERM | 19 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r
-SPPTERM | 19 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r
-SPPTERM | 19 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r
-SPPTERM | 19 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r
-
-SRFF_INSTANCE | fsb/VPA__or00001/fsb/VPA__or00001_D2.REG | fsb/VPA__or00001/fsb/VPA__or00001_D2 | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | fsb/VPA__or00001/fsb/VPA__or00001_D2.D | 9951 | ? | 612 | 0 | fsb/VPA__or00001/fsb/VPA__or00001_D2 | NULL | NULL | fsb/VPA__or00001/fsb/VPA__or00001_D2.XOR | 0 | 7 | ALU_F
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | fsb/VPA__or00001/fsb/VPA__or00001_D2.Q | 9954 | ? | 612 | 0 | fsb/VPA__or00001/fsb/VPA__or00001_D2 | NULL | NULL | fsb/VPA__or00001/fsb/VPA__or00001_D2.REG | 0 | 8 | SRFF_Q
-
-MACROCELL_INSTANCE | SoftPfbk | $OpTx$FX_DC$602 | MXSE_COPY_0_COPY_0 | 2181038080 | 25 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutB | 9336 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9299 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9300 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9301 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9304 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9305 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9306 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9325 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9338 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9339 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9347 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA__or00001/fsb/VPA__or00001_D2.UIM | 9480 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA__or00001/fsb/VPA__or00001_D2.Q | fsb/VPA__or00001/fsb/VPA__or00001_D2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$602.UIM | 9481 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$602.Q | $OpTx$FX_DC$602 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$606.UIM | 9482 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$606.Q | $OpTx$FX_DC$606 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | $OpTx$FX_DC$602.UIM | 9481 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$602.Q | $OpTx$FX_DC$602 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | $OpTx$FX_DC$602.EXP | 9999 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$602.EXP | $OpTx$FX_DC$602 | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | $OpTx$FX_DC$602.SI | $OpTx$FX_DC$602 | 0 | 25 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutB | 9336 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9299 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9300 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9301 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9304 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9305 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9306 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9325 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9338 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9339 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9347 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA__or00001/fsb/VPA__or00001_D2.UIM | 9480 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA__or00001/fsb/VPA__or00001_D2.Q | fsb/VPA__or00001/fsb/VPA__or00001_D2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$602.UIM | 9481 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$602.Q | $OpTx$FX_DC$602 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$606.UIM | 9482 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$606.Q | $OpTx$FX_DC$606 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | $OpTx$FX_DC$602.D1 | 9956 | ? | 620 | 4096 | $OpTx$FX_DC$602 | NULL | NULL | $OpTx$FX_DC$602.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | $OpTx$FX_DC$602.D2 | 9957 | ? | 620 | 4096 | $OpTx$FX_DC$602 | NULL | NULL | $OpTx$FX_DC$602.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_FALSE | TimeoutB
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | $OpTx$FX_DC$602.EXP | 9987 | ? | 612 | 0 | $OpTx$FX_DC$602 | NULL | NULL | $OpTx$FX_DC$602.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 23 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | BERR_IOBS | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r | IV_TRUE | iobs/IOReady | IV_TRUE | fsb/ASrf | IV_FALSE | fsb/VPA__or00001/fsb/VPA__or00001_D2.UIM | IV_TRUE | $OpTx$FX_DC$602.UIM
-SPPTERM | 23 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | BERR_IOBS | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r | IV_TRUE | fsb/ASrf | IV_FALSE | fsb/VPA__or00001/fsb/VPA__or00001_D2.UIM | IV_TRUE | $OpTx$FX_DC$602.UIM | IV_FALSE | $OpTx$FX_DC$606.UIM
-
-SRFF_INSTANCE | $OpTx$FX_DC$602.REG | $OpTx$FX_DC$602 | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | $OpTx$FX_DC$602.D | 9955 | ? | 620 | 0 | $OpTx$FX_DC$602 | NULL | NULL | $OpTx$FX_DC$602.XOR | 0 | 7 | ALU_F
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | $OpTx$FX_DC$602.Q | 9958 | ? | 620 | 0 | $OpTx$FX_DC$602 | NULL | NULL | $OpTx$FX_DC$602.REG | 0 | 8 | SRFF_Q
-
-MACROCELL_INSTANCE | SoftPfbk | $OpTx$FX_DC$606 | MXSE_COPY_0_COPY_0 | 2181038080 | 28 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9299 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9301 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9304 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9305 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9306 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9335 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9342 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_FSB_OBUF.UIM | 9353 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9300 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9325 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9338 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9339 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9341 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$602.UIM | 9481 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$602.Q | $OpTx$FX_DC$602 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9347 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP16_.EXP | 9992 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP16_.EXP | EXP16_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | $OpTx$FX_DC$606.UIM | 9482 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$606.Q | $OpTx$FX_DC$606 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | $OpTx$FX_DC$606.EXP | 9991 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$606.EXP | $OpTx$FX_DC$606 | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | $OpTx$FX_DC$606.SI | $OpTx$FX_DC$606 | 0 | 28 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9299 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9301 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9304 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9305 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9306 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9335 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9342 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_FSB_OBUF.UIM | 9353 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9300 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9325 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9338 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9339 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9341 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$602.UIM | 9481 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$602.Q | $OpTx$FX_DC$602 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9347 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP16_.EXP | 9992 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP16_.EXP | EXP16_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | $OpTx$FX_DC$606.D1 | 9960 | ? | 612 | 4096 | $OpTx$FX_DC$606 | NULL | NULL | $OpTx$FX_DC$606.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | $OpTx$FX_DC$606.D2 | 9961 | ? | 612 | 4096 | $OpTx$FX_DC$606 | NULL | NULL | $OpTx$FX_DC$606.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | EXP16_.EXP
-SPPTERM | 3 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF
-SPPTERM | 9 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | $OpTx$FX_DC$606.EXP | 9979 | ? | 620 | 0 | $OpTx$FX_DC$606 | NULL | NULL | $OpTx$FX_DC$606.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 20 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM
-SPPTERM | 21 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | BERR_IOBS | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r | IV_TRUE | fsb/Ready1r | IV_TRUE | $OpTx$FX_DC$602.UIM
-SPPTERM | 21 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | BERR_IOBS | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r | IV_TRUE | iobs/IOReady | IV_TRUE | $OpTx$FX_DC$602.UIM
-
-SRFF_INSTANCE | $OpTx$FX_DC$606.REG | $OpTx$FX_DC$606 | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | $OpTx$FX_DC$606.D | 9959 | ? | 612 | 0 | $OpTx$FX_DC$606 | NULL | NULL | $OpTx$FX_DC$606.XOR | 0 | 7 | ALU_F
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | $OpTx$FX_DC$606.Q | 9962 | ? | 612 | 0 | $OpTx$FX_DC$606 | NULL | NULL | $OpTx$FX_DC$606.REG | 0 | 8 | SRFF_Q
-
-MACROCELL_INSTANCE | NULL | EXP14_ | MXSE_COPY_0_COPY_0 | 2147483648 | 17 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9341 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9347 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_FSB_OBUF.UIM | 9353 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready0r | 9340 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMReady | 9409 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP21_.EXP | 10000 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP21_.EXP | EXP21_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP14_.EXP | 9989 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP14_.EXP | EXP14_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP14_.SI | EXP14_ | 0 | 17 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9341 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9347 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_FSB_OBUF.UIM | 9353 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready0r | 9340 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMReady | 9409 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP21_.EXP | 10000 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP21_.EXP | EXP21_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP14_.EXP | 9977 | ? | 620 | 0 | EXP14_ | NULL | NULL | EXP14_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 1 | IV_TRUE | EXP21_.EXP
-SPPTERM | 4 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | nDTACK_FSB_OBUF.UIM | IV_FALSE | ram/RAMReady
-SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM
-SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | nDTACK_FSB_OBUF.UIM | IV_FALSE | ram/RAMReady
-SPPTERM | 12 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM
-
-MACROCELL_INSTANCE | NULL | EXP15_ | MXSE_COPY_0_COPY_0 | 2147483648 | 25 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9341 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9347 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_FSB_OBUF.UIM | 9353 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9299 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9301 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9304 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9305 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9306 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9335 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9342 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9300 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$606.EXP | 9991 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$606.EXP | $OpTx$FX_DC$606 | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP15_.EXP | 9990 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP15_.EXP | EXP15_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP15_.SI | EXP15_ | 0 | 25 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9341 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9347 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_FSB_OBUF.UIM | 9353 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9299 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9301 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9304 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9305 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9306 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9335 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9342 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9300 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$606.EXP | 9991 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$606.EXP | $OpTx$FX_DC$606 | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP15_.EXP | 9978 | ? | 620 | 0 | EXP15_ | NULL | NULL | EXP15_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 1 | IV_TRUE | $OpTx$FX_DC$606.EXP
-SPPTERM | 12 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM
-SPPTERM | 14 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM | IV_FALSE | ALE1
-SPPTERM | 14 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM | IV_FALSE | ALE1
-SPPTERM | 20 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM
-SPPTERM | 20 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM
-
-MACROCELL_INSTANCE | NULL | EXP16_ | MXSE_COPY_0_COPY_0 | 2147483648 | 12 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP16_.EXP | 9992 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP16_.EXP | EXP16_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP16_.SI | EXP16_ | 0 | 12 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP16_.EXP | 9980 | ? | 612 | 0 | EXP16_ | NULL | NULL | EXP16_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 9 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF
-SPPTERM | 11 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | ALE1
-SPPTERM | 11 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | ALE1
-
-MACROCELL_INSTANCE | NULL | EXP17_ | MXSE_COPY_0_COPY_0 | 2147483648 | 20 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9299 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9301 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9304 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9305 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9306 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9335 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9342 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9300 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP17_.EXP | 9994 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP17_.EXP | EXP17_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP17_.SI | EXP17_ | 0 | 20 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9299 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9301 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9304 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9305 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9306 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9335 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9342 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9300 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP17_.EXP | 9982 | ? | 612 | 0 | EXP17_ | NULL | NULL | EXP17_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 19 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r
-SPPTERM | 19 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r
-SPPTERM | 19 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r
-
-MACROCELL_INSTANCE | NULL | EXP18_ | MXSE_COPY_0_COPY_0 | 2147483648 | 30 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready0r | 9340 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9343 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMReady | 9409 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9299 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9300 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9301 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9304 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9305 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9306 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9325 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9338 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9339 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9341 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA__or00001/fsb/VPA__or00001_D2.UIM | 9480 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA__or00001/fsb/VPA__or00001_D2.Q | fsb/VPA__or00001/fsb/VPA__or00001_D2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$602.UIM | 9481 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$602.Q | $OpTx$FX_DC$602 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9347 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$606.UIM | 9482 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$606.Q | $OpTx$FX_DC$606 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP18_.EXP | 9996 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP18_.EXP | EXP18_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP18_.SI | EXP18_ | 0 | 30 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready0r | 9340 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9343 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMReady | 9409 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9299 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9300 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9301 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9304 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9305 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9306 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9325 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9338 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9339 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9341 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA__or00001/fsb/VPA__or00001_D2.UIM | 9480 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA__or00001/fsb/VPA__or00001_D2.Q | fsb/VPA__or00001/fsb/VPA__or00001_D2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$602.UIM | 9481 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$602.Q | $OpTx$FX_DC$602 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9347 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$606.UIM | 9482 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$606.Q | $OpTx$FX_DC$606 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP18_.EXP | 9984 | ? | 612 | 0 | EXP18_ | NULL | NULL | EXP18_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | fsb/VPA | IV_TRUE | fsb/ASrf | IV_FALSE | ram/RAMReady
-SPPTERM | 23 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | BERR_IOBS | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r | IV_TRUE | fsb/Ready1r | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | fsb/VPA__or00001/fsb/VPA__or00001_D2.UIM | IV_TRUE | $OpTx$FX_DC$602.UIM
-SPPTERM | 23 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | BERR_IOBS | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r | IV_TRUE | fsb/Ready1r | IV_TRUE | fsb/ASrf | IV_FALSE | fsb/VPA__or00001/fsb/VPA__or00001_D2.UIM | IV_TRUE | $OpTx$FX_DC$602.UIM
-SPPTERM | 23 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | BERR_IOBS | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r | IV_TRUE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | fsb/VPA__or00001/fsb/VPA__or00001_D2.UIM | IV_TRUE | $OpTx$FX_DC$602.UIM
-SPPTERM | 23 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | BERR_IOBS | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | fsb/VPA__or00001/fsb/VPA__or00001_D2.UIM | IV_TRUE | $OpTx$FX_DC$602.UIM | IV_FALSE | $OpTx$FX_DC$606.UIM
-
-MACROCELL_INSTANCE | NULL | EXP19_ | MXSE_COPY_0_COPY_0 | 2147483648 | 8 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9325 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9343 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9338 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9339 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA__or00001/fsb/VPA__or00001_D2.UIM | 9480 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA__or00001/fsb/VPA__or00001_D2.Q | fsb/VPA__or00001/fsb/VPA__or00001_D2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$602.UIM | 9481 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$602.Q | $OpTx$FX_DC$602 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP18_.EXP | 9996 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP18_.EXP | EXP18_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP19_.EXP | 9997 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP19_.EXP | EXP19_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP19_.SI | EXP19_ | 0 | 8 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9325 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9343 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9338 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9339 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA__or00001/fsb/VPA__or00001_D2.UIM | 9480 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA__or00001/fsb/VPA__or00001_D2.Q | fsb/VPA__or00001/fsb/VPA__or00001_D2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$602.UIM | 9481 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$602.Q | $OpTx$FX_DC$602 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP18_.EXP | 9996 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP18_.EXP | EXP18_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP19_.EXP | 9985 | ? | 612 | 0 | EXP19_ | NULL | NULL | EXP19_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 1 | IV_TRUE | EXP18_.EXP
-SPPTERM | 3 | IV_TRUE | BERR_IOBS | IV_TRUE | fsb/VPA | IV_TRUE | fsb/ASrf
-SPPTERM | 3 | IV_TRUE | fsb/BERR0r | IV_TRUE | fsb/VPA | IV_TRUE | fsb/ASrf
-SPPTERM | 3 | IV_TRUE | fsb/BERR1r | IV_TRUE | fsb/VPA | IV_TRUE | fsb/ASrf
-SPPTERM | 3 | IV_TRUE | fsb/VPA | IV_TRUE | fsb/ASrf | IV_TRUE | fsb/VPA__or00001/fsb/VPA__or00001_D2.UIM
-SPPTERM | 3 | IV_TRUE | fsb/VPA | IV_TRUE | fsb/ASrf | IV_FALSE | $OpTx$FX_DC$602.UIM
-
-MACROCELL_INSTANCE | NULL | EXP20_ | MXSE_COPY_0_COPY_0 | 2147483648 | 13 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9341 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9343 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9347 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$606.UIM | 9482 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$606.Q | $OpTx$FX_DC$606 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready0r | 9340 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMReady | 9409 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$602.EXP | 9999 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$602.EXP | $OpTx$FX_DC$602 | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP20_.EXP | 9998 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP20_.EXP | EXP20_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP20_.SI | EXP20_ | 0 | 13 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9341 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9343 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9347 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$606.UIM | 9482 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$606.Q | $OpTx$FX_DC$606 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready0r | 9340 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMReady | 9409 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$602.EXP | 9999 | ? | 612 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$602.EXP | $OpTx$FX_DC$602 | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP20_.EXP | 9986 | ? | 612 | 0 | EXP20_ | NULL | NULL | EXP20_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 1 | IV_TRUE | $OpTx$FX_DC$602.EXP
-SPPTERM | 5 | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | $OpTx$FX_DC$606.UIM
-SPPTERM | 5 | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/ASrf | IV_TRUE | $OpTx$FX_DC$606.UIM
-SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | fsb/VPA | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RAMReady
-SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | fsb/VPA | IV_TRUE | fsb/ASrf | IV_FALSE | ram/RAMReady
-SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | fsb/VPA | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RAMReady
-
-MACROCELL_INSTANCE | NULL | EXP21_ | MXSE_COPY_0_COPY_0 | 2147483648 | 21 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9299 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9301 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9304 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9305 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9306 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9335 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9342 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_FSB_OBUF.UIM | 9353 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9300 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP21_.EXP | 10000 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP21_.EXP | EXP21_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP21_.SI | EXP21_ | 0 | 21 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9299 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9301 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9304 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9305 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9306 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9335 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9342 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_FSB_OBUF.UIM | 9353 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9300 | ? | 620 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP21_.EXP | 9988 | ? | 620 | 0 | EXP21_ | NULL | NULL | EXP21_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 20 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM
-SPPTERM | 20 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM
-SPPTERM | 20 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM
-SPPTERM | 20 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM
-SPPTERM | 20 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM
-
-MACROCELL_INSTANCE | NULL | EXP22_ | MXSE_COPY_0_COPY_0 | 2147483648 | 18 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9328 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP22_.EXP | 10012 | ? | 597 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP22_.EXP | EXP22_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP22_.SI | EXP22_ | 0 | 18 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9328 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP22_.EXP | 10001 | ? | 597 | 0 | EXP22_ | NULL | NULL | EXP22_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 16 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/Once | IV_TRUE | IORW0 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 16 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/Once | IV_TRUE | IORW0 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1
-SPPTERM | 16 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/Once | IV_TRUE | IORW0 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 16 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/Once | IV_TRUE | IORW0 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1
-
-MACROCELL_INSTANCE | NULL | EXP23_ | MXSE_COPY_0_COPY_0 | 2147483648 | 13 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9328 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP22_.EXP | 10012 | ? | 597 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP22_.EXP | EXP22_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP23_.EXP | 10013 | ? | 597 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP23_.EXP | EXP23_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP23_.SI | EXP23_ | 0 | 13 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9328 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9310 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP22_.EXP | 10012 | ? | 597 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP22_.EXP | EXP22_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP23_.EXP | 10002 | ? | 597 | 0 | EXP23_ | NULL | NULL | EXP23_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 1 | IV_TRUE | EXP22_.EXP
-SPPTERM | 8 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_FALSE | IORW0 | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1
-SPPTERM | 10 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_TRUE | IORW0 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 10 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_TRUE | IORW0 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1
-SPPTERM | 10 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_FALSE | IORW0 | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 10 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_FALSE | IORW0 | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1
-
-MACROCELL_INSTANCE | NULL | EXP24_ | MXSE_COPY_0_COPY_0 | 2147483648 | 12 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP24_.EXP | 10016 | ? | 625 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP24_.EXP | EXP24_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP24_.SI | EXP24_ | 0 | 12 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP24_.EXP | 10005 | ? | 625 | 0 | EXP24_ | NULL | NULL | EXP24_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 7 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-
-MACROCELL_INSTANCE | NULL | EXP25_ | MXSE_COPY_0_COPY_0 | 2147483648 | 11 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW1 | 9346 | ? | 615 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nVMA_IOB_OBUF.EXP | 10020 | ? | 615 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOB_OBUF.EXP | nVMA_IOB_OBUF | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP25_.EXP | 10021 | ? | 615 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP25_.EXP | EXP25_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP25_.SI | EXP25_ | 0 | 11 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW1 | 9346 | ? | 615 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nVMA_IOB_OBUF.EXP | 10020 | ? | 615 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOB_OBUF.EXP | nVMA_IOB_OBUF | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP25_.EXP | 10010 | ? | 615 | 0 | EXP25_ | NULL | NULL | EXP25_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 1 | IV_TRUE | nVMA_IOB_OBUF.EXP
-SPPTERM | 2 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/IORW1
-SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-SPPTERM | 2 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1
-
-MACROCELL_INSTANCE | NULL | EXP26_ | MXSE_COPY_0_COPY_0 | 2147483648 | 6 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP26_.EXP | 10038 | ? | 635 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP26_.EXP | EXP26_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP26_.SI | EXP26_ | 0 | 6 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP26_.EXP | 10025 | ? | 635 | 0 | EXP26_ | NULL | NULL | EXP26_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | nWE_FSB_IBUF
-
-MACROCELL_INSTANCE | NULL | EXP27_ | MXSE_COPY_0_COPY_0 | 2147483648 | 9 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP27_.EXP | 10039 | ? | 635 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP27_.EXP | EXP27_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP27_.SI | EXP27_ | 0 | 9 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9302 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9303 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP27_.EXP | 10026 | ? | 635 | 0 | EXP27_ | NULL | NULL | EXP27_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF
-SPPTERM | 4 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1
-
-MACROCELL_INSTANCE | NULL | EXP28_ | MXSE_COPY_0_COPY_0 | 2147483648 | 9 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_2_OBUF.EXP | 10040 | ? | 595 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.EXP | RA_2_OBUF | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP28_.EXP | 10041 | ? | 595 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP28_.EXP | EXP28_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP28_.SI | EXP28_ | 0 | 9 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9363 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9358 | ? | 643 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9443 | ? | 647 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_2_OBUF.EXP | 10040 | ? | 595 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.EXP | RA_2_OBUF | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP28_.EXP | 10028 | ? | 595 | 0 | EXP28_ | NULL | NULL | EXP28_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 1 | IV_TRUE | RA_2_OBUF.EXP
-SPPTERM | 3 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd1
-SPPTERM | 3 | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | ALE1
-SPPTERM | 3 | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd1 | IV_FALSE | ALE1
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | iobs/Once
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | iobs/Once
-
-MACROCELL_INSTANCE | NULL | EXP29_ | MXSE_COPY_0_COPY_0 | 2147483648 | 8 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP29_.EXP | 10042 | ? | 595 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP29_.EXP | EXP29_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP29_.SI | EXP29_ | 0 | 8 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9311 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9324 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9312 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9313 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9314 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9329 | ? | 640 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP29_.EXP | 10029 | ? | 595 | 0 | EXP29_ | NULL | NULL | EXP29_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF | IV_FALSE | iobs/Once
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF | IV_FALSE | iobs/Once
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF | IV_FALSE | iobs/Once
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF | IV_FALSE | iobs/Once
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once | IV_TRUE | nWE_FSB_IBUF
-
-MACROCELL_INSTANCE | NULL | EXP30_ | MXSE_COPY_0_COPY_0 | 2147483648 | 9 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9384 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_4_OBUF.EXP | 10043 | ? | 644 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.EXP | RA_4_OBUF | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP30_.EXP | 10044 | ? | 644 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP30_.EXP | EXP30_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP30_.SI | EXP30_ | 0 | 9 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9384 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_4_OBUF.EXP | 10043 | ? | 644 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.EXP | RA_4_OBUF | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP30_.EXP | 10031 | ? | 644 | 0 | EXP30_ | NULL | NULL | EXP30_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 1 | IV_TRUE | RA_4_OBUF.EXP
-SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
-SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
-SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
-SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
-SPPTERM | 6 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
-
-MACROCELL_INSTANCE | NULL | EXP31_ | MXSE_COPY_0_COPY_0 | 2147483648 | 14 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9384 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9322 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP31_.EXP | 10045 | ? | 644 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP31_.EXP | EXP31_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP31_.SI | EXP31_ | 0 | 14 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9373 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9374 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9386 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9384 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9322 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP31_.EXP | 10032 | ? | 644 | 0 | EXP31_ | NULL | NULL | EXP31_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 6 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
-SPPTERM | 6 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
-SPPTERM | 6 | IV_TRUE | ram/Once | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
-SPPTERM | 6 | IV_FALSE | cnt/RefDone | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
-SPPTERM | 7 | IV_FALSE | cnt/RefDone | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_FALSE | fsb/ASrf
-
-MACROCELL_INSTANCE | NULL | EXP32_ | MXSE_COPY_0_COPY_0 | 2147483648 | 12 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9322 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9384 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDinOE_OBUF.EXP | 10047 | ? | 621 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinOE_OBUF.EXP | nDinOE_OBUF | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP32_.EXP | 10048 | ? | 621 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP32_.EXP | EXP32_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP32_.SI | EXP32_ | 0 | 12 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9308 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9321 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9322 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9309 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9384 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDinOE_OBUF.EXP | 10047 | ? | 621 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinOE_OBUF.EXP | nDinOE_OBUF | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP32_.EXP | 10035 | ? | 621 | 0 | EXP32_ | NULL | NULL | EXP32_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 1 | IV_TRUE | nDinOE_OBUF.EXP
-SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1
-SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | fsb/ASrf
-SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
-SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
-SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
-
-MACROCELL_INSTANCE | NULL | EXP33_ | MXSE_COPY_0_COPY_0 | 2147483648 | 10 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_IOB_IBUF | 9326 | ? | 672 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOBERR | 9327 | ? | 650 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9361 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9369 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrf | 9402 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrr | 9403 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrf | 9405 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrr | 9406 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9399 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9400 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP33_.EXP | 10053 | ? | 650 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP33_.EXP | EXP33_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP33_.SI | EXP33_ | 0 | 10 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_IOB_IBUF | 9326 | ? | 672 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOBERR | 9327 | ? | 650 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9361 | ? | 682 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9369 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrf | 9402 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrr | 9403 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrf | 9405 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrr | 9406 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9399 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9400 | ? | 667 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP33_.EXP | 10050 | ? | 650 | 0 | EXP33_ | NULL | NULL | EXP33_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 6 | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | IOBERR | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr
-SPPTERM | 6 | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | IOBERR | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr
-SPPTERM | 6 | IV_FALSE | nBERR_IOB_IBUF | IV_FALSE | IOBERR | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr
-SPPTERM | 6 | IV_FALSE | nBERR_IOB_IBUF | IV_FALSE | IOBERR | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr
-SPPTERM | 6 | IV_FALSE | nBERR_IOB_IBUF | IV_FALSE | IOBERR | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr
-
-MACROCELL_INSTANCE | NULL | EXP34_ | MXSE_COPY_0_COPY_0 | 2147483648 | 9 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9384 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5>.EXP | 10066 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.EXP | cnt/RefCnt<5> | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP34_.EXP | 10076 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP34_.EXP | EXP34_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP34_.SI | EXP34_ | 0 | 9 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9355 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9357 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9356 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9307 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9323 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9351 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9384 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9398 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5>.EXP | 10066 | ? | 645 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.EXP | cnt/RefCnt<5> | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP34_.EXP | 10065 | ? | 645 | 0 | EXP34_ | NULL | NULL | EXP34_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 1 | IV_TRUE | cnt/RefCnt<5>.EXP
-SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 2 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd1
-SPPTERM | 2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3
-SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
-SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
-
-FB_INSTANCE | FOOBAR1_ | MXSE_COPY_0_COPY_0 | 0 | 0 | 0
-FBPIN | 1 | EXP14_ | 1 | NULL | 0 | NULL | 0
-FBPIN | 2 | nDTACK_FSB_OBUF | 1 | NULL | 0 | nDTACK_FSB | 1 | 11 | 49152
-FBPIN | 3 | EXP15_ | 1 | A_FSB_9_IBUF | 1 | NULL | 0 | 12 | 49152
-FBPIN | 4 | $OpTx$FX_DC$606 | 1 | NULL | 0 | NULL | 0
-FBPIN | 5 | EXP16_ | 1 | nAS_FSB_IBUF | 1 | NULL | 0 | 13 | 49152
-FBPIN | 6 | nBERR_FSB_OBUF | 1 | NULL | 0 | nBERR_FSB | 1 | 14 | 49152
-FBPIN | 7 | fsb/Ready1r | 1 | NULL | 0 | NULL | 0
-FBPIN | 8 | NULL | 0 | A_FSB_5_IBUF | 1 | NULL | 0 | 15 | 49152
-FBPIN | 9 | EXP17_ | 1 | A_FSB_2_IBUF | 1 | NULL | 0 | 16 | 49152
-FBPIN | 10 | fsb/VPA__or00001/fsb/VPA__or00001_D2 | 1 | NULL | 0 | NULL | 0
-FBPIN | 11 | nOE_OBUF | 1 | NULL | 0 | nOE | 1 | 17 | 49152
-FBPIN | 12 | fsb/Ready2r | 1 | nBERR_IOB_IBUF | 1 | NULL | 0 | 18 | 49152
-FBPIN | 13 | EXP18_ | 1 | NULL | 0 | NULL | 0
-FBPIN | 14 | EXP19_ | 1 | A_FSB_6_IBUF | 1 | NULL | 0 | 19 | 49152
-FBPIN | 15 | fsb/VPA | 1 | A_FSB_7_IBUF | 1 | NULL | 0 | 20 | 49152
-FBPIN | 16 | EXP20_ | 1 | NULL | 0 | NULL | 0
-FBPIN | 17 | $OpTx$FX_DC$602 | 1 | CLK2X_IOB_IBUF | 1 | NULL | 0 | 22 | 57344
-FBPIN | 18 | EXP21_ | 1 | NULL | 0 | NULL | 0
-
-FB_INSTANCE | FOOBAR2_ | MXSE_COPY_0_COPY_0 | 0 | 0 | 0
-FBPIN | 1 | iobm/VPArr | 1 | NULL | 0 | NULL | 0
-FBPIN | 2 | iobm/VPArf | 1 | nRES_IBUF | 1 | NULL | 0 | 99 | 51200
-FBPIN | 3 | iobm/RESrr | 1 | NULL | 0 | NULL | 0
-FBPIN | 4 | iobm/RESrf | 1 | NULL | 0 | NULL | 0
-FBPIN | 5 | iobm/IOREQr | 1 | NULL | 0 | NULL | 0 | 1 | 53248
-FBPIN | 6 | cnt/RefCnt<3> | 1 | NULL | 0 | NULL | 0 | 2 | 53248
-FBPIN | 7 | cnt/RefCnt<2> | 1 | NULL | 0 | NULL | 0
-FBPIN | 8 | cnt/RefCnt<1> | 1 | NULL | 0 | NULL | 0 | 3 | 53248
-FBPIN | 9 | fsb/BERR1r | 1 | NULL | 0 | NULL | 0 | 4 | 53248
-FBPIN | 10 | cnt/RefDone | 1 | NULL | 0 | NULL | 0
-FBPIN | 11 | nLDS_IOB_OBUF | 1 | NULL | 0 | nLDS_IOB | 1 | 6 | 49152
-FBPIN | 12 | nUDS_IOB_OBUF | 1 | NULL | 0 | nUDS_IOB | 1 | 7 | 49152
-FBPIN | 13 | cnt/TimeoutBPre | 1 | NULL | 0 | NULL | 0
-FBPIN | 14 | nDoutOE_OBUF | 1 | NULL | 0 | nDoutOE | 1 | 8 | 49152
-FBPIN | 15 | TimeoutB | 1 | A_FSB_22_IBUF | 1 | NULL | 0 | 9 | 49152
-FBPIN | 16 | TimeoutA | 1 | NULL | 0 | NULL | 0
-FBPIN | 17 | nAS_IOB_OBUF | 1 | NULL | 0 | nAS_IOB | 1 | 10 | 49152
-FBPIN | 18 | iobs/IOReady | 1 | NULL | 0 | NULL | 0
-
-FB_INSTANCE | FOOBAR3_ | MXSE_COPY_0_COPY_0 | 0 | 0 | 0
-FBPIN | 1 | EXP22_ | 1 | NULL | 0 | NULL | 0
-FBPIN | 2 | EXP23_ | 1 | CLK_FSB_IBUF | 1 | NULL | 0 | 23 | 57344
-FBPIN | 3 | IORW0 | 1 | NULL | 0 | NULL | 0
-FBPIN | 4 | iobs/IOACTr | 1 | NULL | 0 | NULL | 0
-FBPIN | 5 | nRAS_OBUF | 1 | NULL | 0 | nRAS | 1 | 24 | 49152
-FBPIN | 6 | iobs/Clear1 | 1 | nLDS_FSB_IBUF | 1 | NULL | 0 | 25 | 49152
-FBPIN | 7 | fsb/ASrf | 1 | NULL | 0 | NULL | 0
-FBPIN | 8 | ALE0S | 1 | CLK_IOB_IBUF | 1 | NULL | 0 | 27 | 57344
-FBPIN | 9 | iobs/PS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0 | 28 | 49152
-FBPIN | 10 | EXP24_ | 1 | NULL | 0 | NULL | 0
-FBPIN | 11 | nADoutLE1_OBUF | 1 | NULL | 0 | nADoutLE1 | 1 | 29 | 49152
-FBPIN | 12 | iobs/PS_FSM_FFd1 | 1 | NULL | 0 | NULL | 0 | 30 | 49152
-FBPIN | 13 | IOREQ | 1 | NULL | 0 | NULL | 0
-FBPIN | 14 | iobm/ETACK | 1 | NULL | 0 | NULL | 0 | 32 | 49152
-FBPIN | 15 | nVMA_IOB_OBUF | 1 | NULL | 0 | nVMA_IOB | 1 | 33 | 49152
-FBPIN | 16 | EXP25_ | 1 | NULL | 0 | NULL | 0
-FBPIN | 17 | iobs/IORW1 | 1 | NULL | 0 | NULL | 0 | 34 | 49152
-FBPIN | 18 | ram/BACTr | 1 | NULL | 0 | NULL | 0
-
-FB_INSTANCE | FOOBAR4_ | MXSE_COPY_0_COPY_0 | 0 | 0 | 0
-FBPIN | 1 | ram/RASEL | 1 | NULL | 0 | NULL | 0
-FBPIN | 2 | RA_0_OBUF | 1 | NULL | 0 | RA<0> | 1 | 87 | 49152
-FBPIN | 3 | cs/nOverlay1 | 1 | NULL | 0 | NULL | 0
-FBPIN | 5 | EXP26_ | 1 | A_FSB_10_IBUF | 1 | NULL | 0 | 89 | 49152
-FBPIN | 6 | iobs/Load1 | 1 | A_FSB_1_IBUF | 1 | NULL | 0 | 90 | 49152
-FBPIN | 7 | EXP27_ | 1 | NULL | 0 | NULL | 0
-FBPIN | 8 | RA_2_OBUF | 1 | NULL | 0 | RA<2> | 1 | 91 | 49152
-FBPIN | 9 | EXP28_ | 1 | A_FSB_12_IBUF | 1 | NULL | 0 | 92 | 49152
-FBPIN | 10 | iobs/Once | 1 | NULL | 0 | NULL | 0
-FBPIN | 11 | EXP29_ | 1 | A_FSB_14_IBUF | 1 | NULL | 0 | 93 | 49152
-FBPIN | 12 | RA_4_OBUF | 1 | NULL | 0 | RA<4> | 1 | 94 | 49152
-FBPIN | 13 | EXP30_ | 1 | NULL | 0 | NULL | 0
-FBPIN | 14 | ram/RAMDIS1 | 1 | A_FSB_16_IBUF | 1 | NULL | 0 | 95 | 49152
-FBPIN | 15 | EXP31_ | 1 | A_FSB_17_IBUF | 1 | NULL | 0 | 96 | 49152
-FBPIN | 16 | fsb/BERR0r | 1 | NULL | 0 | NULL | 0
-FBPIN | 17 | nDinOE_OBUF | 1 | NULL | 0 | nDinOE | 1 | 97 | 49152
-FBPIN | 18 | EXP32_ | 1 | NULL | 0 | NULL | 0
-
-FB_INSTANCE | FOOBAR5_ | MXSE_COPY_0_COPY_0 | 0 | 0 | 0
-FBPIN | 1 | IOACT | 1 | NULL | 0 | NULL | 0
-FBPIN | 2 | RA_1_OBUF | 1 | NULL | 0 | RA<1> | 1 | 35 | 49152
-FBPIN | 3 | iobm/IOS_FSM_FFd7 | 1 | NULL | 0 | NULL | 0
-FBPIN | 4 | iobm/IOS_FSM_FFd6 | 1 | NULL | 0 | NULL | 0
-FBPIN | 5 | iobm/IOS_FSM_FFd5 | 1 | NULL | 0 | NULL | 0 | 36 | 49152
-FBPIN | 6 | iobm/IOS_FSM_FFd4 | 1 | NULL | 0 | NULL | 0 | 37 | 49152
-FBPIN | 7 | iobm/BERRrr | 1 | NULL | 0 | NULL | 0
-FBPIN | 8 | RA_3_OBUF | 1 | NULL | 0 | RA<3> | 1 | 39 | 49152
-FBPIN | 9 | iobm/BERRrf | 1 | NULL | 0 | NULL | 0 | 40 | 49152
-FBPIN | 10 | cnt/RefCnt<0> | 1 | NULL | 0 | NULL | 0
-FBPIN | 11 | iobm/IOS_FSM_FFd8 | 1 | NULL | 0 | NULL | 0 | 41 | 49152
-FBPIN | 12 | nROMCS_OBUF | 1 | NULL | 0 | nROMCS | 1 | 42 | 49152
-FBPIN | 13 | ALE0M | 1 | NULL | 0 | NULL | 0
-FBPIN | 14 | iobm/IOS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0 | 43 | 49152
-FBPIN | 15 | BERR_IOBS | 1 | NULL | 0 | NULL | 0 | 46 | 49152
-FBPIN | 16 | iobm/IOS_FSM_FFd3 | 1 | NULL | 0 | NULL | 0
-FBPIN | 17 | EXP33_ | 1 | E_IOB_IBUF | 1 | NULL | 0 | 49 | 49152
-FBPIN | 18 | IOBERR | 1 | NULL | 0 | NULL | 0
-
-FB_INSTANCE | FOOBAR6_ | MXSE_COPY_0_COPY_0 | 0 | 0 | 0
-FBPIN | 1 | iobm/Er2 | 1 | NULL | 0 | NULL | 0
-FBPIN | 2 | nCAS_OBUF | 1 | NULL | 0 | nCAS | 1 | 74 | 49152
-FBPIN | 3 | iobm/DTACKrr | 1 | NULL | 0 | NULL | 0
-FBPIN | 4 | iobm/DTACKrf | 1 | NULL | 0 | NULL | 0
-FBPIN | 5 | RefAck | 1 | A_FSB_18_IBUF | 1 | NULL | 0 | 76 | 49152
-FBPIN | 6 | nRAMLWE_OBUF | 1 | NULL | 0 | nRAMLWE | 1 | 77 | 49152
-FBPIN | 7 | iobs/IOU1 | 1 | NULL | 0 | NULL | 0
-FBPIN | 8 | iobs/IOL1 | 1 | A_FSB_3_IBUF | 1 | NULL | 0 | 78 | 49152
-FBPIN | 9 | nRAMUWE_OBUF | 1 | NULL | 0 | nRAMUWE | 1 | 79 | 49152
-FBPIN | 10 | iobm/ES<3> | 1 | NULL | 0 | NULL | 0
-FBPIN | 11 | iobm/ES<1> | 1 | A_FSB_15_IBUF | 1 | NULL | 0 | 80 | 49152
-FBPIN | 12 | nROMWE_OBUF | 1 | NULL | 0 | nROMWE | 1 | 81 | 49152
-FBPIN | 13 | iobm/ES<0> | 1 | NULL | 0 | NULL | 0
-FBPIN | 14 | IOU0 | 1 | A_FSB_13_IBUF | 1 | NULL | 0 | 82 | 49152
-FBPIN | 15 | nVPA_FSB_OBUF | 1 | NULL | 0 | nVPA_FSB | 1 | 85 | 49152
-FBPIN | 16 | IOL0 | 1 | NULL | 0 | NULL | 0
-FBPIN | 17 | iobm/ES<4> | 1 | A_FSB_11_IBUF | 1 | NULL | 0 | 86 | 49152
-FBPIN | 18 | iobm/ES<2> | 1 | NULL | 0 | NULL | 0
-
-FB_INSTANCE | FOOBAR7_ | MXSE_COPY_0_COPY_0 | 0 | 0 | 0
-FBPIN | 1 | cnt/RefCnt<5> | 1 | NULL | 0 | NULL | 0
-FBPIN | 2 | RA_5_OBUF | 1 | NULL | 0 | RA<5> | 1 | 50 | 49152
-FBPIN | 3 | cnt/RefCnt<4> | 1 | NULL | 0 | NULL | 0
-FBPIN | 4 | cs/nOverlay0 | 1 | NULL | 0 | NULL | 0
-FBPIN | 5 | ram/RS_FSM_FFd3 | 1 | nUDS_FSB_IBUF | 1 | NULL | 0 | 52 | 49152
-FBPIN | 6 | RA_6_OBUF | 1 | NULL | 0 | RA<6> | 1 | 53 | 49152
-FBPIN | 7 | fsb/Ready0r | 1 | NULL | 0 | NULL | 0
-FBPIN | 8 | ram/RS_FSM_FFd1 | 1 | nDTACK_IOB_IBUF | 1 | NULL | 0 | 54 | 49152
-FBPIN | 9 | RA_7_OBUF | 1 | NULL | 0 | RA<7> | 1 | 55 | 49152
-FBPIN | 10 | ram/Once | 1 | NULL | 0 | NULL | 0
-FBPIN | 11 | ram/RAMDIS2 | 1 | A_FSB_4_IBUF | 1 | NULL | 0 | 56 | 49152
-FBPIN | 12 | RA_8_OBUF | 1 | NULL | 0 | RA<8> | 1 | 58 | 49152
-FBPIN | 13 | ram/RS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0
-FBPIN | 14 | cnt/RefCnt<7> | 1 | nVPA_IOB_IBUF | 1 | NULL | 0 | 59 | 49152
-FBPIN | 15 | RA_9_OBUF | 1 | NULL | 0 | RA<9> | 1 | 60 | 49152
-FBPIN | 16 | cnt/RefCnt<6> | 1 | NULL | 0 | NULL | 0
-FBPIN | 17 | ram/RAMReady | 1 | nWE_FSB_IBUF | 1 | NULL | 0 | 61 | 49152
-FBPIN | 18 | EXP34_ | 1 | NULL | 0 | NULL | 0
-
-FB_INSTANCE | FOOBAR8_ | MXSE_COPY_0_COPY_0 | 0 | 0 | 0
-FBPIN | 2 | A_FSB_19_IBUF$BUF0 | 1 | NULL | 0 | RA<11> | 1 | 63 | 49152
-FBPIN | 5 | NULL | 0 | A_FSB_8_IBUF | 1 | NULL | 0 | 64 | 49152
-FBPIN | 6 | A_FSB_21_IBUF$BUF0 | 1 | NULL | 0 | RA<10> | 1 | 65 | 49152
-FBPIN | 8 | NULL | 0 | A_FSB_23_IBUF | 1 | NULL | 0 | 66 | 49152
-FBPIN | 9 | nADoutLE0_OBUF | 1 | NULL | 0 | nADoutLE0 | 1 | 67 | 49152
-FBPIN | 11 | NULL | 0 | A_FSB_21_IBUF | 1 | NULL | 0 | 68 | 49152
-FBPIN | 12 | nAoutOE_OBUF | 1 | NULL | 0 | nAoutOE | 1 | 70 | 49152
-FBPIN | 14 | NULL | 0 | A_FSB_20_IBUF | 1 | NULL | 0 | 71 | 49152
-FBPIN | 15 | nDinLE_OBUF | 1 | NULL | 0 | nDinLE | 1 | 72 | 49152
-FBPIN | 17 | iobm/IOS_FSM_FFd1 | 1 | A_FSB_19_IBUF | 1 | NULL | 0 | 73 | 49152
-FBPIN | 18 | iobm/Er | 1 | NULL | 0 | NULL | 0
-
-FB_INSTANCE | INPUTPINS_FOOBAR9_ | MXSE_COPY_0_COPY_0 | 0 | 0 | 0
-
-BUSINFO | A_FSB<23:1> | 23 | 0 | 0 | A_FSB<10> | 13 | A_FSB<11> | 12 | A_FSB<12> | 11 | A_FSB<13> | 10 | A_FSB<14> | 9 | A_FSB<15> | 8 | A_FSB<16> | 7 | A_FSB<17> | 6 | A_FSB<18> | 5 | A_FSB<19> | 4 | A_FSB<1> | 22 | A_FSB<20> | 3 | A_FSB<21> | 2 | A_FSB<22> | 1 | A_FSB<23> | 0 | A_FSB<2> | 21 | A_FSB<3> | 20 | A_FSB<4> | 19 | A_FSB<5> | 18 | A_FSB<6> | 17 | A_FSB<7> | 16 | A_FSB<8> | 15 | A_FSB<9> | 14
-BUSINFO | RA<11:0> | 12 | 0 | 1 | RA<0> | 11 | RA<10> | 1 | RA<11> | 0 | RA<1> | 10 | RA<2> | 9 | RA<3> | 8 | RA<4> | 7 | RA<5> | 6 | RA<6> | 5 | RA<7> | 4 | RA<8> | 3 | RA<9> | 2
-
-FB_ORDER_OF_INPUTS | FOOBAR1_ | 0 | A_FSB<10> | 89 | 1 | nDTACK_FSB_OBUF.UIM | NULL | 2 | cs/nOverlay1 | NULL | 3 | $OpTx$FX_DC$606.UIM | NULL | 4 | A_FSB<16> | 95
-FB_ORDER_OF_INPUTS | FOOBAR1_ | 5 | A_FSB<21> | 68 | 6 | fsb/Ready1r | NULL | 7 | A_FSB<13> | 82 | 8 | fsb/BERR1r | NULL | 9 | fsb/VPA__or00001/fsb/VPA__or00001_D2.UIM | NULL
-FB_ORDER_OF_INPUTS | FOOBAR1_ | 10 | ALE1 | NULL | 11 | fsb/Ready2r | NULL | 13 | A_FSB<20> | 71 | 14 | fsb/VPA | NULL | 15 | TimeoutA | NULL
-FB_ORDER_OF_INPUTS | FOOBAR1_ | 16 | $OpTx$FX_DC$602.UIM | NULL | 17 | iobs/IOReady | NULL | 21 | A_FSB<17> | 96 | 24 | nAS_FSB | 13 | 27 | BERR_IOBS | NULL
-FB_ORDER_OF_INPUTS | FOOBAR1_ | 29 | ram/RAMReady | NULL | 30 | A_FSB<14> | 93 | 32 | A_FSB<8> | 64 | 33 | fsb/ASrf | NULL | 37 | TimeoutB | NULL
-FB_ORDER_OF_INPUTS | FOOBAR1_ | 38 | A_FSB<22> | 9 | 41 | A_FSB<19> | 73 | 42 | A_FSB<15> | 80 | 43 | A_FSB<11> | 86 | 44 | A_FSB<9> | 12
-FB_ORDER_OF_INPUTS | FOOBAR1_ | 46 | A_FSB<18> | 76 | 47 | nWE_FSB | 61 | 48 | A_FSB<23> | 66 | 49 | A_FSB<12> | 92 | 50 | fsb/BERR0r | NULL
-FB_ORDER_OF_INPUTS | FOOBAR1_ | 52 | fsb/Ready0r | NULL
-
-FB_IMUX_INDEX | FOOBAR1_ | 144 | 1 | 56 | 3 | 164 | 197 | 6 | 151 | 26 | 9 | 46 | 11 | -1 | 189 | 14 | 33 | 16 | 35 | -1 | -1 | -1 | 168 | -1 | -1 | 212 | -1 | -1 | 86 | -1 | 124 | 152 | -1 | 209 | 42 | -1 | -1 | -1 | 32 | 202 | -1 | -1 | 183 | 155 | 147 | 210 | -1 | 175 | 213 | 205 | 150 | 69 | -1 | 114 | -1
-
-
-FB_ORDER_OF_INPUTS | FOOBAR2_ | 0 | cnt/RefCnt<5> | NULL | 2 | IORW0 | NULL | 3 | nAS_FSB | 13 | 4 | iobm/IOS_FSM_FFd5 | NULL | 5 | cnt/RefCnt<3> | NULL
-FB_ORDER_OF_INPUTS | FOOBAR2_ | 6 | cnt/RefCnt<2> | NULL | 7 | cnt/RefCnt<1> | NULL | 8 | nVPA_IOB | 59 | 9 | iobs/Once | NULL | 10 | ALE1 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR2_ | 12 | cnt/TimeoutBPre | NULL | 13 | iobm/IOS_FSM_FFd2 | NULL | 14 | BERR_IOBS | NULL | 15 | IOL0 | NULL | 17 | IOBERR | NULL
-FB_ORDER_OF_INPUTS | FOOBAR2_ | 19 | cnt/RefCnt<6> | NULL | 21 | nRES | 99 | 22 | iobs/IOACTr | NULL | 23 | fsb/ASrf | NULL | 24 | IOREQ | NULL
-FB_ORDER_OF_INPUTS | FOOBAR2_ | 28 | RefAck | NULL | 30 | cnt/RefCnt<0> | NULL | 31 | iobs/PS_FSM_FFd2 | NULL | 33 | fsb/BERR1r | NULL | 36 | iobm/IOS_FSM_FFd6 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR2_ | 37 | TimeoutB | NULL | 38 | cnt/RefDone | NULL | 39 | iobm/IOS_FSM_FFd7 | NULL | 40 | iobs/IOReady | NULL | 43 | iobm/IOS_FSM_FFd3 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR2_ | 44 | cnt/RefCnt<4> | NULL | 46 | cnt/RefCnt<7> | NULL | 49 | IOU0 | NULL | 51 | iobm/IOS_FSM_FFd4 | NULL | 52 | TimeoutA | NULL
-
-FB_IMUX_INDEX | FOOBAR2_ | 108 | -1 | 38 | 212 | 76 | 23 | 24 | 25 | 217 | 63 | 46 | -1 | 30 | 85 | 86 | 105 | -1 | 89 | -1 | 123 | -1 | 176 | 39 | 42 | 48 | -1 | -1 | -1 | 94 | -1 | 81 | 44 | -1 | 26 | -1 | -1 | 75 | 32 | 27 | 74 | 35 | -1 | -1 | 87 | 110 | -1 | 121 | -1 | -1 | 103 | -1 | 77 | 33 | -1
-
-
-FB_ORDER_OF_INPUTS | FOOBAR3_ | 0 | iobm/VPArr | NULL | 1 | iobm/VPArf | NULL | 2 | cs/nOverlay1 | NULL | 4 | A_FSB<16> | 95 | 5 | A_FSB<21> | 68
-FB_ORDER_OF_INPUTS | FOOBAR3_ | 7 | A_FSB<13> | 82 | 8 | iobs/PS_FSM_FFd2 | NULL | 9 | iobm/ES<3> | NULL | 10 | iobm/ES<1> | NULL | 12 | iobm/ES<0> | NULL
-FB_ORDER_OF_INPUTS | FOOBAR3_ | 13 | ram/RAMDIS1 | NULL | 14 | nVMA_IOB_OBUF | NULL | 15 | A_FSB<18> | 76 | 16 | iobs/IORW1 | NULL | 17 | iobm/ES<2> | NULL
-FB_ORDER_OF_INPUTS | FOOBAR3_ | 19 | iobs/Load1 | NULL | 21 | A_FSB<17> | 96 | 24 | nAS_FSB | 13 | 28 | RefAck | NULL | 29 | A_FSB<23> | 66
-FB_ORDER_OF_INPUTS | FOOBAR3_ | 30 | A_FSB<14> | 93 | 33 | fsb/ASrf | NULL | 34 | ram/RAMDIS2 | NULL | 35 | iobm/ES<4> | NULL | 36 | iobs/Once | NULL
-FB_ORDER_OF_INPUTS | FOOBAR3_ | 37 | iobs/Clear1 | NULL | 38 | iobs/IOACTr | NULL | 39 | IORW0 | NULL | 41 | ALE1 | NULL | 43 | A_FSB<19> | 73
-FB_ORDER_OF_INPUTS | FOOBAR3_ | 45 | IOACT | NULL | 47 | nWE_FSB | 61 | 48 | iobs/PS_FSM_FFd1 | NULL | 50 | A_FSB<20> | 71 | 52 | A_FSB<22> | 9
-
-FB_IMUX_INDEX | FOOBAR3_ | 18 | 19 | 56 | -1 | 164 | 197 | -1 | 151 | 44 | 99 | 100 | -1 | 102 | 67 | 50 | 175 | 52 | 107 | -1 | 59 | -1 | 168 | -1 | -1 | 212 | -1 | -1 | -1 | 94 | 205 | 152 | -1 | -1 | 42 | 118 | 106 | 63 | 41 | 39 | 38 | -1 | 46 | -1 | 183 | -1 | 72 | -1 | 213 | 47 | -1 | 189 | -1 | 202 | -1
-
-
-FB_ORDER_OF_INPUTS | FOOBAR4_ | 0 | ram/RASEL | NULL | 2 | A_FSB<1> | 90 | 3 | cs/nOverlay0 | NULL | 4 | nWE_FSB | 61 | 6 | fsb/ASrf | NULL
-FB_ORDER_OF_INPUTS | FOOBAR4_ | 7 | ram/RS_FSM_FFd1 | NULL | 8 | iobs/PS_FSM_FFd2 | NULL | 9 | cnt/RefDone | NULL | 10 | A_FSB<22> | 9 | 11 | iobs/PS_FSM_FFd1 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR4_ | 12 | ram/RS_FSM_FFd2 | NULL | 13 | cnt/RefCnt<7> | NULL | 14 | TimeoutB | NULL | 15 | fsb/BERR0r | NULL | 17 | ram/BACTr | NULL
-FB_ORDER_OF_INPUTS | FOOBAR4_ | 19 | cnt/RefCnt<6> | NULL | 20 | A_FSB<12> | 92 | 21 | A_FSB<17> | 96 | 22 | ram/RS_FSM_FFd3 | NULL | 23 | A_FSB<18> | 76
-FB_ORDER_OF_INPUTS | FOOBAR4_ | 24 | nAS_FSB | 13 | 27 | A_FSB<3> | 78 | 28 | A_FSB<10> | 89 | 29 | A_FSB<20> | 71 | 30 | A_FSB<14> | 93
-FB_ORDER_OF_INPUTS | FOOBAR4_ | 33 | cs/nOverlay1 | NULL | 34 | A_FSB<5> | 15 | 35 | A_FSB<23> | 66 | 36 | iobs/Once | NULL | 41 | ALE1 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR4_ | 43 | A_FSB<19> | 73 | 46 | A_FSB<13> | 82 | 47 | A_FSB<21> | 68 | 48 | A_FSB<16> | 95 | 49 | ram/Once | NULL
-FB_ORDER_OF_INPUTS | FOOBAR4_ | 50 | cnt/RefCnt<5> | NULL
-
-FB_IMUX_INDEX | FOOBAR4_ | 54 | -1 | 146 | 111 | 213 | -1 | 42 | 115 | 44 | 27 | 202 | 47 | 120 | 121 | 32 | 69 | -1 | 53 | -1 | 123 | 150 | 168 | 112 | 175 | 212 | -1 | -1 | 167 | 144 | 189 | 152 | -1 | -1 | 56 | 216 | 205 | 63 | -1 | -1 | -1 | -1 | 46 | -1 | 183 | -1 | -1 | 151 | 197 | 164 | 117 | 108 | -1 | -1 | -1
-
-
-FB_ORDER_OF_INPUTS | FOOBAR5_ | 0 | nBERR_IOB | 18 | 2 | iobm/RESrr | NULL | 3 | iobm/RESrf | NULL | 4 | iobm/IOREQr | NULL | 5 | iobm/IOS_FSM_FFd4 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR5_ | 6 | iobm/BERRrr | NULL | 7 | A_FSB<13> | 82 | 8 | iobm/BERRrf | NULL | 9 | iobs/Once | NULL | 10 | ALE1 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR5_ | 13 | iobm/ETACK | NULL | 14 | A_FSB<4> | 56 | 15 | iobm/IOS_FSM_FFd3 | NULL | 16 | iobm/IOS_FSM_FFd1 | NULL | 20 | iobm/DTACKrf | NULL
-FB_ORDER_OF_INPUTS | FOOBAR5_ | 22 | iobs/IOACTr | NULL | 23 | fsb/ASrf | NULL | 24 | nAS_FSB | 13 | 27 | BERR_IOBS | NULL | 29 | iobm/IOS_FSM_FFd5 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR5_ | 30 | CLK_IOB | 27 | 31 | iobs/PS_FSM_FFd2 | NULL | 32 | iobm/IOS_FSM_FFd8 | NULL | 33 | cs/nOverlay1 | NULL | 35 | A_FSB<23> | 66
-FB_ORDER_OF_INPUTS | FOOBAR5_ | 36 | iobm/IOS_FSM_FFd6 | NULL | 38 | A_FSB<22> | 9 | 39 | iobm/IOS_FSM_FFd7 | NULL | 43 | A_FSB<11> | 86 | 45 | A_FSB<2> | 16
-FB_ORDER_OF_INPUTS | FOOBAR5_ | 46 | IOBERR | NULL | 47 | A_FSB<21> | 68 | 50 | A_FSB<20> | 71 | 51 | iobm/DTACKrr | NULL | 52 | ram/RASEL | NULL
-
-FB_IMUX_INDEX | FOOBAR5_ | 226 | -1 | 20 | 21 | 22 | 77 | 78 | 151 | 80 | 63 | 46 | -1 | -1 | 49 | 223 | 87 | 142 | -1 | -1 | -1 | 93 | -1 | 39 | 42 | 212 | -1 | -1 | 86 | -1 | 76 | 248 | 44 | 82 | 56 | -1 | 205 | 75 | -1 | 202 | 74 | -1 | -1 | -1 | 147 | -1 | 218 | 89 | 197 | -1 | -1 | 189 | 92 | 54 | -1
-
-
-FB_ORDER_OF_INPUTS | FOOBAR6_ | 0 | iobm/Er2 | NULL | 4 | nWE_FSB | 61 | 5 | iobs/Load1 | NULL | 6 | iobs/IOU1 | NULL | 7 | iobs/IOL1 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR6_ | 8 | iobs/PS_FSM_FFd2 | NULL | 11 | iobs/PS_FSM_FFd1 | NULL | 16 | iobm/ES<4> | NULL | 17 | iobm/Er | NULL | 24 | nAS_FSB | 13
-FB_ORDER_OF_INPUTS | FOOBAR6_ | 27 | iobm/ES<1> | NULL | 33 | nLDS_FSB | 25 | 34 | ram/RAMDIS2 | NULL | 37 | ram/RS_FSM_FFd1 | NULL | 41 | ALE1 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR6_ | 42 | nUDS_FSB | 52 | 43 | iobm/ES<0> | NULL | 45 | ram/RAMDIS1 | NULL | 46 | nDTACK_IOB | 54 | 47 | iobm/ES<3> | NULL
-FB_ORDER_OF_INPUTS | FOOBAR6_ | 48 | ram/RS_FSM_FFd2 | NULL | 49 | fsb/VPA | NULL | 52 | ram/RASEL | NULL | 53 | iobm/ES<2> | NULL
-
-FB_IMUX_INDEX | FOOBAR6_ | 90 | -1 | -1 | -1 | 213 | 59 | 96 | 97 | 44 | -1 | -1 | 47 | -1 | -1 | -1 | -1 | 106 | 143 | -1 | -1 | -1 | -1 | -1 | -1 | 212 | -1 | -1 | 100 | -1 | -1 | -1 | -1 | -1 | 242 | 118 | -1 | -1 | 115 | -1 | -1 | -1 | 46 | 243 | 102 | -1 | 67 | 231 | 99 | 120 | 14 | -1 | -1 | 54 | 107
-
-
-FB_ORDER_OF_INPUTS | FOOBAR7_ | 0 | ram/RASEL | NULL | 1 | A_FSB<9> | 12 | 2 | cs/nOverlay1 | NULL | 3 | nAS_FSB | 13 | 4 | A_FSB<16> | 95
-FB_ORDER_OF_INPUTS | FOOBAR7_ | 5 | A_FSB<21> | 68 | 6 | fsb/Ready0r | NULL | 7 | A_FSB<19> | 73 | 8 | A_FSB<17> | 96 | 9 | cnt/RefDone | NULL
-FB_ORDER_OF_INPUTS | FOOBAR7_ | 10 | ram/RAMDIS2 | NULL | 11 | A_FSB<15> | 80 | 12 | ram/RS_FSM_FFd2 | NULL | 13 | cnt/RefCnt<7> | NULL | 15 | cnt/RefCnt<6> | NULL
-FB_ORDER_OF_INPUTS | FOOBAR7_ | 16 | ram/RAMReady | NULL | 23 | A_FSB<18> | 76 | 29 | A_FSB<20> | 71 | 30 | cnt/RefCnt<0> | NULL | 32 | A_FSB<8> | 64
-FB_ORDER_OF_INPUTS | FOOBAR7_ | 33 | fsb/ASrf | NULL | 34 | cnt/RefCnt<1> | NULL | 35 | A_FSB<23> | 66 | 37 | ram/RS_FSM_FFd1 | NULL | 39 | A_FSB<7> | 20
-FB_ORDER_OF_INPUTS | FOOBAR7_ | 42 | cnt/RefCnt<2> | NULL | 43 | ram/RS_FSM_FFd3 | NULL | 44 | cnt/RefCnt<4> | NULL | 45 | A_FSB<6> | 19 | 47 | cnt/RefCnt<5> | NULL
-FB_ORDER_OF_INPUTS | FOOBAR7_ | 48 | cnt/RefCnt<3> | NULL | 49 | ram/Once | NULL | 50 | ram/BACTr | NULL | 51 | cs/nOverlay0 | NULL | 52 | A_FSB<22> | 9
-
-FB_IMUX_INDEX | FOOBAR7_ | 54 | 210 | 56 | 212 | 164 | 197 | 114 | 183 | 168 | 27 | 118 | 155 | 120 | 121 | -1 | 123 | 124 | -1 | -1 | -1 | -1 | -1 | -1 | 175 | -1 | -1 | -1 | -1 | -1 | 189 | 81 | -1 | 209 | 42 | 25 | 205 | -1 | 115 | -1 | 230 | -1 | -1 | 24 | 112 | 110 | 228 | -1 | 108 | 23 | 117 | 53 | 111 | 202 | -1
-
-
-FB_ORDER_OF_INPUTS | FOOBAR8_ | 6 | E_IOB | 49 | 7 | ALE0S | NULL | 12 | ALE0M | NULL | 41 | A_FSB<19> | 73 | 43 | iobm/IOS_FSM_FFd3 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR8_ | 47 | A_FSB<21> | 68 | 51 | iobm/IOS_FSM_FFd4 | NULL | 53 | iobm/IOS_FSM_FFd2 | NULL
-
-FB_IMUX_INDEX | FOOBAR8_ | -1 | -1 | -1 | -1 | -1 | -1 | 249 | 43 | -1 | -1 | -1 | -1 | 84 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 183 | -1 | 87 | -1 | -1 | -1 | 197 | -1 | -1 | -1 | 77 | -1 | 85
-
-
-GLOBAL_FCLK | CLK2X_IOB | 0 | 0 | CLK_FSB | 1 | 1 | CLK_IOB | 2 | 2
-
-GLOBAL_FSR | nRES | 0 | 0
-
-TIME_TSPEC | TS_CLK_IOB | PERIOD:CLK_IOB:142.857nS:HIGH:71.428nS | CLK_IOB | 10003 | 1428 | 714 | NULL
-
-TIME_TSPEC | TS_CLK_FSB | PERIOD:CLK_FSB:40.000nS:HIGH:20.000nS | CLK_FSB | 10003 | 400 | 200 | NULL
-
-TIME_TSPEC | TS_CLK2X_IOB | PERIOD:CLK2X_IOB:66.666nS:HIGH:33.333nS | CLK2X_IOB | 10003 | 666 | 333 | NULL
diff --git a/cpld/XC95144XL/MXSE.bld b/cpld/XC95144XL/MXSE.bld
index 78883bd..c60fa0b 100644
--- a/cpld/XC95144XL/MXSE.bld
+++ b/cpld/XC95144XL/MXSE.bld
@@ -28,10 +28,10 @@ NGDBUILD Design Results Summary:
   Number of errors:     0
   Number of warnings:   0
 
-Total memory usage is 117236 kilobytes
+Total memory usage is 118196 kilobytes
 
 Writing NGD file "MXSE.ngd" ...
-Total REAL time to NGDBUILD completion:  17 sec
+Total REAL time to NGDBUILD completion:  18 sec
 Total CPU time to NGDBUILD completion:   17 sec
 
 Writing NGDBUILD log file "MXSE.bld"...
diff --git a/cpld/XC95144XL/MXSE.cmd_log b/cpld/XC95144XL/MXSE.cmd_log
index b7d43ed..a763bb5 100644
--- a/cpld/XC95144XL/MXSE.cmd_log
+++ b/cpld/XC95144XL/MXSE.cmd_log
@@ -19,3 +19,78 @@ cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt
 XSLTProcess MXSE_build.xml 
 tsim -intstyle ise MXSE MXSE.nga 
 hprep6 -s IEEE1149 -n MXSE -i MXSE 
+xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
+xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
+XSLTProcess MXSE_build.xml 
+tsim -intstyle ise MXSE MXSE.nga 
+xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" 
+xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
+XSLTProcess MXSE_build.xml 
+tsim -intstyle ise MXSE MXSE.nga 
+xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
+XSLTProcess MXSE_build.xml 
+tsim -intstyle ise MXSE MXSE.nga 
+xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
+XSLTProcess MXSE_build.xml 
+tsim -intstyle ise MXSE MXSE.nga 
+taengine -intstyle ise -f MXSE -w --format html1 -l MXSE_html/tim/timing_report.htm 
+xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" 
+xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" 
+xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" 
+xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" 
+xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" 
+xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
+xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" 
+xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
+XSLTProcess MXSE_build.xml 
+tsim -intstyle ise MXSE MXSE.nga 
+xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" 
+xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" 
+xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" 
+xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" 
+xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
+xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
+XSLTProcess MXSE_build.xml 
+tsim -intstyle ise MXSE MXSE.nga 
+xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
+XSLTProcess MXSE_build.xml 
+tsim -intstyle ise MXSE MXSE.nga 
+xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
+XSLTProcess MXSE_build.xml 
+tsim -intstyle ise MXSE MXSE.nga 
+taengine -intstyle ise -f MXSE -w --format html1 -l MXSE_html/tim/timing_report.htm 
+xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
+XSLTProcess MXSE_build.xml 
+tsim -intstyle ise MXSE MXSE.nga 
+taengine -intstyle ise -f MXSE -w --format html1 -l MXSE_html/tim/timing_report.htm 
+xst -intstyle ise -ifn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.xst" -ofn "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc //192.168.64.1/Repos/Warp-SE/cpld/MXSE.ucf -p xc95144xl-TQ100-10 MXSE.ngc MXSE.ngd  
+cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper MXSE.ngd 
+XSLTProcess MXSE_build.xml 
+tsim -intstyle ise MXSE MXSE.nga 
+taengine -intstyle ise -f MXSE -w --format html1 -l MXSE_html/tim/timing_report.htm 
+hprep6 -s IEEE1149 -n MXSE -i MXSE 
+hprep6 -s IEEE1149 -n MXSE -i MXSE 
diff --git a/cpld/XC95144XL/MXSE.gyd b/cpld/XC95144XL/MXSE.gyd
index aceff4b..576f81f 100644
--- a/cpld/XC95144XL/MXSE.gyd
+++ b/cpld/XC95144XL/MXSE.gyd
@@ -24,13 +24,17 @@ A_FSB<6> S:PIN3
 A_FSB<7> S:PIN4
 A_FSB<8> S:PIN6
 A_FSB<9> S:PIN7
+SW<0> S:PIN61
 CLK2X_IOB S:PIN22
 CLK_FSB S:PIN27
 CLK_IOB S:PIN23
 E_IOB S:PIN25
+SW<1> S:PIN60
 nAS_FSB S:PIN32
 nBERR_IOB S:PIN76
+nBG_IOB S:PIN73
 nDTACK_IOB S:PIN78
+nIPL2 S:PIN92
 nLDS_FSB S:PIN30
 nRES S:PIN91
 nUDS_FSB S:PIN33
@@ -38,6 +42,9 @@ nVPA_IOB S:PIN77
 nWE_FSB S:PIN29
 RA<11> S:PIN63
 RA<10> S:PIN55
+CLK20EN S:PIN59
+CLK25EN S:PIN58
+nBR_IOB S:PIN72
 RA<0> S:PIN53
 RA<1> S:PIN50
 RA<2> S:PIN43
@@ -73,41 +80,43 @@ nVPA_FSB S:PIN93
 ;The remaining section of the .gyd file is for documentation purposes only.
 ;It shows where your internal equations were placed in the last successful fit.
 
-PARTITION FB1_1 iobs/IOACTr iobm/IOREQr iobm/Er2 iobm/DTACKrr
-		 iobm/DTACKrf iobm/BERRrr iobm/BERRrf fsb/ASrf
-		 cnt/RefCnt<7> cnt/RefCnt<6> cnt/RefCnt<5> cnt/RefCnt<4>
-		 cnt/RefCnt<3> cnt/RefCnt<2> cnt/RefCnt<1> cnt/RefCnt<0>
-		 RefAck $OpTx$FX_DC$609
-PARTITION FB2_14 iobm/VPArr iobm/VPArf iobm/RESrr iobm/RESrf
-		 iobm/Er
-PARTITION FB3_1 EXP14_ fsb/VPA EXP15_ EXP16_
-		 fsb/Ready1r EXP17_ EXP18_ EXP19_
-		 nDTACK_FSB_OBUF EXP20_ EXP21_ EXP22_
-		 iobs/IORW1 EXP23_ fsb/Ready2r EXP24_
-		 nROMWE_OBUF EXP25_
-PARTITION FB4_1 ram/BACTr nAoutOE_OBUF iobs/Clear1 ALE0S
-		 nDoutOE_OBUF nDinOE_OBUF iobs/PS_FSM_FFd1 iobs/IOU1
-		 iobs/IOL1 iobm/IOS_FSM_FFd2 nVPA_FSB_OBUF iobm/IOS_FSM_FFd1
-		 fsb/BERR1r cs/nOverlay1 $OpTx$FX_DC$610 IOU0
-		 IOL0 iobs/IOReady
-PARTITION FB5_1 EXP26_ nROMCS_OBUF EXP27_ iobs/PS_FSM_FFd2
-		 nCAS_OBUF nOE_OBUF EXP28_ iobs/Once
-		 RA_4_OBUF EXP29_ RA_3_OBUF RA_5_OBUF
-		 IOREQ RA_2_OBUF RA_6_OBUF BERR_IOBS
-		 EXP30_ IORW0
-PARTITION FB6_1 iobm/ETACK nVMA_IOB_OBUF ALE0M iobm/ES<3>
-		 iobm/ES<1> iobm/ES<0> iobm/IOS_FSM_FFd4 iobm/ES<4>
-		 nLDS_IOB_OBUF iobm/IOS_FSM_FFd3 nUDS_IOB_OBUF nAS_IOB_OBUF
+PARTITION FB1_1 ram/BACTr iobm/RESrr iobm/RESrf fsb/ASrf
+		 cnt/RefCnt<2> cnt/RefCnt<1> RefAck RESr2
+		 RESr1 RESr0 IPL2r1 IPL2r0
+		 ALE0S $OpTx$FX_DC$708 iobs/IOU1 iobs/IOL1
+		 iobm/IOS_FSM_FFd1 IOU0
+PARTITION FB2_6 iobs/IOACTr iobm/VPArr iobm/VPArf iobm/IOREQr
+		 iobm/Er2 iobm/Er iobm/DTACKrr iobm/DTACKrf
+		 iobm/BGr1 iobm/BGr0 iobm/BERRrr iobm/BERRrf
+		 cnt/RefCnt<0>
+PARTITION FB3_1 fsb/Ready1r EXP14_ iobs/IORW1 EXP15_
+		 fsb/Ready2r EXP16_ EXP17_ EXP18_
+		 nDTACK_FSB_OBUF EXP19_ EXP20_
+PARTITION FB3_13 EXP21_ EXP22_ fsb/VPA EXP23_
+		 nROMWE_OBUF iobs/Clear1
+PARTITION FB4_1 cnt/RefCnt<6> nAoutOE_OBUF cnt/RefCnt<5> cnt/RefCnt<4>
+		 nDoutOE_OBUF nDinOE_OBUF cnt/RefCnt<3> iobs/PS_FSM_FFd1
+		 fsb/BERR1r cs/nOverlay1 nVPA_FSB_OBUF cnt/RefDone
+		 cs/nOverlay0 cnt/TimeoutBPre TimeoutA IOL0
+		 iobs/IOReady BERR_IOBS
+PARTITION FB5_1 ram/RASEL nROMCS_OBUF cnt/RefCnt<7> ram/RAMDIS2
+		 nCAS_OBUF nOE_OBUF EXP24_ ram/RAMDIS1
+		 RA_4_OBUF EXP25_ RA_3_OBUF RA_5_OBUF
+		 iobs/Load1 RA_2_OBUF RA_6_OBUF ram/Once
+		 EXP26_ EXP27_
+PARTITION FB6_1 iobm/ETACK nVMA_IOBout iobm/IOS_FSM_FFd3 iobm/ES<3>
+		 iobm/ES<1> iobm/ES<0> ALE0M iobm/ES<4>
+		 nLDS_IOBout iobm/IOS_FSM_FFd2 nUDS_IOBout nAS_IOBout
 		 iobm/ES<2> nADoutLE1_OBUF nADoutLE0_OBUF IOACT
 		 nDinLE_OBUF IOBERR
-PARTITION FB7_1 TimeoutB RA_1_OBUF cnt/RefDone fsb/Ready0r
-		 RA_7_OBUF RA_0_OBUF cs/nOverlay0 RA_8_OBUF
-		 A_FSB_21_IBUF$BUF0 cnt/TimeoutBPre RA_9_OBUF TimeoutA
-		 EXP31_ ram/RS_FSM_FFd3 EXP32_ ram/RS_FSM_FFd2
-		 EXP33_ ram/RAMReady
-PARTITION FB8_1 ram/RASEL A_FSB_19_IBUF$BUF0 fsb/BERR0r ram/RS_FSM_FFd1
-		 nRAS_OBUF nRAMLWE_OBUF ram/Once nRAMUWE_OBUF
-		 iobs/Load1 EXP34_ EXP35_ nBERR_FSB_OBUF
-		 ram/RAMDIS2 EXP36_ ram/RAMDIS1 EXP37_
-		 EXP38_ EXP39_
+PARTITION FB7_1 ram/RAMReady RA_1_OBUF TimeoutB fsb/Ready0r
+		 RA_7_OBUF RA_0_OBUF ram/RS_FSM_FFd1 RA_8_OBUF
+		 A_FSB_21_IBUF$BUF0 $OpTx$$OpTx$FX_DC$182_INV$783 RA_9_OBUF CLK25EN_OBUF
+		 ram/RS_FSM_FFd3 CLK20EN_OBUF$BUF0 EXP28_ EXP29_
+		 ram/RS_FSM_FFd2 EXP30_
+PARTITION FB8_1 EXP31_ A_FSB_19_IBUF$BUF0 EXP32_ iobs/PS_FSM_FFd2
+		 nRAS_OBUF nRAMLWE_OBUF RESDone nRAMUWE_OBUF
+		 IOREQ EXP33_ EXP34_ nBERR_FSB_OBUF
+		 EXP35_ iobs/Once Park fsb/BERR0r
+		 EXP36_ IORW0
 
diff --git a/cpld/XC95144XL/MXSE.jed b/cpld/XC95144XL/MXSE.jed
index 211c800..9162b71 100644
--- a/cpld/XC95144XL/MXSE.jed
+++ b/cpld/XC95144XL/MXSE.jed
@@ -1,5 +1,5 @@
 Programmer Jedec Bit Map
-Date Extracted: Mon Feb 14 19:35:56 2022
+Date Extracted: Sun Mar 27 10:12:11 2022
 
 QF93312*
 QP100*
@@ -90,1158 +90,1158 @@ N PPMAP 153 95*
 N PPMAP 155 96*
 N PPMAP 157 97*
 N PPMAP 160 99*
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-L0000064 00000000 00000000 00000000 00000000 01000100 00000000 00000000 00000000*
-L0000128 00000000 00000000 00000000 00000000 00000100 00000000 00000000 00000000*
-L0000192 00000000 00000000 01000000 00000000 00000100 00000000 10000000 00000000*
-L0000256 00000000 00000000 01000000 00000000 00000000 00000000 10000000 00000000*
-L0000320 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
-L0000384 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00010000*
-L0000448 00000000 00000000 00000000 00000000 00000000 00000000 00000100 00000000*
-L0000512 00000000 00000000 00000000 00000000 00000000 00000000 00000100 00000000*
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-L0000816 000000 000000 000000 000000 000000 000000 000000 000000*
-L0000864 00000000 00000000 10000000 00000000 01000000 00000000 00000000 00000000*
-L0000928 00000000 00000000 10000000 00000000 00001000 00010000 00000000 00000000*
-L0000992 00000000 00000000 00000000 00000000 00000000 00000100 00000100 00000000*
-L0001056 00000000 00000000 00000000 00000000 00000000 00000000 00000100 00000000*
+L0000000 00000100 00000000 00010100 00000000 00010000 00000000 00000000 00000000*
+L0000064 00000000 00000000 10010100 00000000 00000000 00000000 01000000 00000000*
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+L0092640 00000000 00000000 00010000 00000000 00000000 00000000 00000000 00000000*
+L0092704 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000*
+L0092768 00000000 00000000 01010000 00000000 00000000 00000000 00000000 00000000*
+L0092832 00000000 00000000 01010100 00000000 00000000 00000000 00000000 00000000*
+L0092896 00000000 00000000 01000100 00000000 00000000 00000000 00000000 00000000*
+L0092960 00000000 00000000 01010000 00000000 00000000 00000000 00000000 00000000*
+L0093024 000000 000000 000100 000000 000000 000000 000000 000000*
+L0093072 000000 000000 000000 000000 000010 000001 000000 000000*
+L0093120 000000 000000 000000 000000 000000 000001 001000 000000*
+L0093168 000000 000000 000000 000000 000000 000000 001000 000000*
+L0093216 000000 000000 000000 000000 000000 000001 000000 000000*
+L0093264 000000 000000 000000 000000 000000 000001 000000 000000*
+C9409*
+2DB1
diff --git a/cpld/XC95144XL/MXSE.lfp b/cpld/XC95144XL/MXSE.lfp
new file mode 100644
index 0000000..e69de29
diff --git a/cpld/XC95144XL/MXSE.mfd b/cpld/XC95144XL/MXSE.mfd
index 283bf9f..db7358c 100644
--- a/cpld/XC95144XL/MXSE.mfd
+++ b/cpld/XC95144XL/MXSE.mfd
@@ -1,57 +1,84 @@
 MDF Database:  version 1.0
 MDF_INFO | MXSE | XC95144XL-10-TQ100
-MACROCELL | 5 | 1 | nVMA_IOB_OBUF
-ATTRIBUTES | 4621058 | 0
+MACROCELL | 5 | 1 | nVMA_IOBout
+ATTRIBUTES | 4622082 | 0
 OUTPUTMC | 2 | 5 | 1 | 5 | 0
-INPUTS | 9 | nVMA_IOB  | iobm/ES<0>  | iobm/ES<1>  | iobm/ES<2>  | iobm/ES<3>  | iobm/ES<4>  | IOACT  | iobm/VPArf  | iobm/VPArr
-INPUTMC | 9 | 5 | 1 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 15 | 1 | 14 | 1 | 13
-EQ | 5 | 
+INPUTS | 10 | nVMA_IOB  | iobm/ES<0>  | iobm/ES<1>  | iobm/ES<2>  | iobm/ES<3>  | iobm/ES<4>  | IOACT  | iobm/VPArf  | iobm/VPArr  | nAoutOE
+INPUTMC | 10 | 5 | 1 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 15 | 1 | 7 | 1 | 6 | 3 | 1
+EQ | 6 | 
    nVMA_IOB.T = !nVMA_IOB & !iobm/ES<0> & !iobm/ES<1> & !iobm/ES<2> & 
 	!iobm/ES<3> & !iobm/ES<4>
 	# nVMA_IOB & iobm/ES<0> & iobm/ES<1> & iobm/ES<2> & 
 	!iobm/ES<3> & !iobm/ES<4> & IOACT & iobm/VPArf & iobm/VPArr;
    nVMA_IOB.CLK = CLK2X_IOB;	// GCK
+   nVMA_IOB.OE = !nAoutOE;
 GLOBALS | 1 | 2 | CLK2X_IOB
 
-MACROCELL | 3 | 13 | cs/nOverlay1
-ATTRIBUTES | 8553280 | 0
-OUTPUTMC | 43 | 7 | 6 | 4 | 6 | 4 | 13 | 6 | 3 | 2 | 4 | 2 | 14 | 2 | 0 | 2 | 11 | 7 | 11 | 2 | 7 | 6 | 16 | 6 | 14 | 7 | 3 | 6 | 11 | 4 | 2 | 7 | 7 | 4 | 11 | 7 | 13 | 6 | 17 | 6 | 7 | 7 | 4 | 4 | 1 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 13 | 2 | 15 | 2 | 17 | 4 | 0 | 4 | 4 | 4 | 5 | 6 | 6 | 6 | 8 | 6 | 13 | 7 | 1 | 7 | 9 | 7 | 12 | 7 | 15 | 7 | 16 | 7 | 17
-INPUTS | 3 | cs/nOverlay0  | nAS_FSB  | fsb/ASrf
-INPUTMC | 2 | 6 | 6 | 0 | 7
-INPUTP | 1 | 54
-EQ | 3 | 
-   cs/nOverlay1.D = cs/nOverlay0;
-   cs/nOverlay1.CLK = CLK_FSB;	// GCK
-   cs/nOverlay1.CE = nAS_FSB & !fsb/ASrf;
-GLOBALS | 1 | 2 | CLK_FSB
+MACROCELL | 5 | 11 | nAS_IOBout
+ATTRIBUTES | 8816386 | 0
+OUTPUTMC | 1 | 3 | 1
+INPUTS | 4 | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd2  | iobm/IOS_FSM_FFd3  | nAoutOE
+INPUTMC | 4 | 0 | 16 | 5 | 9 | 5 | 2 | 3 | 1
+EQ | 4 | 
+   nAS_IOB.D = !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd2
+	# iobm/IOS_FSM_FFd1 & !iobm/IOS_FSM_FFd2;
+   !nAS_IOB.CLK = CLK2X_IOB;	// GCK
+   nAS_IOB.OE = !nAoutOE;
+GLOBALS | 1 | 2 | CLK2X_IOB
 
-MACROCELL | 7 | 6 | ram/Once
+MACROCELL | 5 | 8 | nLDS_IOBout
+ATTRIBUTES | 8685314 | 0
+INPUTS | 6 | IOL0  | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd2  | iobm/IOS_FSM_FFd1  | IORW0  | nAoutOE
+INPUTMC | 6 | 3 | 15 | 5 | 2 | 5 | 9 | 0 | 16 | 7 | 17 | 3 | 1
+EQ | 6 | 
+   !nLDS_IOB.D = IOL0 & !iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd2
+	# IOL0 & iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2
+	# !IORW0 & IOL0 & iobm/IOS_FSM_FFd3 & 
+	!iobm/IOS_FSM_FFd1;
+   !nLDS_IOB.CLK = CLK2X_IOB;	// GCK
+   nLDS_IOB.OE = !nAoutOE;
+GLOBALS | 1 | 2 | CLK2X_IOB
+
+MACROCELL | 5 | 10 | nUDS_IOBout
+ATTRIBUTES | 8685314 | 0
+INPUTS | 6 | IOU0  | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd2  | iobm/IOS_FSM_FFd1  | IORW0  | nAoutOE
+INPUTMC | 6 | 0 | 17 | 5 | 2 | 5 | 9 | 0 | 16 | 7 | 17 | 3 | 1
+EQ | 6 | 
+   !nUDS_IOB.D = IOU0 & !iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd2
+	# IOU0 & iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2
+	# !IORW0 & IOU0 & iobm/IOS_FSM_FFd3 & 
+	!iobm/IOS_FSM_FFd1;
+   !nUDS_IOB.CLK = CLK2X_IOB;	// GCK
+   nUDS_IOB.OE = !nAoutOE;
+GLOBALS | 1 | 2 | CLK2X_IOB
+
+MACROCELL | 4 | 15 | ram/Once
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 10 | 7 | 6 | 7 | 12 | 6 | 16 | 7 | 3 | 6 | 12 | 7 | 11 | 6 | 17 | 7 | 15 | 7 | 16 | 7 | 17
+OUTPUTMC | 10 | 4 | 15 | 4 | 3 | 6 | 0 | 6 | 6 | 6 | 12 | 4 | 4 | 4 | 8 | 4 | 16 | 4 | 17 | 6 | 17
 INPUTS | 10 | ram/Once  | nAS_FSB  | fsb/ASrf  | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | A_FSB<21>
-INPUTMC | 6 | 7 | 6 | 0 | 7 | 3 | 13 | 6 | 15 | 7 | 3 | 6 | 13
+INPUTMC | 6 | 4 | 15 | 0 | 3 | 3 | 9 | 6 | 16 | 6 | 6 | 6 | 12
 INPUTP | 4 | 54 | 36 | 30 | 29
 EQ | 13 | 
    ram/Once.T = ram/Once & nAS_FSB & !fsb/ASrf
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !ram/Once & 
+	# !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & 
 	!nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
 	!ram/RS_FSM_FFd3
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !ram/Once & 
+	# !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & 
 	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !nAS_FSB & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & 
+	!cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
+	!ram/RS_FSM_FFd3
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & 
+	!cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
 	!ram/RS_FSM_FFd3 & fsb/ASrf;
    ram/Once.CLK = CLK_FSB;	// GCK
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 6 | 2 | cnt/RefDone
+MACROCELL | 3 | 11 | cnt/RefDone
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 17 | 6 | 2 | 7 | 12 | 7 | 0 | 6 | 15 | 6 | 12 | 7 | 14 | 6 | 17 | 6 | 0 | 6 | 11 | 6 | 13 | 6 | 16 | 7 | 1 | 7 | 11 | 7 | 13 | 7 | 15 | 7 | 16 | 7 | 17
+OUTPUTMC | 18 | 3 | 11 | 4 | 3 | 4 | 0 | 6 | 16 | 6 | 12 | 4 | 7 | 6 | 0 | 4 | 1 | 4 | 4 | 4 | 5 | 4 | 6 | 4 | 8 | 4 | 16 | 4 | 17 | 6 | 1 | 6 | 13 | 6 | 14 | 6 | 17
 INPUTS | 10 | cnt/RefDone  | RefAck  | cnt/RefCnt<0>  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<1>  | cnt/RefCnt<2>  | cnt/RefCnt<3>  | cnt/RefCnt<4>  | cnt/RefCnt<7>
-INPUTMC | 10 | 6 | 2 | 0 | 16 | 0 | 15 | 0 | 10 | 0 | 9 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 11 | 0 | 8
+INPUTMC | 10 | 3 | 11 | 0 | 6 | 1 | 17 | 3 | 2 | 3 | 0 | 0 | 5 | 0 | 4 | 3 | 6 | 3 | 3 | 4 | 2
 EQ | 5 | 
    !cnt/RefDone.D = !cnt/RefDone & !RefAck
 	# !cnt/RefCnt<0> & !cnt/RefCnt<5> & !cnt/RefCnt<6> & 
@@ -60,45 +87,58 @@ EQ | 5 |
    cnt/RefDone.CLK = CLK_FSB;	// GCK
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 4 | 7 | iobs/Once
+MACROCELL | 7 | 13 | iobs/Once
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 14 | 4 | 7 | 4 | 15 | 4 | 17 | 2 | 12 | 3 | 17 | 4 | 3 | 7 | 8 | 4 | 12 | 4 | 0 | 4 | 1 | 4 | 5 | 4 | 6 | 4 | 8 | 4 | 16
-INPUTS | 10 | A_FSB<22>  | iobs/Once  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nAS_FSB  | fsb/ASrf  | A_FSB<23>  | A_FSB<20>  | EXP28_.EXP  | RA_4_OBUF.EXP
-INPUTMC | 6 | 4 | 7 | 4 | 3 | 3 | 6 | 0 | 7 | 4 | 6 | 4 | 8
-INPUTP | 4 | 30 | 54 | 36 | 28
-IMPORTS | 2 | 4 | 6 | 4 | 8
-EQ | 24 | 
+OUTPUTMC | 11 | 7 | 13 | 3 | 17 | 7 | 14 | 2 | 2 | 3 | 16 | 7 | 3 | 4 | 12 | 7 | 8 | 7 | 1 | 7 | 11 | 7 | 12
+INPUTS | 10 | A_FSB<22>  | iobs/Once  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nAS_FSB  | fsb/ASrf  | A_FSB<23>  | nADoutLE1  | EXP35_.EXP  | Park.EXP
+INPUTMC | 7 | 7 | 13 | 7 | 3 | 3 | 7 | 0 | 3 | 5 | 13 | 7 | 12 | 7 | 14
+INPUTP | 3 | 30 | 54 | 36
+IMPORTS | 2 | 7 | 12 | 7 | 14
+EQ | 25 | 
    !iobs/Once.D = nAS_FSB & !fsb/ASrf
 	# A_FSB<23> & !iobs/Once & iobs/PS_FSM_FFd2
-	# !A_FSB<23> & !A_FSB<20> & !iobs/Once
 	# A_FSB<22> & !iobs/Once & iobs/PS_FSM_FFd2
 	# A_FSB<22> & !iobs/Once & iobs/PS_FSM_FFd1
-;Imported pterms FB5_7
-	# A_FSB<23> & !iobs/Once & iobs/PS_FSM_FFd1
 	# !iobs/Once & iobs/PS_FSM_FFd2 & !nADoutLE1
+;Imported pterms FB8_13
+	# A_FSB<23> & !iobs/Once & iobs/PS_FSM_FFd1
 	# !iobs/Once & iobs/PS_FSM_FFd1 & !nADoutLE1
 	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & !iobs/Once
-	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 & 
-	!iobs/Once
-;Imported pterms FB5_6
+	# !A_FSB<23> & !A_FSB<22> & !iobs/Once & 
+	!cs/nOverlay1
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<20> & !iobs/Once
+;Imported pterms FB8_12
+	# !A_FSB<23> & A_FSB<21> & !iobs/Once & nWE_FSB
+	# !A_FSB<23> & !A_FSB<20> & !iobs/Once & SW<1>
 	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & 
 	!iobs/Once
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1 & !iobs/Once
-;Imported pterms FB5_9
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & !iobs/Once & 
+	cs/nOverlay1
+;Imported pterms FB8_15
 	# !A_FSB<23> & A_FSB<21> & !A_FSB<19> & !iobs/Once
 	# !A_FSB<23> & A_FSB<21> & !A_FSB<18> & !iobs/Once
 	# !A_FSB<23> & A_FSB<21> & !A_FSB<17> & !iobs/Once
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<16> & !iobs/Once
-	# !A_FSB<23> & A_FSB<21> & !iobs/Once & nWE_FSB;
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<16> & !iobs/Once;
    iobs/Once.CLK = CLK_FSB;	// GCK
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 4 | 15 | BERR_IOBS
+MACROCELL | 3 | 9 | cs/nOverlay1
+ATTRIBUTES | 8553280 | 0
+OUTPUTMC | 43 | 4 | 15 | 7 | 12 | 7 | 17 | 6 | 3 | 6 | 9 | 2 | 4 | 2 | 13 | 2 | 1 | 4 | 3 | 2 | 7 | 2 | 17 | 6 | 15 | 6 | 6 | 6 | 11 | 7 | 3 | 4 | 12 | 7 | 8 | 4 | 6 | 6 | 0 | 6 | 7 | 6 | 17 | 2 | 15 | 2 | 0 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 12 | 4 | 1 | 4 | 2 | 4 | 4 | 4 | 5 | 4 | 8 | 4 | 13 | 4 | 16 | 4 | 17 | 6 | 8 | 6 | 10 | 6 | 14 | 7 | 4 | 7 | 5 | 7 | 9 | 7 | 11
+INPUTS | 3 | cs/nOverlay0  | nAS_FSB  | fsb/ASrf
+INPUTMC | 2 | 3 | 12 | 0 | 3
+INPUTP | 1 | 54
+EQ | 3 | 
+   cs/nOverlay1.D = cs/nOverlay0;
+   cs/nOverlay1.CLK = CLK_FSB;	// GCK
+   cs/nOverlay1.CE = nAS_FSB & !fsb/ASrf;
+GLOBALS | 1 | 2 | CLK_FSB
+
+MACROCELL | 3 | 17 | BERR_IOBS
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 7 | 4 | 15 | 3 | 12 | 2 | 1 | 2 | 8 | 7 | 10 | 2 | 3 | 2 | 10
+OUTPUTMC | 7 | 3 | 17 | 3 | 8 | 2 | 14 | 2 | 8 | 7 | 10 | 2 | 10 | 2 | 16
 INPUTS | 8 | BERR_IOBS  | nAS_FSB  | fsb/ASrf  | iobs/Once  | iobs/PS_FSM_FFd2  | iobs/IOACTr  | IOBERR  | nADoutLE1
-INPUTMC | 7 | 4 | 15 | 0 | 7 | 4 | 7 | 4 | 3 | 0 | 0 | 5 | 17 | 5 | 13
+INPUTMC | 7 | 3 | 17 | 0 | 3 | 7 | 13 | 7 | 3 | 1 | 5 | 5 | 17 | 5 | 13
 INPUTP | 1 | 54
 EQ | 8 | 
    BERR_IOBS.T = BERR_IOBS & nAS_FSB & !fsb/ASrf
@@ -111,99 +151,62 @@ EQ | 8 |
    BERR_IOBS.CLK = CLK_FSB;	// GCK
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 4 | 17 | IORW0
+MACROCELL | 7 | 17 | IORW0
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 7 | 4 | 17 | 3 | 4 | 5 | 8 | 5 | 10 | 4 | 0 | 4 | 1 | 4 | 16
-INPUTS | 12 | IORW0  | iobs/IORW1  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nADoutLE1  | A_FSB<23>  | iobs/Once  | nWE_FSB  | nAS_FSB  | fsb/ASrf  | EXP26_.EXP  | EXP30_.EXP
-INPUTMC | 9 | 4 | 17 | 2 | 12 | 4 | 3 | 3 | 6 | 5 | 13 | 4 | 7 | 0 | 7 | 4 | 0 | 4 | 16
-INPUTP | 3 | 36 | 47 | 54
-IMPORTS | 2 | 4 | 0 | 4 | 16
-EQ | 60 | 
-   IORW0.T = IORW0 & !iobs/IORW1 & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & !nADoutLE1
-	# !IORW0 & iobs/IORW1 & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & !nADoutLE1
-	# A_FSB<23> & !iobs/Once & IORW0 & !nWE_FSB & 
-	!nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<23> & !iobs/Once & IORW0 & !nWE_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-	# A_FSB<23> & !iobs/Once & !IORW0 & nWE_FSB & 
-	!nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-;Imported pterms FB5_1
-	# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & 
-	!iobs/Once & IORW0 & !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & 
-	!iobs/Once & IORW0 & !nWE_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & 
-	!iobs/Once & IORW0 & !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & 
-	!iobs/Once & IORW0 & !nWE_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !iobs/Once & IORW0 & !nWE_FSB & !nAS_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-;Imported pterms FB5_2
-	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !iobs/Once & IORW0 & !nWE_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !iobs/Once & IORW0 & !nWE_FSB & !nAS_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !iobs/Once & IORW0 & !nWE_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-;Imported pterms FB5_17
-	# A_FSB<23> & !iobs/Once & !IORW0 & nWE_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !iobs/Once & 
-	IORW0 & !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !iobs/Once & 
-	IORW0 & !nWE_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
-	fsb/ASrf & nADoutLE1
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !iobs/Once & 
-	!IORW0 & nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !iobs/Once & 
-	!IORW0 & nWE_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
-	fsb/ASrf & nADoutLE1;
+OUTPUTMC | 6 | 5 | 8 | 5 | 10 | 7 | 17 | 3 | 4 | 7 | 0 | 7 | 1
+INPUTS | 12 | A_FSB<14>  | A_FSB<13>  | A_FSB<23>  | A_FSB<21>  | nADoutLE1  | A_FSB<22>  | cs/nOverlay1  | A_FSB<20>  | IORW0  | nWE_FSB  | EXP31_.EXP  | EXP36_.EXP
+INPUTMC | 5 | 5 | 13 | 3 | 9 | 7 | 17 | 7 | 0 | 7 | 16
+INPUTP | 7 | 19 | 18 | 36 | 29 | 30 | 28 | 47
+IMPORTS | 2 | 7 | 0 | 7 | 16
+EQ | 26 | 
+   !IORW0.T = !IORW0 & !nWE_FSB & nADoutLE1
+	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 & 
+	nADoutLE1
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<20> & nADoutLE1
+	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & 
+	nADoutLE1
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
+	cs/nOverlay1 & nADoutLE1
+;Imported pterms FB8_1
+	# IORW0 & iobs/IORW1 & !nADoutLE1
+	# !IORW0 & !iobs/IORW1 & !nADoutLE1
+	# nAS_FSB & !fsb/ASrf & nADoutLE1
+	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & nADoutLE1
+	# !A_FSB<23> & A_FSB<21> & !IORW0 & nADoutLE1
+;Imported pterms FB8_2
+	# iobs/PS_FSM_FFd2
+	# iobs/PS_FSM_FFd1
+	# iobs/Once & nADoutLE1
+	# IORW0 & nWE_FSB & nADoutLE1
+;Imported pterms FB8_17
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<19> & nADoutLE1
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<18> & nADoutLE1
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<17> & nADoutLE1
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<16> & nADoutLE1
+	# !A_FSB<23> & !A_FSB<20> & SW<1> & nADoutLE1;
    IORW0.CLK = CLK_FSB;	// GCK
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 6 | 6 | cs/nOverlay0
+MACROCELL | 3 | 12 | cs/nOverlay0
 ATTRIBUTES | 4358928 | 0
-OUTPUTMC | 3 | 3 | 13 | 6 | 6 | 6 | 7
-INPUTS | 11 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | cs/nOverlay0  | nAS_FSB  | fsb/ASrf  | nRES  | A_FSB<9>  | cs/nOverlay1  | ram/RASEL
-INPUTMC | 4 | 6 | 6 | 0 | 7 | 3 | 13 | 7 | 0
-INPUTP | 7 | 36 | 30 | 29 | 28 | 54 | 145 | 12
-EXPORTS | 1 | 6 | 7
-EQ | 8 | 
+OUTPUTMC | 2 | 3 | 9 | 3 | 12
+INPUTS | 8 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | cs/nOverlay0  | nAS_FSB  | fsb/ASrf  | nRES
+INPUTMC | 2 | 3 | 12 | 0 | 3
+INPUTP | 6 | 36 | 30 | 29 | 28 | 54 | 145
+EQ | 6 | 
    cs/nOverlay0.T = !A_FSB<23> & A_FSB<22> & !A_FSB<21> & !A_FSB<20> & 
 	!cs/nOverlay0 & !nAS_FSB
 	# !A_FSB<23> & A_FSB<22> & !A_FSB<21> & !A_FSB<20> & 
 	!cs/nOverlay0 & fsb/ASrf;
    cs/nOverlay0.CLK = CLK_FSB;	// GCK
    cs/nOverlay0.AR = !nRES;
-    cs/nOverlay0.EXP  =  A_FSB<9> & !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
-	ram/RASEL
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 3 | 16 | IOL0
+MACROCELL | 3 | 15 | IOL0
 ATTRIBUTES | 8553280 | 0
 OUTPUTMC | 1 | 5 | 8
 INPUTS | 5 | iobs/IOL1  | nADoutLE1  | nLDS_FSB  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1
-INPUTMC | 4 | 3 | 8 | 5 | 13 | 4 | 3 | 3 | 6
+INPUTMC | 4 | 0 | 15 | 5 | 13 | 7 | 3 | 3 | 7
 INPUTP | 1 | 49
 EQ | 4 | 
    IOL0.D = !nLDS_FSB & nADoutLE1
@@ -212,11 +215,11 @@ EQ | 4 |
    IOL0.CE = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1;
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 3 | 15 | IOU0
+MACROCELL | 0 | 17 | IOU0
 ATTRIBUTES | 8553280 | 0
 OUTPUTMC | 1 | 5 | 10
 INPUTS | 5 | iobs/IOU1  | nADoutLE1  | nUDS_FSB  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1
-INPUTMC | 4 | 3 | 7 | 5 | 13 | 4 | 3 | 3 | 6
+INPUTMC | 4 | 0 | 14 | 5 | 13 | 7 | 3 | 3 | 7
 INPUTP | 1 | 56
 EQ | 4 | 
    IOU0.D = !nUDS_FSB & nADoutLE1
@@ -225,17 +228,14 @@ EQ | 4 |
    IOU0.CE = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1;
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 6 | 11 | TimeoutA
+MACROCELL | 3 | 14 | TimeoutA
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 9 | 6 | 10 | 2 | 14 | 2 | 6 | 2 | 3 | 2 | 9 | 2 | 10 | 2 | 15 | 2 | 17 | 6 | 12
-INPUTS | 13 | A_FSB<22>  | A_FSB<21>  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | cs/nOverlay1  | cnt/RefDone  | nAS_FSB  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | fsb/ASrf  | RA_9_OBUF.EXP
-INPUTMC | 10 | 6 | 15 | 7 | 3 | 6 | 13 | 3 | 13 | 6 | 2 | 0 | 10 | 0 | 9 | 0 | 8 | 0 | 7 | 6 | 10
-INPUTP | 3 | 30 | 29 | 54
-EXPORTS | 1 | 6 | 12
-IMPORTS | 1 | 6 | 10
-EQ | 21 | 
-   TimeoutA.T = ;Imported pterms FB7_11
-	  TimeoutA & nAS_FSB & !fsb/ASrf
+OUTPUTMC | 8 | 3 | 14 | 2 | 4 | 2 | 12 | 2 | 6 | 2 | 5 | 2 | 9 | 2 | 10 | 2 | 15
+INPUTS | 10 | TimeoutA  | nAS_FSB  | fsb/ASrf  | cnt/RefCnt<0>  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<1>  | cnt/RefCnt<2>  | cnt/RefCnt<3>  | cnt/RefCnt<4>
+INPUTMC | 9 | 3 | 14 | 0 | 3 | 1 | 17 | 3 | 2 | 3 | 0 | 0 | 5 | 0 | 4 | 3 | 6 | 3 | 3
+INPUTP | 1 | 54
+EQ | 8 | 
+   TimeoutA.T = TimeoutA & nAS_FSB & !fsb/ASrf
 	# !TimeoutA & !nAS_FSB & !cnt/RefCnt<0> & 
 	!cnt/RefCnt<5> & !cnt/RefCnt<6> & !cnt/RefCnt<1> & !cnt/RefCnt<2> & 
 	!cnt/RefCnt<3> & !cnt/RefCnt<4>
@@ -243,31 +243,17 @@ EQ | 21 |
 	!cnt/RefCnt<6> & !cnt/RefCnt<1> & !cnt/RefCnt<2> & !cnt/RefCnt<3> & 
 	!cnt/RefCnt<4> & fsb/ASrf;
    TimeoutA.CLK = CLK_FSB;	// GCK
-    TimeoutA.EXP  =  A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
-	# A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
-	# !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
-	# !cnt/RefDone & !nAS_FSB & ram/RS_FSM_FFd2 & 
-	ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
-	cnt/RefCnt<7>
-	# !cnt/RefDone & ram/RS_FSM_FFd2 & ram/RS_FSM_FFd1 & 
-	ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & 
-	fsb/ASrf
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 6 | 0 | TimeoutB
+MACROCELL | 6 | 2 | TimeoutB
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 8 | 2 | 3 | 7 | 2 | 2 | 1 | 7 | 10 | 3 | 14 | 2 | 0 | 6 | 1 | 6 | 17
-INPUTS | 9 | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd3  | ram/RS_FSM_FFd1  | A_FSB<23>  | cnt/RefDone  | nAS_FSB  | ram/BACTr  | fsb/ASrf  | RA_1_OBUF.EXP
-INPUTMC | 7 | 6 | 15 | 6 | 13 | 7 | 3 | 6 | 2 | 3 | 0 | 0 | 7 | 6 | 1
-INPUTP | 2 | 36 | 54
-EXPORTS | 1 | 6 | 17
-IMPORTS | 1 | 6 | 1
-EQ | 16 | 
-   TimeoutB.T = ;Imported pterms FB7_2
-	  TimeoutB & nAS_FSB & !fsb/ASrf
+OUTPUTMC | 5 | 6 | 2 | 7 | 15 | 7 | 10 | 6 | 9 | 6 | 1
+INPUTS | 15 | TimeoutB  | nAS_FSB  | fsb/ASrf  | cnt/TimeoutBPre  | cnt/RefCnt<0>  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<1>  | cnt/RefCnt<2>  | cnt/RefCnt<3>  | cnt/RefCnt<4>  | cnt/RefCnt<7>  | A_FSB<11>  | ram/RASEL  | A_FSB<2>
+INPUTMC | 12 | 6 | 2 | 0 | 3 | 3 | 13 | 1 | 17 | 3 | 2 | 3 | 0 | 0 | 5 | 0 | 4 | 3 | 6 | 3 | 3 | 4 | 2 | 4 | 0
+INPUTP | 3 | 54 | 15 | 153
+EXPORTS | 1 | 6 | 1
+EQ | 10 | 
+   TimeoutB.T = TimeoutB & nAS_FSB & !fsb/ASrf
 	# !TimeoutB & cnt/TimeoutBPre & !nAS_FSB & 
 	!cnt/RefCnt<0> & !cnt/RefCnt<5> & !cnt/RefCnt<6> & !cnt/RefCnt<1> & 
 	!cnt/RefCnt<2> & !cnt/RefCnt<3> & !cnt/RefCnt<4> & !cnt/RefCnt<7>
@@ -275,20 +261,15 @@ EQ | 16 |
 	!cnt/RefCnt<5> & !cnt/RefCnt<6> & !cnt/RefCnt<1> & !cnt/RefCnt<2> & 
 	!cnt/RefCnt<3> & !cnt/RefCnt<4> & !cnt/RefCnt<7> & fsb/ASrf;
    TimeoutB.CLK = CLK_FSB;	// GCK
-    TimeoutB.EXP  =  ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3
-	# !ram/RS_FSM_FFd2 & ram/RS_FSM_FFd1
-	# !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3
-	# A_FSB<23> & !cnt/RefDone & !nAS_FSB & 
-	!ram/RS_FSM_FFd1 & !ram/BACTr
-	# A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 & 
-	!ram/BACTr & fsb/ASrf
+    TimeoutB.EXP  =  A_FSB<11> & !ram/RASEL
+	# ram/RASEL & A_FSB<2>
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 6 | 9 | cnt/TimeoutBPre
+MACROCELL | 3 | 13 | cnt/TimeoutBPre
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 2 | 6 | 9 | 6 | 1
+OUTPUTMC | 2 | 6 | 2 | 3 | 13
 INPUTS | 11 | cnt/TimeoutBPre  | nAS_FSB  | fsb/ASrf  | cnt/RefCnt<0>  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<1>  | cnt/RefCnt<2>  | cnt/RefCnt<3>  | cnt/RefCnt<4>  | cnt/RefCnt<7>
-INPUTMC | 10 | 6 | 9 | 0 | 7 | 0 | 15 | 0 | 10 | 0 | 9 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 11 | 0 | 8
+INPUTMC | 10 | 3 | 13 | 0 | 3 | 1 | 17 | 3 | 2 | 3 | 0 | 0 | 5 | 0 | 4 | 3 | 6 | 3 | 3 | 4 | 2
 INPUTP | 1 | 54
 EQ | 8 | 
    cnt/TimeoutBPre.T = cnt/TimeoutBPre & nAS_FSB & !fsb/ASrf
@@ -301,27 +282,25 @@ EQ | 8 |
    cnt/TimeoutBPre.CLK = CLK_FSB;	// GCK
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 7 | 2 | fsb/BERR0r
+MACROCELL | 7 | 15 | fsb/BERR0r
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 7 | 7 | 2 | 2 | 1 | 2 | 8 | 7 | 10 | 2 | 3 | 2 | 10 | 7 | 1
-INPUTS | 9 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | fsb/BERR0r  | TimeoutB  | nAS_FSB  | fsb/ASrf  | A_FSB<19>
-INPUTMC | 3 | 7 | 2 | 6 | 0 | 0 | 7
-INPUTP | 6 | 36 | 30 | 29 | 28 | 54 | 26
-EXPORTS | 1 | 7 | 1
-EQ | 6 | 
+OUTPUTMC | 6 | 7 | 15 | 2 | 14 | 2 | 8 | 7 | 10 | 2 | 10 | 2 | 16
+INPUTS | 8 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | fsb/BERR0r  | TimeoutB  | nAS_FSB  | fsb/ASrf
+INPUTMC | 3 | 7 | 15 | 6 | 2 | 0 | 3
+INPUTP | 5 | 36 | 30 | 29 | 28 | 54
+EQ | 5 | 
    !fsb/BERR0r.D = !TimeoutB & !fsb/BERR0r
 	# nAS_FSB & !fsb/ASrf
 	# !A_FSB<23> & A_FSB<22> & !A_FSB<21> & A_FSB<20> & 
 	!fsb/BERR0r;
    fsb/BERR0r.CLK = CLK_FSB;	// GCK
-    fsb/BERR0r.EXP  =  A_FSB<19>
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 3 | 12 | fsb/BERR1r
+MACROCELL | 3 | 8 | fsb/BERR1r
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 6 | 3 | 12 | 2 | 1 | 2 | 8 | 7 | 10 | 2 | 3 | 2 | 10
+OUTPUTMC | 6 | 3 | 8 | 2 | 14 | 2 | 8 | 7 | 10 | 2 | 10 | 2 | 16
 INPUTS | 4 | BERR_IOBS  | fsb/BERR1r  | nAS_FSB  | fsb/ASrf
-INPUTMC | 3 | 4 | 15 | 3 | 12 | 0 | 7
+INPUTMC | 3 | 3 | 17 | 3 | 8 | 0 | 3
 INPUTP | 1 | 54
 EQ | 3 | 
    !fsb/BERR1r.D = !BERR_IOBS & !fsb/BERR1r
@@ -331,9 +310,9 @@ GLOBALS | 1 | 2 | CLK_FSB
 
 MACROCELL | 6 | 3 | fsb/Ready0r
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 4 | 6 | 3 | 2 | 0 | 2 | 7 | 2 | 2
+OUTPUTMC | 3 | 6 | 3 | 6 | 9 | 6 | 10
 INPUTS | 8 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | cs/nOverlay1  | fsb/Ready0r  | ram/RAMReady  | nAS_FSB  | fsb/ASrf
-INPUTMC | 4 | 3 | 13 | 6 | 3 | 6 | 17 | 0 | 7
+INPUTMC | 4 | 3 | 9 | 6 | 3 | 6 | 0 | 0 | 3
 INPUTP | 4 | 36 | 30 | 29 | 54
 EQ | 6 | 
    !fsb/Ready0r.D = nAS_FSB & !fsb/ASrf
@@ -344,25 +323,28 @@ EQ | 6 |
    fsb/Ready0r.CLK = CLK_FSB;	// GCK
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 2 | 4 | fsb/Ready1r
+MACROCELL | 2 | 0 | fsb/Ready1r
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 8 | 2 | 4 | 2 | 0 | 2 | 7 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 9 | 2 | 10
-INPUTS | 17 | nAS_FSB  | fsb/ASrf  | A_FSB<23>  | fsb/Ready1r  | iobs/IOReady  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<14>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | nWE_FSB  | A_FSB<13>  | EXP17_.EXP
-INPUTMC | 5 | 0 | 7 | 2 | 4 | 3 | 17 | 3 | 13 | 2 | 5
-INPUTP | 12 | 54 | 36 | 30 | 29 | 28 | 19 | 26 | 24 | 23 | 22 | 47 | 18
-IMPORTS | 1 | 2 | 5
-EQ | 20 | 
+OUTPUTMC | 9 | 2 | 0 | 2 | 13 | 2 | 7 | 2 | 9 | 2 | 10 | 2 | 15 | 2 | 16 | 2 | 17 | 2 | 1
+INPUTS | 11 | nAS_FSB  | fsb/ASrf  | A_FSB<23>  | fsb/Ready1r  | iobs/IOReady  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | SW<1>  | cs/nOverlay1  | iobs/Clear1.EXP
+INPUTMC | 5 | 0 | 3 | 2 | 0 | 3 | 16 | 3 | 9 | 2 | 17
+INPUTP | 6 | 54 | 36 | 30 | 29 | 28 | 97
+EXPORTS | 1 | 2 | 1
+IMPORTS | 1 | 2 | 17
+EQ | 24 | 
    !fsb/Ready1r.D = nAS_FSB & !fsb/ASrf
 	# A_FSB<23> & !fsb/Ready1r & !iobs/IOReady
 	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r & 
 	!iobs/IOReady
+	# A_FSB<22> & !A_FSB<21> & !fsb/Ready1r & 
+	!iobs/IOReady & !SW<1>
+;Imported pterms FB3_18
 	# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
 	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & 
 	!fsb/Ready1r & !iobs/IOReady
 	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
 	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & 
 	!fsb/Ready1r & !iobs/IOReady
-;Imported pterms FB3_6
 	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
 	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
 	cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & !iobs/IOReady & 
@@ -372,16 +354,18 @@ EQ | 20 |
 	cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & !iobs/IOReady & 
 	!nADoutLE1;
    fsb/Ready1r.CLK = CLK_FSB;	// GCK
+    fsb/Ready1r.EXP  =  !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
+	cs/nOverlay1
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 2 | 14 | fsb/Ready2r
+MACROCELL | 2 | 4 | fsb/Ready2r
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 8 | 2 | 14 | 2 | 6 | 2 | 3 | 2 | 9 | 2 | 10 | 2 | 15 | 2 | 17 | 2 | 13
-INPUTS | 20 | A_FSB<9>  | A_FSB<15>  | A_FSB<14>  | A_FSB<13>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | nWE_FSB  | TimeoutA  | fsb/Ready2r  | EXP24_.EXP
-INPUTMC | 4 | 3 | 13 | 6 | 11 | 2 | 14 | 2 | 15
+OUTPUTMC | 8 | 2 | 4 | 2 | 12 | 2 | 6 | 2 | 5 | 2 | 9 | 2 | 10 | 2 | 15 | 2 | 3
+INPUTS | 20 | A_FSB<9>  | A_FSB<15>  | A_FSB<14>  | A_FSB<13>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | nWE_FSB  | TimeoutA  | fsb/Ready2r  | EXP16_.EXP
+INPUTMC | 4 | 3 | 9 | 3 | 14 | 2 | 4 | 2 | 5
 INPUTP | 16 | 12 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47
-EXPORTS | 1 | 2 | 13
-IMPORTS | 1 | 2 | 15
+EXPORTS | 1 | 2 | 3
+IMPORTS | 1 | 2 | 5
 EQ | 36 | 
    !fsb/Ready2r.D = A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
 	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
@@ -399,7 +383,7 @@ EQ | 36 |
 	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
 	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
 	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
-;Imported pterms FB3_16
+;Imported pterms FB3_6
 	# nAS_FSB & !fsb/ASrf
 	# A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
 	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
@@ -421,110 +405,103 @@ EQ | 36 |
     fsb/Ready2r.EXP  =  !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21>
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 2 | 1 | fsb/VPA
+MACROCELL | 2 | 14 | fsb/VPA
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 6 | 2 | 1 | 3 | 10 | 2 | 0 | 2 | 2 | 2 | 3 | 2 | 17
-INPUTS | 10 | fsb/BERR1r  | fsb/VPA  | $OpTx$FX_DC$609  | BERR_IOBS  | fsb/BERR0r  | A_FSB<20>  | TimeoutB  | A_FSB<23>  | EXP14_.EXP  | EXP15_.EXP
-INPUTMC | 8 | 3 | 12 | 2 | 1 | 0 | 17 | 4 | 15 | 7 | 2 | 6 | 0 | 2 | 0 | 2 | 2
-INPUTP | 2 | 28 | 36
-IMPORTS | 2 | 2 | 0 | 2 | 2
-EQ | 89 | 
-   fsb/VPA.D = BERR_IOBS & fsb/VPA & !$OpTx$FX_DC$609
-	# fsb/BERR0r & fsb/VPA & !$OpTx$FX_DC$609
-	# fsb/BERR1r & fsb/VPA & !$OpTx$FX_DC$609
-	# A_FSB<23> & TimeoutB & fsb/VPA & 
-	!$OpTx$FX_DC$609
-	# !A_FSB<20> & TimeoutB & fsb/VPA & 
-	!$OpTx$FX_DC$609
-;Imported pterms FB3_1
-	# !A_FSB<22> & TimeoutB & fsb/VPA & 
-	!$OpTx$FX_DC$609
-	# A_FSB<21> & TimeoutB & fsb/VPA & 
-	!$OpTx$FX_DC$609
+OUTPUTMC | 5 | 2 | 14 | 3 | 10 | 2 | 12 | 2 | 13 | 2 | 15
+INPUTS | 9 | fsb/BERR1r  | fsb/VPA  | $OpTx$FX_DC$708  | nBR_IOB  | fsb/BERR0r  | $OpTx$$OpTx$FX_DC$182_INV$783  | BERR_IOBS  | EXP22_.EXP  | EXP23_.EXP
+INPUTMC | 9 | 3 | 8 | 2 | 14 | 0 | 13 | 7 | 14 | 7 | 15 | 6 | 9 | 3 | 17 | 2 | 13 | 2 | 15
+IMPORTS | 2 | 2 | 13 | 2 | 15
+EQ | 83 | 
+   fsb/VPA.D = BERR_IOBS & fsb/VPA & !$OpTx$FX_DC$708
+	# fsb/BERR0r & fsb/VPA & !$OpTx$FX_DC$708
+	# fsb/BERR1r & fsb/VPA & !$OpTx$FX_DC$708
+	# fsb/VPA & !nBR_IOB & !$OpTx$FX_DC$708
+	# fsb/VPA & !$OpTx$FX_DC$708 & 
+	$OpTx$$OpTx$FX_DC$182_INV$783
+;Imported pterms FB3_14
 	# A_FSB<23> & !fsb/Ready1r & fsb/VPA & 
-	!iobs/IOReady & !$OpTx$FX_DC$609
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
-	!fsb/Ready0r & fsb/VPA & !ram/RAMReady & !$OpTx$FX_DC$609
+	!iobs/IOReady & !$OpTx$FX_DC$708
 	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r & 
-	fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$609
-;Imported pterms FB3_18
+	fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$708
+	# A_FSB<22> & !A_FSB<21> & !fsb/Ready1r & fsb/VPA & 
+	!iobs/IOReady & !SW<1> & !$OpTx$FX_DC$708
+	# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & 
+	!fsb/Ready1r & fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$708
+	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & 
+	!fsb/Ready1r & fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$708
+;Imported pterms FB3_13
 	# A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
+	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
 	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	fsb/VPA & !$OpTx$FX_DC$609
+	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
+	fsb/VPA & !$OpTx$FX_DC$708
+	# A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
+	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
+	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
+	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
+	fsb/VPA & !$OpTx$FX_DC$708
 	# A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
 	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
 	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
 	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	fsb/VPA & !$OpTx$FX_DC$609
+	fsb/VPA & !$OpTx$FX_DC$708
 	# A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
 	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
 	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
 	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	fsb/VPA & !$OpTx$FX_DC$609
-	# A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	fsb/VPA & !$OpTx$FX_DC$609
+	fsb/VPA & !$OpTx$FX_DC$708
 	# A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
+	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
 	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	fsb/VPA & !$OpTx$FX_DC$609
-;Imported pterms FB3_3
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !fsb/Ready0r & fsb/VPA & !ram/RAMReady & 
-	!$OpTx$FX_DC$609
-	# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & 
-	!fsb/Ready1r & fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$609
-	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & 
-	!fsb/Ready1r & fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$609
+	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
+	fsb/VPA & !$OpTx$FX_DC$708
+;Imported pterms FB3_16
 	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
 	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
 	cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & 
-	!nADoutLE1 & !$OpTx$FX_DC$609
+	!nADoutLE1 & !$OpTx$FX_DC$708
 	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
 	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
 	cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & 
-	!nADoutLE1 & !$OpTx$FX_DC$609
-;Imported pterms FB3_4
+	!nADoutLE1 & !$OpTx$FX_DC$708
 	# A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
+	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
 	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	fsb/VPA & !$OpTx$FX_DC$609
-	# A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
+	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
+	fsb/VPA & !$OpTx$FX_DC$708
+	# A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
+	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
 	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	fsb/VPA & !$OpTx$FX_DC$609
+	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
+	fsb/VPA & !$OpTx$FX_DC$708
 	# A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
+	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
 	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	fsb/VPA & !$OpTx$FX_DC$609
+	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
+	fsb/VPA & !$OpTx$FX_DC$708
+;Imported pterms FB3_17
 	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
 	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
 	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !TimeoutB & !fsb/BERR0r & 
-	!fsb/BERR1r & fsb/Ready1r & !$OpTx$FX_DC$609
+	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
+	fsb/Ready1r & nBR_IOB & !$OpTx$FX_DC$708 & 
+	!$OpTx$$OpTx$FX_DC$182_INV$783
 	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
 	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
 	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !TimeoutB & !fsb/BERR0r & 
-	!fsb/BERR1r & iobs/IOReady & !$OpTx$FX_DC$609;
+	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
+	iobs/IOReady & nBR_IOB & !$OpTx$FX_DC$708 & 
+	!$OpTx$$OpTx$FX_DC$182_INV$783;
    fsb/VPA.CLK = CLK_FSB;	// GCK
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 3 | 8 | iobs/IOL1
+MACROCELL | 0 | 15 | iobs/IOL1
 ATTRIBUTES | 8553280 | 0
-OUTPUTMC | 1 | 3 | 16
+OUTPUTMC | 1 | 3 | 15
 INPUTS | 2 | nLDS_FSB  | iobs/Load1
-INPUTMC | 1 | 7 | 8
+INPUTMC | 1 | 4 | 12
 INPUTP | 1 | 49
 EQ | 3 | 
    iobs/IOL1.D = !nLDS_FSB;
@@ -532,42 +509,44 @@ EQ | 3 |
    iobs/IOL1.CE = iobs/Load1;
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 2 | 12 | iobs/IORW1
+MACROCELL | 2 | 2 | iobs/IORW1
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 3 | 4 | 17 | 2 | 12 | 2 | 11
-INPUTS | 9 | A_FSB<23>  | A_FSB<21>  | iobs/IORW1  | nADoutLE1  | iobs/Once  | A_FSB<20>  | nWE_FSB  | EXP22_.EXP  | EXP23_.EXP
-INPUTMC | 5 | 2 | 12 | 5 | 13 | 4 | 7 | 2 | 11 | 2 | 13
-INPUTP | 4 | 36 | 29 | 28 | 47
-IMPORTS | 2 | 2 | 11 | 2 | 13
-EQ | 21 | 
+OUTPUTMC | 2 | 7 | 0 | 2 | 2
+INPUTS | 8 | A_FSB<23>  | A_FSB<21>  | iobs/IORW1  | nADoutLE1  | iobs/Once  | nWE_FSB  | EXP14_.EXP  | EXP15_.EXP
+INPUTMC | 5 | 2 | 2 | 5 | 13 | 7 | 13 | 2 | 1 | 2 | 3
+INPUTP | 3 | 36 | 29 | 47
+IMPORTS | 2 | 2 | 1 | 2 | 3
+EQ | 23 | 
    !iobs/IORW1.T = iobs/Once
 	# !nADoutLE1
-	# !A_FSB<23> & !A_FSB<20>
 	# nWE_FSB & iobs/IORW1
-	# !A_FSB<23> & A_FSB<21> & !iobs/IORW1
-;Imported pterms FB3_12
 	# !nWE_FSB & !iobs/IORW1
+	# !A_FSB<23> & A_FSB<21> & !iobs/IORW1
+;Imported pterms FB3_2
 	# nAS_FSB & !fsb/ASrf
 	# !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
 	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21>
 	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1
-;Imported pterms FB3_14
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<20>
+;Imported pterms FB3_1
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
+	cs/nOverlay1
+;Imported pterms FB3_4
 	# !A_FSB<23> & A_FSB<21> & !A_FSB<19>
 	# !A_FSB<23> & A_FSB<21> & !A_FSB<18>
 	# !A_FSB<23> & A_FSB<21> & !A_FSB<17>
 	# !A_FSB<23> & A_FSB<21> & !A_FSB<16>
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1
-;Imported pterms FB3_15
+	# !A_FSB<23> & !A_FSB<20> & SW<1>
+;Imported pterms FB3_5
 	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21>;
    iobs/IORW1.CLK = CLK_FSB;	// GCK
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 3 | 17 | iobs/IOReady
+MACROCELL | 3 | 16 | iobs/IOReady
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 9 | 2 | 4 | 2 | 0 | 3 | 17 | 2 | 7 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 9 | 2 | 10
+OUTPUTMC | 9 | 2 | 0 | 2 | 13 | 3 | 16 | 2 | 7 | 2 | 9 | 2 | 10 | 2 | 15 | 2 | 16 | 2 | 17
 INPUTS | 8 | iobs/IOReady  | nAS_FSB  | fsb/ASrf  | iobs/Once  | iobs/PS_FSM_FFd2  | iobs/IOACTr  | IOBERR  | nADoutLE1
-INPUTMC | 7 | 3 | 17 | 0 | 7 | 4 | 7 | 4 | 3 | 0 | 0 | 5 | 17 | 5 | 13
+INPUTMC | 7 | 3 | 16 | 0 | 3 | 7 | 13 | 7 | 3 | 1 | 5 | 5 | 17 | 5 | 13
 INPUTP | 1 | 54
 EQ | 8 | 
    iobs/IOReady.T = iobs/IOReady & nAS_FSB & !fsb/ASrf
@@ -580,11 +559,11 @@ EQ | 8 |
    iobs/IOReady.CLK = CLK_FSB;	// GCK
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 3 | 7 | iobs/IOU1
+MACROCELL | 0 | 14 | iobs/IOU1
 ATTRIBUTES | 8553280 | 0
-OUTPUTMC | 1 | 3 | 15
+OUTPUTMC | 1 | 0 | 17
 INPUTS | 2 | nUDS_FSB  | iobs/Load1
-INPUTMC | 1 | 7 | 8
+INPUTMC | 1 | 4 | 12
 INPUTP | 1 | 56
 EQ | 3 | 
    iobs/IOU1.D = !nUDS_FSB;
@@ -592,70 +571,61 @@ EQ | 3 |
    iobs/IOU1.CE = iobs/Load1;
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 7 | 12 | ram/RAMDIS2
+MACROCELL | 4 | 3 | ram/RAMDIS2
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 6 | 7 | 12 | 7 | 4 | 7 | 5 | 7 | 7 | 7 | 11 | 7 | 13
-INPUTS | 15 | ram/RAMDIS2  | nAS_FSB  | fsb/ASrf  | ram/Once  | cnt/RefDone  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | A_FSB<22>  | A_FSB<21>  | cs/nOverlay1  | nBERR_FSB_OBUF.EXP
-INPUTMC | 12 | 7 | 12 | 0 | 7 | 7 | 6 | 6 | 2 | 6 | 15 | 7 | 3 | 6 | 13 | 0 | 10 | 0 | 9 | 0 | 8 | 3 | 13 | 7 | 11
-INPUTP | 3 | 54 | 30 | 29
-EXPORTS | 1 | 7 | 13
-IMPORTS | 1 | 7 | 11
-EQ | 31 | 
+OUTPUTMC | 4 | 4 | 3 | 4 | 4 | 7 | 5 | 7 | 6
+INPUTS | 15 | ram/RAMDIS2  | nAS_FSB  | fsb/ASrf  | ram/Once  | cnt/RefDone  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | nCAS_OBUF.EXP
+INPUTMC | 12 | 4 | 3 | 0 | 3 | 4 | 15 | 3 | 11 | 6 | 16 | 6 | 6 | 6 | 12 | 3 | 2 | 3 | 0 | 4 | 2 | 3 | 9 | 4 | 4
+INPUTP | 3 | 54 | 36 | 30
+IMPORTS | 1 | 4 | 4
+EQ | 25 | 
    ram/RAMDIS2.T = ram/RAMDIS2 & nAS_FSB & !fsb/ASrf
 	# ram/Once & !cnt/RefDone & !ram/RAMDIS2 & !nAS_FSB & 
 	ram/RS_FSM_FFd2 & ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3 & 
 	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-;Imported pterms FB8_12
 	# ram/Once & !cnt/RefDone & !ram/RAMDIS2 & 
 	ram/RS_FSM_FFd2 & ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3 & 
 	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & ram/Once & 
-	!cnt/RefDone & !ram/RAMDIS2 & !nAS_FSB & !ram/RS_FSM_FFd2 & 
+	# !A_FSB<23> & !A_FSB<22> & ram/Once & !cnt/RefDone & 
+	cs/nOverlay1 & !ram/RAMDIS2 & !nAS_FSB & !ram/RS_FSM_FFd2 & 
 	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
 	cnt/RefCnt<7>
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & ram/Once & 
-	!cnt/RefDone & !ram/RAMDIS2 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
+	# !A_FSB<23> & !A_FSB<22> & ram/Once & !cnt/RefDone & 
+	cs/nOverlay1 & !ram/RAMDIS2 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
 	!ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & 
 	fsb/ASrf
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & ram/Once & !cnt/RefDone & !ram/RAMDIS2 & !nAS_FSB & 
+;Imported pterms FB5_5
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & ram/Once & 
+	!cnt/RefDone & !cs/nOverlay1 & !ram/RAMDIS2 & !nAS_FSB & 
 	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & 
 	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & ram/Once & !cnt/RefDone & !ram/RAMDIS2 & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & 
-	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf;
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & ram/Once & 
+	!cnt/RefDone & !cs/nOverlay1 & !ram/RAMDIS2 & !ram/RS_FSM_FFd2 & 
+	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
+	cnt/RefCnt<7> & fsb/ASrf;
    ram/RAMDIS2.CLK = CLK_FSB;	// GCK
-    ram/RAMDIS2.EXP  =  A_FSB<22> & !A_FSB<21> & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
 GLOBALS | 1 | 2 | CLK_FSB
 
 MACROCELL | 2 | 8 | nDTACK_FSB_OBUF
 ATTRIBUTES | 8815362 | 0
 OUTPUTMC | 5 | 2 | 8 | 2 | 6 | 2 | 7 | 2 | 9 | 2 | 10
-INPUTS | 9 | fsb/BERR1r  | nDTACK_FSB  | BERR_IOBS  | fsb/BERR0r  | $OpTx$FX_DC$610  | nAS_FSB  | fsb/ASrf  | EXP19_.EXP  | EXP20_.EXP
-INPUTMC | 8 | 3 | 12 | 2 | 8 | 4 | 15 | 7 | 2 | 3 | 14 | 0 | 7 | 2 | 7 | 2 | 9
-INPUTP | 1 | 54
+INPUTS | 8 | fsb/BERR1r  | nDTACK_FSB  | nBR_IOB  | fsb/BERR0r  | $OpTx$$OpTx$FX_DC$182_INV$783  | BERR_IOBS  | EXP18_.EXP  | EXP19_.EXP
+INPUTMC | 8 | 3 | 8 | 2 | 8 | 7 | 14 | 7 | 15 | 6 | 9 | 3 | 17 | 2 | 7 | 2 | 9
 IMPORTS | 2 | 2 | 7 | 2 | 9
-EQ | 82 | 
+EQ | 81 | 
    nDTACK_FSB.D = BERR_IOBS & nDTACK_FSB
 	# fsb/BERR0r & nDTACK_FSB
 	# fsb/BERR1r & nDTACK_FSB
-	# nAS_FSB & !fsb/ASrf
-	# nDTACK_FSB & !$OpTx$FX_DC$610
+	# nDTACK_FSB & !nBR_IOB
+	# nDTACK_FSB & $OpTx$$OpTx$FX_DC$182_INV$783
 ;Imported pterms FB3_8
+	# nAS_FSB & !fsb/ASrf
 	# A_FSB<23> & !fsb/Ready1r & !iobs/IOReady & 
 	nDTACK_FSB
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
-	!fsb/Ready0r & nDTACK_FSB & !ram/RAMReady
 	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r & 
 	!iobs/IOReady & nDTACK_FSB
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !fsb/Ready0r & nDTACK_FSB & !ram/RAMReady
+	# A_FSB<22> & !A_FSB<21> & !fsb/Ready1r & 
+	!iobs/IOReady & !SW<1> & nDTACK_FSB
 	# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
 	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & 
 	!fsb/Ready1r & !iobs/IOReady & nDTACK_FSB
@@ -717,23 +687,23 @@ EQ | 82 |
 	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
 	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
 	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	fsb/Ready1r & $OpTx$FX_DC$610
+	fsb/Ready1r & nBR_IOB & !$OpTx$$OpTx$FX_DC$182_INV$783
 	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
 	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
 	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
 	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	iobs/IOReady & $OpTx$FX_DC$610;
+	iobs/IOReady & nBR_IOB & !$OpTx$$OpTx$FX_DC$182_INV$783;
    nDTACK_FSB.CLK = CLK_FSB;	// GCK
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 7 | 0 | ram/RASEL
+MACROCELL | 4 | 0 | ram/RASEL
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 12 | 6 | 5 | 6 | 1 | 4 | 13 | 4 | 10 | 4 | 4 | 4 | 9 | 4 | 14 | 6 | 4 | 6 | 7 | 6 | 10 | 6 | 6 | 6 | 8
-INPUTS | 13 | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd3  | ram/RS_FSM_FFd1  | A_FSB<23>  | cnt/RefDone  | nAS_FSB  | ram/BACTr  | fsb/ASrf  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | A_FSB_19_IBUF$BUF0.EXP  | EXP39_.EXP
-INPUTMC | 11 | 6 | 15 | 6 | 13 | 7 | 3 | 6 | 2 | 3 | 0 | 0 | 7 | 0 | 10 | 0 | 9 | 0 | 8 | 7 | 1 | 7 | 17
+OUTPUTMC | 10 | 6 | 5 | 6 | 7 | 6 | 10 | 4 | 10 | 4 | 4 | 4 | 9 | 4 | 14 | 6 | 4 | 6 | 2 | 6 | 8
+INPUTS | 13 | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd3  | ram/RS_FSM_FFd1  | A_FSB<23>  | cnt/RefDone  | nAS_FSB  | ram/BACTr  | fsb/ASrf  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | nROMCS_OBUF.EXP  | EXP27_.EXP
+INPUTMC | 11 | 6 | 16 | 6 | 12 | 6 | 6 | 3 | 11 | 0 | 0 | 0 | 3 | 3 | 2 | 3 | 0 | 4 | 2 | 4 | 1 | 4 | 17
 INPUTP | 2 | 36 | 54
-IMPORTS | 2 | 7 | 1 | 7 | 17
-EQ | 50 | 
+IMPORTS | 2 | 4 | 1 | 4 | 17
+EQ | 48 | 
    ram/RASEL.D = !ram/RS_FSM_FFd2 & ram/RS_FSM_FFd3
 	# ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
 	!ram/RS_FSM_FFd3
@@ -743,12 +713,12 @@ EQ | 50 |
 	!ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
 	# A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd2 & 
 	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-;Imported pterms FB8_2
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
+;Imported pterms FB5_2
+	# A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & 
 	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
+	# !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & 
 	!nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
+	# !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & 
 	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
 	# !cnt/RefDone & nAS_FSB & !ram/RS_FSM_FFd2 & 
 	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & 
@@ -756,43 +726,41 @@ EQ | 50 |
 	# !cnt/RefDone & nAS_FSB & ram/RS_FSM_FFd1 & 
 	ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & 
 	!fsb/ASrf
-;Imported pterms FB8_18
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !ram/Once & 
+;Imported pterms FB5_18
+	# !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & 
 	!nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !ram/Once & 
+	# !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & 
 	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & fsb/ASrf
 	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & !nAS_FSB & 
 	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr
 	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & 
 	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
+	# A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & 
 	!nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr
-;Imported pterms FB8_17
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !nAS_FSB & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
-	fsb/ASrf
+;Imported pterms FB5_17
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & 
+	!cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & 
+	!cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & fsb/ASrf
 	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & 
 	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
 	cnt/RefCnt<7>
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
+	# A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & 
 	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
 	cnt/RefCnt<7>
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
+	# !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & 
 	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
 	cnt/RefCnt<7>;
    ram/RASEL.CLK = CLK_FSB;	// GCK
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 6 | 15 | ram/RS_FSM_FFd2
+MACROCELL | 6 | 16 | ram/RS_FSM_FFd2
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 17 | 7 | 6 | 7 | 12 | 7 | 0 | 6 | 15 | 7 | 3 | 6 | 13 | 0 | 16 | 7 | 14 | 6 | 12 | 6 | 0 | 6 | 11 | 7 | 1 | 7 | 11 | 7 | 15 | 7 | 16 | 7 | 17 | 6 | 16
-INPUTS | 9 | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd3  | cnt/RefDone  | ram/RS_FSM_FFd1  | cnt/RefCnt<6>  | ram/BACTr  | cnt/RefCnt<7>  | cnt/RefCnt<5>  | EXP32_.EXP
-INPUTMC | 9 | 6 | 15 | 6 | 13 | 6 | 2 | 7 | 3 | 0 | 9 | 3 | 0 | 0 | 8 | 0 | 10 | 6 | 14
-EXPORTS | 1 | 6 | 16
-IMPORTS | 1 | 6 | 14
+OUTPUTMC | 18 | 4 | 15 | 4 | 3 | 4 | 0 | 6 | 16 | 6 | 6 | 6 | 12 | 0 | 6 | 4 | 7 | 4 | 17 | 4 | 1 | 4 | 4 | 4 | 8 | 4 | 16 | 6 | 1 | 6 | 11 | 6 | 13 | 6 | 14 | 6 | 17
+INPUTS | 9 | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd3  | cnt/RefDone  | ram/RS_FSM_FFd1  | cnt/RefCnt<6>  | ram/BACTr  | cnt/RefCnt<7>  | cnt/RefCnt<5>  | EXP29_.EXP
+INPUTMC | 9 | 6 | 16 | 6 | 12 | 3 | 11 | 6 | 6 | 3 | 0 | 0 | 0 | 4 | 2 | 3 | 2 | 6 | 15
+EXPORTS | 1 | 6 | 17
+IMPORTS | 1 | 6 | 15
 EQ | 30 | 
    !ram/RS_FSM_FFd2.T = ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3
 	# cnt/RefDone & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
@@ -800,7 +768,7 @@ EQ | 30 |
 	!cnt/RefCnt<6> & ram/BACTr
 	# !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & ram/BACTr & 
 	!cnt/RefCnt<7>
-;Imported pterms FB7_15
+;Imported pterms FB7_16
 	# !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & 
 	!cnt/RefCnt<5> & ram/BACTr
 	# nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & 
@@ -811,7 +779,7 @@ EQ | 30 |
 	!cnt/RefCnt<7> & !fsb/ASrf
 	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB & 
 	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
-;Imported pterms FB7_14
+;Imported pterms FB7_15
 	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
 	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf
 	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
@@ -826,58 +794,38 @@ EQ | 30 |
 	cnt/RefCnt<7>
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 5 | 6 | iobm/IOS_FSM_FFd4
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 14 | 5 | 6 | 5 | 9 | 3 | 9 | 3 | 11 | 5 | 15 | 5 | 17 | 5 | 2 | 5 | 11 | 5 | 16 | 3 | 4 | 5 | 8 | 5 | 10 | 5 | 0 | 5 | 14
-INPUTS | 6 | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd2  | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd4  | iobm/IOREQr  | CLK_IOB
-INPUTMC | 5 | 5 | 9 | 3 | 9 | 3 | 11 | 5 | 6 | 0 | 1
-INPUTP | 1 | 35
-EQ | 9 | 
-   !iobm/IOS_FSM_FFd4.D = !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd3 & 
-	iobm/IOS_FSM_FFd1
-	# iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd2 & 
-	iobm/IOS_FSM_FFd1
-	# !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd3 & 
-	!iobm/IOS_FSM_FFd2 & CLK_IOB
-	# !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd3 & 
-	!iobm/IOS_FSM_FFd2 & !iobm/IOREQr;
-   iobm/IOS_FSM_FFd4.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 7 | 3 | ram/RS_FSM_FFd1
+MACROCELL | 6 | 6 | ram/RS_FSM_FFd1
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 20 | 7 | 6 | 7 | 12 | 7 | 0 | 6 | 15 | 7 | 3 | 6 | 13 | 0 | 16 | 7 | 14 | 6 | 17 | 6 | 0 | 6 | 11 | 6 | 12 | 6 | 14 | 6 | 16 | 7 | 1 | 7 | 11 | 7 | 13 | 7 | 15 | 7 | 16 | 7 | 17
-INPUTS | 10 | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | ram/Once  | nAS_FSB  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | fsb/ASrf  | A_FSB<21>
-INPUTMC | 6 | 3 | 13 | 7 | 6 | 6 | 15 | 7 | 3 | 6 | 13 | 0 | 7
+OUTPUTMC | 22 | 4 | 15 | 4 | 3 | 4 | 0 | 6 | 16 | 6 | 6 | 6 | 12 | 0 | 6 | 4 | 7 | 6 | 0 | 4 | 1 | 4 | 4 | 4 | 5 | 4 | 6 | 4 | 8 | 4 | 16 | 4 | 17 | 6 | 1 | 6 | 11 | 6 | 13 | 6 | 14 | 6 | 15 | 6 | 17
+INPUTS | 10 | A_FSB<23>  | A_FSB<22>  | ram/Once  | cs/nOverlay1  | nAS_FSB  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | fsb/ASrf  | A_FSB<21>
+INPUTMC | 6 | 4 | 15 | 3 | 9 | 6 | 16 | 6 | 6 | 6 | 12 | 0 | 3
 INPUTP | 4 | 36 | 30 | 54 | 29
 EQ | 13 | 
    ram/RS_FSM_FFd1.T = ram/RS_FSM_FFd2 & ram/RS_FSM_FFd3
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !ram/Once & 
+	# !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & 
 	!nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
 	!ram/RS_FSM_FFd3
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !ram/Once & 
+	# !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & 
 	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !nAS_FSB & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & 
+	!cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
+	!ram/RS_FSM_FFd3
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & 
+	!cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
 	!ram/RS_FSM_FFd3 & fsb/ASrf;
    ram/RS_FSM_FFd1.CLK = CLK_FSB;	// GCK
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 6 | 13 | ram/RS_FSM_FFd3
+MACROCELL | 6 | 12 | ram/RS_FSM_FFd3
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 14 | 7 | 6 | 7 | 12 | 7 | 0 | 6 | 15 | 7 | 3 | 6 | 13 | 7 | 14 | 6 | 14 | 6 | 0 | 6 | 11 | 6 | 12 | 7 | 1 | 7 | 11 | 7 | 15
-INPUTS | 14 | A_FSB<23>  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | A_FSB<22>  | cs/nOverlay1  | fsb/ASrf  | A_FSB<21>  | nAS_FSB  | cnt/RefDone  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | EXP31_.EXP
-INPUTMC | 10 | 6 | 15 | 7 | 3 | 6 | 13 | 3 | 13 | 0 | 7 | 6 | 2 | 0 | 10 | 0 | 9 | 0 | 8 | 6 | 12
-INPUTP | 4 | 36 | 30 | 29 | 54
-EXPORTS | 1 | 6 | 14
-IMPORTS | 1 | 6 | 12
-EQ | 36 | 
+OUTPUTMC | 15 | 4 | 15 | 4 | 3 | 4 | 0 | 6 | 16 | 6 | 6 | 6 | 12 | 4 | 7 | 4 | 8 | 4 | 1 | 4 | 4 | 6 | 1 | 6 | 11 | 6 | 13 | 6 | 14 | 6 | 15
+INPUTS | 11 | A_FSB<23>  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | ram/Once  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | cnt/RefDone  | cnt/RefCnt<5>  | CLK25EN_OBUF.EXP  | CLK20EN_OBUF$BUF0.EXP
+INPUTMC | 10 | 6 | 16 | 6 | 6 | 6 | 12 | 4 | 15 | 3 | 0 | 4 | 2 | 3 | 11 | 3 | 2 | 6 | 11 | 6 | 13
+INPUTP | 1 | 36
+IMPORTS | 2 | 6 | 11 | 6 | 13
+EQ | 27 | 
    !ram/RS_FSM_FFd3.T = A_FSB<23> & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
 	!ram/RS_FSM_FFd3
-;Imported pterms FB7_13
 	# ram/Once & cnt/RefDone & !ram/RS_FSM_FFd2 & 
 	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
 	# ram/Once & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
@@ -886,8 +834,6 @@ EQ | 36 |
 	!ram/RS_FSM_FFd3 & !cnt/RefCnt<6>
 	# ram/Once & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
 	!ram/RS_FSM_FFd3 & !cnt/RefCnt<7>
-	# nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
-	!ram/RS_FSM_FFd3 & !fsb/ASrf
 ;Imported pterms FB7_12
 	# A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd2 & 
 	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
@@ -895,6 +841,9 @@ EQ | 36 |
 	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
 	# !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd2 & 
 	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
+	# nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
+	!ram/RS_FSM_FFd3 & !fsb/ASrf
+;Imported pterms FB7_14
 	# !cnt/RefDone & !nAS_FSB & ram/RS_FSM_FFd2 & 
 	ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
 	cnt/RefCnt<7>
@@ -902,94 +851,89 @@ EQ | 36 |
 	ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & 
 	fsb/ASrf;
    ram/RS_FSM_FFd3.CLK = CLK_FSB;	// GCK
-    ram/RS_FSM_FFd3.EXP  =  !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
-	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf
-	# !cnt/RefDone & nAS_FSB & ram/RS_FSM_FFd2 & 
-	ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & 
-	!fsb/ASrf
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 5 | 9 | iobm/IOS_FSM_FFd3
+MACROCELL | 5 | 2 | iobm/IOS_FSM_FFd3
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 13 | 5 | 6 | 5 | 9 | 3 | 9 | 3 | 11 | 5 | 15 | 5 | 17 | 5 | 2 | 5 | 11 | 5 | 16 | 3 | 4 | 5 | 8 | 5 | 10 | 5 | 0
-INPUTS | 10 | iobm/IOS_FSM_FFd4  | iobm/IOS_FSM_FFd3  | CLK_IOB  | iobm/ETACK  | iobm/BERRrf  | iobm/BERRrr  | iobm/DTACKrf  | iobm/DTACKrr  | iobm/RESrf  | iobm/RESrr
-INPUTMC | 9 | 5 | 6 | 5 | 9 | 5 | 0 | 0 | 6 | 0 | 5 | 0 | 4 | 0 | 3 | 1 | 16 | 1 | 15
+OUTPUTMC | 13 | 5 | 11 | 5 | 8 | 5 | 10 | 5 | 2 | 0 | 16 | 5 | 9 | 5 | 15 | 5 | 17 | 5 | 6 | 3 | 4 | 5 | 0 | 5 | 14 | 5 | 16
+INPUTS | 6 | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd2  | iobm/IOS_FSM_FFd3  | CLK_IOB  | iobm/IOREQr  | nAoutOE
+INPUTMC | 5 | 0 | 16 | 5 | 9 | 5 | 2 | 1 | 8 | 3 | 1
 INPUTP | 1 | 35
-EQ | 9 | 
-   !iobm/IOS_FSM_FFd3.D = !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd3
-	# !iobm/IOS_FSM_FFd4 & CLK_IOB & iobm/ETACK
-	# !iobm/IOS_FSM_FFd4 & CLK_IOB & iobm/DTACKrf & 
-	iobm/DTACKrr
-	# !iobm/IOS_FSM_FFd4 & CLK_IOB & iobm/BERRrf & 
-	iobm/BERRrr
-	# !iobm/IOS_FSM_FFd4 & CLK_IOB & iobm/RESrf & 
-	iobm/RESrr;
+EQ | 6 | 
+   iobm/IOS_FSM_FFd3.D = iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2
+	# iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd1 & 
+	!iobm/IOS_FSM_FFd2
+	# !CLK_IOB & !iobm/IOS_FSM_FFd1 & !iobm/IOS_FSM_FFd2 & 
+	iobm/IOREQr & !nAoutOE;
    iobm/IOS_FSM_FFd3.CLK = CLK2X_IOB;	// GCK
 GLOBALS | 1 | 2 | CLK2X_IOB
 
-MACROCELL | 3 | 9 | iobm/IOS_FSM_FFd2
+MACROCELL | 0 | 16 | iobm/IOS_FSM_FFd1
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 13 | 5 | 6 | 3 | 9 | 3 | 11 | 5 | 15 | 5 | 17 | 5 | 2 | 5 | 11 | 3 | 4 | 5 | 8 | 5 | 10 | 5 | 0 | 5 | 14 | 5 | 16
-INPUTS | 4 | iobm/IOS_FSM_FFd4  | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd2
-INPUTMC | 4 | 5 | 6 | 5 | 9 | 3 | 11 | 3 | 9
-EQ | 5 | 
-   !iobm/IOS_FSM_FFd2.D = !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd3 & 
-	iobm/IOS_FSM_FFd1
-	# !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd2 & 
-	!iobm/IOS_FSM_FFd1;
-   iobm/IOS_FSM_FFd2.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 3 | 11 | iobm/IOS_FSM_FFd1
-ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 12 | 5 | 6 | 3 | 9 | 3 | 11 | 5 | 15 | 5 | 17 | 5 | 2 | 5 | 11 | 5 | 16 | 5 | 8 | 5 | 10 | 5 | 0 | 5 | 14
-INPUTS | 4 | iobm/IOS_FSM_FFd4  | iobm/IOS_FSM_FFd2  | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd3
-INPUTMC | 4 | 5 | 6 | 3 | 9 | 3 | 11 | 5 | 9
-EQ | 5 | 
-   !iobm/IOS_FSM_FFd1.D = iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd2 & 
-	!iobm/IOS_FSM_FFd1
-	# !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd3 & 
-	!iobm/IOS_FSM_FFd2;
+OUTPUTMC | 12 | 5 | 11 | 5 | 8 | 5 | 10 | 5 | 2 | 0 | 16 | 5 | 9 | 5 | 15 | 5 | 17 | 5 | 6 | 5 | 16 | 5 | 0 | 5 | 14
+INPUTS | 3 | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd2  | iobm/IOS_FSM_FFd1
+INPUTMC | 3 | 5 | 2 | 5 | 9 | 0 | 16
+EQ | 3 | 
+   iobm/IOS_FSM_FFd1.D = iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1
+	# !iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd2;
    iobm/IOS_FSM_FFd1.CLK = CLK2X_IOB;	// GCK
 GLOBALS | 1 | 2 | CLK2X_IOB
 
-MACROCELL | 4 | 3 | iobs/PS_FSM_FFd2
+MACROCELL | 5 | 9 | iobm/IOS_FSM_FFd2
+ATTRIBUTES | 4358912 | 0
+OUTPUTMC | 12 | 5 | 11 | 5 | 8 | 5 | 10 | 5 | 2 | 0 | 16 | 5 | 9 | 5 | 15 | 5 | 17 | 5 | 6 | 5 | 16 | 3 | 4 | 5 | 0
+INPUTS | 11 | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd2  | CLK_IOB  | iobm/ETACK  | iobm/BERRrf  | iobm/BERRrr  | iobm/DTACKrf  | iobm/DTACKrr  | iobm/RESrf  | iobm/RESrr
+INPUTMC | 10 | 5 | 2 | 0 | 16 | 5 | 9 | 5 | 0 | 1 | 16 | 1 | 15 | 1 | 12 | 1 | 11 | 0 | 2 | 0 | 1
+INPUTP | 1 | 35
+EQ | 11 | 
+   iobm/IOS_FSM_FFd2.T = iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd1 & 
+	!iobm/IOS_FSM_FFd2
+	# CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & 
+	iobm/IOS_FSM_FFd2 & iobm/ETACK
+	# CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & 
+	iobm/IOS_FSM_FFd2 & iobm/DTACKrf & iobm/DTACKrr
+	# CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & 
+	iobm/IOS_FSM_FFd2 & iobm/BERRrf & iobm/BERRrr
+	# CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & 
+	iobm/IOS_FSM_FFd2 & iobm/RESrf & iobm/RESrr;
+   iobm/IOS_FSM_FFd2.CLK = CLK2X_IOB;	// GCK
+GLOBALS | 1 | 2 | CLK2X_IOB
+
+MACROCELL | 7 | 3 | iobs/PS_FSM_FFd2
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 21 | 4 | 7 | 4 | 15 | 4 | 17 | 3 | 16 | 3 | 15 | 2 | 11 | 3 | 17 | 4 | 3 | 3 | 6 | 7 | 8 | 3 | 3 | 4 | 12 | 3 | 2 | 4 | 0 | 4 | 1 | 4 | 2 | 4 | 4 | 4 | 6 | 4 | 11 | 4 | 13 | 4 | 16
-INPUTS | 11 | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | iobs/IOACTr  | iobs/Once  | nADoutLE1  | A_FSB<23>  | A_FSB<20>  | nAS_FSB  | fsb/ASrf  | EXP27_.EXP  | nCAS_OBUF.EXP
-INPUTMC | 8 | 4 | 3 | 3 | 6 | 0 | 0 | 4 | 7 | 5 | 13 | 0 | 7 | 4 | 2 | 4 | 4
-INPUTP | 3 | 36 | 28 | 54
-IMPORTS | 2 | 4 | 2 | 4 | 4
-EQ | 31 | 
+OUTPUTMC | 17 | 7 | 13 | 3 | 17 | 7 | 9 | 3 | 15 | 0 | 17 | 2 | 1 | 3 | 16 | 7 | 3 | 3 | 7 | 4 | 12 | 0 | 12 | 7 | 8 | 2 | 17 | 7 | 1 | 7 | 2 | 7 | 4 | 7 | 7
+INPUTS | 12 | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | iobs/IOACTr  | iobs/Once  | nADoutLE1  | nAS_FSB  | fsb/ASrf  | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | EXP32_.EXP  | nRAS_OBUF.EXP
+INPUTMC | 9 | 7 | 3 | 3 | 7 | 1 | 5 | 7 | 13 | 5 | 13 | 0 | 3 | 3 | 9 | 7 | 2 | 7 | 4
+INPUTP | 3 | 54 | 36 | 30
+IMPORTS | 2 | 7 | 2 | 7 | 4
+EQ | 33 | 
    !iobs/PS_FSM_FFd2.D = iobs/PS_FSM_FFd2 & iobs/PS_FSM_FFd1 & 
 	iobs/IOACTr
 	# !iobs/PS_FSM_FFd2 & iobs/PS_FSM_FFd1 & 
 	!iobs/IOACTr
 	# iobs/Once & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
 	nADoutLE1
-	# !A_FSB<23> & !A_FSB<20> & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & nADoutLE1
 	# nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
 	!fsb/ASrf & nADoutLE1
-;Imported pterms FB5_3
+	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+;Imported pterms FB8_3
 	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & 
 	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 & 
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<20> & 
 	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
 	# !A_FSB<23> & A_FSB<21> & !A_FSB<19> & 
 	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<17> & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
 	# !A_FSB<23> & A_FSB<21> & !A_FSB<16> & 
 	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+;Imported pterms FB8_5
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<18> & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
 	# !A_FSB<23> & A_FSB<21> & nWE_FSB & 
 	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-;Imported pterms FB5_5
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<18> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<17> & 
+	# !A_FSB<23> & !A_FSB<20> & SW<1> & 
 	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
 	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & 
 	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
@@ -1002,7 +946,7 @@ MACROCELL | 5 | 5 | iobm/ES<0>
 ATTRIBUTES | 4358912 | 0
 OUTPUTMC | 7 | 5 | 1 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 0
 INPUTS | 7 | iobm/ES<0>  | iobm/Er  | iobm/Er2  | iobm/ES<1>  | iobm/ES<2>  | iobm/ES<3>  | iobm/ES<4>
-INPUTMC | 7 | 5 | 5 | 1 | 17 | 0 | 2 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7
+INPUTMC | 7 | 5 | 5 | 1 | 10 | 1 | 9 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7
 EQ | 6 | 
    !iobm/ES<0>.T = iobm/ES<0> & !iobm/Er & iobm/Er2
 	# !iobm/ES<0> & !iobm/ES<1> & !iobm/ES<2> & 
@@ -1016,7 +960,7 @@ MACROCELL | 5 | 4 | iobm/ES<1>
 ATTRIBUTES | 8553216 | 0
 OUTPUTMC | 7 | 5 | 1 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 0
 INPUTS | 4 | iobm/ES<0>  | iobm/ES<1>  | iobm/Er  | iobm/Er2
-INPUTMC | 4 | 5 | 5 | 5 | 4 | 1 | 17 | 0 | 2
+INPUTMC | 4 | 5 | 5 | 5 | 4 | 1 | 10 | 1 | 9
 EQ | 4 | 
    !iobm/ES<1>.D = iobm/ES<0> & iobm/ES<1>
 	# !iobm/ES<0> & !iobm/ES<1>
@@ -1028,7 +972,7 @@ MACROCELL | 5 | 12 | iobm/ES<2>
 ATTRIBUTES | 8553216 | 0
 OUTPUTMC | 6 | 5 | 1 | 5 | 5 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 0
 INPUTS | 7 | iobm/ES<0>  | iobm/ES<2>  | iobm/ES<1>  | iobm/Er  | iobm/Er2  | iobm/ES<3>  | iobm/ES<4>
-INPUTMC | 7 | 5 | 5 | 5 | 12 | 5 | 4 | 1 | 17 | 0 | 2 | 5 | 3 | 5 | 7
+INPUTMC | 7 | 5 | 5 | 5 | 12 | 5 | 4 | 1 | 10 | 1 | 9 | 5 | 3 | 5 | 7
 EQ | 6 | 
    !iobm/ES<2>.D = !iobm/ES<0> & !iobm/ES<2>
 	# !iobm/ES<1> & !iobm/ES<2>
@@ -1038,11 +982,11 @@ EQ | 6 |
    iobm/ES<2>.CLK = CLK2X_IOB;	// GCK
 GLOBALS | 1 | 2 | CLK2X_IOB
 
-MACROCELL | 3 | 6 | iobs/PS_FSM_FFd1
+MACROCELL | 3 | 7 | iobs/PS_FSM_FFd1
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 17 | 4 | 7 | 4 | 17 | 3 | 16 | 3 | 15 | 2 | 11 | 4 | 3 | 3 | 6 | 7 | 8 | 3 | 3 | 4 | 12 | 3 | 2 | 4 | 0 | 4 | 1 | 4 | 2 | 4 | 4 | 4 | 6 | 4 | 16
+OUTPUTMC | 14 | 7 | 13 | 7 | 12 | 3 | 15 | 0 | 17 | 2 | 1 | 7 | 3 | 3 | 7 | 4 | 12 | 0 | 12 | 7 | 8 | 2 | 17 | 7 | 1 | 7 | 2 | 7 | 4
 INPUTS | 3 | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | iobs/IOACTr
-INPUTMC | 3 | 4 | 3 | 3 | 6 | 0 | 0
+INPUTMC | 3 | 7 | 3 | 3 | 7 | 1 | 5
 EQ | 3 | 
    iobs/PS_FSM_FFd1.D = iobs/PS_FSM_FFd2
 	# iobs/PS_FSM_FFd1 & iobs/IOACTr;
@@ -1053,7 +997,7 @@ MACROCELL | 5 | 3 | iobm/ES<3>
 ATTRIBUTES | 4358912 | 0
 OUTPUTMC | 6 | 5 | 1 | 5 | 5 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 0
 INPUTS | 6 | iobm/ES<3>  | iobm/Er  | iobm/Er2  | iobm/ES<0>  | iobm/ES<1>  | iobm/ES<2>
-INPUTMC | 6 | 5 | 3 | 1 | 17 | 0 | 2 | 5 | 5 | 5 | 4 | 5 | 12
+INPUTMC | 6 | 5 | 3 | 1 | 10 | 1 | 9 | 5 | 5 | 5 | 4 | 5 | 12
 EQ | 4 | 
    iobm/ES<3>.T = iobm/ES<3> & !iobm/Er & iobm/Er2
 	# iobm/ES<0> & iobm/ES<1> & iobm/ES<2> & iobm/Er
@@ -1065,7 +1009,7 @@ MACROCELL | 5 | 7 | iobm/ES<4>
 ATTRIBUTES | 4358912 | 0
 OUTPUTMC | 5 | 5 | 1 | 5 | 5 | 5 | 12 | 5 | 7 | 5 | 0
 INPUTS | 7 | iobm/ES<4>  | iobm/Er  | iobm/Er2  | iobm/ES<0>  | iobm/ES<1>  | iobm/ES<2>  | iobm/ES<3>
-INPUTMC | 7 | 5 | 7 | 1 | 17 | 0 | 2 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3
+INPUTMC | 7 | 5 | 7 | 1 | 10 | 1 | 9 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3
 EQ | 8 | 
    iobm/ES<4>.T = iobm/ES<4> & !iobm/Er & iobm/Er2
 	# iobm/ES<0> & iobm/ES<1> & iobm/ES<2> & 
@@ -1077,40 +1021,40 @@ EQ | 8 |
    iobm/ES<4>.CLK = CLK2X_IOB;	// GCK
 GLOBALS | 1 | 2 | CLK2X_IOB
 
-MACROCELL | 0 | 15 | cnt/RefCnt<0>
+MACROCELL | 1 | 17 | cnt/RefCnt<0>
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 11 | 6 | 2 | 6 | 10 | 0 | 8 | 6 | 9 | 0 | 10 | 0 | 9 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 11 | 6 | 1
+OUTPUTMC | 11 | 3 | 11 | 3 | 14 | 6 | 2 | 3 | 13 | 3 | 2 | 3 | 0 | 0 | 5 | 0 | 4 | 3 | 6 | 3 | 3 | 4 | 2
 INPUTS | 0
 EQ | 2 | 
    cnt/RefCnt<0>.T = Vcc;
    cnt/RefCnt<0>.CLK = CLK_FSB;	// GCK
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 0 | 10 | cnt/RefCnt<5>
+MACROCELL | 3 | 2 | cnt/RefCnt<5>
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 17 | 6 | 2 | 6 | 10 | 6 | 15 | 6 | 9 | 7 | 12 | 7 | 0 | 6 | 14 | 6 | 12 | 0 | 9 | 0 | 8 | 7 | 11 | 6 | 1 | 6 | 11 | 6 | 13 | 7 | 1 | 7 | 15 | 7 | 16
+OUTPUTMC | 18 | 3 | 11 | 3 | 14 | 6 | 2 | 3 | 13 | 4 | 3 | 4 | 0 | 6 | 15 | 6 | 12 | 3 | 0 | 4 | 2 | 4 | 5 | 4 | 16 | 4 | 1 | 4 | 4 | 4 | 8 | 6 | 13 | 6 | 14 | 6 | 16
 INPUTS | 5 | cnt/RefCnt<0>  | cnt/RefCnt<1>  | cnt/RefCnt<2>  | cnt/RefCnt<3>  | cnt/RefCnt<4>
-INPUTMC | 5 | 0 | 15 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 11
+INPUTMC | 5 | 1 | 17 | 0 | 5 | 0 | 4 | 3 | 6 | 3 | 3
 EQ | 3 | 
    cnt/RefCnt<5>.T = cnt/RefCnt<0> & cnt/RefCnt<1> & cnt/RefCnt<2> & 
 	cnt/RefCnt<3> & cnt/RefCnt<4>;
    cnt/RefCnt<5>.CLK = CLK_FSB;	// GCK
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 0 | 9 | cnt/RefCnt<6>
+MACROCELL | 3 | 0 | cnt/RefCnt<6>
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 16 | 6 | 2 | 6 | 10 | 6 | 14 | 6 | 9 | 7 | 12 | 7 | 0 | 6 | 15 | 6 | 12 | 0 | 8 | 7 | 11 | 6 | 1 | 6 | 11 | 6 | 13 | 7 | 1 | 7 | 15 | 7 | 16
+OUTPUTMC | 17 | 3 | 11 | 3 | 14 | 6 | 2 | 3 | 13 | 4 | 3 | 4 | 0 | 6 | 16 | 6 | 12 | 4 | 2 | 4 | 5 | 4 | 16 | 4 | 1 | 4 | 4 | 4 | 8 | 6 | 13 | 6 | 14 | 6 | 15
 INPUTS | 6 | cnt/RefCnt<0>  | cnt/RefCnt<5>  | cnt/RefCnt<1>  | cnt/RefCnt<2>  | cnt/RefCnt<3>  | cnt/RefCnt<4>
-INPUTMC | 6 | 0 | 15 | 0 | 10 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 11
+INPUTMC | 6 | 1 | 17 | 3 | 2 | 0 | 5 | 0 | 4 | 3 | 6 | 3 | 3
 EQ | 3 | 
    cnt/RefCnt<6>.T = cnt/RefCnt<0> & cnt/RefCnt<5> & cnt/RefCnt<1> & 
 	cnt/RefCnt<2> & cnt/RefCnt<3> & cnt/RefCnt<4>;
    cnt/RefCnt<6>.CLK = CLK_FSB;	// GCK
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 0 | 0 | iobs/IOACTr
+MACROCELL | 1 | 5 | iobs/IOACTr
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 5 | 4 | 15 | 3 | 17 | 4 | 3 | 3 | 6 | 4 | 12
+OUTPUTMC | 5 | 3 | 17 | 3 | 16 | 7 | 3 | 3 | 7 | 7 | 8
 INPUTS | 1 | IOACT
 INPUTMC | 1 | 5 | 15
 EQ | 2 | 
@@ -1118,80 +1062,81 @@ EQ | 2 |
    iobs/IOACTr.CLK = CLK_FSB;	// GCK
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 0 | 14 | cnt/RefCnt<1>
+MACROCELL | 0 | 5 | cnt/RefCnt<1>
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 10 | 6 | 2 | 6 | 10 | 0 | 8 | 6 | 9 | 0 | 10 | 0 | 9 | 0 | 13 | 0 | 12 | 0 | 11 | 6 | 1
+OUTPUTMC | 10 | 3 | 11 | 3 | 14 | 6 | 2 | 3 | 13 | 3 | 2 | 3 | 0 | 0 | 4 | 3 | 6 | 3 | 3 | 4 | 2
 INPUTS | 1 | cnt/RefCnt<0>
-INPUTMC | 1 | 0 | 15
+INPUTMC | 1 | 1 | 17
 EQ | 2 | 
    cnt/RefCnt<1>.T = cnt/RefCnt<0>;
    cnt/RefCnt<1>.CLK = CLK_FSB;	// GCK
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 0 | 13 | cnt/RefCnt<2>
+MACROCELL | 0 | 4 | cnt/RefCnt<2>
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 9 | 6 | 2 | 6 | 10 | 0 | 8 | 6 | 9 | 0 | 10 | 0 | 9 | 0 | 12 | 0 | 11 | 6 | 1
+OUTPUTMC | 9 | 3 | 11 | 3 | 14 | 6 | 2 | 3 | 13 | 3 | 2 | 3 | 0 | 3 | 6 | 3 | 3 | 4 | 2
 INPUTS | 2 | cnt/RefCnt<0>  | cnt/RefCnt<1>
-INPUTMC | 2 | 0 | 15 | 0 | 14
+INPUTMC | 2 | 1 | 17 | 0 | 5
 EQ | 2 | 
    cnt/RefCnt<2>.T = cnt/RefCnt<0> & cnt/RefCnt<1>;
    cnt/RefCnt<2>.CLK = CLK_FSB;	// GCK
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 0 | 12 | cnt/RefCnt<3>
+MACROCELL | 3 | 6 | cnt/RefCnt<3>
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 8 | 6 | 2 | 6 | 10 | 0 | 8 | 6 | 9 | 0 | 10 | 0 | 9 | 0 | 11 | 6 | 1
+OUTPUTMC | 8 | 3 | 11 | 3 | 14 | 6 | 2 | 3 | 13 | 3 | 2 | 3 | 0 | 3 | 3 | 4 | 2
 INPUTS | 3 | cnt/RefCnt<0>  | cnt/RefCnt<1>  | cnt/RefCnt<2>
-INPUTMC | 3 | 0 | 15 | 0 | 14 | 0 | 13
+INPUTMC | 3 | 1 | 17 | 0 | 5 | 0 | 4
 EQ | 2 | 
    cnt/RefCnt<3>.T = cnt/RefCnt<0> & cnt/RefCnt<1> & cnt/RefCnt<2>;
    cnt/RefCnt<3>.CLK = CLK_FSB;	// GCK
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 0 | 11 | cnt/RefCnt<4>
+MACROCELL | 3 | 3 | cnt/RefCnt<4>
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 7 | 6 | 2 | 6 | 10 | 0 | 8 | 6 | 9 | 0 | 10 | 0 | 9 | 6 | 1
+OUTPUTMC | 7 | 3 | 11 | 3 | 14 | 6 | 2 | 3 | 13 | 3 | 2 | 3 | 0 | 4 | 2
 INPUTS | 4 | cnt/RefCnt<0>  | cnt/RefCnt<1>  | cnt/RefCnt<2>  | cnt/RefCnt<3>
-INPUTMC | 4 | 0 | 15 | 0 | 14 | 0 | 13 | 0 | 12
+INPUTMC | 4 | 1 | 17 | 0 | 5 | 0 | 4 | 3 | 6
 EQ | 3 | 
    cnt/RefCnt<4>.T = cnt/RefCnt<0> & cnt/RefCnt<1> & cnt/RefCnt<2> & 
 	cnt/RefCnt<3>;
    cnt/RefCnt<4>.CLK = CLK_FSB;	// GCK
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 7 | 8 | iobs/Load1
+MACROCELL | 4 | 12 | iobs/Load1
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 3 | 3 | 8 | 3 | 7 | 5 | 13
-INPUTS | 10 | nADoutLE1  | iobs/Once  | A_FSB<23>  | A_FSB<20>  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nAS_FSB  | fsb/ASrf  | nRAMUWE_OBUF.EXP  | EXP34_.EXP
-INPUTMC | 7 | 5 | 13 | 4 | 7 | 4 | 3 | 3 | 6 | 0 | 7 | 7 | 7 | 7 | 9
-INPUTP | 3 | 36 | 28 | 54
-IMPORTS | 2 | 7 | 7 | 7 | 9
-EQ | 18 | 
+OUTPUTMC | 3 | 0 | 15 | 0 | 14 | 5 | 13
+INPUTS | 11 | nADoutLE1  | iobs/Once  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nAS_FSB  | fsb/ASrf  | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | RA_5_OBUF.EXP  | RA_2_OBUF.EXP
+INPUTMC | 8 | 5 | 13 | 7 | 13 | 7 | 3 | 3 | 7 | 0 | 3 | 3 | 9 | 4 | 11 | 4 | 13
+INPUTP | 3 | 54 | 36 | 30
+IMPORTS | 2 | 4 | 11 | 4 | 13
+EQ | 19 | 
    !iobs/Load1.D = iobs/Once
 	# !nADoutLE1
-	# !A_FSB<23> & !A_FSB<20>
 	# nAS_FSB & !fsb/ASrf
 	# !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
-;Imported pterms FB8_8
-	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21>
 	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1
+;Imported pterms FB5_12
+	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21>
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<20>
 	# !A_FSB<23> & A_FSB<21> & !A_FSB<19>
-	# !A_FSB<23> & A_FSB<21> & nWE_FSB
-;Imported pterms FB8_10
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<18>
 	# !A_FSB<23> & A_FSB<21> & !A_FSB<17>
 	# !A_FSB<23> & A_FSB<21> & !A_FSB<16>
+;Imported pterms FB5_14
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<18>
+	# !A_FSB<23> & A_FSB<21> & nWE_FSB
+	# !A_FSB<23> & !A_FSB<20> & SW<1>
 	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21>
 	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
 	cs/nOverlay1;
    iobs/Load1.CLK = CLK_FSB;	// GCK
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 3 | 0 | ram/BACTr
+MACROCELL | 0 | 0 | ram/BACTr
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 11 | 7 | 0 | 6 | 15 | 7 | 14 | 6 | 17 | 6 | 0 | 6 | 14 | 6 | 16 | 7 | 1 | 7 | 13 | 7 | 15 | 7 | 17
+OUTPUTMC | 11 | 4 | 0 | 6 | 16 | 4 | 7 | 6 | 0 | 4 | 1 | 4 | 6 | 4 | 8 | 4 | 17 | 6 | 1 | 6 | 15 | 6 | 17
 INPUTS | 2 | nAS_FSB  | fsb/ASrf
-INPUTMC | 1 | 0 | 7
+INPUTMC | 1 | 0 | 3
 INPUTP | 1 | 54
 EQ | 2 | 
    !ram/BACTr.D = nAS_FSB & !fsb/ASrf;
@@ -1200,77 +1145,107 @@ GLOBALS | 1 | 2 | CLK_FSB
 
 MACROCELL | 5 | 15 | IOACT
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 2 | 5 | 1 | 0 | 0
-INPUTS | 12 | iobm/IOS_FSM_FFd4  | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd2  | iobm/IOREQr  | CLK_IOB  | iobm/ETACK  | iobm/BERRrf  | iobm/BERRrr  | iobm/DTACKrf  | iobm/DTACKrr  | nADoutLE0_OBUF.EXP
-INPUTMC | 11 | 5 | 6 | 5 | 9 | 3 | 11 | 3 | 9 | 0 | 1 | 5 | 0 | 0 | 6 | 0 | 5 | 0 | 4 | 0 | 3 | 5 | 14
+OUTPUTMC | 2 | 5 | 1 | 1 | 5
+INPUTS | 11 | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd2  | iobm/IOS_FSM_FFd3  | iobm/IOREQr  | nAoutOE  | CLK_IOB  | iobm/ETACK  | iobm/BERRrf  | iobm/BERRrr  | nADoutLE0_OBUF.EXP  | nDinLE_OBUF.EXP
+INPUTMC | 10 | 0 | 16 | 5 | 9 | 5 | 2 | 1 | 8 | 3 | 1 | 5 | 0 | 1 | 16 | 1 | 15 | 5 | 14 | 5 | 16
 INPUTP | 1 | 35
-IMPORTS | 1 | 5 | 14
-EQ | 14 | 
-   !IOACT.D = !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd3 & 
-	iobm/IOS_FSM_FFd1
-	# !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd3 & 
-	!iobm/IOS_FSM_FFd2 & !iobm/IOREQr
-	# !iobm/IOS_FSM_FFd4 & iobm/IOS_FSM_FFd2 & 
-	iobm/IOS_FSM_FFd1 & CLK_IOB & iobm/ETACK
-	# !iobm/IOS_FSM_FFd4 & iobm/IOS_FSM_FFd2 & 
-	iobm/IOS_FSM_FFd1 & CLK_IOB & iobm/DTACKrf & iobm/DTACKrr
-	# !iobm/IOS_FSM_FFd4 & iobm/IOS_FSM_FFd2 & 
-	iobm/IOS_FSM_FFd1 & CLK_IOB & iobm/BERRrf & iobm/BERRrr
+IMPORTS | 2 | 5 | 14 | 5 | 16
+EQ | 15 | 
+   !IOACT.D = iobm/IOS_FSM_FFd1 & !iobm/IOS_FSM_FFd2
+	# !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd2 & 
+	!iobm/IOREQr
+	# !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd2 & nAoutOE
+	# CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & 
+	iobm/ETACK
+	# CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & 
+	iobm/BERRrf & iobm/BERRrr
 ;Imported pterms FB6_15
-	# !iobm/IOS_FSM_FFd4 & iobm/IOS_FSM_FFd2 & 
-	iobm/IOS_FSM_FFd1 & CLK_IOB & iobm/RESrf & iobm/RESrr;
+	# CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & 
+	iobm/DTACKrf & iobm/DTACKrr
+;Imported pterms FB6_17
+	# CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & 
+	iobm/RESrf & iobm/RESrr;
    IOACT.CLK = CLK2X_IOB;	// GCK
 GLOBALS | 1 | 2 | CLK2X_IOB
 
 MACROCELL | 5 | 17 | IOBERR
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 5 | 4 | 15 | 3 | 17 | 5 | 17 | 5 | 0 | 5 | 16
-INPUTS | 16 | iobm/IOS_FSM_FFd4  | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd2  | iobm/IOS_FSM_FFd1  | IOBERR  | nBERR_IOB  | CLK_IOB  | iobm/ETACK  | iobm/BERRrf  | iobm/BERRrr  | iobm/DTACKrf  | iobm/DTACKrr  | iobm/RESrf  | iobm/RESrr  | iobm/ETACK.EXP  | nDinLE_OBUF.EXP
-INPUTMC | 14 | 5 | 6 | 5 | 9 | 3 | 9 | 3 | 11 | 5 | 17 | 5 | 0 | 0 | 6 | 0 | 5 | 0 | 4 | 0 | 3 | 1 | 16 | 1 | 15 | 5 | 0 | 5 | 16
-INPUTP | 2 | 123 | 35
-IMPORTS | 2 | 5 | 0 | 5 | 16
-EQ | 25 | 
-   IOBERR.T = iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd3 & 
-	!iobm/IOS_FSM_FFd2 & !iobm/IOS_FSM_FFd1 & IOBERR
-	# !nBERR_IOB & !iobm/IOS_FSM_FFd4 & 
-	iobm/IOS_FSM_FFd3 & CLK_IOB & !IOBERR & iobm/ETACK
-	# !nBERR_IOB & !iobm/IOS_FSM_FFd4 & 
-	iobm/IOS_FSM_FFd3 & CLK_IOB & !IOBERR & iobm/DTACKrf & iobm/DTACKrr
-	# !nBERR_IOB & !iobm/IOS_FSM_FFd4 & 
-	iobm/IOS_FSM_FFd3 & CLK_IOB & !IOBERR & iobm/BERRrf & iobm/BERRrr
-	# !nBERR_IOB & !iobm/IOS_FSM_FFd4 & 
-	iobm/IOS_FSM_FFd3 & CLK_IOB & !IOBERR & iobm/RESrf & iobm/RESrr
+OUTPUTMC | 4 | 3 | 17 | 3 | 16 | 5 | 17 | 5 | 0
+INPUTS | 12 | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd2  | IOBERR  | CLK_IOB  | nBERR_IOB  | iobm/ETACK  | iobm/BERRrf  | iobm/BERRrr  | iobm/DTACKrf  | iobm/DTACKrr  | iobm/ETACK.EXP
+INPUTMC | 10 | 5 | 2 | 0 | 16 | 5 | 9 | 5 | 17 | 5 | 0 | 1 | 16 | 1 | 15 | 1 | 12 | 1 | 11 | 5 | 0
+INPUTP | 2 | 35 | 123
+IMPORTS | 1 | 5 | 0
+EQ | 26 | 
+   IOBERR.T = iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd1 & 
+	!iobm/IOS_FSM_FFd2 & IOBERR
+	# CLK_IOB & nBERR_IOB & iobm/IOS_FSM_FFd3 & 
+	iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & IOBERR & iobm/ETACK
+	# CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 & 
+	iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !IOBERR & iobm/ETACK
+	# CLK_IOB & nBERR_IOB & iobm/IOS_FSM_FFd3 & 
+	iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & IOBERR & iobm/DTACKrf & 
+	iobm/DTACKrr
+	# CLK_IOB & nBERR_IOB & iobm/IOS_FSM_FFd3 & 
+	iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & IOBERR & iobm/BERRrf & 
+	iobm/BERRrr
 ;Imported pterms FB6_1
-	# nBERR_IOB & !iobm/IOS_FSM_FFd4 & 
-	iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd2 & iobm/IOS_FSM_FFd1 & CLK_IOB & 
-	IOBERR & iobm/RESrf & iobm/RESrr
-;Imported pterms FB6_17
-	# nBERR_IOB & !iobm/IOS_FSM_FFd4 & 
-	iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd2 & iobm/IOS_FSM_FFd1 & CLK_IOB & 
-	IOBERR & iobm/ETACK
-	# nBERR_IOB & !iobm/IOS_FSM_FFd4 & 
-	iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd2 & iobm/IOS_FSM_FFd1 & CLK_IOB & 
-	IOBERR & iobm/DTACKrf & iobm/DTACKrr
-	# nBERR_IOB & !iobm/IOS_FSM_FFd4 & 
-	iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd2 & iobm/IOS_FSM_FFd1 & CLK_IOB & 
-	IOBERR & iobm/BERRrf & iobm/BERRrr;
+	# CLK_IOB & nBERR_IOB & iobm/IOS_FSM_FFd3 & 
+	iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & IOBERR & iobm/RESrf & 
+	iobm/RESrr
+	# CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 & 
+	iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !IOBERR & iobm/DTACKrf & 
+	iobm/DTACKrr
+	# CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 & 
+	iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !IOBERR & iobm/BERRrf & 
+	iobm/BERRrr
+	# CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 & 
+	iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !IOBERR & iobm/RESrf & 
+	iobm/RESrr;
    IOBERR.CLK = CLK2X_IOB;	// GCK
 GLOBALS | 1 | 2 | CLK2X_IOB
 
-MACROCELL | 0 | 8 | cnt/RefCnt<7>
+MACROCELL | 0 | 9 | RESr0
+ATTRIBUTES | 8553216 | 0
+OUTPUTMC | 3 | 0 | 8 | 7 | 6 | 7 | 14
+INPUTS | 1 | nRES
+INPUTP | 1 | 145
+EQ | 2 | 
+   RESr0.D = !nRES;
+   RESr0.CLK = CLK_FSB;	// GCK
+GLOBALS | 1 | 2 | CLK_FSB
+
+MACROCELL | 0 | 8 | RESr1
+ATTRIBUTES | 8553216 | 0
+OUTPUTMC | 3 | 0 | 7 | 7 | 6 | 7 | 14
+INPUTS | 1 | RESr0
+INPUTMC | 1 | 0 | 9
+EQ | 2 | 
+   RESr1.D = RESr0;
+   RESr1.CLK = CLK_FSB;	// GCK
+GLOBALS | 1 | 2 | CLK_FSB
+
+MACROCELL | 4 | 2 | cnt/RefCnt<7>
 ATTRIBUTES | 4358912 | 0
-OUTPUTMC | 14 | 6 | 2 | 6 | 14 | 6 | 9 | 7 | 12 | 7 | 0 | 6 | 15 | 6 | 12 | 7 | 11 | 6 | 1 | 6 | 11 | 6 | 13 | 7 | 1 | 7 | 15 | 7 | 16
-INPUTS | 7 | cnt/RefCnt<0>  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<1>  | cnt/RefCnt<2>  | cnt/RefCnt<3>  | cnt/RefCnt<4>
-INPUTMC | 7 | 0 | 15 | 0 | 10 | 0 | 9 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 11
-EQ | 3 | 
+OUTPUTMC | 15 | 3 | 11 | 6 | 2 | 3 | 13 | 4 | 3 | 4 | 0 | 6 | 16 | 6 | 12 | 4 | 5 | 4 | 16 | 4 | 1 | 4 | 4 | 4 | 8 | 6 | 13 | 6 | 14 | 6 | 15
+INPUTS | 13 | cnt/RefCnt<0>  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<1>  | cnt/RefCnt<2>  | cnt/RefCnt<3>  | cnt/RefCnt<4>  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | SW<1>  | cs/nOverlay1
+INPUTMC | 8 | 1 | 17 | 3 | 2 | 3 | 0 | 0 | 5 | 0 | 4 | 3 | 6 | 3 | 3 | 3 | 9
+INPUTP | 5 | 36 | 30 | 29 | 28 | 97
+EXPORTS | 1 | 4 | 1
+EQ | 9 | 
    cnt/RefCnt<7>.T = cnt/RefCnt<0> & cnt/RefCnt<5> & cnt/RefCnt<6> & 
 	cnt/RefCnt<1> & cnt/RefCnt<2> & cnt/RefCnt<3> & cnt/RefCnt<4>;
    cnt/RefCnt<7>.CLK = CLK_FSB;	// GCK
+    cnt/RefCnt<7>.EXP  =  A_FSB<23> & !A_FSB<22> & !A_FSB<21> & !A_FSB<20> & 
+	!SW<1>
+	# !A_FSB<23> & A_FSB<22> & !A_FSB<21> & !A_FSB<20> & 
+	SW<1>
+	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & !A_FSB<20> & 
+	!cs/nOverlay1
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 1 | 17 | iobm/Er
+MACROCELL | 1 | 10 | iobm/Er
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 6 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 0 | 2
+OUTPUTMC | 6 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 1 | 9
 INPUTS | 1 | E_IOB
 INPUTP | 1 | 37
 EQ | 2 | 
@@ -1278,29 +1253,59 @@ EQ | 2 |
    !iobm/Er.CLK = CLK_IOB;	// GCK
 GLOBALS | 1 | 2 | CLK_IOB
 
-MACROCELL | 0 | 1 | iobm/IOREQr
+MACROCELL | 1 | 8 | iobm/IOREQr
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 3 | 5 | 6 | 5 | 15 | 5 | 2
+OUTPUTMC | 3 | 5 | 2 | 5 | 15 | 5 | 6
 INPUTS | 1 | IOREQ
-INPUTMC | 1 | 4 | 12
+INPUTMC | 1 | 7 | 8
 EQ | 2 | 
    iobm/IOREQr.D = IOREQ;
    !iobm/IOREQr.CLK = CLK2X_IOB;	// GCK
 GLOBALS | 1 | 2 | CLK2X_IOB
 
-MACROCELL | 0 | 16 | RefAck
+MACROCELL | 0 | 11 | IPL2r0
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 2 | 6 | 2 | 7 | 4
+OUTPUTMC | 2 | 0 | 10 | 7 | 14
+INPUTS | 1 | nIPL2
+INPUTP | 1 | 146
+EQ | 2 | 
+   IPL2r0.D = !nIPL2;
+   IPL2r0.CLK = CLK_FSB;	// GCK
+GLOBALS | 1 | 2 | CLK_FSB
+
+MACROCELL | 0 | 7 | RESr2
+ATTRIBUTES | 8553216 | 0
+OUTPUTMC | 2 | 7 | 6 | 7 | 14
+INPUTS | 1 | RESr1
+INPUTMC | 1 | 0 | 8
+EQ | 2 | 
+   RESr2.D = RESr1;
+   RESr2.CLK = CLK_FSB;	// GCK
+GLOBALS | 1 | 2 | CLK_FSB
+
+MACROCELL | 0 | 6 | RefAck
+ATTRIBUTES | 8553216 | 0
+OUTPUTMC | 2 | 3 | 11 | 7 | 5
 INPUTS | 2 | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1
-INPUTMC | 2 | 6 | 15 | 7 | 3
+INPUTMC | 2 | 6 | 16 | 6 | 6
 EQ | 2 | 
    RefAck.D = ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1;
    RefAck.CLK = CLK_FSB;	// GCK
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 0 | 4 | iobm/DTACKrf
+MACROCELL | 1 | 14 | iobm/BGr0
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 4 | 5 | 9 | 5 | 15 | 5 | 17 | 5 | 16
+OUTPUTMC | 2 | 1 | 13 | 3 | 1
+INPUTS | 1 | nBG_IOB
+INPUTP | 1 | 117
+EQ | 2 | 
+   iobm/BGr0.D = !nBG_IOB;
+   iobm/BGr0.CLK = CLK2X_IOB;	// GCK
+GLOBALS | 1 | 2 | CLK2X_IOB
+
+MACROCELL | 1 | 12 | iobm/DTACKrf
+ATTRIBUTES | 8553216 | 0
+OUTPUTMC | 4 | 5 | 9 | 5 | 14 | 5 | 17 | 5 | 0
 INPUTS | 1 | nDTACK_IOB
 INPUTP | 1 | 127
 EQ | 2 | 
@@ -1308,9 +1313,9 @@ EQ | 2 |
    !iobm/DTACKrf.CLK = CLK2X_IOB;	// GCK
 GLOBALS | 1 | 2 | CLK2X_IOB
 
-MACROCELL | 0 | 3 | iobm/DTACKrr
+MACROCELL | 1 | 11 | iobm/DTACKrr
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 4 | 5 | 9 | 5 | 15 | 5 | 17 | 5 | 16
+OUTPUTMC | 4 | 5 | 9 | 5 | 14 | 5 | 17 | 5 | 0
 INPUTS | 1 | nDTACK_IOB
 INPUTP | 1 | 127
 EQ | 2 | 
@@ -1320,31 +1325,40 @@ GLOBALS | 1 | 2 | CLK2X_IOB
 
 MACROCELL | 5 | 0 | iobm/ETACK
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 4 | 5 | 9 | 5 | 15 | 5 | 17 | 5 | 16
-INPUTS | 15 | nVMA_IOB  | iobm/ES<0>  | iobm/ES<1>  | iobm/ES<2>  | iobm/ES<3>  | iobm/ES<4>  | nBERR_IOB  | iobm/IOS_FSM_FFd4  | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd2  | iobm/IOS_FSM_FFd1  | CLK_IOB  | IOBERR  | iobm/RESrf  | iobm/RESrr
-INPUTMC | 13 | 5 | 1 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 6 | 5 | 9 | 3 | 9 | 3 | 11 | 5 | 17 | 1 | 16 | 1 | 15
-INPUTP | 2 | 123 | 35
+OUTPUTMC | 3 | 5 | 9 | 5 | 15 | 5 | 17
+INPUTS | 18 | nVMA_IOB  | iobm/ES<0>  | iobm/ES<1>  | iobm/ES<2>  | iobm/ES<3>  | iobm/ES<4>  | CLK_IOB  | nBERR_IOB  | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd2  | IOBERR  | iobm/RESrf  | iobm/RESrr  | iobm/DTACKrf  | iobm/DTACKrr  | iobm/BERRrf  | iobm/BERRrr
+INPUTMC | 16 | 5 | 1 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 2 | 0 | 16 | 5 | 9 | 5 | 17 | 0 | 2 | 0 | 1 | 1 | 12 | 1 | 11 | 1 | 16 | 1 | 15
+INPUTP | 2 | 35 | 123
 EXPORTS | 1 | 5 | 17
-EQ | 6 | 
+EQ | 15 | 
    iobm/ETACK.D = !nVMA_IOB & !iobm/ES<0> & !iobm/ES<1> & !iobm/ES<2> & 
 	!iobm/ES<3> & iobm/ES<4>;
    iobm/ETACK.CLK = CLK2X_IOB;	// GCK
-    iobm/ETACK.EXP  =  nBERR_IOB & !iobm/IOS_FSM_FFd4 & 
-	iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd2 & iobm/IOS_FSM_FFd1 & CLK_IOB & 
-	IOBERR & iobm/RESrf & iobm/RESrr
+    iobm/ETACK.EXP  =  CLK_IOB & nBERR_IOB & iobm/IOS_FSM_FFd3 & 
+	iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & IOBERR & iobm/RESrf & 
+	iobm/RESrr
+	# CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 & 
+	iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !IOBERR & iobm/DTACKrf & 
+	iobm/DTACKrr
+	# CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 & 
+	iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !IOBERR & iobm/BERRrf & 
+	iobm/BERRrr
+	# CLK_IOB & !nBERR_IOB & iobm/IOS_FSM_FFd3 & 
+	iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !IOBERR & iobm/RESrf & 
+	iobm/RESrr
 GLOBALS | 1 | 2 | CLK2X_IOB
 
-MACROCELL | 0 | 2 | iobm/Er2
+MACROCELL | 1 | 9 | iobm/Er2
 ATTRIBUTES | 8553216 | 0
 OUTPUTMC | 5 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7
 INPUTS | 1 | iobm/Er
-INPUTMC | 1 | 1 | 17
+INPUTMC | 1 | 1 | 10
 EQ | 2 | 
    iobm/Er2.D = iobm/Er;
    iobm/Er2.CLK = CLK2X_IOB;	// GCK
 GLOBALS | 1 | 2 | CLK2X_IOB
 
-MACROCELL | 1 | 14 | iobm/VPArf
+MACROCELL | 1 | 7 | iobm/VPArf
 ATTRIBUTES | 8553216 | 0
 OUTPUTMC | 1 | 5 | 1
 INPUTS | 1 | nVPA_IOB
@@ -1354,7 +1368,7 @@ EQ | 2 |
    !iobm/VPArf.CLK = CLK2X_IOB;	// GCK
 GLOBALS | 1 | 2 | CLK2X_IOB
 
-MACROCELL | 1 | 13 | iobm/VPArr
+MACROCELL | 1 | 6 | iobm/VPArr
 ATTRIBUTES | 8553216 | 0
 OUTPUTMC | 1 | 5 | 1
 INPUTS | 1 | nVPA_IOB
@@ -1364,59 +1378,75 @@ EQ | 2 |
    iobm/VPArr.CLK = CLK2X_IOB;	// GCK
 GLOBALS | 1 | 2 | CLK2X_IOB
 
-MACROCELL | 5 | 2 | ALE0M
+MACROCELL | 7 | 6 | RESDone
+ATTRIBUTES | 8553280 | 0
+OUTPUTMC | 2 | 7 | 14 | 7 | 7
+INPUTS | 8 | RESr0  | RESr1  | RESr2  | nWE_FSB  | nUDS_FSB  | ram/RAMDIS2  | nAS_FSB  | ram/RAMDIS1
+INPUTMC | 5 | 0 | 9 | 0 | 8 | 0 | 7 | 4 | 3 | 4 | 7
+INPUTP | 3 | 47 | 56 | 54
+EXPORTS | 1 | 7 | 7
+EQ | 5 | 
+   RESDone.D = Vcc;
+   RESDone.CLK = CLK_FSB;	// GCK
+   RESDone.CE = !RESr0 & !RESr1 & RESr2;
+    RESDone.EXP  =  !nWE_FSB & !nUDS_FSB & !ram/RAMDIS2 & !nAS_FSB & 
+	!ram/RAMDIS1
+GLOBALS | 1 | 2 | CLK_FSB
+
+MACROCELL | 5 | 6 | ALE0M
 ATTRIBUTES | 8553216 | 0
 OUTPUTMC | 1 | 5 | 14
-INPUTS | 5 | iobm/IOS_FSM_FFd4  | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd2  | iobm/IOREQr
-INPUTMC | 5 | 5 | 6 | 5 | 9 | 3 | 11 | 3 | 9 | 0 | 1
-EQ | 5 | 
-   !ALE0M.D = !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd3 & 
-	iobm/IOS_FSM_FFd1
-	# !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd3 & 
-	!iobm/IOS_FSM_FFd2 & !iobm/IOREQr;
+INPUTS | 5 | iobm/IOS_FSM_FFd2  | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd1  | iobm/IOREQr  | nAoutOE
+INPUTMC | 5 | 5 | 9 | 5 | 2 | 0 | 16 | 1 | 8 | 3 | 1
+EQ | 4 | 
+   ALE0M.D = iobm/IOS_FSM_FFd2
+	# iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd1
+	# !iobm/IOS_FSM_FFd1 & iobm/IOREQr & !nAoutOE;
    ALE0M.CLK = CLK2X_IOB;	// GCK
 GLOBALS | 1 | 2 | CLK2X_IOB
 
-MACROCELL | 3 | 3 | ALE0S
+MACROCELL | 0 | 12 | ALE0S
 ATTRIBUTES | 8553216 | 0
 OUTPUTMC | 1 | 5 | 14
 INPUTS | 2 | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1
-INPUTMC | 2 | 4 | 3 | 3 | 6
+INPUTMC | 2 | 7 | 3 | 3 | 7
 EQ | 2 | 
    ALE0S.D = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1;
    ALE0S.CLK = CLK_FSB;	// GCK
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 4 | 12 | IOREQ
+MACROCELL | 7 | 8 | IOREQ
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 1 | 0 | 1
-INPUTS | 11 | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | iobs/IOACTr  | iobs/Once  | nADoutLE1  | A_FSB<23>  | A_FSB<20>  | nAS_FSB  | fsb/ASrf  | RA_5_OBUF.EXP  | RA_2_OBUF.EXP
-INPUTMC | 8 | 4 | 3 | 3 | 6 | 0 | 0 | 4 | 7 | 5 | 13 | 0 | 7 | 4 | 11 | 4 | 13
-INPUTP | 3 | 36 | 28 | 54
-IMPORTS | 2 | 4 | 11 | 4 | 13
-EQ | 28 | 
+OUTPUTMC | 1 | 1 | 8
+INPUTS | 12 | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | iobs/IOACTr  | iobs/Once  | nADoutLE1  | nAS_FSB  | fsb/ASrf  | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | nRAMUWE_OBUF.EXP  | EXP33_.EXP
+INPUTMC | 9 | 7 | 3 | 3 | 7 | 1 | 5 | 7 | 13 | 5 | 13 | 0 | 3 | 3 | 9 | 7 | 7 | 7 | 9
+INPUTP | 3 | 54 | 36 | 30
+IMPORTS | 2 | 7 | 7 | 7 | 9
+EQ | 30 | 
    !IOREQ.D = !iobs/PS_FSM_FFd2 & iobs/PS_FSM_FFd1
 	# iobs/PS_FSM_FFd1 & iobs/IOACTr
 	# iobs/Once & !iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & !A_FSB<20> & !iobs/PS_FSM_FFd2 & 
-	nADoutLE1
 	# nAS_FSB & !iobs/PS_FSM_FFd2 & !fsb/ASrf & 
 	nADoutLE1
-;Imported pterms FB5_12
+	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 & 
+	!iobs/PS_FSM_FFd2 & nADoutLE1
+;Imported pterms FB8_8
 	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & 
 	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 & 
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<20> & 
 	!iobs/PS_FSM_FFd2 & nADoutLE1
 	# !A_FSB<23> & A_FSB<21> & !A_FSB<19> & 
 	!iobs/PS_FSM_FFd2 & nADoutLE1
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<17> & 
+	!iobs/PS_FSM_FFd2 & nADoutLE1
 	# !A_FSB<23> & A_FSB<21> & !A_FSB<16> & 
 	!iobs/PS_FSM_FFd2 & nADoutLE1
+;Imported pterms FB8_10
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<18> & 
+	!iobs/PS_FSM_FFd2 & nADoutLE1
 	# !A_FSB<23> & A_FSB<21> & nWE_FSB & 
 	!iobs/PS_FSM_FFd2 & nADoutLE1
-;Imported pterms FB5_14
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<18> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<17> & 
+	# !A_FSB<23> & !A_FSB<20> & SW<1> & 
 	!iobs/PS_FSM_FFd2 & nADoutLE1
 	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & 
 	!iobs/PS_FSM_FFd2 & nADoutLE1
@@ -1425,9 +1455,19 @@ EQ | 28 |
    IOREQ.CLK = CLK_FSB;	// GCK
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 0 | 7 | fsb/ASrf
+MACROCELL | 0 | 10 | IPL2r1
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 42 | 3 | 13 | 7 | 6 | 4 | 7 | 4 | 15 | 4 | 17 | 6 | 6 | 6 | 10 | 4 | 16 | 6 | 9 | 7 | 2 | 3 | 12 | 6 | 3 | 2 | 4 | 0 | 17 | 2 | 11 | 3 | 17 | 7 | 12 | 2 | 8 | 7 | 0 | 6 | 14 | 7 | 3 | 6 | 12 | 4 | 3 | 7 | 8 | 3 | 0 | 4 | 12 | 7 | 14 | 6 | 17 | 2 | 15 | 4 | 0 | 4 | 1 | 6 | 0 | 6 | 1 | 6 | 11 | 6 | 13 | 6 | 16 | 7 | 1 | 7 | 11 | 7 | 13 | 7 | 15 | 7 | 16 | 7 | 17
+OUTPUTMC | 1 | 7 | 14
+INPUTS | 1 | IPL2r0
+INPUTMC | 1 | 0 | 11
+EQ | 2 | 
+   IPL2r1.D = IPL2r0;
+   IPL2r1.CLK = CLK_FSB;	// GCK
+GLOBALS | 1 | 2 | CLK_FSB
+
+MACROCELL | 0 | 3 | fsb/ASrf
+ATTRIBUTES | 8553216 | 0
+OUTPUTMC | 39 | 4 | 15 | 7 | 13 | 3 | 9 | 3 | 17 | 7 | 0 | 3 | 12 | 3 | 14 | 6 | 2 | 3 | 13 | 7 | 15 | 3 | 8 | 6 | 3 | 2 | 0 | 0 | 13 | 2 | 1 | 3 | 16 | 4 | 3 | 2 | 7 | 4 | 0 | 6 | 15 | 6 | 6 | 6 | 11 | 7 | 3 | 4 | 12 | 0 | 0 | 7 | 8 | 4 | 7 | 6 | 0 | 2 | 5 | 4 | 1 | 4 | 4 | 4 | 6 | 4 | 8 | 4 | 16 | 4 | 17 | 6 | 1 | 6 | 13 | 6 | 14 | 6 | 17
 INPUTS | 1 | nAS_FSB
 INPUTP | 1 | 54
 EQ | 2 | 
@@ -1435,9 +1475,9 @@ EQ | 2 |
    !fsb/ASrf.CLK = CLK_FSB;	// GCK
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 0 | 6 | iobm/BERRrf
+MACROCELL | 1 | 16 | iobm/BERRrf
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 4 | 5 | 9 | 5 | 15 | 5 | 17 | 5 | 16
+OUTPUTMC | 4 | 5 | 9 | 5 | 15 | 5 | 17 | 5 | 0
 INPUTS | 1 | nBERR_IOB
 INPUTP | 1 | 123
 EQ | 2 | 
@@ -1445,9 +1485,9 @@ EQ | 2 |
    !iobm/BERRrf.CLK = CLK2X_IOB;	// GCK
 GLOBALS | 1 | 2 | CLK2X_IOB
 
-MACROCELL | 0 | 5 | iobm/BERRrr
+MACROCELL | 1 | 15 | iobm/BERRrr
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 4 | 5 | 9 | 5 | 15 | 5 | 17 | 5 | 16
+OUTPUTMC | 4 | 5 | 9 | 5 | 15 | 5 | 17 | 5 | 0
 INPUTS | 1 | nBERR_IOB
 INPUTP | 1 | 123
 EQ | 2 | 
@@ -1455,9 +1495,19 @@ EQ | 2 |
    iobm/BERRrr.CLK = CLK2X_IOB;	// GCK
 GLOBALS | 1 | 2 | CLK2X_IOB
 
-MACROCELL | 1 | 16 | iobm/RESrf
+MACROCELL | 1 | 13 | iobm/BGr1
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 4 | 5 | 9 | 5 | 14 | 5 | 17 | 5 | 0
+OUTPUTMC | 1 | 3 | 1
+INPUTS | 1 | iobm/BGr0
+INPUTMC | 1 | 1 | 14
+EQ | 2 | 
+   iobm/BGr1.D = iobm/BGr0;
+   iobm/BGr1.CLK = CLK2X_IOB;	// GCK
+GLOBALS | 1 | 2 | CLK2X_IOB
+
+MACROCELL | 0 | 2 | iobm/RESrf
+ATTRIBUTES | 8553216 | 0
+OUTPUTMC | 3 | 5 | 9 | 5 | 0 | 5 | 16
 INPUTS | 1 | nRES
 INPUTP | 1 | 145
 EQ | 2 | 
@@ -1465,9 +1515,9 @@ EQ | 2 |
    !iobm/RESrf.CLK = CLK2X_IOB;	// GCK
 GLOBALS | 1 | 2 | CLK2X_IOB
 
-MACROCELL | 1 | 15 | iobm/RESrr
+MACROCELL | 0 | 1 | iobm/RESrr
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 4 | 5 | 9 | 5 | 14 | 5 | 17 | 5 | 0
+OUTPUTMC | 3 | 5 | 9 | 5 | 0 | 5 | 16
 INPUTS | 1 | nRES
 INPUTP | 1 | 145
 EQ | 2 | 
@@ -1475,23 +1525,39 @@ EQ | 2 |
    iobm/RESrr.CLK = CLK2X_IOB;	// GCK
 GLOBALS | 1 | 2 | CLK2X_IOB
 
-MACROCELL | 3 | 2 | iobs/Clear1
+MACROCELL | 2 | 17 | iobs/Clear1
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 1 | 5 | 13
-INPUTS | 3 | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nADoutLE1
-INPUTMC | 3 | 4 | 3 | 3 | 6 | 5 | 13
-EQ | 2 | 
+OUTPUTMC | 2 | 5 | 13 | 2 | 0
+INPUTS | 16 | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nADoutLE1  | A_FSB<14>  | A_FSB<22>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | nWE_FSB  | fsb/Ready1r  | iobs/IOReady  | A_FSB<13>  | A_FSB<21>
+INPUTMC | 6 | 7 | 3 | 3 | 7 | 5 | 13 | 3 | 9 | 2 | 0 | 3 | 16
+INPUTP | 10 | 19 | 30 | 28 | 26 | 24 | 23 | 22 | 47 | 18 | 29
+EXPORTS | 1 | 2 | 0
+EQ | 16 | 
    iobs/Clear1.D = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & !nADoutLE1;
    iobs/Clear1.CLK = CLK_FSB;	// GCK
+    iobs/Clear1.EXP  =  A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & 
+	!fsb/Ready1r & !iobs/IOReady
+	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & 
+	!fsb/Ready1r & !iobs/IOReady
+	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
+	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
+	cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & !iobs/IOReady & 
+	!nADoutLE1
+	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
+	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
+	cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & !iobs/IOReady & 
+	!nADoutLE1
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 7 | 14 | ram/RAMDIS1
+MACROCELL | 4 | 7 | ram/RAMDIS1
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 3 | 7 | 4 | 7 | 5 | 7 | 7
-INPUTS | 10 | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | A_FSB<23>  | cnt/RefDone  | nAS_FSB  | ram/BACTr  | fsb/ASrf  | EXP36_.EXP  | EXP37_.EXP
-INPUTMC | 8 | 6 | 15 | 7 | 3 | 6 | 13 | 6 | 2 | 3 | 0 | 0 | 7 | 7 | 13 | 7 | 15
+OUTPUTMC | 2 | 7 | 6 | 7 | 5
+INPUTS | 10 | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | A_FSB<23>  | cnt/RefDone  | nAS_FSB  | ram/BACTr  | fsb/ASrf  | EXP24_.EXP  | RA_4_OBUF.EXP
+INPUTMC | 8 | 6 | 16 | 6 | 6 | 6 | 12 | 3 | 11 | 0 | 0 | 0 | 3 | 4 | 6 | 4 | 8
 INPUTP | 2 | 36 | 54
-IMPORTS | 2 | 7 | 13 | 7 | 15
+IMPORTS | 2 | 4 | 6 | 4 | 8
 EQ | 38 | 
    ram/RAMDIS1.D = ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1
 	# !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3
@@ -1501,28 +1567,28 @@ EQ | 38 |
 	!ram/RS_FSM_FFd1 & !ram/BACTr
 	# A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 & 
 	!ram/BACTr & fsb/ASrf
-;Imported pterms FB8_14
+;Imported pterms FB5_7
 	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & !nAS_FSB & 
 	!ram/RS_FSM_FFd1 & !ram/BACTr
 	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & 
 	!ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
+	# A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & 
 	!nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
+	# A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & 
 	!ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
+	# !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & 
 	!nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr
-;Imported pterms FB8_13
+;Imported pterms FB5_6
 	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & 
 	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
+	# A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & 
 	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
+	# !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & 
 	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-;Imported pterms FB8_16
+;Imported pterms FB5_9
 	# A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 & 
 	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
+	# !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & 
 	!ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
 	# ram/Once & !cnt/RefDone & !ram/RS_FSM_FFd1 & 
 	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
@@ -1533,25 +1599,25 @@ EQ | 38 |
    ram/RAMDIS1.CLK = CLK_FSB;	// GCK
 GLOBALS | 1 | 2 | CLK_FSB
 
-MACROCELL | 6 | 17 | ram/RAMReady
+MACROCELL | 6 | 0 | ram/RAMReady
 ATTRIBUTES | 8553216 | 0
-OUTPUTMC | 4 | 6 | 3 | 2 | 0 | 2 | 7 | 2 | 2
-INPUTS | 12 | A_FSB<21>  | cs/nOverlay1  | cnt/RefDone  | nAS_FSB  | ram/RS_FSM_FFd1  | ram/BACTr  | A_FSB<23>  | A_FSB<22>  | ram/Once  | fsb/ASrf  | TimeoutB.EXP  | EXP33_.EXP
-INPUTMC | 8 | 3 | 13 | 6 | 2 | 7 | 3 | 3 | 0 | 7 | 6 | 0 | 7 | 6 | 0 | 6 | 16
+OUTPUTMC | 3 | 6 | 3 | 6 | 9 | 6 | 10
+INPUTS | 12 | A_FSB<21>  | cnt/RefDone  | cs/nOverlay1  | nAS_FSB  | ram/RS_FSM_FFd1  | ram/BACTr  | A_FSB<23>  | A_FSB<22>  | ram/Once  | fsb/ASrf  | RA_1_OBUF.EXP  | EXP30_.EXP
+INPUTMC | 8 | 3 | 11 | 3 | 9 | 6 | 6 | 0 | 0 | 4 | 15 | 0 | 3 | 6 | 1 | 6 | 17
 INPUTP | 4 | 29 | 54 | 36 | 30
-IMPORTS | 2 | 6 | 0 | 6 | 16
+IMPORTS | 2 | 6 | 1 | 6 | 17
 EQ | 33 | 
-   !ram/RAMReady.D = A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
+   !ram/RAMReady.D = A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & 
 	!nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
+	# !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & 
 	!nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr
-	# !A_FSB<21> & !cs/nOverlay1 & !cnt/RefDone & 
+	# !A_FSB<21> & !cnt/RefDone & !cs/nOverlay1 & 
 	!nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr
-	# !A_FSB<21> & !cs/nOverlay1 & !cnt/RefDone & 
+	# !A_FSB<21> & !cnt/RefDone & !cs/nOverlay1 & 
 	!ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !nAS_FSB & !ram/RS_FSM_FFd1
-;Imported pterms FB7_1
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & 
+	!cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1
+;Imported pterms FB7_2
 	# ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3
 	# !ram/RS_FSM_FFd2 & ram/RS_FSM_FFd1
 	# !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3
@@ -1559,18 +1625,18 @@ EQ | 33 |
 	!ram/RS_FSM_FFd1 & !ram/BACTr
 	# A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 & 
 	!ram/BACTr & fsb/ASrf
-;Imported pterms FB7_17
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !ram/Once & 
+;Imported pterms FB7_18
+	# !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & 
 	!nAS_FSB & !ram/RS_FSM_FFd1
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !ram/Once & 
+	# !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & 
 	!ram/RS_FSM_FFd1 & fsb/ASrf
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
+	# A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & 
 	!ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
+	# !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & 
 	!ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !ram/RS_FSM_FFd1 & fsb/ASrf
-;Imported pterms FB7_16
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & 
+	!cs/nOverlay1 & !ram/RS_FSM_FFd1 & fsb/ASrf
+;Imported pterms FB7_17
 	# !cnt/RefDone & cnt/RefCnt<5> & cnt/RefCnt<6> & 
 	cnt/RefCnt<7>;
    ram/RAMReady.CLK = CLK_FSB;	// GCK
@@ -1579,7 +1645,7 @@ GLOBALS | 1 | 2 | CLK_FSB
 MACROCELL | 6 | 5 | RA_0_OBUF
 ATTRIBUTES | 264962 | 0
 INPUTS | 3 | A_FSB<10>  | ram/RASEL  | A_FSB<1>
-INPUTMC | 1 | 7 | 0
+INPUTMC | 1 | 4 | 0
 INPUTP | 2 | 13 | 149
 EQ | 2 | 
    RA<0> = A_FSB<10> & !ram/RASEL
@@ -1588,47 +1654,47 @@ EQ | 2 |
 MACROCELL | 6 | 1 | RA_1_OBUF
 ATTRIBUTES | 264962 | 0
 OUTPUTMC | 1 | 6 | 0
-INPUTS | 15 | A_FSB<11>  | ram/RASEL  | A_FSB<2>  | TimeoutB  | nAS_FSB  | fsb/ASrf  | cnt/TimeoutBPre  | cnt/RefCnt<0>  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<1>  | cnt/RefCnt<2>  | cnt/RefCnt<3>  | cnt/RefCnt<4>  | cnt/RefCnt<7>
-INPUTMC | 12 | 7 | 0 | 6 | 0 | 0 | 7 | 6 | 9 | 0 | 15 | 0 | 10 | 0 | 9 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 11 | 0 | 8
-INPUTP | 3 | 15 | 153 | 54
+INPUTS | 9 | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd3  | ram/RS_FSM_FFd1  | A_FSB<23>  | cnt/RefDone  | nAS_FSB  | ram/BACTr  | fsb/ASrf  | TimeoutB.EXP
+INPUTMC | 7 | 6 | 16 | 6 | 12 | 6 | 6 | 3 | 11 | 0 | 0 | 0 | 3 | 6 | 2
+INPUTP | 2 | 36 | 54
 EXPORTS | 1 | 6 | 0
-EQ | 9 | 
-   RA<1> = A_FSB<11> & !ram/RASEL
+IMPORTS | 1 | 6 | 2
+EQ | 10 | 
+   RA<1> = ;Imported pterms FB7_3
+	  A_FSB<11> & !ram/RASEL
 	# ram/RASEL & A_FSB<2>;
-    RA_1_OBUF.EXP  =  TimeoutB & nAS_FSB & !fsb/ASrf
-	# !TimeoutB & cnt/TimeoutBPre & !nAS_FSB & 
-	!cnt/RefCnt<0> & !cnt/RefCnt<5> & !cnt/RefCnt<6> & !cnt/RefCnt<1> & 
-	!cnt/RefCnt<2> & !cnt/RefCnt<3> & !cnt/RefCnt<4> & !cnt/RefCnt<7>
-	# !TimeoutB & cnt/TimeoutBPre & !cnt/RefCnt<0> & 
-	!cnt/RefCnt<5> & !cnt/RefCnt<6> & !cnt/RefCnt<1> & !cnt/RefCnt<2> & 
-	!cnt/RefCnt<3> & !cnt/RefCnt<4> & !cnt/RefCnt<7> & fsb/ASrf
+    RA_1_OBUF.EXP  =  ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3
+	# !ram/RS_FSM_FFd2 & ram/RS_FSM_FFd1
+	# !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3
+	# A_FSB<23> & !cnt/RefDone & !nAS_FSB & 
+	!ram/RS_FSM_FFd1 & !ram/BACTr
+	# A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 & 
+	!ram/BACTr & fsb/ASrf
 
 MACROCELL | 4 | 13 | RA_2_OBUF
 ATTRIBUTES | 264962 | 0
 OUTPUTMC | 1 | 4 | 12
-INPUTS | 13 | A_FSB<12>  | ram/RASEL  | A_FSB<23>  | A_FSB<21>  | A_FSB<18>  | iobs/PS_FSM_FFd2  | nADoutLE1  | A_FSB<17>  | A_FSB<14>  | A_FSB<13>  | A_FSB<22>  | cs/nOverlay1  | RA_6_OBUF.EXP
-INPUTMC | 5 | 7 | 0 | 4 | 3 | 5 | 13 | 3 | 13 | 4 | 14
-INPUTP | 8 | 17 | 36 | 29 | 24 | 23 | 19 | 18 | 30
+INPUTS | 11 | A_FSB<23>  | A_FSB<21>  | A_FSB<18>  | nWE_FSB  | A_FSB<20>  | SW<1>  | A_FSB<14>  | A_FSB<13>  | A_FSB<22>  | cs/nOverlay1  | RA_6_OBUF.EXP
+INPUTMC | 2 | 3 | 9 | 4 | 14
+INPUTP | 9 | 36 | 29 | 24 | 47 | 28 | 97 | 19 | 18 | 30
 EXPORTS | 1 | 4 | 12
 IMPORTS | 1 | 4 | 14
-EQ | 11 | 
-   RA<2> = A_FSB<12> & !ram/RASEL
-;Imported pterms FB5_15
+EQ | 9 | 
+   RA<2> = ;Imported pterms FB5_15
+	  A_FSB<12> & !ram/RASEL
 	# ram/RASEL & A_FSB<3>;
-    RA_2_OBUF.EXP  =  !A_FSB<23> & A_FSB<21> & !A_FSB<18> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<17> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
+    RA_2_OBUF.EXP  =  !A_FSB<23> & A_FSB<21> & !A_FSB<18>
+	# !A_FSB<23> & A_FSB<21> & nWE_FSB
+	# !A_FSB<23> & !A_FSB<20> & SW<1>
+	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21>
 	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1 & !iobs/PS_FSM_FFd2 & nADoutLE1
+	cs/nOverlay1
 
 MACROCELL | 4 | 10 | RA_3_OBUF
 ATTRIBUTES | 264962 | 0
 OUTPUTMC | 1 | 4 | 11
 INPUTS | 5 | A_FSB<13>  | ram/RASEL  | A_FSB<4>  | A_FSB<15>  | A_FSB<6>
-INPUTMC | 1 | 7 | 0
+INPUTMC | 1 | 4 | 0
 INPUTP | 4 | 18 | 157 | 21 | 6
 EXPORTS | 1 | 4 | 11
 EQ | 4 | 
@@ -1640,60 +1706,61 @@ EQ | 4 |
 MACROCELL | 4 | 8 | RA_4_OBUF
 ATTRIBUTES | 264962 | 0
 OUTPUTMC | 1 | 4 | 7
-INPUTS | 9 | A_FSB<23>  | A_FSB<21>  | A_FSB<19>  | iobs/Once  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | nWE_FSB  | EXP29_.EXP
-INPUTMC | 2 | 4 | 7 | 4 | 9
-INPUTP | 7 | 36 | 29 | 26 | 24 | 23 | 22 | 47
+INPUTS | 15 | A_FSB<23>  | cnt/RefDone  | ram/RS_FSM_FFd1  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | A_FSB<22>  | cs/nOverlay1  | ram/BACTr  | fsb/ASrf  | ram/Once  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd3  | nAS_FSB  | EXP25_.EXP
+INPUTMC | 12 | 3 | 11 | 6 | 6 | 3 | 2 | 3 | 0 | 4 | 2 | 3 | 9 | 0 | 0 | 0 | 3 | 4 | 15 | 6 | 16 | 6 | 12 | 4 | 9
+INPUTP | 3 | 36 | 30 | 54
 EXPORTS | 1 | 4 | 7
 IMPORTS | 1 | 4 | 9
-EQ | 8 | 
+EQ | 13 | 
    RA<4> = ;Imported pterms FB5_10
 	  A_FSB<14> & !ram/RASEL
 	# ram/RASEL & A_FSB<5>;
-    RA_4_OBUF.EXP  =  !A_FSB<23> & A_FSB<21> & !A_FSB<19> & !iobs/Once
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<18> & !iobs/Once
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<17> & !iobs/Once
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<16> & !iobs/Once
-	# !A_FSB<23> & A_FSB<21> & !iobs/Once & nWE_FSB
+    RA_4_OBUF.EXP  =  A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 & 
+	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
+	# !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & 
+	!ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
+	# ram/Once & !cnt/RefDone & !ram/RS_FSM_FFd1 & 
+	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
+	# !cnt/RefDone & ram/RS_FSM_FFd2 & ram/RS_FSM_FFd3 & 
+	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
+	# !cnt/RefDone & nAS_FSB & !ram/RS_FSM_FFd1 & 
+	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & !fsb/ASrf
 
 MACROCELL | 4 | 11 | RA_5_OBUF
 ATTRIBUTES | 264962 | 0
 OUTPUTMC | 1 | 4 | 12
-INPUTS | 10 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | iobs/PS_FSM_FFd2  | nADoutLE1  | cs/nOverlay1  | A_FSB<19>  | A_FSB<16>  | nWE_FSB  | RA_3_OBUF.EXP
-INPUTMC | 4 | 4 | 3 | 5 | 13 | 3 | 13 | 4 | 10
-INPUTP | 6 | 36 | 30 | 29 | 26 | 22 | 47
+INPUTS | 8 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<17>  | A_FSB<16>  | RA_3_OBUF.EXP
+INPUTMC | 1 | 4 | 10
+INPUTP | 7 | 36 | 30 | 29 | 28 | 26 | 23 | 22
 EXPORTS | 1 | 4 | 12
 IMPORTS | 1 | 4 | 10
-EQ | 13 | 
+EQ | 8 | 
    RA<5> = ;Imported pterms FB5_11
 	  A_FSB<15> & !ram/RASEL
 	# ram/RASEL & A_FSB<6>;
-    RA_5_OBUF.EXP  =  !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<19> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<16> & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & nWE_FSB & 
-	!iobs/PS_FSM_FFd2 & nADoutLE1
+    RA_5_OBUF.EXP  =  !A_FSB<23> & !A_FSB<22> & !A_FSB<21>
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<20>
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<19>
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<17>
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<16>
 
 MACROCELL | 4 | 14 | RA_6_OBUF
 ATTRIBUTES | 264962 | 0
 OUTPUTMC | 1 | 4 | 13
-INPUTS | 4 | A_FSB<16>  | ram/RASEL  | A_FSB<7>  | A_FSB<3>
-INPUTMC | 1 | 7 | 0
-INPUTP | 3 | 22 | 8 | 155
+INPUTS | 5 | A_FSB<16>  | ram/RASEL  | A_FSB<7>  | A_FSB<12>  | A_FSB<3>
+INPUTMC | 1 | 4 | 0
+INPUTP | 4 | 22 | 8 | 17 | 155
 EXPORTS | 1 | 4 | 13
-EQ | 3 | 
+EQ | 4 | 
    RA<6> = A_FSB<16> & !ram/RASEL
 	# ram/RASEL & A_FSB<7>;
-    RA_6_OBUF.EXP  =  ram/RASEL & A_FSB<3>
+    RA_6_OBUF.EXP  =  A_FSB<12> & !ram/RASEL
+	# ram/RASEL & A_FSB<3>
 
 MACROCELL | 6 | 4 | RA_7_OBUF
 ATTRIBUTES | 264962 | 0
 INPUTS | 3 | A_FSB<17>  | ram/RASEL  | A_FSB<8>
-INPUTMC | 1 | 7 | 0
+INPUTMC | 1 | 4 | 0
 INPUTP | 2 | 23 | 11
 EQ | 2 | 
    RA<7> = A_FSB<8> & ram/RASEL
@@ -1701,100 +1768,98 @@ EQ | 2 |
 
 MACROCELL | 6 | 7 | RA_8_OBUF
 ATTRIBUTES | 264962 | 0
-INPUTS | 8 | A_FSB<23>  | A_FSB<18>  | ram/RASEL  | A_FSB<22>  | A_FSB<21>  | cs/nOverlay1  | cs/nOverlay0.EXP  | A_FSB_21_IBUF$BUF0.EXP
-INPUTMC | 4 | 7 | 0 | 3 | 13 | 6 | 6 | 6 | 8
+INPUTS | 7 | A_FSB<23>  | A_FSB<18>  | ram/RASEL  | A_FSB<22>  | A_FSB<21>  | cs/nOverlay1  | A_FSB_21_IBUF$BUF0.EXP
+INPUTMC | 3 | 4 | 0 | 3 | 9 | 6 | 8
 INPUTP | 4 | 36 | 24 | 30 | 29
-IMPORTS | 2 | 6 | 6 | 6 | 8
-EQ | 11 | 
+IMPORTS | 1 | 6 | 8
+EQ | 10 | 
    RA<8> = A_FSB<23> & A_FSB<18>
 	# A_FSB<18> & !ram/RASEL
 	# A_FSB<22> & !A_FSB<21> & A_FSB<18>
 	# A_FSB<22> & A_FSB<18> & cs/nOverlay1
 	# !A_FSB<22> & A_FSB<18> & !cs/nOverlay1
-;Imported pterms FB7_7
+;Imported pterms FB7_9
 	# A_FSB<9> & !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
 	ram/RASEL
-;Imported pterms FB7_9
 	# A_FSB<9> & !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
 	!cs/nOverlay1 & ram/RASEL;
 
 MACROCELL | 6 | 10 | RA_9_OBUF
 ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 6 | 11
-INPUTS | 13 | A_FSB<19>  | ram/RASEL  | A_FSB<20>  | TimeoutA  | nAS_FSB  | fsb/ASrf  | cnt/RefCnt<0>  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<1>  | cnt/RefCnt<2>  | cnt/RefCnt<3>  | cnt/RefCnt<4>
-INPUTMC | 10 | 7 | 0 | 6 | 11 | 0 | 7 | 0 | 15 | 0 | 10 | 0 | 9 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 11
-INPUTP | 3 | 26 | 28 | 54
-EXPORTS | 1 | 6 | 11
-EQ | 9 | 
+OUTPUTMC | 1 | 6 | 9
+INPUTS | 9 | A_FSB<19>  | ram/RASEL  | A_FSB<20>  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | cs/nOverlay1  | fsb/Ready0r  | ram/RAMReady
+INPUTMC | 4 | 4 | 0 | 3 | 9 | 6 | 3 | 6 | 0
+INPUTP | 5 | 26 | 28 | 36 | 30 | 29
+EXPORTS | 1 | 6 | 9
+EQ | 4 | 
    RA<9> = A_FSB<20> & ram/RASEL
 	# A_FSB<19> & !ram/RASEL;
-    RA_9_OBUF.EXP  =  TimeoutA & nAS_FSB & !fsb/ASrf
-	# !TimeoutA & !nAS_FSB & !cnt/RefCnt<0> & 
-	!cnt/RefCnt<5> & !cnt/RefCnt<6> & !cnt/RefCnt<1> & !cnt/RefCnt<2> & 
-	!cnt/RefCnt<3> & !cnt/RefCnt<4>
-	# !TimeoutA & !cnt/RefCnt<0> & !cnt/RefCnt<5> & 
-	!cnt/RefCnt<6> & !cnt/RefCnt<1> & !cnt/RefCnt<2> & !cnt/RefCnt<3> & 
-	!cnt/RefCnt<4> & fsb/ASrf
+    RA_9_OBUF.EXP  =  !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
+	!cs/nOverlay1 & !fsb/Ready0r & !ram/RAMReady
 
 MACROCELL | 7 | 11 | nBERR_FSB_OBUF
 ATTRIBUTES | 264962 | 0
 OUTPUTMC | 1 | 7 | 12
-INPUTS | 16 | ram/Once  | cnt/RefDone  | ram/RAMDIS2  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | fsb/ASrf  | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | nAS_FSB  | A_FSB<21>  | EXP35_.EXP
-INPUTMC | 12 | 7 | 6 | 6 | 2 | 7 | 12 | 6 | 15 | 7 | 3 | 6 | 13 | 0 | 10 | 0 | 9 | 0 | 8 | 0 | 7 | 3 | 13 | 7 | 10
-INPUTP | 4 | 36 | 30 | 54 | 29
+INPUTS | 12 | nAS_FSB  | A_FSB<23>  | A_FSB<21>  | iobs/Once  | nWE_FSB  | A_FSB<20>  | SW<1>  | A_FSB<14>  | A_FSB<13>  | A_FSB<22>  | cs/nOverlay1  | EXP34_.EXP
+INPUTMC | 3 | 7 | 13 | 3 | 9 | 7 | 10
+INPUTP | 9 | 54 | 36 | 29 | 47 | 28 | 97 | 19 | 18 | 30
 EXPORTS | 1 | 7 | 12
 IMPORTS | 1 | 7 | 10
-EQ | 24 | 
-   nBERR_FSB = ;Imported pterms FB8_11
-	  nAS_FSB
+EQ | 11 | 
+   nBERR_FSB = nAS_FSB
+;Imported pterms FB8_11
 	# !BERR_IOBS & !TimeoutB & !fsb/BERR0r & !fsb/BERR1r
 	# !A_FSB<23> & A_FSB<22> & !A_FSB<21> & A_FSB<20> & 
 	!BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r;
-    nBERR_FSB_OBUF.EXP  =  ram/Once & !cnt/RefDone & !ram/RAMDIS2 & 
-	ram/RS_FSM_FFd2 & ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3 & 
-	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & ram/Once & 
-	!cnt/RefDone & !ram/RAMDIS2 & !nAS_FSB & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
-	cnt/RefCnt<7>
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & ram/Once & 
-	!cnt/RefDone & !ram/RAMDIS2 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
-	!ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & 
-	fsb/ASrf
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & ram/Once & !cnt/RefDone & !ram/RAMDIS2 & !nAS_FSB & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & 
-	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & ram/Once & !cnt/RefDone & !ram/RAMDIS2 & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & 
-	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & fsb/ASrf
+    nBERR_FSB_OBUF.EXP  =  !A_FSB<23> & A_FSB<21> & !iobs/Once & nWE_FSB
+	# !A_FSB<23> & !A_FSB<20> & !iobs/Once & SW<1>
+	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & 
+	!iobs/Once
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & !iobs/Once & 
+	cs/nOverlay1
 
 MACROCELL | 4 | 5 | nOE_OBUF
 ATTRIBUTES | 264962 | 0
 OUTPUTMC | 1 | 4 | 6
-INPUTS | 9 | nWE_FSB  | nAS_FSB  | A_FSB<14>  | A_FSB<13>  | A_FSB<23>  | A_FSB<21>  | iobs/Once  | A_FSB<22>  | cs/nOverlay1
-INPUTMC | 2 | 4 | 7 | 3 | 13
-INPUTP | 7 | 47 | 54 | 19 | 18 | 36 | 29 | 30
+INPUTS | 10 | nWE_FSB  | nAS_FSB  | A_FSB<22>  | A_FSB<21>  | cnt/RefDone  | ram/RS_FSM_FFd1  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | cs/nOverlay1
+INPUTMC | 6 | 3 | 11 | 6 | 6 | 3 | 2 | 3 | 0 | 4 | 2 | 3 | 9
+INPUTP | 4 | 47 | 54 | 30 | 29
 EXPORTS | 1 | 4 | 6
-EQ | 5 | 
+EQ | 7 | 
    !nOE = nWE_FSB & !nAS_FSB;
-    nOE_OBUF.EXP  =  !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & 
-	!iobs/Once
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1 & !iobs/Once
+    nOE_OBUF.EXP  =  A_FSB<22> & !A_FSB<21> & !cnt/RefDone & 
+	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
+	# A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & 
+	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
+	# !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & 
+	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
 
 MACROCELL | 2 | 16 | nROMWE_OBUF
 ATTRIBUTES | 264962 | 0
-INPUTS | 2 | nWE_FSB  | nAS_FSB
-INPUTP | 2 | 47 | 54
-EQ | 1 | 
+OUTPUTMC | 1 | 2 | 15
+INPUTS | 26 | nWE_FSB  | nAS_FSB  | A_FSB<9>  | A_FSB<8>  | A_FSB<15>  | A_FSB<14>  | A_FSB<13>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | BERR_IOBS  | fsb/BERR0r  | fsb/BERR1r  | fsb/Ready1r  | nBR_IOB  | $OpTx$FX_DC$708  | $OpTx$$OpTx$FX_DC$182_INV$783  | iobs/IOReady
+INPUTMC | 8 | 3 | 17 | 7 | 15 | 3 | 8 | 2 | 0 | 7 | 14 | 0 | 13 | 6 | 9 | 3 | 16
+INPUTP | 18 | 47 | 54 | 12 | 11 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22
+EXPORTS | 1 | 2 | 15
+EQ | 13 | 
    !nROMWE = !nWE_FSB & !nAS_FSB;
+    nROMWE_OBUF.EXP  =  A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
+	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
+	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
+	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
+	fsb/Ready1r & nBR_IOB & !$OpTx$FX_DC$708 & 
+	!$OpTx$$OpTx$FX_DC$182_INV$783
+	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
+	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
+	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
+	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
+	iobs/IOReady & nBR_IOB & !$OpTx$FX_DC$708 & 
+	!$OpTx$$OpTx$FX_DC$182_INV$783
 
 MACROCELL | 3 | 10 | nVPA_FSB_OBUF
 ATTRIBUTES | 264962 | 0
 INPUTS | 2 | fsb/VPA  | nAS_FSB
-INPUTMC | 1 | 2 | 1
+INPUTMC | 1 | 2 | 14
 INPUTP | 1 | 54
 EQ | 1 | 
    !nVPA_FSB = fsb/VPA & !nAS_FSB;
@@ -1802,147 +1867,259 @@ EQ | 1 |
 MACROCELL | 5 | 14 | nADoutLE0_OBUF
 ATTRIBUTES | 264962 | 0
 OUTPUTMC | 1 | 5 | 15
-INPUTS | 8 | ALE0M  | ALE0S  | iobm/IOS_FSM_FFd4  | iobm/IOS_FSM_FFd2  | iobm/IOS_FSM_FFd1  | CLK_IOB  | iobm/RESrf  | iobm/RESrr
-INPUTMC | 7 | 5 | 2 | 3 | 3 | 5 | 6 | 3 | 9 | 3 | 11 | 1 | 16 | 1 | 15
+INPUTS | 7 | ALE0M  | ALE0S  | CLK_IOB  | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd1  | iobm/DTACKrf  | iobm/DTACKrr
+INPUTMC | 6 | 5 | 6 | 0 | 12 | 5 | 2 | 0 | 16 | 1 | 12 | 1 | 11
 INPUTP | 1 | 35
 EXPORTS | 1 | 5 | 15
 EQ | 3 | 
    nADoutLE0 = !ALE0M & !ALE0S;
-    nADoutLE0_OBUF.EXP  =  !iobm/IOS_FSM_FFd4 & iobm/IOS_FSM_FFd2 & 
-	iobm/IOS_FSM_FFd1 & CLK_IOB & iobm/RESrf & iobm/RESrr
-
-MACROCELL | 5 | 11 | nAS_IOB_OBUF
-ATTRIBUTES | 8684290 | 0
-INPUTS | 4 | iobm/IOS_FSM_FFd4  | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd2
-INPUTMC | 4 | 5 | 6 | 5 | 9 | 3 | 11 | 3 | 9
-EQ | 5 | 
-   nAS_IOB.D = !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd3 & 
-	!iobm/IOS_FSM_FFd2
-	# !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd3 & 
-	iobm/IOS_FSM_FFd1;
-   !nAS_IOB.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
+    nADoutLE0_OBUF.EXP  =  CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & 
+	iobm/DTACKrf & iobm/DTACKrr
 
 MACROCELL | 4 | 4 | nCAS_OBUF
 ATTRIBUTES | 8684290 | 0
 OUTPUTMC | 1 | 4 | 3
-INPUTS | 12 | ram/RASEL  | A_FSB<23>  | A_FSB<21>  | A_FSB<18>  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nADoutLE1  | A_FSB<17>  | A_FSB<14>  | A_FSB<13>  | A_FSB<22>  | cs/nOverlay1
-INPUTMC | 5 | 7 | 0 | 4 | 3 | 3 | 6 | 5 | 13 | 3 | 13
-INPUTP | 7 | 36 | 29 | 24 | 23 | 19 | 18 | 30
+INPUTS | 16 | ram/RASEL  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | ram/Once  | cnt/RefDone  | cs/nOverlay1  | ram/RAMDIS2  | nAS_FSB  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | fsb/ASrf
+INPUTMC | 12 | 4 | 0 | 4 | 15 | 3 | 11 | 3 | 9 | 4 | 3 | 6 | 16 | 6 | 6 | 6 | 12 | 3 | 2 | 3 | 0 | 4 | 2 | 0 | 3
+INPUTP | 4 | 36 | 30 | 29 | 54
 EXPORTS | 1 | 4 | 3
 EQ | 10 | 
    nCAS.D = !ram/RASEL;
    !nCAS.CLK = CLK_FSB;	// GCK
-    nCAS_OBUF.EXP  =  !A_FSB<23> & A_FSB<21> & !A_FSB<18> & 
+    nCAS_OBUF.EXP  =  !A_FSB<23> & A_FSB<22> & A_FSB<21> & ram/Once & 
+	!cnt/RefDone & !cs/nOverlay1 & !ram/RAMDIS2 & !nAS_FSB & 
+	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & 
+	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & ram/Once & 
+	!cnt/RefDone & !cs/nOverlay1 & !ram/RAMDIS2 & !ram/RS_FSM_FFd2 & 
+	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
+	cnt/RefCnt<7> & fsb/ASrf
+GLOBALS | 1 | 2 | CLK_FSB
+
+MACROCELL | 5 | 16 | nDinLE_OBUF
+ATTRIBUTES | 8684290 | 0
+OUTPUTMC | 1 | 5 | 15
+INPUTS | 6 | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd2  | CLK_IOB  | iobm/IOS_FSM_FFd3  | iobm/RESrf  | iobm/RESrr
+INPUTMC | 5 | 0 | 16 | 5 | 9 | 5 | 2 | 0 | 2 | 0 | 1
+INPUTP | 1 | 35
+EXPORTS | 1 | 5 | 15
+EQ | 4 | 
+   nDinLE.D = iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2;
+   !nDinLE.CLK = CLK2X_IOB;	// GCK
+    nDinLE_OBUF.EXP  =  CLK_IOB & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & 
+	iobm/RESrf & iobm/RESrr
+GLOBALS | 1 | 2 | CLK2X_IOB
+
+MACROCELL | 3 | 5 | nDinOE_OBUF
+ATTRIBUTES | 264962 | 0
+INPUTS | 7 | A_FSB<23>  | nWE_FSB  | nAS_FSB  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | SW<1>
+INPUTP | 7 | 36 | 47 | 54 | 30 | 29 | 28 | 97
+EQ | 5 | 
+   nDinOE = A_FSB<23> & nWE_FSB & !nAS_FSB
+	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & nWE_FSB & 
+	!nAS_FSB
+	# A_FSB<22> & !A_FSB<21> & nWE_FSB & !nAS_FSB & 
+	!SW<1>;
+
+MACROCELL | 3 | 4 | nDoutOE_OBUF
+ATTRIBUTES | 8684290 | 0
+INPUTS | 3 | IORW0  | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd2
+INPUTMC | 3 | 7 | 17 | 5 | 2 | 5 | 9
+EQ | 3 | 
+   nDoutOE.D = !IORW0
+	# !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd2;
+   nDoutOE.CLK = CLK2X_IOB;	// GCK
+GLOBALS | 1 | 2 | CLK2X_IOB
+
+MACROCELL | 7 | 4 | nRAS_OBUF
+ATTRIBUTES | 264962 | 0
+OUTPUTMC | 1 | 7 | 3
+INPUTS | 14 | A_FSB<23>  | A_FSB<21>  | A_FSB<18>  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nADoutLE1  | nWE_FSB  | A_FSB<20>  | SW<1>  | A_FSB<14>  | A_FSB<13>  | A_FSB<22>  | cs/nOverlay1  | nRAMLWE_OBUF.EXP
+INPUTMC | 5 | 7 | 3 | 3 | 7 | 5 | 13 | 3 | 9 | 7 | 5
+INPUTP | 9 | 36 | 29 | 24 | 47 | 28 | 97 | 19 | 18 | 30
+EXPORTS | 1 | 7 | 3
+IMPORTS | 1 | 7 | 5
+EQ | 16 | 
+   !nRAS = ;Imported pterms FB8_6
+	  RefAck
+	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
+	!ram/RAMDIS2 & !nAS_FSB & !ram/RAMDIS1
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
+	!cs/nOverlay1 & !ram/RAMDIS2 & !nAS_FSB & !ram/RAMDIS1;
+    nRAS_OBUF.EXP  =  !A_FSB<23> & A_FSB<21> & !A_FSB<18> & 
 	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<17> & 
+	# !A_FSB<23> & A_FSB<21> & nWE_FSB & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+	# !A_FSB<23> & !A_FSB<20> & SW<1> & 
 	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
 	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & 
 	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
 	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
 	cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 5 | 16 | nDinLE_OBUF
-ATTRIBUTES | 8684290 | 0
-OUTPUTMC | 1 | 5 | 17
-INPUTS | 12 | iobm/IOS_FSM_FFd4  | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd1  | nBERR_IOB  | iobm/IOS_FSM_FFd2  | CLK_IOB  | IOBERR  | iobm/ETACK  | iobm/DTACKrf  | iobm/DTACKrr  | iobm/BERRrf  | iobm/BERRrr
-INPUTMC | 10 | 5 | 6 | 5 | 9 | 3 | 11 | 3 | 9 | 5 | 17 | 5 | 0 | 0 | 4 | 0 | 3 | 0 | 6 | 0 | 5
-INPUTP | 2 | 123 | 35
-EXPORTS | 1 | 5 | 17
-EQ | 12 | 
-   nDinLE.D = iobm/IOS_FSM_FFd4 & iobm/IOS_FSM_FFd1
-	# !iobm/IOS_FSM_FFd4 & iobm/IOS_FSM_FFd3;
-   !nDinLE.CLK = CLK2X_IOB;	// GCK
-    nDinLE_OBUF.EXP  =  nBERR_IOB & !iobm/IOS_FSM_FFd4 & 
-	iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd2 & iobm/IOS_FSM_FFd1 & CLK_IOB & 
-	IOBERR & iobm/ETACK
-	# nBERR_IOB & !iobm/IOS_FSM_FFd4 & 
-	iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd2 & iobm/IOS_FSM_FFd1 & CLK_IOB & 
-	IOBERR & iobm/DTACKrf & iobm/DTACKrr
-	# nBERR_IOB & !iobm/IOS_FSM_FFd4 & 
-	iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd2 & iobm/IOS_FSM_FFd1 & CLK_IOB & 
-	IOBERR & iobm/BERRrf & iobm/BERRrr
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 3 | 5 | nDinOE_OBUF
-ATTRIBUTES | 264962 | 0
-INPUTS | 6 | A_FSB<23>  | nWE_FSB  | nAS_FSB  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>
-INPUTP | 6 | 36 | 47 | 54 | 30 | 29 | 28
-EQ | 3 | 
-   nDinOE = A_FSB<23> & nWE_FSB & !nAS_FSB
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & nWE_FSB & 
-	!nAS_FSB;
-
-MACROCELL | 3 | 4 | nDoutOE_OBUF
-ATTRIBUTES | 8684290 | 0
-INPUTS | 4 | IORW0  | iobm/IOS_FSM_FFd4  | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd2
-INPUTMC | 4 | 4 | 17 | 5 | 6 | 5 | 9 | 3 | 9
-EQ | 4 | 
-   nDoutOE.D = !IORW0
-	# !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd3 & 
-	!iobm/IOS_FSM_FFd2;
-   nDoutOE.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 5 | 8 | nLDS_IOB_OBUF
-ATTRIBUTES | 8684290 | 0
-INPUTS | 6 | IOL0  | iobm/IOS_FSM_FFd4  | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd2  | IORW0
-INPUTMC | 6 | 3 | 16 | 5 | 6 | 5 | 9 | 3 | 11 | 3 | 9 | 4 | 17
-EQ | 8 | 
-   nLDS_IOB.D = !IOL0
-	# !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd3 & 
-	!iobm/IOS_FSM_FFd2
-	# !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd3 & 
-	iobm/IOS_FSM_FFd1
-	# IORW0 & iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd2 & 
-	!iobm/IOS_FSM_FFd1;
-   !nLDS_IOB.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
-
-MACROCELL | 7 | 4 | nRAS_OBUF
-ATTRIBUTES | 264962 | 0
-INPUTS | 8 | RefAck  | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | ram/RAMDIS2  | nAS_FSB  | ram/RAMDIS1  | A_FSB<21>
-INPUTMC | 4 | 0 | 16 | 3 | 13 | 7 | 12 | 7 | 14
-INPUTP | 4 | 36 | 30 | 54 | 29
-EQ | 5 | 
-   !nRAS = RefAck
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
-	!ram/RAMDIS2 & !nAS_FSB & !ram/RAMDIS1
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/RAMDIS2 & !nAS_FSB & !ram/RAMDIS1;
-
-MACROCELL | 5 | 10 | nUDS_IOB_OBUF
-ATTRIBUTES | 8684290 | 0
-INPUTS | 6 | IOU0  | iobm/IOS_FSM_FFd4  | iobm/IOS_FSM_FFd3  | iobm/IOS_FSM_FFd1  | iobm/IOS_FSM_FFd2  | IORW0
-INPUTMC | 6 | 3 | 15 | 5 | 6 | 5 | 9 | 3 | 11 | 3 | 9 | 4 | 17
-EQ | 8 | 
-   nUDS_IOB.D = !IOU0
-	# !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd3 & 
-	!iobm/IOS_FSM_FFd2
-	# !iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd3 & 
-	iobm/IOS_FSM_FFd1
-	# IORW0 & iobm/IOS_FSM_FFd4 & !iobm/IOS_FSM_FFd2 & 
-	!iobm/IOS_FSM_FFd1;
-   !nUDS_IOB.CLK = CLK2X_IOB;	// GCK
-GLOBALS | 1 | 2 | CLK2X_IOB
 
 MACROCELL | 7 | 1 | A_FSB_19_IBUF$BUF0
 ATTRIBUTES | 264962 | 0
 OUTPUTMC | 1 | 7 | 0
-INPUTS | 13 | A_FSB<22>  | cs/nOverlay1  | cnt/RefDone  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | ram/BACTr  | fsb/ASrf  | nAS_FSB  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | ram/RS_FSM_FFd3  | fsb/BERR0r.EXP
-INPUTMC | 11 | 3 | 13 | 6 | 2 | 6 | 15 | 7 | 3 | 3 | 0 | 0 | 7 | 0 | 10 | 0 | 9 | 0 | 8 | 6 | 13 | 7 | 2
-INPUTP | 2 | 30 | 54
+INPUTS | 7 | A_FSB<19>  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | iobs/Once  | nADoutLE1  | IORW0  | nWE_FSB
+INPUTMC | 5 | 7 | 3 | 3 | 7 | 7 | 13 | 5 | 13 | 7 | 17
+INPUTP | 2 | 26 | 47
 EXPORTS | 1 | 7 | 0
-IMPORTS | 1 | 7 | 2
-EQ | 14 | 
-   RA<11> = ;Imported pterms FB8_3
-	  A_FSB<19>;
-    A_FSB_19_IBUF$BUF0.EXP  =  A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
+EQ | 5 | 
+   RA<11> = A_FSB<19>;
+    A_FSB_19_IBUF$BUF0.EXP  =  iobs/PS_FSM_FFd2
+	# iobs/PS_FSM_FFd1
+	# iobs/Once & nADoutLE1
+	# IORW0 & nWE_FSB & nADoutLE1
+
+MACROCELL | 6 | 8 | A_FSB_21_IBUF$BUF0
+ATTRIBUTES | 264962 | 0
+OUTPUTMC | 1 | 6 | 7
+INPUTS | 6 | A_FSB<21>  | A_FSB<9>  | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | ram/RASEL
+INPUTMC | 2 | 3 | 9 | 4 | 0
+INPUTP | 4 | 29 | 12 | 36 | 30
+EXPORTS | 1 | 6 | 7
+EQ | 5 | 
+   RA<10> = A_FSB<21>;
+    A_FSB_21_IBUF$BUF0.EXP  =  A_FSB<9> & !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
+	ram/RASEL
+	# A_FSB<9> & !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
+	!cs/nOverlay1 & ram/RASEL
+
+MACROCELL | 6 | 13 | CLK20EN_OBUF$BUF0
+ATTRIBUTES | 264962 | 0
+OUTPUTMC | 1 | 6 | 12
+INPUTS | 10 | SW<0>  | cnt/RefDone  | nAS_FSB  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | fsb/ASrf
+INPUTMC | 8 | 3 | 11 | 6 | 16 | 6 | 6 | 6 | 12 | 3 | 2 | 3 | 0 | 4 | 2 | 0 | 3
+INPUTP | 2 | 98 | 54
+EXPORTS | 1 | 6 | 12
+EQ | 7 | 
+   CLK20EN = SW<0>;
+    CLK20EN_OBUF$BUF0.EXP  =  !cnt/RefDone & !nAS_FSB & ram/RS_FSM_FFd2 & 
+	ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
+	cnt/RefCnt<7>
+	# !cnt/RefDone & ram/RS_FSM_FFd2 & ram/RS_FSM_FFd1 & 
+	ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & 
+	fsb/ASrf
+
+MACROCELL | 6 | 11 | CLK25EN_OBUF
+ATTRIBUTES | 264962 | 0
+OUTPUTMC | 1 | 6 | 12
+INPUTS | 9 | SW<0>  | A_FSB<22>  | A_FSB<21>  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | cs/nOverlay1  | nAS_FSB  | fsb/ASrf
+INPUTMC | 5 | 6 | 16 | 6 | 6 | 6 | 12 | 3 | 9 | 0 | 3
+INPUTP | 4 | 98 | 30 | 29 | 54
+EXPORTS | 1 | 6 | 12
+EQ | 9 | 
+   CLK25EN = !SW<0>;
+    CLK25EN_OBUF.EXP  =  A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd2 & 
+	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
+	# A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd2 & 
+	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
+	# !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd2 & 
+	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
+	# nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
+	!ram/RS_FSM_FFd3 & !fsb/ASrf
+
+MACROCELL | 7 | 14 | Park
+ATTRIBUTES | 8815430 | 0
+OUTPUTMC | 5 | 2 | 14 | 2 | 8 | 2 | 10 | 2 | 16 | 7 | 13
+INPUTS | 13 | RESr0  | RESr1  | IPL2r0  | RESr2  | RESDone  | IPL2r1  | A_FSB<23>  | A_FSB<21>  | A_FSB<19>  | iobs/Once  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>
+INPUTMC | 7 | 0 | 9 | 0 | 8 | 0 | 11 | 0 | 7 | 7 | 6 | 0 | 10 | 7 | 13
+INPUTP | 6 | 36 | 29 | 26 | 24 | 23 | 22
+EXPORTS | 1 | 7 | 13
+EQ | 8 | 
+   nBR_IOB.D = Gnd;
+   nBR_IOB.CLK = CLK_FSB;	// GCK
+   nBR_IOB.CE = RESr0 & RESr1 & IPL2r0 & RESr2 & !RESDone & 
+	IPL2r1;
+    Park.EXP  =  !A_FSB<23> & A_FSB<21> & !A_FSB<19> & !iobs/Once
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<18> & !iobs/Once
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<17> & !iobs/Once
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<16> & !iobs/Once
+GLOBALS | 1 | 2 | CLK_FSB
+
+MACROCELL | 5 | 13 | nADoutLE1_OBUF
+ATTRIBUTES | 8815366 | 0
+OUTPUTMC | 22 | 7 | 13 | 3 | 17 | 7 | 17 | 3 | 15 | 0 | 17 | 5 | 13 | 2 | 9 | 2 | 2 | 3 | 16 | 2 | 17 | 7 | 3 | 4 | 12 | 7 | 8 | 2 | 15 | 7 | 0 | 7 | 1 | 7 | 2 | 7 | 4 | 7 | 7 | 7 | 9 | 7 | 12 | 7 | 16
+INPUTS | 3 | iobs/Clear1  | nADoutLE1  | iobs/Load1
+INPUTMC | 3 | 2 | 17 | 5 | 13 | 4 | 12
+EQ | 3 | 
+   !nADoutLE1.D = iobs/Load1
+	# !iobs/Clear1 & !nADoutLE1;
+   nADoutLE1.CLK = CLK_FSB;	// GCK
+GLOBALS | 1 | 2 | CLK_FSB
+
+MACROCELL | 3 | 1 | nAoutOE_OBUF
+ATTRIBUTES | 8815366 | 0
+OUTPUTMC | 8 | 5 | 1 | 5 | 11 | 5 | 8 | 5 | 10 | 5 | 2 | 5 | 15 | 5 | 6 | 3 | 1
+INPUTS | 4 | iobm/BGr1  | nAoutOE  | iobm/BGr0  | nAS_IOB
+INPUTMC | 4 | 1 | 13 | 3 | 1 | 1 | 14 | 5 | 11
+EQ | 4 | 
+   nAoutOE.D = !iobm/BGr0 & !iobm/BGr1
+	# !iobm/BGr1 & nAoutOE
+	# !nAS_IOB & !iobm/BGr0 & !nAoutOE;
+   nAoutOE.CLK = CLK2X_IOB;	// GCK
+GLOBALS | 1 | 2 | CLK2X_IOB
+
+MACROCELL | 7 | 5 | nRAMLWE_OBUF
+ATTRIBUTES | 264962 | 0
+OUTPUTMC | 1 | 7 | 4
+INPUTS | 10 | nWE_FSB  | nLDS_FSB  | ram/RAMDIS2  | nAS_FSB  | ram/RAMDIS1  | RefAck  | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | A_FSB<21>
+INPUTMC | 4 | 4 | 3 | 4 | 7 | 0 | 6 | 3 | 9
+INPUTP | 6 | 47 | 49 | 54 | 36 | 30 | 29
+EXPORTS | 1 | 7 | 4
+EQ | 7 | 
+   !nRAMLWE = !nWE_FSB & !nLDS_FSB & !ram/RAMDIS2 & !nAS_FSB & 
+	!ram/RAMDIS1;
+    nRAMLWE_OBUF.EXP  =  RefAck
+	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
+	!ram/RAMDIS2 & !nAS_FSB & !ram/RAMDIS1
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
+	!cs/nOverlay1 & !ram/RAMDIS2 & !nAS_FSB & !ram/RAMDIS1
+
+MACROCELL | 7 | 7 | nRAMUWE_OBUF
+ATTRIBUTES | 264962 | 0
+OUTPUTMC | 1 | 7 | 8
+INPUTS | 10 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | iobs/PS_FSM_FFd2  | nADoutLE1  | A_FSB<20>  | A_FSB<19>  | A_FSB<17>  | A_FSB<16>  | RESDone.EXP
+INPUTMC | 3 | 7 | 3 | 5 | 13 | 7 | 6
+INPUTP | 7 | 36 | 30 | 29 | 28 | 26 | 23 | 22
+EXPORTS | 1 | 7 | 8
+IMPORTS | 1 | 7 | 6
+EQ | 13 | 
+   !nRAMUWE = ;Imported pterms FB8_7
+	  !nWE_FSB & !nUDS_FSB & !ram/RAMDIS2 & !nAS_FSB & 
+	!ram/RAMDIS1;
+    nRAMUWE_OBUF.EXP  =  !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & 
+	!iobs/PS_FSM_FFd2 & nADoutLE1
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<20> & 
+	!iobs/PS_FSM_FFd2 & nADoutLE1
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<19> & 
+	!iobs/PS_FSM_FFd2 & nADoutLE1
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<17> & 
+	!iobs/PS_FSM_FFd2 & nADoutLE1
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<16> & 
+	!iobs/PS_FSM_FFd2 & nADoutLE1
+
+MACROCELL | 4 | 1 | nROMCS_OBUF
+ATTRIBUTES | 264962 | 0
+OUTPUTMC | 1 | 4 | 0
+INPUTS | 13 | A_FSB<22>  | cnt/RefDone  | cs/nOverlay1  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | ram/BACTr  | fsb/ASrf  | nAS_FSB  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | ram/RS_FSM_FFd3  | cnt/RefCnt<7>.EXP
+INPUTMC | 11 | 3 | 11 | 3 | 9 | 6 | 16 | 6 | 6 | 0 | 0 | 0 | 3 | 3 | 2 | 3 | 0 | 4 | 2 | 6 | 12 | 4 | 2
+INPUTP | 2 | 30 | 54
+EXPORTS | 1 | 4 | 0
+IMPORTS | 1 | 4 | 2
+EQ | 19 | 
+   !nROMCS = ;Imported pterms FB5_3
+	  A_FSB<23> & !A_FSB<22> & !A_FSB<21> & !A_FSB<20> & 
+	!SW<1>
+	# !A_FSB<23> & A_FSB<22> & !A_FSB<21> & !A_FSB<20> & 
+	SW<1>
+	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & !A_FSB<20> & 
+	!cs/nOverlay1;
+    nROMCS_OBUF.EXP  =  A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & 
 	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
+	# !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & 
 	!nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
+	# !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & 
 	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
 	# !cnt/RefDone & nAS_FSB & !ram/RS_FSM_FFd2 & 
 	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & 
@@ -1951,261 +2128,103 @@ EQ | 14 |
 	ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & 
 	!fsb/ASrf
 
-MACROCELL | 6 | 8 | A_FSB_21_IBUF$BUF0
-ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 6 | 7
-INPUTS | 6 | A_FSB<21>  | A_FSB<9>  | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | ram/RASEL
-INPUTMC | 2 | 3 | 13 | 7 | 0
-INPUTP | 4 | 29 | 12 | 36 | 30
-EXPORTS | 1 | 6 | 7
-EQ | 3 | 
-   RA<10> = A_FSB<21>;
-    A_FSB_21_IBUF$BUF0.EXP  =  A_FSB<9> & !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & ram/RASEL
-
-MACROCELL | 5 | 13 | nADoutLE1_OBUF
-ATTRIBUTES | 8815366 | 0
-OUTPUTMC | 22 | 4 | 6 | 4 | 15 | 4 | 17 | 3 | 16 | 3 | 15 | 2 | 2 | 5 | 13 | 2 | 12 | 3 | 17 | 2 | 5 | 4 | 3 | 7 | 8 | 4 | 12 | 3 | 2 | 2 | 9 | 4 | 0 | 4 | 1 | 4 | 2 | 4 | 4 | 4 | 11 | 4 | 13 | 4 | 16
-INPUTS | 3 | iobs/Clear1  | nADoutLE1  | iobs/Load1
-INPUTMC | 3 | 3 | 2 | 5 | 13 | 7 | 8
-EQ | 3 | 
-   !nADoutLE1.D = iobs/Load1
-	# !iobs/Clear1 & !nADoutLE1;
-   nADoutLE1.CLK = CLK_FSB;	// GCK
-GLOBALS | 1 | 2 | CLK_FSB
-
-MACROCELL | 7 | 5 | nRAMLWE_OBUF
-ATTRIBUTES | 264962 | 0
-INPUTS | 5 | nWE_FSB  | nLDS_FSB  | ram/RAMDIS2  | nAS_FSB  | ram/RAMDIS1
-INPUTMC | 2 | 7 | 12 | 7 | 14
-INPUTP | 3 | 47 | 49 | 54
-EQ | 2 | 
-   !nRAMLWE = !nWE_FSB & !nLDS_FSB & !ram/RAMDIS2 & !nAS_FSB & 
-	!ram/RAMDIS1;
-
-MACROCELL | 7 | 7 | nRAMUWE_OBUF
-ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 7 | 8
-INPUTS | 10 | nWE_FSB  | nUDS_FSB  | ram/RAMDIS2  | nAS_FSB  | ram/RAMDIS1  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | cs/nOverlay1  | A_FSB<19>
-INPUTMC | 3 | 7 | 12 | 7 | 14 | 3 | 13
-INPUTP | 7 | 47 | 56 | 54 | 36 | 30 | 29 | 26
-EXPORTS | 1 | 7 | 8
-EQ | 6 | 
-   !nRAMUWE = !nWE_FSB & !nUDS_FSB & !ram/RAMDIS2 & !nAS_FSB & 
-	!ram/RAMDIS1;
-    nRAMUWE_OBUF.EXP  =  !A_FSB<23> & !A_FSB<22> & !A_FSB<21>
-	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<19>
-	# !A_FSB<23> & A_FSB<21> & nWE_FSB
-
-MACROCELL | 4 | 1 | nROMCS_OBUF
-ATTRIBUTES | 264962 | 0
-OUTPUTMC | 1 | 4 | 0
-INPUTS | 19 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | cs/nOverlay1  | A_FSB<14>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | iobs/Once  | IORW0  | nWE_FSB  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | fsb/ASrf  | nADoutLE1  | A_FSB<13>  | nAS_FSB
-INPUTMC | 7 | 3 | 13 | 4 | 7 | 4 | 17 | 4 | 3 | 3 | 6 | 0 | 7 | 5 | 13
-INPUTP | 12 | 36 | 30 | 29 | 28 | 19 | 26 | 24 | 23 | 22 | 47 | 18 | 54
-EXPORTS | 1 | 4 | 0
-EQ | 15 | 
-   !nROMCS = !A_FSB<23> & A_FSB<22> & !A_FSB<21> & !A_FSB<20>
-	# !A_FSB<23> & !A_FSB<21> & !A_FSB<20> & 
-	!cs/nOverlay1;
-    nROMCS_OBUF.EXP  =  A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !iobs/Once & IORW0 & !nWE_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !iobs/Once & IORW0 & !nWE_FSB & !nAS_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !iobs/Once & IORW0 & !nWE_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-
-MACROCELL | 3 | 1 | nAoutOE_OBUF
-ATTRIBUTES | 264962 | 0
-INPUTS | 0
-EQ | 1 | 
-   nAoutOE = Gnd;
-
-MACROCELL | 0 | 17 | $OpTx$FX_DC$609
+MACROCELL | 0 | 13 | $OpTx$FX_DC$708
 ATTRIBUTES | 133888 | 0
-OUTPUTMC | 5 | 2 | 1 | 2 | 0 | 2 | 2 | 2 | 3 | 2 | 17
+OUTPUTMC | 5 | 2 | 14 | 2 | 12 | 2 | 13 | 2 | 15 | 2 | 16
 INPUTS | 2 | nAS_FSB  | fsb/ASrf
-INPUTMC | 1 | 0 | 7
+INPUTMC | 1 | 0 | 3
 INPUTP | 1 | 54
 EQ | 1 | 
-   $OpTx$FX_DC$609 = nAS_FSB & !fsb/ASrf;
+   $OpTx$FX_DC$708 = nAS_FSB & !fsb/ASrf;
 
-MACROCELL | 3 | 14 | $OpTx$FX_DC$610
+MACROCELL | 6 | 9 | $OpTx$$OpTx$FX_DC$182_INV$783
 ATTRIBUTES | 133888 | 0
-OUTPUTMC | 2 | 2 | 8 | 2 | 10
-INPUTS | 5 | TimeoutB  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>
-INPUTMC | 1 | 6 | 0
-INPUTP | 4 | 36 | 30 | 29 | 28
-EQ | 2 | 
-   $OpTx$FX_DC$610 = !TimeoutB
-	# !A_FSB<23> & A_FSB<22> & !A_FSB<21> & A_FSB<20>;
-
-MACROCELL | 2 | 0 | EXP14_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 2 | 1
-INPUTS | 13 | A_FSB<22>  | TimeoutB  | fsb/VPA  | $OpTx$FX_DC$609  | A_FSB<21>  | A_FSB<23>  | fsb/Ready1r  | iobs/IOReady  | cs/nOverlay1  | fsb/Ready0r  | ram/RAMReady  | A_FSB<20>  | EXP25_.EXP
-INPUTMC | 9 | 6 | 0 | 2 | 1 | 0 | 17 | 2 | 4 | 3 | 17 | 3 | 13 | 6 | 3 | 6 | 17 | 2 | 17
-INPUTP | 4 | 30 | 29 | 36 | 28
-EXPORTS | 1 | 2 | 1
-IMPORTS | 1 | 2 | 17
-EQ | 36 | 
-       EXP14_.EXP  =  !A_FSB<22> & TimeoutB & fsb/VPA & 
-	!$OpTx$FX_DC$609
-	# A_FSB<21> & TimeoutB & fsb/VPA & 
-	!$OpTx$FX_DC$609
-	# A_FSB<23> & !fsb/Ready1r & fsb/VPA & 
-	!iobs/IOReady & !$OpTx$FX_DC$609
+OUTPUTMC | 4 | 2 | 14 | 2 | 8 | 2 | 10 | 2 | 16
+INPUTS | 9 | A_FSB<20>  | TimeoutB  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | cs/nOverlay1  | fsb/Ready0r  | ram/RAMReady  | RA_9_OBUF.EXP
+INPUTMC | 5 | 6 | 2 | 3 | 9 | 6 | 3 | 6 | 0 | 6 | 10
+INPUTP | 4 | 28 | 36 | 30 | 29
+IMPORTS | 1 | 6 | 10
+EQ | 9 | 
+   $OpTx$$OpTx$FX_DC$182_INV$783 = A_FSB<23> & TimeoutB
+	# !A_FSB<22> & TimeoutB
+	# A_FSB<21> & TimeoutB
+	# !A_FSB<20> & TimeoutB
 	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
-	!fsb/Ready0r & fsb/VPA & !ram/RAMReady & !$OpTx$FX_DC$609
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r & 
-	fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$609
-;Imported pterms FB3_18
-	# A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	fsb/VPA & !$OpTx$FX_DC$609
-	# A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	fsb/VPA & !$OpTx$FX_DC$609
-	# A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	fsb/VPA & !$OpTx$FX_DC$609
-	# A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	fsb/VPA & !$OpTx$FX_DC$609
-	# A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	fsb/VPA & !$OpTx$FX_DC$609
+	!fsb/Ready0r & !ram/RAMReady
+;Imported pterms FB7_11
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
+	!cs/nOverlay1 & !fsb/Ready0r & !ram/RAMReady;
 
-MACROCELL | 2 | 2 | EXP15_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 2 | 1
-INPUTS | 20 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | cs/nOverlay1  | fsb/Ready0r  | fsb/VPA  | ram/RAMReady  | $OpTx$FX_DC$609  | A_FSB<14>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | nWE_FSB  | fsb/Ready1r  | iobs/IOReady  | A_FSB<13>  | nADoutLE1  | EXP16_.EXP
-INPUTMC | 9 | 3 | 13 | 6 | 3 | 2 | 1 | 6 | 17 | 0 | 17 | 2 | 4 | 3 | 17 | 5 | 13 | 2 | 3
-INPUTP | 11 | 36 | 30 | 29 | 19 | 28 | 26 | 24 | 23 | 22 | 47 | 18
-EXPORTS | 1 | 2 | 1
-IMPORTS | 1 | 2 | 3
-EQ | 43 | 
-       EXP15_.EXP  =  !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !fsb/Ready0r & fsb/VPA & !ram/RAMReady & 
-	!$OpTx$FX_DC$609
-	# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & 
-	!fsb/Ready1r & fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$609
-	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & 
-	!fsb/Ready1r & fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$609
-	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & 
-	!nADoutLE1 & !$OpTx$FX_DC$609
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & 
-	!nADoutLE1 & !$OpTx$FX_DC$609
-;Imported pterms FB3_4
-	# A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	fsb/VPA & !$OpTx$FX_DC$609
-	# A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	fsb/VPA & !$OpTx$FX_DC$609
-	# A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	fsb/VPA & !$OpTx$FX_DC$609
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !TimeoutB & !fsb/BERR0r & 
-	!fsb/BERR1r & fsb/Ready1r & !$OpTx$FX_DC$609
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !TimeoutB & !fsb/BERR0r & 
-	!fsb/BERR1r & iobs/IOReady & !$OpTx$FX_DC$609
-
-MACROCELL | 2 | 3 | EXP16_
+MACROCELL | 2 | 1 | EXP14_
 ATTRIBUTES | 2048 | 0
 OUTPUTMC | 1 | 2 | 2
-INPUTS | 28 | A_FSB<9>  | A_FSB<15>  | A_FSB<14>  | A_FSB<13>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | nWE_FSB  | TimeoutA  | fsb/Ready2r  | fsb/VPA  | $OpTx$FX_DC$609  | A_FSB<8>  | BERR_IOBS  | TimeoutB  | fsb/BERR0r  | fsb/BERR1r  | fsb/Ready1r  | iobs/IOReady
-INPUTMC | 11 | 3 | 13 | 6 | 11 | 2 | 14 | 2 | 1 | 0 | 17 | 4 | 15 | 6 | 0 | 7 | 2 | 3 | 12 | 2 | 4 | 3 | 17
-INPUTP | 17 | 12 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 11
+INPUTS | 10 | nAS_FSB  | fsb/ASrf  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | cs/nOverlay1  | A_FSB<20>  | fsb/Ready1r.EXP
+INPUTMC | 5 | 0 | 3 | 7 | 3 | 3 | 7 | 3 | 9 | 2 | 0
+INPUTP | 5 | 54 | 36 | 30 | 29 | 28
 EXPORTS | 1 | 2 | 2
-EQ | 25 | 
-       EXP16_.EXP  =  A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
+IMPORTS | 1 | 2 | 0
+EQ | 8 | 
+       EXP14_.EXP  =  nAS_FSB & !fsb/ASrf
+	# !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
+	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21>
+	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<20>
+;Imported pterms FB3_1
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
+	cs/nOverlay1
+
+MACROCELL | 2 | 3 | EXP15_
+ATTRIBUTES | 2048 | 0
+OUTPUTMC | 1 | 2 | 2
+INPUTS | 9 | A_FSB<23>  | A_FSB<21>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | A_FSB<20>  | SW<1>  | fsb/Ready2r.EXP
+INPUTMC | 1 | 2 | 4
+INPUTP | 8 | 36 | 29 | 26 | 24 | 23 | 22 | 28 | 97
+EXPORTS | 1 | 2 | 2
+IMPORTS | 1 | 2 | 4
+EQ | 7 | 
+       EXP15_.EXP  =  !A_FSB<23> & A_FSB<21> & !A_FSB<19>
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<18>
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<17>
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<16>
+	# !A_FSB<23> & !A_FSB<20> & SW<1>
+;Imported pterms FB3_5
+	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21>
+
+MACROCELL | 2 | 5 | EXP16_
+ATTRIBUTES | 2048 | 0
+OUTPUTMC | 1 | 2 | 4
+INPUTS | 21 | nAS_FSB  | fsb/ASrf  | A_FSB<8>  | A_FSB<15>  | A_FSB<14>  | A_FSB<13>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | nWE_FSB  | TimeoutA  | fsb/Ready2r
+INPUTMC | 4 | 0 | 3 | 3 | 9 | 3 | 14 | 2 | 4
+INPUTP | 17 | 54 | 11 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47
+EXPORTS | 1 | 2 | 4
+EQ | 17 | 
+       EXP16_.EXP  =  nAS_FSB & !fsb/ASrf
+	# A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
 	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
 	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	fsb/VPA & !$OpTx$FX_DC$609
-	# A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
+	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
+	# A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
+	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
 	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	fsb/VPA & !$OpTx$FX_DC$609
+	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
 	# A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
 	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
 	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	fsb/VPA & !$OpTx$FX_DC$609
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !TimeoutB & !fsb/BERR0r & 
-	!fsb/BERR1r & fsb/Ready1r & !$OpTx$FX_DC$609
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !TimeoutB & !fsb/BERR0r & 
-	!fsb/BERR1r & iobs/IOReady & !$OpTx$FX_DC$609
+	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
+	# A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
+	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
+	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
+	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
 
-MACROCELL | 2 | 5 | EXP17_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 2 | 4
-INPUTS | 14 | A_FSB<14>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | nWE_FSB  | fsb/Ready1r  | iobs/IOReady  | nADoutLE1  | A_FSB<13>
-INPUTMC | 4 | 3 | 13 | 2 | 4 | 3 | 17 | 5 | 13
-INPUTP | 10 | 19 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 18
-EXPORTS | 1 | 2 | 4
-EQ | 8 | 
-       EXP17_.EXP  =  A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & !iobs/IOReady & 
-	!nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & !iobs/IOReady & 
-	!nADoutLE1
-
-MACROCELL | 2 | 6 | EXP18_
+MACROCELL | 2 | 6 | EXP17_
 ATTRIBUTES | 2048 | 0
 OUTPUTMC | 1 | 2 | 7
 INPUTS | 21 | A_FSB<9>  | A_FSB<15>  | A_FSB<14>  | A_FSB<13>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | nWE_FSB  | TimeoutA  | fsb/Ready2r  | nDTACK_FSB  | A_FSB<8>
-INPUTMC | 4 | 3 | 13 | 6 | 11 | 2 | 14 | 2 | 8
+INPUTMC | 4 | 3 | 9 | 3 | 14 | 2 | 4 | 2 | 8
 INPUTP | 17 | 12 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 11
 EXPORTS | 1 | 2 | 7
 EQ | 15 | 
-       EXP18_.EXP  =  A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
+       EXP17_.EXP  =  A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
 	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
 	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
 	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
@@ -2221,23 +2240,22 @@ EQ | 15 |
 	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
 	nDTACK_FSB
 
-MACROCELL | 2 | 7 | EXP19_
+MACROCELL | 2 | 7 | EXP18_
 ATTRIBUTES | 2048 | 0
 OUTPUTMC | 1 | 2 | 8
-INPUTS | 17 | A_FSB<23>  | fsb/Ready1r  | iobs/IOReady  | nDTACK_FSB  | A_FSB<22>  | cs/nOverlay1  | fsb/Ready0r  | ram/RAMReady  | A_FSB<21>  | A_FSB<20>  | A_FSB<14>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | nWE_FSB  | EXP18_.EXP
-INPUTMC | 7 | 2 | 4 | 3 | 17 | 2 | 8 | 3 | 13 | 6 | 3 | 6 | 17 | 2 | 6
-INPUTP | 10 | 36 | 30 | 29 | 28 | 19 | 26 | 24 | 23 | 22 | 47
+INPUTS | 18 | nAS_FSB  | fsb/ASrf  | A_FSB<23>  | fsb/Ready1r  | iobs/IOReady  | nDTACK_FSB  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | SW<1>  | A_FSB<14>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | nWE_FSB  | EXP17_.EXP
+INPUTMC | 6 | 0 | 3 | 2 | 0 | 3 | 16 | 2 | 8 | 3 | 9 | 2 | 6
+INPUTP | 12 | 54 | 36 | 30 | 29 | 28 | 97 | 19 | 26 | 24 | 23 | 22 | 47
 EXPORTS | 1 | 2 | 8
 IMPORTS | 1 | 2 | 6
-EQ | 27 | 
-       EXP19_.EXP  =  A_FSB<23> & !fsb/Ready1r & !iobs/IOReady & 
+EQ | 26 | 
+       EXP18_.EXP  =  nAS_FSB & !fsb/ASrf
+	# A_FSB<23> & !fsb/Ready1r & !iobs/IOReady & 
 	nDTACK_FSB
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
-	!fsb/Ready0r & nDTACK_FSB & !ram/RAMReady
 	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r & 
 	!iobs/IOReady & nDTACK_FSB
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !fsb/Ready0r & nDTACK_FSB & !ram/RAMReady
+	# A_FSB<22> & !A_FSB<21> & !fsb/Ready1r & 
+	!iobs/IOReady & !SW<1> & nDTACK_FSB
 	# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
 	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & 
 	!fsb/Ready1r & !iobs/IOReady & nDTACK_FSB
@@ -2258,16 +2276,16 @@ EQ | 27 |
 	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
 	nDTACK_FSB
 
-MACROCELL | 2 | 9 | EXP20_
+MACROCELL | 2 | 9 | EXP19_
 ATTRIBUTES | 2048 | 0
 OUTPUTMC | 1 | 2 | 8
-INPUTS | 25 | A_FSB<13>  | A_FSB<22>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | nWE_FSB  | fsb/Ready1r  | iobs/IOReady  | nDTACK_FSB  | A_FSB<14>  | A_FSB<21>  | nADoutLE1  | A_FSB<9>  | A_FSB<15>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<23>  | TimeoutA  | fsb/Ready2r  | A_FSB<8>  | EXP21_.EXP
-INPUTMC | 8 | 3 | 13 | 2 | 4 | 3 | 17 | 2 | 8 | 5 | 13 | 6 | 11 | 2 | 14 | 2 | 10
+INPUTS | 25 | A_FSB<13>  | A_FSB<22>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | nWE_FSB  | fsb/Ready1r  | iobs/IOReady  | nDTACK_FSB  | A_FSB<14>  | A_FSB<21>  | nADoutLE1  | A_FSB<9>  | A_FSB<15>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<23>  | TimeoutA  | fsb/Ready2r  | A_FSB<8>  | EXP20_.EXP
+INPUTMC | 8 | 3 | 9 | 2 | 0 | 3 | 16 | 2 | 8 | 5 | 13 | 3 | 14 | 2 | 4 | 2 | 10
 INPUTP | 17 | 18 | 30 | 28 | 26 | 24 | 23 | 22 | 47 | 19 | 29 | 12 | 21 | 17 | 15 | 13 | 36 | 11
 EXPORTS | 1 | 2 | 8
 IMPORTS | 1 | 2 | 10
 EQ | 47 | 
-       EXP20_.EXP  =  A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
+       EXP19_.EXP  =  A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
 	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & 
 	!fsb/Ready1r & !iobs/IOReady & nDTACK_FSB
 	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
@@ -2308,299 +2326,297 @@ EQ | 47 |
 	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
 	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
 	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	fsb/Ready1r & $OpTx$FX_DC$610
+	fsb/Ready1r & nBR_IOB & !$OpTx$$OpTx$FX_DC$182_INV$783
 	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
 	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
 	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
 	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	iobs/IOReady & $OpTx$FX_DC$610
+	iobs/IOReady & nBR_IOB & !$OpTx$$OpTx$FX_DC$182_INV$783
 
-MACROCELL | 2 | 10 | EXP21_
+MACROCELL | 2 | 10 | EXP20_
 ATTRIBUTES | 2048 | 0
 OUTPUTMC | 1 | 2 | 9
-INPUTS | 27 | A_FSB<9>  | A_FSB<15>  | A_FSB<14>  | A_FSB<13>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | nWE_FSB  | TimeoutA  | fsb/Ready2r  | nDTACK_FSB  | A_FSB<8>  | BERR_IOBS  | fsb/BERR0r  | fsb/BERR1r  | fsb/Ready1r  | $OpTx$FX_DC$610  | iobs/IOReady
-INPUTMC | 10 | 3 | 13 | 6 | 11 | 2 | 14 | 2 | 8 | 4 | 15 | 7 | 2 | 3 | 12 | 2 | 4 | 3 | 14 | 3 | 17
+INPUTS | 28 | A_FSB<9>  | A_FSB<15>  | A_FSB<14>  | A_FSB<13>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | nWE_FSB  | TimeoutA  | fsb/Ready2r  | nDTACK_FSB  | A_FSB<8>  | BERR_IOBS  | fsb/BERR0r  | fsb/BERR1r  | fsb/Ready1r  | nBR_IOB  | $OpTx$$OpTx$FX_DC$182_INV$783  | iobs/IOReady
+INPUTMC | 11 | 3 | 9 | 3 | 14 | 2 | 4 | 2 | 8 | 3 | 17 | 7 | 15 | 3 | 8 | 2 | 0 | 7 | 14 | 6 | 9 | 3 | 16
 INPUTP | 17 | 12 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 11
 EXPORTS | 1 | 2 | 9
+EQ | 25 | 
+       EXP20_.EXP  =  A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
+	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
+	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
+	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
+	nDTACK_FSB
+	# A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
+	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
+	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
+	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
+	nDTACK_FSB
+	# A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
+	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
+	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
+	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
+	nDTACK_FSB
+	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
+	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
+	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
+	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
+	fsb/Ready1r & nBR_IOB & !$OpTx$$OpTx$FX_DC$182_INV$783
+	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
+	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
+	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
+	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
+	iobs/IOReady & nBR_IOB & !$OpTx$$OpTx$FX_DC$182_INV$783
+
+MACROCELL | 2 | 12 | EXP21_
+ATTRIBUTES | 2048 | 0
+OUTPUTMC | 1 | 2 | 13
+INPUTS | 22 | A_FSB<9>  | A_FSB<15>  | A_FSB<14>  | A_FSB<13>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | nWE_FSB  | TimeoutA  | fsb/Ready2r  | fsb/VPA  | $OpTx$FX_DC$708  | A_FSB<8>
+INPUTMC | 5 | 3 | 9 | 3 | 14 | 2 | 4 | 2 | 14 | 0 | 13
+INPUTP | 17 | 12 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 11
+EXPORTS | 1 | 2 | 13
 EQ | 25 | 
        EXP21_.EXP  =  A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
 	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
 	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
 	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	nDTACK_FSB
+	fsb/VPA & !$OpTx$FX_DC$708
 	# A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
 	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
 	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
 	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	nDTACK_FSB
+	fsb/VPA & !$OpTx$FX_DC$708
+	# A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
+	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
+	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
+	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
+	fsb/VPA & !$OpTx$FX_DC$708
+	# A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
+	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
+	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
+	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
+	fsb/VPA & !$OpTx$FX_DC$708
 	# A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
 	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
 	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
 	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	nDTACK_FSB
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	fsb/Ready1r & $OpTx$FX_DC$610
-	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
-	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
-	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
-	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
-	iobs/IOReady & $OpTx$FX_DC$610
+	fsb/VPA & !$OpTx$FX_DC$708
 
-MACROCELL | 2 | 11 | EXP22_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 2 | 12
-INPUTS | 10 | nWE_FSB  | iobs/IORW1  | nAS_FSB  | fsb/ASrf  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | cs/nOverlay1
-INPUTMC | 5 | 2 | 12 | 0 | 7 | 4 | 3 | 3 | 6 | 3 | 13
-INPUTP | 5 | 47 | 54 | 36 | 30 | 29
-EXPORTS | 1 | 2 | 12
-EQ | 5 | 
-       EXP22_.EXP  =  !nWE_FSB & !iobs/IORW1
-	# nAS_FSB & !fsb/ASrf
-	# !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1
-	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21>
-	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1
-
-MACROCELL | 2 | 13 | EXP23_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 2 | 12
-INPUTS | 9 | A_FSB<23>  | A_FSB<21>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | A_FSB<22>  | cs/nOverlay1  | fsb/Ready2r.EXP
-INPUTMC | 2 | 3 | 13 | 2 | 14
-INPUTP | 7 | 36 | 29 | 26 | 24 | 23 | 22 | 30
-EXPORTS | 1 | 2 | 12
-IMPORTS | 1 | 2 | 14
-EQ | 8 | 
-       EXP23_.EXP  =  !A_FSB<23> & A_FSB<21> & !A_FSB<19>
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<18>
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<17>
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<16>
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1
-;Imported pterms FB3_15
-	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21>
-
-MACROCELL | 2 | 15 | EXP24_
+MACROCELL | 2 | 13 | EXP22_
 ATTRIBUTES | 2048 | 0
 OUTPUTMC | 1 | 2 | 14
-INPUTS | 21 | nAS_FSB  | fsb/ASrf  | A_FSB<8>  | A_FSB<15>  | A_FSB<14>  | A_FSB<13>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | nWE_FSB  | TimeoutA  | fsb/Ready2r
-INPUTMC | 4 | 0 | 7 | 3 | 13 | 6 | 11 | 2 | 14
-INPUTP | 17 | 54 | 11 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47
+INPUTS | 18 | A_FSB<23>  | fsb/Ready1r  | fsb/VPA  | iobs/IOReady  | $OpTx$FX_DC$708  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | SW<1>  | A_FSB<14>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | nWE_FSB  | A_FSB<13>  | EXP21_.EXP
+INPUTMC | 6 | 2 | 0 | 2 | 14 | 3 | 16 | 0 | 13 | 3 | 9 | 2 | 12
+INPUTP | 12 | 36 | 30 | 29 | 28 | 97 | 19 | 26 | 24 | 23 | 22 | 47 | 18
 EXPORTS | 1 | 2 | 14
-EQ | 17 | 
-       EXP24_.EXP  =  nAS_FSB & !fsb/ASrf
-	# A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
+IMPORTS | 1 | 2 | 12
+EQ | 38 | 
+       EXP22_.EXP  =  A_FSB<23> & !fsb/Ready1r & fsb/VPA & 
+	!iobs/IOReady & !$OpTx$FX_DC$708
+	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !fsb/Ready1r & 
+	fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$708
+	# A_FSB<22> & !A_FSB<21> & !fsb/Ready1r & fsb/VPA & 
+	!iobs/IOReady & !SW<1> & !$OpTx$FX_DC$708
+	# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & 
+	!fsb/Ready1r & fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$708
+	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
+	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & 
+	!fsb/Ready1r & fsb/VPA & !iobs/IOReady & !$OpTx$FX_DC$708
+;Imported pterms FB3_13
+	# A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
 	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
 	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
-	# A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
-	# A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
+	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
+	fsb/VPA & !$OpTx$FX_DC$708
+	# A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
 	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
 	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
-	# A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
-	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r
-
-MACROCELL | 2 | 17 | EXP25_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 2 | 0
-INPUTS | 22 | A_FSB<9>  | A_FSB<15>  | A_FSB<14>  | A_FSB<13>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | nWE_FSB  | TimeoutA  | fsb/Ready2r  | fsb/VPA  | $OpTx$FX_DC$609  | A_FSB<8>
-INPUTMC | 5 | 3 | 13 | 6 | 11 | 2 | 14 | 2 | 1 | 0 | 17
-INPUTP | 17 | 12 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 11
-EXPORTS | 1 | 2 | 0
-EQ | 25 | 
-       EXP25_.EXP  =  A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
-	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
-	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
-	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	fsb/VPA & !$OpTx$FX_DC$609
+	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
+	fsb/VPA & !$OpTx$FX_DC$708
 	# A_FSB<9> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
 	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
 	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
 	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	fsb/VPA & !$OpTx$FX_DC$609
+	fsb/VPA & !$OpTx$FX_DC$708
 	# A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
 	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
 	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
 	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	fsb/VPA & !$OpTx$FX_DC$609
+	fsb/VPA & !$OpTx$FX_DC$708
+	# A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
+	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & A_FSB<22> & 
+	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
+	A_FSB<16> & !cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
+	fsb/VPA & !$OpTx$FX_DC$708
+
+MACROCELL | 2 | 15 | EXP23_
+ATTRIBUTES | 2048 | 0
+OUTPUTMC | 1 | 2 | 14
+INPUTS | 26 | A_FSB<14>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | nWE_FSB  | fsb/Ready1r  | fsb/VPA  | iobs/IOReady  | nADoutLE1  | $OpTx$FX_DC$708  | A_FSB<13>  | A_FSB<9>  | A_FSB<15>  | A_FSB<12>  | A_FSB<11>  | A_FSB<10>  | A_FSB<23>  | TimeoutA  | fsb/Ready2r  | A_FSB<8>  | nROMWE_OBUF.EXP
+INPUTMC | 9 | 3 | 9 | 2 | 0 | 2 | 14 | 3 | 16 | 5 | 13 | 0 | 13 | 3 | 14 | 2 | 4 | 2 | 16
+INPUTP | 17 | 19 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 18 | 12 | 21 | 17 | 15 | 13 | 36 | 11
+EXPORTS | 1 | 2 | 14
+IMPORTS | 1 | 2 | 16
+EQ | 36 | 
+       EXP23_.EXP  =  A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
+	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
+	cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & 
+	!nADoutLE1 & !$OpTx$FX_DC$708
+	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
+	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
+	cs/nOverlay1 & !nWE_FSB & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & 
+	!nADoutLE1 & !$OpTx$FX_DC$708
+	# A_FSB<9> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
+	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
+	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
+	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
+	fsb/VPA & !$OpTx$FX_DC$708
 	# A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & 
 	A_FSB<12> & A_FSB<11> & A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
 	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
 	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	fsb/VPA & !$OpTx$FX_DC$609
+	fsb/VPA & !$OpTx$FX_DC$708
 	# A_FSB<8> & A_FSB<15> & !A_FSB<14> & A_FSB<13> & 
 	!A_FSB<12> & !A_FSB<11> & !A_FSB<10> & !A_FSB<23> & !A_FSB<22> & 
 	A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & 
 	A_FSB<16> & cs/nOverlay1 & !nWE_FSB & !TimeoutA & !fsb/Ready2r & 
-	fsb/VPA & !$OpTx$FX_DC$609
+	fsb/VPA & !$OpTx$FX_DC$708
+;Imported pterms FB3_17
+	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
+	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
+	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
+	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
+	fsb/Ready1r & nBR_IOB & !$OpTx$FX_DC$708 & 
+	!$OpTx$$OpTx$FX_DC$182_INV$783
+	# A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & 
+	A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & 
+	A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & 
+	A_FSB<17> & A_FSB<16> & !BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r & 
+	iobs/IOReady & nBR_IOB & !$OpTx$FX_DC$708 & 
+	!$OpTx$$OpTx$FX_DC$182_INV$783
 
-MACROCELL | 4 | 0 | EXP26_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 4 | 17
-INPUTS | 19 | A_FSB<14>  | A_FSB<22>  | A_FSB<20>  | A_FSB<19>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | cs/nOverlay1  | iobs/Once  | IORW0  | nWE_FSB  | nAS_FSB  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nADoutLE1  | fsb/ASrf  | A_FSB<13>  | A_FSB<21>  | nROMCS_OBUF.EXP
-INPUTMC | 8 | 3 | 13 | 4 | 7 | 4 | 17 | 4 | 3 | 3 | 6 | 5 | 13 | 0 | 7 | 4 | 1
-INPUTP | 11 | 19 | 30 | 28 | 26 | 24 | 23 | 22 | 47 | 54 | 18 | 29
-EXPORTS | 1 | 4 | 17
-IMPORTS | 1 | 4 | 1
-EQ | 33 | 
-       EXP26_.EXP  =  A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & 
-	!iobs/Once & IORW0 & !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<14> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & 
-	!iobs/Once & IORW0 & !nWE_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & 
-	!iobs/Once & IORW0 & !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<13> & A_FSB<22> & A_FSB<20> & A_FSB<19> & 
-	A_FSB<18> & A_FSB<17> & A_FSB<16> & !cs/nOverlay1 & 
-	!iobs/Once & IORW0 & !nWE_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !iobs/Once & IORW0 & !nWE_FSB & !nAS_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-;Imported pterms FB5_2
-	# A_FSB<14> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !iobs/Once & IORW0 & !nWE_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !iobs/Once & IORW0 & !nWE_FSB & !nAS_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<13> & !A_FSB<22> & A_FSB<21> & A_FSB<20> & 
-	A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & 
-	cs/nOverlay1 & !iobs/Once & IORW0 & !nWE_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-
-MACROCELL | 4 | 2 | EXP27_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 4 | 3
-INPUTS | 10 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nADoutLE1  | cs/nOverlay1  | A_FSB<19>  | A_FSB<16>  | nWE_FSB
-INPUTMC | 4 | 4 | 3 | 3 | 6 | 5 | 13 | 3 | 13
-INPUTP | 6 | 36 | 30 | 29 | 26 | 22 | 47
-EXPORTS | 1 | 4 | 3
-EQ | 10 | 
-       EXP27_.EXP  =  !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<19> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<16> & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-	# !A_FSB<23> & A_FSB<21> & nWE_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
-
-MACROCELL | 4 | 6 | EXP28_
+MACROCELL | 4 | 6 | EXP24_
 ATTRIBUTES | 2048 | 0
 OUTPUTMC | 1 | 4 | 7
-INPUTS | 9 | A_FSB<23>  | iobs/Once  | iobs/PS_FSM_FFd1  | iobs/PS_FSM_FFd2  | nADoutLE1  | A_FSB<22>  | A_FSB<21>  | cs/nOverlay1  | nOE_OBUF.EXP
-INPUTMC | 6 | 4 | 7 | 3 | 6 | 4 | 3 | 5 | 13 | 3 | 13 | 4 | 5
-INPUTP | 3 | 36 | 30 | 29
+INPUTS | 9 | A_FSB<22>  | A_FSB<21>  | cnt/RefDone  | nAS_FSB  | ram/RS_FSM_FFd1  | ram/BACTr  | fsb/ASrf  | cs/nOverlay1  | nOE_OBUF.EXP
+INPUTMC | 6 | 3 | 11 | 6 | 6 | 0 | 0 | 0 | 3 | 3 | 9 | 4 | 5
+INPUTP | 3 | 30 | 29 | 54
 EXPORTS | 1 | 4 | 7
 IMPORTS | 1 | 4 | 5
-EQ | 11 | 
-       EXP28_.EXP  =  A_FSB<23> & !iobs/Once & iobs/PS_FSM_FFd1
-	# !iobs/Once & iobs/PS_FSM_FFd2 & !nADoutLE1
-	# !iobs/Once & iobs/PS_FSM_FFd1 & !nADoutLE1
-	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & !iobs/Once
-	# !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 & 
-	!iobs/Once
+EQ | 17 | 
+       EXP24_.EXP  =  A_FSB<22> & !A_FSB<21> & !cnt/RefDone & !nAS_FSB & 
+	!ram/RS_FSM_FFd1 & !ram/BACTr
+	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & 
+	!ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
+	# A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & 
+	!nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr
+	# A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & 
+	!ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
+	# !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & 
+	!nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr
 ;Imported pterms FB5_6
-	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & 
-	!iobs/Once
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1 & !iobs/Once
+	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & 
+	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
+	# A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & 
+	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
+	# !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & 
+	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
 
-MACROCELL | 4 | 9 | EXP29_
+MACROCELL | 4 | 9 | EXP25_
 ATTRIBUTES | 2048 | 0
 OUTPUTMC | 1 | 4 | 8
 INPUTS | 3 | A_FSB<14>  | ram/RASEL  | A_FSB<5>
-INPUTMC | 1 | 7 | 0
+INPUTMC | 1 | 4 | 0
 INPUTP | 2 | 19 | 4
 EXPORTS | 1 | 4 | 8
 EQ | 2 | 
-       EXP29_.EXP  =  A_FSB<14> & !ram/RASEL
+       EXP25_.EXP  =  A_FSB<14> & !ram/RASEL
 	# ram/RASEL & A_FSB<5>
 
-MACROCELL | 4 | 16 | EXP30_
+MACROCELL | 4 | 16 | EXP26_
 ATTRIBUTES | 2048 | 0
 OUTPUTMC | 1 | 4 | 17
-INPUTS | 12 | A_FSB<23>  | iobs/Once  | IORW0  | nWE_FSB  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | fsb/ASrf  | nADoutLE1  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>  | nAS_FSB
-INPUTMC | 6 | 4 | 7 | 4 | 17 | 4 | 3 | 3 | 6 | 0 | 7 | 5 | 13
-INPUTP | 6 | 36 | 47 | 30 | 29 | 28 | 54
+INPUTS | 13 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | ram/Once  | cs/nOverlay1  | nAS_FSB  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | fsb/ASrf  | cnt/RefDone  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<7>
+INPUTMC | 9 | 4 | 15 | 3 | 9 | 6 | 16 | 6 | 6 | 0 | 3 | 3 | 11 | 3 | 2 | 3 | 0 | 4 | 2
+INPUTP | 4 | 36 | 30 | 29 | 54
 EXPORTS | 1 | 4 | 17
-EQ | 14 | 
-       EXP30_.EXP  =  A_FSB<23> & !iobs/Once & !IORW0 & nWE_FSB & 
-	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !iobs/Once & 
-	IORW0 & !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !iobs/Once & 
-	IORW0 & !nWE_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
-	fsb/ASrf & nADoutLE1
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !iobs/Once & 
-	!IORW0 & nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & 
-	!iobs/PS_FSM_FFd1 & nADoutLE1
-	# A_FSB<22> & !A_FSB<21> & A_FSB<20> & !iobs/Once & 
-	!IORW0 & nWE_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & 
-	fsb/ASrf & nADoutLE1
-
-MACROCELL | 6 | 12 | EXP31_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 6 | 13
-INPUTS | 11 | ram/Once  | cnt/RefDone  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | nAS_FSB  | fsb/ASrf  | TimeoutA.EXP
-INPUTMC | 10 | 7 | 6 | 6 | 2 | 6 | 15 | 7 | 3 | 6 | 13 | 0 | 10 | 0 | 9 | 0 | 8 | 0 | 7 | 6 | 11
-INPUTP | 1 | 54
-EXPORTS | 1 | 6 | 13
-IMPORTS | 1 | 6 | 11
-EQ | 23 | 
-       EXP31_.EXP  =  ram/Once & cnt/RefDone & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
-	# ram/Once & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
-	!ram/RS_FSM_FFd3 & !cnt/RefCnt<5>
-	# ram/Once & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
-	!ram/RS_FSM_FFd3 & !cnt/RefCnt<6>
-	# ram/Once & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
-	!ram/RS_FSM_FFd3 & !cnt/RefCnt<7>
-	# nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
-	!ram/RS_FSM_FFd3 & !fsb/ASrf
-;Imported pterms FB7_12
-	# A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
-	# A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
-	# !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
-	# !cnt/RefDone & !nAS_FSB & ram/RS_FSM_FFd2 & 
-	ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
+EQ | 13 | 
+       EXP26_.EXP  =  !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & 
+	!cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & 
+	!cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & fsb/ASrf
+	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & 
+	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
+	cnt/RefCnt<7>
+	# A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & 
+	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
+	cnt/RefCnt<7>
+	# !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & 
+	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
 	cnt/RefCnt<7>
-	# !cnt/RefDone & ram/RS_FSM_FFd2 & ram/RS_FSM_FFd1 & 
-	ram/RS_FSM_FFd3 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & 
-	fsb/ASrf
 
-MACROCELL | 6 | 14 | EXP32_
+MACROCELL | 4 | 17 | EXP27_
+ATTRIBUTES | 2048 | 0
+OUTPUTMC | 1 | 4 | 0
+INPUTS | 12 | A_FSB<23>  | A_FSB<22>  | ram/Once  | cs/nOverlay1  | nAS_FSB  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | fsb/ASrf  | A_FSB<21>  | cnt/RefDone  | ram/BACTr  | EXP26_.EXP
+INPUTMC | 8 | 4 | 15 | 3 | 9 | 6 | 16 | 6 | 6 | 0 | 3 | 3 | 11 | 0 | 0 | 4 | 16
+INPUTP | 4 | 36 | 30 | 54 | 29
+EXPORTS | 1 | 4 | 0
+IMPORTS | 1 | 4 | 16
+EQ | 24 | 
+       EXP27_.EXP  =  !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & 
+	!nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1
+	# !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & 
+	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & fsb/ASrf
+	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & !nAS_FSB & 
+	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr
+	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & 
+	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
+	# A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & 
+	!nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr
+;Imported pterms FB5_17
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & 
+	!cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & 
+	!cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & fsb/ASrf
+	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & 
+	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
+	cnt/RefCnt<7>
+	# A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & 
+	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
+	cnt/RefCnt<7>
+	# !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & 
+	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
+	cnt/RefCnt<7>
+
+MACROCELL | 6 | 14 | EXP28_
 ATTRIBUTES | 2048 | 0
 OUTPUTMC | 1 | 6 | 15
-INPUTS | 12 | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | cnt/RefCnt<5>  | ram/BACTr  | nAS_FSB  | fsb/ASrf  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | ram/RS_FSM_FFd3.EXP
-INPUTMC | 9 | 7 | 3 | 6 | 13 | 0 | 10 | 3 | 0 | 0 | 7 | 0 | 9 | 0 | 8 | 3 | 13 | 6 | 13
-INPUTP | 3 | 54 | 36 | 30
+INPUTS | 13 | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | fsb/ASrf  | A_FSB<21>  | nAS_FSB  | cnt/RefDone  | ram/RS_FSM_FFd2  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<7>
+INPUTMC | 9 | 3 | 9 | 6 | 6 | 6 | 12 | 0 | 3 | 3 | 11 | 6 | 16 | 3 | 2 | 3 | 0 | 4 | 2
+INPUTP | 4 | 36 | 30 | 29 | 54
 EXPORTS | 1 | 6 | 15
-IMPORTS | 1 | 6 | 13
+EQ | 9 | 
+       EXP28_.EXP  =  !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
+	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
+	!cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
+	!cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf
+	# !cnt/RefDone & nAS_FSB & ram/RS_FSM_FFd2 & 
+	ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & 
+	!fsb/ASrf
+
+MACROCELL | 6 | 15 | EXP29_
+ATTRIBUTES | 2048 | 0
+OUTPUTMC | 1 | 6 | 16
+INPUTS | 12 | ram/RS_FSM_FFd1  | ram/RS_FSM_FFd3  | cnt/RefCnt<5>  | ram/BACTr  | nAS_FSB  | fsb/ASrf  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | EXP28_.EXP
+INPUTMC | 9 | 6 | 6 | 6 | 12 | 3 | 2 | 0 | 0 | 0 | 3 | 3 | 0 | 4 | 2 | 3 | 9 | 6 | 14
+INPUTP | 3 | 54 | 36 | 30
+EXPORTS | 1 | 6 | 16
+IMPORTS | 1 | 6 | 14
 EQ | 20 | 
-       EXP32_.EXP  =  !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & 
+       EXP29_.EXP  =  !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & 
 	!cnt/RefCnt<5> & ram/BACTr
 	# nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & 
 	!cnt/RefCnt<5> & !fsb/ASrf
@@ -2610,7 +2626,7 @@ EQ | 20 |
 	!cnt/RefCnt<7> & !fsb/ASrf
 	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB & 
 	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3
-;Imported pterms FB7_14
+;Imported pterms FB7_15
 	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & 
 	!ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf
 	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
@@ -2621,199 +2637,179 @@ EQ | 20 |
 	ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & 
 	!fsb/ASrf
 
-MACROCELL | 6 | 16 | EXP33_
+MACROCELL | 6 | 17 | EXP30_
 ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 6 | 17
-INPUTS | 11 | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | ram/Once  | nAS_FSB  | ram/RS_FSM_FFd1  | fsb/ASrf  | cnt/RefDone  | ram/BACTr  | A_FSB<21>  | ram/RS_FSM_FFd2.EXP
-INPUTMC | 7 | 3 | 13 | 7 | 6 | 7 | 3 | 0 | 7 | 6 | 2 | 3 | 0 | 6 | 15
+OUTPUTMC | 1 | 6 | 0
+INPUTS | 11 | A_FSB<23>  | A_FSB<22>  | ram/Once  | cs/nOverlay1  | nAS_FSB  | ram/RS_FSM_FFd1  | fsb/ASrf  | cnt/RefDone  | ram/BACTr  | A_FSB<21>  | ram/RS_FSM_FFd2.EXP
+INPUTMC | 7 | 4 | 15 | 3 | 9 | 6 | 6 | 0 | 3 | 3 | 11 | 0 | 0 | 6 | 16
 INPUTP | 4 | 36 | 30 | 54 | 29
-EXPORTS | 1 | 6 | 17
-IMPORTS | 1 | 6 | 15
+EXPORTS | 1 | 6 | 0
+IMPORTS | 1 | 6 | 16
 EQ | 13 | 
-       EXP33_.EXP  =  !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !ram/Once & 
+       EXP30_.EXP  =  !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & 
 	!nAS_FSB & !ram/RS_FSM_FFd1
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !ram/Once & 
+	# !A_FSB<23> & !A_FSB<22> & !ram/Once & cs/nOverlay1 & 
 	!ram/RS_FSM_FFd1 & fsb/ASrf
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
+	# A_FSB<22> & !cnt/RefDone & cs/nOverlay1 & 
 	!ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
+	# !A_FSB<22> & !cnt/RefDone & !cs/nOverlay1 & 
 	!ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !ram/RS_FSM_FFd1 & fsb/ASrf
-;Imported pterms FB7_16
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & !ram/Once & 
+	!cs/nOverlay1 & !ram/RS_FSM_FFd1 & fsb/ASrf
+;Imported pterms FB7_17
 	# !cnt/RefDone & cnt/RefCnt<5> & cnt/RefCnt<6> & 
 	cnt/RefCnt<7>
 
-MACROCELL | 7 | 9 | EXP34_
+MACROCELL | 7 | 0 | EXP31_
+ATTRIBUTES | 2048 | 0
+OUTPUTMC | 1 | 7 | 17
+INPUTS | 9 | IORW0  | iobs/IORW1  | nADoutLE1  | nAS_FSB  | fsb/ASrf  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB_19_IBUF$BUF0.EXP
+INPUTMC | 5 | 7 | 17 | 2 | 2 | 5 | 13 | 0 | 3 | 7 | 1
+INPUTP | 4 | 54 | 36 | 30 | 29
+EXPORTS | 1 | 7 | 17
+IMPORTS | 1 | 7 | 1
+EQ | 10 | 
+       EXP31_.EXP  =  IORW0 & iobs/IORW1 & !nADoutLE1
+	# !IORW0 & !iobs/IORW1 & !nADoutLE1
+	# nAS_FSB & !fsb/ASrf & nADoutLE1
+	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & nADoutLE1
+	# !A_FSB<23> & A_FSB<21> & !IORW0 & nADoutLE1
+;Imported pterms FB8_2
+	# iobs/PS_FSM_FFd2
+	# iobs/PS_FSM_FFd1
+	# iobs/Once & nADoutLE1
+	# IORW0 & nWE_FSB & nADoutLE1
+
+MACROCELL | 7 | 2 | EXP32_
+ATTRIBUTES | 2048 | 0
+OUTPUTMC | 1 | 7 | 3
+INPUTS | 10 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | iobs/PS_FSM_FFd2  | iobs/PS_FSM_FFd1  | nADoutLE1  | A_FSB<20>  | A_FSB<19>  | A_FSB<17>  | A_FSB<16>
+INPUTMC | 3 | 7 | 3 | 3 | 7 | 5 | 13
+INPUTP | 7 | 36 | 30 | 29 | 28 | 26 | 23 | 22
+EXPORTS | 1 | 7 | 3
+EQ | 10 | 
+       EXP32_.EXP  =  !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<20> & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<19> & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<17> & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<16> & 
+	!iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1
+
+MACROCELL | 7 | 9 | EXP33_
 ATTRIBUTES | 2048 | 0
 OUTPUTMC | 1 | 7 | 8
-INPUTS | 9 | A_FSB<23>  | A_FSB<21>  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | A_FSB<14>  | A_FSB<13>  | A_FSB<22>  | cs/nOverlay1
-INPUTMC | 1 | 3 | 13
-INPUTP | 8 | 36 | 29 | 24 | 23 | 22 | 19 | 18 | 30
+INPUTS | 12 | A_FSB<23>  | A_FSB<21>  | A_FSB<18>  | iobs/PS_FSM_FFd2  | nADoutLE1  | nWE_FSB  | A_FSB<20>  | SW<1>  | A_FSB<14>  | A_FSB<13>  | A_FSB<22>  | cs/nOverlay1
+INPUTMC | 3 | 7 | 3 | 5 | 13 | 3 | 9
+INPUTP | 9 | 36 | 29 | 24 | 47 | 28 | 97 | 19 | 18 | 30
 EXPORTS | 1 | 7 | 8
-EQ | 6 | 
-       EXP34_.EXP  =  !A_FSB<23> & A_FSB<21> & !A_FSB<18>
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<17>
-	# !A_FSB<23> & A_FSB<21> & !A_FSB<16>
-	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21>
+EQ | 10 | 
+       EXP33_.EXP  =  !A_FSB<23> & A_FSB<21> & !A_FSB<18> & 
+	!iobs/PS_FSM_FFd2 & nADoutLE1
+	# !A_FSB<23> & A_FSB<21> & nWE_FSB & 
+	!iobs/PS_FSM_FFd2 & nADoutLE1
+	# !A_FSB<23> & !A_FSB<20> & SW<1> & 
+	!iobs/PS_FSM_FFd2 & nADoutLE1
+	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & 
+	!iobs/PS_FSM_FFd2 & nADoutLE1
 	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	cs/nOverlay1
+	cs/nOverlay1 & !iobs/PS_FSM_FFd2 & nADoutLE1
 
-MACROCELL | 7 | 10 | EXP35_
+MACROCELL | 7 | 10 | EXP34_
 ATTRIBUTES | 2048 | 0
 OUTPUTMC | 1 | 7 | 11
-INPUTS | 9 | nAS_FSB  | BERR_IOBS  | TimeoutB  | fsb/BERR0r  | fsb/BERR1r  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>
-INPUTMC | 4 | 4 | 15 | 6 | 0 | 7 | 2 | 3 | 12
-INPUTP | 5 | 54 | 36 | 30 | 29 | 28
+INPUTS | 8 | BERR_IOBS  | TimeoutB  | fsb/BERR0r  | fsb/BERR1r  | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | A_FSB<20>
+INPUTMC | 4 | 3 | 17 | 6 | 2 | 7 | 15 | 3 | 8
+INPUTP | 4 | 36 | 30 | 29 | 28
 EXPORTS | 1 | 7 | 11
-EQ | 4 | 
-       EXP35_.EXP  =  nAS_FSB
-	# !BERR_IOBS & !TimeoutB & !fsb/BERR0r & !fsb/BERR1r
+EQ | 3 | 
+       EXP34_.EXP  =  !BERR_IOBS & !TimeoutB & !fsb/BERR0r & !fsb/BERR1r
 	# !A_FSB<23> & A_FSB<22> & !A_FSB<21> & A_FSB<20> & 
 	!BERR_IOBS & !fsb/BERR0r & !fsb/BERR1r
 
-MACROCELL | 7 | 13 | EXP36_
+MACROCELL | 7 | 12 | EXP35_
 ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 7 | 14
-INPUTS | 9 | A_FSB<22>  | A_FSB<21>  | cnt/RefDone  | nAS_FSB  | ram/RS_FSM_FFd1  | ram/BACTr  | fsb/ASrf  | cs/nOverlay1  | ram/RAMDIS2.EXP
-INPUTMC | 6 | 6 | 2 | 7 | 3 | 3 | 0 | 0 | 7 | 3 | 13 | 7 | 12
-INPUTP | 3 | 30 | 29 | 54
-EXPORTS | 1 | 7 | 14
-IMPORTS | 1 | 7 | 12
-EQ | 17 | 
-       EXP36_.EXP  =  A_FSB<22> & !A_FSB<21> & !cnt/RefDone & !nAS_FSB & 
-	!ram/RS_FSM_FFd1 & !ram/BACTr
-	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
-	!nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
-	!nAS_FSB & !ram/RS_FSM_FFd1 & !ram/BACTr
-;Imported pterms FB8_13
-	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
+OUTPUTMC | 1 | 7 | 13
+INPUTS | 9 | A_FSB<23>  | iobs/Once  | iobs/PS_FSM_FFd1  | nADoutLE1  | A_FSB<22>  | A_FSB<21>  | cs/nOverlay1  | A_FSB<20>  | nBERR_FSB_OBUF.EXP
+INPUTMC | 5 | 7 | 13 | 3 | 7 | 5 | 13 | 3 | 9 | 7 | 11
+INPUTP | 4 | 36 | 30 | 29 | 28
+EXPORTS | 1 | 7 | 13
+IMPORTS | 1 | 7 | 11
+EQ | 13 | 
+       EXP35_.EXP  =  A_FSB<23> & !iobs/Once & iobs/PS_FSM_FFd1
+	# !iobs/Once & iobs/PS_FSM_FFd1 & !nADoutLE1
+	# !A_FSB<23> & !A_FSB<22> & !A_FSB<21> & !iobs/Once
+	# !A_FSB<23> & !A_FSB<22> & !iobs/Once & 
+	!cs/nOverlay1
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<20> & !iobs/Once
+;Imported pterms FB8_12
+	# !A_FSB<23> & A_FSB<21> & !iobs/Once & nWE_FSB
+	# !A_FSB<23> & !A_FSB<20> & !iobs/Once & SW<1>
+	# !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & A_FSB<21> & 
+	!iobs/Once
+	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & !iobs/Once & 
+	cs/nOverlay1
 
-MACROCELL | 7 | 15 | EXP37_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 7 | 14
-INPUTS | 14 | A_FSB<23>  | cnt/RefDone  | ram/RS_FSM_FFd1  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<7>  | A_FSB<22>  | cs/nOverlay1  | ram/BACTr  | fsb/ASrf  | ram/Once  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd3  | nAS_FSB
-INPUTMC | 11 | 6 | 2 | 7 | 3 | 0 | 10 | 0 | 9 | 0 | 8 | 3 | 13 | 3 | 0 | 0 | 7 | 7 | 6 | 6 | 15 | 6 | 13
-INPUTP | 3 | 36 | 30 | 54
-EXPORTS | 1 | 7 | 14
-EQ | 10 | 
-       EXP37_.EXP  =  A_FSB<23> & !cnt/RefDone & !ram/RS_FSM_FFd1 & 
-	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# ram/Once & !cnt/RefDone & !ram/RS_FSM_FFd1 & 
-	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-	# !cnt/RefDone & ram/RS_FSM_FFd2 & ram/RS_FSM_FFd3 & 
-	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7>
-	# !cnt/RefDone & nAS_FSB & !ram/RS_FSM_FFd1 & 
-	cnt/RefCnt<5> & cnt/RefCnt<6> & cnt/RefCnt<7> & !fsb/ASrf
-
-MACROCELL | 7 | 16 | EXP38_
+MACROCELL | 7 | 16 | EXP36_
 ATTRIBUTES | 2048 | 0
 OUTPUTMC | 1 | 7 | 17
-INPUTS | 13 | A_FSB<23>  | A_FSB<22>  | A_FSB<21>  | cs/nOverlay1  | ram/Once  | nAS_FSB  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | fsb/ASrf  | cnt/RefDone  | cnt/RefCnt<5>  | cnt/RefCnt<6>  | cnt/RefCnt<7>
-INPUTMC | 9 | 3 | 13 | 7 | 6 | 6 | 15 | 7 | 3 | 0 | 7 | 6 | 2 | 0 | 10 | 0 | 9 | 0 | 8
-INPUTP | 4 | 36 | 30 | 29 | 54
+INPUTS | 9 | A_FSB<23>  | A_FSB<21>  | A_FSB<19>  | nADoutLE1  | A_FSB<18>  | A_FSB<17>  | A_FSB<16>  | A_FSB<20>  | SW<1>
+INPUTMC | 1 | 5 | 13
+INPUTP | 8 | 36 | 29 | 26 | 24 | 23 | 22 | 28 | 97
 EXPORTS | 1 | 7 | 17
-EQ | 15 | 
-       EXP38_.EXP  =  !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !nAS_FSB & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
-	fsb/ASrf
-	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
-	cnt/RefCnt<7>
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
-	cnt/RefCnt<7>
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
-	cnt/RefCnt<7>
+EQ | 5 | 
+       EXP36_.EXP  =  !A_FSB<23> & A_FSB<21> & !A_FSB<19> & nADoutLE1
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<18> & nADoutLE1
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<17> & nADoutLE1
+	# !A_FSB<23> & A_FSB<21> & !A_FSB<16> & nADoutLE1
+	# !A_FSB<23> & !A_FSB<20> & SW<1> & nADoutLE1
 
-MACROCELL | 7 | 17 | EXP39_
-ATTRIBUTES | 2048 | 0
-OUTPUTMC | 1 | 7 | 0
-INPUTS | 12 | A_FSB<23>  | A_FSB<22>  | cs/nOverlay1  | ram/Once  | nAS_FSB  | ram/RS_FSM_FFd2  | ram/RS_FSM_FFd1  | fsb/ASrf  | A_FSB<21>  | cnt/RefDone  | ram/BACTr  | EXP38_.EXP
-INPUTMC | 8 | 3 | 13 | 7 | 6 | 6 | 15 | 7 | 3 | 0 | 7 | 6 | 2 | 3 | 0 | 7 | 16
-INPUTP | 4 | 36 | 30 | 54 | 29
-EXPORTS | 1 | 7 | 0
-IMPORTS | 1 | 7 | 16
-EQ | 26 | 
-       EXP39_.EXP  =  !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !ram/Once & 
-	!nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1
-	# !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !ram/Once & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & fsb/ASrf
-	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & !nAS_FSB & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr
-	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr & fsb/ASrf
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
-	!nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & !ram/BACTr
-;Imported pterms FB8_17
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !nAS_FSB & !ram/RS_FSM_FFd2 & 
-	!ram/RS_FSM_FFd1
-	# !A_FSB<23> & A_FSB<22> & A_FSB<21> & 
-	!cs/nOverlay1 & !ram/Once & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & 
-	fsb/ASrf
-	# A_FSB<22> & !A_FSB<21> & !cnt/RefDone & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
-	cnt/RefCnt<7>
-	# A_FSB<22> & cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
-	cnt/RefCnt<7>
-	# !A_FSB<22> & !cs/nOverlay1 & !cnt/RefDone & 
-	!ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd1 & cnt/RefCnt<5> & cnt/RefCnt<6> & 
-	cnt/RefCnt<7>
-
-PIN | A_FSB<9> | 64 | 0 | N/A | 12 | 8 | 2 | 14 | 6 | 6 | 2 | 6 | 2 | 3 | 2 | 9 | 2 | 10 | 2 | 17 | 6 | 8
-PIN | A_FSB<8> | 64 | 0 | N/A | 11 | 7 | 2 | 10 | 6 | 4 | 2 | 6 | 2 | 3 | 2 | 9 | 2 | 15 | 2 | 17
-PIN | A_FSB<15> | 64 | 0 | N/A | 21 | 8 | 2 | 14 | 4 | 10 | 2 | 6 | 2 | 3 | 2 | 9 | 2 | 10 | 2 | 15 | 2 | 17
-PIN | A_FSB<14> | 64 | 0 | N/A | 19 | 18 | 4 | 5 | 4 | 13 | 2 | 4 | 2 | 14 | 4 | 4 | 2 | 10 | 2 | 7 | 4 | 1 | 4 | 0 | 4 | 9 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 15 | 2 | 17 | 7 | 9
-PIN | A_FSB<13> | 64 | 0 | N/A | 18 | 17 | 4 | 5 | 4 | 13 | 2 | 4 | 2 | 14 | 4 | 10 | 2 | 10 | 2 | 6 | 4 | 1 | 4 | 0 | 4 | 4 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 9 | 2 | 15 | 2 | 17 | 7 | 9
-PIN | A_FSB<12> | 64 | 0 | N/A | 17 | 8 | 2 | 14 | 4 | 13 | 2 | 6 | 2 | 3 | 2 | 9 | 2 | 10 | 2 | 15 | 2 | 17
-PIN | A_FSB<11> | 64 | 0 | N/A | 15 | 8 | 2 | 14 | 6 | 1 | 2 | 6 | 2 | 3 | 2 | 9 | 2 | 10 | 2 | 15 | 2 | 17
-PIN | A_FSB<10> | 64 | 0 | N/A | 13 | 8 | 2 | 14 | 6 | 5 | 2 | 6 | 2 | 3 | 2 | 9 | 2 | 10 | 2 | 15 | 2 | 17
-PIN | A_FSB<23> | 64 | 0 | N/A | 36 | 53 | 7 | 6 | 4 | 7 | 4 | 17 | 6 | 6 | 7 | 2 | 6 | 3 | 2 | 4 | 2 | 14 | 2 | 1 | 2 | 12 | 7 | 11 | 2 | 7 | 7 | 0 | 6 | 14 | 7 | 3 | 6 | 13 | 4 | 3 | 7 | 8 | 4 | 12 | 7 | 14 | 6 | 17 | 6 | 7 | 7 | 10 | 3 | 5 | 7 | 4 | 4 | 1 | 3 | 14 | 2 | 0 | 2 | 2 | 2 | 3 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 11 | 2 | 13 | 2 | 15 | 2 | 17 | 4 | 2 | 4 | 4 | 4 | 5 | 4 | 6 | 4 | 8 | 4 | 11 | 4 | 13 | 4 | 16 | 6 | 0 | 6 | 8 | 6 | 16 | 7 | 7 | 7 | 9 | 7 | 15 | 7 | 16 | 7 | 17
-PIN | A_FSB<22> | 64 | 0 | N/A | 30 | 49 | 7 | 6 | 4 | 7 | 4 | 16 | 6 | 6 | 7 | 2 | 6 | 3 | 2 | 4 | 2 | 14 | 2 | 0 | 2 | 11 | 7 | 11 | 2 | 7 | 6 | 16 | 6 | 14 | 7 | 3 | 6 | 11 | 4 | 2 | 7 | 7 | 4 | 11 | 7 | 13 | 6 | 17 | 6 | 7 | 7 | 10 | 3 | 5 | 7 | 4 | 4 | 1 | 3 | 14 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 13 | 2 | 15 | 2 | 17 | 4 | 0 | 4 | 4 | 4 | 5 | 4 | 6 | 4 | 13 | 6 | 8 | 6 | 13 | 7 | 1 | 7 | 9 | 7 | 12 | 7 | 15 | 7 | 16 | 7 | 17
-PIN | A_FSB<21> | 64 | 0 | N/A | 29 | 47 | 7 | 6 | 4 | 6 | 4 | 16 | 6 | 6 | 7 | 2 | 6 | 3 | 2 | 4 | 2 | 14 | 2 | 0 | 2 | 12 | 7 | 11 | 2 | 7 | 6 | 16 | 6 | 13 | 7 | 3 | 6 | 11 | 4 | 2 | 7 | 7 | 4 | 11 | 7 | 13 | 6 | 17 | 6 | 7 | 7 | 10 | 3 | 5 | 7 | 4 | 6 | 8 | 4 | 1 | 3 | 14 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 11 | 2 | 13 | 2 | 15 | 2 | 17 | 4 | 0 | 4 | 4 | 4 | 5 | 4 | 8 | 4 | 13 | 7 | 9 | 7 | 12 | 7 | 16 | 7 | 17
-PIN | A_FSB<20> | 64 | 0 | N/A | 28 | 27 | 4 | 7 | 4 | 16 | 6 | 6 | 7 | 2 | 2 | 4 | 2 | 14 | 2 | 1 | 2 | 12 | 2 | 7 | 4 | 3 | 7 | 8 | 4 | 12 | 6 | 10 | 7 | 10 | 3 | 5 | 4 | 1 | 3 | 14 | 2 | 0 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 15 | 2 | 17 | 4 | 0
-PIN | A_FSB<19> | 64 | 0 | N/A | 26 | 20 | 4 | 1 | 4 | 8 | 2 | 4 | 2 | 14 | 4 | 0 | 2 | 10 | 2 | 7 | 4 | 2 | 7 | 7 | 4 | 11 | 6 | 10 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 13 | 2 | 15 | 2 | 17 | 7 | 2
-PIN | A_FSB<18> | 64 | 0 | N/A | 24 | 19 | 4 | 4 | 4 | 13 | 2 | 4 | 2 | 14 | 6 | 7 | 2 | 10 | 2 | 7 | 4 | 1 | 4 | 0 | 4 | 8 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 13 | 2 | 15 | 2 | 17 | 7 | 9
-PIN | A_FSB<17> | 64 | 0 | N/A | 23 | 19 | 4 | 4 | 4 | 13 | 2 | 4 | 2 | 14 | 6 | 4 | 2 | 10 | 2 | 7 | 4 | 1 | 4 | 0 | 4 | 8 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 13 | 2 | 15 | 2 | 17 | 7 | 9
-PIN | A_FSB<16> | 64 | 0 | N/A | 22 | 19 | 4 | 1 | 4 | 8 | 2 | 4 | 2 | 14 | 4 | 14 | 2 | 10 | 2 | 7 | 4 | 2 | 4 | 0 | 4 | 11 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 13 | 2 | 15 | 2 | 17 | 7 | 9
-PIN | nBERR_IOB | 64 | 0 | N/A | 123 | 5 | 5 | 17 | 0 | 6 | 0 | 5 | 5 | 0 | 5 | 16
-PIN | CLK2X_IOB | 4096 | 0 | N/A | 33 | 29 | 5 | 1 | 5 | 6 | 5 | 9 | 3 | 9 | 3 | 11 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 15 | 5 | 17 | 0 | 3 | 5 | 0 | 0 | 2 | 1 | 13 | 5 | 2 | 0 | 5 | 1 | 15 | 3 | 4 | 0 | 1 | 0 | 4 | 1 | 14 | 0 | 6 | 1 | 16 | 5 | 11 | 5 | 16 | 5 | 8 | 5 | 10
-PIN | CLK_FSB | 16384 | 0 | N/A | 42 | 50 | 3 | 13 | 7 | 6 | 6 | 2 | 4 | 7 | 4 | 15 | 4 | 17 | 6 | 6 | 3 | 16 | 3 | 15 | 6 | 11 | 6 | 0 | 6 | 9 | 7 | 2 | 3 | 12 | 6 | 3 | 2 | 4 | 2 | 14 | 2 | 1 | 3 | 8 | 2 | 12 | 3 | 17 | 3 | 7 | 7 | 12 | 2 | 8 | 7 | 0 | 6 | 15 | 7 | 3 | 6 | 13 | 4 | 3 | 3 | 6 | 0 | 15 | 0 | 10 | 0 | 9 | 0 | 0 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 11 | 7 | 8 | 3 | 0 | 0 | 8 | 0 | 16 | 3 | 3 | 4 | 12 | 3 | 2 | 7 | 14 | 6 | 17 | 5 | 13 | 0 | 7 | 4 | 4
-PIN | nAS_FSB | 64 | 0 | N/A | 54 | 51 | 3 | 13 | 7 | 6 | 4 | 7 | 4 | 15 | 4 | 17 | 6 | 6 | 6 | 10 | 4 | 16 | 6 | 9 | 7 | 2 | 3 | 12 | 6 | 3 | 2 | 4 | 0 | 17 | 2 | 11 | 3 | 17 | 7 | 12 | 2 | 8 | 7 | 0 | 6 | 14 | 7 | 3 | 6 | 12 | 4 | 3 | 7 | 8 | 3 | 0 | 4 | 12 | 0 | 7 | 7 | 14 | 6 | 17 | 7 | 10 | 4 | 5 | 2 | 16 | 3 | 10 | 3 | 5 | 7 | 4 | 7 | 5 | 7 | 7 | 2 | 15 | 4 | 0 | 4 | 1 | 6 | 0 | 6 | 1 | 6 | 11 | 6 | 13 | 6 | 16 | 7 | 1 | 7 | 11 | 7 | 13 | 7 | 15 | 7 | 16 | 7 | 17
-PIN | nWE_FSB | 64 | 0 | N/A | 47 | 25 | 4 | 1 | 4 | 17 | 2 | 4 | 2 | 14 | 7 | 7 | 2 | 12 | 2 | 7 | 4 | 2 | 4 | 16 | 4 | 11 | 4 | 5 | 2 | 16 | 3 | 5 | 7 | 5 | 2 | 2 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 11 | 2 | 15 | 2 | 17 | 4 | 0 | 4 | 8
-PIN | nRES | 64 | 0 | N/A | 145 | 3 | 6 | 6 | 1 | 16 | 1 | 15
-PIN | nLDS_FSB | 64 | 0 | N/A | 49 | 3 | 3 | 16 | 3 | 8 | 7 | 5
-PIN | nUDS_FSB | 64 | 0 | N/A | 56 | 3 | 3 | 15 | 3 | 7 | 7 | 7
-PIN | CLK_IOB | 8256 | 0 | N/A | 35 | 8 | 5 | 6 | 5 | 9 | 5 | 15 | 5 | 17 | 5 | 0 | 5 | 14 | 5 | 16 | 1 | 17
-PIN | E_IOB | 64 | 0 | N/A | 37 | 1 | 1 | 17
-PIN | nDTACK_IOB | 64 | 0 | N/A | 127 | 2 | 0 | 4 | 0 | 3
-PIN | nVPA_IOB | 64 | 0 | N/A | 125 | 2 | 1 | 14 | 1 | 13
+PIN | A_FSB<9> | 64 | 0 | N/A | 12 | 8 | 2 | 4 | 2 | 12 | 2 | 6 | 2 | 16 | 2 | 9 | 2 | 10 | 2 | 15 | 6 | 8
+PIN | A_FSB<8> | 64 | 0 | N/A | 11 | 8 | 6 | 4 | 2 | 12 | 2 | 6 | 2 | 5 | 2 | 9 | 2 | 10 | 2 | 15 | 2 | 16
+PIN | A_FSB<15> | 64 | 0 | N/A | 21 | 9 | 2 | 4 | 2 | 12 | 2 | 6 | 4 | 10 | 2 | 5 | 2 | 9 | 2 | 10 | 2 | 15 | 2 | 16
+PIN | A_FSB<14> | 64 | 0 | N/A | 19 | 17 | 7 | 11 | 7 | 17 | 2 | 17 | 2 | 4 | 2 | 13 | 7 | 4 | 2 | 7 | 4 | 13 | 4 | 9 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 12 | 2 | 15 | 2 | 16 | 7 | 9
+PIN | A_FSB<13> | 64 | 0 | N/A | 18 | 16 | 7 | 11 | 7 | 17 | 4 | 10 | 2 | 4 | 2 | 13 | 7 | 4 | 2 | 6 | 4 | 13 | 2 | 17 | 2 | 5 | 2 | 9 | 2 | 10 | 2 | 12 | 2 | 15 | 2 | 16 | 7 | 9
+PIN | A_FSB<12> | 64 | 0 | N/A | 17 | 9 | 2 | 4 | 2 | 12 | 2 | 6 | 2 | 16 | 2 | 5 | 2 | 9 | 2 | 10 | 2 | 15 | 4 | 14
+PIN | A_FSB<11> | 64 | 0 | N/A | 15 | 9 | 2 | 4 | 2 | 12 | 2 | 6 | 2 | 16 | 2 | 5 | 2 | 9 | 2 | 10 | 2 | 15 | 6 | 2
+PIN | A_FSB<10> | 64 | 0 | N/A | 13 | 9 | 2 | 4 | 2 | 12 | 2 | 6 | 6 | 5 | 2 | 5 | 2 | 9 | 2 | 10 | 2 | 15 | 2 | 16
+PIN | A_FSB<23> | 64 | 0 | N/A | 36 | 56 | 4 | 15 | 7 | 13 | 7 | 17 | 3 | 12 | 7 | 15 | 6 | 3 | 2 | 0 | 2 | 4 | 2 | 13 | 2 | 2 | 4 | 3 | 2 | 7 | 4 | 0 | 6 | 15 | 6 | 6 | 6 | 12 | 7 | 3 | 4 | 12 | 7 | 8 | 4 | 7 | 6 | 0 | 6 | 7 | 7 | 10 | 3 | 5 | 7 | 2 | 2 | 16 | 6 | 9 | 2 | 1 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 12 | 2 | 15 | 4 | 2 | 4 | 4 | 4 | 8 | 4 | 11 | 4 | 13 | 4 | 16 | 4 | 17 | 6 | 1 | 6 | 8 | 6 | 10 | 6 | 14 | 6 | 17 | 7 | 0 | 7 | 4 | 7 | 5 | 7 | 7 | 7 | 9 | 7 | 11 | 7 | 12 | 7 | 14 | 7 | 16
+PIN | A_FSB<22> | 64 | 0 | N/A | 30 | 53 | 4 | 15 | 7 | 13 | 7 | 17 | 3 | 12 | 7 | 15 | 6 | 3 | 2 | 0 | 2 | 4 | 2 | 13 | 2 | 1 | 4 | 3 | 2 | 7 | 2 | 17 | 6 | 15 | 6 | 6 | 6 | 11 | 7 | 3 | 4 | 12 | 7 | 8 | 4 | 6 | 6 | 0 | 6 | 7 | 7 | 10 | 3 | 5 | 7 | 2 | 2 | 16 | 6 | 9 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 12 | 2 | 15 | 4 | 1 | 4 | 2 | 4 | 4 | 4 | 5 | 4 | 8 | 4 | 11 | 4 | 13 | 4 | 16 | 4 | 17 | 6 | 8 | 6 | 10 | 6 | 14 | 6 | 17 | 7 | 0 | 7 | 4 | 7 | 5 | 7 | 7 | 7 | 9 | 7 | 11 | 7 | 12
+PIN | A_FSB<21> | 64 | 0 | N/A | 29 | 49 | 4 | 15 | 7 | 12 | 7 | 17 | 3 | 12 | 7 | 15 | 6 | 3 | 2 | 0 | 2 | 4 | 2 | 13 | 2 | 2 | 4 | 2 | 2 | 7 | 2 | 17 | 6 | 14 | 6 | 6 | 6 | 11 | 7 | 2 | 4 | 11 | 7 | 7 | 4 | 6 | 6 | 0 | 6 | 7 | 7 | 10 | 3 | 5 | 7 | 0 | 6 | 8 | 2 | 16 | 6 | 9 | 2 | 1 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 12 | 2 | 15 | 4 | 4 | 4 | 5 | 4 | 13 | 4 | 16 | 4 | 17 | 6 | 10 | 6 | 17 | 7 | 4 | 7 | 5 | 7 | 9 | 7 | 11 | 7 | 14 | 7 | 16
+PIN | A_FSB<20> | 64 | 0 | N/A | 28 | 31 | 7 | 12 | 7 | 17 | 3 | 12 | 7 | 15 | 2 | 0 | 2 | 4 | 2 | 13 | 2 | 1 | 2 | 7 | 7 | 2 | 4 | 11 | 7 | 7 | 6 | 10 | 7 | 10 | 3 | 5 | 2 | 17 | 6 | 9 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 12 | 2 | 15 | 2 | 16 | 4 | 2 | 4 | 13 | 7 | 4 | 7 | 9 | 7 | 11 | 7 | 16
+PIN | A_FSB<19> | 64 | 0 | N/A | 26 | 19 | 2 | 17 | 7 | 16 | 7 | 1 | 2 | 4 | 2 | 13 | 6 | 10 | 2 | 7 | 7 | 2 | 4 | 11 | 7 | 7 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 12 | 2 | 15 | 2 | 16 | 7 | 14
+PIN | A_FSB<18> | 64 | 0 | N/A | 24 | 18 | 7 | 9 | 7 | 16 | 6 | 7 | 2 | 4 | 2 | 13 | 7 | 4 | 2 | 7 | 4 | 13 | 2 | 17 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 12 | 2 | 15 | 2 | 16 | 7 | 14
+PIN | A_FSB<17> | 64 | 0 | N/A | 23 | 18 | 2 | 17 | 7 | 16 | 6 | 4 | 2 | 4 | 2 | 13 | 7 | 7 | 2 | 7 | 7 | 2 | 4 | 11 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 12 | 2 | 15 | 2 | 16 | 7 | 14
+PIN | A_FSB<16> | 64 | 0 | N/A | 22 | 18 | 2 | 17 | 7 | 16 | 4 | 14 | 2 | 4 | 2 | 13 | 7 | 7 | 2 | 7 | 7 | 2 | 4 | 11 | 2 | 3 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 12 | 2 | 15 | 2 | 16 | 7 | 14
+PIN | CLK2X_IOB | 4096 | 0 | N/A | 33 | 31 | 5 | 1 | 5 | 2 | 0 | 16 | 5 | 9 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 15 | 5 | 17 | 1 | 14 | 1 | 11 | 5 | 0 | 1 | 9 | 1 | 6 | 5 | 6 | 1 | 15 | 1 | 13 | 0 | 1 | 3 | 4 | 3 | 1 | 5 | 11 | 5 | 8 | 5 | 10 | 1 | 8 | 1 | 12 | 1 | 7 | 1 | 16 | 0 | 2 | 5 | 16
+PIN | CLK_FSB | 16384 | 0 | N/A | 42 | 57 | 4 | 15 | 3 | 11 | 7 | 13 | 3 | 9 | 3 | 17 | 7 | 17 | 3 | 12 | 3 | 15 | 0 | 17 | 3 | 14 | 6 | 2 | 3 | 13 | 7 | 15 | 3 | 8 | 6 | 3 | 2 | 0 | 2 | 4 | 2 | 14 | 0 | 15 | 2 | 2 | 3 | 16 | 0 | 14 | 4 | 3 | 2 | 8 | 4 | 0 | 6 | 16 | 6 | 6 | 6 | 12 | 7 | 3 | 3 | 7 | 1 | 17 | 3 | 2 | 3 | 0 | 1 | 5 | 0 | 5 | 0 | 4 | 3 | 6 | 3 | 3 | 4 | 12 | 0 | 0 | 0 | 9 | 0 | 8 | 4 | 2 | 0 | 11 | 0 | 7 | 0 | 6 | 7 | 6 | 0 | 12 | 7 | 8 | 0 | 10 | 2 | 17 | 4 | 7 | 6 | 0 | 7 | 14 | 5 | 13 | 0 | 3 | 4 | 4
+PIN | nAS_FSB | 64 | 0 | N/A | 54 | 47 | 4 | 15 | 7 | 13 | 3 | 9 | 3 | 17 | 6 | 17 | 3 | 12 | 3 | 14 | 6 | 2 | 3 | 13 | 7 | 15 | 3 | 8 | 6 | 3 | 2 | 0 | 0 | 13 | 2 | 1 | 3 | 16 | 4 | 3 | 2 | 7 | 4 | 0 | 6 | 15 | 6 | 6 | 6 | 11 | 7 | 3 | 4 | 12 | 0 | 0 | 7 | 8 | 0 | 3 | 4 | 7 | 6 | 0 | 7 | 11 | 4 | 5 | 2 | 16 | 3 | 10 | 3 | 5 | 7 | 0 | 7 | 5 | 7 | 6 | 2 | 5 | 4 | 1 | 4 | 4 | 4 | 6 | 4 | 8 | 4 | 16 | 4 | 17 | 6 | 1 | 6 | 13 | 6 | 14
+PIN | nWE_FSB | 64 | 0 | N/A | 47 | 22 | 7 | 11 | 7 | 17 | 7 | 6 | 2 | 4 | 2 | 13 | 2 | 2 | 2 | 7 | 7 | 1 | 2 | 17 | 7 | 4 | 4 | 5 | 2 | 16 | 3 | 5 | 7 | 5 | 2 | 5 | 2 | 6 | 2 | 9 | 2 | 10 | 2 | 12 | 2 | 15 | 4 | 13 | 7 | 9
+PIN | SW<1> | 64 | 0 | N/A | 97 | 11 | 7 | 11 | 7 | 16 | 2 | 0 | 2 | 13 | 2 | 3 | 2 | 7 | 4 | 13 | 4 | 2 | 7 | 4 | 3 | 5 | 7 | 9
+PIN | nRES | 64 | 0 | N/A | 145 | 4 | 3 | 12 | 0 | 9 | 0 | 2 | 0 | 1
+PIN | nLDS_FSB | 64 | 0 | N/A | 49 | 3 | 3 | 15 | 0 | 15 | 7 | 5
+PIN | nUDS_FSB | 64 | 0 | N/A | 56 | 3 | 0 | 17 | 0 | 14 | 7 | 6
+PIN | CLK_IOB | 8256 | 0 | N/A | 35 | 8 | 5 | 2 | 5 | 9 | 5 | 15 | 5 | 17 | 5 | 0 | 5 | 14 | 5 | 16 | 1 | 10
+PIN | nBERR_IOB | 64 | 0 | N/A | 123 | 4 | 5 | 17 | 1 | 16 | 1 | 15 | 5 | 0
+PIN | E_IOB | 64 | 0 | N/A | 37 | 1 | 1 | 10
+PIN | nIPL2 | 64 | 0 | N/A | 146 | 1 | 0 | 11
+PIN | nBG_IOB | 64 | 0 | N/A | 117 | 1 | 1 | 14
+PIN | nDTACK_IOB | 64 | 0 | N/A | 127 | 2 | 1 | 12 | 1 | 11
+PIN | nVPA_IOB | 64 | 0 | N/A | 125 | 2 | 1 | 7 | 1 | 6
 PIN | A_FSB<1> | 64 | 0 | N/A | 149 | 1 | 6 | 5
-PIN | A_FSB<2> | 64 | 0 | N/A | 153 | 1 | 6 | 1
+PIN | A_FSB<2> | 64 | 0 | N/A | 153 | 1 | 6 | 2
 PIN | A_FSB<3> | 64 | 0 | N/A | 155 | 1 | 4 | 14
 PIN | A_FSB<4> | 64 | 0 | N/A | 157 | 1 | 4 | 10
 PIN | A_FSB<5> | 64 | 0 | N/A | 4 | 1 | 4 | 9
 PIN | A_FSB<6> | 64 | 0 | N/A | 6 | 1 | 4 | 10
 PIN | A_FSB<7> | 64 | 0 | N/A | 8 | 1 | 4 | 14
+PIN | SW<0> | 64 | 0 | N/A | 98 | 2 | 6 | 13 | 6 | 11
 PIN | nVMA_IOB | 536871040 | 0 | N/A | 118
+PIN | nAS_IOB | 536871040 | 0 | N/A | 135
+PIN | nLDS_IOB | 536871040 | 0 | N/A | 130
+PIN | nUDS_IOB | 536871040 | 0 | N/A | 134
 PIN | nDTACK_FSB | 536871040 | 0 | N/A | 44
 PIN | RA<0> | 536871040 | 0 | N/A | 86
 PIN | RA<1> | 536871040 | 0 | N/A | 79
@@ -2830,18 +2826,18 @@ PIN | nOE | 536871040 | 0 | N/A | 60
 PIN | nROMWE | 536871040 | 0 | N/A | 57
 PIN | nVPA_FSB | 536871040 | 0 | N/A | 147
 PIN | nADoutLE0 | 536871040 | 0 | N/A | 139
-PIN | nAS_IOB | 536871040 | 0 | N/A | 135
 PIN | nCAS | 536871040 | 0 | N/A | 59
 PIN | nDinLE | 536871040 | 0 | N/A | 140
 PIN | nDinOE | 536871040 | 0 | N/A | 144
 PIN | nDoutOE | 536871040 | 0 | N/A | 143
-PIN | nLDS_IOB | 536871040 | 0 | N/A | 130
 PIN | nRAS | 536871040 | 0 | N/A | 103
-PIN | nUDS_IOB | 536871040 | 0 | N/A | 134
 PIN | RA<11> | 536871040 | 0 | N/A | 102
 PIN | RA<10> | 536871040 | 0 | N/A | 90
+PIN | CLK20EN | 536871040 | 0 | N/A | 96
+PIN | CLK25EN | 536871040 | 0 | N/A | 95
+PIN | nBR_IOB | 536871040 | 0 | N/A | 116
 PIN | nADoutLE1 | 536871040 | 0 | N/A | 136
+PIN | nAoutOE | 536871040 | 0 | N/A | 141
 PIN | nRAMLWE | 536871040 | 0 | N/A | 104
 PIN | nRAMUWE | 536871040 | 0 | N/A | 105
 PIN | nROMCS | 536871040 | 0 | N/A | 58
-PIN | nAoutOE | 536871040 | 0 | N/A | 141
diff --git a/cpld/XC95144XL/MXSE.nga b/cpld/XC95144XL/MXSE.nga
index 182aec4..ac7b079 100644
--- a/cpld/XC95144XL/MXSE.nga
+++ b/cpld/XC95144XL/MXSE.nga
@@ -1,3 +1,3 @@
 XILINX-XDB 0.1 STUB 0.1 ASCII
 XILINX-XDM V1.6e
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\ No newline at end of file
diff --git a/cpld/XC95144XL/MXSE.ngc b/cpld/XC95144XL/MXSE.ngc
index c80ea2d..ba361e0 100644
--- a/cpld/XC95144XL/MXSE.ngc
+++ b/cpld/XC95144XL/MXSE.ngc
@@ -1,3 +1,3 @@
 XILINX-XDB 0.1 STUB 0.1 ASCII
 XILINX-XDM V1.6e
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diff --git a/cpld/XC95144XL/MXSE.ngd b/cpld/XC95144XL/MXSE.ngd
index 9d9c5da..6132511 100644
--- a/cpld/XC95144XL/MXSE.ngd
+++ b/cpld/XC95144XL/MXSE.ngd
@@ -1,3 +1,3 @@
 XILINX-XDB 0.1 STUB 0.1 ASCII
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14528o976sm1c;94?5=83:p(>k<:208L17f3A9mo6*;23805>"6k10?j95f10`94?"3:;0:>554i03`>5<#<;81=?64;n3ge?6=,=896<k=;:a5gg=8381<7>t$2g0>44e3A>:m6F<fb9'074=1h1/=n654g68m47f290/8?<513:8?j7ci3:1(9<=:0g1?M25921vn<lm:181>5<7s-9n?7?=b:J75d=O;oi0(9<=:8c8 4e?2=l?7d?>a;29 145288376a>d`83>!25:3;n>6F;2098yg7ek3:1?7>50z&0a6<4:2B?=l5G3ga8 1452:;0(<m7:5d7?l76j3:1(9<=:00;?>o69j0;6):=2;31<>=h9mk1<7*;2382a7=<uk;ih7>53;294~"4m:0:hk5G40c8L6`d3->9>7?ke:&2g=<3n=1b=<l50;&767<6:110e<?l:18'074=9;207b?ka;29 14528o976sm25a94?4=83:p(>k<:00a?M26i2B8jn5+4309=d=#9j218k:4i03b>5<#<;81=?64;n3ge?6=,=896<k=;I615>=zj;?:6=4<:183!5b;3;oj6F;1`9K7ce<,=896<jj;%3`<?2a<2c:=o4?:%616?75021b=<m50;&767<6:110c<jn:18'074=9l807pl=5383>6<729q/?h=5339K04g<@:lh7):=2;12?!7d03>m86g>1c83>!25:3;9465f10a94?"3:;0:>554o0fb>5<#<;81=h<4;|`116<72;0;6=u+3d1957d<@=;j7E=ic:&767<>i2.:o54;f59j54g=83.?>?4>2998k4bf290/8?<51d08L14632wi>8:50;094?6|,:o86<<m;I62e>N4nj1/8?<59`9'5f>=<o>0e<?n:18'074=9;207b?ka;29 14528o97E:=1:9~f73229086=4?{%1f7?553A>:m6F<fb9'074=;81/=n654g68m47e290/8?<513:8?l76k3:1(9<=:00;?>i6lh0;6):=2;3f6>=zj;?=6=4=:183!5b;3;9n6F;1`9K7ce<,=8964o4$0a;>1`33`;:m7>5$501>44?32e:hl4?:%616?7b:2B?><54}c063?6=;3:1<v*<e2806>N39h1C?km4$501>67<,8i369h;;h32f?6=,=896<<7;:k25f<72->9>7?=8:9l5ag=83.?>?4>e398yg4203:1?7>50z&0a6<4:2B?=l5G3ga8 1452:;0(<m7:5d7?l76j3:1(9<=:00;?>o69j0;6):=2;31<>=h9mk1<7*;2382a7=<uk8?h7>53;294~"4m:08>6F;1`9K7ce<,=896>?4$0a;>1`33`;:n7>5$501>44?32c:=n4?:%616?75021d=io50;&767<6m;10qo<;e;297?6=8r.8i>4>dg9K04g<@:lh7):=2;3ga>"6k10?j95f10`94?"3:;0:>554i03`>5<#<;81=?64;n3ge?6=,=896<k=;:a61`=8391<7>t$2g0>64<@=;j7E=ic:&767<492.:o54;f59j54d=83.?>?4>2998m47d290/8?<513:8?j7ci3:1(9<=:0g1?>{e:<:1<7:50;2x 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4e?2=l?7d?>a;29 145288376a>d`83>!25:3;n>6F;2098yg7?l3:1>7>50z&0a6<6:k1C8<o4H2d`?!25:33j7)?l8;6e0>o69h0;6):=2;31<>=h9mk1<7*;2382a7=O<;;07pl>8d83>6<729q/?h=5339K04g<@:lh7):=2;12?!7d03>m86g>1c83>!25:3;9465f10a94?"3:;0:>554o0fb>5<#<;81=h<4;|`2<c<72=0;6=u+3d1976=O<8k0D>hl;%616?563-;h47:i4:k25g<72->9>7?=8:9j54e=83.?>?4>2998m47c290/8?<513:8?j7ci3:1(9<=:0g1?>{e91;1<7=50;2x 6c42:80D9?n;I1eg>"3:;08=6*>c987b1=n98h1<7*;23826==<a8;h6=4+430957><3f;om7>5$501>4c532wi=5<50;094?6|,:o86<<m;I62e>N4nj1/8?<59`9'5f>=<o>0e<?n:18'074=9;207b?ka;29 14528o97E:=1:9~f4>429096=4?{%1f7?75j2B?=l5G3ga8 14520k0(<m7:5d7?l76i3:1(9<=:00;?>i6lh0;6):=2;3f6>N3:810qo?74;296?6=8r.8i>4>2c9K04g<@:lh7):=2;;b?!7d03>m86g>1`83>!25:3;9465`1ec94?"3:;0:i?5G4338?xd60<0;6>4?:1y'7`5=;;1C8<o4H2d`?!25:39:7)?l8;6e0>o69k0;6):=2;31<>=n98i1<7*;23826==<g8nj6=4+43095`4<3th:4;4?:283>5}#;l91=ih4H53b?M5ak2.?>?4>dd9'5f>=<o>0e<?m:18'074=9;207d?>c;29 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diff --git a/cpld/XC95144XL/MXSE.ngr b/cpld/XC95144XL/MXSE.ngr
index 05308d6..d824b47 100644
--- a/cpld/XC95144XL/MXSE.ngr
+++ b/cpld/XC95144XL/MXSE.ngr
@@ -1,3 +1,3 @@
 XILINX-XDB 0.1 STUB 0.1 ASCII
 XILINX-XDM V1.6e
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\ No newline at end of file
diff --git a/cpld/XC95144XL/MXSE.pad b/cpld/XC95144XL/MXSE.pad
index d0af691..dfd44ed 100644
--- a/cpld/XC95144XL/MXSE.pad
+++ b/cpld/XC95144XL/MXSE.pad
@@ -1,7 +1,7 @@
 Release 8.1i - Fit P.20131013
 Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
 
- 2-14-2022  7:35PM
+ 3-27-2022 10:08AM
 
 NOTE: This file is designed to be imported into a spreadsheet program
 such as Microsoft Excel for viewing, printing and sorting. The pipe '|'
@@ -75,10 +75,10 @@ P54|RA<8>|O|I/O|OUTPUT|||||||||
 P55|RA<10>|O|I/O|OUTPUT|||||||||
 P56|RA<9>|O|I/O|OUTPUT|||||||||
 P57|VCC||VCCINT||||||||||
-P58|TIE||I/O||||||||||
-P59|TIE||I/O||||||||||
-P60|TIE||I/O||||||||||
-P61|TIE||I/O||||||||||
+P58|CLK25EN|O|I/O|OUTPUT|||||||||
+P59|CLK20EN|O|I/O|OUTPUT|||||||||
+P60|SW<1>|I|I/O|INPUT|||||||||
+P61|SW<0>|I|I/O|INPUT|||||||||
 P62|GND||GND||||||||||
 P63|RA<11>|O|I/O|OUTPUT|||||||||
 P64|nRAS|O|I/O|OUTPUT|||||||||
@@ -89,8 +89,8 @@ P68|TIE||I/O||||||||||
 P69|GND||GND||||||||||
 P70|nBERR_FSB|O|I/O|OUTPUT|||||||||
 P71|TIE||I/O||||||||||
-P72|TIE||I/O||||||||||
-P73|TIE||I/O||||||||||
+P72|nBR_IOB|O|I/O|OUTPUT|||||||||
+P73|nBG_IOB|I|I/O|INPUT|||||||||
 P74|nVMA_IOB|O|I/O|OUTPUT|||||||||
 P75|GND||GND||||||||||
 P76|nBERR_IOB|I|I/O|INPUT|||||||||
@@ -109,7 +109,7 @@ P88|VCC||VCCIO||||||||||
 P89|nDoutOE|O|I/O|OUTPUT|||||||||
 P90|nDinOE|O|I/O|OUTPUT|||||||||
 P91|nRES|I|I/O|INPUT|||||||||
-P92|TIE||I/O||||||||||
+P92|nIPL2|I|I/O|INPUT|||||||||
 P93|nVPA_FSB|O|I/O|OUTPUT|||||||||
 P94|A_FSB<1>|I|I/O|INPUT|||||||||
 P95|A_FSB<2>|I|I/O|INPUT|||||||||
diff --git a/cpld/XC95144XL/MXSE.pnx b/cpld/XC95144XL/MXSE.pnx
index 4cb0c1b..cc10036 100644
--- a/cpld/XC95144XL/MXSE.pnx
+++ b/cpld/XC95144XL/MXSE.pnx
@@ -15,4 +15,4 @@
   sr     (SLOW|FAST|slow|fast) "SLOW"
   dir    (BIDIR|bidir|INPUT|input|OUTPUT|output) "BIDIR">
 ]>
-<ibis><part arch="xc9500xl" device="XC95144XL" pkg="TQ100" spg="-10"/><pin dir="input" nm="A_FSB&lt;9&gt;" no="7"/><pin dir="input" nm="A_FSB&lt;8&gt;" no="6"/><pin dir="input" nm="A_FSB&lt;15&gt;" no="13"/><pin dir="input" nm="A_FSB&lt;14&gt;" no="12"/><pin dir="input" nm="A_FSB&lt;13&gt;" no="11"/><pin dir="input" nm="A_FSB&lt;12&gt;" no="10"/><pin dir="input" nm="A_FSB&lt;11&gt;" no="9"/><pin dir="input" nm="A_FSB&lt;10&gt;" no="8"/><pin dir="input" nm="A_FSB&lt;23&gt;" no="24"/><pin dir="input" nm="A_FSB&lt;22&gt;" no="20"/><pin dir="input" nm="A_FSB&lt;21&gt;" no="19"/><pin dir="input" nm="A_FSB&lt;20&gt;" no="18"/><pin dir="input" nm="A_FSB&lt;19&gt;" no="17"/><pin dir="input" nm="A_FSB&lt;18&gt;" no="16"/><pin dir="input" nm="A_FSB&lt;17&gt;" no="15"/><pin dir="input" nm="A_FSB&lt;16&gt;" no="14"/><pin dir="input" nm="nBERR_IOB" no="76"/><pin dir="input" nm="CLK2X_IOB" no="22"/><pin dir="input" nm="CLK_FSB" no="27"/><pin dir="input" nm="nAS_FSB" no="32"/><pin dir="input" nm="nWE_FSB" no="29"/><pin dir="input" nm="nRES" no="91"/><pin dir="input" nm="nLDS_FSB" no="30"/><pin dir="input" nm="nUDS_FSB" no="33"/><pin dir="input" nm="CLK_IOB" no="23"/><pin dir="input" nm="E_IOB" no="25"/><pin dir="input" nm="nDTACK_IOB" no="78"/><pin dir="input" nm="nVPA_IOB" no="77"/><pin dir="input" nm="A_FSB&lt;1&gt;" no="94"/><pin dir="input" nm="A_FSB&lt;2&gt;" no="95"/><pin dir="input" nm="A_FSB&lt;3&gt;" no="96"/><pin dir="input" nm="A_FSB&lt;4&gt;" no="97"/><pin dir="input" nm="A_FSB&lt;5&gt;" no="2"/><pin dir="input" nm="A_FSB&lt;6&gt;" no="3"/><pin dir="input" nm="A_FSB&lt;7&gt;" no="4"/><pin dir="output" nm="nVMA_IOB" no="74" sr="fast"/><pin dir="output" nm="nDTACK_FSB" no="28" sr="fast"/><pin dir="output" nm="RA&lt;0&gt;" no="53" sr="fast"/><pin dir="output" nm="RA&lt;1&gt;" no="50" sr="fast"/><pin dir="output" nm="RA&lt;2&gt;" no="43" sr="fast"/><pin dir="output" nm="RA&lt;3&gt;" no="41" sr="fast"/><pin dir="output" nm="RA&lt;4&gt;" no="40" sr="fast"/><pin dir="output" nm="RA&lt;5&gt;" no="42" sr="fast"/><pin dir="output" nm="RA&lt;6&gt;" no="46" sr="fast"/><pin dir="output" nm="RA&lt;7&gt;" no="52" sr="fast"/><pin dir="output" nm="RA&lt;8&gt;" no="54" sr="fast"/><pin dir="output" nm="RA&lt;9&gt;" no="56" sr="fast"/><pin dir="output" nm="nBERR_FSB" no="70" sr="fast"/><pin dir="output" nm="nOE" no="37" sr="fast"/><pin dir="output" nm="nROMWE" no="34" sr="fast"/><pin dir="output" nm="nVPA_FSB" no="93" sr="fast"/><pin dir="output" nm="nADoutLE0" no="85" sr="fast"/><pin dir="output" nm="nAS_IOB" no="81" sr="fast"/><pin dir="output" nm="nCAS" no="36" sr="fast"/><pin dir="output" nm="nDinLE" no="86" sr="fast"/><pin dir="output" nm="nDinOE" no="90" sr="fast"/><pin dir="output" nm="nDoutOE" no="89" sr="fast"/><pin dir="output" nm="nLDS_IOB" no="79" sr="fast"/><pin dir="output" nm="nRAS" no="64" sr="fast"/><pin dir="output" nm="nUDS_IOB" no="80" sr="fast"/><pin dir="output" nm="RA&lt;11&gt;" no="63" sr="fast"/><pin dir="output" nm="RA&lt;10&gt;" no="55" sr="fast"/><pin dir="output" nm="nADoutLE1" no="82" sr="fast"/><pin dir="output" nm="nRAMLWE" no="65" sr="fast"/><pin dir="output" nm="nRAMUWE" no="66" sr="fast"/><pin dir="output" nm="nROMCS" no="35" sr="fast"/><pin dir="output" nm="nAoutOE" no="87" sr="fast"/></ibis>
+<ibis><part arch="xc9500xl" device="XC95144XL" pkg="TQ100" spg="-10"/><pin dir="input" nm="A_FSB&lt;9&gt;" no="7"/><pin dir="input" nm="A_FSB&lt;8&gt;" no="6"/><pin dir="input" nm="A_FSB&lt;15&gt;" no="13"/><pin dir="input" nm="A_FSB&lt;14&gt;" no="12"/><pin dir="input" nm="A_FSB&lt;13&gt;" no="11"/><pin dir="input" nm="A_FSB&lt;12&gt;" no="10"/><pin dir="input" nm="A_FSB&lt;11&gt;" no="9"/><pin dir="input" nm="A_FSB&lt;10&gt;" no="8"/><pin dir="input" nm="A_FSB&lt;23&gt;" no="24"/><pin dir="input" nm="A_FSB&lt;22&gt;" no="20"/><pin dir="input" nm="A_FSB&lt;21&gt;" no="19"/><pin dir="input" nm="A_FSB&lt;20&gt;" no="18"/><pin dir="input" nm="A_FSB&lt;19&gt;" no="17"/><pin dir="input" nm="A_FSB&lt;18&gt;" no="16"/><pin dir="input" nm="A_FSB&lt;17&gt;" no="15"/><pin dir="input" nm="A_FSB&lt;16&gt;" no="14"/><pin dir="input" nm="CLK2X_IOB" no="22"/><pin dir="input" nm="CLK_FSB" no="27"/><pin dir="input" nm="nAS_FSB" no="32"/><pin dir="input" nm="nWE_FSB" no="29"/><pin dir="input" nm="SW&lt;1&gt;" no="60"/><pin dir="input" nm="nRES" no="91"/><pin dir="input" nm="nLDS_FSB" no="30"/><pin dir="input" nm="nUDS_FSB" no="33"/><pin dir="input" nm="CLK_IOB" no="23"/><pin dir="input" nm="nBERR_IOB" no="76"/><pin dir="input" nm="E_IOB" no="25"/><pin dir="input" nm="nIPL2" no="92"/><pin dir="input" nm="nBG_IOB" no="73"/><pin dir="input" nm="nDTACK_IOB" no="78"/><pin dir="input" nm="nVPA_IOB" no="77"/><pin dir="input" nm="A_FSB&lt;1&gt;" no="94"/><pin dir="input" nm="A_FSB&lt;2&gt;" no="95"/><pin dir="input" nm="A_FSB&lt;3&gt;" no="96"/><pin dir="input" nm="A_FSB&lt;4&gt;" no="97"/><pin dir="input" nm="A_FSB&lt;5&gt;" no="2"/><pin dir="input" nm="A_FSB&lt;6&gt;" no="3"/><pin dir="input" nm="A_FSB&lt;7&gt;" no="4"/><pin dir="input" nm="SW&lt;0&gt;" no="61"/><pin dir="output" nm="nVMA_IOB" no="74" sr="fast"/><pin dir="output" nm="nAS_IOB" no="81" sr="fast"/><pin dir="output" nm="nLDS_IOB" no="79" sr="fast"/><pin dir="output" nm="nUDS_IOB" no="80" sr="fast"/><pin dir="output" nm="nDTACK_FSB" no="28" sr="fast"/><pin dir="output" nm="RA&lt;0&gt;" no="53" sr="fast"/><pin dir="output" nm="RA&lt;1&gt;" no="50" sr="fast"/><pin dir="output" nm="RA&lt;2&gt;" no="43" sr="fast"/><pin dir="output" nm="RA&lt;3&gt;" no="41" sr="fast"/><pin dir="output" nm="RA&lt;4&gt;" no="40" sr="fast"/><pin dir="output" nm="RA&lt;5&gt;" no="42" sr="fast"/><pin dir="output" nm="RA&lt;6&gt;" no="46" sr="fast"/><pin dir="output" nm="RA&lt;7&gt;" no="52" sr="fast"/><pin dir="output" nm="RA&lt;8&gt;" no="54" sr="fast"/><pin dir="output" nm="RA&lt;9&gt;" no="56" sr="fast"/><pin dir="output" nm="nBERR_FSB" no="70" sr="fast"/><pin dir="output" nm="nOE" no="37" sr="fast"/><pin dir="output" nm="nROMWE" no="34" sr="fast"/><pin dir="output" nm="nVPA_FSB" no="93" sr="fast"/><pin dir="output" nm="nADoutLE0" no="85" sr="fast"/><pin dir="output" nm="nCAS" no="36" sr="fast"/><pin dir="output" nm="nDinLE" no="86" sr="fast"/><pin dir="output" nm="nDinOE" no="90" sr="fast"/><pin dir="output" nm="nDoutOE" no="89" sr="fast"/><pin dir="output" nm="nRAS" no="64" sr="fast"/><pin dir="output" nm="RA&lt;11&gt;" no="63" sr="fast"/><pin dir="output" nm="RA&lt;10&gt;" no="55" sr="fast"/><pin dir="output" nm="CLK20EN" no="59" sr="fast"/><pin dir="output" nm="CLK25EN" no="58" sr="fast"/><pin dir="output" nm="nBR_IOB" no="72" sr="fast"/><pin dir="output" nm="nADoutLE1" no="82" sr="fast"/><pin dir="output" nm="nAoutOE" no="87" sr="fast"/><pin dir="output" nm="nRAMLWE" no="65" sr="fast"/><pin dir="output" nm="nRAMUWE" no="66" sr="fast"/><pin dir="output" nm="nROMCS" no="35" sr="fast"/></ibis>
diff --git a/cpld/XC95144XL/MXSE.rpt b/cpld/XC95144XL/MXSE.rpt
index 8a0b365..6a8afd8 100644
--- a/cpld/XC95144XL/MXSE.rpt
+++ b/cpld/XC95144XL/MXSE.rpt
@@ -1,7 +1,7 @@
  
 cpldfit:  version P.20131013                        Xilinx Inc.
                                   Fitter Report
-Design Name: MXSE                                Date:  2-14-2022,  7:35PM
+Design Name: MXSE                                Date:  3-27-2022, 10:08AM
 Device Used: XC95144XL-10-TQ100
 Fitting Status: Successful
 
@@ -9,22 +9,22 @@ Fitting Status: Successful
 
 Macrocells     Product Terms    Function Block   Registers      Pins           
 Used/Tot       Used/Tot         Inps Used/Tot    Used/Tot       Used/Tot       
-105/144 ( 73%) 434 /720  ( 60%) 227/432 ( 53%)   80 /144 ( 56%) 67 /81  ( 83%)
+115/144 ( 80%) 458 /720  ( 64%) 258/432 ( 60%)   89 /144 ( 62%) 74 /81  ( 91%)
 
 ** Function Block Resources **
 
 Function    Mcells      FB Inps     Pterms      IO          
 Block       Used/Tot    Used/Tot    Used/Tot    Used/Tot    
-FB1          18/18*      16/54       17/90      11/11*
-FB2           5/18        3/54        5/90       8/10
-FB3           6/18       39/54       81/90      10/10*
-FB4          18/18*      29/54       34/90       9/10
-FB5          13/18       31/54       81/90       8/10
-FB6          18/18*      34/54       62/90      10/10*
-FB7          15/18       39/54       73/90       6/10
-FB8          12/18       36/54       81/90       5/10
+FB1          18/18*      21/54       23/90      11/11*
+FB2          13/18        9/54       12/90       8/10
+FB3           7/18       38/54       81/90      10/10*
+FB4          18/18*      41/54       41/90      10/10*
+FB5          14/18       42/54       81/90       8/10
+FB6          18/18*      34/54       64/90      10/10*
+FB7          15/18       36/54       75/90      10/10*
+FB8          12/18       37/54       81/90       7/10
              -----       -----       -----      -----    
-            105/144     227/432     434/720     67/81 
+            115/144     258/432     458/720     74/81 
 
 * - Resource is exhausted
 
@@ -40,18 +40,18 @@ Global set/reset net(s) unused.
 
 Signal Type    Required     Mapped  |  Pin Type            Used    Total 
 ------------------------------------|------------------------------------
-Input         :   32          32    |  I/O              :    61      73
-Output        :   32          32    |  GCK/IO           :     3       3
+Input         :   36          36    |  I/O              :    68      73
+Output        :   35          35    |  GCK/IO           :     3       3
 Bidirectional :    0           0    |  GTS/IO           :     3       4
 GCK           :    3           3    |  GSR/IO           :     0       1
 GTS           :    0           0    |
 GSR           :    0           0    |
                  ----        ----
-        Total     67          67
+        Total     74          74
 
 ** Power Data **
 
-There are 105 macrocells in high performance mode (MCHP).
+There are 115 macrocells in high performance mode (MCHP).
 There are 0 macrocells in low power mode (MCLP).
 End of Mapped Resource Summary
 **************************  Errors and Warnings  ***************************
@@ -73,165 +73,181 @@ INFO:Cpld - Inferring BUFG constraint for signal 'CLK_IOB' based upon the LOC
    in your design. Note that for certain device families the output of a BUFG
    constraint can not drive a gated clock, and the BUFG constraint will be
    ignored.
+WARNING:Cpld:1007 - Removing unused input(s) 'SW<2>'.  The input(s) are unused
+   after optimization. Please verify functionality via simulation.
 *************************  Summary of Mapped Logic  ************************
 
-** 32 Outputs **
+** 35 Outputs **
 
-Signal              Total Total Loc     Pin  Pin     Pin     Pwr  Slew Reg Init
-Name                Pts   Inps          No.  Type    Use     Mode Rate State
-nDTACK_FSB          23    32    FB3_9   28   I/O     O       STD  FAST RESET
-nROMWE              1     2     FB3_17  34   I/O     O       STD  FAST 
-nAoutOE             0     0     FB4_2   87   I/O     O       STD  FAST 
-nDoutOE             2     4     FB4_5   89   I/O     O       STD  FAST RESET
-nDinOE              2     6     FB4_6   90   I/O     O       STD  FAST 
-nVPA_FSB            1     2     FB4_11  93   I/O     O       STD  FAST 
-nROMCS              2     5     FB5_2   35   I/O     O       STD  FAST 
-nCAS                1     1     FB5_5   36   I/O     O       STD  FAST RESET
-nOE                 1     2     FB5_6   37   I/O     O       STD  FAST 
-RA<4>               2     3     FB5_9   40   I/O     O       STD  FAST 
-RA<3>               2     3     FB5_11  41   I/O     O       STD  FAST 
-RA<5>               2     3     FB5_12  42   I/O     O       STD  FAST 
-RA<2>               2     3     FB5_14  43   I/O     O       STD  FAST 
-RA<6>               2     3     FB5_15  46   I/O     O       STD  FAST 
-nVMA_IOB            2     9     FB6_2   74   I/O     O       STD  FAST RESET
-nLDS_IOB            4     6     FB6_9   79   I/O     O       STD  FAST RESET
-nUDS_IOB            4     6     FB6_11  80   I/O     O       STD  FAST RESET
-nAS_IOB             2     4     FB6_12  81   I/O     O       STD  FAST RESET
-nADoutLE1           2     3     FB6_14  82   I/O     O       STD  FAST SET
-nADoutLE0           1     2     FB6_15  85   I/O     O       STD  FAST 
-nDinLE              2     3     FB6_17  86   I/O     O       STD  FAST RESET
-RA<1>               2     3     FB7_2   50   I/O     O       STD  FAST 
-RA<7>               2     3     FB7_5   52   I/O     O       STD  FAST 
-RA<0>               2     3     FB7_6   53   I/O     O       STD  FAST 
-RA<8>               7     7     FB7_8   54   I/O     O       STD  FAST 
-RA<10>              1     1     FB7_9   55   I/O     O       STD  FAST 
-RA<9>               2     3     FB7_11  56   I/O     O       STD  FAST 
-RA<11>              1     1     FB8_2   63   I/O     O       STD  FAST 
-nRAS                3     8     FB8_5   64   I/O     O       STD  FAST 
-nRAMLWE             1     5     FB8_6   65   I/O     O       STD  FAST 
-nRAMUWE             1     5     FB8_8   66   I/O     O       STD  FAST 
-nBERR_FSB           3     9     FB8_12  70   I/O     O       STD  FAST 
+Signal                         Total Total Loc     Pin  Pin     Pin     Pwr  Slew Reg Init
+Name                           Pts   Inps          No.  Type    Use     Mode Rate State
+nDTACK_FSB                     23    32    FB3_9   28   I/O     O       STD  FAST RESET
+nROMWE                         1     2     FB3_17  34   I/O     O       STD  FAST 
+nAoutOE                        3     4     FB4_2   87   I/O     O       STD  FAST SET
+nDoutOE                        2     3     FB4_5   89   I/O     O       STD  FAST RESET
+nDinOE                         3     7     FB4_6   90   I/O     O       STD  FAST 
+nVPA_FSB                       1     2     FB4_11  93   I/O     O       STD  FAST 
+nROMCS                         3     6     FB5_2   35   I/O     O       STD  FAST 
+nCAS                           1     1     FB5_5   36   I/O     O       STD  FAST RESET
+nOE                            1     2     FB5_6   37   I/O     O       STD  FAST 
+RA<4>                          2     3     FB5_9   40   I/O     O       STD  FAST 
+RA<3>                          2     3     FB5_11  41   I/O     O       STD  FAST 
+RA<5>                          2     3     FB5_12  42   I/O     O       STD  FAST 
+RA<2>                          2     3     FB5_14  43   I/O     O       STD  FAST 
+RA<6>                          2     3     FB5_15  46   I/O     O       STD  FAST 
+nVMA_IOB                       3     10    FB6_2   74   I/O     O       STD  FAST RESET
+nLDS_IOB                       4     6     FB6_9   79   I/O     O       STD  FAST RESET
+nUDS_IOB                       4     6     FB6_11  80   I/O     O       STD  FAST RESET
+nAS_IOB                        3     4     FB6_12  81   I/O     O       STD  FAST RESET
+nADoutLE1                      2     3     FB6_14  82   I/O     O       STD  FAST SET
+nADoutLE0                      1     2     FB6_15  85   I/O     O       STD  FAST 
+nDinLE                         1     2     FB6_17  86   I/O     O       STD  FAST RESET
+RA<1>                          2     3     FB7_2   50   I/O     O       STD  FAST 
+RA<7>                          2     3     FB7_5   52   I/O     O       STD  FAST 
+RA<0>                          2     3     FB7_6   53   I/O     O       STD  FAST 
+RA<8>                          7     7     FB7_8   54   I/O     O       STD  FAST 
+RA<10>                         1     1     FB7_9   55   I/O     O       STD  FAST 
+RA<9>                          2     3     FB7_11  56   I/O     O       STD  FAST 
+CLK25EN                        1     1     FB7_12  58   I/O     O       STD  FAST 
+CLK20EN                        1     1     FB7_14  59   I/O     O       STD  FAST 
+RA<11>                         1     1     FB8_2   63   I/O     O       STD  FAST 
+nRAS                           3     8     FB8_5   64   I/O     O       STD  FAST 
+nRAMLWE                        1     5     FB8_6   65   I/O     O       STD  FAST 
+nRAMUWE                        1     5     FB8_8   66   I/O     O       STD  FAST 
+nBERR_FSB                      3     9     FB8_12  70   I/O     O       STD  FAST 
+nBR_IOB                        1     6     FB8_15  72   I/O     O       STD  FAST SET
 
-** 73 Buried Nodes **
+** 80 Buried Nodes **
 
-Signal              Total Total Loc     Pwr  Reg Init
-Name                Pts   Inps          Mode State
-iobs/IOACTr         1     1     FB1_1   STD  RESET
-iobm/IOREQr         1     1     FB1_2   STD  RESET
-iobm/Er2            1     1     FB1_3   STD  RESET
-iobm/DTACKrr        1     1     FB1_4   STD  RESET
-iobm/DTACKrf        1     1     FB1_5   STD  RESET
-iobm/BERRrr         1     1     FB1_6   STD  RESET
-iobm/BERRrf         1     1     FB1_7   STD  RESET
-fsb/ASrf            1     1     FB1_8   STD  RESET
-cnt/RefCnt<7>       1     7     FB1_9   STD  RESET
-cnt/RefCnt<6>       1     6     FB1_10  STD  RESET
-cnt/RefCnt<5>       1     5     FB1_11  STD  RESET
-cnt/RefCnt<4>       1     4     FB1_12  STD  RESET
-cnt/RefCnt<3>       1     3     FB1_13  STD  RESET
-cnt/RefCnt<2>       1     2     FB1_14  STD  RESET
-cnt/RefCnt<1>       1     1     FB1_15  STD  RESET
-cnt/RefCnt<0>       0     0     FB1_16  STD  RESET
-RefAck              1     2     FB1_17  STD  RESET
-$OpTx$FX_DC$609     1     2     FB1_18  STD  
-iobm/VPArr          1     1     FB2_14  STD  RESET
-iobm/VPArf          1     1     FB2_15  STD  RESET
-iobm/RESrr          1     1     FB2_16  STD  RESET
-iobm/RESrf          1     1     FB2_17  STD  RESET
-iobm/Er             1     1     FB2_18  STD  RESET
-fsb/VPA             25    31    FB3_2   STD  RESET
-fsb/Ready1r         7     17    FB3_5   STD  RESET
-iobs/IORW1          16    19    FB3_13  STD  RESET
-fsb/Ready2r         9     22    FB3_15  STD  RESET
-ram/BACTr           1     2     FB4_1   STD  RESET
-iobs/Clear1         1     3     FB4_3   STD  RESET
-ALE0S               1     2     FB4_4   STD  RESET
-iobs/PS_FSM_FFd1    2     3     FB4_7   STD  RESET
-iobs/IOU1           2     2     FB4_8   STD  RESET
-iobs/IOL1           2     2     FB4_9   STD  RESET
-iobm/IOS_FSM_FFd2   2     4     FB4_10  STD  RESET
-iobm/IOS_FSM_FFd1   2     4     FB4_12  STD  RESET
-fsb/BERR1r          2     4     FB4_13  STD  RESET
-cs/nOverlay1        2     3     FB4_14  STD  RESET
-$OpTx$FX_DC$610     2     5     FB4_15  STD  
-IOU0                3     5     FB4_16  STD  RESET
-IOL0                3     5     FB4_17  STD  RESET
+Signal                         Total Total Loc     Pwr  Reg Init
+Name                           Pts   Inps          Mode State
+ram/BACTr                      1     2     FB1_1   STD  RESET
+iobm/RESrr                     1     1     FB1_2   STD  RESET
+iobm/RESrf                     1     1     FB1_3   STD  RESET
+fsb/ASrf                       1     1     FB1_4   STD  RESET
+cnt/RefCnt<2>                  1     2     FB1_5   STD  RESET
+cnt/RefCnt<1>                  1     1     FB1_6   STD  RESET
+RefAck                         1     2     FB1_7   STD  RESET
+RESr2                          1     1     FB1_8   STD  RESET
+RESr1                          1     1     FB1_9   STD  RESET
+RESr0                          1     1     FB1_10  STD  RESET
+IPL2r1                         1     1     FB1_11  STD  RESET
+IPL2r0                         1     1     FB1_12  STD  RESET
+ALE0S                          1     2     FB1_13  STD  RESET
+$OpTx$FX_DC$708                1     2     FB1_14  STD  
+iobs/IOU1                      2     2     FB1_15  STD  RESET
+iobs/IOL1                      2     2     FB1_16  STD  RESET
+iobm/IOS_FSM_FFd1              2     3     FB1_17  STD  RESET
+IOU0                           3     5     FB1_18  STD  RESET
+iobs/IOACTr                    1     1     FB2_6   STD  RESET
+iobm/VPArr                     1     1     FB2_7   STD  RESET
+iobm/VPArf                     1     1     FB2_8   STD  RESET
+iobm/IOREQr                    1     1     FB2_9   STD  RESET
+iobm/Er2                       1     1     FB2_10  STD  RESET
+iobm/Er                        1     1     FB2_11  STD  RESET
+iobm/DTACKrr                   1     1     FB2_12  STD  RESET
+iobm/DTACKrf                   1     1     FB2_13  STD  RESET
+iobm/BGr1                      1     1     FB2_14  STD  RESET
+iobm/BGr0                      1     1     FB2_15  STD  RESET
+iobm/BERRrr                    1     1     FB2_16  STD  RESET
+iobm/BERRrf                    1     1     FB2_17  STD  RESET
+cnt/RefCnt<0>                  0     0     FB2_18  STD  RESET
+fsb/Ready1r                    8     18    FB3_1   STD  RESET
+iobs/IORW1                     17    20    FB3_3   STD  RESET
+fsb/Ready2r                    9     22    FB3_5   STD  RESET
+fsb/VPA                        22    31    FB3_15  STD  RESET
+iobs/Clear1                    1     3     FB3_18  STD  RESET
+cnt/RefCnt<6>                  1     6     FB4_1   STD  RESET
+cnt/RefCnt<5>                  1     5     FB4_3   STD  RESET
+cnt/RefCnt<4>                  1     4     FB4_4   STD  RESET
+cnt/RefCnt<3>                  1     3     FB4_7   STD  RESET
 
-Signal              Total Total Loc     Pwr  Reg Init
-Name                Pts   Inps          Mode State
-iobs/IOReady        4     8     FB4_18  STD  RESET
-iobs/PS_FSM_FFd2    14    19    FB5_4   STD  RESET
-iobs/Once           17    18    FB5_8   STD  RESET
-IOREQ               14    19    FB5_13  STD  RESET
-BERR_IOBS           4     8     FB5_16  STD  RESET
-IORW0               18    20    FB5_18  STD  RESET
-iobm/ETACK          1     6     FB6_1   STD  RESET
-ALE0M               2     5     FB6_3   STD  RESET
-iobm/ES<3>          3     6     FB6_4   STD  RESET
-iobm/ES<1>          3     4     FB6_5   STD  RESET
-iobm/ES<0>          3     7     FB6_6   STD  RESET
-iobm/IOS_FSM_FFd4   4     6     FB6_7   STD  RESET
-iobm/ES<4>          4     7     FB6_8   STD  RESET
-iobm/IOS_FSM_FFd3   5     10    FB6_10  STD  RESET
-iobm/ES<2>          5     7     FB6_13  STD  RESET
-IOACT               6     13    FB6_16  STD  RESET
-IOBERR              9     14    FB6_18  STD  RESET
-TimeoutB            3     12    FB7_1   STD  RESET
-cnt/RefDone         2     10    FB7_3   STD  RESET
-fsb/Ready0r         3     8     FB7_4   STD  RESET
-cs/nOverlay0        3     8     FB7_7   STD  RESET
-cnt/TimeoutBPre     3     11    FB7_10  STD  RESET
-TimeoutA            3     10    FB7_12  STD  RESET
-ram/RS_FSM_FFd3     11    14    FB7_14  STD  RESET
-ram/RS_FSM_FFd2     13    14    FB7_16  STD  RESET
-ram/RAMReady        16    15    FB7_18  STD  RESET
-ram/RASEL           20    15    FB8_1   STD  RESET
-fsb/BERR0r          3     8     FB8_3   STD  RESET
-ram/RS_FSM_FFd1     5     10    FB8_4   STD  RESET
-ram/Once            5     10    FB8_7   STD  RESET
-iobs/Load1          14    18    FB8_9   STD  RESET
-ram/RAMDIS2         7     15    FB8_13  STD  RESET
-ram/RAMDIS1         18    15    FB8_15  STD  RESET
+Signal                         Total Total Loc     Pwr  Reg Init
+Name                           Pts   Inps          Mode State
+iobs/PS_FSM_FFd1               2     3     FB4_8   STD  RESET
+fsb/BERR1r                     2     4     FB4_9   STD  RESET
+cs/nOverlay1                   2     3     FB4_10  STD  RESET
+cnt/RefDone                    2     10    FB4_12  STD  RESET
+cs/nOverlay0                   3     8     FB4_13  STD  RESET
+cnt/TimeoutBPre                3     11    FB4_14  STD  RESET
+TimeoutA                       3     10    FB4_15  STD  RESET
+IOL0                           3     5     FB4_16  STD  RESET
+iobs/IOReady                   4     8     FB4_17  STD  RESET
+BERR_IOBS                      4     8     FB4_18  STD  RESET
+ram/RASEL                      20    15    FB5_1   STD  RESET
+cnt/RefCnt<7>                  1     7     FB5_3   STD  RESET
+ram/RAMDIS2                    7     15    FB5_4   STD  RESET
+ram/RAMDIS1                    18    15    FB5_8   STD  RESET
+iobs/Load1                     15    19    FB5_13  STD  RESET
+ram/Once                       5     10    FB5_16  STD  RESET
+iobm/ETACK                     1     6     FB6_1   STD  RESET
+iobm/IOS_FSM_FFd3              3     6     FB6_3   STD  RESET
+iobm/ES<3>                     3     6     FB6_4   STD  RESET
+iobm/ES<1>                     3     4     FB6_5   STD  RESET
+iobm/ES<0>                     3     7     FB6_6   STD  RESET
+ALE0M                          3     5     FB6_7   STD  RESET
+iobm/ES<4>                     4     7     FB6_8   STD  RESET
+iobm/IOS_FSM_FFd2              5     11    FB6_10  STD  RESET
+iobm/ES<2>                     5     7     FB6_13  STD  RESET
+IOACT                          7     13    FB6_16  STD  RESET
+IOBERR                         9     13    FB6_18  STD  RESET
+ram/RAMReady                   16    15    FB7_1   STD  RESET
+TimeoutB                       3     12    FB7_3   STD  RESET
+fsb/Ready0r                    3     8     FB7_4   STD  RESET
+ram/RS_FSM_FFd1                5     10    FB7_7   STD  RESET
+$OpTx$$OpTx$FX_DC$182_INV$783  6     8     FB7_10  STD  
+ram/RS_FSM_FFd3                11    14    FB7_13  STD  RESET
+ram/RS_FSM_FFd2                13    14    FB7_17  STD  RESET
+iobs/PS_FSM_FFd2               15    20    FB8_4   STD  RESET
+RESDone                        1     3     FB8_7   STD  RESET
+IOREQ                          15    20    FB8_9   STD  RESET
+iobs/Once                      18    19    FB8_14  STD  RESET
+fsb/BERR0r                     3     8     FB8_16  STD  RESET
+IORW0                          19    21    FB8_18  STD  RESET
 
-** 35 Inputs **
+** 39 Inputs **
 
-Signal              Loc     Pin  Pin     Pin     
-Name                        No.  Type    Use     
-A_FSB<13>           FB1_2   11   I/O     I
-A_FSB<14>           FB1_3   12   I/O     I
-A_FSB<15>           FB1_5   13   I/O     I
-A_FSB<16>           FB1_6   14   I/O     I
-A_FSB<17>           FB1_8   15   I/O     I
-A_FSB<18>           FB1_9   16   I/O     I
-A_FSB<19>           FB1_11  17   I/O     I
-A_FSB<20>           FB1_12  18   I/O     I
-A_FSB<21>           FB1_14  19   I/O     I
-A_FSB<22>           FB1_15  20   I/O     I
-CLK2X_IOB           FB1_17  22   GCK/I/O GCK
-A_FSB<5>            FB2_6   2    GTS/I/O I
-A_FSB<6>            FB2_8   3    GTS/I/O I
-A_FSB<7>            FB2_9   4    GTS/I/O I
-A_FSB<8>            FB2_11  6    I/O     I
-A_FSB<9>            FB2_12  7    I/O     I
-A_FSB<10>           FB2_14  8    I/O     I
-A_FSB<11>           FB2_15  9    I/O     I
-A_FSB<12>           FB2_17  10   I/O     I
-CLK_IOB             FB3_2   23   GCK/I/O GCK/I
-A_FSB<23>           FB3_5   24   I/O     I
-E_IOB               FB3_6   25   I/O     I
-CLK_FSB             FB3_8   27   GCK/I/O GCK
-nWE_FSB             FB3_11  29   I/O     I
-nLDS_FSB            FB3_12  30   I/O     I
-nAS_FSB             FB3_14  32   I/O     I
-nUDS_FSB            FB3_15  33   I/O     I
-nRES                FB4_8   91   I/O     I
-A_FSB<1>            FB4_12  94   I/O     I
-A_FSB<2>            FB4_14  95   I/O     I
-A_FSB<3>            FB4_15  96   I/O     I
-A_FSB<4>            FB4_17  97   I/O     I
-nBERR_IOB           FB6_5   76   I/O     I
-nVPA_IOB            FB6_6   77   I/O     I
-nDTACK_IOB          FB6_8   78   I/O     I
+Signal                         Loc     Pin  Pin     Pin     
+Name                                   No.  Type    Use     
+A_FSB<13>                      FB1_2   11   I/O     I
+A_FSB<14>                      FB1_3   12   I/O     I
+A_FSB<15>                      FB1_5   13   I/O     I
+A_FSB<16>                      FB1_6   14   I/O     I
+A_FSB<17>                      FB1_8   15   I/O     I
+A_FSB<18>                      FB1_9   16   I/O     I
+A_FSB<19>                      FB1_11  17   I/O     I
+A_FSB<20>                      FB1_12  18   I/O     I
+A_FSB<21>                      FB1_14  19   I/O     I
+A_FSB<22>                      FB1_15  20   I/O     I
+CLK2X_IOB                      FB1_17  22   GCK/I/O GCK
+A_FSB<5>                       FB2_6   2    GTS/I/O I
+A_FSB<6>                       FB2_8   3    GTS/I/O I
+A_FSB<7>                       FB2_9   4    GTS/I/O I
+A_FSB<8>                       FB2_11  6    I/O     I
+A_FSB<9>                       FB2_12  7    I/O     I
+A_FSB<10>                      FB2_14  8    I/O     I
+A_FSB<11>                      FB2_15  9    I/O     I
+A_FSB<12>                      FB2_17  10   I/O     I
+CLK_IOB                        FB3_2   23   GCK/I/O GCK/I
+A_FSB<23>                      FB3_5   24   I/O     I
+E_IOB                          FB3_6   25   I/O     I
+CLK_FSB                        FB3_8   27   GCK/I/O GCK
+nWE_FSB                        FB3_11  29   I/O     I
+nLDS_FSB                       FB3_12  30   I/O     I
+nAS_FSB                        FB3_14  32   I/O     I
+nUDS_FSB                       FB3_15  33   I/O     I
+nRES                           FB4_8   91   I/O     I
+nIPL2                          FB4_9   92   I/O     I
+A_FSB<1>                       FB4_12  94   I/O     I
+A_FSB<2>                       FB4_14  95   I/O     I
+A_FSB<3>                       FB4_15  96   I/O     I
+A_FSB<4>                       FB4_17  97   I/O     I
+nBERR_IOB                      FB6_5   76   I/O     I
+nVPA_IOB                       FB6_6   77   I/O     I
+nDTACK_IOB                     FB6_8   78   I/O     I
+SW<1>                          FB7_15  60   I/O     I
+SW<0>                          FB7_17  61   I/O     I
+nBG_IOB                        FB8_17  73   I/O     I
 
 Legend:
 Pin No. - ~ - User Assigned
@@ -249,62 +265,63 @@ Pin Type/Use - I  - Input             GCK - Global Clock
 X            - Signal used as input to the macrocell logic.
 Pin No.      - ~  - User Assigned
 *********************************** FB1  ***********************************
-Number of function block inputs used/remaining:               16/38
-Number of signals used by logic mapping into function block:  16
+Number of function block inputs used/remaining:               21/33
+Number of signals used by logic mapping into function block:  21
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
-iobs/IOACTr           1       0     0   4     FB1_1         (b)     (b)
-iobm/IOREQr           1       0     0   4     FB1_2   11    I/O     I
-iobm/Er2              1       0     0   4     FB1_3   12    I/O     I
-iobm/DTACKrr          1       0     0   4     FB1_4         (b)     (b)
-iobm/DTACKrf          1       0     0   4     FB1_5   13    I/O     I
-iobm/BERRrr           1       0     0   4     FB1_6   14    I/O     I
-iobm/BERRrf           1       0     0   4     FB1_7         (b)     (b)
-fsb/ASrf              1       0     0   4     FB1_8   15    I/O     I
-cnt/RefCnt<7>         1       0     0   4     FB1_9   16    I/O     I
-cnt/RefCnt<6>         1       0     0   4     FB1_10        (b)     (b)
-cnt/RefCnt<5>         1       0     0   4     FB1_11  17    I/O     I
-cnt/RefCnt<4>         1       0     0   4     FB1_12  18    I/O     I
-cnt/RefCnt<3>         1       0     0   4     FB1_13        (b)     (b)
-cnt/RefCnt<2>         1       0     0   4     FB1_14  19    I/O     I
-cnt/RefCnt<1>         1       0     0   4     FB1_15  20    I/O     I
-cnt/RefCnt<0>         0       0     0   5     FB1_16        (b)     (b)
-RefAck                1       0     0   4     FB1_17  22    GCK/I/O GCK
-$OpTx$FX_DC$609       1       0     0   4     FB1_18        (b)     (b)
+ram/BACTr             1       0     0   4     FB1_1         (b)     (b)
+iobm/RESrr            1       0     0   4     FB1_2   11    I/O     I
+iobm/RESrf            1       0     0   4     FB1_3   12    I/O     I
+fsb/ASrf              1       0     0   4     FB1_4         (b)     (b)
+cnt/RefCnt<2>         1       0     0   4     FB1_5   13    I/O     I
+cnt/RefCnt<1>         1       0     0   4     FB1_6   14    I/O     I
+RefAck                1       0     0   4     FB1_7         (b)     (b)
+RESr2                 1       0     0   4     FB1_8   15    I/O     I
+RESr1                 1       0     0   4     FB1_9   16    I/O     I
+RESr0                 1       0     0   4     FB1_10        (b)     (b)
+IPL2r1                1       0     0   4     FB1_11  17    I/O     I
+IPL2r0                1       0     0   4     FB1_12  18    I/O     I
+ALE0S                 1       0     0   4     FB1_13        (b)     (b)
+$OpTx$FX_DC$708       1       0     0   4     FB1_14  19    I/O     I
+iobs/IOU1             2       0     0   3     FB1_15  20    I/O     I
+iobs/IOL1             2       0     0   3     FB1_16        (b)     (b)
+iobm/IOS_FSM_FFd1     2       0     0   3     FB1_17  22    GCK/I/O GCK
+IOU0                  3       0     0   2     FB1_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: IOACT              7: cnt/RefCnt<4>     12: nAS_FSB 
-  2: IOREQ              8: cnt/RefCnt<5>     13: nBERR_IOB 
-  3: cnt/RefCnt<0>      9: cnt/RefCnt<6>     14: nDTACK_IOB 
-  4: cnt/RefCnt<1>     10: fsb/ASrf          15: ram/RS_FSM_FFd1 
-  5: cnt/RefCnt<2>     11: iobm/Er           16: ram/RS_FSM_FFd2 
-  6: cnt/RefCnt<3>    
+  1: IPL2r0              8: iobm/IOS_FSM_FFd2  15: nAS_FSB 
+  2: RESr0               9: iobm/IOS_FSM_FFd3  16: nIPL2 
+  3: RESr1              10: iobs/IOU1          17: nLDS_FSB 
+  4: cnt/RefCnt<0>      11: iobs/Load1         18: nRES 
+  5: cnt/RefCnt<1>      12: iobs/PS_FSM_FFd1   19: nUDS_FSB 
+  6: fsb/ASrf           13: iobs/PS_FSM_FFd2   20: ram/RS_FSM_FFd1 
+  7: iobm/IOS_FSM_FFd1  14: nADoutLE1          21: ram/RS_FSM_FFd2 
 
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
-iobs/IOACTr          X....................................... 1
-iobm/IOREQr          .X...................................... 1
-iobm/Er2             ..........X............................. 1
-iobm/DTACKrr         .............X.......................... 1
-iobm/DTACKrf         .............X.......................... 1
-iobm/BERRrr          ............X........................... 1
-iobm/BERRrf          ............X........................... 1
-fsb/ASrf             ...........X............................ 1
-cnt/RefCnt<7>        ..XXXXXXX............................... 7
-cnt/RefCnt<6>        ..XXXXXX................................ 6
-cnt/RefCnt<5>        ..XXXXX................................. 5
-cnt/RefCnt<4>        ..XXXX.................................. 4
-cnt/RefCnt<3>        ..XXX................................... 3
-cnt/RefCnt<2>        ..XX.................................... 2
-cnt/RefCnt<1>        ..X..................................... 1
-cnt/RefCnt<0>        ........................................ 0
-RefAck               ..............XX........................ 2
-$OpTx$FX_DC$609      .........X.X............................ 2
+ram/BACTr            .....X........X......................... 2
+iobm/RESrr           .................X...................... 1
+iobm/RESrf           .................X...................... 1
+fsb/ASrf             ..............X......................... 1
+cnt/RefCnt<2>        ...XX................................... 2
+cnt/RefCnt<1>        ...X.................................... 1
+RefAck               ...................XX................... 2
+RESr2                ..X..................................... 1
+RESr1                .X...................................... 1
+RESr0                .................X...................... 1
+IPL2r1               X....................................... 1
+IPL2r0               ...............X........................ 1
+ALE0S                ...........XX........................... 2
+$OpTx$FX_DC$708      .....X........X......................... 2
+iobs/IOU1            ..........X.......X..................... 2
+iobs/IOL1            ..........X.....X....................... 2
+iobm/IOS_FSM_FFd1    ......XXX............................... 3
+IOU0                 .........X.XXX....X..................... 5
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *********************************** FB2  ***********************************
-Number of function block inputs used/remaining:               3/51
-Number of signals used by logic mapping into function block:  3
+Number of function block inputs used/remaining:               9/45
+Number of signals used by logic mapping into function block:  9
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
 (unused)              0       0     0   5     FB2_1         (b)     
@@ -312,227 +329,246 @@ Name                Pt      Pt    Pt  Pt               #    Type    Use
 (unused)              0       0     0   5     FB2_3         (b)     
 (unused)              0       0     0   5     FB2_4         (b)     
 (unused)              0       0     0   5     FB2_5   1     GTS/I/O 
-(unused)              0       0     0   5     FB2_6   2     GTS/I/O I
-(unused)              0       0     0   5     FB2_7         (b)     
-(unused)              0       0     0   5     FB2_8   3     GTS/I/O I
-(unused)              0       0     0   5     FB2_9   4     GTS/I/O I
-(unused)              0       0     0   5     FB2_10        (b)     
-(unused)              0       0     0   5     FB2_11  6     I/O     I
-(unused)              0       0     0   5     FB2_12  7     I/O     I
-(unused)              0       0     0   5     FB2_13        (b)     
-iobm/VPArr            1       0     0   4     FB2_14  8     I/O     I
-iobm/VPArf            1       0     0   4     FB2_15  9     I/O     I
-iobm/RESrr            1       0     0   4     FB2_16        (b)     (b)
-iobm/RESrf            1       0     0   4     FB2_17  10    I/O     I
-iobm/Er               1       0     0   4     FB2_18        (b)     (b)
+iobs/IOACTr           1       0     0   4     FB2_6   2     GTS/I/O I
+iobm/VPArr            1       0     0   4     FB2_7         (b)     (b)
+iobm/VPArf            1       0     0   4     FB2_8   3     GTS/I/O I
+iobm/IOREQr           1       0     0   4     FB2_9   4     GTS/I/O I
+iobm/Er2              1       0     0   4     FB2_10        (b)     (b)
+iobm/Er               1       0     0   4     FB2_11  6     I/O     I
+iobm/DTACKrr          1       0     0   4     FB2_12  7     I/O     I
+iobm/DTACKrf          1       0     0   4     FB2_13        (b)     (b)
+iobm/BGr1             1       0     0   4     FB2_14  8     I/O     I
+iobm/BGr0             1       0     0   4     FB2_15  9     I/O     I
+iobm/BERRrr           1       0     0   4     FB2_16        (b)     (b)
+iobm/BERRrf           1       0     0   4     FB2_17  10    I/O     I
+cnt/RefCnt<0>         0       0     0   5     FB2_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: E_IOB              2: nRES               3: nVPA_IOB 
+  1: E_IOB              4: iobm/BGr0          7: nBG_IOB 
+  2: IOACT              5: iobm/Er            8: nDTACK_IOB 
+  3: IOREQ              6: nBERR_IOB          9: nVPA_IOB 
 
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
-iobm/VPArr           ..X..................................... 1
-iobm/VPArf           ..X..................................... 1
-iobm/RESrr           .X...................................... 1
-iobm/RESrf           .X...................................... 1
+iobs/IOACTr          .X...................................... 1
+iobm/VPArr           ........X............................... 1
+iobm/VPArf           ........X............................... 1
+iobm/IOREQr          ..X..................................... 1
+iobm/Er2             ....X................................... 1
 iobm/Er              X....................................... 1
+iobm/DTACKrr         .......X................................ 1
+iobm/DTACKrf         .......X................................ 1
+iobm/BGr1            ...X.................................... 1
+iobm/BGr0            ......X................................. 1
+iobm/BERRrr          .....X.................................. 1
+iobm/BERRrf          .....X.................................. 1
+cnt/RefCnt<0>        ........................................ 0
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *********************************** FB3  ***********************************
-Number of function block inputs used/remaining:               39/15
-Number of signals used by logic mapping into function block:  39
+Number of function block inputs used/remaining:               38/16
+Number of signals used by logic mapping into function block:  38
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
-(unused)              0       0   \/5   0     FB3_1         (b)     (b)
-fsb/VPA              25      20<-   0   0     FB3_2   23    GCK/I/O GCK/I
-(unused)              0       0   /\5   0     FB3_3         (b)     (b)
+fsb/Ready1r           8       4<- \/1   0     FB3_1         (b)     (b)
+(unused)              0       0   \/5   0     FB3_2   23    GCK/I/O GCK/I
+iobs/IORW1           17      12<-   0   0     FB3_3         (b)     (b)
 (unused)              0       0   /\5   0     FB3_4         (b)     (b)
-fsb/Ready1r           7       2<-   0   0     FB3_5   24    I/O     I
-(unused)              0       0   /\2   3     FB3_6   25    I/O     I
+fsb/Ready2r           9       5<- /\1   0     FB3_5   24    I/O     I
+(unused)              0       0   /\5   0     FB3_6   25    I/O     I
 (unused)              0       0   \/3   2     FB3_7         (b)     (b)
 (unused)              0       0   \/5   0     FB3_8   27    GCK/I/O GCK
 nDTACK_FSB           23      18<-   0   0     FB3_9   28    I/O     O
 (unused)              0       0   /\5   0     FB3_10        (b)     (b)
 (unused)              0       0   /\5   0     FB3_11  29    I/O     I
-(unused)              0       0   \/5   0     FB3_12  30    I/O     I
-iobs/IORW1           16      11<-   0   0     FB3_13        (b)     (b)
-(unused)              0       0   /\5   0     FB3_14  32    I/O     I
-fsb/Ready2r           9       5<- /\1   0     FB3_15  33    I/O     I
+(unused)              0       0     0   5     FB3_12  30    I/O     I
+(unused)              0       0   \/5   0     FB3_13        (b)     (b)
+(unused)              0       0   \/5   0     FB3_14  32    I/O     I
+fsb/VPA              22      17<-   0   0     FB3_15  33    I/O     I
 (unused)              0       0   /\5   0     FB3_16        (b)     (b)
-nROMWE                1       0     0   4     FB3_17  34    I/O     O
-(unused)              0       0   \/5   0     FB3_18        (b)     (b)
+nROMWE                1       0   /\2   2     FB3_17  34    I/O     O
+iobs/Clear1           1       0   \/4   0     FB3_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: $OpTx$FX_DC$609   14: A_FSB<21>         27: fsb/Ready1r 
-  2: $OpTx$FX_DC$610   15: A_FSB<22>         28: fsb/Ready2r 
-  3: A_FSB<10>         16: A_FSB<23>         29: fsb/VPA 
-  4: A_FSB<11>         17: A_FSB<8>          30: iobs/IORW1 
-  5: A_FSB<12>         18: A_FSB<9>          31: iobs/IOReady 
-  6: A_FSB<13>         19: BERR_IOBS         32: iobs/Once 
-  7: A_FSB<14>         20: TimeoutA          33: iobs/PS_FSM_FFd1 
-  8: A_FSB<15>         21: TimeoutB          34: iobs/PS_FSM_FFd2 
-  9: A_FSB<16>         22: cs/nOverlay1      35: nADoutLE1 
- 10: A_FSB<17>         23: fsb/ASrf          36: nAS_FSB 
- 11: A_FSB<18>         24: fsb/BERR0r        37: nDTACK_FSB 
- 12: A_FSB<19>         25: fsb/BERR1r        38: nWE_FSB 
- 13: A_FSB<20>         26: fsb/Ready0r       39: ram/RAMReady 
+  1: $OpTx$$OpTx$FX_DC$182_INV$783  14: A_FSB<21>         27: fsb/Ready2r 
+  2: $OpTx$FX_DC$708                15: A_FSB<22>         28: fsb/VPA 
+  3: A_FSB<10>                      16: A_FSB<23>         29: iobs/IORW1 
+  4: A_FSB<11>                      17: A_FSB<8>          30: iobs/IOReady 
+  5: A_FSB<12>                      18: A_FSB<9>          31: iobs/Once 
+  6: A_FSB<13>                      19: BERR_IOBS         32: iobs/PS_FSM_FFd1 
+  7: A_FSB<14>                      20: SW<1>             33: iobs/PS_FSM_FFd2 
+  8: A_FSB<15>                      21: TimeoutA          34: nADoutLE1 
+  9: A_FSB<16>                      22: cs/nOverlay1      35: nAS_FSB 
+ 10: A_FSB<17>                      23: fsb/ASrf          36: nBR_IOB 
+ 11: A_FSB<18>                      24: fsb/BERR0r        37: nDTACK_FSB 
+ 12: A_FSB<19>                      25: fsb/BERR1r        38: nWE_FSB 
+ 13: A_FSB<20>                      26: fsb/Ready1r      
 
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
-fsb/VPA              X.XXXXXXXXXXXXXXXXXXXX.XXXXXX.X...X..XX. 31
-fsb/Ready1r          .....XX.XXXXXXXX.....XX...X...X...XX.X.. 17
-nDTACK_FSB           .XXXXXXXXXXXXXXXXXXX.XXXXXXX..X...XXXXX. 32
-iobs/IORW1           .....XX.XXXXXXXX.....XX......X.XXXXX.X.. 19
-fsb/Ready2r          ..XXXXXXXXXXXXXXXX.X.XX....X.......X.X.. 22
-nROMWE               ...................................X.X.. 2
+fsb/Ready1r          .....XX.XXXXXXXX...X.XX..X...X...XX..X.. 18
+iobs/IORW1           .....XX.XXXXXXXX...X.XX.....X.XXXXX..X.. 20
+fsb/Ready2r          ..XXXXXXXXXXXXXXXX..XXX...X.......X..X.. 22
+nDTACK_FSB           X.XXXXXXXXXXXXXXXXXXXXXXXXX..X...XXXXX.. 32
+fsb/VPA              XXXXXXXXXXXXXXXXXXXXXX.XXXXX.X...X.X.X.. 31
+nROMWE               ..................................X..X.. 2
+iobs/Clear1          ...............................XXX...... 3
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *********************************** FB4  ***********************************
-Number of function block inputs used/remaining:               29/25
-Number of signals used by logic mapping into function block:  29
+Number of function block inputs used/remaining:               41/13
+Number of signals used by logic mapping into function block:  41
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
-ram/BACTr             1       0     0   4     FB4_1         (b)     (b)
-nAoutOE               0       0     0   5     FB4_2   87    I/O     O
-iobs/Clear1           1       0     0   4     FB4_3         (b)     (b)
-ALE0S                 1       0     0   4     FB4_4         (b)     (b)
+cnt/RefCnt<6>         1       0     0   4     FB4_1         (b)     (b)
+nAoutOE               3       0     0   2     FB4_2   87    I/O     O
+cnt/RefCnt<5>         1       0     0   4     FB4_3         (b)     (b)
+cnt/RefCnt<4>         1       0     0   4     FB4_4         (b)     (b)
 nDoutOE               2       0     0   3     FB4_5   89    I/O     O
-nDinOE                2       0     0   3     FB4_6   90    I/O     O
-iobs/PS_FSM_FFd1      2       0     0   3     FB4_7         (b)     (b)
-iobs/IOU1             2       0     0   3     FB4_8   91    I/O     I
-iobs/IOL1             2       0     0   3     FB4_9   92    I/O     (b)
-iobm/IOS_FSM_FFd2     2       0     0   3     FB4_10        (b)     (b)
+nDinOE                3       0     0   2     FB4_6   90    I/O     O
+cnt/RefCnt<3>         1       0     0   4     FB4_7         (b)     (b)
+iobs/PS_FSM_FFd1      2       0     0   3     FB4_8   91    I/O     I
+fsb/BERR1r            2       0     0   3     FB4_9   92    I/O     I
+cs/nOverlay1          2       0     0   3     FB4_10        (b)     (b)
 nVPA_FSB              1       0     0   4     FB4_11  93    I/O     O
-iobm/IOS_FSM_FFd1     2       0     0   3     FB4_12  94    I/O     I
-fsb/BERR1r            2       0     0   3     FB4_13        (b)     (b)
-cs/nOverlay1          2       0     0   3     FB4_14  95    I/O     I
-$OpTx$FX_DC$610       2       0     0   3     FB4_15  96    I/O     I
-IOU0                  3       0     0   2     FB4_16        (b)     (b)
-IOL0                  3       0     0   2     FB4_17  97    I/O     I
-iobs/IOReady          4       0     0   1     FB4_18        (b)     (b)
+cnt/RefDone           2       0     0   3     FB4_12  94    I/O     I
+cs/nOverlay0          3       0     0   2     FB4_13        (b)     (b)
+cnt/TimeoutBPre       3       0     0   2     FB4_14  95    I/O     I
+TimeoutA              3       0     0   2     FB4_15  96    I/O     I
+IOL0                  3       0     0   2     FB4_16        (b)     (b)
+iobs/IOReady          4       0     0   1     FB4_17  97    I/O     I
+BERR_IOBS             4       0     0   1     FB4_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: A_FSB<20>         11: fsb/BERR1r         21: iobs/Load1 
-  2: A_FSB<21>         12: fsb/VPA            22: iobs/Once 
-  3: A_FSB<22>         13: iobm/IOS_FSM_FFd1  23: iobs/PS_FSM_FFd1 
-  4: A_FSB<23>         14: iobm/IOS_FSM_FFd2  24: iobs/PS_FSM_FFd2 
-  5: BERR_IOBS         15: iobm/IOS_FSM_FFd3  25: nADoutLE1 
-  6: IOBERR            16: iobm/IOS_FSM_FFd4  26: nAS_FSB 
-  7: IORW0             17: iobs/IOACTr        27: nLDS_FSB 
-  8: TimeoutB          18: iobs/IOL1          28: nUDS_FSB 
-  9: cs/nOverlay0      19: iobs/IOReady       29: nWE_FSB 
- 10: fsb/ASrf          20: iobs/IOU1         
+  1: A_FSB<20>         15: cnt/RefCnt<4>      29: iobs/IOACTr 
+  2: A_FSB<21>         16: cnt/RefCnt<5>      30: iobs/IOL1 
+  3: A_FSB<22>         17: cnt/RefCnt<6>      31: iobs/IOReady 
+  4: A_FSB<23>         18: cnt/RefCnt<7>      32: iobs/Once 
+  5: BERR_IOBS         19: cnt/RefDone        33: iobs/PS_FSM_FFd1 
+  6: IOBERR            20: cnt/TimeoutBPre    34: iobs/PS_FSM_FFd2 
+  7: IORW0             21: cs/nOverlay0       35: nADoutLE1 
+  8: RefAck            22: fsb/ASrf           36: nAS_FSB 
+  9: SW<1>             23: fsb/BERR1r         37: nAS_IOB 
+ 10: TimeoutA          24: fsb/VPA            38: nAoutOE 
+ 11: cnt/RefCnt<0>     25: iobm/BGr0          39: nLDS_FSB 
+ 12: cnt/RefCnt<1>     26: iobm/BGr1          40: nRES 
+ 13: cnt/RefCnt<2>     27: iobm/IOS_FSM_FFd2  41: nWE_FSB 
+ 14: cnt/RefCnt<3>     28: iobm/IOS_FSM_FFd3 
 
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-ram/BACTr            .........X...............X.............. 2
-nAoutOE              ........................................ 0
-iobs/Clear1          ......................XXX............... 3
-ALE0S                ......................XX................ 2
-nDoutOE              ......X......XXX........................ 4
-nDinOE               XXXX.....................X..X........... 6
-iobs/PS_FSM_FFd1     ................X.....XX................ 3
-iobs/IOU1            ....................X......X............ 2
-iobs/IOL1            ....................X.....X............. 2
-iobm/IOS_FSM_FFd2    ............XXXX........................ 4
-nVPA_FSB             ...........X.............X.............. 2
-iobm/IOS_FSM_FFd1    ............XXXX........................ 4
-fsb/BERR1r           ....X....XX..............X.............. 4
-cs/nOverlay1         ........XX...............X.............. 3
-$OpTx$FX_DC$610      XXXX...X................................ 5
-IOU0                 ...................X..XXX..X............ 5
-IOL0                 .................X....XXX.X............. 5
-iobs/IOReady         .....X...X......X.X..X.XXX.............. 8
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
+Signal                        1         2         3         4         5 FB
+Name                0----+----0----+----0----+----0----+----0----+----0 Inputs
+cnt/RefCnt<6>        ..........XXXXXX.................................. 6
+nAoutOE              ........................XX..........XX............ 4
+cnt/RefCnt<5>        ..........XXXXX................................... 5
+cnt/RefCnt<4>        ..........XXXX.................................... 4
+nDoutOE              ......X...................XX...................... 3
+nDinOE               XXXX....X..........................X....X......... 7
+cnt/RefCnt<3>        ..........XXX..................................... 3
+iobs/PS_FSM_FFd1     ............................X...XX................ 3
+fsb/BERR1r           ....X................XX............X.............. 4
+cs/nOverlay1         ....................XX.............X.............. 3
+nVPA_FSB             .......................X...........X.............. 2
+cnt/RefDone          .......X..XXXXXXXXX............................... 10
+cs/nOverlay0         XXXX................XX.............X...X.......... 8
+cnt/TimeoutBPre      ..........XXXXXXXX.X.X.............X.............. 11
+TimeoutA             .........XXXXXXXX....X.............X.............. 10
+IOL0                 .............................X..XXX...X........... 5
+iobs/IOReady         .....X...............X......X.XX.XXX.............. 8
+BERR_IOBS            ....XX...............X......X..X.XXX.............. 8
+                    0----+----1----+----2----+----3----+----4----+----5
+                              0         0         0         0         0
 *********************************** FB5  ***********************************
-Number of function block inputs used/remaining:               31/23
-Number of signals used by logic mapping into function block:  31
+Number of function block inputs used/remaining:               42/12
+Number of signals used by logic mapping into function block:  42
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
-(unused)              0       0   /\5   0     FB5_1         (b)     (b)
-nROMCS                2       0   /\3   0     FB5_2   35    I/O     O
-(unused)              0       0   \/5   0     FB5_3         (b)     (b)
-iobs/PS_FSM_FFd2     14       9<-   0   0     FB5_4         (b)     (b)
-nCAS                  1       0   /\4   0     FB5_5   36    I/O     O
-nOE                   1       0   \/2   2     FB5_6   37    I/O     O
+ram/RASEL            20      15<-   0   0     FB5_1         (b)     (b)
+nROMCS                3       3<- /\5   0     FB5_2   35    I/O     O
+cnt/RefCnt<7>         1       0   /\3   1     FB5_3         (b)     (b)
+ram/RAMDIS2           7       2<-   0   0     FB5_4         (b)     (b)
+nCAS                  1       0   /\2   2     FB5_5   36    I/O     O
+nOE                   1       0   \/3   1     FB5_6   37    I/O     O
 (unused)              0       0   \/5   0     FB5_7         (b)     (b)
-iobs/Once            17      12<-   0   0     FB5_8   39    I/O     (b)
+ram/RAMDIS1          18      13<-   0   0     FB5_8   39    I/O     (b)
 RA<4>                 2       2<- /\5   0     FB5_9   40    I/O     O
 (unused)              0       0   /\2   3     FB5_10        (b)     (b)
 RA<3>                 2       0   \/2   1     FB5_11  41    I/O     O
 RA<5>                 2       2<- \/5   0     FB5_12  42    I/O     O
-IOREQ                14       9<-   0   0     FB5_13        (b)     (b)
-RA<2>                 2       1<- /\4   0     FB5_14  43    I/O     O
-RA<6>                 2       0   /\1   2     FB5_15  46    I/O     O
-BERR_IOBS             4       0     0   1     FB5_16        (b)     (b)
+iobs/Load1           15      10<-   0   0     FB5_13        (b)     (b)
+RA<2>                 2       2<- /\5   0     FB5_14  43    I/O     O
+RA<6>                 2       0   /\2   1     FB5_15  46    I/O     O
+ram/Once              5       0     0   0     FB5_16        (b)     (b)
 (unused)              0       0   \/5   0     FB5_17  49    I/O     (b)
-IORW0                18      13<-   0   0     FB5_18        (b)     (b)
+(unused)              0       0   \/5   0     FB5_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: A_FSB<12>         12: A_FSB<23>         22: fsb/ASrf 
-  2: A_FSB<13>         13: A_FSB<3>          23: iobs/IOACTr 
-  3: A_FSB<14>         14: A_FSB<4>          24: iobs/IORW1 
-  4: A_FSB<15>         15: A_FSB<5>          25: iobs/Once 
-  5: A_FSB<16>         16: A_FSB<6>          26: iobs/PS_FSM_FFd1 
-  6: A_FSB<17>         17: A_FSB<7>          27: iobs/PS_FSM_FFd2 
-  7: A_FSB<18>         18: BERR_IOBS         28: nADoutLE1 
-  8: A_FSB<19>         19: IOBERR            29: nAS_FSB 
-  9: A_FSB<20>         20: IORW0             30: nWE_FSB 
- 10: A_FSB<21>         21: cs/nOverlay1      31: ram/RASEL 
- 11: A_FSB<22>        
+  1: A_FSB<12>         15: A_FSB<5>          29: fsb/ASrf 
+  2: A_FSB<13>         16: A_FSB<6>          30: iobs/Once 
+  3: A_FSB<14>         17: A_FSB<7>          31: iobs/PS_FSM_FFd1 
+  4: A_FSB<15>         18: SW<1>             32: iobs/PS_FSM_FFd2 
+  5: A_FSB<16>         19: cnt/RefCnt<0>     33: nADoutLE1 
+  6: A_FSB<17>         20: cnt/RefCnt<1>     34: nAS_FSB 
+  7: A_FSB<18>         21: cnt/RefCnt<2>     35: nWE_FSB 
+  8: A_FSB<19>         22: cnt/RefCnt<3>     36: ram/BACTr 
+  9: A_FSB<20>         23: cnt/RefCnt<4>     37: ram/Once 
+ 10: A_FSB<21>         24: cnt/RefCnt<5>     38: ram/RAMDIS2 
+ 11: A_FSB<22>         25: cnt/RefCnt<6>     39: ram/RASEL 
+ 12: A_FSB<23>         26: cnt/RefCnt<7>     40: ram/RS_FSM_FFd1 
+ 13: A_FSB<3>          27: cnt/RefDone       41: ram/RS_FSM_FFd2 
+ 14: A_FSB<4>          28: cs/nOverlay1      42: ram/RS_FSM_FFd3 
 
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-nROMCS               ........XXXX........X................... 5
-iobs/PS_FSM_FFd2     .XX.XXXXXXXX........XXX.XXXXXX.......... 19
-nCAS                 ..............................X......... 1
-nOE                  ............................XX.......... 2
-iobs/Once            .XX.XXXXXXXX........XX..XXXXXX.......... 18
-RA<4>                ..X...........X...............X......... 3
-RA<3>                .X...........X................X......... 3
-RA<5>                ...X...........X..............X......... 3
-IOREQ                .XX.XXXXXXXX........XXX.XXXXXX.......... 19
-RA<2>                X...........X.................X......... 3
-RA<6>                ....X...........X.............X......... 3
-BERR_IOBS            .................XX..XX.X.XXX........... 8
-IORW0                .XX.XXXXXXXX.......XXX.XXXXXXX.......... 20
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
+Signal                        1         2         3         4         5 FB
+Name                0----+----0----+----0----+----0----+----0----+----0 Inputs
+ram/RASEL            .........XXX...........XXXXXX....X.XX..XXX........ 15
+nROMCS               ........XXXX.....X.........X...................... 6
+cnt/RefCnt<7>        ..................XXXXXXX......................... 7
+ram/RAMDIS2          .........XXX...........XXXXXX....X..XX.XXX........ 15
+nCAS                 ......................................X........... 1
+nOE                  .................................XX............... 2
+ram/RAMDIS1          .........XXX...........XXXXXX....X.XX..XXX........ 15
+RA<4>                ..X...........X.......................X........... 3
+RA<3>                .X...........X........................X........... 3
+RA<5>                ...X...........X......................X........... 3
+iobs/Load1           .XX.XXXXXXXX.....X.........XXXXXXXX............... 19
+RA<2>                X...........X.........................X........... 3
+RA<6>                ....X...........X.....................X........... 3
+ram/Once             .........XXX...............XX....X..X..XXX........ 10
+                    0----+----1----+----2----+----3----+----4----+----5
+                              0         0         0         0         0
 *********************************** FB6  ***********************************
 Number of function block inputs used/remaining:               34/20
 Number of signals used by logic mapping into function block:  34
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
-iobm/ETACK            1       0   /\1   3     FB6_1         (b)     (b)
-nVMA_IOB              2       0     0   3     FB6_2   74    I/O     O
-ALE0M                 2       0     0   3     FB6_3         (b)     (b)
+iobm/ETACK            1       0   /\4   0     FB6_1         (b)     (b)
+nVMA_IOB              3       0     0   2     FB6_2   74    I/O     O
+iobm/IOS_FSM_FFd3     3       0     0   2     FB6_3         (b)     (b)
 iobm/ES<3>            3       0     0   2     FB6_4         (b)     (b)
 iobm/ES<1>            3       0     0   2     FB6_5   76    I/O     I
 iobm/ES<0>            3       0     0   2     FB6_6   77    I/O     I
-iobm/IOS_FSM_FFd4     4       0     0   1     FB6_7         (b)     (b)
+ALE0M                 3       0     0   2     FB6_7         (b)     (b)
 iobm/ES<4>            4       0     0   1     FB6_8   78    I/O     I
 nLDS_IOB              4       0     0   1     FB6_9   79    I/O     O
-iobm/IOS_FSM_FFd3     5       0     0   0     FB6_10        (b)     (b)
+iobm/IOS_FSM_FFd2     5       0     0   0     FB6_10        (b)     (b)
 nUDS_IOB              4       0     0   1     FB6_11  80    I/O     O
-nAS_IOB               2       0     0   3     FB6_12  81    I/O     O
+nAS_IOB               3       0     0   2     FB6_12  81    I/O     O
 iobm/ES<2>            5       0     0   0     FB6_13        (b)     (b)
 nADoutLE1             2       0     0   3     FB6_14  82    I/O     O
 nADoutLE0             1       0   \/1   3     FB6_15  85    I/O     O
-IOACT                 6       1<-   0   0     FB6_16        (b)     (b)
-nDinLE                2       0   \/3   0     FB6_17  86    I/O     O
+IOACT                 7       2<-   0   0     FB6_16        (b)     (b)
+nDinLE                1       0   /\1   3     FB6_17  86    I/O     O
 IOBERR                9       4<-   0   0     FB6_18        (b)     (b)
 
 Signals Used by Logic in Function Block
   1: ALE0M             13: iobm/ES<0>         24: iobm/IOS_FSM_FFd3 
-  2: ALE0S             14: iobm/ES<1>         25: iobm/IOS_FSM_FFd4 
-  3: CLK_IOB           15: iobm/ES<2>         26: iobm/RESrf 
-  4: IOACT             16: iobm/ES<3>         27: iobm/RESrr 
-  5: IOBERR            17: iobm/ES<4>         28: iobm/VPArf 
-  6: IOL0              18: iobm/ETACK         29: iobm/VPArr 
-  7: IORW0             19: iobm/Er            30: iobs/Clear1 
-  8: IOU0              20: iobm/Er2           31: iobs/Load1 
-  9: iobm/BERRrf       21: iobm/IOREQr        32: nADoutLE1 
+  2: ALE0S             14: iobm/ES<1>         25: iobm/RESrf 
+  3: CLK_IOB           15: iobm/ES<2>         26: iobm/RESrr 
+  4: IOACT             16: iobm/ES<3>         27: iobm/VPArf 
+  5: IOBERR            17: iobm/ES<4>         28: iobm/VPArr 
+  6: IOL0              18: iobm/ETACK         29: iobs/Clear1 
+  7: IORW0             19: iobm/Er            30: iobs/Load1 
+  8: IOU0              20: iobm/Er2           31: nADoutLE1 
+  9: iobm/BERRrf       21: iobm/IOREQr        32: nAoutOE 
  10: iobm/BERRrr       22: iobm/IOS_FSM_FFd1  33: nBERR_IOB 
  11: iobm/DTACKrf      23: iobm/IOS_FSM_FFd2  34: nVMA_IOB 
  12: iobm/DTACKrr     
@@ -540,135 +576,137 @@ Signals Used by Logic in Function Block
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
 iobm/ETACK           ............XXXXX................X...... 6
-nVMA_IOB             ...X........XXXXX..........XX....X...... 9
-ALE0M                ....................XXXXX............... 5
+nVMA_IOB             ...X........XXXXX.........XX...X.X...... 10
+iobm/IOS_FSM_FFd3    ..X.................XXXX.......X........ 6
 iobm/ES<3>           ............XXXX..XX.................... 6
 iobm/ES<1>           ............XX....XX.................... 4
 iobm/ES<0>           ............XXXXX.XX.................... 7
-iobm/IOS_FSM_FFd4    ..X.................XXXXX............... 6
+ALE0M                ....................XXXX.......X........ 5
 iobm/ES<4>           ............XXXXX.XX.................... 7
-nLDS_IOB             .....XX..............XXXX............... 6
-iobm/IOS_FSM_FFd3    ..X.....XXXX.....X.....XXXX............. 10
-nUDS_IOB             ......XX.............XXXX............... 6
-nAS_IOB              .....................XXXX............... 4
+nLDS_IOB             .....XX..............XXX.......X........ 6
+iobm/IOS_FSM_FFd2    ..X.....XXXX.....X...XXXXX.............. 11
+nUDS_IOB             ......XX.............XXX.......X........ 6
+nAS_IOB              .....................XXX.......X........ 4
 iobm/ES<2>           ............XXXXX.XX.................... 7
-nADoutLE1            .............................XXX........ 3
+nADoutLE1            ............................XXX......... 3
 nADoutLE0            XX...................................... 2
-IOACT                ..X.....XXXX.....X..XXXXXXX............. 13
-nDinLE               .....................X.XX............... 3
-IOBERR               ..X.X...XXXX.....X...XXXXXX.....X....... 14
+IOACT                ..X.....XXXX.....X..XXXXXX.....X........ 13
+nDinLE               .....................XX................. 2
+IOBERR               ..X.X...XXXX.....X...XXXXX......X....... 13
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *********************************** FB7  ***********************************
-Number of function block inputs used/remaining:               39/15
-Number of signals used by logic mapping into function block:  39
-Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
-Name                Pt      Pt    Pt  Pt               #    Type    Use
-TimeoutB              3       3<- /\5   0     FB7_1         (b)     (b)
-RA<1>                 2       0   /\3   0     FB7_2   50    I/O     O
-cnt/RefDone           2       0     0   3     FB7_3         (b)     (b)
-fsb/Ready0r           3       0     0   2     FB7_4         (b)     (b)
-RA<7>                 2       0     0   3     FB7_5   52    I/O     O
-RA<0>                 2       0     0   3     FB7_6   53    I/O     O
-cs/nOverlay0          3       0   \/1   1     FB7_7         (b)     (b)
-RA<8>                 7       2<-   0   0     FB7_8   54    I/O     O
-RA<10>                1       0   /\1   3     FB7_9   55    I/O     O
-cnt/TimeoutBPre       3       0     0   2     FB7_10        (b)     (b)
-RA<9>                 2       0   \/3   0     FB7_11  56    I/O     O
-TimeoutA              3       3<- \/5   0     FB7_12  58    I/O     (b)
-(unused)              0       0   \/5   0     FB7_13        (b)     (b)
-ram/RS_FSM_FFd3      11      10<- \/4   0     FB7_14  59    I/O     (b)
-(unused)              0       0   \/5   0     FB7_15  60    I/O     (b)
-ram/RS_FSM_FFd2      13       9<- \/1   0     FB7_16        (b)     (b)
-(unused)              0       0   \/5   0     FB7_17  61    I/O     (b)
-ram/RAMReady         16      11<-   0   0     FB7_18        (b)     (b)
-
-Signals Used by Logic in Function Block
-  1: A_FSB<10>         14: RefAck            27: cs/nOverlay0 
-  2: A_FSB<11>         15: TimeoutA          28: cs/nOverlay1 
-  3: A_FSB<17>         16: TimeoutB          29: fsb/ASrf 
-  4: A_FSB<18>         17: cnt/RefCnt<0>     30: fsb/Ready0r 
-  5: A_FSB<19>         18: cnt/RefCnt<1>     31: nAS_FSB 
-  6: A_FSB<1>          19: cnt/RefCnt<2>     32: nRES 
-  7: A_FSB<20>         20: cnt/RefCnt<3>     33: ram/BACTr 
-  8: A_FSB<21>         21: cnt/RefCnt<4>     34: ram/Once 
-  9: A_FSB<22>         22: cnt/RefCnt<5>     35: ram/RAMReady 
- 10: A_FSB<23>         23: cnt/RefCnt<6>     36: ram/RASEL 
- 11: A_FSB<2>          24: cnt/RefCnt<7>     37: ram/RS_FSM_FFd1 
- 12: A_FSB<8>          25: cnt/RefDone       38: ram/RS_FSM_FFd2 
- 13: A_FSB<9>          26: cnt/TimeoutBPre   39: ram/RS_FSM_FFd3 
-
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-TimeoutB             ...............XXXXXXXXX.X..X.X......... 12
-RA<1>                .X........X........................X.... 3
-cnt/RefDone          .............X..XXXXXXXXX............... 10
-fsb/Ready0r          .......XXX.................XXXX...X..... 8
-RA<7>                ..X........X.......................X.... 3
-RA<0>                X....X.............................X.... 3
-cs/nOverlay0         ......XXXX................X.X.XX........ 8
-RA<8>                ...X...XXX..X..............X.......X.... 7
-RA<10>               .......X................................ 1
-cnt/TimeoutBPre      ................XXXXXXXX.X..X.X......... 11
-RA<9>                ....X.X............................X.... 3
-TimeoutA             ..............X.XXXXXXX.....X.X......... 10
-ram/RS_FSM_FFd3      .......XXX...........XXXX..XX.X..X..XXX. 14
-ram/RS_FSM_FFd2      .......XXX...........XXXX..XX.X.X...XXX. 14
-ram/RAMReady         .......XXX...........XXXX..XX.X.XX..XXX. 15
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
-*********************************** FB8  ***********************************
 Number of function block inputs used/remaining:               36/18
 Number of signals used by logic mapping into function block:  36
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
-ram/RASEL            20      15<-   0   0     FB8_1         (b)     (b)
-RA<11>                1       1<- /\5   0     FB8_2   63    I/O     O
-fsb/BERR0r            3       0   /\1   1     FB8_3         (b)     (b)
-ram/RS_FSM_FFd1       5       0     0   0     FB8_4         (b)     (b)
-nRAS                  3       0     0   2     FB8_5   64    I/O     O
-nRAMLWE               1       0     0   4     FB8_6   65    I/O     O
-ram/Once              5       0     0   0     FB8_7         (b)     (b)
-nRAMUWE               1       0   \/4   0     FB8_8   66    I/O     O
-iobs/Load1           14       9<-   0   0     FB8_9   67    I/O     (b)
-(unused)              0       0   /\5   0     FB8_10        (b)     (b)
-(unused)              0       0   \/3   2     FB8_11  68    I/O     (b)
-nBERR_FSB             3       3<- \/5   0     FB8_12  70    I/O     O
-ram/RAMDIS2           7       5<- \/3   0     FB8_13        (b)     (b)
-(unused)              0       0   \/5   0     FB8_14  71    I/O     (b)
-ram/RAMDIS1          18      13<-   0   0     FB8_15  72    I/O     (b)
-(unused)              0       0   /\5   0     FB8_16        (b)     (b)
-(unused)              0       0   \/5   0     FB8_17  73    I/O     (b)
-(unused)              0       0   \/5   0     FB8_18        (b)     (b)
+ram/RAMReady         16      11<-   0   0     FB7_1         (b)     (b)
+RA<1>                 2       2<- /\5   0     FB7_2   50    I/O     O
+TimeoutB              3       0   /\2   0     FB7_3         (b)     (b)
+fsb/Ready0r           3       0     0   2     FB7_4         (b)     (b)
+RA<7>                 2       0     0   3     FB7_5   52    I/O     O
+RA<0>                 2       0     0   3     FB7_6   53    I/O     O
+ram/RS_FSM_FFd1       5       0     0   0     FB7_7         (b)     (b)
+RA<8>                 7       2<-   0   0     FB7_8   54    I/O     O
+RA<10>                1       0   /\2   2     FB7_9   55    I/O     O
+$OpTx$$OpTx$FX_DC$182_INV$783
+                      6       1<-   0   0     FB7_10        (b)     (b)
+RA<9>                 2       0   /\1   2     FB7_11  56    I/O     O
+CLK25EN               1       0   \/4   0     FB7_12  58    I/O     O
+ram/RS_FSM_FFd3      11       6<-   0   0     FB7_13        (b)     (b)
+CLK20EN               1       0   /\2   2     FB7_14  59    I/O     O
+(unused)              0       0   \/4   1     FB7_15  60    I/O     I
+(unused)              0       0   \/5   0     FB7_16        (b)     (b)
+ram/RS_FSM_FFd2      13       9<- \/1   0     FB7_17  61    I/O     I
+(unused)              0       0   \/5   0     FB7_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: A_FSB<13>         13: TimeoutB          25: nADoutLE1 
-  2: A_FSB<14>         14: cnt/RefCnt<5>     26: nAS_FSB 
-  3: A_FSB<16>         15: cnt/RefCnt<6>     27: nLDS_FSB 
-  4: A_FSB<17>         16: cnt/RefCnt<7>     28: nUDS_FSB 
-  5: A_FSB<18>         17: cnt/RefDone       29: nWE_FSB 
-  6: A_FSB<19>         18: cs/nOverlay1      30: ram/BACTr 
-  7: A_FSB<20>         19: fsb/ASrf          31: ram/Once 
-  8: A_FSB<21>         20: fsb/BERR0r        32: ram/RAMDIS1 
-  9: A_FSB<22>         21: fsb/BERR1r        33: ram/RAMDIS2 
- 10: A_FSB<23>         22: iobs/Once         34: ram/RS_FSM_FFd1 
- 11: BERR_IOBS         23: iobs/PS_FSM_FFd1  35: ram/RS_FSM_FFd2 
- 12: RefAck            24: iobs/PS_FSM_FFd2  36: ram/RS_FSM_FFd3 
+  1: A_FSB<10>         13: A_FSB<9>          25: cnt/TimeoutBPre 
+  2: A_FSB<11>         14: SW<0>             26: cs/nOverlay1 
+  3: A_FSB<17>         15: TimeoutB          27: fsb/ASrf 
+  4: A_FSB<18>         16: cnt/RefCnt<0>     28: fsb/Ready0r 
+  5: A_FSB<19>         17: cnt/RefCnt<1>     29: nAS_FSB 
+  6: A_FSB<1>          18: cnt/RefCnt<2>     30: ram/BACTr 
+  7: A_FSB<20>         19: cnt/RefCnt<3>     31: ram/Once 
+  8: A_FSB<21>         20: cnt/RefCnt<4>     32: ram/RAMReady 
+  9: A_FSB<22>         21: cnt/RefCnt<5>     33: ram/RASEL 
+ 10: A_FSB<23>         22: cnt/RefCnt<6>     34: ram/RS_FSM_FFd1 
+ 11: A_FSB<2>          23: cnt/RefCnt<7>     35: ram/RS_FSM_FFd2 
+ 12: A_FSB<8>          24: cnt/RefDone       36: ram/RS_FSM_FFd3 
+
+Signal                        1         2         3         4 FB
+Name                0----+----0----+----0----+----0----+----0 Inputs
+ram/RAMReady         .......XXX..........XXXX.XX.XXX..XXX.... 15
+RA<1>                .X........X.....................X....... 3
+TimeoutB             ..............XXXXXXXXX.X.X.X........... 12
+fsb/Ready0r          .......XXX...............XXXX..X........ 8
+RA<7>                ..X........X....................X....... 3
+RA<0>                X....X..........................X....... 3
+ram/RS_FSM_FFd1      .......XXX...............XX.X.X..XXX.... 10
+RA<8>                ...X...XXX..X............X......X....... 7
+RA<10>               .......X................................ 1
+$OpTx$$OpTx$FX_DC$182_INV$783 
+                     ......XXXX....X..........X.X...X........ 8
+RA<9>                ....X.X.........................X....... 3
+CLK25EN              .............X.......................... 1
+ram/RS_FSM_FFd3      .......XXX..........XXXX.XX.X.X..XXX.... 14
+CLK20EN              .............X.......................... 1
+ram/RS_FSM_FFd2      .......XXX..........XXXX.XX.XX...XXX.... 14
+                    0----+----1----+----2----+----3----+----4
+                              0         0         0         0
+*********************************** FB8  ***********************************
+Number of function block inputs used/remaining:               37/17
+Number of signals used by logic mapping into function block:  37
+Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
+Name                Pt      Pt    Pt  Pt               #    Type    Use
+(unused)              0       0   /\5   0     FB8_1         (b)     (b)
+RA<11>                1       0   /\4   0     FB8_2   63    I/O     O
+(unused)              0       0   \/5   0     FB8_3         (b)     (b)
+iobs/PS_FSM_FFd2     15      10<-   0   0     FB8_4         (b)     (b)
+nRAS                  3       3<- /\5   0     FB8_5   64    I/O     O
+nRAMLWE               1       0   /\3   1     FB8_6   65    I/O     O
+RESDone               1       0   \/1   3     FB8_7         (b)     (b)
+nRAMUWE               1       1<- \/5   0     FB8_8   66    I/O     O
+IOREQ                15      10<-   0   0     FB8_9   67    I/O     (b)
+(unused)              0       0   /\5   0     FB8_10        (b)     (b)
+(unused)              0       0   \/2   3     FB8_11  68    I/O     (b)
+nBERR_FSB             3       2<- \/4   0     FB8_12  70    I/O     O
+(unused)              0       0   \/5   0     FB8_13        (b)     (b)
+iobs/Once            18      13<-   0   0     FB8_14  71    I/O     (b)
+nBR_IOB               1       0   /\4   0     FB8_15  72    I/O     O
+fsb/BERR0r            3       0     0   2     FB8_16        (b)     (b)
+(unused)              0       0   \/5   0     FB8_17  73    I/O     I
+IORW0                19      14<-   0   0     FB8_18        (b)     (b)
+
+Signals Used by Logic in Function Block
+  1: A_FSB<13>         14: IPL2r1            26: iobs/IOACTr 
+  2: A_FSB<14>         15: RESDone           27: iobs/IORW1 
+  3: A_FSB<16>         16: RESr0             28: iobs/Once 
+  4: A_FSB<17>         17: RESr1             29: iobs/PS_FSM_FFd1 
+  5: A_FSB<18>         18: RESr2             30: iobs/PS_FSM_FFd2 
+  6: A_FSB<19>         19: RefAck            31: nADoutLE1 
+  7: A_FSB<20>         20: SW<1>             32: nAS_FSB 
+  8: A_FSB<21>         21: TimeoutB          33: nLDS_FSB 
+  9: A_FSB<22>         22: cs/nOverlay1      34: nUDS_FSB 
+ 10: A_FSB<23>         23: fsb/ASrf          35: nWE_FSB 
+ 11: BERR_IOBS         24: fsb/BERR0r        36: ram/RAMDIS1 
+ 12: IORW0             25: fsb/BERR1r        37: ram/RAMDIS2 
+ 13: IPL2r0           
 
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
-ram/RASEL            .......XXX...XXXXXX......X...XX..XXX.... 15
 RA<11>               .....X.................................. 1
-fsb/BERR0r           ......XXXX..X.....XX.....X.............. 8
-ram/RS_FSM_FFd1      .......XXX.......XX......X....X..XXX.... 10
-nRAS                 .......XXX.X.....X.......X.....XX....... 8
-nRAMLWE              .........................XX.X..XX....... 5
-ram/Once             .......XXX.......XX......X....X..XXX.... 10
-nRAMUWE              .........................X.XX..XX....... 5
-iobs/Load1           XXXXXXXXXX.......XX..XXXXX..X........... 18
-nBERR_FSB            ......XXXXX.X......XX....X.............. 9
-ram/RAMDIS2          .......XXX...XXXXXX......X....X.XXXX.... 15
-ram/RAMDIS1          .......XXX...XXXXXX......X...XX..XXX.... 15
+iobs/PS_FSM_FFd2     XXXXXXXXXX.........X.XX..X.XXXXX..X..... 20
+nRAS                 .......XXX........X..X.........X...XX... 8
+nRAMLWE              ...............................XX.XXX... 5
+RESDone              ...............XXX...................... 3
+nRAMUWE              ...............................X.XXXX... 5
+IOREQ                XXXXXXXXXX.........X.XX..X.XXXXX..X..... 20
+nBERR_FSB            ......XXXXX.........X..XX......X........ 9
+iobs/Once            XXXXXXXXXX.........X.XX....XXXXX..X..... 19
+nBR_IOB              ............XXXXXX...................... 6
+fsb/BERR0r           ......XXXX..........X.XX.......X........ 8
+IORW0                XXXXXXXXXX.X.......X.XX...XXXXXX..X..... 21
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *******************************  Equations  ********************************
@@ -676,17 +714,22 @@ ram/RAMDIS1          .......XXX...XXXXXX......X...XX..XXX.... 15
 ********** Mapped Logic **********
 
 
-$OpTx$FX_DC$609 <= (nAS_FSB AND NOT fsb/ASrf);
+$OpTx$$OpTx$FX_DC$182_INV$783 <= ((NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
+	NOT cs/nOverlay1 AND NOT fsb/Ready0r AND NOT ram/RAMReady)
+	OR (A_FSB(23) AND TimeoutB)
+	OR (NOT A_FSB(22) AND TimeoutB)
+	OR (A_FSB(21) AND TimeoutB)
+	OR (NOT A_FSB(20) AND TimeoutB)
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
+	NOT fsb/Ready0r AND NOT ram/RAMReady));
 
 
-$OpTx$FX_DC$610 <= ((NOT TimeoutB)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20)));
+$OpTx$FX_DC$708 <= (nAS_FSB AND NOT fsb/ASrf);
 
 FDCPE_ALE0M: FDCPE port map (ALE0M,ALE0M_D,CLK2X_IOB,'0','0');
-ALE0M_D <= ((NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	iobm/IOS_FSM_FFd1)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	NOT iobm/IOS_FSM_FFd2 AND NOT iobm/IOREQr));
+ALE0M_D <= ((iobm/IOS_FSM_FFd2)
+	OR (iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1)
+	OR (NOT iobm/IOS_FSM_FFd1 AND iobm/IOREQr AND NOT nAoutOE));
 
 FDCPE_ALE0S: FDCPE port map (ALE0S,ALE0S_D,CLK_FSB,'0','0');
 ALE0S_D <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1);
@@ -701,10 +744,10 @@ BERR_IOBS_T <= ((BERR_IOBS AND nAS_FSB AND NOT fsb/ASrf)
 	NOT iobs/IOACTr AND IOBERR AND fsb/ASrf AND nADoutLE1));
 
 
+CLK20EN <= SW(0);
 
 
-
-
+CLK25EN <= NOT SW(0);
 
 
 
@@ -753,42 +796,44 @@ BERR_IOBS_T <= ((BERR_IOBS AND nAS_FSB AND NOT fsb/ASrf)
 
 
 FDCPE_IOACT: FDCPE port map (IOACT,IOACT_D,CLK2X_IOB,'0','0');
-IOACT_D <= ((NOT iobm/IOS_FSM_FFd4 AND iobm/IOS_FSM_FFd2 AND 
-	iobm/IOS_FSM_FFd1 AND CLK_IOB AND iobm/RESrf AND iobm/RESrr)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	iobm/IOS_FSM_FFd1)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	NOT iobm/IOS_FSM_FFd2 AND NOT iobm/IOREQr)
-	OR (NOT iobm/IOS_FSM_FFd4 AND iobm/IOS_FSM_FFd2 AND 
-	iobm/IOS_FSM_FFd1 AND CLK_IOB AND iobm/ETACK)
-	OR (NOT iobm/IOS_FSM_FFd4 AND iobm/IOS_FSM_FFd2 AND 
-	iobm/IOS_FSM_FFd1 AND CLK_IOB AND iobm/DTACKrf AND iobm/DTACKrr)
-	OR (NOT iobm/IOS_FSM_FFd4 AND iobm/IOS_FSM_FFd2 AND 
-	iobm/IOS_FSM_FFd1 AND CLK_IOB AND iobm/BERRrf AND iobm/BERRrr));
+IOACT_D <= ((CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
+	iobm/DTACKrf AND iobm/DTACKrr)
+	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
+	iobm/RESrf AND iobm/RESrr)
+	OR (iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2)
+	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2 AND 
+	NOT iobm/IOREQr)
+	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2 AND nAoutOE)
+	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
+	iobm/ETACK)
+	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
+	iobm/BERRrf AND iobm/BERRrr));
 
 FTCPE_IOBERR: FTCPE port map (IOBERR,IOBERR_T,CLK2X_IOB,'0','0');
-IOBERR_T <= ((nBERR_IOB AND NOT iobm/IOS_FSM_FFd4 AND 
-	iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2 AND iobm/IOS_FSM_FFd1 AND CLK_IOB AND 
-	IOBERR AND iobm/RESrf AND iobm/RESrr)
-	OR (nBERR_IOB AND NOT iobm/IOS_FSM_FFd4 AND 
-	iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2 AND iobm/IOS_FSM_FFd1 AND CLK_IOB AND 
-	IOBERR AND iobm/ETACK)
-	OR (nBERR_IOB AND NOT iobm/IOS_FSM_FFd4 AND 
-	iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2 AND iobm/IOS_FSM_FFd1 AND CLK_IOB AND 
-	IOBERR AND iobm/DTACKrf AND iobm/DTACKrr)
-	OR (nBERR_IOB AND NOT iobm/IOS_FSM_FFd4 AND 
-	iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2 AND iobm/IOS_FSM_FFd1 AND CLK_IOB AND 
-	IOBERR AND iobm/BERRrf AND iobm/BERRrr)
-	OR (iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	NOT iobm/IOS_FSM_FFd2 AND NOT iobm/IOS_FSM_FFd1 AND IOBERR)
-	OR (NOT nBERR_IOB AND NOT iobm/IOS_FSM_FFd4 AND 
-	iobm/IOS_FSM_FFd3 AND CLK_IOB AND NOT IOBERR AND iobm/ETACK)
-	OR (NOT nBERR_IOB AND NOT iobm/IOS_FSM_FFd4 AND 
-	iobm/IOS_FSM_FFd3 AND CLK_IOB AND NOT IOBERR AND iobm/DTACKrf AND iobm/DTACKrr)
-	OR (NOT nBERR_IOB AND NOT iobm/IOS_FSM_FFd4 AND 
-	iobm/IOS_FSM_FFd3 AND CLK_IOB AND NOT IOBERR AND iobm/BERRrf AND iobm/BERRrr)
-	OR (NOT nBERR_IOB AND NOT iobm/IOS_FSM_FFd4 AND 
-	iobm/IOS_FSM_FFd3 AND CLK_IOB AND NOT IOBERR AND iobm/RESrf AND iobm/RESrr));
+IOBERR_T <= ((CLK_IOB AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
+	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/RESrf AND 
+	iobm/RESrr)
+	OR (CLK_IOB AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
+	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/DTACKrf AND 
+	iobm/DTACKrr)
+	OR (CLK_IOB AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
+	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/BERRrf AND 
+	iobm/BERRrr)
+	OR (CLK_IOB AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
+	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/RESrf AND 
+	iobm/RESrr)
+	OR (iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND 
+	NOT iobm/IOS_FSM_FFd2 AND IOBERR)
+	OR (CLK_IOB AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
+	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/ETACK)
+	OR (CLK_IOB AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
+	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/ETACK)
+	OR (CLK_IOB AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
+	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/DTACKrf AND 
+	iobm/DTACKrr)
+	OR (CLK_IOB AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
+	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/BERRrf AND 
+	iobm/BERRrr));
 
 FDCPE_IOL0: FDCPE port map (IOL0,IOL0_D,CLK_FSB,'0','0',IOL0_CE);
 IOL0_D <= ((NOT nLDS_FSB AND nADoutLE1)
@@ -798,17 +843,19 @@ IOL0_CE <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1);
 FDCPE_IOREQ: FDCPE port map (IOREQ,IOREQ_D,CLK_FSB,'0','0');
 IOREQ_D <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND 
 	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20) AND 
 	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND 
 	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND 
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND 
 	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB AND 
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND 
 	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND 
 	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND 
+	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB AND 
+	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
+	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1) AND 
 	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
 	OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21) AND 
 	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
@@ -817,63 +864,41 @@ IOREQ_D <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND
 	OR (NOT iobs/PS_FSM_FFd2 AND iobs/PS_FSM_FFd1)
 	OR (iobs/PS_FSM_FFd1 AND iobs/IOACTr)
 	OR (iobs/Once AND NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND NOT iobs/PS_FSM_FFd2 AND 
-	nADoutLE1)
 	OR (nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT fsb/ASrf AND 
-	nADoutLE1));
+	nADoutLE1)
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
+	NOT iobs/PS_FSM_FFd2 AND nADoutLE1));
 
 FTCPE_IORW0: FTCPE port map (IORW0,IORW0_T,CLK_FSB,'0','0');
-IORW0_T <= ((nROMCS_OBUF.EXP)
-	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND 
-	NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND 
-	NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1)
-	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND 
-	NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND 
-	NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1)
-	OR (A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
-	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
-	cs/nOverlay1 AND NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND NOT nAS_FSB AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (A_FSB(23) AND NOT iobs/Once AND NOT IORW0 AND nWE_FSB AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT iobs/Once AND 
-	IORW0 AND NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT iobs/Once AND 
-	IORW0 AND NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND 
-	fsb/ASrf AND nADoutLE1)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT iobs/Once AND 
-	NOT IORW0 AND nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT iobs/Once AND 
-	NOT IORW0 AND nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND 
-	fsb/ASrf AND nADoutLE1)
-	OR (IORW0 AND NOT iobs/IORW1 AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND NOT nADoutLE1)
-	OR (NOT IORW0 AND iobs/IORW1 AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND NOT nADoutLE1)
-	OR (A_FSB(23) AND NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND 
-	NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (A_FSB(23) AND NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1)
-	OR (A_FSB(23) AND NOT iobs/Once AND NOT IORW0 AND nWE_FSB AND 
-	NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1));
+IORW0_T <= ((A_FSB_19_IBUF$BUF0.EXP)
+	OR (IORW0 AND iobs/IORW1 AND NOT nADoutLE1)
+	OR (NOT IORW0 AND NOT iobs/IORW1 AND NOT nADoutLE1)
+	OR (nAS_FSB AND NOT fsb/ASrf AND nADoutLE1)
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND nADoutLE1)
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT IORW0 AND nADoutLE1)
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND nADoutLE1)
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND nADoutLE1)
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND nADoutLE1)
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND nADoutLE1)
+	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1) AND nADoutLE1)
+	OR (NOT IORW0 AND NOT nWE_FSB AND nADoutLE1)
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
+	nADoutLE1)
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20) AND nADoutLE1)
+	OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21) AND 
+	nADoutLE1)
+	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
+	cs/nOverlay1 AND nADoutLE1));
 
 FDCPE_IOU0: FDCPE port map (IOU0,IOU0_D,CLK_FSB,'0','0',IOU0_CE);
 IOU0_D <= ((NOT nUDS_FSB AND nADoutLE1)
 	OR (iobs/IOU1 AND NOT nADoutLE1));
 IOU0_CE <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1);
 
+FDCPE_IPL2r0: FDCPE port map (IPL2r0,NOT nIPL2,CLK_FSB,'0','0');
+
+FDCPE_IPL2r1: FDCPE port map (IPL2r1,IPL2r0,CLK_FSB,'0','0');
+
 
 RA(0) <= ((A_FSB(10) AND NOT ram/RASEL)
 	OR (ram/RASEL AND A_FSB(1)));
@@ -883,8 +908,8 @@ RA(1) <= ((A_FSB(11) AND NOT ram/RASEL)
 	OR (ram/RASEL AND A_FSB(2)));
 
 
-RA(2) <= ((ram/RASEL AND A_FSB(3))
-	OR (A_FSB(12) AND NOT ram/RASEL));
+RA(2) <= ((A_FSB(12) AND NOT ram/RASEL)
+	OR (ram/RASEL AND A_FSB(3)));
 
 
 RA(3) <= ((A_FSB(13) AND NOT ram/RASEL)
@@ -927,6 +952,15 @@ RA(10) <= A_FSB(21);
 
 RA(11) <= A_FSB(19);
 
+FDCPE_RESDone: FDCPE port map (RESDone,'1',CLK_FSB,'0','0',RESDone_CE);
+RESDone_CE <= (NOT RESr0 AND NOT RESr1 AND RESr2);
+
+FDCPE_RESr0: FDCPE port map (RESr0,NOT nRES,CLK_FSB,'0','0');
+
+FDCPE_RESr1: FDCPE port map (RESr1,RESr0,CLK_FSB,'0','0');
+
+FDCPE_RESr2: FDCPE port map (RESr2,RESr1,CLK_FSB,'0','0');
+
 FDCPE_RefAck: FDCPE port map (RefAck,RefAck_D,CLK_FSB,'0','0');
 RefAck_D <= (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1);
 
@@ -1018,7 +1052,13 @@ fsb/Ready0r_D <= ((nAS_FSB AND NOT fsb/ASrf)
 	NOT cs/nOverlay1 AND NOT fsb/Ready0r AND NOT ram/RAMReady));
 
 FDCPE_fsb/Ready1r: FDCPE port map (fsb/Ready1r,fsb/Ready1r_D,CLK_FSB,'0','0');
-fsb/Ready1r_D <= ((A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
+fsb/Ready1r_D <= ((A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
+	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
+	NOT fsb/Ready1r AND NOT iobs/IOReady)
+	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
+	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
+	NOT fsb/Ready1r AND NOT iobs/IOReady)
+	OR (A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
 	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
 	cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND NOT iobs/IOReady AND 
 	NOT nADoutLE1)
@@ -1030,12 +1070,8 @@ fsb/Ready1r_D <= ((A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND
 	OR (A_FSB(23) AND NOT fsb/Ready1r AND NOT iobs/IOReady)
 	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT fsb/Ready1r AND 
 	NOT iobs/IOReady)
-	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-	NOT fsb/Ready1r AND NOT iobs/IOReady)
-	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-	NOT fsb/Ready1r AND NOT iobs/IOReady));
+	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT fsb/Ready1r AND 
+	NOT iobs/IOReady AND NOT SW(1)));
 
 FDCPE_fsb/Ready2r: FDCPE port map (fsb/Ready2r,fsb/Ready2r_D,CLK_FSB,'0','0');
 fsb/Ready2r_D <= ((nAS_FSB AND NOT fsb/ASrf)
@@ -1073,47 +1109,58 @@ fsb/Ready2r_D <= ((nAS_FSB AND NOT fsb/ASrf)
 	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r));
 
 FDCPE_fsb/VPA: FDCPE port map (fsb/VPA,fsb/VPA_D,CLK_FSB,'0','0');
-fsb/VPA_D <= ((EXP25_.EXP)
-	OR (NOT A_FSB(22) AND TimeoutB AND fsb/VPA AND 
-	NOT $OpTx$FX_DC$609)
-	OR (A_FSB(21) AND TimeoutB AND fsb/VPA AND 
-	NOT $OpTx$FX_DC$609)
+fsb/VPA_D <= ((EXP21_.EXP)
 	OR (A_FSB(23) AND NOT fsb/Ready1r AND fsb/VPA AND 
-	NOT iobs/IOReady AND NOT $OpTx$FX_DC$609)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-	NOT fsb/Ready0r AND fsb/VPA AND NOT ram/RAMReady AND NOT $OpTx$FX_DC$609)
+	NOT iobs/IOReady AND NOT $OpTx$FX_DC$708)
 	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT fsb/Ready1r AND 
-	fsb/VPA AND NOT iobs/IOReady AND NOT $OpTx$FX_DC$609)
-	OR (EXP16_.EXP)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT fsb/Ready0r AND fsb/VPA AND NOT ram/RAMReady AND 
-	NOT $OpTx$FX_DC$609)
+	fsb/VPA AND NOT iobs/IOReady AND NOT $OpTx$FX_DC$708)
+	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT fsb/Ready1r AND fsb/VPA AND 
+	NOT iobs/IOReady AND NOT SW(1) AND NOT $OpTx$FX_DC$708)
 	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
 	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-	NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND NOT $OpTx$FX_DC$609)
+	NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND NOT $OpTx$FX_DC$708)
 	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
 	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-	NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND NOT $OpTx$FX_DC$609)
+	NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND NOT $OpTx$FX_DC$708)
+	OR (nROMWE_OBUF.EXP)
 	OR (A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
 	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
 	cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND 
-	NOT nADoutLE1 AND NOT $OpTx$FX_DC$609)
+	NOT nADoutLE1 AND NOT $OpTx$FX_DC$708)
 	OR (A_FSB(13) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
 	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
 	cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND 
-	NOT nADoutLE1 AND NOT $OpTx$FX_DC$609)
-	OR (BERR_IOBS AND fsb/VPA AND NOT $OpTx$FX_DC$609)
-	OR (fsb/BERR0r AND fsb/VPA AND NOT $OpTx$FX_DC$609)
-	OR (fsb/BERR1r AND fsb/VPA AND NOT $OpTx$FX_DC$609)
-	OR (A_FSB(23) AND TimeoutB AND fsb/VPA AND 
-	NOT $OpTx$FX_DC$609)
-	OR (NOT A_FSB(20) AND TimeoutB AND fsb/VPA AND 
-	NOT $OpTx$FX_DC$609));
+	NOT nADoutLE1 AND NOT $OpTx$FX_DC$708)
+	OR (A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
+	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
+	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
+	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND 
+	fsb/VPA AND NOT $OpTx$FX_DC$708)
+	OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
+	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
+	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
+	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND 
+	fsb/VPA AND NOT $OpTx$FX_DC$708)
+	OR (A_FSB(8) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
+	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
+	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
+	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND 
+	fsb/VPA AND NOT $OpTx$FX_DC$708)
+	OR (BERR_IOBS AND fsb/VPA AND NOT $OpTx$FX_DC$708)
+	OR (fsb/BERR0r AND fsb/VPA AND NOT $OpTx$FX_DC$708)
+	OR (fsb/BERR1r AND fsb/VPA AND NOT $OpTx$FX_DC$708)
+	OR (fsb/VPA AND NOT nBR_IOB AND NOT $OpTx$FX_DC$708)
+	OR (fsb/VPA AND NOT $OpTx$FX_DC$708 AND 
+	$OpTx$$OpTx$FX_DC$182_INV$783));
 
 FDCPE_iobm/BERRrf: FDCPE port map (iobm/BERRrf,NOT nBERR_IOB,NOT CLK2X_IOB,'0','0');
 
 FDCPE_iobm/BERRrr: FDCPE port map (iobm/BERRrr,NOT nBERR_IOB,CLK2X_IOB,'0','0');
 
+FDCPE_iobm/BGr0: FDCPE port map (iobm/BGr0,NOT nBG_IOB,CLK2X_IOB,'0','0');
+
+FDCPE_iobm/BGr1: FDCPE port map (iobm/BGr1,iobm/BGr0,CLK2X_IOB,'0','0');
+
 FDCPE_iobm/DTACKrf: FDCPE port map (iobm/DTACKrf,NOT nDTACK_IOB,NOT CLK2X_IOB,'0','0');
 
 FDCPE_iobm/DTACKrr: FDCPE port map (iobm/DTACKrr,NOT nDTACK_IOB,CLK2X_IOB,'0','0');
@@ -1162,36 +1209,27 @@ FDCPE_iobm/Er2: FDCPE port map (iobm/Er2,iobm/Er,CLK2X_IOB,'0','0');
 FDCPE_iobm/IOREQr: FDCPE port map (iobm/IOREQr,IOREQ,NOT CLK2X_IOB,'0','0');
 
 FDCPE_iobm/IOS_FSM_FFd1: FDCPE port map (iobm/IOS_FSM_FFd1,iobm/IOS_FSM_FFd1_D,CLK2X_IOB,'0','0');
-iobm/IOS_FSM_FFd1_D <= ((iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd2 AND 
-	NOT iobm/IOS_FSM_FFd1)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	NOT iobm/IOS_FSM_FFd2));
+iobm/IOS_FSM_FFd1_D <= ((iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1)
+	OR (NOT iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2));
 
-FDCPE_iobm/IOS_FSM_FFd2: FDCPE port map (iobm/IOS_FSM_FFd2,iobm/IOS_FSM_FFd2_D,CLK2X_IOB,'0','0');
-iobm/IOS_FSM_FFd2_D <= ((NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	iobm/IOS_FSM_FFd1)
-	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2 AND 
-	NOT iobm/IOS_FSM_FFd1));
+FTCPE_iobm/IOS_FSM_FFd2: FTCPE port map (iobm/IOS_FSM_FFd2,iobm/IOS_FSM_FFd2_T,CLK2X_IOB,'0','0');
+iobm/IOS_FSM_FFd2_T <= ((iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND 
+	NOT iobm/IOS_FSM_FFd2)
+	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
+	iobm/IOS_FSM_FFd2 AND iobm/ETACK)
+	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
+	iobm/IOS_FSM_FFd2 AND iobm/DTACKrf AND iobm/DTACKrr)
+	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
+	iobm/IOS_FSM_FFd2 AND iobm/BERRrf AND iobm/BERRrr)
+	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
+	iobm/IOS_FSM_FFd2 AND iobm/RESrf AND iobm/RESrr));
 
 FDCPE_iobm/IOS_FSM_FFd3: FDCPE port map (iobm/IOS_FSM_FFd3,iobm/IOS_FSM_FFd3_D,CLK2X_IOB,'0','0');
-iobm/IOS_FSM_FFd3_D <= ((NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3)
-	OR (NOT iobm/IOS_FSM_FFd4 AND CLK_IOB AND iobm/ETACK)
-	OR (NOT iobm/IOS_FSM_FFd4 AND CLK_IOB AND iobm/DTACKrf AND 
-	iobm/DTACKrr)
-	OR (NOT iobm/IOS_FSM_FFd4 AND CLK_IOB AND iobm/BERRrf AND 
-	iobm/BERRrr)
-	OR (NOT iobm/IOS_FSM_FFd4 AND CLK_IOB AND iobm/RESrf AND 
-	iobm/RESrr));
-
-FDCPE_iobm/IOS_FSM_FFd4: FDCPE port map (iobm/IOS_FSM_FFd4,iobm/IOS_FSM_FFd4_D,CLK2X_IOB,'0','0');
-iobm/IOS_FSM_FFd4_D <= ((NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	iobm/IOS_FSM_FFd1)
-	OR (iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2 AND 
-	iobm/IOS_FSM_FFd1)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	NOT iobm/IOS_FSM_FFd2 AND CLK_IOB)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	NOT iobm/IOS_FSM_FFd2 AND NOT iobm/IOREQr));
+iobm/IOS_FSM_FFd3_D <= ((iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2)
+	OR (iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND 
+	NOT iobm/IOS_FSM_FFd2)
+	OR (NOT CLK_IOB AND NOT iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2 AND 
+	iobm/IOREQr AND NOT nAoutOE));
 
 FDCPE_iobm/RESrf: FDCPE port map (iobm/RESrf,NOT nRES,NOT CLK2X_IOB,'0','0');
 
@@ -1211,20 +1249,20 @@ FDCPE_iobs/IOL1: FDCPE port map (iobs/IOL1,NOT nLDS_FSB,CLK_FSB,'0','0',iobs/Loa
 FTCPE_iobs/IORW1: FTCPE port map (iobs/IORW1,iobs/IORW1_T,CLK_FSB,'0','0');
 iobs/IORW1_T <= ((iobs/Once)
 	OR (NOT nADoutLE1)
-	OR (NOT nWE_FSB AND NOT iobs/IORW1)
+	OR (fsb/Ready1r.EXP)
 	OR (nAS_FSB AND NOT fsb/ASrf)
 	OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1)
 	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21))
 	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1)
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20))
 	OR (fsb/Ready2r.EXP)
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19))
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18))
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17))
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16))
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	cs/nOverlay1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(20))
+	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1))
 	OR (nWE_FSB AND iobs/IORW1)
+	OR (NOT nWE_FSB AND NOT iobs/IORW1)
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT iobs/IORW1));
 
 FTCPE_iobs/IOReady: FTCPE port map (iobs/IOReady,iobs/IOReady_T,CLK_FSB,'0','0');
@@ -1242,37 +1280,37 @@ FDCPE_iobs/Load1: FDCPE port map (iobs/Load1,iobs/Load1_D,CLK_FSB,'0','0');
 iobs/Load1_D <= ((iobs/Once)
 	OR (NOT nADoutLE1)
 	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21))
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1)
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20))
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19))
-	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18))
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17))
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16))
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18))
+	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB)
+	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1))
 	OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21))
 	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
 	cs/nOverlay1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(20))
 	OR (nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1));
+	OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1)
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1));
 
 FDCPE_iobs/Once: FDCPE port map (iobs/Once,iobs/Once_D,CLK_FSB,'0','0');
-iobs/Once_D <= ((nOE_OBUF.EXP)
+iobs/Once_D <= ((nBERR_FSB_OBUF.EXP)
 	OR (A_FSB(23) AND NOT iobs/Once AND iobs/PS_FSM_FFd1)
-	OR (NOT iobs/Once AND iobs/PS_FSM_FFd2 AND NOT nADoutLE1)
 	OR (NOT iobs/Once AND iobs/PS_FSM_FFd1 AND NOT nADoutLE1)
 	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND NOT iobs/Once)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
-	NOT iobs/Once)
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT iobs/Once AND 
+	NOT cs/nOverlay1)
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20) AND NOT iobs/Once)
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND NOT iobs/Once)
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND NOT iobs/Once)
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND NOT iobs/Once)
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND NOT iobs/Once)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT iobs/Once AND nWE_FSB)
 	OR (nAS_FSB AND NOT fsb/ASrf)
 	OR (A_FSB(23) AND NOT iobs/Once AND iobs/PS_FSM_FFd2)
-	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND NOT iobs/Once)
 	OR (A_FSB(22) AND NOT iobs/Once AND iobs/PS_FSM_FFd2)
-	OR (A_FSB(22) AND NOT iobs/Once AND iobs/PS_FSM_FFd1));
+	OR (A_FSB(22) AND NOT iobs/Once AND iobs/PS_FSM_FFd1)
+	OR (NOT iobs/Once AND iobs/PS_FSM_FFd2 AND NOT nADoutLE1));
 
 FDCPE_iobs/PS_FSM_FFd1: FDCPE port map (iobs/PS_FSM_FFd1,iobs/PS_FSM_FFd1_D,CLK_FSB,'0','0');
 iobs/PS_FSM_FFd1_D <= ((iobs/PS_FSM_FFd2)
@@ -1281,17 +1319,19 @@ iobs/PS_FSM_FFd1_D <= ((iobs/PS_FSM_FFd2)
 FDCPE_iobs/PS_FSM_FFd2: FDCPE port map (iobs/PS_FSM_FFd2,iobs/PS_FSM_FFd2_D,CLK_FSB,'0','0');
 iobs/PS_FSM_FFd2_D <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND 
 	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20) AND 
 	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND 
 	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND 
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND 
 	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB AND 
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND 
 	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND 
 	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND 
+	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB AND 
+	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
+	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1) AND 
 	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
 	OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21) AND 
 	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
@@ -1303,10 +1343,10 @@ iobs/PS_FSM_FFd2_D <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND
 	NOT iobs/IOACTr)
 	OR (iobs/Once AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND 
 	nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
 	OR (nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND 
-	NOT fsb/ASrf AND nADoutLE1));
+	NOT fsb/ASrf AND nADoutLE1)
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
+	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1));
 
 
 nADoutLE0 <= (NOT ALE0M AND NOT ALE0S);
@@ -1315,14 +1355,16 @@ FDCPE_nADoutLE1: FDCPE port map (nADoutLE1,nADoutLE1_D,CLK_FSB,'0','0');
 nADoutLE1_D <= ((iobs/Load1)
 	OR (NOT iobs/Clear1 AND NOT nADoutLE1));
 
-FDCPE_nAS_IOB: FDCPE port map (nAS_IOB,nAS_IOB_D,NOT CLK2X_IOB,'0','0');
-nAS_IOB_D <= ((NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	NOT iobm/IOS_FSM_FFd2)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	iobm/IOS_FSM_FFd1));
+FDCPE_nAS_IOB: FDCPE port map (nAS_IOB_I,nAS_IOB,NOT CLK2X_IOB,'0','0');
+nAS_IOB <= ((NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2)
+	OR (iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2));
+nAS_IOB <= nAS_IOB_I when nAS_IOB_OE = '1' else 'Z';
+nAS_IOB_OE <= NOT nAoutOE;
 
-
-nAoutOE <= '0';
+FDCPE_nAoutOE: FDCPE port map (nAoutOE,nAoutOE_D,CLK2X_IOB,'0','0');
+nAoutOE_D <= ((NOT iobm/BGr0 AND NOT iobm/BGr1)
+	OR (NOT iobm/BGr1 AND nAoutOE)
+	OR (NOT nAS_IOB AND NOT iobm/BGr0 AND NOT nAoutOE));
 
 
 nBERR_FSB <= ((nAS_FSB)
@@ -1330,22 +1372,25 @@ nBERR_FSB <= ((nAS_FSB)
 	OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND 
 	NOT BERR_IOBS AND NOT fsb/BERR0r AND NOT fsb/BERR1r));
 
+FDCPE_nBR_IOB: FDCPE port map (nBR_IOB,'0',CLK_FSB,'0','0',nBR_IOB_CE);
+nBR_IOB_CE <= (RESr0 AND RESr1 AND IPL2r0 AND RESr2 AND NOT RESDone AND 
+	IPL2r1);
+
 FDCPE_nCAS: FDCPE port map (nCAS,NOT ram/RASEL,NOT CLK_FSB,'0','0');
 
 FDCPE_nDTACK_FSB: FDCPE port map (nDTACK_FSB,nDTACK_FSB_D,CLK_FSB,'0','0');
-nDTACK_FSB_D <= ((EXP18_.EXP)
+nDTACK_FSB_D <= ((EXP17_.EXP)
+	OR (nAS_FSB AND NOT fsb/ASrf)
 	OR (A_FSB(23) AND NOT fsb/Ready1r AND NOT iobs/IOReady AND 
 	nDTACK_FSB)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-	NOT fsb/Ready0r AND nDTACK_FSB AND NOT ram/RAMReady)
 	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT fsb/Ready1r AND 
 	NOT iobs/IOReady AND nDTACK_FSB)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT fsb/Ready0r AND nDTACK_FSB AND NOT ram/RAMReady)
+	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT fsb/Ready1r AND 
+	NOT iobs/IOReady AND NOT SW(1) AND nDTACK_FSB)
 	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
 	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
 	NOT fsb/Ready1r AND NOT iobs/IOReady AND nDTACK_FSB)
-	OR (EXP21_.EXP)
+	OR (EXP20_.EXP)
 	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
 	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
 	NOT fsb/Ready1r AND NOT iobs/IOReady AND nDTACK_FSB)
@@ -1370,31 +1415,30 @@ nDTACK_FSB_D <= ((EXP18_.EXP)
 	OR (BERR_IOBS AND nDTACK_FSB)
 	OR (fsb/BERR0r AND nDTACK_FSB)
 	OR (fsb/BERR1r AND nDTACK_FSB)
-	OR (nAS_FSB AND NOT fsb/ASrf)
-	OR (nDTACK_FSB AND NOT $OpTx$FX_DC$610));
+	OR (nDTACK_FSB AND NOT nBR_IOB)
+	OR (nDTACK_FSB AND $OpTx$$OpTx$FX_DC$182_INV$783));
 
 FDCPE_nDinLE: FDCPE port map (nDinLE,nDinLE_D,NOT CLK2X_IOB,'0','0');
-nDinLE_D <= ((iobm/IOS_FSM_FFd4 AND iobm/IOS_FSM_FFd1)
-	OR (NOT iobm/IOS_FSM_FFd4 AND iobm/IOS_FSM_FFd3));
+nDinLE_D <= (iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2);
 
 
 nDinOE <= ((A_FSB(23) AND nWE_FSB AND NOT nAS_FSB)
 	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND nWE_FSB AND 
-	NOT nAS_FSB));
+	NOT nAS_FSB)
+	OR (A_FSB(22) AND NOT A_FSB(21) AND nWE_FSB AND NOT nAS_FSB AND 
+	NOT SW(1)));
 
 FDCPE_nDoutOE: FDCPE port map (nDoutOE,nDoutOE_D,CLK2X_IOB,'0','0');
 nDoutOE_D <= ((NOT IORW0)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	NOT iobm/IOS_FSM_FFd2));
+	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2));
 
-FDCPE_nLDS_IOB: FDCPE port map (nLDS_IOB,nLDS_IOB_D,NOT CLK2X_IOB,'0','0');
-nLDS_IOB_D <= ((NOT IOL0)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	NOT iobm/IOS_FSM_FFd2)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	iobm/IOS_FSM_FFd1)
-	OR (IORW0 AND iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd2 AND 
+FDCPE_nLDS_IOB: FDCPE port map (nLDS_IOB_I,nLDS_IOB,NOT CLK2X_IOB,'0','0');
+nLDS_IOB <= ((IOL0 AND NOT iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2)
+	OR (IOL0 AND iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2)
+	OR (NOT IORW0 AND IOL0 AND iobm/IOS_FSM_FFd3 AND 
 	NOT iobm/IOS_FSM_FFd1));
+nLDS_IOB <= nLDS_IOB_I when nLDS_IOB_OE = '1' else 'Z';
+nLDS_IOB_OE <= NOT nAoutOE;
 
 
 nOE <= NOT ((nWE_FSB AND NOT nAS_FSB));
@@ -1415,27 +1459,31 @@ nRAS <= NOT (((RefAck)
 	NOT cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND NOT ram/RAMDIS1)));
 
 
-nROMCS <= NOT (((NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20))
-	OR (NOT A_FSB(23) AND NOT A_FSB(21) AND NOT A_FSB(20) AND 
+nROMCS <= NOT (((A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND 
+	NOT SW(1))
+	OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND 
+	SW(1))
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND 
 	NOT cs/nOverlay1)));
 
 
 nROMWE <= NOT ((NOT nWE_FSB AND NOT nAS_FSB));
 
-FDCPE_nUDS_IOB: FDCPE port map (nUDS_IOB,nUDS_IOB_D,NOT CLK2X_IOB,'0','0');
-nUDS_IOB_D <= ((NOT IOU0)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	NOT iobm/IOS_FSM_FFd2)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	iobm/IOS_FSM_FFd1)
-	OR (IORW0 AND iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd2 AND 
+FDCPE_nUDS_IOB: FDCPE port map (nUDS_IOB_I,nUDS_IOB,NOT CLK2X_IOB,'0','0');
+nUDS_IOB <= ((IOU0 AND NOT iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2)
+	OR (IOU0 AND iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2)
+	OR (NOT IORW0 AND IOU0 AND iobm/IOS_FSM_FFd3 AND 
 	NOT iobm/IOS_FSM_FFd1));
+nUDS_IOB <= nUDS_IOB_I when nUDS_IOB_OE = '1' else 'Z';
+nUDS_IOB_OE <= NOT nAoutOE;
 
-FTCPE_nVMA_IOB: FTCPE port map (nVMA_IOB,nVMA_IOB_T,CLK2X_IOB,'0','0');
+FTCPE_nVMA_IOB: FTCPE port map (nVMA_IOB_I,nVMA_IOB_T,CLK2X_IOB,'0','0');
 nVMA_IOB_T <= ((NOT nVMA_IOB AND NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND 
 	NOT iobm/ES(3) AND NOT iobm/ES(4))
 	OR (nVMA_IOB AND iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND 
 	NOT iobm/ES(3) AND NOT iobm/ES(4) AND IOACT AND iobm/VPArf AND iobm/VPArr));
+nVMA_IOB <= nVMA_IOB_I when nVMA_IOB_OE = '1' else 'Z';
+nVMA_IOB_OE <= NOT nAoutOE;
 
 
 nVPA_FSB <= NOT ((fsb/VPA AND NOT nAS_FSB));
@@ -1445,33 +1493,33 @@ ram/BACTr_D <= (nAS_FSB AND NOT fsb/ASrf);
 
 FTCPE_ram/Once: FTCPE port map (ram/Once,ram/Once_T,CLK_FSB,'0','0');
 ram/Once_T <= ((ram/Once AND nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
 	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
 	NOT ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
 	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/Once AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
+	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND 
+	NOT cs/nOverlay1 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
+	NOT ram/RS_FSM_FFd3)
+	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND 
+	NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
 	NOT ram/RS_FSM_FFd3 AND fsb/ASrf));
 
 FDCPE_ram/RAMDIS1: FDCPE port map (ram/RAMDIS1,ram/RAMDIS1_D,CLK_FSB,'0','0');
-ram/RAMDIS1_D <= ((ram/RAMDIS2.EXP)
+ram/RAMDIS1_D <= ((nOE_OBUF.EXP)
 	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND NOT nAS_FSB AND 
 	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
 	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND 
 	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
+	OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND 
 	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
+	OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND 
 	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
+	OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
 	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
 	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND 
 	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
-	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
+	OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
 	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
 	OR (ram/Once AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND 
 	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
@@ -1489,29 +1537,29 @@ ram/RAMDIS1_D <= ((ram/RAMDIS2.EXP)
 	NOT ram/BACTr AND fsb/ASrf));
 
 FTCPE_ram/RAMDIS2: FTCPE port map (ram/RAMDIS2,ram/RAMDIS2_T,CLK_FSB,'0','0');
-ram/RAMDIS2_T <= ((ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND 
-	ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND fsb/ASrf)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND ram/Once AND 
-	NOT cnt/RefDone AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND 
-	cnt/RefCnt(7))
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND ram/Once AND 
-	NOT cnt/RefDone AND NOT ram/RAMDIS2 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
-	fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND 
+ram/RAMDIS2_T <= ((NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND ram/Once AND 
+	NOT cnt/RefDone AND NOT cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND 
 	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
 	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND fsb/ASrf)
+	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND ram/Once AND 
+	NOT cnt/RefDone AND NOT cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT ram/RS_FSM_FFd2 AND 
+	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND 
+	cnt/RefCnt(7) AND fsb/ASrf)
 	OR (ram/RAMDIS2 AND nAS_FSB AND NOT fsb/ASrf)
 	OR (ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND 
 	ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7)));
+	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
+	OR (ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND 
+	ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND 
+	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND fsb/ASrf)
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND ram/Once AND NOT cnt/RefDone AND 
+	cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
+	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND 
+	cnt/RefCnt(7))
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND ram/Once AND NOT cnt/RefDone AND 
+	cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
+	NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
+	fsb/ASrf));
 
 FDCPE_ram/RAMReady: FDCPE port map (ram/RAMReady,ram/RAMReady_D,CLK_FSB,'0','0');
 ram/RAMReady_D <= ((ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3)
@@ -1522,33 +1570,33 @@ ram/RAMReady_D <= ((ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3)
 	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND 
 	NOT ram/BACTr AND fsb/ASrf)
 	OR (ram/RS_FSM_FFd2.EXP)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
 	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
 	NOT ram/RS_FSM_FFd1 AND fsb/ASrf)
-	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
+	OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND 
 	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
+	OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
 	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/Once AND NOT ram/RS_FSM_FFd1 AND fsb/ASrf)
-	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
+	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND 
+	NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd1 AND fsb/ASrf)
+	OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND 
 	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
+	OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
 	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (NOT A_FSB(21) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
+	OR (NOT A_FSB(21) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
 	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (NOT A_FSB(21) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
+	OR (NOT A_FSB(21) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
 	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/Once AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd1));
+	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND 
+	NOT cs/nOverlay1 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd1));
 
 FDCPE_ram/RASEL: FDCPE port map (ram/RASEL,ram/RASEL_D,CLK_FSB,'0','0');
-ram/RASEL_D <= ((A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
+ram/RASEL_D <= ((A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND 
 	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
+	OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
 	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
+	OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
 	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
 	OR (NOT cnt/RefDone AND nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
 	NOT ram/RS_FSM_FFd1 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
@@ -1556,16 +1604,16 @@ ram/RASEL_D <= ((A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND
 	OR (NOT cnt/RefDone AND nAS_FSB AND ram/RS_FSM_FFd1 AND 
 	ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
 	NOT fsb/ASrf)
-	OR (EXP38_.EXP)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
+	OR (EXP26_.EXP)
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
 	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
 	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND fsb/ASrf)
 	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND NOT nAS_FSB AND 
 	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
 	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND 
 	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
+	OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND 
 	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
 	OR (NOT ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3)
 	OR (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
@@ -1579,20 +1627,20 @@ ram/RASEL_D <= ((A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND
 
 FTCPE_ram/RS_FSM_FFd1: FTCPE port map (ram/RS_FSM_FFd1,ram/RS_FSM_FFd1_T,CLK_FSB,'0','0');
 ram/RS_FSM_FFd1_T <= ((ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
 	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
 	NOT ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
 	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/Once AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
+	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND 
+	NOT cs/nOverlay1 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
+	NOT ram/RS_FSM_FFd3)
+	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND 
+	NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
 	NOT ram/RS_FSM_FFd3 AND fsb/ASrf));
 
 FTCPE_ram/RS_FSM_FFd2: FTCPE port map (ram/RS_FSM_FFd2,ram/RS_FSM_FFd2_T,CLK_FSB,'0','0');
-ram/RS_FSM_FFd2_T <= ((ram/RS_FSM_FFd3.EXP)
+ram/RS_FSM_FFd2_T <= ((EXP28_.EXP)
 	OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
 	NOT cnt/RefCnt(5) AND ram/BACTr)
 	OR (nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
@@ -1611,7 +1659,22 @@ ram/RS_FSM_FFd2_T <= ((ram/RS_FSM_FFd3.EXP)
 	NOT cnt/RefCnt(7)));
 
 FTCPE_ram/RS_FSM_FFd3: FTCPE port map (ram/RS_FSM_FFd3,ram/RS_FSM_FFd3_T,CLK_FSB,'0','0');
-ram/RS_FSM_FFd3_T <= ((TimeoutA.EXP)
+ram/RS_FSM_FFd3_T <= ((A_FSB(22) AND NOT A_FSB(21) AND NOT ram/RS_FSM_FFd2 AND 
+	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
+	OR (A_FSB(22) AND cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND 
+	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
+	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND 
+	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
+	OR (nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
+	NOT ram/RS_FSM_FFd3 AND NOT fsb/ASrf)
+	OR (NOT cnt/RefDone AND NOT nAS_FSB AND ram/RS_FSM_FFd2 AND 
+	ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND 
+	cnt/RefCnt(7))
+	OR (NOT cnt/RefDone AND ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND 
+	ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
+	fsb/ASrf)
+	OR (A_FSB(23) AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
+	NOT ram/RS_FSM_FFd3)
 	OR (ram/Once AND cnt/RefDone AND NOT ram/RS_FSM_FFd2 AND 
 	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
 	OR (ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
@@ -1619,11 +1682,7 @@ ram/RS_FSM_FFd3_T <= ((TimeoutA.EXP)
 	OR (ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
 	NOT ram/RS_FSM_FFd3 AND NOT cnt/RefCnt(6))
 	OR (ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3 AND NOT cnt/RefCnt(7))
-	OR (nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3 AND NOT fsb/ASrf)
-	OR (A_FSB(23) AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3));
+	NOT ram/RS_FSM_FFd3 AND NOT cnt/RefCnt(7)));
 
 Register Legend:
  FDCPE (Q,D,C,CLR,PRE,CE); 
@@ -1677,10 +1736,10 @@ No. Name                           No. Name
   5 VCC                              55 RA<10>                        
   6 A_FSB<8>                         56 RA<9>                         
   7 A_FSB<9>                         57 VCC                           
-  8 A_FSB<10>                        58 KPR                           
-  9 A_FSB<11>                        59 KPR                           
- 10 A_FSB<12>                        60 KPR                           
- 11 A_FSB<13>                        61 KPR                           
+  8 A_FSB<10>                        58 CLK25EN                       
+  9 A_FSB<11>                        59 CLK20EN                       
+ 10 A_FSB<12>                        60 SW<1>                         
+ 11 A_FSB<13>                        61 SW<0>                         
  12 A_FSB<14>                        62 GND                           
  13 A_FSB<15>                        63 RA<11>                        
  14 A_FSB<16>                        64 nRAS                          
@@ -1691,8 +1750,8 @@ No. Name                           No. Name
  19 A_FSB<21>                        69 GND                           
  20 A_FSB<22>                        70 nBERR_FSB                     
  21 GND                              71 KPR                           
- 22 CLK2X_IOB                        72 KPR                           
- 23 CLK_IOB                          73 KPR                           
+ 22 CLK2X_IOB                        72 nBR_IOB                       
+ 23 CLK_IOB                          73 nBG_IOB                       
  24 A_FSB<23>                        74 nVMA_IOB                      
  25 E_IOB                            75 GND                           
  26 VCC                              76 nBERR_IOB                     
@@ -1711,7 +1770,7 @@ No. Name                           No. Name
  39 KPR                              89 nDoutOE                       
  40 RA<4>                            90 nDinOE                        
  41 RA<3>                            91 nRES                          
- 42 RA<5>                            92 KPR                           
+ 42 RA<5>                            92 nIPL2                         
  43 RA<2>                            93 nVPA_FSB                      
  44 GND                              94 A_FSB<1>                      
  45 TDI                              95 A_FSB<2>                      
diff --git a/cpld/XC95144XL/MXSE.svf b/cpld/XC95144XL/MXSE.svf
new file mode 100644
index 0000000..9966c9a
--- /dev/null
+++ b/cpld/XC95144XL/MXSE.svf
@@ -0,0 +1,5207 @@
+// Created using Xilinx Cse Software [ISE - 14.7]
+// Date: Sun Mar 27 10:20:02 2022
+
+TRST OFF;
+ENDIR IDLE;
+ENDDR IDLE;
+STATE RESET;
+STATE IDLE;
+FREQUENCY 1E6 HZ;
+//Operation: Erase -p 0 
+TIR 0 ;
+HIR 0 ;
+TDR 0 ;
+HDR 0 ;
+TIR 0 ;
+HIR 0 ;
+HDR 0 ;
+TDR 0 ;
+//Loading device with 'idcode' instruction.
+SIR 8 TDI (fe) SMASK (ff) ;
+SDR 32 TDI (00000000) SMASK (ffffffff) TDO (f9608093) MASK (0fffffff) ;
+//Check for Read/Write Protect.
+SIR 8 TDI (ff) TDO (01) MASK (e3) ;
+//Boundary Scan Chain Contents
+//Position 1: xc95144xl
+TIR 0 ;
+HIR 0 ;
+TDR 0 ;
+HDR 0 ;
+TIR 0 ;
+HIR 0 ;
+TDR 0 ;
+HDR 0 ;
+// Loading devices with 'ispen' or 'bypass'  instruction.
+SIR 8 TDI (e8) ;
+SDR 6 TDI (05) SMASK (3f) ;
+// Loading devices with 'fbulk' instruction.
+SIR 8 TDI (ed) ;
+SDR 18 TDI (03ffff) SMASK (03ffff) ;
+RUNTEST 200000 TCK;
+SDR 18 TDI (03fffd) TDO (000001) MASK (000003) ;
+// Loading devices with 'conld' or 'bypass' instruction.
+SIR 8 TDI (f0) ;
+RUNTEST 100 TCK;
+// Loading devices with 'conld' or 'bypass' instruction.
+SIR 8 TDI (f0) ;
+RUNTEST 100 TCK;
+TIR 0 ;
+HIR 0 ;
+TDR 0 ;
+HDR 0 ;
+SIR 8 TDI (ff) ;
+SDR 1 TDI (00) SMASK (01) ;
+//Operation: Program -p 0 -e -v 
+TIR 0 ;
+HIR 0 ;
+TDR 0 ;
+HDR 0 ;
+TIR 0 ;
+HIR 0 ;
+HDR 0 ;
+TDR 0 ;
+//Loading device with 'idcode' instruction.
+SIR 8 TDI (fe) ;
+SDR 32 TDI (00000000) SMASK (ffffffff) TDO (f9608093) MASK (0fffffff) ;
+//Check for Read/Write Protect.
+SIR 8 TDI (ff) TDO (01) MASK (e3) ;
+//Boundary Scan Chain Contents
+//Position 1: xc95144xl
+TIR 0 ;
+HIR 0 ;
+TDR 0 ;
+HDR 0 ;
+TIR 0 ;
+HIR 0 ;
+TDR 0 ;
+HDR 0 ;
+// Loading devices with 'ispen' or 'bypass'  instruction.
+SIR 8 TDI (e8) ;
+SDR 6 TDI (05) SMASK (3f) ;
+// Loading devices with 'fbulk' instruction.
+SIR 8 TDI (ed) ;
+SDR 18 TDI (03ffff) SMASK (03ffff) ;
+RUNTEST 200000 TCK;
+SDR 18 TDI (03fffd) TDO (000001) MASK (000003) ;
+// Loading devices with 'conld' or 'bypass' instruction.
+SIR 8 TDI (f0) ;
+RUNTEST 100 TCK;
+// Loading devices with 'ispen' or 'bypass'  instruction.
+SIR 8 TDI (e8) ;
+SDR 6 TDI (05) SMASK (3f) ;
+// Loading device with 'fpgm' instruction.
+SIR 8 TDI (ea) ;
+SDR 82 TDI (0000000000002000a00081) SMASK (03ffffffffffffffffffff) ;
+SDR 82 TDI (0000040008000000a40001) ;
+SDR 82 TDI (0000082008000000240001) ;
+SDR 82 TDI (00000c0000000000040001) ;
+SDR 82 TDI (0000104020000000000001) ;
+SDR 82 TDI (0000200000002800400001) ;
+SDR 82 TDI (0000241000000040500001) ;
+SDR 82 TDI (0000280820002040500001) ;
+SDR 82 TDI (00002c0000000000500001) ;
+SDR 82 TDI (0000308000000000500001) ;
+SDR 82 TDI (0000400000004000000001) ;
+SDR 82 TDI (0000440400000060800001) ;
+SDR 82 TDI (000048a000004040800001) ;
+SDR 82 TDI (00004c0000000000800001) ;
+SDR 82 TDI (0000500000000000800003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0000800000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0000800000000000000001) ;
+SDR 82 TDI (0000840000202000000001) ;
+SDR 82 TDI (0000888000000000000001) ;
+SDR 82 TDI (00008c0000800000000001) ;
+SDR 82 TDI (0000900000000000000001) ;
+SDR 82 TDI (0000a00000000000000001) ;
+SDR 82 TDI (0000a42000002000800001) ;
+SDR 82 TDI (0000a80000000000000001) ;
+SDR 82 TDI (0000ac0000002000200001) ;
+SDR 82 TDI (0000b00000000000000001) ;
+SDR 82 TDI (0000c00000000000000001) ;
+SDR 82 TDI (0000c40000804000000001) ;
+SDR 82 TDI (0000c80000800000000001) ;
+SDR 82 TDI (0000cc0000004000000001) ;
+SDR 82 TDI (0000d00000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0001000000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0001000000000000000001) ;
+SDR 82 TDI (0001040000000000000101) ;
+SDR 82 TDI (0001080000000000000101) ;
+SDR 82 TDI (00010c2000000000000101) ;
+SDR 82 TDI (0001100000000000000001) ;
+SDR 82 TDI (0001200000000000000001) ;
+SDR 82 TDI (0001240000000000000001) ;
+SDR 82 TDI (0001280000000004000001) ;
+SDR 82 TDI (00012c0800004000000001) ;
+SDR 82 TDI (0001300000000000000001) ;
+SDR 82 TDI (0001400000000000000001) ;
+SDR 82 TDI (0001440000000000000001) ;
+SDR 82 TDI (0001480000000000000001) ;
+SDR 82 TDI (00014ca000000000000001) ;
+SDR 82 TDI (0001500000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0001800000002000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0001800000002000000001) ;
+SDR 82 TDI (0001840000040000000001) ;
+SDR 82 TDI (0001880000000000000001) ;
+SDR 82 TDI (00018c0000000000000001) ;
+SDR 82 TDI (0001900000240000000001) ;
+SDR 82 TDI (0001a00000000004000001) ;
+SDR 82 TDI (0001a40000800000000001) ;
+SDR 82 TDI (0001a80000000000000001) ;
+SDR 82 TDI (0001ac0000000000000001) ;
+SDR 82 TDI (0001b00000000000000001) ;
+SDR 82 TDI (0001c00000000000000001) ;
+SDR 82 TDI (0001c40000000000000001) ;
+SDR 82 TDI (0001c80000000000000001) ;
+SDR 82 TDI (0001cc0000000000000001) ;
+SDR 82 TDI (0001d00000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0002000080000040000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0002000080000040000001) ;
+SDR 82 TDI (0002040080000040000001) ;
+SDR 82 TDI (000208c040000000000001) ;
+SDR 82 TDI (00020c0400000000000001) ;
+SDR 82 TDI (0002100000000000000001) ;
+SDR 82 TDI (0002201000000000000001) ;
+SDR 82 TDI (0002242000000000000081) ;
+SDR 82 TDI (0002280000000000000001) ;
+SDR 82 TDI (00022c0000000000000001) ;
+SDR 82 TDI (0002300000000000000001) ;
+SDR 82 TDI (0002400400000000000001) ;
+SDR 82 TDI (0002440004000008000001) ;
+SDR 82 TDI (0002480004000008000001) ;
+SDR 82 TDI (00024c0000000000040001) ;
+SDR 82 TDI (0002500000000000040003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0002802000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0002802000000000000001) ;
+SDR 82 TDI (0002842000040800000001) ;
+SDR 82 TDI (0002880000000800000001) ;
+SDR 82 TDI (00028c2000000800000001) ;
+SDR 82 TDI (0002906400240c00000001) ;
+SDR 82 TDI (0002a08800000000000081) ;
+SDR 82 TDI (0002a49840800800000001) ;
+SDR 82 TDI (0002a89040008800000001) ;
+SDR 82 TDI (0002ac9800008400000001) ;
+SDR 82 TDI (0002b01880008400000001) ;
+SDR 82 TDI (0002c04000001400000001) ;
+SDR 82 TDI (0002c46400000800000001) ;
+SDR 82 TDI (0002c8c400001800040001) ;
+SDR 82 TDI (0002ccac40001800000001) ;
+SDR 82 TDI (0002d0e400001000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0003001008048800040100) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0003001008048800040101) ;
+SDR 82 TDI (0003040080000000000001) ;
+SDR 82 TDI (0003080080004000000301) ;
+SDR 82 TDI (00030c0080000000000101) ;
+SDR 82 TDI (0003100000400000000101) ;
+SDR 82 TDI (0003200000040000140101) ;
+SDR 82 TDI (0003240000000080000201) ;
+SDR 82 TDI (0003280000040080000001) ;
+SDR 82 TDI (00032c0000100480000001) ;
+SDR 82 TDI (0003300000000400000001) ;
+SDR 82 TDI (0003400804000000080001) ;
+SDR 82 TDI (0003440000080080000001) ;
+SDR 82 TDI (0003480800080080000001) ;
+SDR 82 TDI (00034c0840000080000001) ;
+SDR 82 TDI (0003500020001000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0003800000080000000140) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0003800000080000000141) ;
+SDR 82 TDI (0003840000001000000101) ;
+SDR 82 TDI (0003880010008800000001) ;
+SDR 82 TDI (00038c0004001480000301) ;
+SDR 82 TDI (0003900010008800000101) ;
+SDR 82 TDI (0003a00000000410000001) ;
+SDR 82 TDI (0003a40000108000000101) ;
+SDR 82 TDI (0003a80040100c00000101) ;
+SDR 82 TDI (0003ac0000000000000001) ;
+SDR 82 TDI (0003b00004001000000001) ;
+SDR 82 TDI (0003c00040000000000001) ;
+SDR 82 TDI (0003c40080009000000001) ;
+SDR 82 TDI (0003c800c4000000000001) ;
+SDR 82 TDI (0003cc0080008000000081) ;
+SDR 82 TDI (0003d00080000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0004000000040000500020) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0004000000040000500021) ;
+SDR 82 TDI (0004040000400000500001) ;
+SDR 82 TDI (0004084000000040d00001) ;
+SDR 82 TDI (00040c4400000000e00001) ;
+SDR 82 TDI (0004100800000000e00001) ;
+SDR 82 TDI (0004201000040000280005) ;
+SDR 82 TDI (0004240000080000280001) ;
+SDR 82 TDI (0004280000000000280001) ;
+SDR 82 TDI (00042c0000000000080001) ;
+SDR 82 TDI (0004300000000000000001) ;
+SDR 82 TDI (0004400420000000000005) ;
+SDR 82 TDI (0004448000080000080001) ;
+SDR 82 TDI (0004480800080000080001) ;
+SDR 82 TDI (00044c0000000000080001) ;
+SDR 82 TDI (0004501000000000080003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0004800000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0004800000000000000001) ;
+SDR 82 TDI (0004840000080000000001) ;
+SDR 82 TDI (0004888000080000000001) ;
+SDR 82 TDI (00048c0000400000000001) ;
+SDR 82 TDI (0004902000000000000001) ;
+SDR 82 TDI (0004a00040080000000001) ;
+SDR 82 TDI (0004a42000100000000001) ;
+SDR 82 TDI (0004a84000140000000001) ;
+SDR 82 TDI (0004ac4000100000000001) ;
+SDR 82 TDI (0004b00800000000000001) ;
+SDR 82 TDI (0004c00000000400000001) ;
+SDR 82 TDI (0004c40000000000000001) ;
+SDR 82 TDI (0004c80000000000000001) ;
+SDR 82 TDI (0004cc0800000000000001) ;
+SDR 82 TDI (0004d0a000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0005000000440000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0005000000440000000001) ;
+SDR 82 TDI (0005040000000000000001) ;
+SDR 82 TDI (0005080000000000000001) ;
+SDR 82 TDI (00050c0000000000080001) ;
+SDR 82 TDI (0005100000000000000001) ;
+SDR 82 TDI (0005200000040000000001) ;
+SDR 82 TDI (0005240000080080000001) ;
+SDR 82 TDI (0005280000000080000001) ;
+SDR 82 TDI (00052c0000000080000001) ;
+SDR 82 TDI (0005300000000000000001) ;
+SDR 82 TDI (0005400000000000000001) ;
+SDR 82 TDI (0005440004080080000001) ;
+SDR 82 TDI (0005480004080080000001) ;
+SDR 82 TDI (00054c0000000080000001) ;
+SDR 82 TDI (0005500000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0005800000000000f00000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0005800000000000f00001) ;
+SDR 82 TDI (0005840000080000f00001) ;
+SDR 82 TDI (0005880000080000f00001) ;
+SDR 82 TDI (00058c0000400000e00001) ;
+SDR 82 TDI (0005900000000000e00001) ;
+SDR 82 TDI (0005a00000080000280001) ;
+SDR 82 TDI (0005a40000100010a80001) ;
+SDR 82 TDI (0005a80000140000a80001) ;
+SDR 82 TDI (0005ac0000100000680001) ;
+SDR 82 TDI (0005b00000000000700001) ;
+SDR 82 TDI (0005c00000080400000001) ;
+SDR 82 TDI (0005c40000000000880001) ;
+SDR 82 TDI (0005c80000000000880001) ;
+SDR 82 TDI (0005cc0000000000880001) ;
+SDR 82 TDI (0005d00000000000880003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0006000303010301120310) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0006000303010301120311) ;
+SDR 82 TDI (0006050203020300420301) ;
+SDR 82 TDI (00060a0303010301520301) ;
+SDR 82 TDI (00060d0303030300020301) ;
+SDR 82 TDI (0006120303010301c20301) ;
+SDR 82 TDI (0006210103030302030301) ;
+SDR 82 TDI (0006260103020300230301) ;
+SDR 82 TDI (00062803030103022b0301) ;
+SDR 82 TDI (00062f0103000303090301) ;
+SDR 82 TDI (0006300000000000000001) ;
+SDR 82 TDI (0006400000000020000001) ;
+SDR 82 TDI (0006440004000000000001) ;
+SDR 82 TDI (0006480004000000000001) ;
+SDR 82 TDI (00064c4000000000080001) ;
+SDR 82 TDI (0006500000000000080003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0006830000020002400000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0006830000020002400001) ;
+SDR 82 TDI (0006860100010003100001) ;
+SDR 82 TDI (0006890000020000800001) ;
+SDR 82 TDI (00068e0000000003e00001) ;
+SDR 82 TDI (0006910000020002200001) ;
+SDR 82 TDI (0006a20200000001280001) ;
+SDR 82 TDI (0006a50200010003880001) ;
+SDR 82 TDI (0006ab0000060001800001) ;
+SDR 82 TDI (0006ac0200030000200001) ;
+SDR 82 TDI (0006b00000000000200001) ;
+SDR 82 TDI (0006c00000000400000001) ;
+SDR 82 TDI (0006c40000000000080001) ;
+SDR 82 TDI (0006c80000000000080001) ;
+SDR 82 TDI (0006cc0000000000000001) ;
+SDR 82 TDI (0006d00000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0007000302010001004040) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0007000302010001004041) ;
+SDR 82 TDI (0007040203020100000001) ;
+SDR 82 TDI (0007080103000201000001) ;
+SDR 82 TDI (00070d0303034200000001) ;
+SDR 82 TDI (0007120103000301000001) ;
+SDR 82 TDI (0007200101020302000001) ;
+SDR 82 TDI (0007260103020200040001) ;
+SDR 82 TDI (0007280301010300000201) ;
+SDR 82 TDI (00072f0003000301000201) ;
+SDR 82 TDI (0007300000000000000001) ;
+SDR 82 TDI (0007400000000000802001) ;
+SDR 82 TDI (0007440000000000000001) ;
+SDR 82 TDI (0007480000000000000001) ;
+SDR 82 TDI (00074c0000000000000081) ;
+SDR 82 TDI (0007500000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0007830001020002000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0007830001020002000001) ;
+SDR 82 TDI (0007870103010003000001) ;
+SDR 82 TDI (00078b0202030000000001) ;
+SDR 82 TDI (00078e1000000003000001) ;
+SDR 82 TDI (0007910200030002000001) ;
+SDR 82 TDI (0007a30202010001000001) ;
+SDR 82 TDI (0007a40208010003000001) ;
+SDR 82 TDI (0007ab0002060003000001) ;
+SDR 82 TDI (0007ac0301030002000001) ;
+SDR 82 TDI (0007b00000000000000001) ;
+SDR 82 TDI (0007c00000000000000001) ;
+SDR 82 TDI (0007c40000000000000001) ;
+SDR 82 TDI (0007c80000000000000001) ;
+SDR 82 TDI (0007cc4000000000000001) ;
+SDR 82 TDI (0007d00000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0008000306010041000008) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0008000306010041000009) ;
+SDR 82 TDI (0008040017000100000001) ;
+SDR 82 TDI (0008080107800001000001) ;
+SDR 82 TDI (00080d1313030200000001) ;
+SDR 82 TDI (0008120085000201000001) ;
+SDR 82 TDI (0008200001000322000001) ;
+SDR 82 TDI (0008260143020040000001) ;
+SDR 82 TDI (0008280301010280000001) ;
+SDR 82 TDI (00082f0007000201000001) ;
+SDR 82 TDI (0008300000000000000001) ;
+SDR 82 TDI (0008400080000008000001) ;
+SDR 82 TDI (0008440044000048000001) ;
+SDR 82 TDI (0008480000000088000001) ;
+SDR 82 TDI (00084c0000000000000001) ;
+SDR 82 TDI (0008500000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0008830009000002300004) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0008830009000002300005) ;
+SDR 82 TDI (0008850380030003300001) ;
+SDR 82 TDI (00088b0280130000300001) ;
+SDR 82 TDI (00088e0080000223200001) ;
+SDR 82 TDI (0008910200030002200001) ;
+SDR 82 TDI (0008a302000300c1200041) ;
+SDR 82 TDI (0008a40200010003300001) ;
+SDR 82 TDI (0008ab0000020003300001) ;
+SDR 82 TDI (0008ac0300030002100001) ;
+SDR 82 TDI (0008b00000000000100001) ;
+SDR 82 TDI (0008c000040000d0101001) ;
+SDR 82 TDI (0008c40000000000100001) ;
+SDR 82 TDI (0008c80000040000100001) ;
+SDR 82 TDI (0008cc4040004000100001) ;
+SDR 82 TDI (0008d00020000000100003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0009000302010201000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0009000302010201000001) ;
+SDR 82 TDI (0009040006000000000001) ;
+SDR 82 TDI (000908000c080001000001) ;
+SDR 82 TDI (00090d1216038000000001) ;
+SDR 82 TDI (000912001400d001000001) ;
+SDR 82 TDI (0009220000008002000201) ;
+SDR 82 TDI (0009250102028e08800201) ;
+SDR 82 TDI (0009280321110e00800001) ;
+SDR 82 TDI (00092f0003000201200201) ;
+SDR 82 TDI (0009300010008000200001) ;
+SDR 82 TDI (0009400000000000000001) ;
+SDR 82 TDI (0009440040001000000001) ;
+SDR 82 TDI (0009480050080000000001) ;
+SDR 82 TDI (00094c00a0000c00000001) ;
+SDR 82 TDI (0009500080000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0009830005080202000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0009830005080202000001) ;
+SDR 82 TDI (0009850118038003000001) ;
+SDR 82 TDI (00098b0310439000000001) ;
+SDR 82 TDI (00098e0000001803000001) ;
+SDR 82 TDI (00099100a0020802000001) ;
+SDR 82 TDI (0009a30200130401000201) ;
+SDR 82 TDI (0009a50200010202000281) ;
+SDR 82 TDI (0009ab00000a0001000001) ;
+SDR 82 TDI (0009ac0210038002000201) ;
+SDR 82 TDI (0009b00000004000000001) ;
+SDR 82 TDI (0009c000c0088000000001) ;
+SDR 82 TDI (0009c40090008000000001) ;
+SDR 82 TDI (0009c800a0000800000001) ;
+SDR 82 TDI (0009cc4000000000000001) ;
+SDR 82 TDI (0009d00000008000500003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (000a000302090000100000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (000a000302090000100001) ;
+SDR 82 TDI (000a040000000000400001) ;
+SDR 82 TDI (000a080000400001500001) ;
+SDR 82 TDI (000a0d0202030000000001) ;
+SDR 82 TDI (000a120000000000c00001) ;
+SDR 82 TDI (000a200000100002000001) ;
+SDR 82 TDI (000a240102020000200001) ;
+SDR 82 TDI (000a280100090000280001) ;
+SDR 82 TDI (000a2f0002000001080001) ;
+SDR 82 TDI (000a300000000000000001) ;
+SDR 82 TDI (000a400000080000000001) ;
+SDR 82 TDI (000a440000000000000001) ;
+SDR 82 TDI (000a480000000000000001) ;
+SDR 82 TDI (000a4c0000000000080001) ;
+SDR 82 TDI (000a500000000000080003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (000a830001000003400000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (000a830001000003400001) ;
+SDR 82 TDI (000a850100090003100001) ;
+SDR 82 TDI (000a8b0300020000800001) ;
+SDR 82 TDI (000a8e0000000003e00001) ;
+SDR 82 TDI (000a910000020003200001) ;
+SDR 82 TDI (000aa20000000001280001) ;
+SDR 82 TDI (000aa40200110002880001) ;
+SDR 82 TDI (000aab0200020001800001) ;
+SDR 82 TDI (000aac0200032002200001) ;
+SDR 82 TDI (000ab00000000000200001) ;
+SDR 82 TDI (000ac00000000000000001) ;
+SDR 82 TDI (000ac40000080000080001) ;
+SDR 82 TDI (000ac80000000000080001) ;
+SDR 82 TDI (000acc4000000000000001) ;
+SDR 82 TDI (000ad00000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (000b000104001001001100) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (000b000104001001001101) ;
+SDR 82 TDI (000b040006011a00000001) ;
+SDR 82 TDI (000b080004001e01000001) ;
+SDR 82 TDI (000b0d0306021c00000001) ;
+SDR 82 TDI (000b130003001c01000001) ;
+SDR 82 TDI (000b210001010400001001) ;
+SDR 82 TDI (000b270042000c00000001) ;
+SDR 82 TDI (000b290240008c06000001) ;
+SDR 82 TDI (000b2f0005009500020001) ;
+SDR 82 TDI (000b300084009400000001) ;
+SDR 82 TDI (000b400000001000000001) ;
+SDR 82 TDI (000b440000001800000001) ;
+SDR 82 TDI (000b480080009800000001) ;
+SDR 82 TDI (000b4c00c0009800000001) ;
+SDR 82 TDI (000b500000009000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (000b800100010001000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (000b800100010001000001) ;
+SDR 82 TDI (000b840040000000000001) ;
+SDR 82 TDI (000b8a0000020001000001) ;
+SDR 82 TDI (000b8d0200260000000001) ;
+SDR 82 TDI (000b920000000000000001) ;
+SDR 82 TDI (000ba00000000002000001) ;
+SDR 82 TDI (000ba40082000000000001) ;
+SDR 82 TDI (000ba90200010000000001) ;
+SDR 82 TDI (000baf0000000001000001) ;
+SDR 82 TDI (000bb00000000000000001) ;
+SDR 82 TDI (000bc00000000000000001) ;
+SDR 82 TDI (000bc40000400000000001) ;
+SDR 82 TDI (000bc80000000000000001) ;
+SDR 82 TDI (000bcc4000000000000001) ;
+SDR 82 TDI (000bd00000800000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (000c001300010040000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (000c001300010040000001) ;
+SDR 82 TDI (000c040100018440000001) ;
+SDR 82 TDI (000c080000008001000001) ;
+SDR 82 TDI (000c0d0200038800000001) ;
+SDR 82 TDI (000c130000028801000001) ;
+SDR 82 TDI (000c200000000002000001) ;
+SDR 82 TDI (000c240002000800000001) ;
+SDR 82 TDI (000c280100011800000001) ;
+SDR 82 TDI (000c2f0002010001000001) ;
+SDR 82 TDI (000c300000000000000001) ;
+SDR 82 TDI (000c400000400000000001) ;
+SDR 82 TDI (000c440000000000000001) ;
+SDR 82 TDI (000c480000000000000001) ;
+SDR 82 TDI (000c4c0000000000000001) ;
+SDR 82 TDI (000c500000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (000c830001020422000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (000c830001020422000001) ;
+SDR 82 TDI (000c850300010802000001) ;
+SDR 82 TDI (000c880100010800000001) ;
+SDR 82 TDI (000c8c0000000001000081) ;
+SDR 82 TDI (000c910200030001000001) ;
+SDR 82 TDI (000ca30000020001000001) ;
+SDR 82 TDI (000ca40000001002000001) ;
+SDR 82 TDI (000ca80002000002000001) ;
+SDR 82 TDI (000cac0100010000000001) ;
+SDR 82 TDI (000cb00000000400000001) ;
+SDR 82 TDI (000cc00000000000000001) ;
+SDR 82 TDI (000cc40008000000000001) ;
+SDR 82 TDI (000cc80000000000000001) ;
+SDR 82 TDI (000ccc0000001000000041) ;
+SDR 82 TDI (000cd00000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (000d000703010301c20300) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (000d000703010301c20301) ;
+SDR 82 TDI (000d054703034300c20301) ;
+SDR 82 TDI (000d0a0303030301c20301) ;
+SDR 82 TDI (000d0d0303030300c20301) ;
+SDR 82 TDI (000d130303030301c20301) ;
+SDR 82 TDI (000d230103030306430301) ;
+SDR 82 TDI (000d270103020304c30301) ;
+SDR 82 TDI (000d290303010302c30301) ;
+SDR 82 TDI (000d2f0103010303430301) ;
+SDR 82 TDI (000d304000000000400001) ;
+SDR 82 TDI (000d400000000000400001) ;
+SDR 82 TDI (000d440000000000400081) ;
+SDR 82 TDI (000d480000000000400001) ;
+SDR 82 TDI (000d4c0000000000400001) ;
+SDR 82 TDI (000d500000000000400003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (000d802000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (000d802000000000000001) ;
+SDR 82 TDI (000d842000000000000001) ;
+SDR 82 TDI (000d882c00000000000001) ;
+SDR 82 TDI (000d8c2c00000000000001) ;
+SDR 82 TDI (000d902c00000000000001) ;
+SDR 82 TDI (000da09800000000000001) ;
+SDR 82 TDI (000da49800000000000001) ;
+SDR 82 TDI (000da89800000000000001) ;
+SDR 82 TDI (000dac9c00000000000001) ;
+SDR 82 TDI (000db09c00000000000001) ;
+SDR 82 TDI (000dc08400000000000081) ;
+SDR 82 TDI (000dc48404000000000001) ;
+SDR 82 TDI (000dc89404000000000001) ;
+SDR 82 TDI (000dcc9400000000000001) ;
+SDR 82 TDI (000dd09400000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (000e002000000040000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (000e002000000040000001) ;
+SDR 82 TDI (000e042018000040000001) ;
+SDR 82 TDI (000e08e018000000000001) ;
+SDR 82 TDI (000e0c6410000000000001) ;
+SDR 82 TDI (000e106cb4000000000001) ;
+SDR 82 TDI (000e209800000000000001) ;
+SDR 82 TDI (000e24b800000000000001) ;
+SDR 82 TDI (000e289820000000000001) ;
+SDR 82 TDI (000e2c9800000000000001) ;
+SDR 82 TDI (000e309800000000000001) ;
+SDR 82 TDI (000e4044c0000000000001) ;
+SDR 82 TDI (000e44e4d0000000000001) ;
+SDR 82 TDI (000e48ec50000000000001) ;
+SDR 82 TDI (000e4cac00000000000001) ;
+SDR 82 TDI (000e50f480000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (000e804060000000c00000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (000e804060000000c00001) ;
+SDR 82 TDI (000e840000000000c00001) ;
+SDR 82 TDI (000e880000000000c00001) ;
+SDR 82 TDI (000e8c0000000000c00001) ;
+SDR 82 TDI (000e900000000000c00001) ;
+SDR 82 TDI (000ea00010000000400001) ;
+SDR 82 TDI (000ea44000000000400001) ;
+SDR 82 TDI (000ea80000000000400001) ;
+SDR 82 TDI (000eac0004000000400001) ;
+SDR 82 TDI (000eb00004000000400001) ;
+SDR 82 TDI (000ec00000000008400001) ;
+SDR 82 TDI (000ec40000004000400081) ;
+SDR 82 TDI (000ec80000000000400001) ;
+SDR 82 TDI (000ecc0000000000400001) ;
+SDR 82 TDI (000ed00000000000400003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (000f000000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (000f000000000000000001) ;
+SDR 82 TDI (000f050300038300000001) ;
+SDR 82 TDI (000f0a0200028000000001) ;
+SDR 82 TDI (000f0c0000008000000001) ;
+SDR 82 TDI (000f110302038100000001) ;
+SDR 82 TDI (000f230102038100000001) ;
+SDR 82 TDI (000f240000008000800001) ;
+SDR 82 TDI (000f290102000002800001) ;
+SDR 82 TDI (000f2c0100010001200001) ;
+SDR 82 TDI (000f300000000000200001) ;
+SDR 82 TDI (000f400000008000000001) ;
+SDR 82 TDI (000f440000008000000001) ;
+SDR 82 TDI (000f480000000000000001) ;
+SDR 82 TDI (000f4c0000000000000001) ;
+SDR 82 TDI (000f500000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (000f800000008000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (000f800000008000000001) ;
+SDR 82 TDI (000f840000000880000001) ;
+SDR 82 TDI (000f880000240800000001) ;
+SDR 82 TDI (000f8c0000000800000001) ;
+SDR 82 TDI (000f900000800800000001) ;
+SDR 82 TDI (000fa00000000000000001) ;
+SDR 82 TDI (000fa40000000800000001) ;
+SDR 82 TDI (000fa80000000800000001) ;
+SDR 82 TDI (000fac0000000000000001) ;
+SDR 82 TDI (000fb00000000000000001) ;
+SDR 82 TDI (000fc00000000000000801) ;
+SDR 82 TDI (000fc40000000000500001) ;
+SDR 82 TDI (000fc80000001000000001) ;
+SDR 82 TDI (000fcc0000800000000001) ;
+SDR 82 TDI (000fd00000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0010000200200400000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0010000200200400000001) ;
+SDR 82 TDI (0010050300138200000001) ;
+SDR 82 TDI (00100a0200128400000001) ;
+SDR 82 TDI (00100c2000008c00000001) ;
+SDR 82 TDI (0010110300028c00000201) ;
+SDR 82 TDI (0010210102038500000001) ;
+SDR 82 TDI (0010240000008c00000001) ;
+SDR 82 TDI (0010290100009c82000001) ;
+SDR 82 TDI (00102c0900218480000001) ;
+SDR 82 TDI (0010300000008000080001) ;
+SDR 82 TDI (0010400000808000000001) ;
+SDR 82 TDI (0010440000048000000001) ;
+SDR 82 TDI (0010480000048000000001) ;
+SDR 82 TDI (00104ca000108000000001) ;
+SDR 82 TDI (0010500000008000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0010800100810301700310) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0010800100810301700311) ;
+SDR 82 TDI (0010840000240c00d00201) ;
+SDR 82 TDI (0010880100250b01f00201) ;
+SDR 82 TDI (00108d0300a70300e00301) ;
+SDR 82 TDI (0010920002a50201e00101) ;
+SDR 82 TDI (0010a20000a01282292301) ;
+SDR 82 TDI (0010a70100820380a80301) ;
+SDR 82 TDI (0010a80200010300a80101) ;
+SDR 82 TDI (0010af00000003032a0301) ;
+SDR 82 TDI (0010b00000000000600001) ;
+SDR 82 TDI (0010c00000340000000001) ;
+SDR 82 TDI (0010c40000c00000080001) ;
+SDR 82 TDI (0010c80000800000880001) ;
+SDR 82 TDI (0010cc0000801000080001) ;
+SDR 82 TDI (0010d00000800000880003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0011000003000000020000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0011000003000000020001) ;
+SDR 82 TDI (0011040403000100000101) ;
+SDR 82 TDI (0011080003000000020101) ;
+SDR 82 TDI (00110c0003000000020001) ;
+SDR 82 TDI (0011100401000100020001) ;
+SDR 82 TDI (0011200001000000020001) ;
+SDR 82 TDI (0011240003000000030001) ;
+SDR 82 TDI (0011280003000080030201) ;
+SDR 82 TDI (00112c0003000080010001) ;
+SDR 82 TDI (0011300000000000000001) ;
+SDR 82 TDI (0011408000000000000001) ;
+SDR 82 TDI (0011440004000080000001) ;
+SDR 82 TDI (0011480004000000000001) ;
+SDR 82 TDI (00114c0000000000000001) ;
+SDR 82 TDI (0011500000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0011800400000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0011800400000000000001) ;
+SDR 82 TDI (0011840002000000020001) ;
+SDR 82 TDI (0011880002000000000101) ;
+SDR 82 TDI (00118c0000000000020101) ;
+SDR 82 TDI (0011900000010000000001) ;
+SDR 82 TDI (0011a00000200000000001) ;
+SDR 82 TDI (0011a40000000080000001) ;
+SDR 82 TDI (0011a80002200000030001) ;
+SDR 82 TDI (0011ac0001200000010001) ;
+SDR 82 TDI (0011b00400000000000001) ;
+SDR 82 TDI (0011c00000000400000001) ;
+SDR 82 TDI (0011c40000000000000001) ;
+SDR 82 TDI (0011c80000000080000001) ;
+SDR 82 TDI (0011cc0000000080000001) ;
+SDR 82 TDI (0011d00000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0012000000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0012000000000000000001) ;
+SDR 82 TDI (0012040000000000000001) ;
+SDR 82 TDI (0012080000000000000001) ;
+SDR 82 TDI (00120c0000000000000001) ;
+SDR 82 TDI (0012100000000000000001) ;
+SDR 82 TDI (0012200000000000000001) ;
+SDR 82 TDI (0012240000000040000001) ;
+SDR 82 TDI (0012280000000040000001) ;
+SDR 82 TDI (00122c0000000000000001) ;
+SDR 82 TDI (0012300000000000000001) ;
+SDR 82 TDI (0012400000000000000001) ;
+SDR 82 TDI (0012440004000060000001) ;
+SDR 82 TDI (0012480004000040000001) ;
+SDR 82 TDI (00124c0000000000000001) ;
+SDR 82 TDI (0012500000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0012800000000204000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0012800000000204000001) ;
+SDR 82 TDI (0012840000000000000001) ;
+SDR 82 TDI (0012880000000000000001) ;
+SDR 82 TDI (00128c0000000000000001) ;
+SDR 82 TDI (0012900000000000000001) ;
+SDR 82 TDI (0012a20000000000000201) ;
+SDR 82 TDI (0012a50000000200000201) ;
+SDR 82 TDI (0012a80000000000000001) ;
+SDR 82 TDI (0012ac0000000000000201) ;
+SDR 82 TDI (0012b00000000000000001) ;
+SDR 82 TDI (0012c00000000004000001) ;
+SDR 82 TDI (0012c40000000000000001) ;
+SDR 82 TDI (0012c80000000000000001) ;
+SDR 82 TDI (0012cc0000000000000001) ;
+SDR 82 TDI (0012d00000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0013000000000040000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0013000000000040000001) ;
+SDR 82 TDI (0013040000000040000001) ;
+SDR 82 TDI (0013080000000000000001) ;
+SDR 82 TDI (00130c0000000000000001) ;
+SDR 82 TDI (0013100000000000080001) ;
+SDR 82 TDI (0013200000000000000001) ;
+SDR 82 TDI (0013240000000000000001) ;
+SDR 82 TDI (0013280000004000000001) ;
+SDR 82 TDI (00132c0000000000000001) ;
+SDR 82 TDI (0013300000000000040001) ;
+SDR 82 TDI (0013400000000000000001) ;
+SDR 82 TDI (0013440000002400000001) ;
+SDR 82 TDI (0013480000000400000001) ;
+SDR 82 TDI (00134c0000000400000001) ;
+SDR 82 TDI (0013500000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0013800002000100f00000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0013800002000100f00001) ;
+SDR 82 TDI (0013840001000000f00001) ;
+SDR 82 TDI (0013880100010101f40001) ;
+SDR 82 TDI (00138c0201010300e00001) ;
+SDR 82 TDI (0013900000000200e00101) ;
+SDR 82 TDI (0013a00001000200280101) ;
+SDR 82 TDI (0013a40100020100e80001) ;
+SDR 82 TDI (0013a80201000200b80001) ;
+SDR 82 TDI (0013ae00020002006a0001) ;
+SDR 82 TDI (0013b00000000000700001) ;
+SDR 82 TDI (0013c00000000000000001) ;
+SDR 82 TDI (0013c40000000008880001) ;
+SDR 82 TDI (0013c80000000000880001) ;
+SDR 82 TDI (0013cc0000000000880001) ;
+SDR 82 TDI (0013d00004000000880003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0014000000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0014000000000000000001) ;
+SDR 82 TDI (0014040000000000000001) ;
+SDR 82 TDI (0014080080000000000001) ;
+SDR 82 TDI (00140c0040000000000001) ;
+SDR 82 TDI (0014100000000000000001) ;
+SDR 82 TDI (0014200000000000000001) ;
+SDR 82 TDI (0014240000000000000001) ;
+SDR 82 TDI (0014280080000000000001) ;
+SDR 82 TDI (00142c0000000000000001) ;
+SDR 82 TDI (0014300000000000000001) ;
+SDR 82 TDI (0014400000000000000001) ;
+SDR 82 TDI (0014440004000000000001) ;
+SDR 82 TDI (0014480004000000000001) ;
+SDR 82 TDI (00144c0000000000000001) ;
+SDR 82 TDI (0014500000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0014800000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0014800000000000000001) ;
+SDR 82 TDI (0014840000000800000001) ;
+SDR 82 TDI (0014880000000800000001) ;
+SDR 82 TDI (00148c0000000800000001) ;
+SDR 82 TDI (0014900000000c00000001) ;
+SDR 82 TDI (0014a00000000000000001) ;
+SDR 82 TDI (0014a40040000800000001) ;
+SDR 82 TDI (0014a80040008800000001) ;
+SDR 82 TDI (0014ac0000008400000001) ;
+SDR 82 TDI (0014b00080008400000001) ;
+SDR 82 TDI (0014c00000001400000001) ;
+SDR 82 TDI (0014c40000000800000001) ;
+SDR 82 TDI (0014c80000001800000001) ;
+SDR 82 TDI (0014cc0040001800000001) ;
+SDR 82 TDI (0014d00000001000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0015000000000000080000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0015000000000000080001) ;
+SDR 82 TDI (0015040000000100000001) ;
+SDR 82 TDI (0015080000000000000001) ;
+SDR 82 TDI (00150c0000000000000001) ;
+SDR 82 TDI (0015100002000000000001) ;
+SDR 82 TDI (0015228000000008000001) ;
+SDR 82 TDI (0015240000000000000001) ;
+SDR 82 TDI (0015281000000000000001) ;
+SDR 82 TDI (00152c0000200000000001) ;
+SDR 82 TDI (0015300000000000000001) ;
+SDR 82 TDI (0015404000000000000001) ;
+SDR 82 TDI (0015440000000000000001) ;
+SDR 82 TDI (0015480400002000000001) ;
+SDR 82 TDI (00154c0000100000000001) ;
+SDR 82 TDI (0015500000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0015800000000000f00000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0015800000000000f00001) ;
+SDR 82 TDI (0015840000000000f00001) ;
+SDR 82 TDI (0015880000000000f00001) ;
+SDR 82 TDI (00158c0000000000e00001) ;
+SDR 82 TDI (0015900000000000e00001) ;
+SDR 82 TDI (0015a00400000000280001) ;
+SDR 82 TDI (0015a40020000000a80001) ;
+SDR 82 TDI (0015a80000000000a80001) ;
+SDR 82 TDI (0015ac0000000000680001) ;
+SDR 82 TDI (0015b00000000000700001) ;
+SDR 82 TDI (0015c00000000000000001) ;
+SDR 82 TDI (0015c40000000000880001) ;
+SDR 82 TDI (0015c80000000000880001) ;
+SDR 82 TDI (0015cc0000000000880001) ;
+SDR 82 TDI (0015d00000000000880003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0016000000000000100000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0016000000000000100001) ;
+SDR 82 TDI (0016050303030300400001) ;
+SDR 82 TDI (00160a0202020000500001) ;
+SDR 82 TDI (00160c0000000000000001) ;
+SDR 82 TDI (0016110302030100c00001) ;
+SDR 82 TDI (0016230102030100000001) ;
+SDR 82 TDI (0016240000000000200001) ;
+SDR 82 TDI (0016290102000002280001) ;
+SDR 82 TDI (00162c0101010001080001) ;
+SDR 82 TDI (0016300000000000000001) ;
+SDR 82 TDI (0016400000000000000001) ;
+SDR 82 TDI (0016440000000000000001) ;
+SDR 82 TDI (0016480000000000000001) ;
+SDR 82 TDI (00164c0000000000080001) ;
+SDR 82 TDI (0016500000000000080003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0016830303030303420300) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0016830303030303420301) ;
+SDR 82 TDI (0016870303030303120301) ;
+SDR 82 TDI (00168b0303030301820301) ;
+SDR 82 TDI (00168f0303030303e20301) ;
+SDR 82 TDI (0016930303030303220301) ;
+SDR 82 TDI (0016a303030303032b0301) ;
+SDR 82 TDI (0016a703030303038b0301) ;
+SDR 82 TDI (0016ab0303030303830301) ;
+SDR 82 TDI (0016af0303030303210301) ;
+SDR 82 TDI (0016b00000000000200001) ;
+SDR 82 TDI (0016c00000000000000001) ;
+SDR 82 TDI (0016c40000000000080001) ;
+SDR 82 TDI (0016c80000004000080001) ;
+SDR 82 TDI (0016cc0000000000000001) ;
+SDR 82 TDI (0016d00000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0017030303030003588000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0017030303030003588001) ;
+SDR 82 TDI (0017070303030103580001) ;
+SDR 82 TDI (00170b0303070201d80001) ;
+SDR 82 TDI (00170f0303070203e80001) ;
+SDR 82 TDI (0017130303070303ec0001) ;
+SDR 82 TDI (0017230303030303288001) ;
+SDR 82 TDI (0017260303030203280001) ;
+SDR 82 TDI (00172b03030303032c0201) ;
+SDR 82 TDI (00172f03030303030c0201) ;
+SDR 82 TDI (00173000000000000c0001) ;
+SDR 82 TDI (0017400000000000000001) ;
+SDR 82 TDI (0017440000000400080001) ;
+SDR 82 TDI (0017480000800008080001) ;
+SDR 82 TDI (00174c0000000000080001) ;
+SDR 82 TDI (00175000000000000c0003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0017830303010003000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0017830303010003000001) ;
+SDR 82 TDI (0017850303070103040001) ;
+SDR 82 TDI (00178b2303030001000001) ;
+SDR 82 TDI (00178f0303030203000001) ;
+SDR 82 TDI (0017930201030203000001) ;
+SDR 82 TDI (0017a30201030303400001) ;
+SDR 82 TDI (0017a60303030003900001) ;
+SDR 82 TDI (0017ab0b01034203800001) ;
+SDR 82 TDI (0017af0303030203200001) ;
+SDR 82 TDI (0017b08000000000200001) ;
+SDR 82 TDI (0017c00000000000000001) ;
+SDR 82 TDI (0017c40000800000000001) ;
+SDR 82 TDI (0017c82000000400000001) ;
+SDR 82 TDI (0017cc0000800000000001) ;
+SDR 82 TDI (0017d00000800000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0018030303010203900000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0018030303010203900001) ;
+SDR 82 TDI (001805013e038003a00001) ;
+SDR 82 TDI (00180b0310038001f00001) ;
+SDR 82 TDI (00180f0202030803a00001) ;
+SDR 82 TDI (00181300a0025803a00001) ;
+SDR 82 TDI (0018230200030003000201) ;
+SDR 82 TDI (0018250302030602080201) ;
+SDR 82 TDI (00182b0301030601040001) ;
+SDR 82 TDI (00182f02030302030c0201) ;
+SDR 82 TDI (0018300010008000000001) ;
+SDR 82 TDI (00184000c000a000000001) ;
+SDR 82 TDI (0018440090009400000001) ;
+SDR 82 TDI (0018480000000000080001) ;
+SDR 82 TDI (00184c00a0000c00800001) ;
+SDR 82 TDI (0018500000000000880003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0018830307011043600000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0018830307011043600001) ;
+SDR 82 TDI (0018850100011043500001) ;
+SDR 82 TDI (00188b0308021001040001) ;
+SDR 82 TDI (00188f0212039003440001) ;
+SDR 82 TDI (0018930014028003440001) ;
+SDR 82 TDI (0018a20000008403280001) ;
+SDR 82 TDI (0018a40302038802e00001) ;
+SDR 82 TDI (0018ab0330038801f80001) ;
+SDR 82 TDI (0018af0212038003700001) ;
+SDR 82 TDI (0018b00000004000700001) ;
+SDR 82 TDI (0018c00000000000000001) ;
+SDR 82 TDI (0018c40060000808880001) ;
+SDR 82 TDI (0018c800f0008c08800001) ;
+SDR 82 TDI (0018cc0000008000080001) ;
+SDR 82 TDI (0018d00080008000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0019004100000101000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0019004100000101000001) ;
+SDR 82 TDI (0019054101010000000001) ;
+SDR 82 TDI (0019094001000100000001) ;
+SDR 82 TDI (00190c4000000000000301) ;
+SDR 82 TDI (0019104101010101000001) ;
+SDR 82 TDI (0019200000000000000001) ;
+SDR 82 TDI (0019244000000000000001) ;
+SDR 82 TDI (0019284000000000000001) ;
+SDR 82 TDI (00192c4000000000000001) ;
+SDR 82 TDI (0019304000000000000001) ;
+SDR 82 TDI (0019404000000000000001) ;
+SDR 82 TDI (0019446000000000000001) ;
+SDR 82 TDI (0019486000000000000001) ;
+SDR 82 TDI (00194c2000000000000001) ;
+SDR 82 TDI (0019506000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0019830000030302000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0019830000030302000001) ;
+SDR 82 TDI (0019860000020202000001) ;
+SDR 82 TDI (00198b0800030302020001) ;
+SDR 82 TDI (00198c0000000000000001) ;
+SDR 82 TDI (0019900001000100020001) ;
+SDR 82 TDI (0019a00000000000000001) ;
+SDR 82 TDI (0019a40000000000000001) ;
+SDR 82 TDI (0019a80000000000000001) ;
+SDR 82 TDI (0019ac0400000000000001) ;
+SDR 82 TDI (0019b00000000000000001) ;
+SDR 82 TDI (0019c00000000000000001) ;
+SDR 82 TDI (0019c40000000000000001) ;
+SDR 82 TDI (0019c81000000000000001) ;
+SDR 82 TDI (0019cc0000000000000001) ;
+SDR 82 TDI (0019d00000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (001a000300010001000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (001a000300010001000001) ;
+SDR 82 TDI (001a050202000100000101) ;
+SDR 82 TDI (001a090102010100000101) ;
+SDR 82 TDI (001a0c0000000000000001) ;
+SDR 82 TDI (001a100303010001000101) ;
+SDR 82 TDI (001a202000000000000001) ;
+SDR 82 TDI (001a242000000000800001) ;
+SDR 82 TDI (001a280000000000800001) ;
+SDR 82 TDI (001a2c0000000000200001) ;
+SDR 82 TDI (001a300000000000200001) ;
+SDR 82 TDI (001a400000000000000001) ;
+SDR 82 TDI (001a440000000010000001) ;
+SDR 82 TDI (001a480000000080000001) ;
+SDR 82 TDI (001a4c0000000080000001) ;
+SDR 82 TDI (001a500000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (001a820000000100000100) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (001a820000000100000101) ;
+SDR 82 TDI (001a870203020100000101) ;
+SDR 82 TDI (001a8a0203000100000101) ;
+SDR 82 TDI (001a8c0000000000000001) ;
+SDR 82 TDI (001a930103010101000101) ;
+SDR 82 TDI (001aa00000000000000001) ;
+SDR 82 TDI (001aa40000000000000001) ;
+SDR 82 TDI (001aa80000000000000001) ;
+SDR 82 TDI (001aac0000000000000001) ;
+SDR 82 TDI (001ab00000000000000001) ;
+SDR 82 TDI (001ac00000000080500001) ;
+SDR 82 TDI (001ac40000000080000001) ;
+SDR 82 TDI (001ac80000000000000001) ;
+SDR 82 TDI (001acc0000000000000001) ;
+SDR 82 TDI (001ad00000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (001b000100000303000100) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (001b000100000303000101) ;
+SDR 82 TDI (001b050001000000000001) ;
+SDR 82 TDI (001b090301000202000001) ;
+SDR 82 TDI (001b0c0000000000000001) ;
+SDR 82 TDI (001b100001010203000001) ;
+SDR 82 TDI (001b200000000000000001) ;
+SDR 82 TDI (001b240000000000000001) ;
+SDR 82 TDI (001b280000000000000001) ;
+SDR 82 TDI (001b2c0000000000000001) ;
+SDR 82 TDI (001b300000000000000001) ;
+SDR 82 TDI (001b4000000000000000c1) ;
+SDR 82 TDI (001b440000000000000001) ;
+SDR 82 TDI (001b480000000000000001) ;
+SDR 82 TDI (001b4c0000000000000001) ;
+SDR 82 TDI (001b500000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (001b800000000001000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (001b800000000001000001) ;
+SDR 82 TDI (001b840003000000000001) ;
+SDR 82 TDI (001b880003000301000001) ;
+SDR 82 TDI (001b8c0000000000000001) ;
+SDR 82 TDI (001b900103010300000001) ;
+SDR 82 TDI (001ba00000000000000001) ;
+SDR 82 TDI (001ba40000000000000001) ;
+SDR 82 TDI (001ba80000000000000001) ;
+SDR 82 TDI (001bac0000000000000001) ;
+SDR 82 TDI (001bb00000000000000001) ;
+SDR 82 TDI (001bc00000000000000001) ;
+SDR 82 TDI (001bc40000000000000001) ;
+SDR 82 TDI (001bc80000000000000001) ;
+SDR 82 TDI (001bcc0000000000000001) ;
+SDR 82 TDI (001bd00000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (001c011100010200f00100) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (001c011100010200f00101) ;
+SDR 82 TDI (001c050000000000f00101) ;
+SDR 82 TDI (001c090101010201f00001) ;
+SDR 82 TDI (001c0e0000020002e00001) ;
+SDR 82 TDI (001c110101010300e00301) ;
+SDR 82 TDI (001c200000000000a80001) ;
+SDR 82 TDI (001c240000000000280001) ;
+SDR 82 TDI (001c280000000000280001) ;
+SDR 82 TDI (001c2c0000000000480001) ;
+SDR 82 TDI (001c300000000000500001) ;
+SDR 82 TDI (001c408800000000000001) ;
+SDR 82 TDI (001c440000000000880001) ;
+SDR 82 TDI (001c480000000000880001) ;
+SDR 82 TDI (001c4c00000000008c0001) ;
+SDR 82 TDI (001c500000000000880003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (001c820100030203002100) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (001c820100030203002101) ;
+SDR 82 TDI (001c842000020000010001) ;
+SDR 82 TDI (001c8a0101010203000101) ;
+SDR 82 TDI (001c8c0000000000000001) ;
+SDR 82 TDI (001c930001010201000101) ;
+SDR 82 TDI (001ca00000000000000001) ;
+SDR 82 TDI (001ca40800004000000001) ;
+SDR 82 TDI (001ca80000000000000001) ;
+SDR 82 TDI (001cac0000000000000001) ;
+SDR 82 TDI (001cb00400000000000001) ;
+SDR 82 TDI (001cc00000000808000001) ;
+SDR 82 TDI (001cc42000000008000001) ;
+SDR 82 TDI (001cc80000000008040001) ;
+SDR 82 TDI (001ccc0000000000000001) ;
+SDR 82 TDI (001cd00000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (001d000040440201010000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (001d000040440201010001) ;
+SDR 82 TDI (001d040050410000010001) ;
+SDR 82 TDI (001d080051000200010001) ;
+SDR 82 TDI (001d0c0150000100000101) ;
+SDR 82 TDI (001d110051400201010001) ;
+SDR 82 TDI (001d200000040000000001) ;
+SDR 82 TDI (001d240004000000000001) ;
+SDR 82 TDI (001d280000000000000001) ;
+SDR 82 TDI (001d2c0000100000000001) ;
+SDR 82 TDI (001d300000000000000001) ;
+SDR 82 TDI (001d400000000000000001) ;
+SDR 82 TDI (001d440020080000000001) ;
+SDR 82 TDI (001d480020080000000001) ;
+SDR 82 TDI (001d4c0020000000000001) ;
+SDR 82 TDI (001d500020000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (001d820110010003000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (001d820110010003000001) ;
+SDR 82 TDI (001d8400000a0101000101) ;
+SDR 82 TDI (001d8a01010b0102000101) ;
+SDR 82 TDI (001d8c0000400000000001) ;
+SDR 82 TDI (001d930301010303000101) ;
+SDR 82 TDI (001da00084000000000001) ;
+SDR 82 TDI (001da40040100000000001) ;
+SDR 82 TDI (001da80040140000000001) ;
+SDR 82 TDI (001dac0000000000000001) ;
+SDR 82 TDI (001db00000000000000001) ;
+SDR 82 TDI (001dc00000000000000001) ;
+SDR 82 TDI (001dc40000000000000001) ;
+SDR 82 TDI (001dc80000000000000001) ;
+SDR 82 TDI (001dcc0040000000000001) ;
+SDR 82 TDI (001dd00000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (001e000000010002000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (001e000000010002000001) ;
+SDR 82 TDI (001e048002810000000001) ;
+SDR 82 TDI (001e088001800003020001) ;
+SDR 82 TDI (001e0e0020000200000001) ;
+SDR 82 TDI (001e110003000002020001) ;
+SDR 82 TDI (001e202000000000000001) ;
+SDR 82 TDI (001e242000000000000001) ;
+SDR 82 TDI (001e280000200000000001) ;
+SDR 82 TDI (001e2c0000000000000001) ;
+SDR 82 TDI (001e300000000000000001) ;
+SDR 82 TDI (001e400000000000000001) ;
+SDR 82 TDI (001e440000000000000001) ;
+SDR 82 TDI (001e480000300000000001) ;
+SDR 82 TDI (001e4c0000000000000001) ;
+SDR 82 TDI (001e500000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (001e820100210202000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (001e820100210202000001) ;
+SDR 82 TDI (001e840002340100010001) ;
+SDR 82 TDI (001e8a0103250302000001) ;
+SDR 82 TDI (001e8c0000a40000000001) ;
+SDR 82 TDI (001e930103a50302000001) ;
+SDR 82 TDI (001ea00020000000000001) ;
+SDR 82 TDI (001ea40000802000000001) ;
+SDR 82 TDI (001ea80000000000000001) ;
+SDR 82 TDI (001eac0000200000000001) ;
+SDR 82 TDI (001eb00000000000000001) ;
+SDR 82 TDI (001ec00000800000000001) ;
+SDR 82 TDI (001ec40000c40000000001) ;
+SDR 82 TDI (001ec80000800000000001) ;
+SDR 82 TDI (001ecc0000900000000001) ;
+SDR 82 TDI (001ed00000800000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (001f020100010102500000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (001f020100010102500001) ;
+SDR 82 TDI (001f040200030200500101) ;
+SDR 82 TDI (001f080000000102d00001) ;
+SDR 82 TDI (001f0d0000000000e00001) ;
+SDR 82 TDI (001f120201030300e00101) ;
+SDR 82 TDI (001f200000000000280001) ;
+SDR 82 TDI (001f240000000000280001) ;
+SDR 82 TDI (001f280000000000280001) ;
+SDR 82 TDI (001f2c0000000000080001) ;
+SDR 82 TDI (001f300000000000000001) ;
+SDR 82 TDI (001f400000000000000001) ;
+SDR 82 TDI (001f440000000040080001) ;
+SDR 82 TDI (001f480000000040080001) ;
+SDR 82 TDI (001f4c0000000000080001) ;
+SDR 82 TDI (001f500000000000080003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (001f800100000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (001f800100000000000001) ;
+SDR 82 TDI (001f850002010000000101) ;
+SDR 82 TDI (001f890302010302000301) ;
+SDR 82 TDI (001f8c0000000000000001) ;
+SDR 82 TDI (001f910102030301000301) ;
+SDR 82 TDI (001fa00000000000000001) ;
+SDR 82 TDI (001fa40000000000000001) ;
+SDR 82 TDI (001fa80000000000000001) ;
+SDR 82 TDI (001fac0000000000000001) ;
+SDR 82 TDI (001fb00000000000000001) ;
+SDR 82 TDI (001fc00008000040000001) ;
+SDR 82 TDI (001fc40000000000000001) ;
+SDR 82 TDI (001fc80000000000000001) ;
+SDR 82 TDI (001fcc0000000000000001) ;
+SDR 82 TDI (001fd00000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0020000200030001000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0020000200030001000001) ;
+SDR 82 TDI (0020070300030100000001) ;
+SDR 82 TDI (0020090100000100000001) ;
+SDR 82 TDI (00200c0000000000000001) ;
+SDR 82 TDI (0020120200020001000301) ;
+SDR 82 TDI (0020200000000000000001) ;
+SDR 82 TDI (0020240000000004000001) ;
+SDR 82 TDI (0020280000000004000001) ;
+SDR 82 TDI (00202c0000000000000001) ;
+SDR 82 TDI (0020300000000000000001) ;
+SDR 82 TDI (0020400000400000000001) ;
+SDR 82 TDI (0020440000000000000001) ;
+SDR 82 TDI (0020480000000000000001) ;
+SDR 82 TDI (00204c0000000000000001) ;
+SDR 82 TDI (0020500000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0020800000020203000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0020800000020203000001) ;
+SDR 82 TDI (0020840002010003010001) ;
+SDR 82 TDI (0020880003020003010001) ;
+SDR 82 TDI (00208c0000000000000001) ;
+SDR 82 TDI (0020900203030303010001) ;
+SDR 82 TDI (0020a00000000000000001) ;
+SDR 82 TDI (0020a40000000000000001) ;
+SDR 82 TDI (0020a80000000000000001) ;
+SDR 82 TDI (0020ac0000000000000001) ;
+SDR 82 TDI (0020b00000000000000001) ;
+SDR 82 TDI (0020c00000000000000001) ;
+SDR 82 TDI (0020c40000000000000001) ;
+SDR 82 TDI (0020c80000000000000001) ;
+SDR 82 TDI (0020cc0000000000000001) ;
+SDR 82 TDI (0020d00000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0021001002031302020100) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0021001002031302020101) ;
+SDR 82 TDI (0021040200038a02030101) ;
+SDR 82 TDI (0021090002021703010001) ;
+SDR 82 TDI (00210c0000008800000001) ;
+SDR 82 TDI (0021120203031302000101) ;
+SDR 82 TDI (0021200000008000800001) ;
+SDR 82 TDI (0021240000000c40000001) ;
+SDR 82 TDI (0021280000000040000001) ;
+SDR 82 TDI (00212c0000001000000001) ;
+SDR 82 TDI (0021300000000000000001) ;
+SDR 82 TDI (0021400800008800000001) ;
+SDR 82 TDI (0021440000000060000001) ;
+SDR 82 TDI (0021480800008040000001) ;
+SDR 82 TDI (00214c0800000000000001) ;
+SDR 82 TDI (0021500000008000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0021838200008806040000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0021838200008806040001) ;
+SDR 82 TDI (0021870202000100000001) ;
+SDR 82 TDI (0021890502034102000001) ;
+SDR 82 TDI (00218c0800000000000001) ;
+SDR 82 TDI (0021930303010300000201) ;
+SDR 82 TDI (0021a04000000000140011) ;
+SDR 82 TDI (0021a40000000000000001) ;
+SDR 82 TDI (0021a80000000000000001) ;
+SDR 82 TDI (0021ac0000000400000001) ;
+SDR 82 TDI (0021b00000000400000001) ;
+SDR 82 TDI (0021c02000000000080001) ;
+SDR 82 TDI (0021c40000000000000001) ;
+SDR 82 TDI (0021c80000000000000001) ;
+SDR 82 TDI (0021cc1000000000000001) ;
+SDR 82 TDI (0021d00000001000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0022020100020302000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0022020100020302000001) ;
+SDR 82 TDI (0022060200020002000001) ;
+SDR 82 TDI (00220a0b00020302080001) ;
+SDR 82 TDI (00220c0800000080000001) ;
+SDR 82 TDI (0022120900020302000201) ;
+SDR 82 TDI (0022200800000000000001) ;
+SDR 82 TDI (0022240800000000000001) ;
+SDR 82 TDI (0022280800000000000001) ;
+SDR 82 TDI (00222c0800000000000001) ;
+SDR 82 TDI (0022300800000000000001) ;
+SDR 82 TDI (0022400400000000000001) ;
+SDR 82 TDI (0022440400000000000001) ;
+SDR 82 TDI (0022480400000000000001) ;
+SDR 82 TDI (00224c0400000000000001) ;
+SDR 82 TDI (0022500400000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0022804800020002f00000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0022804800020002f00001) ;
+SDR 82 TDI (0022844900012101f00001) ;
+SDR 82 TDI (0022880002030103f00001) ;
+SDR 82 TDI (00228c0000000000e00001) ;
+SDR 82 TDI (0022900002000000e00001) ;
+SDR 82 TDI (0022a00000000000280001) ;
+SDR 82 TDI (0022a40000000010a80001) ;
+SDR 82 TDI (0022a80400000000a80001) ;
+SDR 82 TDI (0022ac4000000000680001) ;
+SDR 82 TDI (0022b00000000000700001) ;
+SDR 82 TDI (0022c01000000000000001) ;
+SDR 82 TDI (0022c41000000000880001) ;
+SDR 82 TDI (0022c80000000000880001) ;
+SDR 82 TDI (0022cc0000000000880001) ;
+SDR 82 TDI (0022d00000000000880003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0023000100010000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0023000100010000000001) ;
+SDR 82 TDI (0023040200020002000001) ;
+SDR 82 TDI (0023080102030002000001) ;
+SDR 82 TDI (00230c0000000000000001) ;
+SDR 82 TDI (0023120302010200000201) ;
+SDR 82 TDI (0023200000000000000001) ;
+SDR 82 TDI (0023240000000040000001) ;
+SDR 82 TDI (0023280000000040000001) ;
+SDR 82 TDI (00232c0000000000000001) ;
+SDR 82 TDI (0023300000000000000001) ;
+SDR 82 TDI (0023400000000000000001) ;
+SDR 82 TDI (0023440000000060000001) ;
+SDR 82 TDI (0023480000000040000001) ;
+SDR 82 TDI (00234c0000000000000001) ;
+SDR 82 TDI (0023500000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (002381030101010d000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (002381030101010d000001) ;
+SDR 82 TDI (0023840203000100000001) ;
+SDR 82 TDI (00238b0103010101000001) ;
+SDR 82 TDI (00238c0000000000000001) ;
+SDR 82 TDI (0023920201000100000001) ;
+SDR 82 TDI (0023a00000000000000001) ;
+SDR 82 TDI (0023a40000000000000001) ;
+SDR 82 TDI (0023a80000000000000001) ;
+SDR 82 TDI (0023ac0000000000000001) ;
+SDR 82 TDI (0023b00000000000000001) ;
+SDR 82 TDI (0023c00000000004000001) ;
+SDR 82 TDI (0023c40000000000000001) ;
+SDR 82 TDI (0023c80000000000000001) ;
+SDR 82 TDI (0023cc0000000000000001) ;
+SDR 82 TDI (0023d00000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0024020000020000600200) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0024020000020000600201) ;
+SDR 82 TDI (0024040002008202500001) ;
+SDR 82 TDI (00240a0002038203000001) ;
+SDR 82 TDI (00240c4000008800400001) ;
+SDR 82 TDI (002410080200ca02400001) ;
+SDR 82 TDI (002420000000c000280001) ;
+SDR 82 TDI (002424000000c840200001) ;
+SDR 82 TDI (0024280000004840280001) ;
+SDR 82 TDI (00242c0000004000440001) ;
+SDR 82 TDI (0024300000004000500001) ;
+SDR 82 TDI (002440000000a000000001) ;
+SDR 82 TDI (002444800400a060880001) ;
+SDR 82 TDI (0024480004002440800001) ;
+SDR 82 TDI (00244c0800002400080001) ;
+SDR 82 TDI (0024501000002000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (002483020203011e900000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (002483020203011e900001) ;
+SDR 82 TDI (0024840001000001a10001) ;
+SDR 82 TDI (00248b0200030503f00001) ;
+SDR 82 TDI (00248c0000000400a00001) ;
+SDR 82 TDI (0024902002000400a40001) ;
+SDR 82 TDI (0024a00000000000000001) ;
+SDR 82 TDI (0024a40000000000080001) ;
+SDR 82 TDI (0024a80000000000000001) ;
+SDR 82 TDI (0024ac0000001000080001) ;
+SDR 82 TDI (0024b00800001000000001) ;
+SDR 82 TDI (0024c00000001004000001) ;
+SDR 82 TDI (0024c40000000400000001) ;
+SDR 82 TDI (0024c80800000000080001) ;
+SDR 82 TDI (0024cc0000000000800001) ;
+SDR 82 TDI (0024d0a000000000880003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0025000202000080a00000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0025000202000080a00001) ;
+SDR 82 TDI (0025040300010301a40001) ;
+SDR 82 TDI (0025080102010301240001) ;
+SDR 82 TDI (00250c0000000000040001) ;
+SDR 82 TDI (0025100202000200000201) ;
+SDR 82 TDI (0025200000000000400001) ;
+SDR 82 TDI (0025240000000000500001) ;
+SDR 82 TDI (0025280000000000500001) ;
+SDR 82 TDI (00252c0000000000500001) ;
+SDR 82 TDI (0025300000000000500001) ;
+SDR 82 TDI (0025400800000000000001) ;
+SDR 82 TDI (0025440000000000800001) ;
+SDR 82 TDI (0025480000000000800001) ;
+SDR 82 TDI (00254c0000000000800001) ;
+SDR 82 TDI (0025500000000000800003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0025810000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0025810000000000000001) ;
+SDR 82 TDI (0025850000020000000001) ;
+SDR 82 TDI (0025890200000000000001) ;
+SDR 82 TDI (00258c0000000000000001) ;
+SDR 82 TDI (0025910000020000000001) ;
+SDR 82 TDI (0025a00000400000004001) ;
+SDR 82 TDI (0025a40000000000000001) ;
+SDR 82 TDI (0025a80000000000800001) ;
+SDR 82 TDI (0025ac0000000000000001) ;
+SDR 82 TDI (0025b00000000000200001) ;
+SDR 82 TDI (0025c00000000000000001) ;
+SDR 82 TDI (0025c40000000000000001) ;
+SDR 82 TDI (0025c80000000000000001) ;
+SDR 82 TDI (0025cc0000000000000001) ;
+SDR 82 TDI (0025d00000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0026030000020301000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0026030000020301000001) ;
+SDR 82 TDI (0026040002000000000001) ;
+SDR 82 TDI (00260b0202020303000001) ;
+SDR 82 TDI (00260c0000000000000001) ;
+SDR 82 TDI (0026110002000301000001) ;
+SDR 82 TDI (0026202000000000000001) ;
+SDR 82 TDI (0026242000000000800001) ;
+SDR 82 TDI (0026280000000000800001) ;
+SDR 82 TDI (00262c0000000000200001) ;
+SDR 82 TDI (0026300000000000200001) ;
+SDR 82 TDI (0026400000000000000001) ;
+SDR 82 TDI (0026440000000010000001) ;
+SDR 82 TDI (0026480000000000000001) ;
+SDR 82 TDI (00264c0000000000000001) ;
+SDR 82 TDI (0026500000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0026800000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0026800000000000000001) ;
+SDR 82 TDI (0026840000000000000001) ;
+SDR 82 TDI (0026880000000000000001) ;
+SDR 82 TDI (00268c0000000000000001) ;
+SDR 82 TDI (0026900000000000000001) ;
+SDR 82 TDI (0026a00000000000000001) ;
+SDR 82 TDI (0026a40000000000000001) ;
+SDR 82 TDI (0026a80000040000000001) ;
+SDR 82 TDI (0026ac0000000000000001) ;
+SDR 82 TDI (0026b00000000000000001) ;
+SDR 82 TDI (0026c00000000000000001) ;
+SDR 82 TDI (0026c40000000000000001) ;
+SDR 82 TDI (0026c80000000000500001) ;
+SDR 82 TDI (0026cc0000000000000001) ;
+SDR 82 TDI (0026d00000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0027010101010101010100) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0027010101010101010101) ;
+SDR 82 TDI (0027050501010001000001) ;
+SDR 82 TDI (0027080000000000000001) ;
+SDR 82 TDI (00270c0080000000040001) ;
+SDR 82 TDI (0027100040000000000001) ;
+SDR 82 TDI (0027200000000000000001) ;
+SDR 82 TDI (0027250101010141010101) ;
+SDR 82 TDI (0027280000000040400001) ;
+SDR 82 TDI (00272c0080000000100001) ;
+SDR 82 TDI (0027300000000000000001) ;
+SDR 82 TDI (0027400000000000000001) ;
+SDR 82 TDI (0027440004000020000001) ;
+SDR 82 TDI (0027480004000000000001) ;
+SDR 82 TDI (00274c0000000000000001) ;
+SDR 82 TDI (0027500000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0027800400000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0027800400000000000001) ;
+SDR 82 TDI (0027840000000800000001) ;
+SDR 82 TDI (0027880000000800000001) ;
+SDR 82 TDI (00278c0000000800000001) ;
+SDR 82 TDI (0027900000000c00080001) ;
+SDR 82 TDI (0027a00000000000000001) ;
+SDR 82 TDI (0027a40040000800000001) ;
+SDR 82 TDI (0027a80040008800000001) ;
+SDR 82 TDI (0027ac0000008400000001) ;
+SDR 82 TDI (0027b00080008400000001) ;
+SDR 82 TDI (0027c00000001000000001) ;
+SDR 82 TDI (0027c40000000800000001) ;
+SDR 82 TDI (0027c80000001800000001) ;
+SDR 82 TDI (0027cc0040001800000001) ;
+SDR 82 TDI (0027d00000001000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0028000000a01000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0028000000a01000000001) ;
+SDR 82 TDI (0028040000801000000001) ;
+SDR 82 TDI (0028080000801400000001) ;
+SDR 82 TDI (00280c0000001400000001) ;
+SDR 82 TDI (0028100000001000000001) ;
+SDR 82 TDI (0028200000000400000001) ;
+SDR 82 TDI (0028240000000440000001) ;
+SDR 82 TDI (0028280000000440000001) ;
+SDR 82 TDI (00282c0000001000000001) ;
+SDR 82 TDI (0028300000001000000001) ;
+SDR 82 TDI (0028400000a00000000001) ;
+SDR 82 TDI (0028440000041060000001) ;
+SDR 82 TDI (0028480000248040000001) ;
+SDR 82 TDI (00284c0000008000000001) ;
+SDR 82 TDI (0028500000008000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (002880000010001c000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (002880000010001c000001) ;
+SDR 82 TDI (0028840000240000100001) ;
+SDR 82 TDI (0028880000240000100001) ;
+SDR 82 TDI (00288c0000240000c00001) ;
+SDR 82 TDI (0028900000240000e00001) ;
+SDR 82 TDI (0028a00008a00000000009) ;
+SDR 82 TDI (0028a40000000000800001) ;
+SDR 82 TDI (0028a80000200000a00001) ;
+SDR 82 TDI (0028ac0000000000200001) ;
+SDR 82 TDI (0028b00000000000200001) ;
+SDR 82 TDI (0028c00000140004000009) ;
+SDR 82 TDI (0028c40000800000080001) ;
+SDR 82 TDI (0028c80000900000080001) ;
+SDR 82 TDI (0028cc0000800000080001) ;
+SDR 82 TDI (0028d00000800000080003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (00290010c4001000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (00290010c4001000000001) ;
+SDR 82 TDI (00290400d4009400000001) ;
+SDR 82 TDI (00290800d4009400000001) ;
+SDR 82 TDI (00290c00d4009c00000001) ;
+SDR 82 TDI (00291000d4009c00000001) ;
+SDR 82 TDI (0029200000009400000001) ;
+SDR 82 TDI (0029240080009c00000001) ;
+SDR 82 TDI (0029280084008c00000001) ;
+SDR 82 TDI (00292c0084009400000001) ;
+SDR 82 TDI (0029300004009000000001) ;
+SDR 82 TDI (00294008c0009000000001) ;
+SDR 82 TDI (00294400e0009800000001) ;
+SDR 82 TDI (00294808e0009800000001) ;
+SDR 82 TDI (00294c08a0008800000001) ;
+SDR 82 TDI (00295000a0009000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0029800000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0029800000000000000001) ;
+SDR 82 TDI (0029840000000800000001) ;
+SDR 82 TDI (0029880000000800000001) ;
+SDR 82 TDI (00298c0000000000000001) ;
+SDR 82 TDI (0029900000000000000001) ;
+SDR 82 TDI (0029a00000000000000021) ;
+SDR 82 TDI (0029a40044000000000001) ;
+SDR 82 TDI (0029a80040001000000001) ;
+SDR 82 TDI (0029ac0000000000000001) ;
+SDR 82 TDI (0029b00000000400000001) ;
+SDR 82 TDI (0029c00000000000000001) ;
+SDR 82 TDI (0029c40000000000000001) ;
+SDR 82 TDI (0029c80000000000000001) ;
+SDR 82 TDI (0029cc0040000000000001) ;
+SDR 82 TDI (0029d00000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (002a000004000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (002a000004000000000001) ;
+SDR 82 TDI (002a040004000000000001) ;
+SDR 82 TDI (002a080004000000000001) ;
+SDR 82 TDI (002a0c0004000000000001) ;
+SDR 82 TDI (002a100000000000000001) ;
+SDR 82 TDI (002a200000040000000001) ;
+SDR 82 TDI (002a240000000000000001) ;
+SDR 82 TDI (002a280000040000000001) ;
+SDR 82 TDI (002a2c0004000000000001) ;
+SDR 82 TDI (002a300004000000000001) ;
+SDR 82 TDI (002a400000000000000001) ;
+SDR 82 TDI (002a440000080000000001) ;
+SDR 82 TDI (002a480080080000000001) ;
+SDR 82 TDI (002a4c0080000000500001) ;
+SDR 82 TDI (002a500000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (002a800080040000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (002a800080040000000001) ;
+SDR 82 TDI (002a840000000000000001) ;
+SDR 82 TDI (002a880000000000000001) ;
+SDR 82 TDI (002a8c0000000000000001) ;
+SDR 82 TDI (002a900000400000000001) ;
+SDR 82 TDI (002aa00000100020000001) ;
+SDR 82 TDI (002aa40000000000800001) ;
+SDR 82 TDI (002aa80080000000800001) ;
+SDR 82 TDI (002aac0080100000200001) ;
+SDR 82 TDI (002ab00000000000200001) ;
+SDR 82 TDI (002ac00000000400000001) ;
+SDR 82 TDI (002ac40000000000000001) ;
+SDR 82 TDI (002ac80000000000000001) ;
+SDR 82 TDI (002acc0000000000000001) ;
+SDR 82 TDI (002ad00000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (002b000000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (002b000000000000000001) ;
+SDR 82 TDI (002b040010000000000001) ;
+SDR 82 TDI (002b080010000000000001) ;
+SDR 82 TDI (002b0c0010000000000001) ;
+SDR 82 TDI (002b100014000000000001) ;
+SDR 82 TDI (002b200000000000000001) ;
+SDR 82 TDI (002b240000000000000001) ;
+SDR 82 TDI (002b280000000000000001) ;
+SDR 82 TDI (002b2c0000000000000001) ;
+SDR 82 TDI (002b300000000000000001) ;
+SDR 82 TDI (002b400080000000004001) ;
+SDR 82 TDI (002b440080000000000001) ;
+SDR 82 TDI (002b480000000000000001) ;
+SDR 82 TDI (002b4c0000000000000001) ;
+SDR 82 TDI (002b500080000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (002b800000004000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (002b800000004000000001) ;
+SDR 82 TDI (002b840040000000000001) ;
+SDR 82 TDI (002b880040000000000001) ;
+SDR 82 TDI (002b8c0040000000000001) ;
+SDR 82 TDI (002b900040000000000001) ;
+SDR 82 TDI (002ba00000000000000001) ;
+SDR 82 TDI (002ba40000000080000001) ;
+SDR 82 TDI (002ba80000000080000001) ;
+SDR 82 TDI (002bac0000000080000001) ;
+SDR 82 TDI (002bb00000000000000001) ;
+SDR 82 TDI (002bc00000100000040001) ;
+SDR 82 TDI (002bc40800000080000001) ;
+SDR 82 TDI (002bc80000100080000001) ;
+SDR 82 TDI (002bcc0000100080000001) ;
+SDR 82 TDI (002bd00000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (002c000000040000100000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (002c000000040000100001) ;
+SDR 82 TDI (002c048000000000400001) ;
+SDR 82 TDI (002c080000000000500001) ;
+SDR 82 TDI (002c0c0000000000000001) ;
+SDR 82 TDI (002c100000000000c00001) ;
+SDR 82 TDI (002c202000040000000001) ;
+SDR 82 TDI (002c240000000040200001) ;
+SDR 82 TDI (002c280000000040280001) ;
+SDR 82 TDI (002c2c0000004000080001) ;
+SDR 82 TDI (002c300000000000080001) ;
+SDR 82 TDI (002c400000000000000001) ;
+SDR 82 TDI (002c440004000060000001) ;
+SDR 82 TDI (002c480004000040000001) ;
+SDR 82 TDI (002c4c0000000000080001) ;
+SDR 82 TDI (002c500000000000080003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (002c80002000001cc00000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (002c80002000001cc00001) ;
+SDR 82 TDI (002c840020000000300001) ;
+SDR 82 TDI (002c880020000000800001) ;
+SDR 82 TDI (002c8c0020000000e00001) ;
+SDR 82 TDI (002c900000000000200001) ;
+SDR 82 TDI (002ca00000002000280009) ;
+SDR 82 TDI (002ca40000000000880001) ;
+SDR 82 TDI (002ca80000040000800001) ;
+SDR 82 TDI (002cac0000000000600001) ;
+SDR 82 TDI (002cb00000000000300001) ;
+SDR 82 TDI (002cc00004000004000001) ;
+SDR 82 TDI (002cc40000000000880001) ;
+SDR 82 TDI (002cc80000000000080001) ;
+SDR 82 TDI (002ccc0000000000800001) ;
+SDR 82 TDI (002cd00000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (002d002000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (002d002000000000000001) ;
+SDR 82 TDI (002d042800000000000001) ;
+SDR 82 TDI (002d082804000000000001) ;
+SDR 82 TDI (002d0c2804004000000001) ;
+SDR 82 TDI (002d102800000000000001) ;
+SDR 82 TDI (002d201800000000000001) ;
+SDR 82 TDI (002d241800000040040001) ;
+SDR 82 TDI (002d281810000040000001) ;
+SDR 82 TDI (002d2c1800000000000001) ;
+SDR 82 TDI (002d301800000000000001) ;
+SDR 82 TDI (002d401400000000000001) ;
+SDR 82 TDI (002d440420000000000001) ;
+SDR 82 TDI (002d481400000000000001) ;
+SDR 82 TDI (002d4c1400000000000001) ;
+SDR 82 TDI (002d501400000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (002d800800000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (002d800800000000000001) ;
+SDR 82 TDI (002d840000000000000001) ;
+SDR 82 TDI (002d880028000000000001) ;
+SDR 82 TDI (002d8c0010000000000001) ;
+SDR 82 TDI (002d900014000000000001) ;
+SDR 82 TDI (002da00000000040000081) ;
+SDR 82 TDI (002da44400000000000001) ;
+SDR 82 TDI (002da84020000000000001) ;
+SDR 82 TDI (002dac0000000000000001) ;
+SDR 82 TDI (002db04000000000000001) ;
+SDR 82 TDI (002dc00010000000800001) ;
+SDR 82 TDI (002dc40040000000000001) ;
+SDR 82 TDI (002dc80050000000000001) ;
+SDR 82 TDI (002dcc0000000000000001) ;
+SDR 82 TDI (002dd00080000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (002e000000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (002e000000000000000001) ;
+SDR 82 TDI (002e040000000000000001) ;
+SDR 82 TDI (002e080000000000000001) ;
+SDR 82 TDI (002e0c0000000000000001) ;
+SDR 82 TDI (002e100000000000000001) ;
+SDR 82 TDI (002e200000000000000001) ;
+SDR 82 TDI (002e240000000000000001) ;
+SDR 82 TDI (002e280000000000000001) ;
+SDR 82 TDI (002e2c0000000000000001) ;
+SDR 82 TDI (002e300000000000000001) ;
+SDR 82 TDI (002e400000000000000001) ;
+SDR 82 TDI (002e440000000000000001) ;
+SDR 82 TDI (002e480000000000000001) ;
+SDR 82 TDI (002e4c0000000000000001) ;
+SDR 82 TDI (002e500000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (002e800000000000500000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (002e800000000000500001) ;
+SDR 82 TDI (002e840000000000500001) ;
+SDR 82 TDI (002e880000240000d00001) ;
+SDR 82 TDI (002e8c0000000000e00001) ;
+SDR 82 TDI (002e900000800000e00001) ;
+SDR 82 TDI (002ea00000000000280001) ;
+SDR 82 TDI (002ea40000000000a80001) ;
+SDR 82 TDI (002ea80000002000a80001) ;
+SDR 82 TDI (002eac0000000000280001) ;
+SDR 82 TDI (002eb00000000000200001) ;
+SDR 82 TDI (002ec00000000000000001) ;
+SDR 82 TDI (002ec40000000000080001) ;
+SDR 82 TDI (002ec80000000000080001) ;
+SDR 82 TDI (002ecc0000800000080001) ;
+SDR 82 TDI (002ed00000000000080003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (002f008000001000000004) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (002f008000001000000005) ;
+SDR 82 TDI (002f040000001000000001) ;
+SDR 82 TDI (002f080400000000040001) ;
+SDR 82 TDI (002f0c0800000020040001) ;
+SDR 82 TDI (002f100000000000000001) ;
+SDR 82 TDI (002f2040000000c0000041) ;
+SDR 82 TDI (002f240038000000400001) ;
+SDR 82 TDI (002f280000008000540001) ;
+SDR 82 TDI (002f2c0000000000100001) ;
+SDR 82 TDI (002f300000000000000001) ;
+SDR 82 TDI (002f4000080020d0000001) ;
+SDR 82 TDI (002f440000000c00000001) ;
+SDR 82 TDI (002f480000008400000001) ;
+SDR 82 TDI (002f4c1004008400000001) ;
+SDR 82 TDI (002f500000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (002f800000000000d80000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (002f800000000000d80001) ;
+SDR 82 TDI (002f840000000040f80001) ;
+SDR 82 TDI (002f880000000000f80001) ;
+SDR 82 TDI (002f8c0000248000e80001) ;
+SDR 82 TDI (002f900000008000e40001) ;
+SDR 82 TDI (002fa0002800c000280001) ;
+SDR 82 TDI (002fa4000000c800a80001) ;
+SDR 82 TDI (002fa80000000840a80001) ;
+SDR 82 TDI (002fac0000004080280001) ;
+SDR 82 TDI (002fb000000040002c0001) ;
+SDR 82 TDI (002fc00000000000000001) ;
+SDR 82 TDI (002fc40018402000080001) ;
+SDR 82 TDI (002fc80010002040080001) ;
+SDR 82 TDI (002fcc0000002080880001) ;
+SDR 82 TDI (002fd000048020008c0003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (00300000c0000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (00300000c0000000000001) ;
+SDR 82 TDI (00300408d0000000000001) ;
+SDR 82 TDI (00300800d0000000000001) ;
+SDR 82 TDI (00300c00d0000000000001) ;
+SDR 82 TDI (00301000d0000000000001) ;
+SDR 82 TDI (0030200084000000000001) ;
+SDR 82 TDI (0030240080000000000001) ;
+SDR 82 TDI (0030280080000000000001) ;
+SDR 82 TDI (00302c0080000000000001) ;
+SDR 82 TDI (0030300000000000000001) ;
+SDR 82 TDI (0030400040000000000001) ;
+SDR 82 TDI (0030440060000000000001) ;
+SDR 82 TDI (0030480060040000000001) ;
+SDR 82 TDI (00304c0020000000000001) ;
+SDR 82 TDI (0030500020000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0030800810000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0030800810000000000001) ;
+SDR 82 TDI (0030840000240000000001) ;
+SDR 82 TDI (0030880000240000000001) ;
+SDR 82 TDI (00308c0000a40000000001) ;
+SDR 82 TDI (0030900000a40000000001) ;
+SDR 82 TDI (0030a00000000000000001) ;
+SDR 82 TDI (0030a40040800000000001) ;
+SDR 82 TDI (0030a80044000000000001) ;
+SDR 82 TDI (0030ac0000000000000001) ;
+SDR 82 TDI (0030b00000000000000001) ;
+SDR 82 TDI (0030c00000000000000001) ;
+SDR 82 TDI (0030c41000c00000000001) ;
+SDR 82 TDI (0030c80000800000000001) ;
+SDR 82 TDI (0030cc0000800000000001) ;
+SDR 82 TDI (0030d00000800000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0031000000000000800000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0031000000000000800001) ;
+SDR 82 TDI (0031040000000080a00001) ;
+SDR 82 TDI (0031080000000000200001) ;
+SDR 82 TDI (00310c0000000000000001) ;
+SDR 82 TDI (0031100000000000000001) ;
+SDR 82 TDI (0031200000000000000001) ;
+SDR 82 TDI (0031240000400000000001) ;
+SDR 82 TDI (0031288000000000000001) ;
+SDR 82 TDI (00312c1000000000000001) ;
+SDR 82 TDI (0031300000000000000001) ;
+SDR 82 TDI (0031400000000000800021) ;
+SDR 82 TDI (0031440000000000040001) ;
+SDR 82 TDI (0031484000000000000001) ;
+SDR 82 TDI (00314c0400002000800001) ;
+SDR 82 TDI (0031500000000000800003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0031800000000080000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0031800000000080000001) ;
+SDR 82 TDI (0031840000000000000001) ;
+SDR 82 TDI (0031880000000000000001) ;
+SDR 82 TDI (00318c0000000000000001) ;
+SDR 82 TDI (0031900000000000000001) ;
+SDR 82 TDI (0031a00000000000000001) ;
+SDR 82 TDI (0031a40000000080000001) ;
+SDR 82 TDI (0031a80000000080000001) ;
+SDR 82 TDI (0031ac0000000080000001) ;
+SDR 82 TDI (0031b00000000000000001) ;
+SDR 82 TDI (0031c00000000000000001) ;
+SDR 82 TDI (0031c40000000080000001) ;
+SDR 82 TDI (0031c80000000080000001) ;
+SDR 82 TDI (0031cc0000000080000001) ;
+SDR 82 TDI (0031d00000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0032002000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0032002000000000000001) ;
+SDR 82 TDI (0032040000000000080001) ;
+SDR 82 TDI (0032080000000000000001) ;
+SDR 82 TDI (00320c0000000000000001) ;
+SDR 82 TDI (0032100000000000000001) ;
+SDR 82 TDI (0032200800004000000001) ;
+SDR 82 TDI (0032248000400000000001) ;
+SDR 82 TDI (0032280000000000000001) ;
+SDR 82 TDI (00322c0000000000000001) ;
+SDR 82 TDI (0032300000000000000001) ;
+SDR 82 TDI (0032400000000000000001) ;
+SDR 82 TDI (0032444000000000000001) ;
+SDR 82 TDI (0032480000000000000001) ;
+SDR 82 TDI (00324c0000000000000001) ;
+SDR 82 TDI (0032500000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0032800000000000f00000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0032800000000000f00001) ;
+SDR 82 TDI (0032840000000000f00001) ;
+SDR 82 TDI (0032880000000000f00001) ;
+SDR 82 TDI (00328c0000000000e00001) ;
+SDR 82 TDI (0032900000000000e00001) ;
+SDR 82 TDI (0032a00010000000280001) ;
+SDR 82 TDI (0032a40010000000a80001) ;
+SDR 82 TDI (0032a80010000000a80001) ;
+SDR 82 TDI (0032ac0010000000680001) ;
+SDR 82 TDI (0032b00010000000700001) ;
+SDR 82 TDI (0032c00000000000000001) ;
+SDR 82 TDI (0032c40000000000880001) ;
+SDR 82 TDI (0032c80000000000880001) ;
+SDR 82 TDI (0032cc0000000000880001) ;
+SDR 82 TDI (0032d00000000000880003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0033000000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0033000000000000000001) ;
+SDR 82 TDI (0033040008000000000001) ;
+SDR 82 TDI (0033080008100000000001) ;
+SDR 82 TDI (00330c0000000000000001) ;
+SDR 82 TDI (0033100020000000000001) ;
+SDR 82 TDI (0033200000000000000001) ;
+SDR 82 TDI (0033240000240008000001) ;
+SDR 82 TDI (0033280020000000000001) ;
+SDR 82 TDI (00332c0000000000000001) ;
+SDR 82 TDI (0033300000000000000001) ;
+SDR 82 TDI (0033400000000000000001) ;
+SDR 82 TDI (0033440000300000000001) ;
+SDR 82 TDI (0033480000040000000001) ;
+SDR 82 TDI (00334c0000000000000001) ;
+SDR 82 TDI (0033500000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0033800000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0033800000000000000001) ;
+SDR 82 TDI (0033840000800000000001) ;
+SDR 82 TDI (0033880000000000000001) ;
+SDR 82 TDI (00338c0000000000000001) ;
+SDR 82 TDI (0033900000000000000001) ;
+SDR 82 TDI (0033a00000000000000001) ;
+SDR 82 TDI (0033a40000000000000001) ;
+SDR 82 TDI (0033a80000000000000001) ;
+SDR 82 TDI (0033ac0000000000000001) ;
+SDR 82 TDI (0033b00000000000000001) ;
+SDR 82 TDI (0033c00000000000000011) ;
+SDR 82 TDI (0033c40000000000000001) ;
+SDR 82 TDI (0033c80000000000000001) ;
+SDR 82 TDI (0033cc0000000000000001) ;
+SDR 82 TDI (0033d00000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0034000000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0034000000000000000001) ;
+SDR 82 TDI (0034040000000800000001) ;
+SDR 82 TDI (0034080000000800000001) ;
+SDR 82 TDI (00340c0000000800000001) ;
+SDR 82 TDI (0034100000000800000001) ;
+SDR 82 TDI (0034200000000000000001) ;
+SDR 82 TDI (0034240000000800000001) ;
+SDR 82 TDI (0034280000000800000001) ;
+SDR 82 TDI (00342c0000000000000001) ;
+SDR 82 TDI (0034300000000000000001) ;
+SDR 82 TDI (0034400000000000000001) ;
+SDR 82 TDI (0034440000000000000001) ;
+SDR 82 TDI (0034480000000000000001) ;
+SDR 82 TDI (00344c0000000000000001) ;
+SDR 82 TDI (0034500000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0034800000000800000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0034800000000800000001) ;
+SDR 82 TDI (0034840000000000000001) ;
+SDR 82 TDI (0034880000000000000001) ;
+SDR 82 TDI (00348c0000000000000001) ;
+SDR 82 TDI (0034900000000000000001) ;
+SDR 82 TDI (0034a00000000000000001) ;
+SDR 82 TDI (0034a40000000000000001) ;
+SDR 82 TDI (0034a80000000000000001) ;
+SDR 82 TDI (0034ac0000000000000001) ;
+SDR 82 TDI (0034b00000000000000001) ;
+SDR 82 TDI (0034c00000000000000001) ;
+SDR 82 TDI (0034c40000000000000001) ;
+SDR 82 TDI (0034c80000000000000001) ;
+SDR 82 TDI (0034cc0004000000000001) ;
+SDR 82 TDI (0034d00000000000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0035000000000000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0035000000000000000001) ;
+SDR 82 TDI (0035040000000000000001) ;
+SDR 82 TDI (0035080000040000000001) ;
+SDR 82 TDI (00350c0000040000000001) ;
+SDR 82 TDI (0035100000040000000001) ;
+SDR 82 TDI (0035200000000000000001) ;
+SDR 82 TDI (0035240000000000000001) ;
+SDR 82 TDI (0035280000000000000001) ;
+SDR 82 TDI (00352c8000000000000001) ;
+SDR 82 TDI (0035301000000000000001) ;
+SDR 82 TDI (0035400000000020000001) ;
+SDR 82 TDI (0035440000000000000001) ;
+SDR 82 TDI (0035480000800000000001) ;
+SDR 82 TDI (00354c0000000000000001) ;
+SDR 82 TDI (0035504400002000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0035800000000000500000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+SDR 82 TDI (0035800000000000500001) ;
+SDR 82 TDI (0035840000040000400001) ;
+SDR 82 TDI (0035880000000000c00001) ;
+SDR 82 TDI (00358c0000000000200001) ;
+SDR 82 TDI (0035900000000000000001) ;
+SDR 82 TDI (0035a00000000000280001) ;
+SDR 82 TDI (0035a40000000000a80001) ;
+SDR 82 TDI (0035a80000000000880001) ;
+SDR 82 TDI (0035ac0000000000280001) ;
+SDR 82 TDI (0035b00000000000200001) ;
+SDR 82 TDI (0035c00000804000000001) ;
+SDR 82 TDI (0035c40010800000000001) ;
+SDR 82 TDI (0035c80010000000000001) ;
+SDR 82 TDI (0035cc0000800000000001) ;
+SDR 82 TDI (0035d00000800000000003) ;
+RUNTEST 20000 TCK;
+SDR 82 TDI (0035d00000800000000000) TDO (0000000000000000000001) MASK (0000000000000000000003) ;
+// Loading devices with 'conld' or 'bypass' instruction.
+SIR 8 TDI (f0) ;
+RUNTEST 100 TCK;
+TIR 0 ;
+HIR 0 ;
+HDR 0 ;
+TDR 0 ;
+//Loading device with 'ispen' instruction.
+SIR 8 TDI (e8) ;
+SDR 6 TDI (05) SMASK (3f) ;
+//Loading device with 'ispen' instruction.
+SIR 8 TDI (e8) ;
+SDR 6 TDI (05) ;
+// Loading device with a 'fvfy' instruction. 
+SIR 8 TDI (ee) ;
+SDR 82 TDI (0000000000002000a00083) SMASK (03ffffffffffffffffffff) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0000040008000000a40003) TDO (0000000000002000a00081) MASK (03ffffffffffffffffffff) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0000082008000000240003) TDO (0000040008000000a40001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00000c0000000000040003) TDO (0000082008000000240001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0000104020000000000003) TDO (00000c0000000000040001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0000200000002800400003) TDO (0000104020000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0000241000000040500003) TDO (0000200000002800400001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0000280820002040500003) TDO (0000241000000040500001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00002c0000000000500003) TDO (0000280820002040500001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0000308000000000500003) TDO (00002c0000000000500001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0000400000004000000003) TDO (0000308000000000500001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0000440400000060800003) TDO (0000400000004000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000048a000004040800003) TDO (0000440400000060800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00004c0000000000800003) TDO (000048a000004040800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0000500000000000800003) TDO (00004c0000000000800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0000800000000000000003) TDO (0000500000000000800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0000840000202000000003) TDO (0000800000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0000888000000000000003) TDO (0000840000202000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00008c0000800000000003) TDO (0000888000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0000900000000000000003) TDO (00008c0000800000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0000a00000000000000003) TDO (0000900000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0000a42000002000800003) TDO (0000a00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0000a80000000000000003) TDO (0000a42000002000800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0000ac0000002000200003) TDO (0000a80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0000b00000000000000003) TDO (0000ac0000002000200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0000c00000000000000003) TDO (0000b00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0000c40000804000000003) TDO (0000c00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0000c80000800000000003) TDO (0000c40000804000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0000cc0000004000000003) TDO (0000c80000800000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0000d00000000000000003) TDO (0000cc0000004000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0001000000000000000003) TDO (0000d00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0001040000000000000103) TDO (0001000000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0001080000000000000103) TDO (0001040000000000000101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00010c2000000000000103) TDO (0001080000000000000101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0001100000000000000003) TDO (00010c2000000000000101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0001200000000000000003) TDO (0001100000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0001240000000000000003) TDO (0001200000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0001280000000004000003) TDO (0001240000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00012c0800004000000003) TDO (0001280000000004000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0001300000000000000003) TDO (00012c0800004000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0001400000000000000003) TDO (0001300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0001440000000000000003) TDO (0001400000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0001480000000000000003) TDO (0001440000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00014ca000000000000003) TDO (0001480000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0001500000000000000003) TDO (00014ca000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0001800000002000000003) TDO (0001500000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0001840000040000000003) TDO (0001800000002000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0001880000000000000003) TDO (0001840000040000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00018c0000000000000003) TDO (0001880000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0001900000240000000003) TDO (00018c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0001a00000000004000003) TDO (0001900000240000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0001a40000800000000003) TDO (0001a00000000004000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0001a80000000000000003) TDO (0001a40000800000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0001ac0000000000000003) TDO (0001a80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0001b00000000000000003) TDO (0001ac0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0001c00000000000000003) TDO (0001b00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0001c40000000000000003) TDO (0001c00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0001c80000000000000003) TDO (0001c40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0001cc0000000000000003) TDO (0001c80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0001d00000000000000003) TDO (0001cc0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0002000080000040000003) TDO (0001d00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0002040080000040000003) TDO (0002000080000040000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000208c040000000000003) TDO (0002040080000040000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00020c0400000000000003) TDO (000208c040000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0002100000000000000003) TDO (00020c0400000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0002201000000000000003) TDO (0002100000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0002242000000000000083) TDO (0002201000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0002280000000000000003) TDO (0002242000000000000081) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00022c0000000000000003) TDO (0002280000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0002300000000000000003) TDO (00022c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0002400400000000000003) TDO (0002300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0002440004000008000003) TDO (0002400400000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0002480004000008000003) TDO (0002440004000008000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00024c0000000000040003) TDO (0002480004000008000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0002500000000000040003) TDO (00024c0000000000040001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0002802000000000000003) TDO (0002500000000000040001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0002842000040800000003) TDO (0002802000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0002880000000800000003) TDO (0002842000040800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00028c2000000800000003) TDO (0002880000000800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0002906400240c00000003) TDO (00028c2000000800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0002a08800000000000083) TDO (0002906400240c00000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0002a49840800800000003) TDO (0002a08800000000000081) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0002a89040008800000003) TDO (0002a49840800800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0002ac9800008400000003) TDO (0002a89040008800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0002b01880008400000003) TDO (0002ac9800008400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0002c04000001400000003) TDO (0002b01880008400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0002c46400000800000003) TDO (0002c04000001400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0002c8c400001800040003) TDO (0002c46400000800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0002ccac40001800000003) TDO (0002c8c400001800040001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0002d0e400001000000003) TDO (0002ccac40001800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0003001008048800040103) TDO (0002d0e400001000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0003040080000000000003) TDO (0003001008048800040101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0003080080004000000303) TDO (0003040080000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00030c0080000000000103) TDO (0003080080004000000301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0003100000400000000103) TDO (00030c0080000000000101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0003200000040000140103) TDO (0003100000400000000101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0003240000000080000203) TDO (0003200000040000140101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0003280000040080000003) TDO (0003240000000080000201) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00032c0000100480000003) TDO (0003280000040080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0003300000000400000003) TDO (00032c0000100480000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0003400804000000080003) TDO (0003300000000400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0003440000080080000003) TDO (0003400804000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0003480800080080000003) TDO (0003440000080080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00034c0840000080000003) TDO (0003480800080080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0003500020001000000003) TDO (00034c0840000080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0003800000080000000143) TDO (0003500020001000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0003840000001000000103) TDO (0003800000080000000141) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0003880010008800000003) TDO (0003840000001000000101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00038c0004001480000303) TDO (0003880010008800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0003900010008800000103) TDO (00038c0004001480000301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0003a00000000410000003) TDO (0003900010008800000101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0003a40000108000000103) TDO (0003a00000000410000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0003a80040100c00000103) TDO (0003a40000108000000101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0003ac0000000000000003) TDO (0003a80040100c00000101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0003b00004001000000003) TDO (0003ac0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0003c00040000000000003) TDO (0003b00004001000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0003c40080009000000003) TDO (0003c00040000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0003c800c4000000000003) TDO (0003c40080009000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0003cc0080008000000083) TDO (0003c800c4000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0003d00080000000000003) TDO (0003cc0080008000000081) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0004000000040000500023) TDO (0003d00080000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0004040000400000500003) TDO (0004000000040000500021) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0004084000000040d00003) TDO (0004040000400000500001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00040c4400000000e00003) TDO (0004084000000040d00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0004100800000000e00003) TDO (00040c4400000000e00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0004201000040000280007) TDO (0004100800000000e00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0004240000080000280003) TDO (0004201000040000280005) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0004280000000000280003) TDO (0004240000080000280001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00042c0000000000080003) TDO (0004280000000000280001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0004300000000000000003) TDO (00042c0000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0004400420000000000007) TDO (0004300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0004448000080000080003) TDO (0004400420000000000005) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0004480800080000080003) TDO (0004448000080000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00044c0000000000080003) TDO (0004480800080000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0004501000000000080003) TDO (00044c0000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0004800000000000000003) TDO (0004501000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0004840000080000000003) TDO (0004800000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0004888000080000000003) TDO (0004840000080000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00048c0000400000000003) TDO (0004888000080000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0004902000000000000003) TDO (00048c0000400000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0004a00040080000000003) TDO (0004902000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0004a42000100000000003) TDO (0004a00040080000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0004a84000140000000003) TDO (0004a42000100000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0004ac4000100000000003) TDO (0004a84000140000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0004b00800000000000003) TDO (0004ac4000100000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0004c00000000400000003) TDO (0004b00800000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0004c40000000000000003) TDO (0004c00000000400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0004c80000000000000003) TDO (0004c40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0004cc0800000000000003) TDO (0004c80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0004d0a000000000000003) TDO (0004cc0800000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0005000000440000000003) TDO (0004d0a000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0005040000000000000003) TDO (0005000000440000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0005080000000000000003) TDO (0005040000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00050c0000000000080003) TDO (0005080000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0005100000000000000003) TDO (00050c0000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0005200000040000000003) TDO (0005100000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0005240000080080000003) TDO (0005200000040000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0005280000000080000003) TDO (0005240000080080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00052c0000000080000003) TDO (0005280000000080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0005300000000000000003) TDO (00052c0000000080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0005400000000000000003) TDO (0005300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0005440004080080000003) TDO (0005400000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0005480004080080000003) TDO (0005440004080080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00054c0000000080000003) TDO (0005480004080080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0005500000000000000003) TDO (00054c0000000080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0005800000000000f00003) TDO (0005500000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0005840000080000f00003) TDO (0005800000000000f00001) MASK (03fffcfcfcfcfcfcfcfcff) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0005880000080000f00003) TDO (0005840000080000f00001) MASK (03ffffffffffffffffffff) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00058c0000400000e00003) TDO (0005880000080000f00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0005900000000000e00003) TDO (00058c0000400000e00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0005a00000080000280003) TDO (0005900000000000e00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0005a40000100010a80003) TDO (0005a00000080000280001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0005a80000140000a80003) TDO (0005a40000100010a80001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0005ac0000100000680003) TDO (0005a80000140000a80001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0005b00000000000700003) TDO (0005ac0000100000680001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0005c00000080400000003) TDO (0005b00000000000700001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0005c40000000000880003) TDO (0005c00000080400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0005c80000000000880003) TDO (0005c40000000000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0005cc0000000000880003) TDO (0005c80000000000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0005d00000000000880003) TDO (0005cc0000000000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0006000303010301120313) TDO (0005d00000000000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0006050203020300420303) TDO (0006000303010301120311) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00060a0303010301520303) TDO (0006050203020300420301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00060d0303030300020303) TDO (00060a0303010301520301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0006120303010301c20303) TDO (00060d0303030300020301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0006210103030302030303) TDO (0006120303010301c20301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0006260103020300230303) TDO (0006210103030302030301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00062803030103022b0303) TDO (0006260103020300230301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00062f0103000303090303) TDO (00062803030103022b0301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0006300000000000000003) TDO (00062f0103000303090301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0006400000000020000003) TDO (0006300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0006440004000000000003) TDO (0006400000000020000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0006480004000000000003) TDO (0006440004000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00064c4000000000080003) TDO (0006480004000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0006500000000000080003) TDO (00064c4000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0006830000020002400003) TDO (0006500000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0006860100010003100003) TDO (0006830000020002400001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0006890000020000800003) TDO (0006860100010003100001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00068e0000000003e00003) TDO (0006890000020000800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0006910000020002200003) TDO (00068e0000000003e00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0006a20200000001280003) TDO (0006910000020002200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0006a50200010003880003) TDO (0006a20200000001280001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0006ab0000060001800003) TDO (0006a50200010003880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0006ac0200030000200003) TDO (0006ab0000060001800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0006b00000000000200003) TDO (0006ac0200030000200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0006c00000000400000003) TDO (0006b00000000000200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0006c40000000000080003) TDO (0006c00000000400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0006c80000000000080003) TDO (0006c40000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0006cc0000000000000003) TDO (0006c80000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0006d00000000000000003) TDO (0006cc0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0007000302010001004043) TDO (0006d00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0007040203020100000003) TDO (0007000302010001004041) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0007080103000201000003) TDO (0007040203020100000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00070d0303034200000003) TDO (0007080103000201000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0007120103000301000003) TDO (00070d0303034200000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0007200101020302000003) TDO (0007120103000301000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0007260103020200040003) TDO (0007200101020302000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0007280301010300000203) TDO (0007260103020200040001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00072f0003000301000203) TDO (0007280301010300000201) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0007300000000000000003) TDO (00072f0003000301000201) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0007400000000000802003) TDO (0007300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0007440000000000000003) TDO (0007400000000000802001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0007480000000000000003) TDO (0007440000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00074c0000000000000083) TDO (0007480000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0007500000000000000003) TDO (00074c0000000000000081) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0007830001020002000003) TDO (0007500000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0007870103010003000003) TDO (0007830001020002000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00078b0202030000000003) TDO (0007870103010003000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00078e1000000003000003) TDO (00078b0202030000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0007910200030002000003) TDO (00078e1000000003000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0007a30202010001000003) TDO (0007910200030002000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0007a40208010003000003) TDO (0007a30202010001000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0007ab0002060003000003) TDO (0007a40208010003000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0007ac0301030002000003) TDO (0007ab0002060003000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0007b00000000000000003) TDO (0007ac0301030002000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0007c00000000000000003) TDO (0007b00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0007c40000000000000003) TDO (0007c00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0007c80000000000000003) TDO (0007c40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0007cc4000000000000003) TDO (0007c80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0007d00000000000000003) TDO (0007cc4000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000800030601004100000b) TDO (0007d00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0008040017000100000003) TDO (0008000306010041000009) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0008080107800001000003) TDO (0008040017000100000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00080d1313030200000003) TDO (0008080107800001000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0008120085000201000003) TDO (00080d1313030200000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0008200001000322000003) TDO (0008120085000201000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0008260143020040000003) TDO (0008200001000322000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0008280301010280000003) TDO (0008260143020040000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00082f0007000201000003) TDO (0008280301010280000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0008300000000000000003) TDO (00082f0007000201000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0008400080000008000003) TDO (0008300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0008440044000048000003) TDO (0008400080000008000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0008480000000088000003) TDO (0008440044000048000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00084c0000000000000003) TDO (0008480000000088000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0008500000000000000003) TDO (00084c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0008830009000002300007) TDO (0008500000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0008850380030003300003) TDO (0008830009000002300005) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00088b0280130000300003) TDO (0008850380030003300001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00088e0080000223200003) TDO (00088b0280130000300001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0008910200030002200003) TDO (00088e0080000223200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0008a302000300c1200043) TDO (0008910200030002200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0008a40200010003300003) TDO (0008a302000300c1200041) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0008ab0000020003300003) TDO (0008a40200010003300001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0008ac0300030002100003) TDO (0008ab0000020003300001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0008b00000000000100003) TDO (0008ac0300030002100001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0008c000040000d0101003) TDO (0008b00000000000100001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0008c40000000000100003) TDO (0008c000040000d0101001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0008c80000040000100003) TDO (0008c40000000000100001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0008cc4040004000100003) TDO (0008c80000040000100001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0008d00020000000100003) TDO (0008cc4040004000100001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0009000302010201000003) TDO (0008d00020000000100001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0009040006000000000003) TDO (0009000302010201000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000908000c080001000003) TDO (0009040006000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00090d1216038000000003) TDO (000908000c080001000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000912001400d001000003) TDO (00090d1216038000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0009220000008002000203) TDO (000912001400d001000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0009250102028e08800203) TDO (0009220000008002000201) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0009280321110e00800003) TDO (0009250102028e08800201) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00092f0003000201200203) TDO (0009280321110e00800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0009300010008000200003) TDO (00092f0003000201200201) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0009400000000000000003) TDO (0009300010008000200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0009440040001000000003) TDO (0009400000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0009480050080000000003) TDO (0009440040001000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00094c00a0000c00000003) TDO (0009480050080000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0009500080000000000003) TDO (00094c00a0000c00000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0009830005080202000003) TDO (0009500080000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0009850118038003000003) TDO (0009830005080202000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00098b0310439000000003) TDO (0009850118038003000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00098e0000001803000003) TDO (00098b0310439000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00099100a0020802000003) TDO (00098e0000001803000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0009a30200130401000203) TDO (00099100a0020802000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0009a50200010202000283) TDO (0009a30200130401000201) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0009ab00000a0001000003) TDO (0009a50200010202000281) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0009ac0210038002000203) TDO (0009ab00000a0001000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0009b00000004000000003) TDO (0009ac0210038002000201) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0009c000c0088000000003) TDO (0009b00000004000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0009c40090008000000003) TDO (0009c000c0088000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0009c800a0000800000003) TDO (0009c40090008000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0009cc4000000000000003) TDO (0009c800a0000800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0009d00000008000500003) TDO (0009cc4000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000a000302090000100003) TDO (0009d00000008000500001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000a040000000000400003) TDO (000a000302090000100001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000a080000400001500003) TDO (000a040000000000400001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000a0d0202030000000003) TDO (000a080000400001500001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000a120000000000c00003) TDO (000a0d0202030000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000a200000100002000003) TDO (000a120000000000c00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000a240102020000200003) TDO (000a200000100002000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000a280100090000280003) TDO (000a240102020000200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000a2f0002000001080003) TDO (000a280100090000280001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000a300000000000000003) TDO (000a2f0002000001080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000a400000080000000003) TDO (000a300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000a440000000000000003) TDO (000a400000080000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000a480000000000000003) TDO (000a440000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000a4c0000000000080003) TDO (000a480000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000a500000000000080003) TDO (000a4c0000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000a830001000003400003) TDO (000a500000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000a850100090003100003) TDO (000a830001000003400001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000a8b0300020000800003) TDO (000a850100090003100001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000a8e0000000003e00003) TDO (000a8b0300020000800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000a910000020003200003) TDO (000a8e0000000003e00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000aa20000000001280003) TDO (000a910000020003200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000aa40200110002880003) TDO (000aa20000000001280001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000aab0200020001800003) TDO (000aa40200110002880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000aac0200032002200003) TDO (000aab0200020001800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000ab00000000000200003) TDO (000aac0200032002200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000ac00000000000000003) TDO (000ab00000000000200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000ac40000080000080003) TDO (000ac00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000ac80000000000080003) TDO (000ac40000080000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000acc4000000000000003) TDO (000ac80000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000ad00000000000000003) TDO (000acc4000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000b000104001001001103) TDO (000ad00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000b040006011a00000003) TDO (000b000104001001001101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000b080004001e01000003) TDO (000b040006011a00000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000b0d0306021c00000003) TDO (000b080004001e01000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000b130003001c01000003) TDO (000b0d0306021c00000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000b210001010400001003) TDO (000b130003001c01000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000b270042000c00000003) TDO (000b210001010400001001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000b290240008c06000003) TDO (000b270042000c00000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000b2f0005009500020003) TDO (000b290240008c06000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000b300084009400000003) TDO (000b2f0005009500020001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000b400000001000000003) TDO (000b300084009400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000b440000001800000003) TDO (000b400000001000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000b480080009800000003) TDO (000b440000001800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000b4c00c0009800000003) TDO (000b480080009800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000b500000009000000003) TDO (000b4c00c0009800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000b800100010001000003) TDO (000b500000009000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000b840040000000000003) TDO (000b800100010001000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000b8a0000020001000003) TDO (000b840040000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000b8d0200260000000003) TDO (000b8a0000020001000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000b920000000000000003) TDO (000b8d0200260000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000ba00000000002000003) TDO (000b920000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000ba40082000000000003) TDO (000ba00000000002000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000ba90200010000000003) TDO (000ba40082000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000baf0000000001000003) TDO (000ba90200010000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000bb00000000000000003) TDO (000baf0000000001000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000bc00000000000000003) TDO (000bb00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000bc40000400000000003) TDO (000bc00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000bc80000000000000003) TDO (000bc40000400000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000bcc4000000000000003) TDO (000bc80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000bd00000800000000003) TDO (000bcc4000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000c001300010040000003) TDO (000bd00000800000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000c040100018440000003) TDO (000c001300010040000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000c080000008001000003) TDO (000c040100018440000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000c0d0200038800000003) TDO (000c080000008001000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000c130000028801000003) TDO (000c0d0200038800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000c200000000002000003) TDO (000c130000028801000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000c240002000800000003) TDO (000c200000000002000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000c280100011800000003) TDO (000c240002000800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000c2f0002010001000003) TDO (000c280100011800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000c300000000000000003) TDO (000c2f0002010001000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000c400000400000000003) TDO (000c300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000c440000000000000003) TDO (000c400000400000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000c480000000000000003) TDO (000c440000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000c4c0000000000000003) TDO (000c480000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000c500000000000000003) TDO (000c4c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000c830001020422000003) TDO (000c500000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000c850300010802000003) TDO (000c830001020422000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000c880100010800000003) TDO (000c850300010802000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000c8c0000000001000083) TDO (000c880100010800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000c910200030001000003) TDO (000c8c0000000001000081) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000ca30000020001000003) TDO (000c910200030001000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000ca40000001002000003) TDO (000ca30000020001000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000ca80002000002000003) TDO (000ca40000001002000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000cac0100010000000003) TDO (000ca80002000002000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000cb00000000400000003) TDO (000cac0100010000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000cc00000000000000003) TDO (000cb00000000400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000cc40008000000000003) TDO (000cc00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000cc80000000000000003) TDO (000cc40008000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000ccc0000001000000043) TDO (000cc80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000cd00000000000000003) TDO (000ccc0000001000000041) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000d000703010301c20303) TDO (000cd00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000d054703034300c20303) TDO (000d000703010301c20301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000d0a0303030301c20303) TDO (000d054703034300c20301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000d0d0303030300c20303) TDO (000d0a0303030301c20301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000d130303030301c20303) TDO (000d0d0303030300c20301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000d230103030306430303) TDO (000d130303030301c20301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000d270103020304c30303) TDO (000d230103030306430301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000d290303010302c30303) TDO (000d270103020304c30301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000d2f0103010303430303) TDO (000d290303010302c30301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000d304000000000400003) TDO (000d2f0103010303430301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000d400000000000400003) TDO (000d304000000000400001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000d440000000000400083) TDO (000d400000000000400001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000d480000000000400003) TDO (000d440000000000400081) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000d4c0000000000400003) TDO (000d480000000000400001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000d500000000000400003) TDO (000d4c0000000000400001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000d802000000000000003) TDO (000d500000000000400001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000d842000000000000003) TDO (000d802000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000d882c00000000000003) TDO (000d842000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000d8c2c00000000000003) TDO (000d882c00000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000d902c00000000000003) TDO (000d8c2c00000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000da09800000000000003) TDO (000d902c00000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000da49800000000000003) TDO (000da09800000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000da89800000000000003) TDO (000da49800000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000dac9c00000000000003) TDO (000da89800000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000db09c00000000000003) TDO (000dac9c00000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000dc08400000000000083) TDO (000db09c00000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000dc48404000000000003) TDO (000dc08400000000000081) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000dc89404000000000003) TDO (000dc48404000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000dcc9400000000000003) TDO (000dc89404000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000dd09400000000000003) TDO (000dcc9400000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000e002000000040000003) TDO (000dd09400000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000e042018000040000003) TDO (000e002000000040000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000e08e018000000000003) TDO (000e042018000040000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000e0c6410000000000003) TDO (000e08e018000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000e106cb4000000000003) TDO (000e0c6410000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000e209800000000000003) TDO (000e106cb4000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000e24b800000000000003) TDO (000e209800000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000e289820000000000003) TDO (000e24b800000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000e2c9800000000000003) TDO (000e289820000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000e309800000000000003) TDO (000e2c9800000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000e4044c0000000000003) TDO (000e309800000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000e44e4d0000000000003) TDO (000e4044c0000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000e48ec50000000000003) TDO (000e44e4d0000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000e4cac00000000000003) TDO (000e48ec50000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000e50f480000000000003) TDO (000e4cac00000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000e804060000000c00003) TDO (000e50f480000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000e840000000000c00003) TDO (000e804060000000c00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000e880000000000c00003) TDO (000e840000000000c00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000e8c0000000000c00003) TDO (000e880000000000c00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000e900000000000c00003) TDO (000e8c0000000000c00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000ea00010000000400003) TDO (000e900000000000c00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000ea44000000000400003) TDO (000ea00010000000400001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000ea80000000000400003) TDO (000ea44000000000400001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000eac0004000000400003) TDO (000ea80000000000400001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000eb00004000000400003) TDO (000eac0004000000400001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000ec00000000008400003) TDO (000eb00004000000400001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000ec40000004000400083) TDO (000ec00000000008400001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000ec80000000000400003) TDO (000ec40000004000400081) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000ecc0000000000400003) TDO (000ec80000000000400001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000ed00000000000400003) TDO (000ecc0000000000400001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000f000000000000000003) TDO (000ed00000000000400001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000f050300038300000003) TDO (000f000000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000f0a0200028000000003) TDO (000f050300038300000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000f0c0000008000000003) TDO (000f0a0200028000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000f110302038100000003) TDO (000f0c0000008000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000f230102038100000003) TDO (000f110302038100000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000f240000008000800003) TDO (000f230102038100000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000f290102000002800003) TDO (000f240000008000800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000f2c0100010001200003) TDO (000f290102000002800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000f300000000000200003) TDO (000f2c0100010001200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000f400000008000000003) TDO (000f300000000000200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000f440000008000000003) TDO (000f400000008000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000f480000000000000003) TDO (000f440000008000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000f4c0000000000000003) TDO (000f480000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000f500000000000000003) TDO (000f4c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000f800000008000000003) TDO (000f500000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000f840000000880000003) TDO (000f800000008000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000f880000240800000003) TDO (000f840000000880000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000f8c0000000800000003) TDO (000f880000240800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000f900000800800000003) TDO (000f8c0000000800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000fa00000000000000003) TDO (000f900000800800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000fa40000000800000003) TDO (000fa00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000fa80000000800000003) TDO (000fa40000000800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000fac0000000000000003) TDO (000fa80000000800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000fb00000000000000003) TDO (000fac0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000fc00000000000000803) TDO (000fb00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000fc40000000000500003) TDO (000fc00000000000000801) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000fc80000001000000003) TDO (000fc40000000000500001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000fcc0000800000000003) TDO (000fc80000001000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (000fd00000000000000003) TDO (000fcc0000800000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0010000200200400000003) TDO (000fd00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0010050300138200000003) TDO (0010000200200400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00100a0200128400000003) TDO (0010050300138200000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00100c2000008c00000003) TDO (00100a0200128400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0010110300028c00000203) TDO (00100c2000008c00000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0010210102038500000003) TDO (0010110300028c00000201) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0010240000008c00000003) TDO (0010210102038500000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0010290100009c82000003) TDO (0010240000008c00000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00102c0900218480000003) TDO (0010290100009c82000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0010300000008000080003) TDO (00102c0900218480000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0010400000808000000003) TDO (0010300000008000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0010440000048000000003) TDO (0010400000808000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0010480000048000000003) TDO (0010440000048000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00104ca000108000000003) TDO (0010480000048000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0010500000008000000003) TDO (00104ca000108000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0010800100810301700313) TDO (0010500000008000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0010840000240c00d00203) TDO (0010800100810301700311) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0010880100250b01f00203) TDO (0010840000240c00d00201) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00108d0300a70300e00303) TDO (0010880100250b01f00201) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0010920002a50201e00103) TDO (00108d0300a70300e00301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0010a20000a01282292303) TDO (0010920002a50201e00101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0010a70100820380a80303) TDO (0010a20000a01282292301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0010a80200010300a80103) TDO (0010a70100820380a80301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0010af00000003032a0303) TDO (0010a80200010300a80101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0010b00000000000600003) TDO (0010af00000003032a0301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0010c00000340000000003) TDO (0010b00000000000600001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0010c40000c00000080003) TDO (0010c00000340000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0010c80000800000880003) TDO (0010c40000c00000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0010cc0000801000080003) TDO (0010c80000800000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0010d00000800000880003) TDO (0010cc0000801000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0011000003000000020003) TDO (0010d00000800000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0011040403000100000103) TDO (0011000003000000020001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0011080003000000020103) TDO (0011040403000100000101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00110c0003000000020003) TDO (0011080003000000020101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0011100401000100020003) TDO (00110c0003000000020001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0011200001000000020003) TDO (0011100401000100020001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0011240003000000030003) TDO (0011200001000000020001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0011280003000080030203) TDO (0011240003000000030001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00112c0003000080010003) TDO (0011280003000080030201) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0011300000000000000003) TDO (00112c0003000080010001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0011408000000000000003) TDO (0011300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0011440004000080000003) TDO (0011408000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0011480004000000000003) TDO (0011440004000080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00114c0000000000000003) TDO (0011480004000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0011500000000000000003) TDO (00114c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0011800400000000000003) TDO (0011500000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0011840002000000020003) TDO (0011800400000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0011880002000000000103) TDO (0011840002000000020001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00118c0000000000020103) TDO (0011880002000000000101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0011900000010000000003) TDO (00118c0000000000020101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0011a00000200000000003) TDO (0011900000010000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0011a40000000080000003) TDO (0011a00000200000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0011a80002200000030003) TDO (0011a40000000080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0011ac0001200000010003) TDO (0011a80002200000030001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0011b00400000000000003) TDO (0011ac0001200000010001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0011c00000000400000003) TDO (0011b00400000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0011c40000000000000003) TDO (0011c00000000400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0011c80000000080000003) TDO (0011c40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0011cc0000000080000003) TDO (0011c80000000080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0011d00000000000000003) TDO (0011cc0000000080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0012000000000000000003) TDO (0011d00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0012040000000000000003) TDO (0012000000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0012080000000000000003) TDO (0012040000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00120c0000000000000003) TDO (0012080000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0012100000000000000003) TDO (00120c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0012200000000000000003) TDO (0012100000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0012240000000040000003) TDO (0012200000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0012280000000040000003) TDO (0012240000000040000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00122c0000000000000003) TDO (0012280000000040000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0012300000000000000003) TDO (00122c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0012400000000000000003) TDO (0012300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0012440004000060000003) TDO (0012400000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0012480004000040000003) TDO (0012440004000060000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00124c0000000000000003) TDO (0012480004000040000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0012500000000000000003) TDO (00124c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0012800000000204000003) TDO (0012500000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0012840000000000000003) TDO (0012800000000204000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0012880000000000000003) TDO (0012840000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00128c0000000000000003) TDO (0012880000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0012900000000000000003) TDO (00128c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0012a20000000000000203) TDO (0012900000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0012a50000000200000203) TDO (0012a20000000000000201) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0012a80000000000000003) TDO (0012a50000000200000201) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0012ac0000000000000203) TDO (0012a80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0012b00000000000000003) TDO (0012ac0000000000000201) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0012c00000000004000003) TDO (0012b00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0012c40000000000000003) TDO (0012c00000000004000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0012c80000000000000003) TDO (0012c40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0012cc0000000000000003) TDO (0012c80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0012d00000000000000003) TDO (0012cc0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0013000000000040000003) TDO (0012d00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0013040000000040000003) TDO (0013000000000040000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0013080000000000000003) TDO (0013040000000040000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00130c0000000000000003) TDO (0013080000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0013100000000000080003) TDO (00130c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0013200000000000000003) TDO (0013100000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0013240000000000000003) TDO (0013200000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0013280000004000000003) TDO (0013240000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00132c0000000000000003) TDO (0013280000004000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0013300000000000040003) TDO (00132c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0013400000000000000003) TDO (0013300000000000040001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0013440000002400000003) TDO (0013400000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0013480000000400000003) TDO (0013440000002400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00134c0000000400000003) TDO (0013480000000400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0013500000000000000003) TDO (00134c0000000400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0013800002000100f00003) TDO (0013500000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0013840001000000f00003) TDO (0013800002000100f00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0013880100010101f40003) TDO (0013840001000000f00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00138c0201010300e00003) TDO (0013880100010101f40001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0013900000000200e00103) TDO (00138c0201010300e00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0013a00001000200280103) TDO (0013900000000200e00101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0013a40100020100e80003) TDO (0013a00001000200280101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0013a80201000200b80003) TDO (0013a40100020100e80001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0013ae00020002006a0003) TDO (0013a80201000200b80001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0013b00000000000700003) TDO (0013ae00020002006a0001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0013c00000000000000003) TDO (0013b00000000000700001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0013c40000000008880003) TDO (0013c00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0013c80000000000880003) TDO (0013c40000000008880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0013cc0000000000880003) TDO (0013c80000000000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0013d00004000000880003) TDO (0013cc0000000000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0014000000000000000003) TDO (0013d00004000000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0014040000000000000003) TDO (0014000000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0014080080000000000003) TDO (0014040000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00140c0040000000000003) TDO (0014080080000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0014100000000000000003) TDO (00140c0040000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0014200000000000000003) TDO (0014100000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0014240000000000000003) TDO (0014200000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0014280080000000000003) TDO (0014240000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00142c0000000000000003) TDO (0014280080000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0014300000000000000003) TDO (00142c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0014400000000000000003) TDO (0014300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0014440004000000000003) TDO (0014400000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0014480004000000000003) TDO (0014440004000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00144c0000000000000003) TDO (0014480004000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0014500000000000000003) TDO (00144c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0014800000000000000003) TDO (0014500000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0014840000000800000003) TDO (0014800000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0014880000000800000003) TDO (0014840000000800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00148c0000000800000003) TDO (0014880000000800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0014900000000c00000003) TDO (00148c0000000800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0014a00000000000000003) TDO (0014900000000c00000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0014a40040000800000003) TDO (0014a00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0014a80040008800000003) TDO (0014a40040000800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0014ac0000008400000003) TDO (0014a80040008800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0014b00080008400000003) TDO (0014ac0000008400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0014c00000001400000003) TDO (0014b00080008400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0014c40000000800000003) TDO (0014c00000001400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0014c80000001800000003) TDO (0014c40000000800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0014cc0040001800000003) TDO (0014c80000001800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0014d00000001000000003) TDO (0014cc0040001800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0015000000000000080003) TDO (0014d00000001000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0015040000000100000003) TDO (0015000000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0015080000000000000003) TDO (0015040000000100000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00150c0000000000000003) TDO (0015080000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0015100002000000000003) TDO (00150c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0015228000000008000003) TDO (0015100002000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0015240000000000000003) TDO (0015228000000008000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0015281000000000000003) TDO (0015240000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00152c0000200000000003) TDO (0015281000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0015300000000000000003) TDO (00152c0000200000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0015404000000000000003) TDO (0015300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0015440000000000000003) TDO (0015404000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0015480400002000000003) TDO (0015440000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00154c0000100000000003) TDO (0015480400002000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0015500000000000000003) TDO (00154c0000100000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0015800000000000f00003) TDO (0015500000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0015840000000000f00003) TDO (0015800000000000f00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0015880000000000f00003) TDO (0015840000000000f00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00158c0000000000e00003) TDO (0015880000000000f00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0015900000000000e00003) TDO (00158c0000000000e00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0015a00400000000280003) TDO (0015900000000000e00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0015a40020000000a80003) TDO (0015a00400000000280001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0015a80000000000a80003) TDO (0015a40020000000a80001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0015ac0000000000680003) TDO (0015a80000000000a80001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0015b00000000000700003) TDO (0015ac0000000000680001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0015c00000000000000003) TDO (0015b00000000000700001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0015c40000000000880003) TDO (0015c00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0015c80000000000880003) TDO (0015c40000000000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0015cc0000000000880003) TDO (0015c80000000000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0015d00000000000880003) TDO (0015cc0000000000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0016000000000000100003) TDO (0015d00000000000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0016050303030300400003) TDO (0016000000000000100001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00160a0202020000500003) TDO (0016050303030300400001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00160c0000000000000003) TDO (00160a0202020000500001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0016110302030100c00003) TDO (00160c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0016230102030100000003) TDO (0016110302030100c00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0016240000000000200003) TDO (0016230102030100000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0016290102000002280003) TDO (0016240000000000200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00162c0101010001080003) TDO (0016290102000002280001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0016300000000000000003) TDO (00162c0101010001080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0016400000000000000003) TDO (0016300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0016440000000000000003) TDO (0016400000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0016480000000000000003) TDO (0016440000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00164c0000000000080003) TDO (0016480000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0016500000000000080003) TDO (00164c0000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0016830303030303420303) TDO (0016500000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0016870303030303120303) TDO (0016830303030303420301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00168b0303030301820303) TDO (0016870303030303120301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00168f0303030303e20303) TDO (00168b0303030301820301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0016930303030303220303) TDO (00168f0303030303e20301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0016a303030303032b0303) TDO (0016930303030303220301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0016a703030303038b0303) TDO (0016a303030303032b0301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0016ab0303030303830303) TDO (0016a703030303038b0301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0016af0303030303210303) TDO (0016ab0303030303830301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0016b00000000000200003) TDO (0016af0303030303210301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0016c00000000000000003) TDO (0016b00000000000200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0016c40000000000080003) TDO (0016c00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0016c80000004000080003) TDO (0016c40000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0016cc0000000000000003) TDO (0016c80000004000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0016d00000000000000003) TDO (0016cc0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0017030303030003588003) TDO (0016d00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0017070303030103580003) TDO (0017030303030003588001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00170b0303070201d80003) TDO (0017070303030103580001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00170f0303070203e80003) TDO (00170b0303070201d80001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0017130303070303ec0003) TDO (00170f0303070203e80001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0017230303030303288003) TDO (0017130303070303ec0001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0017260303030203280003) TDO (0017230303030303288001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00172b03030303032c0203) TDO (0017260303030203280001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00172f03030303030c0203) TDO (00172b03030303032c0201) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00173000000000000c0003) TDO (00172f03030303030c0201) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0017400000000000000003) TDO (00173000000000000c0001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0017440000000400080003) TDO (0017400000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0017480000800008080003) TDO (0017440000000400080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00174c0000000000080003) TDO (0017480000800008080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00175000000000000c0003) TDO (00174c0000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0017830303010003000003) TDO (00175000000000000c0001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0017850303070103040003) TDO (0017830303010003000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00178b2303030001000003) TDO (0017850303070103040001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00178f0303030203000003) TDO (00178b2303030001000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0017930201030203000003) TDO (00178f0303030203000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0017a30201030303400003) TDO (0017930201030203000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0017a60303030003900003) TDO (0017a30201030303400001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0017ab0b01034203800003) TDO (0017a60303030003900001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0017af0303030203200003) TDO (0017ab0b01034203800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0017b08000000000200003) TDO (0017af0303030203200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0017c00000000000000003) TDO (0017b08000000000200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0017c40000800000000003) TDO (0017c00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0017c82000000400000003) TDO (0017c40000800000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0017cc0000800000000003) TDO (0017c82000000400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0017d00000800000000003) TDO (0017cc0000800000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0018030303010203900003) TDO (0017d00000800000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001805013e038003a00003) TDO (0018030303010203900001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00180b0310038001f00003) TDO (001805013e038003a00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00180f0202030803a00003) TDO (00180b0310038001f00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00181300a0025803a00003) TDO (00180f0202030803a00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0018230200030003000203) TDO (00181300a0025803a00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0018250302030602080203) TDO (0018230200030003000201) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00182b0301030601040003) TDO (0018250302030602080201) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00182f02030302030c0203) TDO (00182b0301030601040001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0018300010008000000003) TDO (00182f02030302030c0201) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00184000c000a000000003) TDO (0018300010008000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0018440090009400000003) TDO (00184000c000a000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0018480000000000080003) TDO (0018440090009400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00184c00a0000c00800003) TDO (0018480000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0018500000000000880003) TDO (00184c00a0000c00800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0018830307011043600003) TDO (0018500000000000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0018850100011043500003) TDO (0018830307011043600001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00188b0308021001040003) TDO (0018850100011043500001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00188f0212039003440003) TDO (00188b0308021001040001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0018930014028003440003) TDO (00188f0212039003440001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0018a20000008403280003) TDO (0018930014028003440001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0018a40302038802e00003) TDO (0018a20000008403280001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0018ab0330038801f80003) TDO (0018a40302038802e00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0018af0212038003700003) TDO (0018ab0330038801f80001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0018b00000004000700003) TDO (0018af0212038003700001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0018c00000000000000003) TDO (0018b00000004000700001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0018c40060000808880003) TDO (0018c00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0018c800f0008c08800003) TDO (0018c40060000808880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0018cc0000008000080003) TDO (0018c800f0008c08800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0018d00080008000000003) TDO (0018cc0000008000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0019004100000101000003) TDO (0018d00080008000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0019054101010000000003) TDO (0019004100000101000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0019094001000100000003) TDO (0019054101010000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00190c4000000000000303) TDO (0019094001000100000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0019104101010101000003) TDO (00190c4000000000000301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0019200000000000000003) TDO (0019104101010101000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0019244000000000000003) TDO (0019200000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0019284000000000000003) TDO (0019244000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00192c4000000000000003) TDO (0019284000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0019304000000000000003) TDO (00192c4000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0019404000000000000003) TDO (0019304000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0019446000000000000003) TDO (0019404000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0019486000000000000003) TDO (0019446000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00194c2000000000000003) TDO (0019486000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0019506000000000000003) TDO (00194c2000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0019830000030302000003) TDO (0019506000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0019860000020202000003) TDO (0019830000030302000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00198b0800030302020003) TDO (0019860000020202000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00198c0000000000000003) TDO (00198b0800030302020001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0019900001000100020003) TDO (00198c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0019a00000000000000003) TDO (0019900001000100020001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0019a40000000000000003) TDO (0019a00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0019a80000000000000003) TDO (0019a40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0019ac0400000000000003) TDO (0019a80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0019b00000000000000003) TDO (0019ac0400000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0019c00000000000000003) TDO (0019b00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0019c40000000000000003) TDO (0019c00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0019c81000000000000003) TDO (0019c40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0019cc0000000000000003) TDO (0019c81000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0019d00000000000000003) TDO (0019cc0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001a000300010001000003) TDO (0019d00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001a050202000100000103) TDO (001a000300010001000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001a090102010100000103) TDO (001a050202000100000101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001a0c0000000000000003) TDO (001a090102010100000101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001a100303010001000103) TDO (001a0c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001a202000000000000003) TDO (001a100303010001000101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001a242000000000800003) TDO (001a202000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001a280000000000800003) TDO (001a242000000000800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001a2c0000000000200003) TDO (001a280000000000800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001a300000000000200003) TDO (001a2c0000000000200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001a400000000000000003) TDO (001a300000000000200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001a440000000010000003) TDO (001a400000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001a480000000080000003) TDO (001a440000000010000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001a4c0000000080000003) TDO (001a480000000080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001a500000000000000003) TDO (001a4c0000000080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001a820000000100000103) TDO (001a500000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001a870203020100000103) TDO (001a820000000100000101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001a8a0203000100000103) TDO (001a870203020100000101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001a8c0000000000000003) TDO (001a8a0203000100000101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001a930103010101000103) TDO (001a8c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001aa00000000000000003) TDO (001a930103010101000101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001aa40000000000000003) TDO (001aa00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001aa80000000000000003) TDO (001aa40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001aac0000000000000003) TDO (001aa80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001ab00000000000000003) TDO (001aac0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001ac00000000080500003) TDO (001ab00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001ac40000000080000003) TDO (001ac00000000080500001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001ac80000000000000003) TDO (001ac40000000080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001acc0000000000000003) TDO (001ac80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001ad00000000000000003) TDO (001acc0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001b000100000303000103) TDO (001ad00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001b050001000000000003) TDO (001b000100000303000101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001b090301000202000003) TDO (001b050001000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001b0c0000000000000003) TDO (001b090301000202000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001b100001010203000003) TDO (001b0c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001b200000000000000003) TDO (001b100001010203000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001b240000000000000003) TDO (001b200000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001b280000000000000003) TDO (001b240000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001b2c0000000000000003) TDO (001b280000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001b300000000000000003) TDO (001b2c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001b4000000000000000c3) TDO (001b300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001b440000000000000003) TDO (001b4000000000000000c1) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001b480000000000000003) TDO (001b440000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001b4c0000000000000003) TDO (001b480000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001b500000000000000003) TDO (001b4c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001b800000000001000003) TDO (001b500000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001b840003000000000003) TDO (001b800000000001000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001b880003000301000003) TDO (001b840003000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001b8c0000000000000003) TDO (001b880003000301000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001b900103010300000003) TDO (001b8c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001ba00000000000000003) TDO (001b900103010300000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001ba40000000000000003) TDO (001ba00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001ba80000000000000003) TDO (001ba40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001bac0000000000000003) TDO (001ba80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001bb00000000000000003) TDO (001bac0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001bc00000000000000003) TDO (001bb00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001bc40000000000000003) TDO (001bc00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001bc80000000000000003) TDO (001bc40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001bcc0000000000000003) TDO (001bc80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001bd00000000000000003) TDO (001bcc0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001c011100010200f00103) TDO (001bd00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001c050000000000f00103) TDO (001c011100010200f00101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001c090101010201f00003) TDO (001c050000000000f00101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001c0e0000020002e00003) TDO (001c090101010201f00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001c110101010300e00303) TDO (001c0e0000020002e00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001c200000000000a80003) TDO (001c110101010300e00301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001c240000000000280003) TDO (001c200000000000a80001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001c280000000000280003) TDO (001c240000000000280001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001c2c0000000000480003) TDO (001c280000000000280001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001c300000000000500003) TDO (001c2c0000000000480001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001c408800000000000003) TDO (001c300000000000500001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001c440000000000880003) TDO (001c408800000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001c480000000000880003) TDO (001c440000000000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001c4c00000000008c0003) TDO (001c480000000000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001c500000000000880003) TDO (001c4c00000000008c0001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001c820100030203002103) TDO (001c500000000000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001c842000020000010003) TDO (001c820100030203002101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001c8a0101010203000103) TDO (001c842000020000010001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001c8c0000000000000003) TDO (001c8a0101010203000101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001c930001010201000103) TDO (001c8c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001ca00000000000000003) TDO (001c930001010201000101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001ca40800004000000003) TDO (001ca00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001ca80000000000000003) TDO (001ca40800004000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001cac0000000000000003) TDO (001ca80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001cb00400000000000003) TDO (001cac0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001cc00000000808000003) TDO (001cb00400000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001cc42000000008000003) TDO (001cc00000000808000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001cc80000000008040003) TDO (001cc42000000008000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001ccc0000000000000003) TDO (001cc80000000008040001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001cd00000000000000003) TDO (001ccc0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001d000040440201010003) TDO (001cd00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001d040050410000010003) TDO (001d000040440201010001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001d080051000200010003) TDO (001d040050410000010001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001d0c0150000100000103) TDO (001d080051000200010001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001d110051400201010003) TDO (001d0c0150000100000101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001d200000040000000003) TDO (001d110051400201010001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001d240004000000000003) TDO (001d200000040000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001d280000000000000003) TDO (001d240004000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001d2c0000100000000003) TDO (001d280000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001d300000000000000003) TDO (001d2c0000100000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001d400000000000000003) TDO (001d300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001d440020080000000003) TDO (001d400000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001d480020080000000003) TDO (001d440020080000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001d4c0020000000000003) TDO (001d480020080000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001d500020000000000003) TDO (001d4c0020000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001d820110010003000003) TDO (001d500020000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001d8400000a0101000103) TDO (001d820110010003000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001d8a01010b0102000103) TDO (001d8400000a0101000101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001d8c0000400000000003) TDO (001d8a01010b0102000101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001d930301010303000103) TDO (001d8c0000400000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001da00084000000000003) TDO (001d930301010303000101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001da40040100000000003) TDO (001da00084000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001da80040140000000003) TDO (001da40040100000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001dac0000000000000003) TDO (001da80040140000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001db00000000000000003) TDO (001dac0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001dc00000000000000003) TDO (001db00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001dc40000000000000003) TDO (001dc00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001dc80000000000000003) TDO (001dc40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001dcc0040000000000003) TDO (001dc80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001dd00000000000000003) TDO (001dcc0040000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001e000000010002000003) TDO (001dd00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001e048002810000000003) TDO (001e000000010002000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001e088001800003020003) TDO (001e048002810000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001e0e0020000200000003) TDO (001e088001800003020001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001e110003000002020003) TDO (001e0e0020000200000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001e202000000000000003) TDO (001e110003000002020001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001e242000000000000003) TDO (001e202000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001e280000200000000003) TDO (001e242000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001e2c0000000000000003) TDO (001e280000200000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001e300000000000000003) TDO (001e2c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001e400000000000000003) TDO (001e300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001e440000000000000003) TDO (001e400000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001e480000300000000003) TDO (001e440000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001e4c0000000000000003) TDO (001e480000300000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001e500000000000000003) TDO (001e4c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001e820100210202000003) TDO (001e500000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001e840002340100010003) TDO (001e820100210202000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001e8a0103250302000003) TDO (001e840002340100010001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001e8c0000a40000000003) TDO (001e8a0103250302000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001e930103a50302000003) TDO (001e8c0000a40000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001ea00020000000000003) TDO (001e930103a50302000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001ea40000802000000003) TDO (001ea00020000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001ea80000000000000003) TDO (001ea40000802000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001eac0000200000000003) TDO (001ea80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001eb00000000000000003) TDO (001eac0000200000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001ec00000800000000003) TDO (001eb00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001ec40000c40000000003) TDO (001ec00000800000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001ec80000800000000003) TDO (001ec40000c40000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001ecc0000900000000003) TDO (001ec80000800000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001ed00000800000000003) TDO (001ecc0000900000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001f020100010102500003) TDO (001ed00000800000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001f040200030200500103) TDO (001f020100010102500001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001f080000000102d00003) TDO (001f040200030200500101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001f0d0000000000e00003) TDO (001f080000000102d00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001f120201030300e00103) TDO (001f0d0000000000e00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001f200000000000280003) TDO (001f120201030300e00101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001f240000000000280003) TDO (001f200000000000280001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001f280000000000280003) TDO (001f240000000000280001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001f2c0000000000080003) TDO (001f280000000000280001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001f300000000000000003) TDO (001f2c0000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001f400000000000000003) TDO (001f300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001f440000000040080003) TDO (001f400000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001f480000000040080003) TDO (001f440000000040080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001f4c0000000000080003) TDO (001f480000000040080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001f500000000000080003) TDO (001f4c0000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001f800100000000000003) TDO (001f500000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001f850002010000000103) TDO (001f800100000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001f890302010302000303) TDO (001f850002010000000101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001f8c0000000000000003) TDO (001f890302010302000301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001f910102030301000303) TDO (001f8c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001fa00000000000000003) TDO (001f910102030301000301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001fa40000000000000003) TDO (001fa00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001fa80000000000000003) TDO (001fa40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001fac0000000000000003) TDO (001fa80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001fb00000000000000003) TDO (001fac0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001fc00008000040000003) TDO (001fb00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001fc40000000000000003) TDO (001fc00008000040000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001fc80000000000000003) TDO (001fc40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001fcc0000000000000003) TDO (001fc80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (001fd00000000000000003) TDO (001fcc0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0020000200030001000003) TDO (001fd00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0020070300030100000003) TDO (0020000200030001000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0020090100000100000003) TDO (0020070300030100000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00200c0000000000000003) TDO (0020090100000100000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0020120200020001000303) TDO (00200c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0020200000000000000003) TDO (0020120200020001000301) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0020240000000004000003) TDO (0020200000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0020280000000004000003) TDO (0020240000000004000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00202c0000000000000003) TDO (0020280000000004000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0020300000000000000003) TDO (00202c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0020400000400000000003) TDO (0020300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0020440000000000000003) TDO (0020400000400000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0020480000000000000003) TDO (0020440000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00204c0000000000000003) TDO (0020480000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0020500000000000000003) TDO (00204c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0020800000020203000003) TDO (0020500000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0020840002010003010003) TDO (0020800000020203000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0020880003020003010003) TDO (0020840002010003010001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00208c0000000000000003) TDO (0020880003020003010001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0020900203030303010003) TDO (00208c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0020a00000000000000003) TDO (0020900203030303010001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0020a40000000000000003) TDO (0020a00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0020a80000000000000003) TDO (0020a40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0020ac0000000000000003) TDO (0020a80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0020b00000000000000003) TDO (0020ac0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0020c00000000000000003) TDO (0020b00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0020c40000000000000003) TDO (0020c00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0020c80000000000000003) TDO (0020c40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0020cc0000000000000003) TDO (0020c80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0020d00000000000000003) TDO (0020cc0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0021001002031302020103) TDO (0020d00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0021040200038a02030103) TDO (0021001002031302020101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0021090002021703010003) TDO (0021040200038a02030101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00210c0000008800000003) TDO (0021090002021703010001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0021120203031302000103) TDO (00210c0000008800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0021200000008000800003) TDO (0021120203031302000101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0021240000000c40000003) TDO (0021200000008000800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0021280000000040000003) TDO (0021240000000c40000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00212c0000001000000003) TDO (0021280000000040000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0021300000000000000003) TDO (00212c0000001000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0021400800008800000003) TDO (0021300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0021440000000060000003) TDO (0021400800008800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0021480800008040000003) TDO (0021440000000060000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00214c0800000000000003) TDO (0021480800008040000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0021500000008000000003) TDO (00214c0800000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0021838200008806040003) TDO (0021500000008000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0021870202000100000003) TDO (0021838200008806040001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0021890502034102000003) TDO (0021870202000100000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00218c0800000000000003) TDO (0021890502034102000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0021930303010300000203) TDO (00218c0800000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0021a04000000000140013) TDO (0021930303010300000201) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0021a40000000000000003) TDO (0021a04000000000140011) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0021a80000000000000003) TDO (0021a40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0021ac0000000400000003) TDO (0021a80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0021b00000000400000003) TDO (0021ac0000000400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0021c02000000000080003) TDO (0021b00000000400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0021c40000000000000003) TDO (0021c02000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0021c80000000000000003) TDO (0021c40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0021cc1000000000000003) TDO (0021c80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0021d00000001000000003) TDO (0021cc1000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0022020100020302000003) TDO (0021d00000001000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0022060200020002000003) TDO (0022020100020302000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00220a0b00020302080003) TDO (0022060200020002000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00220c0800000080000003) TDO (00220a0b00020302080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0022120900020302000203) TDO (00220c0800000080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0022200800000000000003) TDO (0022120900020302000201) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0022240800000000000003) TDO (0022200800000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0022280800000000000003) TDO (0022240800000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00222c0800000000000003) TDO (0022280800000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0022300800000000000003) TDO (00222c0800000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0022400400000000000003) TDO (0022300800000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0022440400000000000003) TDO (0022400400000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0022480400000000000003) TDO (0022440400000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00224c0400000000000003) TDO (0022480400000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0022500400000000000003) TDO (00224c0400000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0022804800020002f00003) TDO (0022500400000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0022844900012101f00003) TDO (0022804800020002f00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0022880002030103f00003) TDO (0022844900012101f00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00228c0000000000e00003) TDO (0022880002030103f00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0022900002000000e00003) TDO (00228c0000000000e00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0022a00000000000280003) TDO (0022900002000000e00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0022a40000000010a80003) TDO (0022a00000000000280001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0022a80400000000a80003) TDO (0022a40000000010a80001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0022ac4000000000680003) TDO (0022a80400000000a80001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0022b00000000000700003) TDO (0022ac4000000000680001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0022c01000000000000003) TDO (0022b00000000000700001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0022c41000000000880003) TDO (0022c01000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0022c80000000000880003) TDO (0022c41000000000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0022cc0000000000880003) TDO (0022c80000000000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0022d00000000000880003) TDO (0022cc0000000000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0023000100010000000003) TDO (0022d00000000000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0023040200020002000003) TDO (0023000100010000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0023080102030002000003) TDO (0023040200020002000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00230c0000000000000003) TDO (0023080102030002000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0023120302010200000203) TDO (00230c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0023200000000000000003) TDO (0023120302010200000201) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0023240000000040000003) TDO (0023200000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0023280000000040000003) TDO (0023240000000040000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00232c0000000000000003) TDO (0023280000000040000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0023300000000000000003) TDO (00232c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0023400000000000000003) TDO (0023300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0023440000000060000003) TDO (0023400000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0023480000000040000003) TDO (0023440000000060000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00234c0000000000000003) TDO (0023480000000040000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0023500000000000000003) TDO (00234c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002381030101010d000003) TDO (0023500000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0023840203000100000003) TDO (002381030101010d000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00238b0103010101000003) TDO (0023840203000100000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00238c0000000000000003) TDO (00238b0103010101000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0023920201000100000003) TDO (00238c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0023a00000000000000003) TDO (0023920201000100000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0023a40000000000000003) TDO (0023a00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0023a80000000000000003) TDO (0023a40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0023ac0000000000000003) TDO (0023a80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0023b00000000000000003) TDO (0023ac0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0023c00000000004000003) TDO (0023b00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0023c40000000000000003) TDO (0023c00000000004000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0023c80000000000000003) TDO (0023c40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0023cc0000000000000003) TDO (0023c80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0023d00000000000000003) TDO (0023cc0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0024020000020000600203) TDO (0023d00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0024040002008202500003) TDO (0024020000020000600201) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00240a0002038203000003) TDO (0024040002008202500001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00240c4000008800400003) TDO (00240a0002038203000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002410080200ca02400003) TDO (00240c4000008800400001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002420000000c000280003) TDO (002410080200ca02400001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002424000000c840200003) TDO (002420000000c000280001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0024280000004840280003) TDO (002424000000c840200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00242c0000004000440003) TDO (0024280000004840280001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0024300000004000500003) TDO (00242c0000004000440001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002440000000a000000003) TDO (0024300000004000500001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002444800400a060880003) TDO (002440000000a000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0024480004002440800003) TDO (002444800400a060880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00244c0800002400080003) TDO (0024480004002440800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0024501000002000000003) TDO (00244c0800002400080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002483020203011e900003) TDO (0024501000002000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0024840001000001a10003) TDO (002483020203011e900001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00248b0200030503f00003) TDO (0024840001000001a10001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00248c0000000400a00003) TDO (00248b0200030503f00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0024902002000400a40003) TDO (00248c0000000400a00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0024a00000000000000003) TDO (0024902002000400a40001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0024a40000000000080003) TDO (0024a00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0024a80000000000000003) TDO (0024a40000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0024ac0000001000080003) TDO (0024a80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0024b00800001000000003) TDO (0024ac0000001000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0024c00000001004000003) TDO (0024b00800001000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0024c40000000400000003) TDO (0024c00000001004000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0024c80800000000080003) TDO (0024c40000000400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0024cc0000000000800003) TDO (0024c80800000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0024d0a000000000880003) TDO (0024cc0000000000800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0025000202000080a00003) TDO (0024d0a000000000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0025040300010301a40003) TDO (0025000202000080a00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0025080102010301240003) TDO (0025040300010301a40001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00250c0000000000040003) TDO (0025080102010301240001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0025100202000200000203) TDO (00250c0000000000040001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0025200000000000400003) TDO (0025100202000200000201) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0025240000000000500003) TDO (0025200000000000400001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0025280000000000500003) TDO (0025240000000000500001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00252c0000000000500003) TDO (0025280000000000500001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0025300000000000500003) TDO (00252c0000000000500001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0025400800000000000003) TDO (0025300000000000500001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0025440000000000800003) TDO (0025400800000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0025480000000000800003) TDO (0025440000000000800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00254c0000000000800003) TDO (0025480000000000800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0025500000000000800003) TDO (00254c0000000000800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0025810000000000000003) TDO (0025500000000000800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0025850000020000000003) TDO (0025810000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0025890200000000000003) TDO (0025850000020000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00258c0000000000000003) TDO (0025890200000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0025910000020000000003) TDO (00258c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0025a00000400000004003) TDO (0025910000020000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0025a40000000000000003) TDO (0025a00000400000004001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0025a80000000000800003) TDO (0025a40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0025ac0000000000000003) TDO (0025a80000000000800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0025b00000000000200003) TDO (0025ac0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0025c00000000000000003) TDO (0025b00000000000200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0025c40000000000000003) TDO (0025c00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0025c80000000000000003) TDO (0025c40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0025cc0000000000000003) TDO (0025c80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0025d00000000000000003) TDO (0025cc0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0026030000020301000003) TDO (0025d00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0026040002000000000003) TDO (0026030000020301000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00260b0202020303000003) TDO (0026040002000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00260c0000000000000003) TDO (00260b0202020303000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0026110002000301000003) TDO (00260c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0026202000000000000003) TDO (0026110002000301000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0026242000000000800003) TDO (0026202000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0026280000000000800003) TDO (0026242000000000800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00262c0000000000200003) TDO (0026280000000000800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0026300000000000200003) TDO (00262c0000000000200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0026400000000000000003) TDO (0026300000000000200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0026440000000010000003) TDO (0026400000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0026480000000000000003) TDO (0026440000000010000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00264c0000000000000003) TDO (0026480000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0026500000000000000003) TDO (00264c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0026800000000000000003) TDO (0026500000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0026840000000000000003) TDO (0026800000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0026880000000000000003) TDO (0026840000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00268c0000000000000003) TDO (0026880000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0026900000000000000003) TDO (00268c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0026a00000000000000003) TDO (0026900000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0026a40000000000000003) TDO (0026a00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0026a80000040000000003) TDO (0026a40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0026ac0000000000000003) TDO (0026a80000040000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0026b00000000000000003) TDO (0026ac0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0026c00000000000000003) TDO (0026b00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0026c40000000000000003) TDO (0026c00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0026c80000000000500003) TDO (0026c40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0026cc0000000000000003) TDO (0026c80000000000500001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0026d00000000000000003) TDO (0026cc0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0027010101010101010103) TDO (0026d00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0027050501010001000003) TDO (0027010101010101010101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0027080000000000000003) TDO (0027050501010001000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00270c0080000000040003) TDO (0027080000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0027100040000000000003) TDO (00270c0080000000040001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0027200000000000000003) TDO (0027100040000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0027250101010141010103) TDO (0027200000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0027280000000040400003) TDO (0027250101010141010101) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00272c0080000000100003) TDO (0027280000000040400001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0027300000000000000003) TDO (00272c0080000000100001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0027400000000000000003) TDO (0027300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0027440004000020000003) TDO (0027400000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0027480004000000000003) TDO (0027440004000020000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00274c0000000000000003) TDO (0027480004000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0027500000000000000003) TDO (00274c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0027800400000000000003) TDO (0027500000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0027840000000800000003) TDO (0027800400000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0027880000000800000003) TDO (0027840000000800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00278c0000000800000003) TDO (0027880000000800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0027900000000c00080003) TDO (00278c0000000800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0027a00000000000000003) TDO (0027900000000c00080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0027a40040000800000003) TDO (0027a00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0027a80040008800000003) TDO (0027a40040000800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0027ac0000008400000003) TDO (0027a80040008800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0027b00080008400000003) TDO (0027ac0000008400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0027c00000001000000003) TDO (0027b00080008400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0027c40000000800000003) TDO (0027c00000001000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0027c80000001800000003) TDO (0027c40000000800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0027cc0040001800000003) TDO (0027c80000001800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0027d00000001000000003) TDO (0027cc0040001800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0028000000a01000000003) TDO (0027d00000001000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0028040000801000000003) TDO (0028000000a01000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0028080000801400000003) TDO (0028040000801000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00280c0000001400000003) TDO (0028080000801400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0028100000001000000003) TDO (00280c0000001400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0028200000000400000003) TDO (0028100000001000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0028240000000440000003) TDO (0028200000000400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0028280000000440000003) TDO (0028240000000440000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00282c0000001000000003) TDO (0028280000000440000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0028300000001000000003) TDO (00282c0000001000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0028400000a00000000003) TDO (0028300000001000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0028440000041060000003) TDO (0028400000a00000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0028480000248040000003) TDO (0028440000041060000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00284c0000008000000003) TDO (0028480000248040000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0028500000008000000003) TDO (00284c0000008000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002880000010001c000003) TDO (0028500000008000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0028840000240000100003) TDO (002880000010001c000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0028880000240000100003) TDO (0028840000240000100001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00288c0000240000c00003) TDO (0028880000240000100001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0028900000240000e00003) TDO (00288c0000240000c00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0028a00008a0000000000b) TDO (0028900000240000e00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0028a40000000000800003) TDO (0028a00008a00000000009) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0028a80000200000a00003) TDO (0028a40000000000800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0028ac0000000000200003) TDO (0028a80000200000a00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0028b00000000000200003) TDO (0028ac0000000000200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0028c0000014000400000b) TDO (0028b00000000000200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0028c40000800000080003) TDO (0028c00000140004000009) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0028c80000900000080003) TDO (0028c40000800000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0028cc0000800000080003) TDO (0028c80000900000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0028d00000800000080003) TDO (0028cc0000800000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00290010c4001000000003) TDO (0028d00000800000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00290400d4009400000003) TDO (00290010c4001000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00290800d4009400000003) TDO (00290400d4009400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00290c00d4009c00000003) TDO (00290800d4009400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00291000d4009c00000003) TDO (00290c00d4009c00000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0029200000009400000003) TDO (00291000d4009c00000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0029240080009c00000003) TDO (0029200000009400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0029280084008c00000003) TDO (0029240080009c00000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00292c0084009400000003) TDO (0029280084008c00000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0029300004009000000003) TDO (00292c0084009400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00294008c0009000000003) TDO (0029300004009000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00294400e0009800000003) TDO (00294008c0009000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00294808e0009800000003) TDO (00294400e0009800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00294c08a0008800000003) TDO (00294808e0009800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00295000a0009000000003) TDO (00294c08a0008800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0029800000000000000003) TDO (00295000a0009000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0029840000000800000003) TDO (0029800000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0029880000000800000003) TDO (0029840000000800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00298c0000000000000003) TDO (0029880000000800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0029900000000000000003) TDO (00298c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0029a00000000000000023) TDO (0029900000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0029a40044000000000003) TDO (0029a00000000000000021) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0029a80040001000000003) TDO (0029a40044000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0029ac0000000000000003) TDO (0029a80040001000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0029b00000000400000003) TDO (0029ac0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0029c00000000000000003) TDO (0029b00000000400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0029c40000000000000003) TDO (0029c00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0029c80000000000000003) TDO (0029c40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0029cc0040000000000003) TDO (0029c80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0029d00000000000000003) TDO (0029cc0040000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002a000004000000000003) TDO (0029d00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002a040004000000000003) TDO (002a000004000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002a080004000000000003) TDO (002a040004000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002a0c0004000000000003) TDO (002a080004000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002a100000000000000003) TDO (002a0c0004000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002a200000040000000003) TDO (002a100000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002a240000000000000003) TDO (002a200000040000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002a280000040000000003) TDO (002a240000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002a2c0004000000000003) TDO (002a280000040000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002a300004000000000003) TDO (002a2c0004000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002a400000000000000003) TDO (002a300004000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002a440000080000000003) TDO (002a400000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002a480080080000000003) TDO (002a440000080000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002a4c0080000000500003) TDO (002a480080080000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002a500000000000000003) TDO (002a4c0080000000500001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002a800080040000000003) TDO (002a500000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002a840000000000000003) TDO (002a800080040000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002a880000000000000003) TDO (002a840000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002a8c0000000000000003) TDO (002a880000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002a900000400000000003) TDO (002a8c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002aa00000100020000003) TDO (002a900000400000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002aa40000000000800003) TDO (002aa00000100020000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002aa80080000000800003) TDO (002aa40000000000800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002aac0080100000200003) TDO (002aa80080000000800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002ab00000000000200003) TDO (002aac0080100000200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002ac00000000400000003) TDO (002ab00000000000200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002ac40000000000000003) TDO (002ac00000000400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002ac80000000000000003) TDO (002ac40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002acc0000000000000003) TDO (002ac80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002ad00000000000000003) TDO (002acc0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002b000000000000000003) TDO (002ad00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002b040010000000000003) TDO (002b000000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002b080010000000000003) TDO (002b040010000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002b0c0010000000000003) TDO (002b080010000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002b100014000000000003) TDO (002b0c0010000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002b200000000000000003) TDO (002b100014000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002b240000000000000003) TDO (002b200000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002b280000000000000003) TDO (002b240000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002b2c0000000000000003) TDO (002b280000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002b300000000000000003) TDO (002b2c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002b400080000000004003) TDO (002b300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002b440080000000000003) TDO (002b400080000000004001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002b480000000000000003) TDO (002b440080000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002b4c0000000000000003) TDO (002b480000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002b500080000000000003) TDO (002b4c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002b800000004000000003) TDO (002b500080000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002b840040000000000003) TDO (002b800000004000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002b880040000000000003) TDO (002b840040000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002b8c0040000000000003) TDO (002b880040000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002b900040000000000003) TDO (002b8c0040000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002ba00000000000000003) TDO (002b900040000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002ba40000000080000003) TDO (002ba00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002ba80000000080000003) TDO (002ba40000000080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002bac0000000080000003) TDO (002ba80000000080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002bb00000000000000003) TDO (002bac0000000080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002bc00000100000040003) TDO (002bb00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002bc40800000080000003) TDO (002bc00000100000040001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002bc80000100080000003) TDO (002bc40800000080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002bcc0000100080000003) TDO (002bc80000100080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002bd00000000000000003) TDO (002bcc0000100080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002c000000040000100003) TDO (002bd00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002c048000000000400003) TDO (002c000000040000100001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002c080000000000500003) TDO (002c048000000000400001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002c0c0000000000000003) TDO (002c080000000000500001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002c100000000000c00003) TDO (002c0c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002c202000040000000003) TDO (002c100000000000c00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002c240000000040200003) TDO (002c202000040000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002c280000000040280003) TDO (002c240000000040200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002c2c0000004000080003) TDO (002c280000000040280001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002c300000000000080003) TDO (002c2c0000004000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002c400000000000000003) TDO (002c300000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002c440004000060000003) TDO (002c400000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002c480004000040000003) TDO (002c440004000060000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002c4c0000000000080003) TDO (002c480004000040000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002c500000000000080003) TDO (002c4c0000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002c80002000001cc00003) TDO (002c500000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002c840020000000300003) TDO (002c80002000001cc00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002c880020000000800003) TDO (002c840020000000300001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002c8c0020000000e00003) TDO (002c880020000000800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002c900000000000200003) TDO (002c8c0020000000e00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002ca0000000200028000b) TDO (002c900000000000200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002ca40000000000880003) TDO (002ca00000002000280009) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002ca80000040000800003) TDO (002ca40000000000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002cac0000000000600003) TDO (002ca80000040000800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002cb00000000000300003) TDO (002cac0000000000600001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002cc00004000004000003) TDO (002cb00000000000300001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002cc40000000000880003) TDO (002cc00004000004000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002cc80000000000080003) TDO (002cc40000000000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002ccc0000000000800003) TDO (002cc80000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002cd00000000000000003) TDO (002ccc0000000000800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002d002000000000000003) TDO (002cd00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002d042800000000000003) TDO (002d002000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002d082804000000000003) TDO (002d042800000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002d0c2804004000000003) TDO (002d082804000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002d102800000000000003) TDO (002d0c2804004000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002d201800000000000003) TDO (002d102800000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002d241800000040040003) TDO (002d201800000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002d281810000040000003) TDO (002d241800000040040001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002d2c1800000000000003) TDO (002d281810000040000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002d301800000000000003) TDO (002d2c1800000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002d401400000000000003) TDO (002d301800000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002d440420000000000003) TDO (002d401400000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002d481400000000000003) TDO (002d440420000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002d4c1400000000000003) TDO (002d481400000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002d501400000000000003) TDO (002d4c1400000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002d800800000000000003) TDO (002d501400000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002d840000000000000003) TDO (002d800800000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002d880028000000000003) TDO (002d840000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002d8c0010000000000003) TDO (002d880028000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002d900014000000000003) TDO (002d8c0010000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002da00000000040000083) TDO (002d900014000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002da44400000000000003) TDO (002da00000000040000081) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002da84020000000000003) TDO (002da44400000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002dac0000000000000003) TDO (002da84020000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002db04000000000000003) TDO (002dac0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002dc00010000000800003) TDO (002db04000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002dc40040000000000003) TDO (002dc00010000000800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002dc80050000000000003) TDO (002dc40040000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002dcc0000000000000003) TDO (002dc80050000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002dd00080000000000003) TDO (002dcc0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002e000000000000000003) TDO (002dd00080000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002e040000000000000003) TDO (002e000000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002e080000000000000003) TDO (002e040000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002e0c0000000000000003) TDO (002e080000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002e100000000000000003) TDO (002e0c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002e200000000000000003) TDO (002e100000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002e240000000000000003) TDO (002e200000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002e280000000000000003) TDO (002e240000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002e2c0000000000000003) TDO (002e280000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002e300000000000000003) TDO (002e2c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002e400000000000000003) TDO (002e300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002e440000000000000003) TDO (002e400000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002e480000000000000003) TDO (002e440000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002e4c0000000000000003) TDO (002e480000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002e500000000000000003) TDO (002e4c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002e800000000000500003) TDO (002e500000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002e840000000000500003) TDO (002e800000000000500001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002e880000240000d00003) TDO (002e840000000000500001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002e8c0000000000e00003) TDO (002e880000240000d00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002e900000800000e00003) TDO (002e8c0000000000e00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002ea00000000000280003) TDO (002e900000800000e00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002ea40000000000a80003) TDO (002ea00000000000280001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002ea80000002000a80003) TDO (002ea40000000000a80001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002eac0000000000280003) TDO (002ea80000002000a80001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002eb00000000000200003) TDO (002eac0000000000280001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002ec00000000000000003) TDO (002eb00000000000200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002ec40000000000080003) TDO (002ec00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002ec80000000000080003) TDO (002ec40000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002ecc0000800000080003) TDO (002ec80000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002ed00000000000080003) TDO (002ecc0000800000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002f008000001000000007) TDO (002ed00000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002f040000001000000003) TDO (002f008000001000000005) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002f080400000000040003) TDO (002f040000001000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002f0c0800000020040003) TDO (002f080400000000040001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002f100000000000000003) TDO (002f0c0800000020040001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002f2040000000c0000043) TDO (002f100000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002f240038000000400003) TDO (002f2040000000c0000041) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002f280000008000540003) TDO (002f240038000000400001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002f2c0000000000100003) TDO (002f280000008000540001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002f300000000000000003) TDO (002f2c0000000000100001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002f4000080020d0000003) TDO (002f300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002f440000000c00000003) TDO (002f4000080020d0000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002f480000008400000003) TDO (002f440000000c00000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002f4c1004008400000003) TDO (002f480000008400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002f500000000000000003) TDO (002f4c1004008400000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002f800000000000d80003) TDO (002f500000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002f840000000040f80003) TDO (002f800000000000d80001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002f880000000000f80003) TDO (002f840000000040f80001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002f8c0000248000e80003) TDO (002f880000000000f80001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002f900000008000e40003) TDO (002f8c0000248000e80001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002fa0002800c000280003) TDO (002f900000008000e40001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002fa4000000c800a80003) TDO (002fa0002800c000280001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002fa80000000840a80003) TDO (002fa4000000c800a80001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002fac0000004080280003) TDO (002fa80000000840a80001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002fb000000040002c0003) TDO (002fac0000004080280001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002fc00000000000000003) TDO (002fb000000040002c0001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002fc40018402000080003) TDO (002fc00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002fc80010002040080003) TDO (002fc40018402000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002fcc0000002080880003) TDO (002fc80010002040080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (002fd000048020008c0003) TDO (002fcc0000002080880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00300000c0000000000003) TDO (002fd000048020008c0001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00300408d0000000000003) TDO (00300000c0000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00300800d0000000000003) TDO (00300408d0000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00300c00d0000000000003) TDO (00300800d0000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00301000d0000000000003) TDO (00300c00d0000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0030200084000000000003) TDO (00301000d0000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0030240080000000000003) TDO (0030200084000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0030280080000000000003) TDO (0030240080000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00302c0080000000000003) TDO (0030280080000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0030300000000000000003) TDO (00302c0080000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0030400040000000000003) TDO (0030300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0030440060000000000003) TDO (0030400040000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0030480060040000000003) TDO (0030440060000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00304c0020000000000003) TDO (0030480060040000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0030500020000000000003) TDO (00304c0020000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0030800810000000000003) TDO (0030500020000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0030840000240000000003) TDO (0030800810000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0030880000240000000003) TDO (0030840000240000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00308c0000a40000000003) TDO (0030880000240000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0030900000a40000000003) TDO (00308c0000a40000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0030a00000000000000003) TDO (0030900000a40000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0030a40040800000000003) TDO (0030a00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0030a80044000000000003) TDO (0030a40040800000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0030ac0000000000000003) TDO (0030a80044000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0030b00000000000000003) TDO (0030ac0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0030c00000000000000003) TDO (0030b00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0030c41000c00000000003) TDO (0030c00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0030c80000800000000003) TDO (0030c41000c00000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0030cc0000800000000003) TDO (0030c80000800000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0030d00000800000000003) TDO (0030cc0000800000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0031000000000000800003) TDO (0030d00000800000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0031040000000080a00003) TDO (0031000000000000800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0031080000000000200003) TDO (0031040000000080a00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00310c0000000000000003) TDO (0031080000000000200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0031100000000000000003) TDO (00310c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0031200000000000000003) TDO (0031100000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0031240000400000000003) TDO (0031200000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0031288000000000000003) TDO (0031240000400000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00312c1000000000000003) TDO (0031288000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0031300000000000000003) TDO (00312c1000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0031400000000000800023) TDO (0031300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0031440000000000040003) TDO (0031400000000000800021) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0031484000000000000003) TDO (0031440000000000040001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00314c0400002000800003) TDO (0031484000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0031500000000000800003) TDO (00314c0400002000800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0031800000000080000003) TDO (0031500000000000800001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0031840000000000000003) TDO (0031800000000080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0031880000000000000003) TDO (0031840000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00318c0000000000000003) TDO (0031880000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0031900000000000000003) TDO (00318c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0031a00000000000000003) TDO (0031900000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0031a40000000080000003) TDO (0031a00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0031a80000000080000003) TDO (0031a40000000080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0031ac0000000080000003) TDO (0031a80000000080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0031b00000000000000003) TDO (0031ac0000000080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0031c00000000000000003) TDO (0031b00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0031c40000000080000003) TDO (0031c00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0031c80000000080000003) TDO (0031c40000000080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0031cc0000000080000003) TDO (0031c80000000080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0031d00000000000000003) TDO (0031cc0000000080000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0032002000000000000003) TDO (0031d00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0032040000000000080003) TDO (0032002000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0032080000000000000003) TDO (0032040000000000080001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00320c0000000000000003) TDO (0032080000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0032100000000000000003) TDO (00320c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0032200800004000000003) TDO (0032100000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0032248000400000000003) TDO (0032200800004000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0032280000000000000003) TDO (0032248000400000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00322c0000000000000003) TDO (0032280000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0032300000000000000003) TDO (00322c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0032400000000000000003) TDO (0032300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0032444000000000000003) TDO (0032400000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0032480000000000000003) TDO (0032444000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00324c0000000000000003) TDO (0032480000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0032500000000000000003) TDO (00324c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0032800000000000f00003) TDO (0032500000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0032840000000000f00003) TDO (0032800000000000f00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0032880000000000f00003) TDO (0032840000000000f00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00328c0000000000e00003) TDO (0032880000000000f00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0032900000000000e00003) TDO (00328c0000000000e00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0032a00010000000280003) TDO (0032900000000000e00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0032a40010000000a80003) TDO (0032a00010000000280001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0032a80010000000a80003) TDO (0032a40010000000a80001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0032ac0010000000680003) TDO (0032a80010000000a80001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0032b00010000000700003) TDO (0032ac0010000000680001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0032c00000000000000003) TDO (0032b00010000000700001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0032c40000000000880003) TDO (0032c00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0032c80000000000880003) TDO (0032c40000000000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0032cc0000000000880003) TDO (0032c80000000000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0032d00000000000880003) TDO (0032cc0000000000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0033000000000000000003) TDO (0032d00000000000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0033040008000000000003) TDO (0033000000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0033080008100000000003) TDO (0033040008000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00330c0000000000000003) TDO (0033080008100000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0033100020000000000003) TDO (00330c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0033200000000000000003) TDO (0033100020000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0033240000240008000003) TDO (0033200000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0033280020000000000003) TDO (0033240000240008000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00332c0000000000000003) TDO (0033280020000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0033300000000000000003) TDO (00332c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0033400000000000000003) TDO (0033300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0033440000300000000003) TDO (0033400000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0033480000040000000003) TDO (0033440000300000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00334c0000000000000003) TDO (0033480000040000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0033500000000000000003) TDO (00334c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0033800000000000000003) TDO (0033500000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0033840000800000000003) TDO (0033800000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0033880000000000000003) TDO (0033840000800000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00338c0000000000000003) TDO (0033880000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0033900000000000000003) TDO (00338c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0033a00000000000000003) TDO (0033900000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0033a40000000000000003) TDO (0033a00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0033a80000000000000003) TDO (0033a40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0033ac0000000000000003) TDO (0033a80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0033b00000000000000003) TDO (0033ac0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0033c00000000000000013) TDO (0033b00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0033c40000000000000003) TDO (0033c00000000000000011) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0033c80000000000000003) TDO (0033c40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0033cc0000000000000003) TDO (0033c80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0033d00000000000000003) TDO (0033cc0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0034000000000000000003) TDO (0033d00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0034040000000800000003) TDO (0034000000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0034080000000800000003) TDO (0034040000000800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00340c0000000800000003) TDO (0034080000000800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0034100000000800000003) TDO (00340c0000000800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0034200000000000000003) TDO (0034100000000800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0034240000000800000003) TDO (0034200000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0034280000000800000003) TDO (0034240000000800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00342c0000000000000003) TDO (0034280000000800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0034300000000000000003) TDO (00342c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0034400000000000000003) TDO (0034300000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0034440000000000000003) TDO (0034400000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0034480000000000000003) TDO (0034440000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00344c0000000000000003) TDO (0034480000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0034500000000000000003) TDO (00344c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0034800000000800000003) TDO (0034500000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0034840000000000000003) TDO (0034800000000800000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0034880000000000000003) TDO (0034840000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00348c0000000000000003) TDO (0034880000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0034900000000000000003) TDO (00348c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0034a00000000000000003) TDO (0034900000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0034a40000000000000003) TDO (0034a00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0034a80000000000000003) TDO (0034a40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0034ac0000000000000003) TDO (0034a80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0034b00000000000000003) TDO (0034ac0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0034c00000000000000003) TDO (0034b00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0034c40000000000000003) TDO (0034c00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0034c80000000000000003) TDO (0034c40000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0034cc0004000000000003) TDO (0034c80000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0034d00000000000000003) TDO (0034cc0004000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0035000000000000000003) TDO (0034d00000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0035040000000000000003) TDO (0035000000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0035080000040000000003) TDO (0035040000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00350c0000040000000003) TDO (0035080000040000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0035100000040000000003) TDO (00350c0000040000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0035200000000000000003) TDO (0035100000040000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0035240000000000000003) TDO (0035200000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0035280000000000000003) TDO (0035240000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00352c8000000000000003) TDO (0035280000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0035301000000000000003) TDO (00352c8000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0035400000000020000003) TDO (0035301000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0035440000000000000003) TDO (0035400000000020000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0035480000800000000003) TDO (0035440000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00354c0000000000000003) TDO (0035480000800000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0035504400002000000003) TDO (00354c0000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0035800000000000500003) TDO (0035504400002000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0035840000040000400003) TDO (0035800000000000500001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0035880000000000c00003) TDO (0035840000040000400001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (00358c0000000000200003) TDO (0035880000000000c00001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0035900000000000000003) TDO (00358c0000000000200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0035a00000000000280003) TDO (0035900000000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0035a40000000000a80003) TDO (0035a00000000000280001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0035a80000000000880003) TDO (0035a40000000000a80001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0035ac0000000000280003) TDO (0035a80000000000880001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0035b00000000000200003) TDO (0035ac0000000000280001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0035c00000804000000003) TDO (0035b00000000000200001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0035c40010800000000003) TDO (0035c00000804000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0035c80010000000000003) TDO (0035c40010800000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0035cc0000800000000003) TDO (0035c80010000000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0035d00000800000000003) TDO (0035cc0000800000000001) ;
+RUNTEST 1 TCK;
+SDR 82 TDI (0035d00000800000000003) TDO (0035d00000800000000001) ;
+//Loading device with 'ispen' instruction.
+SIR 8 TDI (e8) ;
+SDR 6 TDI (05) SMASK (3f) ;
+//Loading device with 'bypass' instruction.
+SIR 8 TDI (ff) ;
+TIR 0 ;
+HIR 0 ;
+HDR 0 ;
+TDR 0 ;
+// Loading devices with 'conld' or 'bypass' instruction.
+SIR 8 TDI (f0) ;
+RUNTEST 100 TCK;
+TIR 0 ;
+HIR 0 ;
+HDR 0 ;
+TDR 0 ;
+TIR 0 ;
+HIR 0 ;
+TDR 0 ;
+HDR 0 ;
+SIR 8 TDI (ff) ;
+SDR 1 TDI (00) SMASK (01) ;
diff --git a/cpld/XC95144XL/MXSE.syr b/cpld/XC95144XL/MXSE.syr
index 48ed155..21736cd 100644
--- a/cpld/XC95144XL/MXSE.syr
+++ b/cpld/XC95144XL/MXSE.syr
@@ -3,14 +3,14 @@ Copyright (c) 1995-2013 Xilinx, Inc.  All rights reserved.
 --> Parameter TMPDIR set to xst/projnav.tmp
 
 
-Total REAL time to Xst completion: 0.00 secs
-Total CPU time to Xst completion: 0.87 secs
+Total REAL time to Xst completion: 1.00 secs
+Total CPU time to Xst completion: 0.96 secs
  
 --> Parameter xsthdpdir set to xst
 
 
-Total REAL time to Xst completion: 0.00 secs
-Total CPU time to Xst completion: 0.89 secs
+Total REAL time to Xst completion: 1.00 secs
+Total CPU time to Xst completion: 0.98 secs
  
 --> Reading design: MXSE.prj
 
@@ -217,8 +217,8 @@ Synthesizing Unit <IOBM>.
     Found finite state machine <FSM_2> for signal <IOS>.
     -----------------------------------------------------------------------
     | States             | 8                                              |
-    | Transitions        | 15                                             |
-    | Inputs             | 6                                              |
+    | Transitions        | 16                                             |
+    | Inputs             | 7                                              |
     | Outputs            | 8                                              |
     | Clock              | C16M                      (rising_edge)        |
     | Power Up State     | 000                                            |
@@ -226,8 +226,8 @@ Synthesizing Unit <IOBM>.
     | Implementation     | automatic                                      |
     -----------------------------------------------------------------------
     Found 1-bit register for signal <IOBERR>.
+    Found 1-bit register for signal <nASout>.
     Found 1-bit register for signal <IOACT>.
-    Found 1-bit register for signal <nAS>.
     Found 1-bit register for signal <nLDS>.
     Found 1-bit register for signal <nUDS>.
     Found 1-bit register for signal <nDinLE>.
@@ -236,6 +236,9 @@ Synthesizing Unit <IOBM>.
     Found 1-bit register for signal <nVMA>.
     Found 1-bit register for signal <BERRrf>.
     Found 1-bit register for signal <BERRrr>.
+    Found 1-bit register for signal <BG>.
+    Found 1-bit register for signal <BGr0>.
+    Found 1-bit register for signal <BGr1>.
     Found 1-bit register for signal <DTACKrf>.
     Found 1-bit register for signal <DTACKrr>.
     Found 1-bit register for signal <Er>.
@@ -250,7 +253,7 @@ Synthesizing Unit <IOBM>.
     Summary:
 	inferred   1 Finite State Machine(s).
 	inferred   1 Counter(s).
-	inferred  20 D-type flip-flop(s).
+	inferred  22 D-type flip-flop(s).
 Unit <IOBM> synthesized.
 
 
@@ -283,6 +286,21 @@ Unit <FSB> synthesized.
 
 Synthesizing Unit <MXSE>.
     Related source file is "../MXSE.v".
+WARNING:Xst:647 - Input <SW<2>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
+    Found 1-bit tristate buffer for signal <nAS_IOB>.
+    Found 1-bit tristate buffer for signal <nLDS_IOB>.
+    Found 1-bit tristate buffer for signal <nUDS_IOB>.
+    Found 1-bit tristate buffer for signal <nVMA_IOB>.
+    Found 1-bit register for signal <Disable>.
+    Found 1-bit register for signal <IPL2r0>.
+    Found 1-bit register for signal <IPL2r1>.
+    Found 1-bit register for signal <RESDone>.
+    Found 1-bit register for signal <RESr0>.
+    Found 1-bit register for signal <RESr1>.
+    Found 1-bit register for signal <RESr2>.
+    Summary:
+	inferred   7 D-type flip-flop(s).
+	inferred   4 Tristate(s).
 Unit <MXSE> synthesized.
 
 
@@ -293,8 +311,10 @@ Macro Statistics
 # Counters                                             : 2
  5-bit up counter                                      : 1
  8-bit up counter                                      : 1
-# Registers                                            : 58
- 1-bit register                                        : 58
+# Registers                                            : 68
+ 1-bit register                                        : 68
+# Tristates                                            : 4
+ 1-bit tristate buffer                                 : 4
 
 =========================================================================
 
@@ -303,18 +323,18 @@ Macro Statistics
 =========================================================================
 
 Analyzing FSM <FSM_2> for best encoding.
-Optimizing FSM <iobm/IOS/FSM> on signal <IOS[1:4]> with johnson encoding.
+Optimizing FSM <iobm/IOS/FSM> on signal <IOS[1:3]> with gray encoding.
 -------------------
  State | Encoding
 -------------------
- 000   | 0000
- 001   | 0001
- 010   | 0011
- 011   | 0111
- 100   | 1111
- 101   | 1110
- 110   | 1100
- 111   | 1000
+ 000   | 000
+ 001   | 001
+ 010   | 011
+ 011   | 010
+ 100   | 110
+ 101   | 111
+ 110   | 101
+ 111   | 100
 -------------------
 Analyzing FSM <FSM_1> for best encoding.
 Optimizing FSM <iobs/PS/FSM> on signal <PS[1:2]> with johnson encoding.
@@ -340,6 +360,10 @@ Optimizing FSM <ram/RS/FSM> on signal <RS[1:3]> with user encoding.
  111   | 111
  110   | 110
 -------------------
+WARNING:Xst:1426 - The value init of the FF/Latch 0 hinder the constant cleaning in the block RESDone.
+   You should achieve better results by setting this init to 1.
+WARNING:Xst:1426 - The value init of the FF/Latch 0 hinder the constant cleaning in the block Disable.
+   You should achieve better results by setting this init to 1.
 
 =========================================================================
 Advanced HDL Synthesis Report
@@ -349,16 +373,27 @@ Macro Statistics
 # Counters                                             : 2
  5-bit up counter                                      : 1
  8-bit up counter                                      : 1
-# Registers                                            : 38
- Flip-Flops                                            : 38
+# Registers                                            : 47
+ Flip-Flops                                            : 47
 
 =========================================================================
 
 =========================================================================
 *                         Low Level Synthesis                           *
 =========================================================================
+WARNING:Xst:1426 - The value init of the FF/Latch RESDone hinder the constant cleaning in the block MXSE.
+   You should achieve better results by setting this init to 1.
+WARNING:Xst:1426 - The value init of the FF/Latch Disable hinder the constant cleaning in the block MXSE.
+   You should achieve better results by setting this init to 1.
 
 Optimizing unit <MXSE> ...
+  implementation constraint: INIT=r	 : RESr0
+  implementation constraint: INIT=r	 : RESr1
+  implementation constraint: INIT=r	 : RESr2
+  implementation constraint: INIT=r	 : IPL2r0
+  implementation constraint: INIT=r	 : IPL2r1
+  implementation constraint: INIT=r	 : Disable
+  implementation constraint: INIT=r	 : RESDone
 
 Optimizing unit <CS> ...
   implementation constraint: INIT=r	 : nOverlay0
@@ -387,10 +422,12 @@ Optimizing unit <FSB> ...
 Optimizing unit <IOBM> ...
   implementation constraint: INIT=r	 : IOREQr
   implementation constraint: INIT=r	 : ETACK
+  implementation constraint: INIT=r	 : BGr0
+  implementation constraint: INIT=r	 : BGr1
+  implementation constraint: INIT=r	 : BG
   implementation constraint: INIT=r	 : IOS_FSM_FFd1
   implementation constraint: INIT=r	 : IOS_FSM_FFd2
   implementation constraint: INIT=r	 : IOS_FSM_FFd3
-  implementation constraint: INIT=r	 : IOS_FSM_FFd4
 
 Optimizing unit <CNT> ...
   implementation constraint: INIT=r	 : RefDone
@@ -430,40 +467,44 @@ Clock Enable                       : YES
 wysiwyg                            : NO
 
 Design Statistics
-# IOs                              : 67
+# IOs                              : 75
 
 Cell Usage :
-# BELS                             : 607
-#      AND2                        : 169
-#      AND3                        : 25
-#      AND4                        : 14
+# BELS                             : 606
+#      AND2                        : 168
+#      AND3                        : 27
+#      AND4                        : 12
+#      AND5                        : 1
 #      AND6                        : 2
 #      AND7                        : 1
 #      AND8                        : 3
-#      GND                         : 6
-#      INV                         : 256
-#      OR2                         : 108
-#      OR3                         : 9
+#      GND                         : 7
+#      INV                         : 260
+#      OR2                         : 99
+#      OR3                         : 11
 #      OR4                         : 1
-#      VCC                         : 1
+#      VCC                         : 2
 #      XOR2                        : 12
-# FlipFlops/Latches                : 80
-#      FD                          : 54
-#      FDCE                        : 26
-# IO Buffers                       : 67
-#      IBUF                        : 35
-#      OBUF                        : 32
+# FlipFlops/Latches                : 89
+#      FD                          : 60
+#      FDCE                        : 29
+# Tri-States                       : 1
+#      BUFE                        : 1
+# IO Buffers                       : 74
+#      IBUF                        : 39
+#      OBUF                        : 31
+#      OBUFE                       : 4
 =========================================================================
 
 
-Total REAL time to Xst completion: 27.00 secs
-Total CPU time to Xst completion: 27.11 secs
+Total REAL time to Xst completion: 29.00 secs
+Total CPU time to Xst completion: 29.19 secs
  
 --> 
 
-Total memory usage is 204052 kilobytes
+Total memory usage is 205076 kilobytes
 
 Number of errors   :    0 (   0 filtered)
-Number of warnings :    0 (   0 filtered)
+Number of warnings :    5 (   0 filtered)
 Number of infos    :    0 (   0 filtered)
 
diff --git a/cpld/XC95144XL/MXSE.tspec b/cpld/XC95144XL/MXSE.tspec
index f275ea6..cda732a 100644
--- a/cpld/XC95144XL/MXSE.tspec
+++ b/cpld/XC95144XL/MXSE.tspec
@@ -1,81 +1,81 @@
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/IOS_FSM_FFd4.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd4.Q:TO:iobm/IOS_FSM_FFd4.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/IOS_FSM_FFd4.D:666
-TS_CLK2X_IOB:FROM:iobm/IOREQr.Q:TO:iobm/IOS_FSM_FFd4.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/IOS_FSM_FFd4.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd4.Q:TO:iobm/IOS_FSM_FFd3.D:666
+TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/IOS_FSM_FFd3.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/IOS_FSM_FFd3.D:666
-TS_CLK2X_IOB:FROM:iobm/DTACKrr.Q:TO:iobm/IOS_FSM_FFd3.D:666
-TS_CLK2X_IOB:FROM:iobm/DTACKrf.Q:TO:iobm/IOS_FSM_FFd3.D:666
-TS_CLK2X_IOB:FROM:iobm/ETACK.Q:TO:iobm/IOS_FSM_FFd3.D:666
-TS_CLK2X_IOB:FROM:iobm/RESrr.Q:TO:iobm/IOS_FSM_FFd3.D:666
-TS_CLK2X_IOB:FROM:iobm/RESrf.Q:TO:iobm/IOS_FSM_FFd3.D:666
-TS_CLK2X_IOB:FROM:iobm/BERRrr.Q:TO:iobm/IOS_FSM_FFd3.D:666
-TS_CLK2X_IOB:FROM:iobm/BERRrf.Q:TO:iobm/IOS_FSM_FFd3.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd4.Q:TO:IOACT.D:666
+TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/IOS_FSM_FFd3.D:666
+TS_CLK2X_IOB:FROM:nAoutOE_OBUF.Q:TO:iobm/IOS_FSM_FFd3.D:666
+TS_CLK2X_IOB:FROM:iobm/IOREQr.Q:TO:iobm/IOS_FSM_FFd3.D:666
+TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/IOS_FSM_FFd2.D:666
+TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/IOS_FSM_FFd2.D:666
+TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/IOS_FSM_FFd2.D:666
+TS_CLK2X_IOB:FROM:iobm/ETACK.Q:TO:iobm/IOS_FSM_FFd2.D:666
+TS_CLK2X_IOB:FROM:iobm/BERRrf.Q:TO:iobm/IOS_FSM_FFd2.D:666
+TS_CLK2X_IOB:FROM:iobm/BERRrr.Q:TO:iobm/IOS_FSM_FFd2.D:666
+TS_CLK2X_IOB:FROM:iobm/DTACKrf.Q:TO:iobm/IOS_FSM_FFd2.D:666
+TS_CLK2X_IOB:FROM:iobm/DTACKrr.Q:TO:iobm/IOS_FSM_FFd2.D:666
+TS_CLK2X_IOB:FROM:iobm/RESrf.Q:TO:iobm/IOS_FSM_FFd2.D:666
+TS_CLK2X_IOB:FROM:iobm/RESrr.Q:TO:iobm/IOS_FSM_FFd2.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:IOACT.D:666
-TS_CLK2X_IOB:FROM:iobm/DTACKrr.Q:TO:IOACT.D:666
-TS_CLK2X_IOB:FROM:iobm/DTACKrf.Q:TO:IOACT.D:666
-TS_CLK2X_IOB:FROM:iobm/ETACK.Q:TO:IOACT.D:666
-TS_CLK2X_IOB:FROM:iobm/RESrr.Q:TO:IOACT.D:666
-TS_CLK2X_IOB:FROM:iobm/RESrf.Q:TO:IOACT.D:666
-TS_CLK2X_IOB:FROM:iobm/BERRrr.Q:TO:IOACT.D:666
-TS_CLK2X_IOB:FROM:iobm/BERRrf.Q:TO:IOACT.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:IOACT.D:666
-TS_CLK2X_IOB:FROM:iobm/IOREQr.Q:TO:IOACT.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:IOACT.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:IOBERR.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd4.Q:TO:IOBERR.D:666
-TS_CLK2X_IOB:FROM:IOBERR.Q:TO:IOBERR.D:666
-TS_CLK2X_IOB:FROM:iobm/DTACKrr.Q:TO:IOBERR.D:666
-TS_CLK2X_IOB:FROM:iobm/DTACKrf.Q:TO:IOBERR.D:666
-TS_CLK2X_IOB:FROM:iobm/ETACK.Q:TO:IOBERR.D:666
-TS_CLK2X_IOB:FROM:iobm/RESrr.Q:TO:IOBERR.D:666
-TS_CLK2X_IOB:FROM:iobm/RESrf.Q:TO:IOBERR.D:666
-TS_CLK2X_IOB:FROM:iobm/BERRrr.Q:TO:IOBERR.D:666
-TS_CLK2X_IOB:FROM:iobm/BERRrf.Q:TO:IOBERR.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:IOBERR.D:666
+TS_CLK2X_IOB:FROM:iobm/DTACKrf.Q:TO:IOACT.D:666
+TS_CLK2X_IOB:FROM:iobm/DTACKrr.Q:TO:IOACT.D:666
+TS_CLK2X_IOB:FROM:iobm/RESrf.Q:TO:IOACT.D:666
+TS_CLK2X_IOB:FROM:iobm/RESrr.Q:TO:IOACT.D:666
+TS_CLK2X_IOB:FROM:nAoutOE_OBUF.Q:TO:IOACT.D:666
+TS_CLK2X_IOB:FROM:iobm/IOREQr.Q:TO:IOACT.D:666
+TS_CLK2X_IOB:FROM:iobm/ETACK.Q:TO:IOACT.D:666
+TS_CLK2X_IOB:FROM:iobm/BERRrf.Q:TO:IOACT.D:666
+TS_CLK2X_IOB:FROM:iobm/BERRrr.Q:TO:IOACT.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:IOBERR.D:666
-TS_CLK_FSB:FROM:cs/nOverlay0.Q:TO:cs/nOverlay1.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:cs/nOverlay1.CE:400
+TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:IOBERR.D:666
+TS_CLK2X_IOB:FROM:IOBERR.Q:TO:IOBERR.D:666
+TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:IOBERR.D:666
+TS_CLK2X_IOB:FROM:iobm/RESrf.Q:TO:IOBERR.D:666
+TS_CLK2X_IOB:FROM:iobm/RESrr.Q:TO:IOBERR.D:666
+TS_CLK2X_IOB:FROM:iobm/BERRrf.Q:TO:IOBERR.D:666
+TS_CLK2X_IOB:FROM:iobm/BERRrr.Q:TO:IOBERR.D:666
+TS_CLK2X_IOB:FROM:iobm/DTACKrf.Q:TO:IOBERR.D:666
+TS_CLK2X_IOB:FROM:iobm/DTACKrr.Q:TO:IOBERR.D:666
+TS_CLK2X_IOB:FROM:iobm/ETACK.Q:TO:IOBERR.D:666
+TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/Once.D:400
 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/Once.D:400
 TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/Once.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/Once.D:400
 TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/Once.D:400
+TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/Once.D:400
 TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/Once.D:400
-TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/Once.D:400
 TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:cnt/RefDone.D:400
 TS_CLK_FSB:FROM:RefAck.Q:TO:cnt/RefDone.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefDone.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:cnt/RefDone.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:cnt/RefDone.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefDone.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefDone.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefDone.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/RefDone.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:cnt/RefDone.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:cnt/RefDone.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:cnt/RefDone.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/Once.D:400
-TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:iobs/Once.D:400
-TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/Once.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/Once.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/Once.D:400
 TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/Once.D:400
+TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:iobs/Once.D:400
+TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/Once.D:400
+TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/Once.D:400
+TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/Once.D:400
+TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/Once.D:400
+TS_CLK_FSB:FROM:cs/nOverlay0.Q:TO:cs/nOverlay1.D:400
+TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:cs/nOverlay1.CE:400
 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:BERR_IOBS.D:400
+TS_CLK_FSB:FROM:BERR_IOBS.Q:TO:BERR_IOBS.D:400
 TS_CLK_FSB:FROM:iobs/Once.Q:TO:BERR_IOBS.D:400
+TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:BERR_IOBS.D:400
 TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:BERR_IOBS.D:400
 TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:BERR_IOBS.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:BERR_IOBS.D:400
-TS_CLK_FSB:FROM:BERR_IOBS.Q:TO:BERR_IOBS.D:400
-TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:IORW0.D:400
-TS_CLK_FSB:FROM:iobs/IORW1.Q:TO:IORW0.D:400
-TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:IORW0.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:IORW0.D:400
-TS_CLK_FSB:FROM:iobs/Once.Q:TO:IORW0.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:IORW0.D:400
 TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:IORW0.D:400
+TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:IORW0.D:400
+TS_CLK_FSB:FROM:iobs/Once.Q:TO:IORW0.D:400
+TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:IORW0.D:400
 TS_CLK_FSB:FROM:IORW0.Q:TO:IORW0.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:cs/nOverlay0.D:400
+TS_CLK_FSB:FROM:iobs/IORW1.Q:TO:IORW0.D:400
+TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:IORW0.D:400
+TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:IORW0.D:400
 TS_CLK_FSB:FROM:cs/nOverlay0.Q:TO:cs/nOverlay0.D:400
+TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:cs/nOverlay0.D:400
 TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:IOL0.D:400
 TS_CLK_FSB:FROM:iobs/IOL1.Q:TO:IOL0.D:400
 TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:IOL0.CE:400
@@ -85,35 +85,35 @@ TS_CLK_FSB:FROM:iobs/IOU1.Q:TO:IOU0.D:400
 TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:IOU0.CE:400
 TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:IOU0.CE:400
 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:TimeoutA.D:400
+TS_CLK_FSB:FROM:TimeoutA.Q:TO:TimeoutA.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:TimeoutA.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:TimeoutA.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:TimeoutA.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:TimeoutA.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:TimeoutA.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:TimeoutA.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:TimeoutA.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:TimeoutA.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:TimeoutA.D:400
-TS_CLK_FSB:FROM:TimeoutA.Q:TO:TimeoutA.D:400
 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:TimeoutB.D:400
-TS_CLK_FSB:FROM:cnt/TimeoutBPre.Q:TO:TimeoutB.D:400
+TS_CLK_FSB:FROM:TimeoutB.Q:TO:TimeoutB.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:TimeoutB.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:TimeoutB.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:TimeoutB.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:TimeoutB.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:TimeoutB.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:TimeoutB.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:TimeoutB.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:TimeoutB.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:TimeoutB.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:TimeoutB.D:400
-TS_CLK_FSB:FROM:TimeoutB.Q:TO:TimeoutB.D:400
+TS_CLK_FSB:FROM:cnt/TimeoutBPre.Q:TO:TimeoutB.D:400
 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:cnt/TimeoutBPre.D:400
+TS_CLK_FSB:FROM:cnt/TimeoutBPre.Q:TO:cnt/TimeoutBPre.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/TimeoutBPre.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:cnt/TimeoutBPre.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:cnt/TimeoutBPre.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/TimeoutBPre.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/TimeoutBPre.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/TimeoutBPre.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/TimeoutBPre.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:cnt/TimeoutBPre.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:cnt/TimeoutBPre.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:cnt/TimeoutBPre.D:400
-TS_CLK_FSB:FROM:cnt/TimeoutBPre.Q:TO:cnt/TimeoutBPre.D:400
 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/BERR0r.D:400
 TS_CLK_FSB:FROM:TimeoutB.Q:TO:fsb/BERR0r.D:400
 TS_CLK_FSB:FROM:fsb/BERR0r.Q:TO:fsb/BERR0r.D:400
@@ -121,275 +121,272 @@ TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/BERR1r.D:400
 TS_CLK_FSB:FROM:BERR_IOBS.Q:TO:fsb/BERR1r.D:400
 TS_CLK_FSB:FROM:fsb/BERR1r.Q:TO:fsb/BERR1r.D:400
 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/Ready0r.D:400
-TS_CLK_FSB:FROM:ram/RAMReady.Q:TO:fsb/Ready0r.D:400
 TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:fsb/Ready0r.D:400
 TS_CLK_FSB:FROM:fsb/Ready0r.Q:TO:fsb/Ready0r.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/Ready1r.D:400
-TS_CLK_FSB:FROM:iobs/IOReady.Q:TO:fsb/Ready1r.D:400
+TS_CLK_FSB:FROM:ram/RAMReady.Q:TO:fsb/Ready0r.D:400
 TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:fsb/Ready1r.D:400
 TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:fsb/Ready1r.D:400
 TS_CLK_FSB:FROM:fsb/Ready1r.Q:TO:fsb/Ready1r.D:400
+TS_CLK_FSB:FROM:iobs/IOReady.Q:TO:fsb/Ready1r.D:400
+TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/Ready1r.D:400
 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/Ready2r.D:400
-TS_CLK_FSB:FROM:TimeoutA.Q:TO:fsb/Ready2r.D:400
 TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:fsb/Ready2r.D:400
+TS_CLK_FSB:FROM:TimeoutA.Q:TO:fsb/Ready2r.D:400
 TS_CLK_FSB:FROM:fsb/Ready2r.Q:TO:fsb/Ready2r.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/VPA.D:400
-TS_CLK_FSB:FROM:fsb/BERR0r.Q:TO:fsb/VPA.D:400
-TS_CLK_FSB:FROM:fsb/BERR1r.Q:TO:fsb/VPA.D:400
-TS_CLK_FSB:FROM:BERR_IOBS.Q:TO:fsb/VPA.D:400
-TS_CLK_FSB:FROM:TimeoutB.Q:TO:fsb/VPA.D:400
-TS_CLK_FSB:FROM:fsb/Ready0r.Q:TO:fsb/VPA.D:400
-TS_CLK_FSB:FROM:ram/RAMReady.Q:TO:fsb/VPA.D:400
 TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:fsb/VPA.D:400
-TS_CLK_FSB:FROM:fsb/Ready2r.Q:TO:fsb/VPA.D:400
 TS_CLK_FSB:FROM:TimeoutA.Q:TO:fsb/VPA.D:400
+TS_CLK_FSB:FROM:fsb/Ready2r.Q:TO:fsb/VPA.D:400
+TS_CLK_FSB:FROM:fsb/VPA.Q:TO:fsb/VPA.D:400
+TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/VPA.D:400
 TS_CLK_FSB:FROM:fsb/Ready1r.Q:TO:fsb/VPA.D:400
 TS_CLK_FSB:FROM:iobs/IOReady.Q:TO:fsb/VPA.D:400
+TS_CLK_FSB:FROM:BERR_IOBS.Q:TO:fsb/VPA.D:400
+TS_CLK_FSB:FROM:fsb/BERR0r.Q:TO:fsb/VPA.D:400
+TS_CLK_FSB:FROM:fsb/BERR1r.Q:TO:fsb/VPA.D:400
+TS_CLK_FSB:FROM:Park.Q:TO:fsb/VPA.D:400
+TS_CLK_FSB:FROM:fsb/Ready0r.Q:TO:fsb/VPA.D:400
+TS_CLK_FSB:FROM:ram/RAMReady.Q:TO:fsb/VPA.D:400
+TS_CLK_FSB:FROM:TimeoutB.Q:TO:fsb/VPA.D:400
 TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:fsb/VPA.D:400
-TS_CLK_FSB:FROM:fsb/VPA.Q:TO:fsb/VPA.D:400
 TS_CLK_FSB:FROM:iobs/Load1.Q:TO:iobs/IOL1.CE:400
+TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/IORW1.D:400
+TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/IORW1.D:400
 TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:iobs/IORW1.D:400
 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/IORW1.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/IORW1.D:400
 TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/IORW1.D:400
-TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/IORW1.D:400
-TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/IORW1.D:400
+TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/IORW1.D:400
 TS_CLK_FSB:FROM:iobs/IORW1.Q:TO:iobs/IORW1.D:400
 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/IOReady.D:400
+TS_CLK_FSB:FROM:iobs/IOReady.Q:TO:iobs/IOReady.D:400
 TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/IOReady.D:400
+TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/IOReady.D:400
 TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/IOReady.D:400
 TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:iobs/IOReady.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/IOReady.D:400
-TS_CLK_FSB:FROM:iobs/IOReady.Q:TO:iobs/IOReady.D:400
 TS_CLK_FSB:FROM:iobs/Load1.Q:TO:iobs/IOU1.CE:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RAMDIS2.D:400
 TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RAMDIS2.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RAMDIS2.D:400
+TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RAMDIS2.D:400
+TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RAMDIS2.D:400
+TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RAMDIS2.D:400
+TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RAMDIS2.D:400
 TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RAMDIS2.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RAMDIS2.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RAMDIS2.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RAMDIS2.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RAMDIS2.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RAMDIS2.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RAMDIS2.D:400
-TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RAMDIS2.D:400
 TS_CLK_FSB:FROM:ram/RAMDIS2.Q:TO:ram/RAMDIS2.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:nDTACK_FSB_OBUF.D:400
-TS_CLK_FSB:FROM:fsb/BERR0r.Q:TO:nDTACK_FSB_OBUF.D:400
-TS_CLK_FSB:FROM:fsb/BERR1r.Q:TO:nDTACK_FSB_OBUF.D:400
-TS_CLK_FSB:FROM:BERR_IOBS.Q:TO:nDTACK_FSB_OBUF.D:400
-TS_CLK_FSB:FROM:TimeoutB.Q:TO:nDTACK_FSB_OBUF.D:400
-TS_CLK_FSB:FROM:fsb/Ready0r.Q:TO:nDTACK_FSB_OBUF.D:400
-TS_CLK_FSB:FROM:ram/RAMReady.Q:TO:nDTACK_FSB_OBUF.D:400
+TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RAMDIS2.D:400
 TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:nDTACK_FSB_OBUF.D:400
-TS_CLK_FSB:FROM:fsb/Ready2r.Q:TO:nDTACK_FSB_OBUF.D:400
 TS_CLK_FSB:FROM:TimeoutA.Q:TO:nDTACK_FSB_OBUF.D:400
+TS_CLK_FSB:FROM:fsb/Ready2r.Q:TO:nDTACK_FSB_OBUF.D:400
+TS_CLK_FSB:FROM:nDTACK_FSB_OBUF.Q:TO:nDTACK_FSB_OBUF.D:400
+TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:nDTACK_FSB_OBUF.D:400
 TS_CLK_FSB:FROM:fsb/Ready1r.Q:TO:nDTACK_FSB_OBUF.D:400
 TS_CLK_FSB:FROM:iobs/IOReady.Q:TO:nDTACK_FSB_OBUF.D:400
+TS_CLK_FSB:FROM:BERR_IOBS.Q:TO:nDTACK_FSB_OBUF.D:400
+TS_CLK_FSB:FROM:fsb/BERR0r.Q:TO:nDTACK_FSB_OBUF.D:400
+TS_CLK_FSB:FROM:fsb/BERR1r.Q:TO:nDTACK_FSB_OBUF.D:400
+TS_CLK_FSB:FROM:Park.Q:TO:nDTACK_FSB_OBUF.D:400
+TS_CLK_FSB:FROM:fsb/Ready0r.Q:TO:nDTACK_FSB_OBUF.D:400
+TS_CLK_FSB:FROM:ram/RAMReady.Q:TO:nDTACK_FSB_OBUF.D:400
+TS_CLK_FSB:FROM:TimeoutB.Q:TO:nDTACK_FSB_OBUF.D:400
 TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:nDTACK_FSB_OBUF.D:400
-TS_CLK_FSB:FROM:nDTACK_FSB_OBUF.Q:TO:nDTACK_FSB_OBUF.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RASEL.D:400
+TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RASEL.D:400
+TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RASEL.D:400
+TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RASEL.D:400
 TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RASEL.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RASEL.D:400
 TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RASEL.D:400
+TS_CLK_FSB:FROM:ram/BACTr.Q:TO:ram/RASEL.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RASEL.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RASEL.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RASEL.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RASEL.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RASEL.D:400
-TS_CLK_FSB:FROM:ram/BACTr.Q:TO:ram/RASEL.D:400
-TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RASEL.D:400
+TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RASEL.D:400
 TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RASEL.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RS_FSM_FFd2.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RS_FSM_FFd2.D:400
+TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RS_FSM_FFd2.D:400
+TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RS_FSM_FFd2.D:400
 TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RS_FSM_FFd2.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RS_FSM_FFd2.D:400
+TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RS_FSM_FFd2.D:400
+TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RS_FSM_FFd2.D:400
 TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RS_FSM_FFd2.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RS_FSM_FFd2.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RS_FSM_FFd2.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RS_FSM_FFd2.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RS_FSM_FFd2.D:400
 TS_CLK_FSB:FROM:ram/BACTr.Q:TO:ram/RS_FSM_FFd2.D:400
-TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RS_FSM_FFd2.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RS_FSM_FFd1.D:400
 TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RS_FSM_FFd1.D:400
 TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RS_FSM_FFd1.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RS_FSM_FFd1.D:400
-TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RS_FSM_FFd1.D:400
 TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RS_FSM_FFd1.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RS_FSM_FFd3.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RS_FSM_FFd3.D:400
+TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RS_FSM_FFd1.D:400
+TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RS_FSM_FFd1.D:400
+TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RS_FSM_FFd1.D:400
 TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RS_FSM_FFd3.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RS_FSM_FFd3.D:400
+TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RS_FSM_FFd3.D:400
+TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RS_FSM_FFd3.D:400
+TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RS_FSM_FFd3.D:400
+TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RS_FSM_FFd3.D:400
 TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RS_FSM_FFd3.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RS_FSM_FFd3.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RS_FSM_FFd3.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RS_FSM_FFd3.D:400
-TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RS_FSM_FFd3.D:400
 TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RS_FSM_FFd3.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RS_FSM_FFd3.D:400
 TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/PS_FSM_FFd2.D:400
-TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:iobs/PS_FSM_FFd2.D:400
 TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/PS_FSM_FFd2.D:400
 TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/PS_FSM_FFd2.D:400
 TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:iobs/PS_FSM_FFd2.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/PS_FSM_FFd2.D:400
+TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:iobs/PS_FSM_FFd2.D:400
 TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/PS_FSM_FFd2.D:400
+TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/PS_FSM_FFd2.D:400
 TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/PS_FSM_FFd1.D:400
-TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:iobs/PS_FSM_FFd1.D:400
 TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/PS_FSM_FFd1.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<0>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:cnt/RefCnt<5>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/RefCnt<5>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefCnt<5>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<5>.D:400
+TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:iobs/PS_FSM_FFd1.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<5>.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<5>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:cnt/RefCnt<6>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:cnt/RefCnt<6>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/RefCnt<6>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefCnt<6>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<6>.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<5>.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefCnt<5>.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/RefCnt<5>.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<6>.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:cnt/RefCnt<6>.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<6>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<1>.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<6>.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefCnt<6>.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/RefCnt<6>.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<1>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<2>.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<2>.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<2>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefCnt<3>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<3>.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<3>.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<3>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/RefCnt<4>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefCnt<4>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<4>.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<3>.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<4>.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<4>.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<4>.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefCnt<4>.D:400
 TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/Load1.D:400
+TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/Load1.D:400
 TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:iobs/Load1.D:400
 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/Load1.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/Load1.D:400
 TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/Load1.D:400
-TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/Load1.D:400
+TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/Load1.D:400
 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/BACTr.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:cnt/RefCnt<7>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:cnt/RefCnt<7>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:cnt/RefCnt<7>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/RefCnt<7>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefCnt<7>.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<7>.D:400
+TS_CLK_FSB:FROM:RESr0.Q:TO:RESr1.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<7>.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:cnt/RefCnt<7>.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:cnt/RefCnt<7>.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<7>.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:RefAck.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<7>.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefCnt<7>.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/RefCnt<7>.D:400
+TS_CLK_FSB:FROM:RESr1.Q:TO:RESr2.D:400
 TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:RefAck.D:400
-TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:ALE0S.D:400
+TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:RefAck.D:400
+TS_CLK_FSB:FROM:RESr0.Q:TO:RESDone.CE:400
+TS_CLK_FSB:FROM:RESr1.Q:TO:RESDone.CE:400
+TS_CLK_FSB:FROM:RESr2.Q:TO:RESDone.CE:400
 TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:ALE0S.D:400
+TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:ALE0S.D:400
 TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:IOREQ.D:400
-TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:IOREQ.D:400
 TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:IOREQ.D:400
 TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:IOREQ.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:IOREQ.D:400
-TS_CLK_FSB:FROM:iobs/Once.Q:TO:IOREQ.D:400
 TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:IOREQ.D:400
+TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:IOREQ.D:400
+TS_CLK_FSB:FROM:iobs/Once.Q:TO:IOREQ.D:400
+TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:IOREQ.D:400
+TS_CLK_FSB:FROM:IPL2r0.Q:TO:IPL2r1.D:400
 TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/Clear1.D:400
 TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/Clear1.D:400
 TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/Clear1.D:400
 TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RAMDIS1.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RAMDIS1.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RAMDIS1.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RAMDIS1.D:400
 TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RAMDIS1.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RAMDIS1.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RAMDIS1.D:400
 TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RAMDIS1.D:400
-TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RAMDIS1.D:400
-TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RAMDIS1.D:400
 TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RAMDIS1.D:400
 TS_CLK_FSB:FROM:ram/BACTr.Q:TO:ram/RAMDIS1.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RAMReady.D:400
-TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RAMReady.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RAMReady.D:400
-TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RAMReady.D:400
-TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RAMReady.D:400
+TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RAMDIS1.D:400
+TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RAMDIS1.D:400
+TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RAMDIS1.D:400
+TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RAMDIS1.D:400
 TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RAMReady.D:400
 TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RAMReady.D:400
-TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RAMReady.D:400
-TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RAMReady.D:400
+TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RAMReady.D:400
+TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RAMReady.D:400
 TS_CLK_FSB:FROM:ram/BACTr.Q:TO:ram/RAMReady.D:400
 TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RAMReady.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RAMReady.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RAMReady.D:400
+TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RAMReady.D:400
+TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RAMReady.D:400
+TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RAMReady.D:400
 TS_CLK_FSB:FROM:ram/RASEL.Q:TO:nCAS_OBUF.D:400
-TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:nADoutLE1_OBUF.D:400
+TS_CLK_FSB:FROM:RESr0.Q:TO:Park.CE:400
+TS_CLK_FSB:FROM:RESr1.Q:TO:Park.CE:400
+TS_CLK_FSB:FROM:IPL2r0.Q:TO:Park.CE:400
+TS_CLK_FSB:FROM:RESr2.Q:TO:Park.CE:400
+TS_CLK_FSB:FROM:RESDone.Q:TO:Park.CE:400
+TS_CLK_FSB:FROM:IPL2r1.Q:TO:Park.CE:400
 TS_CLK_FSB:FROM:iobs/Load1.Q:TO:nADoutLE1_OBUF.D:400
+TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:nADoutLE1_OBUF.D:400
 TS_CLK_FSB:FROM:iobs/Clear1.Q:TO:nADoutLE1_OBUF.D:400
-TS_CLK2X_IOB:FROM:nVMA_IOB_OBUF.Q:TO:nVMA_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:IOACT.Q:TO:nVMA_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:nVMA_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:nVMA_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:nVMA_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/VPArr.Q:TO:nVMA_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/VPArf.Q:TO:nVMA_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:nVMA_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:nVMA_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/IOS_FSM_FFd2.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/IOS_FSM_FFd2.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/IOS_FSM_FFd2.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd4.Q:TO:iobm/IOS_FSM_FFd2.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/IOS_FSM_FFd1.D:666
+TS_CLK2X_IOB:FROM:nVMA_IOBout.Q:TO:nVMA_IOBout.D:666
+TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:nVMA_IOBout.D:666
+TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:nVMA_IOBout.D:666
+TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:nVMA_IOBout.D:666
+TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:nVMA_IOBout.D:666
+TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:nVMA_IOBout.D:666
+TS_CLK2X_IOB:FROM:IOACT.Q:TO:nVMA_IOBout.D:666
+TS_CLK2X_IOB:FROM:iobm/VPArf.Q:TO:nVMA_IOBout.D:666
+TS_CLK2X_IOB:FROM:iobm/VPArr.Q:TO:nVMA_IOBout.D:666
+TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:nAS_IOBout.D:666
+TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:nAS_IOBout.D:666
+TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:nAS_IOBout.D:666
+TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:nLDS_IOBout.D:666
+TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:nLDS_IOBout.D:666
+TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:nLDS_IOBout.D:666
+TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:nUDS_IOBout.D:666
+TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:nUDS_IOBout.D:666
+TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:nUDS_IOBout.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/IOS_FSM_FFd1.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd4.Q:TO:iobm/IOS_FSM_FFd1.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/IOS_FSM_FFd1.D:666
+TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/IOS_FSM_FFd1.D:666
+TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/ES<0>.D:666
 TS_CLK2X_IOB:FROM:iobm/Er2.Q:TO:iobm/ES<0>.D:666
 TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/ES<0>.D:666
 TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/ES<0>.D:666
 TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/ES<0>.D:666
 TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:iobm/ES<0>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/ES<0>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/ES<1>.D:666
 TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/ES<1>.D:666
+TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/ES<1>.D:666
 TS_CLK2X_IOB:FROM:iobm/Er2.Q:TO:iobm/ES<1>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:iobm/ES<1>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/ES<1>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/ES<1>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/ES<2>.D:666
 TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/ES<2>.D:666
+TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/ES<2>.D:666
 TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/ES<2>.D:666
 TS_CLK2X_IOB:FROM:iobm/Er2.Q:TO:iobm/ES<2>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:iobm/ES<2>.D:666
 TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/ES<2>.D:666
+TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:iobm/ES<2>.D:666
 TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/ES<3>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/ES<3>.D:666
+TS_CLK2X_IOB:FROM:iobm/Er2.Q:TO:iobm/ES<3>.D:666
 TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/ES<3>.D:666
 TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/ES<3>.D:666
-TS_CLK2X_IOB:FROM:iobm/Er2.Q:TO:iobm/ES<3>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:iobm/ES<3>.D:666
+TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/ES<3>.D:666
 TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:iobm/ES<4>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/ES<4>.D:666
-TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/ES<4>.D:666
+TS_CLK2X_IOB:FROM:iobm/Er2.Q:TO:iobm/ES<4>.D:666
 TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/ES<4>.D:666
 TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/ES<4>.D:666
-TS_CLK2X_IOB:FROM:iobm/Er2.Q:TO:iobm/ES<4>.D:666
+TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/ES<4>.D:666
+TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/ES<4>.D:666
+TS_CLK2X_IOB:FROM:nVMA_IOBout.Q:TO:iobm/ETACK.D:666
 TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/ETACK.D:666
 TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/ETACK.D:666
 TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/ETACK.D:666
 TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/ETACK.D:666
 TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:iobm/ETACK.D:666
-TS_CLK2X_IOB:FROM:nVMA_IOB_OBUF.Q:TO:iobm/ETACK.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:ALE0M.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd4.Q:TO:ALE0M.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:ALE0M.D:666
-TS_CLK2X_IOB:FROM:iobm/IOREQr.Q:TO:ALE0M.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:ALE0M.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:nAS_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd4.Q:TO:nAS_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:nAS_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:nAS_IOB_OBUF.D:666
+TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:ALE0M.D:666
+TS_CLK2X_IOB:FROM:nAoutOE_OBUF.Q:TO:ALE0M.D:666
+TS_CLK2X_IOB:FROM:iobm/IOREQr.Q:TO:ALE0M.D:666
+TS_CLK2X_IOB:FROM:iobm/BGr0.Q:TO:iobm/BGr1.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:nDinLE_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd4.Q:TO:nDinLE_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:nDinLE_OBUF.D:666
+TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:nDinLE_OBUF.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:nDoutOE_OBUF.D:666
 TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:nDoutOE_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd4.Q:TO:nDoutOE_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd4.Q:TO:nLDS_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:nLDS_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:nLDS_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:nLDS_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd4.Q:TO:nUDS_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:nUDS_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:nUDS_IOB_OBUF.D:666
-TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:nUDS_IOB_OBUF.D:666
+TS_CLK2X_IOB:FROM:nAoutOE_OBUF.Q:TO:nAoutOE_OBUF.D:666
+TS_CLK2X_IOB:FROM:iobm/BGr1.Q:TO:nAoutOE_OBUF.D:666
+TS_CLK2X_IOB:FROM:iobm/BGr0.Q:TO:nAoutOE_OBUF.D:666
+TS_CLK2X_IOB:FROM:nAS_IOBout.Q:TO:nAoutOE_OBUF.D:666
diff --git a/cpld/XC95144XL/MXSE.vm6 b/cpld/XC95144XL/MXSE.vm6
index 9a00bc2..25e775d 100644
--- a/cpld/XC95144XL/MXSE.vm6
+++ b/cpld/XC95144XL/MXSE.vm6
@@ -8,481 +8,673 @@ NETWORK | MXSE | 0 | 0 | 16391
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_9_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<9> | 9666 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<9> | 10013 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_9_IBUF | 9488 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_8_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<8> | 9667 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<8> | 10014 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_8_IBUF | 9489 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_15_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<15> | 9668 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<15> | 10015 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_15_IBUF | 9490 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_14_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<14> | 9669 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<14> | 10016 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_13_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<13> | 9670 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<13> | 10017 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_12_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<12> | 9671 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<12> | 10018 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_12_IBUF | 9493 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_11_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<11> | 9672 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<11> | 10019 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_11_IBUF | 9494 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_10_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<10> | 9673 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<10> | 10020 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_10_IBUF | 9495 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_23_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<23> | 9674 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<23> | 10021 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_22_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<22> | 9675 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<22> | 10022 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_21_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<21> | 9676 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<21> | 10023 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_20_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<20> | 9677 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<20> | 10024 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_19_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<19> | 9678 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<19> | 10025 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_18_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<18> | 9679 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<18> | 10026 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_17_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<17> | 9680 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<17> | 10027 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_16_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<16> | 9681 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<16> | 10028 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-
-INPUT_INSTANCE | 0 | 0 | NULL | nBERR_IOB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | nBERR_IOB | 9682 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | nBERR_IOB_IBUF | 9504 | ? | 479 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | CLK2X_IOB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 2
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | CLK2X_IOB | 9683 | PI | 387 | 0 | MXSE_COPY_0_COPY_0 | CLK2X_IOB;CLK2X_IOB;CLK2X_IOB | NULL | NULL | 0 | 100 | NOTYPE
+NODE | CLK2X_IOB | 10029 | PI | 426 | 0 | MXSE_COPY_0_COPY_0 | CLK2X_IOB;CLK2X_IOB;CLK2X_IOB | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 3 | 5 | II_FCLK
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 7 | 5 | II_FCLKINV
-NODE | CLK2X_IOB_IBUF/FCLK- | 9506 | ? | 477 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
+NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
 
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | nVMA_IOB_OBUF | MXSE_COPY_0_COPY_0 | 2155877376 | 10 | 2
+MACROCELL_INSTANCE | PrldLow+Tff+PinTrst+OptxMapped | nVMA_IOBout | MXSE_COPY_0_COPY_0 | 2155893760 | 11 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nVMA_IOB_OBUF | 9508 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOB_OBUF.Q | nVMA_IOB_OBUF | 1 | 0 | MC_UIM
+NODE | nVMA_IOBout | 9830 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOBout.Q | nVMA_IOBout | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9550 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9551 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9552 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
+NODE | iobm/ES<2> | 9885 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9554 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
+NODE | iobm/ES<3> | 9887 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9555 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
+NODE | iobm/ES<4> | 9888 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOACT | 9568 | ? | 456 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOACT.Q | IOACT | 1 | 0 | MC_UIM
+NODE | IOACT | 9899 | ? | 504 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOACT.Q | IOACT | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/VPArf | 9581 | ? | 456 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/VPArf.Q | iobm/VPArf | 1 | 0 | MC_UIM
+NODE | iobm/VPArf | 9919 | ? | 504 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/VPArf.Q | iobm/VPArf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/VPArr | 9582 | ? | 456 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/VPArr.Q | iobm/VPArr | 1 | 0 | MC_UIM
+NODE | iobm/VPArr | 9920 | ? | 504 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/VPArr.Q | iobm/VPArr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nVMA_IOB_OBUF$Q | 9507 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOB_OBUF.Q | nVMA_IOB_OBUF | 0 | 0 | MC_Q
+NODE | nVMA_IOBout$Q | 9829 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOBout.Q | nVMA_IOBout | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | nVMA_IOB_OBUF | 9508 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOB_OBUF.Q | nVMA_IOB_OBUF | 1 | 0 | MC_UIM
+NODE | nVMA_IOBout | 9830 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOBout.Q | nVMA_IOBout | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 2 | 0 | MC_OE
+NODE | nVMA_IOBout$OE | 9831 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOBout.BUFOE.OUT | nVMA_IOBout | 2 | 0 | MC_OE
 
-SIGNAL_INSTANCE | nVMA_IOB_OBUF.SI | nVMA_IOB_OBUF | 0 | 9 | 2
+SIGNAL_INSTANCE | nVMA_IOBout.SI | nVMA_IOBout | 0 | 10 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nVMA_IOB_OBUF | 9508 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOB_OBUF.Q | nVMA_IOB_OBUF | 1 | 0 | MC_UIM
+NODE | nVMA_IOBout | 9830 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOBout.Q | nVMA_IOBout | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9550 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9551 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9552 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
+NODE | iobm/ES<2> | 9885 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9554 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
+NODE | iobm/ES<3> | 9887 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9555 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
+NODE | iobm/ES<4> | 9888 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOACT | 9568 | ? | 456 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOACT.Q | IOACT | 1 | 0 | MC_UIM
+NODE | IOACT | 9899 | ? | 504 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOACT.Q | IOACT | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/VPArf | 9581 | ? | 456 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/VPArf.Q | iobm/VPArf | 1 | 0 | MC_UIM
+NODE | iobm/VPArf | 9919 | ? | 504 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/VPArf.Q | iobm/VPArf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/VPArr | 9582 | ? | 456 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/VPArr.Q | iobm/VPArr | 1 | 0 | MC_UIM
+NODE | iobm/VPArr | 9920 | ? | 504 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/VPArr.Q | iobm/VPArr | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nVMA_IOB_OBUF.D1 | 9702 | ? | 456 | 4096 | nVMA_IOB_OBUF | NULL | NULL | nVMA_IOB_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nVMA_IOBout.D1 | 10053 | ? | 504 | 4096 | nVMA_IOBout | NULL | NULL | nVMA_IOBout.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nVMA_IOB_OBUF.D2 | 9703 | ? | 456 | 4096 | nVMA_IOB_OBUF | NULL | NULL | nVMA_IOB_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 6 | IV_FALSE | nVMA_IOB_OBUF | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4>
-SPPTERM | 9 | IV_TRUE | nVMA_IOB_OBUF | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4> | IV_TRUE | IOACT | IV_TRUE | iobm/VPArf | IV_TRUE | iobm/VPArr
+SIGNAL | NODE | nVMA_IOBout.D2 | 10054 | ? | 504 | 4096 | nVMA_IOBout | NULL | NULL | nVMA_IOBout.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 6 | IV_FALSE | nVMA_IOBout | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4>
+SPPTERM | 9 | IV_TRUE | nVMA_IOBout | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4> | IV_TRUE | IOACT | IV_TRUE | iobm/VPArf | IV_TRUE | iobm/VPArr
+OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST
+SIGNAL | NODE | nVMA_IOBout.TRST | 10056 | ? | 0 | 4096 | nVMA_IOBout | NULL | NULL | nVMA_IOBout.SI | 4 | 9 | MC_SI_TRST
+SPPTERM | 1 | IV_FALSE | iobm/BG
 
-SRFF_INSTANCE | nVMA_IOB_OBUF.REG | nVMA_IOB_OBUF | 0 | 2 | 1
+SRFF_INSTANCE | nVMA_IOBout.REG | nVMA_IOBout | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nVMA_IOB_OBUF.D | 9701 | ? | 456 | 0 | nVMA_IOB_OBUF | NULL | NULL | nVMA_IOB_OBUF.XOR | 0 | 7 | ALU_F
+NODE | nVMA_IOBout.D | 10052 | ? | 504 | 0 | nVMA_IOBout | NULL | NULL | nVMA_IOBout.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nVMA_IOB_OBUF.Q | 9704 | ? | 473 | 0 | nVMA_IOB_OBUF | NULL | NULL | nVMA_IOB_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | nVMA_IOBout.Q | 10057 | ? | 524 | 0 | nVMA_IOBout | NULL | NULL | nVMA_IOBout.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
+BUF_INSTANCE | nVMA_IOBout.BUFOE | nVMA_IOBout | 0 | 1 | 1
+INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN
+SIGNAL | NODE | nVMA_IOBout.TRST | 10056 | ? | 0 | 4096 | nVMA_IOBout | NULL | NULL | nVMA_IOBout.SI | 4 | 9 | MC_SI_TRST
+SPPTERM | 1 | IV_FALSE | iobm/BG
+OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT
+NODE | nVMA_IOBout.BUFOE.OUT | 10055 | ? | 0 | 0 | nVMA_IOBout | NULL | NULL | nVMA_IOBout.BUFOE | 0 | 10 | BUF_OUT
+
+MACROCELL_INSTANCE | PrldLow+PinTrst+OptxMapped+Ce | nAS_IOBout | MXSE_COPY_0_COPY_0 | 2424325120 | 5 | 3
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
+OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
+NODE | nAS_IOBout$Q | 9832 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAS_IOBout.Q | nAS_IOBout | 0 | 0 | MC_Q
+OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
+NODE | nAS_IOBout | 9833 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAS_IOBout.Q | nAS_IOBout | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 2 | 0 | MC_OE
+NODE | nAS_IOBout$OE | 9834 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAS_IOBout.BUFOE.OUT | nAS_IOBout | 2 | 0 | MC_OE
+
+SIGNAL_INSTANCE | nAS_IOBout.SI | nAS_IOBout | 0 | 4 | 3
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nAS_IOBout.D1 | 10059 | ? | 506 | 4096 | nAS_IOBout | NULL | NULL | nAS_IOBout.SI | 1 | 9 | MC_SI_D1
+SPPTERM | 0 | IV_ZERO
+OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | nAS_IOBout.D2 | 10060 | ? | 506 | 4096 | nAS_IOBout | NULL | NULL | nAS_IOBout.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 2 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2
+SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2
+OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST
+SIGNAL | NODE | nAS_IOBout.TRST | 10062 | ? | 0 | 4096 | nAS_IOBout | NULL | NULL | nAS_IOBout.SI | 4 | 9 | MC_SI_TRST
+SPPTERM | 1 | IV_FALSE | iobm/BG
+
+SRFF_INSTANCE | nAS_IOBout.REG | nAS_IOBout | 0 | 2 | 1
+INPUT_NODE_TYPE | 0 | 8 | SRFF_D
+NODE | nAS_IOBout.D | 10058 | ? | 506 | 0 | nAS_IOBout | NULL | NULL | nAS_IOBout.XOR | 0 | 7 | ALU_F
+INPUT_NODE_TYPE | 1 | 8 | SRFF_C
+NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
+OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
+NODE | nAS_IOBout.Q | 10063 | ? | 536 | 0 | nAS_IOBout | NULL | NULL | nAS_IOBout.REG | 0 | 8 | SRFF_Q
+TNAME | CLK2X_IOB
+
+BUF_INSTANCE | nAS_IOBout.BUFOE | nAS_IOBout | 0 | 1 | 1
+INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN
+SIGNAL | NODE | nAS_IOBout.TRST | 10062 | ? | 0 | 4096 | nAS_IOBout | NULL | NULL | nAS_IOBout.SI | 4 | 9 | MC_SI_TRST
+SPPTERM | 1 | IV_FALSE | iobm/BG
+OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT
+NODE | nAS_IOBout.BUFOE.OUT | 10061 | ? | 0 | 0 | nAS_IOBout | NULL | NULL | nAS_IOBout.BUFOE | 0 | 10 | BUF_OUT
+
+MACROCELL_INSTANCE | Inv+PrldLow+PinTrst+OptxMapped+Ce | nLDS_IOBout | MXSE_COPY_0_COPY_0 | 2424325376 | 7 | 2
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | IOL0 | 9850 | ? | 508 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOL0.Q | IOL0 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | IORW0 | 9846 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
+OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
+NODE | nLDS_IOBout | 9835 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nLDS_IOBout.Q | nLDS_IOBout | 0 | 0 | MC_Q
+OUTPUT_NODE_TYPE | 2 | 0 | MC_OE
+NODE | nLDS_IOBout$OE | 9836 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nLDS_IOBout.BUFOE.OUT | nLDS_IOBout | 2 | 0 | MC_OE
+
+SIGNAL_INSTANCE | nLDS_IOBout.SI | nLDS_IOBout | 0 | 6 | 3
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | IOL0 | 9850 | ? | 508 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOL0.Q | IOL0 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | IORW0 | 9846 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nLDS_IOBout.D1 | 10065 | ? | 508 | 4096 | nLDS_IOBout | NULL | NULL | nLDS_IOBout.SI | 1 | 9 | MC_SI_D1
+SPPTERM | 0 | IV_ZERO
+OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | nLDS_IOBout.D2 | 10066 | ? | 508 | 4096 | nLDS_IOBout | NULL | NULL | nLDS_IOBout.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 3 | IV_TRUE | IOL0 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd2
+SPPTERM | 3 | IV_TRUE | IOL0 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2
+SPPTERM | 4 | IV_FALSE | IORW0 | IV_TRUE | IOL0 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1
+OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST
+SIGNAL | NODE | nLDS_IOBout.TRST | 10068 | ? | 0 | 4096 | nLDS_IOBout | NULL | NULL | nLDS_IOBout.SI | 4 | 9 | MC_SI_TRST
+SPPTERM | 1 | IV_FALSE | iobm/BG
+
+SRFF_INSTANCE | nLDS_IOBout.REG | nLDS_IOBout | 0 | 2 | 1
+INPUT_NODE_TYPE | 0 | 8 | SRFF_D
+NODE | nLDS_IOBout.D | 10064 | ? | 508 | 0 | nLDS_IOBout | NULL | NULL | nLDS_IOBout.XOR | 0 | 7 | ALU_F
+INPUT_NODE_TYPE | 1 | 8 | SRFF_C
+NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
+OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
+NODE | nLDS_IOBout.Q | 10069 | ? | 0 | 0 | nLDS_IOBout | NULL | NULL | nLDS_IOBout.REG | 0 | 8 | SRFF_Q
+TNAME | CLK2X_IOB
+
+BUF_INSTANCE | nLDS_IOBout.BUFOE | nLDS_IOBout | 0 | 1 | 1
+INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN
+SIGNAL | NODE | nLDS_IOBout.TRST | 10068 | ? | 0 | 4096 | nLDS_IOBout | NULL | NULL | nLDS_IOBout.SI | 4 | 9 | MC_SI_TRST
+SPPTERM | 1 | IV_FALSE | iobm/BG
+OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT
+NODE | nLDS_IOBout.BUFOE.OUT | 10067 | ? | 0 | 0 | nLDS_IOBout | NULL | NULL | nLDS_IOBout.BUFOE | 0 | 10 | BUF_OUT
+
+MACROCELL_INSTANCE | Inv+PrldLow+PinTrst+OptxMapped+Ce | nUDS_IOBout | MXSE_COPY_0_COPY_0 | 2424325376 | 7 | 2
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | IOU0 | 9851 | ? | 509 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOU0.Q | IOU0 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | IORW0 | 9846 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
+OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
+NODE | nUDS_IOBout | 9837 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nUDS_IOBout.Q | nUDS_IOBout | 0 | 0 | MC_Q
+OUTPUT_NODE_TYPE | 2 | 0 | MC_OE
+NODE | nUDS_IOBout$OE | 9838 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nUDS_IOBout.BUFOE.OUT | nUDS_IOBout | 2 | 0 | MC_OE
+
+SIGNAL_INSTANCE | nUDS_IOBout.SI | nUDS_IOBout | 0 | 6 | 3
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | IOU0 | 9851 | ? | 509 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOU0.Q | IOU0 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | IORW0 | 9846 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nUDS_IOBout.D1 | 10071 | ? | 509 | 4096 | nUDS_IOBout | NULL | NULL | nUDS_IOBout.SI | 1 | 9 | MC_SI_D1
+SPPTERM | 0 | IV_ZERO
+OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | nUDS_IOBout.D2 | 10072 | ? | 509 | 4096 | nUDS_IOBout | NULL | NULL | nUDS_IOBout.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 3 | IV_TRUE | IOU0 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd2
+SPPTERM | 3 | IV_TRUE | IOU0 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2
+SPPTERM | 4 | IV_FALSE | IORW0 | IV_TRUE | IOU0 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1
+OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST
+SIGNAL | NODE | nUDS_IOBout.TRST | 10074 | ? | 0 | 4096 | nUDS_IOBout | NULL | NULL | nUDS_IOBout.SI | 4 | 9 | MC_SI_TRST
+SPPTERM | 1 | IV_FALSE | iobm/BG
+
+SRFF_INSTANCE | nUDS_IOBout.REG | nUDS_IOBout | 0 | 2 | 1
+INPUT_NODE_TYPE | 0 | 8 | SRFF_D
+NODE | nUDS_IOBout.D | 10070 | ? | 509 | 0 | nUDS_IOBout | NULL | NULL | nUDS_IOBout.XOR | 0 | 7 | ALU_F
+INPUT_NODE_TYPE | 1 | 8 | SRFF_C
+NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
+OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
+NODE | nUDS_IOBout.Q | 10075 | ? | 0 | 0 | nUDS_IOBout | NULL | NULL | nUDS_IOBout.REG | 0 | 8 | SRFF_Q
+TNAME | CLK2X_IOB
+
+BUF_INSTANCE | nUDS_IOBout.BUFOE | nUDS_IOBout | 0 | 1 | 1
+INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN
+SIGNAL | NODE | nUDS_IOBout.TRST | 10074 | ? | 0 | 4096 | nUDS_IOBout | NULL | NULL | nUDS_IOBout.SI | 4 | 9 | MC_SI_TRST
+SPPTERM | 1 | IV_FALSE | iobm/BG
+OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT
+NODE | nUDS_IOBout.BUFOE.OUT | 10073 | ? | 0 | 0 | nUDS_IOBout | NULL | NULL | nUDS_IOBout.BUFOE | 0 | 10 | BUF_OUT
+
 INPUT_INSTANCE | 0 | 0 | NULL | CLK_FSB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 2
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | CLK_FSB | 9684 | PI | 388 | 0 | MXSE_COPY_0_COPY_0 | CLK_FSB;CLK_FSB;CLK_FSB | NULL | NULL | 0 | 100 | NOTYPE
+NODE | CLK_FSB | 10030 | PI | 427 | 0 | MXSE_COPY_0_COPY_0 | CLK_FSB;CLK_FSB;CLK_FSB | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 3 | 5 | II_FCLK
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 7 | 5 | II_FCLKINV
-NODE | CLK_FSB_IBUF/FCLK- | 9510 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 7 | 5 | II_FCLKINV
+NODE | CLK_FSB_IBUF/FCLK- | 9840 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 7 | 5 | II_FCLKINV
 
 INPUT_INSTANCE | 0 | 0 | NULL | nAS_FSB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | nAS_FSB | 9689 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | nAS_FSB | 10036 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped | cs/nOverlay1 | MXSE_COPY_0_COPY_0 | 2155873280 | 4 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay0 | 9519 | ? | 406 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | cs/nOverlay1.SI | cs/nOverlay1 | 0 | 3 | 3
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay0 | 9519 | ? | 406 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cs/nOverlay1.D1 | 9706 | ? | 398 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cs/nOverlay1.D2 | 9707 | ? | 398 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | cs/nOverlay0
-OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | cs/nOverlay1.CE | 9708 | ? | 400 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 10 | 9 | MC_SI_CE
-SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-
-SRFF_INSTANCE | cs/nOverlay1.REG | cs/nOverlay1 | 0 | 3 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cs/nOverlay1.D | 9705 | ? | 398 | 0 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | cs/nOverlay1.CE | 9708 | ? | 400 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 10 | 9 | MC_SI_CE
-SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cs/nOverlay1.Q | 9709 | ? | 453 | 0 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_FSB
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | ram/Once | MXSE_COPY_0_COPY_0 | 2155877376 | 11 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9512 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
+NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/Once | 9512 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
+NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | ram/Once.SI | ram/Once | 0 | 10 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9512 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
+NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/Once.D1 | 9711 | ? | 401 | 4096 | ram/Once | NULL | NULL | ram/Once.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | ram/Once.D1 | 10077 | ? | 437 | 4096 | ram/Once | NULL | NULL | ram/Once.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/Once.D2 | 9712 | ? | 401 | 4096 | ram/Once | NULL | NULL | ram/Once.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | ram/Once.D2 | 10078 | ? | 437 | 4096 | ram/Once | NULL | NULL | ram/Once.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | ram/Once | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf
-SPPTERM | 9 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 9 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf
+SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
+SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf
+SPPTERM | 9 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
+SPPTERM | 9 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf
 
 SRFF_INSTANCE | ram/Once.REG | ram/Once | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/Once.D | 9710 | ? | 401 | 0 | ram/Once | NULL | NULL | ram/Once.XOR | 0 | 7 | ALU_F
+NODE | ram/Once.D | 10076 | ? | 437 | 0 | ram/Once | NULL | NULL | ram/Once.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/Once.Q | 9713 | ? | 453 | 0 | ram/Once | NULL | NULL | ram/Once.REG | 0 | 8 | SRFF_Q
+NODE | ram/Once.Q | 10079 | ? | 499 | 0 | ram/Once | NULL | NULL | ram/Once.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | cnt/RefDone | MXSE_COPY_0_COPY_0 | 2155873536 | 11 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RefAck | 9574 | ? | 402 | 0 | MXSE_COPY_0_COPY_0 | NULL | RefAck.Q | RefAck | 1 | 0 | MC_UIM
+NODE | RefAck | 9910 | ? | 439 | 0 | MXSE_COPY_0_COPY_0 | NULL | RefAck.Q | RefAck | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9556 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9560 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9561 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9562 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9563 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/RefDone.SI | cnt/RefDone | 0 | 10 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RefAck | 9574 | ? | 402 | 0 | MXSE_COPY_0_COPY_0 | NULL | RefAck.Q | RefAck | 1 | 0 | MC_UIM
+NODE | RefAck | 9910 | ? | 439 | 0 | MXSE_COPY_0_COPY_0 | NULL | RefAck.Q | RefAck | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9556 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9560 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9561 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9562 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9563 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/RefDone.D1 | 9715 | ? | 402 | 4096 | cnt/RefDone | NULL | NULL | cnt/RefDone.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/RefDone.D1 | 10081 | ? | 439 | 4096 | cnt/RefDone | NULL | NULL | cnt/RefDone.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/RefDone.D2 | 9716 | ? | 402 | 4096 | cnt/RefDone | NULL | NULL | cnt/RefDone.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/RefDone.D2 | 10082 | ? | 439 | 4096 | cnt/RefDone | NULL | NULL | cnt/RefDone.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_FALSE | cnt/RefDone | IV_FALSE | RefAck
 SPPTERM | 8 | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<4> | IV_FALSE | cnt/RefCnt<7>
 
 SRFF_INSTANCE | cnt/RefDone.REG | cnt/RefDone | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/RefDone.D | 9714 | ? | 402 | 0 | cnt/RefDone | NULL | NULL | cnt/RefDone.XOR | 0 | 7 | ALU_F
+NODE | cnt/RefDone.D | 10080 | ? | 439 | 0 | cnt/RefDone | NULL | NULL | cnt/RefDone.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/RefDone.Q | 9717 | ? | 453 | 0 | cnt/RefDone | NULL | NULL | cnt/RefDone.REG | 0 | 8 | SRFF_Q
+NODE | cnt/RefDone.Q | 10083 | ? | 499 | 0 | cnt/RefDone | NULL | NULL | cnt/RefDone.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 INPUT_INSTANCE | 0 | 0 | NULL | nWE_FSB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | nWE_FSB | 9685 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | nWE_FSB | 10031 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+
+INPUT_INSTANCE | 0 | 0 | NULL | SW_1_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
+INPUT_NODE_TYPE | 0 | 5 | II_IN
+NODE | SW<1> | 10037 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
+NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX
 
 MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobs/Once | MXSE_COPY_0_COPY_0 | 2155873536 | 11 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP28_.EXP | 10185 | ? | 403 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP28_.EXP | EXP28_ | 4 | 0 | MC_EXPORT
+NODE | EXP35_.EXP | 10645 | ? | 440 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP35_.EXP | EXP35_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_4_OBUF.EXP | 10186 | ? | 403 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.EXP | RA_4_OBUF | 4 | 0 | MC_EXPORT
+NODE | Park.EXP | 10646 | ? | 440 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.EXP | Park | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobs/Once.SI | iobs/Once | 0 | 10 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP28_.EXP | 10185 | ? | 403 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP28_.EXP | EXP28_ | 4 | 0 | MC_EXPORT
+NODE | EXP35_.EXP | 10645 | ? | 440 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP35_.EXP | EXP35_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_4_OBUF.EXP | 10186 | ? | 403 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.EXP | RA_4_OBUF | 4 | 0 | MC_EXPORT
+NODE | Park.EXP | 10646 | ? | 440 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.EXP | Park | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/Once.D1 | 9719 | ? | 403 | 4096 | iobs/Once | NULL | NULL | iobs/Once.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobs/Once.D1 | 10085 | ? | 440 | 4096 | iobs/Once | NULL | NULL | iobs/Once.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/Once.D2 | 9720 | ? | 403 | 4096 | iobs/Once | NULL | NULL | iobs/Once.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | EXP28_.EXP
-SPPTERM | 1 | IV_TRUE | RA_4_OBUF.EXP
+SIGNAL | NODE | iobs/Once.D2 | 10086 | ? | 440 | 4096 | iobs/Once | NULL | NULL | iobs/Once.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | EXP35_.EXP
+SPPTERM | 1 | IV_TRUE | Park.EXP
 SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
 SPPTERM | 3 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd2
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | iobs/Once
 SPPTERM | 3 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd2
 SPPTERM | 3 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd1
+SPPTERM | 3 | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | ALE1
 
 SRFF_INSTANCE | iobs/Once.REG | iobs/Once | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/Once.D | 9718 | ? | 403 | 0 | iobs/Once | NULL | NULL | iobs/Once.XOR | 0 | 7 | ALU_F
+NODE | iobs/Once.D | 10084 | ? | 440 | 0 | iobs/Once | NULL | NULL | iobs/Once.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/Once.Q | 9721 | ? | 448 | 0 | iobs/Once | NULL | NULL | iobs/Once.REG | 0 | 8 | SRFF_Q
+NODE | iobs/Once.Q | 10087 | ? | 493 | 0 | iobs/Once | NULL | NULL | iobs/Once.REG | 0 | 8 | SRFF_Q
+TNAME | CLK_FSB
+
+MACROCELL_INSTANCE | PrldLow+OptxMapped | cs/nOverlay1 | MXSE_COPY_0_COPY_0 | 2155873280 | 4 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay0 | 9849 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+
+SIGNAL_INSTANCE | cs/nOverlay1.SI | cs/nOverlay1 | 0 | 3 | 3
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay0 | 9849 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cs/nOverlay1.D1 | 10089 | ? | 441 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 1 | 9 | MC_SI_D1
+SPPTERM | 0 | IV_ZERO
+OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cs/nOverlay1.D2 | 10090 | ? | 441 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | cs/nOverlay0
+OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | cs/nOverlay1.CE | 10091 | ? | 442 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 10 | 9 | MC_SI_CE
+SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
+
+SRFF_INSTANCE | cs/nOverlay1.REG | cs/nOverlay1 | 0 | 3 | 1
+INPUT_NODE_TYPE | 0 | 8 | SRFF_D
+NODE | cs/nOverlay1.D | 10088 | ? | 441 | 0 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.XOR | 0 | 7 | ALU_F
+INPUT_NODE_TYPE | 1 | 8 | SRFF_C
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
+SIGNAL | NODE | cs/nOverlay1.CE | 10091 | ? | 442 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 10 | 9 | MC_SI_CE
+SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
+OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
+NODE | cs/nOverlay1.Q | 10092 | ? | 499 | 0 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | BERR_IOBS | MXSE_COPY_0_COPY_0 | 2155877376 | 9 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9515 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
+NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9559 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
+NODE | iobs/IOACTr | 9892 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOBERR | 9569 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
+NODE | IOBERR | 9900 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | BERR_IOBS | 9515 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
+NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | BERR_IOBS.SI | BERR_IOBS | 0 | 8 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9515 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
+NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9559 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
+NODE | iobs/IOACTr | 9892 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOBERR | 9569 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
+NODE | IOBERR | 9900 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | BERR_IOBS.D1 | 9723 | ? | 404 | 4096 | BERR_IOBS | NULL | NULL | BERR_IOBS.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | BERR_IOBS.D1 | 10094 | ? | 443 | 4096 | BERR_IOBS | NULL | NULL | BERR_IOBS.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | BERR_IOBS.D2 | 9724 | ? | 404 | 4096 | BERR_IOBS | NULL | NULL | BERR_IOBS.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | BERR_IOBS.D2 | 10095 | ? | 443 | 4096 | BERR_IOBS | NULL | NULL | BERR_IOBS.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | BERR_IOBS | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
 SPPTERM | 6 | IV_TRUE | iobs/Once | IV_TRUE | BERR_IOBS | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_FALSE | IOBERR | IV_TRUE | ALE1
 SPPTERM | 7 | IV_TRUE | iobs/Once | IV_FALSE | BERR_IOBS | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_TRUE | IOBERR | IV_TRUE | ALE1
@@ -490,1094 +682,1044 @@ SPPTERM | 7 | IV_TRUE | iobs/Once | IV_FALSE | BERR_IOBS | IV_FALSE | iobs/PS_FS
 
 SRFF_INSTANCE | BERR_IOBS.REG | BERR_IOBS | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | BERR_IOBS.D | 9722 | ? | 404 | 0 | BERR_IOBS | NULL | NULL | BERR_IOBS.XOR | 0 | 7 | ALU_F
+NODE | BERR_IOBS.D | 10093 | ? | 443 | 0 | BERR_IOBS | NULL | NULL | BERR_IOBS.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | BERR_IOBS.Q | 9725 | ? | 428 | 0 | BERR_IOBS | NULL | NULL | BERR_IOBS.REG | 0 | 8 | SRFF_Q
+NODE | BERR_IOBS.Q | 10096 | ? | 467 | 0 | BERR_IOBS | NULL | NULL | BERR_IOBS.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | IORW0 | MXSE_COPY_0_COPY_0 | 2155877376 | 13 | 1
+MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | IORW0 | MXSE_COPY_0_COPY_0 | 2155877632 | 13 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9516 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW1 | 9533 | ? | 423 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | IORW0 | 9846 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP26_.EXP | 10180 | ? | 405 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP26_.EXP | EXP26_ | 4 | 0 | MC_EXPORT
+NODE | EXP31_.EXP | 10635 | ? | 444 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP31_.EXP | EXP31_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP30_.EXP | 10192 | ? | 405 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP30_.EXP | EXP30_ | 4 | 0 | MC_EXPORT
+NODE | EXP36_.EXP | 10647 | ? | 444 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP36_.EXP | EXP36_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | IORW0 | 9516 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
+NODE | IORW0 | 9846 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | IORW0.SI | IORW0 | 0 | 12 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9516 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW1 | 9533 | ? | 423 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | IORW0 | 9846 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP26_.EXP | 10180 | ? | 405 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP26_.EXP | EXP26_ | 4 | 0 | MC_EXPORT
+NODE | EXP31_.EXP | 10635 | ? | 444 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP31_.EXP | EXP31_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP30_.EXP | 10192 | ? | 405 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP30_.EXP | EXP30_ | 4 | 0 | MC_EXPORT
+NODE | EXP36_.EXP | 10647 | ? | 444 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP36_.EXP | EXP36_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | IORW0.D1 | 9727 | ? | 405 | 4096 | IORW0 | NULL | NULL | IORW0.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | IORW0.D1 | 10098 | ? | 444 | 4096 | IORW0 | NULL | NULL | IORW0.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | IORW0.D2 | 9728 | ? | 405 | 4096 | IORW0 | NULL | NULL | IORW0.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | EXP26_.EXP
-SPPTERM | 1 | IV_TRUE | EXP30_.EXP
-SPPTERM | 5 | IV_TRUE | IORW0 | IV_FALSE | iobs/IORW1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_FALSE | ALE1
-SPPTERM | 5 | IV_FALSE | IORW0 | IV_TRUE | iobs/IORW1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_FALSE | ALE1
-SPPTERM | 8 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_TRUE | IORW0 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 8 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_TRUE | IORW0 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1
-SPPTERM | 8 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_FALSE | IORW0 | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
+SIGNAL | NODE | IORW0.D2 | 10099 | ? | 444 | 4096 | IORW0 | NULL | NULL | IORW0.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | EXP31_.EXP
+SPPTERM | 1 | IV_TRUE | EXP36_.EXP
+SPPTERM | 3 | IV_FALSE | IORW0 | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | ALE1
+SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_TRUE | ALE1
+SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_TRUE | ALE1
+SPPTERM | 5 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | ALE1
+SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1 | IV_TRUE | ALE1
 
 SRFF_INSTANCE | IORW0.REG | IORW0 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | IORW0.D | 9726 | ? | 405 | 0 | IORW0 | NULL | NULL | IORW0.XOR | 0 | 7 | ALU_F
+NODE | IORW0.D | 10097 | ? | 444 | 0 | IORW0 | NULL | NULL | IORW0.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | IORW0.Q | 9729 | ? | 486 | 0 | IORW0 | NULL | NULL | IORW0.REG | 0 | 8 | SRFF_Q
+NODE | IORW0.Q | 10100 | ? | 535 | 0 | IORW0 | NULL | NULL | IORW0.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 INPUT_INSTANCE | 0 | 0 | NULL | nRES_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | nRES | 9686 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | nRES | 10032 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | nRES_IBUF | 9518 | ? | 481 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX
+NODE | nRES_IBUF | 9848 | ? | 533 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX
 
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cs/nOverlay0 | MXSE_COPY_0_COPY_0 | 2155877376 | 12 | 2
+MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cs/nOverlay0 | MXSE_COPY_0_COPY_0 | 2155877376 | 9 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay0 | 9519 | ? | 406 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay0 | 9849 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nRES_IBUF | 9518 | ? | 481 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX
+NODE | nRES_IBUF | 9848 | ? | 533 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9488 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9541 | ? | 454 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cs/nOverlay0 | 9519 | ? | 406 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | cs/nOverlay0.EXP | 10212 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.EXP | cs/nOverlay0 | 4 | 0 | MC_EXPORT
+NODE | cs/nOverlay0 | 9849 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | cs/nOverlay0.SI | cs/nOverlay0 | 0 | 11 | 4
+SIGNAL_INSTANCE | cs/nOverlay0.SI | cs/nOverlay0 | 0 | 8 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay0 | 9519 | ? | 406 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay0 | 9849 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nRES_IBUF | 9518 | ? | 481 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9488 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9541 | ? | 454 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | nRES_IBUF | 9848 | ? | 533 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cs/nOverlay0.D1 | 9731 | ? | 406 | 4096 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cs/nOverlay0.D1 | 10102 | ? | 445 | 4096 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cs/nOverlay0.D2 | 9732 | ? | 406 | 6144 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cs/nOverlay0.D2 | 10103 | ? | 445 | 6144 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | cs/nOverlay0 | IV_FALSE | nAS_FSB_IBUF
 SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | cs/nOverlay0 | IV_TRUE | fsb/ASrf
 OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF
-SIGNAL | NODE | cs/nOverlay0.RSTF | 9733 | ? | 407 | 4096 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 6 | 9 | MC_SI_RSTF
+SIGNAL | NODE | cs/nOverlay0.RSTF | 10104 | ? | 446 | 4096 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 6 | 9 | MC_SI_RSTF
 SPPTERM | 1 | IV_FALSE | nRES_IBUF
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | cs/nOverlay0.EXP | 10201 | ? | 0 | 0 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 5 | IV_TRUE | A_FSB_9_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_TRUE | ram/RASEL
 
 SRFF_INSTANCE | cs/nOverlay0.REG | cs/nOverlay0 | 0 | 3 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cs/nOverlay0.D | 9730 | ? | 406 | 0 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.XOR | 0 | 7 | ALU_F
+NODE | cs/nOverlay0.D | 10101 | ? | 445 | 0 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 INPUT_NODE_TYPE | 3 | 8 | SRFF_R
-SIGNAL | NODE | cs/nOverlay0.RSTF | 9733 | ? | 407 | 4096 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 6 | 9 | MC_SI_RSTF
+SIGNAL | NODE | cs/nOverlay0.RSTF | 10104 | ? | 446 | 4096 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 6 | 9 | MC_SI_RSTF
 SPPTERM | 1 | IV_FALSE | nRES_IBUF
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cs/nOverlay0.Q | 9734 | ? | 406 | 0 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.REG | 0 | 8 | SRFF_Q
+NODE | cs/nOverlay0.Q | 10105 | ? | 445 | 0 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 INPUT_INSTANCE | 0 | 0 | NULL | nLDS_FSB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | nLDS_FSB | 9687 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | nLDS_FSB | 10033 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | nLDS_FSB_IBUF | 9531 | ? | 421 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nLDS_FSB_IBUF | 9861 | ? | 460 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | IOL0 | MXSE_COPY_0_COPY_0 | 2155873280 | 6 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOL1 | 9532 | ? | 408 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOL1.Q | iobs/IOL1 | 1 | 0 | MC_UIM
+NODE | iobs/IOL1 | 9862 | ? | 447 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOL1.Q | iobs/IOL1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nLDS_FSB_IBUF | 9531 | ? | 421 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nLDS_FSB_IBUF | 9861 | ? | 460 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | IOL0 | 9520 | ? | 485 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOL0.Q | IOL0 | 1 | 0 | MC_UIM
+NODE | IOL0 | 9850 | ? | 508 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOL0.Q | IOL0 | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | IOL0.SI | IOL0 | 0 | 5 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOL1 | 9532 | ? | 408 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOL1.Q | iobs/IOL1 | 1 | 0 | MC_UIM
+NODE | iobs/IOL1 | 9862 | ? | 447 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOL1.Q | iobs/IOL1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nLDS_FSB_IBUF | 9531 | ? | 421 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nLDS_FSB_IBUF | 9861 | ? | 460 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | IOL0.D1 | 9736 | ? | 408 | 4096 | IOL0 | NULL | NULL | IOL0.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | IOL0.D1 | 10107 | ? | 447 | 4096 | IOL0 | NULL | NULL | IOL0.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | IOL0.D2 | 9737 | ? | 408 | 4096 | IOL0 | NULL | NULL | IOL0.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | IOL0.D2 | 10108 | ? | 447 | 4096 | IOL0 | NULL | NULL | IOL0.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_FALSE | nLDS_FSB_IBUF | IV_TRUE | ALE1
 SPPTERM | 2 | IV_TRUE | iobs/IOL1 | IV_FALSE | ALE1
 OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | IOL0.CE | 9738 | ? | 409 | 4096 | IOL0 | NULL | NULL | IOL0.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | IOL0.CE | 10109 | ? | 448 | 4096 | IOL0 | NULL | NULL | IOL0.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
 
 SRFF_INSTANCE | IOL0.REG | IOL0 | 0 | 3 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | IOL0.D | 9735 | ? | 408 | 0 | IOL0 | NULL | NULL | IOL0.XOR | 0 | 7 | ALU_F
+NODE | IOL0.D | 10106 | ? | 447 | 0 | IOL0 | NULL | NULL | IOL0.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | IOL0.CE | 9738 | ? | 409 | 4096 | IOL0 | NULL | NULL | IOL0.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | IOL0.CE | 10109 | ? | 448 | 4096 | IOL0 | NULL | NULL | IOL0.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | IOL0.Q | 9739 | ? | 485 | 0 | IOL0 | NULL | NULL | IOL0.REG | 0 | 8 | SRFF_Q
+NODE | IOL0.Q | 10110 | ? | 508 | 0 | IOL0 | NULL | NULL | IOL0.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 INPUT_INSTANCE | 0 | 0 | NULL | nUDS_FSB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | nUDS_FSB | 9688 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | nUDS_FSB | 10034 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | nUDS_FSB_IBUF | 9535 | ? | 425 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nUDS_FSB_IBUF | 9865 | ? | 464 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | IOU0 | MXSE_COPY_0_COPY_0 | 2155873280 | 6 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOU1 | 9536 | ? | 410 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOU1.Q | iobs/IOU1 | 1 | 0 | MC_UIM
+NODE | iobs/IOU1 | 9866 | ? | 449 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOU1.Q | iobs/IOU1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nUDS_FSB_IBUF | 9535 | ? | 425 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nUDS_FSB_IBUF | 9865 | ? | 464 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | IOU0 | 9521 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOU0.Q | IOU0 | 1 | 0 | MC_UIM
+NODE | IOU0 | 9851 | ? | 509 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOU0.Q | IOU0 | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | IOU0.SI | IOU0 | 0 | 5 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOU1 | 9536 | ? | 410 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOU1.Q | iobs/IOU1 | 1 | 0 | MC_UIM
+NODE | iobs/IOU1 | 9866 | ? | 449 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOU1.Q | iobs/IOU1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nUDS_FSB_IBUF | 9535 | ? | 425 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nUDS_FSB_IBUF | 9865 | ? | 464 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | IOU0.D1 | 9741 | ? | 410 | 4096 | IOU0 | NULL | NULL | IOU0.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | IOU0.D1 | 10112 | ? | 449 | 4096 | IOU0 | NULL | NULL | IOU0.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | IOU0.D2 | 9742 | ? | 410 | 4096 | IOU0 | NULL | NULL | IOU0.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | IOU0.D2 | 10113 | ? | 449 | 4096 | IOU0 | NULL | NULL | IOU0.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_FALSE | nUDS_FSB_IBUF | IV_TRUE | ALE1
 SPPTERM | 2 | IV_TRUE | iobs/IOU1 | IV_FALSE | ALE1
 OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | IOU0.CE | 9743 | ? | 411 | 4096 | IOU0 | NULL | NULL | IOU0.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | IOU0.CE | 10114 | ? | 450 | 4096 | IOU0 | NULL | NULL | IOU0.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
 
 SRFF_INSTANCE | IOU0.REG | IOU0 | 0 | 3 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | IOU0.D | 9740 | ? | 410 | 0 | IOU0 | NULL | NULL | IOU0.XOR | 0 | 7 | ALU_F
+NODE | IOU0.D | 10111 | ? | 449 | 0 | IOU0 | NULL | NULL | IOU0.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | IOU0.CE | 9743 | ? | 411 | 4096 | IOU0 | NULL | NULL | IOU0.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | IOU0.CE | 10114 | ? | 450 | 4096 | IOU0 | NULL | NULL | IOU0.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | IOU0.Q | 9744 | ? | 486 | 0 | IOU0 | NULL | NULL | IOU0.REG | 0 | 8 | SRFF_Q
+NODE | IOU0.Q | 10115 | ? | 509 | 0 | IOU0 | NULL | NULL | IOU0.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | TimeoutA | MXSE_COPY_0_COPY_0 | 2155877376 | 14 | 2
+MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | TimeoutA | MXSE_COPY_0_COPY_0 | 2155877376 | 11 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_9_OBUF.EXP | 10214 | ? | 412 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.EXP | RA_9_OBUF | 4 | 0 | MC_EXPORT
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | TimeoutA | 9522 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | TimeoutA.EXP | 10215 | ? | 432 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.EXP | TimeoutA | 4 | 0 | MC_EXPORT
+NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | TimeoutA.SI | TimeoutA | 0 | 13 | 3
+SIGNAL_INSTANCE | TimeoutA.SI | TimeoutA | 0 | 10 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_9_OBUF.EXP | 10214 | ? | 412 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.EXP | RA_9_OBUF | 4 | 0 | MC_EXPORT
+NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | TimeoutA.D1 | 9746 | ? | 412 | 4096 | TimeoutA | NULL | NULL | TimeoutA.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | TimeoutA.D1 | 10117 | ? | 451 | 4096 | TimeoutA | NULL | NULL | TimeoutA.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | TimeoutA.D2 | 9747 | ? | 412 | 4096 | TimeoutA | NULL | NULL | TimeoutA.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | RA_9_OBUF.EXP
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | TimeoutA.EXP | 10204 | ? | 432 | 0 | TimeoutA | NULL | NULL | TimeoutA.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 5 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 8 | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
-SPPTERM | 8 | IV_FALSE | cnt/RefDone | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf
+SIGNAL | NODE | TimeoutA.D2 | 10118 | ? | 451 | 4096 | TimeoutA | NULL | NULL | TimeoutA.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 3 | IV_TRUE | TimeoutA | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
+SPPTERM | 9 | IV_FALSE | TimeoutA | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<4>
+SPPTERM | 9 | IV_FALSE | TimeoutA | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<4> | IV_TRUE | fsb/ASrf
 
 SRFF_INSTANCE | TimeoutA.REG | TimeoutA | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | TimeoutA.D | 9745 | ? | 412 | 0 | TimeoutA | NULL | NULL | TimeoutA.XOR | 0 | 7 | ALU_F
+NODE | TimeoutA.D | 10116 | ? | 451 | 0 | TimeoutA | NULL | NULL | TimeoutA.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | TimeoutA.Q | 9748 | ? | 428 | 0 | TimeoutA | NULL | NULL | TimeoutA.REG | 0 | 8 | SRFF_Q
+NODE | TimeoutA.Q | 10119 | ? | 467 | 0 | TimeoutA | NULL | NULL | TimeoutA.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | TimeoutB | MXSE_COPY_0_COPY_0 | 2155877376 | 10 | 2
+MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | TimeoutB | MXSE_COPY_0_COPY_0 | 2155877376 | 16 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | TimeoutB | 9853 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/TimeoutBPre | 9854 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.Q | cnt/TimeoutBPre | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9565 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_1_OBUF.EXP | 10211 | ? | 413 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.EXP | RA_1_OBUF | 4 | 0 | MC_EXPORT
+NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_2_IBUF | 9936 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_2_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | TimeoutB | 9523 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
+NODE | TimeoutB | 9853 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | TimeoutB.EXP | 10210 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.EXP | TimeoutB | 4 | 0 | MC_EXPORT
+NODE | TimeoutB.EXP | 10613 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.EXP | TimeoutB | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | TimeoutB.SI | TimeoutB | 0 | 9 | 3
+SIGNAL_INSTANCE | TimeoutB.SI | TimeoutB | 0 | 15 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | TimeoutB | 9853 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/TimeoutBPre | 9854 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.Q | cnt/TimeoutBPre | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9565 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_1_OBUF.EXP | 10211 | ? | 413 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.EXP | RA_1_OBUF | 4 | 0 | MC_EXPORT
+NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_2_IBUF | 9936 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_2_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | TimeoutB.D1 | 9750 | ? | 413 | 4096 | TimeoutB | NULL | NULL | TimeoutB.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | TimeoutB.D1 | 10121 | ? | 452 | 4096 | TimeoutB | NULL | NULL | TimeoutB.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | TimeoutB.D2 | 9751 | ? | 413 | 4096 | TimeoutB | NULL | NULL | TimeoutB.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | RA_1_OBUF.EXP
+SIGNAL | NODE | TimeoutB.D2 | 10122 | ? | 452 | 4096 | TimeoutB | NULL | NULL | TimeoutB.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 3 | IV_TRUE | TimeoutB | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
+SPPTERM | 11 | IV_FALSE | TimeoutB | IV_TRUE | cnt/TimeoutBPre | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<4> | IV_FALSE | cnt/RefCnt<7>
+SPPTERM | 11 | IV_FALSE | TimeoutB | IV_TRUE | cnt/TimeoutBPre | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<4> | IV_FALSE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | TimeoutB.EXP | 10199 | ? | 453 | 0 | TimeoutB | NULL | NULL | TimeoutB.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 2 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd1
-SPPTERM | 2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3
-SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
-SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
+SIGNAL | NODE | TimeoutB.EXP | 10603 | ? | 0 | 0 | TimeoutB | NULL | NULL | TimeoutB.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 2 | IV_TRUE | A_FSB_11_IBUF | IV_FALSE | ram/RASEL
+SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_2_IBUF
 
 SRFF_INSTANCE | TimeoutB.REG | TimeoutB | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | TimeoutB.D | 9749 | ? | 413 | 0 | TimeoutB | NULL | NULL | TimeoutB.XOR | 0 | 7 | ALU_F
+NODE | TimeoutB.D | 10120 | ? | 452 | 0 | TimeoutB | NULL | NULL | TimeoutB.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | TimeoutB.Q | 9752 | ? | 428 | 0 | TimeoutB | NULL | NULL | TimeoutB.REG | 0 | 8 | SRFF_Q
+NODE | TimeoutB.Q | 10123 | ? | 467 | 0 | TimeoutB | NULL | NULL | TimeoutB.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/TimeoutBPre | MXSE_COPY_0_COPY_0 | 2155877376 | 12 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimeoutBPre | 9524 | ? | 414 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.Q | cnt/TimeoutBPre | 1 | 0 | MC_UIM
+NODE | cnt/TimeoutBPre | 9854 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.Q | cnt/TimeoutBPre | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9556 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9560 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9561 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9562 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9563 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/TimeoutBPre | 9524 | ? | 414 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.Q | cnt/TimeoutBPre | 1 | 0 | MC_UIM
+NODE | cnt/TimeoutBPre | 9854 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.Q | cnt/TimeoutBPre | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/TimeoutBPre.SI | cnt/TimeoutBPre | 0 | 11 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimeoutBPre | 9524 | ? | 414 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.Q | cnt/TimeoutBPre | 1 | 0 | MC_UIM
+NODE | cnt/TimeoutBPre | 9854 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.Q | cnt/TimeoutBPre | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9556 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9560 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9561 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9562 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9563 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/TimeoutBPre.D1 | 9754 | ? | 414 | 4096 | cnt/TimeoutBPre | NULL | NULL | cnt/TimeoutBPre.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/TimeoutBPre.D1 | 10125 | ? | 453 | 4096 | cnt/TimeoutBPre | NULL | NULL | cnt/TimeoutBPre.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/TimeoutBPre.D2 | 9755 | ? | 414 | 4096 | cnt/TimeoutBPre | NULL | NULL | cnt/TimeoutBPre.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/TimeoutBPre.D2 | 10126 | ? | 453 | 4096 | cnt/TimeoutBPre | NULL | NULL | cnt/TimeoutBPre.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | cnt/TimeoutBPre | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
 SPPTERM | 10 | IV_FALSE | cnt/TimeoutBPre | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<4> | IV_FALSE | cnt/RefCnt<7>
 SPPTERM | 10 | IV_FALSE | cnt/TimeoutBPre | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<4> | IV_FALSE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf
 
 SRFF_INSTANCE | cnt/TimeoutBPre.REG | cnt/TimeoutBPre | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/TimeoutBPre.D | 9753 | ? | 414 | 0 | cnt/TimeoutBPre | NULL | NULL | cnt/TimeoutBPre.XOR | 0 | 7 | ALU_F
+NODE | cnt/TimeoutBPre.D | 10124 | ? | 453 | 0 | cnt/TimeoutBPre | NULL | NULL | cnt/TimeoutBPre.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/TimeoutBPre.Q | 9756 | ? | 414 | 0 | cnt/TimeoutBPre | NULL | NULL | cnt/TimeoutBPre.REG | 0 | 8 | SRFF_Q
+NODE | cnt/TimeoutBPre.Q | 10127 | ? | 453 | 0 | cnt/TimeoutBPre | NULL | NULL | cnt/TimeoutBPre.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/BERR0r | MXSE_COPY_0_COPY_0 | 2155873536 | 10 | 2
+MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/BERR0r | MXSE_COPY_0_COPY_0 | 2155873536 | 9 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9525 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
+NODE | fsb/BERR0r | 9855 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutB | 9523 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
+NODE | TimeoutB | 9853 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | fsb/BERR0r | 9525 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | fsb/BERR0r.EXP | 10233 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.EXP | fsb/BERR0r | 4 | 0 | MC_EXPORT
+NODE | fsb/BERR0r | 9855 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | fsb/BERR0r.SI | fsb/BERR0r | 0 | 9 | 3
+SIGNAL_INSTANCE | fsb/BERR0r.SI | fsb/BERR0r | 0 | 8 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9525 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
+NODE | fsb/BERR0r | 9855 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutB | 9523 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
+NODE | TimeoutB | 9853 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | fsb/BERR0r.D1 | 9758 | ? | 415 | 4096 | fsb/BERR0r | NULL | NULL | fsb/BERR0r.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | fsb/BERR0r.D1 | 10129 | ? | 454 | 4096 | fsb/BERR0r | NULL | NULL | fsb/BERR0r.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | fsb/BERR0r.D2 | 9759 | ? | 415 | 4096 | fsb/BERR0r | NULL | NULL | fsb/BERR0r.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | fsb/BERR0r.D2 | 10130 | ? | 454 | 4096 | fsb/BERR0r | NULL | NULL | fsb/BERR0r.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_FALSE | TimeoutB | IV_FALSE | fsb/BERR0r
 SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
 SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/BERR0r
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | fsb/BERR0r.EXP | 10222 | ? | 0 | 0 | fsb/BERR0r | NULL | NULL | fsb/BERR0r.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 1 | IV_TRUE | A_FSB_19_IBUF
 
 SRFF_INSTANCE | fsb/BERR0r.REG | fsb/BERR0r | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | fsb/BERR0r.D | 9757 | ? | 415 | 0 | fsb/BERR0r | NULL | NULL | fsb/BERR0r.XOR | 0 | 7 | ALU_F
+NODE | fsb/BERR0r.D | 10128 | ? | 454 | 0 | fsb/BERR0r | NULL | NULL | fsb/BERR0r.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | fsb/BERR0r.Q | 9760 | ? | 428 | 0 | fsb/BERR0r | NULL | NULL | fsb/BERR0r.REG | 0 | 8 | SRFF_Q
+NODE | fsb/BERR0r.Q | 10131 | ? | 467 | 0 | fsb/BERR0r | NULL | NULL | fsb/BERR0r.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/BERR1r | MXSE_COPY_0_COPY_0 | 2155873536 | 5 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9515 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
+NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9526 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
+NODE | fsb/BERR1r | 9856 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | fsb/BERR1r | 9526 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
+NODE | fsb/BERR1r | 9856 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | fsb/BERR1r.SI | fsb/BERR1r | 0 | 4 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9515 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
+NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9526 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
+NODE | fsb/BERR1r | 9856 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | fsb/BERR1r.D1 | 9762 | ? | 416 | 4096 | fsb/BERR1r | NULL | NULL | fsb/BERR1r.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | fsb/BERR1r.D1 | 10133 | ? | 455 | 4096 | fsb/BERR1r | NULL | NULL | fsb/BERR1r.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | fsb/BERR1r.D2 | 9763 | ? | 416 | 4096 | fsb/BERR1r | NULL | NULL | fsb/BERR1r.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | fsb/BERR1r.D2 | 10134 | ? | 455 | 4096 | fsb/BERR1r | NULL | NULL | fsb/BERR1r.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_FALSE | BERR_IOBS | IV_FALSE | fsb/BERR1r
 SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
 
 SRFF_INSTANCE | fsb/BERR1r.REG | fsb/BERR1r | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | fsb/BERR1r.D | 9761 | ? | 416 | 0 | fsb/BERR1r | NULL | NULL | fsb/BERR1r.XOR | 0 | 7 | ALU_F
+NODE | fsb/BERR1r.D | 10132 | ? | 455 | 0 | fsb/BERR1r | NULL | NULL | fsb/BERR1r.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | fsb/BERR1r.Q | 9764 | ? | 428 | 0 | fsb/BERR1r | NULL | NULL | fsb/BERR1r.REG | 0 | 8 | SRFF_Q
+NODE | fsb/BERR1r.Q | 10135 | ? | 467 | 0 | fsb/BERR1r | NULL | NULL | fsb/BERR1r.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/Ready0r | MXSE_COPY_0_COPY_0 | 2155873536 | 9 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready0r | 9527 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
+NODE | fsb/Ready0r | 9857 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMReady | 9593 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
+NODE | ram/RAMReady | 9934 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | fsb/Ready0r | 9527 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
+NODE | fsb/Ready0r | 9857 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | fsb/Ready0r.SI | fsb/Ready0r | 0 | 8 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready0r | 9527 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
+NODE | fsb/Ready0r | 9857 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMReady | 9593 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
+NODE | ram/RAMReady | 9934 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | fsb/Ready0r.D1 | 9766 | ? | 417 | 4096 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | fsb/Ready0r.D1 | 10137 | ? | 456 | 4096 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | fsb/Ready0r.D2 | 9767 | ? | 417 | 4096 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | fsb/Ready0r.D2 | 10138 | ? | 456 | 4096 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
 SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_FALSE | ram/RAMReady
 SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_FALSE | ram/RAMReady
 
 SRFF_INSTANCE | fsb/Ready0r.REG | fsb/Ready0r | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | fsb/Ready0r.D | 9765 | ? | 417 | 0 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.XOR | 0 | 7 | ALU_F
+NODE | fsb/Ready0r.D | 10136 | ? | 456 | 0 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | fsb/Ready0r.Q | 9768 | ? | 428 | 0 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.REG | 0 | 8 | SRFF_Q
+NODE | fsb/Ready0r.Q | 10139 | ? | 467 | 0 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/Ready1r | MXSE_COPY_0_COPY_0 | 2155873536 | 18 | 1
+MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/Ready1r | MXSE_COPY_0_COPY_0 | 2155873536 | 12 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9528 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9534 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/Clear1.EXP | 10569 | ? | 457 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Clear1.EXP | iobs/Clear1 | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP17_.EXP | 10157 | ? | 418 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP17_.EXP | EXP17_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | fsb/Ready1r | 9528 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | fsb/Ready1r.EXP | 10556 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.EXP | fsb/Ready1r | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | fsb/Ready1r.SI | fsb/Ready1r | 0 | 17 | 2
+SIGNAL_INSTANCE | fsb/Ready1r.SI | fsb/Ready1r | 0 | 11 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9528 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9534 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP17_.EXP | 10157 | ? | 418 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP17_.EXP | EXP17_ | 4 | 0 | MC_EXPORT
+NODE | iobs/Clear1.EXP | 10569 | ? | 457 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Clear1.EXP | iobs/Clear1 | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | fsb/Ready1r.D1 | 9770 | ? | 418 | 4096 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | fsb/Ready1r.D1 | 10141 | ? | 457 | 4096 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | fsb/Ready1r.D2 | 9771 | ? | 418 | 4096 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | EXP17_.EXP
+SIGNAL | NODE | fsb/Ready1r.D2 | 10142 | ? | 457 | 4096 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | iobs/Clear1.EXP
 SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
 SPPTERM | 3 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady
 SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady
-SPPTERM | 11 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady
-SPPTERM | 11 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady
+SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_FALSE | SW_1_IBUF
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | fsb/Ready1r.EXP | 10542 | ? | 462 | 0 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1
 
 SRFF_INSTANCE | fsb/Ready1r.REG | fsb/Ready1r | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | fsb/Ready1r.D | 9769 | ? | 418 | 0 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.XOR | 0 | 7 | ALU_F
+NODE | fsb/Ready1r.D | 10140 | ? | 457 | 0 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | fsb/Ready1r.Q | 9772 | ? | 428 | 0 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.REG | 0 | 8 | SRFF_Q
+NODE | fsb/Ready1r.Q | 10143 | ? | 467 | 0 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/Ready2r | MXSE_COPY_0_COPY_0 | 2155873536 | 21 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9488 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9490 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9493 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9494 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9495 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9522 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
+NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9529 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
+NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP24_.EXP | 10165 | ? | 419 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP24_.EXP | EXP24_ | 4 | 0 | MC_EXPORT
+NODE | EXP16_.EXP | 10560 | ? | 458 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP16_.EXP | EXP16_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | fsb/Ready2r | 9529 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
+NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | fsb/Ready2r.EXP | 10164 | ? | 423 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.EXP | fsb/Ready2r | 4 | 0 | MC_EXPORT
+NODE | fsb/Ready2r.EXP | 10559 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.EXP | fsb/Ready2r | 4 | 0 | MC_EXPORT
 
 SIGNAL_INSTANCE | fsb/Ready2r.SI | fsb/Ready2r | 0 | 20 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9488 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9490 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9493 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9494 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9495 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9522 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
+NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9529 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
+NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP24_.EXP | 10165 | ? | 419 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP24_.EXP | EXP24_ | 4 | 0 | MC_EXPORT
+NODE | EXP16_.EXP | 10560 | ? | 458 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP16_.EXP | EXP16_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | fsb/Ready2r.D1 | 9774 | ? | 419 | 4096 | fsb/Ready2r | NULL | NULL | fsb/Ready2r.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | fsb/Ready2r.D1 | 10145 | ? | 458 | 4096 | fsb/Ready2r | NULL | NULL | fsb/Ready2r.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | fsb/Ready2r.D2 | 9775 | ? | 419 | 4096 | fsb/Ready2r | NULL | NULL | fsb/Ready2r.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | EXP24_.EXP
+SIGNAL | NODE | fsb/Ready2r.D2 | 10146 | ? | 458 | 4096 | fsb/Ready2r | NULL | NULL | fsb/Ready2r.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | EXP16_.EXP
 SPPTERM | 19 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r
 SPPTERM | 19 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r
 SPPTERM | 19 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r
 SPPTERM | 19 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | fsb/Ready2r.EXP | 10151 | ? | 423 | 0 | fsb/Ready2r | NULL | NULL | fsb/Ready2r.SI | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | fsb/Ready2r.EXP | 10545 | ? | 462 | 0 | fsb/Ready2r | NULL | NULL | fsb/Ready2r.SI | 7 | 9 | MC_SI_EXPORT
 SPPTERM | 4 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF
 
 SRFF_INSTANCE | fsb/Ready2r.REG | fsb/Ready2r | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | fsb/Ready2r.D | 9773 | ? | 419 | 0 | fsb/Ready2r | NULL | NULL | fsb/Ready2r.XOR | 0 | 7 | ALU_F
+NODE | fsb/Ready2r.D | 10144 | ? | 458 | 0 | fsb/Ready2r | NULL | NULL | fsb/Ready2r.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | fsb/Ready2r.Q | 9776 | ? | 428 | 0 | fsb/Ready2r | NULL | NULL | fsb/Ready2r.REG | 0 | 8 | SRFF_Q
+NODE | fsb/Ready2r.Q | 10147 | ? | 467 | 0 | fsb/Ready2r | NULL | NULL | fsb/Ready2r.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | PrldLow+OptxMapped | fsb/VPA | MXSE_COPY_0_COPY_0 | 2155873280 | 11 | 1
+MACROCELL_INSTANCE | PrldLow+OptxMapped | fsb/VPA | MXSE_COPY_0_COPY_0 | 2155873280 | 10 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9526 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
+NODE | fsb/BERR1r | 9856 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9530 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
+NODE | fsb/VPA | 9860 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$609.UIM | 9664 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$609.Q | $OpTx$FX_DC$609 | 1 | 0 | MC_UIM
+NODE | $OpTx$FX_DC$708.UIM | 10011 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$708.Q | $OpTx$FX_DC$708 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9515 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
+NODE | Disable | 9968 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9525 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
+NODE | fsb/BERR0r | 9855 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM | 10012 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$$OpTx$FX_DC$182_INV$783.Q | $OpTx$$OpTx$FX_DC$182_INV$783 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutB | 9523 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
+NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | EXP22_.EXP | 10566 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP22_.EXP | EXP22_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP14_.EXP | 10154 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP14_.EXP | EXP14_ | 4 | 0 | MC_EXPORT
+NODE | EXP23_.EXP | 10567 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP23_.EXP | EXP23_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP15_.EXP | 10155 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP15_.EXP | EXP15_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | fsb/VPA | 9530 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
+NODE | fsb/VPA | 9860 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | fsb/VPA.SI | fsb/VPA | 0 | 10 | 2
+SIGNAL_INSTANCE | fsb/VPA.SI | fsb/VPA | 0 | 9 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9526 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
+NODE | fsb/BERR1r | 9856 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9530 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
+NODE | fsb/VPA | 9860 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$609.UIM | 9664 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$609.Q | $OpTx$FX_DC$609 | 1 | 0 | MC_UIM
+NODE | $OpTx$FX_DC$708.UIM | 10011 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$708.Q | $OpTx$FX_DC$708 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9515 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
+NODE | Disable | 9968 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9525 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
+NODE | fsb/BERR0r | 9855 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM | 10012 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$$OpTx$FX_DC$182_INV$783.Q | $OpTx$$OpTx$FX_DC$182_INV$783 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutB | 9523 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
+NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | EXP22_.EXP | 10566 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP22_.EXP | EXP22_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP14_.EXP | 10154 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP14_.EXP | EXP14_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP15_.EXP | 10155 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP15_.EXP | EXP15_ | 4 | 0 | MC_EXPORT
+NODE | EXP23_.EXP | 10567 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP23_.EXP | EXP23_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | fsb/VPA.D1 | 9778 | ? | 420 | 4096 | fsb/VPA | NULL | NULL | fsb/VPA.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | fsb/VPA.D1 | 10149 | ? | 459 | 4096 | fsb/VPA | NULL | NULL | fsb/VPA.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | fsb/VPA.D2 | 9779 | ? | 420 | 4096 | fsb/VPA | NULL | NULL | fsb/VPA.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | EXP14_.EXP
-SPPTERM | 1 | IV_TRUE | EXP15_.EXP
-SPPTERM | 3 | IV_TRUE | BERR_IOBS | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$609.UIM
-SPPTERM | 3 | IV_TRUE | fsb/BERR0r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$609.UIM
-SPPTERM | 3 | IV_TRUE | fsb/BERR1r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$609.UIM
-SPPTERM | 4 | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | TimeoutB | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$609.UIM
-SPPTERM | 4 | IV_FALSE | A_FSB_20_IBUF | IV_TRUE | TimeoutB | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$609.UIM
+SIGNAL | NODE | fsb/VPA.D2 | 10150 | ? | 459 | 4096 | fsb/VPA | NULL | NULL | fsb/VPA.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | EXP22_.EXP
+SPPTERM | 1 | IV_TRUE | EXP23_.EXP
+SPPTERM | 3 | IV_TRUE | BERR_IOBS | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$708.UIM
+SPPTERM | 3 | IV_TRUE | fsb/BERR0r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$708.UIM
+SPPTERM | 3 | IV_TRUE | fsb/BERR1r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$708.UIM
+SPPTERM | 3 | IV_TRUE | fsb/VPA | IV_FALSE | Disable | IV_FALSE | $OpTx$FX_DC$708.UIM
+SPPTERM | 3 | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$708.UIM | IV_TRUE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM
 
 SRFF_INSTANCE | fsb/VPA.REG | fsb/VPA | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | fsb/VPA.D | 9777 | ? | 420 | 0 | fsb/VPA | NULL | NULL | fsb/VPA.XOR | 0 | 7 | ALU_F
+NODE | fsb/VPA.D | 10148 | ? | 459 | 0 | fsb/VPA | NULL | NULL | fsb/VPA.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | fsb/VPA.Q | 9780 | ? | 420 | 0 | fsb/VPA | NULL | NULL | fsb/VPA.REG | 0 | 8 | SRFF_Q
+NODE | fsb/VPA.Q | 10151 | ? | 459 | 0 | fsb/VPA | NULL | NULL | fsb/VPA.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/IOL1 | MXSE_COPY_0_COPY_0 | 2155873280 | 3 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nLDS_FSB_IBUF | 9531 | ? | 421 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nLDS_FSB_IBUF | 9861 | ? | 460 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Load1 | 9564 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
+NODE | iobs/Load1 | 9897 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/IOL1 | 9532 | ? | 408 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOL1.Q | iobs/IOL1 | 1 | 0 | MC_UIM
+NODE | iobs/IOL1 | 9862 | ? | 447 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOL1.Q | iobs/IOL1 | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobs/IOL1.SI | iobs/IOL1 | 0 | 2 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nLDS_FSB_IBUF | 9531 | ? | 421 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nLDS_FSB_IBUF | 9861 | ? | 460 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Load1 | 9564 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
+NODE | iobs/Load1 | 9897 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/IOL1.D1 | 9782 | ? | 421 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobs/IOL1.D1 | 10153 | ? | 460 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/IOL1.D2 | 9783 | ? | 421 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobs/IOL1.D2 | 10154 | ? | 460 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_FALSE | nLDS_FSB_IBUF
 OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | iobs/IOL1.CE | 9784 | ? | 422 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | iobs/IOL1.CE | 10155 | ? | 461 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | iobs/Load1
 
 SRFF_INSTANCE | iobs/IOL1.REG | iobs/IOL1 | 0 | 3 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/IOL1.D | 9781 | ? | 421 | 0 | iobs/IOL1 | NULL | NULL | iobs/IOL1.XOR | 0 | 7 | ALU_F
+NODE | iobs/IOL1.D | 10152 | ? | 460 | 0 | iobs/IOL1 | NULL | NULL | iobs/IOL1.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | iobs/IOL1.CE | 9784 | ? | 422 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | iobs/IOL1.CE | 10155 | ? | 461 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | iobs/Load1
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/IOL1.Q | 9785 | ? | 408 | 0 | iobs/IOL1 | NULL | NULL | iobs/IOL1.REG | 0 | 8 | SRFF_Q
+NODE | iobs/IOL1.Q | 10156 | ? | 447 | 0 | iobs/IOL1 | NULL | NULL | iobs/IOL1.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | iobs/IORW1 | MXSE_COPY_0_COPY_0 | 2155877632 | 10 | 1
+MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | iobs/IORW1 | MXSE_COPY_0_COPY_0 | 2155877632 | 9 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW1 | 9533 | ? | 423 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
+NODE | iobs/IORW1 | 9863 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | EXP14_.EXP | 10557 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP14_.EXP | EXP14_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP22_.EXP | 10162 | ? | 423 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP22_.EXP | EXP22_ | 4 | 0 | MC_EXPORT
+NODE | EXP15_.EXP | 10558 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP15_.EXP | EXP15_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP23_.EXP | 10163 | ? | 423 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP23_.EXP | EXP23_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/IORW1 | 9533 | ? | 423 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
+NODE | iobs/IORW1 | 9863 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | iobs/IORW1.SI | iobs/IORW1 | 0 | 9 | 2
+SIGNAL_INSTANCE | iobs/IORW1.SI | iobs/IORW1 | 0 | 8 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW1 | 9533 | ? | 423 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
+NODE | iobs/IORW1 | 9863 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | EXP14_.EXP | 10557 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP14_.EXP | EXP14_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP22_.EXP | 10162 | ? | 423 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP22_.EXP | EXP22_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP23_.EXP | 10163 | ? | 423 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP23_.EXP | EXP23_ | 4 | 0 | MC_EXPORT
+NODE | EXP15_.EXP | 10558 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP15_.EXP | EXP15_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/IORW1.D1 | 9787 | ? | 423 | 4096 | iobs/IORW1 | NULL | NULL | iobs/IORW1.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobs/IORW1.D1 | 10158 | ? | 462 | 4096 | iobs/IORW1 | NULL | NULL | iobs/IORW1.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/IORW1.D2 | 9788 | ? | 423 | 4096 | iobs/IORW1 | NULL | NULL | iobs/IORW1.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobs/IORW1.D2 | 10159 | ? | 462 | 4096 | iobs/IORW1 | NULL | NULL | iobs/IORW1.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | iobs/Once
 SPPTERM | 1 | IV_FALSE | ALE1
-SPPTERM | 1 | IV_TRUE | EXP22_.EXP
-SPPTERM | 1 | IV_TRUE | EXP23_.EXP
-SPPTERM | 2 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF
+SPPTERM | 1 | IV_TRUE | EXP14_.EXP
+SPPTERM | 1 | IV_TRUE | EXP15_.EXP
 SPPTERM | 2 | IV_TRUE | nWE_FSB_IBUF | IV_TRUE | iobs/IORW1
+SPPTERM | 2 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/IORW1
 SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/IORW1
 
 SRFF_INSTANCE | iobs/IORW1.REG | iobs/IORW1 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/IORW1.D | 9786 | ? | 423 | 0 | iobs/IORW1 | NULL | NULL | iobs/IORW1.XOR | 0 | 7 | ALU_F
+NODE | iobs/IORW1.D | 10157 | ? | 462 | 0 | iobs/IORW1 | NULL | NULL | iobs/IORW1.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/IORW1.Q | 9789 | ? | 423 | 0 | iobs/IORW1 | NULL | NULL | iobs/IORW1.REG | 0 | 8 | SRFF_Q
+NODE | iobs/IORW1.Q | 10160 | ? | 462 | 0 | iobs/IORW1 | NULL | NULL | iobs/IORW1.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobs/IOReady | MXSE_COPY_0_COPY_0 | 2155877376 | 9 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9534 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9559 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
+NODE | iobs/IOACTr | 9892 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOBERR | 9569 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
+NODE | IOBERR | 9900 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/IOReady | 9534 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobs/IOReady.SI | iobs/IOReady | 0 | 8 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9534 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9559 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
+NODE | iobs/IOACTr | 9892 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOBERR | 9569 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
+NODE | IOBERR | 9900 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/IOReady.D1 | 9791 | ? | 424 | 4096 | iobs/IOReady | NULL | NULL | iobs/IOReady.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobs/IOReady.D1 | 10162 | ? | 463 | 4096 | iobs/IOReady | NULL | NULL | iobs/IOReady.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/IOReady.D2 | 9792 | ? | 424 | 4096 | iobs/IOReady | NULL | NULL | iobs/IOReady.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobs/IOReady.D2 | 10163 | ? | 463 | 4096 | iobs/IOReady | NULL | NULL | iobs/IOReady.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | iobs/IOReady | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
 SPPTERM | 6 | IV_TRUE | iobs/Once | IV_TRUE | iobs/IOReady | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_TRUE | IOBERR | IV_TRUE | ALE1
 SPPTERM | 7 | IV_TRUE | iobs/Once | IV_FALSE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_FALSE | IOBERR | IV_TRUE | ALE1
@@ -1585,275 +1727,281 @@ SPPTERM | 7 | IV_TRUE | iobs/Once | IV_FALSE | iobs/IOReady | IV_FALSE | iobs/PS
 
 SRFF_INSTANCE | iobs/IOReady.REG | iobs/IOReady | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/IOReady.D | 9790 | ? | 424 | 0 | iobs/IOReady | NULL | NULL | iobs/IOReady.XOR | 0 | 7 | ALU_F
+NODE | iobs/IOReady.D | 10161 | ? | 463 | 0 | iobs/IOReady | NULL | NULL | iobs/IOReady.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/IOReady.Q | 9793 | ? | 428 | 0 | iobs/IOReady | NULL | NULL | iobs/IOReady.REG | 0 | 8 | SRFF_Q
+NODE | iobs/IOReady.Q | 10164 | ? | 467 | 0 | iobs/IOReady | NULL | NULL | iobs/IOReady.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/IOU1 | MXSE_COPY_0_COPY_0 | 2155873280 | 3 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nUDS_FSB_IBUF | 9535 | ? | 425 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nUDS_FSB_IBUF | 9865 | ? | 464 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Load1 | 9564 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
+NODE | iobs/Load1 | 9897 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/IOU1 | 9536 | ? | 410 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOU1.Q | iobs/IOU1 | 1 | 0 | MC_UIM
+NODE | iobs/IOU1 | 9866 | ? | 449 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOU1.Q | iobs/IOU1 | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobs/IOU1.SI | iobs/IOU1 | 0 | 2 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nUDS_FSB_IBUF | 9535 | ? | 425 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nUDS_FSB_IBUF | 9865 | ? | 464 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Load1 | 9564 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
+NODE | iobs/Load1 | 9897 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/IOU1.D1 | 9795 | ? | 425 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobs/IOU1.D1 | 10166 | ? | 464 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/IOU1.D2 | 9796 | ? | 425 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobs/IOU1.D2 | 10167 | ? | 464 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_FALSE | nUDS_FSB_IBUF
 OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
-SIGNAL | NODE | iobs/IOU1.CE | 9797 | ? | 426 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | iobs/IOU1.CE | 10168 | ? | 465 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | iobs/Load1
 
 SRFF_INSTANCE | iobs/IOU1.REG | iobs/IOU1 | 0 | 3 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/IOU1.D | 9794 | ? | 425 | 0 | iobs/IOU1 | NULL | NULL | iobs/IOU1.XOR | 0 | 7 | ALU_F
+NODE | iobs/IOU1.D | 10165 | ? | 464 | 0 | iobs/IOU1 | NULL | NULL | iobs/IOU1.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
-SIGNAL | NODE | iobs/IOU1.CE | 9797 | ? | 426 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | iobs/IOU1.CE | 10168 | ? | 465 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 10 | 9 | MC_SI_CE
 SPPTERM | 1 | IV_TRUE | iobs/Load1
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/IOU1.Q | 9798 | ? | 410 | 0 | iobs/IOU1 | NULL | NULL | iobs/IOU1.REG | 0 | 8 | SRFF_Q
+NODE | iobs/IOU1.Q | 10169 | ? | 449 | 0 | iobs/IOU1 | NULL | NULL | iobs/IOU1.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | ram/RAMDIS2 | MXSE_COPY_0_COPY_0 | 2155877376 | 16 | 2
+MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | ram/RAMDIS2 | MXSE_COPY_0_COPY_0 | 2155877376 | 16 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS2 | 9537 | ? | 427 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
+NODE | ram/RAMDIS2 | 9867 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9512 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
+NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_FSB_OBUF.EXP | 10237 | ? | 427 | 0 | MXSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.EXP | nBERR_FSB_OBUF | 4 | 0 | MC_EXPORT
+NODE | nCAS_OBUF.EXP | 10585 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | nCAS_OBUF.EXP | nCAS_OBUF | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/RAMDIS2 | 9537 | ? | 427 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | ram/RAMDIS2.EXP | 10238 | ? | 452 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.EXP | ram/RAMDIS2 | 4 | 0 | MC_EXPORT
+NODE | ram/RAMDIS2 | 9867 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | ram/RAMDIS2.SI | ram/RAMDIS2 | 0 | 15 | 3
+SIGNAL_INSTANCE | ram/RAMDIS2.SI | ram/RAMDIS2 | 0 | 15 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS2 | 9537 | ? | 427 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
+NODE | ram/RAMDIS2 | 9867 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9512 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
+NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_FSB_OBUF.EXP | 10237 | ? | 427 | 0 | MXSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.EXP | nBERR_FSB_OBUF | 4 | 0 | MC_EXPORT
+NODE | nCAS_OBUF.EXP | 10585 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | nCAS_OBUF.EXP | nCAS_OBUF | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/RAMDIS2.D1 | 9800 | ? | 427 | 4096 | ram/RAMDIS2 | NULL | NULL | ram/RAMDIS2.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | ram/RAMDIS2.D1 | 10171 | ? | 466 | 4096 | ram/RAMDIS2 | NULL | NULL | ram/RAMDIS2.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/RAMDIS2.D2 | 9801 | ? | 427 | 4096 | ram/RAMDIS2 | NULL | NULL | ram/RAMDIS2.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | nBERR_FSB_OBUF.EXP
+SIGNAL | NODE | ram/RAMDIS2.D2 | 10172 | ? | 466 | 4096 | ram/RAMDIS2 | NULL | NULL | ram/RAMDIS2.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | nCAS_OBUF.EXP
 SPPTERM | 3 | IV_TRUE | ram/RAMDIS2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
 SPPTERM | 10 | IV_TRUE | ram/Once | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | ram/RAMDIS2.EXP | 10227 | ? | 452 | 0 | ram/RAMDIS2 | NULL | NULL | ram/RAMDIS2.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
-SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
-SPPTERM | 7 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
+SPPTERM | 10 | IV_TRUE | ram/Once | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RAMDIS2 | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf
+SPPTERM | 13 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | ram/Once | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
+SPPTERM | 13 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | ram/Once | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RAMDIS2 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf
 
 SRFF_INSTANCE | ram/RAMDIS2.REG | ram/RAMDIS2 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/RAMDIS2.D | 9799 | ? | 427 | 0 | ram/RAMDIS2 | NULL | NULL | ram/RAMDIS2.XOR | 0 | 7 | ALU_F
+NODE | ram/RAMDIS2.D | 10170 | ? | 466 | 0 | ram/RAMDIS2 | NULL | NULL | ram/RAMDIS2.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/RAMDIS2.Q | 9802 | ? | 427 | 0 | ram/RAMDIS2 | NULL | NULL | ram/RAMDIS2.REG | 0 | 8 | SRFF_Q
+NODE | ram/RAMDIS2.Q | 10173 | ? | 466 | 0 | ram/RAMDIS2 | NULL | NULL | ram/RAMDIS2.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | PrldLow+OptxMapped | nDTACK_FSB_OBUF | MXSE_COPY_0_COPY_0 | 2155873280 | 10 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9526 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_FSB_OBUF.UIM | 9540 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9515 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9525 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$610.UIM | 9665 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$610.Q | $OpTx$FX_DC$610 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP19_.EXP | 10159 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP19_.EXP | EXP19_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP20_.EXP | 10160 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP20_.EXP | EXP20_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nDTACK_FSB_OBUF | 9539 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | nDTACK_FSB_OBUF.UIM | 9540 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
+INPUT_INSTANCE | 0 | 0 | NULL | CLK_IOB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 2
+INPUT_NODE_TYPE | 0 | 5 | II_IN
+NODE | CLK_IOB | 10035 | PI | 428 | 0 | MXSE_COPY_0_COPY_0 | CLK_IOB;CLK_IOB;CLK_IOB | NULL | NULL | 0 | 100 | NOTYPE
+OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
+NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
+OUTPUT_NODE_TYPE | 7 | 5 | II_FCLKINV
+NODE | CLK_IOB_IBUF/FCLK- | 9869 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 7 | 5 | II_FCLKINV
 
-SIGNAL_INSTANCE | nDTACK_FSB_OBUF.SI | nDTACK_FSB_OBUF | 0 | 9 | 2
+INPUT_INSTANCE | 0 | 0 | NULL | nBERR_IOB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
+INPUT_NODE_TYPE | 0 | 5 | II_IN
+NODE | nBERR_IOB | 10038 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
+NODE | nBERR_IOB_IBUF | 9872 | ? | 530 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
+
+MACROCELL_INSTANCE | PrldLow+OptxMapped | nDTACK_FSB_OBUF | MXSE_COPY_0_COPY_0 | 2155873280 | 9 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9526 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
+NODE | fsb/BERR1r | 9856 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_FSB_OBUF.UIM | 9540 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
+NODE | nDTACK_FSB_OBUF.UIM | 9874 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9515 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
+NODE | Disable | 9968 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9525 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
+NODE | fsb/BERR0r | 9855 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$610.UIM | 9665 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$610.Q | $OpTx$FX_DC$610 | 1 | 0 | MC_UIM
+NODE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM | 10012 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$$OpTx$FX_DC$182_INV$783.Q | $OpTx$$OpTx$FX_DC$182_INV$783 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | EXP18_.EXP | 10562 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP18_.EXP | EXP18_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP19_.EXP | 10159 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP19_.EXP | EXP19_ | 4 | 0 | MC_EXPORT
+NODE | EXP19_.EXP | 10563 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP19_.EXP | EXP19_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP20_.EXP | 10160 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP20_.EXP | EXP20_ | 4 | 0 | MC_EXPORT
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
+NODE | nDTACK_FSB_OBUF | 9873 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 0 | 0 | MC_Q
+OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
+NODE | nDTACK_FSB_OBUF.UIM | 9874 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
+
+SIGNAL_INSTANCE | nDTACK_FSB_OBUF.SI | nDTACK_FSB_OBUF | 0 | 8 | 2
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/BERR1r | 9856 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nDTACK_FSB_OBUF.UIM | 9874 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | Disable | 9968 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/BERR0r | 9855 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM | 10012 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$$OpTx$FX_DC$182_INV$783.Q | $OpTx$$OpTx$FX_DC$182_INV$783 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP18_.EXP | 10562 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP18_.EXP | EXP18_ | 4 | 0 | MC_EXPORT
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP19_.EXP | 10563 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP19_.EXP | EXP19_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nDTACK_FSB_OBUF.D1 | 9804 | ? | 428 | 4096 | nDTACK_FSB_OBUF | NULL | NULL | nDTACK_FSB_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nDTACK_FSB_OBUF.D1 | 10175 | ? | 467 | 4096 | nDTACK_FSB_OBUF | NULL | NULL | nDTACK_FSB_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nDTACK_FSB_OBUF.D2 | 9805 | ? | 428 | 4096 | nDTACK_FSB_OBUF | NULL | NULL | nDTACK_FSB_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | nDTACK_FSB_OBUF.D2 | 10176 | ? | 467 | 4096 | nDTACK_FSB_OBUF | NULL | NULL | nDTACK_FSB_OBUF.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | EXP18_.EXP
 SPPTERM | 1 | IV_TRUE | EXP19_.EXP
-SPPTERM | 1 | IV_TRUE | EXP20_.EXP
 SPPTERM | 2 | IV_TRUE | BERR_IOBS | IV_TRUE | nDTACK_FSB_OBUF.UIM
 SPPTERM | 2 | IV_TRUE | fsb/BERR0r | IV_TRUE | nDTACK_FSB_OBUF.UIM
 SPPTERM | 2 | IV_TRUE | fsb/BERR1r | IV_TRUE | nDTACK_FSB_OBUF.UIM
-SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-SPPTERM | 2 | IV_TRUE | nDTACK_FSB_OBUF.UIM | IV_FALSE | $OpTx$FX_DC$610.UIM
+SPPTERM | 2 | IV_TRUE | nDTACK_FSB_OBUF.UIM | IV_FALSE | Disable
+SPPTERM | 2 | IV_TRUE | nDTACK_FSB_OBUF.UIM | IV_TRUE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM
 
 SRFF_INSTANCE | nDTACK_FSB_OBUF.REG | nDTACK_FSB_OBUF | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nDTACK_FSB_OBUF.D | 9803 | ? | 428 | 0 | nDTACK_FSB_OBUF | NULL | NULL | nDTACK_FSB_OBUF.XOR | 0 | 7 | ALU_F
+NODE | nDTACK_FSB_OBUF.D | 10174 | ? | 467 | 0 | nDTACK_FSB_OBUF | NULL | NULL | nDTACK_FSB_OBUF.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nDTACK_FSB_OBUF.Q | 9806 | ? | 428 | 0 | nDTACK_FSB_OBUF | NULL | NULL | nDTACK_FSB_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | nDTACK_FSB_OBUF.Q | 10177 | ? | 467 | 0 | nDTACK_FSB_OBUF | NULL | NULL | nDTACK_FSB_OBUF.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RASEL | MXSE_COPY_0_COPY_0 | 2155873280 | 14 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9565 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF$BUF0.EXP | 10232 | ? | 429 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.EXP | A_FSB_19_IBUF$BUF0 | 4 | 0 | MC_EXPORT
+NODE | nROMCS_OBUF.EXP | 10583 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.EXP | nROMCS_OBUF | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP39_.EXP | 10242 | ? | 429 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP39_.EXP | EXP39_ | 4 | 0 | MC_EXPORT
+NODE | EXP27_.EXP | 10595 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP27_.EXP | EXP27_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/RASEL | 9541 | ? | 454 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | ram/RASEL.SI | ram/RASEL | 0 | 13 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9565 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF$BUF0.EXP | 10232 | ? | 429 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.EXP | A_FSB_19_IBUF$BUF0 | 4 | 0 | MC_EXPORT
+NODE | nROMCS_OBUF.EXP | 10583 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.EXP | nROMCS_OBUF | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP39_.EXP | 10242 | ? | 429 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP39_.EXP | EXP39_ | 4 | 0 | MC_EXPORT
+NODE | EXP27_.EXP | 10595 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP27_.EXP | EXP27_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/RASEL.D1 | 9808 | ? | 429 | 4096 | ram/RASEL | NULL | NULL | ram/RASEL.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | ram/RASEL.D1 | 10179 | ? | 468 | 4096 | ram/RASEL | NULL | NULL | ram/RASEL.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/RASEL.D2 | 9809 | ? | 429 | 4096 | ram/RASEL | NULL | NULL | ram/RASEL.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | A_FSB_19_IBUF$BUF0.EXP
-SPPTERM | 1 | IV_TRUE | EXP39_.EXP
+SIGNAL | NODE | ram/RASEL.D2 | 10180 | ? | 468 | 4096 | ram/RASEL | NULL | NULL | ram/RASEL.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | nROMCS_OBUF.EXP
+SPPTERM | 1 | IV_TRUE | EXP27_.EXP
 SPPTERM | 2 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd3
 SPPTERM | 3 | IV_TRUE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
 SPPTERM | 6 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
@@ -1862,648 +2010,588 @@ SPPTERM | 7 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/
 
 SRFF_INSTANCE | ram/RASEL.REG | ram/RASEL | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/RASEL.D | 9807 | ? | 429 | 0 | ram/RASEL | NULL | NULL | ram/RASEL.XOR | 0 | 7 | ALU_F
+NODE | ram/RASEL.D | 10178 | ? | 468 | 0 | ram/RASEL | NULL | NULL | ram/RASEL.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/RASEL.Q | 9810 | ? | 454 | 0 | ram/RASEL | NULL | NULL | ram/RASEL.REG | 0 | 8 | SRFF_Q
+NODE | ram/RASEL.Q | 10181 | ? | 500 | 0 | ram/RASEL | NULL | NULL | ram/RASEL.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | ram/RS_FSM_FFd2 | MXSE_COPY_0_COPY_0 | 2155877632 | 10 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9565 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP32_.EXP | 10218 | ? | 430 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP32_.EXP | EXP32_ | 4 | 0 | MC_EXPORT
+NODE | EXP29_.EXP | 10619 | ? | 469 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP29_.EXP | EXP29_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | ram/RS_FSM_FFd2.EXP | 10219 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.EXP | ram/RS_FSM_FFd2 | 4 | 0 | MC_EXPORT
+NODE | ram/RS_FSM_FFd2.EXP | 10620 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.EXP | ram/RS_FSM_FFd2 | 4 | 0 | MC_EXPORT
 
 SIGNAL_INSTANCE | ram/RS_FSM_FFd2.SI | ram/RS_FSM_FFd2 | 0 | 9 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9565 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP32_.EXP | 10218 | ? | 430 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP32_.EXP | EXP32_ | 4 | 0 | MC_EXPORT
+NODE | EXP29_.EXP | 10619 | ? | 469 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP29_.EXP | EXP29_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/RS_FSM_FFd2.D1 | 9812 | ? | 430 | 4096 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | ram/RS_FSM_FFd2.D1 | 10183 | ? | 469 | 4096 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/RS_FSM_FFd2.D2 | 9813 | ? | 430 | 4096 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | EXP32_.EXP
+SIGNAL | NODE | ram/RS_FSM_FFd2.D2 | 10184 | ? | 469 | 4096 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | EXP29_.EXP
 SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3
 SPPTERM | 3 | IV_TRUE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
 SPPTERM | 4 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<6> | IV_TRUE | ram/BACTr
 SPPTERM | 4 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | ram/BACTr | IV_FALSE | cnt/RefCnt<7>
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | ram/RS_FSM_FFd2.EXP | 10208 | ? | 453 | 0 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.SI | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | ram/RS_FSM_FFd2.EXP | 10610 | ? | 499 | 0 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.SI | 7 | 9 | MC_SI_EXPORT
 SPPTERM | 4 | IV_FALSE | cnt/RefDone | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
 
 SRFF_INSTANCE | ram/RS_FSM_FFd2.REG | ram/RS_FSM_FFd2 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/RS_FSM_FFd2.D | 9811 | ? | 430 | 0 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.XOR | 0 | 7 | ALU_F
+NODE | ram/RS_FSM_FFd2.D | 10182 | ? | 469 | 0 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/RS_FSM_FFd2.Q | 9814 | ? | 453 | 0 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.REG | 0 | 8 | SRFF_Q
+NODE | ram/RS_FSM_FFd2.Q | 10185 | ? | 499 | 0 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-INPUT_INSTANCE | 0 | 0 | NULL | CLK_IOB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 2
-INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | CLK_IOB | 9690 | PI | 389 | 0 | MXSE_COPY_0_COPY_0 | CLK_IOB;CLK_IOB;CLK_IOB | NULL | NULL | 0 | 100 | NOTYPE
-OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | CLK_IOB_IBUF | 9566 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 7 | 5 | II_FCLKINV
-NODE | CLK_IOB_IBUF/FCLK- | 9567 | ? | 474 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 7 | 5 | II_FCLKINV
-
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobm/IOS_FSM_FFd4 | MXSE_COPY_0_COPY_0 | 2155873536 | 7 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9546 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9547 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9548 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOREQr | 9573 | ? | 477 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9566 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/IOS_FSM_FFd4.SI | iobm/IOS_FSM_FFd4 | 0 | 6 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9546 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9547 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9548 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOREQr | 9573 | ? | 477 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9566 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/IOS_FSM_FFd4.D1 | 9816 | ? | 458 | 4096 | iobm/IOS_FSM_FFd4 | NULL | NULL | iobm/IOS_FSM_FFd4.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/IOS_FSM_FFd4.D2 | 9817 | ? | 458 | 4096 | iobm/IOS_FSM_FFd4 | NULL | NULL | iobm/IOS_FSM_FFd4.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1
-SPPTERM | 3 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOS_FSM_FFd1
-SPPTERM | 4 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_TRUE | CLK_IOB_IBUF
-SPPTERM | 4 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOREQr
-
-SRFF_INSTANCE | iobm/IOS_FSM_FFd4.REG | iobm/IOS_FSM_FFd4 | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/IOS_FSM_FFd4.D | 9815 | ? | 458 | 0 | iobm/IOS_FSM_FFd4 | NULL | NULL | iobm/IOS_FSM_FFd4.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/IOS_FSM_FFd4.Q | 9818 | ? | 486 | 0 | iobm/IOS_FSM_FFd4 | NULL | NULL | iobm/IOS_FSM_FFd4.REG | 0 | 8 | SRFF_Q
-TNAME | CLK_IOB | CLK2X_IOB
-
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | ram/RS_FSM_FFd1 | MXSE_COPY_0_COPY_0 | 2155877376 | 11 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9512 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | ram/RS_FSM_FFd1.SI | ram/RS_FSM_FFd1 | 0 | 10 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9512 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/RS_FSM_FFd1.D1 | 9820 | ? | 431 | 4096 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | ram/RS_FSM_FFd1.D1 | 10187 | ? | 470 | 4096 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/RS_FSM_FFd1.D2 | 9821 | ? | 431 | 4096 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | ram/RS_FSM_FFd1.D2 | 10188 | ? | 470 | 4096 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd3
-SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf
-SPPTERM | 9 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 9 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf
+SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
+SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf
+SPPTERM | 9 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
+SPPTERM | 9 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf
 
 SRFF_INSTANCE | ram/RS_FSM_FFd1.REG | ram/RS_FSM_FFd1 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/RS_FSM_FFd1.D | 9819 | ? | 431 | 0 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.XOR | 0 | 7 | ALU_F
+NODE | ram/RS_FSM_FFd1.D | 10186 | ? | 470 | 0 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/RS_FSM_FFd1.Q | 9822 | ? | 453 | 0 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.REG | 0 | 8 | SRFF_Q
+NODE | ram/RS_FSM_FFd1.Q | 10189 | ? | 499 | 0 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | ram/RS_FSM_FFd3 | MXSE_COPY_0_COPY_0 | 2155877632 | 15 | 2
+MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | ram/RS_FSM_FFd3 | MXSE_COPY_0_COPY_0 | 2155877632 | 12 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | CLK25EN_OBUF.EXP | 10616 | ? | 471 | 0 | MXSE_COPY_0_COPY_0 | NULL | CLK25EN_OBUF.EXP | CLK25EN_OBUF | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+NODE | CLK20EN_OBUF$BUF0.EXP | 10617 | ? | 471 | 0 | MXSE_COPY_0_COPY_0 | NULL | CLK20EN_OBUF$BUF0.EXP | CLK20EN_OBUF$BUF0 | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP31_.EXP | 10216 | ? | 432 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP31_.EXP | EXP31_ | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | ram/RS_FSM_FFd3.EXP | 10217 | ? | 430 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.EXP | ram/RS_FSM_FFd3 | 4 | 0 | MC_EXPORT
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | ram/RS_FSM_FFd3.SI | ram/RS_FSM_FFd3 | 0 | 14 | 3
+SIGNAL_INSTANCE | ram/RS_FSM_FFd3.SI | ram/RS_FSM_FFd3 | 0 | 11 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | CLK25EN_OBUF.EXP | 10616 | ? | 471 | 0 | MXSE_COPY_0_COPY_0 | NULL | CLK25EN_OBUF.EXP | CLK25EN_OBUF | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP31_.EXP | 10216 | ? | 432 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP31_.EXP | EXP31_ | 4 | 0 | MC_EXPORT
+NODE | CLK20EN_OBUF$BUF0.EXP | 10617 | ? | 471 | 0 | MXSE_COPY_0_COPY_0 | NULL | CLK20EN_OBUF$BUF0.EXP | CLK20EN_OBUF$BUF0 | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/RS_FSM_FFd3.D1 | 9824 | ? | 432 | 4096 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | ram/RS_FSM_FFd3.D1 | 10191 | ? | 471 | 4096 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/RS_FSM_FFd3.D2 | 9825 | ? | 432 | 4096 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | EXP31_.EXP
+SIGNAL | NODE | ram/RS_FSM_FFd3.D2 | 10192 | ? | 471 | 4096 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | CLK25EN_OBUF.EXP
+SPPTERM | 1 | IV_TRUE | CLK20EN_OBUF$BUF0.EXP
 SPPTERM | 4 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | ram/RS_FSM_FFd3.EXP | 10206 | ? | 430 | 0 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf
-SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf
-SPPTERM | 8 | IV_FALSE | cnt/RefDone | IV_TRUE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_FALSE | fsb/ASrf
+SPPTERM | 5 | IV_TRUE | ram/Once | IV_TRUE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
+SPPTERM | 5 | IV_TRUE | ram/Once | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<5>
+SPPTERM | 5 | IV_TRUE | ram/Once | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<6>
+SPPTERM | 5 | IV_TRUE | ram/Once | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<7>
 
 SRFF_INSTANCE | ram/RS_FSM_FFd3.REG | ram/RS_FSM_FFd3 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/RS_FSM_FFd3.D | 9823 | ? | 432 | 0 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.XOR | 0 | 7 | ALU_F
+NODE | ram/RS_FSM_FFd3.D | 10190 | ? | 471 | 0 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/RS_FSM_FFd3.Q | 9826 | ? | 453 | 0 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.REG | 0 | 8 | SRFF_Q
+NODE | ram/RS_FSM_FFd3.Q | 10193 | ? | 499 | 0 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobm/IOS_FSM_FFd3 | MXSE_COPY_0_COPY_0 | 2155873536 | 11 | 1
+MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/IOS_FSM_FFd3 | MXSE_COPY_0_COPY_0 | 2155873280 | 7 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9546 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9566 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ETACK | 9578 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
+NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9587 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
+NODE | iobm/IOREQr | 9906 | ? | 528 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9588 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
+NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrf | 9576 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrr | 9577 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrf | 9589 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrr | 9590 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/IOS_FSM_FFd3 | 9546 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | iobm/IOS_FSM_FFd3.SI | iobm/IOS_FSM_FFd3 | 0 | 10 | 2
+SIGNAL_INSTANCE | iobm/IOS_FSM_FFd3.SI | iobm/IOS_FSM_FFd3 | 0 | 6 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9546 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9566 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ETACK | 9578 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
+NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9587 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
+NODE | iobm/IOREQr | 9906 | ? | 528 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9588 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrf | 9576 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrr | 9577 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrf | 9589 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrr | 9590 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
+NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/IOS_FSM_FFd3.D1 | 9828 | ? | 459 | 4096 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/IOS_FSM_FFd3.D1 | 10195 | ? | 510 | 4096 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/IOS_FSM_FFd3.D2 | 9829 | ? | 459 | 4096 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd3
-SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/ETACK
-SPPTERM | 4 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr
-SPPTERM | 4 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr
-SPPTERM | 4 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr
+SIGNAL | NODE | iobm/IOS_FSM_FFd3.D2 | 10196 | ? | 510 | 4096 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2
+SPPTERM | 3 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2
+SPPTERM | 5 | IV_FALSE | CLK_IOB_IBUF | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOREQr | IV_FALSE | iobm/BG
 
 SRFF_INSTANCE | iobm/IOS_FSM_FFd3.REG | iobm/IOS_FSM_FFd3 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/IOS_FSM_FFd3.D | 9827 | ? | 459 | 0 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.XOR | 0 | 7 | ALU_F
+NODE | iobm/IOS_FSM_FFd3.D | 10194 | ? | 510 | 0 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/IOS_FSM_FFd3.Q | 9830 | ? | 486 | 0 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.REG | 0 | 8 | SRFF_Q
+NODE | iobm/IOS_FSM_FFd3.Q | 10197 | ? | 535 | 0 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB | CLK2X_IOB
 
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobm/IOS_FSM_FFd2 | MXSE_COPY_0_COPY_0 | 2155873536 | 5 | 1
+MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/IOS_FSM_FFd1 | MXSE_COPY_0_COPY_0 | 2155873280 | 4 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9546 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9548 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9547 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/IOS_FSM_FFd2 | 9547 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | iobm/IOS_FSM_FFd2.SI | iobm/IOS_FSM_FFd2 | 0 | 4 | 2
+SIGNAL_INSTANCE | iobm/IOS_FSM_FFd1.SI | iobm/IOS_FSM_FFd1 | 0 | 3 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9546 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9548 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9547 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/IOS_FSM_FFd2.D1 | 9832 | ? | 460 | 4096 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/IOS_FSM_FFd1.D1 | 10199 | ? | 511 | 4096 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/IOS_FSM_FFd2.D2 | 9833 | ? | 460 | 4096 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1
-SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOS_FSM_FFd1
-
-SRFF_INSTANCE | iobm/IOS_FSM_FFd2.REG | iobm/IOS_FSM_FFd2 | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/IOS_FSM_FFd2.D | 9831 | ? | 460 | 0 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/IOS_FSM_FFd2.Q | 9834 | ? | 486 | 0 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobm/IOS_FSM_FFd1 | MXSE_COPY_0_COPY_0 | 2155873536 | 5 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9547 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9548 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9546 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/IOS_FSM_FFd1 | 9548 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
-
-SIGNAL_INSTANCE | iobm/IOS_FSM_FFd1.SI | iobm/IOS_FSM_FFd1 | 0 | 4 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9547 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9548 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9546 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/IOS_FSM_FFd1.D1 | 9836 | ? | 461 | 4096 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/IOS_FSM_FFd1.D2 | 9837 | ? | 461 | 4096 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 3 | IV_TRUE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOS_FSM_FFd1
-SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2
+SIGNAL | NODE | iobm/IOS_FSM_FFd1.D2 | 10200 | ? | 511 | 4096 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1
+SPPTERM | 2 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd2
 
 SRFF_INSTANCE | iobm/IOS_FSM_FFd1.REG | iobm/IOS_FSM_FFd1 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/IOS_FSM_FFd1.D | 9835 | ? | 461 | 0 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.XOR | 0 | 7 | ALU_F
+NODE | iobm/IOS_FSM_FFd1.D | 10198 | ? | 511 | 0 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/IOS_FSM_FFd1.Q | 9838 | ? | 486 | 0 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.REG | 0 | 8 | SRFF_Q
+NODE | iobm/IOS_FSM_FFd1.Q | 10201 | ? | 534 | 0 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobs/PS_FSM_FFd2 | MXSE_COPY_0_COPY_0 | 2155873536 | 12 | 1
+MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobm/IOS_FSM_FFd2 | MXSE_COPY_0_COPY_0 | 2155877376 | 12 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9559 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | iobm/ETACK | 9916 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/BERRrf | 9927 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/BERRrr | 9928 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/DTACKrf | 9914 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrr | 9915 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP27_.EXP | 10182 | ? | 433 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP27_.EXP | EXP27_ | 4 | 0 | MC_EXPORT
+NODE | iobm/RESrf | 9930 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nCAS_OBUF.EXP | 10183 | ? | 433 | 0 | MXSE_COPY_0_COPY_0 | NULL | nCAS_OBUF.EXP | nCAS_OBUF | 4 | 0 | MC_EXPORT
+NODE | iobm/RESrr | 9931 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | iobs/PS_FSM_FFd2.SI | iobs/PS_FSM_FFd2 | 0 | 11 | 2
+SIGNAL_INSTANCE | iobm/IOS_FSM_FFd2.SI | iobm/IOS_FSM_FFd2 | 0 | 11 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9559 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | iobm/ETACK | 9916 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/BERRrf | 9927 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/BERRrr | 9928 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/DTACKrf | 9914 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrr | 9915 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP27_.EXP | 10182 | ? | 433 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP27_.EXP | EXP27_ | 4 | 0 | MC_EXPORT
+NODE | iobm/RESrf | 9930 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nCAS_OBUF.EXP | 10183 | ? | 433 | 0 | MXSE_COPY_0_COPY_0 | NULL | nCAS_OBUF.EXP | nCAS_OBUF | 4 | 0 | MC_EXPORT
+NODE | iobm/RESrr | 9931 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/PS_FSM_FFd2.D1 | 9840 | ? | 433 | 4096 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/IOS_FSM_FFd2.D1 | 10203 | ? | 512 | 4096 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/PS_FSM_FFd2.D2 | 9841 | ? | 433 | 4096 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | EXP27_.EXP
-SPPTERM | 1 | IV_TRUE | nCAS_OBUF.EXP
+SIGNAL | NODE | iobm/IOS_FSM_FFd2.D2 | 10204 | ? | 512 | 4096 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 3 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2
+SPPTERM | 5 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/ETACK
+SPPTERM | 6 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr
+SPPTERM | 6 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr
+SPPTERM | 6 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr
+
+SRFF_INSTANCE | iobm/IOS_FSM_FFd2.REG | iobm/IOS_FSM_FFd2 | 0 | 2 | 1
+INPUT_NODE_TYPE | 0 | 8 | SRFF_D
+NODE | iobm/IOS_FSM_FFd2.D | 10202 | ? | 512 | 0 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.XOR | 0 | 7 | ALU_F
+INPUT_NODE_TYPE | 1 | 8 | SRFF_C
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
+NODE | iobm/IOS_FSM_FFd2.Q | 10205 | ? | 535 | 0 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.REG | 0 | 8 | SRFF_Q
+TNAME | CLK_IOB | CLK2X_IOB
+
+MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobs/PS_FSM_FFd2 | MXSE_COPY_0_COPY_0 | 2155873536 | 13 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IOACTr | 9892 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP32_.EXP | 10637 | ? | 472 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP32_.EXP | EXP32_ | 4 | 0 | MC_EXPORT
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nRAS_OBUF.EXP | 10638 | ? | 472 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.EXP | nRAS_OBUF | 4 | 0 | MC_EXPORT
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+
+SIGNAL_INSTANCE | iobs/PS_FSM_FFd2.SI | iobs/PS_FSM_FFd2 | 0 | 12 | 2
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IOACTr | 9892 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP32_.EXP | 10637 | ? | 472 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP32_.EXP | EXP32_ | 4 | 0 | MC_EXPORT
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nRAS_OBUF.EXP | 10638 | ? | 472 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.EXP | nRAS_OBUF | 4 | 0 | MC_EXPORT
+OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobs/PS_FSM_FFd2.D1 | 10207 | ? | 472 | 4096 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1
+SPPTERM | 0 | IV_ZERO
+OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobs/PS_FSM_FFd2.D2 | 10208 | ? | 472 | 4096 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | EXP32_.EXP
+SPPTERM | 1 | IV_TRUE | nRAS_OBUF.EXP
 SPPTERM | 3 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/IOACTr
 SPPTERM | 3 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/PS_FSM_FFd1 | IV_FALSE | iobs/IOACTr
 SPPTERM | 4 | IV_TRUE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
 SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_FALSE | fsb/ASrf | IV_TRUE | ALE1
+SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
 
 SRFF_INSTANCE | iobs/PS_FSM_FFd2.REG | iobs/PS_FSM_FFd2 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/PS_FSM_FFd2.D | 9839 | ? | 433 | 0 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.XOR | 0 | 7 | ALU_F
+NODE | iobs/PS_FSM_FFd2.D | 10206 | ? | 472 | 0 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/PS_FSM_FFd2.Q | 9842 | ? | 451 | 0 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.REG | 0 | 8 | SRFF_Q
+NODE | iobs/PS_FSM_FFd2.Q | 10209 | ? | 497 | 0 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | iobm/ES<0> | MXSE_COPY_0_COPY_0 | 2155877632 | 8 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9550 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9572 | ? | 474 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
+NODE | iobm/Er | 9905 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9579 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
+NODE | iobm/Er2 | 9917 | ? | 517 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9551 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9552 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
+NODE | iobm/ES<2> | 9885 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9554 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
+NODE | iobm/ES<3> | 9887 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9555 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
+NODE | iobm/ES<4> | 9888 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/ES<0> | 9550 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/ES<0>.SI | iobm/ES<0> | 0 | 7 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9550 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9572 | ? | 474 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
+NODE | iobm/Er | 9905 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9579 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
+NODE | iobm/Er2 | 9917 | ? | 517 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9551 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9552 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
+NODE | iobm/ES<2> | 9885 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9554 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
+NODE | iobm/ES<3> | 9887 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9555 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
+NODE | iobm/ES<4> | 9888 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/ES<0>.D1 | 9844 | ? | 462 | 4096 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/ES<0>.D1 | 10211 | ? | 513 | 4096 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/ES<0>.D2 | 9845 | ? | 462 | 4096 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/ES<0>.D2 | 10212 | ? | 513 | 4096 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | iobm/ES<0> | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2
 SPPTERM | 6 | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4> | IV_TRUE | iobm/Er
 SPPTERM | 6 | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4> | IV_FALSE | iobm/Er2
 
 SRFF_INSTANCE | iobm/ES<0>.REG | iobm/ES<0> | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/ES<0>.D | 9843 | ? | 462 | 0 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.XOR | 0 | 7 | ALU_F
+NODE | iobm/ES<0>.D | 10210 | ? | 513 | 0 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/ES<0>.Q | 9846 | ? | 473 | 0 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.REG | 0 | 8 | SRFF_Q
+NODE | iobm/ES<0>.Q | 10213 | ? | 524 | 0 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobm/ES<1> | MXSE_COPY_0_COPY_0 | 2155873536 | 5 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9550 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9551 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9572 | ? | 474 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
+NODE | iobm/Er | 9905 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9579 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
+NODE | iobm/Er2 | 9917 | ? | 517 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/ES<1> | 9551 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/ES<1>.SI | iobm/ES<1> | 0 | 4 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9550 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9551 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9572 | ? | 474 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
+NODE | iobm/Er | 9905 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9579 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
+NODE | iobm/Er2 | 9917 | ? | 517 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/ES<1>.D1 | 9848 | ? | 463 | 4096 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/ES<1>.D1 | 10215 | ? | 514 | 4096 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/ES<1>.D2 | 9849 | ? | 463 | 4096 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/ES<1>.D2 | 10216 | ? | 514 | 4096 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1>
 SPPTERM | 2 | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1>
 SPPTERM | 2 | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2
 
 SRFF_INSTANCE | iobm/ES<1>.REG | iobm/ES<1> | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/ES<1>.D | 9847 | ? | 463 | 0 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.XOR | 0 | 7 | ALU_F
+NODE | iobm/ES<1>.D | 10214 | ? | 514 | 0 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/ES<1>.Q | 9850 | ? | 473 | 0 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.REG | 0 | 8 | SRFF_Q
+NODE | iobm/ES<1>.Q | 10217 | ? | 524 | 0 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobm/ES<2> | MXSE_COPY_0_COPY_0 | 2155873536 | 8 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9550 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9552 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
+NODE | iobm/ES<2> | 9885 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9551 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9572 | ? | 474 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
+NODE | iobm/Er | 9905 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9579 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
+NODE | iobm/Er2 | 9917 | ? | 517 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9554 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
+NODE | iobm/ES<3> | 9887 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9555 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
+NODE | iobm/ES<4> | 9888 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/ES<2> | 9552 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
+NODE | iobm/ES<2> | 9885 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/ES<2>.SI | iobm/ES<2> | 0 | 7 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9550 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9552 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
+NODE | iobm/ES<2> | 9885 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9551 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9572 | ? | 474 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
+NODE | iobm/Er | 9905 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9579 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
+NODE | iobm/Er2 | 9917 | ? | 517 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9554 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
+NODE | iobm/ES<3> | 9887 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9555 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
+NODE | iobm/ES<4> | 9888 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/ES<2>.D1 | 9852 | ? | 464 | 4096 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/ES<2>.D1 | 10219 | ? | 515 | 4096 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/ES<2>.D2 | 9853 | ? | 464 | 4096 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/ES<2>.D2 | 10220 | ? | 515 | 4096 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<2>
 SPPTERM | 2 | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2>
 SPPTERM | 2 | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2
@@ -2512,138 +2600,138 @@ SPPTERM | 3 | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_TRUE | iobm/ES<
 
 SRFF_INSTANCE | iobm/ES<2>.REG | iobm/ES<2> | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/ES<2>.D | 9851 | ? | 464 | 0 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.XOR | 0 | 7 | ALU_F
+NODE | iobm/ES<2>.D | 10218 | ? | 515 | 0 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/ES<2>.Q | 9854 | ? | 473 | 0 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.REG | 0 | 8 | SRFF_Q
+NODE | iobm/ES<2>.Q | 10221 | ? | 524 | 0 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/PS_FSM_FFd1 | MXSE_COPY_0_COPY_0 | 2155873280 | 4 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9559 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
+NODE | iobs/IOACTr | 9892 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobs/PS_FSM_FFd1.SI | iobs/PS_FSM_FFd1 | 0 | 3 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9559 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
+NODE | iobs/IOACTr | 9892 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/PS_FSM_FFd1.D1 | 9856 | ? | 434 | 4096 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobs/PS_FSM_FFd1.D1 | 10223 | ? | 473 | 4096 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/PS_FSM_FFd1.D2 | 9857 | ? | 434 | 4096 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobs/PS_FSM_FFd1.D2 | 10224 | ? | 473 | 4096 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | iobs/PS_FSM_FFd2
 SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/IOACTr
 
 SRFF_INSTANCE | iobs/PS_FSM_FFd1.REG | iobs/PS_FSM_FFd1 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/PS_FSM_FFd1.D | 9855 | ? | 434 | 0 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.XOR | 0 | 7 | ALU_F
+NODE | iobs/PS_FSM_FFd1.D | 10222 | ? | 473 | 0 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/PS_FSM_FFd1.Q | 9858 | ? | 451 | 0 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.REG | 0 | 8 | SRFF_Q
+NODE | iobs/PS_FSM_FFd1.Q | 10225 | ? | 497 | 0 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobm/ES<3> | MXSE_COPY_0_COPY_0 | 2155877376 | 7 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9554 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
+NODE | iobm/ES<3> | 9887 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9572 | ? | 474 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
+NODE | iobm/Er | 9905 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9579 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
+NODE | iobm/Er2 | 9917 | ? | 517 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9550 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9551 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9552 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
+NODE | iobm/ES<2> | 9885 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/ES<3> | 9554 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
+NODE | iobm/ES<3> | 9887 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/ES<3>.SI | iobm/ES<3> | 0 | 6 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9554 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
+NODE | iobm/ES<3> | 9887 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9572 | ? | 474 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
+NODE | iobm/Er | 9905 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9579 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
+NODE | iobm/Er2 | 9917 | ? | 517 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9550 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9551 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9552 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
+NODE | iobm/ES<2> | 9885 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/ES<3>.D1 | 9860 | ? | 465 | 4096 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/ES<3>.D1 | 10227 | ? | 516 | 4096 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/ES<3>.D2 | 9861 | ? | 465 | 4096 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/ES<3>.D2 | 10228 | ? | 516 | 4096 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | iobm/ES<3> | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2
 SPPTERM | 4 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_TRUE | iobm/Er
 SPPTERM | 4 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_FALSE | iobm/Er2
 
 SRFF_INSTANCE | iobm/ES<3>.REG | iobm/ES<3> | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/ES<3>.D | 9859 | ? | 465 | 0 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.XOR | 0 | 7 | ALU_F
+NODE | iobm/ES<3>.D | 10226 | ? | 516 | 0 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/ES<3>.Q | 9862 | ? | 473 | 0 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.REG | 0 | 8 | SRFF_Q
+NODE | iobm/ES<3>.Q | 10229 | ? | 524 | 0 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobm/ES<4> | MXSE_COPY_0_COPY_0 | 2155877376 | 8 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9555 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
+NODE | iobm/ES<4> | 9888 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9572 | ? | 474 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
+NODE | iobm/Er | 9905 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9579 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
+NODE | iobm/Er2 | 9917 | ? | 517 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9550 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9551 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9552 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
+NODE | iobm/ES<2> | 9885 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9554 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
+NODE | iobm/ES<3> | 9887 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/ES<4> | 9555 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
+NODE | iobm/ES<4> | 9888 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/ES<4>.SI | iobm/ES<4> | 0 | 7 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9555 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
+NODE | iobm/ES<4> | 9888 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9572 | ? | 474 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
+NODE | iobm/Er | 9905 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er2 | 9579 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
+NODE | iobm/Er2 | 9917 | ? | 517 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9550 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9551 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9552 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
+NODE | iobm/ES<2> | 9885 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9554 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
+NODE | iobm/ES<3> | 9887 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/ES<4>.D1 | 9864 | ? | 466 | 4096 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/ES<4>.D1 | 10231 | ? | 517 | 4096 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/ES<4>.D2 | 9865 | ? | 466 | 4096 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/ES<4>.D2 | 10232 | ? | 517 | 4096 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | iobm/ES<4> | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2
 SPPTERM | 5 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_TRUE | iobm/ES<3> | IV_TRUE | iobm/Er
 SPPTERM | 5 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_TRUE | iobm/ES<3> | IV_FALSE | iobm/Er2
@@ -2651,1303 +2739,1665 @@ SPPTERM | 5 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_FALSE | iobm/ES<2
 
 SRFF_INSTANCE | iobm/ES<4>.REG | iobm/ES<4> | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/ES<4>.D | 9863 | ? | 466 | 0 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.XOR | 0 | 7 | ALU_F
+NODE | iobm/ES<4>.D | 10230 | ? | 517 | 0 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/ES<4>.Q | 9866 | ? | 473 | 0 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.REG | 0 | 8 | SRFF_Q
+NODE | iobm/ES<4>.Q | 10233 | ? | 524 | 0 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<0> | MXSE_COPY_0_COPY_0 | 2155877376 | 1 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/RefCnt<0> | 9556 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/RefCnt<0>.SI | cnt/RefCnt<0> | 0 | 0 | 2
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/RefCnt<0>.D1 | 9868 | ? | 435 | 4096 | cnt/RefCnt<0> | NULL | NULL | cnt/RefCnt<0>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/RefCnt<0>.D1 | 10235 | ? | 474 | 4096 | cnt/RefCnt<0> | NULL | NULL | cnt/RefCnt<0>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/RefCnt<0>.D2 | 9869 | ? | 435 | 4096 | cnt/RefCnt<0> | NULL | NULL | cnt/RefCnt<0>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/RefCnt<0>.D2 | 10236 | ? | 474 | 4096 | cnt/RefCnt<0> | NULL | NULL | cnt/RefCnt<0>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 0 | IV_DC
 
 SRFF_INSTANCE | cnt/RefCnt<0>.REG | cnt/RefCnt<0> | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/RefCnt<0>.D | 9867 | ? | 435 | 0 | cnt/RefCnt<0> | NULL | NULL | cnt/RefCnt<0>.XOR | 0 | 7 | ALU_F
+NODE | cnt/RefCnt<0>.D | 10234 | ? | 474 | 0 | cnt/RefCnt<0> | NULL | NULL | cnt/RefCnt<0>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/RefCnt<0>.Q | 9870 | ? | 445 | 0 | cnt/RefCnt<0> | NULL | NULL | cnt/RefCnt<0>.REG | 0 | 8 | SRFF_Q
+NODE | cnt/RefCnt<0>.Q | 10237 | ? | 486 | 0 | cnt/RefCnt<0> | NULL | NULL | cnt/RefCnt<0>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<5> | MXSE_COPY_0_COPY_0 | 2155877376 | 6 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9556 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9560 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9561 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9562 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9563 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/RefCnt<5>.SI | cnt/RefCnt<5> | 0 | 5 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9556 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9560 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9561 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9562 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9563 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/RefCnt<5>.D1 | 9872 | ? | 436 | 0 | cnt/RefCnt<5> | NULL | NULL | cnt/RefCnt<5>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/RefCnt<5>.D1 | 10239 | ? | 475 | 0 | cnt/RefCnt<5> | NULL | NULL | cnt/RefCnt<5>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/RefCnt<5>.D2 | 9873 | ? | 436 | 4096 | cnt/RefCnt<5> | NULL | NULL | cnt/RefCnt<5>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/RefCnt<5>.D2 | 10240 | ? | 475 | 4096 | cnt/RefCnt<5> | NULL | NULL | cnt/RefCnt<5>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 5 | IV_TRUE | cnt/RefCnt<0> | IV_TRUE | cnt/RefCnt<1> | IV_TRUE | cnt/RefCnt<2> | IV_TRUE | cnt/RefCnt<3> | IV_TRUE | cnt/RefCnt<4>
 
 SRFF_INSTANCE | cnt/RefCnt<5>.REG | cnt/RefCnt<5> | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/RefCnt<5>.D | 9871 | ? | 436 | 0 | cnt/RefCnt<5> | NULL | NULL | cnt/RefCnt<5>.XOR | 0 | 7 | ALU_F
+NODE | cnt/RefCnt<5>.D | 10238 | ? | 475 | 0 | cnt/RefCnt<5> | NULL | NULL | cnt/RefCnt<5>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/RefCnt<5>.Q | 9874 | ? | 453 | 0 | cnt/RefCnt<5> | NULL | NULL | cnt/RefCnt<5>.REG | 0 | 8 | SRFF_Q
+NODE | cnt/RefCnt<5>.Q | 10241 | ? | 499 | 0 | cnt/RefCnt<5> | NULL | NULL | cnt/RefCnt<5>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<6> | MXSE_COPY_0_COPY_0 | 2155877376 | 7 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9556 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9560 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9561 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9562 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9563 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/RefCnt<6>.SI | cnt/RefCnt<6> | 0 | 6 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9556 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9560 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9561 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9562 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9563 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/RefCnt<6>.D1 | 9876 | ? | 437 | 0 | cnt/RefCnt<6> | NULL | NULL | cnt/RefCnt<6>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/RefCnt<6>.D1 | 10243 | ? | 476 | 0 | cnt/RefCnt<6> | NULL | NULL | cnt/RefCnt<6>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/RefCnt<6>.D2 | 9877 | ? | 437 | 4096 | cnt/RefCnt<6> | NULL | NULL | cnt/RefCnt<6>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/RefCnt<6>.D2 | 10244 | ? | 476 | 4096 | cnt/RefCnt<6> | NULL | NULL | cnt/RefCnt<6>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 6 | IV_TRUE | cnt/RefCnt<0> | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<1> | IV_TRUE | cnt/RefCnt<2> | IV_TRUE | cnt/RefCnt<3> | IV_TRUE | cnt/RefCnt<4>
 
 SRFF_INSTANCE | cnt/RefCnt<6>.REG | cnt/RefCnt<6> | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/RefCnt<6>.D | 9875 | ? | 437 | 0 | cnt/RefCnt<6> | NULL | NULL | cnt/RefCnt<6>.XOR | 0 | 7 | ALU_F
+NODE | cnt/RefCnt<6>.D | 10242 | ? | 476 | 0 | cnt/RefCnt<6> | NULL | NULL | cnt/RefCnt<6>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/RefCnt<6>.Q | 9878 | ? | 453 | 0 | cnt/RefCnt<6> | NULL | NULL | cnt/RefCnt<6>.REG | 0 | 8 | SRFF_Q
+NODE | cnt/RefCnt<6>.Q | 10245 | ? | 499 | 0 | cnt/RefCnt<6> | NULL | NULL | cnt/RefCnt<6>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/IOACTr | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOACT | 9568 | ? | 456 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOACT.Q | IOACT | 1 | 0 | MC_UIM
+NODE | IOACT | 9899 | ? | 504 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOACT.Q | IOACT | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/IOACTr | 9559 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
+NODE | iobs/IOACTr | 9892 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobs/IOACTr.SI | iobs/IOACTr | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOACT | 9568 | ? | 456 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOACT.Q | IOACT | 1 | 0 | MC_UIM
+NODE | IOACT | 9899 | ? | 504 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOACT.Q | IOACT | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/IOACTr.D1 | 9880 | ? | 438 | 4096 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobs/IOACTr.D1 | 10247 | ? | 477 | 4096 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/IOACTr.D2 | 9881 | ? | 438 | 4096 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobs/IOACTr.D2 | 10248 | ? | 477 | 4096 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | IOACT
 
 SRFF_INSTANCE | iobs/IOACTr.REG | iobs/IOACTr | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/IOACTr.D | 9879 | ? | 438 | 0 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.XOR | 0 | 7 | ALU_F
+NODE | iobs/IOACTr.D | 10246 | ? | 477 | 0 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/IOACTr.Q | 9882 | ? | 448 | 0 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.REG | 0 | 8 | SRFF_Q
+NODE | iobs/IOACTr.Q | 10249 | ? | 493 | 0 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<1> | MXSE_COPY_0_COPY_0 | 2155877376 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9556 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/RefCnt<1> | 9560 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/RefCnt<1>.SI | cnt/RefCnt<1> | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9556 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/RefCnt<1>.D1 | 9884 | ? | 439 | 0 | cnt/RefCnt<1> | NULL | NULL | cnt/RefCnt<1>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/RefCnt<1>.D1 | 10251 | ? | 478 | 0 | cnt/RefCnt<1> | NULL | NULL | cnt/RefCnt<1>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/RefCnt<1>.D2 | 9885 | ? | 439 | 4096 | cnt/RefCnt<1> | NULL | NULL | cnt/RefCnt<1>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/RefCnt<1>.D2 | 10252 | ? | 478 | 4096 | cnt/RefCnt<1> | NULL | NULL | cnt/RefCnt<1>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | cnt/RefCnt<0>
 
 SRFF_INSTANCE | cnt/RefCnt<1>.REG | cnt/RefCnt<1> | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/RefCnt<1>.D | 9883 | ? | 439 | 0 | cnt/RefCnt<1> | NULL | NULL | cnt/RefCnt<1>.XOR | 0 | 7 | ALU_F
+NODE | cnt/RefCnt<1>.D | 10250 | ? | 478 | 0 | cnt/RefCnt<1> | NULL | NULL | cnt/RefCnt<1>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/RefCnt<1>.Q | 9886 | ? | 445 | 0 | cnt/RefCnt<1> | NULL | NULL | cnt/RefCnt<1>.REG | 0 | 8 | SRFF_Q
+NODE | cnt/RefCnt<1>.Q | 10253 | ? | 486 | 0 | cnt/RefCnt<1> | NULL | NULL | cnt/RefCnt<1>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<2> | MXSE_COPY_0_COPY_0 | 2155877376 | 3 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9556 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9560 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/RefCnt<2> | 9561 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/RefCnt<2>.SI | cnt/RefCnt<2> | 0 | 2 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9556 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9560 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/RefCnt<2>.D1 | 9888 | ? | 440 | 0 | cnt/RefCnt<2> | NULL | NULL | cnt/RefCnt<2>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/RefCnt<2>.D1 | 10255 | ? | 479 | 0 | cnt/RefCnt<2> | NULL | NULL | cnt/RefCnt<2>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/RefCnt<2>.D2 | 9889 | ? | 440 | 4096 | cnt/RefCnt<2> | NULL | NULL | cnt/RefCnt<2>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/RefCnt<2>.D2 | 10256 | ? | 479 | 4096 | cnt/RefCnt<2> | NULL | NULL | cnt/RefCnt<2>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | cnt/RefCnt<0> | IV_TRUE | cnt/RefCnt<1>
 
 SRFF_INSTANCE | cnt/RefCnt<2>.REG | cnt/RefCnt<2> | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/RefCnt<2>.D | 9887 | ? | 440 | 0 | cnt/RefCnt<2> | NULL | NULL | cnt/RefCnt<2>.XOR | 0 | 7 | ALU_F
+NODE | cnt/RefCnt<2>.D | 10254 | ? | 479 | 0 | cnt/RefCnt<2> | NULL | NULL | cnt/RefCnt<2>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/RefCnt<2>.Q | 9890 | ? | 445 | 0 | cnt/RefCnt<2> | NULL | NULL | cnt/RefCnt<2>.REG | 0 | 8 | SRFF_Q
+NODE | cnt/RefCnt<2>.Q | 10257 | ? | 486 | 0 | cnt/RefCnt<2> | NULL | NULL | cnt/RefCnt<2>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<3> | MXSE_COPY_0_COPY_0 | 2155877376 | 4 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9556 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9560 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9561 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/RefCnt<3> | 9562 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/RefCnt<3>.SI | cnt/RefCnt<3> | 0 | 3 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9556 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9560 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9561 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/RefCnt<3>.D1 | 9892 | ? | 441 | 0 | cnt/RefCnt<3> | NULL | NULL | cnt/RefCnt<3>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/RefCnt<3>.D1 | 10259 | ? | 480 | 0 | cnt/RefCnt<3> | NULL | NULL | cnt/RefCnt<3>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/RefCnt<3>.D2 | 9893 | ? | 441 | 4096 | cnt/RefCnt<3> | NULL | NULL | cnt/RefCnt<3>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/RefCnt<3>.D2 | 10260 | ? | 480 | 4096 | cnt/RefCnt<3> | NULL | NULL | cnt/RefCnt<3>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | cnt/RefCnt<0> | IV_TRUE | cnt/RefCnt<1> | IV_TRUE | cnt/RefCnt<2>
 
 SRFF_INSTANCE | cnt/RefCnt<3>.REG | cnt/RefCnt<3> | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/RefCnt<3>.D | 9891 | ? | 441 | 0 | cnt/RefCnt<3> | NULL | NULL | cnt/RefCnt<3>.XOR | 0 | 7 | ALU_F
+NODE | cnt/RefCnt<3>.D | 10258 | ? | 480 | 0 | cnt/RefCnt<3> | NULL | NULL | cnt/RefCnt<3>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/RefCnt<3>.Q | 9894 | ? | 445 | 0 | cnt/RefCnt<3> | NULL | NULL | cnt/RefCnt<3>.REG | 0 | 8 | SRFF_Q
+NODE | cnt/RefCnt<3>.Q | 10261 | ? | 486 | 0 | cnt/RefCnt<3> | NULL | NULL | cnt/RefCnt<3>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<4> | MXSE_COPY_0_COPY_0 | 2155877376 | 5 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9556 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9560 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9561 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9562 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/RefCnt<4> | 9563 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | cnt/RefCnt<4>.SI | cnt/RefCnt<4> | 0 | 4 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9556 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9560 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9561 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9562 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/RefCnt<4>.D1 | 9896 | ? | 442 | 0 | cnt/RefCnt<4> | NULL | NULL | cnt/RefCnt<4>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/RefCnt<4>.D1 | 10263 | ? | 481 | 0 | cnt/RefCnt<4> | NULL | NULL | cnt/RefCnt<4>.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/RefCnt<4>.D2 | 9897 | ? | 442 | 4096 | cnt/RefCnt<4> | NULL | NULL | cnt/RefCnt<4>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/RefCnt<4>.D2 | 10264 | ? | 481 | 4096 | cnt/RefCnt<4> | NULL | NULL | cnt/RefCnt<4>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 4 | IV_TRUE | cnt/RefCnt<0> | IV_TRUE | cnt/RefCnt<1> | IV_TRUE | cnt/RefCnt<2> | IV_TRUE | cnt/RefCnt<3>
 
 SRFF_INSTANCE | cnt/RefCnt<4>.REG | cnt/RefCnt<4> | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/RefCnt<4>.D | 9895 | ? | 442 | 0 | cnt/RefCnt<4> | NULL | NULL | cnt/RefCnt<4>.XOR | 0 | 7 | ALU_F
+NODE | cnt/RefCnt<4>.D | 10262 | ? | 481 | 0 | cnt/RefCnt<4> | NULL | NULL | cnt/RefCnt<4>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/RefCnt<4>.Q | 9898 | ? | 445 | 0 | cnt/RefCnt<4> | NULL | NULL | cnt/RefCnt<4>.REG | 0 | 8 | SRFF_Q
+NODE | cnt/RefCnt<4>.Q | 10265 | ? | 486 | 0 | cnt/RefCnt<4> | NULL | NULL | cnt/RefCnt<4>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobs/Load1 | MXSE_COPY_0_COPY_0 | 2155873536 | 11 | 1
+MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobs/Load1 | MXSE_COPY_0_COPY_0 | 2155873536 | 12 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nRAMUWE_OBUF.EXP | 10234 | ? | 443 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.EXP | nRAMUWE_OBUF | 4 | 0 | MC_EXPORT
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP34_.EXP | 10235 | ? | 443 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP34_.EXP | EXP34_ | 4 | 0 | MC_EXPORT
+NODE | RA_5_OBUF.EXP | 10591 | ? | 482 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.EXP | RA_5_OBUF | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | RA_2_OBUF.EXP | 10592 | ? | 482 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.EXP | RA_2_OBUF | 4 | 0 | MC_EXPORT
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/Load1 | 9564 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
+NODE | iobs/Load1 | 9897 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | iobs/Load1.SI | iobs/Load1 | 0 | 10 | 2
+SIGNAL_INSTANCE | iobs/Load1.SI | iobs/Load1 | 0 | 11 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nRAMUWE_OBUF.EXP | 10234 | ? | 443 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.EXP | nRAMUWE_OBUF | 4 | 0 | MC_EXPORT
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP34_.EXP | 10235 | ? | 443 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP34_.EXP | EXP34_ | 4 | 0 | MC_EXPORT
+NODE | RA_5_OBUF.EXP | 10591 | ? | 482 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.EXP | RA_5_OBUF | 4 | 0 | MC_EXPORT
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | RA_2_OBUF.EXP | 10592 | ? | 482 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.EXP | RA_2_OBUF | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/Load1.D1 | 9900 | ? | 443 | 4096 | iobs/Load1 | NULL | NULL | iobs/Load1.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobs/Load1.D1 | 10267 | ? | 482 | 4096 | iobs/Load1 | NULL | NULL | iobs/Load1.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/Load1.D2 | 9901 | ? | 443 | 4096 | iobs/Load1 | NULL | NULL | iobs/Load1.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobs/Load1.D2 | 10268 | ? | 482 | 4096 | iobs/Load1 | NULL | NULL | iobs/Load1.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | iobs/Once
 SPPTERM | 1 | IV_FALSE | ALE1
-SPPTERM | 1 | IV_TRUE | nRAMUWE_OBUF.EXP
-SPPTERM | 1 | IV_TRUE | EXP34_.EXP
-SPPTERM | 2 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF
+SPPTERM | 1 | IV_TRUE | RA_5_OBUF.EXP
+SPPTERM | 1 | IV_TRUE | RA_2_OBUF.EXP
 SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
 SPPTERM | 2 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1
 
 SRFF_INSTANCE | iobs/Load1.REG | iobs/Load1 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/Load1.D | 9899 | ? | 443 | 0 | iobs/Load1 | NULL | NULL | iobs/Load1.XOR | 0 | 7 | ALU_F
+NODE | iobs/Load1.D | 10266 | ? | 482 | 0 | iobs/Load1 | NULL | NULL | iobs/Load1.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/Load1.Q | 9902 | ? | 455 | 0 | iobs/Load1 | NULL | NULL | iobs/Load1.REG | 0 | 8 | SRFF_Q
+NODE | iobs/Load1.Q | 10269 | ? | 503 | 0 | iobs/Load1 | NULL | NULL | iobs/Load1.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | ram/BACTr | MXSE_COPY_0_COPY_0 | 2155873536 | 3 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/BACTr | 9565 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | ram/BACTr.SI | ram/BACTr | 0 | 2 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/BACTr.D1 | 9904 | ? | 444 | 4096 | ram/BACTr | NULL | NULL | ram/BACTr.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | ram/BACTr.D1 | 10271 | ? | 483 | 4096 | ram/BACTr | NULL | NULL | ram/BACTr.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/BACTr.D2 | 9905 | ? | 444 | 4096 | ram/BACTr | NULL | NULL | ram/BACTr.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | ram/BACTr.D2 | 10272 | ? | 483 | 4096 | ram/BACTr | NULL | NULL | ram/BACTr.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
 
 SRFF_INSTANCE | ram/BACTr.REG | ram/BACTr | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/BACTr.D | 9903 | ? | 444 | 0 | ram/BACTr | NULL | NULL | ram/BACTr.XOR | 0 | 7 | ALU_F
+NODE | ram/BACTr.D | 10270 | ? | 483 | 0 | ram/BACTr | NULL | NULL | ram/BACTr.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/BACTr.Q | 9906 | ? | 453 | 0 | ram/BACTr | NULL | NULL | ram/BACTr.REG | 0 | 8 | SRFF_Q
+NODE | ram/BACTr.Q | 10273 | ? | 499 | 0 | ram/BACTr | NULL | NULL | ram/BACTr.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | IOACT | MXSE_COPY_0_COPY_0 | 2155873536 | 13 | 1
+MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | IOACT | MXSE_COPY_0_COPY_0 | 2155873536 | 12 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9546 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9548 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9547 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOREQr | 9906 | ? | 528 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOREQr | 9573 | ? | 477 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
+NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9566 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ETACK | 9578 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
+NODE | iobm/ETACK | 9916 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9587 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
+NODE | iobm/BERRrf | 9927 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9588 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
+NODE | iobm/BERRrr | 9928 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrf | 9576 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
+NODE | nADoutLE0_OBUF.EXP | 10600 | ? | 518 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.EXP | nADoutLE0_OBUF | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrr | 9577 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
+NODE | nDinLE_OBUF.EXP | 10601 | ? | 518 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinLE_OBUF.EXP | nDinLE_OBUF | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nADoutLE0_OBUF.EXP | 10197 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.EXP | nADoutLE0_OBUF | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | IOACT | 9568 | ? | 456 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOACT.Q | IOACT | 1 | 0 | MC_UIM
+NODE | IOACT | 9899 | ? | 504 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOACT.Q | IOACT | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | IOACT.SI | IOACT | 0 | 12 | 2
+SIGNAL_INSTANCE | IOACT.SI | IOACT | 0 | 11 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9546 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9548 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9547 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOREQr | 9906 | ? | 528 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOREQr | 9573 | ? | 477 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
+NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9566 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ETACK | 9578 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
+NODE | iobm/ETACK | 9916 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9587 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
+NODE | iobm/BERRrf | 9927 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9588 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
+NODE | iobm/BERRrr | 9928 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrf | 9576 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
+NODE | nADoutLE0_OBUF.EXP | 10600 | ? | 518 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.EXP | nADoutLE0_OBUF | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrr | 9577 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nADoutLE0_OBUF.EXP | 10197 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.EXP | nADoutLE0_OBUF | 4 | 0 | MC_EXPORT
+NODE | nDinLE_OBUF.EXP | 10601 | ? | 518 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinLE_OBUF.EXP | nDinLE_OBUF | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | IOACT.D1 | 9908 | ? | 467 | 4096 | IOACT | NULL | NULL | IOACT.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | IOACT.D1 | 10275 | ? | 518 | 4096 | IOACT | NULL | NULL | IOACT.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | IOACT.D2 | 9909 | ? | 467 | 4096 | IOACT | NULL | NULL | IOACT.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | IOACT.D2 | 10276 | ? | 518 | 4096 | IOACT | NULL | NULL | IOACT.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | nADoutLE0_OBUF.EXP
-SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1
-SPPTERM | 4 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOREQr
-SPPTERM | 5 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/ETACK
-SPPTERM | 6 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr
-SPPTERM | 6 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr
+SPPTERM | 1 | IV_TRUE | nDinLE_OBUF.EXP
+SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2
+SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOREQr
+SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/BG
+SPPTERM | 4 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/ETACK
+SPPTERM | 5 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr
 
 SRFF_INSTANCE | IOACT.REG | IOACT | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | IOACT.D | 9907 | ? | 467 | 0 | IOACT | NULL | NULL | IOACT.XOR | 0 | 7 | ALU_F
+NODE | IOACT.D | 10274 | ? | 518 | 0 | IOACT | NULL | NULL | IOACT.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | IOACT.Q | 9910 | ? | 456 | 0 | IOACT | NULL | NULL | IOACT.REG | 0 | 8 | SRFF_Q
+NODE | IOACT.Q | 10277 | ? | 504 | 0 | IOACT | NULL | NULL | IOACT.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB | CLK2X_IOB
 
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | IOBERR | MXSE_COPY_0_COPY_0 | 2155877376 | 17 | 1
+MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | IOBERR | MXSE_COPY_0_COPY_0 | 2155877376 | 13 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9546 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9547 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9548 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | IOBERR | 9900 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOBERR | 9569 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
+NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_IOB_IBUF | 9504 | ? | 479 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nBERR_IOB_IBUF | 9872 | ? | 530 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9566 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/ETACK | 9916 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ETACK | 9578 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
+NODE | iobm/BERRrf | 9927 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9587 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
+NODE | iobm/BERRrr | 9928 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9588 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrf | 9914 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrf | 9576 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrr | 9915 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrr | 9577 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
+NODE | iobm/ETACK.EXP | 10599 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.EXP | iobm/ETACK | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrf | 9589 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrr | 9590 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ETACK.EXP | 10196 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.EXP | iobm/ETACK | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDinLE_OBUF.EXP | 10198 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinLE_OBUF.EXP | nDinLE_OBUF | 4 | 0 | MC_EXPORT
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | IOBERR | 9569 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
+NODE | IOBERR | 9900 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | IOBERR.SI | IOBERR | 0 | 16 | 2
+SIGNAL_INSTANCE | IOBERR.SI | IOBERR | 0 | 12 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9546 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9547 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9548 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | IOBERR | 9900 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOBERR | 9569 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
+NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_IOB_IBUF | 9504 | ? | 479 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nBERR_IOB_IBUF | 9872 | ? | 530 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9566 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/ETACK | 9916 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ETACK | 9578 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
+NODE | iobm/BERRrf | 9927 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9587 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
+NODE | iobm/BERRrr | 9928 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9588 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrf | 9914 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrf | 9576 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrr | 9915 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrr | 9577 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrf | 9589 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrr | 9590 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ETACK.EXP | 10196 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.EXP | iobm/ETACK | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDinLE_OBUF.EXP | 10198 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinLE_OBUF.EXP | nDinLE_OBUF | 4 | 0 | MC_EXPORT
+NODE | iobm/ETACK.EXP | 10599 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.EXP | iobm/ETACK | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | IOBERR.D1 | 9912 | ? | 468 | 4096 | IOBERR | NULL | NULL | IOBERR.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | IOBERR.D1 | 10279 | ? | 519 | 4096 | IOBERR | NULL | NULL | IOBERR.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | IOBERR.D2 | 9913 | ? | 468 | 4096 | IOBERR | NULL | NULL | IOBERR.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | IOBERR.D2 | 10280 | ? | 519 | 4096 | IOBERR | NULL | NULL | IOBERR.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | iobm/ETACK.EXP
-SPPTERM | 1 | IV_TRUE | nDinLE_OBUF.EXP
-SPPTERM | 5 | IV_TRUE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_TRUE | IOBERR
-SPPTERM | 6 | IV_FALSE | nBERR_IOB_IBUF | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | CLK_IOB_IBUF | IV_FALSE | IOBERR | IV_TRUE | iobm/ETACK
-SPPTERM | 7 | IV_FALSE | nBERR_IOB_IBUF | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | CLK_IOB_IBUF | IV_FALSE | IOBERR | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr
-SPPTERM | 7 | IV_FALSE | nBERR_IOB_IBUF | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | CLK_IOB_IBUF | IV_FALSE | IOBERR | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr
-SPPTERM | 7 | IV_FALSE | nBERR_IOB_IBUF | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | CLK_IOB_IBUF | IV_FALSE | IOBERR | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr
+SPPTERM | 4 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_TRUE | IOBERR
+SPPTERM | 7 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | IOBERR | IV_TRUE | iobm/ETACK
+SPPTERM | 7 | IV_TRUE | CLK_IOB_IBUF | IV_FALSE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_FALSE | IOBERR | IV_TRUE | iobm/ETACK
+SPPTERM | 8 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | IOBERR | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr
+SPPTERM | 8 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | IOBERR | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr
 
 SRFF_INSTANCE | IOBERR.REG | IOBERR | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | IOBERR.D | 9911 | ? | 468 | 0 | IOBERR | NULL | NULL | IOBERR.XOR | 0 | 7 | ALU_F
+NODE | IOBERR.D | 10278 | ? | 519 | 0 | IOBERR | NULL | NULL | IOBERR.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | IOBERR.Q | 9914 | ? | 468 | 0 | IOBERR | NULL | NULL | IOBERR.REG | 0 | 8 | SRFF_Q
+NODE | IOBERR.Q | 10281 | ? | 519 | 0 | IOBERR | NULL | NULL | IOBERR.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB | CLK2X_IOB
 
-MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<7> | MXSE_COPY_0_COPY_0 | 2155877376 | 8 | 1
+MACROCELL_INSTANCE | PrldLow+OptxMapped | RESr0 | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9556 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
+NODE | nRES_IBUF | 9848 | ? | 533 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9560 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9561 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9562 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9563 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+NODE | RESr0 | 9901 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr0.Q | RESr0 | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | cnt/RefCnt<7>.SI | cnt/RefCnt<7> | 0 | 7 | 2
+SIGNAL_INSTANCE | RESr0.SI | RESr0 | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9556 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9560 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9561 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9562 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9563 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
+NODE | nRES_IBUF | 9848 | ? | 533 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | cnt/RefCnt<7>.D1 | 9916 | ? | 445 | 0 | cnt/RefCnt<7> | NULL | NULL | cnt/RefCnt<7>.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | RESr0.D1 | 10283 | ? | 484 | 4096 | RESr0 | NULL | NULL | RESr0.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | cnt/RefCnt<7>.D2 | 9917 | ? | 445 | 4096 | cnt/RefCnt<7> | NULL | NULL | cnt/RefCnt<7>.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | RESr0.D2 | 10284 | ? | 484 | 4096 | RESr0 | NULL | NULL | RESr0.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_FALSE | nRES_IBUF
+
+SRFF_INSTANCE | RESr0.REG | RESr0 | 0 | 2 | 1
+INPUT_NODE_TYPE | 0 | 8 | SRFF_D
+NODE | RESr0.D | 10282 | ? | 484 | 0 | RESr0 | NULL | NULL | RESr0.XOR | 0 | 7 | ALU_F
+INPUT_NODE_TYPE | 1 | 8 | SRFF_C
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
+NODE | RESr0.Q | 10285 | ? | 502 | 0 | RESr0 | NULL | NULL | RESr0.REG | 0 | 8 | SRFF_Q
+TNAME | CLK_FSB
+
+MACROCELL_INSTANCE | PrldLow+OptxMapped | RESr1 | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | RESr0 | 9901 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr0.Q | RESr0 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
+NODE | RESr1 | 9902 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr1.Q | RESr1 | 1 | 0 | MC_UIM
+
+SIGNAL_INSTANCE | RESr1.SI | RESr1 | 0 | 1 | 2
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | RESr0 | 9901 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr0.Q | RESr0 | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | RESr1.D1 | 10287 | ? | 485 | 4096 | RESr1 | NULL | NULL | RESr1.SI | 1 | 9 | MC_SI_D1
+SPPTERM | 0 | IV_ZERO
+OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | RESr1.D2 | 10288 | ? | 485 | 4096 | RESr1 | NULL | NULL | RESr1.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | RESr0
+
+SRFF_INSTANCE | RESr1.REG | RESr1 | 0 | 2 | 1
+INPUT_NODE_TYPE | 0 | 8 | SRFF_D
+NODE | RESr1.D | 10286 | ? | 485 | 0 | RESr1 | NULL | NULL | RESr1.XOR | 0 | 7 | ALU_F
+INPUT_NODE_TYPE | 1 | 8 | SRFF_C
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
+NODE | RESr1.Q | 10289 | ? | 502 | 0 | RESr1 | NULL | NULL | RESr1.REG | 0 | 8 | SRFF_Q
+TNAME | CLK_FSB
+
+MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/RefCnt<7> | MXSE_COPY_0_COPY_0 | 2155877376 | 14 | 2
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | cnt/RefCnt<7>.EXP | 10584 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.EXP | cnt/RefCnt<7> | 4 | 0 | MC_EXPORT
+
+SIGNAL_INSTANCE | cnt/RefCnt<7>.SI | cnt/RefCnt<7> | 0 | 13 | 3
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<0> | 9889 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<1> | 9893 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<2> | 9894 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<3> | 9895 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<4> | 9896 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | cnt/RefCnt<7>.D1 | 10291 | ? | 486 | 0 | cnt/RefCnt<7> | NULL | NULL | cnt/RefCnt<7>.SI | 1 | 9 | MC_SI_D1
+SPPTERM | 0 | IV_ZERO
+OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | cnt/RefCnt<7>.D2 | 10292 | ? | 486 | 4096 | cnt/RefCnt<7> | NULL | NULL | cnt/RefCnt<7>.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 7 | IV_TRUE | cnt/RefCnt<0> | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<1> | IV_TRUE | cnt/RefCnt<2> | IV_TRUE | cnt/RefCnt<3> | IV_TRUE | cnt/RefCnt<4>
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | cnt/RefCnt<7>.EXP | 10571 | ? | 0 | 0 | cnt/RefCnt<7> | NULL | NULL | cnt/RefCnt<7>.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | SW_1_IBUF
+SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_TRUE | SW_1_IBUF
+SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | cs/nOverlay1
 
 SRFF_INSTANCE | cnt/RefCnt<7>.REG | cnt/RefCnt<7> | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | cnt/RefCnt<7>.D | 9915 | ? | 445 | 0 | cnt/RefCnt<7> | NULL | NULL | cnt/RefCnt<7>.XOR | 0 | 7 | ALU_F
+NODE | cnt/RefCnt<7>.D | 10290 | ? | 486 | 0 | cnt/RefCnt<7> | NULL | NULL | cnt/RefCnt<7>.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | cnt/RefCnt<7>.Q | 9918 | ? | 453 | 0 | cnt/RefCnt<7> | NULL | NULL | cnt/RefCnt<7>.REG | 0 | 8 | SRFF_Q
+NODE | cnt/RefCnt<7>.Q | 10293 | ? | 499 | 0 | cnt/RefCnt<7> | NULL | NULL | cnt/RefCnt<7>.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 INPUT_INSTANCE | 0 | 0 | NULL | E_IOB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | E_IOB | 9691 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | E_IOB | 10039 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | E_IOB_IBUF | 9571 | ? | 396 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | E_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | E_IOB_IBUF | 9904 | ? | 435 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | E_IOB_IBUF | 0 | 5 | II_IMUX
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/Er | MXSE_COPY_0_COPY_0 | 2424308736 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | E_IOB_IBUF | 9571 | ? | 396 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | E_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | E_IOB_IBUF | 9904 | ? | 435 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | E_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF/FCLK- | 9567 | ? | 474 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 7 | 5 | II_FCLKINV
+NODE | CLK_IOB_IBUF/FCLK- | 9869 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/Er | 9572 | ? | 474 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
+NODE | iobm/Er | 9905 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/Er.SI | iobm/Er | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | E_IOB_IBUF | 9571 | ? | 396 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | E_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | E_IOB_IBUF | 9904 | ? | 435 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | E_IOB_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/Er.D1 | 9920 | ? | 396 | 4096 | iobm/Er | NULL | NULL | iobm/Er.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/Er.D1 | 10295 | ? | 435 | 4096 | iobm/Er | NULL | NULL | iobm/Er.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/Er.D2 | 9921 | ? | 396 | 4096 | iobm/Er | NULL | NULL | iobm/Er.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/Er.D2 | 10296 | ? | 435 | 4096 | iobm/Er | NULL | NULL | iobm/Er.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | E_IOB_IBUF
 
 SRFF_INSTANCE | iobm/Er.REG | iobm/Er | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/Er.D | 9919 | ? | 396 | 0 | iobm/Er | NULL | NULL | iobm/Er.XOR | 0 | 7 | ALU_F
+NODE | iobm/Er.D | 10294 | ? | 435 | 0 | iobm/Er | NULL | NULL | iobm/Er.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_IOB_IBUF/FCLK- | 9567 | ? | 474 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 7 | 5 | II_FCLKINV
+NODE | CLK_IOB_IBUF/FCLK- | 9869 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/Er.Q | 9922 | ? | 474 | 0 | iobm/Er | NULL | NULL | iobm/Er.REG | 0 | 8 | SRFF_Q
+NODE | iobm/Er.Q | 10297 | ? | 525 | 0 | iobm/Er | NULL | NULL | iobm/Er.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_IOB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/IOREQr | MXSE_COPY_0_COPY_0 | 2424308736 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOREQ | 9585 | ? | 469 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOREQ.Q | IOREQ | 1 | 0 | MC_UIM
+NODE | IOREQ | 9924 | ? | 520 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOREQ.Q | IOREQ | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK- | 9506 | ? | 477 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
+NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/IOREQr | 9573 | ? | 477 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
+NODE | iobm/IOREQr | 9906 | ? | 528 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/IOREQr.SI | iobm/IOREQr | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOREQ | 9585 | ? | 469 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOREQ.Q | IOREQ | 1 | 0 | MC_UIM
+NODE | IOREQ | 9924 | ? | 520 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOREQ.Q | IOREQ | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/IOREQr.D1 | 9924 | ? | 469 | 4096 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/IOREQr.D1 | 10299 | ? | 520 | 4096 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/IOREQr.D2 | 9925 | ? | 469 | 4096 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/IOREQr.D2 | 10300 | ? | 520 | 4096 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | IOREQ
 
 SRFF_INSTANCE | iobm/IOREQr.REG | iobm/IOREQr | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/IOREQr.D | 9923 | ? | 469 | 0 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.XOR | 0 | 7 | ALU_F
+NODE | iobm/IOREQr.D | 10298 | ? | 520 | 0 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK- | 9506 | ? | 477 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
+NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/IOREQr.Q | 9926 | ? | 477 | 0 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.REG | 0 | 8 | SRFF_Q
+NODE | iobm/IOREQr.Q | 10301 | ? | 528 | 0 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
+INPUT_INSTANCE | 0 | 0 | NULL | nIPL2_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
+INPUT_NODE_TYPE | 0 | 5 | II_IN
+NODE | nIPL2 | 10040 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
+NODE | nIPL2_IBUF | 9907 | ? | 487 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nIPL2_IBUF | 0 | 5 | II_IMUX
+
+MACROCELL_INSTANCE | PrldLow+OptxMapped | IPL2r0 | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nIPL2_IBUF | 9907 | ? | 487 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nIPL2_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
+NODE | IPL2r0 | 9908 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | IPL2r0.Q | IPL2r0 | 1 | 0 | MC_UIM
+
+SIGNAL_INSTANCE | IPL2r0.SI | IPL2r0 | 0 | 1 | 2
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nIPL2_IBUF | 9907 | ? | 487 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nIPL2_IBUF | 0 | 5 | II_IMUX
+OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | IPL2r0.D1 | 10303 | ? | 487 | 4096 | IPL2r0 | NULL | NULL | IPL2r0.SI | 1 | 9 | MC_SI_D1
+SPPTERM | 0 | IV_ZERO
+OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | IPL2r0.D2 | 10304 | ? | 487 | 4096 | IPL2r0 | NULL | NULL | IPL2r0.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_FALSE | nIPL2_IBUF
+
+SRFF_INSTANCE | IPL2r0.REG | IPL2r0 | 0 | 2 | 1
+INPUT_NODE_TYPE | 0 | 8 | SRFF_D
+NODE | IPL2r0.D | 10302 | ? | 487 | 0 | IPL2r0 | NULL | NULL | IPL2r0.XOR | 0 | 7 | ALU_F
+INPUT_NODE_TYPE | 1 | 8 | SRFF_C
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
+NODE | IPL2r0.Q | 10305 | ? | 502 | 0 | IPL2r0 | NULL | NULL | IPL2r0.REG | 0 | 8 | SRFF_Q
+TNAME | CLK_FSB
+
+MACROCELL_INSTANCE | PrldLow+OptxMapped | RESr2 | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | RESr1 | 9902 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr1.Q | RESr1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
+NODE | RESr2 | 9909 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr2.Q | RESr2 | 1 | 0 | MC_UIM
+
+SIGNAL_INSTANCE | RESr2.SI | RESr2 | 0 | 1 | 2
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | RESr1 | 9902 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr1.Q | RESr1 | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | RESr2.D1 | 10307 | ? | 488 | 4096 | RESr2 | NULL | NULL | RESr2.SI | 1 | 9 | MC_SI_D1
+SPPTERM | 0 | IV_ZERO
+OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | RESr2.D2 | 10308 | ? | 488 | 4096 | RESr2 | NULL | NULL | RESr2.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | RESr1
+
+SRFF_INSTANCE | RESr2.REG | RESr2 | 0 | 2 | 1
+INPUT_NODE_TYPE | 0 | 8 | SRFF_D
+NODE | RESr2.D | 10306 | ? | 488 | 0 | RESr2 | NULL | NULL | RESr2.XOR | 0 | 7 | ALU_F
+INPUT_NODE_TYPE | 1 | 8 | SRFF_C
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
+NODE | RESr2.Q | 10309 | ? | 502 | 0 | RESr2 | NULL | NULL | RESr2.REG | 0 | 8 | SRFF_Q
+TNAME | CLK_FSB
+
 MACROCELL_INSTANCE | PrldLow+OptxMapped | RefAck | MXSE_COPY_0_COPY_0 | 2155873280 | 3 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | RefAck | 9574 | ? | 402 | 0 | MXSE_COPY_0_COPY_0 | NULL | RefAck.Q | RefAck | 1 | 0 | MC_UIM
+NODE | RefAck | 9910 | ? | 439 | 0 | MXSE_COPY_0_COPY_0 | NULL | RefAck.Q | RefAck | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | RefAck.SI | RefAck | 0 | 2 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RefAck.D1 | 9928 | ? | 446 | 4096 | RefAck | NULL | NULL | RefAck.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | RefAck.D1 | 10311 | ? | 489 | 4096 | RefAck | NULL | NULL | RefAck.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RefAck.D2 | 9929 | ? | 446 | 4096 | RefAck | NULL | NULL | RefAck.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | RefAck.D2 | 10312 | ? | 489 | 4096 | RefAck | NULL | NULL | RefAck.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1
 
 SRFF_INSTANCE | RefAck.REG | RefAck | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RefAck.D | 9927 | ? | 446 | 0 | RefAck | NULL | NULL | RefAck.XOR | 0 | 7 | ALU_F
+NODE | RefAck.D | 10310 | ? | 489 | 0 | RefAck | NULL | NULL | RefAck.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RefAck.Q | 9930 | ? | 402 | 0 | RefAck | NULL | NULL | RefAck.REG | 0 | 8 | SRFF_Q
+NODE | RefAck.Q | 10313 | ? | 439 | 0 | RefAck | NULL | NULL | RefAck.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
+INPUT_INSTANCE | 0 | 0 | NULL | nBG_IOB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
+INPUT_NODE_TYPE | 0 | 5 | II_IN
+NODE | nBG_IOB | 10041 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
+NODE | nBG_IOB_IBUF | 9911 | ? | 521 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBG_IOB_IBUF | 0 | 5 | II_IMUX
+
+MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/BGr0 | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nBG_IOB_IBUF | 9911 | ? | 521 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBG_IOB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
+NODE | iobm/BGr0 | 9912 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BGr0.Q | iobm/BGr0 | 1 | 0 | MC_UIM
+
+SIGNAL_INSTANCE | iobm/BGr0.SI | iobm/BGr0 | 0 | 1 | 2
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nBG_IOB_IBUF | 9911 | ? | 521 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBG_IOB_IBUF | 0 | 5 | II_IMUX
+OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/BGr0.D1 | 10315 | ? | 521 | 4096 | iobm/BGr0 | NULL | NULL | iobm/BGr0.SI | 1 | 9 | MC_SI_D1
+SPPTERM | 0 | IV_ZERO
+OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/BGr0.D2 | 10316 | ? | 521 | 4096 | iobm/BGr0 | NULL | NULL | iobm/BGr0.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_FALSE | nBG_IOB_IBUF
+
+SRFF_INSTANCE | iobm/BGr0.REG | iobm/BGr0 | 0 | 2 | 1
+INPUT_NODE_TYPE | 0 | 8 | SRFF_D
+NODE | iobm/BGr0.D | 10314 | ? | 521 | 0 | iobm/BGr0 | NULL | NULL | iobm/BGr0.XOR | 0 | 7 | ALU_F
+INPUT_NODE_TYPE | 1 | 8 | SRFF_C
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
+NODE | iobm/BGr0.Q | 10317 | ? | 536 | 0 | iobm/BGr0 | NULL | NULL | iobm/BGr0.REG | 0 | 8 | SRFF_Q
+TNAME | CLK2X_IOB
+
 INPUT_INSTANCE | 0 | 0 | NULL | nDTACK_IOB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | nDTACK_IOB | 9692 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | nDTACK_IOB | 10042 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | nDTACK_IOB_IBUF | 9575 | ? | 472 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nDTACK_IOB_IBUF | 9913 | ? | 523 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/DTACKrf | MXSE_COPY_0_COPY_0 | 2424308736 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_IOB_IBUF | 9575 | ? | 472 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nDTACK_IOB_IBUF | 9913 | ? | 523 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK- | 9506 | ? | 477 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
+NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/DTACKrf | 9576 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrf | 9914 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/DTACKrf.SI | iobm/DTACKrf | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_IOB_IBUF | 9575 | ? | 472 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nDTACK_IOB_IBUF | 9913 | ? | 523 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/DTACKrf.D1 | 9932 | ? | 471 | 4096 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/DTACKrf.D1 | 10319 | ? | 522 | 4096 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/DTACKrf.D2 | 9933 | ? | 471 | 4096 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/DTACKrf.D2 | 10320 | ? | 522 | 4096 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_FALSE | nDTACK_IOB_IBUF
 
 SRFF_INSTANCE | iobm/DTACKrf.REG | iobm/DTACKrf | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/DTACKrf.D | 9931 | ? | 471 | 0 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.XOR | 0 | 7 | ALU_F
+NODE | iobm/DTACKrf.D | 10318 | ? | 522 | 0 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK- | 9506 | ? | 477 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
+NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/DTACKrf.Q | 9934 | ? | 468 | 0 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.REG | 0 | 8 | SRFF_Q
+NODE | iobm/DTACKrf.Q | 10321 | ? | 519 | 0 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/DTACKrr | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_IOB_IBUF | 9575 | ? | 472 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nDTACK_IOB_IBUF | 9913 | ? | 523 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/DTACKrr | 9577 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrr | 9915 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/DTACKrr.SI | iobm/DTACKrr | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_IOB_IBUF | 9575 | ? | 472 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nDTACK_IOB_IBUF | 9913 | ? | 523 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/DTACKrr.D1 | 9936 | ? | 472 | 4096 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/DTACKrr.D1 | 10323 | ? | 523 | 4096 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/DTACKrr.D2 | 9937 | ? | 472 | 4096 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/DTACKrr.D2 | 10324 | ? | 523 | 4096 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_FALSE | nDTACK_IOB_IBUF
 
 SRFF_INSTANCE | iobm/DTACKrr.REG | iobm/DTACKrr | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/DTACKrr.D | 9935 | ? | 472 | 0 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.XOR | 0 | 7 | ALU_F
+NODE | iobm/DTACKrr.D | 10322 | ? | 523 | 0 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/DTACKrr.Q | 9938 | ? | 468 | 0 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.REG | 0 | 8 | SRFF_Q
+NODE | iobm/DTACKrr.Q | 10325 | ? | 519 | 0 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
-MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/ETACK | MXSE_COPY_0_COPY_0 | 2155873280 | 16 | 2
+MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/ETACK | MXSE_COPY_0_COPY_0 | 2155873280 | 19 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nVMA_IOB_OBUF | 9508 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOB_OBUF.Q | nVMA_IOB_OBUF | 1 | 0 | MC_UIM
+NODE | nVMA_IOBout | 9830 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOBout.Q | nVMA_IOBout | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9550 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9551 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9552 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
+NODE | iobm/ES<2> | 9885 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9554 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
+NODE | iobm/ES<3> | 9887 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9555 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
+NODE | iobm/ES<4> | 9888 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_IOB_IBUF | 9504 | ? | 479 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
+NODE | nBERR_IOB_IBUF | 9872 | ? | 530 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9546 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9547 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9548 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9566 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | IOBERR | 9900 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOBERR | 9569 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
+NODE | iobm/RESrf | 9930 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrf | 9589 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
+NODE | iobm/RESrr | 9931 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrr | 9590 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrf | 9914 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/DTACKrr | 9915 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/BERRrf | 9927 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/BERRrr | 9928 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/ETACK | 9578 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
+NODE | iobm/ETACK | 9916 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | iobm/ETACK.EXP | 10196 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.EXP | iobm/ETACK | 4 | 0 | MC_EXPORT
+NODE | iobm/ETACK.EXP | 10599 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.EXP | iobm/ETACK | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | iobm/ETACK.SI | iobm/ETACK | 0 | 15 | 3
+SIGNAL_INSTANCE | iobm/ETACK.SI | iobm/ETACK | 0 | 18 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nVMA_IOB_OBUF | 9508 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOB_OBUF.Q | nVMA_IOB_OBUF | 1 | 0 | MC_UIM
+NODE | nVMA_IOBout | 9830 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOBout.Q | nVMA_IOBout | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<0> | 9550 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
+NODE | iobm/ES<0> | 9883 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<1> | 9551 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
+NODE | iobm/ES<1> | 9884 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<2> | 9552 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
+NODE | iobm/ES<2> | 9885 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<3> | 9554 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
+NODE | iobm/ES<3> | 9887 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ES<4> | 9555 | ? | 473 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
+NODE | iobm/ES<4> | 9888 | ? | 524 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_IOB_IBUF | 9504 | ? | 479 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
+NODE | nBERR_IOB_IBUF | 9872 | ? | 530 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9546 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9547 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9548 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9566 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | IOBERR | 9900 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOBERR | 9569 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
+NODE | iobm/RESrf | 9930 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrf | 9589 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
+NODE | iobm/RESrr | 9931 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrr | 9590 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrf | 9914 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/DTACKrr | 9915 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/BERRrf | 9927 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/BERRrr | 9928 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/ETACK.D1 | 9940 | ? | 473 | 4096 | iobm/ETACK | NULL | NULL | iobm/ETACK.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/ETACK.D1 | 10327 | ? | 524 | 4096 | iobm/ETACK | NULL | NULL | iobm/ETACK.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/ETACK.D2 | 9941 | ? | 473 | 4096 | iobm/ETACK | NULL | NULL | iobm/ETACK.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 6 | IV_FALSE | nVMA_IOB_OBUF | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_TRUE | iobm/ES<4>
+SIGNAL | NODE | iobm/ETACK.D2 | 10328 | ? | 524 | 4096 | iobm/ETACK | NULL | NULL | iobm/ETACK.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 6 | IV_FALSE | nVMA_IOBout | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_TRUE | iobm/ES<4>
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | iobm/ETACK.EXP | 10193 | ? | 468 | 0 | iobm/ETACK | NULL | NULL | iobm/ETACK.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 9 | IV_TRUE | nBERR_IOB_IBUF | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | IOBERR | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr
+SIGNAL | NODE | iobm/ETACK.EXP | 10596 | ? | 519 | 0 | iobm/ETACK | NULL | NULL | iobm/ETACK.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 8 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | IOBERR | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr
+SPPTERM | 8 | IV_TRUE | CLK_IOB_IBUF | IV_FALSE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_FALSE | IOBERR | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr
+SPPTERM | 8 | IV_TRUE | CLK_IOB_IBUF | IV_FALSE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_FALSE | IOBERR | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr
+SPPTERM | 8 | IV_TRUE | CLK_IOB_IBUF | IV_FALSE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_FALSE | IOBERR | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr
 
 SRFF_INSTANCE | iobm/ETACK.REG | iobm/ETACK | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/ETACK.D | 9939 | ? | 473 | 0 | iobm/ETACK | NULL | NULL | iobm/ETACK.XOR | 0 | 7 | ALU_F
+NODE | iobm/ETACK.D | 10326 | ? | 524 | 0 | iobm/ETACK | NULL | NULL | iobm/ETACK.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/ETACK.Q | 9942 | ? | 468 | 0 | iobm/ETACK | NULL | NULL | iobm/ETACK.REG | 0 | 8 | SRFF_Q
+NODE | iobm/ETACK.Q | 10329 | ? | 519 | 0 | iobm/ETACK | NULL | NULL | iobm/ETACK.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/Er2 | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9572 | ? | 474 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
+NODE | iobm/Er | 9905 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/Er2 | 9579 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
+NODE | iobm/Er2 | 9917 | ? | 517 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/Er2.SI | iobm/Er2 | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/Er | 9572 | ? | 474 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
+NODE | iobm/Er | 9905 | ? | 525 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/Er2.D1 | 9944 | ? | 474 | 4096 | iobm/Er2 | NULL | NULL | iobm/Er2.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/Er2.D1 | 10331 | ? | 525 | 4096 | iobm/Er2 | NULL | NULL | iobm/Er2.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/Er2.D2 | 9945 | ? | 474 | 4096 | iobm/Er2 | NULL | NULL | iobm/Er2.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/Er2.D2 | 10332 | ? | 525 | 4096 | iobm/Er2 | NULL | NULL | iobm/Er2.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | iobm/Er
 
 SRFF_INSTANCE | iobm/Er2.REG | iobm/Er2 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/Er2.D | 9943 | ? | 474 | 0 | iobm/Er2 | NULL | NULL | iobm/Er2.XOR | 0 | 7 | ALU_F
+NODE | iobm/Er2.D | 10330 | ? | 525 | 0 | iobm/Er2 | NULL | NULL | iobm/Er2.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/Er2.Q | 9946 | ? | 466 | 0 | iobm/Er2 | NULL | NULL | iobm/Er2.REG | 0 | 8 | SRFF_Q
+NODE | iobm/Er2.Q | 10333 | ? | 517 | 0 | iobm/Er2 | NULL | NULL | iobm/Er2.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 INPUT_INSTANCE | 0 | 0 | NULL | nVPA_IOB_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | nVPA_IOB | 9693 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | nVPA_IOB | 10043 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | nVPA_IOB_IBUF | 9580 | ? | 476 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nVPA_IOB_IBUF | 9918 | ? | 527 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/VPArf | MXSE_COPY_0_COPY_0 | 2424308736 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nVPA_IOB_IBUF | 9580 | ? | 476 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nVPA_IOB_IBUF | 9918 | ? | 527 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK- | 9506 | ? | 477 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
+NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/VPArf | 9581 | ? | 456 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/VPArf.Q | iobm/VPArf | 1 | 0 | MC_UIM
+NODE | iobm/VPArf | 9919 | ? | 504 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/VPArf.Q | iobm/VPArf | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/VPArf.SI | iobm/VPArf | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nVPA_IOB_IBUF | 9580 | ? | 476 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nVPA_IOB_IBUF | 9918 | ? | 527 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/VPArf.D1 | 9948 | ? | 475 | 4096 | iobm/VPArf | NULL | NULL | iobm/VPArf.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/VPArf.D1 | 10335 | ? | 526 | 4096 | iobm/VPArf | NULL | NULL | iobm/VPArf.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/VPArf.D2 | 9949 | ? | 475 | 4096 | iobm/VPArf | NULL | NULL | iobm/VPArf.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/VPArf.D2 | 10336 | ? | 526 | 4096 | iobm/VPArf | NULL | NULL | iobm/VPArf.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_FALSE | nVPA_IOB_IBUF
 
 SRFF_INSTANCE | iobm/VPArf.REG | iobm/VPArf | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/VPArf.D | 9947 | ? | 475 | 0 | iobm/VPArf | NULL | NULL | iobm/VPArf.XOR | 0 | 7 | ALU_F
+NODE | iobm/VPArf.D | 10334 | ? | 526 | 0 | iobm/VPArf | NULL | NULL | iobm/VPArf.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK- | 9506 | ? | 477 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
+NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/VPArf.Q | 9950 | ? | 456 | 0 | iobm/VPArf | NULL | NULL | iobm/VPArf.REG | 0 | 8 | SRFF_Q
+NODE | iobm/VPArf.Q | 10337 | ? | 504 | 0 | iobm/VPArf | NULL | NULL | iobm/VPArf.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/VPArr | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nVPA_IOB_IBUF | 9580 | ? | 476 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nVPA_IOB_IBUF | 9918 | ? | 527 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/VPArr | 9582 | ? | 456 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/VPArr.Q | iobm/VPArr | 1 | 0 | MC_UIM
+NODE | iobm/VPArr | 9920 | ? | 504 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/VPArr.Q | iobm/VPArr | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/VPArr.SI | iobm/VPArr | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nVPA_IOB_IBUF | 9580 | ? | 476 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nVPA_IOB_IBUF | 9918 | ? | 527 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/VPArr.D1 | 9952 | ? | 476 | 4096 | iobm/VPArr | NULL | NULL | iobm/VPArr.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/VPArr.D1 | 10339 | ? | 527 | 4096 | iobm/VPArr | NULL | NULL | iobm/VPArr.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/VPArr.D2 | 9953 | ? | 476 | 4096 | iobm/VPArr | NULL | NULL | iobm/VPArr.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/VPArr.D2 | 10340 | ? | 527 | 4096 | iobm/VPArr | NULL | NULL | iobm/VPArr.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_FALSE | nVPA_IOB_IBUF
 
 SRFF_INSTANCE | iobm/VPArr.REG | iobm/VPArr | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/VPArr.D | 9951 | ? | 476 | 0 | iobm/VPArr | NULL | NULL | iobm/VPArr.XOR | 0 | 7 | ALU_F
+NODE | iobm/VPArr.D | 10338 | ? | 527 | 0 | iobm/VPArr | NULL | NULL | iobm/VPArr.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/VPArr.Q | 9954 | ? | 456 | 0 | iobm/VPArr | NULL | NULL | iobm/VPArr.REG | 0 | 8 | SRFF_Q
+NODE | iobm/VPArr.Q | 10341 | ? | 504 | 0 | iobm/VPArr | NULL | NULL | iobm/VPArr.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | ALE0M | MXSE_COPY_0_COPY_0 | 2155873536 | 6 | 1
+MACROCELL_INSTANCE | PrldLow+OptxMapped | RESDone | MXSE_COPY_0_COPY_0 | 2155873280 | 9 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
+NODE | RESr0 | 9901 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr0.Q | RESr0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9546 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | RESr1 | 9902 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr1.Q | RESr1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9548 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | RESr2 | 9909 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr2.Q | RESr2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9547 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOREQr | 9573 | ? | 477 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | nUDS_FSB_IBUF | 9865 | ? | 464 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RAMDIS2 | 9867 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RAMDIS1 | 9933 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ALE0M | 9583 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ALE0M.Q | ALE0M | 1 | 0 | MC_UIM
+NODE | RESDone | 9921 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESDone.Q | RESDone | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | RESDone.EXP | 10640 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESDone.EXP | RESDone | 4 | 0 | MC_EXPORT
+
+SIGNAL_INSTANCE | RESDone.SI | RESDone | 0 | 8 | 4
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | RESr0 | 9901 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr0.Q | RESr0 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | RESr1 | 9902 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr1.Q | RESr1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | RESr2 | 9909 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr2.Q | RESr2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nUDS_FSB_IBUF | 9865 | ? | 464 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RAMDIS2 | 9867 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RAMDIS1 | 9933 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | RESDone.D1 | 10343 | ? | 490 | 4096 | RESDone | NULL | NULL | RESDone.SI | 1 | 9 | MC_SI_D1
+SPPTERM | 0 | IV_ZERO
+OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | RESDone.D2 | 10344 | ? | 490 | 6144 | RESDone | NULL | NULL | RESDone.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 0 | IV_DC
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | RESDone.EXP | 10627 | ? | 0 | 0 | RESDone | NULL | NULL | RESDone.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 5 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nUDS_FSB_IBUF | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RAMDIS1
+OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | RESDone.CE | 10345 | ? | 491 | 4096 | RESDone | NULL | NULL | RESDone.SI | 10 | 9 | MC_SI_CE
+SPPTERM | 3 | IV_FALSE | RESr0 | IV_FALSE | RESr1 | IV_TRUE | RESr2
+
+SRFF_INSTANCE | RESDone.REG | RESDone | 0 | 3 | 1
+INPUT_NODE_TYPE | 0 | 8 | SRFF_D
+NODE | RESDone.D | 10342 | ? | 490 | 0 | RESDone | NULL | NULL | RESDone.XOR | 0 | 7 | ALU_F
+INPUT_NODE_TYPE | 1 | 8 | SRFF_C
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
+SIGNAL | NODE | RESDone.CE | 10345 | ? | 491 | 4096 | RESDone | NULL | NULL | RESDone.SI | 10 | 9 | MC_SI_CE
+SPPTERM | 3 | IV_FALSE | RESr0 | IV_FALSE | RESr1 | IV_TRUE | RESr2
+OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
+NODE | RESDone.Q | 10346 | ? | 502 | 0 | RESDone | NULL | NULL | RESDone.REG | 0 | 8 | SRFF_Q
+TNAME | CLK_FSB
+
+MACROCELL_INSTANCE | PrldLow+OptxMapped | ALE0M | MXSE_COPY_0_COPY_0 | 2155873280 | 6 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/IOREQr | 9906 | ? | 528 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
+NODE | ALE0M | 9922 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ALE0M.Q | ALE0M | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | ALE0M.SI | ALE0M | 0 | 5 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9546 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9548 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9547 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOREQr | 9906 | ? | 528 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOREQr | 9573 | ? | 477 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM
+NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ALE0M.D1 | 9956 | ? | 477 | 4096 | ALE0M | NULL | NULL | ALE0M.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | ALE0M.D1 | 10348 | ? | 528 | 4096 | ALE0M | NULL | NULL | ALE0M.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ALE0M.D2 | 9957 | ? | 477 | 4096 | ALE0M | NULL | NULL | ALE0M.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1
-SPPTERM | 4 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOREQr
+SIGNAL | NODE | ALE0M.D2 | 10349 | ? | 528 | 4096 | ALE0M | NULL | NULL | ALE0M.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | iobm/IOS_FSM_FFd2
+SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1
+SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOREQr | IV_FALSE | iobm/BG
 
 SRFF_INSTANCE | ALE0M.REG | ALE0M | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ALE0M.D | 9955 | ? | 477 | 0 | ALE0M | NULL | NULL | ALE0M.XOR | 0 | 7 | ALU_F
+NODE | ALE0M.D | 10347 | ? | 528 | 0 | ALE0M | NULL | NULL | ALE0M.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ALE0M.Q | 9958 | ? | 0 | 0 | ALE0M | NULL | NULL | ALE0M.REG | 0 | 8 | SRFF_Q
+NODE | ALE0M.Q | 10350 | ? | 0 | 0 | ALE0M | NULL | NULL | ALE0M.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | ALE0S | MXSE_COPY_0_COPY_0 | 2155873280 | 3 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ALE0S | 9584 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ALE0S.Q | ALE0S | 1 | 0 | MC_UIM
+NODE | ALE0S | 9923 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ALE0S.Q | ALE0S | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | ALE0S.SI | ALE0S | 0 | 2 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ALE0S.D1 | 9960 | ? | 447 | 4096 | ALE0S | NULL | NULL | ALE0S.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | ALE0S.D1 | 10352 | ? | 492 | 4096 | ALE0S | NULL | NULL | ALE0S.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ALE0S.D2 | 9961 | ? | 447 | 4096 | ALE0S | NULL | NULL | ALE0S.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | ALE0S.D2 | 10353 | ? | 492 | 4096 | ALE0S | NULL | NULL | ALE0S.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
 
 SRFF_INSTANCE | ALE0S.REG | ALE0S | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ALE0S.D | 9959 | ? | 447 | 0 | ALE0S | NULL | NULL | ALE0S.XOR | 0 | 7 | ALU_F
+NODE | ALE0S.D | 10351 | ? | 492 | 0 | ALE0S | NULL | NULL | ALE0S.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ALE0S.Q | 9962 | ? | 0 | 0 | ALE0S | NULL | NULL | ALE0S.REG | 0 | 8 | SRFF_Q
+NODE | ALE0S.Q | 10354 | ? | 0 | 0 | ALE0S | NULL | NULL | ALE0S.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | IOREQ | MXSE_COPY_0_COPY_0 | 2155873536 | 12 | 1
+MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | IOREQ | MXSE_COPY_0_COPY_0 | 2155873536 | 13 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9559 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
+NODE | iobs/IOACTr | 9892 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_5_OBUF.EXP | 10189 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.EXP | RA_5_OBUF | 4 | 0 | MC_EXPORT
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_2_OBUF.EXP | 10190 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.EXP | RA_2_OBUF | 4 | 0 | MC_EXPORT
+NODE | nRAMUWE_OBUF.EXP | 10641 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.EXP | nRAMUWE_OBUF | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | EXP33_.EXP | 10642 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP33_.EXP | EXP33_ | 4 | 0 | MC_EXPORT
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | IOREQ | 9585 | ? | 469 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOREQ.Q | IOREQ | 1 | 0 | MC_UIM
+NODE | IOREQ | 9924 | ? | 520 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOREQ.Q | IOREQ | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | IOREQ.SI | IOREQ | 0 | 11 | 2
+SIGNAL_INSTANCE | IOREQ.SI | IOREQ | 0 | 12 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOACTr | 9559 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
+NODE | iobs/IOACTr | 9892 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_5_OBUF.EXP | 10189 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.EXP | RA_5_OBUF | 4 | 0 | MC_EXPORT
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_2_OBUF.EXP | 10190 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.EXP | RA_2_OBUF | 4 | 0 | MC_EXPORT
+NODE | nRAMUWE_OBUF.EXP | 10641 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.EXP | nRAMUWE_OBUF | 4 | 0 | MC_EXPORT
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP33_.EXP | 10642 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP33_.EXP | EXP33_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | IOREQ.D1 | 9964 | ? | 448 | 4096 | IOREQ | NULL | NULL | IOREQ.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | IOREQ.D1 | 10356 | ? | 493 | 4096 | IOREQ | NULL | NULL | IOREQ.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | IOREQ.D2 | 9965 | ? | 448 | 4096 | IOREQ | NULL | NULL | IOREQ.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | RA_5_OBUF.EXP
-SPPTERM | 1 | IV_TRUE | RA_2_OBUF.EXP
+SIGNAL | NODE | IOREQ.D2 | 10357 | ? | 493 | 4096 | IOREQ | NULL | NULL | IOREQ.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | nRAMUWE_OBUF.EXP
+SPPTERM | 1 | IV_TRUE | EXP33_.EXP
 SPPTERM | 2 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | iobs/PS_FSM_FFd1
 SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/IOACTr
 SPPTERM | 3 | IV_TRUE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
 SPPTERM | 4 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | fsb/ASrf | IV_TRUE | ALE1
+SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
 
 SRFF_INSTANCE | IOREQ.REG | IOREQ | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | IOREQ.D | 9963 | ? | 448 | 0 | IOREQ | NULL | NULL | IOREQ.XOR | 0 | 7 | ALU_F
+NODE | IOREQ.D | 10355 | ? | 493 | 0 | IOREQ | NULL | NULL | IOREQ.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | IOREQ.Q | 9966 | ? | 469 | 0 | IOREQ | NULL | NULL | IOREQ.REG | 0 | 8 | SRFF_Q
+NODE | IOREQ.Q | 10358 | ? | 520 | 0 | IOREQ | NULL | NULL | IOREQ.REG | 0 | 8 | SRFF_Q
+TNAME | CLK_FSB
+
+MACROCELL_INSTANCE | PrldLow+OptxMapped | IPL2r1 | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | IPL2r0 | 9908 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | IPL2r0.Q | IPL2r0 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
+NODE | IPL2r1 | 9925 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | IPL2r1.Q | IPL2r1 | 1 | 0 | MC_UIM
+
+SIGNAL_INSTANCE | IPL2r1.SI | IPL2r1 | 0 | 1 | 2
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | IPL2r0 | 9908 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | IPL2r0.Q | IPL2r0 | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | IPL2r1.D1 | 10360 | ? | 494 | 4096 | IPL2r1 | NULL | NULL | IPL2r1.SI | 1 | 9 | MC_SI_D1
+SPPTERM | 0 | IV_ZERO
+OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | IPL2r1.D2 | 10361 | ? | 494 | 4096 | IPL2r1 | NULL | NULL | IPL2r1.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | IPL2r0
+
+SRFF_INSTANCE | IPL2r1.REG | IPL2r1 | 0 | 2 | 1
+INPUT_NODE_TYPE | 0 | 8 | SRFF_D
+NODE | IPL2r1.D | 10359 | ? | 494 | 0 | IPL2r1 | NULL | NULL | IPL2r1.XOR | 0 | 7 | ALU_F
+INPUT_NODE_TYPE | 1 | 8 | SRFF_C
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
+NODE | IPL2r1.Q | 10362 | ? | 502 | 0 | IPL2r1 | NULL | NULL | IPL2r1.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | fsb/ASrf | MXSE_COPY_0_COPY_0 | 2424308736 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK- | 9510 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 7 | 5 | II_FCLKINV
+NODE | CLK_FSB_IBUF/FCLK- | 9840 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | fsb/ASrf.SI | fsb/ASrf | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | fsb/ASrf.D1 | 9968 | ? | 449 | 4096 | fsb/ASrf | NULL | NULL | fsb/ASrf.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | fsb/ASrf.D1 | 10364 | ? | 495 | 4096 | fsb/ASrf | NULL | NULL | fsb/ASrf.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | fsb/ASrf.D2 | 9969 | ? | 449 | 4096 | fsb/ASrf | NULL | NULL | fsb/ASrf.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | fsb/ASrf.D2 | 10365 | ? | 495 | 4096 | fsb/ASrf | NULL | NULL | fsb/ASrf.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_FALSE | nAS_FSB_IBUF
 
 SRFF_INSTANCE | fsb/ASrf.REG | fsb/ASrf | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | fsb/ASrf.D | 9967 | ? | 449 | 0 | fsb/ASrf | NULL | NULL | fsb/ASrf.XOR | 0 | 7 | ALU_F
+NODE | fsb/ASrf.D | 10363 | ? | 495 | 0 | fsb/ASrf | NULL | NULL | fsb/ASrf.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK- | 9510 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 7 | 5 | II_FCLKINV
+NODE | CLK_FSB_IBUF/FCLK- | 9840 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | fsb/ASrf.Q | 9970 | ? | 453 | 0 | fsb/ASrf | NULL | NULL | fsb/ASrf.REG | 0 | 8 | SRFF_Q
+NODE | fsb/ASrf.Q | 10366 | ? | 499 | 0 | fsb/ASrf | NULL | NULL | fsb/ASrf.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/BERRrf | MXSE_COPY_0_COPY_0 | 2424308736 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_IOB_IBUF | 9504 | ? | 479 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nBERR_IOB_IBUF | 9872 | ? | 530 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK- | 9506 | ? | 477 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
+NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/BERRrf | 9587 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
+NODE | iobm/BERRrf | 9927 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/BERRrf.SI | iobm/BERRrf | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_IOB_IBUF | 9504 | ? | 479 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nBERR_IOB_IBUF | 9872 | ? | 530 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/BERRrf.D1 | 9972 | ? | 478 | 4096 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/BERRrf.D1 | 10368 | ? | 529 | 4096 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/BERRrf.D2 | 9973 | ? | 478 | 4096 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/BERRrf.D2 | 10369 | ? | 529 | 4096 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_FALSE | nBERR_IOB_IBUF
 
 SRFF_INSTANCE | iobm/BERRrf.REG | iobm/BERRrf | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/BERRrf.D | 9971 | ? | 478 | 0 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.XOR | 0 | 7 | ALU_F
+NODE | iobm/BERRrf.D | 10367 | ? | 529 | 0 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK- | 9506 | ? | 477 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
+NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/BERRrf.Q | 9974 | ? | 468 | 0 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.REG | 0 | 8 | SRFF_Q
+NODE | iobm/BERRrf.Q | 10370 | ? | 519 | 0 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/BERRrr | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_IOB_IBUF | 9504 | ? | 479 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nBERR_IOB_IBUF | 9872 | ? | 530 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/BERRrr | 9588 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
+NODE | iobm/BERRrr | 9928 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/BERRrr.SI | iobm/BERRrr | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_IOB_IBUF | 9504 | ? | 479 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | nBERR_IOB_IBUF | 9872 | ? | 530 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/BERRrr.D1 | 9976 | ? | 479 | 4096 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/BERRrr.D1 | 10372 | ? | 530 | 4096 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/BERRrr.D2 | 9977 | ? | 479 | 4096 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/BERRrr.D2 | 10373 | ? | 530 | 4096 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_FALSE | nBERR_IOB_IBUF
 
 SRFF_INSTANCE | iobm/BERRrr.REG | iobm/BERRrr | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/BERRrr.D | 9975 | ? | 479 | 0 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.XOR | 0 | 7 | ALU_F
+NODE | iobm/BERRrr.D | 10371 | ? | 530 | 0 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/BERRrr.Q | 9978 | ? | 468 | 0 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.REG | 0 | 8 | SRFF_Q
+NODE | iobm/BERRrr.Q | 10374 | ? | 519 | 0 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.REG | 0 | 8 | SRFF_Q
+TNAME | CLK2X_IOB
+
+MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/BGr1 | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/BGr0 | 9912 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BGr0.Q | iobm/BGr0 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
+NODE | iobm/BGr1 | 9929 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BGr1.Q | iobm/BGr1 | 1 | 0 | MC_UIM
+
+SIGNAL_INSTANCE | iobm/BGr1.SI | iobm/BGr1 | 0 | 1 | 2
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobm/BGr0 | 9912 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BGr0.Q | iobm/BGr0 | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/BGr1.D1 | 10376 | ? | 531 | 4096 | iobm/BGr1 | NULL | NULL | iobm/BGr1.SI | 1 | 9 | MC_SI_D1
+SPPTERM | 0 | IV_ZERO
+OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/BGr1.D2 | 10377 | ? | 531 | 4096 | iobm/BGr1 | NULL | NULL | iobm/BGr1.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | iobm/BGr0
+
+SRFF_INSTANCE | iobm/BGr1.REG | iobm/BGr1 | 0 | 2 | 1
+INPUT_NODE_TYPE | 0 | 8 | SRFF_D
+NODE | iobm/BGr1.D | 10375 | ? | 531 | 0 | iobm/BGr1 | NULL | NULL | iobm/BGr1.XOR | 0 | 7 | ALU_F
+INPUT_NODE_TYPE | 1 | 8 | SRFF_C
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
+NODE | iobm/BGr1.Q | 10378 | ? | 536 | 0 | iobm/BGr1 | NULL | NULL | iobm/BGr1.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/RESrf | MXSE_COPY_0_COPY_0 | 2424308736 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nRES_IBUF | 9518 | ? | 481 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX
+NODE | nRES_IBUF | 9848 | ? | 533 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK- | 9506 | ? | 477 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
+NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/RESrf | 9589 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
+NODE | iobm/RESrf | 9930 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/RESrf.SI | iobm/RESrf | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nRES_IBUF | 9518 | ? | 481 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX
+NODE | nRES_IBUF | 9848 | ? | 533 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/RESrf.D1 | 9980 | ? | 480 | 4096 | iobm/RESrf | NULL | NULL | iobm/RESrf.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/RESrf.D1 | 10380 | ? | 532 | 4096 | iobm/RESrf | NULL | NULL | iobm/RESrf.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/RESrf.D2 | 9981 | ? | 480 | 4096 | iobm/RESrf | NULL | NULL | iobm/RESrf.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/RESrf.D2 | 10381 | ? | 532 | 4096 | iobm/RESrf | NULL | NULL | iobm/RESrf.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_FALSE | nRES_IBUF
 
 SRFF_INSTANCE | iobm/RESrf.REG | iobm/RESrf | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/RESrf.D | 9979 | ? | 480 | 0 | iobm/RESrf | NULL | NULL | iobm/RESrf.XOR | 0 | 7 | ALU_F
+NODE | iobm/RESrf.D | 10379 | ? | 532 | 0 | iobm/RESrf | NULL | NULL | iobm/RESrf.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK- | 9506 | ? | 477 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
+NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/RESrf.Q | 9982 | ? | 468 | 0 | iobm/RESrf | NULL | NULL | iobm/RESrf.REG | 0 | 8 | SRFF_Q
+NODE | iobm/RESrf.Q | 10382 | ? | 519 | 0 | iobm/RESrf | NULL | NULL | iobm/RESrf.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/RESrr | MXSE_COPY_0_COPY_0 | 2155873280 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nRES_IBUF | 9518 | ? | 481 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX
+NODE | nRES_IBUF | 9848 | ? | 533 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobm/RESrr | 9590 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
+NODE | iobm/RESrr | 9931 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | iobm/RESrr.SI | iobm/RESrr | 0 | 1 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nRES_IBUF | 9518 | ? | 481 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX
+NODE | nRES_IBUF | 9848 | ? | 533 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRES_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobm/RESrr.D1 | 9984 | ? | 481 | 4096 | iobm/RESrr | NULL | NULL | iobm/RESrr.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobm/RESrr.D1 | 10384 | ? | 533 | 4096 | iobm/RESrr | NULL | NULL | iobm/RESrr.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobm/RESrr.D2 | 9985 | ? | 481 | 4096 | iobm/RESrr | NULL | NULL | iobm/RESrr.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobm/RESrr.D2 | 10385 | ? | 533 | 4096 | iobm/RESrr | NULL | NULL | iobm/RESrr.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_FALSE | nRES_IBUF
 
 SRFF_INSTANCE | iobm/RESrr.REG | iobm/RESrr | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobm/RESrr.D | 9983 | ? | 481 | 0 | iobm/RESrr | NULL | NULL | iobm/RESrr.XOR | 0 | 7 | ALU_F
+NODE | iobm/RESrr.D | 10383 | ? | 533 | 0 | iobm/RESrr | NULL | NULL | iobm/RESrr.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobm/RESrr.Q | 9986 | ? | 468 | 0 | iobm/RESrr | NULL | NULL | iobm/RESrr.REG | 0 | 8 | SRFF_Q
+NODE | iobm/RESrr.Q | 10386 | ? | 519 | 0 | iobm/RESrr | NULL | NULL | iobm/RESrr.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
-MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/Clear1 | MXSE_COPY_0_COPY_0 | 2155873280 | 4 | 1
+MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/Clear1 | MXSE_COPY_0_COPY_0 | 2155873280 | 17 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | iobs/Clear1 | 9591 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Clear1.Q | iobs/Clear1 | 1 | 0 | MC_UIM
+NODE | iobs/Clear1 | 9932 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Clear1.Q | iobs/Clear1 | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | iobs/Clear1.EXP | 10569 | ? | 457 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Clear1.EXP | iobs/Clear1 | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | iobs/Clear1.SI | iobs/Clear1 | 0 | 3 | 2
+SIGNAL_INSTANCE | iobs/Clear1.SI | iobs/Clear1 | 0 | 16 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | iobs/Clear1.D1 | 9988 | ? | 451 | 4096 | iobs/Clear1 | NULL | NULL | iobs/Clear1.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | iobs/Clear1.D1 | 10388 | ? | 497 | 4096 | iobs/Clear1 | NULL | NULL | iobs/Clear1.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | iobs/Clear1.D2 | 9989 | ? | 451 | 4096 | iobs/Clear1 | NULL | NULL | iobs/Clear1.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | iobs/Clear1.D2 | 10389 | ? | 497 | 4096 | iobs/Clear1 | NULL | NULL | iobs/Clear1.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_FALSE | ALE1
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | iobs/Clear1.EXP | 10555 | ? | 457 | 0 | iobs/Clear1 | NULL | NULL | iobs/Clear1.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 11 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady
+SPPTERM | 11 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady
+SPPTERM | 13 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_FALSE | ALE1
+SPPTERM | 13 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_FALSE | ALE1
 
 SRFF_INSTANCE | iobs/Clear1.REG | iobs/Clear1 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | iobs/Clear1.D | 9987 | ? | 451 | 0 | iobs/Clear1 | NULL | NULL | iobs/Clear1.XOR | 0 | 7 | ALU_F
+NODE | iobs/Clear1.D | 10387 | ? | 497 | 0 | iobs/Clear1 | NULL | NULL | iobs/Clear1.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | iobs/Clear1.Q | 9990 | ? | 455 | 0 | iobs/Clear1 | NULL | NULL | iobs/Clear1.REG | 0 | 8 | SRFF_Q
+NODE | iobs/Clear1.Q | 10390 | ? | 503 | 0 | iobs/Clear1 | NULL | NULL | iobs/Clear1.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RAMDIS1 | MXSE_COPY_0_COPY_0 | 2155873280 | 11 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9565 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP36_.EXP | 10239 | ? | 452 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP36_.EXP | EXP36_ | 4 | 0 | MC_EXPORT
+NODE | EXP24_.EXP | 10587 | ? | 498 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP24_.EXP | EXP24_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP37_.EXP | 10240 | ? | 452 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP37_.EXP | EXP37_ | 4 | 0 | MC_EXPORT
+NODE | RA_4_OBUF.EXP | 10588 | ? | 498 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.EXP | RA_4_OBUF | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/RAMDIS1 | 9592 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM
+NODE | ram/RAMDIS1 | 9933 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | ram/RAMDIS1.SI | ram/RAMDIS1 | 0 | 10 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9565 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP36_.EXP | 10239 | ? | 452 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP36_.EXP | EXP36_ | 4 | 0 | MC_EXPORT
+NODE | EXP24_.EXP | 10587 | ? | 498 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP24_.EXP | EXP24_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP37_.EXP | 10240 | ? | 452 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP37_.EXP | EXP37_ | 4 | 0 | MC_EXPORT
+NODE | RA_4_OBUF.EXP | 10588 | ? | 498 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.EXP | RA_4_OBUF | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/RAMDIS1.D1 | 9992 | ? | 452 | 4096 | ram/RAMDIS1 | NULL | NULL | ram/RAMDIS1.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | ram/RAMDIS1.D1 | 10392 | ? | 498 | 4096 | ram/RAMDIS1 | NULL | NULL | ram/RAMDIS1.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/RAMDIS1.D2 | 9993 | ? | 452 | 4096 | ram/RAMDIS1 | NULL | NULL | ram/RAMDIS1.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | EXP36_.EXP
-SPPTERM | 1 | IV_TRUE | EXP37_.EXP
+SIGNAL | NODE | ram/RAMDIS1.D2 | 10393 | ? | 498 | 4096 | ram/RAMDIS1 | NULL | NULL | ram/RAMDIS1.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | EXP24_.EXP
+SPPTERM | 1 | IV_TRUE | RA_4_OBUF.EXP
 SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1
 SPPTERM | 2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3
 SPPTERM | 3 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
@@ -3956,617 +4406,602 @@ SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/
 
 SRFF_INSTANCE | ram/RAMDIS1.REG | ram/RAMDIS1 | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/RAMDIS1.D | 9991 | ? | 452 | 0 | ram/RAMDIS1 | NULL | NULL | ram/RAMDIS1.XOR | 0 | 7 | ALU_F
+NODE | ram/RAMDIS1.D | 10391 | ? | 498 | 0 | ram/RAMDIS1 | NULL | NULL | ram/RAMDIS1.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/RAMDIS1.Q | 9994 | ? | 0 | 0 | ram/RAMDIS1 | NULL | NULL | ram/RAMDIS1.REG | 0 | 8 | SRFF_Q
+NODE | ram/RAMDIS1.Q | 10394 | ? | 0 | 0 | ram/RAMDIS1 | NULL | NULL | ram/RAMDIS1.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | ram/RAMReady | MXSE_COPY_0_COPY_0 | 2155873536 | 13 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9565 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9512 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
+NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutB.EXP | 10210 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.EXP | TimeoutB | 4 | 0 | MC_EXPORT
+NODE | RA_1_OBUF.EXP | 10612 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.EXP | RA_1_OBUF | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP33_.EXP | 10220 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP33_.EXP | EXP33_ | 4 | 0 | MC_EXPORT
+NODE | EXP30_.EXP | 10621 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP30_.EXP | EXP30_ | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ram/RAMReady | 9593 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
+NODE | ram/RAMReady | 9934 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | ram/RAMReady.SI | ram/RAMReady | 0 | 12 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9565 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9512 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
+NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutB.EXP | 10210 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.EXP | TimeoutB | 4 | 0 | MC_EXPORT
+NODE | RA_1_OBUF.EXP | 10612 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.EXP | RA_1_OBUF | 4 | 0 | MC_EXPORT
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP33_.EXP | 10220 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP33_.EXP | EXP33_ | 4 | 0 | MC_EXPORT
+NODE | EXP30_.EXP | 10621 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP30_.EXP | EXP30_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | ram/RAMReady.D1 | 9996 | ? | 453 | 4096 | ram/RAMReady | NULL | NULL | ram/RAMReady.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | ram/RAMReady.D1 | 10396 | ? | 499 | 4096 | ram/RAMReady | NULL | NULL | ram/RAMReady.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | ram/RAMReady.D2 | 9997 | ? | 453 | 4096 | ram/RAMReady | NULL | NULL | ram/RAMReady.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | TimeoutB.EXP
-SPPTERM | 1 | IV_TRUE | EXP33_.EXP
-SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
-SPPTERM | 6 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
-SPPTERM | 6 | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
-SPPTERM | 6 | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
-SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1
+SIGNAL | NODE | ram/RAMReady.D2 | 10397 | ? | 499 | 4096 | ram/RAMReady | NULL | NULL | ram/RAMReady.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | RA_1_OBUF.EXP
+SPPTERM | 1 | IV_TRUE | EXP30_.EXP
+SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
+SPPTERM | 6 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
+SPPTERM | 6 | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
+SPPTERM | 6 | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
+SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1
 
 SRFF_INSTANCE | ram/RAMReady.REG | ram/RAMReady | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | ram/RAMReady.D | 9995 | ? | 453 | 0 | ram/RAMReady | NULL | NULL | ram/RAMReady.XOR | 0 | 7 | ALU_F
+NODE | ram/RAMReady.D | 10395 | ? | 499 | 0 | ram/RAMReady | NULL | NULL | ram/RAMReady.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | ram/RAMReady.Q | 9998 | ? | 428 | 0 | ram/RAMReady | NULL | NULL | ram/RAMReady.REG | 0 | 8 | SRFF_Q
+NODE | ram/RAMReady.Q | 10398 | ? | 467 | 0 | ram/RAMReady | NULL | NULL | ram/RAMReady.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_1_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<1> | 9694 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<1> | 10044 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_1_IBUF | 9594 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_1_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_1_IBUF | 9935 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_1_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_2_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<2> | 9695 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<2> | 10045 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_2_IBUF | 9595 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_2_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_2_IBUF | 9936 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_2_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_3_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<3> | 9696 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<3> | 10046 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_3_IBUF | 9596 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_3_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_3_IBUF | 9937 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_3_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_4_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<4> | 9697 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<4> | 10047 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_4_IBUF | 9597 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_4_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_4_IBUF | 9938 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_4_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_5_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<5> | 9698 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<5> | 10048 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_5_IBUF | 9598 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_5_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_5_IBUF | 9939 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_5_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_6_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<6> | 9699 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<6> | 10049 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_6_IBUF | 9599 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_6_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_6_IBUF | 9940 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_6_IBUF | 0 | 5 | II_IMUX
 
 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_7_IBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
 INPUT_NODE_TYPE | 0 | 5 | II_IN
-NODE | A_FSB<7> | 9700 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+NODE | A_FSB<7> | 10050 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
 OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
-NODE | A_FSB_7_IBUF | 9600 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_7_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_7_IBUF | 9941 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_7_IBUF | 0 | 5 | II_IMUX
 
 MACROCELL_INSTANCE | OptxMapped | RA_0_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 3 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9495 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9541 | ? | 454 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_1_IBUF | 9594 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_1_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_1_IBUF | 9935 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_1_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_0_OBUF | 9601 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_0_OBUF.Q | RA_0_OBUF | 0 | 0 | MC_Q
+NODE | RA_0_OBUF | 9942 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_0_OBUF.Q | RA_0_OBUF | 0 | 0 | MC_Q
 
 SIGNAL_INSTANCE | RA_0_OBUF.SI | RA_0_OBUF | 0 | 3 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9495 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9541 | ? | 454 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_1_IBUF | 9594 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_1_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_1_IBUF | 9935 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_1_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_0_OBUF.D1 | 10000 | ? | 0 | 4096 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | RA_0_OBUF.D1 | 10400 | ? | 0 | 4096 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_0_OBUF.D2 | 10001 | ? | 0 | 4096 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | RA_0_OBUF.D2 | 10401 | ? | 0 | 4096 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | ram/RASEL
 SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_1_IBUF
 
 SRFF_INSTANCE | RA_0_OBUF.REG | RA_0_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_0_OBUF.D | 9999 | ? | 0 | 0 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.XOR | 0 | 7 | ALU_F
+NODE | RA_0_OBUF.D | 10399 | ? | 0 | 0 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_0_OBUF.Q | 10002 | ? | 0 | 0 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | RA_0_OBUF.Q | 10402 | ? | 0 | 0 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.REG | 0 | 8 | SRFF_Q
 
-MACROCELL_INSTANCE | OptxMapped | RA_1_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 15 | 2
+MACROCELL_INSTANCE | OptxMapped | RA_1_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 9 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9494 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9541 | ? | 454 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_2_IBUF | 9595 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_2_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutB | 9523 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimeoutBPre | 9524 | ? | 414 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.Q | cnt/TimeoutBPre | 1 | 0 | MC_UIM
+NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9556 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9560 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9561 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9562 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9563 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+NODE | TimeoutB.EXP | 10613 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.EXP | TimeoutB | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_1_OBUF | 9602 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.Q | RA_1_OBUF | 0 | 0 | MC_Q
+NODE | RA_1_OBUF | 9943 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.Q | RA_1_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | RA_1_OBUF.EXP | 10211 | ? | 413 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.EXP | RA_1_OBUF | 4 | 0 | MC_EXPORT
+NODE | RA_1_OBUF.EXP | 10612 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.EXP | RA_1_OBUF | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | RA_1_OBUF.SI | RA_1_OBUF | 0 | 15 | 3
+SIGNAL_INSTANCE | RA_1_OBUF.SI | RA_1_OBUF | 0 | 9 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9494 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9541 | ? | 454 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_2_IBUF | 9595 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_2_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutB | 9523 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/TimeoutBPre | 9524 | ? | 414 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/TimeoutBPre.Q | cnt/TimeoutBPre | 1 | 0 | MC_UIM
+NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9556 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9560 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9561 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9562 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9563 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+NODE | TimeoutB.EXP | 10613 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.EXP | TimeoutB | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_1_OBUF.D1 | 10004 | ? | 0 | 4096 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | RA_1_OBUF.D1 | 10404 | ? | 0 | 4096 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_1_OBUF.D2 | 10005 | ? | 0 | 4096 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_TRUE | A_FSB_11_IBUF | IV_FALSE | ram/RASEL
-SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_2_IBUF
+SIGNAL | NODE | RA_1_OBUF.D2 | 10405 | ? | 0 | 4096 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | TimeoutB.EXP
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | RA_1_OBUF.EXP | 10200 | ? | 413 | 0 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 3 | IV_TRUE | TimeoutB | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-SPPTERM | 11 | IV_FALSE | TimeoutB | IV_TRUE | cnt/TimeoutBPre | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<4> | IV_FALSE | cnt/RefCnt<7>
-SPPTERM | 11 | IV_FALSE | TimeoutB | IV_TRUE | cnt/TimeoutBPre | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<4> | IV_FALSE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf
+SIGNAL | NODE | RA_1_OBUF.EXP | 10602 | ? | 499 | 0 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3
+SPPTERM | 2 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd1
+SPPTERM | 2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3
+SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
+SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
 
 SRFF_INSTANCE | RA_1_OBUF.REG | RA_1_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_1_OBUF.D | 10003 | ? | 0 | 0 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.XOR | 0 | 7 | ALU_F
+NODE | RA_1_OBUF.D | 10403 | ? | 0 | 0 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_1_OBUF.Q | 10006 | ? | 0 | 0 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | RA_1_OBUF.Q | 10406 | ? | 0 | 0 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.REG | 0 | 8 | SRFF_Q
 
-MACROCELL_INSTANCE | OptxMapped | RA_2_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 13 | 2
+MACROCELL_INSTANCE | OptxMapped | RA_2_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 11 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9493 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9541 | ? | 454 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_6_OBUF.EXP | 10191 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.EXP | RA_6_OBUF | 4 | 0 | MC_EXPORT
+NODE | RA_6_OBUF.EXP | 10593 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.EXP | RA_6_OBUF | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_2_OBUF | 9603 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.Q | RA_2_OBUF | 0 | 0 | MC_Q
+NODE | RA_2_OBUF | 9944 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.Q | RA_2_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | RA_2_OBUF.EXP | 10190 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.EXP | RA_2_OBUF | 4 | 0 | MC_EXPORT
+NODE | RA_2_OBUF.EXP | 10592 | ? | 482 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.EXP | RA_2_OBUF | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | RA_2_OBUF.SI | RA_2_OBUF | 0 | 13 | 3
+SIGNAL_INSTANCE | RA_2_OBUF.SI | RA_2_OBUF | 0 | 11 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9493 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9541 | ? | 454 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_6_OBUF.EXP | 10191 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.EXP | RA_6_OBUF | 4 | 0 | MC_EXPORT
+NODE | RA_6_OBUF.EXP | 10593 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.EXP | RA_6_OBUF | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_2_OBUF.D1 | 10008 | ? | 0 | 4096 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | RA_2_OBUF.D1 | 10408 | ? | 0 | 4096 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_2_OBUF.D2 | 10009 | ? | 0 | 4096 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | RA_2_OBUF.D2 | 10409 | ? | 0 | 4096 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | RA_6_OBUF.EXP
-SPPTERM | 2 | IV_TRUE | A_FSB_12_IBUF | IV_FALSE | ram/RASEL
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | RA_2_OBUF.EXP | 10177 | ? | 448 | 0 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
-SPPTERM | 6 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
+SIGNAL | NODE | RA_2_OBUF.EXP | 10579 | ? | 482 | 0 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | nWE_FSB_IBUF
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_TRUE | SW_1_IBUF
+SPPTERM | 4 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF
+SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1
 
 SRFF_INSTANCE | RA_2_OBUF.REG | RA_2_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_2_OBUF.D | 10007 | ? | 0 | 0 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.XOR | 0 | 7 | ALU_F
+NODE | RA_2_OBUF.D | 10407 | ? | 0 | 0 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_2_OBUF.Q | 10010 | ? | 0 | 0 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | RA_2_OBUF.Q | 10410 | ? | 0 | 0 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | OptxMapped | RA_3_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 5 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9541 | ? | 454 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_4_IBUF | 9597 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_4_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_4_IBUF | 9938 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_4_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9490 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_6_IBUF | 9599 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_6_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_6_IBUF | 9940 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_6_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_3_OBUF | 9604 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.Q | RA_3_OBUF | 0 | 0 | MC_Q
+NODE | RA_3_OBUF | 9945 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.Q | RA_3_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | RA_3_OBUF.EXP | 10188 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.EXP | RA_3_OBUF | 4 | 0 | MC_EXPORT
+NODE | RA_3_OBUF.EXP | 10590 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.EXP | RA_3_OBUF | 4 | 0 | MC_EXPORT
 
 SIGNAL_INSTANCE | RA_3_OBUF.SI | RA_3_OBUF | 0 | 5 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9541 | ? | 454 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_4_IBUF | 9597 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_4_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_4_IBUF | 9938 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_4_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9490 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_6_IBUF | 9599 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_6_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_6_IBUF | 9940 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_6_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_3_OBUF.D1 | 10012 | ? | 0 | 4096 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | RA_3_OBUF.D1 | 10412 | ? | 0 | 4096 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_3_OBUF.D2 | 10013 | ? | 0 | 4096 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | RA_3_OBUF.D2 | 10413 | ? | 0 | 4096 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | ram/RASEL
 SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_4_IBUF
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | RA_3_OBUF.EXP | 10175 | ? | 0 | 0 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.SI | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | RA_3_OBUF.EXP | 10577 | ? | 0 | 0 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.SI | 7 | 9 | MC_SI_EXPORT
 SPPTERM | 2 | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | ram/RASEL
 SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_6_IBUF
 
 SRFF_INSTANCE | RA_3_OBUF.REG | RA_3_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_3_OBUF.D | 10011 | ? | 0 | 0 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.XOR | 0 | 7 | ALU_F
+NODE | RA_3_OBUF.D | 10411 | ? | 0 | 0 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_3_OBUF.Q | 10014 | ? | 0 | 0 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | RA_3_OBUF.Q | 10414 | ? | 0 | 0 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.REG | 0 | 8 | SRFF_Q
 
-MACROCELL_INSTANCE | OptxMapped | RA_4_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 9 | 2
+MACROCELL_INSTANCE | OptxMapped | RA_4_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 15 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP29_.EXP | 10187 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP29_.EXP | EXP29_ | 4 | 0 | MC_EXPORT
+NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP25_.EXP | 10589 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP25_.EXP | EXP25_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_4_OBUF | 9605 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.Q | RA_4_OBUF | 0 | 0 | MC_Q
+NODE | RA_4_OBUF | 9946 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.Q | RA_4_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | RA_4_OBUF.EXP | 10186 | ? | 403 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.EXP | RA_4_OBUF | 4 | 0 | MC_EXPORT
+NODE | RA_4_OBUF.EXP | 10588 | ? | 498 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.EXP | RA_4_OBUF | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | RA_4_OBUF.SI | RA_4_OBUF | 0 | 9 | 3
+SIGNAL_INSTANCE | RA_4_OBUF.SI | RA_4_OBUF | 0 | 15 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP29_.EXP | 10187 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP29_.EXP | EXP29_ | 4 | 0 | MC_EXPORT
+NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP25_.EXP | 10589 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP25_.EXP | EXP25_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_4_OBUF.D1 | 10016 | ? | 0 | 4096 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | RA_4_OBUF.D1 | 10416 | ? | 0 | 4096 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_4_OBUF.D2 | 10017 | ? | 0 | 4096 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | EXP29_.EXP
+SIGNAL | NODE | RA_4_OBUF.D2 | 10417 | ? | 0 | 4096 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | EXP25_.EXP
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | RA_4_OBUF.EXP | 10173 | ? | 403 | 0 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF | IV_FALSE | iobs/Once
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF | IV_FALSE | iobs/Once
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF | IV_FALSE | iobs/Once
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF | IV_FALSE | iobs/Once
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once | IV_TRUE | nWE_FSB_IBUF
+SIGNAL | NODE | RA_4_OBUF.EXP | 10575 | ? | 498 | 0 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 6 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
+SPPTERM | 6 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
+SPPTERM | 6 | IV_TRUE | ram/Once | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
+SPPTERM | 6 | IV_FALSE | cnt/RefDone | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
+SPPTERM | 7 | IV_FALSE | cnt/RefDone | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_FALSE | fsb/ASrf
 
 SRFF_INSTANCE | RA_4_OBUF.REG | RA_4_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_4_OBUF.D | 10015 | ? | 0 | 0 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.XOR | 0 | 7 | ALU_F
+NODE | RA_4_OBUF.D | 10415 | ? | 0 | 0 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_4_OBUF.Q | 10018 | ? | 0 | 0 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | RA_4_OBUF.Q | 10418 | ? | 0 | 0 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.REG | 0 | 8 | SRFF_Q
 
-MACROCELL_INSTANCE | OptxMapped | RA_5_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 10 | 2
+MACROCELL_INSTANCE | OptxMapped | RA_5_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 8 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_3_OBUF.EXP | 10188 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.EXP | RA_3_OBUF | 4 | 0 | MC_EXPORT
+NODE | RA_3_OBUF.EXP | 10590 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.EXP | RA_3_OBUF | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_5_OBUF | 9606 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.Q | RA_5_OBUF | 0 | 0 | MC_Q
+NODE | RA_5_OBUF | 9947 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.Q | RA_5_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | RA_5_OBUF.EXP | 10189 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.EXP | RA_5_OBUF | 4 | 0 | MC_EXPORT
+NODE | RA_5_OBUF.EXP | 10591 | ? | 482 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.EXP | RA_5_OBUF | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | RA_5_OBUF.SI | RA_5_OBUF | 0 | 10 | 3
+SIGNAL_INSTANCE | RA_5_OBUF.SI | RA_5_OBUF | 0 | 8 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RA_3_OBUF.EXP | 10188 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.EXP | RA_3_OBUF | 4 | 0 | MC_EXPORT
+NODE | RA_3_OBUF.EXP | 10590 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.EXP | RA_3_OBUF | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_5_OBUF.D1 | 10020 | ? | 0 | 4096 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | RA_5_OBUF.D1 | 10420 | ? | 0 | 4096 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_5_OBUF.D2 | 10021 | ? | 0 | 4096 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | RA_5_OBUF.D2 | 10421 | ? | 0 | 4096 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | RA_3_OBUF.EXP
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | RA_5_OBUF.EXP | 10176 | ? | 448 | 0 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
+SIGNAL | NODE | RA_5_OBUF.EXP | 10578 | ? | 482 | 0 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF
 
 SRFF_INSTANCE | RA_5_OBUF.REG | RA_5_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_5_OBUF.D | 10019 | ? | 0 | 0 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.XOR | 0 | 7 | ALU_F
+NODE | RA_5_OBUF.D | 10419 | ? | 0 | 0 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_5_OBUF.Q | 10022 | ? | 0 | 0 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | RA_5_OBUF.Q | 10422 | ? | 0 | 0 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.REG | 0 | 8 | SRFF_Q
 
-MACROCELL_INSTANCE | OptxMapped | RA_6_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 4 | 2
+MACROCELL_INSTANCE | OptxMapped | RA_6_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 5 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9541 | ? | 454 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_7_IBUF | 9600 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_7_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_7_IBUF | 9941 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_7_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_3_IBUF | 9596 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_3_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_3_IBUF | 9937 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_3_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_6_OBUF | 9607 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.Q | RA_6_OBUF | 0 | 0 | MC_Q
+NODE | RA_6_OBUF | 9948 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.Q | RA_6_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | RA_6_OBUF.EXP | 10191 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.EXP | RA_6_OBUF | 4 | 0 | MC_EXPORT
+NODE | RA_6_OBUF.EXP | 10593 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.EXP | RA_6_OBUF | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | RA_6_OBUF.SI | RA_6_OBUF | 0 | 4 | 3
+SIGNAL_INSTANCE | RA_6_OBUF.SI | RA_6_OBUF | 0 | 5 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9541 | ? | 454 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_7_IBUF | 9600 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_7_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_7_IBUF | 9941 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_7_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_3_IBUF | 9596 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_3_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_3_IBUF | 9937 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_3_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_6_OBUF.D1 | 10024 | ? | 0 | 4096 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | RA_6_OBUF.D1 | 10424 | ? | 0 | 4096 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_6_OBUF.D2 | 10025 | ? | 0 | 4096 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | RA_6_OBUF.D2 | 10425 | ? | 0 | 4096 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | ram/RASEL
 SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_7_IBUF
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | RA_6_OBUF.EXP | 10178 | ? | 0 | 0 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.SI | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | RA_6_OBUF.EXP | 10580 | ? | 0 | 0 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 2 | IV_TRUE | A_FSB_12_IBUF | IV_FALSE | ram/RASEL
 SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_3_IBUF
 
 SRFF_INSTANCE | RA_6_OBUF.REG | RA_6_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_6_OBUF.D | 10023 | ? | 0 | 0 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.XOR | 0 | 7 | ALU_F
+NODE | RA_6_OBUF.D | 10423 | ? | 0 | 0 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_6_OBUF.Q | 10026 | ? | 0 | 0 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | RA_6_OBUF.Q | 10426 | ? | 0 | 0 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | OptxMapped | RA_7_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 3 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9541 | ? | 454 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9489 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_7_OBUF | 9608 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_7_OBUF.Q | RA_7_OBUF | 0 | 0 | MC_Q
+NODE | RA_7_OBUF | 9949 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_7_OBUF.Q | RA_7_OBUF | 0 | 0 | MC_Q
 
 SIGNAL_INSTANCE | RA_7_OBUF.SI | RA_7_OBUF | 0 | 3 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9541 | ? | 454 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9489 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_7_OBUF.D1 | 10028 | ? | 0 | 4096 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | RA_7_OBUF.D1 | 10428 | ? | 0 | 4096 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_7_OBUF.D2 | 10029 | ? | 0 | 4096 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | RA_7_OBUF.D2 | 10429 | ? | 0 | 4096 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | ram/RASEL
 SPPTERM | 2 | IV_TRUE | A_FSB_17_IBUF | IV_FALSE | ram/RASEL
 
 SRFF_INSTANCE | RA_7_OBUF.REG | RA_7_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_7_OBUF.D | 10027 | ? | 0 | 0 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.XOR | 0 | 7 | ALU_F
+NODE | RA_7_OBUF.D | 10427 | ? | 0 | 0 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_7_OBUF.Q | 10030 | ? | 0 | 0 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | RA_7_OBUF.Q | 10430 | ? | 0 | 0 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.REG | 0 | 8 | SRFF_Q
 
-MACROCELL_INSTANCE | OptxMapped | RA_8_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 8 | 1
+MACROCELL_INSTANCE | OptxMapped | RA_8_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 7 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9541 | ? | 454 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay0.EXP | 10212 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.EXP | cs/nOverlay0 | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF$BUF0.EXP | 10213 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.EXP | A_FSB_21_IBUF$BUF0 | 4 | 0 | MC_EXPORT
+NODE | A_FSB_21_IBUF$BUF0.EXP | 10614 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.EXP | A_FSB_21_IBUF$BUF0 | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_8_OBUF | 9609 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_8_OBUF.Q | RA_8_OBUF | 0 | 0 | MC_Q
+NODE | RA_8_OBUF | 9950 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_8_OBUF.Q | RA_8_OBUF | 0 | 0 | MC_Q
 
-SIGNAL_INSTANCE | RA_8_OBUF.SI | RA_8_OBUF | 0 | 8 | 2
+SIGNAL_INSTANCE | RA_8_OBUF.SI | RA_8_OBUF | 0 | 7 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9541 | ? | 454 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay0.EXP | 10212 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.EXP | cs/nOverlay0 | 4 | 0 | MC_EXPORT
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF$BUF0.EXP | 10213 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.EXP | A_FSB_21_IBUF$BUF0 | 4 | 0 | MC_EXPORT
+NODE | A_FSB_21_IBUF$BUF0.EXP | 10614 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.EXP | A_FSB_21_IBUF$BUF0 | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_8_OBUF.D1 | 10032 | ? | 0 | 4096 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | RA_8_OBUF.D1 | 10432 | ? | 0 | 4096 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_8_OBUF.D2 | 10033 | ? | 0 | 4096 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | cs/nOverlay0.EXP
+SIGNAL | NODE | RA_8_OBUF.D2 | 10433 | ? | 0 | 4096 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | A_FSB_21_IBUF$BUF0.EXP
 SPPTERM | 2 | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_18_IBUF
 SPPTERM | 2 | IV_TRUE | A_FSB_18_IBUF | IV_FALSE | ram/RASEL
@@ -4576,3389 +5011,3369 @@ SPPTERM | 3 | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_FALSE | cs
 
 SRFF_INSTANCE | RA_8_OBUF.REG | RA_8_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_8_OBUF.D | 10031 | ? | 0 | 0 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.XOR | 0 | 7 | ALU_F
+NODE | RA_8_OBUF.D | 10431 | ? | 0 | 0 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_8_OBUF.Q | 10034 | ? | 0 | 0 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | RA_8_OBUF.Q | 10434 | ? | 0 | 0 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.REG | 0 | 8 | SRFF_Q
 
-MACROCELL_INSTANCE | OptxMapped | RA_9_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 13 | 2
+MACROCELL_INSTANCE | OptxMapped | RA_9_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 9 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9541 | ? | 454 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9522 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9556 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+NODE | fsb/Ready0r | 9857 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9560 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9561 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9562 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9563 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
+NODE | ram/RAMReady | 9934 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | RA_9_OBUF | 9610 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.Q | RA_9_OBUF | 0 | 0 | MC_Q
+NODE | RA_9_OBUF | 9951 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.Q | RA_9_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | RA_9_OBUF.EXP | 10214 | ? | 412 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.EXP | RA_9_OBUF | 4 | 0 | MC_EXPORT
+NODE | RA_9_OBUF.EXP | 10615 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.EXP | RA_9_OBUF | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | RA_9_OBUF.SI | RA_9_OBUF | 0 | 13 | 3
+SIGNAL_INSTANCE | RA_9_OBUF.SI | RA_9_OBUF | 0 | 9 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9541 | ? | 454 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9522 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<0> | 9556 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<0>.Q | cnt/RefCnt<0> | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+NODE | fsb/Ready0r | 9857 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<1> | 9560 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<1>.Q | cnt/RefCnt<1> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<2> | 9561 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<2>.Q | cnt/RefCnt<2> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<3> | 9562 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<3>.Q | cnt/RefCnt<3> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<4> | 9563 | ? | 445 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<4>.Q | cnt/RefCnt<4> | 1 | 0 | MC_UIM
+NODE | ram/RAMReady | 9934 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | RA_9_OBUF.D1 | 10036 | ? | 0 | 4096 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | RA_9_OBUF.D1 | 10436 | ? | 0 | 4096 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | RA_9_OBUF.D2 | 10037 | ? | 0 | 4096 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | RA_9_OBUF.D2 | 10437 | ? | 0 | 4096 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | ram/RASEL
 SPPTERM | 2 | IV_TRUE | A_FSB_19_IBUF | IV_FALSE | ram/RASEL
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | RA_9_OBUF.EXP | 10203 | ? | 412 | 0 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 3 | IV_TRUE | TimeoutA | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
-SPPTERM | 9 | IV_FALSE | TimeoutA | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<4>
-SPPTERM | 9 | IV_FALSE | TimeoutA | IV_FALSE | cnt/RefCnt<0> | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | cnt/RefCnt<1> | IV_FALSE | cnt/RefCnt<2> | IV_FALSE | cnt/RefCnt<3> | IV_FALSE | cnt/RefCnt<4> | IV_TRUE | fsb/ASrf
+SIGNAL | NODE | RA_9_OBUF.EXP | 10605 | ? | 467 | 0 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_FALSE | ram/RAMReady
 
 SRFF_INSTANCE | RA_9_OBUF.REG | RA_9_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | RA_9_OBUF.D | 10035 | ? | 0 | 0 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.XOR | 0 | 7 | ALU_F
+NODE | RA_9_OBUF.D | 10435 | ? | 0 | 0 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | RA_9_OBUF.Q | 10038 | ? | 0 | 0 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | RA_9_OBUF.Q | 10438 | ? | 0 | 0 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.REG | 0 | 8 | SRFF_Q
 
-MACROCELL_INSTANCE | OptxMapped | nBERR_FSB_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 16 | 2
+MACROCELL_INSTANCE | OptxMapped | nBERR_FSB_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 12 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9512 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS2 | 9537 | ? | 427 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP35_.EXP | 10236 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP35_.EXP | EXP35_ | 4 | 0 | MC_EXPORT
+NODE | EXP34_.EXP | 10643 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP34_.EXP | EXP34_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nBERR_FSB_OBUF | 9611 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.Q | nBERR_FSB_OBUF | 0 | 0 | MC_Q
+NODE | nBERR_FSB_OBUF | 9952 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.Q | nBERR_FSB_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | nBERR_FSB_OBUF.EXP | 10237 | ? | 427 | 0 | MXSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.EXP | nBERR_FSB_OBUF | 4 | 0 | MC_EXPORT
+NODE | nBERR_FSB_OBUF.EXP | 10644 | ? | 440 | 0 | MXSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.EXP | nBERR_FSB_OBUF | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | nBERR_FSB_OBUF.SI | nBERR_FSB_OBUF | 0 | 16 | 3
+SIGNAL_INSTANCE | nBERR_FSB_OBUF.SI | nBERR_FSB_OBUF | 0 | 12 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9512 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS2 | 9537 | ? | 427 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP35_.EXP | 10236 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP35_.EXP | EXP35_ | 4 | 0 | MC_EXPORT
+NODE | EXP34_.EXP | 10643 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP34_.EXP | EXP34_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nBERR_FSB_OBUF.D1 | 10040 | ? | 0 | 4096 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nBERR_FSB_OBUF.D1 | 10440 | ? | 0 | 4096 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nBERR_FSB_OBUF.D2 | 10041 | ? | 0 | 4096 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | EXP35_.EXP
+SIGNAL | NODE | nBERR_FSB_OBUF.D2 | 10441 | ? | 0 | 4096 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | nAS_FSB_IBUF
+SPPTERM | 1 | IV_TRUE | EXP34_.EXP
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | nBERR_FSB_OBUF.EXP | 10226 | ? | 427 | 0 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 10 | IV_TRUE | ram/Once | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RAMDIS2 | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf
-SPPTERM | 13 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_TRUE | ram/Once | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
-SPPTERM | 13 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_TRUE | ram/Once | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RAMDIS2 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf
-SPPTERM | 14 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_TRUE | ram/Once | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
-SPPTERM | 14 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_TRUE | ram/Once | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RAMDIS2 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf
+SIGNAL | NODE | nBERR_FSB_OBUF.EXP | 10631 | ? | 440 | 0 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once | IV_TRUE | nWE_FSB_IBUF
+SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_TRUE | SW_1_IBUF
+SPPTERM | 5 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once
+SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1
 
 SRFF_INSTANCE | nBERR_FSB_OBUF.REG | nBERR_FSB_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nBERR_FSB_OBUF.D | 10039 | ? | 0 | 0 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.XOR | 0 | 7 | ALU_F
+NODE | nBERR_FSB_OBUF.D | 10439 | ? | 0 | 0 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nBERR_FSB_OBUF.Q | 10042 | ? | 0 | 0 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | nBERR_FSB_OBUF.Q | 10442 | ? | 0 | 0 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.REG | 0 | 8 | SRFF_Q
 
-MACROCELL_INSTANCE | Inv+OptxMapped | nOE_OBUF | MXSE_COPY_0_COPY_0 | 2155872512 | 9 | 2
+MACROCELL_INSTANCE | Inv+OptxMapped | nOE_OBUF | MXSE_COPY_0_COPY_0 | 2155872512 | 10 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nOE_OBUF | 9612 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nOE_OBUF.Q | nOE_OBUF | 0 | 0 | MC_Q
+NODE | nOE_OBUF | 9953 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nOE_OBUF.Q | nOE_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | nOE_OBUF.EXP | 10184 | ? | 403 | 0 | MXSE_COPY_0_COPY_0 | NULL | nOE_OBUF.EXP | nOE_OBUF | 4 | 0 | MC_EXPORT
+NODE | nOE_OBUF.EXP | 10586 | ? | 498 | 0 | MXSE_COPY_0_COPY_0 | NULL | nOE_OBUF.EXP | nOE_OBUF | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | nOE_OBUF.SI | nOE_OBUF | 0 | 9 | 3
+SIGNAL_INSTANCE | nOE_OBUF.SI | nOE_OBUF | 0 | 10 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nOE_OBUF.D1 | 10044 | ? | 0 | 4096 | nOE_OBUF | NULL | NULL | nOE_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nOE_OBUF.D1 | 10444 | ? | 0 | 4096 | nOE_OBUF | NULL | NULL | nOE_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nOE_OBUF.D2 | 10045 | ? | 0 | 4096 | nOE_OBUF | NULL | NULL | nOE_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | nOE_OBUF.D2 | 10445 | ? | 0 | 4096 | nOE_OBUF | NULL | NULL | nOE_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | nOE_OBUF.EXP | 10171 | ? | 403 | 0 | nOE_OBUF | NULL | NULL | nOE_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 5 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once
-SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/Once
+SIGNAL | NODE | nOE_OBUF.EXP | 10573 | ? | 498 | 0 | nOE_OBUF | NULL | NULL | nOE_OBUF.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
+SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
+SPPTERM | 7 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
 
 SRFF_INSTANCE | nOE_OBUF.REG | nOE_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nOE_OBUF.D | 10043 | ? | 0 | 0 | nOE_OBUF | NULL | NULL | nOE_OBUF.XOR | 0 | 7 | ALU_F
+NODE | nOE_OBUF.D | 10443 | ? | 0 | 0 | nOE_OBUF | NULL | NULL | nOE_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nOE_OBUF.Q | 10046 | ? | 0 | 0 | nOE_OBUF | NULL | NULL | nOE_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | nOE_OBUF.Q | 10446 | ? | 0 | 0 | nOE_OBUF | NULL | NULL | nOE_OBUF.REG | 0 | 8 | SRFF_Q
 
-MACROCELL_INSTANCE | Inv+OptxMapped | nROMWE_OBUF | MXSE_COPY_0_COPY_0 | 2155872512 | 2 | 1
+MACROCELL_INSTANCE | Inv+OptxMapped | nROMWE_OBUF | MXSE_COPY_0_COPY_0 | 2155872512 | 26 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/BERR0r | 9855 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/BERR1r | 9856 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | Disable | 9968 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | $OpTx$FX_DC$708.UIM | 10011 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$708.Q | $OpTx$FX_DC$708 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM | 10012 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$$OpTx$FX_DC$182_INV$783.Q | $OpTx$$OpTx$FX_DC$182_INV$783 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nROMWE_OBUF | 9613 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.Q | nROMWE_OBUF | 0 | 0 | MC_Q
+NODE | nROMWE_OBUF | 9954 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.Q | nROMWE_OBUF | 0 | 0 | MC_Q
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | nROMWE_OBUF.EXP | 10568 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.EXP | nROMWE_OBUF | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | nROMWE_OBUF.SI | nROMWE_OBUF | 0 | 2 | 2
+SIGNAL_INSTANCE | nROMWE_OBUF.SI | nROMWE_OBUF | 0 | 26 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/BERR0r | 9855 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/BERR1r | 9856 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | Disable | 9968 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | $OpTx$FX_DC$708.UIM | 10011 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$708.Q | $OpTx$FX_DC$708 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM | 10012 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$$OpTx$FX_DC$182_INV$783.Q | $OpTx$$OpTx$FX_DC$182_INV$783 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nROMWE_OBUF.D1 | 10048 | ? | 0 | 4096 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nROMWE_OBUF.D1 | 10448 | ? | 0 | 4096 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nROMWE_OBUF.D2 | 10049 | ? | 0 | 4096 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | nROMWE_OBUF.D2 | 10449 | ? | 0 | 4096 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | nROMWE_OBUF.EXP | 10554 | ? | 459 | 0 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 23 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | BERR_IOBS | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r | IV_TRUE | fsb/Ready1r | IV_TRUE | Disable | IV_FALSE | $OpTx$FX_DC$708.UIM | IV_FALSE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM
+SPPTERM | 23 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | BERR_IOBS | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r | IV_TRUE | iobs/IOReady | IV_TRUE | Disable | IV_FALSE | $OpTx$FX_DC$708.UIM | IV_FALSE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM
 
 SRFF_INSTANCE | nROMWE_OBUF.REG | nROMWE_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nROMWE_OBUF.D | 10047 | ? | 0 | 0 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.XOR | 0 | 7 | ALU_F
+NODE | nROMWE_OBUF.D | 10447 | ? | 0 | 0 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nROMWE_OBUF.Q | 10050 | ? | 0 | 0 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | nROMWE_OBUF.Q | 10450 | ? | 0 | 0 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | Inv+OptxMapped | nVPA_FSB_OBUF | MXSE_COPY_0_COPY_0 | 2155872512 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9530 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
+NODE | fsb/VPA | 9860 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nVPA_FSB_OBUF | 9614 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVPA_FSB_OBUF.Q | nVPA_FSB_OBUF | 0 | 0 | MC_Q
+NODE | nVPA_FSB_OBUF | 9955 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVPA_FSB_OBUF.Q | nVPA_FSB_OBUF | 0 | 0 | MC_Q
 
 SIGNAL_INSTANCE | nVPA_FSB_OBUF.SI | nVPA_FSB_OBUF | 0 | 2 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9530 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
+NODE | fsb/VPA | 9860 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nVPA_FSB_OBUF.D1 | 10052 | ? | 0 | 4096 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nVPA_FSB_OBUF.D1 | 10452 | ? | 0 | 4096 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nVPA_FSB_OBUF.D2 | 10053 | ? | 0 | 4096 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | nVPA_FSB_OBUF.D2 | 10453 | ? | 0 | 4096 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | fsb/VPA | IV_FALSE | nAS_FSB_IBUF
 
 SRFF_INSTANCE | nVPA_FSB_OBUF.REG | nVPA_FSB_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nVPA_FSB_OBUF.D | 10051 | ? | 0 | 0 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.XOR | 0 | 7 | ALU_F
+NODE | nVPA_FSB_OBUF.D | 10451 | ? | 0 | 0 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nVPA_FSB_OBUF.Q | 10054 | ? | 0 | 0 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | nVPA_FSB_OBUF.Q | 10454 | ? | 0 | 0 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.REG | 0 | 8 | SRFF_Q
 
-MACROCELL_INSTANCE | OptxMapped | nADoutLE0_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 8 | 2
+MACROCELL_INSTANCE | OptxMapped | nADoutLE0_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 7 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE0M | 9583 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ALE0M.Q | ALE0M | 1 | 0 | MC_UIM
+NODE | ALE0M | 9922 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ALE0M.Q | ALE0M | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE0S | 9584 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ALE0S.Q | ALE0S | 1 | 0 | MC_UIM
+NODE | ALE0S | 9923 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ALE0S.Q | ALE0S | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
+NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9547 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9548 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9566 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/DTACKrf | 9914 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrf | 9589 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrr | 9590 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrr | 9915 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nADoutLE0_OBUF | 9615 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.Q | nADoutLE0_OBUF | 0 | 0 | MC_Q
+NODE | nADoutLE0_OBUF | 9956 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.Q | nADoutLE0_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | nADoutLE0_OBUF.EXP | 10197 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.EXP | nADoutLE0_OBUF | 4 | 0 | MC_EXPORT
+NODE | nADoutLE0_OBUF.EXP | 10600 | ? | 518 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.EXP | nADoutLE0_OBUF | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | nADoutLE0_OBUF.SI | nADoutLE0_OBUF | 0 | 8 | 3
+SIGNAL_INSTANCE | nADoutLE0_OBUF.SI | nADoutLE0_OBUF | 0 | 7 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE0M | 9583 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ALE0M.Q | ALE0M | 1 | 0 | MC_UIM
+NODE | ALE0M | 9922 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ALE0M.Q | ALE0M | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE0S | 9584 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ALE0S.Q | ALE0S | 1 | 0 | MC_UIM
+NODE | ALE0S | 9923 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ALE0S.Q | ALE0S | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
+NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9547 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9548 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9566 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/DTACKrf | 9914 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrf | 9589 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/RESrr | 9590 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
+NODE | iobm/DTACKrr | 9915 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nADoutLE0_OBUF.D1 | 10056 | ? | 0 | 4096 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nADoutLE0_OBUF.D1 | 10456 | ? | 0 | 4096 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nADoutLE0_OBUF.D2 | 10057 | ? | 0 | 4096 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | nADoutLE0_OBUF.D2 | 10457 | ? | 0 | 4096 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_FALSE | ALE0M | IV_FALSE | ALE0S
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | nADoutLE0_OBUF.EXP | 10194 | ? | 467 | 0 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 6 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr
+SIGNAL | NODE | nADoutLE0_OBUF.EXP | 10597 | ? | 518 | 0 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 5 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr
 
 SRFF_INSTANCE | nADoutLE0_OBUF.REG | nADoutLE0_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nADoutLE0_OBUF.D | 10055 | ? | 0 | 0 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.XOR | 0 | 7 | ALU_F
+NODE | nADoutLE0_OBUF.D | 10455 | ? | 0 | 0 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nADoutLE0_OBUF.Q | 10058 | ? | 0 | 0 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | nADoutLE0_OBUF.Q | 10458 | ? | 0 | 0 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.REG | 0 | 8 | SRFF_Q
 
-MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | nAS_IOB_OBUF | MXSE_COPY_0_COPY_0 | 2424308736 | 5 | 1
+MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | nCAS_OBUF | MXSE_COPY_0_COPY_0 | 2424308736 | 17 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9546 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | CLK_FSB_IBUF/FCLK- | 9840 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 7 | 5 | II_FCLKINV
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9548 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9547 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK- | 9506 | ? | 477 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RAMDIS2 | 9867 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nAS_IOB_OBUF | 9616 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAS_IOB_OBUF.Q | nAS_IOB_OBUF | 0 | 0 | MC_Q
-
-SIGNAL_INSTANCE | nAS_IOB_OBUF.SI | nAS_IOB_OBUF | 0 | 4 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9546 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9548 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9547 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nAS_IOB_OBUF.D1 | 10060 | ? | 482 | 4096 | nAS_IOB_OBUF | NULL | NULL | nAS_IOB_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nAS_IOB_OBUF.D2 | 10061 | ? | 482 | 4096 | nAS_IOB_OBUF | NULL | NULL | nAS_IOB_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2
-SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1
-
-SRFF_INSTANCE | nAS_IOB_OBUF.REG | nAS_IOB_OBUF | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nAS_IOB_OBUF.D | 10059 | ? | 482 | 0 | nAS_IOB_OBUF | NULL | NULL | nAS_IOB_OBUF.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK- | 9506 | ? | 477 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nAS_IOB_OBUF.Q | 10062 | ? | 0 | 0 | nAS_IOB_OBUF | NULL | NULL | nAS_IOB_OBUF.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | nCAS_OBUF | MXSE_COPY_0_COPY_0 | 2424308736 | 13 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9541 | ? | 454 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK- | 9510 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 7 | 5 | II_FCLKINV
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nCAS_OBUF | 9617 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nCAS_OBUF.Q | nCAS_OBUF | 0 | 0 | MC_Q
+NODE | nCAS_OBUF | 9957 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nCAS_OBUF.Q | nCAS_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | nCAS_OBUF.EXP | 10183 | ? | 433 | 0 | MXSE_COPY_0_COPY_0 | NULL | nCAS_OBUF.EXP | nCAS_OBUF | 4 | 0 | MC_EXPORT
+NODE | nCAS_OBUF.EXP | 10585 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | nCAS_OBUF.EXP | nCAS_OBUF | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | nCAS_OBUF.SI | nCAS_OBUF | 0 | 12 | 3
+SIGNAL_INSTANCE | nCAS_OBUF.SI | nCAS_OBUF | 0 | 16 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9541 | ? | 454 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RAMDIS2 | 9867 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nCAS_OBUF.D1 | 10064 | ? | 454 | 4096 | nCAS_OBUF | NULL | NULL | nCAS_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nCAS_OBUF.D1 | 10460 | ? | 500 | 4096 | nCAS_OBUF | NULL | NULL | nCAS_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nCAS_OBUF.D2 | 10065 | ? | 454 | 4096 | nCAS_OBUF | NULL | NULL | nCAS_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | nCAS_OBUF.D2 | 10461 | ? | 500 | 4096 | nCAS_OBUF | NULL | NULL | nCAS_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_FALSE | ram/RASEL
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | nCAS_OBUF.EXP | 10170 | ? | 433 | 0 | nCAS_OBUF | NULL | NULL | nCAS_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 7 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
+SIGNAL | NODE | nCAS_OBUF.EXP | 10572 | ? | 466 | 0 | nCAS_OBUF | NULL | NULL | nCAS_OBUF.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 14 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | ram/Once | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
+SPPTERM | 14 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | ram/Once | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RAMDIS2 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf
 
 SRFF_INSTANCE | nCAS_OBUF.REG | nCAS_OBUF | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nCAS_OBUF.D | 10063 | ? | 454 | 0 | nCAS_OBUF | NULL | NULL | nCAS_OBUF.XOR | 0 | 7 | ALU_F
+NODE | nCAS_OBUF.D | 10459 | ? | 500 | 0 | nCAS_OBUF | NULL | NULL | nCAS_OBUF.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK- | 9510 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 7 | 5 | II_FCLKINV
+NODE | CLK_FSB_IBUF/FCLK- | 9840 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nCAS_OBUF.Q | 10066 | ? | 0 | 0 | nCAS_OBUF | NULL | NULL | nCAS_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | nCAS_OBUF.Q | 10462 | ? | 0 | 0 | nCAS_OBUF | NULL | NULL | nCAS_OBUF.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | nDinLE_OBUF | MXSE_COPY_0_COPY_0 | 2424308736 | 13 | 2
+MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | nDinLE_OBUF | MXSE_COPY_0_COPY_0 | 2424308736 | 7 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9546 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9548 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK- | 9506 | ? | 477 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
+NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_IOB_IBUF | 9504 | ? | 479 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9547 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/RESrf | 9930 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9566 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOBERR | 9569 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ETACK | 9578 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrf | 9576 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrr | 9577 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9587 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9588 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
+NODE | iobm/RESrr | 9931 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nDinLE_OBUF | 9618 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinLE_OBUF.Q | nDinLE_OBUF | 0 | 0 | MC_Q
+NODE | nDinLE_OBUF | 9958 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinLE_OBUF.Q | nDinLE_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | nDinLE_OBUF.EXP | 10198 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinLE_OBUF.EXP | nDinLE_OBUF | 4 | 0 | MC_EXPORT
+NODE | nDinLE_OBUF.EXP | 10601 | ? | 518 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinLE_OBUF.EXP | nDinLE_OBUF | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | nDinLE_OBUF.SI | nDinLE_OBUF | 0 | 12 | 3
+SIGNAL_INSTANCE | nDinLE_OBUF.SI | nDinLE_OBUF | 0 | 6 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd1 | 9880 | ? | 534 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9546 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9548 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | CLK_IOB_IBUF | 9868 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nBERR_IOB_IBUF | 9504 | ? | 479 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9547 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/RESrf | 9930 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_IOB_IBUF | 9566 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_IOB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOBERR | 9569 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/ETACK | 9578 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrf | 9576 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/DTACKrr | 9577 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrf | 9587 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/BERRrr | 9588 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM
+NODE | iobm/RESrr | 9931 | ? | 519 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nDinLE_OBUF.D1 | 10068 | ? | 483 | 4096 | nDinLE_OBUF | NULL | NULL | nDinLE_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nDinLE_OBUF.D1 | 10464 | ? | 534 | 4096 | nDinLE_OBUF | NULL | NULL | nDinLE_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nDinLE_OBUF.D2 | 10069 | ? | 483 | 4096 | nDinLE_OBUF | NULL | NULL | nDinLE_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd4 | IV_TRUE | iobm/IOS_FSM_FFd1
-SPPTERM | 2 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_TRUE | iobm/IOS_FSM_FFd3
+SIGNAL | NODE | nDinLE_OBUF.D2 | 10465 | ? | 534 | 4096 | nDinLE_OBUF | NULL | NULL | nDinLE_OBUF.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | nDinLE_OBUF.EXP | 10195 | ? | 468 | 0 | nDinLE_OBUF | NULL | NULL | nDinLE_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 8 | IV_TRUE | nBERR_IOB_IBUF | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | IOBERR | IV_TRUE | iobm/ETACK
-SPPTERM | 9 | IV_TRUE | nBERR_IOB_IBUF | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | IOBERR | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr
-SPPTERM | 9 | IV_TRUE | nBERR_IOB_IBUF | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | IOBERR | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr
+SIGNAL | NODE | nDinLE_OBUF.EXP | 10598 | ? | 518 | 0 | nDinLE_OBUF | NULL | NULL | nDinLE_OBUF.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 5 | IV_TRUE | CLK_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr
 
 SRFF_INSTANCE | nDinLE_OBUF.REG | nDinLE_OBUF | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nDinLE_OBUF.D | 10067 | ? | 483 | 0 | nDinLE_OBUF | NULL | NULL | nDinLE_OBUF.XOR | 0 | 7 | ALU_F
+NODE | nDinLE_OBUF.D | 10463 | ? | 534 | 0 | nDinLE_OBUF | NULL | NULL | nDinLE_OBUF.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK- | 9506 | ? | 477 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
+NODE | CLK2X_IOB_IBUF/FCLK- | 9828 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nDinLE_OBUF.Q | 10070 | ? | 0 | 0 | nDinLE_OBUF | NULL | NULL | nDinLE_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | nDinLE_OBUF.Q | 10466 | ? | 0 | 0 | nDinLE_OBUF | NULL | NULL | nDinLE_OBUF.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
-MACROCELL_INSTANCE | OptxMapped | nDinOE_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 6 | 1
+MACROCELL_INSTANCE | OptxMapped | nDinOE_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 7 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nDinOE_OBUF | 9619 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinOE_OBUF.Q | nDinOE_OBUF | 0 | 0 | MC_Q
+NODE | nDinOE_OBUF | 9959 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinOE_OBUF.Q | nDinOE_OBUF | 0 | 0 | MC_Q
 
-SIGNAL_INSTANCE | nDinOE_OBUF.SI | nDinOE_OBUF | 0 | 6 | 2
+SIGNAL_INSTANCE | nDinOE_OBUF.SI | nDinOE_OBUF | 0 | 7 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nDinOE_OBUF.D1 | 10072 | ? | 0 | 4096 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nDinOE_OBUF.D1 | 10468 | ? | 0 | 4096 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nDinOE_OBUF.D2 | 10073 | ? | 0 | 4096 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | nDinOE_OBUF.D2 | 10469 | ? | 0 | 4096 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 3 | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF
 SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF
+SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | SW_1_IBUF
 
 SRFF_INSTANCE | nDinOE_OBUF.REG | nDinOE_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nDinOE_OBUF.D | 10071 | ? | 0 | 0 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.XOR | 0 | 7 | ALU_F
+NODE | nDinOE_OBUF.D | 10467 | ? | 0 | 0 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nDinOE_OBUF.Q | 10074 | ? | 0 | 0 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | nDinOE_OBUF.Q | 10470 | ? | 0 | 0 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.REG | 0 | 8 | SRFF_Q
 
-MACROCELL_INSTANCE | PrldLow+OptxMapped | nDoutOE_OBUF | MXSE_COPY_0_COPY_0 | 2155873280 | 5 | 1
+MACROCELL_INSTANCE | PrldLow+OptxMapped | nDoutOE_OBUF | MXSE_COPY_0_COPY_0 | 2155873280 | 4 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9516 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
+NODE | IORW0 | 9846 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9546 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9547 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nDoutOE_OBUF | 9620 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDoutOE_OBUF.Q | nDoutOE_OBUF | 0 | 0 | MC_Q
+NODE | nDoutOE_OBUF | 9960 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDoutOE_OBUF.Q | nDoutOE_OBUF | 0 | 0 | MC_Q
 
-SIGNAL_INSTANCE | nDoutOE_OBUF.SI | nDoutOE_OBUF | 0 | 4 | 2
+SIGNAL_INSTANCE | nDoutOE_OBUF.SI | nDoutOE_OBUF | 0 | 3 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9516 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
+NODE | IORW0 | 9846 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd3 | 9879 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9546 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9547 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobm/IOS_FSM_FFd2 | 9881 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nDoutOE_OBUF.D1 | 10076 | ? | 484 | 4096 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nDoutOE_OBUF.D1 | 10472 | ? | 535 | 4096 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nDoutOE_OBUF.D2 | 10077 | ? | 484 | 4096 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | nDoutOE_OBUF.D2 | 10473 | ? | 535 | 4096 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_FALSE | IORW0
-SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2
+SPPTERM | 2 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2
 
 SRFF_INSTANCE | nDoutOE_OBUF.REG | nDoutOE_OBUF | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nDoutOE_OBUF.D | 10075 | ? | 484 | 0 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.XOR | 0 | 7 | ALU_F
+NODE | nDoutOE_OBUF.D | 10471 | ? | 535 | 0 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK | 9505 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nDoutOE_OBUF.Q | 10078 | ? | 0 | 0 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | nDoutOE_OBUF.Q | 10474 | ? | 0 | 0 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.REG | 0 | 8 | SRFF_Q
 TNAME | CLK2X_IOB
 
-MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | nLDS_IOB_OBUF | MXSE_COPY_0_COPY_0 | 2424308736 | 7 | 1
+MACROCELL_INSTANCE | Inv+OptxMapped | nRAS_OBUF | MXSE_COPY_0_COPY_0 | 2155872512 | 14 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOL0 | 9520 | ? | 485 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOL0.Q | IOL0 | 1 | 0 | MC_UIM
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9546 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9548 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9547 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9516 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK- | 9506 | ? | 477 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nRAMLWE_OBUF.EXP | 10639 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.EXP | nRAMLWE_OBUF | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nLDS_IOB_OBUF | 9621 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nLDS_IOB_OBUF.Q | nLDS_IOB_OBUF | 0 | 0 | MC_Q
+NODE | nRAS_OBUF | 9961 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.Q | nRAS_OBUF | 0 | 0 | MC_Q
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | nRAS_OBUF.EXP | 10638 | ? | 472 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.EXP | nRAS_OBUF | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | nLDS_IOB_OBUF.SI | nLDS_IOB_OBUF | 0 | 6 | 2
+SIGNAL_INSTANCE | nRAS_OBUF.SI | nRAS_OBUF | 0 | 14 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOL0 | 9520 | ? | 485 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOL0.Q | IOL0 | 1 | 0 | MC_UIM
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9546 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9548 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9547 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9516 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nRAMLWE_OBUF.EXP | 10639 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.EXP | nRAMLWE_OBUF | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nLDS_IOB_OBUF.D1 | 10080 | ? | 485 | 4096 | nLDS_IOB_OBUF | NULL | NULL | nLDS_IOB_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nRAS_OBUF.D1 | 10476 | ? | 0 | 4096 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nLDS_IOB_OBUF.D2 | 10081 | ? | 485 | 4096 | nLDS_IOB_OBUF | NULL | NULL | nLDS_IOB_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_FALSE | IOL0
-SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2
-SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1
-SPPTERM | 4 | IV_TRUE | IORW0 | IV_TRUE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOS_FSM_FFd1
-
-SRFF_INSTANCE | nLDS_IOB_OBUF.REG | nLDS_IOB_OBUF | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nLDS_IOB_OBUF.D | 10079 | ? | 485 | 0 | nLDS_IOB_OBUF | NULL | NULL | nLDS_IOB_OBUF.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK- | 9506 | ? | 477 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nLDS_IOB_OBUF.Q | 10082 | ? | 0 | 0 | nLDS_IOB_OBUF | NULL | NULL | nLDS_IOB_OBUF.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | Inv+OptxMapped | nRAS_OBUF | MXSE_COPY_0_COPY_0 | 2155872512 | 8 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RefAck | 9574 | ? | 402 | 0 | MXSE_COPY_0_COPY_0 | NULL | RefAck.Q | RefAck | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS2 | 9537 | ? | 427 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS1 | 9592 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nRAS_OBUF | 9622 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.Q | nRAS_OBUF | 0 | 0 | MC_Q
-
-SIGNAL_INSTANCE | nRAS_OBUF.SI | nRAS_OBUF | 0 | 8 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | RefAck | 9574 | ? | 402 | 0 | MXSE_COPY_0_COPY_0 | NULL | RefAck.Q | RefAck | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS2 | 9537 | ? | 427 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS1 | 9592 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nRAS_OBUF.D1 | 10084 | ? | 0 | 4096 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nRAS_OBUF.D2 | 10085 | ? | 0 | 4096 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | RefAck
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RAMDIS1
-SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RAMDIS1
+SIGNAL | NODE | nRAS_OBUF.D2 | 10477 | ? | 0 | 4096 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | nRAMLWE_OBUF.EXP
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | nRAS_OBUF.EXP | 10625 | ? | 472 | 0 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
+SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
+SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_TRUE | SW_1_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
+SPPTERM | 7 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
+SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
 
 SRFF_INSTANCE | nRAS_OBUF.REG | nRAS_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nRAS_OBUF.D | 10083 | ? | 0 | 0 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.XOR | 0 | 7 | ALU_F
+NODE | nRAS_OBUF.D | 10475 | ? | 0 | 0 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nRAS_OBUF.Q | 10086 | ? | 0 | 0 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | nRAS_OBUF.Q | 10478 | ? | 0 | 0 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.REG | 0 | 8 | SRFF_Q
 
-MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | nUDS_IOB_OBUF | MXSE_COPY_0_COPY_0 | 2424308736 | 7 | 1
+MACROCELL_INSTANCE | OptxMapped | A_FSB_19_IBUF$BUF0 | MXSE_COPY_0_COPY_0 | 2155872256 | 7 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOU0 | 9521 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOU0.Q | IOU0 | 1 | 0 | MC_UIM
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9546 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9548 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9547 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9516 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
+NODE | IORW0 | 9846 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK2X_IOB_IBUF/FCLK- | 9506 | ? | 477 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nUDS_IOB_OBUF | 9623 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nUDS_IOB_OBUF.Q | nUDS_IOB_OBUF | 0 | 0 | MC_Q
-
-SIGNAL_INSTANCE | nUDS_IOB_OBUF.SI | nUDS_IOB_OBUF | 0 | 6 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IOU0 | 9521 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | IOU0.Q | IOU0 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd4 | 9543 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd4.Q | iobm/IOS_FSM_FFd4 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd3 | 9546 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd1 | 9548 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobm/IOS_FSM_FFd2 | 9547 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9516 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nUDS_IOB_OBUF.D1 | 10088 | ? | 486 | 4096 | nUDS_IOB_OBUF | NULL | NULL | nUDS_IOB_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nUDS_IOB_OBUF.D2 | 10089 | ? | 486 | 4096 | nUDS_IOB_OBUF | NULL | NULL | nUDS_IOB_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_FALSE | IOU0
-SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2
-SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1
-SPPTERM | 4 | IV_TRUE | IORW0 | IV_TRUE | iobm/IOS_FSM_FFd4 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOS_FSM_FFd1
-
-SRFF_INSTANCE | nUDS_IOB_OBUF.REG | nUDS_IOB_OBUF | 0 | 2 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nUDS_IOB_OBUF.D | 10087 | ? | 486 | 0 | nUDS_IOB_OBUF | NULL | NULL | nUDS_IOB_OBUF.XOR | 0 | 7 | ALU_F
-INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK2X_IOB_IBUF/FCLK- | 9506 | ? | 477 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 7 | 5 | II_FCLKINV
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nUDS_IOB_OBUF.Q | 10090 | ? | 0 | 0 | nUDS_IOB_OBUF | NULL | NULL | nUDS_IOB_OBUF.REG | 0 | 8 | SRFF_Q
-TNAME | CLK2X_IOB
-
-MACROCELL_INSTANCE | OptxMapped | A_FSB_19_IBUF$BUF0 | MXSE_COPY_0_COPY_0 | 2155872256 | 13 | 2
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9565 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r.EXP | 10233 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.EXP | fsb/BERR0r | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | A_FSB_19_IBUF$BUF0 | 9624 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.Q | A_FSB_19_IBUF$BUF0 | 0 | 0 | MC_Q
+NODE | A_FSB_19_IBUF$BUF0 | 9962 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.Q | A_FSB_19_IBUF$BUF0 | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | A_FSB_19_IBUF$BUF0.EXP | 10232 | ? | 429 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.EXP | A_FSB_19_IBUF$BUF0 | 4 | 0 | MC_EXPORT
+NODE | A_FSB_19_IBUF$BUF0.EXP | 10636 | ? | 444 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.EXP | A_FSB_19_IBUF$BUF0 | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | A_FSB_19_IBUF$BUF0.SI | A_FSB_19_IBUF$BUF0 | 0 | 13 | 3
+SIGNAL_INSTANCE | A_FSB_19_IBUF$BUF0.SI | A_FSB_19_IBUF$BUF0 | 0 | 7 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9565 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+NODE | IORW0 | 9846 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r.EXP | 10233 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.EXP | fsb/BERR0r | 4 | 0 | MC_EXPORT
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | A_FSB_19_IBUF$BUF0.D1 | 10092 | ? | 0 | 4096 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | A_FSB_19_IBUF$BUF0.D1 | 10480 | ? | 0 | 4096 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | A_FSB_19_IBUF$BUF0.D2 | 10093 | ? | 0 | 4096 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_TRUE | fsb/BERR0r.EXP
+SIGNAL | NODE | A_FSB_19_IBUF$BUF0.D2 | 10481 | ? | 0 | 4096 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | A_FSB_19_IBUF
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | A_FSB_19_IBUF$BUF0.EXP | 10221 | ? | 429 | 0 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
-SPPTERM | 7 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
-SPPTERM | 7 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
-SPPTERM | 8 | IV_FALSE | cnt/RefDone | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_FALSE | fsb/ASrf
-SPPTERM | 8 | IV_FALSE | cnt/RefDone | IV_TRUE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_FALSE | fsb/ASrf
+SIGNAL | NODE | A_FSB_19_IBUF$BUF0.EXP | 10623 | ? | 444 | 0 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 1 | IV_TRUE | iobs/PS_FSM_FFd2
+SPPTERM | 1 | IV_TRUE | iobs/PS_FSM_FFd1
+SPPTERM | 2 | IV_TRUE | iobs/Once | IV_TRUE | ALE1
+SPPTERM | 3 | IV_TRUE | IORW0 | IV_TRUE | nWE_FSB_IBUF | IV_TRUE | ALE1
 
 SRFF_INSTANCE | A_FSB_19_IBUF$BUF0.REG | A_FSB_19_IBUF$BUF0 | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | A_FSB_19_IBUF$BUF0.D | 10091 | ? | 0 | 0 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.XOR | 0 | 7 | ALU_F
+NODE | A_FSB_19_IBUF$BUF0.D | 10479 | ? | 0 | 0 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | A_FSB_19_IBUF$BUF0.Q | 10094 | ? | 0 | 0 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.REG | 0 | 8 | SRFF_Q
+NODE | A_FSB_19_IBUF$BUF0.Q | 10482 | ? | 0 | 0 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | OptxMapped | A_FSB_21_IBUF$BUF0 | MXSE_COPY_0_COPY_0 | 2155872256 | 6 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9488 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9541 | ? | 454 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | A_FSB_21_IBUF$BUF0 | 9625 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.Q | A_FSB_21_IBUF$BUF0 | 0 | 0 | MC_Q
+NODE | A_FSB_21_IBUF$BUF0 | 9963 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.Q | A_FSB_21_IBUF$BUF0 | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | A_FSB_21_IBUF$BUF0.EXP | 10213 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.EXP | A_FSB_21_IBUF$BUF0 | 4 | 0 | MC_EXPORT
+NODE | A_FSB_21_IBUF$BUF0.EXP | 10614 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.EXP | A_FSB_21_IBUF$BUF0 | 4 | 0 | MC_EXPORT
 
 SIGNAL_INSTANCE | A_FSB_21_IBUF$BUF0.SI | A_FSB_21_IBUF$BUF0 | 0 | 6 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9488 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9541 | ? | 454 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | A_FSB_21_IBUF$BUF0.D1 | 10096 | ? | 0 | 4096 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | A_FSB_21_IBUF$BUF0.D1 | 10484 | ? | 0 | 4096 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | A_FSB_21_IBUF$BUF0.D2 | 10097 | ? | 0 | 4096 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | A_FSB_21_IBUF$BUF0.D2 | 10485 | ? | 0 | 4096 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | A_FSB_21_IBUF
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | A_FSB_21_IBUF$BUF0.EXP | 10202 | ? | 0 | 0 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.SI | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | A_FSB_21_IBUF$BUF0.EXP | 10604 | ? | 0 | 0 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 5 | IV_TRUE | A_FSB_9_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_TRUE | ram/RASEL
 SPPTERM | 6 | IV_TRUE | A_FSB_9_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_TRUE | ram/RASEL
 
 SRFF_INSTANCE | A_FSB_21_IBUF$BUF0.REG | A_FSB_21_IBUF$BUF0 | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | A_FSB_21_IBUF$BUF0.D | 10095 | ? | 0 | 0 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.XOR | 0 | 7 | ALU_F
+NODE | A_FSB_21_IBUF$BUF0.D | 10483 | ? | 0 | 0 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | A_FSB_21_IBUF$BUF0.Q | 10098 | ? | 0 | 0 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.REG | 0 | 8 | SRFF_Q
+NODE | A_FSB_21_IBUF$BUF0.Q | 10486 | ? | 0 | 0 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.REG | 0 | 8 | SRFF_Q
+
+INPUT_INSTANCE | 0 | 0 | NULL | CLK20EN_OBUF | MXSE_COPY_0_COPY_0 | 16 | 1 | 1
+INPUT_NODE_TYPE | 0 | 5 | II_IN
+NODE | SW<0> | 10051 | PI | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE
+OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX
+NODE | CLK20EN_OBUF | 9964 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK20EN_OBUF | 0 | 5 | II_IMUX
+
+MACROCELL_INSTANCE | OptxMapped | CLK20EN_OBUF$BUF0 | MXSE_COPY_0_COPY_0 | 2155872256 | 10 | 2
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | CLK20EN_OBUF | 9964 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK20EN_OBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
+NODE | CLK20EN_OBUF$BUF0 | 9965 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | CLK20EN_OBUF$BUF0.Q | CLK20EN_OBUF$BUF0 | 0 | 0 | MC_Q
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | CLK20EN_OBUF$BUF0.EXP | 10617 | ? | 471 | 0 | MXSE_COPY_0_COPY_0 | NULL | CLK20EN_OBUF$BUF0.EXP | CLK20EN_OBUF$BUF0 | 4 | 0 | MC_EXPORT
+
+SIGNAL_INSTANCE | CLK20EN_OBUF$BUF0.SI | CLK20EN_OBUF$BUF0 | 0 | 10 | 3
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | CLK20EN_OBUF | 9964 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK20EN_OBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | CLK20EN_OBUF$BUF0.D1 | 10488 | ? | 0 | 4096 | CLK20EN_OBUF$BUF0 | NULL | NULL | CLK20EN_OBUF$BUF0.SI | 1 | 9 | MC_SI_D1
+SPPTERM | 0 | IV_ZERO
+OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | CLK20EN_OBUF$BUF0.D2 | 10489 | ? | 0 | 4096 | CLK20EN_OBUF$BUF0 | NULL | NULL | CLK20EN_OBUF$BUF0.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | CLK20EN_OBUF
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | CLK20EN_OBUF$BUF0.EXP | 10607 | ? | 471 | 0 | CLK20EN_OBUF$BUF0 | NULL | NULL | CLK20EN_OBUF$BUF0.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 8 | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
+SPPTERM | 8 | IV_FALSE | cnt/RefDone | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_TRUE | fsb/ASrf
+
+SRFF_INSTANCE | CLK20EN_OBUF$BUF0.REG | CLK20EN_OBUF$BUF0 | 0 | 1 | 1
+INPUT_NODE_TYPE | 0 | 8 | SRFF_D
+NODE | CLK20EN_OBUF$BUF0.D | 10487 | ? | 0 | 0 | CLK20EN_OBUF$BUF0 | NULL | NULL | CLK20EN_OBUF$BUF0.XOR | 0 | 7 | ALU_F
+OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
+NODE | CLK20EN_OBUF$BUF0.Q | 10490 | ? | 0 | 0 | CLK20EN_OBUF$BUF0 | NULL | NULL | CLK20EN_OBUF$BUF0.REG | 0 | 8 | SRFF_Q
+
+MACROCELL_INSTANCE | OptxMapped | CLK25EN_OBUF | MXSE_COPY_0_COPY_0 | 2155872256 | 9 | 2
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | CLK20EN_OBUF | 9964 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK20EN_OBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
+NODE | CLK25EN_OBUF | 9966 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | CLK25EN_OBUF.Q | CLK25EN_OBUF | 0 | 0 | MC_Q
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | CLK25EN_OBUF.EXP | 10616 | ? | 471 | 0 | MXSE_COPY_0_COPY_0 | NULL | CLK25EN_OBUF.EXP | CLK25EN_OBUF | 4 | 0 | MC_EXPORT
+
+SIGNAL_INSTANCE | CLK25EN_OBUF.SI | CLK25EN_OBUF | 0 | 9 | 3
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | CLK20EN_OBUF | 9964 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK20EN_OBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | CLK25EN_OBUF.D1 | 10492 | ? | 0 | 4096 | CLK25EN_OBUF | NULL | NULL | CLK25EN_OBUF.SI | 1 | 9 | MC_SI_D1
+SPPTERM | 0 | IV_ZERO
+OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | CLK25EN_OBUF.D2 | 10493 | ? | 0 | 4096 | CLK25EN_OBUF | NULL | NULL | CLK25EN_OBUF.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_FALSE | CLK20EN_OBUF
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | CLK25EN_OBUF.EXP | 10606 | ? | 471 | 0 | CLK25EN_OBUF | NULL | NULL | CLK25EN_OBUF.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
+SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
+SPPTERM | 5 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
+SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | fsb/ASrf
+
+SRFF_INSTANCE | CLK25EN_OBUF.REG | CLK25EN_OBUF | 0 | 1 | 1
+INPUT_NODE_TYPE | 0 | 8 | SRFF_D
+NODE | CLK25EN_OBUF.D | 10491 | ? | 0 | 0 | CLK25EN_OBUF | NULL | NULL | CLK25EN_OBUF.XOR | 0 | 7 | ALU_F
+OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
+NODE | CLK25EN_OBUF.Q | 10494 | ? | 0 | 0 | CLK25EN_OBUF | NULL | NULL | CLK25EN_OBUF.REG | 0 | 8 | SRFF_Q
+
+MACROCELL_INSTANCE | PrldHigh+OptxMapped | Park | MXSE_COPY_0_COPY_0 | 2155872768 | 14 | 3
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | RESr0 | 9901 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr0.Q | RESr0 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | RESr1 | 9902 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr1.Q | RESr1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | IPL2r0 | 9908 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | IPL2r0.Q | IPL2r0 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | RESr2 | 9909 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr2.Q | RESr2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | RESDone | 9921 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESDone.Q | RESDone | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | IPL2r1 | 9925 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | IPL2r1.Q | IPL2r1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
+NODE | Park | 9967 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 0 | 0 | MC_Q
+OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
+NODE | Disable | 9968 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | Park.EXP | 10646 | ? | 440 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.EXP | Park | 4 | 0 | MC_EXPORT
+
+SIGNAL_INSTANCE | Park.SI | Park | 0 | 13 | 4
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | RESr0 | 9901 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr0.Q | RESr0 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | RESr1 | 9902 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr1.Q | RESr1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | IPL2r0 | 9908 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | IPL2r0.Q | IPL2r0 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | RESr2 | 9909 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESr2.Q | RESr2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | RESDone | 9921 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESDone.Q | RESDone | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | IPL2r1 | 9925 | ? | 502 | 0 | MXSE_COPY_0_COPY_0 | NULL | IPL2r1.Q | IPL2r1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | Park.D1 | 10496 | ? | 501 | 4096 | Park | NULL | NULL | Park.SI | 1 | 9 | MC_SI_D1
+SPPTERM | 0 | IV_ZERO
+OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | Park.D2 | 10497 | ? | 501 | 6144 | Park | NULL | NULL | Park.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 0 | IV_ZERO
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | Park.EXP | 10633 | ? | 440 | 0 | Park | NULL | NULL | Park.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF | IV_FALSE | iobs/Once
+SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF | IV_FALSE | iobs/Once
+SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF | IV_FALSE | iobs/Once
+SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF | IV_FALSE | iobs/Once
+OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
+SIGNAL | NODE | Park.CE | 10498 | ? | 502 | 4096 | Park | NULL | NULL | Park.SI | 10 | 9 | MC_SI_CE
+SPPTERM | 6 | IV_TRUE | RESr0 | IV_TRUE | RESr1 | IV_TRUE | IPL2r0 | IV_TRUE | RESr2 | IV_FALSE | RESDone | IV_TRUE | IPL2r1
+
+SRFF_INSTANCE | Park.REG | Park | 0 | 3 | 1
+INPUT_NODE_TYPE | 0 | 8 | SRFF_D
+NODE | Park.D | 10495 | ? | 501 | 0 | Park | NULL | NULL | Park.XOR | 0 | 7 | ALU_F
+INPUT_NODE_TYPE | 1 | 8 | SRFF_C
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
+SIGNAL | NODE | Park.CE | 10498 | ? | 502 | 4096 | Park | NULL | NULL | Park.SI | 10 | 9 | MC_SI_CE
+SPPTERM | 6 | IV_TRUE | RESr0 | IV_TRUE | RESr1 | IV_TRUE | IPL2r0 | IV_TRUE | RESr2 | IV_FALSE | RESDone | IV_TRUE | IPL2r1
+OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
+NODE | Park.Q | 10499 | ? | 467 | 0 | Park | NULL | NULL | Park.REG | 0 | 8 | SRFF_Q
+TNAME | CLK_FSB
 
 MACROCELL_INSTANCE | Inv+PrldHigh+OptxMapped | nADoutLE1_OBUF | MXSE_COPY_0_COPY_0 | 2155873024 | 4 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Clear1 | 9591 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Clear1.Q | iobs/Clear1 | 1 | 0 | MC_UIM
+NODE | iobs/Clear1 | 9932 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Clear1.Q | iobs/Clear1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Load1 | 9564 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
+NODE | iobs/Load1 | 9897 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nADoutLE1_OBUF | 9626 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 0 | 0 | MC_Q
+NODE | nADoutLE1_OBUF | 9969 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 
 SIGNAL_INSTANCE | nADoutLE1_OBUF.SI | nADoutLE1_OBUF | 0 | 3 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Clear1 | 9591 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Clear1.Q | iobs/Clear1 | 1 | 0 | MC_UIM
+NODE | iobs/Clear1 | 9932 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Clear1.Q | iobs/Clear1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Load1 | 9564 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
+NODE | iobs/Load1 | 9897 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nADoutLE1_OBUF.D1 | 10100 | ? | 455 | 4096 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nADoutLE1_OBUF.D1 | 10501 | ? | 503 | 4096 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nADoutLE1_OBUF.D2 | 10101 | ? | 455 | 4096 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | nADoutLE1_OBUF.D2 | 10502 | ? | 503 | 4096 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 1 | IV_TRUE | iobs/Load1
 SPPTERM | 2 | IV_FALSE | iobs/Clear1 | IV_FALSE | ALE1
 
 SRFF_INSTANCE | nADoutLE1_OBUF.REG | nADoutLE1_OBUF | 0 | 2 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nADoutLE1_OBUF.D | 10099 | ? | 455 | 0 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.XOR | 0 | 7 | ALU_F
+NODE | nADoutLE1_OBUF.D | 10500 | ? | 503 | 0 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.XOR | 0 | 7 | ALU_F
 INPUT_NODE_TYPE | 1 | 8 | SRFF_C
-NODE | CLK_FSB_IBUF/FCLK | 9509 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
+NODE | CLK_FSB_IBUF/FCLK | 9839 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK_FSB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nADoutLE1_OBUF.Q | 10102 | ? | 455 | 0 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | nADoutLE1_OBUF.Q | 10503 | ? | 503 | 0 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.REG | 0 | 8 | SRFF_Q
 TNAME | CLK_FSB
 
-MACROCELL_INSTANCE | Inv+OptxMapped | nRAMLWE_OBUF | MXSE_COPY_0_COPY_0 | 2155872512 | 5 | 1
+MACROCELL_INSTANCE | PrldHigh+OptxMapped | nAoutOE_OBUF | MXSE_COPY_0_COPY_0 | 2155872768 | 5 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/BGr1 | 9929 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BGr1.Q | iobm/BGr1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nLDS_FSB_IBUF | 9531 | ? | 421 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS2 | 9537 | ? | 427 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
+NODE | iobm/BGr0 | 9912 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BGr0.Q | iobm/BGr0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_IOBout | 9833 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAS_IOBout.Q | nAS_IOBout | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS1 | 9592 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nRAMLWE_OBUF | 9628 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.Q | nRAMLWE_OBUF | 0 | 0 | MC_Q
+NODE | nAoutOE_OBUF$Q | 9971 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 0 | 0 | MC_Q
+OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
+NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | nRAMLWE_OBUF.SI | nRAMLWE_OBUF | 0 | 5 | 2
+SIGNAL_INSTANCE | nAoutOE_OBUF.SI | nAoutOE_OBUF | 0 | 4 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/BGr1 | 9929 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BGr1.Q | iobm/BGr1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nLDS_FSB_IBUF | 9531 | ? | 421 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | iobm/BG | 9972 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS2 | 9537 | ? | 427 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
+NODE | iobm/BGr0 | 9912 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobm/BGr0.Q | iobm/BGr0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS1 | 9592 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM
+NODE | nAS_IOBout | 9833 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAS_IOBout.Q | nAS_IOBout | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nRAMLWE_OBUF.D1 | 10104 | ? | 0 | 4096 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nAoutOE_OBUF.D1 | 10505 | ? | 536 | 4096 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nRAMLWE_OBUF.D2 | 10105 | ? | 0 | 4096 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | nAoutOE_OBUF.D2 | 10506 | ? | 536 | 4096 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 2 | IV_FALSE | iobm/BGr0 | IV_FALSE | iobm/BGr1
+SPPTERM | 2 | IV_FALSE | iobm/BGr1 | IV_TRUE | iobm/BG
+SPPTERM | 3 | IV_FALSE | nAS_IOBout | IV_FALSE | iobm/BGr0 | IV_FALSE | iobm/BG
+
+SRFF_INSTANCE | nAoutOE_OBUF.REG | nAoutOE_OBUF | 0 | 2 | 1
+INPUT_NODE_TYPE | 0 | 8 | SRFF_D
+NODE | nAoutOE_OBUF.D | 10504 | ? | 536 | 0 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.XOR | 0 | 7 | ALU_F
+INPUT_NODE_TYPE | 1 | 8 | SRFF_C
+NODE | CLK2X_IOB_IBUF/FCLK | 9827 | ? | 536 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK2X_IOB_IBUF | 3 | 5 | II_FCLK
+OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
+NODE | nAoutOE_OBUF.Q | 10507 | ? | 536 | 0 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.REG | 0 | 8 | SRFF_Q
+TNAME | CLK2X_IOB
+
+MACROCELL_INSTANCE | Inv+OptxMapped | nRAMLWE_OBUF | MXSE_COPY_0_COPY_0 | 2155872512 | 10 | 2
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nLDS_FSB_IBUF | 9861 | ? | 460 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RAMDIS2 | 9867 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RAMDIS1 | 9933 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | RefAck | 9910 | ? | 439 | 0 | MXSE_COPY_0_COPY_0 | NULL | RefAck.Q | RefAck | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
+NODE | nRAMLWE_OBUF | 9973 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.Q | nRAMLWE_OBUF | 0 | 0 | MC_Q
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | nRAMLWE_OBUF.EXP | 10639 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.EXP | nRAMLWE_OBUF | 4 | 0 | MC_EXPORT
+
+SIGNAL_INSTANCE | nRAMLWE_OBUF.SI | nRAMLWE_OBUF | 0 | 10 | 3
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nLDS_FSB_IBUF | 9861 | ? | 460 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RAMDIS2 | 9867 | ? | 466 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RAMDIS1 | 9933 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | RefAck | 9910 | ? | 439 | 0 | MXSE_COPY_0_COPY_0 | NULL | RefAck.Q | RefAck | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nRAMLWE_OBUF.D1 | 10509 | ? | 0 | 4096 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.SI | 1 | 9 | MC_SI_D1
+SPPTERM | 0 | IV_ZERO
+OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | nRAMLWE_OBUF.D2 | 10510 | ? | 0 | 4096 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 5 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nLDS_FSB_IBUF | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RAMDIS1
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | nRAMLWE_OBUF.EXP | 10626 | ? | 0 | 0 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 1 | IV_TRUE | RefAck
+SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RAMDIS1
+SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RAMDIS1
 
 SRFF_INSTANCE | nRAMLWE_OBUF.REG | nRAMLWE_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nRAMLWE_OBUF.D | 10103 | ? | 0 | 0 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.XOR | 0 | 7 | ALU_F
+NODE | nRAMLWE_OBUF.D | 10508 | ? | 0 | 0 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nRAMLWE_OBUF.Q | 10106 | ? | 0 | 0 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | nRAMLWE_OBUF.Q | 10511 | ? | 0 | 0 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.REG | 0 | 8 | SRFF_Q
 
 MACROCELL_INSTANCE | Inv+OptxMapped | nRAMUWE_OBUF | MXSE_COPY_0_COPY_0 | 2155872512 | 10 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nUDS_FSB_IBUF | 9535 | ? | 425 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS2 | 9537 | ? | 427 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS1 | 9592 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | RESDone.EXP | 10640 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESDone.EXP | RESDone | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nRAMUWE_OBUF | 9629 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.Q | nRAMUWE_OBUF | 0 | 0 | MC_Q
+NODE | nRAMUWE_OBUF | 9974 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.Q | nRAMUWE_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | nRAMUWE_OBUF.EXP | 10234 | ? | 443 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.EXP | nRAMUWE_OBUF | 4 | 0 | MC_EXPORT
+NODE | nRAMUWE_OBUF.EXP | 10641 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.EXP | nRAMUWE_OBUF | 4 | 0 | MC_EXPORT
 
 SIGNAL_INSTANCE | nRAMUWE_OBUF.SI | nRAMUWE_OBUF | 0 | 10 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nUDS_FSB_IBUF | 9535 | ? | 425 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS2 | 9537 | ? | 427 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.Q | ram/RAMDIS2 | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS1 | 9592 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS1.Q | ram/RAMDIS1 | 1 | 0 | MC_UIM
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | RESDone.EXP | 10640 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RESDone.EXP | RESDone | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nRAMUWE_OBUF.D1 | 10108 | ? | 0 | 4096 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nRAMUWE_OBUF.D1 | 10513 | ? | 0 | 4096 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nRAMUWE_OBUF.D2 | 10109 | ? | 0 | 4096 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 5 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nUDS_FSB_IBUF | IV_FALSE | ram/RAMDIS2 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RAMDIS1
+SIGNAL | NODE | nRAMUWE_OBUF.D2 | 10514 | ? | 0 | 4096 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | RESDone.EXP
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | nRAMUWE_OBUF.EXP | 10223 | ? | 443 | 0 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | nWE_FSB_IBUF
+SIGNAL | NODE | nRAMUWE_OBUF.EXP | 10628 | ? | 493 | 0 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
+SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
+SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
+SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
+SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
 
 SRFF_INSTANCE | nRAMUWE_OBUF.REG | nRAMUWE_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nRAMUWE_OBUF.D | 10107 | ? | 0 | 0 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.XOR | 0 | 7 | ALU_F
+NODE | nRAMUWE_OBUF.D | 10512 | ? | 0 | 0 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nRAMUWE_OBUF.Q | 10110 | ? | 0 | 0 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | nRAMUWE_OBUF.Q | 10515 | ? | 0 | 0 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.REG | 0 | 8 | SRFF_Q
 
-MACROCELL_INSTANCE | Inv+OptxMapped | nROMCS_OBUF | MXSE_COPY_0_COPY_0 | 2155872512 | 19 | 2
+MACROCELL_INSTANCE | Inv+OptxMapped | nROMCS_OBUF | MXSE_COPY_0_COPY_0 | 2155872512 | 13 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9516 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefCnt<7>.EXP | 10584 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.EXP | cnt/RefCnt<7> | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nROMCS_OBUF | 9630 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.Q | nROMCS_OBUF | 0 | 0 | MC_Q
+NODE | nROMCS_OBUF | 9975 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.Q | nROMCS_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | nROMCS_OBUF.EXP | 10181 | ? | 405 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.EXP | nROMCS_OBUF | 4 | 0 | MC_EXPORT
+NODE | nROMCS_OBUF.EXP | 10583 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.EXP | nROMCS_OBUF | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | nROMCS_OBUF.SI | nROMCS_OBUF | 0 | 19 | 3
+SIGNAL_INSTANCE | nROMCS_OBUF.SI | nROMCS_OBUF | 0 | 13 | 3
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9516 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefCnt<7>.EXP | 10584 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.EXP | cnt/RefCnt<7> | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nROMCS_OBUF.D1 | 10112 | ? | 0 | 4096 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | nROMCS_OBUF.D1 | 10517 | ? | 0 | 4096 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nROMCS_OBUF.D2 | 10113 | ? | 0 | 4096 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | cs/nOverlay1
+SIGNAL | NODE | nROMCS_OBUF.D2 | 10518 | ? | 0 | 4096 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | cnt/RefCnt<7>.EXP
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | nROMCS_OBUF.EXP | 10168 | ? | 405 | 0 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 16 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/Once | IV_TRUE | IORW0 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1
-SPPTERM | 16 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/Once | IV_TRUE | IORW0 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 16 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/Once | IV_TRUE | IORW0 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1
+SIGNAL | NODE | nROMCS_OBUF.EXP | 10570 | ? | 468 | 0 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
+SPPTERM | 7 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
+SPPTERM | 7 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
+SPPTERM | 8 | IV_FALSE | cnt/RefDone | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_FALSE | fsb/ASrf
+SPPTERM | 8 | IV_FALSE | cnt/RefDone | IV_TRUE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_FALSE | fsb/ASrf
 
 SRFF_INSTANCE | nROMCS_OBUF.REG | nROMCS_OBUF | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nROMCS_OBUF.D | 10111 | ? | 0 | 0 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.XOR | 0 | 7 | ALU_F
+NODE | nROMCS_OBUF.D | 10516 | ? | 0 | 0 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nROMCS_OBUF.Q | 10114 | ? | 0 | 0 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.REG | 0 | 8 | SRFF_Q
+NODE | nROMCS_OBUF.Q | 10519 | ? | 0 | 0 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.REG | 0 | 8 | SRFF_Q
 
-MACROCELL_INSTANCE | FbkInv+Merge+OptxMapped | nAoutOE_OBUF | MXSE_COPY_0_COPY_0 | 2155907072 | 0 | 1
-OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
-NODE | nAoutOE_OBUF$Q | 9631 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 0 | 0 | MC_Q
-
-SIGNAL_INSTANCE | nAoutOE_OBUF.SI | nAoutOE_OBUF | 0 | 0 | 2
-OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | nAoutOE_OBUF.D1 | 10116 | ? | 0 | 4096 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.SI | 1 | 9 | MC_SI_D1
-SPPTERM | 0 | IV_ZERO
-OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | nAoutOE_OBUF.D2 | 10117 | ? | 0 | 4096 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 0 | IV_ZERO
-
-SRFF_INSTANCE | nAoutOE_OBUF.REG | nAoutOE_OBUF | 0 | 1 | 1
-INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | nAoutOE_OBUF.D | 10115 | ? | 0 | 0 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.XOR | 0 | 7 | ALU_F
-OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | nAoutOE_OBUF.Q | 10118 | ? | 0 | 0 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.REG | 0 | 8 | SRFF_Q
-
-OUTPUT_INSTANCE | 0 | nVMA_IOB | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
+OUTPUT_INSTANCE | 0 | nVMA_IOB | MXSE_COPY_0_COPY_0 | 7 | 2 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nVMA_IOB_OBUF$Q | 9507 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOB_OBUF.Q | nVMA_IOB_OBUF | 0 | 0 | MC_Q
+NODE | nVMA_IOBout$Q | 9829 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOBout.Q | nVMA_IOBout | 0 | 0 | MC_Q
+INPUT_NODE_TYPE | 2 | 6 | OI_OE
+NODE | nVMA_IOBout$OE | 9831 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVMA_IOBout.BUFOE.OUT | nVMA_IOBout | 2 | 0 | MC_OE
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nVMA_IOB | 9632 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVMA_IOB | 0 | 6 | OI_OUT
+NODE | nVMA_IOB | 9976 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVMA_IOB | 0 | 6 | OI_OUT
+
+OUTPUT_INSTANCE | 0 | nAS_IOB | MXSE_COPY_0_COPY_0 | 7 | 2 | 1
+INPUT_NODE_TYPE | 0 | 6 | OI_IN
+NODE | nAS_IOBout$Q | 9832 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAS_IOBout.Q | nAS_IOBout | 0 | 0 | MC_Q
+INPUT_NODE_TYPE | 2 | 6 | OI_OE
+NODE | nAS_IOBout$OE | 9834 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAS_IOBout.BUFOE.OUT | nAS_IOBout | 2 | 0 | MC_OE
+OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
+NODE | nAS_IOB | 9977 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_IOB | 0 | 6 | OI_OUT
+
+OUTPUT_INSTANCE | 0 | nLDS_IOB | MXSE_COPY_0_COPY_0 | 7 | 2 | 1
+INPUT_NODE_TYPE | 0 | 6 | OI_IN
+NODE | nLDS_IOBout | 9835 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nLDS_IOBout.Q | nLDS_IOBout | 0 | 0 | MC_Q
+INPUT_NODE_TYPE | 2 | 6 | OI_OE
+NODE | nLDS_IOBout$OE | 9836 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nLDS_IOBout.BUFOE.OUT | nLDS_IOBout | 2 | 0 | MC_OE
+OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
+NODE | nLDS_IOB | 9978 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_IOB | 0 | 6 | OI_OUT
+
+OUTPUT_INSTANCE | 0 | nUDS_IOB | MXSE_COPY_0_COPY_0 | 7 | 2 | 1
+INPUT_NODE_TYPE | 0 | 6 | OI_IN
+NODE | nUDS_IOBout | 9837 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nUDS_IOBout.Q | nUDS_IOBout | 0 | 0 | MC_Q
+INPUT_NODE_TYPE | 2 | 6 | OI_OE
+NODE | nUDS_IOBout$OE | 9838 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nUDS_IOBout.BUFOE.OUT | nUDS_IOBout | 2 | 0 | MC_OE
+OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
+NODE | nUDS_IOB | 9979 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_IOB | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nDTACK_FSB | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nDTACK_FSB_OBUF | 9539 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 0 | 0 | MC_Q
+NODE | nDTACK_FSB_OBUF | 9873 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nDTACK_FSB | 9633 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_FSB | 0 | 6 | OI_OUT
+NODE | nDTACK_FSB | 9980 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_FSB | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | RA<0> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_0_OBUF | 9601 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_0_OBUF.Q | RA_0_OBUF | 0 | 0 | MC_Q
+NODE | RA_0_OBUF | 9942 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_0_OBUF.Q | RA_0_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<0> | 9634 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<0> | 0 | 6 | OI_OUT
+NODE | RA<0> | 9981 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<0> | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | RA<1> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_1_OBUF | 9602 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.Q | RA_1_OBUF | 0 | 0 | MC_Q
+NODE | RA_1_OBUF | 9943 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.Q | RA_1_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<1> | 9635 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<1> | 0 | 6 | OI_OUT
+NODE | RA<1> | 9982 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<1> | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | RA<2> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_2_OBUF | 9603 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.Q | RA_2_OBUF | 0 | 0 | MC_Q
+NODE | RA_2_OBUF | 9944 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.Q | RA_2_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<2> | 9636 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<2> | 0 | 6 | OI_OUT
+NODE | RA<2> | 9983 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<2> | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | RA<3> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_3_OBUF | 9604 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.Q | RA_3_OBUF | 0 | 0 | MC_Q
+NODE | RA_3_OBUF | 9945 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.Q | RA_3_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<3> | 9637 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<3> | 0 | 6 | OI_OUT
+NODE | RA<3> | 9984 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<3> | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | RA<4> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_4_OBUF | 9605 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.Q | RA_4_OBUF | 0 | 0 | MC_Q
+NODE | RA_4_OBUF | 9946 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.Q | RA_4_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<4> | 9638 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<4> | 0 | 6 | OI_OUT
+NODE | RA<4> | 9985 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<4> | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | RA<5> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_5_OBUF | 9606 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.Q | RA_5_OBUF | 0 | 0 | MC_Q
+NODE | RA_5_OBUF | 9947 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.Q | RA_5_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<5> | 9639 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<5> | 0 | 6 | OI_OUT
+NODE | RA<5> | 9986 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<5> | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | RA<6> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_6_OBUF | 9607 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.Q | RA_6_OBUF | 0 | 0 | MC_Q
+NODE | RA_6_OBUF | 9948 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.Q | RA_6_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<6> | 9640 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<6> | 0 | 6 | OI_OUT
+NODE | RA<6> | 9987 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<6> | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | RA<7> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_7_OBUF | 9608 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_7_OBUF.Q | RA_7_OBUF | 0 | 0 | MC_Q
+NODE | RA_7_OBUF | 9949 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_7_OBUF.Q | RA_7_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<7> | 9641 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<7> | 0 | 6 | OI_OUT
+NODE | RA<7> | 9988 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<7> | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | RA<8> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_8_OBUF | 9609 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_8_OBUF.Q | RA_8_OBUF | 0 | 0 | MC_Q
+NODE | RA_8_OBUF | 9950 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_8_OBUF.Q | RA_8_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<8> | 9642 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<8> | 0 | 6 | OI_OUT
+NODE | RA<8> | 9989 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<8> | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | RA<9> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | RA_9_OBUF | 9610 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.Q | RA_9_OBUF | 0 | 0 | MC_Q
+NODE | RA_9_OBUF | 9951 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.Q | RA_9_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<9> | 9643 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<9> | 0 | 6 | OI_OUT
+NODE | RA<9> | 9990 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<9> | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nBERR_FSB | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nBERR_FSB_OBUF | 9611 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.Q | nBERR_FSB_OBUF | 0 | 0 | MC_Q
+NODE | nBERR_FSB_OBUF | 9952 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.Q | nBERR_FSB_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nBERR_FSB | 9644 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_FSB | 0 | 6 | OI_OUT
+NODE | nBERR_FSB | 9991 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBERR_FSB | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nOE | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nOE_OBUF | 9612 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nOE_OBUF.Q | nOE_OBUF | 0 | 0 | MC_Q
+NODE | nOE_OBUF | 9953 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nOE_OBUF.Q | nOE_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nOE | 9645 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nOE | 0 | 6 | OI_OUT
+NODE | nOE | 9992 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nOE | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nROMWE | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nROMWE_OBUF | 9613 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.Q | nROMWE_OBUF | 0 | 0 | MC_Q
+NODE | nROMWE_OBUF | 9954 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.Q | nROMWE_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nROMWE | 9646 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nROMWE | 0 | 6 | OI_OUT
+NODE | nROMWE | 9993 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nROMWE | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nVPA_FSB | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nVPA_FSB_OBUF | 9614 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVPA_FSB_OBUF.Q | nVPA_FSB_OBUF | 0 | 0 | MC_Q
+NODE | nVPA_FSB_OBUF | 9955 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nVPA_FSB_OBUF.Q | nVPA_FSB_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nVPA_FSB | 9647 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVPA_FSB | 0 | 6 | OI_OUT
+NODE | nVPA_FSB | 9994 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nVPA_FSB | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nADoutLE0 | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nADoutLE0_OBUF | 9615 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.Q | nADoutLE0_OBUF | 0 | 0 | MC_Q
+NODE | nADoutLE0_OBUF | 9956 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.Q | nADoutLE0_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nADoutLE0 | 9648 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nADoutLE0 | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | nAS_IOB | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nAS_IOB_OBUF | 9616 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAS_IOB_OBUF.Q | nAS_IOB_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nAS_IOB | 9649 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_IOB | 0 | 6 | OI_OUT
+NODE | nADoutLE0 | 9995 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nADoutLE0 | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nCAS | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nCAS_OBUF | 9617 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nCAS_OBUF.Q | nCAS_OBUF | 0 | 0 | MC_Q
+NODE | nCAS_OBUF | 9957 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nCAS_OBUF.Q | nCAS_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nCAS | 9650 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nCAS | 0 | 6 | OI_OUT
+NODE | nCAS | 9996 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nCAS | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nDinLE | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nDinLE_OBUF | 9618 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinLE_OBUF.Q | nDinLE_OBUF | 0 | 0 | MC_Q
+NODE | nDinLE_OBUF | 9958 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinLE_OBUF.Q | nDinLE_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nDinLE | 9651 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDinLE | 0 | 6 | OI_OUT
+NODE | nDinLE | 9997 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDinLE | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nDinOE | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nDinOE_OBUF | 9619 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinOE_OBUF.Q | nDinOE_OBUF | 0 | 0 | MC_Q
+NODE | nDinOE_OBUF | 9959 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDinOE_OBUF.Q | nDinOE_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nDinOE | 9652 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDinOE | 0 | 6 | OI_OUT
+NODE | nDinOE | 9998 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDinOE | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nDoutOE | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nDoutOE_OBUF | 9620 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDoutOE_OBUF.Q | nDoutOE_OBUF | 0 | 0 | MC_Q
+NODE | nDoutOE_OBUF | 9960 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDoutOE_OBUF.Q | nDoutOE_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nDoutOE | 9653 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDoutOE | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | nLDS_IOB | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nLDS_IOB_OBUF | 9621 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nLDS_IOB_OBUF.Q | nLDS_IOB_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nLDS_IOB | 9654 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nLDS_IOB | 0 | 6 | OI_OUT
+NODE | nDoutOE | 9999 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nDoutOE | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nRAS | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nRAS_OBUF | 9622 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.Q | nRAS_OBUF | 0 | 0 | MC_Q
+NODE | nRAS_OBUF | 9961 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.Q | nRAS_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nRAS | 9655 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRAS | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | nUDS_IOB | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nUDS_IOB_OBUF | 9623 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nUDS_IOB_OBUF.Q | nUDS_IOB_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nUDS_IOB | 9656 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nUDS_IOB | 0 | 6 | OI_OUT
+NODE | nRAS | 10000 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRAS | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | RA<11> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | A_FSB_19_IBUF$BUF0 | 9624 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.Q | A_FSB_19_IBUF$BUF0 | 0 | 0 | MC_Q
+NODE | A_FSB_19_IBUF$BUF0 | 9962 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.Q | A_FSB_19_IBUF$BUF0 | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<11> | 9657 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<11> | 0 | 6 | OI_OUT
+NODE | RA<11> | 10001 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<11> | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | RA<10> | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | A_FSB_21_IBUF$BUF0 | 9625 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.Q | A_FSB_21_IBUF$BUF0 | 0 | 0 | MC_Q
+NODE | A_FSB_21_IBUF$BUF0 | 9963 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.Q | A_FSB_21_IBUF$BUF0 | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | RA<10> | 9658 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<10> | 0 | 6 | OI_OUT
+NODE | RA<10> | 10002 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | RA<10> | 0 | 6 | OI_OUT
+
+OUTPUT_INSTANCE | 0 | CLK20EN | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
+INPUT_NODE_TYPE | 0 | 6 | OI_IN
+NODE | CLK20EN_OBUF$BUF0 | 9965 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | CLK20EN_OBUF$BUF0.Q | CLK20EN_OBUF$BUF0 | 0 | 0 | MC_Q
+OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
+NODE | CLK20EN | 10003 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK20EN | 0 | 6 | OI_OUT
+
+OUTPUT_INSTANCE | 0 | CLK25EN | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
+INPUT_NODE_TYPE | 0 | 6 | OI_IN
+NODE | CLK25EN_OBUF | 9966 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | CLK25EN_OBUF.Q | CLK25EN_OBUF | 0 | 0 | MC_Q
+OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
+NODE | CLK25EN | 10004 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | CLK25EN | 0 | 6 | OI_OUT
+
+OUTPUT_INSTANCE | 0 | nBR_IOB | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
+INPUT_NODE_TYPE | 0 | 6 | OI_IN
+NODE | Park | 9967 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 0 | 0 | MC_Q
+OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
+NODE | nBR_IOB | 10005 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nBR_IOB | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nADoutLE1 | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nADoutLE1_OBUF | 9626 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 0 | 0 | MC_Q
+NODE | nADoutLE1_OBUF | 9969 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nADoutLE1 | 9659 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nADoutLE1 | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | nRAMLWE | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nRAMLWE_OBUF | 9628 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.Q | nRAMLWE_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nRAMLWE | 9660 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRAMLWE | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | nRAMUWE | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nRAMUWE_OBUF | 9629 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.Q | nRAMUWE_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nRAMUWE | 9661 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRAMUWE | 0 | 6 | OI_OUT
-
-OUTPUT_INSTANCE | 0 | nROMCS | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
-INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nROMCS_OBUF | 9630 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.Q | nROMCS_OBUF | 0 | 0 | MC_Q
-OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nROMCS | 9662 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nROMCS | 0 | 6 | OI_OUT
+NODE | nADoutLE1 | 10006 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nADoutLE1 | 0 | 6 | OI_OUT
 
 OUTPUT_INSTANCE | 0 | nAoutOE | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
 INPUT_NODE_TYPE | 0 | 6 | OI_IN
-NODE | nAoutOE_OBUF$Q | 9631 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 0 | 0 | MC_Q
+NODE | nAoutOE_OBUF$Q | 9971 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 0 | 0 | MC_Q
 OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
-NODE | nAoutOE | 9663 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAoutOE | 0 | 6 | OI_OUT
+NODE | nAoutOE | 10007 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAoutOE | 0 | 6 | OI_OUT
 
-MACROCELL_INSTANCE | SoftPfbk | $OpTx$FX_DC$609 | MXSE_COPY_0_COPY_0 | 2181038080 | 2 | 1
+OUTPUT_INSTANCE | 0 | nRAMLWE | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
+INPUT_NODE_TYPE | 0 | 6 | OI_IN
+NODE | nRAMLWE_OBUF | 9973 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.Q | nRAMLWE_OBUF | 0 | 0 | MC_Q
+OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
+NODE | nRAMLWE | 10008 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRAMLWE | 0 | 6 | OI_OUT
+
+OUTPUT_INSTANCE | 0 | nRAMUWE | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
+INPUT_NODE_TYPE | 0 | 6 | OI_IN
+NODE | nRAMUWE_OBUF | 9974 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.Q | nRAMUWE_OBUF | 0 | 0 | MC_Q
+OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
+NODE | nRAMUWE | 10009 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nRAMUWE | 0 | 6 | OI_OUT
+
+OUTPUT_INSTANCE | 0 | nROMCS | MXSE_COPY_0_COPY_0 | 7 | 1 | 1
+INPUT_NODE_TYPE | 0 | 6 | OI_IN
+NODE | nROMCS_OBUF | 9975 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.Q | nROMCS_OBUF | 0 | 0 | MC_Q
+OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT
+NODE | nROMCS | 10010 | PO | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nROMCS | 0 | 6 | OI_OUT
+
+MACROCELL_INSTANCE | SoftPfbk | $OpTx$FX_DC$708 | MXSE_COPY_0_COPY_0 | 2181038080 | 2 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | $OpTx$FX_DC$609.UIM | 9664 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$609.Q | $OpTx$FX_DC$609 | 1 | 0 | MC_UIM
+NODE | $OpTx$FX_DC$708.UIM | 10011 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$708.Q | $OpTx$FX_DC$708 | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | $OpTx$FX_DC$609.SI | $OpTx$FX_DC$609 | 0 | 2 | 2
+SIGNAL_INSTANCE | $OpTx$FX_DC$708.SI | $OpTx$FX_DC$708 | 0 | 2 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | $OpTx$FX_DC$609.D1 | 10120 | ? | 420 | 4096 | $OpTx$FX_DC$609 | NULL | NULL | $OpTx$FX_DC$609.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | $OpTx$FX_DC$708.D1 | 10521 | ? | 459 | 4096 | $OpTx$FX_DC$708 | NULL | NULL | $OpTx$FX_DC$708.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | $OpTx$FX_DC$609.D2 | 10121 | ? | 420 | 4096 | $OpTx$FX_DC$609 | NULL | NULL | $OpTx$FX_DC$609.SI | 2 | 9 | MC_SI_D2
+SIGNAL | NODE | $OpTx$FX_DC$708.D2 | 10522 | ? | 459 | 4096 | $OpTx$FX_DC$708 | NULL | NULL | $OpTx$FX_DC$708.SI | 2 | 9 | MC_SI_D2
 SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
 
-SRFF_INSTANCE | $OpTx$FX_DC$609.REG | $OpTx$FX_DC$609 | 0 | 1 | 1
+SRFF_INSTANCE | $OpTx$FX_DC$708.REG | $OpTx$FX_DC$708 | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | $OpTx$FX_DC$609.D | 10119 | ? | 420 | 0 | $OpTx$FX_DC$609 | NULL | NULL | $OpTx$FX_DC$609.XOR | 0 | 7 | ALU_F
+NODE | $OpTx$FX_DC$708.D | 10520 | ? | 459 | 0 | $OpTx$FX_DC$708 | NULL | NULL | $OpTx$FX_DC$708.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | $OpTx$FX_DC$609.Q | 10122 | ? | 420 | 0 | $OpTx$FX_DC$609 | NULL | NULL | $OpTx$FX_DC$609.REG | 0 | 8 | SRFF_Q
+NODE | $OpTx$FX_DC$708.Q | 10523 | ? | 459 | 0 | $OpTx$FX_DC$708 | NULL | NULL | $OpTx$FX_DC$708.REG | 0 | 8 | SRFF_Q
 
-MACROCELL_INSTANCE | SoftPfbk | $OpTx$FX_DC$610 | MXSE_COPY_0_COPY_0 | 2181038080 | 5 | 1
+MACROCELL_INSTANCE | SoftPfbk | $OpTx$$OpTx$FX_DC$182_INV$783 | MXSE_COPY_0_COPY_0 | 2181038080 | 9 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutB | 9523 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | TimeoutB | 9853 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready0r | 9857 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RAMReady | 9934 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | RA_9_OBUF.EXP | 10615 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.EXP | RA_9_OBUF | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
-NODE | $OpTx$FX_DC$610.UIM | 9665 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$610.Q | $OpTx$FX_DC$610 | 1 | 0 | MC_UIM
+NODE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM | 10012 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$$OpTx$FX_DC$182_INV$783.Q | $OpTx$$OpTx$FX_DC$182_INV$783 | 1 | 0 | MC_UIM
 
-SIGNAL_INSTANCE | $OpTx$FX_DC$610.SI | $OpTx$FX_DC$610 | 0 | 5 | 2
+SIGNAL_INSTANCE | $OpTx$$OpTx$FX_DC$182_INV$783.SI | $OpTx$$OpTx$FX_DC$182_INV$783 | 0 | 9 | 2
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutB | 9523 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | TimeoutB | 9853 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready0r | 9857 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RAMReady | 9934 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | RA_9_OBUF.EXP | 10615 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.EXP | RA_9_OBUF | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
-SIGNAL | NODE | $OpTx$FX_DC$610.D1 | 10124 | ? | 428 | 4096 | $OpTx$FX_DC$610 | NULL | NULL | $OpTx$FX_DC$610.SI | 1 | 9 | MC_SI_D1
+SIGNAL | NODE | $OpTx$$OpTx$FX_DC$182_INV$783.D1 | 10525 | ? | 467 | 4096 | $OpTx$$OpTx$FX_DC$182_INV$783 | NULL | NULL | $OpTx$$OpTx$FX_DC$182_INV$783.SI | 1 | 9 | MC_SI_D1
 SPPTERM | 0 | IV_ZERO
 OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
-SIGNAL | NODE | $OpTx$FX_DC$610.D2 | 10125 | ? | 428 | 4096 | $OpTx$FX_DC$610 | NULL | NULL | $OpTx$FX_DC$610.SI | 2 | 9 | MC_SI_D2
-SPPTERM | 1 | IV_FALSE | TimeoutB
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF
+SIGNAL | NODE | $OpTx$$OpTx$FX_DC$182_INV$783.D2 | 10526 | ? | 467 | 4096 | $OpTx$$OpTx$FX_DC$182_INV$783 | NULL | NULL | $OpTx$$OpTx$FX_DC$182_INV$783.SI | 2 | 9 | MC_SI_D2
+SPPTERM | 1 | IV_TRUE | RA_9_OBUF.EXP
+SPPTERM | 2 | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | TimeoutB
+SPPTERM | 2 | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | TimeoutB
+SPPTERM | 2 | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | TimeoutB
+SPPTERM | 2 | IV_FALSE | A_FSB_20_IBUF | IV_TRUE | TimeoutB
+SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_FALSE | ram/RAMReady
 
-SRFF_INSTANCE | $OpTx$FX_DC$610.REG | $OpTx$FX_DC$610 | 0 | 1 | 1
+SRFF_INSTANCE | $OpTx$$OpTx$FX_DC$182_INV$783.REG | $OpTx$$OpTx$FX_DC$182_INV$783 | 0 | 1 | 1
 INPUT_NODE_TYPE | 0 | 8 | SRFF_D
-NODE | $OpTx$FX_DC$610.D | 10123 | ? | 428 | 0 | $OpTx$FX_DC$610 | NULL | NULL | $OpTx$FX_DC$610.XOR | 0 | 7 | ALU_F
+NODE | $OpTx$$OpTx$FX_DC$182_INV$783.D | 10524 | ? | 467 | 0 | $OpTx$$OpTx$FX_DC$182_INV$783 | NULL | NULL | $OpTx$$OpTx$FX_DC$182_INV$783.XOR | 0 | 7 | ALU_F
 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
-NODE | $OpTx$FX_DC$610.Q | 10126 | ? | 428 | 0 | $OpTx$FX_DC$610 | NULL | NULL | $OpTx$FX_DC$610.REG | 0 | 8 | SRFF_Q
+NODE | $OpTx$$OpTx$FX_DC$182_INV$783.Q | 10527 | ? | 467 | 0 | $OpTx$$OpTx$FX_DC$182_INV$783 | NULL | NULL | $OpTx$$OpTx$FX_DC$182_INV$783.REG | 0 | 8 | SRFF_Q
 
-MACROCELL_INSTANCE | NULL | EXP14_ | MXSE_COPY_0_COPY_0 | 2147483648 | 13 | 1
+MACROCELL_INSTANCE | NULL | EXP14_ | MXSE_COPY_0_COPY_0 | 2147483648 | 10 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutB | 9523 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9530 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$609.UIM | 9664 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$609.Q | $OpTx$FX_DC$609 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9528 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9534 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready0r | 9527 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMReady | 9593 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP25_.EXP | 10166 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP25_.EXP | EXP25_ | 4 | 0 | MC_EXPORT
+NODE | fsb/Ready1r.EXP | 10556 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.EXP | fsb/Ready1r | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP14_.EXP | 10154 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP14_.EXP | EXP14_ | 4 | 0 | MC_EXPORT
+NODE | EXP14_.EXP | 10557 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP14_.EXP | EXP14_ | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | EXP14_.SI | EXP14_ | 0 | 13 | 1
+SIGNAL_INSTANCE | EXP14_.SI | EXP14_ | 0 | 10 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutB | 9523 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9530 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$609.UIM | 9664 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$609.Q | $OpTx$FX_DC$609 | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9528 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9534 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready0r | 9527 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMReady | 9593 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP25_.EXP | 10166 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP25_.EXP | EXP25_ | 4 | 0 | MC_EXPORT
+NODE | fsb/Ready1r.EXP | 10556 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.EXP | fsb/Ready1r | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP14_.EXP | 10141 | ? | 420 | 0 | EXP14_ | NULL | NULL | EXP14_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 1 | IV_TRUE | EXP25_.EXP
-SPPTERM | 4 | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | TimeoutB | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$609.UIM
-SPPTERM | 4 | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | TimeoutB | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$609.UIM
-SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | $OpTx$FX_DC$609.UIM
-SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | fsb/VPA | IV_FALSE | ram/RAMReady | IV_FALSE | $OpTx$FX_DC$609.UIM
-SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | $OpTx$FX_DC$609.UIM
-
-MACROCELL_INSTANCE | NULL | EXP15_ | MXSE_COPY_0_COPY_0 | 2147483648 | 20 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready0r | 9527 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9530 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMReady | 9593 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$609.UIM | 9664 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$609.Q | $OpTx$FX_DC$609 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9528 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9534 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP16_.EXP | 10156 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP16_.EXP | EXP16_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP15_.EXP | 10155 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP15_.EXP | EXP15_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP15_.SI | EXP15_ | 0 | 20 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready0r | 9527 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9530 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMReady | 9593 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$609.UIM | 9664 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$609.Q | $OpTx$FX_DC$609 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9528 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9534 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP16_.EXP | 10156 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP16_.EXP | EXP16_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP15_.EXP | 10142 | ? | 420 | 0 | EXP15_ | NULL | NULL | EXP15_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 1 | IV_TRUE | EXP16_.EXP
-SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | fsb/VPA | IV_FALSE | ram/RAMReady | IV_FALSE | $OpTx$FX_DC$609.UIM
-SPPTERM | 13 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | $OpTx$FX_DC$609.UIM
-SPPTERM | 13 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | $OpTx$FX_DC$609.UIM
-SPPTERM | 15 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | ALE1 | IV_FALSE | $OpTx$FX_DC$609.UIM
-SPPTERM | 15 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | ALE1 | IV_FALSE | $OpTx$FX_DC$609.UIM
-
-MACROCELL_INSTANCE | NULL | EXP16_ | MXSE_COPY_0_COPY_0 | 2147483648 | 28 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9488 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9490 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9493 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9494 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9495 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9522 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9529 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9530 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$609.UIM | 9664 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$609.Q | $OpTx$FX_DC$609 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9489 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9515 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutB | 9523 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9525 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9526 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9528 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9534 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP16_.EXP | 10156 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP16_.EXP | EXP16_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP16_.SI | EXP16_ | 0 | 28 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9488 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9490 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9493 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9494 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9495 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9522 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9529 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9530 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$609.UIM | 9664 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$609.Q | $OpTx$FX_DC$609 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9489 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9515 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutB | 9523 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9525 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9526 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9528 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9534 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP16_.EXP | 10143 | ? | 420 | 0 | EXP16_ | NULL | NULL | EXP16_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 21 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$609.UIM
-SPPTERM | 21 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$609.UIM
-SPPTERM | 21 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$609.UIM
-SPPTERM | 22 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | BERR_IOBS | IV_FALSE | TimeoutB | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r | IV_TRUE | fsb/Ready1r | IV_FALSE | $OpTx$FX_DC$609.UIM
-SPPTERM | 22 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | BERR_IOBS | IV_FALSE | TimeoutB | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r | IV_TRUE | iobs/IOReady | IV_FALSE | $OpTx$FX_DC$609.UIM
-
-MACROCELL_INSTANCE | NULL | EXP17_ | MXSE_COPY_0_COPY_0 | 2147483648 | 14 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9528 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9534 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP17_.EXP | 10157 | ? | 418 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP17_.EXP | EXP17_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP17_.SI | EXP17_ | 0 | 14 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9528 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9534 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP17_.EXP | 10144 | ? | 418 | 0 | EXP17_ | NULL | NULL | EXP17_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 13 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_FALSE | ALE1
-SPPTERM | 13 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_FALSE | ALE1
-
-MACROCELL_INSTANCE | NULL | EXP18_ | MXSE_COPY_0_COPY_0 | 2147483648 | 21 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9488 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9490 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9493 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9494 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9495 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9522 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9529 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_FSB_OBUF.UIM | 9540 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9489 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP18_.EXP | 10158 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP18_.EXP | EXP18_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP18_.SI | EXP18_ | 0 | 21 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9488 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9490 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9493 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9494 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9495 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9522 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9529 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_FSB_OBUF.UIM | 9540 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9489 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP18_.EXP | 10145 | ? | 428 | 0 | EXP18_ | NULL | NULL | EXP18_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 20 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM
-SPPTERM | 20 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM
-SPPTERM | 20 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM
-
-MACROCELL_INSTANCE | NULL | EXP19_ | MXSE_COPY_0_COPY_0 | 2147483648 | 17 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9528 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9534 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_FSB_OBUF.UIM | 9540 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready0r | 9527 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMReady | 9593 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP18_.EXP | 10158 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP18_.EXP | EXP18_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP19_.EXP | 10159 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP19_.EXP | EXP19_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP19_.SI | EXP19_ | 0 | 17 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9528 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9534 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_FSB_OBUF.UIM | 9540 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready0r | 9527 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMReady | 9593 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP18_.EXP | 10158 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP18_.EXP | EXP18_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP19_.EXP | 10146 | ? | 428 | 0 | EXP19_ | NULL | NULL | EXP19_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 1 | IV_TRUE | EXP18_.EXP
-SPPTERM | 4 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | nDTACK_FSB_OBUF.UIM | IV_FALSE | ram/RAMReady
-SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM
-SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | nDTACK_FSB_OBUF.UIM | IV_FALSE | ram/RAMReady
-SPPTERM | 12 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM
-
-MACROCELL_INSTANCE | NULL | EXP20_ | MXSE_COPY_0_COPY_0 | 2147483648 | 25 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9528 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9534 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_FSB_OBUF.UIM | 9540 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9488 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9490 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9493 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9494 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9495 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9522 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9529 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9489 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP21_.EXP | 10161 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP21_.EXP | EXP21_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP20_.EXP | 10160 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP20_.EXP | EXP20_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP20_.SI | EXP20_ | 0 | 25 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9528 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9534 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_FSB_OBUF.UIM | 9540 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9488 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9490 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9493 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9494 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9495 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9522 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9529 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9489 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP21_.EXP | 10161 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP21_.EXP | EXP21_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP20_.EXP | 10147 | ? | 428 | 0 | EXP20_ | NULL | NULL | EXP20_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 1 | IV_TRUE | EXP21_.EXP
-SPPTERM | 12 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM
-SPPTERM | 14 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM | IV_FALSE | ALE1
-SPPTERM | 14 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM | IV_FALSE | ALE1
-SPPTERM | 20 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM
-SPPTERM | 20 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM
-
-MACROCELL_INSTANCE | NULL | EXP21_ | MXSE_COPY_0_COPY_0 | 2147483648 | 27 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9488 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9490 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9493 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9494 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9495 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9522 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9529 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_FSB_OBUF.UIM | 9540 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9489 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9515 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9525 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9526 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9528 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$610.UIM | 9665 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$610.Q | $OpTx$FX_DC$610 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9534 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP21_.EXP | 10161 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP21_.EXP | EXP21_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP21_.SI | EXP21_ | 0 | 27 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9488 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9490 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9493 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9494 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9495 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9522 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9529 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nDTACK_FSB_OBUF.UIM | 9540 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9489 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9515 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9525 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9526 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready1r | 9528 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$610.UIM | 9665 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$610.Q | $OpTx$FX_DC$610 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IOReady | 9534 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP21_.EXP | 10148 | ? | 428 | 0 | EXP21_ | NULL | NULL | EXP21_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 20 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM
-SPPTERM | 20 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM
-SPPTERM | 20 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM
-SPPTERM | 21 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | BERR_IOBS | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r | IV_TRUE | fsb/Ready1r | IV_TRUE | $OpTx$FX_DC$610.UIM
-SPPTERM | 21 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | BERR_IOBS | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r | IV_TRUE | iobs/IOReady | IV_TRUE | $OpTx$FX_DC$610.UIM
-
-MACROCELL_INSTANCE | NULL | EXP22_ | MXSE_COPY_0_COPY_0 | 2147483648 | 10 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW1 | 9533 | ? | 423 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP22_.EXP | 10162 | ? | 423 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP22_.EXP | EXP22_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP22_.SI | EXP22_ | 0 | 10 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/IORW1 | 9533 | ? | 423 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP22_.EXP | 10149 | ? | 423 | 0 | EXP22_ | NULL | NULL | EXP22_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 2 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/IORW1
+SIGNAL | NODE | EXP14_.EXP | 10543 | ? | 462 | 0 | EXP14_ | NULL | NULL | EXP14_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 1 | IV_TRUE | fsb/Ready1r.EXP
 SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
 SPPTERM | 2 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1
 SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF
 SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF
 
-MACROCELL_INSTANCE | NULL | EXP23_ | MXSE_COPY_0_COPY_0 | 2147483648 | 9 | 1
+MACROCELL_INSTANCE | NULL | EXP15_ | MXSE_COPY_0_COPY_0 | 2147483648 | 9 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r.EXP | 10164 | ? | 423 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.EXP | fsb/Ready2r | 4 | 0 | MC_EXPORT
+NODE | fsb/Ready2r.EXP | 10559 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.EXP | fsb/Ready2r | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP23_.EXP | 10163 | ? | 423 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP23_.EXP | EXP23_ | 4 | 0 | MC_EXPORT
+NODE | EXP15_.EXP | 10558 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP15_.EXP | EXP15_ | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | EXP23_.SI | EXP23_ | 0 | 9 | 1
+SIGNAL_INSTANCE | EXP15_.SI | EXP15_ | 0 | 9 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r.EXP | 10164 | ? | 423 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.EXP | fsb/Ready2r | 4 | 0 | MC_EXPORT
+NODE | fsb/Ready2r.EXP | 10559 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.EXP | fsb/Ready2r | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP23_.EXP | 10150 | ? | 423 | 0 | EXP23_ | NULL | NULL | EXP23_.SI | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | EXP15_.EXP | 10544 | ? | 462 | 0 | EXP15_ | NULL | NULL | EXP15_.SI | 7 | 9 | MC_SI_EXPORT
 SPPTERM | 1 | IV_TRUE | fsb/Ready2r.EXP
 SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF
 SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF
 SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF
 SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1
+SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_TRUE | SW_1_IBUF
 
-MACROCELL_INSTANCE | NULL | EXP24_ | MXSE_COPY_0_COPY_0 | 2147483648 | 21 | 1
+MACROCELL_INSTANCE | NULL | EXP16_ | MXSE_COPY_0_COPY_0 | 2147483648 | 21 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9489 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9490 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9493 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9494 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9495 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9522 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
+NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9529 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
+NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP24_.EXP | 10165 | ? | 419 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP24_.EXP | EXP24_ | 4 | 0 | MC_EXPORT
+NODE | EXP16_.EXP | 10560 | ? | 458 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP16_.EXP | EXP16_ | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | EXP24_.SI | EXP24_ | 0 | 21 | 1
+SIGNAL_INSTANCE | EXP16_.SI | EXP16_ | 0 | 21 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9489 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9490 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9493 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9494 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9495 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9522 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
+NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9529 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
+NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP24_.EXP | 10152 | ? | 419 | 0 | EXP24_ | NULL | NULL | EXP24_.SI | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | EXP16_.EXP | 10546 | ? | 458 | 0 | EXP16_ | NULL | NULL | EXP16_.SI | 7 | 9 | MC_SI_EXPORT
 SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
 SPPTERM | 19 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r
 SPPTERM | 19 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r
 SPPTERM | 19 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r
 SPPTERM | 19 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r
 
-MACROCELL_INSTANCE | NULL | EXP25_ | MXSE_COPY_0_COPY_0 | 2147483648 | 22 | 1
+MACROCELL_INSTANCE | NULL | EXP17_ | MXSE_COPY_0_COPY_0 | 2147483648 | 21 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9488 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9490 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9493 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9494 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9495 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9522 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
+NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9529 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
+NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9530 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
+NODE | nDTACK_FSB_OBUF.UIM | 9874 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$609.UIM | 9664 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$609.Q | $OpTx$FX_DC$609 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9489 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP25_.EXP | 10166 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP25_.EXP | EXP25_ | 4 | 0 | MC_EXPORT
+NODE | EXP17_.EXP | 10561 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP17_.EXP | EXP17_ | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | EXP25_.SI | EXP25_ | 0 | 22 | 1
+SIGNAL_INSTANCE | EXP17_.SI | EXP17_ | 0 | 21 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_9_IBUF | 9488 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_15_IBUF | 9490 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_12_IBUF | 9493 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_11_IBUF | 9494 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_10_IBUF | 9495 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA | 9522 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
+NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/Ready2r | 9529 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
+NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/VPA | 9530 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
+NODE | nDTACK_FSB_OBUF.UIM | 9874 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | $OpTx$FX_DC$609.UIM | 9664 | ? | 420 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$609.Q | $OpTx$FX_DC$609 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_8_IBUF | 9489 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP25_.EXP | 10153 | ? | 420 | 0 | EXP25_ | NULL | NULL | EXP25_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 21 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$609.UIM
-SPPTERM | 21 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$609.UIM
-SPPTERM | 21 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$609.UIM
-SPPTERM | 21 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$609.UIM
-SPPTERM | 21 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$609.UIM
+SIGNAL | NODE | EXP17_.EXP | 10547 | ? | 467 | 0 | EXP17_ | NULL | NULL | EXP17_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 20 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM
+SPPTERM | 20 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM
+SPPTERM | 20 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM
 
-MACROCELL_INSTANCE | NULL | EXP26_ | MXSE_COPY_0_COPY_0 | 2147483648 | 19 | 1
+MACROCELL_INSTANCE | NULL | EXP18_ | MXSE_COPY_0_COPY_0 | 2147483648 | 18 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | nDTACK_FSB_OBUF.UIM | 9874 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9516 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
+NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nROMCS_OBUF.EXP | 10181 | ? | 405 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.EXP | nROMCS_OBUF | 4 | 0 | MC_EXPORT
+NODE | EXP17_.EXP | 10561 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP17_.EXP | EXP17_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP26_.EXP | 10180 | ? | 405 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP26_.EXP | EXP26_ | 4 | 0 | MC_EXPORT
+NODE | EXP18_.EXP | 10562 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP18_.EXP | EXP18_ | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | EXP26_.SI | EXP26_ | 0 | 19 | 1
+SIGNAL_INSTANCE | EXP18_.SI | EXP18_ | 0 | 18 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | nDTACK_FSB_OBUF.UIM | 9874 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9516 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
+NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nROMCS_OBUF.EXP | 10181 | ? | 405 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.EXP | nROMCS_OBUF | 4 | 0 | MC_EXPORT
+NODE | EXP17_.EXP | 10561 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP17_.EXP | EXP17_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP26_.EXP | 10167 | ? | 405 | 0 | EXP26_ | NULL | NULL | EXP26_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 1 | IV_TRUE | nROMCS_OBUF.EXP
-SPPTERM | 15 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | iobs/Once | IV_TRUE | IORW0 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 15 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | iobs/Once | IV_TRUE | IORW0 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1
-SPPTERM | 15 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | iobs/Once | IV_TRUE | IORW0 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 15 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | iobs/Once | IV_TRUE | IORW0 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1
-SPPTERM | 16 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/Once | IV_TRUE | IORW0 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
+SIGNAL | NODE | EXP18_.EXP | 10548 | ? | 467 | 0 | EXP18_ | NULL | NULL | EXP18_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 1 | IV_TRUE | EXP17_.EXP
+SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf
+SPPTERM | 4 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM
+SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM
+SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_FALSE | SW_1_IBUF | IV_TRUE | nDTACK_FSB_OBUF.UIM
+SPPTERM | 12 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM
 
-MACROCELL_INSTANCE | NULL | EXP27_ | MXSE_COPY_0_COPY_0 | 2147483648 | 10 | 1
+MACROCELL_INSTANCE | NULL | EXP19_ | MXSE_COPY_0_COPY_0 | 2147483648 | 25 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nDTACK_FSB_OBUF.UIM | 9874 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP20_.EXP | 10564 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP20_.EXP | EXP20_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP27_.EXP | 10182 | ? | 433 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP27_.EXP | EXP27_ | 4 | 0 | MC_EXPORT
+NODE | EXP19_.EXP | 10563 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP19_.EXP | EXP19_ | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | EXP27_.SI | EXP27_ | 0 | 10 | 1
+SIGNAL_INSTANCE | EXP19_.SI | EXP19_ | 0 | 25 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_19_IBUF | 9500 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nDTACK_FSB_OBUF.UIM | 9874 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP20_.EXP | 10564 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP20_.EXP | EXP20_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP27_.EXP | 10169 | ? | 433 | 0 | EXP27_ | NULL | NULL | EXP27_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
+SIGNAL | NODE | EXP19_.EXP | 10549 | ? | 467 | 0 | EXP19_ | NULL | NULL | EXP19_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 1 | IV_TRUE | EXP20_.EXP
+SPPTERM | 12 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM
+SPPTERM | 14 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM | IV_FALSE | ALE1
+SPPTERM | 14 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM | IV_FALSE | ALE1
+SPPTERM | 20 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM
+SPPTERM | 20 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM
 
-MACROCELL_INSTANCE | NULL | EXP28_ | MXSE_COPY_0_COPY_0 | 2147483648 | 9 | 1
+MACROCELL_INSTANCE | NULL | EXP20_ | MXSE_COPY_0_COPY_0 | 2147483648 | 28 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nOE_OBUF.EXP | 10184 | ? | 403 | 0 | MXSE_COPY_0_COPY_0 | NULL | nOE_OBUF.EXP | nOE_OBUF | 4 | 0 | MC_EXPORT
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nDTACK_FSB_OBUF.UIM | 9874 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/BERR0r | 9855 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/BERR1r | 9856 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | Disable | 9968 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM | 10012 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$$OpTx$FX_DC$182_INV$783.Q | $OpTx$$OpTx$FX_DC$182_INV$783 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP28_.EXP | 10185 | ? | 403 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP28_.EXP | EXP28_ | 4 | 0 | MC_EXPORT
+NODE | EXP20_.EXP | 10564 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP20_.EXP | EXP20_ | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | EXP28_.SI | EXP28_ | 0 | 9 | 1
+SIGNAL_INSTANCE | EXP20_.SI | EXP20_ | 0 | 28 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nOE_OBUF.EXP | 10184 | ? | 403 | 0 | MXSE_COPY_0_COPY_0 | NULL | nOE_OBUF.EXP | nOE_OBUF | 4 | 0 | MC_EXPORT
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nDTACK_FSB_OBUF.UIM | 9874 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/BERR0r | 9855 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/BERR1r | 9856 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | Disable | 9968 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | Park.Q | Park | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM | 10012 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$$OpTx$FX_DC$182_INV$783.Q | $OpTx$$OpTx$FX_DC$182_INV$783 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP28_.EXP | 10172 | ? | 403 | 0 | EXP28_ | NULL | NULL | EXP28_.SI | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | EXP20_.EXP | 10550 | ? | 467 | 0 | EXP20_ | NULL | NULL | EXP20_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 20 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM
+SPPTERM | 20 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM
+SPPTERM | 20 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | nDTACK_FSB_OBUF.UIM
+SPPTERM | 22 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | BERR_IOBS | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r | IV_TRUE | fsb/Ready1r | IV_TRUE | Disable | IV_FALSE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM
+SPPTERM | 22 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | BERR_IOBS | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r | IV_TRUE | iobs/IOReady | IV_TRUE | Disable | IV_FALSE | $OpTx$$OpTx$FX_DC$182_INV$783.UIM
+
+MACROCELL_INSTANCE | NULL | EXP21_ | MXSE_COPY_0_COPY_0 | 2147483648 | 22 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/VPA | 9860 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | $OpTx$FX_DC$708.UIM | 10011 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$708.Q | $OpTx$FX_DC$708 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | EXP21_.EXP | 10565 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP21_.EXP | EXP21_ | 4 | 0 | MC_EXPORT
+
+SIGNAL_INSTANCE | EXP21_.SI | EXP21_ | 0 | 22 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/VPA | 9860 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | $OpTx$FX_DC$708.UIM | 10011 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$708.Q | $OpTx$FX_DC$708 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | EXP21_.EXP | 10551 | ? | 459 | 0 | EXP21_ | NULL | NULL | EXP21_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 21 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$708.UIM
+SPPTERM | 21 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$708.UIM
+SPPTERM | 21 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$708.UIM
+SPPTERM | 21 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$708.UIM
+SPPTERM | 21 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$708.UIM
+
+MACROCELL_INSTANCE | NULL | EXP22_ | MXSE_COPY_0_COPY_0 | 2147483648 | 18 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/VPA | 9860 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | $OpTx$FX_DC$708.UIM | 10011 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$708.Q | $OpTx$FX_DC$708 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP21_.EXP | 10565 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP21_.EXP | EXP21_ | 4 | 0 | MC_EXPORT
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | EXP22_.EXP | 10566 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP22_.EXP | EXP22_ | 4 | 0 | MC_EXPORT
+
+SIGNAL_INSTANCE | EXP22_.SI | EXP22_ | 0 | 18 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/VPA | 9860 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | $OpTx$FX_DC$708.UIM | 10011 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$708.Q | $OpTx$FX_DC$708 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP21_.EXP | 10565 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP21_.EXP | EXP21_ | 4 | 0 | MC_EXPORT
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | EXP22_.EXP | 10552 | ? | 459 | 0 | EXP22_ | NULL | NULL | EXP22_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 1 | IV_TRUE | EXP21_.EXP
+SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | $OpTx$FX_DC$708.UIM
+SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | $OpTx$FX_DC$708.UIM
+SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | SW_1_IBUF | IV_FALSE | $OpTx$FX_DC$708.UIM
+SPPTERM | 13 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | $OpTx$FX_DC$708.UIM
+SPPTERM | 13 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | $OpTx$FX_DC$708.UIM
+
+MACROCELL_INSTANCE | NULL | EXP23_ | MXSE_COPY_0_COPY_0 | 2147483648 | 26 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/VPA | 9860 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | $OpTx$FX_DC$708.UIM | 10011 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$708.Q | $OpTx$FX_DC$708 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nROMWE_OBUF.EXP | 10568 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.EXP | nROMWE_OBUF | 4 | 0 | MC_EXPORT
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | EXP23_.EXP | 10567 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP23_.EXP | EXP23_ | 4 | 0 | MC_EXPORT
+
+SIGNAL_INSTANCE | EXP23_.SI | EXP23_ | 0 | 26 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready1r | 9858 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/VPA | 9860 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/IOReady | 9864 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | $OpTx$FX_DC$708.UIM | 10011 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | $OpTx$FX_DC$708.Q | $OpTx$FX_DC$708 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_9_IBUF | 9811 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_15_IBUF | 9813 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_12_IBUF | 9816 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_11_IBUF | 9817 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_10_IBUF | 9818 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | TimeoutA | 9852 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.Q | TimeoutA | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/Ready2r | 9859 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/Ready2r.Q | fsb/Ready2r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_8_IBUF | 9812 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nROMWE_OBUF.EXP | 10568 | ? | 459 | 0 | MXSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.EXP | nROMWE_OBUF | 4 | 0 | MC_EXPORT
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | EXP23_.EXP | 10553 | ? | 459 | 0 | EXP23_ | NULL | NULL | EXP23_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 1 | IV_TRUE | nROMWE_OBUF.EXP
+SPPTERM | 15 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | ALE1 | IV_FALSE | $OpTx$FX_DC$708.UIM
+SPPTERM | 15 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | ALE1 | IV_FALSE | $OpTx$FX_DC$708.UIM
+SPPTERM | 21 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$708.UIM
+SPPTERM | 21 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$708.UIM
+SPPTERM | 21 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_12_IBUF | IV_FALSE | A_FSB_11_IBUF | IV_FALSE | A_FSB_10_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | TimeoutA | IV_FALSE | fsb/Ready2r | IV_TRUE | fsb/VPA | IV_FALSE | $OpTx$FX_DC$708.UIM
+
+MACROCELL_INSTANCE | NULL | EXP24_ | MXSE_COPY_0_COPY_0 | 2147483648 | 9 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nOE_OBUF.EXP | 10586 | ? | 498 | 0 | MXSE_COPY_0_COPY_0 | NULL | nOE_OBUF.EXP | nOE_OBUF | 4 | 0 | MC_EXPORT
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | EXP24_.EXP | 10587 | ? | 498 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP24_.EXP | EXP24_ | 4 | 0 | MC_EXPORT
+
+SIGNAL_INSTANCE | EXP24_.SI | EXP24_ | 0 | 9 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nOE_OBUF.EXP | 10586 | ? | 498 | 0 | MXSE_COPY_0_COPY_0 | NULL | nOE_OBUF.EXP | nOE_OBUF | 4 | 0 | MC_EXPORT
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | EXP24_.EXP | 10574 | ? | 498 | 0 | EXP24_ | NULL | NULL | EXP24_.SI | 7 | 9 | MC_SI_EXPORT
 SPPTERM | 1 | IV_TRUE | nOE_OBUF.EXP
-SPPTERM | 3 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd1
-SPPTERM | 3 | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | ALE1
-SPPTERM | 3 | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd1 | IV_FALSE | ALE1
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | iobs/Once
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | iobs/Once
+SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
+SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
+SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
+SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
+SPPTERM | 6 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
 
-MACROCELL_INSTANCE | NULL | EXP29_ | MXSE_COPY_0_COPY_0 | 2147483648 | 3 | 1
+MACROCELL_INSTANCE | NULL | EXP25_ | MXSE_COPY_0_COPY_0 | 2147483648 | 3 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9541 | ? | 454 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_5_IBUF | 9598 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_5_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_5_IBUF | 9939 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_5_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP29_.EXP | 10187 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP29_.EXP | EXP29_ | 4 | 0 | MC_EXPORT
+NODE | EXP25_.EXP | 10589 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP25_.EXP | EXP25_ | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | EXP29_.SI | EXP29_ | 0 | 3 | 1
+SIGNAL_INSTANCE | EXP25_.SI | EXP25_ | 0 | 3 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RASEL | 9541 | ? | 454 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
+NODE | ram/RASEL | 9875 | ? | 500 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_5_IBUF | 9598 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_5_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_5_IBUF | 9939 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_5_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP29_.EXP | 10174 | ? | 0 | 0 | EXP29_ | NULL | NULL | EXP29_.SI | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | EXP25_.EXP | 10576 | ? | 0 | 0 | EXP25_ | NULL | NULL | EXP25_.SI | 7 | 9 | MC_SI_EXPORT
 SPPTERM | 2 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | ram/RASEL
 SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_5_IBUF
 
-MACROCELL_INSTANCE | NULL | EXP30_ | MXSE_COPY_0_COPY_0 | 2147483648 | 12 | 1
+MACROCELL_INSTANCE | NULL | EXP26_ | MXSE_COPY_0_COPY_0 | 2147483648 | 13 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9516 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP30_.EXP | 10192 | ? | 405 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP30_.EXP | EXP30_ | 4 | 0 | MC_EXPORT
+NODE | EXP26_.EXP | 10594 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP26_.EXP | EXP26_ | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | EXP30_.SI | EXP30_ | 0 | 12 | 1
+SIGNAL_INSTANCE | EXP26_.SI | EXP26_ | 0 | 13 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/Once | 9514 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | IORW0 | 9516 | ? | 486 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nWE_FSB_IBUF | 9517 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd2 | 9549 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | iobs/PS_FSM_FFd1 | 9553 | ? | 451 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ALE1 | 9627 | ? | 455 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP30_.EXP | 10179 | ? | 405 | 0 | EXP30_ | NULL | NULL | EXP30_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 8 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_FALSE | IORW0 | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1
-SPPTERM | 10 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_TRUE | IORW0 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 10 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_TRUE | IORW0 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1
-SPPTERM | 10 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_FALSE | IORW0 | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
-SPPTERM | 10 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_FALSE | IORW0 | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1
+SIGNAL | NODE | EXP26_.EXP | 10581 | ? | 468 | 0 | EXP26_ | NULL | NULL | EXP26_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1
+SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | fsb/ASrf
+SPPTERM | 8 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
+SPPTERM | 8 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
+SPPTERM | 8 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
 
-MACROCELL_INSTANCE | NULL | EXP31_ | MXSE_COPY_0_COPY_0 | 2147483648 | 11 | 1
+MACROCELL_INSTANCE | NULL | EXP27_ | MXSE_COPY_0_COPY_0 | 2147483648 | 12 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9512 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA.EXP | 10215 | ? | 432 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.EXP | TimeoutA | 4 | 0 | MC_EXPORT
+NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP26_.EXP | 10594 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP26_.EXP | EXP26_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP31_.EXP | 10216 | ? | 432 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP31_.EXP | EXP31_ | 4 | 0 | MC_EXPORT
+NODE | EXP27_.EXP | 10595 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP27_.EXP | EXP27_ | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | EXP31_.SI | EXP31_ | 0 | 11 | 1
+SIGNAL_INSTANCE | EXP27_.SI | EXP27_ | 0 | 12 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9512 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
+NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutA.EXP | 10215 | ? | 432 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutA.EXP | TimeoutA | 4 | 0 | MC_EXPORT
+NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP26_.EXP | 10594 | ? | 468 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP26_.EXP | EXP26_ | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP31_.EXP | 10205 | ? | 432 | 0 | EXP31_ | NULL | NULL | EXP31_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 1 | IV_TRUE | TimeoutA.EXP
-SPPTERM | 5 | IV_TRUE | ram/Once | IV_TRUE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
-SPPTERM | 5 | IV_TRUE | ram/Once | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<5>
-SPPTERM | 5 | IV_TRUE | ram/Once | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<6>
-SPPTERM | 5 | IV_TRUE | ram/Once | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<7>
-SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | fsb/ASrf
+SIGNAL | NODE | EXP27_.EXP | 10582 | ? | 468 | 0 | EXP27_ | NULL | NULL | EXP27_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 1 | IV_TRUE | EXP26_.EXP
+SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1
+SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | fsb/ASrf
+SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
+SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
+SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
 
-MACROCELL_INSTANCE | NULL | EXP32_ | MXSE_COPY_0_COPY_0 | 2147483648 | 12 | 1
+MACROCELL_INSTANCE | NULL | EXP28_ | MXSE_COPY_0_COPY_0 | 2147483648 | 13 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9565 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3.EXP | 10217 | ? | 430 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.EXP | ram/RS_FSM_FFd3 | 4 | 0 | MC_EXPORT
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP32_.EXP | 10218 | ? | 430 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP32_.EXP | EXP32_ | 4 | 0 | MC_EXPORT
+NODE | EXP28_.EXP | 10618 | ? | 469 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP28_.EXP | EXP28_ | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | EXP32_.SI | EXP32_ | 0 | 12 | 1
+SIGNAL_INSTANCE | EXP28_.SI | EXP28_ | 0 | 13 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9565 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | ram/RS_FSM_FFd2 | 9876 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3.EXP | 10217 | ? | 430 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.EXP | ram/RS_FSM_FFd3 | 4 | 0 | MC_EXPORT
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP32_.EXP | 10207 | ? | 430 | 0 | EXP32_ | NULL | NULL | EXP32_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 1 | IV_TRUE | ram/RS_FSM_FFd3.EXP
+SIGNAL | NODE | EXP28_.EXP | 10608 | ? | 469 | 0 | EXP28_ | NULL | NULL | EXP28_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf
+SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
+SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf
+SPPTERM | 8 | IV_FALSE | cnt/RefDone | IV_TRUE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_FALSE | fsb/ASrf
+
+MACROCELL_INSTANCE | NULL | EXP29_ | MXSE_COPY_0_COPY_0 | 2147483648 | 12 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP28_.EXP | 10618 | ? | 469 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP28_.EXP | EXP28_ | 4 | 0 | MC_EXPORT
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | EXP29_.EXP | 10619 | ? | 469 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP29_.EXP | EXP29_ | 4 | 0 | MC_EXPORT
+
+SIGNAL_INSTANCE | EXP29_.SI | EXP29_ | 0 | 12 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/RS_FSM_FFd3 | 9878 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<5> | 9890 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<6> | 9891 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cnt/RefCnt<7> | 9903 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | EXP28_.EXP | 10618 | ? | 469 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP28_.EXP | EXP28_ | 4 | 0 | MC_EXPORT
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | EXP29_.EXP | 10609 | ? | 469 | 0 | EXP29_ | NULL | NULL | EXP29_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 1 | IV_TRUE | EXP28_.EXP
 SPPTERM | 4 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<5> | IV_TRUE | ram/BACTr
 SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<5> | IV_FALSE | fsb/ASrf
 SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<6> | IV_FALSE | fsb/ASrf
 SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | cnt/RefCnt<7> | IV_FALSE | fsb/ASrf
 SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3
 
-MACROCELL_INSTANCE | NULL | EXP33_ | MXSE_COPY_0_COPY_0 | 2147483648 | 11 | 1
+MACROCELL_INSTANCE | NULL | EXP30_ | MXSE_COPY_0_COPY_0 | 2147483648 | 11 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9512 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9565 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2.EXP | 10219 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.EXP | ram/RS_FSM_FFd2 | 4 | 0 | MC_EXPORT
+NODE | ram/RS_FSM_FFd2.EXP | 10620 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.EXP | ram/RS_FSM_FFd2 | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP33_.EXP | 10220 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP33_.EXP | EXP33_ | 4 | 0 | MC_EXPORT
+NODE | EXP30_.EXP | 10621 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP30_.EXP | EXP30_ | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | EXP33_.SI | EXP33_ | 0 | 11 | 1
+SIGNAL_INSTANCE | EXP30_.SI | EXP30_ | 0 | 11 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | ram/Once | 9841 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9512 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | ram/RS_FSM_FFd1 | 9877 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | cnt/RefDone | 9842 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9565 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+NODE | ram/BACTr | 9898 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2.EXP | 10219 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.EXP | ram/RS_FSM_FFd2 | 4 | 0 | MC_EXPORT
+NODE | ram/RS_FSM_FFd2.EXP | 10620 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.EXP | ram/RS_FSM_FFd2 | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP33_.EXP | 10209 | ? | 453 | 0 | EXP33_ | NULL | NULL | EXP33_.SI | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | EXP30_.EXP | 10611 | ? | 499 | 0 | EXP30_ | NULL | NULL | EXP30_.SI | 7 | 9 | MC_SI_EXPORT
 SPPTERM | 1 | IV_TRUE | ram/RS_FSM_FFd2.EXP
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1
-SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | fsb/ASrf
-SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
-SPPTERM | 6 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
-SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | fsb/ASrf
+SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1
+SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | ram/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | fsb/ASrf
+SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
+SPPTERM | 6 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
+SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | ram/Once | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | fsb/ASrf
 
-MACROCELL_INSTANCE | NULL | EXP34_ | MXSE_COPY_0_COPY_0 | 2147483648 | 9 | 1
+MACROCELL_INSTANCE | NULL | EXP31_ | MXSE_COPY_0_COPY_0 | 2147483648 | 9 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | IORW0 | 9846 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/IORW1 | 9863 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | A_FSB_19_IBUF$BUF0.EXP | 10636 | ? | 444 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.EXP | A_FSB_19_IBUF$BUF0 | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP34_.EXP | 10235 | ? | 443 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP34_.EXP | EXP34_ | 4 | 0 | MC_EXPORT
+NODE | EXP31_.EXP | 10635 | ? | 444 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP31_.EXP | EXP31_ | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | EXP34_.SI | EXP34_ | 0 | 9 | 1
+SIGNAL_INSTANCE | EXP31_.SI | EXP31_ | 0 | 9 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | IORW0 | 9846 | ? | 535 | 0 | MXSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | iobs/IORW1 | 9863 | ? | 462 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_18_IBUF | 9501 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_17_IBUF | 9502 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+NODE | nAS_FSB_IBUF | 9870 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_16_IBUF | 9503 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
+NODE | fsb/ASrf | 9926 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_14_IBUF | 9491 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_13_IBUF | 9492 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | A_FSB_19_IBUF$BUF0.EXP | 10636 | ? | 444 | 0 | MXSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.EXP | A_FSB_19_IBUF$BUF0 | 4 | 0 | MC_EXPORT
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP34_.EXP | 10224 | ? | 443 | 0 | EXP34_ | NULL | NULL | EXP34_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF
-SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF
-SPPTERM | 4 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF
-SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1
+SIGNAL | NODE | EXP31_.EXP | 10622 | ? | 444 | 0 | EXP31_ | NULL | NULL | EXP31_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 1 | IV_TRUE | A_FSB_19_IBUF$BUF0.EXP
+SPPTERM | 3 | IV_TRUE | IORW0 | IV_TRUE | iobs/IORW1 | IV_FALSE | ALE1
+SPPTERM | 3 | IV_FALSE | IORW0 | IV_FALSE | iobs/IORW1 | IV_FALSE | ALE1
+SPPTERM | 3 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf | IV_TRUE | ALE1
+SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | ALE1
+SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | IORW0 | IV_TRUE | ALE1
 
-MACROCELL_INSTANCE | NULL | EXP35_ | MXSE_COPY_0_COPY_0 | 2147483648 | 9 | 1
+MACROCELL_INSTANCE | NULL | EXP32_ | MXSE_COPY_0_COPY_0 | 2147483648 | 10 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9515 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutB | 9523 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9525 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9526 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP35_.EXP | 10236 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP35_.EXP | EXP35_ | 4 | 0 | MC_EXPORT
+NODE | EXP32_.EXP | 10637 | ? | 472 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP32_.EXP | EXP32_ | 4 | 0 | MC_EXPORT
 
-SIGNAL_INSTANCE | EXP35_.SI | EXP35_ | 0 | 9 | 1
+SIGNAL_INSTANCE | EXP32_.SI | EXP32_ | 0 | 10 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | BERR_IOBS | 9515 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | TimeoutB | 9523 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR0r | 9525 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/BERR1r | 9526 | ? | 428 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_20_IBUF | 9499 | ? | 448 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP35_.EXP | 10225 | ? | 0 | 0 | EXP35_ | NULL | NULL | EXP35_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 1 | IV_TRUE | nAS_FSB_IBUF
+SIGNAL | NODE | EXP32_.EXP | 10624 | ? | 472 | 0 | EXP32_ | NULL | NULL | EXP32_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
+SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
+SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
+SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
+SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1
+
+MACROCELL_INSTANCE | NULL | EXP33_ | MXSE_COPY_0_COPY_0 | 2147483648 | 12 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | EXP33_.EXP | 10642 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP33_.EXP | EXP33_ | 4 | 0 | MC_EXPORT
+
+SIGNAL_INSTANCE | EXP33_.SI | EXP33_ | 0 | 12 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd2 | 9882 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nWE_FSB_IBUF | 9847 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_14_IBUF | 9814 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_13_IBUF | 9815 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | EXP33_.EXP | 10629 | ? | 493 | 0 | EXP33_ | NULL | NULL | EXP33_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
+SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
+SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_TRUE | SW_1_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
+SPPTERM | 6 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
+SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_TRUE | ALE1
+
+MACROCELL_INSTANCE | NULL | EXP34_ | MXSE_COPY_0_COPY_0 | 2147483648 | 8 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | TimeoutB | 9853 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/BERR0r | 9855 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/BERR1r | 9856 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | EXP34_.EXP | 10643 | ? | 0 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP34_.EXP | EXP34_ | 4 | 0 | MC_EXPORT
+
+SIGNAL_INSTANCE | EXP34_.SI | EXP34_ | 0 | 8 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | BERR_IOBS | 9845 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | BERR_IOBS.Q | BERR_IOBS | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | TimeoutB | 9853 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | TimeoutB.Q | TimeoutB | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/BERR0r | 9855 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR0r.Q | fsb/BERR0r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | fsb/BERR1r | 9856 | ? | 467 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/BERR1r.Q | fsb/BERR1r | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | EXP34_.EXP | 10630 | ? | 0 | 0 | EXP34_ | NULL | NULL | EXP34_.SI | 7 | 9 | MC_SI_EXPORT
 SPPTERM | 4 | IV_FALSE | BERR_IOBS | IV_FALSE | TimeoutB | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r
 SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | BERR_IOBS | IV_FALSE | fsb/BERR0r | IV_FALSE | fsb/BERR1r
 
+MACROCELL_INSTANCE | NULL | EXP35_ | MXSE_COPY_0_COPY_0 | 2147483648 | 9 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nBERR_FSB_OBUF.EXP | 10644 | ? | 440 | 0 | MXSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.EXP | nBERR_FSB_OBUF | 4 | 0 | MC_EXPORT
+OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
+NODE | EXP35_.EXP | 10645 | ? | 440 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP35_.EXP | EXP35_ | 4 | 0 | MC_EXPORT
+
+SIGNAL_INSTANCE | EXP35_.SI | EXP35_ | 0 | 9 | 1
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/Once | 9843 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | iobs/PS_FSM_FFd1 | 9886 | ? | 497 | 0 | MXSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_22_IBUF | 9820 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | cs/nOverlay1 | 9844 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
+INPUT_NODE_TYPE | 1 | 100 | NOTYPE
+NODE | nBERR_FSB_OBUF.EXP | 10644 | ? | 440 | 0 | MXSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.EXP | nBERR_FSB_OBUF | 4 | 0 | MC_EXPORT
+OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
+SIGNAL | NODE | EXP35_.EXP | 10632 | ? | 440 | 0 | EXP35_ | NULL | NULL | EXP35_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 1 | IV_TRUE | nBERR_FSB_OBUF.EXP
+SPPTERM | 3 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd1
+SPPTERM | 3 | IV_FALSE | iobs/Once | IV_TRUE | iobs/PS_FSM_FFd1 | IV_FALSE | ALE1
+SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | iobs/Once
+SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | iobs/Once | IV_FALSE | cs/nOverlay1
+SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | iobs/Once
+
 MACROCELL_INSTANCE | NULL | EXP36_ | MXSE_COPY_0_COPY_0 | 2147483648 | 9 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9565 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS2.EXP | 10238 | ? | 452 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.EXP | ram/RAMDIS2 | 4 | 0 | MC_EXPORT
+NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP36_.EXP | 10239 | ? | 452 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP36_.EXP | EXP36_ | 4 | 0 | MC_EXPORT
+NODE | EXP36_.EXP | 10647 | ? | 444 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP36_.EXP | EXP36_ | 4 | 0 | MC_EXPORT
 
 SIGNAL_INSTANCE | EXP36_.SI | EXP36_ | 0 | 9 | 1
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_23_IBUF | 9819 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
+NODE | A_FSB_21_IBUF | 9821 | ? | 499 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
+NODE | A_FSB_19_IBUF | 9823 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
+NODE | ALE1 | 9970 | ? | 503 | 0 | MXSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
+NODE | A_FSB_18_IBUF | 9824 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9565 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
+NODE | A_FSB_17_IBUF | 9825 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
+NODE | A_FSB_16_IBUF | 9826 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
+NODE | A_FSB_20_IBUF | 9822 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX
 INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RAMDIS2.EXP | 10238 | ? | 452 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RAMDIS2.EXP | ram/RAMDIS2 | 4 | 0 | MC_EXPORT
+NODE | SW_1_IBUF | 9871 | ? | 493 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | SW_1_IBUF | 0 | 5 | II_IMUX
 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP36_.EXP | 10228 | ? | 452 | 0 | EXP36_ | NULL | NULL | EXP36_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 1 | IV_TRUE | ram/RAMDIS2.EXP
-SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
-SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
-SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
-SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
-SPPTERM | 6 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
-
-MACROCELL_INSTANCE | NULL | EXP37_ | MXSE_COPY_0_COPY_0 | 2147483648 | 14 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9565 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9512 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP37_.EXP | 10240 | ? | 452 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP37_.EXP | EXP37_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP37_.SI | EXP37_ | 0 | 14 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9565 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9512 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd3 | 9545 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP37_.EXP | 10229 | ? | 452 | 0 | EXP37_ | NULL | NULL | EXP37_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 6 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
-SPPTERM | 6 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
-SPPTERM | 6 | IV_TRUE | ram/Once | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
-SPPTERM | 6 | IV_FALSE | cnt/RefDone | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd3 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
-SPPTERM | 7 | IV_FALSE | cnt/RefDone | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7> | IV_FALSE | fsb/ASrf
-
-MACROCELL_INSTANCE | NULL | EXP38_ | MXSE_COPY_0_COPY_0 | 2147483648 | 13 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9512 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP38_.EXP | 10241 | ? | 429 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP38_.EXP | EXP38_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP38_.SI | EXP38_ | 0 | 13 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9512 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<5> | 9557 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<5>.Q | cnt/RefCnt<5> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<6> | 9558 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<6>.Q | cnt/RefCnt<6> | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefCnt<7> | 9570 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefCnt<7>.Q | cnt/RefCnt<7> | 1 | 0 | MC_UIM
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP38_.EXP | 10230 | ? | 429 | 0 | EXP38_ | NULL | NULL | EXP38_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1
-SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | fsb/ASrf
-SPPTERM | 8 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
-SPPTERM | 8 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
-SPPTERM | 8 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | cnt/RefCnt<5> | IV_TRUE | cnt/RefCnt<6> | IV_TRUE | cnt/RefCnt<7>
-
-MACROCELL_INSTANCE | NULL | EXP39_ | MXSE_COPY_0_COPY_0 | 2147483648 | 12 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9512 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9565 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP38_.EXP | 10241 | ? | 429 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP38_.EXP | EXP38_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT
-NODE | EXP39_.EXP | 10242 | ? | 429 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP39_.EXP | EXP39_ | 4 | 0 | MC_EXPORT
-
-SIGNAL_INSTANCE | EXP39_.SI | EXP39_ | 0 | 12 | 1
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_23_IBUF | 9496 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_22_IBUF | 9497 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cs/nOverlay1 | 9511 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/Once | 9512 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/Once.Q | ram/Once | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | nAS_FSB_IBUF | 9538 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd2 | 9542 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/RS_FSM_FFd1 | 9544 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | fsb/ASrf | 9586 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | A_FSB_21_IBUF | 9498 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | cnt/RefDone | 9513 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | cnt/RefDone.Q | cnt/RefDone | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | ram/BACTr | 9565 | ? | 453 | 0 | MXSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM
-INPUT_NODE_TYPE | 1 | 100 | NOTYPE
-NODE | EXP38_.EXP | 10241 | ? | 429 | 0 | MXSE_COPY_0_COPY_0 | NULL | EXP38_.EXP | EXP38_ | 4 | 0 | MC_EXPORT
-OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT
-SIGNAL | NODE | EXP39_.EXP | 10231 | ? | 429 | 0 | EXP39_ | NULL | NULL | EXP39_.SI | 7 | 9 | MC_SI_EXPORT
-SPPTERM | 1 | IV_TRUE | EXP38_.EXP
-SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1
-SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/Once | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | fsb/ASrf
-SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
-SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | cnt/RefDone | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr | IV_TRUE | fsb/ASrf
-SPPTERM | 7 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | cnt/RefDone | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/BACTr
+SIGNAL | NODE | EXP36_.EXP | 10634 | ? | 444 | 0 | EXP36_ | NULL | NULL | EXP36_.SI | 7 | 9 | MC_SI_EXPORT
+SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_19_IBUF | IV_TRUE | ALE1
+SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_18_IBUF | IV_TRUE | ALE1
+SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_17_IBUF | IV_TRUE | ALE1
+SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | A_FSB_16_IBUF | IV_TRUE | ALE1
+SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_TRUE | SW_1_IBUF | IV_TRUE | ALE1
 
 FB_INSTANCE | FOOBAR1_ | MXSE_COPY_0_COPY_0 | 0 | 0 | 0
-FBPIN | 1 | iobs/IOACTr | 1 | NULL | 0 | NULL | 0
-FBPIN | 2 | iobm/IOREQr | 1 | A_FSB_13_IBUF | 1 | NULL | 0 | 11 | 49152
-FBPIN | 3 | iobm/Er2 | 1 | A_FSB_14_IBUF | 1 | NULL | 0 | 12 | 49152
-FBPIN | 4 | iobm/DTACKrr | 1 | NULL | 0 | NULL | 0
-FBPIN | 5 | iobm/DTACKrf | 1 | A_FSB_15_IBUF | 1 | NULL | 0 | 13 | 49152
-FBPIN | 6 | iobm/BERRrr | 1 | A_FSB_16_IBUF | 1 | NULL | 0 | 14 | 49152
-FBPIN | 7 | iobm/BERRrf | 1 | NULL | 0 | NULL | 0
-FBPIN | 8 | fsb/ASrf | 1 | A_FSB_17_IBUF | 1 | NULL | 0 | 15 | 49152
-FBPIN | 9 | cnt/RefCnt<7> | 1 | A_FSB_18_IBUF | 1 | NULL | 0 | 16 | 49152
-FBPIN | 10 | cnt/RefCnt<6> | 1 | NULL | 0 | NULL | 0
-FBPIN | 11 | cnt/RefCnt<5> | 1 | A_FSB_19_IBUF | 1 | NULL | 0 | 17 | 49152
-FBPIN | 12 | cnt/RefCnt<4> | 1 | A_FSB_20_IBUF | 1 | NULL | 0 | 18 | 49152
-FBPIN | 13 | cnt/RefCnt<3> | 1 | NULL | 0 | NULL | 0
-FBPIN | 14 | cnt/RefCnt<2> | 1 | A_FSB_21_IBUF | 1 | NULL | 0 | 19 | 49152
-FBPIN | 15 | cnt/RefCnt<1> | 1 | A_FSB_22_IBUF | 1 | NULL | 0 | 20 | 49152
-FBPIN | 16 | cnt/RefCnt<0> | 1 | NULL | 0 | NULL | 0
-FBPIN | 17 | RefAck | 1 | CLK2X_IOB_IBUF | 0 | NULL | 0 | 22 | 57344
-FBPIN | 18 | $OpTx$FX_DC$609 | 1 | NULL | 0 | NULL | 0
+FBPIN | 1 | ram/BACTr | 1 | NULL | 0 | NULL | 0
+FBPIN | 2 | iobm/RESrr | 1 | A_FSB_13_IBUF | 1 | NULL | 0 | 11 | 49152
+FBPIN | 3 | iobm/RESrf | 1 | A_FSB_14_IBUF | 1 | NULL | 0 | 12 | 49152
+FBPIN | 4 | fsb/ASrf | 1 | NULL | 0 | NULL | 0
+FBPIN | 5 | cnt/RefCnt<2> | 1 | A_FSB_15_IBUF | 1 | NULL | 0 | 13 | 49152
+FBPIN | 6 | cnt/RefCnt<1> | 1 | A_FSB_16_IBUF | 1 | NULL | 0 | 14 | 49152
+FBPIN | 7 | RefAck | 1 | NULL | 0 | NULL | 0
+FBPIN | 8 | RESr2 | 1 | A_FSB_17_IBUF | 1 | NULL | 0 | 15 | 49152
+FBPIN | 9 | RESr1 | 1 | A_FSB_18_IBUF | 1 | NULL | 0 | 16 | 49152
+FBPIN | 10 | RESr0 | 1 | NULL | 0 | NULL | 0
+FBPIN | 11 | IPL2r1 | 1 | A_FSB_19_IBUF | 1 | NULL | 0 | 17 | 49152
+FBPIN | 12 | IPL2r0 | 1 | A_FSB_20_IBUF | 1 | NULL | 0 | 18 | 49152
+FBPIN | 13 | ALE0S | 1 | NULL | 0 | NULL | 0
+FBPIN | 14 | $OpTx$FX_DC$708 | 1 | A_FSB_21_IBUF | 1 | NULL | 0 | 19 | 49152
+FBPIN | 15 | iobs/IOU1 | 1 | A_FSB_22_IBUF | 1 | NULL | 0 | 20 | 49152
+FBPIN | 16 | iobs/IOL1 | 1 | NULL | 0 | NULL | 0
+FBPIN | 17 | iobm/IOS_FSM_FFd1 | 1 | CLK2X_IOB_IBUF | 0 | NULL | 0 | 22 | 57344
+FBPIN | 18 | IOU0 | 1 | NULL | 0 | NULL | 0
 
 FB_INSTANCE | FOOBAR2_ | MXSE_COPY_0_COPY_0 | 0 | 0 | 0
-FBPIN | 6 | NULL | 0 | A_FSB_5_IBUF | 1 | NULL | 0 | 2 | 53248
-FBPIN | 8 | NULL | 0 | A_FSB_6_IBUF | 1 | NULL | 0 | 3 | 53248
-FBPIN | 9 | NULL | 0 | A_FSB_7_IBUF | 1 | NULL | 0 | 4 | 53248
-FBPIN | 11 | NULL | 0 | A_FSB_8_IBUF | 1 | NULL | 0 | 6 | 49152
-FBPIN | 12 | NULL | 0 | A_FSB_9_IBUF | 1 | NULL | 0 | 7 | 49152
-FBPIN | 14 | iobm/VPArr | 1 | A_FSB_10_IBUF | 1 | NULL | 0 | 8 | 49152
-FBPIN | 15 | iobm/VPArf | 1 | A_FSB_11_IBUF | 1 | NULL | 0 | 9 | 49152
-FBPIN | 16 | iobm/RESrr | 1 | NULL | 0 | NULL | 0
-FBPIN | 17 | iobm/RESrf | 1 | A_FSB_12_IBUF | 1 | NULL | 0 | 10 | 49152
-FBPIN | 18 | iobm/Er | 1 | NULL | 0 | NULL | 0
+FBPIN | 6 | iobs/IOACTr | 1 | A_FSB_5_IBUF | 1 | NULL | 0 | 2 | 53248
+FBPIN | 7 | iobm/VPArr | 1 | NULL | 0 | NULL | 0
+FBPIN | 8 | iobm/VPArf | 1 | A_FSB_6_IBUF | 1 | NULL | 0 | 3 | 53248
+FBPIN | 9 | iobm/IOREQr | 1 | A_FSB_7_IBUF | 1 | NULL | 0 | 4 | 53248
+FBPIN | 10 | iobm/Er2 | 1 | NULL | 0 | NULL | 0
+FBPIN | 11 | iobm/Er | 1 | A_FSB_8_IBUF | 1 | NULL | 0 | 6 | 49152
+FBPIN | 12 | iobm/DTACKrr | 1 | A_FSB_9_IBUF | 1 | NULL | 0 | 7 | 49152
+FBPIN | 13 | iobm/DTACKrf | 1 | NULL | 0 | NULL | 0
+FBPIN | 14 | iobm/BGr1 | 1 | A_FSB_10_IBUF | 1 | NULL | 0 | 8 | 49152
+FBPIN | 15 | iobm/BGr0 | 1 | A_FSB_11_IBUF | 1 | NULL | 0 | 9 | 49152
+FBPIN | 16 | iobm/BERRrr | 1 | NULL | 0 | NULL | 0
+FBPIN | 17 | iobm/BERRrf | 1 | A_FSB_12_IBUF | 1 | NULL | 0 | 10 | 49152
+FBPIN | 18 | cnt/RefCnt<0> | 1 | NULL | 0 | NULL | 0
 
 FB_INSTANCE | FOOBAR3_ | MXSE_COPY_0_COPY_0 | 0 | 0 | 0
-FBPIN | 1 | EXP14_ | 1 | NULL | 0 | NULL | 0
-FBPIN | 2 | fsb/VPA | 1 | CLK_IOB_IBUF | 1 | NULL | 0 | 23 | 57344
-FBPIN | 3 | EXP15_ | 1 | NULL | 0 | NULL | 0
-FBPIN | 4 | EXP16_ | 1 | NULL | 0 | NULL | 0
-FBPIN | 5 | fsb/Ready1r | 1 | A_FSB_23_IBUF | 1 | NULL | 0 | 24 | 49152
-FBPIN | 6 | EXP17_ | 1 | E_IOB_IBUF | 1 | NULL | 0 | 25 | 49152
-FBPIN | 7 | EXP18_ | 1 | NULL | 0 | NULL | 0
-FBPIN | 8 | EXP19_ | 1 | CLK_FSB_IBUF | 0 | NULL | 0 | 27 | 57344
+FBPIN | 1 | fsb/Ready1r | 1 | NULL | 0 | NULL | 0
+FBPIN | 2 | EXP14_ | 1 | CLK_IOB_IBUF | 1 | NULL | 0 | 23 | 57344
+FBPIN | 3 | iobs/IORW1 | 1 | NULL | 0 | NULL | 0
+FBPIN | 4 | EXP15_ | 1 | NULL | 0 | NULL | 0
+FBPIN | 5 | fsb/Ready2r | 1 | A_FSB_23_IBUF | 1 | NULL | 0 | 24 | 49152
+FBPIN | 6 | EXP16_ | 1 | E_IOB_IBUF | 1 | NULL | 0 | 25 | 49152
+FBPIN | 7 | EXP17_ | 1 | NULL | 0 | NULL | 0
+FBPIN | 8 | EXP18_ | 1 | CLK_FSB_IBUF | 0 | NULL | 0 | 27 | 57344
 FBPIN | 9 | nDTACK_FSB_OBUF | 1 | NULL | 0 | nDTACK_FSB | 1 | 28 | 49152
-FBPIN | 10 | EXP20_ | 1 | NULL | 0 | NULL | 0
-FBPIN | 11 | EXP21_ | 1 | nWE_FSB_IBUF | 1 | NULL | 0 | 29 | 49152
-FBPIN | 12 | EXP22_ | 1 | nLDS_FSB_IBUF | 1 | NULL | 0 | 30 | 49152
-FBPIN | 13 | iobs/IORW1 | 1 | NULL | 0 | NULL | 0
-FBPIN | 14 | EXP23_ | 1 | nAS_FSB_IBUF | 1 | NULL | 0 | 32 | 49152
-FBPIN | 15 | fsb/Ready2r | 1 | nUDS_FSB_IBUF | 1 | NULL | 0 | 33 | 49152
-FBPIN | 16 | EXP24_ | 1 | NULL | 0 | NULL | 0
+FBPIN | 10 | EXP19_ | 1 | NULL | 0 | NULL | 0
+FBPIN | 11 | EXP20_ | 1 | nWE_FSB_IBUF | 1 | NULL | 0 | 29 | 49152
+FBPIN | 12 | NULL | 0 | nLDS_FSB_IBUF | 1 | NULL | 0 | 30 | 49152
+FBPIN | 13 | EXP21_ | 1 | NULL | 0 | NULL | 0
+FBPIN | 14 | EXP22_ | 1 | nAS_FSB_IBUF | 1 | NULL | 0 | 32 | 49152
+FBPIN | 15 | fsb/VPA | 1 | nUDS_FSB_IBUF | 1 | NULL | 0 | 33 | 49152
+FBPIN | 16 | EXP23_ | 1 | NULL | 0 | NULL | 0
 FBPIN | 17 | nROMWE_OBUF | 1 | NULL | 0 | nROMWE | 1 | 34 | 49152
-FBPIN | 18 | EXP25_ | 1 | NULL | 0 | NULL | 0
+FBPIN | 18 | iobs/Clear1 | 1 | NULL | 0 | NULL | 0
 
 FB_INSTANCE | FOOBAR4_ | MXSE_COPY_0_COPY_0 | 0 | 0 | 0
-FBPIN | 1 | ram/BACTr | 1 | NULL | 0 | NULL | 0
+FBPIN | 1 | cnt/RefCnt<6> | 1 | NULL | 0 | NULL | 0
 FBPIN | 2 | nAoutOE_OBUF | 1 | NULL | 0 | nAoutOE | 1 | 87 | 49152
-FBPIN | 3 | iobs/Clear1 | 1 | NULL | 0 | NULL | 0
-FBPIN | 4 | ALE0S | 1 | NULL | 0 | NULL | 0
+FBPIN | 3 | cnt/RefCnt<5> | 1 | NULL | 0 | NULL | 0
+FBPIN | 4 | cnt/RefCnt<4> | 1 | NULL | 0 | NULL | 0
 FBPIN | 5 | nDoutOE_OBUF | 1 | NULL | 0 | nDoutOE | 1 | 89 | 49152
 FBPIN | 6 | nDinOE_OBUF | 1 | NULL | 0 | nDinOE | 1 | 90 | 49152
-FBPIN | 7 | iobs/PS_FSM_FFd1 | 1 | NULL | 0 | NULL | 0
-FBPIN | 8 | iobs/IOU1 | 1 | nRES_IBUF | 1 | NULL | 0 | 91 | 49152
-FBPIN | 9 | iobs/IOL1 | 1 | NULL | 0 | NULL | 0 | 92 | 49152
-FBPIN | 10 | iobm/IOS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0
+FBPIN | 7 | cnt/RefCnt<3> | 1 | NULL | 0 | NULL | 0
+FBPIN | 8 | iobs/PS_FSM_FFd1 | 1 | nRES_IBUF | 1 | NULL | 0 | 91 | 49152
+FBPIN | 9 | fsb/BERR1r | 1 | nIPL2_IBUF | 1 | NULL | 0 | 92 | 49152
+FBPIN | 10 | cs/nOverlay1 | 1 | NULL | 0 | NULL | 0
 FBPIN | 11 | nVPA_FSB_OBUF | 1 | NULL | 0 | nVPA_FSB | 1 | 93 | 49152
-FBPIN | 12 | iobm/IOS_FSM_FFd1 | 1 | A_FSB_1_IBUF | 1 | NULL | 0 | 94 | 49152
-FBPIN | 13 | fsb/BERR1r | 1 | NULL | 0 | NULL | 0
-FBPIN | 14 | cs/nOverlay1 | 1 | A_FSB_2_IBUF | 1 | NULL | 0 | 95 | 49152
-FBPIN | 15 | $OpTx$FX_DC$610 | 1 | A_FSB_3_IBUF | 1 | NULL | 0 | 96 | 49152
-FBPIN | 16 | IOU0 | 1 | NULL | 0 | NULL | 0
-FBPIN | 17 | IOL0 | 1 | A_FSB_4_IBUF | 1 | NULL | 0 | 97 | 49152
-FBPIN | 18 | iobs/IOReady | 1 | NULL | 0 | NULL | 0
+FBPIN | 12 | cnt/RefDone | 1 | A_FSB_1_IBUF | 1 | NULL | 0 | 94 | 49152
+FBPIN | 13 | cs/nOverlay0 | 1 | NULL | 0 | NULL | 0
+FBPIN | 14 | cnt/TimeoutBPre | 1 | A_FSB_2_IBUF | 1 | NULL | 0 | 95 | 49152
+FBPIN | 15 | TimeoutA | 1 | A_FSB_3_IBUF | 1 | NULL | 0 | 96 | 49152
+FBPIN | 16 | IOL0 | 1 | NULL | 0 | NULL | 0
+FBPIN | 17 | iobs/IOReady | 1 | A_FSB_4_IBUF | 1 | NULL | 0 | 97 | 49152
+FBPIN | 18 | BERR_IOBS | 1 | NULL | 0 | NULL | 0
 
 FB_INSTANCE | FOOBAR5_ | MXSE_COPY_0_COPY_0 | 0 | 0 | 0
-FBPIN | 1 | EXP26_ | 1 | NULL | 0 | NULL | 0
+FBPIN | 1 | ram/RASEL | 1 | NULL | 0 | NULL | 0
 FBPIN | 2 | nROMCS_OBUF | 1 | NULL | 0 | nROMCS | 1 | 35 | 49152
-FBPIN | 3 | EXP27_ | 1 | NULL | 0 | NULL | 0
-FBPIN | 4 | iobs/PS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0
+FBPIN | 3 | cnt/RefCnt<7> | 1 | NULL | 0 | NULL | 0
+FBPIN | 4 | ram/RAMDIS2 | 1 | NULL | 0 | NULL | 0
 FBPIN | 5 | nCAS_OBUF | 1 | NULL | 0 | nCAS | 1 | 36 | 49152
 FBPIN | 6 | nOE_OBUF | 1 | NULL | 0 | nOE | 1 | 37 | 49152
-FBPIN | 7 | EXP28_ | 1 | NULL | 0 | NULL | 0
-FBPIN | 8 | iobs/Once | 1 | NULL | 0 | NULL | 0 | 39 | 49152
+FBPIN | 7 | EXP24_ | 1 | NULL | 0 | NULL | 0
+FBPIN | 8 | ram/RAMDIS1 | 1 | NULL | 0 | NULL | 0 | 39 | 49152
 FBPIN | 9 | RA_4_OBUF | 1 | NULL | 0 | RA<4> | 1 | 40 | 49152
-FBPIN | 10 | EXP29_ | 1 | NULL | 0 | NULL | 0
+FBPIN | 10 | EXP25_ | 1 | NULL | 0 | NULL | 0
 FBPIN | 11 | RA_3_OBUF | 1 | NULL | 0 | RA<3> | 1 | 41 | 49152
 FBPIN | 12 | RA_5_OBUF | 1 | NULL | 0 | RA<5> | 1 | 42 | 49152
-FBPIN | 13 | IOREQ | 1 | NULL | 0 | NULL | 0
+FBPIN | 13 | iobs/Load1 | 1 | NULL | 0 | NULL | 0
 FBPIN | 14 | RA_2_OBUF | 1 | NULL | 0 | RA<2> | 1 | 43 | 49152
 FBPIN | 15 | RA_6_OBUF | 1 | NULL | 0 | RA<6> | 1 | 46 | 49152
-FBPIN | 16 | BERR_IOBS | 1 | NULL | 0 | NULL | 0
-FBPIN | 17 | EXP30_ | 1 | NULL | 0 | NULL | 0 | 49 | 49152
-FBPIN | 18 | IORW0 | 1 | NULL | 0 | NULL | 0
+FBPIN | 16 | ram/Once | 1 | NULL | 0 | NULL | 0
+FBPIN | 17 | EXP26_ | 1 | NULL | 0 | NULL | 0 | 49 | 49152
+FBPIN | 18 | EXP27_ | 1 | NULL | 0 | NULL | 0
 
 FB_INSTANCE | FOOBAR6_ | MXSE_COPY_0_COPY_0 | 0 | 0 | 0
 FBPIN | 1 | iobm/ETACK | 1 | NULL | 0 | NULL | 0
-FBPIN | 2 | nVMA_IOB_OBUF | 1 | NULL | 0 | nVMA_IOB | 1 | 74 | 49152
-FBPIN | 3 | ALE0M | 1 | NULL | 0 | NULL | 0
+FBPIN | 2 | nVMA_IOBout | 1 | NULL | 0 | nVMA_IOB | 1 | 74 | 49152
+FBPIN | 3 | iobm/IOS_FSM_FFd3 | 1 | NULL | 0 | NULL | 0
 FBPIN | 4 | iobm/ES<3> | 1 | NULL | 0 | NULL | 0
 FBPIN | 5 | iobm/ES<1> | 1 | nBERR_IOB_IBUF | 1 | NULL | 0 | 76 | 49152
 FBPIN | 6 | iobm/ES<0> | 1 | nVPA_IOB_IBUF | 1 | NULL | 0 | 77 | 49152
-FBPIN | 7 | iobm/IOS_FSM_FFd4 | 1 | NULL | 0 | NULL | 0
+FBPIN | 7 | ALE0M | 1 | NULL | 0 | NULL | 0
 FBPIN | 8 | iobm/ES<4> | 1 | nDTACK_IOB_IBUF | 1 | NULL | 0 | 78 | 49152
-FBPIN | 9 | nLDS_IOB_OBUF | 1 | NULL | 0 | nLDS_IOB | 1 | 79 | 49152
-FBPIN | 10 | iobm/IOS_FSM_FFd3 | 1 | NULL | 0 | NULL | 0
-FBPIN | 11 | nUDS_IOB_OBUF | 1 | NULL | 0 | nUDS_IOB | 1 | 80 | 49152
-FBPIN | 12 | nAS_IOB_OBUF | 1 | NULL | 0 | nAS_IOB | 1 | 81 | 49152
+FBPIN | 9 | nLDS_IOBout | 1 | NULL | 0 | nLDS_IOB | 1 | 79 | 49152
+FBPIN | 10 | iobm/IOS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0
+FBPIN | 11 | nUDS_IOBout | 1 | NULL | 0 | nUDS_IOB | 1 | 80 | 49152
+FBPIN | 12 | nAS_IOBout | 1 | NULL | 0 | nAS_IOB | 1 | 81 | 49152
 FBPIN | 13 | iobm/ES<2> | 1 | NULL | 0 | NULL | 0
 FBPIN | 14 | nADoutLE1_OBUF | 1 | NULL | 0 | nADoutLE1 | 1 | 82 | 49152
 FBPIN | 15 | nADoutLE0_OBUF | 1 | NULL | 0 | nADoutLE0 | 1 | 85 | 49152
@@ -7967,129 +8382,137 @@ FBPIN | 17 | nDinLE_OBUF | 1 | NULL | 0 | nDinLE | 1 | 86 | 49152
 FBPIN | 18 | IOBERR | 1 | NULL | 0 | NULL | 0
 
 FB_INSTANCE | FOOBAR7_ | MXSE_COPY_0_COPY_0 | 0 | 0 | 0
-FBPIN | 1 | TimeoutB | 1 | NULL | 0 | NULL | 0
+FBPIN | 1 | ram/RAMReady | 1 | NULL | 0 | NULL | 0
 FBPIN | 2 | RA_1_OBUF | 1 | NULL | 0 | RA<1> | 1 | 50 | 49152
-FBPIN | 3 | cnt/RefDone | 1 | NULL | 0 | NULL | 0
+FBPIN | 3 | TimeoutB | 1 | NULL | 0 | NULL | 0
 FBPIN | 4 | fsb/Ready0r | 1 | NULL | 0 | NULL | 0
 FBPIN | 5 | RA_7_OBUF | 1 | NULL | 0 | RA<7> | 1 | 52 | 49152
 FBPIN | 6 | RA_0_OBUF | 1 | NULL | 0 | RA<0> | 1 | 53 | 49152
-FBPIN | 7 | cs/nOverlay0 | 1 | NULL | 0 | NULL | 0
+FBPIN | 7 | ram/RS_FSM_FFd1 | 1 | NULL | 0 | NULL | 0
 FBPIN | 8 | RA_8_OBUF | 1 | NULL | 0 | RA<8> | 1 | 54 | 49152
 FBPIN | 9 | A_FSB_21_IBUF$BUF0 | 1 | NULL | 0 | RA<10> | 1 | 55 | 49152
-FBPIN | 10 | cnt/TimeoutBPre | 1 | NULL | 0 | NULL | 0
+FBPIN | 10 | $OpTx$$OpTx$FX_DC$182_INV$783 | 1 | NULL | 0 | NULL | 0
 FBPIN | 11 | RA_9_OBUF | 1 | NULL | 0 | RA<9> | 1 | 56 | 49152
-FBPIN | 12 | TimeoutA | 1 | NULL | 0 | NULL | 0 | 58 | 49152
-FBPIN | 13 | EXP31_ | 1 | NULL | 0 | NULL | 0
-FBPIN | 14 | ram/RS_FSM_FFd3 | 1 | NULL | 0 | NULL | 0 | 59 | 49152
-FBPIN | 15 | EXP32_ | 1 | NULL | 0 | NULL | 0 | 60 | 49152
-FBPIN | 16 | ram/RS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0
-FBPIN | 17 | EXP33_ | 1 | NULL | 0 | NULL | 0 | 61 | 49152
-FBPIN | 18 | ram/RAMReady | 1 | NULL | 0 | NULL | 0
+FBPIN | 12 | CLK25EN_OBUF | 1 | NULL | 0 | CLK25EN | 1 | 58 | 49152
+FBPIN | 13 | ram/RS_FSM_FFd3 | 1 | NULL | 0 | NULL | 0
+FBPIN | 14 | CLK20EN_OBUF$BUF0 | 1 | NULL | 0 | CLK20EN | 1 | 59 | 49152
+FBPIN | 15 | EXP28_ | 1 | SW_1_IBUF | 1 | NULL | 0 | 60 | 49152
+FBPIN | 16 | EXP29_ | 1 | NULL | 0 | NULL | 0
+FBPIN | 17 | ram/RS_FSM_FFd2 | 1 | CLK20EN_OBUF | 1 | NULL | 0 | 61 | 49152
+FBPIN | 18 | EXP30_ | 1 | NULL | 0 | NULL | 0
 
 FB_INSTANCE | FOOBAR8_ | MXSE_COPY_0_COPY_0 | 0 | 0 | 0
-FBPIN | 1 | ram/RASEL | 1 | NULL | 0 | NULL | 0
+FBPIN | 1 | EXP31_ | 1 | NULL | 0 | NULL | 0
 FBPIN | 2 | A_FSB_19_IBUF$BUF0 | 1 | NULL | 0 | RA<11> | 1 | 63 | 49152
-FBPIN | 3 | fsb/BERR0r | 1 | NULL | 0 | NULL | 0
-FBPIN | 4 | ram/RS_FSM_FFd1 | 1 | NULL | 0 | NULL | 0
+FBPIN | 3 | EXP32_ | 1 | NULL | 0 | NULL | 0
+FBPIN | 4 | iobs/PS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0
 FBPIN | 5 | nRAS_OBUF | 1 | NULL | 0 | nRAS | 1 | 64 | 49152
 FBPIN | 6 | nRAMLWE_OBUF | 1 | NULL | 0 | nRAMLWE | 1 | 65 | 49152
-FBPIN | 7 | ram/Once | 1 | NULL | 0 | NULL | 0
+FBPIN | 7 | RESDone | 1 | NULL | 0 | NULL | 0
 FBPIN | 8 | nRAMUWE_OBUF | 1 | NULL | 0 | nRAMUWE | 1 | 66 | 49152
-FBPIN | 9 | iobs/Load1 | 1 | NULL | 0 | NULL | 0 | 67 | 49152
-FBPIN | 10 | EXP34_ | 1 | NULL | 0 | NULL | 0
-FBPIN | 11 | EXP35_ | 1 | NULL | 0 | NULL | 0 | 68 | 49152
+FBPIN | 9 | IOREQ | 1 | NULL | 0 | NULL | 0 | 67 | 49152
+FBPIN | 10 | EXP33_ | 1 | NULL | 0 | NULL | 0
+FBPIN | 11 | EXP34_ | 1 | NULL | 0 | NULL | 0 | 68 | 49152
 FBPIN | 12 | nBERR_FSB_OBUF | 1 | NULL | 0 | nBERR_FSB | 1 | 70 | 49152
-FBPIN | 13 | ram/RAMDIS2 | 1 | NULL | 0 | NULL | 0
-FBPIN | 14 | EXP36_ | 1 | NULL | 0 | NULL | 0 | 71 | 49152
-FBPIN | 15 | ram/RAMDIS1 | 1 | NULL | 0 | NULL | 0 | 72 | 49152
-FBPIN | 16 | EXP37_ | 1 | NULL | 0 | NULL | 0
-FBPIN | 17 | EXP38_ | 1 | NULL | 0 | NULL | 0 | 73 | 49152
-FBPIN | 18 | EXP39_ | 1 | NULL | 0 | NULL | 0
+FBPIN | 13 | EXP35_ | 1 | NULL | 0 | NULL | 0
+FBPIN | 14 | iobs/Once | 1 | NULL | 0 | NULL | 0 | 71 | 49152
+FBPIN | 15 | Park | 1 | NULL | 0 | nBR_IOB | 1 | 72 | 49152
+FBPIN | 16 | fsb/BERR0r | 1 | NULL | 0 | NULL | 0
+FBPIN | 17 | EXP36_ | 1 | nBG_IOB_IBUF | 1 | NULL | 0 | 73 | 49152
+FBPIN | 18 | IORW0 | 1 | NULL | 0 | NULL | 0
 
 FB_INSTANCE | INPUTPINS_FOOBAR9_ | MXSE_COPY_0_COPY_0 | 0 | 0 | 0
 
 BUSINFO | A_FSB<23:1> | 23 | 0 | 0 | A_FSB<10> | 13 | A_FSB<11> | 12 | A_FSB<12> | 11 | A_FSB<13> | 10 | A_FSB<14> | 9 | A_FSB<15> | 8 | A_FSB<16> | 7 | A_FSB<17> | 6 | A_FSB<18> | 5 | A_FSB<19> | 4 | A_FSB<1> | 22 | A_FSB<20> | 3 | A_FSB<21> | 2 | A_FSB<22> | 1 | A_FSB<23> | 0 | A_FSB<2> | 21 | A_FSB<3> | 20 | A_FSB<4> | 19 | A_FSB<5> | 18 | A_FSB<6> | 17 | A_FSB<7> | 16 | A_FSB<8> | 15 | A_FSB<9> | 14
 BUSINFO | RA<11:0> | 12 | 0 | 1 | RA<0> | 11 | RA<10> | 1 | RA<11> | 0 | RA<1> | 10 | RA<2> | 9 | RA<3> | 8 | RA<4> | 7 | RA<5> | 6 | RA<6> | 5 | RA<7> | 4 | RA<8> | 3 | RA<9> | 2
+BUSINFO | SW<2:0> | 3 | 0 | 0 | SW<0> | 2 | SW<1> | 1 | SW<2> | 0
 
-FB_ORDER_OF_INPUTS | FOOBAR1_ | 3 | ram/RS_FSM_FFd1 | NULL | 7 | nDTACK_IOB | 78 | 8 | nAS_FSB | 32 | 9 | cnt/RefCnt<6> | NULL | 10 | cnt/RefCnt<5> | NULL
-FB_ORDER_OF_INPUTS | FOOBAR1_ | 12 | IOREQ | NULL | 15 | IOACT | NULL | 23 | nBERR_IOB | 76 | 33 | ram/RS_FSM_FFd2 | NULL | 40 | iobm/Er | NULL
-FB_ORDER_OF_INPUTS | FOOBAR1_ | 41 | cnt/RefCnt<4> | NULL | 48 | cnt/RefCnt<2> | NULL | 49 | cnt/RefCnt<1> | NULL | 50 | cnt/RefCnt<0> | NULL | 52 | cnt/RefCnt<3> | NULL
-FB_ORDER_OF_INPUTS | FOOBAR1_ | 53 | fsb/ASrf | NULL
+FB_ORDER_OF_INPUTS | FOOBAR1_ | 0 | nLDS_FSB | 30 | 2 | iobm/IOS_FSM_FFd3 | NULL | 3 | iobs/PS_FSM_FFd2 | NULL | 4 | nRES | 91 | 6 | ram/RS_FSM_FFd1 | NULL
+FB_ORDER_OF_INPUTS | FOOBAR1_ | 7 | iobs/PS_FSM_FFd1 | NULL | 8 | nAS_FSB | 32 | 9 | iobm/IOS_FSM_FFd2 | NULL | 12 | iobs/Load1 | NULL | 13 | ALE1 | NULL
+FB_ORDER_OF_INPUTS | FOOBAR1_ | 14 | iobs/IOU1 | NULL | 16 | ram/RS_FSM_FFd2 | NULL | 27 | nUDS_FSB | 33 | 33 | RESr1 | NULL | 40 | cnt/RefCnt<0> | NULL
+FB_ORDER_OF_INPUTS | FOOBAR1_ | 41 | IPL2r0 | NULL | 44 | cnt/RefCnt<1> | NULL | 45 | iobm/IOS_FSM_FFd1 | NULL | 47 | fsb/ASrf | NULL | 49 | nIPL2 | 92
+FB_ORDER_OF_INPUTS | FOOBAR1_ | 51 | RESr0 | NULL
 
-FB_IMUX_INDEX | FOOBAR1_ | -1 | -1 | -1 | 129 | -1 | -1 | -1 | 167 | 268 | 9 | 10 | -1 | 84 | -1 | -1 | 105 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 175 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 123 | -1 | -1 | -1 | -1 | -1 | -1 | 35 | 11 | -1 | -1 | -1 | -1 | -1 | -1 | 13 | 14 | 15 | -1 | 12 | 7
+FB_IMUX_INDEX | FOOBAR1_ | 260 | -1 | 92 | 129 | 148 | -1 | 114 | 61 | 268 | 99 | -1 | -1 | 84 | 103 | 14 | -1 | 124 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 272 | -1 | -1 | -1 | -1 | -1 | 8 | -1 | -1 | -1 | -1 | -1 | -1 | 35 | 11 | -1 | -1 | 5 | 16 | -1 | 3 | -1 | 150 | -1 | 9 | -1 | -1
 
 
-FB_ORDER_OF_INPUTS | FOOBAR2_ | 11 | nVPA_IOB | 77 | 16 | E_IOB | 25 | 51 | nRES | 91
+FB_ORDER_OF_INPUTS | FOOBAR2_ | 7 | nDTACK_IOB | 78 | 8 | IOREQ | NULL | 11 | nVPA_IOB | 77 | 15 | IOACT | NULL | 16 | E_IOB | 25
+FB_ORDER_OF_INPUTS | FOOBAR2_ | 23 | nBERR_IOB | 76 | 28 | iobm/Er | NULL | 37 | iobm/BGr0 | NULL | 43 | nBG_IOB | 73
 
-FB_IMUX_INDEX | FOOBAR2_ | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 171 | -1 | -1 | -1 | -1 | 242 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 148 | -1 | -1
+FB_IMUX_INDEX | FOOBAR2_ | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 167 | 134 | -1 | -1 | 171 | -1 | -1 | -1 | 105 | 242 | -1 | -1 | -1 | -1 | -1 | -1 | 175 | -1 | -1 | -1 | -1 | 28 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 32 | -1 | -1 | -1 | -1 | -1 | 183 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1
 
 
-FB_ORDER_OF_INPUTS | FOOBAR3_ | 0 | TimeoutB | NULL | 1 | fsb/VPA | NULL | 2 | A_FSB<8> | 6 | 3 | iobs/PS_FSM_FFd2 | NULL | 4 | fsb/Ready1r | NULL
-FB_ORDER_OF_INPUTS | FOOBAR3_ | 5 | A_FSB<16> | 14 | 6 | iobs/PS_FSM_FFd1 | NULL | 7 | fsb/ASrf | NULL | 8 | nDTACK_FSB_OBUF.UIM | NULL | 9 | A_FSB<18> | 16
-FB_ORDER_OF_INPUTS | FOOBAR3_ | 10 | A_FSB<11> | 9 | 11 | TimeoutA | NULL | 12 | iobs/IORW1 | NULL | 13 | cs/nOverlay1 | NULL | 14 | fsb/Ready2r | NULL
-FB_ORDER_OF_INPUTS | FOOBAR3_ | 15 | BERR_IOBS | NULL | 16 | A_FSB<13> | 11 | 17 | $OpTx$FX_DC$609.UIM | NULL | 21 | A_FSB<19> | 17 | 24 | A_FSB<15> | 13
-FB_ORDER_OF_INPUTS | FOOBAR3_ | 28 | nWE_FSB | 29 | 30 | A_FSB<20> | 18 | 31 | $OpTx$FX_DC$610.UIM | NULL | 33 | nAS_FSB | 32 | 34 | A_FSB<17> | 15
-FB_ORDER_OF_INPUTS | FOOBAR3_ | 36 | A_FSB<23> | 24 | 37 | fsb/BERR0r | NULL | 39 | A_FSB<22> | 20 | 40 | ram/RAMReady | NULL | 42 | A_FSB<12> | 10
-FB_ORDER_OF_INPUTS | FOOBAR3_ | 43 | A_FSB<10> | 8 | 44 | A_FSB<14> | 12 | 45 | A_FSB<21> | 19 | 46 | ALE1 | NULL | 47 | iobs/IOReady | NULL
-FB_ORDER_OF_INPUTS | FOOBAR3_ | 48 | iobs/Once | NULL | 49 | fsb/BERR1r | NULL | 51 | fsb/Ready0r | NULL | 53 | A_FSB<9> | 7
+FB_ORDER_OF_INPUTS | FOOBAR3_ | 0 | fsb/Ready1r | NULL | 2 | iobs/IORW1 | NULL | 3 | fsb/ASrf | NULL | 4 | fsb/Ready2r | NULL | 5 | A_FSB<16> | 14
+FB_ORDER_OF_INPUTS | FOOBAR3_ | 6 | A_FSB<10> | 8 | 7 | iobs/PS_FSM_FFd1 | NULL | 8 | nDTACK_FSB_OBUF.UIM | NULL | 9 | $OpTx$$OpTx$FX_DC$182_INV$783.UIM | NULL | 10 | A_FSB<11> | 9
+FB_ORDER_OF_INPUTS | FOOBAR3_ | 13 | $OpTx$FX_DC$708.UIM | NULL | 14 | fsb/VPA | NULL | 15 | fsb/BERR0r | NULL | 16 | A_FSB<13> | 11 | 19 | A_FSB<20> | 18
+FB_ORDER_OF_INPUTS | FOOBAR3_ | 21 | A_FSB<19> | 17 | 22 | A_FSB<12> | 10 | 23 | A_FSB<23> | 24 | 24 | A_FSB<22> | 20 | 26 | BERR_IOBS | NULL
+FB_ORDER_OF_INPUTS | FOOBAR3_ | 28 | nWE_FSB | 29 | 31 | TimeoutA | NULL | 33 | nAS_FSB | 32 | 34 | A_FSB<17> | 15 | 36 | cs/nOverlay1 | NULL
+FB_ORDER_OF_INPUTS | FOOBAR3_ | 37 | iobs/IOReady | NULL | 38 | fsb/BERR1r | NULL | 39 | SW<1> | 60 | 40 | A_FSB<8> | 6 | 42 | Disable | NULL
+FB_ORDER_OF_INPUTS | FOOBAR3_ | 43 | iobs/Once | NULL | 44 | A_FSB<14> | 12 | 45 | iobs/PS_FSM_FFd2 | NULL | 46 | A_FSB<15> | 13 | 47 | A_FSB<21> | 19
+FB_ORDER_OF_INPUTS | FOOBAR3_ | 49 | ALE1 | NULL | 50 | A_FSB<18> | 16 | 53 | A_FSB<9> | 7
 
-FB_IMUX_INDEX | FOOBAR3_ | 108 | 37 | 194 | 75 | 40 | 214 | 60 | 7 | 44 | 218 | 202 | 119 | 48 | 67 | 50 | 87 | 208 | 17 | -1 | -1 | -1 | 222 | -1 | -1 | 212 | -1 | -1 | -1 | 256 | -1 | 226 | 68 | -1 | 268 | 216 | -1 | 240 | 128 | -1 | 230 | 125 | -1 | 206 | 198 | 210 | 228 | 103 | 71 | 79 | 66 | -1 | 111 | -1 | 196
+FB_IMUX_INDEX | FOOBAR3_ | 36 | -1 | 38 | 3 | 40 | 214 | 198 | 61 | 44 | 117 | 202 | -1 | -1 | 13 | 50 | 141 | 208 | -1 | -1 | 226 | -1 | 222 | 206 | 240 | 230 | -1 | 71 | -1 | 256 | -1 | -1 | 68 | -1 | 268 | 216 | -1 | 63 | 70 | 62 | 215 | 194 | -1 | 140 | 139 | 210 | 129 | 212 | 228 | -1 | 103 | 218 | -1 | -1 | 196
 
 
-FB_ORDER_OF_INPUTS | FOOBAR4_ | 0 | A_FSB<20> | 18 | 3 | iobs/PS_FSM_FFd2 | NULL | 6 | iobm/IOS_FSM_FFd4 | NULL | 7 | fsb/ASrf | NULL | 8 | iobs/IOL1 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR4_ | 9 | iobm/IOS_FSM_FFd3 | NULL | 12 | nUDS_FSB | 33 | 13 | ALE1 | NULL | 14 | A_FSB<23> | 24 | 17 | iobs/IOReady | NULL
-FB_ORDER_OF_INPUTS | FOOBAR4_ | 24 | A_FSB<22> | 20 | 27 | fsb/VPA | NULL | 28 | nWE_FSB | 29 | 33 | nAS_FSB | 32 | 34 | iobs/IOU1 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR4_ | 35 | iobs/PS_FSM_FFd1 | NULL | 36 | iobm/IOS_FSM_FFd2 | NULL | 37 | nLDS_FSB | 30 | 41 | iobs/Load1 | NULL | 42 | iobs/IOACTr | NULL
-FB_ORDER_OF_INPUTS | FOOBAR4_ | 43 | BERR_IOBS | NULL | 45 | IOBERR | NULL | 46 | IORW0 | NULL | 47 | A_FSB<21> | 19 | 48 | iobs/Once | NULL
-FB_ORDER_OF_INPUTS | FOOBAR4_ | 49 | fsb/BERR1r | NULL | 50 | TimeoutB | NULL | 52 | cs/nOverlay0 | NULL | 53 | iobm/IOS_FSM_FFd1 | NULL
+FB_ORDER_OF_INPUTS | FOOBAR4_ | 0 | cnt/RefCnt<6> | NULL | 1 | iobm/BG | NULL | 2 | A_FSB<21> | 19 | 3 | iobs/PS_FSM_FFd2 | NULL | 4 | nRES | 91
+FB_ORDER_OF_INPUTS | FOOBAR4_ | 5 | iobs/IOACTr | NULL | 6 | RefAck | NULL | 8 | nAS_FSB | 32 | 9 | iobm/IOS_FSM_FFd2 | NULL | 11 | nAS_IOBout | NULL
+FB_ORDER_OF_INPUTS | FOOBAR4_ | 12 | cs/nOverlay0 | NULL | 13 | iobm/BGr1 | NULL | 14 | A_FSB<23> | 24 | 15 | iobs/IOL1 | NULL | 16 | iobs/IOReady | NULL
+FB_ORDER_OF_INPUTS | FOOBAR4_ | 17 | IOBERR | NULL | 18 | cnt/RefCnt<4> | NULL | 19 | A_FSB<20> | 18 | 21 | IORW0 | NULL | 23 | SW<1> | 60
+FB_ORDER_OF_INPUTS | FOOBAR4_ | 24 | A_FSB<22> | 20 | 26 | BERR_IOBS | NULL | 28 | nWE_FSB | 29 | 31 | TimeoutA | NULL | 32 | iobm/BGr0 | NULL
+FB_ORDER_OF_INPUTS | FOOBAR4_ | 33 | cnt/RefCnt<5> | NULL | 34 | iobs/PS_FSM_FFd1 | NULL | 35 | cnt/RefCnt<3> | NULL | 36 | cnt/RefCnt<2> | NULL | 37 | nLDS_FSB | 30
+FB_ORDER_OF_INPUTS | FOOBAR4_ | 38 | fsb/BERR1r | NULL | 39 | cnt/RefCnt<7> | NULL | 40 | cnt/RefCnt<0> | NULL | 42 | fsb/VPA | NULL | 43 | iobs/Once | NULL
+FB_ORDER_OF_INPUTS | FOOBAR4_ | 44 | cnt/RefCnt<1> | NULL | 45 | cnt/TimeoutBPre | NULL | 47 | fsb/ASrf | NULL | 49 | ALE1 | NULL | 51 | iobm/IOS_FSM_FFd3 | NULL
+FB_ORDER_OF_INPUTS | FOOBAR4_ | 53 | cnt/RefDone | NULL
 
-FB_IMUX_INDEX | FOOBAR4_ | 226 | -1 | -1 | 75 | -1 | -1 | 96 | 7 | 62 | 99 | -1 | -1 | 272 | 103 | 240 | -1 | -1 | 71 | -1 | -1 | -1 | -1 | -1 | -1 | 230 | -1 | -1 | 37 | 256 | -1 | -1 | -1 | -1 | 268 | 61 | 60 | 63 | 260 | -1 | -1 | -1 | 134 | 0 | 87 | -1 | 107 | 89 | 228 | 79 | 66 | 108 | -1 | 114 | 65
+FB_IMUX_INDEX | FOOBAR4_ | 54 | 55 | 228 | 129 | 148 | 23 | 6 | -1 | 268 | 99 | -1 | 101 | 66 | 31 | 240 | 15 | 70 | 107 | 57 | 226 | -1 | 143 | -1 | 215 | 230 | -1 | 71 | -1 | 256 | -1 | -1 | 68 | 32 | 56 | 61 | 60 | 4 | 260 | 62 | 74 | 35 | -1 | 50 | 139 | 5 | 67 | -1 | 3 | -1 | 103 | -1 | 92 | -1 | 65
 
 
-FB_ORDER_OF_INPUTS | FOOBAR5_ | 0 | iobs/IOACTr | NULL | 1 | A_FSB<14> | 12 | 2 | A_FSB<21> | 19 | 3 | A_FSB<15> | 13 | 4 | A_FSB<22> | 20
-FB_ORDER_OF_INPUTS | FOOBAR5_ | 5 | A_FSB<16> | 14 | 6 | iobs/PS_FSM_FFd1 | NULL | 7 | iobs/Once | NULL | 8 | A_FSB<3> | 96 | 10 | A_FSB<6> | 3
-FB_ORDER_OF_INPUTS | FOOBAR5_ | 12 | A_FSB<4> | 97 | 13 | ALE1 | NULL | 14 | A_FSB<7> | 4 | 15 | BERR_IOBS | NULL | 17 | IORW0 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR5_ | 18 | A_FSB<19> | 17 | 24 | iobs/IORW1 | NULL | 27 | ram/RASEL | NULL | 28 | nWE_FSB | 29 | 30 | A_FSB<20> | 18
-FB_ORDER_OF_INPUTS | FOOBAR5_ | 33 | nAS_FSB | 32 | 34 | A_FSB<17> | 15 | 36 | A_FSB<23> | 24 | 39 | A_FSB<5> | 2 | 41 | cs/nOverlay1 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR5_ | 42 | A_FSB<12> | 10 | 44 | A_FSB<13> | 11 | 45 | IOBERR | NULL | 50 | A_FSB<18> | 16 | 52 | iobs/PS_FSM_FFd2 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR5_ | 53 | fsb/ASrf | NULL
+FB_ORDER_OF_INPUTS | FOOBAR5_ | 0 | ram/RASEL | NULL | 1 | A_FSB<14> | 12 | 2 | cnt/RefCnt<5> | NULL | 3 | fsb/ASrf | NULL | 4 | cnt/RefCnt<2> | NULL
+FB_ORDER_OF_INPUTS | FOOBAR5_ | 5 | cnt/RefCnt<1> | NULL | 6 | cnt/RefCnt<3> | NULL | 7 | iobs/PS_FSM_FFd1 | NULL | 8 | A_FSB<3> | 96 | 9 | cs/nOverlay1 | NULL
+FB_ORDER_OF_INPUTS | FOOBAR5_ | 10 | A_FSB<6> | 3 | 11 | cnt/RefDone | NULL | 12 | ram/RS_FSM_FFd3 | NULL | 13 | ALE1 | NULL | 14 | A_FSB<7> | 4
+FB_ORDER_OF_INPUTS | FOOBAR5_ | 15 | ram/Once | NULL | 16 | ram/RS_FSM_FFd2 | NULL | 17 | cnt/RefCnt<0> | NULL | 19 | A_FSB<20> | 18 | 20 | cnt/RefCnt<6> | NULL
+FB_ORDER_OF_INPUTS | FOOBAR5_ | 21 | A_FSB<19> | 17 | 22 | A_FSB<12> | 10 | 23 | SW<1> | 60 | 24 | A_FSB<22> | 20 | 28 | nWE_FSB | 29
+FB_ORDER_OF_INPUTS | FOOBAR5_ | 30 | A_FSB<4> | 97 | 33 | nAS_FSB | 32 | 34 | A_FSB<5> | 2 | 36 | A_FSB<23> | 24 | 39 | cnt/RefCnt<7> | NULL
+FB_ORDER_OF_INPUTS | FOOBAR5_ | 40 | ram/BACTr | NULL | 41 | ram/RS_FSM_FFd1 | NULL | 42 | cnt/RefCnt<4> | NULL | 43 | iobs/Once | NULL | 44 | A_FSB<13> | 11
+FB_ORDER_OF_INPUTS | FOOBAR5_ | 45 | iobs/PS_FSM_FFd2 | NULL | 46 | A_FSB<15> | 13 | 47 | A_FSB<21> | 19 | 49 | A_FSB<17> | 15 | 50 | A_FSB<18> | 16
+FB_ORDER_OF_INPUTS | FOOBAR5_ | 52 | ram/RAMDIS2 | NULL | 53 | A_FSB<16> | 14
 
-FB_IMUX_INDEX | FOOBAR5_ | 0 | 210 | 228 | 212 | 230 | 214 | 60 | 79 | 168 | -1 | 186 | -1 | 172 | 103 | 190 | 87 | -1 | 89 | 222 | -1 | -1 | -1 | -1 | -1 | 48 | -1 | -1 | 126 | 256 | -1 | 226 | -1 | -1 | 268 | 216 | -1 | 240 | -1 | -1 | 182 | -1 | 67 | 206 | -1 | 208 | 107 | -1 | -1 | -1 | -1 | 218 | -1 | 75 | 7
+FB_IMUX_INDEX | FOOBAR5_ | 72 | 210 | 56 | 3 | 4 | 5 | 60 | 61 | 168 | 63 | 186 | 65 | 120 | 103 | 190 | 87 | 124 | 35 | -1 | 226 | 54 | 222 | 206 | 215 | 230 | -1 | -1 | -1 | 256 | -1 | 172 | -1 | -1 | 268 | 182 | -1 | 240 | -1 | -1 | 74 | 0 | 114 | 57 | 139 | 208 | 129 | 212 | 228 | -1 | 216 | 218 | -1 | 75 | 214
 
 
-FB_ORDER_OF_INPUTS | FOOBAR6_ | 0 | iobm/ETACK | NULL | 1 | iobm/IOREQr | NULL | 2 | iobm/Er2 | NULL | 3 | iobm/DTACKrr | NULL | 4 | iobm/DTACKrf | NULL
-FB_ORDER_OF_INPUTS | FOOBAR6_ | 5 | iobm/BERRrr | NULL | 6 | iobm/BERRrf | NULL | 7 | iobm/ES<4> | NULL | 8 | iobs/Load1 | NULL | 9 | iobm/IOS_FSM_FFd2 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR6_ | 11 | iobm/IOS_FSM_FFd1 | NULL | 12 | iobm/ES<2> | NULL | 13 | iobm/VPArr | NULL | 14 | iobm/VPArf | NULL | 15 | iobm/RESrr | NULL
-FB_ORDER_OF_INPUTS | FOOBAR6_ | 16 | iobm/RESrf | NULL | 17 | iobm/Er | NULL | 20 | iobm/ES<3> | NULL | 23 | nBERR_IOB | 76 | 28 | iobm/ES<1> | NULL
-FB_ORDER_OF_INPUTS | FOOBAR6_ | 32 | iobm/IOS_FSM_FFd4 | NULL | 33 | iobs/Clear1 | NULL | 37 | IOL0 | NULL | 38 | IOACT | NULL | 39 | iobm/ES<0> | NULL
-FB_ORDER_OF_INPUTS | FOOBAR6_ | 42 | ALE0S | NULL | 44 | nVMA_IOB_OBUF | NULL | 46 | IORW0 | NULL | 47 | iobm/IOS_FSM_FFd3 | NULL | 48 | CLK_IOB | 23
-FB_ORDER_OF_INPUTS | FOOBAR6_ | 49 | ALE1 | NULL | 50 | IOU0 | NULL | 51 | ALE0M | NULL | 53 | IOBERR | NULL
+FB_ORDER_OF_INPUTS | FOOBAR6_ | 0 | iobm/ETACK | NULL | 1 | iobm/RESrr | NULL | 2 | iobm/RESrf | NULL | 3 | iobm/ES<3> | NULL | 4 | iobm/ES<1> | NULL
+FB_ORDER_OF_INPUTS | FOOBAR6_ | 5 | iobm/ES<0> | NULL | 6 | iobm/VPArr | NULL | 7 | iobm/VPArf | NULL | 8 | iobm/IOREQr | NULL | 9 | iobm/Er2 | NULL
+FB_ORDER_OF_INPUTS | FOOBAR6_ | 10 | iobm/Er | NULL | 11 | iobm/DTACKrr | NULL | 12 | ALE0S | NULL | 15 | iobm/BERRrr | NULL | 16 | iobm/IOS_FSM_FFd1 | NULL
+FB_ORDER_OF_INPUTS | FOOBAR6_ | 17 | IOU0 | NULL | 21 | IORW0 | NULL | 23 | nBERR_IOB | 76 | 29 | iobm/ES<2> | NULL | 30 | iobm/IOS_FSM_FFd3 | NULL
+FB_ORDER_OF_INPUTS | FOOBAR6_ | 32 | ALE0M | NULL | 37 | iobs/Load1 | NULL | 38 | IOACT | NULL | 40 | iobm/IOS_FSM_FFd2 | NULL | 42 | iobm/ES<4> | NULL
+FB_ORDER_OF_INPUTS | FOOBAR6_ | 43 | IOL0 | NULL | 44 | nVMA_IOBout | NULL | 46 | iobm/BERRrf | NULL | 47 | iobm/DTACKrf | NULL | 48 | CLK_IOB | 23
+FB_ORDER_OF_INPUTS | FOOBAR6_ | 49 | ALE1 | NULL | 50 | iobs/Clear1 | NULL | 51 | iobm/BG | NULL | 53 | IOBERR | NULL
 
-FB_IMUX_INDEX | FOOBAR6_ | 90 | 1 | 2 | 3 | 4 | 5 | 6 | 97 | 134 | 63 | -1 | 65 | 102 | 31 | 32 | 33 | 34 | 35 | -1 | -1 | 93 | -1 | -1 | 175 | -1 | -1 | -1 | -1 | 94 | -1 | -1 | -1 | 96 | 56 | -1 | -1 | -1 | 70 | 105 | 95 | -1 | -1 | 57 | -1 | 91 | -1 | 89 | 99 | 238 | 103 | 69 | 92 | -1 | 107
+FB_IMUX_INDEX | FOOBAR6_ | 90 | 1 | 2 | 93 | 94 | 95 | 24 | 25 | 26 | 27 | 28 | 29 | 12 | -1 | -1 | 33 | 16 | 17 | -1 | -1 | -1 | 143 | -1 | 175 | -1 | -1 | -1 | -1 | -1 | 102 | 92 | -1 | 96 | -1 | -1 | -1 | -1 | 84 | 105 | -1 | 99 | -1 | 97 | 69 | 91 | -1 | 34 | 30 | 238 | 103 | 53 | 55 | -1 | 107
 
 
-FB_ORDER_OF_INPUTS | FOOBAR7_ | 0 | ram/BACTr | NULL | 2 | cnt/RefDone | NULL | 3 | fsb/Ready0r | NULL | 4 | nRES | 91 | 6 | cs/nOverlay0 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR7_ | 7 | A_FSB<17> | 15 | 8 | nAS_FSB | 32 | 9 | cnt/RefCnt<6> | NULL | 10 | cnt/RefCnt<5> | NULL | 11 | cnt/RefCnt<4> | NULL
-FB_ORDER_OF_INPUTS | FOOBAR7_ | 12 | cnt/RefCnt<3> | NULL | 13 | cnt/RefCnt<2> | NULL | 14 | cnt/RefCnt<1> | NULL | 15 | cnt/RefCnt<0> | NULL | 16 | RefAck | NULL
-FB_ORDER_OF_INPUTS | FOOBAR7_ | 17 | ram/RAMReady | NULL | 18 | A_FSB<19> | 17 | 21 | TimeoutA | NULL | 24 | A_FSB<22> | 20 | 26 | A_FSB<9> | 7
-FB_ORDER_OF_INPUTS | FOOBAR7_ | 27 | ram/RASEL | NULL | 30 | A_FSB<20> | 18 | 31 | cnt/RefCnt<7> | NULL | 33 | ram/RS_FSM_FFd2 | NULL | 34 | ram/RS_FSM_FFd1 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR7_ | 36 | A_FSB<23> | 24 | 39 | A_FSB<1> | 94 | 40 | A_FSB<8> | 6 | 41 | cs/nOverlay1 | NULL | 43 | A_FSB<10> | 8
-FB_ORDER_OF_INPUTS | FOOBAR7_ | 45 | A_FSB<18> | 16 | 46 | ram/RS_FSM_FFd3 | NULL | 47 | A_FSB<21> | 19 | 48 | A_FSB<2> | 95 | 49 | cnt/TimeoutBPre | NULL
-FB_ORDER_OF_INPUTS | FOOBAR7_ | 50 | TimeoutB | NULL | 51 | ram/Once | NULL | 52 | A_FSB<11> | 9 | 53 | fsb/ASrf | NULL
+FB_ORDER_OF_INPUTS | FOOBAR7_ | 0 | ram/RAMReady | NULL | 2 | cnt/RefCnt<5> | NULL | 3 | fsb/ASrf | NULL | 4 | SW<0> | 61 | 5 | cnt/RefCnt<1> | NULL
+FB_ORDER_OF_INPUTS | FOOBAR7_ | 6 | cnt/RefCnt<3> | NULL | 7 | A_FSB<17> | 15 | 8 | nAS_FSB | 32 | 9 | cs/nOverlay1 | NULL | 11 | cnt/RefDone | NULL
+FB_ORDER_OF_INPUTS | FOOBAR7_ | 12 | A_FSB<1> | 94 | 13 | cnt/TimeoutBPre | NULL | 14 | A_FSB<23> | 24 | 17 | cnt/RefCnt<0> | NULL | 18 | cnt/RefCnt<4> | NULL
+FB_ORDER_OF_INPUTS | FOOBAR7_ | 19 | A_FSB<2> | 95 | 20 | cnt/RefCnt<6> | NULL | 21 | A_FSB<19> | 17 | 24 | A_FSB<22> | 20 | 29 | ram/RS_FSM_FFd2 | NULL
+FB_ORDER_OF_INPUTS | FOOBAR7_ | 30 | A_FSB<20> | 18 | 31 | A_FSB<10> | 8 | 36 | cnt/RefCnt<2> | NULL | 39 | cnt/RefCnt<7> | NULL | 40 | A_FSB<8> | 6
+FB_ORDER_OF_INPUTS | FOOBAR7_ | 41 | ram/RS_FSM_FFd1 | NULL | 42 | ram/BACTr | NULL | 43 | ram/Once | NULL | 44 | TimeoutB | NULL | 45 | A_FSB<21> | 19
+FB_ORDER_OF_INPUTS | FOOBAR7_ | 47 | ram/RASEL | NULL | 48 | ram/RS_FSM_FFd3 | NULL | 50 | A_FSB<18> | 16 | 51 | fsb/Ready0r | NULL | 52 | A_FSB<11> | 9
+FB_ORDER_OF_INPUTS | FOOBAR7_ | 53 | A_FSB<9> | 7
 
-FB_IMUX_INDEX | FOOBAR7_ | 54 | -1 | 110 | 111 | 148 | -1 | 114 | 216 | 268 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 125 | 222 | -1 | -1 | 119 | -1 | -1 | 230 | -1 | 196 | 126 | -1 | -1 | 226 | 8 | -1 | 123 | 129 | -1 | 240 | -1 | -1 | 156 | 194 | 67 | -1 | 198 | -1 | 218 | 121 | 228 | 164 | 117 | 108 | 132 | 202 | 7
+FB_IMUX_INDEX | FOOBAR7_ | 108 | -1 | 56 | 3 | 213 | 5 | 60 | 216 | 268 | 63 | -1 | 65 | 156 | 67 | 240 | -1 | -1 | 35 | 57 | 164 | 54 | 222 | -1 | -1 | 230 | -1 | -1 | -1 | -1 | 124 | 226 | 198 | -1 | -1 | -1 | -1 | 4 | -1 | -1 | 74 | 194 | 114 | 0 | 87 | 110 | 228 | -1 | 72 | 120 | -1 | 218 | 111 | 202 | 196
 
 
-FB_ORDER_OF_INPUTS | FOOBAR8_ | 0 | TimeoutB | NULL | 1 | A_FSB<14> | 12 | 2 | fsb/BERR0r | NULL | 3 | iobs/PS_FSM_FFd2 | NULL | 4 | A_FSB<22> | 20
-FB_ORDER_OF_INPUTS | FOOBAR8_ | 6 | ram/Once | NULL | 7 | fsb/ASrf | NULL | 8 | nAS_FSB | 32 | 12 | fsb/BERR1r | NULL | 13 | cs/nOverlay1 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR8_ | 14 | ram/RAMDIS1 | NULL | 15 | ram/RS_FSM_FFd2 | NULL | 16 | A_FSB<13> | 11 | 18 | A_FSB<19> | 17 | 27 | nUDS_FSB | 33
-FB_ORDER_OF_INPUTS | FOOBAR8_ | 28 | nWE_FSB | 29 | 30 | A_FSB<20> | 18 | 32 | ram/RAMDIS2 | NULL | 33 | cnt/RefCnt<7> | NULL | 34 | ram/RS_FSM_FFd1 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR8_ | 35 | iobs/PS_FSM_FFd1 | NULL | 36 | A_FSB<23> | 24 | 37 | nLDS_FSB | 30 | 39 | cnt/RefCnt<5> | NULL | 42 | ram/RS_FSM_FFd3 | NULL
-FB_ORDER_OF_INPUTS | FOOBAR8_ | 43 | BERR_IOBS | NULL | 44 | cnt/RefDone | NULL | 45 | RefAck | NULL | 46 | ALE1 | NULL | 47 | A_FSB<21> | 19
-FB_ORDER_OF_INPUTS | FOOBAR8_ | 48 | iobs/Once | NULL | 49 | A_FSB<17> | 15 | 50 | A_FSB<18> | 16 | 51 | cnt/RefCnt<6> | NULL | 52 | ram/BACTr | NULL
-FB_ORDER_OF_INPUTS | FOOBAR8_ | 53 | A_FSB<16> | 14
+FB_ORDER_OF_INPUTS | FOOBAR8_ | 0 | A_FSB<20> | 18 | 1 | A_FSB<14> | 12 | 2 | A_FSB<21> | 19 | 3 | ram/RAMDIS2 | NULL | 4 | A_FSB<22> | 20
+FB_ORDER_OF_INPUTS | FOOBAR8_ | 6 | RESDone | NULL | 7 | RESr2 | NULL | 8 | RESr1 | NULL | 9 | RESr0 | NULL | 10 | IPL2r1 | NULL
+FB_ORDER_OF_INPUTS | FOOBAR8_ | 11 | IPL2r0 | NULL | 12 | nUDS_FSB | 33 | 13 | ALE1 | NULL | 14 | A_FSB<23> | 24 | 16 | A_FSB<13> | 11
+FB_ORDER_OF_INPUTS | FOOBAR8_ | 17 | IORW0 | NULL | 21 | A_FSB<19> | 17 | 23 | SW<1> | 60 | 25 | iobs/Once | NULL | 26 | BERR_IOBS | NULL
+FB_ORDER_OF_INPUTS | FOOBAR8_ | 28 | nWE_FSB | 29 | 30 | fsb/BERR0r | NULL | 33 | nAS_FSB | 32 | 34 | iobs/PS_FSM_FFd1 | NULL | 36 | cs/nOverlay1 | NULL
+FB_ORDER_OF_INPUTS | FOOBAR8_ | 37 | nLDS_FSB | 30 | 38 | fsb/BERR1r | NULL | 39 | iobs/IORW1 | NULL | 41 | ram/RAMDIS1 | NULL | 43 | RefAck | NULL
+FB_ORDER_OF_INPUTS | FOOBAR8_ | 44 | TimeoutB | NULL | 45 | iobs/PS_FSM_FFd2 | NULL | 47 | fsb/ASrf | NULL | 48 | iobs/IOACTr | NULL | 49 | A_FSB<17> | 15
+FB_ORDER_OF_INPUTS | FOOBAR8_ | 50 | A_FSB<18> | 16 | 53 | A_FSB<16> | 14
 
-FB_IMUX_INDEX | FOOBAR8_ | 108 | 210 | 128 | 75 | 230 | -1 | 132 | 7 | 268 | -1 | -1 | -1 | 66 | 67 | 140 | 123 | 208 | -1 | 222 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 272 | 256 | -1 | 226 | -1 | 138 | 8 | 129 | 60 | 240 | 260 | -1 | 10 | -1 | -1 | 121 | 87 | 110 | 16 | 103 | 228 | 79 | 216 | 218 | 9 | 54 | 214
+FB_IMUX_INDEX | FOOBAR8_ | 226 | 210 | 228 | 75 | 230 | -1 | 132 | 7 | 8 | 9 | 10 | 11 | 272 | 103 | 240 | -1 | 208 | 143 | -1 | -1 | -1 | 222 | -1 | 215 | -1 | 139 | 71 | -1 | 256 | -1 | 141 | -1 | -1 | 268 | 61 | -1 | 63 | 260 | 62 | 38 | -1 | 79 | -1 | 6 | 110 | 129 | -1 | 3 | 23 | 216 | 218 | -1 | -1 | 214
 
 
 GLOBAL_FCLK | CLK2X_IOB | 0 | 0 | CLK_IOB | 1 | 1 | CLK_FSB | 2 | 2
diff --git a/cpld/XC95144XL/MXSE.xml b/cpld/XC95144XL/MXSE.xml
new file mode 100644
index 0000000..0e546e8
--- /dev/null
+++ b/cpld/XC95144XL/MXSE.xml
@@ -0,0 +1,3 @@
+<?xml version='1.0' encoding='utf-8' ?>
+<!DOCTYPE document SYSTEM "file:///C:/Xilinx/14.7/ISE_DS/ISE/xc9500xl/data/xmlReport9kxl.dtd">
+<document><ascFile>MXSE.rpt</ascFile><devFile>C:/Xilinx/14.7/ISE_DS/ISE/xc9500xl/data/xc95144xl.chp</devFile><mfdFile>MXSE.mfd</mfdFile><htmlFile logic_legend="logiclegend.htm" logo="xc9500xl_logo.jpg" pin_legend="pinlegend.htm"/><header date=" 3-27-2022" design="MXSE" device="XC95144XL" eqnType="1" pkg="TQ100" speed="-10" status="1" statusStr="Successful" swVersion="P.20131013" time=" 10:08AM" version="1.0"/><inputs id="A_FSB9_SPECSIG" userloc="P7"/><inputs id="A_FSB8_SPECSIG" userloc="P6"/><inputs id="A_FSB15_SPECSIG" userloc="P13"/><inputs id="A_FSB14_SPECSIG" userloc="P12"/><inputs id="A_FSB13_SPECSIG" userloc="P11"/><inputs id="A_FSB12_SPECSIG" userloc="P10"/><inputs id="A_FSB11_SPECSIG" userloc="P9"/><inputs id="A_FSB10_SPECSIG" userloc="P8"/><inputs id="A_FSB23_SPECSIG" userloc="P24"/><inputs id="A_FSB22_SPECSIG" userloc="P20"/><inputs id="A_FSB21_SPECSIG" userloc="P19"/><inputs id="A_FSB20_SPECSIG" userloc="P18"/><inputs id="A_FSB19_SPECSIG" userloc="P17"/><inputs id="A_FSB18_SPECSIG" userloc="P16"/><inputs id="A_FSB17_SPECSIG" userloc="P15"/><inputs id="A_FSB16_SPECSIG" userloc="P14"/><inputs id="nAS_FSB" userloc="P32"/><inputs id="nWE_FSB" userloc="P29"/><inputs id="SW1_SPECSIG" userloc="P60"/><inputs id="nRES" userloc="P91"/><inputs id="nLDS_FSB" userloc="P30"/><inputs id="nUDS_FSB" userloc="P33"/><inputs id="nBERR_IOB" userloc="P76"/><inputs id="E_IOB" userloc="P25"/><inputs id="nIPL2" userloc="P92"/><inputs id="nBG_IOB" userloc="P73"/><inputs id="nDTACK_IOB" userloc="P78"/><inputs id="nVPA_IOB" userloc="P77"/><inputs id="A_FSB1_SPECSIG" userloc="P94"/><inputs id="A_FSB2_SPECSIG" userloc="P95"/><inputs id="A_FSB3_SPECSIG" userloc="P96"/><inputs id="A_FSB4_SPECSIG" userloc="P97"/><inputs id="A_FSB5_SPECSIG" userloc="P2"/><inputs id="A_FSB6_SPECSIG" userloc="P3"/><inputs id="A_FSB7_SPECSIG" userloc="P4"/><inputs id="SW0_SPECSIG" userloc="P61"/><global_inputs id="CLK2X_IOB" pinnum="GCK1" use="GCK1" userloc="P22"/><global_inputs id="CLK_IOB" pinnum="GCK2" use="GCK2" userloc="P23"/><global_inputs id="CLK_FSB" pinnum="GCK3" use="GCK3" userloc="P27"/><pin id="FB1_MC2_PIN11" pinnum="11" signal="A_FSB13_SPECSIG" use="I"/><pin id="FB1_MC3_PIN12" pinnum="12" signal="A_FSB14_SPECSIG" use="I"/><pin id="FB1_MC5_PIN13" pinnum="13" signal="A_FSB15_SPECSIG" use="I"/><pin id="FB1_MC6_PIN14" pinnum="14" signal="A_FSB16_SPECSIG" use="I"/><pin id="FB1_MC8_PIN15" pinnum="15" signal="A_FSB17_SPECSIG" use="I"/><pin id="FB1_MC9_PIN16" pinnum="16" signal="A_FSB18_SPECSIG" use="I"/><pin id="FB1_MC11_PIN17" pinnum="17" signal="A_FSB19_SPECSIG" use="I"/><pin id="FB1_MC12_PIN18" pinnum="18" signal="A_FSB20_SPECSIG" use="I"/><pin id="FB1_MC14_PIN19" pinnum="19" signal="A_FSB21_SPECSIG" use="I"/><pin id="FB1_MC15_PIN20" pinnum="20" signal="A_FSB22_SPECSIG" use="I"/><pin id="FB1_MC17_PIN22" pinnum="22" signal="CLK2X_IOB" use="GCK"/><pin id="FB2_MC2_PIN99" pinnum="99"/><pin id="FB2_MC5_PIN1" pinnum="1"/><pin id="FB2_MC6_PIN2" pinnum="2" signal="A_FSB5_SPECSIG" use="I"/><pin id="FB2_MC8_PIN3" pinnum="3" signal="A_FSB6_SPECSIG" use="I"/><pin id="FB2_MC9_PIN4" pinnum="4" signal="A_FSB7_SPECSIG" use="I"/><pin id="FB2_MC11_PIN6" pinnum="6" signal="A_FSB8_SPECSIG" use="I"/><pin id="FB2_MC12_PIN7" pinnum="7" signal="A_FSB9_SPECSIG" use="I"/><pin id="FB2_MC14_PIN8" pinnum="8" signal="A_FSB10_SPECSIG" use="I"/><pin id="FB2_MC15_PIN9" pinnum="9" signal="A_FSB11_SPECSIG" use="I"/><pin id="FB2_MC17_PIN10" pinnum="10" signal="A_FSB12_SPECSIG" use="I"/><pin id="FB3_MC2_PIN23" pinnum="23" signal="CLK_IOB" use="GCKI_SPECSIG"/><pin id="FB3_MC5_PIN24" pinnum="24" signal="A_FSB23_SPECSIG" use="I"/><pin id="FB3_MC6_PIN25" pinnum="25" signal="E_IOB" use="I"/><pin id="FB3_MC8_PIN27" pinnum="27" signal="CLK_FSB" use="GCK"/><pin id="FB3_MC9_PIN28" pinnum="28" signal="nDTACK_FSB" use="O"/><pin id="FB3_MC11_PIN29" pinnum="29" signal="nWE_FSB" use="I"/><pin id="FB3_MC12_PIN30" pinnum="30" signal="nLDS_FSB" use="I"/><pin id="FB3_MC14_PIN32" pinnum="32" signal="nAS_FSB" use="I"/><pin id="FB3_MC15_PIN33" pinnum="33" signal="nUDS_FSB" use="I"/><pin id="FB3_MC17_PIN34" pinnum="34" signal="nROMWE" use="O"/><pin id="FB4_MC2_PIN87" pinnum="87" signal="nAoutOE" use="O"/><pin id="FB4_MC5_PIN89" pinnum="89" signal="nDoutOE" use="O"/><pin id="FB4_MC6_PIN90" pinnum="90" signal="nDinOE" use="O"/><pin id="FB4_MC8_PIN91" pinnum="91" signal="nRES" use="I"/><pin id="FB4_MC9_PIN92" pinnum="92" signal="nIPL2" use="I"/><pin id="FB4_MC11_PIN93" pinnum="93" signal="nVPA_FSB" use="O"/><pin id="FB4_MC12_PIN94" pinnum="94" signal="A_FSB1_SPECSIG" use="I"/><pin id="FB4_MC14_PIN95" pinnum="95" signal="A_FSB2_SPECSIG" use="I"/><pin id="FB4_MC15_PIN96" pinnum="96" signal="A_FSB3_SPECSIG" use="I"/><pin id="FB4_MC17_PIN97" pinnum="97" signal="A_FSB4_SPECSIG" use="I"/><pin id="FB5_MC2_PIN35" pinnum="35" signal="nROMCS" use="O"/><pin id="FB5_MC5_PIN36" pinnum="36" signal="nCAS" use="O"/><pin id="FB5_MC6_PIN37" pinnum="37" signal="nOE" use="O"/><pin id="FB5_MC8_PIN39" pinnum="39" signal="ramRAMDIS1_SPECSIG" use="b_SPECSIG"/><pin id="FB5_MC9_PIN40" pinnum="40" signal="RA4_SPECSIG" use="O"/><pin id="FB5_MC11_PIN41" pinnum="41" signal="RA3_SPECSIG" use="O"/><pin id="FB5_MC12_PIN42" pinnum="42" signal="RA5_SPECSIG" use="O"/><pin id="FB5_MC14_PIN43" pinnum="43" signal="RA2_SPECSIG" use="O"/><pin id="FB5_MC15_PIN46" pinnum="46" signal="RA6_SPECSIG" use="O"/><pin id="FB5_MC17_PIN49" pinnum="49" use="b_SPECSIG"/><pin id="FB6_MC2_PIN74" pinnum="74" signal="nVMA_IOB" use="O"/><pin id="FB6_MC5_PIN76" pinnum="76" signal="nBERR_IOB" use="I"/><pin id="FB6_MC6_PIN77" pinnum="77" signal="nVPA_IOB" use="I"/><pin id="FB6_MC8_PIN78" pinnum="78" signal="nDTACK_IOB" use="I"/><pin id="FB6_MC9_PIN79" pinnum="79" signal="nLDS_IOB" use="O"/><pin id="FB6_MC11_PIN80" pinnum="80" signal="nUDS_IOB" use="O"/><pin id="FB6_MC12_PIN81" pinnum="81" signal="nAS_IOB" use="O"/><pin id="FB6_MC14_PIN82" pinnum="82" signal="nADoutLE1" use="O"/><pin id="FB6_MC15_PIN85" pinnum="85" signal="nADoutLE0" use="O"/><pin id="FB6_MC17_PIN86" pinnum="86" signal="nDinLE" use="O"/><pin id="FB7_MC2_PIN50" pinnum="50" signal="RA1_SPECSIG" use="O"/><pin id="FB7_MC5_PIN52" pinnum="52" signal="RA7_SPECSIG" use="O"/><pin id="FB7_MC6_PIN53" pinnum="53" signal="RA0_SPECSIG" use="O"/><pin id="FB7_MC8_PIN54" pinnum="54" signal="RA8_SPECSIG" use="O"/><pin id="FB7_MC9_PIN55" pinnum="55" signal="RA10_SPECSIG" use="O"/><pin id="FB7_MC11_PIN56" pinnum="56" signal="RA9_SPECSIG" use="O"/><pin id="FB7_MC12_PIN58" pinnum="58" signal="CLK25EN" use="O"/><pin id="FB7_MC14_PIN59" pinnum="59" signal="CLK20EN" use="O"/><pin id="FB7_MC15_PIN60" pinnum="60" signal="SW1_SPECSIG" use="I"/><pin id="FB7_MC17_PIN61" pinnum="61" signal="SW0_SPECSIG" use="I"/><pin id="FB8_MC2_PIN63" pinnum="63" signal="RA11_SPECSIG" use="O"/><pin id="FB8_MC5_PIN64" pinnum="64" signal="nRAS" use="O"/><pin id="FB8_MC6_PIN65" pinnum="65" signal="nRAMLWE" use="O"/><pin id="FB8_MC8_PIN66" pinnum="66" signal="nRAMUWE" use="O"/><pin id="FB8_MC9_PIN67" pinnum="67" signal="IOREQ" use="b_SPECSIG"/><pin id="FB8_MC11_PIN68" pinnum="68" use="b_SPECSIG"/><pin id="FB8_MC12_PIN70" pinnum="70" signal="nBERR_FSB" use="O"/><pin id="FB8_MC14_PIN71" pinnum="71" signal="iobsOnce_SPECSIG" use="b_SPECSIG"/><pin id="FB8_MC15_PIN72" pinnum="72" signal="nBR_IOB" use="O"/><pin id="FB8_MC17_PIN73" pinnum="73" signal="nBG_IOB" use="I"/><fblock id="FB1" inputUse="21" pinUse="10"><macrocell id="FB1_MC1" sigUse="2" signal="ramBACTr_SPECSIG"><pterms pt1="FB1_1_1"/></macrocell><macrocell id="FB1_MC2" pin="FB1_MC2_PIN11" sigUse="1" signal="iobmRESrr_SPECSIG"><pterms pt1="FB1_2_1"/></macrocell><macrocell id="FB1_MC3" pin="FB1_MC3_PIN12" sigUse="1" signal="iobmRESrf_SPECSIG"><pterms pt1="FB1_3_1"/></macrocell><macrocell id="FB1_MC4" sigUse="1" signal="fsbASrf_SPECSIG"><pterms pt1="FB1_4_1"/></macrocell><macrocell id="FB1_MC5" pin="FB1_MC5_PIN13" sigUse="2" signal="cntRefCnt2_SPECSIG"><pterms pt1="FB1_5_1"/></macrocell><macrocell id="FB1_MC6" pin="FB1_MC6_PIN14" sigUse="1" signal="cntRefCnt1_SPECSIG"><pterms pt1="FB1_6_1"/></macrocell><macrocell id="FB1_MC7" sigUse="2" signal="RefAck"><pterms pt1="FB1_7_1"/></macrocell><macrocell id="FB1_MC8" pin="FB1_MC8_PIN15" sigUse="1" signal="RESr2"><pterms pt1="FB1_8_1"/></macrocell><macrocell id="FB1_MC9" pin="FB1_MC9_PIN16" sigUse="1" signal="RESr1"><pterms pt1="FB1_9_1"/></macrocell><macrocell id="FB1_MC10" sigUse="1" signal="RESr0"><pterms pt1="FB1_10_1"/></macrocell><macrocell id="FB1_MC11" pin="FB1_MC11_PIN17" sigUse="1" signal="IPL2r1"><pterms pt1="FB1_11_1"/></macrocell><macrocell id="FB1_MC12" pin="FB1_MC12_PIN18" sigUse="1" signal="IPL2r0"><pterms pt1="FB1_12_1"/></macrocell><macrocell id="FB1_MC13" sigUse="2" signal="ALE0S"><pterms pt1="FB1_13_1"/></macrocell><macrocell id="FB1_MC14" pin="FB1_MC14_PIN19" sigUse="2" signal="OpTxFX_DC708_SPECSIG"><pterms pt1="FB1_14_1"/></macrocell><macrocell id="FB1_MC15" pin="FB1_MC15_PIN20" sigUse="2" signal="iobsIOU1_SPECSIG"><pterms pt1="FB1_15_1" pt2="FB1_15_2"/></macrocell><macrocell id="FB1_MC16" sigUse="2" signal="iobsIOL1_SPECSIG"><pterms pt1="FB1_16_1" pt2="FB1_16_2"/></macrocell><macrocell id="FB1_MC17" pin="FB1_MC17_PIN22" sigUse="3" signal="iobmIOS_FSM_FFd1_SPECSIG"><pterms pt1="FB1_17_1" pt2="FB1_17_2"/></macrocell><macrocell id="FB1_MC18" sigUse="5" signal="IOU0"><pterms pt1="FB1_18_1" pt2="FB1_18_2" pt3="FB1_18_3"/></macrocell><fbinput id="FB1_I1" signal="IPL2r0"/><fbinput id="FB1_I2" signal="RESr0"/><fbinput id="FB1_I3" signal="RESr1"/><fbinput id="FB1_I4" signal="cntRefCnt0_SPECSIG"/><fbinput id="FB1_I5" signal="cntRefCnt1_SPECSIG"/><fbinput id="FB1_I6" signal="fsbASrf_SPECSIG"/><fbinput id="FB1_I7" signal="iobmIOS_FSM_FFd1_SPECSIG"/><fbinput id="FB1_I8" signal="iobmIOS_FSM_FFd2_SPECSIG"/><fbinput id="FB1_I9" signal="iobmIOS_FSM_FFd3_SPECSIG"/><fbinput id="FB1_I10" signal="iobsIOU1_SPECSIG"/><fbinput id="FB1_I11" signal="iobsLoad1_SPECSIG"/><fbinput id="FB1_I12" signal="iobsPS_FSM_FFd1_SPECSIG"/><fbinput id="FB1_I13" signal="iobsPS_FSM_FFd2_SPECSIG"/><fbinput id="FB1_I14" signal="nADoutLE1"/><fbinput id="FB1_I15" signal="nAS_FSB"/><fbinput id="FB1_I16" signal="nIPL2"/><fbinput id="FB1_I17" signal="nLDS_FSB"/><fbinput id="FB1_I18" signal="nRES"/><fbinput id="FB1_I19" signal="nUDS_FSB"/><fbinput id="FB1_I20" signal="ramRS_FSM_FFd1_SPECSIG"/><fbinput id="FB1_I21" signal="ramRS_FSM_FFd2_SPECSIG"/><pterm id="FB1_1_1"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB1_2_1"><signal id="nRES" negated="ON"/></pterm><pterm id="FB1_3_1"><signal id="nRES" negated="ON"/></pterm><pterm id="FB1_4_1"><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB1_5_1"><signal id="cntRefCnt0_SPECSIG"/><signal id="cntRefCnt1_SPECSIG"/></pterm><pterm id="FB1_6_1"><signal id="cntRefCnt0_SPECSIG"/></pterm><pterm id="FB1_7_1"><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB1_8_1"><signal id="RESr1"/></pterm><pterm id="FB1_9_1"><signal id="RESr0"/></pterm><pterm id="FB1_10_1"><signal id="nRES" negated="ON"/></pterm><pterm id="FB1_11_1"><signal id="IPL2r0"/></pterm><pterm id="FB1_12_1"><signal id="nIPL2" negated="ON"/></pterm><pterm id="FB1_13_1"><signal id="iobsPS_FSM_FFd2_SPECSIG"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB1_14_1"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB1_15_1"><signal id="nUDS_FSB" negated="ON"/></pterm><pterm id="FB1_15_2"><signal id="iobsLoad1_SPECSIG"/></pterm><pterm id="FB1_16_1"><signal id="nLDS_FSB" negated="ON"/></pterm><pterm id="FB1_16_2"><signal id="iobsLoad1_SPECSIG"/></pterm><pterm id="FB1_17_1"><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/></pterm><pterm id="FB1_17_2"><signal id="iobmIOS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB1_18_1"><signal id="nUDS_FSB" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB1_18_2"><signal id="iobsIOU1_SPECSIG"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB1_18_3"><signal id="iobsPS_FSM_FFd2_SPECSIG"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><equation id="ramBACTr_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB1_1_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="iobmRESrr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_2_1"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmRESrf_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_3_1"/></d2><clk negated="ON"><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="fsbASrf_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_4_1"/></d2><clk negated="ON"><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="cntRefCnt2_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB1_5_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="cntRefCnt1_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB1_6_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="RefAck" regUse="D"><d2><eq_pterm ptindx="FB1_7_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="RESr2" regUse="D"><d2><eq_pterm ptindx="FB1_8_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="RESr1" regUse="D"><d2><eq_pterm ptindx="FB1_9_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="RESr0" regUse="D"><d2><eq_pterm ptindx="FB1_10_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="IPL2r1" regUse="D"><d2><eq_pterm ptindx="FB1_11_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="IPL2r0" regUse="D"><d2><eq_pterm ptindx="FB1_12_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="ALE0S" regUse="D"><d2><eq_pterm ptindx="FB1_13_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="OpTxFX_DC708_SPECSIG"><d2><eq_pterm ptindx="FB1_14_1"/></d2></equation><equation id="iobsIOU1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_15_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><ce><eq_pterm ptindx="FB1_15_2"/></ce><prld ptindx="GND"/></equation><equation id="iobsIOL1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_16_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><ce><eq_pterm ptindx="FB1_16_2"/></ce><prld ptindx="GND"/></equation><equation id="iobmIOS_FSM_FFd1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB1_17_1"/><eq_pterm ptindx="FB1_17_2"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="IOU0" regUse="D"><d2><eq_pterm ptindx="FB1_18_1"/><eq_pterm ptindx="FB1_18_2"/></d2><clk><fastsig signal="CLK_FSB"/></clk><ce><eq_pterm ptindx="FB1_18_3"/></ce><prld ptindx="GND"/></equation></fblock><fblock id="FB2" inputUse="9" pinUse="8"><macrocell id="FB2_MC1"/><macrocell id="FB2_MC2" pin="FB2_MC2_PIN99"/><macrocell id="FB2_MC3"/><macrocell id="FB2_MC4"/><macrocell id="FB2_MC5" pin="FB2_MC5_PIN1"/><macrocell id="FB2_MC6" pin="FB2_MC6_PIN2" sigUse="1" signal="iobsIOACTr_SPECSIG"><pterms pt1="FB2_6_1"/></macrocell><macrocell id="FB2_MC7" sigUse="1" signal="iobmVPArr_SPECSIG"><pterms pt1="FB2_7_1"/></macrocell><macrocell id="FB2_MC8" pin="FB2_MC8_PIN3" sigUse="1" signal="iobmVPArf_SPECSIG"><pterms pt1="FB2_8_1"/></macrocell><macrocell id="FB2_MC9" pin="FB2_MC9_PIN4" sigUse="1" signal="iobmIOREQr_SPECSIG"><pterms pt1="FB2_9_1"/></macrocell><macrocell id="FB2_MC10" sigUse="1" signal="iobmEr2_SPECSIG"><pterms pt1="FB2_10_1"/></macrocell><macrocell id="FB2_MC11" pin="FB2_MC11_PIN6" sigUse="1" signal="iobmEr_SPECSIG"><pterms pt1="FB2_11_1"/></macrocell><macrocell id="FB2_MC12" pin="FB2_MC12_PIN7" sigUse="1" signal="iobmDTACKrr_SPECSIG"><pterms pt1="FB2_12_1"/></macrocell><macrocell id="FB2_MC13" sigUse="1" signal="iobmDTACKrf_SPECSIG"><pterms pt1="FB2_13_1"/></macrocell><macrocell id="FB2_MC14" pin="FB2_MC14_PIN8" sigUse="1" signal="iobmBGr1_SPECSIG"><pterms pt1="FB2_14_1"/></macrocell><macrocell id="FB2_MC15" pin="FB2_MC15_PIN9" sigUse="1" signal="iobmBGr0_SPECSIG"><pterms pt1="FB2_15_1"/></macrocell><macrocell id="FB2_MC16" sigUse="1" signal="iobmBERRrr_SPECSIG"><pterms pt1="FB2_16_1"/></macrocell><macrocell id="FB2_MC17" pin="FB2_MC17_PIN10" sigUse="1" signal="iobmBERRrf_SPECSIG"><pterms pt1="FB2_17_1"/></macrocell><macrocell id="FB2_MC18" sigUse="0" signal="cntRefCnt0_SPECSIG"/><fbinput id="FB2_I1" signal="E_IOB"/><fbinput id="FB2_I2" signal="IOACT"/><fbinput id="FB2_I3" signal="IOREQ"/><fbinput id="FB2_I4" signal="iobmBGr0_SPECSIG"/><fbinput id="FB2_I5" signal="iobmEr_SPECSIG"/><fbinput id="FB2_I6" signal="nBERR_IOB"/><fbinput id="FB2_I7" signal="nBG_IOB"/><fbinput id="FB2_I8" signal="nDTACK_IOB"/><fbinput id="FB2_I9" signal="nVPA_IOB"/><pterm id="FB2_6_1"><signal id="IOACT"/></pterm><pterm id="FB2_7_1"><signal id="nVPA_IOB" negated="ON"/></pterm><pterm id="FB2_8_1"><signal id="nVPA_IOB" negated="ON"/></pterm><pterm id="FB2_9_1"><signal id="IOREQ"/></pterm><pterm id="FB2_10_1"><signal id="iobmEr_SPECSIG"/></pterm><pterm id="FB2_11_1"><signal id="E_IOB"/></pterm><pterm id="FB2_12_1"><signal id="nDTACK_IOB" negated="ON"/></pterm><pterm id="FB2_13_1"><signal id="nDTACK_IOB" negated="ON"/></pterm><pterm id="FB2_14_1"><signal id="iobmBGr0_SPECSIG"/></pterm><pterm id="FB2_15_1"><signal id="nBG_IOB" negated="ON"/></pterm><pterm id="FB2_16_1"><signal id="nBERR_IOB" negated="ON"/></pterm><pterm id="FB2_17_1"><signal id="nBERR_IOB" negated="ON"/></pterm><equation id="iobsIOACTr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_6_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="iobmVPArr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_7_1"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmVPArf_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_8_1"/></d2><clk negated="ON"><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmIOREQr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_9_1"/></d2><clk negated="ON"><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmEr2_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_10_1"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmEr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_11_1"/></d2><clk negated="ON"><fastsig signal="CLK_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmDTACKrr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_12_1"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmDTACKrf_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_13_1"/></d2><clk negated="ON"><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmBGr1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_14_1"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmBGr0_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_15_1"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmBERRrr_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_16_1"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmBERRrf_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB2_17_1"/></d2><clk negated="ON"><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="cntRefCnt0_SPECSIG" regUse="T"><d2><eq_pterm ptindx="VCC"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation></fblock><fblock id="FB3" inputUse="38" pinUse="9"><macrocell id="FB3_MC1" sigUse="18" signal="fsbReady1r_SPECSIG"><pterms pt1="FB3_1_1" pt2="FB3_1_2" pt3="FB3_1_3" pt4="FB3_1_4" pt5="FB3_1_5"/></macrocell><macrocell id="FB3_MC2" pin="FB3_MC2_PIN23"><pterms pt1="FB3_2_1" pt2="FB3_2_2" pt3="FB3_2_3" pt4="FB3_2_4" pt5="FB3_2_5"/></macrocell><macrocell id="FB3_MC3" sigUse="20" signal="iobsIORW1_SPECSIG"><pterms pt1="FB3_3_1" pt2="FB3_3_2" pt3="FB3_3_3" pt4="FB3_3_4" pt5="FB3_3_5"/></macrocell><macrocell id="FB3_MC4"><pterms pt1="FB3_4_1" pt2="FB3_4_2" pt3="FB3_4_3" pt4="FB3_4_4" pt5="FB3_4_5"/></macrocell><macrocell id="FB3_MC5" pin="FB3_MC5_PIN24" sigUse="22" signal="fsbReady2r_SPECSIG"><pterms pt1="FB3_5_1" pt2="FB3_5_2" pt3="FB3_5_3" pt4="FB3_5_4" pt5="FB3_5_5"/></macrocell><macrocell id="FB3_MC6" pin="FB3_MC6_PIN25"><pterms pt1="FB3_6_1" pt2="FB3_6_2" pt3="FB3_6_3" pt4="FB3_6_4" pt5="FB3_6_5"/></macrocell><macrocell id="FB3_MC7"><pterms pt1="FB3_7_1" pt2="FB3_7_2" pt3="FB3_7_3"/></macrocell><macrocell id="FB3_MC8" pin="FB3_MC8_PIN27"><pterms pt1="FB3_8_1" pt2="FB3_8_2" pt3="FB3_8_3" pt4="FB3_8_4" pt5="FB3_8_5"/></macrocell><macrocell id="FB3_MC9" pin="FB3_MC9_PIN28" sigUse="32" signal="nDTACK_FSB"><pterms pt1="FB3_9_1" pt2="FB3_9_2" pt3="FB3_9_3" pt4="FB3_9_4" pt5="FB3_9_5"/></macrocell><macrocell id="FB3_MC10"><pterms pt1="FB3_10_1" pt2="FB3_10_2" pt3="FB3_10_3" pt4="FB3_10_4" pt5="FB3_10_5"/></macrocell><macrocell id="FB3_MC11" pin="FB3_MC11_PIN29"><pterms pt1="FB3_11_1" pt2="FB3_11_2" pt3="FB3_11_3" pt4="FB3_11_4" pt5="FB3_11_5"/></macrocell><macrocell id="FB3_MC12" pin="FB3_MC12_PIN30"/><macrocell id="FB3_MC13"><pterms pt1="FB3_13_1" pt2="FB3_13_2" pt3="FB3_13_3" pt4="FB3_13_4" pt5="FB3_13_5"/></macrocell><macrocell id="FB3_MC14" pin="FB3_MC14_PIN32"><pterms pt1="FB3_14_1" pt2="FB3_14_2" pt3="FB3_14_3" pt4="FB3_14_4" pt5="FB3_14_5"/></macrocell><macrocell id="FB3_MC15" pin="FB3_MC15_PIN33" sigUse="31" signal="fsbVPA_SPECSIG"><pterms pt1="FB3_15_1" pt2="FB3_15_2" pt3="FB3_15_3" pt4="FB3_15_4" pt5="FB3_15_5"/></macrocell><macrocell id="FB3_MC16"><pterms pt1="FB3_16_1" pt2="FB3_16_2" pt3="FB3_16_3" pt4="FB3_16_4" pt5="FB3_16_5"/></macrocell><macrocell id="FB3_MC17" pin="FB3_MC17_PIN34" sigUse="2" signal="nROMWE"><pterms pt1="FB3_17_1" pt2="FB3_17_2" pt3="FB3_17_3"/></macrocell><macrocell id="FB3_MC18" sigUse="3" signal="iobsClear1_SPECSIG"><pterms pt1="FB3_18_1" pt2="FB3_18_2" pt3="FB3_18_3" pt4="FB3_18_4" pt5="FB3_18_5"/></macrocell><fbinput id="FB3_I1" signal="OpTxOpTxFX_DC182_INV783_SPECSIG"/><fbinput id="FB3_I2" signal="OpTxFX_DC708_SPECSIG"/><fbinput id="FB3_I3" signal="A_FSB10_SPECSIG"/><fbinput id="FB3_I4" signal="A_FSB11_SPECSIG"/><fbinput id="FB3_I5" signal="A_FSB12_SPECSIG"/><fbinput id="FB3_I6" signal="A_FSB13_SPECSIG"/><fbinput id="FB3_I7" signal="A_FSB14_SPECSIG"/><fbinput id="FB3_I8" signal="A_FSB15_SPECSIG"/><fbinput id="FB3_I9" signal="A_FSB16_SPECSIG"/><fbinput id="FB3_I10" signal="A_FSB17_SPECSIG"/><fbinput id="FB3_I11" signal="A_FSB18_SPECSIG"/><fbinput id="FB3_I12" signal="A_FSB19_SPECSIG"/><fbinput id="FB3_I13" signal="A_FSB20_SPECSIG"/><fbinput id="FB3_I14" signal="A_FSB21_SPECSIG"/><fbinput id="FB3_I15" signal="A_FSB22_SPECSIG"/><fbinput id="FB3_I16" signal="A_FSB23_SPECSIG"/><fbinput id="FB3_I17" signal="A_FSB8_SPECSIG"/><fbinput id="FB3_I18" signal="A_FSB9_SPECSIG"/><fbinput id="FB3_I19" signal="BERR_IOBS"/><fbinput id="FB3_I20" signal="SW1_SPECSIG"/><fbinput id="FB3_I21" signal="TimeoutA"/><fbinput id="FB3_I22" signal="csnOverlay1_SPECSIG"/><fbinput id="FB3_I23" signal="fsbASrf_SPECSIG"/><fbinput id="FB3_I24" signal="fsbBERR0r_SPECSIG"/><fbinput id="FB3_I25" signal="fsbBERR1r_SPECSIG"/><fbinput id="FB3_I26" signal="fsbReady1r_SPECSIG"/><fbinput id="FB3_I27" signal="fsbReady2r_SPECSIG"/><fbinput id="FB3_I28" signal="fsbVPA_SPECSIG"/><fbinput id="FB3_I29" signal="iobsIORW1_SPECSIG"/><fbinput id="FB3_I30" signal="iobsIOReady_SPECSIG"/><fbinput id="FB3_I31" signal="iobsOnce_SPECSIG"/><fbinput id="FB3_I32" signal="iobsPS_FSM_FFd1_SPECSIG"/><fbinput id="FB3_I33" signal="iobsPS_FSM_FFd2_SPECSIG"/><fbinput id="FB3_I34" signal="nADoutLE1"/><fbinput id="FB3_I35" signal="nAS_FSB"/><fbinput id="FB3_I36" signal="nBR_IOB"/><fbinput id="FB3_I37" signal="nDTACK_FSB"/><fbinput id="FB3_I38" signal="nWE_FSB"/><pterm id="FB3_1_1"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB3_1_2"><signal id="A_FSB23_SPECSIG"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="iobsIOReady_SPECSIG" negated="ON"/></pterm><pterm id="FB3_1_3"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="iobsIOReady_SPECSIG" negated="ON"/></pterm><pterm id="FB3_1_4"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="SW1_SPECSIG" negated="ON"/></pterm><pterm id="FB3_1_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/></pterm><pterm id="FB3_2_1"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB3_2_2"><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB3_2_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG" negated="ON"/></pterm><pterm id="FB3_2_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/></pterm><pterm id="FB3_2_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG" negated="ON"/></pterm><pterm id="FB3_3_1"><signal id="iobsOnce_SPECSIG"/></pterm><pterm id="FB3_3_2"><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB3_3_3"><signal id="nWE_FSB"/><signal id="iobsIORW1_SPECSIG"/></pterm><pterm id="FB3_3_4"><signal id="nWE_FSB" negated="ON"/><signal id="iobsIORW1_SPECSIG" negated="ON"/></pterm><pterm id="FB3_3_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="iobsIORW1_SPECSIG" negated="ON"/></pterm><pterm id="FB3_4_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB19_SPECSIG" negated="ON"/></pterm><pterm id="FB3_4_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB18_SPECSIG" negated="ON"/></pterm><pterm id="FB3_4_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB17_SPECSIG" negated="ON"/></pterm><pterm id="FB3_4_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB16_SPECSIG" negated="ON"/></pterm><pterm id="FB3_4_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="SW1_SPECSIG"/></pterm><pterm id="FB3_5_1"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/></pterm><pterm id="FB3_5_2"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/></pterm><pterm id="FB3_5_3"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG" negated="ON"/><signal id="A_FSB11_SPECSIG" negated="ON"/><signal id="A_FSB10_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/></pterm><pterm id="FB3_5_4"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG" negated="ON"/><signal id="A_FSB11_SPECSIG" negated="ON"/><signal id="A_FSB10_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/></pterm><pterm id="FB3_5_5"><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/></pterm><pterm id="FB3_6_1"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB3_6_2"><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/></pterm><pterm id="FB3_6_3"><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/></pterm><pterm id="FB3_6_4"><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG" negated="ON"/><signal id="A_FSB11_SPECSIG" negated="ON"/><signal id="A_FSB10_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/></pterm><pterm id="FB3_6_5"><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG" negated="ON"/><signal id="A_FSB11_SPECSIG" negated="ON"/><signal id="A_FSB10_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/></pterm><pterm id="FB3_7_1"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG" negated="ON"/><signal id="A_FSB11_SPECSIG" negated="ON"/><signal id="A_FSB10_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/><signal id="nDTACK_FSB"/></pterm><pterm id="FB3_7_2"><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/><signal id="nDTACK_FSB"/></pterm><pterm id="FB3_7_3"><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG" negated="ON"/><signal id="A_FSB11_SPECSIG" negated="ON"/><signal id="A_FSB10_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/><signal id="nDTACK_FSB"/></pterm><pterm id="FB3_8_1"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB3_8_2"><signal id="A_FSB23_SPECSIG"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="nDTACK_FSB"/></pterm><pterm id="FB3_8_3"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="nDTACK_FSB"/></pterm><pterm id="FB3_8_4"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="SW1_SPECSIG" negated="ON"/><signal id="nDTACK_FSB"/></pterm><pterm id="FB3_8_5"><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="nDTACK_FSB"/></pterm><pterm id="FB3_9_1"><signal id="BERR_IOBS"/><signal id="nDTACK_FSB"/></pterm><pterm id="FB3_9_2"><signal id="fsbBERR0r_SPECSIG"/><signal id="nDTACK_FSB"/></pterm><pterm id="FB3_9_3"><signal id="fsbBERR1r_SPECSIG"/><signal id="nDTACK_FSB"/></pterm><pterm id="FB3_9_4"><signal id="nDTACK_FSB"/><signal id="nBR_IOB" negated="ON"/></pterm><pterm id="FB3_9_5"><signal id="nDTACK_FSB"/><signal id="OpTxOpTxFX_DC182_INV783_SPECSIG"/></pterm><pterm id="FB3_10_1"><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="nDTACK_FSB"/></pterm><pterm id="FB3_10_2"><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="nDTACK_FSB"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB3_10_3"><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="nDTACK_FSB"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB3_10_4"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/><signal id="nDTACK_FSB"/></pterm><pterm id="FB3_10_5"><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/><signal id="nDTACK_FSB"/></pterm><pterm id="FB3_11_1"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/><signal id="nDTACK_FSB"/></pterm><pterm id="FB3_11_2"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG" negated="ON"/><signal id="A_FSB11_SPECSIG" negated="ON"/><signal id="A_FSB10_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/><signal id="nDTACK_FSB"/></pterm><pterm id="FB3_11_3"><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG" negated="ON"/><signal id="A_FSB11_SPECSIG" negated="ON"/><signal id="A_FSB10_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/><signal id="nDTACK_FSB"/></pterm><pterm id="FB3_11_4"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="BERR_IOBS" negated="ON"/><signal id="fsbBERR0r_SPECSIG" negated="ON"/><signal id="fsbBERR1r_SPECSIG" negated="ON"/><signal id="fsbReady1r_SPECSIG"/><signal id="nBR_IOB"/><signal id="OpTxOpTxFX_DC182_INV783_SPECSIG" negated="ON"/></pterm><pterm id="FB3_11_5"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="BERR_IOBS" negated="ON"/><signal id="fsbBERR0r_SPECSIG" negated="ON"/><signal id="fsbBERR1r_SPECSIG" negated="ON"/><signal id="iobsIOReady_SPECSIG"/><signal id="nBR_IOB"/><signal id="OpTxOpTxFX_DC182_INV783_SPECSIG" negated="ON"/></pterm><pterm id="FB3_13_1"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_13_2"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG" negated="ON"/><signal id="A_FSB11_SPECSIG" negated="ON"/><signal id="A_FSB10_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_13_3"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG" negated="ON"/><signal id="A_FSB11_SPECSIG" negated="ON"/><signal id="A_FSB10_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_13_4"><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_13_5"><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG" negated="ON"/><signal id="A_FSB11_SPECSIG" negated="ON"/><signal id="A_FSB10_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_14_1"><signal id="A_FSB23_SPECSIG"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_14_2"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_14_3"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="SW1_SPECSIG" negated="ON"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_14_4"><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_14_5"><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_15_1"><signal id="BERR_IOBS"/><signal id="fsbVPA_SPECSIG"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_15_2"><signal id="fsbBERR0r_SPECSIG"/><signal id="fsbVPA_SPECSIG"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_15_3"><signal id="fsbBERR1r_SPECSIG"/><signal id="fsbVPA_SPECSIG"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_15_4"><signal id="fsbVPA_SPECSIG"/><signal id="nBR_IOB" negated="ON"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_15_5"><signal id="fsbVPA_SPECSIG"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/><signal id="OpTxOpTxFX_DC182_INV783_SPECSIG"/></pterm><pterm id="FB3_16_1"><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="nADoutLE1" negated="ON"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_16_2"><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="nADoutLE1" negated="ON"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_16_3"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_16_4"><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_16_5"><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG" negated="ON"/><signal id="A_FSB11_SPECSIG" negated="ON"/><signal id="A_FSB10_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="TimeoutA" negated="ON"/><signal id="fsbReady2r_SPECSIG" negated="ON"/><signal id="fsbVPA_SPECSIG"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/></pterm><pterm id="FB3_17_1"><signal id="nWE_FSB" negated="ON"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB3_17_2"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="BERR_IOBS" negated="ON"/><signal id="fsbBERR0r_SPECSIG" negated="ON"/><signal id="fsbBERR1r_SPECSIG" negated="ON"/><signal id="fsbReady1r_SPECSIG"/><signal id="nBR_IOB"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/><signal id="OpTxOpTxFX_DC182_INV783_SPECSIG" negated="ON"/></pterm><pterm id="FB3_17_3"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB8_SPECSIG"/><signal id="A_FSB15_SPECSIG"/><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB12_SPECSIG"/><signal id="A_FSB11_SPECSIG"/><signal id="A_FSB10_SPECSIG"/><signal id="A_FSB23_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="BERR_IOBS" negated="ON"/><signal id="fsbBERR0r_SPECSIG" negated="ON"/><signal id="fsbBERR1r_SPECSIG" negated="ON"/><signal id="iobsIOReady_SPECSIG"/><signal id="nBR_IOB"/><signal id="OpTxFX_DC708_SPECSIG" negated="ON"/><signal id="OpTxOpTxFX_DC182_INV783_SPECSIG" negated="ON"/></pterm><pterm id="FB3_18_1"><signal id="iobsPS_FSM_FFd2_SPECSIG"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB3_18_2"><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="iobsIOReady_SPECSIG" negated="ON"/></pterm><pterm id="FB3_18_3"><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="iobsIOReady_SPECSIG" negated="ON"/></pterm><pterm id="FB3_18_4"><signal id="A_FSB14_SPECSIG"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB3_18_5"><signal id="A_FSB13_SPECSIG"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG"/><signal id="A_FSB19_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="A_FSB17_SPECSIG"/><signal id="A_FSB16_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nWE_FSB" negated="ON"/><signal id="fsbReady1r_SPECSIG" negated="ON"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="nADoutLE1" negated="ON"/></pterm><equation id="fsbReady1r_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB3_1_1"/><eq_pterm ptindx="FB3_1_2"/><eq_pterm ptindx="FB3_1_3"/><eq_pterm ptindx="FB3_1_4"/><eq_pterm import="1" ptindx="FB3_18_2"/><eq_pterm import="1" ptindx="FB3_18_3"/><eq_pterm import="1" ptindx="FB3_18_4"/><eq_pterm import="1" ptindx="FB3_18_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="iobsIORW1_SPECSIG" negated="ON" regUse="T"><d2><eq_pterm ptindx="FB3_3_1"/><eq_pterm ptindx="FB3_3_2"/><eq_pterm ptindx="FB3_3_3"/><eq_pterm ptindx="FB3_3_4"/><eq_pterm ptindx="FB3_3_5"/><eq_pterm import="1" ptindx="FB3_2_1"/><eq_pterm import="1" ptindx="FB3_2_2"/><eq_pterm import="1" ptindx="FB3_2_3"/><eq_pterm import="1" ptindx="FB3_2_4"/><eq_pterm import="1" ptindx="FB3_2_5"/><eq_pterm import="1" ptindx="FB3_1_5"/><eq_pterm import="1" ptindx="FB3_4_1"/><eq_pterm import="1" ptindx="FB3_4_2"/><eq_pterm import="1" ptindx="FB3_4_3"/><eq_pterm import="1" ptindx="FB3_4_4"/><eq_pterm import="1" ptindx="FB3_4_5"/><eq_pterm import="1" ptindx="FB3_5_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="fsbReady2r_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB3_5_1"/><eq_pterm ptindx="FB3_5_2"/><eq_pterm ptindx="FB3_5_3"/><eq_pterm ptindx="FB3_5_4"/><eq_pterm import="1" ptindx="FB3_6_1"/><eq_pterm import="1" ptindx="FB3_6_2"/><eq_pterm import="1" ptindx="FB3_6_3"/><eq_pterm import="1" ptindx="FB3_6_4"/><eq_pterm import="1" ptindx="FB3_6_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="nDTACK_FSB" regUse="D" userloc="P28"><d2><eq_pterm ptindx="FB3_9_1"/><eq_pterm ptindx="FB3_9_2"/><eq_pterm ptindx="FB3_9_3"/><eq_pterm ptindx="FB3_9_4"/><eq_pterm ptindx="FB3_9_5"/><eq_pterm import="1" ptindx="FB3_8_1"/><eq_pterm import="1" ptindx="FB3_8_2"/><eq_pterm import="1" ptindx="FB3_8_3"/><eq_pterm import="1" ptindx="FB3_8_4"/><eq_pterm import="1" ptindx="FB3_8_5"/><eq_pterm import="1" ptindx="FB3_7_1"/><eq_pterm import="1" ptindx="FB3_7_2"/><eq_pterm import="1" ptindx="FB3_7_3"/><eq_pterm import="1" ptindx="FB3_10_1"/><eq_pterm import="1" ptindx="FB3_10_2"/><eq_pterm import="1" ptindx="FB3_10_3"/><eq_pterm import="1" ptindx="FB3_10_4"/><eq_pterm import="1" ptindx="FB3_10_5"/><eq_pterm import="1" ptindx="FB3_11_1"/><eq_pterm import="1" ptindx="FB3_11_2"/><eq_pterm import="1" ptindx="FB3_11_3"/><eq_pterm import="1" ptindx="FB3_11_4"/><eq_pterm import="1" ptindx="FB3_11_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="fsbVPA_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB3_15_1"/><eq_pterm ptindx="FB3_15_2"/><eq_pterm ptindx="FB3_15_3"/><eq_pterm ptindx="FB3_15_4"/><eq_pterm ptindx="FB3_15_5"/><eq_pterm import="1" ptindx="FB3_14_1"/><eq_pterm import="1" ptindx="FB3_14_2"/><eq_pterm import="1" ptindx="FB3_14_3"/><eq_pterm import="1" ptindx="FB3_14_4"/><eq_pterm import="1" ptindx="FB3_14_5"/><eq_pterm import="1" ptindx="FB3_13_1"/><eq_pterm import="1" ptindx="FB3_13_2"/><eq_pterm import="1" ptindx="FB3_13_3"/><eq_pterm import="1" ptindx="FB3_13_4"/><eq_pterm import="1" ptindx="FB3_13_5"/><eq_pterm import="1" ptindx="FB3_16_1"/><eq_pterm import="1" ptindx="FB3_16_2"/><eq_pterm import="1" ptindx="FB3_16_3"/><eq_pterm import="1" ptindx="FB3_16_4"/><eq_pterm import="1" ptindx="FB3_16_5"/><eq_pterm import="1" ptindx="FB3_17_2"/><eq_pterm import="1" ptindx="FB3_17_3"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="nROMWE" negated="ON" userloc="P34"><d2><eq_pterm ptindx="FB3_17_1"/></d2></equation><equation id="iobsClear1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB3_18_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation></fblock><fblock id="FB4" inputUse="41" pinUse="10"><macrocell id="FB4_MC1" sigUse="6" signal="cntRefCnt6_SPECSIG"><pterms pt1="FB4_1_1"/></macrocell><macrocell id="FB4_MC2" pin="FB4_MC2_PIN87" sigUse="4" signal="nAoutOE"><pterms pt1="FB4_2_1" pt2="FB4_2_2" pt3="FB4_2_3"/></macrocell><macrocell id="FB4_MC3" sigUse="5" signal="cntRefCnt5_SPECSIG"><pterms pt1="FB4_3_1"/></macrocell><macrocell id="FB4_MC4" sigUse="4" signal="cntRefCnt4_SPECSIG"><pterms pt1="FB4_4_1"/></macrocell><macrocell id="FB4_MC5" pin="FB4_MC5_PIN89" sigUse="3" signal="nDoutOE"><pterms pt1="FB4_5_1" pt2="FB4_5_2"/></macrocell><macrocell id="FB4_MC6" pin="FB4_MC6_PIN90" sigUse="7" signal="nDinOE"><pterms pt1="FB4_6_1" pt2="FB4_6_2" pt3="FB4_6_3"/></macrocell><macrocell id="FB4_MC7" sigUse="3" signal="cntRefCnt3_SPECSIG"><pterms pt1="FB4_7_1"/></macrocell><macrocell id="FB4_MC8" pin="FB4_MC8_PIN91" sigUse="3" signal="iobsPS_FSM_FFd1_SPECSIG"><pterms pt1="FB4_8_1" pt2="FB4_8_2"/></macrocell><macrocell id="FB4_MC9" pin="FB4_MC9_PIN92" sigUse="4" signal="fsbBERR1r_SPECSIG"><pterms pt1="FB4_9_1" pt2="FB4_9_2"/></macrocell><macrocell id="FB4_MC10" sigUse="3" signal="csnOverlay1_SPECSIG"><pterms pt1="FB4_10_1" pt2="FB4_10_2"/></macrocell><macrocell id="FB4_MC11" pin="FB4_MC11_PIN93" sigUse="2" signal="nVPA_FSB"><pterms pt1="FB4_11_1"/></macrocell><macrocell id="FB4_MC12" pin="FB4_MC12_PIN94" sigUse="10" signal="cntRefDone_SPECSIG"><pterms pt1="FB4_12_1" pt2="FB4_12_2"/></macrocell><macrocell id="FB4_MC13" sigUse="8" signal="csnOverlay0_SPECSIG"><pterms pt1="FB4_13_1" pt2="FB4_13_2" pt3="FB4_13_3"/></macrocell><macrocell id="FB4_MC14" pin="FB4_MC14_PIN95" sigUse="11" signal="cntTimeoutBPre_SPECSIG"><pterms pt1="FB4_14_1" pt2="FB4_14_2" pt3="FB4_14_3"/></macrocell><macrocell id="FB4_MC15" pin="FB4_MC15_PIN96" sigUse="10" signal="TimeoutA"><pterms pt1="FB4_15_1" pt2="FB4_15_2" pt3="FB4_15_3"/></macrocell><macrocell id="FB4_MC16" sigUse="5" signal="IOL0"><pterms pt1="FB4_16_1" pt2="FB4_16_2" pt3="FB4_16_3"/></macrocell><macrocell id="FB4_MC17" pin="FB4_MC17_PIN97" sigUse="8" signal="iobsIOReady_SPECSIG"><pterms pt1="FB4_17_1" pt2="FB4_17_2" pt3="FB4_17_3" pt4="FB4_17_4"/></macrocell><macrocell id="FB4_MC18" sigUse="8" signal="BERR_IOBS"><pterms pt1="FB4_18_1" pt2="FB4_18_2" pt3="FB4_18_3" pt4="FB4_18_4"/></macrocell><fbinput id="FB4_I1" signal="A_FSB20_SPECSIG"/><fbinput id="FB4_I2" signal="A_FSB21_SPECSIG"/><fbinput id="FB4_I3" signal="A_FSB22_SPECSIG"/><fbinput id="FB4_I4" signal="A_FSB23_SPECSIG"/><fbinput id="FB4_I5" signal="BERR_IOBS"/><fbinput id="FB4_I6" signal="IOBERR"/><fbinput id="FB4_I7" signal="IORW0"/><fbinput id="FB4_I8" signal="RefAck"/><fbinput id="FB4_I9" signal="SW1_SPECSIG"/><fbinput id="FB4_I10" signal="TimeoutA"/><fbinput id="FB4_I11" signal="cntRefCnt0_SPECSIG"/><fbinput id="FB4_I12" signal="cntRefCnt1_SPECSIG"/><fbinput id="FB4_I13" signal="cntRefCnt2_SPECSIG"/><fbinput id="FB4_I14" signal="cntRefCnt3_SPECSIG"/><fbinput id="FB4_I15" signal="cntRefCnt4_SPECSIG"/><fbinput id="FB4_I16" signal="cntRefCnt5_SPECSIG"/><fbinput id="FB4_I17" signal="cntRefCnt6_SPECSIG"/><fbinput id="FB4_I18" signal="cntRefCnt7_SPECSIG"/><fbinput id="FB4_I19" signal="cntRefDone_SPECSIG"/><fbinput id="FB4_I20" signal="cntTimeoutBPre_SPECSIG"/><fbinput id="FB4_I21" signal="csnOverlay0_SPECSIG"/><fbinput id="FB4_I22" signal="fsbASrf_SPECSIG"/><fbinput id="FB4_I23" signal="fsbBERR1r_SPECSIG"/><fbinput id="FB4_I24" signal="fsbVPA_SPECSIG"/><fbinput id="FB4_I25" signal="iobmBGr0_SPECSIG"/><fbinput id="FB4_I26" signal="iobmBGr1_SPECSIG"/><fbinput id="FB4_I27" signal="iobmIOS_FSM_FFd2_SPECSIG"/><fbinput id="FB4_I28" signal="iobmIOS_FSM_FFd3_SPECSIG"/><fbinput id="FB4_I29" signal="iobsIOACTr_SPECSIG"/><fbinput id="FB4_I30" signal="iobsIOL1_SPECSIG"/><fbinput id="FB4_I31" signal="iobsIOReady_SPECSIG"/><fbinput id="FB4_I32" signal="iobsOnce_SPECSIG"/><fbinput id="FB4_I33" signal="iobsPS_FSM_FFd1_SPECSIG"/><fbinput id="FB4_I34" signal="iobsPS_FSM_FFd2_SPECSIG"/><fbinput id="FB4_I35" signal="nADoutLE1"/><fbinput id="FB4_I36" signal="nAS_FSB"/><fbinput id="FB4_I37" signal="nAS_IOB"/><fbinput id="FB4_I38" signal="nAoutOE"/><fbinput id="FB4_I39" signal="nLDS_FSB"/><fbinput id="FB4_I40" signal="nRES"/><fbinput id="FB4_I41" signal="nWE_FSB"/><pterm id="FB4_1_1"><signal id="cntRefCnt0_SPECSIG"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt1_SPECSIG"/><signal id="cntRefCnt2_SPECSIG"/><signal id="cntRefCnt3_SPECSIG"/><signal id="cntRefCnt4_SPECSIG"/></pterm><pterm id="FB4_2_1"><signal id="iobmBGr0_SPECSIG" negated="ON"/><signal id="iobmBGr1_SPECSIG" negated="ON"/></pterm><pterm id="FB4_2_2"><signal id="iobmBGr1_SPECSIG" negated="ON"/><signal id="nAoutOE"/></pterm><pterm id="FB4_2_3"><signal id="nAS_IOB" negated="ON"/><signal id="iobmBGr0_SPECSIG" negated="ON"/><signal id="nAoutOE" negated="ON"/></pterm><pterm id="FB4_3_1"><signal id="cntRefCnt0_SPECSIG"/><signal id="cntRefCnt1_SPECSIG"/><signal id="cntRefCnt2_SPECSIG"/><signal id="cntRefCnt3_SPECSIG"/><signal id="cntRefCnt4_SPECSIG"/></pterm><pterm id="FB4_4_1"><signal id="cntRefCnt0_SPECSIG"/><signal id="cntRefCnt1_SPECSIG"/><signal id="cntRefCnt2_SPECSIG"/><signal id="cntRefCnt3_SPECSIG"/></pterm><pterm id="FB4_5_1"><signal id="IORW0" negated="ON"/></pterm><pterm id="FB4_5_2"><signal id="iobmIOS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB4_6_1"><signal id="A_FSB23_SPECSIG"/><signal id="nWE_FSB"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB4_6_2"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG"/><signal id="nWE_FSB"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB4_6_3"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="nWE_FSB"/><signal id="nAS_FSB" negated="ON"/><signal id="SW1_SPECSIG" negated="ON"/></pterm><pterm id="FB4_7_1"><signal id="cntRefCnt0_SPECSIG"/><signal id="cntRefCnt1_SPECSIG"/><signal id="cntRefCnt2_SPECSIG"/></pterm><pterm id="FB4_8_1"><signal id="iobsPS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB4_8_2"><signal id="iobsPS_FSM_FFd1_SPECSIG"/><signal id="iobsIOACTr_SPECSIG"/></pterm><pterm id="FB4_9_1"><signal id="BERR_IOBS" negated="ON"/><signal id="fsbBERR1r_SPECSIG" negated="ON"/></pterm><pterm id="FB4_9_2"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB4_10_1"><signal id="csnOverlay0_SPECSIG"/></pterm><pterm id="FB4_10_2"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB4_11_1"><signal id="fsbVPA_SPECSIG"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB4_12_1"><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="RefAck" negated="ON"/></pterm><pterm id="FB4_12_2"><signal id="cntRefCnt0_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG" negated="ON"/><signal id="cntRefCnt6_SPECSIG" negated="ON"/><signal id="cntRefCnt1_SPECSIG" negated="ON"/><signal id="cntRefCnt2_SPECSIG" negated="ON"/><signal id="cntRefCnt3_SPECSIG" negated="ON"/><signal id="cntRefCnt4_SPECSIG" negated="ON"/><signal id="cntRefCnt7_SPECSIG" negated="ON"/></pterm><pterm id="FB4_13_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="csnOverlay0_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB4_13_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="csnOverlay0_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB4_13_3"><signal id="nRES" negated="ON"/></pterm><pterm id="FB4_14_1"><signal id="cntTimeoutBPre_SPECSIG"/><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB4_14_2"><signal id="cntTimeoutBPre_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="cntRefCnt0_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG" negated="ON"/><signal id="cntRefCnt6_SPECSIG" negated="ON"/><signal id="cntRefCnt1_SPECSIG" negated="ON"/><signal id="cntRefCnt2_SPECSIG" negated="ON"/><signal id="cntRefCnt3_SPECSIG" negated="ON"/><signal id="cntRefCnt4_SPECSIG" negated="ON"/><signal id="cntRefCnt7_SPECSIG" negated="ON"/></pterm><pterm id="FB4_14_3"><signal id="cntTimeoutBPre_SPECSIG" negated="ON"/><signal id="cntRefCnt0_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG" negated="ON"/><signal id="cntRefCnt6_SPECSIG" negated="ON"/><signal id="cntRefCnt1_SPECSIG" negated="ON"/><signal id="cntRefCnt2_SPECSIG" negated="ON"/><signal id="cntRefCnt3_SPECSIG" negated="ON"/><signal id="cntRefCnt4_SPECSIG" negated="ON"/><signal id="cntRefCnt7_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB4_15_1"><signal id="TimeoutA"/><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB4_15_2"><signal id="TimeoutA" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="cntRefCnt0_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG" negated="ON"/><signal id="cntRefCnt6_SPECSIG" negated="ON"/><signal id="cntRefCnt1_SPECSIG" negated="ON"/><signal id="cntRefCnt2_SPECSIG" negated="ON"/><signal id="cntRefCnt3_SPECSIG" negated="ON"/><signal id="cntRefCnt4_SPECSIG" negated="ON"/></pterm><pterm id="FB4_15_3"><signal id="TimeoutA" negated="ON"/><signal id="cntRefCnt0_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG" negated="ON"/><signal id="cntRefCnt6_SPECSIG" negated="ON"/><signal id="cntRefCnt1_SPECSIG" negated="ON"/><signal id="cntRefCnt2_SPECSIG" negated="ON"/><signal id="cntRefCnt3_SPECSIG" negated="ON"/><signal id="cntRefCnt4_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB4_16_1"><signal id="nLDS_FSB" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB4_16_2"><signal id="iobsIOL1_SPECSIG"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB4_16_3"><signal id="iobsPS_FSM_FFd2_SPECSIG"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB4_17_1"><signal id="iobsIOReady_SPECSIG"/><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB4_17_2"><signal id="iobsOnce_SPECSIG"/><signal id="iobsIOReady_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsIOACTr_SPECSIG" negated="ON"/><signal id="IOBERR"/><signal id="nADoutLE1"/></pterm><pterm id="FB4_17_3"><signal id="iobsOnce_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsIOACTr_SPECSIG" negated="ON"/><signal id="IOBERR" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB4_17_4"><signal id="iobsOnce_SPECSIG"/><signal id="iobsIOReady_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsIOACTr_SPECSIG" negated="ON"/><signal id="IOBERR" negated="ON"/><signal id="fsbASrf_SPECSIG"/><signal id="nADoutLE1"/></pterm><pterm id="FB4_18_1"><signal id="BERR_IOBS"/><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB4_18_2"><signal id="iobsOnce_SPECSIG"/><signal id="BERR_IOBS"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsIOACTr_SPECSIG" negated="ON"/><signal id="IOBERR" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB4_18_3"><signal id="iobsOnce_SPECSIG"/><signal id="BERR_IOBS" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsIOACTr_SPECSIG" negated="ON"/><signal id="IOBERR"/><signal id="nADoutLE1"/></pterm><pterm id="FB4_18_4"><signal id="iobsOnce_SPECSIG"/><signal id="BERR_IOBS" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsIOACTr_SPECSIG" negated="ON"/><signal id="IOBERR"/><signal id="fsbASrf_SPECSIG"/><signal id="nADoutLE1"/></pterm><equation id="cntRefCnt6_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB4_1_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="nAoutOE" regUse="D" userloc="P87"><d2><eq_pterm ptindx="FB4_2_1"/><eq_pterm ptindx="FB4_2_2"/><eq_pterm ptindx="FB4_2_3"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="VCC"/></equation><equation id="cntRefCnt5_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB4_3_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="cntRefCnt4_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB4_4_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="nDoutOE" regUse="D" userloc="P89"><d2><eq_pterm ptindx="FB4_5_1"/><eq_pterm ptindx="FB4_5_2"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="nDinOE" userloc="P90"><d2><eq_pterm ptindx="FB4_6_1"/><eq_pterm ptindx="FB4_6_2"/><eq_pterm ptindx="FB4_6_3"/></d2></equation><equation id="cntRefCnt3_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB4_7_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="iobsPS_FSM_FFd1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB4_8_1"/><eq_pterm ptindx="FB4_8_2"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="fsbBERR1r_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB4_9_1"/><eq_pterm ptindx="FB4_9_2"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="csnOverlay1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB4_10_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><ce><eq_pterm ptindx="FB4_10_2"/></ce><prld ptindx="GND"/></equation><equation id="nVPA_FSB" negated="ON" userloc="P93"><d2><eq_pterm ptindx="FB4_11_1"/></d2></equation><equation id="cntRefDone_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB4_12_1"/><eq_pterm ptindx="FB4_12_2"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="csnOverlay0_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB4_13_1"/><eq_pterm ptindx="FB4_13_2"/></d2><clk><fastsig signal="CLK_FSB"/></clk><reset><eq_pterm ptindx="FB4_13_3"/></reset><prld ptindx="GND"/></equation><equation id="cntTimeoutBPre_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB4_14_1"/><eq_pterm ptindx="FB4_14_2"/><eq_pterm ptindx="FB4_14_3"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="TimeoutA" regUse="T"><d2><eq_pterm ptindx="FB4_15_1"/><eq_pterm ptindx="FB4_15_2"/><eq_pterm ptindx="FB4_15_3"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="IOL0" regUse="D"><d2><eq_pterm ptindx="FB4_16_1"/><eq_pterm ptindx="FB4_16_2"/></d2><clk><fastsig signal="CLK_FSB"/></clk><ce><eq_pterm ptindx="FB4_16_3"/></ce><prld ptindx="GND"/></equation><equation id="iobsIOReady_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB4_17_1"/><eq_pterm ptindx="FB4_17_2"/><eq_pterm ptindx="FB4_17_3"/><eq_pterm ptindx="FB4_17_4"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="BERR_IOBS" regUse="T"><d2><eq_pterm ptindx="FB4_18_1"/><eq_pterm ptindx="FB4_18_2"/><eq_pterm ptindx="FB4_18_3"/><eq_pterm ptindx="FB4_18_4"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation></fblock><fblock id="FB5" inputUse="42" pinUse="8"><macrocell id="FB5_MC1" sigUse="15" signal="ramRASEL_SPECSIG"><pterms pt1="FB5_1_1" pt2="FB5_1_2" pt3="FB5_1_3" pt4="FB5_1_4" pt5="FB5_1_5"/></macrocell><macrocell id="FB5_MC2" pin="FB5_MC2_PIN35" sigUse="6" signal="nROMCS"><pterms pt1="FB5_2_1" pt2="FB5_2_2" pt3="FB5_2_3" pt4="FB5_2_4" pt5="FB5_2_5"/></macrocell><macrocell id="FB5_MC3" sigUse="7" signal="cntRefCnt7_SPECSIG"><pterms pt1="FB5_3_1" pt2="FB5_3_2" pt3="FB5_3_3" pt4="FB5_3_4"/></macrocell><macrocell id="FB5_MC4" sigUse="15" signal="ramRAMDIS2_SPECSIG"><pterms pt1="FB5_4_1" pt2="FB5_4_2" pt3="FB5_4_3" pt4="FB5_4_4" pt5="FB5_4_5"/></macrocell><macrocell id="FB5_MC5" pin="FB5_MC5_PIN36" sigUse="1" signal="nCAS"><pterms pt1="FB5_5_1" pt2="FB5_5_2" pt3="FB5_5_3"/></macrocell><macrocell id="FB5_MC6" pin="FB5_MC6_PIN37" sigUse="2" signal="nOE"><pterms pt1="FB5_6_1" pt2="FB5_6_2" pt3="FB5_6_3" pt4="FB5_6_4"/></macrocell><macrocell id="FB5_MC7"><pterms pt1="FB5_7_1" pt2="FB5_7_2" pt3="FB5_7_3" pt4="FB5_7_4" pt5="FB5_7_5"/></macrocell><macrocell id="FB5_MC8" pin="FB5_MC8_PIN39" sigUse="15" signal="ramRAMDIS1_SPECSIG"><pterms pt1="FB5_8_1" pt2="FB5_8_2" pt3="FB5_8_3" pt4="FB5_8_4" pt5="FB5_8_5"/></macrocell><macrocell id="FB5_MC9" pin="FB5_MC9_PIN40" sigUse="3" signal="RA4_SPECSIG"><pterms pt1="FB5_9_1" pt2="FB5_9_2" pt3="FB5_9_3" pt4="FB5_9_4" pt5="FB5_9_5"/></macrocell><macrocell id="FB5_MC10"><pterms pt1="FB5_10_1" pt2="FB5_10_2"/></macrocell><macrocell id="FB5_MC11" pin="FB5_MC11_PIN41" sigUse="3" signal="RA3_SPECSIG"><pterms pt1="FB5_11_1" pt2="FB5_11_2" pt3="FB5_11_3" pt4="FB5_11_4"/></macrocell><macrocell id="FB5_MC12" pin="FB5_MC12_PIN42" sigUse="3" signal="RA5_SPECSIG"><pterms pt1="FB5_12_1" pt2="FB5_12_2" pt3="FB5_12_3" pt4="FB5_12_4" pt5="FB5_12_5"/></macrocell><macrocell id="FB5_MC13" sigUse="19" signal="iobsLoad1_SPECSIG"><pterms pt1="FB5_13_1" pt2="FB5_13_2" pt3="FB5_13_3" pt4="FB5_13_4" pt5="FB5_13_5"/></macrocell><macrocell id="FB5_MC14" pin="FB5_MC14_PIN43" sigUse="3" signal="RA2_SPECSIG"><pterms pt1="FB5_14_1" pt2="FB5_14_2" pt3="FB5_14_3" pt4="FB5_14_4" pt5="FB5_14_5"/></macrocell><macrocell id="FB5_MC15" pin="FB5_MC15_PIN46" sigUse="3" signal="RA6_SPECSIG"><pterms pt1="FB5_15_1" pt2="FB5_15_2" pt3="FB5_15_3" pt4="FB5_15_4"/></macrocell><macrocell id="FB5_MC16" sigUse="10" signal="ramOnce_SPECSIG"><pterms pt1="FB5_16_1" pt2="FB5_16_2" pt3="FB5_16_3" pt4="FB5_16_4" pt5="FB5_16_5"/></macrocell><macrocell id="FB5_MC17" pin="FB5_MC17_PIN49"><pterms pt1="FB5_17_1" pt2="FB5_17_2" pt3="FB5_17_3" pt4="FB5_17_4" pt5="FB5_17_5"/></macrocell><macrocell id="FB5_MC18"><pterms pt1="FB5_18_1" pt2="FB5_18_2" pt3="FB5_18_3" pt4="FB5_18_4" pt5="FB5_18_5"/></macrocell><fbinput id="FB5_I1" signal="A_FSB12_SPECSIG"/><fbinput id="FB5_I2" signal="A_FSB13_SPECSIG"/><fbinput id="FB5_I3" signal="A_FSB14_SPECSIG"/><fbinput id="FB5_I4" signal="A_FSB15_SPECSIG"/><fbinput id="FB5_I5" signal="A_FSB16_SPECSIG"/><fbinput id="FB5_I6" signal="A_FSB17_SPECSIG"/><fbinput id="FB5_I7" signal="A_FSB18_SPECSIG"/><fbinput id="FB5_I8" signal="A_FSB19_SPECSIG"/><fbinput id="FB5_I9" signal="A_FSB20_SPECSIG"/><fbinput id="FB5_I10" signal="A_FSB21_SPECSIG"/><fbinput id="FB5_I11" signal="A_FSB22_SPECSIG"/><fbinput id="FB5_I12" signal="A_FSB23_SPECSIG"/><fbinput id="FB5_I13" signal="A_FSB3_SPECSIG"/><fbinput id="FB5_I14" signal="A_FSB4_SPECSIG"/><fbinput id="FB5_I15" signal="A_FSB5_SPECSIG"/><fbinput id="FB5_I16" signal="A_FSB6_SPECSIG"/><fbinput id="FB5_I17" signal="A_FSB7_SPECSIG"/><fbinput id="FB5_I18" signal="SW1_SPECSIG"/><fbinput id="FB5_I19" signal="cntRefCnt0_SPECSIG"/><fbinput id="FB5_I20" signal="cntRefCnt1_SPECSIG"/><fbinput id="FB5_I21" signal="cntRefCnt2_SPECSIG"/><fbinput id="FB5_I22" signal="cntRefCnt3_SPECSIG"/><fbinput id="FB5_I23" signal="cntRefCnt4_SPECSIG"/><fbinput id="FB5_I24" signal="cntRefCnt5_SPECSIG"/><fbinput id="FB5_I25" signal="cntRefCnt6_SPECSIG"/><fbinput id="FB5_I26" signal="cntRefCnt7_SPECSIG"/><fbinput id="FB5_I27" signal="cntRefDone_SPECSIG"/><fbinput id="FB5_I28" signal="csnOverlay1_SPECSIG"/><fbinput id="FB5_I29" signal="fsbASrf_SPECSIG"/><fbinput id="FB5_I30" signal="iobsOnce_SPECSIG"/><fbinput id="FB5_I31" signal="iobsPS_FSM_FFd1_SPECSIG"/><fbinput id="FB5_I32" signal="iobsPS_FSM_FFd2_SPECSIG"/><fbinput id="FB5_I33" signal="nADoutLE1"/><fbinput id="FB5_I34" signal="nAS_FSB"/><fbinput id="FB5_I35" signal="nWE_FSB"/><fbinput id="FB5_I36" signal="ramBACTr_SPECSIG"/><fbinput id="FB5_I37" signal="ramOnce_SPECSIG"/><fbinput id="FB5_I38" signal="ramRAMDIS2_SPECSIG"/><fbinput id="FB5_I39" signal="ramRASEL_SPECSIG"/><fbinput id="FB5_I40" signal="ramRS_FSM_FFd1_SPECSIG"/><fbinput id="FB5_I41" signal="ramRS_FSM_FFd2_SPECSIG"/><fbinput id="FB5_I42" signal="ramRS_FSM_FFd3_SPECSIG"/><pterm id="FB5_1_1"><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG"/></pterm><pterm id="FB5_1_2"><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB5_1_3"><signal id="A_FSB23_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/></pterm><pterm id="FB5_1_4"><signal id="A_FSB23_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_1_5"><signal id="A_FSB23_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB5_2_1"><signal id="A_FSB22_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_2_2"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/></pterm><pterm id="FB5_2_3"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_2_4"><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="nAS_FSB"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB5_2_5"><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="nAS_FSB"/><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB5_3_1"><signal id="cntRefCnt0_SPECSIG"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt1_SPECSIG"/><signal id="cntRefCnt2_SPECSIG"/><signal id="cntRefCnt3_SPECSIG"/><signal id="cntRefCnt4_SPECSIG"/></pterm><pterm id="FB5_3_2"><signal id="A_FSB23_SPECSIG"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="SW1_SPECSIG" negated="ON"/></pterm><pterm id="FB5_3_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="SW1_SPECSIG"/></pterm><pterm id="FB5_3_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/></pterm><pterm id="FB5_4_1"><signal id="ramRAMDIS2_SPECSIG"/><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB5_4_2"><signal id="ramOnce_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRAMDIS2_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB5_4_3"><signal id="ramOnce_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRAMDIS2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_4_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="ramOnce_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRAMDIS2_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB5_4_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="ramOnce_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRAMDIS2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_5_1"><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB5_5_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="ramOnce_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRAMDIS2_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB5_5_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="ramOnce_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRAMDIS2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_6_1"><signal id="nWE_FSB"/><signal id="nAS_FSB" negated="ON"/></pterm><pterm id="FB5_6_2"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB5_6_3"><signal id="A_FSB22_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB5_6_4"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB5_7_1"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/></pterm><pterm id="FB5_7_2"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_7_3"><signal id="A_FSB22_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/></pterm><pterm id="FB5_7_4"><signal id="A_FSB22_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_7_5"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/></pterm><pterm id="FB5_8_1"><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB5_8_2"><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG"/></pterm><pterm id="FB5_8_3"><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB5_8_4"><signal id="A_FSB23_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/></pterm><pterm id="FB5_8_5"><signal id="A_FSB23_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_9_1"><signal id="A_FSB23_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB5_9_2"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_9_3"><signal id="ramOnce_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB5_9_4"><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB5_9_5"><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="nAS_FSB"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB5_10_1"><signal id="A_FSB14_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB5_10_2"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB5_SPECSIG"/></pterm><pterm id="FB5_11_1"><signal id="A_FSB13_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB5_11_2"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB4_SPECSIG"/></pterm><pterm id="FB5_11_3"><signal id="A_FSB15_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB5_11_4"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB6_SPECSIG"/></pterm><pterm id="FB5_12_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG" negated="ON"/></pterm><pterm id="FB5_12_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG" negated="ON"/></pterm><pterm id="FB5_12_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB19_SPECSIG" negated="ON"/></pterm><pterm id="FB5_12_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB17_SPECSIG" negated="ON"/></pterm><pterm id="FB5_12_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB16_SPECSIG" negated="ON"/></pterm><pterm id="FB5_13_1"><signal id="iobsOnce_SPECSIG"/></pterm><pterm id="FB5_13_2"><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB5_13_3"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB5_13_4"><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB5_13_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/></pterm><pterm id="FB5_14_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB18_SPECSIG" negated="ON"/></pterm><pterm id="FB5_14_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="nWE_FSB"/></pterm><pterm id="FB5_14_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="SW1_SPECSIG"/></pterm><pterm id="FB5_14_4"><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/></pterm><pterm id="FB5_14_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/></pterm><pterm id="FB5_15_1"><signal id="A_FSB16_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB5_15_2"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB7_SPECSIG"/></pterm><pterm id="FB5_15_3"><signal id="A_FSB12_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB5_15_4"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB3_SPECSIG"/></pterm><pterm id="FB5_16_1"><signal id="ramOnce_SPECSIG"/><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB5_16_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB5_16_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_16_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB5_16_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_17_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB5_17_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_17_3"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB5_17_4"><signal id="A_FSB22_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB5_17_5"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB5_18_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB5_18_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_18_3"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/></pterm><pterm id="FB5_18_4"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB5_18_5"><signal id="A_FSB22_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/></pterm><equation id="ramRASEL_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB5_1_1"/><eq_pterm ptindx="FB5_1_2"/><eq_pterm ptindx="FB5_1_3"/><eq_pterm ptindx="FB5_1_4"/><eq_pterm ptindx="FB5_1_5"/><eq_pterm import="1" ptindx="FB5_2_1"/><eq_pterm import="1" ptindx="FB5_2_2"/><eq_pterm import="1" ptindx="FB5_2_3"/><eq_pterm import="1" ptindx="FB5_2_4"/><eq_pterm import="1" ptindx="FB5_2_5"/><eq_pterm import="1" ptindx="FB5_18_1"/><eq_pterm import="1" ptindx="FB5_18_2"/><eq_pterm import="1" ptindx="FB5_18_3"/><eq_pterm import="1" ptindx="FB5_18_4"/><eq_pterm import="1" ptindx="FB5_18_5"/><eq_pterm import="1" ptindx="FB5_17_1"/><eq_pterm import="1" ptindx="FB5_17_2"/><eq_pterm import="1" ptindx="FB5_17_3"/><eq_pterm import="1" ptindx="FB5_17_4"/><eq_pterm import="1" ptindx="FB5_17_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="nROMCS" negated="ON" userloc="P35"><d2><eq_pterm import="1" ptindx="FB5_3_2"/><eq_pterm import="1" ptindx="FB5_3_3"/><eq_pterm import="1" ptindx="FB5_3_4"/></d2></equation><equation id="cntRefCnt7_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB5_3_1"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="ramRAMDIS2_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB5_4_1"/><eq_pterm ptindx="FB5_4_2"/><eq_pterm ptindx="FB5_4_3"/><eq_pterm ptindx="FB5_4_4"/><eq_pterm ptindx="FB5_4_5"/><eq_pterm import="1" ptindx="FB5_5_2"/><eq_pterm import="1" ptindx="FB5_5_3"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="nCAS" regUse="D" userloc="P36"><d2><eq_pterm ptindx="FB5_5_1"/></d2><clk negated="ON"><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="nOE" negated="ON" userloc="P37"><d2><eq_pterm ptindx="FB5_6_1"/></d2></equation><equation id="ramRAMDIS1_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB5_8_1"/><eq_pterm ptindx="FB5_8_2"/><eq_pterm ptindx="FB5_8_3"/><eq_pterm ptindx="FB5_8_4"/><eq_pterm ptindx="FB5_8_5"/><eq_pterm import="1" ptindx="FB5_7_1"/><eq_pterm import="1" ptindx="FB5_7_2"/><eq_pterm import="1" ptindx="FB5_7_3"/><eq_pterm import="1" ptindx="FB5_7_4"/><eq_pterm import="1" ptindx="FB5_7_5"/><eq_pterm import="1" ptindx="FB5_6_2"/><eq_pterm import="1" ptindx="FB5_6_3"/><eq_pterm import="1" ptindx="FB5_6_4"/><eq_pterm import="1" ptindx="FB5_9_1"/><eq_pterm import="1" ptindx="FB5_9_2"/><eq_pterm import="1" ptindx="FB5_9_3"/><eq_pterm import="1" ptindx="FB5_9_4"/><eq_pterm import="1" ptindx="FB5_9_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="RA4_SPECSIG" userloc="P40"><d2><eq_pterm import="1" ptindx="FB5_10_1"/><eq_pterm import="1" ptindx="FB5_10_2"/></d2></equation><equation id="RA3_SPECSIG" userloc="P41"><d2><eq_pterm ptindx="FB5_11_1"/><eq_pterm ptindx="FB5_11_2"/></d2></equation><equation id="RA5_SPECSIG" userloc="P42"><d2><eq_pterm import="1" ptindx="FB5_11_3"/><eq_pterm import="1" ptindx="FB5_11_4"/></d2></equation><equation id="iobsLoad1_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB5_13_1"/><eq_pterm ptindx="FB5_13_2"/><eq_pterm ptindx="FB5_13_3"/><eq_pterm ptindx="FB5_13_4"/><eq_pterm ptindx="FB5_13_5"/><eq_pterm import="1" ptindx="FB5_12_1"/><eq_pterm import="1" ptindx="FB5_12_2"/><eq_pterm import="1" ptindx="FB5_12_3"/><eq_pterm import="1" ptindx="FB5_12_4"/><eq_pterm import="1" ptindx="FB5_12_5"/><eq_pterm import="1" ptindx="FB5_14_1"/><eq_pterm import="1" ptindx="FB5_14_2"/><eq_pterm import="1" ptindx="FB5_14_3"/><eq_pterm import="1" ptindx="FB5_14_4"/><eq_pterm import="1" ptindx="FB5_14_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="RA2_SPECSIG" userloc="P43"><d2><eq_pterm import="1" ptindx="FB5_15_3"/><eq_pterm import="1" ptindx="FB5_15_4"/></d2></equation><equation id="RA6_SPECSIG" userloc="P46"><d2><eq_pterm ptindx="FB5_15_1"/><eq_pterm ptindx="FB5_15_2"/></d2></equation><equation id="ramOnce_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB5_16_1"/><eq_pterm ptindx="FB5_16_2"/><eq_pterm ptindx="FB5_16_3"/><eq_pterm ptindx="FB5_16_4"/><eq_pterm ptindx="FB5_16_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation></fblock><fblock id="FB6" inputUse="34" pinUse="10"><macrocell id="FB6_MC1" sigUse="6" signal="iobmETACK_SPECSIG"><pterms pt1="FB6_1_1" pt2="FB6_1_2" pt3="FB6_1_3" pt4="FB6_1_4" pt5="FB6_1_5"/></macrocell><macrocell id="FB6_MC2" pin="FB6_MC2_PIN74" sigUse="10" signal="nVMA_IOB"><pterms pt1="FB6_2_1" pt2="FB6_2_2" pt3="FB6_2_3"/></macrocell><macrocell id="FB6_MC3" sigUse="6" signal="iobmIOS_FSM_FFd3_SPECSIG"><pterms pt1="FB6_3_1" pt2="FB6_3_2" pt3="FB6_3_3"/></macrocell><macrocell id="FB6_MC4" sigUse="6" signal="iobmES3_SPECSIG"><pterms pt1="FB6_4_1" pt2="FB6_4_2" pt3="FB6_4_3"/></macrocell><macrocell id="FB6_MC5" pin="FB6_MC5_PIN76" sigUse="4" signal="iobmES1_SPECSIG"><pterms pt1="FB6_5_1" pt2="FB6_5_2" pt3="FB6_5_3"/></macrocell><macrocell id="FB6_MC6" pin="FB6_MC6_PIN77" sigUse="7" signal="iobmES0_SPECSIG"><pterms pt1="FB6_6_1" pt2="FB6_6_2" pt3="FB6_6_3"/></macrocell><macrocell id="FB6_MC7" sigUse="5" signal="ALE0M"><pterms pt1="FB6_7_1" pt2="FB6_7_2" pt3="FB6_7_3"/></macrocell><macrocell id="FB6_MC8" pin="FB6_MC8_PIN78" sigUse="7" signal="iobmES4_SPECSIG"><pterms pt1="FB6_8_1" pt2="FB6_8_2" pt3="FB6_8_3" pt4="FB6_8_4"/></macrocell><macrocell id="FB6_MC9" pin="FB6_MC9_PIN79" sigUse="6" signal="nLDS_IOB"><pterms pt1="FB6_9_1" pt2="FB6_9_2" pt3="FB6_9_3" pt4="FB6_9_4"/></macrocell><macrocell id="FB6_MC10" sigUse="11" signal="iobmIOS_FSM_FFd2_SPECSIG"><pterms pt1="FB6_10_1" pt2="FB6_10_2" pt3="FB6_10_3" pt4="FB6_10_4" pt5="FB6_10_5"/></macrocell><macrocell id="FB6_MC11" pin="FB6_MC11_PIN80" sigUse="6" signal="nUDS_IOB"><pterms pt1="FB6_11_1" pt2="FB6_11_2" pt3="FB6_11_3" pt4="FB6_11_4"/></macrocell><macrocell id="FB6_MC12" pin="FB6_MC12_PIN81" sigUse="4" signal="nAS_IOB"><pterms pt1="FB6_12_1" pt2="FB6_12_2" pt3="FB6_12_3"/></macrocell><macrocell id="FB6_MC13" sigUse="7" signal="iobmES2_SPECSIG"><pterms pt1="FB6_13_1" pt2="FB6_13_2" pt3="FB6_13_3" pt4="FB6_13_4" pt5="FB6_13_5"/></macrocell><macrocell id="FB6_MC14" pin="FB6_MC14_PIN82" sigUse="3" signal="nADoutLE1"><pterms pt1="FB6_14_1" pt2="FB6_14_2"/></macrocell><macrocell id="FB6_MC15" pin="FB6_MC15_PIN85" sigUse="2" signal="nADoutLE0"><pterms pt1="FB6_15_1" pt2="FB6_15_2"/></macrocell><macrocell id="FB6_MC16" sigUse="13" signal="IOACT"><pterms pt1="FB6_16_1" pt2="FB6_16_2" pt3="FB6_16_3" pt4="FB6_16_4" pt5="FB6_16_5"/></macrocell><macrocell id="FB6_MC17" pin="FB6_MC17_PIN86" sigUse="2" signal="nDinLE"><pterms pt1="FB6_17_1" pt2="FB6_17_2"/></macrocell><macrocell id="FB6_MC18" sigUse="13" signal="IOBERR"><pterms pt1="FB6_18_1" pt2="FB6_18_2" pt3="FB6_18_3" pt4="FB6_18_4" pt5="FB6_18_5"/></macrocell><fbinput id="FB6_I1" signal="ALE0M"/><fbinput id="FB6_I2" signal="ALE0S"/><fbinput id="FB6_I3" signal="CLK_IOB"/><fbinput id="FB6_I4" signal="IOACT"/><fbinput id="FB6_I5" signal="IOBERR"/><fbinput id="FB6_I6" signal="IOL0"/><fbinput id="FB6_I7" signal="IORW0"/><fbinput id="FB6_I8" signal="IOU0"/><fbinput id="FB6_I9" signal="iobmBERRrf_SPECSIG"/><fbinput id="FB6_I10" signal="iobmBERRrr_SPECSIG"/><fbinput id="FB6_I11" signal="iobmDTACKrf_SPECSIG"/><fbinput id="FB6_I12" signal="iobmDTACKrr_SPECSIG"/><fbinput id="FB6_I13" signal="iobmES0_SPECSIG"/><fbinput id="FB6_I14" signal="iobmES1_SPECSIG"/><fbinput id="FB6_I15" signal="iobmES2_SPECSIG"/><fbinput id="FB6_I16" signal="iobmES3_SPECSIG"/><fbinput id="FB6_I17" signal="iobmES4_SPECSIG"/><fbinput id="FB6_I18" signal="iobmETACK_SPECSIG"/><fbinput id="FB6_I19" signal="iobmEr_SPECSIG"/><fbinput id="FB6_I20" signal="iobmEr2_SPECSIG"/><fbinput id="FB6_I21" signal="iobmIOREQr_SPECSIG"/><fbinput id="FB6_I22" signal="iobmIOS_FSM_FFd1_SPECSIG"/><fbinput id="FB6_I23" signal="iobmIOS_FSM_FFd2_SPECSIG"/><fbinput id="FB6_I24" signal="iobmIOS_FSM_FFd3_SPECSIG"/><fbinput id="FB6_I25" signal="iobmRESrf_SPECSIG"/><fbinput id="FB6_I26" signal="iobmRESrr_SPECSIG"/><fbinput id="FB6_I27" signal="iobmVPArf_SPECSIG"/><fbinput id="FB6_I28" signal="iobmVPArr_SPECSIG"/><fbinput id="FB6_I29" signal="iobsClear1_SPECSIG"/><fbinput id="FB6_I30" signal="iobsLoad1_SPECSIG"/><fbinput id="FB6_I31" signal="nADoutLE1"/><fbinput id="FB6_I32" signal="nAoutOE"/><fbinput id="FB6_I33" signal="nBERR_IOB"/><fbinput id="FB6_I34" signal="nVMA_IOB"/><pterm id="FB6_1_1"><signal id="nVMA_IOB" negated="ON"/><signal id="iobmES0_SPECSIG" negated="ON"/><signal id="iobmES1_SPECSIG" negated="ON"/><signal id="iobmES2_SPECSIG" negated="ON"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG"/></pterm><pterm id="FB6_1_2"><signal id="CLK_IOB"/><signal id="nBERR_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="IOBERR"/><signal id="iobmRESrf_SPECSIG"/><signal id="iobmRESrr_SPECSIG"/></pterm><pterm id="FB6_1_3"><signal id="CLK_IOB"/><signal id="nBERR_IOB" negated="ON"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="IOBERR" negated="ON"/><signal id="iobmDTACKrf_SPECSIG"/><signal id="iobmDTACKrr_SPECSIG"/></pterm><pterm id="FB6_1_4"><signal id="CLK_IOB"/><signal id="nBERR_IOB" negated="ON"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="IOBERR" negated="ON"/><signal id="iobmBERRrf_SPECSIG"/><signal id="iobmBERRrr_SPECSIG"/></pterm><pterm id="FB6_1_5"><signal id="CLK_IOB"/><signal id="nBERR_IOB" negated="ON"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="IOBERR" negated="ON"/><signal id="iobmRESrf_SPECSIG"/><signal id="iobmRESrr_SPECSIG"/></pterm><pterm id="FB6_2_1"><signal id="nVMA_IOB" negated="ON"/><signal id="iobmES0_SPECSIG" negated="ON"/><signal id="iobmES1_SPECSIG" negated="ON"/><signal id="iobmES2_SPECSIG" negated="ON"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG" negated="ON"/></pterm><pterm id="FB6_2_2"><signal id="nVMA_IOB"/><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG" negated="ON"/><signal id="IOACT"/><signal id="iobmVPArf_SPECSIG"/><signal id="iobmVPArr_SPECSIG"/></pterm><pterm id="FB6_2_3"><signal id="nAoutOE" negated="ON"/></pterm><pterm id="FB6_3_1"><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB6_3_2"><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_3_3"><signal id="CLK_IOB" negated="ON"/><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobmIOREQr_SPECSIG"/><signal id="nAoutOE" negated="ON"/></pterm><pterm id="FB6_4_1"><signal id="iobmES3_SPECSIG"/><signal id="iobmEr_SPECSIG" negated="ON"/><signal id="iobmEr2_SPECSIG"/></pterm><pterm id="FB6_4_2"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG"/><signal id="iobmEr_SPECSIG"/></pterm><pterm id="FB6_4_3"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG"/><signal id="iobmEr2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_5_1"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/></pterm><pterm id="FB6_5_2"><signal id="iobmES0_SPECSIG" negated="ON"/><signal id="iobmES1_SPECSIG" negated="ON"/></pterm><pterm id="FB6_5_3"><signal id="iobmEr_SPECSIG" negated="ON"/><signal id="iobmEr2_SPECSIG"/></pterm><pterm id="FB6_6_1"><signal id="iobmES0_SPECSIG"/><signal id="iobmEr_SPECSIG" negated="ON"/><signal id="iobmEr2_SPECSIG"/></pterm><pterm id="FB6_6_2"><signal id="iobmES0_SPECSIG" negated="ON"/><signal id="iobmES1_SPECSIG" negated="ON"/><signal id="iobmES2_SPECSIG" negated="ON"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG" negated="ON"/><signal id="iobmEr_SPECSIG"/></pterm><pterm id="FB6_6_3"><signal id="iobmES0_SPECSIG" negated="ON"/><signal id="iobmES1_SPECSIG" negated="ON"/><signal id="iobmES2_SPECSIG" negated="ON"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG" negated="ON"/><signal id="iobmEr2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_7_1"><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB6_7_2"><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB6_7_3"><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="iobmIOREQr_SPECSIG"/><signal id="nAoutOE" negated="ON"/></pterm><pterm id="FB6_8_1"><signal id="iobmES4_SPECSIG"/><signal id="iobmEr_SPECSIG" negated="ON"/><signal id="iobmEr2_SPECSIG"/></pterm><pterm id="FB6_8_2"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG"/><signal id="iobmES3_SPECSIG"/><signal id="iobmEr_SPECSIG"/></pterm><pterm id="FB6_8_3"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG"/><signal id="iobmES3_SPECSIG"/><signal id="iobmEr2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_8_4"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG" negated="ON"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG"/></pterm><pterm id="FB6_9_1"><signal id="IOL0"/><signal id="iobmIOS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB6_9_2"><signal id="IOL0"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB6_9_3"><signal id="IORW0" negated="ON"/><signal id="IOL0"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB6_9_4"><signal id="nAoutOE" negated="ON"/></pterm><pterm id="FB6_10_1"><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_10_2"><signal id="CLK_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmETACK_SPECSIG"/></pterm><pterm id="FB6_10_3"><signal id="CLK_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmDTACKrf_SPECSIG"/><signal id="iobmDTACKrr_SPECSIG"/></pterm><pterm id="FB6_10_4"><signal id="CLK_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmBERRrf_SPECSIG"/><signal id="iobmBERRrr_SPECSIG"/></pterm><pterm id="FB6_10_5"><signal id="CLK_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="iobmRESrf_SPECSIG"/><signal id="iobmRESrr_SPECSIG"/></pterm><pterm id="FB6_11_1"><signal id="IOU0"/><signal id="iobmIOS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB6_11_2"><signal id="IOU0"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB6_11_3"><signal id="IORW0" negated="ON"/><signal id="IOU0"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB6_11_4"><signal id="nAoutOE" negated="ON"/></pterm><pterm id="FB6_12_1"><signal id="iobmIOS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_12_2"><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_12_3"><signal id="nAoutOE" negated="ON"/></pterm><pterm id="FB6_13_1"><signal id="iobmES0_SPECSIG" negated="ON"/><signal id="iobmES2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_13_2"><signal id="iobmES1_SPECSIG" negated="ON"/><signal id="iobmES2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_13_3"><signal id="iobmEr_SPECSIG" negated="ON"/><signal id="iobmEr2_SPECSIG"/></pterm><pterm id="FB6_13_4"><signal id="iobmES0_SPECSIG"/><signal id="iobmES1_SPECSIG"/><signal id="iobmES2_SPECSIG"/></pterm><pterm id="FB6_13_5"><signal id="iobmES2_SPECSIG" negated="ON"/><signal id="iobmES3_SPECSIG" negated="ON"/><signal id="iobmES4_SPECSIG"/></pterm><pterm id="FB6_14_1"><signal id="iobsLoad1_SPECSIG"/></pterm><pterm id="FB6_14_2"><signal id="iobsClear1_SPECSIG" negated="ON"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB6_15_1"><signal id="ALE0M" negated="ON"/><signal id="ALE0S" negated="ON"/></pterm><pterm id="FB6_15_2"><signal id="CLK_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmDTACKrf_SPECSIG"/><signal id="iobmDTACKrr_SPECSIG"/></pterm><pterm id="FB6_16_1"><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/></pterm><pterm id="FB6_16_2"><signal id="iobmIOS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobmIOREQr_SPECSIG" negated="ON"/></pterm><pterm id="FB6_16_3"><signal id="iobmIOS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nAoutOE"/></pterm><pterm id="FB6_16_4"><signal id="CLK_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmETACK_SPECSIG"/></pterm><pterm id="FB6_16_5"><signal id="CLK_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmBERRrf_SPECSIG"/><signal id="iobmBERRrr_SPECSIG"/></pterm><pterm id="FB6_17_1"><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB6_17_2"><signal id="CLK_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmRESrf_SPECSIG"/><signal id="iobmRESrr_SPECSIG"/></pterm><pterm id="FB6_18_1"><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="iobmIOS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="IOBERR"/></pterm><pterm id="FB6_18_2"><signal id="CLK_IOB"/><signal id="nBERR_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="IOBERR"/><signal id="iobmETACK_SPECSIG"/></pterm><pterm id="FB6_18_3"><signal id="CLK_IOB"/><signal id="nBERR_IOB" negated="ON"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="IOBERR" negated="ON"/><signal id="iobmETACK_SPECSIG"/></pterm><pterm id="FB6_18_4"><signal id="CLK_IOB"/><signal id="nBERR_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="IOBERR"/><signal id="iobmDTACKrf_SPECSIG"/><signal id="iobmDTACKrr_SPECSIG"/></pterm><pterm id="FB6_18_5"><signal id="CLK_IOB"/><signal id="nBERR_IOB"/><signal id="iobmIOS_FSM_FFd3_SPECSIG"/><signal id="iobmIOS_FSM_FFd1_SPECSIG"/><signal id="iobmIOS_FSM_FFd2_SPECSIG"/><signal id="IOBERR"/><signal id="iobmBERRrf_SPECSIG"/><signal id="iobmBERRrr_SPECSIG"/></pterm><equation id="iobmETACK_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB6_1_1"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="nVMA_IOB" regUse="T" userloc="P74"><d2><eq_pterm ptindx="FB6_2_1"/><eq_pterm ptindx="FB6_2_2"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><oe><eq_pterm ptindx="FB6_2_3"/></oe><prld ptindx="GND"/></equation><equation id="iobmIOS_FSM_FFd3_SPECSIG" regUse="D"><d2><eq_pterm ptindx="FB6_3_1"/><eq_pterm ptindx="FB6_3_2"/><eq_pterm ptindx="FB6_3_3"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmES3_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB6_4_1"/><eq_pterm ptindx="FB6_4_2"/><eq_pterm ptindx="FB6_4_3"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmES1_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB6_5_1"/><eq_pterm ptindx="FB6_5_2"/><eq_pterm ptindx="FB6_5_3"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmES0_SPECSIG" negated="ON" regUse="T"><d2><eq_pterm ptindx="FB6_6_1"/><eq_pterm ptindx="FB6_6_2"/><eq_pterm ptindx="FB6_6_3"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="ALE0M" regUse="D"><d2><eq_pterm ptindx="FB6_7_1"/><eq_pterm ptindx="FB6_7_2"/><eq_pterm ptindx="FB6_7_3"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="iobmES4_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB6_8_1"/><eq_pterm ptindx="FB6_8_2"/><eq_pterm ptindx="FB6_8_3"/><eq_pterm ptindx="FB6_8_4"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="nLDS_IOB" negated="ON" regUse="D" userloc="P79"><d2><eq_pterm ptindx="FB6_9_1"/><eq_pterm ptindx="FB6_9_2"/><eq_pterm ptindx="FB6_9_3"/></d2><clk negated="ON"><fastsig signal="CLK2X_IOB"/></clk><oe><eq_pterm ptindx="FB6_9_4"/></oe><prld ptindx="GND"/></equation><equation id="iobmIOS_FSM_FFd2_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB6_10_1"/><eq_pterm ptindx="FB6_10_2"/><eq_pterm ptindx="FB6_10_3"/><eq_pterm ptindx="FB6_10_4"/><eq_pterm ptindx="FB6_10_5"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="nUDS_IOB" negated="ON" regUse="D" userloc="P80"><d2><eq_pterm ptindx="FB6_11_1"/><eq_pterm ptindx="FB6_11_2"/><eq_pterm ptindx="FB6_11_3"/></d2><clk negated="ON"><fastsig signal="CLK2X_IOB"/></clk><oe><eq_pterm ptindx="FB6_11_4"/></oe><prld ptindx="GND"/></equation><equation id="nAS_IOB" regUse="D" userloc="P81"><d2><eq_pterm ptindx="FB6_12_1"/><eq_pterm ptindx="FB6_12_2"/></d2><clk negated="ON"><fastsig signal="CLK2X_IOB"/></clk><oe><eq_pterm ptindx="FB6_12_3"/></oe><prld ptindx="GND"/></equation><equation id="iobmES2_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB6_13_1"/><eq_pterm ptindx="FB6_13_2"/><eq_pterm ptindx="FB6_13_3"/><eq_pterm ptindx="FB6_13_4"/><eq_pterm ptindx="FB6_13_5"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="nADoutLE1" negated="ON" regUse="D" userloc="P82"><d2><eq_pterm ptindx="FB6_14_1"/><eq_pterm ptindx="FB6_14_2"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="VCC"/></equation><equation id="nADoutLE0" userloc="P85"><d2><eq_pterm ptindx="FB6_15_1"/></d2></equation><equation id="IOACT" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB6_16_1"/><eq_pterm ptindx="FB6_16_2"/><eq_pterm ptindx="FB6_16_3"/><eq_pterm ptindx="FB6_16_4"/><eq_pterm ptindx="FB6_16_5"/><eq_pterm import="1" ptindx="FB6_15_2"/><eq_pterm import="1" ptindx="FB6_17_2"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="nDinLE" regUse="D" userloc="P86"><d2><eq_pterm ptindx="FB6_17_1"/></d2><clk negated="ON"><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation><equation id="IOBERR" regUse="T"><d2><eq_pterm ptindx="FB6_18_1"/><eq_pterm ptindx="FB6_18_2"/><eq_pterm ptindx="FB6_18_3"/><eq_pterm ptindx="FB6_18_4"/><eq_pterm ptindx="FB6_18_5"/><eq_pterm import="1" ptindx="FB6_1_2"/><eq_pterm import="1" ptindx="FB6_1_3"/><eq_pterm import="1" ptindx="FB6_1_4"/><eq_pterm import="1" ptindx="FB6_1_5"/></d2><clk><fastsig signal="CLK2X_IOB"/></clk><prld ptindx="GND"/></equation></fblock><fblock id="FB7" inputUse="36" pinUse="10"><macrocell id="FB7_MC1" sigUse="15" signal="ramRAMReady_SPECSIG"><pterms pt1="FB7_1_1" pt2="FB7_1_2" pt3="FB7_1_3" pt4="FB7_1_4" pt5="FB7_1_5"/></macrocell><macrocell id="FB7_MC2" pin="FB7_MC2_PIN50" sigUse="3" signal="RA1_SPECSIG"><pterms pt1="FB7_2_1" pt2="FB7_2_2" pt3="FB7_2_3" pt4="FB7_2_4" pt5="FB7_2_5"/></macrocell><macrocell id="FB7_MC3" sigUse="12" signal="TimeoutB"><pterms pt1="FB7_3_1" pt2="FB7_3_2" pt3="FB7_3_3" pt4="FB7_3_4" pt5="FB7_3_5"/></macrocell><macrocell id="FB7_MC4" sigUse="8" signal="fsbReady0r_SPECSIG"><pterms pt1="FB7_4_1" pt2="FB7_4_2" pt3="FB7_4_3"/></macrocell><macrocell id="FB7_MC5" pin="FB7_MC5_PIN52" sigUse="3" signal="RA7_SPECSIG"><pterms pt1="FB7_5_1" pt2="FB7_5_2"/></macrocell><macrocell id="FB7_MC6" pin="FB7_MC6_PIN53" sigUse="3" signal="RA0_SPECSIG"><pterms pt1="FB7_6_1" pt2="FB7_6_2"/></macrocell><macrocell id="FB7_MC7" sigUse="10" signal="ramRS_FSM_FFd1_SPECSIG"><pterms pt1="FB7_7_1" pt2="FB7_7_2" pt3="FB7_7_3" pt4="FB7_7_4" pt5="FB7_7_5"/></macrocell><macrocell id="FB7_MC8" pin="FB7_MC8_PIN54" sigUse="7" signal="RA8_SPECSIG"><pterms pt1="FB7_8_1" pt2="FB7_8_2" pt3="FB7_8_3" pt4="FB7_8_4" pt5="FB7_8_5"/></macrocell><macrocell id="FB7_MC9" pin="FB7_MC9_PIN55" sigUse="1" signal="RA10_SPECSIG"><pterms pt1="FB7_9_1" pt2="FB7_9_2" pt3="FB7_9_3"/></macrocell><macrocell id="FB7_MC10" sigUse="8" signal="OpTxOpTxFX_DC182_INV783_SPECSIG"><pterms pt1="FB7_10_1" pt2="FB7_10_2" pt3="FB7_10_3" pt4="FB7_10_4" pt5="FB7_10_5"/></macrocell><macrocell id="FB7_MC11" pin="FB7_MC11_PIN56" sigUse="3" signal="RA9_SPECSIG"><pterms pt1="FB7_11_1" pt2="FB7_11_2" pt3="FB7_11_3"/></macrocell><macrocell id="FB7_MC12" pin="FB7_MC12_PIN58" sigUse="1" signal="CLK25EN"><pterms pt1="FB7_12_1" pt2="FB7_12_2" pt3="FB7_12_3" pt4="FB7_12_4" pt5="FB7_12_5"/></macrocell><macrocell id="FB7_MC13" sigUse="14" signal="ramRS_FSM_FFd3_SPECSIG"><pterms pt1="FB7_13_1" pt2="FB7_13_2" pt3="FB7_13_3" pt4="FB7_13_4" pt5="FB7_13_5"/></macrocell><macrocell id="FB7_MC14" pin="FB7_MC14_PIN59" sigUse="1" signal="CLK20EN"><pterms pt1="FB7_14_1" pt2="FB7_14_2" pt3="FB7_14_3"/></macrocell><macrocell id="FB7_MC15" pin="FB7_MC15_PIN60"><pterms pt1="FB7_15_1" pt2="FB7_15_2" pt3="FB7_15_3" pt4="FB7_15_4"/></macrocell><macrocell id="FB7_MC16"><pterms pt1="FB7_16_1" pt2="FB7_16_2" pt3="FB7_16_3" pt4="FB7_16_4" pt5="FB7_16_5"/></macrocell><macrocell id="FB7_MC17" pin="FB7_MC17_PIN61" sigUse="14" signal="ramRS_FSM_FFd2_SPECSIG"><pterms pt1="FB7_17_1" pt2="FB7_17_2" pt3="FB7_17_3" pt4="FB7_17_4" pt5="FB7_17_5"/></macrocell><macrocell id="FB7_MC18"><pterms pt1="FB7_18_1" pt2="FB7_18_2" pt3="FB7_18_3" pt4="FB7_18_4" pt5="FB7_18_5"/></macrocell><fbinput id="FB7_I1" signal="A_FSB10_SPECSIG"/><fbinput id="FB7_I2" signal="A_FSB11_SPECSIG"/><fbinput id="FB7_I3" signal="A_FSB17_SPECSIG"/><fbinput id="FB7_I4" signal="A_FSB18_SPECSIG"/><fbinput id="FB7_I5" signal="A_FSB19_SPECSIG"/><fbinput id="FB7_I6" signal="A_FSB1_SPECSIG"/><fbinput id="FB7_I7" signal="A_FSB20_SPECSIG"/><fbinput id="FB7_I8" signal="A_FSB21_SPECSIG"/><fbinput id="FB7_I9" signal="A_FSB22_SPECSIG"/><fbinput id="FB7_I10" signal="A_FSB23_SPECSIG"/><fbinput id="FB7_I11" signal="A_FSB2_SPECSIG"/><fbinput id="FB7_I12" signal="A_FSB8_SPECSIG"/><fbinput id="FB7_I13" signal="A_FSB9_SPECSIG"/><fbinput id="FB7_I14" signal="SW0_SPECSIG"/><fbinput id="FB7_I15" signal="TimeoutB"/><fbinput id="FB7_I16" signal="cntRefCnt0_SPECSIG"/><fbinput id="FB7_I17" signal="cntRefCnt1_SPECSIG"/><fbinput id="FB7_I18" signal="cntRefCnt2_SPECSIG"/><fbinput id="FB7_I19" signal="cntRefCnt3_SPECSIG"/><fbinput id="FB7_I20" signal="cntRefCnt4_SPECSIG"/><fbinput id="FB7_I21" signal="cntRefCnt5_SPECSIG"/><fbinput id="FB7_I22" signal="cntRefCnt6_SPECSIG"/><fbinput id="FB7_I23" signal="cntRefCnt7_SPECSIG"/><fbinput id="FB7_I24" signal="cntRefDone_SPECSIG"/><fbinput id="FB7_I25" signal="cntTimeoutBPre_SPECSIG"/><fbinput id="FB7_I26" signal="csnOverlay1_SPECSIG"/><fbinput id="FB7_I27" signal="fsbASrf_SPECSIG"/><fbinput id="FB7_I28" signal="fsbReady0r_SPECSIG"/><fbinput id="FB7_I29" signal="nAS_FSB"/><fbinput id="FB7_I30" signal="ramBACTr_SPECSIG"/><fbinput id="FB7_I31" signal="ramOnce_SPECSIG"/><fbinput id="FB7_I32" signal="ramRAMReady_SPECSIG"/><fbinput id="FB7_I33" signal="ramRASEL_SPECSIG"/><fbinput id="FB7_I34" signal="ramRS_FSM_FFd1_SPECSIG"/><fbinput id="FB7_I35" signal="ramRS_FSM_FFd2_SPECSIG"/><fbinput id="FB7_I36" signal="ramRS_FSM_FFd3_SPECSIG"/><pterm id="FB7_1_1"><signal id="A_FSB22_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/></pterm><pterm id="FB7_1_2"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/></pterm><pterm id="FB7_1_3"><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/></pterm><pterm id="FB7_1_4"><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB7_1_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB7_2_1"><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB7_2_2"><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG"/></pterm><pterm id="FB7_2_3"><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG"/></pterm><pterm id="FB7_2_4"><signal id="A_FSB23_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/></pterm><pterm id="FB7_2_5"><signal id="A_FSB23_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB7_3_1"><signal id="TimeoutB"/><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB7_3_2"><signal id="TimeoutB" negated="ON"/><signal id="cntTimeoutBPre_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="cntRefCnt0_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG" negated="ON"/><signal id="cntRefCnt6_SPECSIG" negated="ON"/><signal id="cntRefCnt1_SPECSIG" negated="ON"/><signal id="cntRefCnt2_SPECSIG" negated="ON"/><signal id="cntRefCnt3_SPECSIG" negated="ON"/><signal id="cntRefCnt4_SPECSIG" negated="ON"/><signal id="cntRefCnt7_SPECSIG" negated="ON"/></pterm><pterm id="FB7_3_3"><signal id="TimeoutB" negated="ON"/><signal id="cntTimeoutBPre_SPECSIG"/><signal id="cntRefCnt0_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG" negated="ON"/><signal id="cntRefCnt6_SPECSIG" negated="ON"/><signal id="cntRefCnt1_SPECSIG" negated="ON"/><signal id="cntRefCnt2_SPECSIG" negated="ON"/><signal id="cntRefCnt3_SPECSIG" negated="ON"/><signal id="cntRefCnt4_SPECSIG" negated="ON"/><signal id="cntRefCnt7_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB7_3_4"><signal id="A_FSB11_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB7_3_5"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB2_SPECSIG"/></pterm><pterm id="FB7_4_1"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB7_4_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="fsbReady0r_SPECSIG" negated="ON"/><signal id="ramRAMReady_SPECSIG" negated="ON"/></pterm><pterm id="FB7_4_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="fsbReady0r_SPECSIG" negated="ON"/><signal id="ramRAMReady_SPECSIG" negated="ON"/></pterm><pterm id="FB7_5_1"><signal id="A_FSB8_SPECSIG"/><signal id="ramRASEL_SPECSIG"/></pterm><pterm id="FB7_5_2"><signal id="A_FSB17_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB7_6_1"><signal id="A_FSB10_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB7_6_2"><signal id="ramRASEL_SPECSIG"/><signal id="A_FSB1_SPECSIG"/></pterm><pterm id="FB7_7_1"><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG"/></pterm><pterm id="FB7_7_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB7_7_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB7_7_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB7_7_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB7_8_1"><signal id="A_FSB23_SPECSIG"/><signal id="A_FSB18_SPECSIG"/></pterm><pterm id="FB7_8_2"><signal id="A_FSB18_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB7_8_3"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB18_SPECSIG"/></pterm><pterm id="FB7_8_4"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB18_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/></pterm><pterm id="FB7_8_5"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB18_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/></pterm><pterm id="FB7_9_1"><signal id="A_FSB21_SPECSIG"/></pterm><pterm id="FB7_9_2"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRASEL_SPECSIG"/></pterm><pterm id="FB7_9_3"><signal id="A_FSB9_SPECSIG"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRASEL_SPECSIG"/></pterm><pterm id="FB7_10_1"><signal id="A_FSB23_SPECSIG"/><signal id="TimeoutB"/></pterm><pterm id="FB7_10_2"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="TimeoutB"/></pterm><pterm id="FB7_10_3"><signal id="A_FSB21_SPECSIG"/><signal id="TimeoutB"/></pterm><pterm id="FB7_10_4"><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="TimeoutB"/></pterm><pterm id="FB7_10_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="fsbReady0r_SPECSIG" negated="ON"/><signal id="ramRAMReady_SPECSIG" negated="ON"/></pterm><pterm id="FB7_11_1"><signal id="A_FSB20_SPECSIG"/><signal id="ramRASEL_SPECSIG"/></pterm><pterm id="FB7_11_2"><signal id="A_FSB19_SPECSIG"/><signal id="ramRASEL_SPECSIG" negated="ON"/></pterm><pterm id="FB7_11_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="fsbReady0r_SPECSIG" negated="ON"/><signal id="ramRAMReady_SPECSIG" negated="ON"/></pterm><pterm id="FB7_12_1"><signal id="SW0_SPECSIG" negated="ON"/></pterm><pterm id="FB7_12_2"><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB7_12_3"><signal id="A_FSB22_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB7_12_4"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB7_12_5"><signal id="nAS_FSB"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB7_13_1"><signal id="A_FSB23_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB7_13_2"><signal id="ramOnce_SPECSIG"/><signal id="cntRefDone_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB7_13_3"><signal id="ramOnce_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG" negated="ON"/></pterm><pterm id="FB7_13_4"><signal id="ramOnce_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="cntRefCnt6_SPECSIG" negated="ON"/></pterm><pterm id="FB7_13_5"><signal id="ramOnce_SPECSIG"/><signal id="ramRS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="cntRefCnt7_SPECSIG" negated="ON"/></pterm><pterm id="FB7_14_1"><signal id="SW0_SPECSIG"/></pterm><pterm id="FB7_14_2"><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB7_14_3"><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB7_15_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB7_15_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB7_15_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB7_15_4"><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="nAS_FSB"/><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB7_16_1"><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG"/></pterm><pterm id="FB7_16_2"><signal id="nAS_FSB"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB7_16_3"><signal id="nAS_FSB"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="cntRefCnt6_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB7_16_4"><signal id="nAS_FSB"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="cntRefCnt7_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB7_16_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB7_17_1"><signal id="ramRS_FSM_FFd2_SPECSIG"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB7_17_2"><signal id="cntRefDone_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/></pterm><pterm id="FB7_17_3"><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="cntRefCnt6_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG"/></pterm><pterm id="FB7_17_4"><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd3_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG"/><signal id="cntRefCnt7_SPECSIG" negated="ON"/></pterm><pterm id="FB7_17_5"><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="cntRefCnt5_SPECSIG"/><signal id="cntRefCnt6_SPECSIG"/><signal id="cntRefCnt7_SPECSIG"/></pterm><pterm id="FB7_18_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/></pterm><pterm id="FB7_18_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB7_18_3"><signal id="A_FSB22_SPECSIG"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB7_18_4"><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="cntRefDone_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="ramBACTr_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><pterm id="FB7_18_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="ramOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG"/></pterm><equation id="ramRAMReady_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB7_1_1"/><eq_pterm ptindx="FB7_1_2"/><eq_pterm ptindx="FB7_1_3"/><eq_pterm ptindx="FB7_1_4"/><eq_pterm ptindx="FB7_1_5"/><eq_pterm import="1" ptindx="FB7_2_1"/><eq_pterm import="1" ptindx="FB7_2_2"/><eq_pterm import="1" ptindx="FB7_2_3"/><eq_pterm import="1" ptindx="FB7_2_4"/><eq_pterm import="1" ptindx="FB7_2_5"/><eq_pterm import="1" ptindx="FB7_18_1"/><eq_pterm import="1" ptindx="FB7_18_2"/><eq_pterm import="1" ptindx="FB7_18_3"/><eq_pterm import="1" ptindx="FB7_18_4"/><eq_pterm import="1" ptindx="FB7_18_5"/><eq_pterm import="1" ptindx="FB7_17_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="RA1_SPECSIG" userloc="P50"><d2><eq_pterm import="1" ptindx="FB7_3_4"/><eq_pterm import="1" ptindx="FB7_3_5"/></d2></equation><equation id="TimeoutB" regUse="T"><d2><eq_pterm ptindx="FB7_3_1"/><eq_pterm ptindx="FB7_3_2"/><eq_pterm ptindx="FB7_3_3"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="fsbReady0r_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB7_4_1"/><eq_pterm ptindx="FB7_4_2"/><eq_pterm ptindx="FB7_4_3"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="RA7_SPECSIG" userloc="P52"><d2><eq_pterm ptindx="FB7_5_1"/><eq_pterm ptindx="FB7_5_2"/></d2></equation><equation id="RA0_SPECSIG" userloc="P53"><d2><eq_pterm ptindx="FB7_6_1"/><eq_pterm ptindx="FB7_6_2"/></d2></equation><equation id="ramRS_FSM_FFd1_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB7_7_1"/><eq_pterm ptindx="FB7_7_2"/><eq_pterm ptindx="FB7_7_3"/><eq_pterm ptindx="FB7_7_4"/><eq_pterm ptindx="FB7_7_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="RA8_SPECSIG" userloc="P54"><d2><eq_pterm ptindx="FB7_8_1"/><eq_pterm ptindx="FB7_8_2"/><eq_pterm ptindx="FB7_8_3"/><eq_pterm ptindx="FB7_8_4"/><eq_pterm ptindx="FB7_8_5"/><eq_pterm import="1" ptindx="FB7_9_2"/><eq_pterm import="1" ptindx="FB7_9_3"/></d2></equation><equation id="RA10_SPECSIG" userloc="P55"><d2><eq_pterm ptindx="FB7_9_1"/></d2></equation><equation id="OpTxOpTxFX_DC182_INV783_SPECSIG"><d2><eq_pterm ptindx="FB7_10_1"/><eq_pterm ptindx="FB7_10_2"/><eq_pterm ptindx="FB7_10_3"/><eq_pterm ptindx="FB7_10_4"/><eq_pterm ptindx="FB7_10_5"/><eq_pterm import="1" ptindx="FB7_11_3"/></d2></equation><equation id="RA9_SPECSIG" userloc="P56"><d2><eq_pterm ptindx="FB7_11_1"/><eq_pterm ptindx="FB7_11_2"/></d2></equation><equation id="CLK25EN" userloc="P58"><d2><eq_pterm ptindx="FB7_12_1"/></d2></equation><equation id="ramRS_FSM_FFd3_SPECSIG" negated="ON" regUse="T"><d2><eq_pterm ptindx="FB7_13_1"/><eq_pterm ptindx="FB7_13_2"/><eq_pterm ptindx="FB7_13_3"/><eq_pterm ptindx="FB7_13_4"/><eq_pterm ptindx="FB7_13_5"/><eq_pterm import="1" ptindx="FB7_12_2"/><eq_pterm import="1" ptindx="FB7_12_3"/><eq_pterm import="1" ptindx="FB7_12_4"/><eq_pterm import="1" ptindx="FB7_12_5"/><eq_pterm import="1" ptindx="FB7_14_2"/><eq_pterm import="1" ptindx="FB7_14_3"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="CLK20EN" userloc="P59"><d2><eq_pterm ptindx="FB7_14_1"/></d2></equation><equation id="ramRS_FSM_FFd2_SPECSIG" negated="ON" regUse="T"><d2><eq_pterm ptindx="FB7_17_1"/><eq_pterm ptindx="FB7_17_2"/><eq_pterm ptindx="FB7_17_3"/><eq_pterm ptindx="FB7_17_4"/><eq_pterm import="1" ptindx="FB7_16_1"/><eq_pterm import="1" ptindx="FB7_16_2"/><eq_pterm import="1" ptindx="FB7_16_3"/><eq_pterm import="1" ptindx="FB7_16_4"/><eq_pterm import="1" ptindx="FB7_16_5"/><eq_pterm import="1" ptindx="FB7_15_1"/><eq_pterm import="1" ptindx="FB7_15_2"/><eq_pterm import="1" ptindx="FB7_15_3"/><eq_pterm import="1" ptindx="FB7_15_4"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation></fblock><fblock id="FB8" inputUse="37" pinUse="7"><macrocell id="FB8_MC1"><pterms pt1="FB8_1_1" pt2="FB8_1_2" pt3="FB8_1_3" pt4="FB8_1_4" pt5="FB8_1_5"/></macrocell><macrocell id="FB8_MC2" pin="FB8_MC2_PIN63" sigUse="1" signal="RA11_SPECSIG"><pterms pt1="FB8_2_1" pt2="FB8_2_2" pt3="FB8_2_3" pt4="FB8_2_4" pt5="FB8_2_5"/></macrocell><macrocell id="FB8_MC3"><pterms pt1="FB8_3_1" pt2="FB8_3_2" pt3="FB8_3_3" pt4="FB8_3_4" pt5="FB8_3_5"/></macrocell><macrocell id="FB8_MC4" sigUse="20" signal="iobsPS_FSM_FFd2_SPECSIG"><pterms pt1="FB8_4_1" pt2="FB8_4_2" pt3="FB8_4_3" pt4="FB8_4_4" pt5="FB8_4_5"/></macrocell><macrocell id="FB8_MC5" pin="FB8_MC5_PIN64" sigUse="8" signal="nRAS"><pterms pt1="FB8_5_1" pt2="FB8_5_2" pt3="FB8_5_3" pt4="FB8_5_4" pt5="FB8_5_5"/></macrocell><macrocell id="FB8_MC6" pin="FB8_MC6_PIN65" sigUse="5" signal="nRAMLWE"><pterms pt1="FB8_6_1" pt2="FB8_6_2" pt3="FB8_6_3" pt4="FB8_6_4"/></macrocell><macrocell id="FB8_MC7" sigUse="3" signal="RESDone"><pterms pt1="FB8_7_1" pt2="FB8_7_2"/></macrocell><macrocell id="FB8_MC8" pin="FB8_MC8_PIN66" sigUse="5" signal="nRAMUWE"><pterms pt1="FB8_8_1" pt2="FB8_8_2" pt3="FB8_8_3" pt4="FB8_8_4" pt5="FB8_8_5"/></macrocell><macrocell id="FB8_MC9" pin="FB8_MC9_PIN67" sigUse="20" signal="IOREQ"><pterms pt1="FB8_9_1" pt2="FB8_9_2" pt3="FB8_9_3" pt4="FB8_9_4" pt5="FB8_9_5"/></macrocell><macrocell id="FB8_MC10"><pterms pt1="FB8_10_1" pt2="FB8_10_2" pt3="FB8_10_3" pt4="FB8_10_4" pt5="FB8_10_5"/></macrocell><macrocell id="FB8_MC11" pin="FB8_MC11_PIN68"><pterms pt1="FB8_11_1" pt2="FB8_11_2"/></macrocell><macrocell id="FB8_MC12" pin="FB8_MC12_PIN70" sigUse="9" signal="nBERR_FSB"><pterms pt1="FB8_12_1" pt2="FB8_12_2" pt3="FB8_12_3" pt4="FB8_12_4" pt5="FB8_12_5"/></macrocell><macrocell id="FB8_MC13"><pterms pt1="FB8_13_1" pt2="FB8_13_2" pt3="FB8_13_3" pt4="FB8_13_4" pt5="FB8_13_5"/></macrocell><macrocell id="FB8_MC14" pin="FB8_MC14_PIN71" sigUse="19" signal="iobsOnce_SPECSIG"><pterms pt1="FB8_14_1" pt2="FB8_14_2" pt3="FB8_14_3" pt4="FB8_14_4" pt5="FB8_14_5"/></macrocell><macrocell id="FB8_MC15" pin="FB8_MC15_PIN72" sigUse="6" signal="nBR_IOB"><pterms pt1="FB8_15_1" pt2="FB8_15_2" pt3="FB8_15_3" pt4="FB8_15_4" pt5="FB8_15_5"/></macrocell><macrocell id="FB8_MC16" sigUse="8" signal="fsbBERR0r_SPECSIG"><pterms pt1="FB8_16_1" pt2="FB8_16_2" pt3="FB8_16_3"/></macrocell><macrocell id="FB8_MC17" pin="FB8_MC17_PIN73"><pterms pt1="FB8_17_1" pt2="FB8_17_2" pt3="FB8_17_3" pt4="FB8_17_4" pt5="FB8_17_5"/></macrocell><macrocell id="FB8_MC18" sigUse="21" signal="IORW0"><pterms pt1="FB8_18_1" pt2="FB8_18_2" pt3="FB8_18_3" pt4="FB8_18_4" pt5="FB8_18_5"/></macrocell><fbinput id="FB8_I1" signal="A_FSB13_SPECSIG"/><fbinput id="FB8_I2" signal="A_FSB14_SPECSIG"/><fbinput id="FB8_I3" signal="A_FSB16_SPECSIG"/><fbinput id="FB8_I4" signal="A_FSB17_SPECSIG"/><fbinput id="FB8_I5" signal="A_FSB18_SPECSIG"/><fbinput id="FB8_I6" signal="A_FSB19_SPECSIG"/><fbinput id="FB8_I7" signal="A_FSB20_SPECSIG"/><fbinput id="FB8_I8" signal="A_FSB21_SPECSIG"/><fbinput id="FB8_I9" signal="A_FSB22_SPECSIG"/><fbinput id="FB8_I10" signal="A_FSB23_SPECSIG"/><fbinput id="FB8_I11" signal="BERR_IOBS"/><fbinput id="FB8_I12" signal="IORW0"/><fbinput id="FB8_I13" signal="IPL2r0"/><fbinput id="FB8_I14" signal="IPL2r1"/><fbinput id="FB8_I15" signal="RESDone"/><fbinput id="FB8_I16" signal="RESr0"/><fbinput id="FB8_I17" signal="RESr1"/><fbinput id="FB8_I18" signal="RESr2"/><fbinput id="FB8_I19" signal="RefAck"/><fbinput id="FB8_I20" signal="SW1_SPECSIG"/><fbinput id="FB8_I21" signal="TimeoutB"/><fbinput id="FB8_I22" signal="csnOverlay1_SPECSIG"/><fbinput id="FB8_I23" signal="fsbASrf_SPECSIG"/><fbinput id="FB8_I24" signal="fsbBERR0r_SPECSIG"/><fbinput id="FB8_I25" signal="fsbBERR1r_SPECSIG"/><fbinput id="FB8_I26" signal="iobsIOACTr_SPECSIG"/><fbinput id="FB8_I27" signal="iobsIORW1_SPECSIG"/><fbinput id="FB8_I28" signal="iobsOnce_SPECSIG"/><fbinput id="FB8_I29" signal="iobsPS_FSM_FFd1_SPECSIG"/><fbinput id="FB8_I30" signal="iobsPS_FSM_FFd2_SPECSIG"/><fbinput id="FB8_I31" signal="nADoutLE1"/><fbinput id="FB8_I32" signal="nAS_FSB"/><fbinput id="FB8_I33" signal="nLDS_FSB"/><fbinput id="FB8_I34" signal="nUDS_FSB"/><fbinput id="FB8_I35" signal="nWE_FSB"/><fbinput id="FB8_I36" signal="ramRAMDIS1_SPECSIG"/><fbinput id="FB8_I37" signal="ramRAMDIS2_SPECSIG"/><pterm id="FB8_1_1"><signal id="IORW0"/><signal id="iobsIORW1_SPECSIG"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB8_1_2"><signal id="IORW0" negated="ON"/><signal id="iobsIORW1_SPECSIG" negated="ON"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB8_1_3"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_1_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_1_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="IORW0" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_2_1"><signal id="A_FSB19_SPECSIG"/></pterm><pterm id="FB8_2_2"><signal id="iobsPS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB8_2_3"><signal id="iobsPS_FSM_FFd1_SPECSIG"/></pterm><pterm id="FB8_2_4"><signal id="iobsOnce_SPECSIG"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_2_5"><signal id="IORW0"/><signal id="nWE_FSB"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_3_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_3_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_3_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB19_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_3_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB17_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_3_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB16_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_4_1"><signal id="iobsPS_FSM_FFd2_SPECSIG"/><signal id="iobsPS_FSM_FFd1_SPECSIG"/><signal id="iobsIOACTr_SPECSIG"/></pterm><pterm id="FB8_4_2"><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG"/><signal id="iobsIOACTr_SPECSIG" negated="ON"/></pterm><pterm id="FB8_4_3"><signal id="iobsOnce_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_4_4"><signal id="nAS_FSB"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_4_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_5_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB18_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_5_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="nWE_FSB"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_5_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="SW1_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_5_4"><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_5_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_6_1"><signal id="nWE_FSB" negated="ON"/><signal id="nLDS_FSB" negated="ON"/><signal id="ramRAMDIS2_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRAMDIS1_SPECSIG" negated="ON"/></pterm><pterm id="FB8_6_2"><signal id="RefAck"/></pterm><pterm id="FB8_6_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/><signal id="ramRAMDIS2_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRAMDIS1_SPECSIG" negated="ON"/></pterm><pterm id="FB8_6_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="ramRAMDIS2_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRAMDIS1_SPECSIG" negated="ON"/></pterm><pterm id="FB8_7_1"><signal id="RESr0" negated="ON"/><signal id="RESr1" negated="ON"/><signal id="RESr2"/></pterm><pterm id="FB8_7_2"><signal id="nWE_FSB" negated="ON"/><signal id="nUDS_FSB" negated="ON"/><signal id="ramRAMDIS2_SPECSIG" negated="ON"/><signal id="nAS_FSB" negated="ON"/><signal id="ramRAMDIS1_SPECSIG" negated="ON"/></pterm><pterm id="FB8_8_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_8_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_8_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB19_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_8_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB17_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_8_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB16_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_9_1"><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG"/></pterm><pterm id="FB8_9_2"><signal id="iobsPS_FSM_FFd1_SPECSIG"/><signal id="iobsIOACTr_SPECSIG"/></pterm><pterm id="FB8_9_3"><signal id="iobsOnce_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_9_4"><signal id="nAS_FSB"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="fsbASrf_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_9_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_10_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB18_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_10_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="nWE_FSB"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_10_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="SW1_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_10_4"><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_10_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="iobsPS_FSM_FFd2_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_11_1"><signal id="BERR_IOBS" negated="ON"/><signal id="TimeoutB" negated="ON"/><signal id="fsbBERR0r_SPECSIG" negated="ON"/><signal id="fsbBERR1r_SPECSIG" negated="ON"/></pterm><pterm id="FB8_11_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG"/><signal id="BERR_IOBS" negated="ON"/><signal id="fsbBERR0r_SPECSIG" negated="ON"/><signal id="fsbBERR1r_SPECSIG" negated="ON"/></pterm><pterm id="FB8_12_1"><signal id="nAS_FSB"/></pterm><pterm id="FB8_12_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="nWE_FSB"/></pterm><pterm id="FB8_12_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="SW1_SPECSIG"/></pterm><pterm id="FB8_12_4"><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/></pterm><pterm id="FB8_12_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG"/></pterm><pterm id="FB8_13_1"><signal id="A_FSB23_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG"/></pterm><pterm id="FB8_13_2"><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB8_13_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/></pterm><pterm id="FB8_13_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/></pterm><pterm id="FB8_13_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/></pterm><pterm id="FB8_14_1"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB8_14_2"><signal id="A_FSB23_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB8_14_3"><signal id="A_FSB22_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG"/></pterm><pterm id="FB8_14_4"><signal id="A_FSB22_SPECSIG"/><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd1_SPECSIG"/></pterm><pterm id="FB8_14_5"><signal id="iobsOnce_SPECSIG" negated="ON"/><signal id="iobsPS_FSM_FFd2_SPECSIG"/><signal id="nADoutLE1" negated="ON"/></pterm><pterm id="FB8_15_1"><signal id="RESr0"/><signal id="RESr1"/><signal id="IPL2r0"/><signal id="RESr2"/><signal id="RESDone" negated="ON"/><signal id="IPL2r1"/></pterm><pterm id="FB8_15_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB19_SPECSIG" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/></pterm><pterm id="FB8_15_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB18_SPECSIG" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/></pterm><pterm id="FB8_15_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB17_SPECSIG" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/></pterm><pterm id="FB8_15_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB16_SPECSIG" negated="ON"/><signal id="iobsOnce_SPECSIG" negated="ON"/></pterm><pterm id="FB8_16_1"><signal id="TimeoutB" negated="ON"/><signal id="fsbBERR0r_SPECSIG" negated="ON"/></pterm><pterm id="FB8_16_2"><signal id="nAS_FSB"/><signal id="fsbASrf_SPECSIG" negated="ON"/></pterm><pterm id="FB8_16_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG"/><signal id="fsbBERR0r_SPECSIG" negated="ON"/></pterm><pterm id="FB8_17_1"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB19_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_17_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB18_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_17_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB17_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_17_4"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB16_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_17_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="SW1_SPECSIG"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_18_1"><signal id="IORW0" negated="ON"/><signal id="nWE_FSB" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_18_2"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG" negated="ON"/><signal id="csnOverlay1_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_18_3"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="A_FSB20_SPECSIG" negated="ON"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_18_4"><signal id="A_FSB14_SPECSIG" negated="ON"/><signal id="A_FSB13_SPECSIG" negated="ON"/><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB21_SPECSIG"/><signal id="nADoutLE1"/></pterm><pterm id="FB8_18_5"><signal id="A_FSB23_SPECSIG" negated="ON"/><signal id="A_FSB22_SPECSIG"/><signal id="A_FSB21_SPECSIG"/><signal id="csnOverlay1_SPECSIG"/><signal id="nADoutLE1"/></pterm><equation id="RA11_SPECSIG" userloc="P63"><d2><eq_pterm ptindx="FB8_2_1"/></d2></equation><equation id="iobsPS_FSM_FFd2_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB8_4_1"/><eq_pterm ptindx="FB8_4_2"/><eq_pterm ptindx="FB8_4_3"/><eq_pterm ptindx="FB8_4_4"/><eq_pterm ptindx="FB8_4_5"/><eq_pterm import="1" ptindx="FB8_3_1"/><eq_pterm import="1" ptindx="FB8_3_2"/><eq_pterm import="1" ptindx="FB8_3_3"/><eq_pterm import="1" ptindx="FB8_3_4"/><eq_pterm import="1" ptindx="FB8_3_5"/><eq_pterm import="1" ptindx="FB8_5_1"/><eq_pterm import="1" ptindx="FB8_5_2"/><eq_pterm import="1" ptindx="FB8_5_3"/><eq_pterm import="1" ptindx="FB8_5_4"/><eq_pterm import="1" ptindx="FB8_5_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="nRAS" negated="ON" userloc="P64"><d2><eq_pterm import="1" ptindx="FB8_6_2"/><eq_pterm import="1" ptindx="FB8_6_3"/><eq_pterm import="1" ptindx="FB8_6_4"/></d2></equation><equation id="nRAMLWE" negated="ON" userloc="P65"><d2><eq_pterm ptindx="FB8_6_1"/></d2></equation><equation id="RESDone" regUse="D"><d2><eq_pterm ptindx="VCC"/></d2><clk><fastsig signal="CLK_FSB"/></clk><ce><eq_pterm ptindx="FB8_7_1"/></ce><prld ptindx="GND"/></equation><equation id="nRAMUWE" negated="ON" userloc="P66"><d2><eq_pterm import="1" ptindx="FB8_7_2"/></d2></equation><equation id="IOREQ" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB8_9_1"/><eq_pterm ptindx="FB8_9_2"/><eq_pterm ptindx="FB8_9_3"/><eq_pterm ptindx="FB8_9_4"/><eq_pterm ptindx="FB8_9_5"/><eq_pterm import="1" ptindx="FB8_8_1"/><eq_pterm import="1" ptindx="FB8_8_2"/><eq_pterm import="1" ptindx="FB8_8_3"/><eq_pterm import="1" ptindx="FB8_8_4"/><eq_pterm import="1" ptindx="FB8_8_5"/><eq_pterm import="1" ptindx="FB8_10_1"/><eq_pterm import="1" ptindx="FB8_10_2"/><eq_pterm import="1" ptindx="FB8_10_3"/><eq_pterm import="1" ptindx="FB8_10_4"/><eq_pterm import="1" ptindx="FB8_10_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="nBERR_FSB" userloc="P70"><d2><eq_pterm ptindx="FB8_12_1"/><eq_pterm import="1" ptindx="FB8_11_1"/><eq_pterm import="1" ptindx="FB8_11_2"/></d2></equation><equation id="iobsOnce_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB8_14_1"/><eq_pterm ptindx="FB8_14_2"/><eq_pterm ptindx="FB8_14_3"/><eq_pterm ptindx="FB8_14_4"/><eq_pterm ptindx="FB8_14_5"/><eq_pterm import="1" ptindx="FB8_13_1"/><eq_pterm import="1" ptindx="FB8_13_2"/><eq_pterm import="1" ptindx="FB8_13_3"/><eq_pterm import="1" ptindx="FB8_13_4"/><eq_pterm import="1" ptindx="FB8_13_5"/><eq_pterm import="1" ptindx="FB8_12_2"/><eq_pterm import="1" ptindx="FB8_12_3"/><eq_pterm import="1" ptindx="FB8_12_4"/><eq_pterm import="1" ptindx="FB8_12_5"/><eq_pterm import="1" ptindx="FB8_15_2"/><eq_pterm import="1" ptindx="FB8_15_3"/><eq_pterm import="1" ptindx="FB8_15_4"/><eq_pterm import="1" ptindx="FB8_15_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="nBR_IOB" regUse="D" userloc="P72"><d2><eq_pterm ptindx="GND"/></d2><clk><fastsig signal="CLK_FSB"/></clk><ce><eq_pterm ptindx="FB8_15_1"/></ce><prld ptindx="VCC"/></equation><equation id="fsbBERR0r_SPECSIG" negated="ON" regUse="D"><d2><eq_pterm ptindx="FB8_16_1"/><eq_pterm ptindx="FB8_16_2"/><eq_pterm ptindx="FB8_16_3"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation><equation id="IORW0" negated="ON" regUse="T"><d2><eq_pterm ptindx="FB8_18_1"/><eq_pterm ptindx="FB8_18_2"/><eq_pterm ptindx="FB8_18_3"/><eq_pterm ptindx="FB8_18_4"/><eq_pterm ptindx="FB8_18_5"/><eq_pterm import="1" ptindx="FB8_1_1"/><eq_pterm import="1" ptindx="FB8_1_2"/><eq_pterm import="1" ptindx="FB8_1_3"/><eq_pterm import="1" ptindx="FB8_1_4"/><eq_pterm import="1" ptindx="FB8_1_5"/><eq_pterm import="1" ptindx="FB8_2_2"/><eq_pterm import="1" ptindx="FB8_2_3"/><eq_pterm import="1" ptindx="FB8_2_4"/><eq_pterm import="1" ptindx="FB8_2_5"/><eq_pterm import="1" ptindx="FB8_17_1"/><eq_pterm import="1" ptindx="FB8_17_2"/><eq_pterm import="1" ptindx="FB8_17_3"/><eq_pterm import="1" ptindx="FB8_17_4"/><eq_pterm import="1" ptindx="FB8_17_5"/></d2><clk><fastsig signal="CLK_FSB"/></clk><prld ptindx="GND"/></equation></fblock><vcc/><gnd/><messages><warning>Cpld - Unable to retrieve the path to the iSE Project Repository. Will   use the default filename of 'MXSE.ise'.INFO:Cpld - Inferring BUFG constraint for signal 'CLK2X_IOB' based upon the LOC   constraint 'P22'. It is recommended that you declare this BUFG explicitedly   in your design. Note that for certain device families the output of a BUFG   constraint can not drive a gated clock, and the BUFG constraint will be   ignored.INFO:Cpld - Inferring BUFG constraint for signal 'CLK_FSB' based upon the LOC   constraint 'P27'. It is recommended that you declare this BUFG explicitedly   in your design. Note that for certain device families the output of a BUFG   constraint can not drive a gated clock, and the BUFG constraint will be   ignored.INFO:Cpld - Inferring BUFG constraint for signal 'CLK_IOB' based upon the LOC   constraint 'P23'. It is recommended that you declare this BUFG explicitedly   in your design. Note that for certain device families the output of a BUFG   constraint can not drive a gated clock, and the BUFG constraint will be   ignored.</warning><warning>Cpld:1007 - Removing unused input(s) 'SW&lt;2&gt;'.  The input(s) are unused   after optimization. Please verify functionality via simulation.</warning></messages><compOpts exhaust="OFF" gclkopt="ON" gsropt="ON" gtsopt="ON" ignorets="OFF" inputs="54" keepio="OFF" loc="ON" mlopt="ON" optimize="SPEED" part="xc95144xl-10-TQ100" power="STD" prld="LOW" pterms="25" slew="FAST" terminate="KEEPER" unused="OFF" wysiwyg="OFF"/><specSig signal="A_FSB9_SPECSIG" value="A_FSB&lt;9&gt;"/><specSig signal="A_FSB8_SPECSIG" value="A_FSB&lt;8&gt;"/><specSig signal="A_FSB15_SPECSIG" value="A_FSB&lt;15&gt;"/><specSig signal="A_FSB14_SPECSIG" value="A_FSB&lt;14&gt;"/><specSig signal="A_FSB13_SPECSIG" value="A_FSB&lt;13&gt;"/><specSig signal="A_FSB12_SPECSIG" value="A_FSB&lt;12&gt;"/><specSig signal="A_FSB11_SPECSIG" value="A_FSB&lt;11&gt;"/><specSig signal="A_FSB10_SPECSIG" value="A_FSB&lt;10&gt;"/><specSig signal="A_FSB23_SPECSIG" value="A_FSB&lt;23&gt;"/><specSig signal="A_FSB22_SPECSIG" value="A_FSB&lt;22&gt;"/><specSig signal="A_FSB21_SPECSIG" value="A_FSB&lt;21&gt;"/><specSig signal="A_FSB20_SPECSIG" value="A_FSB&lt;20&gt;"/><specSig signal="A_FSB19_SPECSIG" value="A_FSB&lt;19&gt;"/><specSig signal="A_FSB18_SPECSIG" value="A_FSB&lt;18&gt;"/><specSig signal="A_FSB17_SPECSIG" value="A_FSB&lt;17&gt;"/><specSig signal="A_FSB16_SPECSIG" value="A_FSB&lt;16&gt;"/><specSig signal="SW1_SPECSIG" value="SW&lt;1&gt;"/><specSig signal="A_FSB1_SPECSIG" value="A_FSB&lt;1&gt;"/><specSig signal="A_FSB2_SPECSIG" value="A_FSB&lt;2&gt;"/><specSig signal="A_FSB3_SPECSIG" value="A_FSB&lt;3&gt;"/><specSig signal="A_FSB4_SPECSIG" value="A_FSB&lt;4&gt;"/><specSig signal="A_FSB5_SPECSIG" value="A_FSB&lt;5&gt;"/><specSig signal="A_FSB6_SPECSIG" value="A_FSB&lt;6&gt;"/><specSig signal="A_FSB7_SPECSIG" value="A_FSB&lt;7&gt;"/><specSig signal="SW0_SPECSIG" value="SW&lt;0&gt;"/><specSig signal="GCKI_SPECSIG" value="GCK/I"/><specSig signal="b_SPECSIG" value="(b)"/><specSig signal="ramRAMDIS1_SPECSIG" value="ram/RAMDIS1"/><specSig signal="RA4_SPECSIG" value="RA&lt;4&gt;"/><specSig signal="RA3_SPECSIG" value="RA&lt;3&gt;"/><specSig signal="RA5_SPECSIG" value="RA&lt;5&gt;"/><specSig signal="RA2_SPECSIG" value="RA&lt;2&gt;"/><specSig signal="RA6_SPECSIG" value="RA&lt;6&gt;"/><specSig signal="RA1_SPECSIG" value="RA&lt;1&gt;"/><specSig signal="RA7_SPECSIG" value="RA&lt;7&gt;"/><specSig signal="RA0_SPECSIG" value="RA&lt;0&gt;"/><specSig signal="RA8_SPECSIG" value="RA&lt;8&gt;"/><specSig signal="RA10_SPECSIG" value="RA&lt;10&gt;"/><specSig signal="RA9_SPECSIG" value="RA&lt;9&gt;"/><specSig signal="RA11_SPECSIG" value="RA&lt;11&gt;"/><specSig signal="iobsOnce_SPECSIG" value="iobs/Once"/><specSig signal="ramBACTr_SPECSIG" value="ram/BACTr"/><specSig signal="iobmRESrr_SPECSIG" value="iobm/RESrr"/><specSig signal="iobmRESrf_SPECSIG" value="iobm/RESrf"/><specSig signal="fsbASrf_SPECSIG" value="fsb/ASrf"/><specSig signal="cntRefCnt2_SPECSIG" value="cnt/RefCnt&lt;2&gt;"/><specSig signal="cntRefCnt1_SPECSIG" value="cnt/RefCnt&lt;1&gt;"/><specSig signal="OpTxFX_DC708_SPECSIG" value="$OpTx$FX_DC$708"/><specSig signal="iobsIOU1_SPECSIG" value="iobs/IOU1"/><specSig signal="iobsIOL1_SPECSIG" value="iobs/IOL1"/><specSig signal="iobmIOS_FSM_FFd1_SPECSIG" value="iobm/IOS_FSM_FFd1"/><specSig signal="cntRefCnt0_SPECSIG" value="cnt/RefCnt&lt;0&gt;"/><specSig signal="iobmIOS_FSM_FFd2_SPECSIG" value="iobm/IOS_FSM_FFd2"/><specSig signal="iobmIOS_FSM_FFd3_SPECSIG" value="iobm/IOS_FSM_FFd3"/><specSig signal="iobsLoad1_SPECSIG" value="iobs/Load1"/><specSig signal="iobsPS_FSM_FFd1_SPECSIG" value="iobs/PS_FSM_FFd1"/><specSig signal="iobsPS_FSM_FFd2_SPECSIG" value="iobs/PS_FSM_FFd2"/><specSig signal="ramRS_FSM_FFd1_SPECSIG" value="ram/RS_FSM_FFd1"/><specSig signal="ramRS_FSM_FFd2_SPECSIG" value="ram/RS_FSM_FFd2"/><specSig signal="iobsIOACTr_SPECSIG" value="iobs/IOACTr"/><specSig signal="iobmVPArr_SPECSIG" value="iobm/VPArr"/><specSig signal="iobmVPArf_SPECSIG" value="iobm/VPArf"/><specSig signal="iobmIOREQr_SPECSIG" value="iobm/IOREQr"/><specSig signal="iobmEr2_SPECSIG" value="iobm/Er2"/><specSig signal="iobmEr_SPECSIG" value="iobm/Er"/><specSig signal="iobmDTACKrr_SPECSIG" value="iobm/DTACKrr"/><specSig signal="iobmDTACKrf_SPECSIG" value="iobm/DTACKrf"/><specSig signal="iobmBGr1_SPECSIG" value="iobm/BGr1"/><specSig signal="iobmBGr0_SPECSIG" value="iobm/BGr0"/><specSig signal="iobmBERRrr_SPECSIG" value="iobm/BERRrr"/><specSig signal="iobmBERRrf_SPECSIG" value="iobm/BERRrf"/><specSig signal="fsbReady1r_SPECSIG" value="fsb/Ready1r"/><specSig signal="iobsIORW1_SPECSIG" value="iobs/IORW1"/><specSig signal="fsbReady2r_SPECSIG" value="fsb/Ready2r"/><specSig signal="fsbVPA_SPECSIG" value="fsb/VPA"/><specSig signal="iobsClear1_SPECSIG" value="iobs/Clear1"/><specSig signal="OpTxOpTxFX_DC182_INV783_SPECSIG" value="$OpTx$$OpTx$FX_DC$182_INV$783"/><specSig signal="csnOverlay1_SPECSIG" value="cs/nOverlay1"/><specSig signal="fsbBERR0r_SPECSIG" value="fsb/BERR0r"/><specSig signal="fsbBERR1r_SPECSIG" value="fsb/BERR1r"/><specSig signal="iobsIOReady_SPECSIG" value="iobs/IOReady"/><specSig signal="cntRefCnt6_SPECSIG" value="cnt/RefCnt&lt;6&gt;"/><specSig signal="cntRefCnt5_SPECSIG" value="cnt/RefCnt&lt;5&gt;"/><specSig signal="cntRefCnt4_SPECSIG" value="cnt/RefCnt&lt;4&gt;"/><specSig signal="cntRefCnt3_SPECSIG" value="cnt/RefCnt&lt;3&gt;"/><specSig signal="cntRefDone_SPECSIG" value="cnt/RefDone"/><specSig signal="csnOverlay0_SPECSIG" value="cs/nOverlay0"/><specSig signal="cntTimeoutBPre_SPECSIG" value="cnt/TimeoutBPre"/><specSig signal="cntRefCnt7_SPECSIG" value="cnt/RefCnt&lt;7&gt;"/><specSig signal="ramRASEL_SPECSIG" value="ram/RASEL"/><specSig signal="ramRAMDIS2_SPECSIG" value="ram/RAMDIS2"/><specSig signal="ramOnce_SPECSIG" value="ram/Once"/><specSig signal="ramRS_FSM_FFd3_SPECSIG" value="ram/RS_FSM_FFd3"/><specSig signal="iobmETACK_SPECSIG" value="iobm/ETACK"/><specSig signal="iobmES3_SPECSIG" value="iobm/ES&lt;3&gt;"/><specSig signal="iobmES1_SPECSIG" value="iobm/ES&lt;1&gt;"/><specSig signal="iobmES0_SPECSIG" value="iobm/ES&lt;0&gt;"/><specSig signal="iobmES4_SPECSIG" value="iobm/ES&lt;4&gt;"/><specSig signal="iobmES2_SPECSIG" value="iobm/ES&lt;2&gt;"/><specSig signal="ramRAMReady_SPECSIG" value="ram/RAMReady"/><specSig signal="fsbReady0r_SPECSIG" value="fsb/Ready0r"/></document>
diff --git a/cpld/XC95144XL/MXSE_build.xml b/cpld/XC95144XL/MXSE_build.xml
new file mode 100644
index 0000000..9e2c7fc
--- /dev/null
+++ b/cpld/XC95144XL/MXSE_build.xml
@@ -0,0 +1,235 @@
+<?xml version='1.0' encoding='utf-8' ?>
+<!DOCTYPE document SYSTEM 'file:///C:/Xilinx/14.7/ISE_DS/ISE/chipviewer/data/xsl/buildXML.dtd'>
+
+<document>
+<design name='MXSE'/>
+<rptdir name='MXSE'/>
+<xilinx path='C:/Xilinx/14.7/ISE_DS/ISE;'/>
+<projDir path='\\192.168.64.1\Repos\Warp-SE\cpld\XC95144XL'/>
+<xslDir path='chipviewer/data/xsl'/>
+<fileDir path='/chipviewer/data/html'/>
+<dataFile file='index.htm'/>
+<dataFile file='report.htm'/>
+<dataFile file='genmsg.htm'/>
+<dataFile file='eqns.js'/>
+<dataFile file='maplogic.js'/>
+<dataFile file='fbs.js'/>
+<dataFile file='pins.js'/>
+<dataFile file='tooltips.js'/>
+<dataFile file='errors.js'/>
+<dataFile file='leftnav.js'/>
+<dataFile file='paths.js'/>
+<dataFile file='summary.js'/>
+<dataFile file='topnav.js'/>
+<dataFile file='applet.js'/>
+<dataFile file='plugin.js'/>
+<dataFile file='ns4plugin.js'/>
+<dataFile file='equations.htm'/>
+<dataFile file='result.htm'/>
+<dataFile file='style.css'/>
+<dataFile file='blank.gif'/>
+<dataFile file='fbview.jpg'/>
+<dataFile file='pinview.jpg'/>
+<dataFile file='xc9500xl_logo.jpg'/>
+<dataFile file='asciidoc.htm'/>
+<dataFile file='equationsdoc.htm'/>
+<dataFile file='errorsdoc.htm'/>
+<dataFile file='failtabledoc.htm'/>
+<dataFile file='fbs_FBdoc.htm'/>
+<dataFile file='fbsdoc.htm'/>
+<dataFile file='inputleftdoc.htm'/>
+<dataFile file='logicleftdoc.htm'/>
+<dataFile file='mapinputdoc.htm'/>
+<dataFile file='maplogicdoc.htm'/>
+<dataFile file='optionsdoc.htm'/>
+<dataFile file='pinsdoc.htm'/>
+<dataFile file='summarydoc.htm'/>
+<dataFile file='check.htm'/>
+<dataFile file='checkNS4.htm'/>
+<dataFile file='appletref.htm'/>
+<dataFile file='newappletref.htm'/>
+<dataFile file='errors1.gif'/>
+<dataFile file='errors2.gif'/>
+<dataFile file='equations.gif'/>
+<dataFile file='functionblock.gif'/>
+<dataFile file='fb1.gif'/>
+<dataFile file='legend.gif'/>
+<dataFile file='macrocell.gif'/>
+<dataFile file='fb.gif'/>
+<dataFile file='pin.gif'/>
+<dataFile file='pindiagram.gif'/>
+<dataFile file='view.gif'/>
+<dataFile file='xml8.jpg'/>
+<dataFile file='xml7.jpg'/>
+<dataFile file='xml6.jpg'/>
+<dataFile file='xml5.jpg'/>
+<xmlFileGroup id='1'>
+<xmlFile file='MXSE.xml'>
+  <xslFile file='topnav.xsl'>
+    <output file='topnav.htm'/>
+  </xslFile>
+  <xslFile file='leftnav.xsl'>
+    <param name='result' value='1'/>
+    <output file='leftnav.htm'/>
+  </xslFile>
+  <xslFile file='print.xsl'>
+    <output file='ascii.tmp'/>
+  </xslFile>
+  <xslFile file='eqns.xsl'>
+    <output file='eqns.htm'/>
+  </xslFile>
+  <xslFile file='summary.xsl'>
+    <param name='sumOn' value='1'/>
+    <param name='optOn' value='0'/>
+    <param name='legendOn' value='0'/>
+    <output file='summary.htm'/>
+  </xslFile>
+</xmlFile>
+</xmlFileGroup>
+<xmlFileGroup id='2'>
+<xmlFile file='MXSE.xml'>
+  <xslFile file='summary.xsl'>
+    <param name='sumOn' value='0'/>
+    <param name='optOn' value='1'/>
+    <param name='legendOn' value='0'/>
+    <output file='options.htm'/>
+  </xslFile>
+  <xslFile file='printErrors.xsl'>
+    <output file='errs.htm'/>
+  </xslFile>
+  <xslFile file='failtable.xsl'>
+    <output file='failtable.htm'/>
+  </xslFile>
+  <xslFile file='logicleft.xsl'>
+    <output file='logicleft.htm'/>
+  </xslFile>
+  <xslFile file='inputleft.xsl'>
+    <output file='inputleft.htm'/>
+  </xslFile>
+  <xslFile file='printPins.xsl'>
+    <output file='pins.htm'/>
+  </xslFile>
+  <xslFile file='wait.xsl'>
+    <output file='wait.htm'/>
+  </xslFile>
+  <xslDebug file='printErrors.xsl'>
+    <output file='errors.htm'/>
+  </xslDebug>
+  <xslDebug file='printPins.xsl'>
+    <output file='pinout.htm'/>
+  </xslDebug>
+  <xslDebug file='printEqns.xsl'>
+    <output file='eqnout.htm'/>
+  </xslDebug>
+  <xslFile file='maplogic.xsl'>
+    <param name='sortType' value='0'/>
+    <param name='mapLog' value='1'/>
+    <param name='mapIn' value='0'/>
+    <param name='unmapLog' value='0'/>
+    <param name='unmapIn' value='0'/>
+    <param name='legendOn' value='1'/>
+    <output file='maplogic_00.htm'/>
+    <param name='sortType' value='1'/>
+    <param name='mapLog' value='1'/>
+    <param name='mapIn' value='0'/>
+    <param name='unmapLog' value='0'/>
+    <param name='unmapIn' value='0'/>
+    <param name='legendOn' value='1'/>
+    <output file='maplogic_01.htm'/>
+    <param name='sortType' value='2'/>
+    <param name='mapLog' value='1'/>
+    <param name='mapIn' value='0'/>
+    <param name='unmapLog' value='0'/>
+    <param name='unmapIn' value='0'/>
+    <param name='legendOn' value='1'/>
+    <output file='maplogic_02.htm'/>
+    <param name='sortType' value='0'/>
+    <param name='mapLog' value='0'/>
+    <param name='mapIn' value='1'/>
+    <param name='unmapLog' value='0'/>
+    <param name='unmapIn' value='0'/>
+    <param name='legendOn' value='1'/>
+    <output file='mapinput_00.htm'/>
+    <param name='sortType' value='1'/>
+    <param name='mapLog' value='0'/>
+    <param name='mapIn' value='1'/>
+    <param name='unmapLog' value='0'/>
+    <param name='unmapIn' value='0'/>
+    <param name='legendOn' value='1'/>
+    <output file='mapinput_01.htm'/>
+    <param name='sortType' value='2'/>
+    <param name='mapLog' value='0'/>
+    <param name='mapIn' value='1'/>
+    <param name='unmapLog' value='0'/>
+    <param name='unmapIn' value='0'/>
+    <param name='legendOn' value='1'/>
+    <output file='mapinput_02.htm'/>
+  </xslFile>
+  <xslFile file='fbsum.xsl'>
+    <param name='legendOn' value='0'/>
+    <output file='fbs.htm'/>
+  </xslFile>
+  <xslFile file='fbs.xsl'>
+    <param name='fb' value='FB1'/>
+    <param name='type' value='1'/>
+    <param name='legendOn' value='1'/>
+    <output file='fbs_FB1.htm'/>
+    <param name='fb' value='FB2'/>
+    <param name='type' value='3'/>
+    <param name='legendOn' value='1'/>
+    <output file='fbs_FB2.htm'/>
+    <param name='fb' value='FB3'/>
+    <param name='type' value='3'/>
+    <param name='legendOn' value='1'/>
+    <output file='fbs_FB3.htm'/>
+    <param name='fb' value='FB4'/>
+    <param name='type' value='3'/>
+    <param name='legendOn' value='1'/>
+    <output file='fbs_FB4.htm'/>
+    <param name='fb' value='FB5'/>
+    <param name='type' value='3'/>
+    <param name='legendOn' value='1'/>
+    <output file='fbs_FB5.htm'/>
+    <param name='fb' value='FB6'/>
+    <param name='type' value='3'/>
+    <param name='legendOn' value='1'/>
+    <output file='fbs_FB6.htm'/>
+    <param name='fb' value='FB7'/>
+    <param name='type' value='3'/>
+    <param name='legendOn' value='1'/>
+    <output file='fbs_FB7.htm'/>
+    <param name='fb' value='FB8'/>
+    <param name='type' value='2'/>
+    <param name='legendOn' value='1'/>
+    <output file='fbs_FB8.htm'/>
+  </xslFile>
+</xmlFile>
+<xmlFile file='C:/Xilinx/14.7/ISE_DS/ISE/chipviewer/data/xsl/pinlegend.xml'>
+  <xslFile file='legend.xsl'>
+    <param name='device' value='XC95144XL-10-TQ100'/>
+    <param name='verOn' value='0'/>
+    <param name='linkName' value='pinlegendV.htm'/>
+    <output file='pinlegend.htm'/>
+    <param name='device' value='XC95144XL-10-TQ100'/>
+    <param name='verOn' value='1'/>
+    <param name='linkName' value='pinlegend.htm'/>
+    <output file='pinlegendV.htm'/>
+  </xslFile>
+</xmlFile>
+<xmlFile file='C:/Xilinx/14.7/ISE_DS/ISE/chipviewer/data/xsl/logiclegend.xml'>
+  <xslFile file='legend.xsl'>
+    <param name='device' value='XC95144XL-10-TQ100'/>
+    <param name='verOn' value='0'/>
+    <param name='linkName' value='logiclegendV.htm'/>
+    <output file='logiclegend.htm'/>
+    <param name='device' value='XC95144XL-10-TQ100'/>
+    <param name='verOn' value='1'/>
+    <param name='linkName' value='logiclegend.htm'/>
+    <output file='logiclegendV.htm'/>
+  </xslFile>
+</xmlFile>
+</xmlFileGroup>
+<rptFile file='MXSE.rpt'/>
+<timFile file='MXSE.tim'/>
+<appFile/>
+</document>
diff --git a/cpld/XC95144XL/MXSE_envsettings 2.html b/cpld/XC95144XL/MXSE_envsettings 2.html
deleted file mode 100644
index 7fa20b0..0000000
--- a/cpld/XC95144XL/MXSE_envsettings 2.html	
+++ /dev/null
@@ -1,244 +0,0 @@
-<HTML><HEAD><TITLE>Xilinx System Settings Report</TITLE></HEAD>
-<BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>
-<center><big><big><b>System Settings</b></big></big></center><br>
-<A NAME="Environment Settings"></A>
-&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
-<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
-<TD ALIGN=CENTER COLSPAN='3'><B> Environment Settings </B></TD>
-</tr>
-<tr bgcolor='#ffff99'>
-<td><b>Environment Variable</b></td>
-<td><b>xst</b></td>
-<td><b>ngdbuild</b></td>
-</tr>
-<tr>
-<td>PATHEXT</td>
-<td>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</td>
-<td>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</td>
-</tr>
-<tr>
-<td>Path</td>
-<td>C:\Xilinx\14.7\ISE_DS\ISE\\lib\nt;<br>C:\Xilinx\14.7\ISE_DS\ISE\\bin\nt;<br>C:\Xilinx\14.7\ISE_DS\ISE\bin\nt;<br>C:\Xilinx\14.7\ISE_DS\ISE\lib\nt;<br>C:\Xilinx\14.7\ISE_DS\ISE\..\..\..\DocNav;<br>C:\Xilinx\14.7\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\bin\nt;<br>C:\Xilinx\14.7\ISE_DS\EDK\lib\nt;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\arm\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt_be\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt_le\bin;<br>C:\Xilinx\14.7\ISE_DS\common\bin\nt;<br>C:\Xilinx\14.7\ISE_DS\common\lib\nt;<br>C:\Program Files (x86)\Common Files\Oracle\Java\javapath;<br>C:\ispLEVER_Classic2_0\ispcpld\bin;<br>C:\ispLEVER_Classic2_0\ispFPGA\bin\nt;<br>C:\ispLEVER_Classic2_0\active-hdl\BIN;<br>C:\WinAVR-20100110\bin;<br>C:\WinAVR-20100110\utils\bin;<br>C:\Windows\system32;<br>C:\Windows;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Windows\System32\OpenSSH\;<br>C:\Program Files\Microchip\xc8\v2.31\bin;<br>C:\Program Files (x86)\NVIDIA Corporation\PhysX\Common;<br>C:\Program Files\PuTTY\;<br>C:\Program Files\WinMerge;<br>C:\Program Files\dotnet\;<br>C:\Users\zanek\AppData\Local\Microsoft\WindowsApps;<br>C:\Users\zanek\AppData\Local\GitHubDesktop\bin;<br>C:\altera\13.0sp1\modelsim_ase\win32aloem;<br>C:\Users\zanek\.dotnet\tools;<br>C:\Program Files (x86)\Skyworks\ClockBuilder Pro\Bin</td>
-<td>C:\Xilinx\14.7\ISE_DS\ISE\\lib\nt;<br>C:\Xilinx\14.7\ISE_DS\ISE\\bin\nt;<br>C:\Xilinx\14.7\ISE_DS\ISE\bin\nt;<br>C:\Xilinx\14.7\ISE_DS\ISE\lib\nt;<br>C:\Xilinx\14.7\ISE_DS\ISE\..\..\..\DocNav;<br>C:\Xilinx\14.7\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\bin\nt;<br>C:\Xilinx\14.7\ISE_DS\EDK\lib\nt;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\arm\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt_be\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt_le\bin;<br>C:\Xilinx\14.7\ISE_DS\common\bin\nt;<br>C:\Xilinx\14.7\ISE_DS\common\lib\nt;<br>C:\Program Files (x86)\Common Files\Oracle\Java\javapath;<br>C:\ispLEVER_Classic2_0\ispcpld\bin;<br>C:\ispLEVER_Classic2_0\ispFPGA\bin\nt;<br>C:\ispLEVER_Classic2_0\active-hdl\BIN;<br>C:\WinAVR-20100110\bin;<br>C:\WinAVR-20100110\utils\bin;<br>C:\Windows\system32;<br>C:\Windows;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Windows\System32\OpenSSH\;<br>C:\Program Files\Microchip\xc8\v2.31\bin;<br>C:\Program Files (x86)\NVIDIA Corporation\PhysX\Common;<br>C:\Program Files\PuTTY\;<br>C:\Program Files\WinMerge;<br>C:\Program Files\dotnet\;<br>C:\Users\zanek\AppData\Local\Microsoft\WindowsApps;<br>C:\Users\zanek\AppData\Local\GitHubDesktop\bin;<br>C:\altera\13.0sp1\modelsim_ase\win32aloem;<br>C:\Users\zanek\.dotnet\tools;<br>C:\Program Files (x86)\Skyworks\ClockBuilder Pro\Bin</td>
-</tr>
-<tr>
-<td>XILINX</td>
-<td>C:\Xilinx\14.7\ISE_DS\ISE\</td>
-<td>C:\Xilinx\14.7\ISE_DS\ISE\</td>
-</tr>
-<tr>
-<td>XILINX_DSP</td>
-<td>C:\Xilinx\14.7\ISE_DS\ISE</td>
-<td>C:\Xilinx\14.7\ISE_DS\ISE</td>
-</tr>
-<tr>
-<td>XILINX_EDK</td>
-<td>C:\Xilinx\14.7\ISE_DS\EDK</td>
-<td>C:\Xilinx\14.7\ISE_DS\EDK</td>
-</tr>
-<tr>
-<td>XILINX_PLANAHEAD</td>
-<td>C:\Xilinx\14.7\ISE_DS\PlanAhead</td>
-<td>C:\Xilinx\14.7\ISE_DS\PlanAhead</td>
-</tr>
-</TABLE>
-<A NAME="Synthesis Property Settings"></A>
-&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
-<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
-<TD ALIGN=CENTER COLSPAN='4'><B>Synthesis Property Settings </B></TD>
-</tr>
-<tr bgcolor='#ffff99'>
-<td><b>Switch Name</b></td>
-<td><b>Property Name</b></td>
-<td><b>Value</b></td>
-<td><b>Default Value</b></td>
-</tr>
-<tr>
-<td>-ifn</td>
-<td>&nbsp;</td>
-<td>MXSE.prj</td>
-<td>&nbsp;</td>
-</tr>
-<tr>
-<td>-ifmt</td>
-<td>&nbsp;</td>
-<td>mixed</td>
-<td>MIXED</td>
-</tr>
-<tr>
-<td>-ofn</td>
-<td>&nbsp;</td>
-<td>MXSE</td>
-<td>&nbsp;</td>
-</tr>
-<tr>
-<td>-ofmt</td>
-<td>&nbsp;</td>
-<td>NGC</td>
-<td>NGC</td>
-</tr>
-<tr>
-<td>-p</td>
-<td>&nbsp;</td>
-<td>xc9500xl</td>
-<td>&nbsp;</td>
-</tr>
-<tr>
-<td>-top</td>
-<td>&nbsp;</td>
-<td>MXSE</td>
-<td>&nbsp;</td>
-</tr>
-<tr>
-<td>-opt_mode</td>
-<td>Optimization Goal</td>
-<td>Speed</td>
-<td>SPEED</td>
-</tr>
-<tr>
-<td>-opt_level</td>
-<td>Optimization Effort</td>
-<td>1</td>
-<td>1</td>
-</tr>
-<tr>
-<td>-iuc</td>
-<td>Use synthesis Constraints File</td>
-<td>NO</td>
-<td>NO</td>
-</tr>
-<tr>
-<td>-keep_hierarchy</td>
-<td>Keep Hierarchy</td>
-<td>Yes</td>
-<td>YES</td>
-</tr>
-<tr>
-<td>-netlist_hierarchy</td>
-<td>Netlist Hierarchy</td>
-<td>As_Optimized</td>
-<td>as_optimized</td>
-</tr>
-<tr>
-<td>-rtlview</td>
-<td>Generate RTL Schematic</td>
-<td>Yes</td>
-<td>NO</td>
-</tr>
-<tr>
-<td>-bus_delimiter</td>
-<td>Bus Delimiter</td>
-<td>&lt;&gt;</td>
-<td>&lt;&gt;</td>
-</tr>
-<tr>
-<td>-verilog2001</td>
-<td>Verilog 2001</td>
-<td>YES</td>
-<td>YES</td>
-</tr>
-<tr>
-<td>-fsm_extract</td>
-<td>&nbsp;</td>
-<td>YES</td>
-<td>YES</td>
-</tr>
-<tr>
-<td>-fsm_encoding</td>
-<td>&nbsp;</td>
-<td>Auto</td>
-<td>AUTO</td>
-</tr>
-<tr>
-<td>-safe_implementation</td>
-<td>&nbsp;</td>
-<td>No</td>
-<td>NO</td>
-</tr>
-<tr>
-<td>-resource_sharing</td>
-<td>&nbsp;</td>
-<td>YES</td>
-<td>YES</td>
-</tr>
-<tr>
-<td>-iobuf</td>
-<td>&nbsp;</td>
-<td>YES</td>
-<td>YES</td>
-</tr>
-<tr>
-<td>-equivalent_register_removal</td>
-<td>&nbsp;</td>
-<td>YES</td>
-<td>YES</td>
-</tr>
-</TABLE>
-<A NAME="Translation Property Settings"></A>
-&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
-<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
-<TD ALIGN=CENTER COLSPAN='4'><B>Translation Property Settings </B></TD>
-</tr>
-<tr bgcolor='#ffff99'>
-<td><b>Switch Name</b></td>
-<td><b>Property Name</b></td>
-<td><b>Value</b></td>
-<td><b>Default Value</b></td>
-</tr>
-<tr>
-<td>-intstyle</td>
-<td>&nbsp;</td>
-<td>ise</td>
-<td>None</td>
-</tr>
-<tr>
-<td>-dd</td>
-<td>&nbsp;</td>
-<td>_ngo</td>
-<td>None</td>
-</tr>
-<tr>
-<td>-p</td>
-<td>&nbsp;</td>
-<td>xc95144xl-TQ100-10</td>
-<td>None</td>
-</tr>
-<tr>
-<td>-uc</td>
-<td>&nbsp;</td>
-<td>C:/Users/zanek/Documents/GitHub/Warp-SE/cpld/MXSE.ucf</td>
-<td>None</td>
-</tr>
-</TABLE>
-<A NAME="Operating System Information"></A>
-&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
-<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
-<TD ALIGN=CENTER COLSPAN='3'><B> Operating System Information </B></TD>
-</tr>
-<tr bgcolor='#ffff99'>
-<td><b>Operating System Information</b></td>
-<td><b>xst</b></td>
-<td><b>ngdbuild</b></td>
-</tr>
-<tr>
-<td>CPU Architecture/Speed</td>
-<td>Intel(R) Core(TM) i7-4770K CPU @ 3.50GHz/3500 MHz</td>
-<td>Intel(R) Core(TM) i7-4770K CPU @ 3.50GHz/3500 MHz</td>
-</tr>
-<tr>
-<td>Host</td>
-<td>ZanePC</td>
-<td>ZanePC</td>
-</tr>
-<tr>
-<td>OS Name</td>
-<td>Microsoft , 64-bit</td>
-<td>Microsoft , 64-bit</td>
-</tr>
-<tr>
-<td>OS Release</td>
-<td>major release  (build 9200)</td>
-<td>major release  (build 9200)</td>
-</tr>
-</TABLE>
-</BODY> </HTML>
\ No newline at end of file
diff --git a/cpld/XC95144XL/MXSE_html/fit/ascii 2.htm b/cpld/XC95144XL/MXSE_html/fit/ascii 2.htm
deleted file mode 100644
index 9fad9ed..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/ascii 2.htm	
+++ /dev/null
@@ -1,1805 +0,0 @@
-<html><body>
-<pre>
- 
-cpldfit:  version P.20131013                        Xilinx Inc.
-                                  Fitter Report
-Design Name: MXSE                                Date: 12-11-2021,  6:24AM
-Device Used: XC95144XL-10-TQ100
-Fitting Status: Successful
-
-*************************  Mapped Resource Summary  **************************
-
-Macrocells     Product Terms    Function Block   Registers      Pins           
-Used/Tot       Used/Tot         Inps Used/Tot    Used/Tot       Used/Tot       
-110/144 ( 76%) 439 /720  ( 61%) 244/432 ( 56%)   84 /144 ( 58%) 67 /81  ( 83%)
-
-** Function Block Resources **
-
-Function    Mcells      FB Inps     Pterms      IO          
-Block       Used/Tot    Used/Tot    Used/Tot    Used/Tot    
-FB1           9/18       36/54       80/90      11/11*
-FB2          18/18*      35/54       34/90       6/10
-FB3          14/18       35/54       77/90       6/10
-FB4          10/18       36/54       82/90      10/10*
-FB5          17/18       35/54       47/90       4/10
-FB6          18/18*      24/54       37/90      10/10*
-FB7          17/18       35/54       76/90      10/10*
-FB8           7/18        8/54        6/90      10/10*
-             -----       -----       -----      -----    
-            110/144     244/432     439/720     67/81 
-
-* - Resource is exhausted
-
-** Global Control Resources **
-
-Signal 'CLK2X_IOB' mapped onto global clock net GCK1.
-Signal 'CLK_FSB' mapped onto global clock net GCK2.
-Signal 'CLK_IOB' mapped onto global clock net GCK3.
-Global output enable net(s) unused.
-Signal 'nRES' mapped onto global set/reset net GSR.
-
-** Pin Resources **
-
-Signal Type    Required     Mapped  |  Pin Type            Used    Total 
-------------------------------------|------------------------------------
-Input         :   31          31    |  I/O              :    63      73
-Output        :   32          32    |  GCK/IO           :     3       3
-Bidirectional :    0           0    |  GTS/IO           :     0       4
-GCK           :    3           3    |  GSR/IO           :     1       1
-GTS           :    0           0    |
-GSR           :    1           1    |
-                 ----        ----
-        Total     67          67
-
-** Power Data **
-
-There are 110 macrocells in high performance mode (MCHP).
-There are 0 macrocells in low power mode (MCLP).
-End of Mapped Resource Summary
-**************************  Errors and Warnings  ***************************
-
-WARNING:Cpld - Unable to retrieve the path to the iSE Project Repository. Will
-   use the default filename of 'MXSE.ise'.
-*************************  Summary of Mapped Logic  ************************
-
-** 32 Outputs **
-
-Signal                                Total Total Loc     Pin  Pin     Pin     Pwr  Slew Reg Init
-Name                                  Pts   Inps          No.  Type    Use     Mode Rate State
-nDTACK_FSB                            23    32    FB1_2   11   I/O     O       STD  FAST RESET
-nBERR_FSB                             3     9     FB1_6   14   I/O     O       STD  FAST 
-nOE                                   1     2     FB1_11  17   I/O     O       STD  FAST 
-nLDS_IOB                              3     7     FB2_11  6    I/O     O       STD  FAST RESET
-nUDS_IOB                              3     7     FB2_12  7    I/O     O       STD  FAST RESET
-nDoutOE                               2     7     FB2_14  8    I/O     O       STD  FAST RESET
-nAS_IOB                               1     5     FB2_17  10   I/O     O       STD  FAST RESET
-nRAS                                  3     8     FB3_5   24   I/O     O       STD  FAST 
-nADoutLE1                             2     3     FB3_11  29   I/O     O       STD  FAST SET
-nVMA_IOB                              2     9     FB3_15  33   I/O     O       STD  FAST RESET
-RA<0>                                 2     3     FB4_2   87   I/O     O       STD  FAST 
-RA<2>                                 2     3     FB4_8   91   I/O     O       STD  FAST 
-RA<4>                                 2     3     FB4_12  94   I/O     O       STD  FAST 
-nDinOE                                2     6     FB4_17  97   I/O     O       STD  FAST 
-RA<1>                                 2     3     FB5_2   35   I/O     O       STD  FAST 
-RA<3>                                 2     3     FB5_8   39   I/O     O       STD  FAST 
-nROMCS                                2     5     FB5_12  42   I/O     O       STD  FAST 
-nCAS                                  1     1     FB6_2   74   I/O     O       STD  FAST RESET
-nRAMLWE                               1     5     FB6_6   77   I/O     O       STD  FAST 
-nRAMUWE                               1     5     FB6_9   79   I/O     O       STD  FAST 
-nROMWE                                1     2     FB6_12  81   I/O     O       STD  FAST 
-nVPA_FSB                              1     2     FB6_15  85   I/O     O       STD  FAST 
-RA<5>                                 2     3     FB7_2   50   I/O     O       STD  FAST 
-RA<6>                                 2     3     FB7_6   53   I/O     O       STD  FAST 
-RA<7>                                 2     3     FB7_9   55   I/O     O       STD  FAST 
-RA<8>                                 2     3     FB7_12  58   I/O     O       STD  FAST 
-RA<9>                                 2     3     FB7_15  60   I/O     O       STD  FAST 
-RA<11>                                1     1     FB8_2   63   I/O     O       STD  FAST 
-RA<10>                                1     1     FB8_6   65   I/O     O       STD  FAST 
-nADoutLE0                             1     2     FB8_9   67   I/O     O       STD  FAST 
-nAoutOE                               0     0     FB8_12  70   I/O     O       STD  FAST 
-nDinLE                                1     2     FB8_15  72   I/O     O       STD  FAST RESET
-
-** 78 Buried Nodes **
-
-Signal                                Total Total Loc     Pwr  Reg Init
-Name                                  Pts   Inps          Mode State
-$OpTx$FX_DC$606                       5     12    FB1_4   STD  
-fsb/Ready1r                           7     17    FB1_7   STD  RESET
-fsb/VPA__or00001/fsb/VPA__or00001_D2  8     20    FB1_10  STD  
-fsb/Ready2r                           9     22    FB1_12  STD  RESET
-fsb/VPA                               22    30    FB1_15  STD  RESET
-$OpTx$FX_DC$602                       2     5     FB1_17  STD  
-iobm/VPArr                            1     1     FB2_1   STD  RESET
-iobm/VPArf                            1     1     FB2_2   STD  RESET
-iobm/RESrr                            1     1     FB2_3   STD  RESET
-iobm/RESrf                            1     1     FB2_4   STD  RESET
-iobm/IOREQr                           1     1     FB2_5   STD  RESET
-cnt/RefCnt<3>                         1     3     FB2_6   STD  RESET
-cnt/RefCnt<2>                         1     2     FB2_7   STD  RESET
-cnt/RefCnt<1>                         1     1     FB2_8   STD  RESET
-fsb/BERR1r                            2     4     FB2_9   STD  RESET
-cnt/RefDone                           2     10    FB2_10  STD  RESET
-cnt/TimeoutBPre                       3     11    FB2_13  STD  RESET
-TimeoutB                              3     12    FB2_15  STD  RESET
-TimeoutA                              3     10    FB2_16  STD  RESET
-iobs/IOReady                          4     8     FB2_18  STD  RESET
-IORW0                                 18    20    FB3_3   STD  RESET
-iobs/IOACTr                           1     1     FB3_4   STD  RESET
-iobs/Clear1                           1     3     FB3_6   STD  RESET
-fsb/ASrf                              1     1     FB3_7   STD  RESET
-ALE0S                                 1     2     FB3_8   STD  RESET
-iobs/PS_FSM_FFd2                      14    19    FB3_9   STD  RESET
-iobs/PS_FSM_FFd1                      2     3     FB3_12  STD  RESET
-IOREQ                                 14    19    FB3_13  STD  RESET
-iobm/ETACK                            1     6     FB3_14  STD  RESET
-iobs/IORW1                            16    19    FB3_17  STD  RESET
-ram/BACTr                             1     2     FB3_18  STD  RESET
-ram/RASEL                             20    15    FB4_1   STD  RESET
-cs/nOverlay1                          2     3     FB4_3   STD  RESET
-iobs/Load1                            14    18    FB4_6   STD  RESET
-iobs/Once                             17    18    FB4_10  STD  RESET
-ram/RAMDIS1                           18    15    FB4_14  STD  RESET
-fsb/BERR0r                            3     8     FB4_16  STD  RESET
-IOACT                                 10    15    FB5_1   STD  RESET
-iobm/IOS_FSM_FFd7                     1     3     FB5_3   STD  RESET
-iobm/IOS_FSM_FFd6                     1     1     FB5_4   STD  RESET
-
-Signal                                Total Total Loc     Pwr  Reg Init
-Name                                  Pts   Inps          Mode State
-iobm/IOS_FSM_FFd5                     1     1     FB5_5   STD  RESET
-iobm/IOS_FSM_FFd4                     1     1     FB5_6   STD  RESET
-iobm/BERRrr                           1     1     FB5_7   STD  RESET
-iobm/BERRrf                           1     1     FB5_9   STD  RESET
-cnt/RefCnt<0>                         0     0     FB5_10  STD  RESET
-iobm/IOS_FSM_FFd8                     2     4     FB5_11  STD  SET
-ALE0M                                 2     7     FB5_13  STD  RESET
-iobm/IOS_FSM_FFd2                     4     9     FB5_14  STD  RESET
-BERR_IOBS                             4     8     FB5_15  STD  RESET
-iobm/IOS_FSM_FFd3                     5     10    FB5_16  STD  RESET
-IOBERR                                8     11    FB5_18  STD  RESET
-iobm/Er2                              1     1     FB6_1   STD  RESET
-iobm/DTACKrr                          1     1     FB6_3   STD  RESET
-iobm/DTACKrf                          1     1     FB6_4   STD  RESET
-RefAck                                1     2     FB6_5   STD  RESET
-iobs/IOU1                             2     2     FB6_7   STD  RESET
-iobs/IOL1                             2     2     FB6_8   STD  RESET
-iobm/ES<3>                            3     6     FB6_10  STD  RESET
-iobm/ES<1>                            3     4     FB6_11  STD  RESET
-iobm/ES<0>                            3     7     FB6_13  STD  RESET
-IOU0                                  3     5     FB6_14  STD  RESET
-IOL0                                  3     5     FB6_16  STD  RESET
-iobm/ES<4>                            4     7     FB6_17  STD  RESET
-iobm/ES<2>                            5     7     FB6_18  STD  RESET
-cnt/RefCnt<5>                         1     5     FB7_1   STD  RESET
-cnt/RefCnt<4>                         1     4     FB7_3   STD  RESET
-cs/nOverlay0                          2     7     FB7_4   STD  RESET
-ram/RS_FSM_FFd3                       11    14    FB7_5   STD  RESET
-fsb/Ready0r                           3     8     FB7_7   STD  RESET
-ram/RS_FSM_FFd1                       5     10    FB7_8   STD  RESET
-ram/Once                              5     10    FB7_10  STD  RESET
-ram/RAMDIS2                           7     15    FB7_11  STD  RESET
-ram/RS_FSM_FFd2                       13    14    FB7_13  STD  RESET
-cnt/RefCnt<7>                         1     7     FB7_14  STD  RESET
-cnt/RefCnt<6>                         1     6     FB7_16  STD  RESET
-ram/RAMReady                          16    15    FB7_17  STD  RESET
-iobm/IOS_FSM_FFd1                     1     1     FB8_17  STD  RESET
-iobm/Er                               1     1     FB8_18  STD  RESET
-
-** 35 Inputs **
-
-Signal                                Loc     Pin  Pin     Pin     
-Name                                          No.  Type    Use     
-A_FSB<9>                              FB1_3   12   I/O     I
-nAS_FSB                               FB1_5   13   I/O     I
-A_FSB<5>                              FB1_8   15   I/O     I
-A_FSB<2>                              FB1_9   16   I/O     I
-nBERR_IOB                             FB1_12  18   I/O     I
-A_FSB<6>                              FB1_14  19   I/O     I
-A_FSB<7>                              FB1_15  20   I/O     I
-CLK2X_IOB                             FB1_17  22~  GCK/I/O GCK
-nRES                                  FB2_2   99~  GSR/I/O GSR/I
-A_FSB<22>                             FB2_15  9    I/O     I
-CLK_FSB                               FB3_2   23~  GCK/I/O GCK
-nLDS_FSB                              FB3_6   25   I/O     I
-CLK_IOB                               FB3_8   27~  GCK/I/O GCK/I
-A_FSB<10>                             FB4_5   89   I/O     I
-A_FSB<1>                              FB4_6   90   I/O     I
-A_FSB<12>                             FB4_9   92   I/O     I
-A_FSB<14>                             FB4_11  93   I/O     I
-A_FSB<16>                             FB4_14  95   I/O     I
-A_FSB<17>                             FB4_15  96   I/O     I
-E_IOB                                 FB5_17  49   I/O     I
-A_FSB<18>                             FB6_5   76   I/O     I
-A_FSB<3>                              FB6_8   78   I/O     I
-A_FSB<15>                             FB6_11  80   I/O     I
-A_FSB<13>                             FB6_14  82   I/O     I
-A_FSB<11>                             FB6_17  86   I/O     I
-nUDS_FSB                              FB7_5   52   I/O     I
-nDTACK_IOB                            FB7_8   54   I/O     I
-A_FSB<4>                              FB7_11  56   I/O     I
-nVPA_IOB                              FB7_14  59   I/O     I
-nWE_FSB                               FB7_17  61   I/O     I
-A_FSB<8>                              FB8_5   64   I/O     I
-A_FSB<23>                             FB8_8   66   I/O     I
-A_FSB<21>                             FB8_11  68   I/O     I
-A_FSB<20>                             FB8_14  71   I/O     I
-A_FSB<19>                             FB8_17  73   I/O     I
-
-Legend:
-Pin No. - ~ - User Assigned
-**************************  Function Block Details  ************************
-Legend:
-Total Pt     - Total product terms used by the macrocell signal
-Imp Pt       - Product terms imported from other macrocells
-Exp Pt       - Product terms exported to other macrocells
-               in direction shown
-Unused Pt    - Unused local product terms remaining in macrocell
-Loc          - Location where logic was mapped in device
-Pin Type/Use - I  - Input             GCK - Global Clock
-               O  - Output            GTS - Global Output Enable
-              (b) - Buried macrocell  GSR - Global Set/Reset
-X            - Signal used as input to the macrocell logic.
-Pin No.      - ~  - User Assigned
-*********************************** FB1  ***********************************
-Number of function block inputs used/remaining:               36/18
-Number of signals used by logic mapping into function block:  36
-Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
-Name                Pt      Pt    Pt  Pt               #    Type    Use
-(unused)              0       0   \/5   0     FB1_1         (b)     (b)
-nDTACK_FSB           23      18<-   0   0     FB1_2   11    I/O     O
-(unused)              0       0   /\5   0     FB1_3   12    I/O     I
-$OpTx$FX_DC$606       5       3<- /\3   0     FB1_4         (b)     (b)
-(unused)              0       0   /\3   2     FB1_5   13    I/O     I
-nBERR_FSB             3       0   \/2   0     FB1_6   14    I/O     O
-fsb/Ready1r           7       2<-   0   0     FB1_7         (b)     (b)
-(unused)              0       0     0   5     FB1_8   15    I/O     I
-(unused)              0       0   \/3   2     FB1_9   16    I/O     I
-fsb/VPA__or00001/fsb/VPA__or00001_D2
-                      8       3<-   0   0     FB1_10        (b)     (b)
-nOE                   1       0   \/4   0     FB1_11  17    I/O     O
-fsb/Ready2r           9       4<-   0   0     FB1_12  18    I/O     I
-(unused)              0       0   \/5   0     FB1_13        (b)     (b)
-(unused)              0       0   \/5   0     FB1_14  19    I/O     I
-fsb/VPA              22      17<-   0   0     FB1_15  20    I/O     I
-(unused)              0       0   /\5   0     FB1_16        (b)     (b)
-$OpTx$FX_DC$602       2       0   /\2   1     FB1_17  22    GCK/I/O GCK
-(unused)              0       0   \/5   0     FB1_18        (b)     (b)
-
-Signals Used by Logic in Function Block
-  1: $OpTx$FX_DC$602   13: A_FSB<20>         25: fsb/BERR1r 
-  2: $OpTx$FX_DC$606   14: A_FSB<21>         26: fsb/Ready0r 
-  3: A_FSB<10>         15: A_FSB<22>         27: fsb/Ready1r 
-  4: A_FSB<11>         16: A_FSB<23>         28: fsb/Ready2r 
-  5: A_FSB<12>         17: A_FSB<8>          29: fsb/VPA 
-  6: A_FSB<13>         18: A_FSB<9>          30: fsb/VPA__or00001/fsb/VPA__or00001_D2 
-  7: A_FSB<14>         19: BERR_IOBS         31: iobs/IOReady 
-  8: A_FSB<15>         20: TimeoutA          32: nADoutLE1 
-  9: A_FSB<16>         21: TimeoutB          33: nAS_FSB 
- 10: A_FSB<17>         22: cs/nOverlay1      34: nDTACK_FSB 
- 11: A_FSB<18>         23: fsb/ASrf          35: nWE_FSB 
- 12: A_FSB<19>         24: fsb/BERR0r        36: ram/RAMReady 
-
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-nDTACK_FSB           X.XXXXXXXXXXXXXXXXXX.XXXXXXX..XXXXXX.... 32
-$OpTx$FX_DC$606      .....XX.XXXXXXX......X.........X..X..... 12
-nBERR_FSB            ............XXXX..X.X..XX.......X....... 9
-fsb/Ready1r          .....XX.XXXXXXXX.....XX...X...XXX.X..... 17
-fsb/VPA__or00001/fsb/VPA__or00001_D2 
-                     ..XXXXXXXXXXXXXXXX.X.X.....X......X..... 20
-nOE                  ................................X.X..... 2
-fsb/Ready2r          ..XXXXXXXXXXXXXXXX.X.XX....X....X.X..... 22
-fsb/VPA              XXXXXXXXXXXXXXXXXXX..XXXXXX.XXX.X..X.... 30
-$OpTx$FX_DC$602      ............XXXX....X................... 5
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
-*********************************** FB2  ***********************************
-Number of function block inputs used/remaining:               35/19
-Number of signals used by logic mapping into function block:  35
-Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
-Name                Pt      Pt    Pt  Pt               #    Type    Use
-iobm/VPArr            1       0     0   4     FB2_1         (b)     (b)
-iobm/VPArf            1       0     0   4     FB2_2   99    GSR/I/O GSR/I
-iobm/RESrr            1       0     0   4     FB2_3         (b)     (b)
-iobm/RESrf            1       0     0   4     FB2_4         (b)     (b)
-iobm/IOREQr           1       0     0   4     FB2_5   1     GTS/I/O (b)
-cnt/RefCnt<3>         1       0     0   4     FB2_6   2     GTS/I/O (b)
-cnt/RefCnt<2>         1       0     0   4     FB2_7         (b)     (b)
-cnt/RefCnt<1>         1       0     0   4     FB2_8   3     GTS/I/O (b)
-fsb/BERR1r            2       0     0   3     FB2_9   4     GTS/I/O (b)
-cnt/RefDone           2       0     0   3     FB2_10        (b)     (b)
-nLDS_IOB              3       0     0   2     FB2_11  6     I/O     O
-nUDS_IOB              3       0     0   2     FB2_12  7     I/O     O
-cnt/TimeoutBPre       3       0     0   2     FB2_13        (b)     (b)
-nDoutOE               2       0     0   3     FB2_14  8     I/O     O
-TimeoutB              3       0     0   2     FB2_15  9     I/O     I
-TimeoutA              3       0     0   2     FB2_16        (b)     (b)
-nAS_IOB               1       0     0   4     FB2_17  10    I/O     O
-iobs/IOReady          4       0     0   1     FB2_18        (b)     (b)
-
-Signals Used by Logic in Function Block
-  1: BERR_IOBS         13: cnt/RefCnt<3>      25: iobm/IOS_FSM_FFd5 
-  2: IOBERR            14: cnt/RefCnt<4>      26: iobm/IOS_FSM_FFd6 
-  3: IOL0              15: cnt/RefCnt<5>      27: iobm/IOS_FSM_FFd7 
-  4: IOREQ             16: cnt/RefCnt<6>      28: iobs/IOACTr 
-  5: IORW0             17: cnt/RefCnt<7>      29: iobs/IOReady 
-  6: IOU0              18: cnt/RefDone        30: iobs/Once 
-  7: RefAck            19: cnt/TimeoutBPre    31: iobs/PS_FSM_FFd2 
-  8: TimeoutA          20: fsb/ASrf           32: nADoutLE1 
-  9: TimeoutB          21: fsb/BERR1r         33: nAS_FSB 
- 10: cnt/RefCnt<0>     22: iobm/IOS_FSM_FFd2  34: nRES 
- 11: cnt/RefCnt<1>     23: iobm/IOS_FSM_FFd3  35: nVPA_IOB 
- 12: cnt/RefCnt<2>     24: iobm/IOS_FSM_FFd4 
-
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-iobm/VPArr           ..................................X..... 1
-iobm/VPArf           ..................................X..... 1
-iobm/RESrr           .................................X...... 1
-iobm/RESrf           .................................X...... 1
-iobm/IOREQr          ...X.................................... 1
-cnt/RefCnt<3>        .........XXX............................ 3
-cnt/RefCnt<2>        .........XX............................. 2
-cnt/RefCnt<1>        .........X.............................. 1
-fsb/BERR1r           X..................XX...........X....... 4
-cnt/RefDone          ......X..XXXXXXXXX...................... 10
-nLDS_IOB             ..X.X.................XXXXX............. 7
-nUDS_IOB             ....XX................XXXXX............. 7
-cnt/TimeoutBPre      .........XXXXXXXX.XX............X....... 11
-nDoutOE              ....X................XXXXXX............. 7
-TimeoutB             ........XXXXXXXXX.XX............X....... 12
-TimeoutA             .......X.XXXXXXX...X............X....... 10
-nAS_IOB              ......................XXXXX............. 5
-iobs/IOReady         .X.................X.......XXXXXX....... 8
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
-*********************************** FB3  ***********************************
-Number of function block inputs used/remaining:               35/19
-Number of signals used by logic mapping into function block:  35
-Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
-Name                Pt      Pt    Pt  Pt               #    Type    Use
-(unused)              0       0   \/4   1     FB3_1         (b)     (b)
-(unused)              0       0   \/5   0     FB3_2   23    GCK/I/O GCK
-IORW0                18      13<-   0   0     FB3_3         (b)     (b)
-iobs/IOACTr           1       0   /\4   0     FB3_4         (b)     (b)
-nRAS                  3       0     0   2     FB3_5   24    I/O     O
-iobs/Clear1           1       0     0   4     FB3_6   25    I/O     I
-fsb/ASrf              1       0     0   4     FB3_7         (b)     (b)
-ALE0S                 1       0   \/4   0     FB3_8   27    GCK/I/O GCK/I
-iobs/PS_FSM_FFd2     14       9<-   0   0     FB3_9   28    I/O     (b)
-(unused)              0       0   /\5   0     FB3_10        (b)     (b)
-nADoutLE1             2       0   \/2   1     FB3_11  29    I/O     O
-iobs/PS_FSM_FFd1      2       2<- \/5   0     FB3_12  30    I/O     (b)
-IOREQ                14       9<-   0   0     FB3_13        (b)     (b)
-iobm/ETACK            1       0   /\4   0     FB3_14  32    I/O     (b)
-nVMA_IOB              2       0   \/2   1     FB3_15  33    I/O     O
-(unused)              0       0   \/5   0     FB3_16        (b)     (b)
-iobs/IORW1           16      11<-   0   0     FB3_17  34    I/O     (b)
-ram/BACTr             1       0   /\4   0     FB3_18        (b)     (b)
-
-Signals Used by Logic in Function Block
-  1: A_FSB<13>         13: RefAck            25: iobs/IORW1 
-  2: A_FSB<14>         14: cs/nOverlay1      26: iobs/Load1 
-  3: A_FSB<16>         15: fsb/ASrf          27: iobs/Once 
-  4: A_FSB<17>         16: iobm/ES<0>        28: iobs/PS_FSM_FFd1 
-  5: A_FSB<18>         17: iobm/ES<1>        29: iobs/PS_FSM_FFd2 
-  6: A_FSB<19>         18: iobm/ES<2>        30: nADoutLE1 
-  7: A_FSB<20>         19: iobm/ES<3>        31: nAS_FSB 
-  8: A_FSB<21>         20: iobm/ES<4>        32: nVMA_IOB 
-  9: A_FSB<22>         21: iobm/VPArf        33: nWE_FSB 
- 10: A_FSB<23>         22: iobm/VPArr        34: ram/RAMDIS1 
- 11: IOACT             23: iobs/Clear1       35: ram/RAMDIS2 
- 12: IORW0             24: iobs/IOACTr      
-
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-IORW0                XXXXXXXXXX.X.XX.........X.XXXXX.X....... 20
-iobs/IOACTr          ..........X............................. 1
-nRAS                 .......XXX..XX................X..XX..... 8
-iobs/Clear1          ...........................XXX.......... 3
-fsb/ASrf             ..............................X......... 1
-ALE0S                ...........................XX........... 2
-iobs/PS_FSM_FFd2     XXXXXXXXXX...XX........X..XXXXX.X....... 19
-nADoutLE1            ......................X..X...X.......... 3
-iobs/PS_FSM_FFd1     .......................X...XX........... 3
-IOREQ                XXXXXXXXXX...XX........X..XXXXX.X....... 19
-iobm/ETACK           ...............XXXXX...........X........ 6
-nVMA_IOB             ..........X....XXXXXXX.........X........ 9
-iobs/IORW1           XXXXXXXXXX...XX.........X.XXXXX.X....... 19
-ram/BACTr            ..............X...............X......... 2
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
-*********************************** FB4  ***********************************
-Number of function block inputs used/remaining:               36/18
-Number of signals used by logic mapping into function block:  36
-Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
-Name                Pt      Pt    Pt  Pt               #    Type    Use
-ram/RASEL            20      15<-   0   0     FB4_1         (b)     (b)
-RA<0>                 2       2<- /\5   0     FB4_2   87    I/O     O
-cs/nOverlay1          2       0   /\2   1     FB4_3         (b)     (b)
-(unused)              0       0     0   5     FB4_4         (b)     
-(unused)              0       0   \/4   1     FB4_5   89    I/O     I
-iobs/Load1           14       9<-   0   0     FB4_6   90    I/O     I
-(unused)              0       0   /\5   0     FB4_7         (b)     (b)
-RA<2>                 2       0   \/2   1     FB4_8   91    I/O     O
-(unused)              0       0   \/5   0     FB4_9   92    I/O     I
-iobs/Once            17      12<-   0   0     FB4_10        (b)     (b)
-(unused)              0       0   /\5   0     FB4_11  93    I/O     I
-RA<4>                 2       0   \/3   0     FB4_12  94    I/O     O
-(unused)              0       0   \/5   0     FB4_13        (b)     (b)
-ram/RAMDIS1          18      13<-   0   0     FB4_14  95    I/O     I
-(unused)              0       0   /\5   0     FB4_15  96    I/O     I
-fsb/BERR0r            3       0   \/2   0     FB4_16        (b)     (b)
-nDinOE                2       2<- \/5   0     FB4_17  97    I/O     O
-(unused)              0       0   \/5   0     FB4_18        (b)     (b)
-
-Signals Used by Logic in Function Block
-  1: A_FSB<10>         13: A_FSB<23>         25: iobs/Once 
-  2: A_FSB<12>         14: A_FSB<3>          26: iobs/PS_FSM_FFd1 
-  3: A_FSB<13>         15: A_FSB<5>          27: iobs/PS_FSM_FFd2 
-  4: A_FSB<14>         16: TimeoutB          28: nADoutLE1 
-  5: A_FSB<16>         17: cnt/RefCnt<5>     29: nAS_FSB 
-  6: A_FSB<17>         18: cnt/RefCnt<6>     30: nWE_FSB 
-  7: A_FSB<18>         19: cnt/RefCnt<7>     31: ram/BACTr 
-  8: A_FSB<19>         20: cnt/RefDone       32: ram/Once 
-  9: A_FSB<1>          21: cs/nOverlay0      33: ram/RASEL 
- 10: A_FSB<20>         22: cs/nOverlay1      34: ram/RS_FSM_FFd1 
- 11: A_FSB<21>         23: fsb/ASrf          35: ram/RS_FSM_FFd2 
- 12: A_FSB<22>         24: fsb/BERR0r        36: ram/RS_FSM_FFd3 
-
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-ram/RASEL            ..........XXX...XXXX.XX.....X.XX.XXX.... 15
-RA<0>                X.......X.......................X....... 3
-cs/nOverlay1         ....................X.X.....X........... 3
-iobs/Load1           ..XXXXXX.XXXX........XX.XXXXXX.......... 18
-RA<2>                .X...........X..................X....... 3
-iobs/Once            ..XXXXXX.XXXX........XX.XXXXXX.......... 18
-RA<4>                ...X..........X.................X....... 3
-ram/RAMDIS1          ..........XXX...XXXX.XX.....X.XX.XXX.... 15
-fsb/BERR0r           .........XXXX..X......XX....X........... 8
-nDinOE               .........XXXX...............XX.......... 6
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
-*********************************** FB5  ***********************************
-Number of function block inputs used/remaining:               35/19
-Number of signals used by logic mapping into function block:  35
-Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
-Name                Pt      Pt    Pt  Pt               #    Type    Use
-IOACT                10       5<-   0   0     FB5_1         (b)     (b)
-RA<1>                 2       0   /\3   0     FB5_2   35    I/O     O
-iobm/IOS_FSM_FFd7     1       0     0   4     FB5_3         (b)     (b)
-iobm/IOS_FSM_FFd6     1       0     0   4     FB5_4         (b)     (b)
-iobm/IOS_FSM_FFd5     1       0     0   4     FB5_5   36    I/O     (b)
-iobm/IOS_FSM_FFd4     1       0     0   4     FB5_6   37    I/O     (b)
-iobm/BERRrr           1       0     0   4     FB5_7         (b)     (b)
-RA<3>                 2       0     0   3     FB5_8   39    I/O     O
-iobm/BERRrf           1       0     0   4     FB5_9   40    I/O     (b)
-cnt/RefCnt<0>         0       0     0   5     FB5_10        (b)     (b)
-iobm/IOS_FSM_FFd8     2       0     0   3     FB5_11  41    I/O     (b)
-nROMCS                2       0     0   3     FB5_12  42    I/O     O
-ALE0M                 2       0     0   3     FB5_13        (b)     (b)
-iobm/IOS_FSM_FFd2     4       0     0   1     FB5_14  43    I/O     (b)
-BERR_IOBS             4       0     0   1     FB5_15  46    I/O     (b)
-iobm/IOS_FSM_FFd3     5       0     0   0     FB5_16        (b)     (b)
-(unused)              0       0   \/5   0     FB5_17  49    I/O     I
-IOBERR                8       5<- \/2   0     FB5_18        (b)     (b)
-
-Signals Used by Logic in Function Block
-  1: A_FSB<11>         13: fsb/ASrf           25: iobm/IOS_FSM_FFd7 
-  2: A_FSB<13>         14: iobm/BERRrf        26: iobm/IOS_FSM_FFd8 
-  3: A_FSB<20>         15: iobm/BERRrr        27: iobm/RESrf 
-  4: A_FSB<21>         16: iobm/DTACKrf       28: iobm/RESrr 
-  5: A_FSB<22>         17: iobm/DTACKrr       29: iobs/IOACTr 
-  6: A_FSB<23>         18: iobm/ETACK         30: iobs/Once 
-  7: A_FSB<2>          19: iobm/IOREQr        31: iobs/PS_FSM_FFd2 
-  8: A_FSB<4>          20: iobm/IOS_FSM_FFd1  32: nADoutLE1 
-  9: BERR_IOBS         21: iobm/IOS_FSM_FFd3  33: nAS_FSB 
- 10: CLK_IOB           22: iobm/IOS_FSM_FFd4  34: nBERR_IOB 
- 11: IOBERR            23: iobm/IOS_FSM_FFd5  35: ram/RASEL 
- 12: cs/nOverlay1      24: iobm/IOS_FSM_FFd6 
-
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-IOACT                .........X...XXXXXX.XXXXXXXX............ 15
-RA<1>                X.....X...........................X..... 3
-iobm/IOS_FSM_FFd7    .........X........X......X.............. 3
-iobm/IOS_FSM_FFd6    ........................X............... 1
-iobm/IOS_FSM_FFd5    .......................X................ 1
-iobm/IOS_FSM_FFd4    ......................X................. 1
-iobm/BERRrr          .................................X...... 1
-RA<3>                .X.....X..........................X..... 3
-iobm/BERRrf          .................................X...... 1
-cnt/RefCnt<0>        ........................................ 0
-iobm/IOS_FSM_FFd8    .........X........XX.....X.............. 4
-nROMCS               ..XXXX.....X............................ 5
-ALE0M                ..................X.XXXXXX.............. 7
-iobm/IOS_FSM_FFd2    .........X...XXXXX..X.....XX............ 9
-BERR_IOBS            ........X.X.X...............XXXXX....... 8
-iobm/IOS_FSM_FFd3    .........X...XXXXX..XX....XX............ 10
-IOBERR               .........XX..XXXXX..X.....XX.....X...... 11
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
-*********************************** FB6  ***********************************
-Number of function block inputs used/remaining:               24/30
-Number of signals used by logic mapping into function block:  24
-Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
-Name                Pt      Pt    Pt  Pt               #    Type    Use
-iobm/Er2              1       0     0   4     FB6_1         (b)     (b)
-nCAS                  1       0     0   4     FB6_2   74    I/O     O
-iobm/DTACKrr          1       0     0   4     FB6_3         (b)     (b)
-iobm/DTACKrf          1       0     0   4     FB6_4         (b)     (b)
-RefAck                1       0     0   4     FB6_5   76    I/O     I
-nRAMLWE               1       0     0   4     FB6_6   77    I/O     O
-iobs/IOU1             2       0     0   3     FB6_7         (b)     (b)
-iobs/IOL1             2       0     0   3     FB6_8   78    I/O     I
-nRAMUWE               1       0     0   4     FB6_9   79    I/O     O
-iobm/ES<3>            3       0     0   2     FB6_10        (b)     (b)
-iobm/ES<1>            3       0     0   2     FB6_11  80    I/O     I
-nROMWE                1       0     0   4     FB6_12  81    I/O     O
-iobm/ES<0>            3       0     0   2     FB6_13        (b)     (b)
-IOU0                  3       0     0   2     FB6_14  82    I/O     I
-nVPA_FSB              1       0     0   4     FB6_15  85    I/O     O
-IOL0                  3       0     0   2     FB6_16        (b)     (b)
-iobm/ES<4>            4       0     0   1     FB6_17  86    I/O     I
-iobm/ES<2>            5       0     0   0     FB6_18        (b)     (b)
-
-Signals Used by Logic in Function Block
-  1: fsb/VPA            9: iobs/IOL1         17: nLDS_FSB 
-  2: iobm/ES<0>        10: iobs/IOU1         18: nUDS_FSB 
-  3: iobm/ES<1>        11: iobs/Load1        19: nWE_FSB 
-  4: iobm/ES<2>        12: iobs/PS_FSM_FFd1  20: ram/RAMDIS1 
-  5: iobm/ES<3>        13: iobs/PS_FSM_FFd2  21: ram/RAMDIS2 
-  6: iobm/ES<4>        14: nADoutLE1         22: ram/RASEL 
-  7: iobm/Er           15: nAS_FSB           23: ram/RS_FSM_FFd1 
-  8: iobm/Er2          16: nDTACK_IOB        24: ram/RS_FSM_FFd2 
-
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-iobm/Er2             ......X................................. 1
-nCAS                 .....................X.................. 1
-iobm/DTACKrr         ...............X........................ 1
-iobm/DTACKrf         ...............X........................ 1
-RefAck               ......................XX................ 2
-nRAMLWE              ..............X.X.XXX................... 5
-iobs/IOU1            ..........X......X...................... 2
-iobs/IOL1            ..........X.....X....................... 2
-nRAMUWE              ..............X..XXXX................... 5
-iobm/ES<3>           .XXXX.XX................................ 6
-iobm/ES<1>           .XX...XX................................ 4
-nROMWE               ..............X...X..................... 2
-iobm/ES<0>           .XXXXXXX................................ 7
-IOU0                 .........X.XXX...X...................... 5
-nVPA_FSB             X.............X......................... 2
-IOL0                 ........X..XXX..X....................... 5
-iobm/ES<4>           .XXXXXXX................................ 7
-iobm/ES<2>           .XXXXXXX................................ 7
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
-*********************************** FB7  ***********************************
-Number of function block inputs used/remaining:               35/19
-Number of signals used by logic mapping into function block:  35
-Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
-Name                Pt      Pt    Pt  Pt               #    Type    Use
-cnt/RefCnt<5>         1       0   /\1   3     FB7_1         (b)     (b)
-RA<5>                 2       0     0   3     FB7_2   50    I/O     O
-cnt/RefCnt<4>         1       0     0   4     FB7_3         (b)     (b)
-cs/nOverlay0          2       0   \/3   0     FB7_4         (b)     (b)
-ram/RS_FSM_FFd3      11       6<-   0   0     FB7_5   52    I/O     I
-RA<6>                 2       0   /\3   0     FB7_6   53    I/O     O
-fsb/Ready0r           3       0     0   2     FB7_7         (b)     (b)
-ram/RS_FSM_FFd1       5       0     0   0     FB7_8   54    I/O     I
-RA<7>                 2       0   \/3   0     FB7_9   55    I/O     O
-ram/Once              5       3<- \/3   0     FB7_10        (b)     (b)
-ram/RAMDIS2           7       3<- \/1   0     FB7_11  56    I/O     I
-RA<8>                 2       1<- \/4   0     FB7_12  58    I/O     O
-ram/RS_FSM_FFd2      13       8<-   0   0     FB7_13        (b)     (b)
-cnt/RefCnt<7>         1       0   /\4   0     FB7_14  59    I/O     I
-RA<9>                 2       0   \/1   2     FB7_15  60    I/O     O
-cnt/RefCnt<6>         1       1<- \/5   0     FB7_16        (b)     (b)
-ram/RAMReady         16      11<-   0   0     FB7_17  61    I/O     I
-(unused)              0       0   /\5   0     FB7_18        (b)     (b)
-
-Signals Used by Logic in Function Block
-  1: A_FSB<15>         13: A_FSB<9>          25: fsb/ASrf 
-  2: A_FSB<16>         14: cnt/RefCnt<0>     26: fsb/Ready0r 
-  3: A_FSB<17>         15: cnt/RefCnt<1>     27: nAS_FSB 
-  4: A_FSB<18>         16: cnt/RefCnt<2>     28: ram/BACTr 
-  5: A_FSB<19>         17: cnt/RefCnt<3>     29: ram/Once 
-  6: A_FSB<20>         18: cnt/RefCnt<4>     30: ram/RAMDIS2 
-  7: A_FSB<21>         19: cnt/RefCnt<5>     31: ram/RAMReady 
-  8: A_FSB<22>         20: cnt/RefCnt<6>     32: ram/RASEL 
-  9: A_FSB<23>         21: cnt/RefCnt<7>     33: ram/RS_FSM_FFd1 
- 10: A_FSB<6>          22: cnt/RefDone       34: ram/RS_FSM_FFd2 
- 11: A_FSB<7>          23: cs/nOverlay0      35: ram/RS_FSM_FFd3 
- 12: A_FSB<8>          24: cs/nOverlay1     
-
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-cnt/RefCnt<5>        .............XXXXX...................... 5
-RA<5>                X........X.....................X........ 3
-cnt/RefCnt<4>        .............XXXX....................... 4
-cs/nOverlay0         .....XXXX.............X.X.X............. 7
-ram/RS_FSM_FFd3      ......XXX.........XXXX.XX.X.X...XXX..... 14
-RA<6>                .X........X....................X........ 3
-fsb/Ready0r          ......XXX..............XXXX...X......... 8
-ram/RS_FSM_FFd1      ......XXX..............XX.X.X...XXX..... 10
-RA<7>                ..X........X...................X........ 3
-ram/Once             ......XXX..............XX.X.X...XXX..... 10
-ram/RAMDIS2          ......XXX.........XXXX.XX.X.XX..XXX..... 15
-RA<8>                ...X........X..................X........ 3
-ram/RS_FSM_FFd2      ......XXX.........XXXX.XX.XX....XXX..... 14
-cnt/RefCnt<7>        .............XXXXXXX.................... 7
-RA<9>                ....XX.........................X........ 3
-cnt/RefCnt<6>        .............XXXXXX..................... 6
-ram/RAMReady         ......XXX.........XXXX.XX.XXX...XXX..... 15
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
-*********************************** FB8  ***********************************
-Number of function block inputs used/remaining:               8/46
-Number of signals used by logic mapping into function block:  8
-Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
-Name                Pt      Pt    Pt  Pt               #    Type    Use
-(unused)              0       0     0   5     FB8_1         (b)     
-RA<11>                1       0     0   4     FB8_2   63    I/O     O
-(unused)              0       0     0   5     FB8_3         (b)     
-(unused)              0       0     0   5     FB8_4         (b)     
-(unused)              0       0     0   5     FB8_5   64    I/O     I
-RA<10>                1       0     0   4     FB8_6   65    I/O     O
-(unused)              0       0     0   5     FB8_7         (b)     
-(unused)              0       0     0   5     FB8_8   66    I/O     I
-nADoutLE0             1       0     0   4     FB8_9   67    I/O     O
-(unused)              0       0     0   5     FB8_10        (b)     
-(unused)              0       0     0   5     FB8_11  68    I/O     I
-nAoutOE               0       0     0   5     FB8_12  70    I/O     O
-(unused)              0       0     0   5     FB8_13        (b)     
-(unused)              0       0     0   5     FB8_14  71    I/O     I
-nDinLE                1       0     0   4     FB8_15  72    I/O     O
-(unused)              0       0     0   5     FB8_16        (b)     
-iobm/IOS_FSM_FFd1     1       0     0   4     FB8_17  73    I/O     I
-iobm/Er               1       0     0   4     FB8_18        (b)     (b)
-
-Signals Used by Logic in Function Block
-  1: ALE0M              4: A_FSB<21>           7: iobm/IOS_FSM_FFd3 
-  2: ALE0S              5: E_IOB               8: iobm/IOS_FSM_FFd4 
-  3: A_FSB<19>          6: iobm/IOS_FSM_FFd2 
-
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-RA<11>               ..X..................................... 1
-RA<10>               ...X.................................... 1
-nADoutLE0            XX...................................... 2
-nAoutOE              ........................................ 0
-nDinLE               ......XX................................ 2
-iobm/IOS_FSM_FFd1    .....X.................................. 1
-iobm/Er              ....X................................... 1
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
-*******************************  Equations  ********************************
-
-********** Mapped Logic **********
-
-
-$OpTx$FX_DC$602 <= ((NOT TimeoutB)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20)));
-
-
-$OpTx$FX_DC$606 <= ((A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB)
-	OR (A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
-	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
-	cs/nOverlay1 AND NOT nWE_FSB AND NOT nADoutLE1)
-	OR (A_FSB(13) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
-	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
-	cs/nOverlay1 AND NOT nWE_FSB AND NOT nADoutLE1)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20))
-	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB));
-
-FDCPE_ALE0M: FDCPE port map (ALE0M,ALE0M_D,CLK2X_IOB,'0','0');
-ALE0M_D <= ((NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-	NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND NOT iobm/IOS_FSM_FFd7 AND 
-	NOT iobm/IOREQr)
-	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-	NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND NOT iobm/IOS_FSM_FFd7 AND 
-	NOT iobm/IOS_FSM_FFd8));
-
-FDCPE_ALE0S: FDCPE port map (ALE0S,ALE0S_D,CLK_FSB,'0','0');
-ALE0S_D <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1);
-
-FTCPE_BERR_IOBS: FTCPE port map (BERR_IOBS,BERR_IOBS_T,CLK_FSB,'0','0');
-BERR_IOBS_T <= ((BERR_IOBS AND nAS_FSB AND NOT fsb/ASrf)
-	OR (iobs/Once AND BERR_IOBS AND NOT IOBERR AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND nADoutLE1)
-	OR (iobs/Once AND NOT BERR_IOBS AND IOBERR AND NOT nAS_FSB AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND nADoutLE1)
-	OR (iobs/Once AND NOT BERR_IOBS AND IOBERR AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND fsb/ASrf AND nADoutLE1));
-
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-FDCPE_IOACT: FDCPE port map (IOACT,IOACT_D,CLK2X_IOB,'0','0');
-IOACT_D <= ((NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND 
-	NOT iobm/IOS_FSM_FFd6 AND CLK_IOB AND NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOS_FSM_FFd8 AND 
-	iobm/BERRrf AND iobm/BERRrr)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND 
-	NOT iobm/IOS_FSM_FFd6 AND CLK_IOB AND NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOS_FSM_FFd8 AND 
-	iobm/DTACKrf AND iobm/DTACKrr)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND 
-	NOT iobm/IOS_FSM_FFd6 AND CLK_IOB AND NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOS_FSM_FFd8 AND 
-	iobm/RESrf AND iobm/RESrr)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND 
-	NOT iobm/IOS_FSM_FFd6 AND CLK_IOB AND NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOREQr AND 
-	iobm/DTACKrf AND iobm/DTACKrr)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND 
-	NOT iobm/IOS_FSM_FFd6 AND CLK_IOB AND NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOREQr AND 
-	iobm/RESrf AND iobm/RESrr)
-	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-	NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND NOT iobm/IOS_FSM_FFd7 AND 
-	NOT iobm/IOREQr)
-	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-	NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND NOT iobm/IOS_FSM_FFd7 AND 
-	NOT iobm/IOS_FSM_FFd8)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND 
-	NOT iobm/IOS_FSM_FFd6 AND CLK_IOB AND NOT iobm/IOS_FSM_FFd7 AND iobm/ETACK AND 
-	NOT iobm/IOREQr)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND 
-	NOT iobm/IOS_FSM_FFd6 AND CLK_IOB AND NOT iobm/IOS_FSM_FFd7 AND iobm/ETACK AND 
-	NOT iobm/IOS_FSM_FFd8)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND 
-	NOT iobm/IOS_FSM_FFd6 AND CLK_IOB AND NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOREQr AND 
-	iobm/BERRrf AND iobm/BERRrr));
-
-FTCPE_IOBERR: FTCPE port map (IOBERR,IOBERR_T,CLK2X_IOB,'0','0');
-IOBERR_T <= ((nBERR_IOB AND IOBERR AND iobm/IOS_FSM_FFd3 AND 
-	CLK_IOB AND iobm/DTACKrf AND iobm/DTACKrr)
-	OR (nBERR_IOB AND IOBERR AND iobm/IOS_FSM_FFd3 AND 
-	CLK_IOB AND iobm/RESrf AND iobm/RESrr)
-	OR (NOT nBERR_IOB AND NOT IOBERR AND iobm/IOS_FSM_FFd3 AND 
-	CLK_IOB AND iobm/BERRrf AND iobm/BERRrr)
-	OR (NOT nBERR_IOB AND NOT IOBERR AND iobm/IOS_FSM_FFd3 AND 
-	CLK_IOB AND iobm/DTACKrf AND iobm/DTACKrr)
-	OR (NOT nBERR_IOB AND NOT IOBERR AND iobm/IOS_FSM_FFd3 AND 
-	CLK_IOB AND iobm/RESrf AND iobm/RESrr)
-	OR (nBERR_IOB AND IOBERR AND iobm/IOS_FSM_FFd3 AND 
-	CLK_IOB AND iobm/ETACK)
-	OR (NOT nBERR_IOB AND NOT IOBERR AND iobm/IOS_FSM_FFd3 AND 
-	CLK_IOB AND iobm/ETACK)
-	OR (nBERR_IOB AND IOBERR AND iobm/IOS_FSM_FFd3 AND 
-	CLK_IOB AND iobm/BERRrf AND iobm/BERRrr));
-
-FDCPE_IOL0: FDCPE port map (IOL0,IOL0_D,CLK_FSB,'0','0',IOL0_CE);
-IOL0_D <= ((NOT nLDS_FSB AND nADoutLE1)
-	OR (iobs/IOL1 AND NOT nADoutLE1));
-IOL0_CE <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1);
-
-FDCPE_IOREQ: FDCPE port map (IOREQ,IOREQ_D,CLK_FSB,'0','0');
-IOREQ_D <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND 
-	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
-	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND 
-	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND 
-	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB AND 
-	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND 
-	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND 
-	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21) AND 
-	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	cs/nOverlay1 AND NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT iobs/PS_FSM_FFd2 AND iobs/PS_FSM_FFd1)
-	OR (iobs/PS_FSM_FFd1 AND iobs/IOACTr)
-	OR (iobs/Once AND NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND NOT iobs/PS_FSM_FFd2 AND 
-	nADoutLE1)
-	OR (nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT fsb/ASrf AND 
-	nADoutLE1));
-
-FTCPE_IORW0: FTCPE port map (IORW0,IORW0_T,CLK_FSB,'0','0');
-IORW0_T <= ((EXP22_.EXP)
-	OR (A_FSB(23) AND NOT iobs/Once AND NOT IORW0 AND nWE_FSB AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT iobs/Once AND 
-	IORW0 AND NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT iobs/Once AND 
-	IORW0 AND NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND 
-	fsb/ASrf AND nADoutLE1)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT iobs/Once AND 
-	NOT IORW0 AND nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT iobs/Once AND 
-	NOT IORW0 AND nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND 
-	fsb/ASrf AND nADoutLE1)
-	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND 
-	NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND 
-	NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1)
-	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND 
-	NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND 
-	NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1)
-	OR (IORW0 AND NOT iobs/IORW1 AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND NOT nADoutLE1)
-	OR (NOT IORW0 AND iobs/IORW1 AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND NOT nADoutLE1)
-	OR (A_FSB(23) AND NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND 
-	NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (A_FSB(23) AND NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1)
-	OR (A_FSB(23) AND NOT iobs/Once AND NOT IORW0 AND nWE_FSB AND 
-	NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1));
-
-FDCPE_IOU0: FDCPE port map (IOU0,IOU0_D,CLK_FSB,'0','0',IOU0_CE);
-IOU0_D <= ((NOT nUDS_FSB AND nADoutLE1)
-	OR (iobs/IOU1 AND NOT nADoutLE1));
-IOU0_CE <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1);
-
-
-RA(0) <= ((A_FSB(10) AND NOT ram/RASEL)
-	OR (ram/RASEL AND A_FSB(1)));
-
-
-RA(1) <= ((A_FSB(11) AND NOT ram/RASEL)
-	OR (ram/RASEL AND A_FSB(2)));
-
-
-RA(2) <= ((A_FSB(12) AND NOT ram/RASEL)
-	OR (ram/RASEL AND A_FSB(3)));
-
-
-RA(3) <= ((A_FSB(13) AND NOT ram/RASEL)
-	OR (ram/RASEL AND A_FSB(4)));
-
-
-RA(4) <= ((A_FSB(14) AND NOT ram/RASEL)
-	OR (ram/RASEL AND A_FSB(5)));
-
-
-RA(5) <= ((A_FSB(15) AND NOT ram/RASEL)
-	OR (ram/RASEL AND A_FSB(6)));
-
-
-RA(6) <= ((A_FSB(16) AND NOT ram/RASEL)
-	OR (ram/RASEL AND A_FSB(7)));
-
-
-RA(7) <= ((A_FSB(8) AND ram/RASEL)
-	OR (A_FSB(17) AND NOT ram/RASEL));
-
-
-RA(8) <= ((A_FSB(9) AND ram/RASEL)
-	OR (A_FSB(18) AND NOT ram/RASEL));
-
-
-RA(9) <= ((A_FSB(20) AND ram/RASEL)
-	OR (A_FSB(19) AND NOT ram/RASEL));
-
-
-RA(10) <= A_FSB(21);
-
-
-RA(11) <= A_FSB(19);
-
-FDCPE_RefAck: FDCPE port map (RefAck,RefAck_D,CLK_FSB,'0','0');
-RefAck_D <= (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1);
-
-FTCPE_TimeoutA: FTCPE port map (TimeoutA,TimeoutA_T,CLK_FSB,'0','0');
-TimeoutA_T <= ((TimeoutA AND nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT TimeoutA AND NOT nAS_FSB AND NOT cnt/RefCnt(0) AND 
-	NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND 
-	NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4))
-	OR (NOT TimeoutA AND NOT cnt/RefCnt(0) AND NOT cnt/RefCnt(5) AND 
-	NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND NOT cnt/RefCnt(3) AND 
-	NOT cnt/RefCnt(4) AND fsb/ASrf));
-
-FTCPE_TimeoutB: FTCPE port map (TimeoutB,TimeoutB_T,CLK_FSB,'0','0');
-TimeoutB_T <= ((TimeoutB AND nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT TimeoutB AND cnt/TimeoutBPre AND NOT nAS_FSB AND 
-	NOT cnt/RefCnt(0) AND NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND 
-	NOT cnt/RefCnt(2) AND NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4) AND NOT cnt/RefCnt(7))
-	OR (NOT TimeoutB AND cnt/TimeoutBPre AND NOT cnt/RefCnt(0) AND 
-	NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND 
-	NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4) AND NOT cnt/RefCnt(7) AND fsb/ASrf));
-
-FTCPE_cnt/RefCnt0: FTCPE port map (cnt/RefCnt(0),'1',CLK_FSB,'0','0');
-
-FTCPE_cnt/RefCnt1: FTCPE port map (cnt/RefCnt(1),cnt/RefCnt(0),CLK_FSB,'0','0');
-
-FTCPE_cnt/RefCnt2: FTCPE port map (cnt/RefCnt(2),cnt/RefCnt_T(2),CLK_FSB,'0','0');
-cnt/RefCnt_T(2) <= (cnt/RefCnt(0) AND cnt/RefCnt(1));
-
-FTCPE_cnt/RefCnt3: FTCPE port map (cnt/RefCnt(3),cnt/RefCnt_T(3),CLK_FSB,'0','0');
-cnt/RefCnt_T(3) <= (cnt/RefCnt(0) AND cnt/RefCnt(1) AND cnt/RefCnt(2));
-
-FTCPE_cnt/RefCnt4: FTCPE port map (cnt/RefCnt(4),cnt/RefCnt_T(4),CLK_FSB,'0','0');
-cnt/RefCnt_T(4) <= (cnt/RefCnt(0) AND cnt/RefCnt(1) AND cnt/RefCnt(2) AND 
-	cnt/RefCnt(3));
-
-FTCPE_cnt/RefCnt5: FTCPE port map (cnt/RefCnt(5),cnt/RefCnt_T(5),CLK_FSB,'0','0');
-cnt/RefCnt_T(5) <= (cnt/RefCnt(0) AND cnt/RefCnt(1) AND cnt/RefCnt(2) AND 
-	cnt/RefCnt(3) AND cnt/RefCnt(4));
-
-FTCPE_cnt/RefCnt6: FTCPE port map (cnt/RefCnt(6),cnt/RefCnt_T(6),CLK_FSB,'0','0');
-cnt/RefCnt_T(6) <= (cnt/RefCnt(0) AND cnt/RefCnt(5) AND cnt/RefCnt(1) AND 
-	cnt/RefCnt(2) AND cnt/RefCnt(3) AND cnt/RefCnt(4));
-
-FTCPE_cnt/RefCnt7: FTCPE port map (cnt/RefCnt(7),cnt/RefCnt_T(7),CLK_FSB,'0','0');
-cnt/RefCnt_T(7) <= (cnt/RefCnt(0) AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND 
-	cnt/RefCnt(1) AND cnt/RefCnt(2) AND cnt/RefCnt(3) AND cnt/RefCnt(4));
-
-FDCPE_cnt/RefDone: FDCPE port map (cnt/RefDone,cnt/RefDone_D,CLK_FSB,'0','0');
-cnt/RefDone_D <= ((NOT cnt/RefDone AND NOT RefAck)
-	OR (NOT cnt/RefCnt(0) AND NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND 
-	NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4) AND 
-	NOT cnt/RefCnt(7)));
-
-FTCPE_cnt/TimeoutBPre: FTCPE port map (cnt/TimeoutBPre,cnt/TimeoutBPre_T,CLK_FSB,'0','0');
-cnt/TimeoutBPre_T <= ((cnt/TimeoutBPre AND nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT cnt/TimeoutBPre AND NOT nAS_FSB AND NOT cnt/RefCnt(0) AND 
-	NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND 
-	NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4) AND NOT cnt/RefCnt(7))
-	OR (NOT cnt/TimeoutBPre AND NOT cnt/RefCnt(0) AND NOT cnt/RefCnt(5) AND 
-	NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND NOT cnt/RefCnt(3) AND 
-	NOT cnt/RefCnt(4) AND NOT cnt/RefCnt(7) AND fsb/ASrf));
-
-FTCPE_cs/nOverlay0: FTCPE port map (cs/nOverlay0,cs/nOverlay0_T,CLK_FSB,NOT nRES,'0');
-cs/nOverlay0_T <= ((NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND 
-	NOT cs/nOverlay0 AND NOT nAS_FSB)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND 
-	NOT cs/nOverlay0 AND fsb/ASrf));
-
-FDCPE_cs/nOverlay1: FDCPE port map (cs/nOverlay1,cs/nOverlay0,CLK_FSB,'0','0',cs/nOverlay1_CE);
-cs/nOverlay1_CE <= (nAS_FSB AND NOT fsb/ASrf);
-
-FDCPE_fsb/ASrf: FDCPE port map (fsb/ASrf,NOT nAS_FSB,NOT CLK_FSB,'0','0');
-
-FDCPE_fsb/BERR0r: FDCPE port map (fsb/BERR0r,fsb/BERR0r_D,CLK_FSB,'0','0');
-fsb/BERR0r_D <= ((NOT TimeoutB AND NOT fsb/BERR0r)
-	OR (nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND 
-	NOT fsb/BERR0r));
-
-FDCPE_fsb/BERR1r: FDCPE port map (fsb/BERR1r,fsb/BERR1r_D,CLK_FSB,'0','0');
-fsb/BERR1r_D <= ((NOT BERR_IOBS AND NOT fsb/BERR1r)
-	OR (nAS_FSB AND NOT fsb/ASrf));
-
-FDCPE_fsb/Ready0r: FDCPE port map (fsb/Ready0r,fsb/Ready0r_D,CLK_FSB,'0','0');
-fsb/Ready0r_D <= ((nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-	NOT fsb/Ready0r AND NOT ram/RAMReady)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT fsb/Ready0r AND NOT ram/RAMReady));
-
-FDCPE_fsb/Ready1r: FDCPE port map (fsb/Ready1r,fsb/Ready1r_D,CLK_FSB,'0','0');
-fsb/Ready1r_D <= ((A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
-	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
-	cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND NOT iobs/IOReady AND 
-	NOT nADoutLE1)
-	OR (A_FSB(13) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
-	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
-	cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND NOT iobs/IOReady AND 
-	NOT nADoutLE1)
-	OR (nAS_FSB AND NOT fsb/ASrf)
-	OR (A_FSB(23) AND NOT fsb/Ready1r AND NOT iobs/IOReady)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT fsb/Ready1r AND 
-	NOT iobs/IOReady)
-	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-	NOT fsb/Ready1r AND NOT iobs/IOReady)
-	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-	NOT fsb/Ready1r AND NOT iobs/IOReady));
-
-FDCPE_fsb/Ready2r: FDCPE port map (fsb/Ready2r,fsb/Ready2r_D,CLK_FSB,'0','0');
-fsb/Ready2r_D <= ((nAS_FSB AND NOT fsb/ASrf)
-	OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(8) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(9) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(9) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(8) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r));
-
-FDCPE_fsb/VPA: FDCPE port map (fsb/VPA,fsb/VPA_D,CLK_FSB,'0','0');
-fsb/VPA_D <= ((EXP18_.EXP)
-	OR (BERR_IOBS AND fsb/VPA AND fsb/ASrf)
-	OR (fsb/BERR0r AND fsb/VPA AND fsb/ASrf)
-	OR (fsb/BERR1r AND fsb/VPA AND fsb/ASrf)
-	OR (fsb/VPA AND fsb/ASrf AND 
-	fsb/VPA__or00001/fsb/VPA__or00001_D2)
-	OR (fsb/VPA AND fsb/ASrf AND NOT $OpTx$FX_DC$602)
-	OR ($OpTx$FX_DC$602.EXP)
-	OR (NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND NOT nAS_FSB AND 
-	$OpTx$FX_DC$606)
-	OR (NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND fsb/ASrf AND 
-	$OpTx$FX_DC$606)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-	NOT fsb/Ready0r AND fsb/VPA AND NOT nAS_FSB AND NOT ram/RAMReady)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-	NOT fsb/Ready0r AND fsb/VPA AND fsb/ASrf AND NOT ram/RAMReady)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT fsb/Ready0r AND fsb/VPA AND NOT nAS_FSB AND NOT ram/RAMReady)
-	OR (BERR_IOBS AND fsb/VPA AND NOT nAS_FSB)
-	OR (fsb/BERR0r AND fsb/VPA AND NOT nAS_FSB)
-	OR (fsb/BERR1r AND fsb/VPA AND NOT nAS_FSB)
-	OR (fsb/VPA AND NOT nAS_FSB AND 
-	fsb/VPA__or00001/fsb/VPA__or00001_D2)
-	OR (fsb/VPA AND NOT nAS_FSB AND NOT $OpTx$FX_DC$602));
-
-
-fsb/VPA__or00001/fsb/VPA__or00001_D2 <= ((A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(9) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(8) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(9) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-	OR (A_FSB(8) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r));
-
-FDCPE_iobm/BERRrf: FDCPE port map (iobm/BERRrf,NOT nBERR_IOB,NOT CLK2X_IOB,'0','0');
-
-FDCPE_iobm/BERRrr: FDCPE port map (iobm/BERRrr,NOT nBERR_IOB,CLK2X_IOB,'0','0');
-
-FDCPE_iobm/DTACKrf: FDCPE port map (iobm/DTACKrf,NOT nDTACK_IOB,NOT CLK2X_IOB,'0','0');
-
-FDCPE_iobm/DTACKrr: FDCPE port map (iobm/DTACKrr,NOT nDTACK_IOB,CLK2X_IOB,'0','0');
-
-FTCPE_iobm/ES0: FTCPE port map (iobm/ES(0),iobm/ES_T(0),CLK2X_IOB,'0','0');
-iobm/ES_T(0) <= ((iobm/ES(0) AND NOT iobm/Er AND iobm/Er2)
-	OR (NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND 
-	NOT iobm/ES(3) AND NOT iobm/ES(4) AND iobm/Er)
-	OR (NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND 
-	NOT iobm/ES(3) AND NOT iobm/ES(4) AND NOT iobm/Er2));
-
-FDCPE_iobm/ES1: FDCPE port map (iobm/ES(1),iobm/ES_D(1),CLK2X_IOB,'0','0');
-iobm/ES_D(1) <= ((iobm/ES(0) AND iobm/ES(1))
-	OR (NOT iobm/ES(0) AND NOT iobm/ES(1))
-	OR (NOT iobm/Er AND iobm/Er2));
-
-FDCPE_iobm/ES2: FDCPE port map (iobm/ES(2),iobm/ES_D(2),CLK2X_IOB,'0','0');
-iobm/ES_D(2) <= ((NOT iobm/ES(0) AND NOT iobm/ES(2))
-	OR (NOT iobm/ES(1) AND NOT iobm/ES(2))
-	OR (NOT iobm/Er AND iobm/Er2)
-	OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2))
-	OR (NOT iobm/ES(2) AND NOT iobm/ES(3) AND iobm/ES(4)));
-
-FTCPE_iobm/ES3: FTCPE port map (iobm/ES(3),iobm/ES_T(3),CLK2X_IOB,'0','0');
-iobm/ES_T(3) <= ((iobm/ES(3) AND NOT iobm/Er AND iobm/Er2)
-	OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND iobm/Er)
-	OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND NOT iobm/Er2));
-
-FTCPE_iobm/ES4: FTCPE port map (iobm/ES(4),iobm/ES_T(4),CLK2X_IOB,'0','0');
-iobm/ES_T(4) <= ((iobm/ES(4) AND NOT iobm/Er AND iobm/Er2)
-	OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND 
-	iobm/ES(3) AND iobm/Er)
-	OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND 
-	iobm/ES(3) AND NOT iobm/Er2)
-	OR (iobm/ES(0) AND iobm/ES(1) AND NOT iobm/ES(2) AND 
-	NOT iobm/ES(3) AND iobm/ES(4)));
-
-FDCPE_iobm/ETACK: FDCPE port map (iobm/ETACK,iobm/ETACK_D,CLK2X_IOB,'0','0');
-iobm/ETACK_D <= (NOT nVMA_IOB AND NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND 
-	NOT iobm/ES(3) AND iobm/ES(4));
-
-FDCPE_iobm/Er: FDCPE port map (iobm/Er,E_IOB,NOT CLK_IOB,'0','0');
-
-FDCPE_iobm/Er2: FDCPE port map (iobm/Er2,iobm/Er,CLK2X_IOB,'0','0');
-
-FDCPE_iobm/IOREQr: FDCPE port map (iobm/IOREQr,IOREQ,NOT CLK2X_IOB,'0','0');
-
-FDCPE_iobm/IOS_FSM_FFd1: FDCPE port map (iobm/IOS_FSM_FFd1,iobm/IOS_FSM_FFd2,CLK2X_IOB,'0','0');
-
-FDCPE_iobm/IOS_FSM_FFd2: FDCPE port map (iobm/IOS_FSM_FFd2,iobm/IOS_FSM_FFd2_D,CLK2X_IOB,'0','0');
-iobm/IOS_FSM_FFd2_D <= ((iobm/IOS_FSM_FFd3 AND CLK_IOB AND iobm/ETACK)
-	OR (iobm/IOS_FSM_FFd3 AND CLK_IOB AND iobm/BERRrf AND 
-	iobm/BERRrr)
-	OR (iobm/IOS_FSM_FFd3 AND CLK_IOB AND iobm/DTACKrf AND 
-	iobm/DTACKrr)
-	OR (iobm/IOS_FSM_FFd3 AND CLK_IOB AND iobm/RESrf AND 
-	iobm/RESrr));
-
-FDCPE_iobm/IOS_FSM_FFd3: FDCPE port map (iobm/IOS_FSM_FFd3,iobm/IOS_FSM_FFd3_D,CLK2X_IOB,'0','0');
-iobm/IOS_FSM_FFd3_D <= ((NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4)
-	OR (NOT iobm/IOS_FSM_FFd4 AND CLK_IOB AND iobm/ETACK)
-	OR (NOT iobm/IOS_FSM_FFd4 AND CLK_IOB AND iobm/BERRrf AND 
-	iobm/BERRrr)
-	OR (NOT iobm/IOS_FSM_FFd4 AND CLK_IOB AND iobm/DTACKrf AND 
-	iobm/DTACKrr)
-	OR (NOT iobm/IOS_FSM_FFd4 AND CLK_IOB AND iobm/RESrf AND 
-	iobm/RESrr));
-
-FDCPE_iobm/IOS_FSM_FFd4: FDCPE port map (iobm/IOS_FSM_FFd4,iobm/IOS_FSM_FFd5,CLK2X_IOB,'0','0');
-
-FDCPE_iobm/IOS_FSM_FFd5: FDCPE port map (iobm/IOS_FSM_FFd5,iobm/IOS_FSM_FFd6,CLK2X_IOB,'0','0');
-
-FDCPE_iobm/IOS_FSM_FFd6: FDCPE port map (iobm/IOS_FSM_FFd6,iobm/IOS_FSM_FFd7,CLK2X_IOB,'0','0');
-
-FDCPE_iobm/IOS_FSM_FFd7: FDCPE port map (iobm/IOS_FSM_FFd7,iobm/IOS_FSM_FFd7_D,CLK2X_IOB,'0','0');
-iobm/IOS_FSM_FFd7_D <= (NOT CLK_IOB AND iobm/IOREQr AND iobm/IOS_FSM_FFd8);
-
-FDCPE_iobm/IOS_FSM_FFd8: FDCPE port map (iobm/IOS_FSM_FFd8,iobm/IOS_FSM_FFd8_D,CLK2X_IOB,'0','0');
-iobm/IOS_FSM_FFd8_D <= ((NOT iobm/IOS_FSM_FFd8 AND NOT iobm/IOS_FSM_FFd1)
-	OR (NOT CLK_IOB AND iobm/IOREQr AND NOT iobm/IOS_FSM_FFd1));
-
-FDCPE_iobm/RESrf: FDCPE port map (iobm/RESrf,NOT nRES,NOT CLK2X_IOB,'0','0');
-
-FDCPE_iobm/RESrr: FDCPE port map (iobm/RESrr,NOT nRES,CLK2X_IOB,'0','0');
-
-FDCPE_iobm/VPArf: FDCPE port map (iobm/VPArf,NOT nVPA_IOB,NOT CLK2X_IOB,'0','0');
-
-FDCPE_iobm/VPArr: FDCPE port map (iobm/VPArr,NOT nVPA_IOB,CLK2X_IOB,'0','0');
-
-FDCPE_iobs/Clear1: FDCPE port map (iobs/Clear1,iobs/Clear1_D,CLK_FSB,'0','0');
-iobs/Clear1_D <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND NOT nADoutLE1);
-
-FDCPE_iobs/IOACTr: FDCPE port map (iobs/IOACTr,IOACT,CLK_FSB,'0','0');
-
-FDCPE_iobs/IOL1: FDCPE port map (iobs/IOL1,NOT nLDS_FSB,CLK_FSB,'0','0',iobs/Load1);
-
-FTCPE_iobs/IORW1: FTCPE port map (iobs/IORW1,iobs/IORW1_T,CLK_FSB,'0','0');
-iobs/IORW1_T <= ((iobs/Once)
-	OR (NOT nADoutLE1)
-	OR (nVMA_IOB_OBUF.EXP)
-	OR (NOT nWE_FSB AND NOT iobs/IORW1)
-	OR (nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21))
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19))
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18))
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17))
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16))
-	OR (NOT A_FSB(23) AND NOT A_FSB(20))
-	OR (nWE_FSB AND iobs/IORW1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT iobs/IORW1));
-
-FTCPE_iobs/IOReady: FTCPE port map (iobs/IOReady,iobs/IOReady_T,CLK_FSB,'0','0');
-iobs/IOReady_T <= ((iobs/IOReady AND nAS_FSB AND NOT fsb/ASrf)
-	OR (iobs/Once AND IOBERR AND iobs/IOReady AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND nADoutLE1)
-	OR (iobs/Once AND NOT IOBERR AND NOT iobs/IOReady AND NOT nAS_FSB AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND nADoutLE1)
-	OR (iobs/Once AND NOT IOBERR AND NOT iobs/IOReady AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND fsb/ASrf AND nADoutLE1));
-
-FDCPE_iobs/IOU1: FDCPE port map (iobs/IOU1,NOT nUDS_FSB,CLK_FSB,'0','0',iobs/Load1);
-
-FDCPE_iobs/Load1: FDCPE port map (iobs/Load1,iobs/Load1_D,CLK_FSB,'0','0');
-iobs/Load1_D <= ((iobs/Once)
-	OR (NOT nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21))
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19))
-	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18))
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17))
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16))
-	OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21))
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	cs/nOverlay1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(20))
-	OR (nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1));
-
-FDCPE_iobs/Once: FDCPE port map (iobs/Once,iobs/Once_D,CLK_FSB,'0','0');
-iobs/Once_D <= ((RA_2_OBUF.EXP)
-	OR (A_FSB(23) AND NOT iobs/Once AND iobs/PS_FSM_FFd1)
-	OR (NOT iobs/Once AND iobs/PS_FSM_FFd2 AND NOT nADoutLE1)
-	OR (NOT iobs/Once AND iobs/PS_FSM_FFd1 AND NOT nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND NOT iobs/Once)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
-	NOT iobs/Once)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND NOT iobs/Once)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND NOT iobs/Once)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND NOT iobs/Once)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND NOT iobs/Once)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT iobs/Once AND nWE_FSB)
-	OR (nAS_FSB AND NOT fsb/ASrf)
-	OR (A_FSB(23) AND NOT iobs/Once AND iobs/PS_FSM_FFd2)
-	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND NOT iobs/Once)
-	OR (A_FSB(22) AND NOT iobs/Once AND iobs/PS_FSM_FFd2)
-	OR (A_FSB(22) AND NOT iobs/Once AND iobs/PS_FSM_FFd1));
-
-FDCPE_iobs/PS_FSM_FFd1: FDCPE port map (iobs/PS_FSM_FFd1,iobs/PS_FSM_FFd1_D,CLK_FSB,'0','0');
-iobs/PS_FSM_FFd1_D <= ((iobs/PS_FSM_FFd2)
-	OR (iobs/PS_FSM_FFd1 AND iobs/IOACTr));
-
-FDCPE_iobs/PS_FSM_FFd2: FDCPE port map (iobs/PS_FSM_FFd2,iobs/PS_FSM_FFd2_D,CLK_FSB,'0','0');
-iobs/PS_FSM_FFd2_D <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21) AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	cs/nOverlay1 AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (iobs/PS_FSM_FFd2 AND iobs/PS_FSM_FFd1 AND 
-	iobs/IOACTr)
-	OR (NOT iobs/PS_FSM_FFd2 AND iobs/PS_FSM_FFd1 AND 
-	NOT iobs/IOACTr)
-	OR (iobs/Once AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND 
-	nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND 
-	NOT fsb/ASrf AND nADoutLE1));
-
-
-nADoutLE0 <= (NOT ALE0M AND NOT ALE0S);
-
-FDCPE_nADoutLE1: FDCPE port map (nADoutLE1,nADoutLE1_D,CLK_FSB,'0','0');
-nADoutLE1_D <= ((iobs/Load1)
-	OR (NOT iobs/Clear1 AND NOT nADoutLE1));
-
-FDCPE_nAS_IOB: FDCPE port map (nAS_IOB,nAS_IOB_D,NOT CLK2X_IOB,'0','0');
-nAS_IOB_D <= (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-	NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND NOT iobm/IOS_FSM_FFd7);
-
-
-nAoutOE <= '0';
-
-
-nBERR_FSB <= ((nAS_FSB)
-	OR (NOT BERR_IOBS AND NOT TimeoutB AND NOT fsb/BERR0r AND NOT fsb/BERR1r)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND 
-	NOT BERR_IOBS AND NOT fsb/BERR0r AND NOT fsb/BERR1r));
-
-FDCPE_nCAS: FDCPE port map (nCAS,NOT ram/RASEL,NOT CLK_FSB,'0','0');
-
-FDCPE_nDTACK_FSB: FDCPE port map (nDTACK_FSB,nDTACK_FSB_D,CLK_FSB,'0','0');
-nDTACK_FSB_D <= ((EXP21_.EXP)
-	OR (A_FSB(23) AND NOT fsb/Ready1r AND NOT iobs/IOReady AND 
-	nDTACK_FSB)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-	NOT fsb/Ready0r AND nDTACK_FSB AND NOT ram/RAMReady)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT fsb/Ready1r AND 
-	NOT iobs/IOReady AND nDTACK_FSB)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT fsb/Ready0r AND nDTACK_FSB AND NOT ram/RAMReady)
-	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-	NOT fsb/Ready1r AND NOT iobs/IOReady AND nDTACK_FSB)
-	OR ($OpTx$FX_DC$606.EXP)
-	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-	NOT fsb/Ready1r AND NOT iobs/IOReady AND nDTACK_FSB)
-	OR (A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
-	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
-	cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND NOT iobs/IOReady AND 
-	nDTACK_FSB AND NOT nADoutLE1)
-	OR (A_FSB(13) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
-	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
-	cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND NOT iobs/IOReady AND 
-	nDTACK_FSB AND NOT nADoutLE1)
-	OR (A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND 
-	nDTACK_FSB)
-	OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND 
-	nDTACK_FSB)
-	OR (BERR_IOBS AND nDTACK_FSB)
-	OR (fsb/BERR0r AND nDTACK_FSB)
-	OR (fsb/BERR1r AND nDTACK_FSB)
-	OR (nAS_FSB AND NOT fsb/ASrf)
-	OR (nDTACK_FSB AND NOT $OpTx$FX_DC$602));
-
-FDCPE_nDinLE: FDCPE port map (nDinLE,nDinLE_D,NOT CLK2X_IOB,'0','0');
-nDinLE_D <= (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4);
-
-
-nDinOE <= ((A_FSB(23) AND nWE_FSB AND NOT nAS_FSB)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND nWE_FSB AND 
-	NOT nAS_FSB));
-
-FDCPE_nDoutOE: FDCPE port map (nDoutOE,nDoutOE_D,CLK2X_IOB,'0','0');
-nDoutOE_D <= ((NOT IORW0)
-	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-	NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND NOT iobm/IOS_FSM_FFd7 AND 
-	NOT iobm/IOS_FSM_FFd2));
-
-FDCPE_nLDS_IOB: FDCPE port map (nLDS_IOB,nLDS_IOB_D,NOT CLK2X_IOB,'0','0');
-nLDS_IOB_D <= ((NOT IOL0)
-	OR (IORW0 AND NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-	NOT iobm/IOS_FSM_FFd5)
-	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-	NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND NOT iobm/IOS_FSM_FFd7));
-
-
-nOE <= NOT ((nWE_FSB AND NOT nAS_FSB));
-
-
-nRAMLWE <= NOT ((NOT nWE_FSB AND NOT nLDS_FSB AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND 
-	NOT ram/RAMDIS1));
-
-
-nRAMUWE <= NOT ((NOT nWE_FSB AND NOT nUDS_FSB AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND 
-	NOT ram/RAMDIS1));
-
-
-nRAS <= NOT (((RefAck)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-	NOT ram/RAMDIS2 AND NOT nAS_FSB AND NOT ram/RAMDIS1)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND NOT ram/RAMDIS1)));
-
-
-nROMCS <= NOT (((NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20))
-	OR (NOT A_FSB(23) AND NOT A_FSB(21) AND NOT A_FSB(20) AND 
-	NOT cs/nOverlay1)));
-
-
-nROMWE <= NOT ((NOT nWE_FSB AND NOT nAS_FSB));
-
-FDCPE_nUDS_IOB: FDCPE port map (nUDS_IOB,nUDS_IOB_D,NOT CLK2X_IOB,'0','0');
-nUDS_IOB_D <= ((NOT IOU0)
-	OR (IORW0 AND NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-	NOT iobm/IOS_FSM_FFd5)
-	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-	NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND NOT iobm/IOS_FSM_FFd7));
-
-FTCPE_nVMA_IOB: FTCPE port map (nVMA_IOB,nVMA_IOB_T,CLK2X_IOB,'0','0');
-nVMA_IOB_T <= ((NOT nVMA_IOB AND NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND 
-	NOT iobm/ES(3) AND NOT iobm/ES(4))
-	OR (nVMA_IOB AND iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND 
-	NOT iobm/ES(3) AND NOT iobm/ES(4) AND IOACT AND iobm/VPArf AND iobm/VPArr));
-
-
-nVPA_FSB <= NOT ((fsb/VPA AND NOT nAS_FSB));
-
-FDCPE_ram/BACTr: FDCPE port map (ram/BACTr,ram/BACTr_D,CLK_FSB,'0','0');
-ram/BACTr_D <= (nAS_FSB AND NOT fsb/ASrf);
-
-FTCPE_ram/Once: FTCPE port map (ram/Once,ram/Once_T,CLK_FSB,'0','0');
-ram/Once_T <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/Once AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3 AND fsb/ASrf)
-	OR (ram/Once AND nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3));
-
-FDCPE_ram/RAMDIS1: FDCPE port map (ram/RAMDIS1,ram/RAMDIS1_D,CLK_FSB,'0','0');
-ram/RAMDIS1_D <= ((RA_4_OBUF.EXP)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND NOT nAS_FSB AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
-	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (ram/Once AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
-	OR (NOT cnt/RefDone AND ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
-	OR (NOT cnt/RefDone AND nAS_FSB AND NOT ram/RS_FSM_FFd1 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND NOT fsb/ASrf)
-	OR (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1)
-	OR (NOT ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3)
-	OR (NOT ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3)
-	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT nAS_FSB AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/BACTr AND fsb/ASrf));
-
-FTCPE_ram/RAMDIS2: FTCPE port map (ram/RAMDIS2,ram/RAMDIS2_T,CLK_FSB,'0','0');
-ram/RAMDIS2_T <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND ram/Once AND 
-	NOT cnt/RefDone AND NOT ram/RAMDIS2 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
-	fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND fsb/ASrf)
-	OR (ram/RAMDIS2 AND nAS_FSB AND NOT fsb/ASrf)
-	OR (ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND 
-	ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
-	OR (ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND 
-	ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND fsb/ASrf)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND ram/Once AND 
-	NOT cnt/RefDone AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND 
-	cnt/RefCnt(7)));
-
-FDCPE_ram/RAMReady: FDCPE port map (ram/RAMReady,ram/RAMReady_D,CLK_FSB,'0','0');
-ram/RAMReady_D <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
-	NOT ram/RS_FSM_FFd1 AND fsb/ASrf)
-	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/Once AND NOT ram/RS_FSM_FFd1 AND fsb/ASrf)
-	OR (cnt/RefCnt(5).EXP)
-	OR (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3)
-	OR (NOT ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1)
-	OR (NOT ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3)
-	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT nAS_FSB AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/BACTr AND fsb/ASrf)
-	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (NOT A_FSB(21) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (NOT A_FSB(21) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/Once AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd1));
-
-FDCPE_ram/RASEL: FDCPE port map (ram/RASEL,ram/RASEL_D,CLK_FSB,'0','0');
-ram/RASEL_D <= ((A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT cnt/RefDone AND nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
-	NOT fsb/ASrf)
-	OR (NOT cnt/RefDone AND nAS_FSB AND ram/RS_FSM_FFd1 AND 
-	ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
-	NOT fsb/ASrf)
-	OR (nDinOE_OBUF.EXP)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND fsb/ASrf)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND NOT nAS_FSB AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (NOT ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3)
-	OR (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3)
-	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT nAS_FSB AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7)));
-
-FTCPE_ram/RS_FSM_FFd1: FTCPE port map (ram/RS_FSM_FFd1,ram/RS_FSM_FFd1_T,CLK_FSB,'0','0');
-ram/RS_FSM_FFd1_T <= ((ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
-	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/Once AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3 AND fsb/ASrf));
-
-FTCPE_ram/RS_FSM_FFd2: FTCPE port map (ram/RS_FSM_FFd2,ram/RS_FSM_FFd2_T,CLK_FSB,'0','0');
-ram/RS_FSM_FFd2_T <= ((nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-	NOT cnt/RefCnt(5) AND NOT fsb/ASrf)
-	OR (nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-	NOT cnt/RefCnt(6) AND NOT fsb/ASrf)
-	OR (nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-	NOT cnt/RefCnt(7) AND NOT fsb/ASrf)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT nAS_FSB AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND fsb/ASrf)
-	OR (NOT cnt/RefDone AND nAS_FSB AND ram/RS_FSM_FFd2 AND 
-	ram/RS_FSM_FFd1 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
-	NOT fsb/ASrf)
-	OR (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3)
-	OR (cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-	NOT cnt/RefCnt(5) AND ram/BACTr)
-	OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-	NOT cnt/RefCnt(6) AND ram/BACTr)
-	OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND ram/BACTr AND 
-	NOT cnt/RefCnt(7)));
-
-FTCPE_ram/RS_FSM_FFd3: FTCPE port map (ram/RS_FSM_FFd3,ram/RS_FSM_FFd3_T,CLK_FSB,'0','0');
-ram/RS_FSM_FFd3_T <= ((A_FSB(22) AND NOT A_FSB(21) AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (A_FSB(22) AND cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3 AND NOT fsb/ASrf)
-	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (NOT cnt/RefDone AND NOT nAS_FSB AND ram/RS_FSM_FFd2 AND 
-	ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND 
-	cnt/RefCnt(7))
-	OR (NOT cnt/RefDone AND ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND 
-	ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
-	fsb/ASrf)
-	OR (A_FSB(23) AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3)
-	OR (ram/Once AND cnt/RefDone AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3 AND NOT cnt/RefCnt(5))
-	OR (ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3 AND NOT cnt/RefCnt(6))
-	OR (ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3 AND NOT cnt/RefCnt(7)));
-
-Register Legend:
- FDCPE (Q,D,C,CLR,PRE,CE); 
- FTCPE (Q,D,C,CLR,PRE,CE); 
- LDCP  (Q,D,G,CLR,PRE); 
-
-******************************  Device Pin Out *****************************
-
-Device : XC95144XL-10-TQ100
-
-
-   --------------------------------------------------  
-  /100 98  96  94  92  90  88  86  84  82  80  78  76  \
- |   99  97  95  93  91  89  87  85  83  81  79  77    |
- | 1                                               75  | 
- | 2                                               74  | 
- | 3                                               73  | 
- | 4                                               72  | 
- | 5                                               71  | 
- | 6                                               70  | 
- | 7                                               69  | 
- | 8                                               68  | 
- | 9                                               67  | 
- | 10                                              66  | 
- | 11                                              65  | 
- | 12                                              64  | 
- | 13              XC95144XL-10-TQ100              63  | 
- | 14                                              62  | 
- | 15                                              61  | 
- | 16                                              60  | 
- | 17                                              59  | 
- | 18                                              58  | 
- | 19                                              57  | 
- | 20                                              56  | 
- | 21                                              55  | 
- | 22                                              54  | 
- | 23                                              53  | 
- | 24                                              52  | 
- | 25                                              51  | 
- |   27  29  31  33  35  37  39  41  43  45  47  49    |
-  \26  28  30  32  34  36  38  40  42  44  46  48  50  /
-   --------------------------------------------------  
-
-
-Pin Signal                         Pin Signal                        
-No. Name                           No. Name                          
-  1 KPR                              51 VCC                           
-  2 KPR                              52 nUDS_FSB                      
-  3 KPR                              53 RA<6>                         
-  4 KPR                              54 nDTACK_IOB                    
-  5 VCC                              55 RA<7>                         
-  6 nLDS_IOB                         56 A_FSB<4>                      
-  7 nUDS_IOB                         57 VCC                           
-  8 nDoutOE                          58 RA<8>                         
-  9 A_FSB<22>                        59 nVPA_IOB                      
- 10 nAS_IOB                          60 RA<9>                         
- 11 nDTACK_FSB                       61 nWE_FSB                       
- 12 A_FSB<9>                         62 GND                           
- 13 nAS_FSB                          63 RA<11>                        
- 14 nBERR_FSB                        64 A_FSB<8>                      
- 15 A_FSB<5>                         65 RA<10>                        
- 16 A_FSB<2>                         66 A_FSB<23>                     
- 17 nOE                              67 nADoutLE0                     
- 18 nBERR_IOB                        68 A_FSB<21>                     
- 19 A_FSB<6>                         69 GND                           
- 20 A_FSB<7>                         70 nAoutOE                       
- 21 GND                              71 A_FSB<20>                     
- 22 CLK2X_IOB                        72 nDinLE                        
- 23 CLK_FSB                          73 A_FSB<19>                     
- 24 nRAS                             74 nCAS                          
- 25 nLDS_FSB                         75 GND                           
- 26 VCC                              76 A_FSB<18>                     
- 27 CLK_IOB                          77 nRAMLWE                       
- 28 KPR                              78 A_FSB<3>                      
- 29 nADoutLE1                        79 nRAMUWE                       
- 30 KPR                              80 A_FSB<15>                     
- 31 GND                              81 nROMWE                        
- 32 KPR                              82 A_FSB<13>                     
- 33 nVMA_IOB                         83 TDO                           
- 34 KPR                              84 GND                           
- 35 RA<1>                            85 nVPA_FSB                      
- 36 KPR                              86 A_FSB<11>                     
- 37 KPR                              87 RA<0>                         
- 38 VCC                              88 VCC                           
- 39 RA<3>                            89 A_FSB<10>                     
- 40 KPR                              90 A_FSB<1>                      
- 41 KPR                              91 RA<2>                         
- 42 nROMCS                           92 A_FSB<12>                     
- 43 KPR                              93 A_FSB<14>                     
- 44 GND                              94 RA<4>                         
- 45 TDI                              95 A_FSB<16>                     
- 46 KPR                              96 A_FSB<17>                     
- 47 TMS                              97 nDinOE                        
- 48 TCK                              98 VCC                           
- 49 E_IOB                            99 nRES                          
- 50 RA<5>                           100 GND                           
-
-
-Legend :  NC  = Not Connected, unbonded pin
-         PGND = Unused I/O configured as additional Ground pin
-         TIE  = Unused I/O floating -- must tie to VCC, GND or other signal
-         KPR  = Unused I/O with weak keeper (leave unconnected)
-         VCC  = Dedicated Power Pin
-         GND  = Dedicated Ground Pin
-         TDI  = Test Data In, JTAG pin
-         TDO  = Test Data Out, JTAG pin
-         TCK  = Test Clock, JTAG pin
-         TMS  = Test Mode Select, JTAG pin
-  PROHIBITED  = User reserved pin
-****************************  Compiler Options  ****************************
-
-Following is a list of all global compiler options used by the fitter run.
-
-Device(s) Specified                         : xc95144xl-10-TQ100
-Optimization Method                         : SPEED
-Multi-Level Logic Optimization              : ON
-Ignore Timing Specifications                : OFF
-Default Register Power Up Value             : LOW
-Keep User Location Constraints              : ON
-What-You-See-Is-What-You-Get                : OFF
-Exhaustive Fitting                          : OFF
-Keep Unused Inputs                          : OFF
-Slew Rate                                   : FAST
-Power Mode                                  : STD
-Ground on Unused IOs                        : OFF
-Set I/O Pin Termination                     : KEEPER
-Global Clock Optimization                   : ON
-Global Set/Reset Optimization               : ON
-Global Ouput Enable Optimization            : ON
-Input Limit                                 : 54
-Pterm Limit                                 : 25
-</pre>
-<form><span class="pgRef"><table width="90%" align="center"><tr>
-<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
-<td align="right"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page"></td>
-</tr></table></span></form>
-</body></html>
diff --git a/cpld/XC95144XL/MXSE_html/fit/ascii.htm b/cpld/XC95144XL/MXSE_html/fit/ascii.htm
index ff216cd..63b6e4b 100644
--- a/cpld/XC95144XL/MXSE_html/fit/ascii.htm
+++ b/cpld/XC95144XL/MXSE_html/fit/ascii.htm
@@ -3,7 +3,7 @@
  
 cpldfit:  version P.20131013                        Xilinx Inc.
                                   Fitter Report
-Design Name: MXSE                                Date:  2-14-2022,  7:35PM
+Design Name: MXSE                                Date:  3-27-2022, 10:08AM
 Device Used: XC95144XL-10-TQ100
 Fitting Status: Successful
 
@@ -11,22 +11,22 @@ Fitting Status: Successful
 
 Macrocells     Product Terms    Function Block   Registers      Pins           
 Used/Tot       Used/Tot         Inps Used/Tot    Used/Tot       Used/Tot       
-105/144 ( 73%) 434 /720  ( 60%) 227/432 ( 53%)   80 /144 ( 56%) 67 /81  ( 83%)
+115/144 ( 80%) 458 /720  ( 64%) 258/432 ( 60%)   89 /144 ( 62%) 74 /81  ( 91%)
 
 ** Function Block Resources **
 
 Function    Mcells      FB Inps     Pterms      IO          
 Block       Used/Tot    Used/Tot    Used/Tot    Used/Tot    
-FB1          18/18*      16/54       17/90      11/11*
-FB2           5/18        3/54        5/90       8/10
-FB3           6/18       39/54       81/90      10/10*
-FB4          18/18*      29/54       34/90       9/10
-FB5          13/18       31/54       81/90       8/10
-FB6          18/18*      34/54       62/90      10/10*
-FB7          15/18       39/54       73/90       6/10
-FB8          12/18       36/54       81/90       5/10
+FB1          18/18*      21/54       23/90      11/11*
+FB2          13/18        9/54       12/90       8/10
+FB3           7/18       38/54       81/90      10/10*
+FB4          18/18*      41/54       41/90      10/10*
+FB5          14/18       42/54       81/90       8/10
+FB6          18/18*      34/54       64/90      10/10*
+FB7          15/18       36/54       75/90      10/10*
+FB8          12/18       37/54       81/90       7/10
              -----       -----       -----      -----    
-            105/144     227/432     434/720     67/81 
+            115/144     258/432     458/720     74/81 
 
 * - Resource is exhausted
 
@@ -42,18 +42,18 @@ Global set/reset net(s) unused.
 
 Signal Type    Required     Mapped  |  Pin Type            Used    Total 
 ------------------------------------|------------------------------------
-Input         :   32          32    |  I/O              :    61      73
-Output        :   32          32    |  GCK/IO           :     3       3
+Input         :   36          36    |  I/O              :    68      73
+Output        :   35          35    |  GCK/IO           :     3       3
 Bidirectional :    0           0    |  GTS/IO           :     3       4
 GCK           :    3           3    |  GSR/IO           :     0       1
 GTS           :    0           0    |
 GSR           :    0           0    |
                  ----        ----
-        Total     67          67
+        Total     74          74
 
 ** Power Data **
 
-There are 105 macrocells in high performance mode (MCHP).
+There are 115 macrocells in high performance mode (MCHP).
 There are 0 macrocells in low power mode (MCLP).
 End of Mapped Resource Summary
 **************************  Errors and Warnings  ***************************
@@ -75,165 +75,181 @@ INFO:Cpld - Inferring BUFG constraint for signal 'CLK_IOB' based upon the LOC
    in your design. Note that for certain device families the output of a BUFG
    constraint can not drive a gated clock, and the BUFG constraint will be
    ignored.
+WARNING:Cpld:1007 - Removing unused input(s) 'SW<2>'.  The input(s) are unused
+   after optimization. Please verify functionality via simulation.
 *************************  Summary of Mapped Logic  ************************
 
-** 32 Outputs **
+** 35 Outputs **
 
-Signal              Total Total Loc     Pin  Pin     Pin     Pwr  Slew Reg Init
-Name                Pts   Inps          No.  Type    Use     Mode Rate State
-nDTACK_FSB          23    32    FB3_9   28   I/O     O       STD  FAST RESET
-nROMWE              1     2     FB3_17  34   I/O     O       STD  FAST 
-nAoutOE             0     0     FB4_2   87   I/O     O       STD  FAST 
-nDoutOE             2     4     FB4_5   89   I/O     O       STD  FAST RESET
-nDinOE              2     6     FB4_6   90   I/O     O       STD  FAST 
-nVPA_FSB            1     2     FB4_11  93   I/O     O       STD  FAST 
-nROMCS              2     5     FB5_2   35   I/O     O       STD  FAST 
-nCAS                1     1     FB5_5   36   I/O     O       STD  FAST RESET
-nOE                 1     2     FB5_6   37   I/O     O       STD  FAST 
-RA<4>               2     3     FB5_9   40   I/O     O       STD  FAST 
-RA<3>               2     3     FB5_11  41   I/O     O       STD  FAST 
-RA<5>               2     3     FB5_12  42   I/O     O       STD  FAST 
-RA<2>               2     3     FB5_14  43   I/O     O       STD  FAST 
-RA<6>               2     3     FB5_15  46   I/O     O       STD  FAST 
-nVMA_IOB            2     9     FB6_2   74   I/O     O       STD  FAST RESET
-nLDS_IOB            4     6     FB6_9   79   I/O     O       STD  FAST RESET
-nUDS_IOB            4     6     FB6_11  80   I/O     O       STD  FAST RESET
-nAS_IOB             2     4     FB6_12  81   I/O     O       STD  FAST RESET
-nADoutLE1           2     3     FB6_14  82   I/O     O       STD  FAST SET
-nADoutLE0           1     2     FB6_15  85   I/O     O       STD  FAST 
-nDinLE              2     3     FB6_17  86   I/O     O       STD  FAST RESET
-RA<1>               2     3     FB7_2   50   I/O     O       STD  FAST 
-RA<7>               2     3     FB7_5   52   I/O     O       STD  FAST 
-RA<0>               2     3     FB7_6   53   I/O     O       STD  FAST 
-RA<8>               7     7     FB7_8   54   I/O     O       STD  FAST 
-RA<10>              1     1     FB7_9   55   I/O     O       STD  FAST 
-RA<9>               2     3     FB7_11  56   I/O     O       STD  FAST 
-RA<11>              1     1     FB8_2   63   I/O     O       STD  FAST 
-nRAS                3     8     FB8_5   64   I/O     O       STD  FAST 
-nRAMLWE             1     5     FB8_6   65   I/O     O       STD  FAST 
-nRAMUWE             1     5     FB8_8   66   I/O     O       STD  FAST 
-nBERR_FSB           3     9     FB8_12  70   I/O     O       STD  FAST 
+Signal                         Total Total Loc     Pin  Pin     Pin     Pwr  Slew Reg Init
+Name                           Pts   Inps          No.  Type    Use     Mode Rate State
+nDTACK_FSB                     23    32    FB3_9   28   I/O     O       STD  FAST RESET
+nROMWE                         1     2     FB3_17  34   I/O     O       STD  FAST 
+nAoutOE                        3     4     FB4_2   87   I/O     O       STD  FAST SET
+nDoutOE                        2     3     FB4_5   89   I/O     O       STD  FAST RESET
+nDinOE                         3     7     FB4_6   90   I/O     O       STD  FAST 
+nVPA_FSB                       1     2     FB4_11  93   I/O     O       STD  FAST 
+nROMCS                         3     6     FB5_2   35   I/O     O       STD  FAST 
+nCAS                           1     1     FB5_5   36   I/O     O       STD  FAST RESET
+nOE                            1     2     FB5_6   37   I/O     O       STD  FAST 
+RA<4>                          2     3     FB5_9   40   I/O     O       STD  FAST 
+RA<3>                          2     3     FB5_11  41   I/O     O       STD  FAST 
+RA<5>                          2     3     FB5_12  42   I/O     O       STD  FAST 
+RA<2>                          2     3     FB5_14  43   I/O     O       STD  FAST 
+RA<6>                          2     3     FB5_15  46   I/O     O       STD  FAST 
+nVMA_IOB                       3     10    FB6_2   74   I/O     O       STD  FAST RESET
+nLDS_IOB                       4     6     FB6_9   79   I/O     O       STD  FAST RESET
+nUDS_IOB                       4     6     FB6_11  80   I/O     O       STD  FAST RESET
+nAS_IOB                        3     4     FB6_12  81   I/O     O       STD  FAST RESET
+nADoutLE1                      2     3     FB6_14  82   I/O     O       STD  FAST SET
+nADoutLE0                      1     2     FB6_15  85   I/O     O       STD  FAST 
+nDinLE                         1     2     FB6_17  86   I/O     O       STD  FAST RESET
+RA<1>                          2     3     FB7_2   50   I/O     O       STD  FAST 
+RA<7>                          2     3     FB7_5   52   I/O     O       STD  FAST 
+RA<0>                          2     3     FB7_6   53   I/O     O       STD  FAST 
+RA<8>                          7     7     FB7_8   54   I/O     O       STD  FAST 
+RA<10>                         1     1     FB7_9   55   I/O     O       STD  FAST 
+RA<9>                          2     3     FB7_11  56   I/O     O       STD  FAST 
+CLK25EN                        1     1     FB7_12  58   I/O     O       STD  FAST 
+CLK20EN                        1     1     FB7_14  59   I/O     O       STD  FAST 
+RA<11>                         1     1     FB8_2   63   I/O     O       STD  FAST 
+nRAS                           3     8     FB8_5   64   I/O     O       STD  FAST 
+nRAMLWE                        1     5     FB8_6   65   I/O     O       STD  FAST 
+nRAMUWE                        1     5     FB8_8   66   I/O     O       STD  FAST 
+nBERR_FSB                      3     9     FB8_12  70   I/O     O       STD  FAST 
+nBR_IOB                        1     6     FB8_15  72   I/O     O       STD  FAST SET
 
-** 73 Buried Nodes **
+** 80 Buried Nodes **
 
-Signal              Total Total Loc     Pwr  Reg Init
-Name                Pts   Inps          Mode State
-iobs/IOACTr         1     1     FB1_1   STD  RESET
-iobm/IOREQr         1     1     FB1_2   STD  RESET
-iobm/Er2            1     1     FB1_3   STD  RESET
-iobm/DTACKrr        1     1     FB1_4   STD  RESET
-iobm/DTACKrf        1     1     FB1_5   STD  RESET
-iobm/BERRrr         1     1     FB1_6   STD  RESET
-iobm/BERRrf         1     1     FB1_7   STD  RESET
-fsb/ASrf            1     1     FB1_8   STD  RESET
-cnt/RefCnt<7>       1     7     FB1_9   STD  RESET
-cnt/RefCnt<6>       1     6     FB1_10  STD  RESET
-cnt/RefCnt<5>       1     5     FB1_11  STD  RESET
-cnt/RefCnt<4>       1     4     FB1_12  STD  RESET
-cnt/RefCnt<3>       1     3     FB1_13  STD  RESET
-cnt/RefCnt<2>       1     2     FB1_14  STD  RESET
-cnt/RefCnt<1>       1     1     FB1_15  STD  RESET
-cnt/RefCnt<0>       0     0     FB1_16  STD  RESET
-RefAck              1     2     FB1_17  STD  RESET
-$OpTx$FX_DC$609     1     2     FB1_18  STD  
-iobm/VPArr          1     1     FB2_14  STD  RESET
-iobm/VPArf          1     1     FB2_15  STD  RESET
-iobm/RESrr          1     1     FB2_16  STD  RESET
-iobm/RESrf          1     1     FB2_17  STD  RESET
-iobm/Er             1     1     FB2_18  STD  RESET
-fsb/VPA             25    31    FB3_2   STD  RESET
-fsb/Ready1r         7     17    FB3_5   STD  RESET
-iobs/IORW1          16    19    FB3_13  STD  RESET
-fsb/Ready2r         9     22    FB3_15  STD  RESET
-ram/BACTr           1     2     FB4_1   STD  RESET
-iobs/Clear1         1     3     FB4_3   STD  RESET
-ALE0S               1     2     FB4_4   STD  RESET
-iobs/PS_FSM_FFd1    2     3     FB4_7   STD  RESET
-iobs/IOU1           2     2     FB4_8   STD  RESET
-iobs/IOL1           2     2     FB4_9   STD  RESET
-iobm/IOS_FSM_FFd2   2     4     FB4_10  STD  RESET
-iobm/IOS_FSM_FFd1   2     4     FB4_12  STD  RESET
-fsb/BERR1r          2     4     FB4_13  STD  RESET
-cs/nOverlay1        2     3     FB4_14  STD  RESET
-$OpTx$FX_DC$610     2     5     FB4_15  STD  
-IOU0                3     5     FB4_16  STD  RESET
-IOL0                3     5     FB4_17  STD  RESET
+Signal                         Total Total Loc     Pwr  Reg Init
+Name                           Pts   Inps          Mode State
+ram/BACTr                      1     2     FB1_1   STD  RESET
+iobm/RESrr                     1     1     FB1_2   STD  RESET
+iobm/RESrf                     1     1     FB1_3   STD  RESET
+fsb/ASrf                       1     1     FB1_4   STD  RESET
+cnt/RefCnt<2>                  1     2     FB1_5   STD  RESET
+cnt/RefCnt<1>                  1     1     FB1_6   STD  RESET
+RefAck                         1     2     FB1_7   STD  RESET
+RESr2                          1     1     FB1_8   STD  RESET
+RESr1                          1     1     FB1_9   STD  RESET
+RESr0                          1     1     FB1_10  STD  RESET
+IPL2r1                         1     1     FB1_11  STD  RESET
+IPL2r0                         1     1     FB1_12  STD  RESET
+ALE0S                          1     2     FB1_13  STD  RESET
+$OpTx$FX_DC$708                1     2     FB1_14  STD  
+iobs/IOU1                      2     2     FB1_15  STD  RESET
+iobs/IOL1                      2     2     FB1_16  STD  RESET
+iobm/IOS_FSM_FFd1              2     3     FB1_17  STD  RESET
+IOU0                           3     5     FB1_18  STD  RESET
+iobs/IOACTr                    1     1     FB2_6   STD  RESET
+iobm/VPArr                     1     1     FB2_7   STD  RESET
+iobm/VPArf                     1     1     FB2_8   STD  RESET
+iobm/IOREQr                    1     1     FB2_9   STD  RESET
+iobm/Er2                       1     1     FB2_10  STD  RESET
+iobm/Er                        1     1     FB2_11  STD  RESET
+iobm/DTACKrr                   1     1     FB2_12  STD  RESET
+iobm/DTACKrf                   1     1     FB2_13  STD  RESET
+iobm/BGr1                      1     1     FB2_14  STD  RESET
+iobm/BGr0                      1     1     FB2_15  STD  RESET
+iobm/BERRrr                    1     1     FB2_16  STD  RESET
+iobm/BERRrf                    1     1     FB2_17  STD  RESET
+cnt/RefCnt<0>                  0     0     FB2_18  STD  RESET
+fsb/Ready1r                    8     18    FB3_1   STD  RESET
+iobs/IORW1                     17    20    FB3_3   STD  RESET
+fsb/Ready2r                    9     22    FB3_5   STD  RESET
+fsb/VPA                        22    31    FB3_15  STD  RESET
+iobs/Clear1                    1     3     FB3_18  STD  RESET
+cnt/RefCnt<6>                  1     6     FB4_1   STD  RESET
+cnt/RefCnt<5>                  1     5     FB4_3   STD  RESET
+cnt/RefCnt<4>                  1     4     FB4_4   STD  RESET
+cnt/RefCnt<3>                  1     3     FB4_7   STD  RESET
 
-Signal              Total Total Loc     Pwr  Reg Init
-Name                Pts   Inps          Mode State
-iobs/IOReady        4     8     FB4_18  STD  RESET
-iobs/PS_FSM_FFd2    14    19    FB5_4   STD  RESET
-iobs/Once           17    18    FB5_8   STD  RESET
-IOREQ               14    19    FB5_13  STD  RESET
-BERR_IOBS           4     8     FB5_16  STD  RESET
-IORW0               18    20    FB5_18  STD  RESET
-iobm/ETACK          1     6     FB6_1   STD  RESET
-ALE0M               2     5     FB6_3   STD  RESET
-iobm/ES<3>          3     6     FB6_4   STD  RESET
-iobm/ES<1>          3     4     FB6_5   STD  RESET
-iobm/ES<0>          3     7     FB6_6   STD  RESET
-iobm/IOS_FSM_FFd4   4     6     FB6_7   STD  RESET
-iobm/ES<4>          4     7     FB6_8   STD  RESET
-iobm/IOS_FSM_FFd3   5     10    FB6_10  STD  RESET
-iobm/ES<2>          5     7     FB6_13  STD  RESET
-IOACT               6     13    FB6_16  STD  RESET
-IOBERR              9     14    FB6_18  STD  RESET
-TimeoutB            3     12    FB7_1   STD  RESET
-cnt/RefDone         2     10    FB7_3   STD  RESET
-fsb/Ready0r         3     8     FB7_4   STD  RESET
-cs/nOverlay0        3     8     FB7_7   STD  RESET
-cnt/TimeoutBPre     3     11    FB7_10  STD  RESET
-TimeoutA            3     10    FB7_12  STD  RESET
-ram/RS_FSM_FFd3     11    14    FB7_14  STD  RESET
-ram/RS_FSM_FFd2     13    14    FB7_16  STD  RESET
-ram/RAMReady        16    15    FB7_18  STD  RESET
-ram/RASEL           20    15    FB8_1   STD  RESET
-fsb/BERR0r          3     8     FB8_3   STD  RESET
-ram/RS_FSM_FFd1     5     10    FB8_4   STD  RESET
-ram/Once            5     10    FB8_7   STD  RESET
-iobs/Load1          14    18    FB8_9   STD  RESET
-ram/RAMDIS2         7     15    FB8_13  STD  RESET
-ram/RAMDIS1         18    15    FB8_15  STD  RESET
+Signal                         Total Total Loc     Pwr  Reg Init
+Name                           Pts   Inps          Mode State
+iobs/PS_FSM_FFd1               2     3     FB4_8   STD  RESET
+fsb/BERR1r                     2     4     FB4_9   STD  RESET
+cs/nOverlay1                   2     3     FB4_10  STD  RESET
+cnt/RefDone                    2     10    FB4_12  STD  RESET
+cs/nOverlay0                   3     8     FB4_13  STD  RESET
+cnt/TimeoutBPre                3     11    FB4_14  STD  RESET
+TimeoutA                       3     10    FB4_15  STD  RESET
+IOL0                           3     5     FB4_16  STD  RESET
+iobs/IOReady                   4     8     FB4_17  STD  RESET
+BERR_IOBS                      4     8     FB4_18  STD  RESET
+ram/RASEL                      20    15    FB5_1   STD  RESET
+cnt/RefCnt<7>                  1     7     FB5_3   STD  RESET
+ram/RAMDIS2                    7     15    FB5_4   STD  RESET
+ram/RAMDIS1                    18    15    FB5_8   STD  RESET
+iobs/Load1                     15    19    FB5_13  STD  RESET
+ram/Once                       5     10    FB5_16  STD  RESET
+iobm/ETACK                     1     6     FB6_1   STD  RESET
+iobm/IOS_FSM_FFd3              3     6     FB6_3   STD  RESET
+iobm/ES<3>                     3     6     FB6_4   STD  RESET
+iobm/ES<1>                     3     4     FB6_5   STD  RESET
+iobm/ES<0>                     3     7     FB6_6   STD  RESET
+ALE0M                          3     5     FB6_7   STD  RESET
+iobm/ES<4>                     4     7     FB6_8   STD  RESET
+iobm/IOS_FSM_FFd2              5     11    FB6_10  STD  RESET
+iobm/ES<2>                     5     7     FB6_13  STD  RESET
+IOACT                          7     13    FB6_16  STD  RESET
+IOBERR                         9     13    FB6_18  STD  RESET
+ram/RAMReady                   16    15    FB7_1   STD  RESET
+TimeoutB                       3     12    FB7_3   STD  RESET
+fsb/Ready0r                    3     8     FB7_4   STD  RESET
+ram/RS_FSM_FFd1                5     10    FB7_7   STD  RESET
+$OpTx$$OpTx$FX_DC$182_INV$783  6     8     FB7_10  STD  
+ram/RS_FSM_FFd3                11    14    FB7_13  STD  RESET
+ram/RS_FSM_FFd2                13    14    FB7_17  STD  RESET
+iobs/PS_FSM_FFd2               15    20    FB8_4   STD  RESET
+RESDone                        1     3     FB8_7   STD  RESET
+IOREQ                          15    20    FB8_9   STD  RESET
+iobs/Once                      18    19    FB8_14  STD  RESET
+fsb/BERR0r                     3     8     FB8_16  STD  RESET
+IORW0                          19    21    FB8_18  STD  RESET
 
-** 35 Inputs **
+** 39 Inputs **
 
-Signal              Loc     Pin  Pin     Pin     
-Name                        No.  Type    Use     
-A_FSB<13>           FB1_2   11   I/O     I
-A_FSB<14>           FB1_3   12   I/O     I
-A_FSB<15>           FB1_5   13   I/O     I
-A_FSB<16>           FB1_6   14   I/O     I
-A_FSB<17>           FB1_8   15   I/O     I
-A_FSB<18>           FB1_9   16   I/O     I
-A_FSB<19>           FB1_11  17   I/O     I
-A_FSB<20>           FB1_12  18   I/O     I
-A_FSB<21>           FB1_14  19   I/O     I
-A_FSB<22>           FB1_15  20   I/O     I
-CLK2X_IOB           FB1_17  22   GCK/I/O GCK
-A_FSB<5>            FB2_6   2    GTS/I/O I
-A_FSB<6>            FB2_8   3    GTS/I/O I
-A_FSB<7>            FB2_9   4    GTS/I/O I
-A_FSB<8>            FB2_11  6    I/O     I
-A_FSB<9>            FB2_12  7    I/O     I
-A_FSB<10>           FB2_14  8    I/O     I
-A_FSB<11>           FB2_15  9    I/O     I
-A_FSB<12>           FB2_17  10   I/O     I
-CLK_IOB             FB3_2   23   GCK/I/O GCK/I
-A_FSB<23>           FB3_5   24   I/O     I
-E_IOB               FB3_6   25   I/O     I
-CLK_FSB             FB3_8   27   GCK/I/O GCK
-nWE_FSB             FB3_11  29   I/O     I
-nLDS_FSB            FB3_12  30   I/O     I
-nAS_FSB             FB3_14  32   I/O     I
-nUDS_FSB            FB3_15  33   I/O     I
-nRES                FB4_8   91   I/O     I
-A_FSB<1>            FB4_12  94   I/O     I
-A_FSB<2>            FB4_14  95   I/O     I
-A_FSB<3>            FB4_15  96   I/O     I
-A_FSB<4>            FB4_17  97   I/O     I
-nBERR_IOB           FB6_5   76   I/O     I
-nVPA_IOB            FB6_6   77   I/O     I
-nDTACK_IOB          FB6_8   78   I/O     I
+Signal                         Loc     Pin  Pin     Pin     
+Name                                   No.  Type    Use     
+A_FSB<13>                      FB1_2   11   I/O     I
+A_FSB<14>                      FB1_3   12   I/O     I
+A_FSB<15>                      FB1_5   13   I/O     I
+A_FSB<16>                      FB1_6   14   I/O     I
+A_FSB<17>                      FB1_8   15   I/O     I
+A_FSB<18>                      FB1_9   16   I/O     I
+A_FSB<19>                      FB1_11  17   I/O     I
+A_FSB<20>                      FB1_12  18   I/O     I
+A_FSB<21>                      FB1_14  19   I/O     I
+A_FSB<22>                      FB1_15  20   I/O     I
+CLK2X_IOB                      FB1_17  22   GCK/I/O GCK
+A_FSB<5>                       FB2_6   2    GTS/I/O I
+A_FSB<6>                       FB2_8   3    GTS/I/O I
+A_FSB<7>                       FB2_9   4    GTS/I/O I
+A_FSB<8>                       FB2_11  6    I/O     I
+A_FSB<9>                       FB2_12  7    I/O     I
+A_FSB<10>                      FB2_14  8    I/O     I
+A_FSB<11>                      FB2_15  9    I/O     I
+A_FSB<12>                      FB2_17  10   I/O     I
+CLK_IOB                        FB3_2   23   GCK/I/O GCK/I
+A_FSB<23>                      FB3_5   24   I/O     I
+E_IOB                          FB3_6   25   I/O     I
+CLK_FSB                        FB3_8   27   GCK/I/O GCK
+nWE_FSB                        FB3_11  29   I/O     I
+nLDS_FSB                       FB3_12  30   I/O     I
+nAS_FSB                        FB3_14  32   I/O     I
+nUDS_FSB                       FB3_15  33   I/O     I
+nRES                           FB4_8   91   I/O     I
+nIPL2                          FB4_9   92   I/O     I
+A_FSB<1>                       FB4_12  94   I/O     I
+A_FSB<2>                       FB4_14  95   I/O     I
+A_FSB<3>                       FB4_15  96   I/O     I
+A_FSB<4>                       FB4_17  97   I/O     I
+nBERR_IOB                      FB6_5   76   I/O     I
+nVPA_IOB                       FB6_6   77   I/O     I
+nDTACK_IOB                     FB6_8   78   I/O     I
+SW<1>                          FB7_15  60   I/O     I
+SW<0>                          FB7_17  61   I/O     I
+nBG_IOB                        FB8_17  73   I/O     I
 
 Legend:
 Pin No. - ~ - User Assigned
@@ -251,62 +267,63 @@ Pin Type/Use - I  - Input             GCK - Global Clock
 X            - Signal used as input to the macrocell logic.
 Pin No.      - ~  - User Assigned
 *********************************** FB1  ***********************************
-Number of function block inputs used/remaining:               16/38
-Number of signals used by logic mapping into function block:  16
+Number of function block inputs used/remaining:               21/33
+Number of signals used by logic mapping into function block:  21
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
-iobs/IOACTr           1       0     0   4     FB1_1         (b)     (b)
-iobm/IOREQr           1       0     0   4     FB1_2   11    I/O     I
-iobm/Er2              1       0     0   4     FB1_3   12    I/O     I
-iobm/DTACKrr          1       0     0   4     FB1_4         (b)     (b)
-iobm/DTACKrf          1       0     0   4     FB1_5   13    I/O     I
-iobm/BERRrr           1       0     0   4     FB1_6   14    I/O     I
-iobm/BERRrf           1       0     0   4     FB1_7         (b)     (b)
-fsb/ASrf              1       0     0   4     FB1_8   15    I/O     I
-cnt/RefCnt<7>         1       0     0   4     FB1_9   16    I/O     I
-cnt/RefCnt<6>         1       0     0   4     FB1_10        (b)     (b)
-cnt/RefCnt<5>         1       0     0   4     FB1_11  17    I/O     I
-cnt/RefCnt<4>         1       0     0   4     FB1_12  18    I/O     I
-cnt/RefCnt<3>         1       0     0   4     FB1_13        (b)     (b)
-cnt/RefCnt<2>         1       0     0   4     FB1_14  19    I/O     I
-cnt/RefCnt<1>         1       0     0   4     FB1_15  20    I/O     I
-cnt/RefCnt<0>         0       0     0   5     FB1_16        (b)     (b)
-RefAck                1       0     0   4     FB1_17  22    GCK/I/O GCK
-$OpTx$FX_DC$609       1       0     0   4     FB1_18        (b)     (b)
+ram/BACTr             1       0     0   4     FB1_1         (b)     (b)
+iobm/RESrr            1       0     0   4     FB1_2   11    I/O     I
+iobm/RESrf            1       0     0   4     FB1_3   12    I/O     I
+fsb/ASrf              1       0     0   4     FB1_4         (b)     (b)
+cnt/RefCnt<2>         1       0     0   4     FB1_5   13    I/O     I
+cnt/RefCnt<1>         1       0     0   4     FB1_6   14    I/O     I
+RefAck                1       0     0   4     FB1_7         (b)     (b)
+RESr2                 1       0     0   4     FB1_8   15    I/O     I
+RESr1                 1       0     0   4     FB1_9   16    I/O     I
+RESr0                 1       0     0   4     FB1_10        (b)     (b)
+IPL2r1                1       0     0   4     FB1_11  17    I/O     I
+IPL2r0                1       0     0   4     FB1_12  18    I/O     I
+ALE0S                 1       0     0   4     FB1_13        (b)     (b)
+$OpTx$FX_DC$708       1       0     0   4     FB1_14  19    I/O     I
+iobs/IOU1             2       0     0   3     FB1_15  20    I/O     I
+iobs/IOL1             2       0     0   3     FB1_16        (b)     (b)
+iobm/IOS_FSM_FFd1     2       0     0   3     FB1_17  22    GCK/I/O GCK
+IOU0                  3       0     0   2     FB1_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: IOACT              7: cnt/RefCnt<4>     12: nAS_FSB 
-  2: IOREQ              8: cnt/RefCnt<5>     13: nBERR_IOB 
-  3: cnt/RefCnt<0>      9: cnt/RefCnt<6>     14: nDTACK_IOB 
-  4: cnt/RefCnt<1>     10: fsb/ASrf          15: ram/RS_FSM_FFd1 
-  5: cnt/RefCnt<2>     11: iobm/Er           16: ram/RS_FSM_FFd2 
-  6: cnt/RefCnt<3>    
+  1: IPL2r0              8: iobm/IOS_FSM_FFd2  15: nAS_FSB 
+  2: RESr0               9: iobm/IOS_FSM_FFd3  16: nIPL2 
+  3: RESr1              10: iobs/IOU1          17: nLDS_FSB 
+  4: cnt/RefCnt<0>      11: iobs/Load1         18: nRES 
+  5: cnt/RefCnt<1>      12: iobs/PS_FSM_FFd1   19: nUDS_FSB 
+  6: fsb/ASrf           13: iobs/PS_FSM_FFd2   20: ram/RS_FSM_FFd1 
+  7: iobm/IOS_FSM_FFd1  14: nADoutLE1          21: ram/RS_FSM_FFd2 
 
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
-iobs/IOACTr          X....................................... 1
-iobm/IOREQr          .X...................................... 1
-iobm/Er2             ..........X............................. 1
-iobm/DTACKrr         .............X.......................... 1
-iobm/DTACKrf         .............X.......................... 1
-iobm/BERRrr          ............X........................... 1
-iobm/BERRrf          ............X........................... 1
-fsb/ASrf             ...........X............................ 1
-cnt/RefCnt<7>        ..XXXXXXX............................... 7
-cnt/RefCnt<6>        ..XXXXXX................................ 6
-cnt/RefCnt<5>        ..XXXXX................................. 5
-cnt/RefCnt<4>        ..XXXX.................................. 4
-cnt/RefCnt<3>        ..XXX................................... 3
-cnt/RefCnt<2>        ..XX.................................... 2
-cnt/RefCnt<1>        ..X..................................... 1
-cnt/RefCnt<0>        ........................................ 0
-RefAck               ..............XX........................ 2
-$OpTx$FX_DC$609      .........X.X............................ 2
+ram/BACTr            .....X........X......................... 2
+iobm/RESrr           .................X...................... 1
+iobm/RESrf           .................X...................... 1
+fsb/ASrf             ..............X......................... 1
+cnt/RefCnt<2>        ...XX................................... 2
+cnt/RefCnt<1>        ...X.................................... 1
+RefAck               ...................XX................... 2
+RESr2                ..X..................................... 1
+RESr1                .X...................................... 1
+RESr0                .................X...................... 1
+IPL2r1               X....................................... 1
+IPL2r0               ...............X........................ 1
+ALE0S                ...........XX........................... 2
+$OpTx$FX_DC$708      .....X........X......................... 2
+iobs/IOU1            ..........X.......X..................... 2
+iobs/IOL1            ..........X.....X....................... 2
+iobm/IOS_FSM_FFd1    ......XXX............................... 3
+IOU0                 .........X.XXX....X..................... 5
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *********************************** FB2  ***********************************
-Number of function block inputs used/remaining:               3/51
-Number of signals used by logic mapping into function block:  3
+Number of function block inputs used/remaining:               9/45
+Number of signals used by logic mapping into function block:  9
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
 (unused)              0       0     0   5     FB2_1         (b)     
@@ -314,227 +331,246 @@ Name                Pt      Pt    Pt  Pt               #    Type    Use
 (unused)              0       0     0   5     FB2_3         (b)     
 (unused)              0       0     0   5     FB2_4         (b)     
 (unused)              0       0     0   5     FB2_5   1     GTS/I/O 
-(unused)              0       0     0   5     FB2_6   2     GTS/I/O I
-(unused)              0       0     0   5     FB2_7         (b)     
-(unused)              0       0     0   5     FB2_8   3     GTS/I/O I
-(unused)              0       0     0   5     FB2_9   4     GTS/I/O I
-(unused)              0       0     0   5     FB2_10        (b)     
-(unused)              0       0     0   5     FB2_11  6     I/O     I
-(unused)              0       0     0   5     FB2_12  7     I/O     I
-(unused)              0       0     0   5     FB2_13        (b)     
-iobm/VPArr            1       0     0   4     FB2_14  8     I/O     I
-iobm/VPArf            1       0     0   4     FB2_15  9     I/O     I
-iobm/RESrr            1       0     0   4     FB2_16        (b)     (b)
-iobm/RESrf            1       0     0   4     FB2_17  10    I/O     I
-iobm/Er               1       0     0   4     FB2_18        (b)     (b)
+iobs/IOACTr           1       0     0   4     FB2_6   2     GTS/I/O I
+iobm/VPArr            1       0     0   4     FB2_7         (b)     (b)
+iobm/VPArf            1       0     0   4     FB2_8   3     GTS/I/O I
+iobm/IOREQr           1       0     0   4     FB2_9   4     GTS/I/O I
+iobm/Er2              1       0     0   4     FB2_10        (b)     (b)
+iobm/Er               1       0     0   4     FB2_11  6     I/O     I
+iobm/DTACKrr          1       0     0   4     FB2_12  7     I/O     I
+iobm/DTACKrf          1       0     0   4     FB2_13        (b)     (b)
+iobm/BGr1             1       0     0   4     FB2_14  8     I/O     I
+iobm/BGr0             1       0     0   4     FB2_15  9     I/O     I
+iobm/BERRrr           1       0     0   4     FB2_16        (b)     (b)
+iobm/BERRrf           1       0     0   4     FB2_17  10    I/O     I
+cnt/RefCnt<0>         0       0     0   5     FB2_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: E_IOB              2: nRES               3: nVPA_IOB 
+  1: E_IOB              4: iobm/BGr0          7: nBG_IOB 
+  2: IOACT              5: iobm/Er            8: nDTACK_IOB 
+  3: IOREQ              6: nBERR_IOB          9: nVPA_IOB 
 
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
-iobm/VPArr           ..X..................................... 1
-iobm/VPArf           ..X..................................... 1
-iobm/RESrr           .X...................................... 1
-iobm/RESrf           .X...................................... 1
+iobs/IOACTr          .X...................................... 1
+iobm/VPArr           ........X............................... 1
+iobm/VPArf           ........X............................... 1
+iobm/IOREQr          ..X..................................... 1
+iobm/Er2             ....X................................... 1
 iobm/Er              X....................................... 1
+iobm/DTACKrr         .......X................................ 1
+iobm/DTACKrf         .......X................................ 1
+iobm/BGr1            ...X.................................... 1
+iobm/BGr0            ......X................................. 1
+iobm/BERRrr          .....X.................................. 1
+iobm/BERRrf          .....X.................................. 1
+cnt/RefCnt<0>        ........................................ 0
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *********************************** FB3  ***********************************
-Number of function block inputs used/remaining:               39/15
-Number of signals used by logic mapping into function block:  39
+Number of function block inputs used/remaining:               38/16
+Number of signals used by logic mapping into function block:  38
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
-(unused)              0       0   \/5   0     FB3_1         (b)     (b)
-fsb/VPA              25      20<-   0   0     FB3_2   23    GCK/I/O GCK/I
-(unused)              0       0   /\5   0     FB3_3         (b)     (b)
+fsb/Ready1r           8       4<- \/1   0     FB3_1         (b)     (b)
+(unused)              0       0   \/5   0     FB3_2   23    GCK/I/O GCK/I
+iobs/IORW1           17      12<-   0   0     FB3_3         (b)     (b)
 (unused)              0       0   /\5   0     FB3_4         (b)     (b)
-fsb/Ready1r           7       2<-   0   0     FB3_5   24    I/O     I
-(unused)              0       0   /\2   3     FB3_6   25    I/O     I
+fsb/Ready2r           9       5<- /\1   0     FB3_5   24    I/O     I
+(unused)              0       0   /\5   0     FB3_6   25    I/O     I
 (unused)              0       0   \/3   2     FB3_7         (b)     (b)
 (unused)              0       0   \/5   0     FB3_8   27    GCK/I/O GCK
 nDTACK_FSB           23      18<-   0   0     FB3_9   28    I/O     O
 (unused)              0       0   /\5   0     FB3_10        (b)     (b)
 (unused)              0       0   /\5   0     FB3_11  29    I/O     I
-(unused)              0       0   \/5   0     FB3_12  30    I/O     I
-iobs/IORW1           16      11<-   0   0     FB3_13        (b)     (b)
-(unused)              0       0   /\5   0     FB3_14  32    I/O     I
-fsb/Ready2r           9       5<- /\1   0     FB3_15  33    I/O     I
+(unused)              0       0     0   5     FB3_12  30    I/O     I
+(unused)              0       0   \/5   0     FB3_13        (b)     (b)
+(unused)              0       0   \/5   0     FB3_14  32    I/O     I
+fsb/VPA              22      17<-   0   0     FB3_15  33    I/O     I
 (unused)              0       0   /\5   0     FB3_16        (b)     (b)
-nROMWE                1       0     0   4     FB3_17  34    I/O     O
-(unused)              0       0   \/5   0     FB3_18        (b)     (b)
+nROMWE                1       0   /\2   2     FB3_17  34    I/O     O
+iobs/Clear1           1       0   \/4   0     FB3_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: $OpTx$FX_DC$609   14: A_FSB<21>         27: fsb/Ready1r 
-  2: $OpTx$FX_DC$610   15: A_FSB<22>         28: fsb/Ready2r 
-  3: A_FSB<10>         16: A_FSB<23>         29: fsb/VPA 
-  4: A_FSB<11>         17: A_FSB<8>          30: iobs/IORW1 
-  5: A_FSB<12>         18: A_FSB<9>          31: iobs/IOReady 
-  6: A_FSB<13>         19: BERR_IOBS         32: iobs/Once 
-  7: A_FSB<14>         20: TimeoutA          33: iobs/PS_FSM_FFd1 
-  8: A_FSB<15>         21: TimeoutB          34: iobs/PS_FSM_FFd2 
-  9: A_FSB<16>         22: cs/nOverlay1      35: nADoutLE1 
- 10: A_FSB<17>         23: fsb/ASrf          36: nAS_FSB 
- 11: A_FSB<18>         24: fsb/BERR0r        37: nDTACK_FSB 
- 12: A_FSB<19>         25: fsb/BERR1r        38: nWE_FSB 
- 13: A_FSB<20>         26: fsb/Ready0r       39: ram/RAMReady 
+  1: $OpTx$$OpTx$FX_DC$182_INV$783  14: A_FSB<21>         27: fsb/Ready2r 
+  2: $OpTx$FX_DC$708                15: A_FSB<22>         28: fsb/VPA 
+  3: A_FSB<10>                      16: A_FSB<23>         29: iobs/IORW1 
+  4: A_FSB<11>                      17: A_FSB<8>          30: iobs/IOReady 
+  5: A_FSB<12>                      18: A_FSB<9>          31: iobs/Once 
+  6: A_FSB<13>                      19: BERR_IOBS         32: iobs/PS_FSM_FFd1 
+  7: A_FSB<14>                      20: SW<1>             33: iobs/PS_FSM_FFd2 
+  8: A_FSB<15>                      21: TimeoutA          34: nADoutLE1 
+  9: A_FSB<16>                      22: cs/nOverlay1      35: nAS_FSB 
+ 10: A_FSB<17>                      23: fsb/ASrf          36: nBR_IOB 
+ 11: A_FSB<18>                      24: fsb/BERR0r        37: nDTACK_FSB 
+ 12: A_FSB<19>                      25: fsb/BERR1r        38: nWE_FSB 
+ 13: A_FSB<20>                      26: fsb/Ready1r      
 
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
-fsb/VPA              X.XXXXXXXXXXXXXXXXXXXX.XXXXXX.X...X..XX. 31
-fsb/Ready1r          .....XX.XXXXXXXX.....XX...X...X...XX.X.. 17
-nDTACK_FSB           .XXXXXXXXXXXXXXXXXXX.XXXXXXX..X...XXXXX. 32
-iobs/IORW1           .....XX.XXXXXXXX.....XX......X.XXXXX.X.. 19
-fsb/Ready2r          ..XXXXXXXXXXXXXXXX.X.XX....X.......X.X.. 22
-nROMWE               ...................................X.X.. 2
+fsb/Ready1r          .....XX.XXXXXXXX...X.XX..X...X...XX..X.. 18
+iobs/IORW1           .....XX.XXXXXXXX...X.XX.....X.XXXXX..X.. 20
+fsb/Ready2r          ..XXXXXXXXXXXXXXXX..XXX...X.......X..X.. 22
+nDTACK_FSB           X.XXXXXXXXXXXXXXXXXXXXXXXXX..X...XXXXX.. 32
+fsb/VPA              XXXXXXXXXXXXXXXXXXXXXX.XXXXX.X...X.X.X.. 31
+nROMWE               ..................................X..X.. 2
+iobs/Clear1          ...............................XXX...... 3
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *********************************** FB4  ***********************************
-Number of function block inputs used/remaining:               29/25
-Number of signals used by logic mapping into function block:  29
+Number of function block inputs used/remaining:               41/13
+Number of signals used by logic mapping into function block:  41
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
-ram/BACTr             1       0     0   4     FB4_1         (b)     (b)
-nAoutOE               0       0     0   5     FB4_2   87    I/O     O
-iobs/Clear1           1       0     0   4     FB4_3         (b)     (b)
-ALE0S                 1       0     0   4     FB4_4         (b)     (b)
+cnt/RefCnt<6>         1       0     0   4     FB4_1         (b)     (b)
+nAoutOE               3       0     0   2     FB4_2   87    I/O     O
+cnt/RefCnt<5>         1       0     0   4     FB4_3         (b)     (b)
+cnt/RefCnt<4>         1       0     0   4     FB4_4         (b)     (b)
 nDoutOE               2       0     0   3     FB4_5   89    I/O     O
-nDinOE                2       0     0   3     FB4_6   90    I/O     O
-iobs/PS_FSM_FFd1      2       0     0   3     FB4_7         (b)     (b)
-iobs/IOU1             2       0     0   3     FB4_8   91    I/O     I
-iobs/IOL1             2       0     0   3     FB4_9   92    I/O     (b)
-iobm/IOS_FSM_FFd2     2       0     0   3     FB4_10        (b)     (b)
+nDinOE                3       0     0   2     FB4_6   90    I/O     O
+cnt/RefCnt<3>         1       0     0   4     FB4_7         (b)     (b)
+iobs/PS_FSM_FFd1      2       0     0   3     FB4_8   91    I/O     I
+fsb/BERR1r            2       0     0   3     FB4_9   92    I/O     I
+cs/nOverlay1          2       0     0   3     FB4_10        (b)     (b)
 nVPA_FSB              1       0     0   4     FB4_11  93    I/O     O
-iobm/IOS_FSM_FFd1     2       0     0   3     FB4_12  94    I/O     I
-fsb/BERR1r            2       0     0   3     FB4_13        (b)     (b)
-cs/nOverlay1          2       0     0   3     FB4_14  95    I/O     I
-$OpTx$FX_DC$610       2       0     0   3     FB4_15  96    I/O     I
-IOU0                  3       0     0   2     FB4_16        (b)     (b)
-IOL0                  3       0     0   2     FB4_17  97    I/O     I
-iobs/IOReady          4       0     0   1     FB4_18        (b)     (b)
+cnt/RefDone           2       0     0   3     FB4_12  94    I/O     I
+cs/nOverlay0          3       0     0   2     FB4_13        (b)     (b)
+cnt/TimeoutBPre       3       0     0   2     FB4_14  95    I/O     I
+TimeoutA              3       0     0   2     FB4_15  96    I/O     I
+IOL0                  3       0     0   2     FB4_16        (b)     (b)
+iobs/IOReady          4       0     0   1     FB4_17  97    I/O     I
+BERR_IOBS             4       0     0   1     FB4_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: A_FSB<20>         11: fsb/BERR1r         21: iobs/Load1 
-  2: A_FSB<21>         12: fsb/VPA            22: iobs/Once 
-  3: A_FSB<22>         13: iobm/IOS_FSM_FFd1  23: iobs/PS_FSM_FFd1 
-  4: A_FSB<23>         14: iobm/IOS_FSM_FFd2  24: iobs/PS_FSM_FFd2 
-  5: BERR_IOBS         15: iobm/IOS_FSM_FFd3  25: nADoutLE1 
-  6: IOBERR            16: iobm/IOS_FSM_FFd4  26: nAS_FSB 
-  7: IORW0             17: iobs/IOACTr        27: nLDS_FSB 
-  8: TimeoutB          18: iobs/IOL1          28: nUDS_FSB 
-  9: cs/nOverlay0      19: iobs/IOReady       29: nWE_FSB 
- 10: fsb/ASrf          20: iobs/IOU1         
+  1: A_FSB<20>         15: cnt/RefCnt<4>      29: iobs/IOACTr 
+  2: A_FSB<21>         16: cnt/RefCnt<5>      30: iobs/IOL1 
+  3: A_FSB<22>         17: cnt/RefCnt<6>      31: iobs/IOReady 
+  4: A_FSB<23>         18: cnt/RefCnt<7>      32: iobs/Once 
+  5: BERR_IOBS         19: cnt/RefDone        33: iobs/PS_FSM_FFd1 
+  6: IOBERR            20: cnt/TimeoutBPre    34: iobs/PS_FSM_FFd2 
+  7: IORW0             21: cs/nOverlay0       35: nADoutLE1 
+  8: RefAck            22: fsb/ASrf           36: nAS_FSB 
+  9: SW<1>             23: fsb/BERR1r         37: nAS_IOB 
+ 10: TimeoutA          24: fsb/VPA            38: nAoutOE 
+ 11: cnt/RefCnt<0>     25: iobm/BGr0          39: nLDS_FSB 
+ 12: cnt/RefCnt<1>     26: iobm/BGr1          40: nRES 
+ 13: cnt/RefCnt<2>     27: iobm/IOS_FSM_FFd2  41: nWE_FSB 
+ 14: cnt/RefCnt<3>     28: iobm/IOS_FSM_FFd3 
 
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-ram/BACTr            .........X...............X.............. 2
-nAoutOE              ........................................ 0
-iobs/Clear1          ......................XXX............... 3
-ALE0S                ......................XX................ 2
-nDoutOE              ......X......XXX........................ 4
-nDinOE               XXXX.....................X..X........... 6
-iobs/PS_FSM_FFd1     ................X.....XX................ 3
-iobs/IOU1            ....................X......X............ 2
-iobs/IOL1            ....................X.....X............. 2
-iobm/IOS_FSM_FFd2    ............XXXX........................ 4
-nVPA_FSB             ...........X.............X.............. 2
-iobm/IOS_FSM_FFd1    ............XXXX........................ 4
-fsb/BERR1r           ....X....XX..............X.............. 4
-cs/nOverlay1         ........XX...............X.............. 3
-$OpTx$FX_DC$610      XXXX...X................................ 5
-IOU0                 ...................X..XXX..X............ 5
-IOL0                 .................X....XXX.X............. 5
-iobs/IOReady         .....X...X......X.X..X.XXX.............. 8
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
+Signal                        1         2         3         4         5 FB
+Name                0----+----0----+----0----+----0----+----0----+----0 Inputs
+cnt/RefCnt<6>        ..........XXXXXX.................................. 6
+nAoutOE              ........................XX..........XX............ 4
+cnt/RefCnt<5>        ..........XXXXX................................... 5
+cnt/RefCnt<4>        ..........XXXX.................................... 4
+nDoutOE              ......X...................XX...................... 3
+nDinOE               XXXX....X..........................X....X......... 7
+cnt/RefCnt<3>        ..........XXX..................................... 3
+iobs/PS_FSM_FFd1     ............................X...XX................ 3
+fsb/BERR1r           ....X................XX............X.............. 4
+cs/nOverlay1         ....................XX.............X.............. 3
+nVPA_FSB             .......................X...........X.............. 2
+cnt/RefDone          .......X..XXXXXXXXX............................... 10
+cs/nOverlay0         XXXX................XX.............X...X.......... 8
+cnt/TimeoutBPre      ..........XXXXXXXX.X.X.............X.............. 11
+TimeoutA             .........XXXXXXXX....X.............X.............. 10
+IOL0                 .............................X..XXX...X........... 5
+iobs/IOReady         .....X...............X......X.XX.XXX.............. 8
+BERR_IOBS            ....XX...............X......X..X.XXX.............. 8
+                    0----+----1----+----2----+----3----+----4----+----5
+                              0         0         0         0         0
 *********************************** FB5  ***********************************
-Number of function block inputs used/remaining:               31/23
-Number of signals used by logic mapping into function block:  31
+Number of function block inputs used/remaining:               42/12
+Number of signals used by logic mapping into function block:  42
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
-(unused)              0       0   /\5   0     FB5_1         (b)     (b)
-nROMCS                2       0   /\3   0     FB5_2   35    I/O     O
-(unused)              0       0   \/5   0     FB5_3         (b)     (b)
-iobs/PS_FSM_FFd2     14       9<-   0   0     FB5_4         (b)     (b)
-nCAS                  1       0   /\4   0     FB5_5   36    I/O     O
-nOE                   1       0   \/2   2     FB5_6   37    I/O     O
+ram/RASEL            20      15<-   0   0     FB5_1         (b)     (b)
+nROMCS                3       3<- /\5   0     FB5_2   35    I/O     O
+cnt/RefCnt<7>         1       0   /\3   1     FB5_3         (b)     (b)
+ram/RAMDIS2           7       2<-   0   0     FB5_4         (b)     (b)
+nCAS                  1       0   /\2   2     FB5_5   36    I/O     O
+nOE                   1       0   \/3   1     FB5_6   37    I/O     O
 (unused)              0       0   \/5   0     FB5_7         (b)     (b)
-iobs/Once            17      12<-   0   0     FB5_8   39    I/O     (b)
+ram/RAMDIS1          18      13<-   0   0     FB5_8   39    I/O     (b)
 RA<4>                 2       2<- /\5   0     FB5_9   40    I/O     O
 (unused)              0       0   /\2   3     FB5_10        (b)     (b)
 RA<3>                 2       0   \/2   1     FB5_11  41    I/O     O
 RA<5>                 2       2<- \/5   0     FB5_12  42    I/O     O
-IOREQ                14       9<-   0   0     FB5_13        (b)     (b)
-RA<2>                 2       1<- /\4   0     FB5_14  43    I/O     O
-RA<6>                 2       0   /\1   2     FB5_15  46    I/O     O
-BERR_IOBS             4       0     0   1     FB5_16        (b)     (b)
+iobs/Load1           15      10<-   0   0     FB5_13        (b)     (b)
+RA<2>                 2       2<- /\5   0     FB5_14  43    I/O     O
+RA<6>                 2       0   /\2   1     FB5_15  46    I/O     O
+ram/Once              5       0     0   0     FB5_16        (b)     (b)
 (unused)              0       0   \/5   0     FB5_17  49    I/O     (b)
-IORW0                18      13<-   0   0     FB5_18        (b)     (b)
+(unused)              0       0   \/5   0     FB5_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: A_FSB<12>         12: A_FSB<23>         22: fsb/ASrf 
-  2: A_FSB<13>         13: A_FSB<3>          23: iobs/IOACTr 
-  3: A_FSB<14>         14: A_FSB<4>          24: iobs/IORW1 
-  4: A_FSB<15>         15: A_FSB<5>          25: iobs/Once 
-  5: A_FSB<16>         16: A_FSB<6>          26: iobs/PS_FSM_FFd1 
-  6: A_FSB<17>         17: A_FSB<7>          27: iobs/PS_FSM_FFd2 
-  7: A_FSB<18>         18: BERR_IOBS         28: nADoutLE1 
-  8: A_FSB<19>         19: IOBERR            29: nAS_FSB 
-  9: A_FSB<20>         20: IORW0             30: nWE_FSB 
- 10: A_FSB<21>         21: cs/nOverlay1      31: ram/RASEL 
- 11: A_FSB<22>        
+  1: A_FSB<12>         15: A_FSB<5>          29: fsb/ASrf 
+  2: A_FSB<13>         16: A_FSB<6>          30: iobs/Once 
+  3: A_FSB<14>         17: A_FSB<7>          31: iobs/PS_FSM_FFd1 
+  4: A_FSB<15>         18: SW<1>             32: iobs/PS_FSM_FFd2 
+  5: A_FSB<16>         19: cnt/RefCnt<0>     33: nADoutLE1 
+  6: A_FSB<17>         20: cnt/RefCnt<1>     34: nAS_FSB 
+  7: A_FSB<18>         21: cnt/RefCnt<2>     35: nWE_FSB 
+  8: A_FSB<19>         22: cnt/RefCnt<3>     36: ram/BACTr 
+  9: A_FSB<20>         23: cnt/RefCnt<4>     37: ram/Once 
+ 10: A_FSB<21>         24: cnt/RefCnt<5>     38: ram/RAMDIS2 
+ 11: A_FSB<22>         25: cnt/RefCnt<6>     39: ram/RASEL 
+ 12: A_FSB<23>         26: cnt/RefCnt<7>     40: ram/RS_FSM_FFd1 
+ 13: A_FSB<3>          27: cnt/RefDone       41: ram/RS_FSM_FFd2 
+ 14: A_FSB<4>          28: cs/nOverlay1      42: ram/RS_FSM_FFd3 
 
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-nROMCS               ........XXXX........X................... 5
-iobs/PS_FSM_FFd2     .XX.XXXXXXXX........XXX.XXXXXX.......... 19
-nCAS                 ..............................X......... 1
-nOE                  ............................XX.......... 2
-iobs/Once            .XX.XXXXXXXX........XX..XXXXXX.......... 18
-RA<4>                ..X...........X...............X......... 3
-RA<3>                .X...........X................X......... 3
-RA<5>                ...X...........X..............X......... 3
-IOREQ                .XX.XXXXXXXX........XXX.XXXXXX.......... 19
-RA<2>                X...........X.................X......... 3
-RA<6>                ....X...........X.............X......... 3
-BERR_IOBS            .................XX..XX.X.XXX........... 8
-IORW0                .XX.XXXXXXXX.......XXX.XXXXXXX.......... 20
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
+Signal                        1         2         3         4         5 FB
+Name                0----+----0----+----0----+----0----+----0----+----0 Inputs
+ram/RASEL            .........XXX...........XXXXXX....X.XX..XXX........ 15
+nROMCS               ........XXXX.....X.........X...................... 6
+cnt/RefCnt<7>        ..................XXXXXXX......................... 7
+ram/RAMDIS2          .........XXX...........XXXXXX....X..XX.XXX........ 15
+nCAS                 ......................................X........... 1
+nOE                  .................................XX............... 2
+ram/RAMDIS1          .........XXX...........XXXXXX....X.XX..XXX........ 15
+RA<4>                ..X...........X.......................X........... 3
+RA<3>                .X...........X........................X........... 3
+RA<5>                ...X...........X......................X........... 3
+iobs/Load1           .XX.XXXXXXXX.....X.........XXXXXXXX............... 19
+RA<2>                X...........X.........................X........... 3
+RA<6>                ....X...........X.....................X........... 3
+ram/Once             .........XXX...............XX....X..X..XXX........ 10
+                    0----+----1----+----2----+----3----+----4----+----5
+                              0         0         0         0         0
 *********************************** FB6  ***********************************
 Number of function block inputs used/remaining:               34/20
 Number of signals used by logic mapping into function block:  34
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
-iobm/ETACK            1       0   /\1   3     FB6_1         (b)     (b)
-nVMA_IOB              2       0     0   3     FB6_2   74    I/O     O
-ALE0M                 2       0     0   3     FB6_3         (b)     (b)
+iobm/ETACK            1       0   /\4   0     FB6_1         (b)     (b)
+nVMA_IOB              3       0     0   2     FB6_2   74    I/O     O
+iobm/IOS_FSM_FFd3     3       0     0   2     FB6_3         (b)     (b)
 iobm/ES<3>            3       0     0   2     FB6_4         (b)     (b)
 iobm/ES<1>            3       0     0   2     FB6_5   76    I/O     I
 iobm/ES<0>            3       0     0   2     FB6_6   77    I/O     I
-iobm/IOS_FSM_FFd4     4       0     0   1     FB6_7         (b)     (b)
+ALE0M                 3       0     0   2     FB6_7         (b)     (b)
 iobm/ES<4>            4       0     0   1     FB6_8   78    I/O     I
 nLDS_IOB              4       0     0   1     FB6_9   79    I/O     O
-iobm/IOS_FSM_FFd3     5       0     0   0     FB6_10        (b)     (b)
+iobm/IOS_FSM_FFd2     5       0     0   0     FB6_10        (b)     (b)
 nUDS_IOB              4       0     0   1     FB6_11  80    I/O     O
-nAS_IOB               2       0     0   3     FB6_12  81    I/O     O
+nAS_IOB               3       0     0   2     FB6_12  81    I/O     O
 iobm/ES<2>            5       0     0   0     FB6_13        (b)     (b)
 nADoutLE1             2       0     0   3     FB6_14  82    I/O     O
 nADoutLE0             1       0   \/1   3     FB6_15  85    I/O     O
-IOACT                 6       1<-   0   0     FB6_16        (b)     (b)
-nDinLE                2       0   \/3   0     FB6_17  86    I/O     O
+IOACT                 7       2<-   0   0     FB6_16        (b)     (b)
+nDinLE                1       0   /\1   3     FB6_17  86    I/O     O
 IOBERR                9       4<-   0   0     FB6_18        (b)     (b)
 
 Signals Used by Logic in Function Block
   1: ALE0M             13: iobm/ES<0>         24: iobm/IOS_FSM_FFd3 
-  2: ALE0S             14: iobm/ES<1>         25: iobm/IOS_FSM_FFd4 
-  3: CLK_IOB           15: iobm/ES<2>         26: iobm/RESrf 
-  4: IOACT             16: iobm/ES<3>         27: iobm/RESrr 
-  5: IOBERR            17: iobm/ES<4>         28: iobm/VPArf 
-  6: IOL0              18: iobm/ETACK         29: iobm/VPArr 
-  7: IORW0             19: iobm/Er            30: iobs/Clear1 
-  8: IOU0              20: iobm/Er2           31: iobs/Load1 
-  9: iobm/BERRrf       21: iobm/IOREQr        32: nADoutLE1 
+  2: ALE0S             14: iobm/ES<1>         25: iobm/RESrf 
+  3: CLK_IOB           15: iobm/ES<2>         26: iobm/RESrr 
+  4: IOACT             16: iobm/ES<3>         27: iobm/VPArf 
+  5: IOBERR            17: iobm/ES<4>         28: iobm/VPArr 
+  6: IOL0              18: iobm/ETACK         29: iobs/Clear1 
+  7: IORW0             19: iobm/Er            30: iobs/Load1 
+  8: IOU0              20: iobm/Er2           31: nADoutLE1 
+  9: iobm/BERRrf       21: iobm/IOREQr        32: nAoutOE 
  10: iobm/BERRrr       22: iobm/IOS_FSM_FFd1  33: nBERR_IOB 
  11: iobm/DTACKrf      23: iobm/IOS_FSM_FFd2  34: nVMA_IOB 
  12: iobm/DTACKrr     
@@ -542,135 +578,137 @@ Signals Used by Logic in Function Block
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
 iobm/ETACK           ............XXXXX................X...... 6
-nVMA_IOB             ...X........XXXXX..........XX....X...... 9
-ALE0M                ....................XXXXX............... 5
+nVMA_IOB             ...X........XXXXX.........XX...X.X...... 10
+iobm/IOS_FSM_FFd3    ..X.................XXXX.......X........ 6
 iobm/ES<3>           ............XXXX..XX.................... 6
 iobm/ES<1>           ............XX....XX.................... 4
 iobm/ES<0>           ............XXXXX.XX.................... 7
-iobm/IOS_FSM_FFd4    ..X.................XXXXX............... 6
+ALE0M                ....................XXXX.......X........ 5
 iobm/ES<4>           ............XXXXX.XX.................... 7
-nLDS_IOB             .....XX..............XXXX............... 6
-iobm/IOS_FSM_FFd3    ..X.....XXXX.....X.....XXXX............. 10
-nUDS_IOB             ......XX.............XXXX............... 6
-nAS_IOB              .....................XXXX............... 4
+nLDS_IOB             .....XX..............XXX.......X........ 6
+iobm/IOS_FSM_FFd2    ..X.....XXXX.....X...XXXXX.............. 11
+nUDS_IOB             ......XX.............XXX.......X........ 6
+nAS_IOB              .....................XXX.......X........ 4
 iobm/ES<2>           ............XXXXX.XX.................... 7
-nADoutLE1            .............................XXX........ 3
+nADoutLE1            ............................XXX......... 3
 nADoutLE0            XX...................................... 2
-IOACT                ..X.....XXXX.....X..XXXXXXX............. 13
-nDinLE               .....................X.XX............... 3
-IOBERR               ..X.X...XXXX.....X...XXXXXX.....X....... 14
+IOACT                ..X.....XXXX.....X..XXXXXX.....X........ 13
+nDinLE               .....................XX................. 2
+IOBERR               ..X.X...XXXX.....X...XXXXX......X....... 13
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *********************************** FB7  ***********************************
-Number of function block inputs used/remaining:               39/15
-Number of signals used by logic mapping into function block:  39
-Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
-Name                Pt      Pt    Pt  Pt               #    Type    Use
-TimeoutB              3       3<- /\5   0     FB7_1         (b)     (b)
-RA<1>                 2       0   /\3   0     FB7_2   50    I/O     O
-cnt/RefDone           2       0     0   3     FB7_3         (b)     (b)
-fsb/Ready0r           3       0     0   2     FB7_4         (b)     (b)
-RA<7>                 2       0     0   3     FB7_5   52    I/O     O
-RA<0>                 2       0     0   3     FB7_6   53    I/O     O
-cs/nOverlay0          3       0   \/1   1     FB7_7         (b)     (b)
-RA<8>                 7       2<-   0   0     FB7_8   54    I/O     O
-RA<10>                1       0   /\1   3     FB7_9   55    I/O     O
-cnt/TimeoutBPre       3       0     0   2     FB7_10        (b)     (b)
-RA<9>                 2       0   \/3   0     FB7_11  56    I/O     O
-TimeoutA              3       3<- \/5   0     FB7_12  58    I/O     (b)
-(unused)              0       0   \/5   0     FB7_13        (b)     (b)
-ram/RS_FSM_FFd3      11      10<- \/4   0     FB7_14  59    I/O     (b)
-(unused)              0       0   \/5   0     FB7_15  60    I/O     (b)
-ram/RS_FSM_FFd2      13       9<- \/1   0     FB7_16        (b)     (b)
-(unused)              0       0   \/5   0     FB7_17  61    I/O     (b)
-ram/RAMReady         16      11<-   0   0     FB7_18        (b)     (b)
-
-Signals Used by Logic in Function Block
-  1: A_FSB<10>         14: RefAck            27: cs/nOverlay0 
-  2: A_FSB<11>         15: TimeoutA          28: cs/nOverlay1 
-  3: A_FSB<17>         16: TimeoutB          29: fsb/ASrf 
-  4: A_FSB<18>         17: cnt/RefCnt<0>     30: fsb/Ready0r 
-  5: A_FSB<19>         18: cnt/RefCnt<1>     31: nAS_FSB 
-  6: A_FSB<1>          19: cnt/RefCnt<2>     32: nRES 
-  7: A_FSB<20>         20: cnt/RefCnt<3>     33: ram/BACTr 
-  8: A_FSB<21>         21: cnt/RefCnt<4>     34: ram/Once 
-  9: A_FSB<22>         22: cnt/RefCnt<5>     35: ram/RAMReady 
- 10: A_FSB<23>         23: cnt/RefCnt<6>     36: ram/RASEL 
- 11: A_FSB<2>          24: cnt/RefCnt<7>     37: ram/RS_FSM_FFd1 
- 12: A_FSB<8>          25: cnt/RefDone       38: ram/RS_FSM_FFd2 
- 13: A_FSB<9>          26: cnt/TimeoutBPre   39: ram/RS_FSM_FFd3 
-
-Signal                        1         2         3         4 FB
-Name                0----+----0----+----0----+----0----+----0 Inputs
-TimeoutB             ...............XXXXXXXXX.X..X.X......... 12
-RA<1>                .X........X........................X.... 3
-cnt/RefDone          .............X..XXXXXXXXX............... 10
-fsb/Ready0r          .......XXX.................XXXX...X..... 8
-RA<7>                ..X........X.......................X.... 3
-RA<0>                X....X.............................X.... 3
-cs/nOverlay0         ......XXXX................X.X.XX........ 8
-RA<8>                ...X...XXX..X..............X.......X.... 7
-RA<10>               .......X................................ 1
-cnt/TimeoutBPre      ................XXXXXXXX.X..X.X......... 11
-RA<9>                ....X.X............................X.... 3
-TimeoutA             ..............X.XXXXXXX.....X.X......... 10
-ram/RS_FSM_FFd3      .......XXX...........XXXX..XX.X..X..XXX. 14
-ram/RS_FSM_FFd2      .......XXX...........XXXX..XX.X.X...XXX. 14
-ram/RAMReady         .......XXX...........XXXX..XX.X.XX..XXX. 15
-                    0----+----1----+----2----+----3----+----4
-                              0         0         0         0
-*********************************** FB8  ***********************************
 Number of function block inputs used/remaining:               36/18
 Number of signals used by logic mapping into function block:  36
 Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
 Name                Pt      Pt    Pt  Pt               #    Type    Use
-ram/RASEL            20      15<-   0   0     FB8_1         (b)     (b)
-RA<11>                1       1<- /\5   0     FB8_2   63    I/O     O
-fsb/BERR0r            3       0   /\1   1     FB8_3         (b)     (b)
-ram/RS_FSM_FFd1       5       0     0   0     FB8_4         (b)     (b)
-nRAS                  3       0     0   2     FB8_5   64    I/O     O
-nRAMLWE               1       0     0   4     FB8_6   65    I/O     O
-ram/Once              5       0     0   0     FB8_7         (b)     (b)
-nRAMUWE               1       0   \/4   0     FB8_8   66    I/O     O
-iobs/Load1           14       9<-   0   0     FB8_9   67    I/O     (b)
-(unused)              0       0   /\5   0     FB8_10        (b)     (b)
-(unused)              0       0   \/3   2     FB8_11  68    I/O     (b)
-nBERR_FSB             3       3<- \/5   0     FB8_12  70    I/O     O
-ram/RAMDIS2           7       5<- \/3   0     FB8_13        (b)     (b)
-(unused)              0       0   \/5   0     FB8_14  71    I/O     (b)
-ram/RAMDIS1          18      13<-   0   0     FB8_15  72    I/O     (b)
-(unused)              0       0   /\5   0     FB8_16        (b)     (b)
-(unused)              0       0   \/5   0     FB8_17  73    I/O     (b)
-(unused)              0       0   \/5   0     FB8_18        (b)     (b)
+ram/RAMReady         16      11<-   0   0     FB7_1         (b)     (b)
+RA<1>                 2       2<- /\5   0     FB7_2   50    I/O     O
+TimeoutB              3       0   /\2   0     FB7_3         (b)     (b)
+fsb/Ready0r           3       0     0   2     FB7_4         (b)     (b)
+RA<7>                 2       0     0   3     FB7_5   52    I/O     O
+RA<0>                 2       0     0   3     FB7_6   53    I/O     O
+ram/RS_FSM_FFd1       5       0     0   0     FB7_7         (b)     (b)
+RA<8>                 7       2<-   0   0     FB7_8   54    I/O     O
+RA<10>                1       0   /\2   2     FB7_9   55    I/O     O
+$OpTx$$OpTx$FX_DC$182_INV$783
+                      6       1<-   0   0     FB7_10        (b)     (b)
+RA<9>                 2       0   /\1   2     FB7_11  56    I/O     O
+CLK25EN               1       0   \/4   0     FB7_12  58    I/O     O
+ram/RS_FSM_FFd3      11       6<-   0   0     FB7_13        (b)     (b)
+CLK20EN               1       0   /\2   2     FB7_14  59    I/O     O
+(unused)              0       0   \/4   1     FB7_15  60    I/O     I
+(unused)              0       0   \/5   0     FB7_16        (b)     (b)
+ram/RS_FSM_FFd2      13       9<- \/1   0     FB7_17  61    I/O     I
+(unused)              0       0   \/5   0     FB7_18        (b)     (b)
 
 Signals Used by Logic in Function Block
-  1: A_FSB<13>         13: TimeoutB          25: nADoutLE1 
-  2: A_FSB<14>         14: cnt/RefCnt<5>     26: nAS_FSB 
-  3: A_FSB<16>         15: cnt/RefCnt<6>     27: nLDS_FSB 
-  4: A_FSB<17>         16: cnt/RefCnt<7>     28: nUDS_FSB 
-  5: A_FSB<18>         17: cnt/RefDone       29: nWE_FSB 
-  6: A_FSB<19>         18: cs/nOverlay1      30: ram/BACTr 
-  7: A_FSB<20>         19: fsb/ASrf          31: ram/Once 
-  8: A_FSB<21>         20: fsb/BERR0r        32: ram/RAMDIS1 
-  9: A_FSB<22>         21: fsb/BERR1r        33: ram/RAMDIS2 
- 10: A_FSB<23>         22: iobs/Once         34: ram/RS_FSM_FFd1 
- 11: BERR_IOBS         23: iobs/PS_FSM_FFd1  35: ram/RS_FSM_FFd2 
- 12: RefAck            24: iobs/PS_FSM_FFd2  36: ram/RS_FSM_FFd3 
+  1: A_FSB<10>         13: A_FSB<9>          25: cnt/TimeoutBPre 
+  2: A_FSB<11>         14: SW<0>             26: cs/nOverlay1 
+  3: A_FSB<17>         15: TimeoutB          27: fsb/ASrf 
+  4: A_FSB<18>         16: cnt/RefCnt<0>     28: fsb/Ready0r 
+  5: A_FSB<19>         17: cnt/RefCnt<1>     29: nAS_FSB 
+  6: A_FSB<1>          18: cnt/RefCnt<2>     30: ram/BACTr 
+  7: A_FSB<20>         19: cnt/RefCnt<3>     31: ram/Once 
+  8: A_FSB<21>         20: cnt/RefCnt<4>     32: ram/RAMReady 
+  9: A_FSB<22>         21: cnt/RefCnt<5>     33: ram/RASEL 
+ 10: A_FSB<23>         22: cnt/RefCnt<6>     34: ram/RS_FSM_FFd1 
+ 11: A_FSB<2>          23: cnt/RefCnt<7>     35: ram/RS_FSM_FFd2 
+ 12: A_FSB<8>          24: cnt/RefDone       36: ram/RS_FSM_FFd3 
+
+Signal                        1         2         3         4 FB
+Name                0----+----0----+----0----+----0----+----0 Inputs
+ram/RAMReady         .......XXX..........XXXX.XX.XXX..XXX.... 15
+RA<1>                .X........X.....................X....... 3
+TimeoutB             ..............XXXXXXXXX.X.X.X........... 12
+fsb/Ready0r          .......XXX...............XXXX..X........ 8
+RA<7>                ..X........X....................X....... 3
+RA<0>                X....X..........................X....... 3
+ram/RS_FSM_FFd1      .......XXX...............XX.X.X..XXX.... 10
+RA<8>                ...X...XXX..X............X......X....... 7
+RA<10>               .......X................................ 1
+$OpTx$$OpTx$FX_DC$182_INV$783 
+                     ......XXXX....X..........X.X...X........ 8
+RA<9>                ....X.X.........................X....... 3
+CLK25EN              .............X.......................... 1
+ram/RS_FSM_FFd3      .......XXX..........XXXX.XX.X.X..XXX.... 14
+CLK20EN              .............X.......................... 1
+ram/RS_FSM_FFd2      .......XXX..........XXXX.XX.XX...XXX.... 14
+                    0----+----1----+----2----+----3----+----4
+                              0         0         0         0
+*********************************** FB8  ***********************************
+Number of function block inputs used/remaining:               37/17
+Number of signals used by logic mapping into function block:  37
+Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
+Name                Pt      Pt    Pt  Pt               #    Type    Use
+(unused)              0       0   /\5   0     FB8_1         (b)     (b)
+RA<11>                1       0   /\4   0     FB8_2   63    I/O     O
+(unused)              0       0   \/5   0     FB8_3         (b)     (b)
+iobs/PS_FSM_FFd2     15      10<-   0   0     FB8_4         (b)     (b)
+nRAS                  3       3<- /\5   0     FB8_5   64    I/O     O
+nRAMLWE               1       0   /\3   1     FB8_6   65    I/O     O
+RESDone               1       0   \/1   3     FB8_7         (b)     (b)
+nRAMUWE               1       1<- \/5   0     FB8_8   66    I/O     O
+IOREQ                15      10<-   0   0     FB8_9   67    I/O     (b)
+(unused)              0       0   /\5   0     FB8_10        (b)     (b)
+(unused)              0       0   \/2   3     FB8_11  68    I/O     (b)
+nBERR_FSB             3       2<- \/4   0     FB8_12  70    I/O     O
+(unused)              0       0   \/5   0     FB8_13        (b)     (b)
+iobs/Once            18      13<-   0   0     FB8_14  71    I/O     (b)
+nBR_IOB               1       0   /\4   0     FB8_15  72    I/O     O
+fsb/BERR0r            3       0     0   2     FB8_16        (b)     (b)
+(unused)              0       0   \/5   0     FB8_17  73    I/O     I
+IORW0                19      14<-   0   0     FB8_18        (b)     (b)
+
+Signals Used by Logic in Function Block
+  1: A_FSB<13>         14: IPL2r1            26: iobs/IOACTr 
+  2: A_FSB<14>         15: RESDone           27: iobs/IORW1 
+  3: A_FSB<16>         16: RESr0             28: iobs/Once 
+  4: A_FSB<17>         17: RESr1             29: iobs/PS_FSM_FFd1 
+  5: A_FSB<18>         18: RESr2             30: iobs/PS_FSM_FFd2 
+  6: A_FSB<19>         19: RefAck            31: nADoutLE1 
+  7: A_FSB<20>         20: SW<1>             32: nAS_FSB 
+  8: A_FSB<21>         21: TimeoutB          33: nLDS_FSB 
+  9: A_FSB<22>         22: cs/nOverlay1      34: nUDS_FSB 
+ 10: A_FSB<23>         23: fsb/ASrf          35: nWE_FSB 
+ 11: BERR_IOBS         24: fsb/BERR0r        36: ram/RAMDIS1 
+ 12: IORW0             25: fsb/BERR1r        37: ram/RAMDIS2 
+ 13: IPL2r0           
 
 Signal                        1         2         3         4 FB
 Name                0----+----0----+----0----+----0----+----0 Inputs
-ram/RASEL            .......XXX...XXXXXX......X...XX..XXX.... 15
 RA<11>               .....X.................................. 1
-fsb/BERR0r           ......XXXX..X.....XX.....X.............. 8
-ram/RS_FSM_FFd1      .......XXX.......XX......X....X..XXX.... 10
-nRAS                 .......XXX.X.....X.......X.....XX....... 8
-nRAMLWE              .........................XX.X..XX....... 5
-ram/Once             .......XXX.......XX......X....X..XXX.... 10
-nRAMUWE              .........................X.XX..XX....... 5
-iobs/Load1           XXXXXXXXXX.......XX..XXXXX..X........... 18
-nBERR_FSB            ......XXXXX.X......XX....X.............. 9
-ram/RAMDIS2          .......XXX...XXXXXX......X....X.XXXX.... 15
-ram/RAMDIS1          .......XXX...XXXXXX......X...XX..XXX.... 15
+iobs/PS_FSM_FFd2     XXXXXXXXXX.........X.XX..X.XXXXX..X..... 20
+nRAS                 .......XXX........X..X.........X...XX... 8
+nRAMLWE              ...............................XX.XXX... 5
+RESDone              ...............XXX...................... 3
+nRAMUWE              ...............................X.XXXX... 5
+IOREQ                XXXXXXXXXX.........X.XX..X.XXXXX..X..... 20
+nBERR_FSB            ......XXXXX.........X..XX......X........ 9
+iobs/Once            XXXXXXXXXX.........X.XX....XXXXX..X..... 19
+nBR_IOB              ............XXXXXX...................... 6
+fsb/BERR0r           ......XXXX..........X.XX.......X........ 8
+IORW0                XXXXXXXXXX.X.......X.XX...XXXXXX..X..... 21
                     0----+----1----+----2----+----3----+----4
                               0         0         0         0
 *******************************  Equations  ********************************
@@ -678,17 +716,22 @@ ram/RAMDIS1          .......XXX...XXXXXX......X...XX..XXX.... 15
 ********** Mapped Logic **********
 
 
-$OpTx$FX_DC$609 <= (nAS_FSB AND NOT fsb/ASrf);
+$OpTx$$OpTx$FX_DC$182_INV$783 <= ((NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
+	NOT cs/nOverlay1 AND NOT fsb/Ready0r AND NOT ram/RAMReady)
+	OR (A_FSB(23) AND TimeoutB)
+	OR (NOT A_FSB(22) AND TimeoutB)
+	OR (A_FSB(21) AND TimeoutB)
+	OR (NOT A_FSB(20) AND TimeoutB)
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
+	NOT fsb/Ready0r AND NOT ram/RAMReady));
 
 
-$OpTx$FX_DC$610 <= ((NOT TimeoutB)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20)));
+$OpTx$FX_DC$708 <= (nAS_FSB AND NOT fsb/ASrf);
 
 FDCPE_ALE0M: FDCPE port map (ALE0M,ALE0M_D,CLK2X_IOB,'0','0');
-ALE0M_D <= ((NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	iobm/IOS_FSM_FFd1)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	NOT iobm/IOS_FSM_FFd2 AND NOT iobm/IOREQr));
+ALE0M_D <= ((iobm/IOS_FSM_FFd2)
+	OR (iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1)
+	OR (NOT iobm/IOS_FSM_FFd1 AND iobm/IOREQr AND NOT nAoutOE));
 
 FDCPE_ALE0S: FDCPE port map (ALE0S,ALE0S_D,CLK_FSB,'0','0');
 ALE0S_D <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1);
@@ -703,10 +746,10 @@ BERR_IOBS_T <= ((BERR_IOBS AND nAS_FSB AND NOT fsb/ASrf)
 	NOT iobs/IOACTr AND IOBERR AND fsb/ASrf AND nADoutLE1));
 
 
+CLK20EN <= SW(0);
 
 
-
-
+CLK25EN <= NOT SW(0);
 
 
 
@@ -755,42 +798,44 @@ BERR_IOBS_T <= ((BERR_IOBS AND nAS_FSB AND NOT fsb/ASrf)
 
 
 FDCPE_IOACT: FDCPE port map (IOACT,IOACT_D,CLK2X_IOB,'0','0');
-IOACT_D <= ((NOT iobm/IOS_FSM_FFd4 AND iobm/IOS_FSM_FFd2 AND 
-	iobm/IOS_FSM_FFd1 AND CLK_IOB AND iobm/RESrf AND iobm/RESrr)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	iobm/IOS_FSM_FFd1)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	NOT iobm/IOS_FSM_FFd2 AND NOT iobm/IOREQr)
-	OR (NOT iobm/IOS_FSM_FFd4 AND iobm/IOS_FSM_FFd2 AND 
-	iobm/IOS_FSM_FFd1 AND CLK_IOB AND iobm/ETACK)
-	OR (NOT iobm/IOS_FSM_FFd4 AND iobm/IOS_FSM_FFd2 AND 
-	iobm/IOS_FSM_FFd1 AND CLK_IOB AND iobm/DTACKrf AND iobm/DTACKrr)
-	OR (NOT iobm/IOS_FSM_FFd4 AND iobm/IOS_FSM_FFd2 AND 
-	iobm/IOS_FSM_FFd1 AND CLK_IOB AND iobm/BERRrf AND iobm/BERRrr));
+IOACT_D <= ((CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
+	iobm/DTACKrf AND iobm/DTACKrr)
+	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
+	iobm/RESrf AND iobm/RESrr)
+	OR (iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2)
+	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2 AND 
+	NOT iobm/IOREQr)
+	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2 AND nAoutOE)
+	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
+	iobm/ETACK)
+	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
+	iobm/BERRrf AND iobm/BERRrr));
 
 FTCPE_IOBERR: FTCPE port map (IOBERR,IOBERR_T,CLK2X_IOB,'0','0');
-IOBERR_T <= ((nBERR_IOB AND NOT iobm/IOS_FSM_FFd4 AND 
-	iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2 AND iobm/IOS_FSM_FFd1 AND CLK_IOB AND 
-	IOBERR AND iobm/RESrf AND iobm/RESrr)
-	OR (nBERR_IOB AND NOT iobm/IOS_FSM_FFd4 AND 
-	iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2 AND iobm/IOS_FSM_FFd1 AND CLK_IOB AND 
-	IOBERR AND iobm/ETACK)
-	OR (nBERR_IOB AND NOT iobm/IOS_FSM_FFd4 AND 
-	iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2 AND iobm/IOS_FSM_FFd1 AND CLK_IOB AND 
-	IOBERR AND iobm/DTACKrf AND iobm/DTACKrr)
-	OR (nBERR_IOB AND NOT iobm/IOS_FSM_FFd4 AND 
-	iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2 AND iobm/IOS_FSM_FFd1 AND CLK_IOB AND 
-	IOBERR AND iobm/BERRrf AND iobm/BERRrr)
-	OR (iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	NOT iobm/IOS_FSM_FFd2 AND NOT iobm/IOS_FSM_FFd1 AND IOBERR)
-	OR (NOT nBERR_IOB AND NOT iobm/IOS_FSM_FFd4 AND 
-	iobm/IOS_FSM_FFd3 AND CLK_IOB AND NOT IOBERR AND iobm/ETACK)
-	OR (NOT nBERR_IOB AND NOT iobm/IOS_FSM_FFd4 AND 
-	iobm/IOS_FSM_FFd3 AND CLK_IOB AND NOT IOBERR AND iobm/DTACKrf AND iobm/DTACKrr)
-	OR (NOT nBERR_IOB AND NOT iobm/IOS_FSM_FFd4 AND 
-	iobm/IOS_FSM_FFd3 AND CLK_IOB AND NOT IOBERR AND iobm/BERRrf AND iobm/BERRrr)
-	OR (NOT nBERR_IOB AND NOT iobm/IOS_FSM_FFd4 AND 
-	iobm/IOS_FSM_FFd3 AND CLK_IOB AND NOT IOBERR AND iobm/RESrf AND iobm/RESrr));
+IOBERR_T <= ((CLK_IOB AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
+	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/RESrf AND 
+	iobm/RESrr)
+	OR (CLK_IOB AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
+	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/DTACKrf AND 
+	iobm/DTACKrr)
+	OR (CLK_IOB AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
+	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/BERRrf AND 
+	iobm/BERRrr)
+	OR (CLK_IOB AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
+	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/RESrf AND 
+	iobm/RESrr)
+	OR (iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND 
+	NOT iobm/IOS_FSM_FFd2 AND IOBERR)
+	OR (CLK_IOB AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
+	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/ETACK)
+	OR (CLK_IOB AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
+	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/ETACK)
+	OR (CLK_IOB AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
+	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/DTACKrf AND 
+	iobm/DTACKrr)
+	OR (CLK_IOB AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
+	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/BERRrf AND 
+	iobm/BERRrr));
 
 FDCPE_IOL0: FDCPE port map (IOL0,IOL0_D,CLK_FSB,'0','0',IOL0_CE);
 IOL0_D <= ((NOT nLDS_FSB AND nADoutLE1)
@@ -800,17 +845,19 @@ IOL0_CE <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1);
 FDCPE_IOREQ: FDCPE port map (IOREQ,IOREQ_D,CLK_FSB,'0','0');
 IOREQ_D <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND 
 	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20) AND 
 	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND 
 	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND 
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND 
 	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB AND 
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND 
 	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND 
 	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND 
+	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB AND 
+	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
+	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1) AND 
 	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
 	OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21) AND 
 	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
@@ -819,63 +866,41 @@ IOREQ_D <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND
 	OR (NOT iobs/PS_FSM_FFd2 AND iobs/PS_FSM_FFd1)
 	OR (iobs/PS_FSM_FFd1 AND iobs/IOACTr)
 	OR (iobs/Once AND NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND NOT iobs/PS_FSM_FFd2 AND 
-	nADoutLE1)
 	OR (nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT fsb/ASrf AND 
-	nADoutLE1));
+	nADoutLE1)
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
+	NOT iobs/PS_FSM_FFd2 AND nADoutLE1));
 
 FTCPE_IORW0: FTCPE port map (IORW0,IORW0_T,CLK_FSB,'0','0');
-IORW0_T <= ((nROMCS_OBUF.EXP)
-	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND 
-	NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND 
-	NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1)
-	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND 
-	NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND 
-	NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1)
-	OR (A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
-	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
-	cs/nOverlay1 AND NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND NOT nAS_FSB AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (A_FSB(23) AND NOT iobs/Once AND NOT IORW0 AND nWE_FSB AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT iobs/Once AND 
-	IORW0 AND NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT iobs/Once AND 
-	IORW0 AND NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND 
-	fsb/ASrf AND nADoutLE1)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT iobs/Once AND 
-	NOT IORW0 AND nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT iobs/Once AND 
-	NOT IORW0 AND nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND 
-	fsb/ASrf AND nADoutLE1)
-	OR (IORW0 AND NOT iobs/IORW1 AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND NOT nADoutLE1)
-	OR (NOT IORW0 AND iobs/IORW1 AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND NOT nADoutLE1)
-	OR (A_FSB(23) AND NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND 
-	NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (A_FSB(23) AND NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND 
-	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1)
-	OR (A_FSB(23) AND NOT iobs/Once AND NOT IORW0 AND nWE_FSB AND 
-	NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1));
+IORW0_T <= ((A_FSB_19_IBUF$BUF0.EXP)
+	OR (IORW0 AND iobs/IORW1 AND NOT nADoutLE1)
+	OR (NOT IORW0 AND NOT iobs/IORW1 AND NOT nADoutLE1)
+	OR (nAS_FSB AND NOT fsb/ASrf AND nADoutLE1)
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND nADoutLE1)
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT IORW0 AND nADoutLE1)
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND nADoutLE1)
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND nADoutLE1)
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND nADoutLE1)
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND nADoutLE1)
+	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1) AND nADoutLE1)
+	OR (NOT IORW0 AND NOT nWE_FSB AND nADoutLE1)
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
+	nADoutLE1)
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20) AND nADoutLE1)
+	OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21) AND 
+	nADoutLE1)
+	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
+	cs/nOverlay1 AND nADoutLE1));
 
 FDCPE_IOU0: FDCPE port map (IOU0,IOU0_D,CLK_FSB,'0','0',IOU0_CE);
 IOU0_D <= ((NOT nUDS_FSB AND nADoutLE1)
 	OR (iobs/IOU1 AND NOT nADoutLE1));
 IOU0_CE <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1);
 
+FDCPE_IPL2r0: FDCPE port map (IPL2r0,NOT nIPL2,CLK_FSB,'0','0');
+
+FDCPE_IPL2r1: FDCPE port map (IPL2r1,IPL2r0,CLK_FSB,'0','0');
+
 
 RA(0) <= ((A_FSB(10) AND NOT ram/RASEL)
 	OR (ram/RASEL AND A_FSB(1)));
@@ -885,8 +910,8 @@ RA(1) <= ((A_FSB(11) AND NOT ram/RASEL)
 	OR (ram/RASEL AND A_FSB(2)));
 
 
-RA(2) <= ((ram/RASEL AND A_FSB(3))
-	OR (A_FSB(12) AND NOT ram/RASEL));
+RA(2) <= ((A_FSB(12) AND NOT ram/RASEL)
+	OR (ram/RASEL AND A_FSB(3)));
 
 
 RA(3) <= ((A_FSB(13) AND NOT ram/RASEL)
@@ -929,6 +954,15 @@ RA(10) <= A_FSB(21);
 
 RA(11) <= A_FSB(19);
 
+FDCPE_RESDone: FDCPE port map (RESDone,'1',CLK_FSB,'0','0',RESDone_CE);
+RESDone_CE <= (NOT RESr0 AND NOT RESr1 AND RESr2);
+
+FDCPE_RESr0: FDCPE port map (RESr0,NOT nRES,CLK_FSB,'0','0');
+
+FDCPE_RESr1: FDCPE port map (RESr1,RESr0,CLK_FSB,'0','0');
+
+FDCPE_RESr2: FDCPE port map (RESr2,RESr1,CLK_FSB,'0','0');
+
 FDCPE_RefAck: FDCPE port map (RefAck,RefAck_D,CLK_FSB,'0','0');
 RefAck_D <= (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1);
 
@@ -1020,7 +1054,13 @@ fsb/Ready0r_D <= ((nAS_FSB AND NOT fsb/ASrf)
 	NOT cs/nOverlay1 AND NOT fsb/Ready0r AND NOT ram/RAMReady));
 
 FDCPE_fsb/Ready1r: FDCPE port map (fsb/Ready1r,fsb/Ready1r_D,CLK_FSB,'0','0');
-fsb/Ready1r_D <= ((A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
+fsb/Ready1r_D <= ((A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
+	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
+	NOT fsb/Ready1r AND NOT iobs/IOReady)
+	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
+	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
+	NOT fsb/Ready1r AND NOT iobs/IOReady)
+	OR (A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
 	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
 	cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND NOT iobs/IOReady AND 
 	NOT nADoutLE1)
@@ -1032,12 +1072,8 @@ fsb/Ready1r_D <= ((A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND
 	OR (A_FSB(23) AND NOT fsb/Ready1r AND NOT iobs/IOReady)
 	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT fsb/Ready1r AND 
 	NOT iobs/IOReady)
-	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-	NOT fsb/Ready1r AND NOT iobs/IOReady)
-	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-	NOT fsb/Ready1r AND NOT iobs/IOReady));
+	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT fsb/Ready1r AND 
+	NOT iobs/IOReady AND NOT SW(1)));
 
 FDCPE_fsb/Ready2r: FDCPE port map (fsb/Ready2r,fsb/Ready2r_D,CLK_FSB,'0','0');
 fsb/Ready2r_D <= ((nAS_FSB AND NOT fsb/ASrf)
@@ -1075,47 +1111,58 @@ fsb/Ready2r_D <= ((nAS_FSB AND NOT fsb/ASrf)
 	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r));
 
 FDCPE_fsb/VPA: FDCPE port map (fsb/VPA,fsb/VPA_D,CLK_FSB,'0','0');
-fsb/VPA_D <= ((EXP25_.EXP)
-	OR (NOT A_FSB(22) AND TimeoutB AND fsb/VPA AND 
-	NOT $OpTx$FX_DC$609)
-	OR (A_FSB(21) AND TimeoutB AND fsb/VPA AND 
-	NOT $OpTx$FX_DC$609)
+fsb/VPA_D <= ((EXP21_.EXP)
 	OR (A_FSB(23) AND NOT fsb/Ready1r AND fsb/VPA AND 
-	NOT iobs/IOReady AND NOT $OpTx$FX_DC$609)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-	NOT fsb/Ready0r AND fsb/VPA AND NOT ram/RAMReady AND NOT $OpTx$FX_DC$609)
+	NOT iobs/IOReady AND NOT $OpTx$FX_DC$708)
 	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT fsb/Ready1r AND 
-	fsb/VPA AND NOT iobs/IOReady AND NOT $OpTx$FX_DC$609)
-	OR (EXP16_.EXP)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT fsb/Ready0r AND fsb/VPA AND NOT ram/RAMReady AND 
-	NOT $OpTx$FX_DC$609)
+	fsb/VPA AND NOT iobs/IOReady AND NOT $OpTx$FX_DC$708)
+	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT fsb/Ready1r AND fsb/VPA AND 
+	NOT iobs/IOReady AND NOT SW(1) AND NOT $OpTx$FX_DC$708)
 	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
 	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-	NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND NOT $OpTx$FX_DC$609)
+	NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND NOT $OpTx$FX_DC$708)
 	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
 	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-	NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND NOT $OpTx$FX_DC$609)
+	NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND NOT $OpTx$FX_DC$708)
+	OR (nROMWE_OBUF.EXP)
 	OR (A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
 	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
 	cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND 
-	NOT nADoutLE1 AND NOT $OpTx$FX_DC$609)
+	NOT nADoutLE1 AND NOT $OpTx$FX_DC$708)
 	OR (A_FSB(13) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
 	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
 	cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND 
-	NOT nADoutLE1 AND NOT $OpTx$FX_DC$609)
-	OR (BERR_IOBS AND fsb/VPA AND NOT $OpTx$FX_DC$609)
-	OR (fsb/BERR0r AND fsb/VPA AND NOT $OpTx$FX_DC$609)
-	OR (fsb/BERR1r AND fsb/VPA AND NOT $OpTx$FX_DC$609)
-	OR (A_FSB(23) AND TimeoutB AND fsb/VPA AND 
-	NOT $OpTx$FX_DC$609)
-	OR (NOT A_FSB(20) AND TimeoutB AND fsb/VPA AND 
-	NOT $OpTx$FX_DC$609));
+	NOT nADoutLE1 AND NOT $OpTx$FX_DC$708)
+	OR (A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
+	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
+	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
+	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND 
+	fsb/VPA AND NOT $OpTx$FX_DC$708)
+	OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
+	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
+	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
+	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND 
+	fsb/VPA AND NOT $OpTx$FX_DC$708)
+	OR (A_FSB(8) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
+	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
+	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
+	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND 
+	fsb/VPA AND NOT $OpTx$FX_DC$708)
+	OR (BERR_IOBS AND fsb/VPA AND NOT $OpTx$FX_DC$708)
+	OR (fsb/BERR0r AND fsb/VPA AND NOT $OpTx$FX_DC$708)
+	OR (fsb/BERR1r AND fsb/VPA AND NOT $OpTx$FX_DC$708)
+	OR (fsb/VPA AND NOT nBR_IOB AND NOT $OpTx$FX_DC$708)
+	OR (fsb/VPA AND NOT $OpTx$FX_DC$708 AND 
+	$OpTx$$OpTx$FX_DC$182_INV$783));
 
 FDCPE_iobm/BERRrf: FDCPE port map (iobm/BERRrf,NOT nBERR_IOB,NOT CLK2X_IOB,'0','0');
 
 FDCPE_iobm/BERRrr: FDCPE port map (iobm/BERRrr,NOT nBERR_IOB,CLK2X_IOB,'0','0');
 
+FDCPE_iobm/BGr0: FDCPE port map (iobm/BGr0,NOT nBG_IOB,CLK2X_IOB,'0','0');
+
+FDCPE_iobm/BGr1: FDCPE port map (iobm/BGr1,iobm/BGr0,CLK2X_IOB,'0','0');
+
 FDCPE_iobm/DTACKrf: FDCPE port map (iobm/DTACKrf,NOT nDTACK_IOB,NOT CLK2X_IOB,'0','0');
 
 FDCPE_iobm/DTACKrr: FDCPE port map (iobm/DTACKrr,NOT nDTACK_IOB,CLK2X_IOB,'0','0');
@@ -1164,36 +1211,27 @@ FDCPE_iobm/Er2: FDCPE port map (iobm/Er2,iobm/Er,CLK2X_IOB,'0','0');
 FDCPE_iobm/IOREQr: FDCPE port map (iobm/IOREQr,IOREQ,NOT CLK2X_IOB,'0','0');
 
 FDCPE_iobm/IOS_FSM_FFd1: FDCPE port map (iobm/IOS_FSM_FFd1,iobm/IOS_FSM_FFd1_D,CLK2X_IOB,'0','0');
-iobm/IOS_FSM_FFd1_D <= ((iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd2 AND 
-	NOT iobm/IOS_FSM_FFd1)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	NOT iobm/IOS_FSM_FFd2));
+iobm/IOS_FSM_FFd1_D <= ((iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1)
+	OR (NOT iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2));
 
-FDCPE_iobm/IOS_FSM_FFd2: FDCPE port map (iobm/IOS_FSM_FFd2,iobm/IOS_FSM_FFd2_D,CLK2X_IOB,'0','0');
-iobm/IOS_FSM_FFd2_D <= ((NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	iobm/IOS_FSM_FFd1)
-	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2 AND 
-	NOT iobm/IOS_FSM_FFd1));
+FTCPE_iobm/IOS_FSM_FFd2: FTCPE port map (iobm/IOS_FSM_FFd2,iobm/IOS_FSM_FFd2_T,CLK2X_IOB,'0','0');
+iobm/IOS_FSM_FFd2_T <= ((iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND 
+	NOT iobm/IOS_FSM_FFd2)
+	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
+	iobm/IOS_FSM_FFd2 AND iobm/ETACK)
+	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
+	iobm/IOS_FSM_FFd2 AND iobm/DTACKrf AND iobm/DTACKrr)
+	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
+	iobm/IOS_FSM_FFd2 AND iobm/BERRrf AND iobm/BERRrr)
+	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
+	iobm/IOS_FSM_FFd2 AND iobm/RESrf AND iobm/RESrr));
 
 FDCPE_iobm/IOS_FSM_FFd3: FDCPE port map (iobm/IOS_FSM_FFd3,iobm/IOS_FSM_FFd3_D,CLK2X_IOB,'0','0');
-iobm/IOS_FSM_FFd3_D <= ((NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3)
-	OR (NOT iobm/IOS_FSM_FFd4 AND CLK_IOB AND iobm/ETACK)
-	OR (NOT iobm/IOS_FSM_FFd4 AND CLK_IOB AND iobm/DTACKrf AND 
-	iobm/DTACKrr)
-	OR (NOT iobm/IOS_FSM_FFd4 AND CLK_IOB AND iobm/BERRrf AND 
-	iobm/BERRrr)
-	OR (NOT iobm/IOS_FSM_FFd4 AND CLK_IOB AND iobm/RESrf AND 
-	iobm/RESrr));
-
-FDCPE_iobm/IOS_FSM_FFd4: FDCPE port map (iobm/IOS_FSM_FFd4,iobm/IOS_FSM_FFd4_D,CLK2X_IOB,'0','0');
-iobm/IOS_FSM_FFd4_D <= ((NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	iobm/IOS_FSM_FFd1)
-	OR (iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2 AND 
-	iobm/IOS_FSM_FFd1)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	NOT iobm/IOS_FSM_FFd2 AND CLK_IOB)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	NOT iobm/IOS_FSM_FFd2 AND NOT iobm/IOREQr));
+iobm/IOS_FSM_FFd3_D <= ((iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2)
+	OR (iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND 
+	NOT iobm/IOS_FSM_FFd2)
+	OR (NOT CLK_IOB AND NOT iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2 AND 
+	iobm/IOREQr AND NOT nAoutOE));
 
 FDCPE_iobm/RESrf: FDCPE port map (iobm/RESrf,NOT nRES,NOT CLK2X_IOB,'0','0');
 
@@ -1213,20 +1251,20 @@ FDCPE_iobs/IOL1: FDCPE port map (iobs/IOL1,NOT nLDS_FSB,CLK_FSB,'0','0',iobs/Loa
 FTCPE_iobs/IORW1: FTCPE port map (iobs/IORW1,iobs/IORW1_T,CLK_FSB,'0','0');
 iobs/IORW1_T <= ((iobs/Once)
 	OR (NOT nADoutLE1)
-	OR (NOT nWE_FSB AND NOT iobs/IORW1)
+	OR (fsb/Ready1r.EXP)
 	OR (nAS_FSB AND NOT fsb/ASrf)
 	OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1)
 	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21))
 	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1)
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20))
 	OR (fsb/Ready2r.EXP)
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19))
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18))
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17))
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16))
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	cs/nOverlay1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(20))
+	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1))
 	OR (nWE_FSB AND iobs/IORW1)
+	OR (NOT nWE_FSB AND NOT iobs/IORW1)
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT iobs/IORW1));
 
 FTCPE_iobs/IOReady: FTCPE port map (iobs/IOReady,iobs/IOReady_T,CLK_FSB,'0','0');
@@ -1244,37 +1282,37 @@ FDCPE_iobs/Load1: FDCPE port map (iobs/Load1,iobs/Load1_D,CLK_FSB,'0','0');
 iobs/Load1_D <= ((iobs/Once)
 	OR (NOT nADoutLE1)
 	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21))
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1)
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20))
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19))
-	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18))
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17))
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16))
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18))
+	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB)
+	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1))
 	OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21))
 	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
 	cs/nOverlay1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(20))
 	OR (nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1));
+	OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1)
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1));
 
 FDCPE_iobs/Once: FDCPE port map (iobs/Once,iobs/Once_D,CLK_FSB,'0','0');
-iobs/Once_D <= ((nOE_OBUF.EXP)
+iobs/Once_D <= ((nBERR_FSB_OBUF.EXP)
 	OR (A_FSB(23) AND NOT iobs/Once AND iobs/PS_FSM_FFd1)
-	OR (NOT iobs/Once AND iobs/PS_FSM_FFd2 AND NOT nADoutLE1)
 	OR (NOT iobs/Once AND iobs/PS_FSM_FFd1 AND NOT nADoutLE1)
 	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND NOT iobs/Once)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
-	NOT iobs/Once)
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT iobs/Once AND 
+	NOT cs/nOverlay1)
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20) AND NOT iobs/Once)
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND NOT iobs/Once)
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND NOT iobs/Once)
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND NOT iobs/Once)
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND NOT iobs/Once)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT iobs/Once AND nWE_FSB)
 	OR (nAS_FSB AND NOT fsb/ASrf)
 	OR (A_FSB(23) AND NOT iobs/Once AND iobs/PS_FSM_FFd2)
-	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND NOT iobs/Once)
 	OR (A_FSB(22) AND NOT iobs/Once AND iobs/PS_FSM_FFd2)
-	OR (A_FSB(22) AND NOT iobs/Once AND iobs/PS_FSM_FFd1));
+	OR (A_FSB(22) AND NOT iobs/Once AND iobs/PS_FSM_FFd1)
+	OR (NOT iobs/Once AND iobs/PS_FSM_FFd2 AND NOT nADoutLE1));
 
 FDCPE_iobs/PS_FSM_FFd1: FDCPE port map (iobs/PS_FSM_FFd1,iobs/PS_FSM_FFd1_D,CLK_FSB,'0','0');
 iobs/PS_FSM_FFd1_D <= ((iobs/PS_FSM_FFd2)
@@ -1283,17 +1321,19 @@ iobs/PS_FSM_FFd1_D <= ((iobs/PS_FSM_FFd2)
 FDCPE_iobs/PS_FSM_FFd2: FDCPE port map (iobs/PS_FSM_FFd2,iobs/PS_FSM_FFd2_D,CLK_FSB,'0','0');
 iobs/PS_FSM_FFd2_D <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND 
 	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20) AND 
 	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND 
 	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND 
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND 
 	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB AND 
+	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND 
 	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
 	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND 
 	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND 
+	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB AND 
+	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
+	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1) AND 
 	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
 	OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21) AND 
 	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
@@ -1305,10 +1345,10 @@ iobs/PS_FSM_FFd2_D <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND
 	NOT iobs/IOACTr)
 	OR (iobs/Once AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND 
 	nADoutLE1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND NOT iobs/PS_FSM_FFd2 AND 
-	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
 	OR (nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND 
-	NOT fsb/ASrf AND nADoutLE1));
+	NOT fsb/ASrf AND nADoutLE1)
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
+	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1));
 
 
 nADoutLE0 <= (NOT ALE0M AND NOT ALE0S);
@@ -1317,14 +1357,16 @@ FDCPE_nADoutLE1: FDCPE port map (nADoutLE1,nADoutLE1_D,CLK_FSB,'0','0');
 nADoutLE1_D <= ((iobs/Load1)
 	OR (NOT iobs/Clear1 AND NOT nADoutLE1));
 
-FDCPE_nAS_IOB: FDCPE port map (nAS_IOB,nAS_IOB_D,NOT CLK2X_IOB,'0','0');
-nAS_IOB_D <= ((NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	NOT iobm/IOS_FSM_FFd2)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	iobm/IOS_FSM_FFd1));
+FDCPE_nAS_IOB: FDCPE port map (nAS_IOB_I,nAS_IOB,NOT CLK2X_IOB,'0','0');
+nAS_IOB <= ((NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2)
+	OR (iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2));
+nAS_IOB <= nAS_IOB_I when nAS_IOB_OE = '1' else 'Z';
+nAS_IOB_OE <= NOT nAoutOE;
 
-
-nAoutOE <= '0';
+FDCPE_nAoutOE: FDCPE port map (nAoutOE,nAoutOE_D,CLK2X_IOB,'0','0');
+nAoutOE_D <= ((NOT iobm/BGr0 AND NOT iobm/BGr1)
+	OR (NOT iobm/BGr1 AND nAoutOE)
+	OR (NOT nAS_IOB AND NOT iobm/BGr0 AND NOT nAoutOE));
 
 
 nBERR_FSB <= ((nAS_FSB)
@@ -1332,22 +1374,25 @@ nBERR_FSB <= ((nAS_FSB)
 	OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND 
 	NOT BERR_IOBS AND NOT fsb/BERR0r AND NOT fsb/BERR1r));
 
+FDCPE_nBR_IOB: FDCPE port map (nBR_IOB,'0',CLK_FSB,'0','0',nBR_IOB_CE);
+nBR_IOB_CE <= (RESr0 AND RESr1 AND IPL2r0 AND RESr2 AND NOT RESDone AND 
+	IPL2r1);
+
 FDCPE_nCAS: FDCPE port map (nCAS,NOT ram/RASEL,NOT CLK_FSB,'0','0');
 
 FDCPE_nDTACK_FSB: FDCPE port map (nDTACK_FSB,nDTACK_FSB_D,CLK_FSB,'0','0');
-nDTACK_FSB_D <= ((EXP18_.EXP)
+nDTACK_FSB_D <= ((EXP17_.EXP)
+	OR (nAS_FSB AND NOT fsb/ASrf)
 	OR (A_FSB(23) AND NOT fsb/Ready1r AND NOT iobs/IOReady AND 
 	nDTACK_FSB)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-	NOT fsb/Ready0r AND nDTACK_FSB AND NOT ram/RAMReady)
 	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT fsb/Ready1r AND 
 	NOT iobs/IOReady AND nDTACK_FSB)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT fsb/Ready0r AND nDTACK_FSB AND NOT ram/RAMReady)
+	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT fsb/Ready1r AND 
+	NOT iobs/IOReady AND NOT SW(1) AND nDTACK_FSB)
 	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
 	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
 	NOT fsb/Ready1r AND NOT iobs/IOReady AND nDTACK_FSB)
-	OR (EXP21_.EXP)
+	OR (EXP20_.EXP)
 	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
 	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
 	NOT fsb/Ready1r AND NOT iobs/IOReady AND nDTACK_FSB)
@@ -1372,31 +1417,30 @@ nDTACK_FSB_D <= ((EXP18_.EXP)
 	OR (BERR_IOBS AND nDTACK_FSB)
 	OR (fsb/BERR0r AND nDTACK_FSB)
 	OR (fsb/BERR1r AND nDTACK_FSB)
-	OR (nAS_FSB AND NOT fsb/ASrf)
-	OR (nDTACK_FSB AND NOT $OpTx$FX_DC$610));
+	OR (nDTACK_FSB AND NOT nBR_IOB)
+	OR (nDTACK_FSB AND $OpTx$$OpTx$FX_DC$182_INV$783));
 
 FDCPE_nDinLE: FDCPE port map (nDinLE,nDinLE_D,NOT CLK2X_IOB,'0','0');
-nDinLE_D <= ((iobm/IOS_FSM_FFd4 AND iobm/IOS_FSM_FFd1)
-	OR (NOT iobm/IOS_FSM_FFd4 AND iobm/IOS_FSM_FFd3));
+nDinLE_D <= (iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2);
 
 
 nDinOE <= ((A_FSB(23) AND nWE_FSB AND NOT nAS_FSB)
 	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND nWE_FSB AND 
-	NOT nAS_FSB));
+	NOT nAS_FSB)
+	OR (A_FSB(22) AND NOT A_FSB(21) AND nWE_FSB AND NOT nAS_FSB AND 
+	NOT SW(1)));
 
 FDCPE_nDoutOE: FDCPE port map (nDoutOE,nDoutOE_D,CLK2X_IOB,'0','0');
 nDoutOE_D <= ((NOT IORW0)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	NOT iobm/IOS_FSM_FFd2));
+	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2));
 
-FDCPE_nLDS_IOB: FDCPE port map (nLDS_IOB,nLDS_IOB_D,NOT CLK2X_IOB,'0','0');
-nLDS_IOB_D <= ((NOT IOL0)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	NOT iobm/IOS_FSM_FFd2)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	iobm/IOS_FSM_FFd1)
-	OR (IORW0 AND iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd2 AND 
+FDCPE_nLDS_IOB: FDCPE port map (nLDS_IOB_I,nLDS_IOB,NOT CLK2X_IOB,'0','0');
+nLDS_IOB <= ((IOL0 AND NOT iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2)
+	OR (IOL0 AND iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2)
+	OR (NOT IORW0 AND IOL0 AND iobm/IOS_FSM_FFd3 AND 
 	NOT iobm/IOS_FSM_FFd1));
+nLDS_IOB <= nLDS_IOB_I when nLDS_IOB_OE = '1' else 'Z';
+nLDS_IOB_OE <= NOT nAoutOE;
 
 
 nOE <= NOT ((nWE_FSB AND NOT nAS_FSB));
@@ -1417,27 +1461,31 @@ nRAS <= NOT (((RefAck)
 	NOT cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND NOT ram/RAMDIS1)));
 
 
-nROMCS <= NOT (((NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20))
-	OR (NOT A_FSB(23) AND NOT A_FSB(21) AND NOT A_FSB(20) AND 
+nROMCS <= NOT (((A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND 
+	NOT SW(1))
+	OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND 
+	SW(1))
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND 
 	NOT cs/nOverlay1)));
 
 
 nROMWE <= NOT ((NOT nWE_FSB AND NOT nAS_FSB));
 
-FDCPE_nUDS_IOB: FDCPE port map (nUDS_IOB,nUDS_IOB_D,NOT CLK2X_IOB,'0','0');
-nUDS_IOB_D <= ((NOT IOU0)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	NOT iobm/IOS_FSM_FFd2)
-	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-	iobm/IOS_FSM_FFd1)
-	OR (IORW0 AND iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd2 AND 
+FDCPE_nUDS_IOB: FDCPE port map (nUDS_IOB_I,nUDS_IOB,NOT CLK2X_IOB,'0','0');
+nUDS_IOB <= ((IOU0 AND NOT iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2)
+	OR (IOU0 AND iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2)
+	OR (NOT IORW0 AND IOU0 AND iobm/IOS_FSM_FFd3 AND 
 	NOT iobm/IOS_FSM_FFd1));
+nUDS_IOB <= nUDS_IOB_I when nUDS_IOB_OE = '1' else 'Z';
+nUDS_IOB_OE <= NOT nAoutOE;
 
-FTCPE_nVMA_IOB: FTCPE port map (nVMA_IOB,nVMA_IOB_T,CLK2X_IOB,'0','0');
+FTCPE_nVMA_IOB: FTCPE port map (nVMA_IOB_I,nVMA_IOB_T,CLK2X_IOB,'0','0');
 nVMA_IOB_T <= ((NOT nVMA_IOB AND NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND 
 	NOT iobm/ES(3) AND NOT iobm/ES(4))
 	OR (nVMA_IOB AND iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND 
 	NOT iobm/ES(3) AND NOT iobm/ES(4) AND IOACT AND iobm/VPArf AND iobm/VPArr));
+nVMA_IOB <= nVMA_IOB_I when nVMA_IOB_OE = '1' else 'Z';
+nVMA_IOB_OE <= NOT nAoutOE;
 
 
 nVPA_FSB <= NOT ((fsb/VPA AND NOT nAS_FSB));
@@ -1447,33 +1495,33 @@ ram/BACTr_D <= (nAS_FSB AND NOT fsb/ASrf);
 
 FTCPE_ram/Once: FTCPE port map (ram/Once,ram/Once_T,CLK_FSB,'0','0');
 ram/Once_T <= ((ram/Once AND nAS_FSB AND NOT fsb/ASrf)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
 	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
 	NOT ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
 	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/Once AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
+	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND 
+	NOT cs/nOverlay1 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
+	NOT ram/RS_FSM_FFd3)
+	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND 
+	NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
 	NOT ram/RS_FSM_FFd3 AND fsb/ASrf));
 
 FDCPE_ram/RAMDIS1: FDCPE port map (ram/RAMDIS1,ram/RAMDIS1_D,CLK_FSB,'0','0');
-ram/RAMDIS1_D <= ((ram/RAMDIS2.EXP)
+ram/RAMDIS1_D <= ((nOE_OBUF.EXP)
 	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND NOT nAS_FSB AND 
 	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
 	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND 
 	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
+	OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND 
 	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
+	OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND 
 	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
+	OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
 	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
 	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND 
 	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
-	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
+	OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
 	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
 	OR (ram/Once AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND 
 	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
@@ -1491,29 +1539,29 @@ ram/RAMDIS1_D <= ((ram/RAMDIS2.EXP)
 	NOT ram/BACTr AND fsb/ASrf));
 
 FTCPE_ram/RAMDIS2: FTCPE port map (ram/RAMDIS2,ram/RAMDIS2_T,CLK_FSB,'0','0');
-ram/RAMDIS2_T <= ((ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND 
-	ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND fsb/ASrf)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND ram/Once AND 
-	NOT cnt/RefDone AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND 
-	cnt/RefCnt(7))
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND ram/Once AND 
-	NOT cnt/RefDone AND NOT ram/RAMDIS2 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
-	fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND 
+ram/RAMDIS2_T <= ((NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND ram/Once AND 
+	NOT cnt/RefDone AND NOT cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND 
 	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
 	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND 
-	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND fsb/ASrf)
+	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND ram/Once AND 
+	NOT cnt/RefDone AND NOT cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT ram/RS_FSM_FFd2 AND 
+	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND 
+	cnt/RefCnt(7) AND fsb/ASrf)
 	OR (ram/RAMDIS2 AND nAS_FSB AND NOT fsb/ASrf)
 	OR (ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND 
 	ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND 
-	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7)));
+	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
+	OR (ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND 
+	ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND 
+	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND fsb/ASrf)
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND ram/Once AND NOT cnt/RefDone AND 
+	cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
+	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND 
+	cnt/RefCnt(7))
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND ram/Once AND NOT cnt/RefDone AND 
+	cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
+	NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
+	fsb/ASrf));
 
 FDCPE_ram/RAMReady: FDCPE port map (ram/RAMReady,ram/RAMReady_D,CLK_FSB,'0','0');
 ram/RAMReady_D <= ((ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3)
@@ -1524,33 +1572,33 @@ ram/RAMReady_D <= ((ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3)
 	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND 
 	NOT ram/BACTr AND fsb/ASrf)
 	OR (ram/RS_FSM_FFd2.EXP)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
 	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
 	NOT ram/RS_FSM_FFd1 AND fsb/ASrf)
-	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
+	OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND 
 	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
+	OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
 	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/Once AND NOT ram/RS_FSM_FFd1 AND fsb/ASrf)
-	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
+	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND 
+	NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd1 AND fsb/ASrf)
+	OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND 
 	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
+	OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
 	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (NOT A_FSB(21) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
+	OR (NOT A_FSB(21) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
 	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (NOT A_FSB(21) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
+	OR (NOT A_FSB(21) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
 	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/Once AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd1));
+	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND 
+	NOT cs/nOverlay1 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd1));
 
 FDCPE_ram/RASEL: FDCPE port map (ram/RASEL,ram/RASEL_D,CLK_FSB,'0','0');
-ram/RASEL_D <= ((A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
+ram/RASEL_D <= ((A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND 
 	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
+	OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
 	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
+	OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
 	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
 	OR (NOT cnt/RefDone AND nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
 	NOT ram/RS_FSM_FFd1 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
@@ -1558,16 +1606,16 @@ ram/RASEL_D <= ((A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND
 	OR (NOT cnt/RefDone AND nAS_FSB AND ram/RS_FSM_FFd1 AND 
 	ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
 	NOT fsb/ASrf)
-	OR (EXP38_.EXP)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
+	OR (EXP26_.EXP)
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
 	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
 	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND fsb/ASrf)
 	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND NOT nAS_FSB AND 
 	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
 	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND 
 	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
+	OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND 
 	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
 	OR (NOT ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3)
 	OR (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
@@ -1581,20 +1629,20 @@ ram/RASEL_D <= ((A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND
 
 FTCPE_ram/RS_FSM_FFd1: FTCPE port map (ram/RS_FSM_FFd1,ram/RS_FSM_FFd1_T,CLK_FSB,'0','0');
 ram/RS_FSM_FFd1_T <= ((ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
 	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
 	NOT ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
+	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
 	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND fsb/ASrf)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/Once AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
-	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-	NOT cs/nOverlay1 AND NOT ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
+	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND 
+	NOT cs/nOverlay1 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
+	NOT ram/RS_FSM_FFd3)
+	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND 
+	NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
 	NOT ram/RS_FSM_FFd3 AND fsb/ASrf));
 
 FTCPE_ram/RS_FSM_FFd2: FTCPE port map (ram/RS_FSM_FFd2,ram/RS_FSM_FFd2_T,CLK_FSB,'0','0');
-ram/RS_FSM_FFd2_T <= ((ram/RS_FSM_FFd3.EXP)
+ram/RS_FSM_FFd2_T <= ((EXP28_.EXP)
 	OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
 	NOT cnt/RefCnt(5) AND ram/BACTr)
 	OR (nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
@@ -1613,7 +1661,22 @@ ram/RS_FSM_FFd2_T <= ((ram/RS_FSM_FFd3.EXP)
 	NOT cnt/RefCnt(7)));
 
 FTCPE_ram/RS_FSM_FFd3: FTCPE port map (ram/RS_FSM_FFd3,ram/RS_FSM_FFd3_T,CLK_FSB,'0','0');
-ram/RS_FSM_FFd3_T <= ((TimeoutA.EXP)
+ram/RS_FSM_FFd3_T <= ((A_FSB(22) AND NOT A_FSB(21) AND NOT ram/RS_FSM_FFd2 AND 
+	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
+	OR (A_FSB(22) AND cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND 
+	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
+	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND 
+	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
+	OR (nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
+	NOT ram/RS_FSM_FFd3 AND NOT fsb/ASrf)
+	OR (NOT cnt/RefDone AND NOT nAS_FSB AND ram/RS_FSM_FFd2 AND 
+	ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND 
+	cnt/RefCnt(7))
+	OR (NOT cnt/RefDone AND ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND 
+	ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
+	fsb/ASrf)
+	OR (A_FSB(23) AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
+	NOT ram/RS_FSM_FFd3)
 	OR (ram/Once AND cnt/RefDone AND NOT ram/RS_FSM_FFd2 AND 
 	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
 	OR (ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
@@ -1621,11 +1684,7 @@ ram/RS_FSM_FFd3_T <= ((TimeoutA.EXP)
 	OR (ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
 	NOT ram/RS_FSM_FFd3 AND NOT cnt/RefCnt(6))
 	OR (ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3 AND NOT cnt/RefCnt(7))
-	OR (nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3 AND NOT fsb/ASrf)
-	OR (A_FSB(23) AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-	NOT ram/RS_FSM_FFd3));
+	NOT ram/RS_FSM_FFd3 AND NOT cnt/RefCnt(7)));
 
 Register Legend:
  FDCPE (Q,D,C,CLR,PRE,CE); 
@@ -1679,10 +1738,10 @@ No. Name                           No. Name
   5 VCC                              55 RA<10>                        
   6 A_FSB<8>                         56 RA<9>                         
   7 A_FSB<9>                         57 VCC                           
-  8 A_FSB<10>                        58 KPR                           
-  9 A_FSB<11>                        59 KPR                           
- 10 A_FSB<12>                        60 KPR                           
- 11 A_FSB<13>                        61 KPR                           
+  8 A_FSB<10>                        58 CLK25EN                       
+  9 A_FSB<11>                        59 CLK20EN                       
+ 10 A_FSB<12>                        60 SW<1>                         
+ 11 A_FSB<13>                        61 SW<0>                         
  12 A_FSB<14>                        62 GND                           
  13 A_FSB<15>                        63 RA<11>                        
  14 A_FSB<16>                        64 nRAS                          
@@ -1693,8 +1752,8 @@ No. Name                           No. Name
  19 A_FSB<21>                        69 GND                           
  20 A_FSB<22>                        70 nBERR_FSB                     
  21 GND                              71 KPR                           
- 22 CLK2X_IOB                        72 KPR                           
- 23 CLK_IOB                          73 KPR                           
+ 22 CLK2X_IOB                        72 nBR_IOB                       
+ 23 CLK_IOB                          73 nBG_IOB                       
  24 A_FSB<23>                        74 nVMA_IOB                      
  25 E_IOB                            75 GND                           
  26 VCC                              76 nBERR_IOB                     
@@ -1713,7 +1772,7 @@ No. Name                           No. Name
  39 KPR                              89 nDoutOE                       
  40 RA<4>                            90 nDinOE                        
  41 RA<3>                            91 nRES                          
- 42 RA<5>                            92 KPR                           
+ 42 RA<5>                            92 nIPL2                         
  43 RA<2>                            93 nVPA_FSB                      
  44 GND                              94 A_FSB<1>                      
  45 TDI                              95 A_FSB<2>                      
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deleted file mode 100644
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--- a/cpld/XC95144XL/MXSE_html/fit/blank.htm
+++ /dev/null
@@ -1 +0,0 @@
-<html></html>
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deleted file mode 100644
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diff --git a/cpld/XC95144XL/MXSE_html/fit/coolrunnerII_logo.jpg b/cpld/XC95144XL/MXSE_html/fit/coolrunnerII_logo.jpg
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diff --git a/cpld/XC95144XL/MXSE_html/fit/defeqns 2.htm b/cpld/XC95144XL/MXSE_html/fit/defeqns 2.htm
deleted file mode 100644
index 6cc386b..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/defeqns 2.htm	
+++ /dev/null
@@ -1,1007 +0,0 @@
-<html><head><link type='text/css' href='style.css' rel='stylesheet'></head><body class='pgBgnd'>
-<h3 align='center'>Equations</h3>
-<table width='90%' align='center' border='1' cellpadding='0' cellspacing='0'>
-<tr><td>
-</td></tr><tr><td>
-********** Mapped Logic **********
-</td></tr><tr><td>
-</td></tr><tr><td>
-$OpTx$FX_DC$602 <= ((NOT TimeoutB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20)));
-</td></tr><tr><td>
-</td></tr><tr><td>
-$OpTx$FX_DC$606 <= ((A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 AND NOT nWE_FSB AND NOT nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(13) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 AND NOT nWE_FSB AND NOT nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB));
-</td></tr><tr><td>
-FDCPE_ALE0M: FDCPE port map (ALE0M,ALE0M_D,CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ALE0M_D <= ((NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND NOT iobm/IOS_FSM_FFd7 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOREQr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND NOT iobm/IOS_FSM_FFd7 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd8));
-</td></tr><tr><td>
-FDCPE_ALE0S: FDCPE port map (ALE0S,ALE0S_D,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ALE0S_D <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1);
-</td></tr><tr><td>
-FTCPE_BERR_IOBS: FTCPE port map (BERR_IOBS,BERR_IOBS_T,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;BERR_IOBS_T <= ((BERR_IOBS AND nAS_FSB AND NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobs/Once AND BERR_IOBS AND NOT IOBERR AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobs/Once AND NOT BERR_IOBS AND IOBERR AND NOT nAS_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobs/Once AND NOT BERR_IOBS AND IOBERR AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND fsb/ASrf AND nADoutLE1));
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
-FDCPE_IOACT: FDCPE port map (IOACT,IOACT_D,CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IOACT_D <= ((NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd6 AND CLK_IOB AND NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOS_FSM_FFd8 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/BERRrf AND iobm/BERRrr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd6 AND CLK_IOB AND NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOS_FSM_FFd8 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/DTACKrf AND iobm/DTACKrr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd6 AND CLK_IOB AND NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOS_FSM_FFd8 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/RESrf AND iobm/RESrr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd6 AND CLK_IOB AND NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOREQr AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/DTACKrf AND iobm/DTACKrr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd6 AND CLK_IOB AND NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOREQr AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/RESrf AND iobm/RESrr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND NOT iobm/IOS_FSM_FFd7 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOREQr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND NOT iobm/IOS_FSM_FFd7 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd8)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd6 AND CLK_IOB AND NOT iobm/IOS_FSM_FFd7 AND iobm/ETACK AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOREQr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd6 AND CLK_IOB AND NOT iobm/IOS_FSM_FFd7 AND iobm/ETACK AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd8)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd5 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd6 AND CLK_IOB AND NOT iobm/IOS_FSM_FFd7 AND NOT iobm/IOREQr AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/BERRrf AND iobm/BERRrr));
-</td></tr><tr><td>
-FTCPE_IOBERR: FTCPE port map (IOBERR,IOBERR_T,CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IOBERR_T <= ((nBERR_IOB AND IOBERR AND iobm/IOS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	CLK_IOB AND iobm/DTACKrf AND iobm/DTACKrr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nBERR_IOB AND IOBERR AND iobm/IOS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	CLK_IOB AND iobm/RESrf AND iobm/RESrr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT nBERR_IOB AND NOT IOBERR AND iobm/IOS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	CLK_IOB AND iobm/BERRrf AND iobm/BERRrr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT nBERR_IOB AND NOT IOBERR AND iobm/IOS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	CLK_IOB AND iobm/DTACKrf AND iobm/DTACKrr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT nBERR_IOB AND NOT IOBERR AND iobm/IOS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	CLK_IOB AND iobm/RESrf AND iobm/RESrr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nBERR_IOB AND IOBERR AND iobm/IOS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	CLK_IOB AND iobm/ETACK)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT nBERR_IOB AND NOT IOBERR AND iobm/IOS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	CLK_IOB AND iobm/ETACK)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nBERR_IOB AND IOBERR AND iobm/IOS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	CLK_IOB AND iobm/BERRrf AND iobm/BERRrr));
-</td></tr><tr><td>
-FDCPE_IOL0: FDCPE port map (IOL0,IOL0_D,CLK_FSB,'0','0',IOL0_CE);
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IOL0_D <= ((NOT nLDS_FSB AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobs/IOL1 AND NOT nADoutLE1));
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IOL0_CE <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1);
-</td></tr><tr><td>
-FDCPE_IOREQ: FDCPE port map (IOREQ,IOREQ_D,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IOREQ_D <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 AND NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobs/PS_FSM_FFd2 AND iobs/PS_FSM_FFd1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobs/PS_FSM_FFd1 AND iobs/IOACTr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobs/Once AND NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND NOT iobs/PS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT fsb/ASrf AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	nADoutLE1));
-</td></tr><tr><td>
-FTCPE_IORW0: FTCPE port map (IORW0,IORW0_T,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IORW0_T <= ((EXP22_.EXP)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT iobs/Once AND NOT IORW0 AND nWE_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT iobs/Once AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	IORW0 AND NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT iobs/Once AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	IORW0 AND NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	fsb/ASrf AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT iobs/Once AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT IORW0 AND nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT iobs/Once AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT IORW0 AND nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	fsb/ASrf AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (IORW0 AND NOT iobs/IORW1 AND NOT iobs/PS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd1 AND NOT nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT IORW0 AND iobs/IORW1 AND NOT iobs/PS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd1 AND NOT nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT iobs/Once AND NOT IORW0 AND nWE_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1));
-</td></tr><tr><td>
-FDCPE_IOU0: FDCPE port map (IOU0,IOU0_D,CLK_FSB,'0','0',IOU0_CE);
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IOU0_D <= ((NOT nUDS_FSB AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobs/IOU1 AND NOT nADoutLE1));
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IOU0_CE <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1);
-</td></tr><tr><td>
-</td></tr><tr><td>
-RA(0) <= ((A_FSB(10) AND NOT ram/RASEL)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/RASEL AND A_FSB(1)));
-</td></tr><tr><td>
-</td></tr><tr><td>
-RA(1) <= ((A_FSB(11) AND NOT ram/RASEL)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/RASEL AND A_FSB(2)));
-</td></tr><tr><td>
-</td></tr><tr><td>
-RA(2) <= ((A_FSB(12) AND NOT ram/RASEL)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/RASEL AND A_FSB(3)));
-</td></tr><tr><td>
-</td></tr><tr><td>
-RA(3) <= ((A_FSB(13) AND NOT ram/RASEL)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/RASEL AND A_FSB(4)));
-</td></tr><tr><td>
-</td></tr><tr><td>
-RA(4) <= ((A_FSB(14) AND NOT ram/RASEL)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/RASEL AND A_FSB(5)));
-</td></tr><tr><td>
-</td></tr><tr><td>
-RA(5) <= ((A_FSB(15) AND NOT ram/RASEL)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/RASEL AND A_FSB(6)));
-</td></tr><tr><td>
-</td></tr><tr><td>
-RA(6) <= ((A_FSB(16) AND NOT ram/RASEL)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/RASEL AND A_FSB(7)));
-</td></tr><tr><td>
-</td></tr><tr><td>
-RA(7) <= ((A_FSB(8) AND ram/RASEL)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(17) AND NOT ram/RASEL));
-</td></tr><tr><td>
-</td></tr><tr><td>
-RA(8) <= ((A_FSB(9) AND ram/RASEL)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(18) AND NOT ram/RASEL));
-</td></tr><tr><td>
-</td></tr><tr><td>
-RA(9) <= ((A_FSB(20) AND ram/RASEL)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(19) AND NOT ram/RASEL));
-</td></tr><tr><td>
-</td></tr><tr><td>
-RA(10) <= A_FSB(21);
-</td></tr><tr><td>
-</td></tr><tr><td>
-RA(11) <= A_FSB(19);
-</td></tr><tr><td>
-FDCPE_RefAck: FDCPE port map (RefAck,RefAck_D,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;RefAck_D <= (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1);
-</td></tr><tr><td>
-FTCPE_TimeoutA: FTCPE port map (TimeoutA,TimeoutA_T,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;TimeoutA_T <= ((TimeoutA AND nAS_FSB AND NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT TimeoutA AND NOT nAS_FSB AND NOT cnt/RefCnt(0) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT TimeoutA AND NOT cnt/RefCnt(0) AND NOT cnt/RefCnt(5) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND NOT cnt/RefCnt(3) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefCnt(4) AND fsb/ASrf));
-</td></tr><tr><td>
-FTCPE_TimeoutB: FTCPE port map (TimeoutB,TimeoutB_T,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;TimeoutB_T <= ((TimeoutB AND nAS_FSB AND NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT TimeoutB AND cnt/TimeoutBPre AND NOT nAS_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefCnt(0) AND NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefCnt(2) AND NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4) AND NOT cnt/RefCnt(7))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT TimeoutB AND cnt/TimeoutBPre AND NOT cnt/RefCnt(0) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4) AND NOT cnt/RefCnt(7) AND fsb/ASrf));
-</td></tr><tr><td>
-FTCPE_cnt/RefCnt0: FTCPE port map (cnt/RefCnt(0),'1',CLK_FSB,'0','0');
-</td></tr><tr><td>
-FTCPE_cnt/RefCnt1: FTCPE port map (cnt/RefCnt(1),cnt/RefCnt(0),CLK_FSB,'0','0');
-</td></tr><tr><td>
-FTCPE_cnt/RefCnt2: FTCPE port map (cnt/RefCnt(2),cnt/RefCnt_T(2),CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;cnt/RefCnt_T(2) <= (cnt/RefCnt(0) AND cnt/RefCnt(1));
-</td></tr><tr><td>
-FTCPE_cnt/RefCnt3: FTCPE port map (cnt/RefCnt(3),cnt/RefCnt_T(3),CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;cnt/RefCnt_T(3) <= (cnt/RefCnt(0) AND cnt/RefCnt(1) AND cnt/RefCnt(2));
-</td></tr><tr><td>
-FTCPE_cnt/RefCnt4: FTCPE port map (cnt/RefCnt(4),cnt/RefCnt_T(4),CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;cnt/RefCnt_T(4) <= (cnt/RefCnt(0) AND cnt/RefCnt(1) AND cnt/RefCnt(2) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cnt/RefCnt(3));
-</td></tr><tr><td>
-FTCPE_cnt/RefCnt5: FTCPE port map (cnt/RefCnt(5),cnt/RefCnt_T(5),CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;cnt/RefCnt_T(5) <= (cnt/RefCnt(0) AND cnt/RefCnt(1) AND cnt/RefCnt(2) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cnt/RefCnt(3) AND cnt/RefCnt(4));
-</td></tr><tr><td>
-FTCPE_cnt/RefCnt6: FTCPE port map (cnt/RefCnt(6),cnt/RefCnt_T(6),CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;cnt/RefCnt_T(6) <= (cnt/RefCnt(0) AND cnt/RefCnt(5) AND cnt/RefCnt(1) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cnt/RefCnt(2) AND cnt/RefCnt(3) AND cnt/RefCnt(4));
-</td></tr><tr><td>
-FTCPE_cnt/RefCnt7: FTCPE port map (cnt/RefCnt(7),cnt/RefCnt_T(7),CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;cnt/RefCnt_T(7) <= (cnt/RefCnt(0) AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cnt/RefCnt(1) AND cnt/RefCnt(2) AND cnt/RefCnt(3) AND cnt/RefCnt(4));
-</td></tr><tr><td>
-FDCPE_cnt/RefDone: FDCPE port map (cnt/RefDone,cnt/RefDone_D,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;cnt/RefDone_D <= ((NOT cnt/RefDone AND NOT RefAck)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT cnt/RefCnt(0) AND NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefCnt(7)));
-</td></tr><tr><td>
-FTCPE_cnt/TimeoutBPre: FTCPE port map (cnt/TimeoutBPre,cnt/TimeoutBPre_T,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;cnt/TimeoutBPre_T <= ((cnt/TimeoutBPre AND nAS_FSB AND NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT cnt/TimeoutBPre AND NOT nAS_FSB AND NOT cnt/RefCnt(0) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefCnt(5) AND NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefCnt(3) AND NOT cnt/RefCnt(4) AND NOT cnt/RefCnt(7))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT cnt/TimeoutBPre AND NOT cnt/RefCnt(0) AND NOT cnt/RefCnt(5) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefCnt(6) AND NOT cnt/RefCnt(1) AND NOT cnt/RefCnt(2) AND NOT cnt/RefCnt(3) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefCnt(4) AND NOT cnt/RefCnt(7) AND fsb/ASrf));
-</td></tr><tr><td>
-FTCPE_cs/nOverlay0: FTCPE port map (cs/nOverlay0,cs/nOverlay0_T,CLK_FSB,NOT nRES,'0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;cs/nOverlay0_T <= ((NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay0 AND NOT nAS_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay0 AND fsb/ASrf));
-</td></tr><tr><td>
-FDCPE_cs/nOverlay1: FDCPE port map (cs/nOverlay1,cs/nOverlay0,CLK_FSB,'0','0',cs/nOverlay1_CE);
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;cs/nOverlay1_CE <= (nAS_FSB AND NOT fsb/ASrf);
-</td></tr><tr><td>
-FDCPE_fsb/ASrf: FDCPE port map (fsb/ASrf,NOT nAS_FSB,NOT CLK_FSB,'0','0');
-</td></tr><tr><td>
-FDCPE_fsb/BERR0r: FDCPE port map (fsb/BERR0r,fsb/BERR0r_D,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;fsb/BERR0r_D <= ((NOT TimeoutB AND NOT fsb/BERR0r)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nAS_FSB AND NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/BERR0r));
-</td></tr><tr><td>
-FDCPE_fsb/BERR1r: FDCPE port map (fsb/BERR1r,fsb/BERR1r_D,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;fsb/BERR1r_D <= ((NOT BERR_IOBS AND NOT fsb/BERR1r)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nAS_FSB AND NOT fsb/ASrf));
-</td></tr><tr><td>
-FDCPE_fsb/Ready0r: FDCPE port map (fsb/Ready0r,fsb/Ready0r_D,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;fsb/Ready0r_D <= ((nAS_FSB AND NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/Ready0r AND NOT ram/RAMReady)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT fsb/Ready0r AND NOT ram/RAMReady));
-</td></tr><tr><td>
-FDCPE_fsb/Ready1r: FDCPE port map (fsb/Ready1r,fsb/Ready1r_D,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;fsb/Ready1r_D <= ((A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND NOT iobs/IOReady AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(13) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND NOT iobs/IOReady AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nAS_FSB AND NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT fsb/Ready1r AND NOT iobs/IOReady)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT fsb/Ready1r AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/IOReady)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/Ready1r AND NOT iobs/IOReady)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/Ready1r AND NOT iobs/IOReady));
-</td></tr><tr><td>
-FDCPE_fsb/Ready2r: FDCPE port map (fsb/Ready2r,fsb/Ready2r_D,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;fsb/Ready2r_D <= ((nAS_FSB AND NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(8) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(9) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(9) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(8) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r));
-</td></tr><tr><td>
-FDCPE_fsb/VPA: FDCPE port map (fsb/VPA,fsb/VPA_D,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;fsb/VPA_D <= ((EXP18_.EXP)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (BERR_IOBS AND fsb/VPA AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (fsb/BERR0r AND fsb/VPA AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (fsb/BERR1r AND fsb/VPA AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (fsb/VPA AND fsb/ASrf AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	fsb/VPA__or00001/fsb/VPA__or00001_D2)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (fsb/VPA AND fsb/ASrf AND NOT $OpTx$FX_DC$602)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR ($OpTx$FX_DC$602.EXP)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND NOT nAS_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$606)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND fsb/ASrf AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$606)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/Ready0r AND fsb/VPA AND NOT nAS_FSB AND NOT ram/RAMReady)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/Ready0r AND fsb/VPA AND fsb/ASrf AND NOT ram/RAMReady)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT fsb/Ready0r AND fsb/VPA AND NOT nAS_FSB AND NOT ram/RAMReady)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (BERR_IOBS AND fsb/VPA AND NOT nAS_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (fsb/BERR0r AND fsb/VPA AND NOT nAS_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (fsb/BERR1r AND fsb/VPA AND NOT nAS_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (fsb/VPA AND NOT nAS_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	fsb/VPA__or00001/fsb/VPA__or00001_D2)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (fsb/VPA AND NOT nAS_FSB AND NOT $OpTx$FX_DC$602));
-</td></tr><tr><td>
-</td></tr><tr><td>
-fsb/VPA__or00001/fsb/VPA__or00001_D2 <= ((A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(9) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(8) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(9) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND A_FSB(22) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(8) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r));
-</td></tr><tr><td>
-FDCPE_iobm/BERRrf: FDCPE port map (iobm/BERRrf,NOT nBERR_IOB,NOT CLK2X_IOB,'0','0');
-</td></tr><tr><td>
-FDCPE_iobm/BERRrr: FDCPE port map (iobm/BERRrr,NOT nBERR_IOB,CLK2X_IOB,'0','0');
-</td></tr><tr><td>
-FDCPE_iobm/DTACKrf: FDCPE port map (iobm/DTACKrf,NOT nDTACK_IOB,NOT CLK2X_IOB,'0','0');
-</td></tr><tr><td>
-FDCPE_iobm/DTACKrr: FDCPE port map (iobm/DTACKrr,NOT nDTACK_IOB,CLK2X_IOB,'0','0');
-</td></tr><tr><td>
-FTCPE_iobm/ES0: FTCPE port map (iobm/ES(0),iobm/ES_T(0),CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobm/ES_T(0) <= ((iobm/ES(0) AND NOT iobm/Er AND iobm/Er2)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/ES(3) AND NOT iobm/ES(4) AND iobm/Er)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/ES(3) AND NOT iobm/ES(4) AND NOT iobm/Er2));
-</td></tr><tr><td>
-FDCPE_iobm/ES1: FDCPE port map (iobm/ES(1),iobm/ES_D(1),CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobm/ES_D(1) <= ((iobm/ES(0) AND iobm/ES(1))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/ES(0) AND NOT iobm/ES(1))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/Er AND iobm/Er2));
-</td></tr><tr><td>
-FDCPE_iobm/ES2: FDCPE port map (iobm/ES(2),iobm/ES_D(2),CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobm/ES_D(2) <= ((NOT iobm/ES(0) AND NOT iobm/ES(2))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/ES(1) AND NOT iobm/ES(2))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/Er AND iobm/Er2)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/ES(2) AND NOT iobm/ES(3) AND iobm/ES(4)));
-</td></tr><tr><td>
-FTCPE_iobm/ES3: FTCPE port map (iobm/ES(3),iobm/ES_T(3),CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobm/ES_T(3) <= ((iobm/ES(3) AND NOT iobm/Er AND iobm/Er2)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND iobm/Er)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND NOT iobm/Er2));
-</td></tr><tr><td>
-FTCPE_iobm/ES4: FTCPE port map (iobm/ES(4),iobm/ES_T(4),CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobm/ES_T(4) <= ((iobm/ES(4) AND NOT iobm/Er AND iobm/Er2)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/ES(3) AND iobm/Er)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/ES(3) AND NOT iobm/Er2)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobm/ES(0) AND iobm/ES(1) AND NOT iobm/ES(2) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/ES(3) AND iobm/ES(4)));
-</td></tr><tr><td>
-FDCPE_iobm/ETACK: FDCPE port map (iobm/ETACK,iobm/ETACK_D,CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobm/ETACK_D <= (NOT nVMA_IOB AND NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/ES(3) AND iobm/ES(4));
-</td></tr><tr><td>
-FDCPE_iobm/Er: FDCPE port map (iobm/Er,E_IOB,NOT CLK_IOB,'0','0');
-</td></tr><tr><td>
-FDCPE_iobm/Er2: FDCPE port map (iobm/Er2,iobm/Er,CLK2X_IOB,'0','0');
-</td></tr><tr><td>
-FDCPE_iobm/IOREQr: FDCPE port map (iobm/IOREQr,IOREQ,NOT CLK2X_IOB,'0','0');
-</td></tr><tr><td>
-FDCPE_iobm/IOS_FSM_FFd1: FDCPE port map (iobm/IOS_FSM_FFd1,iobm/IOS_FSM_FFd2,CLK2X_IOB,'0','0');
-</td></tr><tr><td>
-FDCPE_iobm/IOS_FSM_FFd2: FDCPE port map (iobm/IOS_FSM_FFd2,iobm/IOS_FSM_FFd2_D,CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobm/IOS_FSM_FFd2_D <= ((iobm/IOS_FSM_FFd3 AND CLK_IOB AND iobm/ETACK)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobm/IOS_FSM_FFd3 AND CLK_IOB AND iobm/BERRrf AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/BERRrr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobm/IOS_FSM_FFd3 AND CLK_IOB AND iobm/DTACKrf AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/DTACKrr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobm/IOS_FSM_FFd3 AND CLK_IOB AND iobm/RESrf AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/RESrr));
-</td></tr><tr><td>
-FDCPE_iobm/IOS_FSM_FFd3: FDCPE port map (iobm/IOS_FSM_FFd3,iobm/IOS_FSM_FFd3_D,CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobm/IOS_FSM_FFd3_D <= ((NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND CLK_IOB AND iobm/ETACK)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND CLK_IOB AND iobm/BERRrf AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/BERRrr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND CLK_IOB AND iobm/DTACKrf AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/DTACKrr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND CLK_IOB AND iobm/RESrf AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/RESrr));
-</td></tr><tr><td>
-FDCPE_iobm/IOS_FSM_FFd4: FDCPE port map (iobm/IOS_FSM_FFd4,iobm/IOS_FSM_FFd5,CLK2X_IOB,'0','0');
-</td></tr><tr><td>
-FDCPE_iobm/IOS_FSM_FFd5: FDCPE port map (iobm/IOS_FSM_FFd5,iobm/IOS_FSM_FFd6,CLK2X_IOB,'0','0');
-</td></tr><tr><td>
-FDCPE_iobm/IOS_FSM_FFd6: FDCPE port map (iobm/IOS_FSM_FFd6,iobm/IOS_FSM_FFd7,CLK2X_IOB,'0','0');
-</td></tr><tr><td>
-FDCPE_iobm/IOS_FSM_FFd7: FDCPE port map (iobm/IOS_FSM_FFd7,iobm/IOS_FSM_FFd7_D,CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobm/IOS_FSM_FFd7_D <= (NOT CLK_IOB AND iobm/IOREQr AND iobm/IOS_FSM_FFd8);
-</td></tr><tr><td>
-FDCPE_iobm/IOS_FSM_FFd8: FDCPE port map (iobm/IOS_FSM_FFd8,iobm/IOS_FSM_FFd8_D,CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobm/IOS_FSM_FFd8_D <= ((NOT iobm/IOS_FSM_FFd8 AND NOT iobm/IOS_FSM_FFd1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT CLK_IOB AND iobm/IOREQr AND NOT iobm/IOS_FSM_FFd1));
-</td></tr><tr><td>
-FDCPE_iobm/RESrf: FDCPE port map (iobm/RESrf,NOT nRES,NOT CLK2X_IOB,'0','0');
-</td></tr><tr><td>
-FDCPE_iobm/RESrr: FDCPE port map (iobm/RESrr,NOT nRES,CLK2X_IOB,'0','0');
-</td></tr><tr><td>
-FDCPE_iobm/VPArf: FDCPE port map (iobm/VPArf,NOT nVPA_IOB,NOT CLK2X_IOB,'0','0');
-</td></tr><tr><td>
-FDCPE_iobm/VPArr: FDCPE port map (iobm/VPArr,NOT nVPA_IOB,CLK2X_IOB,'0','0');
-</td></tr><tr><td>
-FDCPE_iobs/Clear1: FDCPE port map (iobs/Clear1,iobs/Clear1_D,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobs/Clear1_D <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND NOT nADoutLE1);
-</td></tr><tr><td>
-FDCPE_iobs/IOACTr: FDCPE port map (iobs/IOACTr,IOACT,CLK_FSB,'0','0');
-</td></tr><tr><td>
-FDCPE_iobs/IOL1: FDCPE port map (iobs/IOL1,NOT nLDS_FSB,CLK_FSB,'0','0',iobs/Load1);
-</td></tr><tr><td>
-FTCPE_iobs/IORW1: FTCPE port map (iobs/IORW1,iobs/IORW1_T,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobs/IORW1_T <= ((iobs/Once)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nVMA_IOB_OBUF.EXP)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT nWE_FSB AND NOT iobs/IORW1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nAS_FSB AND NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(20))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nWE_FSB AND iobs/IORW1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT iobs/IORW1));
-</td></tr><tr><td>
-FTCPE_iobs/IOReady: FTCPE port map (iobs/IOReady,iobs/IOReady_T,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobs/IOReady_T <= ((iobs/IOReady AND nAS_FSB AND NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobs/Once AND IOBERR AND iobs/IOReady AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobs/Once AND NOT IOBERR AND NOT iobs/IOReady AND NOT nAS_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobs/Once AND NOT IOBERR AND NOT iobs/IOReady AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND fsb/ASrf AND nADoutLE1));
-</td></tr><tr><td>
-FDCPE_iobs/IOU1: FDCPE port map (iobs/IOU1,NOT nUDS_FSB,CLK_FSB,'0','0',iobs/Load1);
-</td></tr><tr><td>
-FDCPE_iobs/Load1: FDCPE port map (iobs/Load1,iobs/Load1_D,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobs/Load1_D <= ((iobs/Once)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(20))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nAS_FSB AND NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1));
-</td></tr><tr><td>
-FDCPE_iobs/Once: FDCPE port map (iobs/Once,iobs/Once_D,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobs/Once_D <= ((RA_2_OBUF.EXP)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT iobs/Once AND iobs/PS_FSM_FFd1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobs/Once AND iobs/PS_FSM_FFd2 AND NOT nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobs/Once AND iobs/PS_FSM_FFd1 AND NOT nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND NOT iobs/Once)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/Once)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND NOT iobs/Once)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND NOT iobs/Once)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND NOT iobs/Once)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND NOT iobs/Once)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT iobs/Once AND nWE_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nAS_FSB AND NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT iobs/Once AND iobs/PS_FSM_FFd2)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND NOT iobs/Once)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT iobs/Once AND iobs/PS_FSM_FFd2)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT iobs/Once AND iobs/PS_FSM_FFd1));
-</td></tr><tr><td>
-FDCPE_iobs/PS_FSM_FFd1: FDCPE port map (iobs/PS_FSM_FFd1,iobs/PS_FSM_FFd1_D,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobs/PS_FSM_FFd1_D <= ((iobs/PS_FSM_FFd2)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobs/PS_FSM_FFd1 AND iobs/IOACTr));
-</td></tr><tr><td>
-FDCPE_iobs/PS_FSM_FFd2: FDCPE port map (iobs/PS_FSM_FFd2,iobs/PS_FSM_FFd2_D,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobs/PS_FSM_FFd2_D <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobs/PS_FSM_FFd2 AND iobs/PS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobs/IOACTr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobs/PS_FSM_FFd2 AND iobs/PS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/IOACTr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobs/Once AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND NOT iobs/PS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/ASrf AND nADoutLE1));
-</td></tr><tr><td>
-</td></tr><tr><td>
-nADoutLE0 <= (NOT ALE0M AND NOT ALE0S);
-</td></tr><tr><td>
-FDCPE_nADoutLE1: FDCPE port map (nADoutLE1,nADoutLE1_D,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nADoutLE1_D <= ((iobs/Load1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobs/Clear1 AND NOT nADoutLE1));
-</td></tr><tr><td>
-FDCPE_nAS_IOB: FDCPE port map (nAS_IOB,nAS_IOB_D,NOT CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nAS_IOB_D <= (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND NOT iobm/IOS_FSM_FFd7);
-</td></tr><tr><td>
-</td></tr><tr><td>
-nAoutOE <= '0';
-</td></tr><tr><td>
-</td></tr><tr><td>
-nBERR_FSB <= ((nAS_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT BERR_IOBS AND NOT TimeoutB AND NOT fsb/BERR0r AND NOT fsb/BERR1r)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT BERR_IOBS AND NOT fsb/BERR0r AND NOT fsb/BERR1r));
-</td></tr><tr><td>
-FDCPE_nCAS: FDCPE port map (nCAS,NOT ram/RASEL,NOT CLK_FSB,'0','0');
-</td></tr><tr><td>
-FDCPE_nDTACK_FSB: FDCPE port map (nDTACK_FSB,nDTACK_FSB_D,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nDTACK_FSB_D <= ((EXP21_.EXP)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT fsb/Ready1r AND NOT iobs/IOReady AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	nDTACK_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/Ready0r AND nDTACK_FSB AND NOT ram/RAMReady)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT fsb/Ready1r AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/IOReady AND nDTACK_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT fsb/Ready0r AND nDTACK_FSB AND NOT ram/RAMReady)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/Ready1r AND NOT iobs/IOReady AND nDTACK_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR ($OpTx$FX_DC$606.EXP)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/Ready1r AND NOT iobs/IOReady AND nDTACK_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND NOT iobs/IOReady AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	nDTACK_FSB AND NOT nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(13) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND NOT iobs/IOReady AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	nDTACK_FSB AND NOT nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	nDTACK_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	nDTACK_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (BERR_IOBS AND nDTACK_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (fsb/BERR0r AND nDTACK_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (fsb/BERR1r AND nDTACK_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nAS_FSB AND NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nDTACK_FSB AND NOT $OpTx$FX_DC$602));
-</td></tr><tr><td>
-FDCPE_nDinLE: FDCPE port map (nDinLE,nDinLE_D,NOT CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nDinLE_D <= (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4);
-</td></tr><tr><td>
-</td></tr><tr><td>
-nDinOE <= ((A_FSB(23) AND nWE_FSB AND NOT nAS_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND nWE_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB));
-</td></tr><tr><td>
-FDCPE_nDoutOE: FDCPE port map (nDoutOE,nDoutOE_D,CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nDoutOE_D <= ((NOT IORW0)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND NOT iobm/IOS_FSM_FFd7 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd2));
-</td></tr><tr><td>
-FDCPE_nLDS_IOB: FDCPE port map (nLDS_IOB,nLDS_IOB_D,NOT CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nLDS_IOB_D <= ((NOT IOL0)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (IORW0 AND NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd5)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND NOT iobm/IOS_FSM_FFd7));
-</td></tr><tr><td>
-</td></tr><tr><td>
-nOE <= NOT ((nWE_FSB AND NOT nAS_FSB));
-</td></tr><tr><td>
-</td></tr><tr><td>
-nRAMLWE <= NOT ((NOT nWE_FSB AND NOT nLDS_FSB AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RAMDIS1));
-</td></tr><tr><td>
-</td></tr><tr><td>
-nRAMUWE <= NOT ((NOT nWE_FSB AND NOT nUDS_FSB AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RAMDIS1));
-</td></tr><tr><td>
-</td></tr><tr><td>
-nRAS <= NOT (((RefAck)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RAMDIS2 AND NOT nAS_FSB AND NOT ram/RAMDIS1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND NOT ram/RAMDIS1)));
-</td></tr><tr><td>
-</td></tr><tr><td>
-nROMCS <= NOT (((NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(21) AND NOT A_FSB(20) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1)));
-</td></tr><tr><td>
-</td></tr><tr><td>
-nROMWE <= NOT ((NOT nWE_FSB AND NOT nAS_FSB));
-</td></tr><tr><td>
-FDCPE_nUDS_IOB: FDCPE port map (nUDS_IOB,nUDS_IOB_D,NOT CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nUDS_IOB_D <= ((NOT IOU0)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (IORW0 AND NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd5)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd4 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd5 AND NOT iobm/IOS_FSM_FFd6 AND NOT iobm/IOS_FSM_FFd7));
-</td></tr><tr><td>
-FTCPE_nVMA_IOB: FTCPE port map (nVMA_IOB,nVMA_IOB_T,CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nVMA_IOB_T <= ((NOT nVMA_IOB AND NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/ES(3) AND NOT iobm/ES(4))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nVMA_IOB AND iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/ES(3) AND NOT iobm/ES(4) AND IOACT AND iobm/VPArf AND iobm/VPArr));
-</td></tr><tr><td>
-</td></tr><tr><td>
-nVPA_FSB <= NOT ((fsb/VPA AND NOT nAS_FSB));
-</td></tr><tr><td>
-FDCPE_ram/BACTr: FDCPE port map (ram/BACTr,ram/BACTr_D,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ram/BACTr_D <= (nAS_FSB AND NOT fsb/ASrf);
-</td></tr><tr><td>
-FTCPE_ram/Once: FTCPE port map (ram/Once,ram/Once_T,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ram/Once_T <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT ram/Once AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd3 AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/Once AND nAS_FSB AND NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd3));
-</td></tr><tr><td>
-FDCPE_ram/RAMDIS1: FDCPE port map (ram/RAMDIS1,ram/RAMDIS1_D,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ram/RAMDIS1_D <= ((RA_4_OBUF.EXP)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND NOT nAS_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/Once AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT cnt/RefDone AND ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT cnt/RefDone AND nAS_FSB AND NOT ram/RS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd3)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT nAS_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/BACTr AND fsb/ASrf));
-</td></tr><tr><td>
-FTCPE_ram/RAMDIS2: FTCPE port map (ram/RAMDIS2,ram/RAMDIS2_T,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ram/RAMDIS2_T <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND ram/Once AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefDone AND NOT ram/RAMDIS2 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/RAMDIS2 AND nAS_FSB AND NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND ram/Once AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefDone AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cnt/RefCnt(7)));
-</td></tr><tr><td>
-FDCPE_ram/RAMReady: FDCPE port map (ram/RAMReady,ram/RAMReady_D,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ram/RAMReady_D <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT ram/Once AND NOT ram/RS_FSM_FFd1 AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (cnt/RefCnt(5).EXP)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT nAS_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/BACTr AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(21) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(21) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT ram/Once AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd1));
-</td></tr><tr><td>
-FDCPE_ram/RASEL: FDCPE port map (ram/RASEL,ram/RASEL_D,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ram/RASEL_D <= ((A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT cnt/RefDone AND nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT cnt/RefDone AND nAS_FSB AND ram/RS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nDinOE_OBUF.EXP)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND NOT nAS_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd3)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT nAS_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7)));
-</td></tr><tr><td>
-FTCPE_ram/RS_FSM_FFd1: FTCPE port map (ram/RS_FSM_FFd1,ram/RS_FSM_FFd1_T,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ram/RS_FSM_FFd1_T <= ((ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd3)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT ram/Once AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd3 AND fsb/ASrf));
-</td></tr><tr><td>
-FTCPE_ram/RS_FSM_FFd2: FTCPE port map (ram/RS_FSM_FFd2,ram/RS_FSM_FFd2_T,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ram/RS_FSM_FFd2_T <= ((nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefCnt(5) AND NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefCnt(6) AND NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefCnt(7) AND NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT nAS_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT cnt/RefDone AND nAS_FSB AND ram/RS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	ram/RS_FSM_FFd1 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefCnt(5) AND ram/BACTr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefCnt(6) AND ram/BACTr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND ram/BACTr AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefCnt(7)));
-</td></tr><tr><td>
-FTCPE_ram/RS_FSM_FFd3: FTCPE port map (ram/RS_FSM_FFd3,ram/RS_FSM_FFd3_T,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ram/RS_FSM_FFd3_T <= ((A_FSB(22) AND NOT A_FSB(21) AND NOT ram/RS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd3 AND NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT cnt/RefDone AND NOT nAS_FSB AND ram/RS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cnt/RefCnt(7))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT cnt/RefDone AND ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd3)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/Once AND cnt/RefDone AND NOT ram/RS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd3 AND NOT cnt/RefCnt(5))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd3 AND NOT cnt/RefCnt(6))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd3 AND NOT cnt/RefCnt(7)));
-</td></tr><tr><td>
-Register Legend:
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; FDCPE (Q,D,C,CLR,PRE,CE); 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; FTCPE (Q,D,C,CLR,PRE,CE); 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; LDCP  (Q,D,G,CLR,PRE); 
-</td></tr><tr><td>
-</td></tr>
-</table>
-<form><span class="pgRef"><table width="90%" align="center"><tr>
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diff --git a/cpld/XC95144XL/MXSE_html/fit/defeqns.htm b/cpld/XC95144XL/MXSE_html/fit/defeqns.htm
index 6de78a0..0f13545 100644
--- a/cpld/XC95144XL/MXSE_html/fit/defeqns.htm
+++ b/cpld/XC95144XL/MXSE_html/fit/defeqns.htm
@@ -6,17 +6,22 @@
 ********** Mapped Logic **********
 </td></tr><tr><td>
 </td></tr><tr><td>
-$OpTx$FX_DC$609 <= (nAS_FSB AND NOT fsb/ASrf);
+$OpTx$$OpTx$FX_DC$182_INV$783 <= ((NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT fsb/Ready0r AND NOT ram/RAMReady)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND TimeoutB)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(22) AND TimeoutB)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(21) AND TimeoutB)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(20) AND TimeoutB)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/Ready0r AND NOT ram/RAMReady));
 </td></tr><tr><td>
 </td></tr><tr><td>
-$OpTx$FX_DC$610 <= ((NOT TimeoutB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20)));
+$OpTx$FX_DC$708 <= (nAS_FSB AND NOT fsb/ASrf);
 </td></tr><tr><td>
 FDCPE_ALE0M: FDCPE port map (ALE0M,ALE0M_D,CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ALE0M_D <= ((NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd2 AND NOT iobm/IOREQr));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ALE0M_D <= ((iobm/IOS_FSM_FFd2)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd1 AND iobm/IOREQr AND NOT nAoutOE));
 </td></tr><tr><td>
 FDCPE_ALE0S: FDCPE port map (ALE0S,ALE0S_D,CLK_FSB,'0','0');
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ALE0S_D <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1);
@@ -31,10 +36,10 @@ FTCPE_BERR_IOBS: FTCPE port map (BERR_IOBS,BERR_IOBS_T,CLK_FSB,'0','0');
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/IOACTr AND IOBERR AND fsb/ASrf AND nADoutLE1));
 </td></tr><tr><td>
 </td></tr><tr><td>
+CLK20EN <= SW(0);
 </td></tr><tr><td>
 </td></tr><tr><td>
-</td></tr><tr><td>
-</td></tr><tr><td>
+CLK25EN <= NOT SW(0);
 </td></tr><tr><td>
 </td></tr><tr><td>
 </td></tr><tr><td>
@@ -83,42 +88,44 @@ FTCPE_BERR_IOBS: FTCPE port map (BERR_IOBS,BERR_IOBS_T,CLK_FSB,'0','0');
 </td></tr><tr><td>
 </td></tr><tr><td>
 FDCPE_IOACT: FDCPE port map (IOACT,IOACT_D,CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IOACT_D <= ((NOT iobm/IOS_FSM_FFd4 AND iobm/IOS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd1 AND CLK_IOB AND iobm/RESrf AND iobm/RESrr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd2 AND NOT iobm/IOREQr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND iobm/IOS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd1 AND CLK_IOB AND iobm/ETACK)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND iobm/IOS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd1 AND CLK_IOB AND iobm/DTACKrf AND iobm/DTACKrr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND iobm/IOS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd1 AND CLK_IOB AND iobm/BERRrf AND iobm/BERRrr));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IOACT_D <= ((CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/DTACKrf AND iobm/DTACKrr)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/RESrf AND iobm/RESrr)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOREQr)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2 AND nAoutOE)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/ETACK)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/BERRrf AND iobm/BERRrr));
 </td></tr><tr><td>
 FTCPE_IOBERR: FTCPE port map (IOBERR,IOBERR_T,CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IOBERR_T <= ((nBERR_IOB AND NOT iobm/IOS_FSM_FFd4 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2 AND iobm/IOS_FSM_FFd1 AND CLK_IOB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	IOBERR AND iobm/RESrf AND iobm/RESrr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nBERR_IOB AND NOT iobm/IOS_FSM_FFd4 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2 AND iobm/IOS_FSM_FFd1 AND CLK_IOB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	IOBERR AND iobm/ETACK)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nBERR_IOB AND NOT iobm/IOS_FSM_FFd4 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2 AND iobm/IOS_FSM_FFd1 AND CLK_IOB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	IOBERR AND iobm/DTACKrf AND iobm/DTACKrr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nBERR_IOB AND NOT iobm/IOS_FSM_FFd4 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2 AND iobm/IOS_FSM_FFd1 AND CLK_IOB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	IOBERR AND iobm/BERRrf AND iobm/BERRrr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd2 AND NOT iobm/IOS_FSM_FFd1 AND IOBERR)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT nBERR_IOB AND NOT iobm/IOS_FSM_FFd4 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd3 AND CLK_IOB AND NOT IOBERR AND iobm/ETACK)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT nBERR_IOB AND NOT iobm/IOS_FSM_FFd4 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd3 AND CLK_IOB AND NOT IOBERR AND iobm/DTACKrf AND iobm/DTACKrr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT nBERR_IOB AND NOT iobm/IOS_FSM_FFd4 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd3 AND CLK_IOB AND NOT IOBERR AND iobm/BERRrf AND iobm/BERRrr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT nBERR_IOB AND NOT iobm/IOS_FSM_FFd4 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd3 AND CLK_IOB AND NOT IOBERR AND iobm/RESrf AND iobm/RESrr));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IOBERR_T <= ((CLK_IOB AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/RESrf AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/RESrr)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CLK_IOB AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/DTACKrf AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/DTACKrr)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CLK_IOB AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/BERRrf AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/BERRrr)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CLK_IOB AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/RESrf AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/RESrr)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd2 AND IOBERR)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CLK_IOB AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/ETACK)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CLK_IOB AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/ETACK)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CLK_IOB AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/DTACKrf AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/DTACKrr)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CLK_IOB AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/BERRrf AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/BERRrr));
 </td></tr><tr><td>
 FDCPE_IOL0: FDCPE port map (IOL0,IOL0_D,CLK_FSB,'0','0',IOL0_CE);
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IOL0_D <= ((NOT nLDS_FSB AND nADoutLE1)
@@ -128,17 +135,19 @@ FDCPE_IOL0: FDCPE port map (IOL0,IOL0_D,CLK_FSB,'0','0',IOL0_CE);
 FDCPE_IOREQ: FDCPE port map (IOREQ,IOREQ_D,CLK_FSB,'0','0');
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IOREQ_D <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
@@ -147,63 +156,41 @@ FDCPE_IOREQ: FDCPE port map (IOREQ,IOREQ_D,CLK_FSB,'0','0');
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobs/PS_FSM_FFd2 AND iobs/PS_FSM_FFd1)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobs/PS_FSM_FFd1 AND iobs/IOACTr)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobs/Once AND NOT iobs/PS_FSM_FFd2 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND NOT iobs/PS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	nADoutLE1)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT fsb/ASrf AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	nADoutLE1));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND nADoutLE1));
 </td></tr><tr><td>
 FTCPE_IORW0: FTCPE port map (IORW0,IORW0_T,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IORW0_T <= ((nROMCS_OBUF.EXP)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 AND NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND NOT nAS_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT iobs/Once AND NOT IORW0 AND nWE_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT iobs/Once AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	IORW0 AND NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT iobs/Once AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	IORW0 AND NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	fsb/ASrf AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT iobs/Once AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT IORW0 AND nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT iobs/Once AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT IORW0 AND nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	fsb/ASrf AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (IORW0 AND NOT iobs/IORW1 AND NOT iobs/PS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd1 AND NOT nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT IORW0 AND iobs/IORW1 AND NOT iobs/PS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd1 AND NOT nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT iobs/Once AND IORW0 AND NOT nWE_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT iobs/Once AND NOT IORW0 AND nWE_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IORW0_T <= ((A_FSB_19_IBUF$BUF0.EXP)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (IORW0 AND iobs/IORW1 AND NOT nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT IORW0 AND NOT iobs/IORW1 AND NOT nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nAS_FSB AND NOT fsb/ASrf AND nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT IORW0 AND nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1) AND nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT IORW0 AND NOT nWE_FSB AND nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20) AND nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 AND nADoutLE1));
 </td></tr><tr><td>
 FDCPE_IOU0: FDCPE port map (IOU0,IOU0_D,CLK_FSB,'0','0',IOU0_CE);
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IOU0_D <= ((NOT nUDS_FSB AND nADoutLE1)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobs/IOU1 AND NOT nADoutLE1));
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IOU0_CE <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1);
 </td></tr><tr><td>
+FDCPE_IPL2r0: FDCPE port map (IPL2r0,NOT nIPL2,CLK_FSB,'0','0');
+</td></tr><tr><td>
+FDCPE_IPL2r1: FDCPE port map (IPL2r1,IPL2r0,CLK_FSB,'0','0');
+</td></tr><tr><td>
 </td></tr><tr><td>
 RA(0) <= ((A_FSB(10) AND NOT ram/RASEL)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/RASEL AND A_FSB(1)));
@@ -213,8 +200,8 @@ RA(1) <= ((A_FSB(11) AND NOT ram/RASEL)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/RASEL AND A_FSB(2)));
 </td></tr><tr><td>
 </td></tr><tr><td>
-RA(2) <= ((ram/RASEL AND A_FSB(3))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(12) AND NOT ram/RASEL));
+RA(2) <= ((A_FSB(12) AND NOT ram/RASEL)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/RASEL AND A_FSB(3)));
 </td></tr><tr><td>
 </td></tr><tr><td>
 RA(3) <= ((A_FSB(13) AND NOT ram/RASEL)
@@ -257,6 +244,15 @@ RA(10) <= A_FSB(21);
 </td></tr><tr><td>
 RA(11) <= A_FSB(19);
 </td></tr><tr><td>
+FDCPE_RESDone: FDCPE port map (RESDone,'1',CLK_FSB,'0','0',RESDone_CE);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;RESDone_CE <= (NOT RESr0 AND NOT RESr1 AND RESr2);
+</td></tr><tr><td>
+FDCPE_RESr0: FDCPE port map (RESr0,NOT nRES,CLK_FSB,'0','0');
+</td></tr><tr><td>
+FDCPE_RESr1: FDCPE port map (RESr1,RESr0,CLK_FSB,'0','0');
+</td></tr><tr><td>
+FDCPE_RESr2: FDCPE port map (RESr2,RESr1,CLK_FSB,'0','0');
+</td></tr><tr><td>
 FDCPE_RefAck: FDCPE port map (RefAck,RefAck_D,CLK_FSB,'0','0');
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;RefAck_D <= (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1);
 </td></tr><tr><td>
@@ -348,7 +344,13 @@ FDCPE_fsb/Ready0r: FDCPE port map (fsb/Ready0r,fsb/Ready0r_D,CLK_FSB,'0','0');
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT fsb/Ready0r AND NOT ram/RAMReady));
 </td></tr><tr><td>
 FDCPE_fsb/Ready1r: FDCPE port map (fsb/Ready1r,fsb/Ready1r_D,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;fsb/Ready1r_D <= ((A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;fsb/Ready1r_D <= ((A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/Ready1r AND NOT iobs/IOReady)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/Ready1r AND NOT iobs/IOReady)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND NOT iobs/IOReady AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nADoutLE1)
@@ -360,12 +362,8 @@ FDCPE_fsb/Ready1r: FDCPE port map (fsb/Ready1r,fsb/Ready1r_D,CLK_FSB,'0','0');
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT fsb/Ready1r AND NOT iobs/IOReady)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT fsb/Ready1r AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/IOReady)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/Ready1r AND NOT iobs/IOReady)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/Ready1r AND NOT iobs/IOReady));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT fsb/Ready1r AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/IOReady AND NOT SW(1)));
 </td></tr><tr><td>
 FDCPE_fsb/Ready2r: FDCPE port map (fsb/Ready2r,fsb/Ready2r_D,CLK_FSB,'0','0');
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;fsb/Ready2r_D <= ((nAS_FSB AND NOT fsb/ASrf)
@@ -403,47 +401,58 @@ FDCPE_fsb/Ready2r: FDCPE port map (fsb/Ready2r,fsb/Ready2r_D,CLK_FSB,'0','0');
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r));
 </td></tr><tr><td>
 FDCPE_fsb/VPA: FDCPE port map (fsb/VPA,fsb/VPA_D,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;fsb/VPA_D <= ((EXP25_.EXP)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(22) AND TimeoutB AND fsb/VPA AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT $OpTx$FX_DC$609)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(21) AND TimeoutB AND fsb/VPA AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT $OpTx$FX_DC$609)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;fsb/VPA_D <= ((EXP21_.EXP)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT fsb/Ready1r AND fsb/VPA AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/IOReady AND NOT $OpTx$FX_DC$609)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/Ready0r AND fsb/VPA AND NOT ram/RAMReady AND NOT $OpTx$FX_DC$609)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/IOReady AND NOT $OpTx$FX_DC$708)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT fsb/Ready1r AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	fsb/VPA AND NOT iobs/IOReady AND NOT $OpTx$FX_DC$609)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (EXP16_.EXP)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT fsb/Ready0r AND fsb/VPA AND NOT ram/RAMReady AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT $OpTx$FX_DC$609)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	fsb/VPA AND NOT iobs/IOReady AND NOT $OpTx$FX_DC$708)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT fsb/Ready1r AND fsb/VPA AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/IOReady AND NOT SW(1) AND NOT $OpTx$FX_DC$708)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND NOT $OpTx$FX_DC$609)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND NOT $OpTx$FX_DC$708)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND NOT $OpTx$FX_DC$609)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND NOT $OpTx$FX_DC$708)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nROMWE_OBUF.EXP)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(14) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nADoutLE1 AND NOT $OpTx$FX_DC$609)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nADoutLE1 AND NOT $OpTx$FX_DC$708)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(13) AND NOT A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 AND NOT nWE_FSB AND NOT fsb/Ready1r AND fsb/VPA AND NOT iobs/IOReady AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nADoutLE1 AND NOT $OpTx$FX_DC$609)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (BERR_IOBS AND fsb/VPA AND NOT $OpTx$FX_DC$609)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (fsb/BERR0r AND fsb/VPA AND NOT $OpTx$FX_DC$609)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (fsb/BERR1r AND fsb/VPA AND NOT $OpTx$FX_DC$609)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND TimeoutB AND fsb/VPA AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT $OpTx$FX_DC$609)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(20) AND TimeoutB AND fsb/VPA AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT $OpTx$FX_DC$609));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nADoutLE1 AND NOT $OpTx$FX_DC$708)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(9) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	fsb/VPA AND NOT $OpTx$FX_DC$708)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND A_FSB(13) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	fsb/VPA AND NOT $OpTx$FX_DC$708)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(8) AND A_FSB(15) AND NOT A_FSB(14) AND A_FSB(13) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT A_FSB(12) AND NOT A_FSB(11) AND NOT A_FSB(10) AND NOT A_FSB(23) AND NOT A_FSB(22) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(16) AND cs/nOverlay1 AND NOT nWE_FSB AND NOT TimeoutA AND NOT fsb/Ready2r AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	fsb/VPA AND NOT $OpTx$FX_DC$708)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (BERR_IOBS AND fsb/VPA AND NOT $OpTx$FX_DC$708)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (fsb/BERR0r AND fsb/VPA AND NOT $OpTx$FX_DC$708)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (fsb/BERR1r AND fsb/VPA AND NOT $OpTx$FX_DC$708)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (fsb/VPA AND NOT nBR_IOB AND NOT $OpTx$FX_DC$708)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (fsb/VPA AND NOT $OpTx$FX_DC$708 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$$OpTx$FX_DC$182_INV$783));
 </td></tr><tr><td>
 FDCPE_iobm/BERRrf: FDCPE port map (iobm/BERRrf,NOT nBERR_IOB,NOT CLK2X_IOB,'0','0');
 </td></tr><tr><td>
 FDCPE_iobm/BERRrr: FDCPE port map (iobm/BERRrr,NOT nBERR_IOB,CLK2X_IOB,'0','0');
 </td></tr><tr><td>
+FDCPE_iobm/BGr0: FDCPE port map (iobm/BGr0,NOT nBG_IOB,CLK2X_IOB,'0','0');
+</td></tr><tr><td>
+FDCPE_iobm/BGr1: FDCPE port map (iobm/BGr1,iobm/BGr0,CLK2X_IOB,'0','0');
+</td></tr><tr><td>
 FDCPE_iobm/DTACKrf: FDCPE port map (iobm/DTACKrf,NOT nDTACK_IOB,NOT CLK2X_IOB,'0','0');
 </td></tr><tr><td>
 FDCPE_iobm/DTACKrr: FDCPE port map (iobm/DTACKrr,NOT nDTACK_IOB,CLK2X_IOB,'0','0');
@@ -492,36 +501,27 @@ FDCPE_iobm/Er2: FDCPE port map (iobm/Er2,iobm/Er,CLK2X_IOB,'0','0');
 FDCPE_iobm/IOREQr: FDCPE port map (iobm/IOREQr,IOREQ,NOT CLK2X_IOB,'0','0');
 </td></tr><tr><td>
 FDCPE_iobm/IOS_FSM_FFd1: FDCPE port map (iobm/IOS_FSM_FFd1,iobm/IOS_FSM_FFd1_D,CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobm/IOS_FSM_FFd1_D <= ((iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd2));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobm/IOS_FSM_FFd1_D <= ((iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2));
 </td></tr><tr><td>
-FDCPE_iobm/IOS_FSM_FFd2: FDCPE port map (iobm/IOS_FSM_FFd2,iobm/IOS_FSM_FFd2_D,CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobm/IOS_FSM_FFd2_D <= ((NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd1));
+FTCPE_iobm/IOS_FSM_FFd2: FTCPE port map (iobm/IOS_FSM_FFd2,iobm/IOS_FSM_FFd2_T,CLK2X_IOB,'0','0');
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobm/IOS_FSM_FFd2_T <= ((iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd2)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd2 AND iobm/ETACK)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd2 AND iobm/DTACKrf AND iobm/DTACKrr)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd2 AND iobm/BERRrf AND iobm/BERRrr)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CLK_IOB AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd2 AND iobm/RESrf AND iobm/RESrr));
 </td></tr><tr><td>
 FDCPE_iobm/IOS_FSM_FFd3: FDCPE port map (iobm/IOS_FSM_FFd3,iobm/IOS_FSM_FFd3_D,CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobm/IOS_FSM_FFd3_D <= ((NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND CLK_IOB AND iobm/ETACK)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND CLK_IOB AND iobm/DTACKrf AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/DTACKrr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND CLK_IOB AND iobm/BERRrf AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/BERRrr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND CLK_IOB AND iobm/RESrf AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/RESrr));
-</td></tr><tr><td>
-FDCPE_iobm/IOS_FSM_FFd4: FDCPE port map (iobm/IOS_FSM_FFd4,iobm/IOS_FSM_FFd4_D,CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobm/IOS_FSM_FFd4_D <= ((NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd2 AND CLK_IOB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd2 AND NOT iobm/IOREQr));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobm/IOS_FSM_FFd3_D <= ((iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd2)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT CLK_IOB AND NOT iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOREQr AND NOT nAoutOE));
 </td></tr><tr><td>
 FDCPE_iobm/RESrf: FDCPE port map (iobm/RESrf,NOT nRES,NOT CLK2X_IOB,'0','0');
 </td></tr><tr><td>
@@ -541,20 +541,20 @@ FDCPE_iobs/IOL1: FDCPE port map (iobs/IOL1,NOT nLDS_FSB,CLK_FSB,'0','0',iobs/Loa
 FTCPE_iobs/IORW1: FTCPE port map (iobs/IORW1,iobs/IORW1_T,CLK_FSB,'0','0');
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobs/IORW1_T <= ((iobs/Once)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT nWE_FSB AND NOT iobs/IORW1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (fsb/Ready1r.EXP)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nAS_FSB AND NOT fsb/ASrf)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21))
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20))
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (fsb/Ready2r.EXP)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19))
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18))
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17))
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(20))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1))
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nWE_FSB AND iobs/IORW1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT nWE_FSB AND NOT iobs/IORW1)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT iobs/IORW1));
 </td></tr><tr><td>
 FTCPE_iobs/IOReady: FTCPE port map (iobs/IOReady,iobs/IOReady_T,CLK_FSB,'0','0');
@@ -572,37 +572,37 @@ FDCPE_iobs/Load1: FDCPE port map (iobs/Load1,iobs/Load1_D,CLK_FSB,'0','0');
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobs/Load1_D <= ((iobs/Once)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT nADoutLE1)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20))
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18))
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17))
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1))
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21))
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(20))
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nAS_FSB AND NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1));
 </td></tr><tr><td>
 FDCPE_iobs/Once: FDCPE port map (iobs/Once,iobs/Once_D,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobs/Once_D <= ((nOE_OBUF.EXP)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobs/Once_D <= ((nBERR_FSB_OBUF.EXP)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT iobs/Once AND iobs/PS_FSM_FFd1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobs/Once AND iobs/PS_FSM_FFd2 AND NOT nADoutLE1)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobs/Once AND iobs/PS_FSM_FFd1 AND NOT nADoutLE1)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND NOT iobs/Once)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/Once)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT iobs/Once AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20) AND NOT iobs/Once)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND NOT iobs/Once)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND NOT iobs/Once)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND NOT iobs/Once)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND NOT iobs/Once)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT iobs/Once AND nWE_FSB)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nAS_FSB AND NOT fsb/ASrf)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT iobs/Once AND iobs/PS_FSM_FFd2)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND NOT iobs/Once)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT iobs/Once AND iobs/PS_FSM_FFd2)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT iobs/Once AND iobs/PS_FSM_FFd1));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT iobs/Once AND iobs/PS_FSM_FFd1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobs/Once AND iobs/PS_FSM_FFd2 AND NOT nADoutLE1));
 </td></tr><tr><td>
 FDCPE_iobs/PS_FSM_FFd1: FDCPE port map (iobs/PS_FSM_FFd1,iobs/PS_FSM_FFd1_D,CLK_FSB,'0','0');
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobs/PS_FSM_FFd1_D <= ((iobs/PS_FSM_FFd2)
@@ -611,17 +611,19 @@ FDCPE_iobs/PS_FSM_FFd1: FDCPE port map (iobs/PS_FSM_FFd1,iobs/PS_FSM_FFd1_D,CLK_
 FDCPE_iobs/PS_FSM_FFd2: FDCPE port map (iobs/PS_FSM_FFd2,iobs/PS_FSM_FFd2_D,CLK_FSB,'0','0');
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;iobs/PS_FSM_FFd2_D <= ((NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(20) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(19) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(16) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(18) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND NOT A_FSB(17) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(21) AND nWE_FSB AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND SW(1) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND A_FSB(21) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
@@ -633,10 +635,10 @@ FDCPE_iobs/PS_FSM_FFd2: FDCPE port map (iobs/PS_FSM_FFd2,iobs/PS_FSM_FFd2_D,CLK_
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/IOACTr)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobs/Once AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	nADoutLE1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(20) AND NOT iobs/PS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd1 AND nADoutLE1)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/ASrf AND nADoutLE1));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/ASrf AND nADoutLE1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay1 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1));
 </td></tr><tr><td>
 </td></tr><tr><td>
 nADoutLE0 <= (NOT ALE0M AND NOT ALE0S);
@@ -645,14 +647,16 @@ FDCPE_nADoutLE1: FDCPE port map (nADoutLE1,nADoutLE1_D,CLK_FSB,'0','0');
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nADoutLE1_D <= ((iobs/Load1)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobs/Clear1 AND NOT nADoutLE1));
 </td></tr><tr><td>
-FDCPE_nAS_IOB: FDCPE port map (nAS_IOB,nAS_IOB_D,NOT CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nAS_IOB_D <= ((NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd2)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd1));
+FDCPE_nAS_IOB: FDCPE port map (nAS_IOB_I,nAS_IOB,NOT CLK2X_IOB,'0','0');
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nAS_IOB <= ((NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nAS_IOB <= nAS_IOB_I when nAS_IOB_OE = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nAS_IOB_OE <= NOT nAoutOE;
 </td></tr><tr><td>
-</td></tr><tr><td>
-nAoutOE <= '0';
+FDCPE_nAoutOE: FDCPE port map (nAoutOE,nAoutOE_D,CLK2X_IOB,'0','0');
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nAoutOE_D <= ((NOT iobm/BGr0 AND NOT iobm/BGr1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/BGr1 AND nAoutOE)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT nAS_IOB AND NOT iobm/BGr0 AND NOT nAoutOE));
 </td></tr><tr><td>
 </td></tr><tr><td>
 nBERR_FSB <= ((nAS_FSB)
@@ -660,22 +664,25 @@ nBERR_FSB <= ((nAS_FSB)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT BERR_IOBS AND NOT fsb/BERR0r AND NOT fsb/BERR1r));
 </td></tr><tr><td>
+FDCPE_nBR_IOB: FDCPE port map (nBR_IOB,'0',CLK_FSB,'0','0',nBR_IOB_CE);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nBR_IOB_CE <= (RESr0 AND RESr1 AND IPL2r0 AND RESr2 AND NOT RESDone AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	IPL2r1);
+</td></tr><tr><td>
 FDCPE_nCAS: FDCPE port map (nCAS,NOT ram/RASEL,NOT CLK_FSB,'0','0');
 </td></tr><tr><td>
 FDCPE_nDTACK_FSB: FDCPE port map (nDTACK_FSB,nDTACK_FSB_D,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nDTACK_FSB_D <= ((EXP18_.EXP)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nDTACK_FSB_D <= ((EXP17_.EXP)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nAS_FSB AND NOT fsb/ASrf)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT fsb/Ready1r AND NOT iobs/IOReady AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	nDTACK_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/Ready0r AND nDTACK_FSB AND NOT ram/RAMReady)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND NOT fsb/Ready1r AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/IOReady AND nDTACK_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT fsb/Ready0r AND nDTACK_FSB AND NOT ram/RAMReady)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT fsb/Ready1r AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobs/IOReady AND NOT SW(1) AND nDTACK_FSB)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(14) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/Ready1r AND NOT iobs/IOReady AND nDTACK_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (EXP21_.EXP)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (EXP20_.EXP)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(13) AND A_FSB(22) AND A_FSB(20) AND A_FSB(19) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT cs/nOverlay1 AND NOT nWE_FSB AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/Ready1r AND NOT iobs/IOReady AND nDTACK_FSB)
@@ -700,31 +707,30 @@ FDCPE_nDTACK_FSB: FDCPE port map (nDTACK_FSB,nDTACK_FSB_D,CLK_FSB,'0','0');
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (BERR_IOBS AND nDTACK_FSB)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (fsb/BERR0r AND nDTACK_FSB)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (fsb/BERR1r AND nDTACK_FSB)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nAS_FSB AND NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nDTACK_FSB AND NOT $OpTx$FX_DC$610));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nDTACK_FSB AND NOT nBR_IOB)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nDTACK_FSB AND $OpTx$$OpTx$FX_DC$182_INV$783));
 </td></tr><tr><td>
 FDCPE_nDinLE: FDCPE port map (nDinLE,nDinLE_D,NOT CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nDinLE_D <= ((iobm/IOS_FSM_FFd4 AND iobm/IOS_FSM_FFd1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND iobm/IOS_FSM_FFd3));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nDinLE_D <= (iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2);
 </td></tr><tr><td>
 </td></tr><tr><td>
 nDinOE <= ((A_FSB(23) AND nWE_FSB AND NOT nAS_FSB)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND A_FSB(20) AND nWE_FSB AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND nWE_FSB AND NOT nAS_FSB AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT SW(1)));
 </td></tr><tr><td>
 FDCPE_nDoutOE: FDCPE port map (nDoutOE,nDoutOE_D,CLK2X_IOB,'0','0');
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nDoutOE_D <= ((NOT IORW0)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd2));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2));
 </td></tr><tr><td>
-FDCPE_nLDS_IOB: FDCPE port map (nLDS_IOB,nLDS_IOB_D,NOT CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nLDS_IOB_D <= ((NOT IOL0)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd2)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (IORW0 AND iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd2 AND 
+FDCPE_nLDS_IOB: FDCPE port map (nLDS_IOB_I,nLDS_IOB,NOT CLK2X_IOB,'0','0');
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nLDS_IOB <= ((IOL0 AND NOT iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (IOL0 AND iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT IORW0 AND IOL0 AND iobm/IOS_FSM_FFd3 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd1));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nLDS_IOB <= nLDS_IOB_I when nLDS_IOB_OE = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nLDS_IOB_OE <= NOT nAoutOE;
 </td></tr><tr><td>
 </td></tr><tr><td>
 nOE <= NOT ((nWE_FSB AND NOT nAS_FSB));
@@ -745,27 +751,31 @@ nRAS <= NOT (((RefAck)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND NOT ram/RAMDIS1)));
 </td></tr><tr><td>
 </td></tr><tr><td>
-nROMCS <= NOT (((NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(21) AND NOT A_FSB(20) AND 
+nROMCS <= NOT (((A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT SW(1))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	SW(1))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1)));
 </td></tr><tr><td>
 </td></tr><tr><td>
 nROMWE <= NOT ((NOT nWE_FSB AND NOT nAS_FSB));
 </td></tr><tr><td>
-FDCPE_nUDS_IOB: FDCPE port map (nUDS_IOB,nUDS_IOB_D,NOT CLK2X_IOB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nUDS_IOB_D <= ((NOT IOU0)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd2)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	iobm/IOS_FSM_FFd1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (IORW0 AND iobm/IOS_FSM_FFd4 AND NOT iobm/IOS_FSM_FFd2 AND 
+FDCPE_nUDS_IOB: FDCPE port map (nUDS_IOB_I,nUDS_IOB,NOT CLK2X_IOB,'0','0');
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nUDS_IOB <= ((IOU0 AND NOT iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (IOU0 AND iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT IORW0 AND IOU0 AND iobm/IOS_FSM_FFd3 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/IOS_FSM_FFd1));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nUDS_IOB <= nUDS_IOB_I when nUDS_IOB_OE = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nUDS_IOB_OE <= NOT nAoutOE;
 </td></tr><tr><td>
-FTCPE_nVMA_IOB: FTCPE port map (nVMA_IOB,nVMA_IOB_T,CLK2X_IOB,'0','0');
+FTCPE_nVMA_IOB: FTCPE port map (nVMA_IOB_I,nVMA_IOB_T,CLK2X_IOB,'0','0');
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nVMA_IOB_T <= ((NOT nVMA_IOB AND NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/ES(3) AND NOT iobm/ES(4))
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nVMA_IOB AND iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT iobm/ES(3) AND NOT iobm/ES(4) AND IOACT AND iobm/VPArf AND iobm/VPArr));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nVMA_IOB <= nVMA_IOB_I when nVMA_IOB_OE = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;nVMA_IOB_OE <= NOT nAoutOE;
 </td></tr><tr><td>
 </td></tr><tr><td>
 nVPA_FSB <= NOT ((fsb/VPA AND NOT nAS_FSB));
@@ -775,33 +785,33 @@ FDCPE_ram/BACTr: FDCPE port map (ram/BACTr,ram/BACTr_D,CLK_FSB,'0','0');
 </td></tr><tr><td>
 FTCPE_ram/Once: FTCPE port map (ram/Once,ram/Once_T,CLK_FSB,'0','0');
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ram/Once_T <= ((ram/Once AND nAS_FSB AND NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd3)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT ram/Once AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd3)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd3 AND fsb/ASrf));
 </td></tr><tr><td>
 FDCPE_ram/RAMDIS1: FDCPE port map (ram/RAMDIS1,ram/RAMDIS1_D,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ram/RAMDIS1_D <= ((ram/RAMDIS2.EXP)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ram/RAMDIS1_D <= ((nOE_OBUF.EXP)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND NOT nAS_FSB AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/Once AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
@@ -819,29 +829,29 @@ FDCPE_ram/RAMDIS1: FDCPE port map (ram/RAMDIS1,ram/RAMDIS1_D,CLK_FSB,'0','0');
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/BACTr AND fsb/ASrf));
 </td></tr><tr><td>
 FTCPE_ram/RAMDIS2: FTCPE port map (ram/RAMDIS2,ram/RAMDIS2_T,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ram/RAMDIS2_T <= ((ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND ram/Once AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefDone AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cnt/RefCnt(7))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND ram/Once AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefDone AND NOT ram/RAMDIS2 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ram/RAMDIS2_T <= ((NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND ram/Once AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefDone AND NOT cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND fsb/ASrf)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND ram/Once AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefDone AND NOT cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT ram/RS_FSM_FFd2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cnt/RefCnt(7) AND fsb/ASrf)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/RAMDIS2 AND nAS_FSB AND NOT fsb/ASrf)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7)));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/Once AND NOT cnt/RefDone AND NOT ram/RAMDIS2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND fsb/ASrf)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND ram/Once AND NOT cnt/RefDone AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cnt/RefCnt(7))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND ram/Once AND NOT cnt/RefDone AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cs/nOverlay1 AND NOT ram/RAMDIS2 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	fsb/ASrf));
 </td></tr><tr><td>
 FDCPE_ram/RAMReady: FDCPE port map (ram/RAMReady,ram/RAMReady_D,CLK_FSB,'0','0');
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ram/RAMReady_D <= ((ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3)
@@ -852,33 +862,33 @@ FDCPE_ram/RAMReady: FDCPE port map (ram/RAMReady,ram/RAMReady_D,CLK_FSB,'0','0')
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT cnt/RefDone AND NOT ram/RS_FSM_FFd1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/BACTr AND fsb/ASrf)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/RS_FSM_FFd2.EXP)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT ram/Once AND NOT ram/RS_FSM_FFd1 AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd1 AND fsb/ASrf)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(21) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(21) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(21) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(21) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT ram/Once AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd1));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd1));
 </td></tr><tr><td>
 FDCPE_ram/RASEL: FDCPE port map (ram/RASEL,ram/RASEL_D,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ram/RASEL_D <= ((A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ram/RASEL_D <= ((A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT cnt/RefDone AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(22) AND NOT cnt/RefDone AND NOT cs/nOverlay1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT cnt/RefDone AND nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
@@ -886,16 +896,16 @@ FDCPE_ram/RASEL: FDCPE port map (ram/RASEL,ram/RASEL_D,CLK_FSB,'0','0');
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT cnt/RefDone AND nAS_FSB AND ram/RS_FSM_FFd1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (EXP38_.EXP)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (EXP26_.EXP)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND fsb/ASrf)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND NOT nAS_FSB AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT A_FSB(21) AND NOT cnt/RefDone AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND cs/nOverlay1 AND NOT cnt/RefDone AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND NOT cnt/RefDone AND cs/nOverlay1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/BACTr)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
@@ -909,20 +919,20 @@ FDCPE_ram/RASEL: FDCPE port map (ram/RASEL,ram/RASEL_D,CLK_FSB,'0','0');
 </td></tr><tr><td>
 FTCPE_ram/RS_FSM_FFd1: FTCPE port map (ram/RS_FSM_FFd1,ram/RS_FSM_FFd1_T,CLK_FSB,'0','0');
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ram/RS_FSM_FFd1_T <= ((ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd3)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay1 AND NOT ram/Once AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT ram/Once AND cs/nOverlay1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT ram/Once AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd3)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(23) AND A_FSB(22) AND A_FSB(21) AND NOT ram/Once AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd3 AND fsb/ASrf));
 </td></tr><tr><td>
 FTCPE_ram/RS_FSM_FFd2: FTCPE port map (ram/RS_FSM_FFd2,ram/RS_FSM_FFd2_T,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ram/RS_FSM_FFd2_T <= ((ram/RS_FSM_FFd3.EXP)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ram/RS_FSM_FFd2_T <= ((EXP28_.EXP)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefCnt(5) AND ram/BACTr)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3 AND 
@@ -941,7 +951,22 @@ FTCPE_ram/RS_FSM_FFd2: FTCPE port map (ram/RS_FSM_FFd2,ram/RS_FSM_FFd2_T,CLK_FSB
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cnt/RefCnt(7)));
 </td></tr><tr><td>
 FTCPE_ram/RS_FSM_FFd3: FTCPE port map (ram/RS_FSM_FFd3,ram/RS_FSM_FFd3_T,CLK_FSB,'0','0');
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ram/RS_FSM_FFd3_T <= ((TimeoutA.EXP)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ram/RS_FSM_FFd3_T <= ((A_FSB(22) AND NOT A_FSB(21) AND NOT ram/RS_FSM_FFd2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(22) AND cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A_FSB(22) AND NOT cs/nOverlay1 AND NOT ram/RS_FSM_FFd2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd3 AND NOT fsb/ASrf)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT cnt/RefDone AND NOT nAS_FSB AND ram/RS_FSM_FFd2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cnt/RefCnt(7))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT cnt/RefDone AND ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd1 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	ram/RS_FSM_FFd3 AND cnt/RefCnt(5) AND cnt/RefCnt(6) AND cnt/RefCnt(7) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	fsb/ASrf)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd3)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/Once AND cnt/RefDone AND NOT ram/RS_FSM_FFd2 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd3)
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
@@ -949,11 +974,7 @@ FTCPE_ram/RS_FSM_FFd3: FTCPE port map (ram/RS_FSM_FFd3,ram/RS_FSM_FFd3_T,CLK_FSB
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd3 AND NOT cnt/RefCnt(6))
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ram/Once AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd3 AND NOT cnt/RefCnt(7))
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd3 AND NOT fsb/ASrf)
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A_FSB(23) AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd1 AND 
-<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd3));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT ram/RS_FSM_FFd3 AND NOT cnt/RefCnt(7)));
 </td></tr><tr><td>
 Register Legend:
 <br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; FDCPE (Q,D,C,CLR,PRE,CE); 
diff --git a/cpld/XC95144XL/MXSE_html/fit/education.gif b/cpld/XC95144XL/MXSE_html/fit/education.gif
deleted file mode 100644
index 07e9507..0000000
Binary files a/cpld/XC95144XL/MXSE_html/fit/education.gif and /dev/null differ
diff --git a/cpld/XC95144XL/MXSE_html/fit/endmkt.gif b/cpld/XC95144XL/MXSE_html/fit/endmkt.gif
deleted file mode 100644
index 15371dc..0000000
Binary files a/cpld/XC95144XL/MXSE_html/fit/endmkt.gif and /dev/null differ
diff --git a/cpld/XC95144XL/MXSE_html/fit/eqns 2.htm b/cpld/XC95144XL/MXSE_html/fit/eqns 2.htm
deleted file mode 100644
index 1a9486d..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/eqns 2.htm	
+++ /dev/null
@@ -1,1791 +0,0 @@
-<html><head>
-<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
-<script src="paths.js"></script><script src="eqns.js"></script><script>
-      var design = "MXSE";
-      var device = "XC95144XL";
-      signals = new Array("ALE0M","ALE0S","BERR_IOBS","IOACT","IOBERR","IOL0","IOREQ","IORW0","IOU0","OpTxFX_DC602_SPECSIG","OpTxFX_DC606_SPECSIG","RA0_SPECSIG","RA10_SPECSIG","RA11_SPECSIG","RA1_SPECSIG","RA2_SPECSIG","RA3_SPECSIG","RA4_SPECSIG","RA5_SPECSIG","RA6_SPECSIG","RA7_SPECSIG","RA8_SPECSIG","RA9_SPECSIG","RefAck","TimeoutA","TimeoutB","cntRefCnt0_SPECSIG","cntRefCnt1_SPECSIG","cntRefCnt2_SPECSIG","cntRefCnt3_SPECSIG","cntRefCnt4_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG","cntRefDone_SPECSIG","cntTimeoutBPre_SPECSIG","csnOverlay0_SPECSIG","csnOverlay1_SPECSIG","fsbASrf_SPECSIG","fsbBERR0r_SPECSIG","fsbBERR1r_SPECSIG","fsbReady0r_SPECSIG","fsbReady1r_SPECSIG","fsbReady2r_SPECSIG","fsbVPA_SPECSIG","fsbVPA__or00001fsbVPA__or00001_D2_SPECSIG","iobmBERRrf_SPECSIG","iobmBERRrr_SPECSIG","iobmDTACKrf_SPECSIG","iobmDTACKrr_SPECSIG","iobmES0_SPECSIG","iobmES1_SPECSIG","iobmES2_SPECSIG","iobmES3_SPECSIG","iobmES4_SPECSIG","iobmETACK_SPECSIG","iobmEr2_SPECSIG","iobmEr_SPECSIG","iobmIOREQr_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd4_SPECSIG","iobmIOS_FSM_FFd5_SPECSIG","iobmIOS_FSM_FFd6_SPECSIG","iobmIOS_FSM_FFd7_SPECSIG","iobmIOS_FSM_FFd8_SPECSIG","iobmRESrf_SPECSIG","iobmRESrr_SPECSIG","iobmVPArf_SPECSIG","iobmVPArr_SPECSIG","iobsClear1_SPECSIG","iobsIOACTr_SPECSIG","iobsIOL1_SPECSIG","iobsIORW1_SPECSIG","iobsIOReady_SPECSIG","iobsIOU1_SPECSIG","iobsLoad1_SPECSIG","iobsOnce_SPECSIG","iobsPS_FSM_FFd1_SPECSIG","iobsPS_FSM_FFd2_SPECSIG","nADoutLE0","nADoutLE1","nAS_IOB","nAoutOE","nBERR_FSB","nCAS","nDTACK_FSB","nDinLE","nDinOE","nDoutOE","nLDS_IOB","nOE","nRAMLWE","nRAMUWE","nRAS","nROMCS","nROMWE","nUDS_IOB","nVMA_IOB","nVPA_FSB","ramBACTr_SPECSIG","ramOnce_SPECSIG","ramRAMDIS1_SPECSIG","ramRAMDIS2_SPECSIG","ramRAMReady_SPECSIG","ramRASEL_SPECSIG","ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd3_SPECSIG");
-      sigNegs = new Array("ON","OFF","OFF","ON","OFF","OFF","ON","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","ON","OFF","OFF","OFF","OFF","ON","ON","ON","ON","ON","OFF","OFF","OFF","OFF","OFF","OFF","ON","ON","ON","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","ON","OFF","OFF","OFF","OFF","ON","OFF","OFF","OFF","OFF","OFF","OFF","OFF","ON","OFF","OFF","ON","ON","OFF","ON","OFF","ON","OFF","OFF","OFF","OFF","OFF","ON","OFF","OFF","OFF","ON","ON","ON","ON","ON","ON","OFF","OFF","ON","ON","OFF","OFF","OFF","ON","OFF","OFF","ON","ON");
-      sigTypes = new Array("D","D","T","D","T","D","D","T","D","","","","","","","","","","","","","","","D","T","T","T","T","T","T","T","T","T","T","D","T","T","D","D","D","D","D","D","D","D","","D","D","D","D","T","D","D","T","T","D","D","D","D","D","D","D","D","D","D","D","D","D","D","D","D","D","D","D","T","T","D","D","D","D","D","","D","D","","","D","D","D","","D","D","","","","","","","D","T","","D","T","D","T","D","D","T","T","T");
-
-      
-        specSig["A_FSB9_SPECSIG"]=new Array("A_FSB<9>");
-      
-        specSig["A_FSB8_SPECSIG"]=new Array("A_FSB<8>");
-      
-        specSig["A_FSB15_SPECSIG"]=new Array("A_FSB<15>");
-      
-        specSig["A_FSB14_SPECSIG"]=new Array("A_FSB<14>");
-      
-        specSig["A_FSB13_SPECSIG"]=new Array("A_FSB<13>");
-      
-        specSig["A_FSB12_SPECSIG"]=new Array("A_FSB<12>");
-      
-        specSig["A_FSB11_SPECSIG"]=new Array("A_FSB<11>");
-      
-        specSig["A_FSB10_SPECSIG"]=new Array("A_FSB<10>");
-      
-        specSig["A_FSB23_SPECSIG"]=new Array("A_FSB<23>");
-      
-        specSig["A_FSB22_SPECSIG"]=new Array("A_FSB<22>");
-      
-        specSig["A_FSB21_SPECSIG"]=new Array("A_FSB<21>");
-      
-        specSig["A_FSB20_SPECSIG"]=new Array("A_FSB<20>");
-      
-        specSig["A_FSB19_SPECSIG"]=new Array("A_FSB<19>");
-      
-        specSig["A_FSB18_SPECSIG"]=new Array("A_FSB<18>");
-      
-        specSig["A_FSB17_SPECSIG"]=new Array("A_FSB<17>");
-      
-        specSig["A_FSB16_SPECSIG"]=new Array("A_FSB<16>");
-      
-        specSig["A_FSB1_SPECSIG"]=new Array("A_FSB<1>");
-      
-        specSig["A_FSB2_SPECSIG"]=new Array("A_FSB<2>");
-      
-        specSig["A_FSB3_SPECSIG"]=new Array("A_FSB<3>");
-      
-        specSig["A_FSB4_SPECSIG"]=new Array("A_FSB<4>");
-      
-        specSig["A_FSB5_SPECSIG"]=new Array("A_FSB<5>");
-      
-        specSig["A_FSB6_SPECSIG"]=new Array("A_FSB<6>");
-      
-        specSig["A_FSB7_SPECSIG"]=new Array("A_FSB<7>");
-      
-        specSig["GSRI_SPECSIG"]=new Array("GSR/I");
-      
-        specSig["b_SPECSIG"]=new Array("(b)");
-      
-        specSig["iobmIOREQr_SPECSIG"]=new Array("iobm/IOREQr");
-      
-        specSig["cntRefCnt3_SPECSIG"]=new Array("cnt/RefCnt<3>");
-      
-        specSig["cntRefCnt1_SPECSIG"]=new Array("cnt/RefCnt<1>");
-      
-        specSig["fsbBERR1r_SPECSIG"]=new Array("fsb/BERR1r");
-      
-        specSig["GCKI_SPECSIG"]=new Array("GCK/I");
-      
-        specSig["iobsPS_FSM_FFd2_SPECSIG"]=new Array("iobs/PS_FSM_FFd2");
-      
-        specSig["iobsPS_FSM_FFd1_SPECSIG"]=new Array("iobs/PS_FSM_FFd1");
-      
-        specSig["iobmETACK_SPECSIG"]=new Array("iobm/ETACK");
-      
-        specSig["iobsIORW1_SPECSIG"]=new Array("iobs/IORW1");
-      
-        specSig["RA0_SPECSIG"]=new Array("RA<0>");
-      
-        specSig["RA2_SPECSIG"]=new Array("RA<2>");
-      
-        specSig["RA4_SPECSIG"]=new Array("RA<4>");
-      
-        specSig["RA1_SPECSIG"]=new Array("RA<1>");
-      
-        specSig["iobmIOS_FSM_FFd5_SPECSIG"]=new Array("iobm/IOS_FSM_FFd5");
-      
-        specSig["iobmIOS_FSM_FFd4_SPECSIG"]=new Array("iobm/IOS_FSM_FFd4");
-      
-        specSig["RA3_SPECSIG"]=new Array("RA<3>");
-      
-        specSig["iobmBERRrf_SPECSIG"]=new Array("iobm/BERRrf");
-      
-        specSig["iobmIOS_FSM_FFd8_SPECSIG"]=new Array("iobm/IOS_FSM_FFd8");
-      
-        specSig["iobmIOS_FSM_FFd2_SPECSIG"]=new Array("iobm/IOS_FSM_FFd2");
-      
-        specSig["RA5_SPECSIG"]=new Array("RA<5>");
-      
-        specSig["RA6_SPECSIG"]=new Array("RA<6>");
-      
-        specSig["RA7_SPECSIG"]=new Array("RA<7>");
-      
-        specSig["RA8_SPECSIG"]=new Array("RA<8>");
-      
-        specSig["RA9_SPECSIG"]=new Array("RA<9>");
-      
-        specSig["RA11_SPECSIG"]=new Array("RA<11>");
-      
-        specSig["RA10_SPECSIG"]=new Array("RA<10>");
-      
-        specSig["OpTxFX_DC606_SPECSIG"]=new Array("$OpTx$FX_DC$606");
-      
-        specSig["fsbReady1r_SPECSIG"]=new Array("fsb/Ready1r");
-      
-        specSig["fsbVPA__or00001fsbVPA__or00001_D2_SPECSIG"]=new Array("fsb/VPA__or00001/fsb/VPA__or00001_D2");
-      
-        specSig["fsbReady2r_SPECSIG"]=new Array("fsb/Ready2r");
-      
-        specSig["fsbVPA_SPECSIG"]=new Array("fsb/VPA");
-      
-        specSig["OpTxFX_DC602_SPECSIG"]=new Array("$OpTx$FX_DC$602");
-      
-        specSig["csnOverlay1_SPECSIG"]=new Array("cs/nOverlay1");
-      
-        specSig["fsbASrf_SPECSIG"]=new Array("fsb/ASrf");
-      
-        specSig["fsbBERR0r_SPECSIG"]=new Array("fsb/BERR0r");
-      
-        specSig["fsbReady0r_SPECSIG"]=new Array("fsb/Ready0r");
-      
-        specSig["iobsIOReady_SPECSIG"]=new Array("iobs/IOReady");
-      
-        specSig["ramRAMReady_SPECSIG"]=new Array("ram/RAMReady");
-      
-        specSig["iobmVPArr_SPECSIG"]=new Array("iobm/VPArr");
-      
-        specSig["iobmVPArf_SPECSIG"]=new Array("iobm/VPArf");
-      
-        specSig["iobmRESrr_SPECSIG"]=new Array("iobm/RESrr");
-      
-        specSig["iobmRESrf_SPECSIG"]=new Array("iobm/RESrf");
-      
-        specSig["cntRefCnt2_SPECSIG"]=new Array("cnt/RefCnt<2>");
-      
-        specSig["cntRefDone_SPECSIG"]=new Array("cnt/RefDone");
-      
-        specSig["cntTimeoutBPre_SPECSIG"]=new Array("cnt/TimeoutBPre");
-      
-        specSig["cntRefCnt0_SPECSIG"]=new Array("cnt/RefCnt<0>");
-      
-        specSig["cntRefCnt4_SPECSIG"]=new Array("cnt/RefCnt<4>");
-      
-        specSig["cntRefCnt5_SPECSIG"]=new Array("cnt/RefCnt<5>");
-      
-        specSig["cntRefCnt6_SPECSIG"]=new Array("cnt/RefCnt<6>");
-      
-        specSig["cntRefCnt7_SPECSIG"]=new Array("cnt/RefCnt<7>");
-      
-        specSig["iobmIOS_FSM_FFd3_SPECSIG"]=new Array("iobm/IOS_FSM_FFd3");
-      
-        specSig["iobmIOS_FSM_FFd6_SPECSIG"]=new Array("iobm/IOS_FSM_FFd6");
-      
-        specSig["iobmIOS_FSM_FFd7_SPECSIG"]=new Array("iobm/IOS_FSM_FFd7");
-      
-        specSig["iobsIOACTr_SPECSIG"]=new Array("iobs/IOACTr");
-      
-        specSig["iobsOnce_SPECSIG"]=new Array("iobs/Once");
-      
-        specSig["iobsClear1_SPECSIG"]=new Array("iobs/Clear1");
-      
-        specSig["ramBACTr_SPECSIG"]=new Array("ram/BACTr");
-      
-        specSig["iobmES0_SPECSIG"]=new Array("iobm/ES<0>");
-      
-        specSig["iobmES1_SPECSIG"]=new Array("iobm/ES<1>");
-      
-        specSig["iobmES2_SPECSIG"]=new Array("iobm/ES<2>");
-      
-        specSig["iobmES3_SPECSIG"]=new Array("iobm/ES<3>");
-      
-        specSig["iobmES4_SPECSIG"]=new Array("iobm/ES<4>");
-      
-        specSig["iobsLoad1_SPECSIG"]=new Array("iobs/Load1");
-      
-        specSig["ramRAMDIS1_SPECSIG"]=new Array("ram/RAMDIS1");
-      
-        specSig["ramRAMDIS2_SPECSIG"]=new Array("ram/RAMDIS2");
-      
-        specSig["ramRASEL_SPECSIG"]=new Array("ram/RASEL");
-      
-        specSig["csnOverlay0_SPECSIG"]=new Array("cs/nOverlay0");
-      
-        specSig["ramOnce_SPECSIG"]=new Array("ram/Once");
-      
-        specSig["ramRS_FSM_FFd1_SPECSIG"]=new Array("ram/RS_FSM_FFd1");
-      
-        specSig["ramRS_FSM_FFd2_SPECSIG"]=new Array("ram/RS_FSM_FFd2");
-      
-        specSig["ramRS_FSM_FFd3_SPECSIG"]=new Array("ram/RS_FSM_FFd3");
-      
-        specSig["iobmBERRrr_SPECSIG"]=new Array("iobm/BERRrr");
-      
-        specSig["iobmDTACKrf_SPECSIG"]=new Array("iobm/DTACKrf");
-      
-        specSig["iobmDTACKrr_SPECSIG"]=new Array("iobm/DTACKrr");
-      
-        specSig["iobmIOS_FSM_FFd1_SPECSIG"]=new Array("iobm/IOS_FSM_FFd1");
-      
-        specSig["iobmEr2_SPECSIG"]=new Array("iobm/Er2");
-      
-        specSig["iobsIOU1_SPECSIG"]=new Array("iobs/IOU1");
-      
-        specSig["iobsIOL1_SPECSIG"]=new Array("iobs/IOL1");
-      
-        specSig["iobmEr_SPECSIG"]=new Array("iobm/Er");
-      
-            pterms["FB1_1_1"]=new Array("A_FSB23_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","nDTACK_FSB");
-          
-            pterms["FB1_1_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","nDTACK_FSB","/ramRAMReady_SPECSIG");
-          
-            pterms["FB1_1_3"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","nDTACK_FSB");
-          
-            pterms["FB1_1_4"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","nDTACK_FSB","/ramRAMReady_SPECSIG");
-          
-            pterms["FB1_1_5"]=new Array("A_FSB14_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","nDTACK_FSB");
-          
-            pterms["FB1_2_1"]=new Array("BERR_IOBS","nDTACK_FSB");
-          
-            pterms["FB1_2_2"]=new Array("fsbBERR0r_SPECSIG","nDTACK_FSB");
-          
-            pterms["FB1_2_3"]=new Array("fsbBERR1r_SPECSIG","nDTACK_FSB");
-          
-            pterms["FB1_2_4"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
-          
-            pterms["FB1_2_5"]=new Array("nDTACK_FSB","/OpTxFX_DC602_SPECSIG");
-          
-            pterms["FB1_3_1"]=new Array("A_FSB13_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","nDTACK_FSB");
-          
-            pterms["FB1_3_2"]=new Array("A_FSB14_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","nDTACK_FSB","/nADoutLE1");
-          
-            pterms["FB1_3_3"]=new Array("A_FSB13_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","nDTACK_FSB","/nADoutLE1");
-          
-            pterms["FB1_3_4"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG","nDTACK_FSB");
-          
-            pterms["FB1_3_5"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG","nDTACK_FSB");
-          
-            pterms["FB1_4_1"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG");
-          
-            pterms["FB1_4_2"]=new Array("A_FSB13_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB");
-          
-            pterms["FB1_4_3"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG","nDTACK_FSB");
-          
-            pterms["FB1_4_4"]=new Array("A_FSB9_SPECSIG","A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/BERR_IOBS","/fsbBERR0r_SPECSIG","/fsbBERR1r_SPECSIG","fsbReady1r_SPECSIG","OpTxFX_DC602_SPECSIG");
-          
-            pterms["FB1_4_5"]=new Array("A_FSB9_SPECSIG","A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/BERR_IOBS","/fsbBERR0r_SPECSIG","/fsbBERR1r_SPECSIG","iobsIOReady_SPECSIG","OpTxFX_DC602_SPECSIG");
-          
-            pterms["FB1_5_1"]=new Array("A_FSB14_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB");
-          
-            pterms["FB1_5_2"]=new Array("A_FSB14_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/nADoutLE1");
-          
-            pterms["FB1_5_3"]=new Array("A_FSB13_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/nADoutLE1");
-          
-            pterms["FB1_6_1"]=new Array("nAS_FSB");
-          
-            pterms["FB1_6_2"]=new Array("/BERR_IOBS","/TimeoutB","/fsbBERR0r_SPECSIG","/fsbBERR1r_SPECSIG");
-          
-            pterms["FB1_6_3"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","/BERR_IOBS","/fsbBERR0r_SPECSIG","/fsbBERR1r_SPECSIG");
-          
-            pterms["FB1_6_4"]=new Array("A_FSB14_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","/nADoutLE1");
-          
-            pterms["FB1_6_5"]=new Array("A_FSB13_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","/nADoutLE1");
-          
-            pterms["FB1_7_1"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
-          
-            pterms["FB1_7_2"]=new Array("A_FSB23_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG");
-          
-            pterms["FB1_7_3"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG");
-          
-            pterms["FB1_7_4"]=new Array("A_FSB14_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG");
-          
-            pterms["FB1_7_5"]=new Array("A_FSB13_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG");
-          
-            pterms["FB1_9_1"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
-          
-            pterms["FB1_9_2"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
-          
-            pterms["FB1_9_3"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
-          
-            pterms["FB1_10_1"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
-          
-            pterms["FB1_10_2"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
-          
-            pterms["FB1_10_3"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
-          
-            pterms["FB1_10_4"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
-          
-            pterms["FB1_10_5"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
-          
-            pterms["FB1_11_1"]=new Array("nWE_FSB","/nAS_FSB");
-          
-            pterms["FB1_11_2"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
-          
-            pterms["FB1_11_3"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
-          
-            pterms["FB1_11_4"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
-          
-            pterms["FB1_11_5"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
-          
-            pterms["FB1_12_1"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
-          
-            pterms["FB1_12_2"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
-          
-            pterms["FB1_12_3"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
-          
-            pterms["FB1_12_4"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
-          
-            pterms["FB1_12_5"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
-          
-            pterms["FB1_13_1"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","fsbVPA_SPECSIG","fsbASrf_SPECSIG","/ramRAMReady_SPECSIG");
-          
-            pterms["FB1_13_2"]=new Array("A_FSB9_SPECSIG","A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/BERR_IOBS","/fsbBERR0r_SPECSIG","/fsbBERR1r_SPECSIG","fsbReady1r_SPECSIG","/nAS_FSB","/fsbVPA__or00001fsbVPA__or00001_D2_SPECSIG","OpTxFX_DC602_SPECSIG");
-          
-            pterms["FB1_13_3"]=new Array("A_FSB9_SPECSIG","A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/BERR_IOBS","/fsbBERR0r_SPECSIG","/fsbBERR1r_SPECSIG","fsbReady1r_SPECSIG","fsbASrf_SPECSIG","/fsbVPA__or00001fsbVPA__or00001_D2_SPECSIG","OpTxFX_DC602_SPECSIG");
-          
-            pterms["FB1_13_4"]=new Array("A_FSB9_SPECSIG","A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/BERR_IOBS","/fsbBERR0r_SPECSIG","/fsbBERR1r_SPECSIG","iobsIOReady_SPECSIG","/nAS_FSB","/fsbVPA__or00001fsbVPA__or00001_D2_SPECSIG","OpTxFX_DC602_SPECSIG");
-          
-            pterms["FB1_13_5"]=new Array("A_FSB9_SPECSIG","A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/BERR_IOBS","/fsbBERR0r_SPECSIG","/fsbBERR1r_SPECSIG","/nAS_FSB","/fsbVPA__or00001fsbVPA__or00001_D2_SPECSIG","OpTxFX_DC602_SPECSIG","/OpTxFX_DC606_SPECSIG");
-          
-            pterms["FB1_14_1"]=new Array("BERR_IOBS","fsbVPA_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB1_14_2"]=new Array("fsbBERR0r_SPECSIG","fsbVPA_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB1_14_3"]=new Array("fsbBERR1r_SPECSIG","fsbVPA_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB1_14_4"]=new Array("fsbVPA_SPECSIG","fsbASrf_SPECSIG","fsbVPA__or00001fsbVPA__or00001_D2_SPECSIG");
-          
-            pterms["FB1_14_5"]=new Array("fsbVPA_SPECSIG","fsbASrf_SPECSIG","/OpTxFX_DC602_SPECSIG");
-          
-            pterms["FB1_15_1"]=new Array("BERR_IOBS","fsbVPA_SPECSIG","/nAS_FSB");
-          
-            pterms["FB1_15_2"]=new Array("fsbBERR0r_SPECSIG","fsbVPA_SPECSIG","/nAS_FSB");
-          
-            pterms["FB1_15_3"]=new Array("fsbBERR1r_SPECSIG","fsbVPA_SPECSIG","/nAS_FSB");
-          
-            pterms["FB1_15_4"]=new Array("fsbVPA_SPECSIG","/nAS_FSB","fsbVPA__or00001fsbVPA__or00001_D2_SPECSIG");
-          
-            pterms["FB1_15_5"]=new Array("fsbVPA_SPECSIG","/nAS_FSB","/OpTxFX_DC602_SPECSIG");
-          
-            pterms["FB1_16_1"]=new Array("/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","/nAS_FSB","OpTxFX_DC606_SPECSIG");
-          
-            pterms["FB1_16_2"]=new Array("/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","fsbASrf_SPECSIG","OpTxFX_DC606_SPECSIG");
-          
-            pterms["FB1_16_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","fsbVPA_SPECSIG","/nAS_FSB","/ramRAMReady_SPECSIG");
-          
-            pterms["FB1_16_4"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","fsbVPA_SPECSIG","fsbASrf_SPECSIG","/ramRAMReady_SPECSIG");
-          
-            pterms["FB1_16_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","fsbVPA_SPECSIG","/nAS_FSB","/ramRAMReady_SPECSIG");
-          
-            pterms["FB1_17_1"]=new Array("/TimeoutB");
-          
-            pterms["FB1_17_2"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG");
-          
-            pterms["FB1_17_3"]=new Array("A_FSB9_SPECSIG","A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/BERR_IOBS","/fsbBERR0r_SPECSIG","/fsbBERR1r_SPECSIG","iobsIOReady_SPECSIG","fsbASrf_SPECSIG","/fsbVPA__or00001fsbVPA__or00001_D2_SPECSIG","OpTxFX_DC602_SPECSIG");
-          
-            pterms["FB1_17_4"]=new Array("A_FSB9_SPECSIG","A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/BERR_IOBS","/fsbBERR0r_SPECSIG","/fsbBERR1r_SPECSIG","fsbASrf_SPECSIG","/fsbVPA__or00001fsbVPA__or00001_D2_SPECSIG","OpTxFX_DC602_SPECSIG","/OpTxFX_DC606_SPECSIG");
-          
-            pterms["FB1_18_1"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG","nDTACK_FSB");
-          
-            pterms["FB1_18_2"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG","nDTACK_FSB");
-          
-            pterms["FB1_18_3"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG","nDTACK_FSB");
-          
-            pterms["FB1_18_4"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG","nDTACK_FSB");
-          
-            pterms["FB1_18_5"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG","nDTACK_FSB");
-          
-            pterms["FB2_1_1"]=new Array("/nVPA_IOB");
-          
-            pterms["FB2_2_1"]=new Array("/nVPA_IOB");
-          
-            pterms["FB2_3_1"]=new Array("/nRES");
-          
-            pterms["FB2_4_1"]=new Array("/nRES");
-          
-            pterms["FB2_5_1"]=new Array("IOREQ");
-          
-            pterms["FB2_6_1"]=new Array("cntRefCnt0_SPECSIG","cntRefCnt1_SPECSIG","cntRefCnt2_SPECSIG");
-          
-            pterms["FB2_7_1"]=new Array("cntRefCnt0_SPECSIG","cntRefCnt1_SPECSIG");
-          
-            pterms["FB2_8_1"]=new Array("cntRefCnt0_SPECSIG");
-          
-            pterms["FB2_9_1"]=new Array("/BERR_IOBS","/fsbBERR1r_SPECSIG");
-          
-            pterms["FB2_9_2"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
-          
-            pterms["FB2_10_1"]=new Array("/cntRefDone_SPECSIG","/RefAck");
-          
-            pterms["FB2_10_2"]=new Array("/cntRefCnt0_SPECSIG","/cntRefCnt5_SPECSIG","/cntRefCnt6_SPECSIG","/cntRefCnt1_SPECSIG","/cntRefCnt2_SPECSIG","/cntRefCnt3_SPECSIG","/cntRefCnt4_SPECSIG","/cntRefCnt7_SPECSIG");
-          
-            pterms["FB2_11_1"]=new Array("/IOL0");
-          
-            pterms["FB2_11_2"]=new Array("IORW0","/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd5_SPECSIG");
-          
-            pterms["FB2_11_3"]=new Array("/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd5_SPECSIG","/iobmIOS_FSM_FFd6_SPECSIG","/iobmIOS_FSM_FFd7_SPECSIG");
-          
-            pterms["FB2_12_1"]=new Array("/IOU0");
-          
-            pterms["FB2_12_2"]=new Array("IORW0","/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd5_SPECSIG");
-          
-            pterms["FB2_12_3"]=new Array("/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd5_SPECSIG","/iobmIOS_FSM_FFd6_SPECSIG","/iobmIOS_FSM_FFd7_SPECSIG");
-          
-            pterms["FB2_13_1"]=new Array("cntTimeoutBPre_SPECSIG","nAS_FSB","/fsbASrf_SPECSIG");
-          
-            pterms["FB2_13_2"]=new Array("/cntTimeoutBPre_SPECSIG","/nAS_FSB","/cntRefCnt0_SPECSIG","/cntRefCnt5_SPECSIG","/cntRefCnt6_SPECSIG","/cntRefCnt1_SPECSIG","/cntRefCnt2_SPECSIG","/cntRefCnt3_SPECSIG","/cntRefCnt4_SPECSIG","/cntRefCnt7_SPECSIG");
-          
-            pterms["FB2_13_3"]=new Array("/cntTimeoutBPre_SPECSIG","/cntRefCnt0_SPECSIG","/cntRefCnt5_SPECSIG","/cntRefCnt6_SPECSIG","/cntRefCnt1_SPECSIG","/cntRefCnt2_SPECSIG","/cntRefCnt3_SPECSIG","/cntRefCnt4_SPECSIG","/cntRefCnt7_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB2_14_1"]=new Array("/IORW0");
-          
-            pterms["FB2_14_2"]=new Array("/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd5_SPECSIG","/iobmIOS_FSM_FFd6_SPECSIG","/iobmIOS_FSM_FFd7_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG");
-          
-            pterms["FB2_15_1"]=new Array("TimeoutB","nAS_FSB","/fsbASrf_SPECSIG");
-          
-            pterms["FB2_15_2"]=new Array("/TimeoutB","cntTimeoutBPre_SPECSIG","/nAS_FSB","/cntRefCnt0_SPECSIG","/cntRefCnt5_SPECSIG","/cntRefCnt6_SPECSIG","/cntRefCnt1_SPECSIG","/cntRefCnt2_SPECSIG","/cntRefCnt3_SPECSIG","/cntRefCnt4_SPECSIG","/cntRefCnt7_SPECSIG");
-          
-            pterms["FB2_15_3"]=new Array("/TimeoutB","cntTimeoutBPre_SPECSIG","/cntRefCnt0_SPECSIG","/cntRefCnt5_SPECSIG","/cntRefCnt6_SPECSIG","/cntRefCnt1_SPECSIG","/cntRefCnt2_SPECSIG","/cntRefCnt3_SPECSIG","/cntRefCnt4_SPECSIG","/cntRefCnt7_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB2_16_1"]=new Array("TimeoutA","nAS_FSB","/fsbASrf_SPECSIG");
-          
-            pterms["FB2_16_2"]=new Array("/TimeoutA","/nAS_FSB","/cntRefCnt0_SPECSIG","/cntRefCnt5_SPECSIG","/cntRefCnt6_SPECSIG","/cntRefCnt1_SPECSIG","/cntRefCnt2_SPECSIG","/cntRefCnt3_SPECSIG","/cntRefCnt4_SPECSIG");
-          
-            pterms["FB2_16_3"]=new Array("/TimeoutA","/cntRefCnt0_SPECSIG","/cntRefCnt5_SPECSIG","/cntRefCnt6_SPECSIG","/cntRefCnt1_SPECSIG","/cntRefCnt2_SPECSIG","/cntRefCnt3_SPECSIG","/cntRefCnt4_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB2_17_1"]=new Array("/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd5_SPECSIG","/iobmIOS_FSM_FFd6_SPECSIG","/iobmIOS_FSM_FFd7_SPECSIG");
-          
-            pterms["FB2_18_1"]=new Array("iobsIOReady_SPECSIG","nAS_FSB","/fsbASrf_SPECSIG");
-          
-            pterms["FB2_18_2"]=new Array("iobsOnce_SPECSIG","IOBERR","iobsIOReady_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","nADoutLE1");
-          
-            pterms["FB2_18_3"]=new Array("iobsOnce_SPECSIG","/IOBERR","/iobsIOReady_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","nADoutLE1");
-          
-            pterms["FB2_18_4"]=new Array("iobsOnce_SPECSIG","/IOBERR","/iobsIOReady_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_1_1"]=new Array("A_FSB14_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/iobsOnce_SPECSIG","IORW0","/nWE_FSB","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_1_2"]=new Array("A_FSB14_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/iobsOnce_SPECSIG","IORW0","/nWE_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_1_3"]=new Array("A_FSB13_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/iobsOnce_SPECSIG","IORW0","/nWE_FSB","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_1_4"]=new Array("A_FSB13_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/iobsOnce_SPECSIG","IORW0","/nWE_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_2_1"]=new Array("A_FSB23_SPECSIG","/iobsOnce_SPECSIG","/IORW0","nWE_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_2_2"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","/iobsOnce_SPECSIG","IORW0","/nWE_FSB","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_2_3"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","/iobsOnce_SPECSIG","IORW0","/nWE_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_2_4"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","/iobsOnce_SPECSIG","/IORW0","nWE_FSB","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_2_5"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","/iobsOnce_SPECSIG","/IORW0","nWE_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_3_1"]=new Array("IORW0","/iobsIORW1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","/nADoutLE1");
-          
-            pterms["FB3_3_2"]=new Array("/IORW0","iobsIORW1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","/nADoutLE1");
-          
-            pterms["FB3_3_3"]=new Array("A_FSB23_SPECSIG","/iobsOnce_SPECSIG","IORW0","/nWE_FSB","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_3_4"]=new Array("A_FSB23_SPECSIG","/iobsOnce_SPECSIG","IORW0","/nWE_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_3_5"]=new Array("A_FSB23_SPECSIG","/iobsOnce_SPECSIG","/IORW0","nWE_FSB","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_4_1"]=new Array("IOACT");
-          
-            pterms["FB3_4_2"]=new Array("A_FSB14_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/iobsOnce_SPECSIG","IORW0","/nWE_FSB","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_4_3"]=new Array("A_FSB14_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/iobsOnce_SPECSIG","IORW0","/nWE_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_4_4"]=new Array("A_FSB13_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/iobsOnce_SPECSIG","IORW0","/nWE_FSB","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_4_5"]=new Array("A_FSB13_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/iobsOnce_SPECSIG","IORW0","/nWE_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_5_1"]=new Array("RefAck");
-          
-            pterms["FB3_5_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramRAMDIS2_SPECSIG","/nAS_FSB","/ramRAMDIS1_SPECSIG");
-          
-            pterms["FB3_5_3"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/ramRAMDIS2_SPECSIG","/nAS_FSB","/ramRAMDIS1_SPECSIG");
-          
-            pterms["FB3_6_1"]=new Array("iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","/nADoutLE1");
-          
-            pterms["FB3_7_1"]=new Array("/nAS_FSB");
-          
-            pterms["FB3_8_1"]=new Array("iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
-          
-            pterms["FB3_8_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_8_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_8_4"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB19_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_8_5"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","nWE_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_9_1"]=new Array("iobsPS_FSM_FFd2_SPECSIG","iobsPS_FSM_FFd1_SPECSIG","iobsIOACTr_SPECSIG");
-          
-            pterms["FB3_9_2"]=new Array("/iobsPS_FSM_FFd2_SPECSIG","iobsPS_FSM_FFd1_SPECSIG","/iobsIOACTr_SPECSIG");
-          
-            pterms["FB3_9_3"]=new Array("iobsOnce_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_9_4"]=new Array("/A_FSB23_SPECSIG","/A_FSB20_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_9_5"]=new Array("nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","/fsbASrf_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_10_1"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB18_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_10_2"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB17_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_10_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB16_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_10_4"]=new Array("/A_FSB14_SPECSIG","/A_FSB13_SPECSIG","/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_10_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","csnOverlay1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_11_1"]=new Array("iobsLoad1_SPECSIG");
-          
-            pterms["FB3_11_2"]=new Array("/iobsClear1_SPECSIG","/nADoutLE1");
-          
-            pterms["FB3_11_3"]=new Array("iobsPS_FSM_FFd2_SPECSIG");
-          
-            pterms["FB3_11_4"]=new Array("iobsPS_FSM_FFd1_SPECSIG","iobsIOACTr_SPECSIG");
-          
-            pterms["FB3_12_1"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_12_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_12_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB19_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_12_4"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB16_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_12_5"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","nWE_FSB","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_13_1"]=new Array("/iobsPS_FSM_FFd2_SPECSIG","iobsPS_FSM_FFd1_SPECSIG");
-          
-            pterms["FB3_13_2"]=new Array("iobsPS_FSM_FFd1_SPECSIG","iobsIOACTr_SPECSIG");
-          
-            pterms["FB3_13_3"]=new Array("iobsOnce_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_13_4"]=new Array("/A_FSB23_SPECSIG","/A_FSB20_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_13_5"]=new Array("nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/fsbASrf_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_14_1"]=new Array("/nVMA_IOB","/iobmES0_SPECSIG","/iobmES1_SPECSIG","/iobmES2_SPECSIG","/iobmES3_SPECSIG","iobmES4_SPECSIG");
-          
-            pterms["FB3_14_2"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB18_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_14_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB17_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_14_4"]=new Array("/A_FSB14_SPECSIG","/A_FSB13_SPECSIG","/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_14_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","csnOverlay1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
-          
-            pterms["FB3_15_1"]=new Array("/nVMA_IOB","/iobmES0_SPECSIG","/iobmES1_SPECSIG","/iobmES2_SPECSIG","/iobmES3_SPECSIG","/iobmES4_SPECSIG");
-          
-            pterms["FB3_15_2"]=new Array("nVMA_IOB","iobmES0_SPECSIG","iobmES1_SPECSIG","iobmES2_SPECSIG","/iobmES3_SPECSIG","/iobmES4_SPECSIG","IOACT","iobmVPArf_SPECSIG","iobmVPArr_SPECSIG");
-          
-            pterms["FB3_15_3"]=new Array("/A_FSB14_SPECSIG","/A_FSB13_SPECSIG","/A_FSB23_SPECSIG","A_FSB21_SPECSIG");
-          
-            pterms["FB3_15_4"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","csnOverlay1_SPECSIG");
-          
-            pterms["FB3_16_1"]=new Array("/nWE_FSB","/iobsIORW1_SPECSIG");
-          
-            pterms["FB3_16_2"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
-          
-            pterms["FB3_16_3"]=new Array("/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
-          
-            pterms["FB3_16_4"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB21_SPECSIG");
-          
-            pterms["FB3_16_5"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG");
-          
-            pterms["FB3_17_1"]=new Array("iobsOnce_SPECSIG");
-          
-            pterms["FB3_17_2"]=new Array("/nADoutLE1");
-          
-            pterms["FB3_17_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB20_SPECSIG");
-          
-            pterms["FB3_17_4"]=new Array("nWE_FSB","iobsIORW1_SPECSIG");
-          
-            pterms["FB3_17_5"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/iobsIORW1_SPECSIG");
-          
-            pterms["FB3_18_1"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
-          
-            pterms["FB3_18_2"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB19_SPECSIG");
-          
-            pterms["FB3_18_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB18_SPECSIG");
-          
-            pterms["FB3_18_4"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB17_SPECSIG");
-          
-            pterms["FB3_18_5"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB16_SPECSIG");
-          
-            pterms["FB4_1_1"]=new Array("/ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd3_SPECSIG");
-          
-            pterms["FB4_1_2"]=new Array("ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
-          
-            pterms["FB4_1_3"]=new Array("A_FSB23_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
-          
-            pterms["FB4_1_4"]=new Array("A_FSB23_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB4_1_5"]=new Array("A_FSB23_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
-          
-            pterms["FB4_2_1"]=new Array("A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB4_2_2"]=new Array("/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
-          
-            pterms["FB4_2_3"]=new Array("/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB4_2_4"]=new Array("/cntRefDone_SPECSIG","nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG","/fsbASrf_SPECSIG");
-          
-            pterms["FB4_2_5"]=new Array("/cntRefDone_SPECSIG","nAS_FSB","ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG","/fsbASrf_SPECSIG");
-          
-            pterms["FB4_3_1"]=new Array("csnOverlay0_SPECSIG");
-          
-            pterms["FB4_3_2"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
-          
-            pterms["FB4_3_3"]=new Array("A_FSB10_SPECSIG","/ramRASEL_SPECSIG");
-          
-            pterms["FB4_3_4"]=new Array("ramRASEL_SPECSIG","A_FSB1_SPECSIG");
-          
-            pterms["FB4_5_1"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB21_SPECSIG");
-          
-            pterms["FB4_5_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG");
-          
-            pterms["FB4_5_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB19_SPECSIG");
-          
-            pterms["FB4_5_4"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","nWE_FSB");
-          
-            pterms["FB4_6_1"]=new Array("iobsOnce_SPECSIG");
-          
-            pterms["FB4_6_2"]=new Array("/nADoutLE1");
-          
-            pterms["FB4_6_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB20_SPECSIG");
-          
-            pterms["FB4_6_4"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
-          
-            pterms["FB4_6_5"]=new Array("/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
-          
-            pterms["FB4_7_1"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB18_SPECSIG");
-          
-            pterms["FB4_7_2"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB17_SPECSIG");
-          
-            pterms["FB4_7_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB16_SPECSIG");
-          
-            pterms["FB4_7_4"]=new Array("/A_FSB14_SPECSIG","/A_FSB13_SPECSIG","/A_FSB23_SPECSIG","A_FSB21_SPECSIG");
-          
-            pterms["FB4_7_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","csnOverlay1_SPECSIG");
-          
-            pterms["FB4_8_1"]=new Array("A_FSB12_SPECSIG","/ramRASEL_SPECSIG");
-          
-            pterms["FB4_8_2"]=new Array("ramRASEL_SPECSIG","A_FSB3_SPECSIG");
-          
-            pterms["FB4_8_3"]=new Array("/A_FSB14_SPECSIG","/A_FSB13_SPECSIG","/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/iobsOnce_SPECSIG");
-          
-            pterms["FB4_8_4"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","csnOverlay1_SPECSIG","/iobsOnce_SPECSIG");
-          
-            pterms["FB4_9_1"]=new Array("A_FSB23_SPECSIG","/iobsOnce_SPECSIG","iobsPS_FSM_FFd1_SPECSIG");
-          
-            pterms["FB4_9_2"]=new Array("/iobsOnce_SPECSIG","iobsPS_FSM_FFd2_SPECSIG","/nADoutLE1");
-          
-            pterms["FB4_9_3"]=new Array("/iobsOnce_SPECSIG","iobsPS_FSM_FFd1_SPECSIG","/nADoutLE1");
-          
-            pterms["FB4_9_4"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/iobsOnce_SPECSIG");
-          
-            pterms["FB4_9_5"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/iobsOnce_SPECSIG");
-          
-            pterms["FB4_10_1"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
-          
-            pterms["FB4_10_2"]=new Array("A_FSB23_SPECSIG","/iobsOnce_SPECSIG","iobsPS_FSM_FFd2_SPECSIG");
-          
-            pterms["FB4_10_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB20_SPECSIG","/iobsOnce_SPECSIG");
-          
-            pterms["FB4_10_4"]=new Array("A_FSB22_SPECSIG","/iobsOnce_SPECSIG","iobsPS_FSM_FFd2_SPECSIG");
-          
-            pterms["FB4_10_5"]=new Array("A_FSB22_SPECSIG","/iobsOnce_SPECSIG","iobsPS_FSM_FFd1_SPECSIG");
-          
-            pterms["FB4_11_1"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB19_SPECSIG","/iobsOnce_SPECSIG");
-          
-            pterms["FB4_11_2"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB18_SPECSIG","/iobsOnce_SPECSIG");
-          
-            pterms["FB4_11_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB17_SPECSIG","/iobsOnce_SPECSIG");
-          
-            pterms["FB4_11_4"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB16_SPECSIG","/iobsOnce_SPECSIG");
-          
-            pterms["FB4_11_5"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/iobsOnce_SPECSIG","nWE_FSB");
-          
-            pterms["FB4_12_1"]=new Array("A_FSB14_SPECSIG","/ramRASEL_SPECSIG");
-          
-            pterms["FB4_12_2"]=new Array("ramRASEL_SPECSIG","A_FSB5_SPECSIG");
-          
-            pterms["FB4_12_3"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
-          
-            pterms["FB4_12_4"]=new Array("A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
-          
-            pterms["FB4_12_5"]=new Array("/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
-          
-            pterms["FB4_13_1"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
-          
-            pterms["FB4_13_2"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB4_13_3"]=new Array("A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
-          
-            pterms["FB4_13_4"]=new Array("A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB4_13_5"]=new Array("/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
-          
-            pterms["FB4_14_1"]=new Array("ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG");
-          
-            pterms["FB4_14_2"]=new Array("/ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd3_SPECSIG");
-          
-            pterms["FB4_14_3"]=new Array("/ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
-          
-            pterms["FB4_14_4"]=new Array("A_FSB23_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
-          
-            pterms["FB4_14_5"]=new Array("A_FSB23_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB4_15_1"]=new Array("A_FSB23_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
-          
-            pterms["FB4_15_2"]=new Array("/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB4_15_3"]=new Array("ramOnce_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
-          
-            pterms["FB4_15_4"]=new Array("/cntRefDone_SPECSIG","ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
-          
-            pterms["FB4_15_5"]=new Array("/cntRefDone_SPECSIG","nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG","/fsbASrf_SPECSIG");
-          
-            pterms["FB4_16_1"]=new Array("/TimeoutB","/fsbBERR0r_SPECSIG");
-          
-            pterms["FB4_16_2"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
-          
-            pterms["FB4_16_3"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","/fsbBERR0r_SPECSIG");
-          
-            pterms["FB4_16_4"]=new Array("A_FSB23_SPECSIG","nWE_FSB","/nAS_FSB");
-          
-            pterms["FB4_16_5"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","nWE_FSB","/nAS_FSB");
-          
-            pterms["FB4_17_1"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG");
-          
-            pterms["FB4_17_2"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB4_17_3"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
-          
-            pterms["FB4_17_4"]=new Array("A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
-          
-            pterms["FB4_17_5"]=new Array("/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
-          
-            pterms["FB4_18_1"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG");
-          
-            pterms["FB4_18_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB4_18_3"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
-          
-            pterms["FB4_18_4"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB4_18_5"]=new Array("A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
-          
-            pterms["FB5_1_1"]=new Array("/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd5_SPECSIG","/iobmIOS_FSM_FFd6_SPECSIG","/iobmIOS_FSM_FFd7_SPECSIG","/iobmIOREQr_SPECSIG");
-          
-            pterms["FB5_1_2"]=new Array("/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd5_SPECSIG","/iobmIOS_FSM_FFd6_SPECSIG","/iobmIOS_FSM_FFd7_SPECSIG","/iobmIOS_FSM_FFd8_SPECSIG");
-          
-            pterms["FB5_1_3"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd5_SPECSIG","/iobmIOS_FSM_FFd6_SPECSIG","CLK_IOB","/iobmIOS_FSM_FFd7_SPECSIG","iobmETACK_SPECSIG","/iobmIOREQr_SPECSIG");
-          
-            pterms["FB5_1_4"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd5_SPECSIG","/iobmIOS_FSM_FFd6_SPECSIG","CLK_IOB","/iobmIOS_FSM_FFd7_SPECSIG","iobmETACK_SPECSIG","/iobmIOS_FSM_FFd8_SPECSIG");
-          
-            pterms["FB5_1_5"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd5_SPECSIG","/iobmIOS_FSM_FFd6_SPECSIG","CLK_IOB","/iobmIOS_FSM_FFd7_SPECSIG","/iobmIOREQr_SPECSIG","iobmBERRrf_SPECSIG","iobmBERRrr_SPECSIG");
-          
-            pterms["FB5_2_1"]=new Array("A_FSB11_SPECSIG","/ramRASEL_SPECSIG");
-          
-            pterms["FB5_2_2"]=new Array("ramRASEL_SPECSIG","A_FSB2_SPECSIG");
-          
-            pterms["FB5_2_3"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd5_SPECSIG","/iobmIOS_FSM_FFd6_SPECSIG","CLK_IOB","/iobmIOS_FSM_FFd7_SPECSIG","/iobmIOS_FSM_FFd8_SPECSIG","iobmBERRrf_SPECSIG","iobmBERRrr_SPECSIG");
-          
-            pterms["FB5_2_4"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd5_SPECSIG","/iobmIOS_FSM_FFd6_SPECSIG","CLK_IOB","/iobmIOS_FSM_FFd7_SPECSIG","/iobmIOS_FSM_FFd8_SPECSIG","iobmDTACKrf_SPECSIG","iobmDTACKrr_SPECSIG");
-          
-            pterms["FB5_2_5"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd5_SPECSIG","/iobmIOS_FSM_FFd6_SPECSIG","CLK_IOB","/iobmIOS_FSM_FFd7_SPECSIG","/iobmIOS_FSM_FFd8_SPECSIG","iobmRESrf_SPECSIG","iobmRESrr_SPECSIG");
-          
-            pterms["FB5_3_1"]=new Array("/CLK_IOB","iobmIOREQr_SPECSIG","iobmIOS_FSM_FFd8_SPECSIG");
-          
-            pterms["FB5_4_1"]=new Array("iobmIOS_FSM_FFd7_SPECSIG");
-          
-            pterms["FB5_5_1"]=new Array("iobmIOS_FSM_FFd6_SPECSIG");
-          
-            pterms["FB5_6_1"]=new Array("iobmIOS_FSM_FFd5_SPECSIG");
-          
-            pterms["FB5_7_1"]=new Array("/nBERR_IOB");
-          
-            pterms["FB5_8_1"]=new Array("A_FSB13_SPECSIG","/ramRASEL_SPECSIG");
-          
-            pterms["FB5_8_2"]=new Array("ramRASEL_SPECSIG","A_FSB4_SPECSIG");
-          
-            pterms["FB5_9_1"]=new Array("/nBERR_IOB");
-          
-            pterms["FB5_11_1"]=new Array("/iobmIOS_FSM_FFd8_SPECSIG","/iobmIOS_FSM_FFd1_SPECSIG");
-          
-            pterms["FB5_11_2"]=new Array("/CLK_IOB","iobmIOREQr_SPECSIG","/iobmIOS_FSM_FFd1_SPECSIG");
-          
-            pterms["FB5_12_1"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/A_FSB20_SPECSIG");
-          
-            pterms["FB5_12_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB21_SPECSIG","/A_FSB20_SPECSIG","/csnOverlay1_SPECSIG");
-          
-            pterms["FB5_13_1"]=new Array("/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd5_SPECSIG","/iobmIOS_FSM_FFd6_SPECSIG","/iobmIOS_FSM_FFd7_SPECSIG","/iobmIOREQr_SPECSIG");
-          
-            pterms["FB5_13_2"]=new Array("/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd5_SPECSIG","/iobmIOS_FSM_FFd6_SPECSIG","/iobmIOS_FSM_FFd7_SPECSIG","/iobmIOS_FSM_FFd8_SPECSIG");
-          
-            pterms["FB5_14_1"]=new Array("iobmIOS_FSM_FFd3_SPECSIG","CLK_IOB","iobmETACK_SPECSIG");
-          
-            pterms["FB5_14_2"]=new Array("iobmIOS_FSM_FFd3_SPECSIG","CLK_IOB","iobmBERRrf_SPECSIG","iobmBERRrr_SPECSIG");
-          
-            pterms["FB5_14_3"]=new Array("iobmIOS_FSM_FFd3_SPECSIG","CLK_IOB","iobmDTACKrf_SPECSIG","iobmDTACKrr_SPECSIG");
-          
-            pterms["FB5_14_4"]=new Array("iobmIOS_FSM_FFd3_SPECSIG","CLK_IOB","iobmRESrf_SPECSIG","iobmRESrr_SPECSIG");
-          
-            pterms["FB5_15_1"]=new Array("BERR_IOBS","nAS_FSB","/fsbASrf_SPECSIG");
-          
-            pterms["FB5_15_2"]=new Array("iobsOnce_SPECSIG","BERR_IOBS","/IOBERR","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","nADoutLE1");
-          
-            pterms["FB5_15_3"]=new Array("iobsOnce_SPECSIG","/BERR_IOBS","IOBERR","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","nADoutLE1");
-          
-            pterms["FB5_15_4"]=new Array("iobsOnce_SPECSIG","/BERR_IOBS","IOBERR","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
-          
-            pterms["FB5_16_1"]=new Array("/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd4_SPECSIG");
-          
-            pterms["FB5_16_2"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","CLK_IOB","iobmETACK_SPECSIG");
-          
-            pterms["FB5_16_3"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","CLK_IOB","iobmBERRrf_SPECSIG","iobmBERRrr_SPECSIG");
-          
-            pterms["FB5_16_4"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","CLK_IOB","iobmDTACKrf_SPECSIG","iobmDTACKrr_SPECSIG");
-          
-            pterms["FB5_16_5"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","CLK_IOB","iobmRESrf_SPECSIG","iobmRESrr_SPECSIG");
-          
-            pterms["FB5_17_1"]=new Array("nBERR_IOB","IOBERR","iobmIOS_FSM_FFd3_SPECSIG","CLK_IOB","iobmDTACKrf_SPECSIG","iobmDTACKrr_SPECSIG");
-          
-            pterms["FB5_17_2"]=new Array("nBERR_IOB","IOBERR","iobmIOS_FSM_FFd3_SPECSIG","CLK_IOB","iobmRESrf_SPECSIG","iobmRESrr_SPECSIG");
-          
-            pterms["FB5_17_3"]=new Array("/nBERR_IOB","/IOBERR","iobmIOS_FSM_FFd3_SPECSIG","CLK_IOB","iobmBERRrf_SPECSIG","iobmBERRrr_SPECSIG");
-          
-            pterms["FB5_17_4"]=new Array("/nBERR_IOB","/IOBERR","iobmIOS_FSM_FFd3_SPECSIG","CLK_IOB","iobmDTACKrf_SPECSIG","iobmDTACKrr_SPECSIG");
-          
-            pterms["FB5_17_5"]=new Array("/nBERR_IOB","/IOBERR","iobmIOS_FSM_FFd3_SPECSIG","CLK_IOB","iobmRESrf_SPECSIG","iobmRESrr_SPECSIG");
-          
-            pterms["FB5_18_1"]=new Array("nBERR_IOB","IOBERR","iobmIOS_FSM_FFd3_SPECSIG","CLK_IOB","iobmETACK_SPECSIG");
-          
-            pterms["FB5_18_2"]=new Array("/nBERR_IOB","/IOBERR","iobmIOS_FSM_FFd3_SPECSIG","CLK_IOB","iobmETACK_SPECSIG");
-          
-            pterms["FB5_18_3"]=new Array("nBERR_IOB","IOBERR","iobmIOS_FSM_FFd3_SPECSIG","CLK_IOB","iobmBERRrf_SPECSIG","iobmBERRrr_SPECSIG");
-          
-            pterms["FB5_18_4"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd5_SPECSIG","/iobmIOS_FSM_FFd6_SPECSIG","CLK_IOB","/iobmIOS_FSM_FFd7_SPECSIG","/iobmIOREQr_SPECSIG","iobmDTACKrf_SPECSIG","iobmDTACKrr_SPECSIG");
-          
-            pterms["FB5_18_5"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd5_SPECSIG","/iobmIOS_FSM_FFd6_SPECSIG","CLK_IOB","/iobmIOS_FSM_FFd7_SPECSIG","/iobmIOREQr_SPECSIG","iobmRESrf_SPECSIG","iobmRESrr_SPECSIG");
-          
-            pterms["FB6_1_1"]=new Array("iobmEr_SPECSIG");
-          
-            pterms["FB6_2_1"]=new Array("/ramRASEL_SPECSIG");
-          
-            pterms["FB6_3_1"]=new Array("/nDTACK_IOB");
-          
-            pterms["FB6_4_1"]=new Array("/nDTACK_IOB");
-          
-            pterms["FB6_5_1"]=new Array("ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG");
-          
-            pterms["FB6_6_1"]=new Array("/nWE_FSB","/nLDS_FSB","/ramRAMDIS2_SPECSIG","/nAS_FSB","/ramRAMDIS1_SPECSIG");
-          
-            pterms["FB6_7_1"]=new Array("/nUDS_FSB");
-          
-            pterms["FB6_7_2"]=new Array("iobsLoad1_SPECSIG");
-          
-            pterms["FB6_8_1"]=new Array("/nLDS_FSB");
-          
-            pterms["FB6_8_2"]=new Array("iobsLoad1_SPECSIG");
-          
-            pterms["FB6_9_1"]=new Array("/nWE_FSB","/nUDS_FSB","/ramRAMDIS2_SPECSIG","/nAS_FSB","/ramRAMDIS1_SPECSIG");
-          
-            pterms["FB6_10_1"]=new Array("iobmES3_SPECSIG","/iobmEr_SPECSIG","iobmEr2_SPECSIG");
-          
-            pterms["FB6_10_2"]=new Array("iobmES0_SPECSIG","iobmES1_SPECSIG","iobmES2_SPECSIG","iobmEr_SPECSIG");
-          
-            pterms["FB6_10_3"]=new Array("iobmES0_SPECSIG","iobmES1_SPECSIG","iobmES2_SPECSIG","/iobmEr2_SPECSIG");
-          
-            pterms["FB6_11_1"]=new Array("iobmES0_SPECSIG","iobmES1_SPECSIG");
-          
-            pterms["FB6_11_2"]=new Array("/iobmES0_SPECSIG","/iobmES1_SPECSIG");
-          
-            pterms["FB6_11_3"]=new Array("/iobmEr_SPECSIG","iobmEr2_SPECSIG");
-          
-            pterms["FB6_12_1"]=new Array("/nWE_FSB","/nAS_FSB");
-          
-            pterms["FB6_13_1"]=new Array("iobmES0_SPECSIG","/iobmEr_SPECSIG","iobmEr2_SPECSIG");
-          
-            pterms["FB6_13_2"]=new Array("/iobmES0_SPECSIG","/iobmES1_SPECSIG","/iobmES2_SPECSIG","/iobmES3_SPECSIG","/iobmES4_SPECSIG","iobmEr_SPECSIG");
-          
-            pterms["FB6_13_3"]=new Array("/iobmES0_SPECSIG","/iobmES1_SPECSIG","/iobmES2_SPECSIG","/iobmES3_SPECSIG","/iobmES4_SPECSIG","/iobmEr2_SPECSIG");
-          
-            pterms["FB6_14_1"]=new Array("/nUDS_FSB","nADoutLE1");
-          
-            pterms["FB6_14_2"]=new Array("iobsIOU1_SPECSIG","/nADoutLE1");
-          
-            pterms["FB6_14_3"]=new Array("iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
-          
-            pterms["FB6_15_1"]=new Array("fsbVPA_SPECSIG","/nAS_FSB");
-          
-            pterms["FB6_16_1"]=new Array("/nLDS_FSB","nADoutLE1");
-          
-            pterms["FB6_16_2"]=new Array("iobsIOL1_SPECSIG","/nADoutLE1");
-          
-            pterms["FB6_16_3"]=new Array("iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
-          
-            pterms["FB6_17_1"]=new Array("iobmES4_SPECSIG","/iobmEr_SPECSIG","iobmEr2_SPECSIG");
-          
-            pterms["FB6_17_2"]=new Array("iobmES0_SPECSIG","iobmES1_SPECSIG","iobmES2_SPECSIG","iobmES3_SPECSIG","iobmEr_SPECSIG");
-          
-            pterms["FB6_17_3"]=new Array("iobmES0_SPECSIG","iobmES1_SPECSIG","iobmES2_SPECSIG","iobmES3_SPECSIG","/iobmEr2_SPECSIG");
-          
-            pterms["FB6_17_4"]=new Array("iobmES0_SPECSIG","iobmES1_SPECSIG","/iobmES2_SPECSIG","/iobmES3_SPECSIG","iobmES4_SPECSIG");
-          
-            pterms["FB6_18_1"]=new Array("/iobmES0_SPECSIG","/iobmES2_SPECSIG");
-          
-            pterms["FB6_18_2"]=new Array("/iobmES1_SPECSIG","/iobmES2_SPECSIG");
-          
-            pterms["FB6_18_3"]=new Array("/iobmEr_SPECSIG","iobmEr2_SPECSIG");
-          
-            pterms["FB6_18_4"]=new Array("iobmES0_SPECSIG","iobmES1_SPECSIG","iobmES2_SPECSIG");
-          
-            pterms["FB6_18_5"]=new Array("/iobmES2_SPECSIG","/iobmES3_SPECSIG","iobmES4_SPECSIG");
-          
-            pterms["FB7_1_1"]=new Array("cntRefCnt0_SPECSIG","cntRefCnt1_SPECSIG","cntRefCnt2_SPECSIG","cntRefCnt3_SPECSIG","cntRefCnt4_SPECSIG");
-          
-            pterms["FB7_1_2"]=new Array("/cntRefDone_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
-          
-            pterms["FB7_2_1"]=new Array("A_FSB15_SPECSIG","/ramRASEL_SPECSIG");
-          
-            pterms["FB7_2_2"]=new Array("ramRASEL_SPECSIG","A_FSB6_SPECSIG");
-          
-            pterms["FB7_3_1"]=new Array("cntRefCnt0_SPECSIG","cntRefCnt1_SPECSIG","cntRefCnt2_SPECSIG","cntRefCnt3_SPECSIG");
-          
-            pterms["FB7_4_1"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/A_FSB20_SPECSIG","/csnOverlay0_SPECSIG","/nAS_FSB");
-          
-            pterms["FB7_4_2"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/A_FSB20_SPECSIG","/csnOverlay0_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB7_4_3"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
-          
-            pterms["FB7_4_4"]=new Array("A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
-          
-            pterms["FB7_4_5"]=new Array("nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/fsbASrf_SPECSIG");
-          
-            pterms["FB7_5_1"]=new Array("A_FSB23_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
-          
-            pterms["FB7_5_2"]=new Array("ramOnce_SPECSIG","cntRefDone_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
-          
-            pterms["FB7_5_3"]=new Array("ramOnce_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/cntRefCnt5_SPECSIG");
-          
-            pterms["FB7_5_4"]=new Array("ramOnce_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/cntRefCnt6_SPECSIG");
-          
-            pterms["FB7_5_5"]=new Array("ramOnce_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/cntRefCnt7_SPECSIG");
-          
-            pterms["FB7_6_1"]=new Array("A_FSB16_SPECSIG","/ramRASEL_SPECSIG");
-          
-            pterms["FB7_6_2"]=new Array("ramRASEL_SPECSIG","A_FSB7_SPECSIG");
-          
-            pterms["FB7_6_3"]=new Array("/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
-          
-            pterms["FB7_6_4"]=new Array("/cntRefDone_SPECSIG","/nAS_FSB","ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
-          
-            pterms["FB7_6_5"]=new Array("/cntRefDone_SPECSIG","ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB7_7_1"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
-          
-            pterms["FB7_7_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","/ramRAMReady_SPECSIG");
-          
-            pterms["FB7_7_3"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","/ramRAMReady_SPECSIG");
-          
-            pterms["FB7_8_1"]=new Array("ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd3_SPECSIG");
-          
-            pterms["FB7_8_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
-          
-            pterms["FB7_8_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB7_8_4"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
-          
-            pterms["FB7_8_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB7_9_1"]=new Array("A_FSB8_SPECSIG","ramRASEL_SPECSIG");
-          
-            pterms["FB7_9_2"]=new Array("A_FSB17_SPECSIG","/ramRASEL_SPECSIG");
-          
-            pterms["FB7_9_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB7_9_4"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
-          
-            pterms["FB7_9_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB7_10_1"]=new Array("ramOnce_SPECSIG","nAS_FSB","/fsbASrf_SPECSIG");
-          
-            pterms["FB7_10_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
-          
-            pterms["FB7_10_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","ramOnce_SPECSIG","/cntRefDone_SPECSIG","/ramRAMDIS2_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB7_10_4"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","ramOnce_SPECSIG","/cntRefDone_SPECSIG","/ramRAMDIS2_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
-          
-            pterms["FB7_10_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","ramOnce_SPECSIG","/cntRefDone_SPECSIG","/ramRAMDIS2_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB7_11_1"]=new Array("ramRAMDIS2_SPECSIG","nAS_FSB","/fsbASrf_SPECSIG");
-          
-            pterms["FB7_11_2"]=new Array("ramOnce_SPECSIG","/cntRefDone_SPECSIG","/ramRAMDIS2_SPECSIG","/nAS_FSB","ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
-          
-            pterms["FB7_11_3"]=new Array("ramOnce_SPECSIG","/cntRefDone_SPECSIG","/ramRAMDIS2_SPECSIG","ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB7_11_4"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","ramOnce_SPECSIG","/cntRefDone_SPECSIG","/ramRAMDIS2_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
-          
-            pterms["FB7_11_5"]=new Array("A_FSB9_SPECSIG","ramRASEL_SPECSIG");
-          
-            pterms["FB7_12_1"]=new Array("A_FSB18_SPECSIG","/ramRASEL_SPECSIG");
-          
-            pterms["FB7_12_2"]=new Array("nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/cntRefCnt5_SPECSIG","/fsbASrf_SPECSIG");
-          
-            pterms["FB7_12_3"]=new Array("nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/cntRefCnt6_SPECSIG","/fsbASrf_SPECSIG");
-          
-            pterms["FB7_12_4"]=new Array("nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/cntRefCnt7_SPECSIG","/fsbASrf_SPECSIG");
-          
-            pterms["FB7_12_5"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
-          
-            pterms["FB7_13_1"]=new Array("ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
-          
-            pterms["FB7_13_2"]=new Array("cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
-          
-            pterms["FB7_13_3"]=new Array("/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/cntRefCnt5_SPECSIG","ramBACTr_SPECSIG");
-          
-            pterms["FB7_13_4"]=new Array("/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/cntRefCnt6_SPECSIG","ramBACTr_SPECSIG");
-          
-            pterms["FB7_13_5"]=new Array("/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","ramBACTr_SPECSIG","/cntRefCnt7_SPECSIG");
-          
-            pterms["FB7_14_1"]=new Array("cntRefCnt0_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt1_SPECSIG","cntRefCnt2_SPECSIG","cntRefCnt3_SPECSIG","cntRefCnt4_SPECSIG");
-          
-            pterms["FB7_14_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB7_14_3"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
-          
-            pterms["FB7_14_4"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB7_14_5"]=new Array("/cntRefDone_SPECSIG","nAS_FSB","ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG","/fsbASrf_SPECSIG");
-          
-            pterms["FB7_15_1"]=new Array("A_FSB20_SPECSIG","ramRASEL_SPECSIG");
-          
-            pterms["FB7_15_2"]=new Array("A_FSB19_SPECSIG","/ramRASEL_SPECSIG");
-          
-            pterms["FB7_15_3"]=new Array("cntRefCnt0_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt1_SPECSIG","cntRefCnt2_SPECSIG","cntRefCnt3_SPECSIG","cntRefCnt4_SPECSIG");
-          
-            pterms["FB7_16_1"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG");
-          
-            pterms["FB7_16_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB7_16_3"]=new Array("A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB7_16_4"]=new Array("/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB7_16_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB7_17_1"]=new Array("A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
-          
-            pterms["FB7_17_2"]=new Array("/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
-          
-            pterms["FB7_17_3"]=new Array("/A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
-          
-            pterms["FB7_17_4"]=new Array("/A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB7_17_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG");
-          
-            pterms["FB7_18_1"]=new Array("ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
-          
-            pterms["FB7_18_2"]=new Array("/ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd1_SPECSIG");
-          
-            pterms["FB7_18_3"]=new Array("/ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd3_SPECSIG");
-          
-            pterms["FB7_18_4"]=new Array("A_FSB23_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
-          
-            pterms["FB7_18_5"]=new Array("A_FSB23_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
-          
-            pterms["FB8_2_1"]=new Array("A_FSB19_SPECSIG");
-          
-            pterms["FB8_6_1"]=new Array("A_FSB21_SPECSIG");
-          
-            pterms["FB8_9_1"]=new Array("/ALE0M","/ALE0S");
-          
-            pterms["FB8_15_1"]=new Array("/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd4_SPECSIG");
-          
-            pterms["FB8_17_1"]=new Array("iobmIOS_FSM_FFd2_SPECSIG");
-          
-            pterms["FB8_18_1"]=new Array("E_IOB");
-          
-          d2["nDTACK_FSB"]=new Array("FB1_2_1","FB1_2_2","FB1_2_3","FB1_2_4","FB1_2_5","FB1_1_1","FB1_1_2","FB1_1_3","FB1_1_4","FB1_1_5","FB1_18_1","FB1_18_2","FB1_18_3","FB1_18_4","FB1_18_5","FB1_3_1","FB1_3_2","FB1_3_3","FB1_3_4","FB1_3_5","FB1_4_3","FB1_4_4","FB1_4_5");
-          
-            d2imp["nDTACK_FSB"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
-          
-              gblclk["nDTACK_FSB"]=new Array("CLK_FSB");
-            prld["nDTACK_FSB"]="GND";
-          d2["OpTxFX_DC606_SPECSIG"]=new Array("FB1_4_1","FB1_4_2","FB1_5_1","FB1_5_2","FB1_5_3");
-          
-            d2imp["OpTxFX_DC606_SPECSIG"]=new Array("1","1","1","1","1");
-          
-          d2["nBERR_FSB"]=new Array("FB1_6_1","FB1_6_2","FB1_6_3");
-          
-            d2imp["nBERR_FSB"]=new Array("1","1","1");
-          
-          d2["fsbReady1r_SPECSIG"]=new Array("FB1_7_1","FB1_7_2","FB1_7_3","FB1_7_4","FB1_7_5","FB1_6_4","FB1_6_5");
-          
-            d2imp["fsbReady1r_SPECSIG"]=new Array("1","1","1","1","1","1","1");
-          
-              gblclk["fsbReady1r_SPECSIG"]=new Array("CLK_FSB");
-            prld["fsbReady1r_SPECSIG"]="GND";
-          d2["fsbVPA__or00001fsbVPA__or00001_D2_SPECSIG"]=new Array("FB1_10_1","FB1_10_2","FB1_10_3","FB1_10_4","FB1_10_5","FB1_9_1","FB1_9_2","FB1_9_3");
-          
-            d2imp["fsbVPA__or00001fsbVPA__or00001_D2_SPECSIG"]=new Array("1","1","1","1","1","1","1","1");
-          
-          d2["nOE"]=new Array("FB1_11_1");
-          
-            d2imp["nOE"]=new Array("1");
-          
-          d2["fsbReady2r_SPECSIG"]=new Array("FB1_12_1","FB1_12_2","FB1_12_3","FB1_12_4","FB1_12_5","FB1_11_2","FB1_11_3","FB1_11_4","FB1_11_5");
-          
-            d2imp["fsbReady2r_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1");
-          
-              gblclk["fsbReady2r_SPECSIG"]=new Array("CLK_FSB");
-            prld["fsbReady2r_SPECSIG"]="GND";
-          d2["fsbVPA_SPECSIG"]=new Array("FB1_15_1","FB1_15_2","FB1_15_3","FB1_15_4","FB1_15_5","FB1_14_1","FB1_14_2","FB1_14_3","FB1_14_4","FB1_14_5","FB1_13_1","FB1_13_2","FB1_13_3","FB1_13_4","FB1_13_5","FB1_16_1","FB1_16_2","FB1_16_3","FB1_16_4","FB1_16_5","FB1_17_3","FB1_17_4");
-          
-            d2imp["fsbVPA_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
-          
-              gblclk["fsbVPA_SPECSIG"]=new Array("CLK_FSB");
-            prld["fsbVPA_SPECSIG"]="GND";
-          d2["OpTxFX_DC602_SPECSIG"]=new Array("FB1_17_1","FB1_17_2");
-          
-            d2imp["OpTxFX_DC602_SPECSIG"]=new Array("1","1");
-          
-          d2["iobmVPArr_SPECSIG"]=new Array("FB2_1_1");
-          
-            d2imp["iobmVPArr_SPECSIG"]=new Array("1");
-          
-              gblclk["iobmVPArr_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmVPArr_SPECSIG"]="GND";
-          d2["iobmVPArf_SPECSIG"]=new Array("FB2_2_1");
-          
-            d2imp["iobmVPArf_SPECSIG"]=new Array("1");
-          clkNegs["iobmVPArf_SPECSIG"]=1;
-              gblclk["iobmVPArf_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmVPArf_SPECSIG"]="GND";
-          d2["iobmRESrr_SPECSIG"]=new Array("FB2_3_1");
-          
-            d2imp["iobmRESrr_SPECSIG"]=new Array("1");
-          
-              gblclk["iobmRESrr_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmRESrr_SPECSIG"]="GND";
-          d2["iobmRESrf_SPECSIG"]=new Array("FB2_4_1");
-          
-            d2imp["iobmRESrf_SPECSIG"]=new Array("1");
-          clkNegs["iobmRESrf_SPECSIG"]=1;
-              gblclk["iobmRESrf_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmRESrf_SPECSIG"]="GND";
-          d2["iobmIOREQr_SPECSIG"]=new Array("FB2_5_1");
-          
-            d2imp["iobmIOREQr_SPECSIG"]=new Array("1");
-          clkNegs["iobmIOREQr_SPECSIG"]=1;
-              gblclk["iobmIOREQr_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmIOREQr_SPECSIG"]="GND";
-          d2["cntRefCnt3_SPECSIG"]=new Array("FB2_6_1");
-          
-            d2imp["cntRefCnt3_SPECSIG"]=new Array("1");
-          
-              gblclk["cntRefCnt3_SPECSIG"]=new Array("CLK_FSB");
-            prld["cntRefCnt3_SPECSIG"]="GND";
-          d2["cntRefCnt2_SPECSIG"]=new Array("FB2_7_1");
-          
-            d2imp["cntRefCnt2_SPECSIG"]=new Array("1");
-          
-              gblclk["cntRefCnt2_SPECSIG"]=new Array("CLK_FSB");
-            prld["cntRefCnt2_SPECSIG"]="GND";
-          d2["cntRefCnt1_SPECSIG"]=new Array("FB2_8_1");
-          
-            d2imp["cntRefCnt1_SPECSIG"]=new Array("1");
-          
-              gblclk["cntRefCnt1_SPECSIG"]=new Array("CLK_FSB");
-            prld["cntRefCnt1_SPECSIG"]="GND";
-          d2["fsbBERR1r_SPECSIG"]=new Array("FB2_9_1","FB2_9_2");
-          
-            d2imp["fsbBERR1r_SPECSIG"]=new Array("1","1");
-          
-              gblclk["fsbBERR1r_SPECSIG"]=new Array("CLK_FSB");
-            prld["fsbBERR1r_SPECSIG"]="GND";
-          d2["cntRefDone_SPECSIG"]=new Array("FB2_10_1","FB2_10_2");
-          
-            d2imp["cntRefDone_SPECSIG"]=new Array("1","1");
-          
-              gblclk["cntRefDone_SPECSIG"]=new Array("CLK_FSB");
-            prld["cntRefDone_SPECSIG"]="GND";
-          d2["nLDS_IOB"]=new Array("FB2_11_1","FB2_11_2","FB2_11_3");
-          
-            d2imp["nLDS_IOB"]=new Array("1","1","1");
-          clkNegs["nLDS_IOB"]=1;
-              gblclk["nLDS_IOB"]=new Array("CLK2X_IOB");
-            prld["nLDS_IOB"]="GND";
-          d2["nUDS_IOB"]=new Array("FB2_12_1","FB2_12_2","FB2_12_3");
-          
-            d2imp["nUDS_IOB"]=new Array("1","1","1");
-          clkNegs["nUDS_IOB"]=1;
-              gblclk["nUDS_IOB"]=new Array("CLK2X_IOB");
-            prld["nUDS_IOB"]="GND";
-          d2["cntTimeoutBPre_SPECSIG"]=new Array("FB2_13_1","FB2_13_2","FB2_13_3");
-          
-            d2imp["cntTimeoutBPre_SPECSIG"]=new Array("1","1","1");
-          
-              gblclk["cntTimeoutBPre_SPECSIG"]=new Array("CLK_FSB");
-            prld["cntTimeoutBPre_SPECSIG"]="GND";
-          d2["nDoutOE"]=new Array("FB2_14_1","FB2_14_2");
-          
-            d2imp["nDoutOE"]=new Array("1","1");
-          
-              gblclk["nDoutOE"]=new Array("CLK2X_IOB");
-            prld["nDoutOE"]="GND";
-          d2["TimeoutB"]=new Array("FB2_15_1","FB2_15_2","FB2_15_3");
-          
-            d2imp["TimeoutB"]=new Array("1","1","1");
-          
-              gblclk["TimeoutB"]=new Array("CLK_FSB");
-            prld["TimeoutB"]="GND";
-          d2["TimeoutA"]=new Array("FB2_16_1","FB2_16_2","FB2_16_3");
-          
-            d2imp["TimeoutA"]=new Array("1","1","1");
-          
-              gblclk["TimeoutA"]=new Array("CLK_FSB");
-            prld["TimeoutA"]="GND";
-          d2["nAS_IOB"]=new Array("FB2_17_1");
-          
-            d2imp["nAS_IOB"]=new Array("1");
-          clkNegs["nAS_IOB"]=1;
-              gblclk["nAS_IOB"]=new Array("CLK2X_IOB");
-            prld["nAS_IOB"]="GND";
-          d2["iobsIOReady_SPECSIG"]=new Array("FB2_18_1","FB2_18_2","FB2_18_3","FB2_18_4");
-          
-            d2imp["iobsIOReady_SPECSIG"]=new Array("1","1","1","1");
-          
-              gblclk["iobsIOReady_SPECSIG"]=new Array("CLK_FSB");
-            prld["iobsIOReady_SPECSIG"]="GND";
-          d2["IORW0"]=new Array("FB3_3_1","FB3_3_2","FB3_3_3","FB3_3_4","FB3_3_5","FB3_2_1","FB3_2_2","FB3_2_3","FB3_2_4","FB3_2_5","FB3_1_1","FB3_1_2","FB3_1_3","FB3_1_4","FB3_4_2","FB3_4_3","FB3_4_4","FB3_4_5");
-          
-            d2imp["IORW0"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
-          
-              gblclk["IORW0"]=new Array("CLK_FSB");
-            prld["IORW0"]="GND";
-          d2["iobsIOACTr_SPECSIG"]=new Array("FB3_4_1");
-          
-            d2imp["iobsIOACTr_SPECSIG"]=new Array("1");
-          
-              gblclk["iobsIOACTr_SPECSIG"]=new Array("CLK_FSB");
-            prld["iobsIOACTr_SPECSIG"]="GND";
-          d2["nRAS"]=new Array("FB3_5_1","FB3_5_2","FB3_5_3");
-          
-            d2imp["nRAS"]=new Array("1","1","1");
-          
-          d2["iobsClear1_SPECSIG"]=new Array("FB3_6_1");
-          
-            d2imp["iobsClear1_SPECSIG"]=new Array("1");
-          
-              gblclk["iobsClear1_SPECSIG"]=new Array("CLK_FSB");
-            prld["iobsClear1_SPECSIG"]="GND";
-          d2["fsbASrf_SPECSIG"]=new Array("FB3_7_1");
-          
-            d2imp["fsbASrf_SPECSIG"]=new Array("1");
-          clkNegs["fsbASrf_SPECSIG"]=1;
-              gblclk["fsbASrf_SPECSIG"]=new Array("CLK_FSB");
-            prld["fsbASrf_SPECSIG"]="GND";
-          d2["ALE0S"]=new Array("FB3_8_1");
-          
-            d2imp["ALE0S"]=new Array("1");
-          
-              gblclk["ALE0S"]=new Array("CLK_FSB");
-            prld["ALE0S"]="GND";
-          d2["iobsPS_FSM_FFd2_SPECSIG"]=new Array("FB3_9_1","FB3_9_2","FB3_9_3","FB3_9_4","FB3_9_5","FB3_8_2","FB3_8_3","FB3_8_4","FB3_8_5","FB3_10_1","FB3_10_2","FB3_10_3","FB3_10_4","FB3_10_5");
-          
-            d2imp["iobsPS_FSM_FFd2_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1");
-          
-              gblclk["iobsPS_FSM_FFd2_SPECSIG"]=new Array("CLK_FSB");
-            prld["iobsPS_FSM_FFd2_SPECSIG"]="GND";
-          d2["nADoutLE1"]=new Array("FB3_11_1","FB3_11_2");
-          
-            d2imp["nADoutLE1"]=new Array("1","1");
-          
-              gblclk["nADoutLE1"]=new Array("CLK_FSB");
-            prld["nADoutLE1"]="VCC";
-          d2["iobsPS_FSM_FFd1_SPECSIG"]=new Array("FB3_11_3","FB3_11_4");
-          
-            d2imp["iobsPS_FSM_FFd1_SPECSIG"]=new Array("1","1");
-          
-              gblclk["iobsPS_FSM_FFd1_SPECSIG"]=new Array("CLK_FSB");
-            prld["iobsPS_FSM_FFd1_SPECSIG"]="GND";
-          d2["IOREQ"]=new Array("FB3_13_1","FB3_13_2","FB3_13_3","FB3_13_4","FB3_13_5","FB3_12_1","FB3_12_2","FB3_12_3","FB3_12_4","FB3_12_5","FB3_14_2","FB3_14_3","FB3_14_4","FB3_14_5");
-          
-            d2imp["IOREQ"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1");
-          
-              gblclk["IOREQ"]=new Array("CLK_FSB");
-            prld["IOREQ"]="GND";
-          d2["iobmETACK_SPECSIG"]=new Array("FB3_14_1");
-          
-            d2imp["iobmETACK_SPECSIG"]=new Array("1");
-          
-              gblclk["iobmETACK_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmETACK_SPECSIG"]="GND";
-          d2["nVMA_IOB"]=new Array("FB3_15_1","FB3_15_2");
-          
-            d2imp["nVMA_IOB"]=new Array("1","1");
-          
-              gblclk["nVMA_IOB"]=new Array("CLK2X_IOB");
-            prld["nVMA_IOB"]="GND";
-          d2["iobsIORW1_SPECSIG"]=new Array("FB3_17_1","FB3_17_2","FB3_17_3","FB3_17_4","FB3_17_5","FB3_16_1","FB3_16_2","FB3_16_3","FB3_16_4","FB3_16_5","FB3_15_3","FB3_15_4","FB3_18_2","FB3_18_3","FB3_18_4","FB3_18_5");
-          
-            d2imp["iobsIORW1_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
-          
-              gblclk["iobsIORW1_SPECSIG"]=new Array("CLK_FSB");
-            prld["iobsIORW1_SPECSIG"]="GND";
-          d2["ramBACTr_SPECSIG"]=new Array("FB3_18_1");
-          
-            d2imp["ramBACTr_SPECSIG"]=new Array("1");
-          
-              gblclk["ramBACTr_SPECSIG"]=new Array("CLK_FSB");
-            prld["ramBACTr_SPECSIG"]="GND";
-          d2["ramRASEL_SPECSIG"]=new Array("FB4_1_1","FB4_1_2","FB4_1_3","FB4_1_4","FB4_1_5","FB4_2_1","FB4_2_2","FB4_2_3","FB4_2_4","FB4_2_5","FB4_18_1","FB4_18_2","FB4_18_3","FB4_18_4","FB4_18_5","FB4_17_1","FB4_17_2","FB4_17_3","FB4_17_4","FB4_17_5");
-          
-            d2imp["ramRASEL_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
-          
-              gblclk["ramRASEL_SPECSIG"]=new Array("CLK_FSB");
-            prld["ramRASEL_SPECSIG"]="GND";
-          d2["RA0_SPECSIG"]=new Array("FB4_3_3","FB4_3_4");
-          
-            d2imp["RA0_SPECSIG"]=new Array("1","1");
-          
-          d2["csnOverlay1_SPECSIG"]=new Array("FB4_3_1");
-          
-            d2imp["csnOverlay1_SPECSIG"]=new Array("1");
-          
-              gblclk["csnOverlay1_SPECSIG"]=new Array("CLK_FSB");
-            
-          ce["csnOverlay1_SPECSIG"]=new Array("FB4_3_2");
-          
-            ceimp["csnOverlay1_SPECSIG"]=new Array("1");
-          prld["csnOverlay1_SPECSIG"]="GND";
-          d2["iobsLoad1_SPECSIG"]=new Array("FB4_6_1","FB4_6_2","FB4_6_3","FB4_6_4","FB4_6_5","FB4_5_1","FB4_5_2","FB4_5_3","FB4_5_4","FB4_7_1","FB4_7_2","FB4_7_3","FB4_7_4","FB4_7_5");
-          
-            d2imp["iobsLoad1_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1");
-          
-              gblclk["iobsLoad1_SPECSIG"]=new Array("CLK_FSB");
-            prld["iobsLoad1_SPECSIG"]="GND";
-          d2["RA2_SPECSIG"]=new Array("FB4_8_1","FB4_8_2");
-          
-            d2imp["RA2_SPECSIG"]=new Array("1","1");
-          
-          d2["iobsOnce_SPECSIG"]=new Array("FB4_10_1","FB4_10_2","FB4_10_3","FB4_10_4","FB4_10_5","FB4_9_1","FB4_9_2","FB4_9_3","FB4_9_4","FB4_9_5","FB4_8_3","FB4_8_4","FB4_11_1","FB4_11_2","FB4_11_3","FB4_11_4","FB4_11_5");
-          
-            d2imp["iobsOnce_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
-          
-              gblclk["iobsOnce_SPECSIG"]=new Array("CLK_FSB");
-            prld["iobsOnce_SPECSIG"]="GND";
-          d2["RA4_SPECSIG"]=new Array("FB4_12_1","FB4_12_2");
-          
-            d2imp["RA4_SPECSIG"]=new Array("1","1");
-          
-          d2["ramRAMDIS1_SPECSIG"]=new Array("FB4_14_1","FB4_14_2","FB4_14_3","FB4_14_4","FB4_14_5","FB4_13_1","FB4_13_2","FB4_13_3","FB4_13_4","FB4_13_5","FB4_12_3","FB4_12_4","FB4_12_5","FB4_15_1","FB4_15_2","FB4_15_3","FB4_15_4","FB4_15_5");
-          
-            d2imp["ramRAMDIS1_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
-          
-              gblclk["ramRAMDIS1_SPECSIG"]=new Array("CLK_FSB");
-            prld["ramRAMDIS1_SPECSIG"]="GND";
-          d2["fsbBERR0r_SPECSIG"]=new Array("FB4_16_1","FB4_16_2","FB4_16_3");
-          
-            d2imp["fsbBERR0r_SPECSIG"]=new Array("1","1","1");
-          
-              gblclk["fsbBERR0r_SPECSIG"]=new Array("CLK_FSB");
-            prld["fsbBERR0r_SPECSIG"]="GND";
-          d2["nDinOE"]=new Array("FB4_16_4","FB4_16_5");
-          
-            d2imp["nDinOE"]=new Array("1","1");
-          
-          d2["IOACT"]=new Array("FB5_1_1","FB5_1_2","FB5_1_3","FB5_1_4","FB5_1_5","FB5_2_3","FB5_2_4","FB5_2_5","FB5_18_4","FB5_18_5");
-          
-            d2imp["IOACT"]=new Array("1","1","1","1","1","1","1","1","1","1");
-          
-              gblclk["IOACT"]=new Array("CLK2X_IOB");
-            prld["IOACT"]="GND";
-          d2["RA1_SPECSIG"]=new Array("FB5_2_1","FB5_2_2");
-          
-            d2imp["RA1_SPECSIG"]=new Array("1","1");
-          
-          d2["iobmIOS_FSM_FFd7_SPECSIG"]=new Array("FB5_3_1");
-          
-            d2imp["iobmIOS_FSM_FFd7_SPECSIG"]=new Array("1");
-          
-              gblclk["iobmIOS_FSM_FFd7_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmIOS_FSM_FFd7_SPECSIG"]="GND";
-          d2["iobmIOS_FSM_FFd6_SPECSIG"]=new Array("FB5_4_1");
-          
-            d2imp["iobmIOS_FSM_FFd6_SPECSIG"]=new Array("1");
-          
-              gblclk["iobmIOS_FSM_FFd6_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmIOS_FSM_FFd6_SPECSIG"]="GND";
-          d2["iobmIOS_FSM_FFd5_SPECSIG"]=new Array("FB5_5_1");
-          
-            d2imp["iobmIOS_FSM_FFd5_SPECSIG"]=new Array("1");
-          
-              gblclk["iobmIOS_FSM_FFd5_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmIOS_FSM_FFd5_SPECSIG"]="GND";
-          d2["iobmIOS_FSM_FFd4_SPECSIG"]=new Array("FB5_6_1");
-          
-            d2imp["iobmIOS_FSM_FFd4_SPECSIG"]=new Array("1");
-          
-              gblclk["iobmIOS_FSM_FFd4_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmIOS_FSM_FFd4_SPECSIG"]="GND";
-          d2["iobmBERRrr_SPECSIG"]=new Array("FB5_7_1");
-          
-            d2imp["iobmBERRrr_SPECSIG"]=new Array("1");
-          
-              gblclk["iobmBERRrr_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmBERRrr_SPECSIG"]="GND";
-          d2["RA3_SPECSIG"]=new Array("FB5_8_1","FB5_8_2");
-          
-            d2imp["RA3_SPECSIG"]=new Array("1","1");
-          
-          d2["iobmBERRrf_SPECSIG"]=new Array("FB5_9_1");
-          
-            d2imp["iobmBERRrf_SPECSIG"]=new Array("1");
-          clkNegs["iobmBERRrf_SPECSIG"]=1;
-              gblclk["iobmBERRrf_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmBERRrf_SPECSIG"]="GND";
-          d2["cntRefCnt0_SPECSIG"]=new Array("VCC");
-          
-            d2imp["cntRefCnt0_SPECSIG"]=new Array("1");
-          
-              gblclk["cntRefCnt0_SPECSIG"]=new Array("CLK_FSB");
-            prld["cntRefCnt0_SPECSIG"]="GND";
-          d2["iobmIOS_FSM_FFd8_SPECSIG"]=new Array("FB5_11_1","FB5_11_2");
-          
-            d2imp["iobmIOS_FSM_FFd8_SPECSIG"]=new Array("1","1");
-          
-              gblclk["iobmIOS_FSM_FFd8_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmIOS_FSM_FFd8_SPECSIG"]="VCC";
-          d2["nROMCS"]=new Array("FB5_12_1","FB5_12_2");
-          
-            d2imp["nROMCS"]=new Array("1","1");
-          
-          d2["ALE0M"]=new Array("FB5_13_1","FB5_13_2");
-          
-            d2imp["ALE0M"]=new Array("1","1");
-          
-              gblclk["ALE0M"]=new Array("CLK2X_IOB");
-            prld["ALE0M"]="GND";
-          d2["iobmIOS_FSM_FFd2_SPECSIG"]=new Array("FB5_14_1","FB5_14_2","FB5_14_3","FB5_14_4");
-          
-            d2imp["iobmIOS_FSM_FFd2_SPECSIG"]=new Array("1","1","1","1");
-          
-              gblclk["iobmIOS_FSM_FFd2_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmIOS_FSM_FFd2_SPECSIG"]="GND";
-          d2["BERR_IOBS"]=new Array("FB5_15_1","FB5_15_2","FB5_15_3","FB5_15_4");
-          
-            d2imp["BERR_IOBS"]=new Array("1","1","1","1");
-          
-              gblclk["BERR_IOBS"]=new Array("CLK_FSB");
-            prld["BERR_IOBS"]="GND";
-          d2["iobmIOS_FSM_FFd3_SPECSIG"]=new Array("FB5_16_1","FB5_16_2","FB5_16_3","FB5_16_4","FB5_16_5");
-          
-            d2imp["iobmIOS_FSM_FFd3_SPECSIG"]=new Array("1","1","1","1","1");
-          
-              gblclk["iobmIOS_FSM_FFd3_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmIOS_FSM_FFd3_SPECSIG"]="GND";
-          d2["IOBERR"]=new Array("FB5_18_1","FB5_18_2","FB5_18_3","FB5_17_1","FB5_17_2","FB5_17_3","FB5_17_4","FB5_17_5");
-          
-            d2imp["IOBERR"]=new Array("1","1","1","1","1","1","1","1");
-          
-              gblclk["IOBERR"]=new Array("CLK2X_IOB");
-            prld["IOBERR"]="GND";
-          d2["iobmEr2_SPECSIG"]=new Array("FB6_1_1");
-          
-            d2imp["iobmEr2_SPECSIG"]=new Array("1");
-          
-              gblclk["iobmEr2_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmEr2_SPECSIG"]="GND";
-          d2["nCAS"]=new Array("FB6_2_1");
-          
-            d2imp["nCAS"]=new Array("1");
-          clkNegs["nCAS"]=1;
-              gblclk["nCAS"]=new Array("CLK_FSB");
-            prld["nCAS"]="GND";
-          d2["iobmDTACKrr_SPECSIG"]=new Array("FB6_3_1");
-          
-            d2imp["iobmDTACKrr_SPECSIG"]=new Array("1");
-          
-              gblclk["iobmDTACKrr_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmDTACKrr_SPECSIG"]="GND";
-          d2["iobmDTACKrf_SPECSIG"]=new Array("FB6_4_1");
-          
-            d2imp["iobmDTACKrf_SPECSIG"]=new Array("1");
-          clkNegs["iobmDTACKrf_SPECSIG"]=1;
-              gblclk["iobmDTACKrf_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmDTACKrf_SPECSIG"]="GND";
-          d2["RefAck"]=new Array("FB6_5_1");
-          
-            d2imp["RefAck"]=new Array("1");
-          
-              gblclk["RefAck"]=new Array("CLK_FSB");
-            prld["RefAck"]="GND";
-          d2["nRAMLWE"]=new Array("FB6_6_1");
-          
-            d2imp["nRAMLWE"]=new Array("1");
-          
-          d2["iobsIOU1_SPECSIG"]=new Array("FB6_7_1");
-          
-            d2imp["iobsIOU1_SPECSIG"]=new Array("1");
-          
-              gblclk["iobsIOU1_SPECSIG"]=new Array("CLK_FSB");
-            
-          ce["iobsIOU1_SPECSIG"]=new Array("FB6_7_2");
-          
-            ceimp["iobsIOU1_SPECSIG"]=new Array("1");
-          prld["iobsIOU1_SPECSIG"]="GND";
-          d2["iobsIOL1_SPECSIG"]=new Array("FB6_8_1");
-          
-            d2imp["iobsIOL1_SPECSIG"]=new Array("1");
-          
-              gblclk["iobsIOL1_SPECSIG"]=new Array("CLK_FSB");
-            
-          ce["iobsIOL1_SPECSIG"]=new Array("FB6_8_2");
-          
-            ceimp["iobsIOL1_SPECSIG"]=new Array("1");
-          prld["iobsIOL1_SPECSIG"]="GND";
-          d2["nRAMUWE"]=new Array("FB6_9_1");
-          
-            d2imp["nRAMUWE"]=new Array("1");
-          
-          d2["iobmES3_SPECSIG"]=new Array("FB6_10_1","FB6_10_2","FB6_10_3");
-          
-            d2imp["iobmES3_SPECSIG"]=new Array("1","1","1");
-          
-              gblclk["iobmES3_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmES3_SPECSIG"]="GND";
-          d2["iobmES1_SPECSIG"]=new Array("FB6_11_1","FB6_11_2","FB6_11_3");
-          
-            d2imp["iobmES1_SPECSIG"]=new Array("1","1","1");
-          
-              gblclk["iobmES1_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmES1_SPECSIG"]="GND";
-          d2["nROMWE"]=new Array("FB6_12_1");
-          
-            d2imp["nROMWE"]=new Array("1");
-          
-          d2["iobmES0_SPECSIG"]=new Array("FB6_13_1","FB6_13_2","FB6_13_3");
-          
-            d2imp["iobmES0_SPECSIG"]=new Array("1","1","1");
-          
-              gblclk["iobmES0_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmES0_SPECSIG"]="GND";
-          d2["IOU0"]=new Array("FB6_14_1","FB6_14_2");
-          
-            d2imp["IOU0"]=new Array("1","1");
-          
-              gblclk["IOU0"]=new Array("CLK_FSB");
-            
-          ce["IOU0"]=new Array("FB6_14_3");
-          
-            ceimp["IOU0"]=new Array("1");
-          prld["IOU0"]="GND";
-          d2["nVPA_FSB"]=new Array("FB6_15_1");
-          
-            d2imp["nVPA_FSB"]=new Array("1");
-          
-          d2["IOL0"]=new Array("FB6_16_1","FB6_16_2");
-          
-            d2imp["IOL0"]=new Array("1","1");
-          
-              gblclk["IOL0"]=new Array("CLK_FSB");
-            
-          ce["IOL0"]=new Array("FB6_16_3");
-          
-            ceimp["IOL0"]=new Array("1");
-          prld["IOL0"]="GND";
-          d2["iobmES4_SPECSIG"]=new Array("FB6_17_1","FB6_17_2","FB6_17_3","FB6_17_4");
-          
-            d2imp["iobmES4_SPECSIG"]=new Array("1","1","1","1");
-          
-              gblclk["iobmES4_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmES4_SPECSIG"]="GND";
-          d2["iobmES2_SPECSIG"]=new Array("FB6_18_1","FB6_18_2","FB6_18_3","FB6_18_4","FB6_18_5");
-          
-            d2imp["iobmES2_SPECSIG"]=new Array("1","1","1","1","1");
-          
-              gblclk["iobmES2_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmES2_SPECSIG"]="GND";
-          d2["cntRefCnt5_SPECSIG"]=new Array("FB7_1_1");
-          
-            d2imp["cntRefCnt5_SPECSIG"]=new Array("1");
-          
-              gblclk["cntRefCnt5_SPECSIG"]=new Array("CLK_FSB");
-            prld["cntRefCnt5_SPECSIG"]="GND";
-          d2["RA5_SPECSIG"]=new Array("FB7_2_1","FB7_2_2");
-          
-            d2imp["RA5_SPECSIG"]=new Array("1","1");
-          
-          d2["cntRefCnt4_SPECSIG"]=new Array("FB7_3_1");
-          
-            d2imp["cntRefCnt4_SPECSIG"]=new Array("1");
-          
-              gblclk["cntRefCnt4_SPECSIG"]=new Array("CLK_FSB");
-            prld["cntRefCnt4_SPECSIG"]="GND";
-          d2["csnOverlay0_SPECSIG"]=new Array("FB7_4_1","FB7_4_2");
-          
-            d2imp["csnOverlay0_SPECSIG"]=new Array("1","1");
-          
-              gblclk["csnOverlay0_SPECSIG"]=new Array("CLK_FSB");
-            
-              gblrst["csnOverlay0_SPECSIG"]=new Array("nRES");
-            prld["csnOverlay0_SPECSIG"]="GND";
-          d2["ramRS_FSM_FFd3_SPECSIG"]=new Array("FB7_5_1","FB7_5_2","FB7_5_3","FB7_5_4","FB7_5_5","FB7_4_3","FB7_4_4","FB7_4_5","FB7_6_3","FB7_6_4","FB7_6_5");
-          
-            d2imp["ramRS_FSM_FFd3_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1");
-          
-              gblclk["ramRS_FSM_FFd3_SPECSIG"]=new Array("CLK_FSB");
-            prld["ramRS_FSM_FFd3_SPECSIG"]="GND";
-          d2["RA6_SPECSIG"]=new Array("FB7_6_1","FB7_6_2");
-          
-            d2imp["RA6_SPECSIG"]=new Array("1","1");
-          
-          d2["fsbReady0r_SPECSIG"]=new Array("FB7_7_1","FB7_7_2","FB7_7_3");
-          
-            d2imp["fsbReady0r_SPECSIG"]=new Array("1","1","1");
-          
-              gblclk["fsbReady0r_SPECSIG"]=new Array("CLK_FSB");
-            prld["fsbReady0r_SPECSIG"]="GND";
-          d2["ramRS_FSM_FFd1_SPECSIG"]=new Array("FB7_8_1","FB7_8_2","FB7_8_3","FB7_8_4","FB7_8_5");
-          
-            d2imp["ramRS_FSM_FFd1_SPECSIG"]=new Array("1","1","1","1","1");
-          
-              gblclk["ramRS_FSM_FFd1_SPECSIG"]=new Array("CLK_FSB");
-            prld["ramRS_FSM_FFd1_SPECSIG"]="GND";
-          d2["RA7_SPECSIG"]=new Array("FB7_9_1","FB7_9_2");
-          
-            d2imp["RA7_SPECSIG"]=new Array("1","1");
-          
-          d2["ramOnce_SPECSIG"]=new Array("FB7_10_1","FB7_10_2","FB7_9_3","FB7_9_4","FB7_9_5");
-          
-            d2imp["ramOnce_SPECSIG"]=new Array("1","1","1","1","1");
-          
-              gblclk["ramOnce_SPECSIG"]=new Array("CLK_FSB");
-            prld["ramOnce_SPECSIG"]="GND";
-          d2["ramRAMDIS2_SPECSIG"]=new Array("FB7_11_1","FB7_11_2","FB7_11_3","FB7_11_4","FB7_10_3","FB7_10_4","FB7_10_5");
-          
-            d2imp["ramRAMDIS2_SPECSIG"]=new Array("1","1","1","1","1","1","1");
-          
-              gblclk["ramRAMDIS2_SPECSIG"]=new Array("CLK_FSB");
-            prld["ramRAMDIS2_SPECSIG"]="GND";
-          d2["RA8_SPECSIG"]=new Array("FB7_12_1","FB7_11_5");
-          
-            d2imp["RA8_SPECSIG"]=new Array("1","1");
-          
-          d2["ramRS_FSM_FFd2_SPECSIG"]=new Array("FB7_13_1","FB7_13_2","FB7_13_3","FB7_13_4","FB7_13_5","FB7_12_2","FB7_12_3","FB7_12_4","FB7_12_5","FB7_14_2","FB7_14_3","FB7_14_4","FB7_14_5");
-          
-            d2imp["ramRS_FSM_FFd2_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1");
-          
-              gblclk["ramRS_FSM_FFd2_SPECSIG"]=new Array("CLK_FSB");
-            prld["ramRS_FSM_FFd2_SPECSIG"]="GND";
-          d2["cntRefCnt7_SPECSIG"]=new Array("FB7_14_1");
-          
-            d2imp["cntRefCnt7_SPECSIG"]=new Array("1");
-          
-              gblclk["cntRefCnt7_SPECSIG"]=new Array("CLK_FSB");
-            prld["cntRefCnt7_SPECSIG"]="GND";
-          d2["RA9_SPECSIG"]=new Array("FB7_15_1","FB7_15_2");
-          
-            d2imp["RA9_SPECSIG"]=new Array("1","1");
-          
-          d2["cntRefCnt6_SPECSIG"]=new Array("FB7_15_3");
-          
-            d2imp["cntRefCnt6_SPECSIG"]=new Array("1");
-          
-              gblclk["cntRefCnt6_SPECSIG"]=new Array("CLK_FSB");
-            prld["cntRefCnt6_SPECSIG"]="GND";
-          d2["ramRAMReady_SPECSIG"]=new Array("FB7_17_1","FB7_17_2","FB7_17_3","FB7_17_4","FB7_17_5","FB7_16_1","FB7_16_2","FB7_16_3","FB7_16_4","FB7_16_5","FB7_18_1","FB7_18_2","FB7_18_3","FB7_18_4","FB7_18_5","FB7_1_2");
-          
-            d2imp["ramRAMReady_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
-          
-              gblclk["ramRAMReady_SPECSIG"]=new Array("CLK_FSB");
-            prld["ramRAMReady_SPECSIG"]="GND";
-          d2["RA11_SPECSIG"]=new Array("FB8_2_1");
-          
-            d2imp["RA11_SPECSIG"]=new Array("1");
-          
-          d2["RA10_SPECSIG"]=new Array("FB8_6_1");
-          
-            d2imp["RA10_SPECSIG"]=new Array("1");
-          
-          d2["nADoutLE0"]=new Array("FB8_9_1");
-          
-            d2imp["nADoutLE0"]=new Array("1");
-          
-          d2["nAoutOE"]=new Array("GND");
-          
-            d2imp["nAoutOE"]=new Array("1");
-          
-          d2["nDinLE"]=new Array("FB8_15_1");
-          
-            d2imp["nDinLE"]=new Array("1");
-          clkNegs["nDinLE"]=1;
-              gblclk["nDinLE"]=new Array("CLK2X_IOB");
-            prld["nDinLE"]="GND";
-          d2["iobmIOS_FSM_FFd1_SPECSIG"]=new Array("FB8_17_1");
-          
-            d2imp["iobmIOS_FSM_FFd1_SPECSIG"]=new Array("1");
-          
-              gblclk["iobmIOS_FSM_FFd1_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmIOS_FSM_FFd1_SPECSIG"]="GND";
-          d2["iobmEr_SPECSIG"]=new Array("FB8_18_1");
-          
-            d2imp["iobmEr_SPECSIG"]=new Array("1");
-          clkNegs["iobmEr_SPECSIG"]=1;
-              gblclk["iobmEr_SPECSIG"]=new Array("CLK_IOB");
-            prld["iobmEr_SPECSIG"]="GND";
-
-      uimSignals = new Array();
-
-      uimSigNegs = new Array();
-
-      uimPterms = new Array();
-      
-
-      
-        function getEqnList() {
-          var str = "<html><head><link type='text/css' href='style.css' rel='stylesheet'></head><body class='pgBgnd'>";
-          str += "<center><h3>Equations</h3></center>";
-          str += "<table width='90%' align='center' border='1' cellpadding='0' cellspacing='0'>";
-          for (s=0; s<uimSignals.length; s++) {
-            str += "<tr><td>";
-            str += retUimEqn(uimSignals[s]);
-            str += "</td></tr>";
-          }
-          for (s=0; s<signals.length; s++) {
-            str += "<tr><td>";
-            str += retEqn(signals[s]);
-            str += "</td></tr>";
-          }
-
-          var legend = retLegend();
-		      if (legend != "") {
-		        str += "<tr><td>" + legend + "</td></tr>";
-		      }
-
-          str += "</table>";
-          str += "<form><span class='pgRef'>";
-
-          if (!parent.leftnav.IsNS()) {
-            str += "<table width='90%' align='center'>";
-            str += "<tr><td align='left'><input type='button' value='back to top' ";
-            str += "onclick='javascript:parent.leftnav.showEqnAll()' ";
-            str += "onmouseover=\"window.status='goto top of page'; return true;\" ";
-            str += "onmouseout=\"window.status=''\">";
-            str += "</td>";
-            str += "<td align='right'>";
-            str += "<input type='button' value='print page' ";
-            str += "onclick='javascript:window.print()' ";
-            str += "onmouseover=\"window.status='print page'; return true;\" ";
-            str += "onmouseout=\"window.status=''\">";
-            str += "</td>";
-            str += "</tr></table>";
-          }
-          else {
-            str += "<table width='90%' align='center'>";
-            str += "<tr><td align='left'><a href='javascript:parent.leftnav.showEqnAll()'>back to top</a>";
-            str += "</td>";
-            str += "<td align='right'>";
-            str += "<a href='javascript:window.print()'>";
-            str += "print page</a>";
-            str += "</td>";
-            str += "</tr></table>";
-          }
-
-          str += "</span></form>";
-          str += "</body></html>";
-          return str;
-        }
-      
-    </script>
-</head></html>
diff --git a/cpld/XC95144XL/MXSE_html/fit/eqns.htm b/cpld/XC95144XL/MXSE_html/fit/eqns.htm
index 71b1cf2..dd871c6 100644
--- a/cpld/XC95144XL/MXSE_html/fit/eqns.htm
+++ b/cpld/XC95144XL/MXSE_html/fit/eqns.htm
@@ -3,9 +3,9 @@
 <script src="paths.js"></script><script src="eqns.js"></script><script>
       var design = "MXSE";
       var device = "XC95144XL";
-      signals = new Array("ALE0M","ALE0S","BERR_IOBS","IOACT","IOBERR","IOL0","IOREQ","IORW0","IOU0","OpTxFX_DC609_SPECSIG","OpTxFX_DC610_SPECSIG","RA0_SPECSIG","RA10_SPECSIG","RA11_SPECSIG","RA1_SPECSIG","RA2_SPECSIG","RA3_SPECSIG","RA4_SPECSIG","RA5_SPECSIG","RA6_SPECSIG","RA7_SPECSIG","RA8_SPECSIG","RA9_SPECSIG","RefAck","TimeoutA","TimeoutB","cntRefCnt0_SPECSIG","cntRefCnt1_SPECSIG","cntRefCnt2_SPECSIG","cntRefCnt3_SPECSIG","cntRefCnt4_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG","cntRefDone_SPECSIG","cntTimeoutBPre_SPECSIG","csnOverlay0_SPECSIG","csnOverlay1_SPECSIG","fsbASrf_SPECSIG","fsbBERR0r_SPECSIG","fsbBERR1r_SPECSIG","fsbReady0r_SPECSIG","fsbReady1r_SPECSIG","fsbReady2r_SPECSIG","fsbVPA_SPECSIG","iobmBERRrf_SPECSIG","iobmBERRrr_SPECSIG","iobmDTACKrf_SPECSIG","iobmDTACKrr_SPECSIG","iobmES0_SPECSIG","iobmES1_SPECSIG","iobmES2_SPECSIG","iobmES3_SPECSIG","iobmES4_SPECSIG","iobmETACK_SPECSIG","iobmEr2_SPECSIG","iobmEr_SPECSIG","iobmIOREQr_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd4_SPECSIG","iobmRESrf_SPECSIG","iobmRESrr_SPECSIG","iobmVPArf_SPECSIG","iobmVPArr_SPECSIG","iobsClear1_SPECSIG","iobsIOACTr_SPECSIG","iobsIOL1_SPECSIG","iobsIORW1_SPECSIG","iobsIOReady_SPECSIG","iobsIOU1_SPECSIG","iobsLoad1_SPECSIG","iobsOnce_SPECSIG","iobsPS_FSM_FFd1_SPECSIG","iobsPS_FSM_FFd2_SPECSIG","nADoutLE0","nADoutLE1","nAS_IOB","nAoutOE","nBERR_FSB","nCAS","nDTACK_FSB","nDinLE","nDinOE","nDoutOE","nLDS_IOB","nOE","nRAMLWE","nRAMUWE","nRAS","nROMCS","nROMWE","nUDS_IOB","nVMA_IOB","nVPA_FSB","ramBACTr_SPECSIG","ramOnce_SPECSIG","ramRAMDIS1_SPECSIG","ramRAMDIS2_SPECSIG","ramRAMReady_SPECSIG","ramRASEL_SPECSIG","ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd3_SPECSIG");
-      sigNegs = new Array("ON","OFF","OFF","ON","OFF","OFF","ON","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","ON","OFF","OFF","OFF","OFF","ON","ON","ON","ON","ON","OFF","OFF","OFF","OFF","OFF","ON","ON","ON","OFF","OFF","OFF","OFF","OFF","OFF","ON","ON","ON","ON","OFF","OFF","OFF","OFF","OFF","OFF","OFF","ON","OFF","OFF","ON","ON","OFF","ON","OFF","ON","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","ON","ON","ON","ON","ON","ON","OFF","OFF","ON","ON","OFF","OFF","OFF","ON","OFF","OFF","ON","ON");
-      sigTypes = new Array("D","D","T","D","T","D","D","T","D","","","","","","","","","","","","","","","D","T","T","T","T","T","T","T","T","T","T","D","T","T","D","D","D","D","D","D","D","D","D","D","D","D","T","D","D","T","T","D","D","D","D","D","D","D","D","D","D","D","D","D","D","D","T","T","D","D","D","D","D","","D","D","","","D","D","D","","D","D","","","","","","","D","T","","D","T","D","T","D","D","T","T","T");
+      signals = new Array("ALE0M","ALE0S","BERR_IOBS","CLK20EN","CLK25EN","IOACT","IOBERR","IOL0","IOREQ","IORW0","IOU0","IPL2r0","IPL2r1","OpTxFX_DC708_SPECSIG","OpTxOpTxFX_DC182_INV783_SPECSIG","RA0_SPECSIG","RA10_SPECSIG","RA11_SPECSIG","RA1_SPECSIG","RA2_SPECSIG","RA3_SPECSIG","RA4_SPECSIG","RA5_SPECSIG","RA6_SPECSIG","RA7_SPECSIG","RA8_SPECSIG","RA9_SPECSIG","RESDone","RESr0","RESr1","RESr2","RefAck","TimeoutA","TimeoutB","cntRefCnt0_SPECSIG","cntRefCnt1_SPECSIG","cntRefCnt2_SPECSIG","cntRefCnt3_SPECSIG","cntRefCnt4_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG","cntRefDone_SPECSIG","cntTimeoutBPre_SPECSIG","csnOverlay0_SPECSIG","csnOverlay1_SPECSIG","fsbASrf_SPECSIG","fsbBERR0r_SPECSIG","fsbBERR1r_SPECSIG","fsbReady0r_SPECSIG","fsbReady1r_SPECSIG","fsbReady2r_SPECSIG","fsbVPA_SPECSIG","iobmBERRrf_SPECSIG","iobmBERRrr_SPECSIG","iobmBGr0_SPECSIG","iobmBGr1_SPECSIG","iobmDTACKrf_SPECSIG","iobmDTACKrr_SPECSIG","iobmES0_SPECSIG","iobmES1_SPECSIG","iobmES2_SPECSIG","iobmES3_SPECSIG","iobmES4_SPECSIG","iobmETACK_SPECSIG","iobmEr2_SPECSIG","iobmEr_SPECSIG","iobmIOREQr_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmIOS_FSM_FFd3_SPECSIG","iobmRESrf_SPECSIG","iobmRESrr_SPECSIG","iobmVPArf_SPECSIG","iobmVPArr_SPECSIG","iobsClear1_SPECSIG","iobsIOACTr_SPECSIG","iobsIOL1_SPECSIG","iobsIORW1_SPECSIG","iobsIOReady_SPECSIG","iobsIOU1_SPECSIG","iobsLoad1_SPECSIG","iobsOnce_SPECSIG","iobsPS_FSM_FFd1_SPECSIG","iobsPS_FSM_FFd2_SPECSIG","nADoutLE0","nADoutLE1","nAS_IOB","nAoutOE","nBERR_FSB","nBR_IOB","nCAS","nDTACK_FSB","nDinLE","nDinOE","nDoutOE","nLDS_IOB","nOE","nRAMLWE","nRAMUWE","nRAS","nROMCS","nROMWE","nUDS_IOB","nVMA_IOB","nVPA_FSB","ramBACTr_SPECSIG","ramOnce_SPECSIG","ramRAMDIS1_SPECSIG","ramRAMDIS2_SPECSIG","ramRAMReady_SPECSIG","ramRASEL_SPECSIG","ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd3_SPECSIG");
+      sigNegs = new Array("OFF","OFF","OFF","OFF","OFF","ON","OFF","OFF","ON","ON","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","ON","OFF","OFF","OFF","OFF","ON","ON","ON","ON","ON","OFF","OFF","OFF","OFF","OFF","OFF","OFF","ON","ON","ON","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","ON","OFF","OFF","ON","ON","OFF","ON","OFF","ON","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","ON","ON","ON","ON","ON","ON","ON","ON","OFF","ON","ON","OFF","OFF","OFF","ON","OFF","OFF","ON","ON");
+      sigTypes = new Array("D","D","T","","","D","T","D","D","T","D","D","D","","","","","","","","","","","","","","","D","D","D","D","D","T","T","T","T","T","T","T","T","T","T","D","T","T","D","D","D","D","D","D","D","D","D","D","D","D","D","D","T","D","D","T","T","D","D","D","D","D","T","D","D","D","D","D","D","D","D","T","T","D","D","D","D","D","","D","D","D","","D","D","D","D","","D","D","","","","","","","D","T","","D","T","D","T","D","D","T","T","T");
 
       
         specSig["A_FSB9_SPECSIG"]=new Array("A_FSB<9>");
@@ -40,6 +40,8 @@
       
         specSig["A_FSB16_SPECSIG"]=new Array("A_FSB<16>");
       
+        specSig["SW1_SPECSIG"]=new Array("SW<1>");
+      
         specSig["A_FSB1_SPECSIG"]=new Array("A_FSB<1>");
       
         specSig["A_FSB2_SPECSIG"]=new Array("A_FSB<2>");
@@ -54,13 +56,13 @@
       
         specSig["A_FSB7_SPECSIG"]=new Array("A_FSB<7>");
       
+        specSig["SW0_SPECSIG"]=new Array("SW<0>");
+      
         specSig["GCKI_SPECSIG"]=new Array("GCK/I");
       
         specSig["b_SPECSIG"]=new Array("(b)");
       
-        specSig["iobsIOL1_SPECSIG"]=new Array("iobs/IOL1");
-      
-        specSig["iobsOnce_SPECSIG"]=new Array("iobs/Once");
+        specSig["ramRAMDIS1_SPECSIG"]=new Array("ram/RAMDIS1");
       
         specSig["RA4_SPECSIG"]=new Array("RA<4>");
       
@@ -84,31 +86,89 @@
       
         specSig["RA9_SPECSIG"]=new Array("RA<9>");
       
-        specSig["ramRS_FSM_FFd3_SPECSIG"]=new Array("ram/RS_FSM_FFd3");
-      
         specSig["RA11_SPECSIG"]=new Array("RA<11>");
       
+        specSig["iobsOnce_SPECSIG"]=new Array("iobs/Once");
+      
+        specSig["ramBACTr_SPECSIG"]=new Array("ram/BACTr");
+      
+        specSig["iobmRESrr_SPECSIG"]=new Array("iobm/RESrr");
+      
+        specSig["iobmRESrf_SPECSIG"]=new Array("iobm/RESrf");
+      
+        specSig["fsbASrf_SPECSIG"]=new Array("fsb/ASrf");
+      
+        specSig["cntRefCnt2_SPECSIG"]=new Array("cnt/RefCnt<2>");
+      
+        specSig["cntRefCnt1_SPECSIG"]=new Array("cnt/RefCnt<1>");
+      
+        specSig["OpTxFX_DC708_SPECSIG"]=new Array("$OpTx$FX_DC$708");
+      
+        specSig["iobsIOU1_SPECSIG"]=new Array("iobs/IOU1");
+      
+        specSig["iobsIOL1_SPECSIG"]=new Array("iobs/IOL1");
+      
+        specSig["iobmIOS_FSM_FFd1_SPECSIG"]=new Array("iobm/IOS_FSM_FFd1");
+      
+        specSig["cntRefCnt0_SPECSIG"]=new Array("cnt/RefCnt<0>");
+      
+        specSig["iobmIOS_FSM_FFd2_SPECSIG"]=new Array("iobm/IOS_FSM_FFd2");
+      
+        specSig["iobmIOS_FSM_FFd3_SPECSIG"]=new Array("iobm/IOS_FSM_FFd3");
+      
         specSig["iobsLoad1_SPECSIG"]=new Array("iobs/Load1");
       
-        specSig["ramRAMDIS1_SPECSIG"]=new Array("ram/RAMDIS1");
+        specSig["iobsPS_FSM_FFd1_SPECSIG"]=new Array("iobs/PS_FSM_FFd1");
+      
+        specSig["iobsPS_FSM_FFd2_SPECSIG"]=new Array("iobs/PS_FSM_FFd2");
+      
+        specSig["ramRS_FSM_FFd1_SPECSIG"]=new Array("ram/RS_FSM_FFd1");
+      
+        specSig["ramRS_FSM_FFd2_SPECSIG"]=new Array("ram/RS_FSM_FFd2");
       
         specSig["iobsIOACTr_SPECSIG"]=new Array("iobs/IOACTr");
       
+        specSig["iobmVPArr_SPECSIG"]=new Array("iobm/VPArr");
+      
+        specSig["iobmVPArf_SPECSIG"]=new Array("iobm/VPArf");
+      
         specSig["iobmIOREQr_SPECSIG"]=new Array("iobm/IOREQr");
       
         specSig["iobmEr2_SPECSIG"]=new Array("iobm/Er2");
       
+        specSig["iobmEr_SPECSIG"]=new Array("iobm/Er");
+      
         specSig["iobmDTACKrr_SPECSIG"]=new Array("iobm/DTACKrr");
       
         specSig["iobmDTACKrf_SPECSIG"]=new Array("iobm/DTACKrf");
       
+        specSig["iobmBGr1_SPECSIG"]=new Array("iobm/BGr1");
+      
+        specSig["iobmBGr0_SPECSIG"]=new Array("iobm/BGr0");
+      
         specSig["iobmBERRrr_SPECSIG"]=new Array("iobm/BERRrr");
       
         specSig["iobmBERRrf_SPECSIG"]=new Array("iobm/BERRrf");
       
-        specSig["fsbASrf_SPECSIG"]=new Array("fsb/ASrf");
+        specSig["fsbReady1r_SPECSIG"]=new Array("fsb/Ready1r");
       
-        specSig["cntRefCnt7_SPECSIG"]=new Array("cnt/RefCnt<7>");
+        specSig["iobsIORW1_SPECSIG"]=new Array("iobs/IORW1");
+      
+        specSig["fsbReady2r_SPECSIG"]=new Array("fsb/Ready2r");
+      
+        specSig["fsbVPA_SPECSIG"]=new Array("fsb/VPA");
+      
+        specSig["iobsClear1_SPECSIG"]=new Array("iobs/Clear1");
+      
+        specSig["OpTxOpTxFX_DC182_INV783_SPECSIG"]=new Array("$OpTx$$OpTx$FX_DC$182_INV$783");
+      
+        specSig["csnOverlay1_SPECSIG"]=new Array("cs/nOverlay1");
+      
+        specSig["fsbBERR0r_SPECSIG"]=new Array("fsb/BERR0r");
+      
+        specSig["fsbBERR1r_SPECSIG"]=new Array("fsb/BERR1r");
+      
+        specSig["iobsIOReady_SPECSIG"]=new Array("iobs/IOReady");
       
         specSig["cntRefCnt6_SPECSIG"]=new Array("cnt/RefCnt<6>");
       
@@ -118,72 +178,22 @@
       
         specSig["cntRefCnt3_SPECSIG"]=new Array("cnt/RefCnt<3>");
       
-        specSig["cntRefCnt2_SPECSIG"]=new Array("cnt/RefCnt<2>");
-      
-        specSig["cntRefCnt1_SPECSIG"]=new Array("cnt/RefCnt<1>");
-      
-        specSig["cntRefCnt0_SPECSIG"]=new Array("cnt/RefCnt<0>");
-      
-        specSig["OpTxFX_DC609_SPECSIG"]=new Array("$OpTx$FX_DC$609");
-      
-        specSig["iobmEr_SPECSIG"]=new Array("iobm/Er");
-      
-        specSig["ramRS_FSM_FFd1_SPECSIG"]=new Array("ram/RS_FSM_FFd1");
-      
-        specSig["ramRS_FSM_FFd2_SPECSIG"]=new Array("ram/RS_FSM_FFd2");
-      
-        specSig["iobmVPArr_SPECSIG"]=new Array("iobm/VPArr");
-      
-        specSig["iobmVPArf_SPECSIG"]=new Array("iobm/VPArf");
-      
-        specSig["iobmRESrr_SPECSIG"]=new Array("iobm/RESrr");
-      
-        specSig["iobmRESrf_SPECSIG"]=new Array("iobm/RESrf");
-      
-        specSig["fsbVPA_SPECSIG"]=new Array("fsb/VPA");
-      
-        specSig["fsbReady1r_SPECSIG"]=new Array("fsb/Ready1r");
-      
-        specSig["iobsIORW1_SPECSIG"]=new Array("iobs/IORW1");
-      
-        specSig["fsbReady2r_SPECSIG"]=new Array("fsb/Ready2r");
-      
-        specSig["OpTxFX_DC610_SPECSIG"]=new Array("$OpTx$FX_DC$610");
-      
-        specSig["csnOverlay1_SPECSIG"]=new Array("cs/nOverlay1");
-      
-        specSig["fsbBERR0r_SPECSIG"]=new Array("fsb/BERR0r");
-      
-        specSig["fsbBERR1r_SPECSIG"]=new Array("fsb/BERR1r");
-      
-        specSig["fsbReady0r_SPECSIG"]=new Array("fsb/Ready0r");
-      
-        specSig["iobsIOReady_SPECSIG"]=new Array("iobs/IOReady");
-      
-        specSig["iobsPS_FSM_FFd1_SPECSIG"]=new Array("iobs/PS_FSM_FFd1");
-      
-        specSig["iobsPS_FSM_FFd2_SPECSIG"]=new Array("iobs/PS_FSM_FFd2");
-      
-        specSig["ramRAMReady_SPECSIG"]=new Array("ram/RAMReady");
-      
-        specSig["ramBACTr_SPECSIG"]=new Array("ram/BACTr");
-      
-        specSig["iobsClear1_SPECSIG"]=new Array("iobs/Clear1");
-      
-        specSig["iobsIOU1_SPECSIG"]=new Array("iobs/IOU1");
-      
-        specSig["iobmIOS_FSM_FFd2_SPECSIG"]=new Array("iobm/IOS_FSM_FFd2");
-      
-        specSig["iobmIOS_FSM_FFd1_SPECSIG"]=new Array("iobm/IOS_FSM_FFd1");
+        specSig["cntRefDone_SPECSIG"]=new Array("cnt/RefDone");
       
         specSig["csnOverlay0_SPECSIG"]=new Array("cs/nOverlay0");
       
-        specSig["iobmIOS_FSM_FFd3_SPECSIG"]=new Array("iobm/IOS_FSM_FFd3");
+        specSig["cntTimeoutBPre_SPECSIG"]=new Array("cnt/TimeoutBPre");
       
-        specSig["iobmIOS_FSM_FFd4_SPECSIG"]=new Array("iobm/IOS_FSM_FFd4");
+        specSig["cntRefCnt7_SPECSIG"]=new Array("cnt/RefCnt<7>");
       
         specSig["ramRASEL_SPECSIG"]=new Array("ram/RASEL");
       
+        specSig["ramRAMDIS2_SPECSIG"]=new Array("ram/RAMDIS2");
+      
+        specSig["ramOnce_SPECSIG"]=new Array("ram/Once");
+      
+        specSig["ramRS_FSM_FFd3_SPECSIG"]=new Array("ram/RS_FSM_FFd3");
+      
         specSig["iobmETACK_SPECSIG"]=new Array("iobm/ETACK");
       
         specSig["iobmES3_SPECSIG"]=new Array("iobm/ES<3>");
@@ -196,111 +206,139 @@
       
         specSig["iobmES2_SPECSIG"]=new Array("iobm/ES<2>");
       
-        specSig["cntRefDone_SPECSIG"]=new Array("cnt/RefDone");
+        specSig["ramRAMReady_SPECSIG"]=new Array("ram/RAMReady");
       
-        specSig["cntTimeoutBPre_SPECSIG"]=new Array("cnt/TimeoutBPre");
+        specSig["fsbReady0r_SPECSIG"]=new Array("fsb/Ready0r");
       
-        specSig["ramOnce_SPECSIG"]=new Array("ram/Once");
-      
-        specSig["ramRAMDIS2_SPECSIG"]=new Array("ram/RAMDIS2");
-      
-            pterms["FB1_1_1"]=new Array("IOACT");
+            pterms["FB1_1_1"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
           
-            pterms["FB1_2_1"]=new Array("IOREQ");
+            pterms["FB1_2_1"]=new Array("/nRES");
           
-            pterms["FB1_3_1"]=new Array("iobmEr_SPECSIG");
+            pterms["FB1_3_1"]=new Array("/nRES");
           
-            pterms["FB1_4_1"]=new Array("/nDTACK_IOB");
+            pterms["FB1_4_1"]=new Array("/nAS_FSB");
           
-            pterms["FB1_5_1"]=new Array("/nDTACK_IOB");
+            pterms["FB1_5_1"]=new Array("cntRefCnt0_SPECSIG","cntRefCnt1_SPECSIG");
           
-            pterms["FB1_6_1"]=new Array("/nBERR_IOB");
+            pterms["FB1_6_1"]=new Array("cntRefCnt0_SPECSIG");
           
-            pterms["FB1_7_1"]=new Array("/nBERR_IOB");
+            pterms["FB1_7_1"]=new Array("ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG");
           
-            pterms["FB1_8_1"]=new Array("/nAS_FSB");
+            pterms["FB1_8_1"]=new Array("RESr1");
           
-            pterms["FB1_9_1"]=new Array("cntRefCnt0_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt1_SPECSIG","cntRefCnt2_SPECSIG","cntRefCnt3_SPECSIG","cntRefCnt4_SPECSIG");
+            pterms["FB1_9_1"]=new Array("RESr0");
           
-            pterms["FB1_10_1"]=new Array("cntRefCnt0_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt1_SPECSIG","cntRefCnt2_SPECSIG","cntRefCnt3_SPECSIG","cntRefCnt4_SPECSIG");
+            pterms["FB1_10_1"]=new Array("/nRES");
           
-            pterms["FB1_11_1"]=new Array("cntRefCnt0_SPECSIG","cntRefCnt1_SPECSIG","cntRefCnt2_SPECSIG","cntRefCnt3_SPECSIG","cntRefCnt4_SPECSIG");
+            pterms["FB1_11_1"]=new Array("IPL2r0");
           
-            pterms["FB1_12_1"]=new Array("cntRefCnt0_SPECSIG","cntRefCnt1_SPECSIG","cntRefCnt2_SPECSIG","cntRefCnt3_SPECSIG");
+            pterms["FB1_12_1"]=new Array("/nIPL2");
           
-            pterms["FB1_13_1"]=new Array("cntRefCnt0_SPECSIG","cntRefCnt1_SPECSIG","cntRefCnt2_SPECSIG");
+            pterms["FB1_13_1"]=new Array("iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
           
-            pterms["FB1_14_1"]=new Array("cntRefCnt0_SPECSIG","cntRefCnt1_SPECSIG");
+            pterms["FB1_14_1"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
           
-            pterms["FB1_15_1"]=new Array("cntRefCnt0_SPECSIG");
+            pterms["FB1_15_1"]=new Array("/nUDS_FSB");
           
-            pterms["FB1_17_1"]=new Array("ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG");
+            pterms["FB1_15_2"]=new Array("iobsLoad1_SPECSIG");
           
-            pterms["FB1_18_1"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
+            pterms["FB1_16_1"]=new Array("/nLDS_FSB");
           
-            pterms["FB2_14_1"]=new Array("/nVPA_IOB");
+            pterms["FB1_16_2"]=new Array("iobsLoad1_SPECSIG");
           
-            pterms["FB2_15_1"]=new Array("/nVPA_IOB");
+            pterms["FB1_17_1"]=new Array("iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG");
           
-            pterms["FB2_16_1"]=new Array("/nRES");
+            pterms["FB1_17_2"]=new Array("/iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG");
           
-            pterms["FB2_17_1"]=new Array("/nRES");
+            pterms["FB1_18_1"]=new Array("/nUDS_FSB","nADoutLE1");
           
-            pterms["FB2_18_1"]=new Array("E_IOB");
+            pterms["FB1_18_2"]=new Array("iobsIOU1_SPECSIG","/nADoutLE1");
           
-            pterms["FB3_1_1"]=new Array("/A_FSB22_SPECSIG","TimeoutB","fsbVPA_SPECSIG","/OpTxFX_DC609_SPECSIG");
+            pterms["FB1_18_3"]=new Array("iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
           
-            pterms["FB3_1_2"]=new Array("A_FSB21_SPECSIG","TimeoutB","fsbVPA_SPECSIG","/OpTxFX_DC609_SPECSIG");
+            pterms["FB2_6_1"]=new Array("IOACT");
           
-            pterms["FB3_1_3"]=new Array("A_FSB23_SPECSIG","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","/OpTxFX_DC609_SPECSIG");
+            pterms["FB2_7_1"]=new Array("/nVPA_IOB");
           
-            pterms["FB3_1_4"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","fsbVPA_SPECSIG","/ramRAMReady_SPECSIG","/OpTxFX_DC609_SPECSIG");
+            pterms["FB2_8_1"]=new Array("/nVPA_IOB");
           
-            pterms["FB3_1_5"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","/OpTxFX_DC609_SPECSIG");
+            pterms["FB2_9_1"]=new Array("IOREQ");
           
-            pterms["FB3_2_1"]=new Array("BERR_IOBS","fsbVPA_SPECSIG","/OpTxFX_DC609_SPECSIG");
+            pterms["FB2_10_1"]=new Array("iobmEr_SPECSIG");
           
-            pterms["FB3_2_2"]=new Array("fsbBERR0r_SPECSIG","fsbVPA_SPECSIG","/OpTxFX_DC609_SPECSIG");
+            pterms["FB2_11_1"]=new Array("E_IOB");
           
-            pterms["FB3_2_3"]=new Array("fsbBERR1r_SPECSIG","fsbVPA_SPECSIG","/OpTxFX_DC609_SPECSIG");
+            pterms["FB2_12_1"]=new Array("/nDTACK_IOB");
           
-            pterms["FB3_2_4"]=new Array("A_FSB23_SPECSIG","TimeoutB","fsbVPA_SPECSIG","/OpTxFX_DC609_SPECSIG");
+            pterms["FB2_13_1"]=new Array("/nDTACK_IOB");
           
-            pterms["FB3_2_5"]=new Array("/A_FSB20_SPECSIG","TimeoutB","fsbVPA_SPECSIG","/OpTxFX_DC609_SPECSIG");
+            pterms["FB2_14_1"]=new Array("iobmBGr0_SPECSIG");
           
-            pterms["FB3_3_1"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","fsbVPA_SPECSIG","/ramRAMReady_SPECSIG","/OpTxFX_DC609_SPECSIG");
+            pterms["FB2_15_1"]=new Array("/nBG_IOB");
           
-            pterms["FB3_3_2"]=new Array("A_FSB14_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","/OpTxFX_DC609_SPECSIG");
+            pterms["FB2_16_1"]=new Array("/nBERR_IOB");
           
-            pterms["FB3_3_3"]=new Array("A_FSB13_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","/OpTxFX_DC609_SPECSIG");
+            pterms["FB2_17_1"]=new Array("/nBERR_IOB");
           
-            pterms["FB3_3_4"]=new Array("A_FSB14_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","/nADoutLE1","/OpTxFX_DC609_SPECSIG");
+            pterms["FB3_1_1"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
           
-            pterms["FB3_3_5"]=new Array("A_FSB13_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","/nADoutLE1","/OpTxFX_DC609_SPECSIG");
+            pterms["FB3_1_2"]=new Array("A_FSB23_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG");
           
-            pterms["FB3_4_1"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG","fsbVPA_SPECSIG","/OpTxFX_DC609_SPECSIG");
+            pterms["FB3_1_3"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG");
           
-            pterms["FB3_4_2"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG","fsbVPA_SPECSIG","/OpTxFX_DC609_SPECSIG");
+            pterms["FB3_1_4"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","/SW1_SPECSIG");
           
-            pterms["FB3_4_3"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG","fsbVPA_SPECSIG","/OpTxFX_DC609_SPECSIG");
+            pterms["FB3_1_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","csnOverlay1_SPECSIG");
           
-            pterms["FB3_4_4"]=new Array("A_FSB9_SPECSIG","A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/BERR_IOBS","/TimeoutB","/fsbBERR0r_SPECSIG","/fsbBERR1r_SPECSIG","fsbReady1r_SPECSIG","/OpTxFX_DC609_SPECSIG");
+            pterms["FB3_2_1"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
           
-            pterms["FB3_4_5"]=new Array("A_FSB9_SPECSIG","A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/BERR_IOBS","/TimeoutB","/fsbBERR0r_SPECSIG","/fsbBERR1r_SPECSIG","iobsIOReady_SPECSIG","/OpTxFX_DC609_SPECSIG");
+            pterms["FB3_2_2"]=new Array("/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
           
-            pterms["FB3_5_1"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
+            pterms["FB3_2_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB21_SPECSIG");
           
-            pterms["FB3_5_2"]=new Array("A_FSB23_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG");
+            pterms["FB3_2_4"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG");
           
-            pterms["FB3_5_3"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG");
+            pterms["FB3_2_5"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB20_SPECSIG");
           
-            pterms["FB3_5_4"]=new Array("A_FSB14_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG");
+            pterms["FB3_3_1"]=new Array("iobsOnce_SPECSIG");
           
-            pterms["FB3_5_5"]=new Array("A_FSB13_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG");
+            pterms["FB3_3_2"]=new Array("/nADoutLE1");
           
-            pterms["FB3_6_1"]=new Array("A_FSB14_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","/nADoutLE1");
+            pterms["FB3_3_3"]=new Array("nWE_FSB","iobsIORW1_SPECSIG");
           
-            pterms["FB3_6_2"]=new Array("A_FSB13_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","/nADoutLE1");
+            pterms["FB3_3_4"]=new Array("/nWE_FSB","/iobsIORW1_SPECSIG");
+          
+            pterms["FB3_3_5"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/iobsIORW1_SPECSIG");
+          
+            pterms["FB3_4_1"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB19_SPECSIG");
+          
+            pterms["FB3_4_2"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB18_SPECSIG");
+          
+            pterms["FB3_4_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB17_SPECSIG");
+          
+            pterms["FB3_4_4"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB16_SPECSIG");
+          
+            pterms["FB3_4_5"]=new Array("/A_FSB23_SPECSIG","/A_FSB20_SPECSIG","SW1_SPECSIG");
+          
+            pterms["FB3_5_1"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
+          
+            pterms["FB3_5_2"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
+          
+            pterms["FB3_5_3"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
+          
+            pterms["FB3_5_4"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
+          
+            pterms["FB3_5_5"]=new Array("/A_FSB14_SPECSIG","/A_FSB13_SPECSIG","/A_FSB23_SPECSIG","A_FSB21_SPECSIG");
+          
+            pterms["FB3_6_1"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
+          
+            pterms["FB3_6_2"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
+          
+            pterms["FB3_6_3"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
+          
+            pterms["FB3_6_4"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
+          
+            pterms["FB3_6_5"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
           
             pterms["FB3_7_1"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG","nDTACK_FSB");
           
@@ -308,13 +346,13 @@
           
             pterms["FB3_7_3"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG","nDTACK_FSB");
           
-            pterms["FB3_8_1"]=new Array("A_FSB23_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","nDTACK_FSB");
+            pterms["FB3_8_1"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
           
-            pterms["FB3_8_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","nDTACK_FSB","/ramRAMReady_SPECSIG");
+            pterms["FB3_8_2"]=new Array("A_FSB23_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","nDTACK_FSB");
           
             pterms["FB3_8_3"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","nDTACK_FSB");
           
-            pterms["FB3_8_4"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","nDTACK_FSB","/ramRAMReady_SPECSIG");
+            pterms["FB3_8_4"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","/SW1_SPECSIG","nDTACK_FSB");
           
             pterms["FB3_8_5"]=new Array("A_FSB14_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","nDTACK_FSB");
           
@@ -324,9 +362,9 @@
           
             pterms["FB3_9_3"]=new Array("fsbBERR1r_SPECSIG","nDTACK_FSB");
           
-            pterms["FB3_9_4"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
+            pterms["FB3_9_4"]=new Array("nDTACK_FSB","/nBR_IOB");
           
-            pterms["FB3_9_5"]=new Array("nDTACK_FSB","/OpTxFX_DC610_SPECSIG");
+            pterms["FB3_9_5"]=new Array("nDTACK_FSB","OpTxOpTxFX_DC182_INV783_SPECSIG");
           
             pterms["FB3_10_1"]=new Array("A_FSB13_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","nDTACK_FSB");
           
@@ -344,225 +382,229 @@
           
             pterms["FB3_11_3"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG","nDTACK_FSB");
           
-            pterms["FB3_11_4"]=new Array("A_FSB9_SPECSIG","A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/BERR_IOBS","/fsbBERR0r_SPECSIG","/fsbBERR1r_SPECSIG","fsbReady1r_SPECSIG","OpTxFX_DC610_SPECSIG");
+            pterms["FB3_11_4"]=new Array("A_FSB9_SPECSIG","A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/BERR_IOBS","/fsbBERR0r_SPECSIG","/fsbBERR1r_SPECSIG","fsbReady1r_SPECSIG","nBR_IOB","/OpTxOpTxFX_DC182_INV783_SPECSIG");
           
-            pterms["FB3_11_5"]=new Array("A_FSB9_SPECSIG","A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/BERR_IOBS","/fsbBERR0r_SPECSIG","/fsbBERR1r_SPECSIG","iobsIOReady_SPECSIG","OpTxFX_DC610_SPECSIG");
+            pterms["FB3_11_5"]=new Array("A_FSB9_SPECSIG","A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/BERR_IOBS","/fsbBERR0r_SPECSIG","/fsbBERR1r_SPECSIG","iobsIOReady_SPECSIG","nBR_IOB","/OpTxOpTxFX_DC182_INV783_SPECSIG");
           
-            pterms["FB3_12_1"]=new Array("/nWE_FSB","/iobsIORW1_SPECSIG");
+            pterms["FB3_13_1"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG","fsbVPA_SPECSIG","/OpTxFX_DC708_SPECSIG");
           
-            pterms["FB3_12_2"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
+            pterms["FB3_13_2"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG","fsbVPA_SPECSIG","/OpTxFX_DC708_SPECSIG");
           
-            pterms["FB3_12_3"]=new Array("/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
+            pterms["FB3_13_3"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG","fsbVPA_SPECSIG","/OpTxFX_DC708_SPECSIG");
           
-            pterms["FB3_12_4"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB21_SPECSIG");
+            pterms["FB3_13_4"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG","fsbVPA_SPECSIG","/OpTxFX_DC708_SPECSIG");
           
-            pterms["FB3_12_5"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG");
+            pterms["FB3_13_5"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG","fsbVPA_SPECSIG","/OpTxFX_DC708_SPECSIG");
           
-            pterms["FB3_13_1"]=new Array("iobsOnce_SPECSIG");
+            pterms["FB3_14_1"]=new Array("A_FSB23_SPECSIG","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","/OpTxFX_DC708_SPECSIG");
           
-            pterms["FB3_13_2"]=new Array("/nADoutLE1");
+            pterms["FB3_14_2"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","/OpTxFX_DC708_SPECSIG");
           
-            pterms["FB3_13_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB20_SPECSIG");
+            pterms["FB3_14_3"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","/SW1_SPECSIG","/OpTxFX_DC708_SPECSIG");
           
-            pterms["FB3_13_4"]=new Array("nWE_FSB","iobsIORW1_SPECSIG");
+            pterms["FB3_14_4"]=new Array("A_FSB14_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","/OpTxFX_DC708_SPECSIG");
           
-            pterms["FB3_13_5"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/iobsIORW1_SPECSIG");
+            pterms["FB3_14_5"]=new Array("A_FSB13_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","/OpTxFX_DC708_SPECSIG");
           
-            pterms["FB3_14_1"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB19_SPECSIG");
+            pterms["FB3_15_1"]=new Array("BERR_IOBS","fsbVPA_SPECSIG","/OpTxFX_DC708_SPECSIG");
           
-            pterms["FB3_14_2"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB18_SPECSIG");
+            pterms["FB3_15_2"]=new Array("fsbBERR0r_SPECSIG","fsbVPA_SPECSIG","/OpTxFX_DC708_SPECSIG");
           
-            pterms["FB3_14_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB17_SPECSIG");
+            pterms["FB3_15_3"]=new Array("fsbBERR1r_SPECSIG","fsbVPA_SPECSIG","/OpTxFX_DC708_SPECSIG");
           
-            pterms["FB3_14_4"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB16_SPECSIG");
+            pterms["FB3_15_4"]=new Array("fsbVPA_SPECSIG","/nBR_IOB","/OpTxFX_DC708_SPECSIG");
           
-            pterms["FB3_14_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","csnOverlay1_SPECSIG");
+            pterms["FB3_15_5"]=new Array("fsbVPA_SPECSIG","/OpTxFX_DC708_SPECSIG","OpTxOpTxFX_DC182_INV783_SPECSIG");
           
-            pterms["FB3_15_1"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
+            pterms["FB3_16_1"]=new Array("A_FSB14_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","/nADoutLE1","/OpTxFX_DC708_SPECSIG");
           
-            pterms["FB3_15_2"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
+            pterms["FB3_16_2"]=new Array("A_FSB13_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/fsbReady1r_SPECSIG","fsbVPA_SPECSIG","/iobsIOReady_SPECSIG","/nADoutLE1","/OpTxFX_DC708_SPECSIG");
           
-            pterms["FB3_15_3"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
+            pterms["FB3_16_3"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG","fsbVPA_SPECSIG","/OpTxFX_DC708_SPECSIG");
           
-            pterms["FB3_15_4"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
+            pterms["FB3_16_4"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG","fsbVPA_SPECSIG","/OpTxFX_DC708_SPECSIG");
           
-            pterms["FB3_15_5"]=new Array("/A_FSB14_SPECSIG","/A_FSB13_SPECSIG","/A_FSB23_SPECSIG","A_FSB21_SPECSIG");
-          
-            pterms["FB3_16_1"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
-          
-            pterms["FB3_16_2"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
-          
-            pterms["FB3_16_3"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
-          
-            pterms["FB3_16_4"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
-          
-            pterms["FB3_16_5"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG");
+            pterms["FB3_16_5"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG","fsbVPA_SPECSIG","/OpTxFX_DC708_SPECSIG");
           
             pterms["FB3_17_1"]=new Array("/nWE_FSB","/nAS_FSB");
           
-            pterms["FB3_18_1"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG","fsbVPA_SPECSIG","/OpTxFX_DC609_SPECSIG");
+            pterms["FB3_17_2"]=new Array("A_FSB9_SPECSIG","A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/BERR_IOBS","/fsbBERR0r_SPECSIG","/fsbBERR1r_SPECSIG","fsbReady1r_SPECSIG","nBR_IOB","/OpTxFX_DC708_SPECSIG","/OpTxOpTxFX_DC182_INV783_SPECSIG");
           
-            pterms["FB3_18_2"]=new Array("A_FSB9_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG","fsbVPA_SPECSIG","/OpTxFX_DC609_SPECSIG");
+            pterms["FB3_17_3"]=new Array("A_FSB9_SPECSIG","A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/BERR_IOBS","/fsbBERR0r_SPECSIG","/fsbBERR1r_SPECSIG","iobsIOReady_SPECSIG","nBR_IOB","/OpTxFX_DC708_SPECSIG","/OpTxOpTxFX_DC182_INV783_SPECSIG");
           
-            pterms["FB3_18_3"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG","fsbVPA_SPECSIG","/OpTxFX_DC609_SPECSIG");
+            pterms["FB3_18_1"]=new Array("iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","/nADoutLE1");
           
-            pterms["FB3_18_4"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","A_FSB14_SPECSIG","A_FSB13_SPECSIG","A_FSB12_SPECSIG","A_FSB11_SPECSIG","A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG","fsbVPA_SPECSIG","/OpTxFX_DC609_SPECSIG");
+            pterms["FB3_18_2"]=new Array("A_FSB14_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG");
           
-            pterms["FB3_18_5"]=new Array("A_FSB8_SPECSIG","A_FSB15_SPECSIG","/A_FSB14_SPECSIG","A_FSB13_SPECSIG","/A_FSB12_SPECSIG","/A_FSB11_SPECSIG","/A_FSB10_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/TimeoutA","/fsbReady2r_SPECSIG","fsbVPA_SPECSIG","/OpTxFX_DC609_SPECSIG");
+            pterms["FB3_18_3"]=new Array("A_FSB13_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/nWE_FSB","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG");
           
-            pterms["FB4_1_1"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
+            pterms["FB3_18_4"]=new Array("A_FSB14_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","/nADoutLE1");
           
-            pterms["FB4_3_1"]=new Array("iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","/nADoutLE1");
+            pterms["FB3_18_5"]=new Array("A_FSB13_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/nWE_FSB","/fsbReady1r_SPECSIG","/iobsIOReady_SPECSIG","/nADoutLE1");
           
-            pterms["FB4_4_1"]=new Array("iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
+            pterms["FB4_1_1"]=new Array("cntRefCnt0_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt1_SPECSIG","cntRefCnt2_SPECSIG","cntRefCnt3_SPECSIG","cntRefCnt4_SPECSIG");
+          
+            pterms["FB4_2_1"]=new Array("/iobmBGr0_SPECSIG","/iobmBGr1_SPECSIG");
+          
+            pterms["FB4_2_2"]=new Array("/iobmBGr1_SPECSIG","nAoutOE");
+          
+            pterms["FB4_2_3"]=new Array("/nAS_IOB","/iobmBGr0_SPECSIG","/nAoutOE");
+          
+            pterms["FB4_3_1"]=new Array("cntRefCnt0_SPECSIG","cntRefCnt1_SPECSIG","cntRefCnt2_SPECSIG","cntRefCnt3_SPECSIG","cntRefCnt4_SPECSIG");
+          
+            pterms["FB4_4_1"]=new Array("cntRefCnt0_SPECSIG","cntRefCnt1_SPECSIG","cntRefCnt2_SPECSIG","cntRefCnt3_SPECSIG");
           
             pterms["FB4_5_1"]=new Array("/IORW0");
           
-            pterms["FB4_5_2"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG");
+            pterms["FB4_5_2"]=new Array("/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG");
           
             pterms["FB4_6_1"]=new Array("A_FSB23_SPECSIG","nWE_FSB","/nAS_FSB");
           
             pterms["FB4_6_2"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","nWE_FSB","/nAS_FSB");
           
-            pterms["FB4_7_1"]=new Array("iobsPS_FSM_FFd2_SPECSIG");
+            pterms["FB4_6_3"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","nWE_FSB","/nAS_FSB","/SW1_SPECSIG");
           
-            pterms["FB4_7_2"]=new Array("iobsPS_FSM_FFd1_SPECSIG","iobsIOACTr_SPECSIG");
+            pterms["FB4_7_1"]=new Array("cntRefCnt0_SPECSIG","cntRefCnt1_SPECSIG","cntRefCnt2_SPECSIG");
           
-            pterms["FB4_8_1"]=new Array("/nUDS_FSB");
+            pterms["FB4_8_1"]=new Array("iobsPS_FSM_FFd2_SPECSIG");
           
-            pterms["FB4_8_2"]=new Array("iobsLoad1_SPECSIG");
+            pterms["FB4_8_2"]=new Array("iobsPS_FSM_FFd1_SPECSIG","iobsIOACTr_SPECSIG");
           
-            pterms["FB4_9_1"]=new Array("/nLDS_FSB");
+            pterms["FB4_9_1"]=new Array("/BERR_IOBS","/fsbBERR1r_SPECSIG");
           
-            pterms["FB4_9_2"]=new Array("iobsLoad1_SPECSIG");
+            pterms["FB4_9_2"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
           
-            pterms["FB4_10_1"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG");
+            pterms["FB4_10_1"]=new Array("csnOverlay0_SPECSIG");
           
-            pterms["FB4_10_2"]=new Array("/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG","/iobmIOS_FSM_FFd1_SPECSIG");
+            pterms["FB4_10_2"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
           
             pterms["FB4_11_1"]=new Array("fsbVPA_SPECSIG","/nAS_FSB");
           
-            pterms["FB4_12_1"]=new Array("iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG","/iobmIOS_FSM_FFd1_SPECSIG");
+            pterms["FB4_12_1"]=new Array("/cntRefDone_SPECSIG","/RefAck");
           
-            pterms["FB4_12_2"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG");
+            pterms["FB4_12_2"]=new Array("/cntRefCnt0_SPECSIG","/cntRefCnt5_SPECSIG","/cntRefCnt6_SPECSIG","/cntRefCnt1_SPECSIG","/cntRefCnt2_SPECSIG","/cntRefCnt3_SPECSIG","/cntRefCnt4_SPECSIG","/cntRefCnt7_SPECSIG");
           
-            pterms["FB4_13_1"]=new Array("/BERR_IOBS","/fsbBERR1r_SPECSIG");
+            pterms["FB4_13_1"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/A_FSB20_SPECSIG","/csnOverlay0_SPECSIG","/nAS_FSB");
           
-            pterms["FB4_13_2"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
+            pterms["FB4_13_2"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/A_FSB20_SPECSIG","/csnOverlay0_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB4_14_1"]=new Array("csnOverlay0_SPECSIG");
+            pterms["FB4_13_3"]=new Array("/nRES");
           
-            pterms["FB4_14_2"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
+            pterms["FB4_14_1"]=new Array("cntTimeoutBPre_SPECSIG","nAS_FSB","/fsbASrf_SPECSIG");
           
-            pterms["FB4_15_1"]=new Array("/TimeoutB");
+            pterms["FB4_14_2"]=new Array("/cntTimeoutBPre_SPECSIG","/nAS_FSB","/cntRefCnt0_SPECSIG","/cntRefCnt5_SPECSIG","/cntRefCnt6_SPECSIG","/cntRefCnt1_SPECSIG","/cntRefCnt2_SPECSIG","/cntRefCnt3_SPECSIG","/cntRefCnt4_SPECSIG","/cntRefCnt7_SPECSIG");
           
-            pterms["FB4_15_2"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG");
+            pterms["FB4_14_3"]=new Array("/cntTimeoutBPre_SPECSIG","/cntRefCnt0_SPECSIG","/cntRefCnt5_SPECSIG","/cntRefCnt6_SPECSIG","/cntRefCnt1_SPECSIG","/cntRefCnt2_SPECSIG","/cntRefCnt3_SPECSIG","/cntRefCnt4_SPECSIG","/cntRefCnt7_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB4_16_1"]=new Array("/nUDS_FSB","nADoutLE1");
+            pterms["FB4_15_1"]=new Array("TimeoutA","nAS_FSB","/fsbASrf_SPECSIG");
           
-            pterms["FB4_16_2"]=new Array("iobsIOU1_SPECSIG","/nADoutLE1");
+            pterms["FB4_15_2"]=new Array("/TimeoutA","/nAS_FSB","/cntRefCnt0_SPECSIG","/cntRefCnt5_SPECSIG","/cntRefCnt6_SPECSIG","/cntRefCnt1_SPECSIG","/cntRefCnt2_SPECSIG","/cntRefCnt3_SPECSIG","/cntRefCnt4_SPECSIG");
+          
+            pterms["FB4_15_3"]=new Array("/TimeoutA","/cntRefCnt0_SPECSIG","/cntRefCnt5_SPECSIG","/cntRefCnt6_SPECSIG","/cntRefCnt1_SPECSIG","/cntRefCnt2_SPECSIG","/cntRefCnt3_SPECSIG","/cntRefCnt4_SPECSIG","fsbASrf_SPECSIG");
+          
+            pterms["FB4_16_1"]=new Array("/nLDS_FSB","nADoutLE1");
+          
+            pterms["FB4_16_2"]=new Array("iobsIOL1_SPECSIG","/nADoutLE1");
           
             pterms["FB4_16_3"]=new Array("iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
           
-            pterms["FB4_17_1"]=new Array("/nLDS_FSB","nADoutLE1");
+            pterms["FB4_17_1"]=new Array("iobsIOReady_SPECSIG","nAS_FSB","/fsbASrf_SPECSIG");
           
-            pterms["FB4_17_2"]=new Array("iobsIOL1_SPECSIG","/nADoutLE1");
+            pterms["FB4_17_2"]=new Array("iobsOnce_SPECSIG","iobsIOReady_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","IOBERR","nADoutLE1");
           
-            pterms["FB4_17_3"]=new Array("iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
+            pterms["FB4_17_3"]=new Array("iobsOnce_SPECSIG","/iobsIOReady_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","/IOBERR","nADoutLE1");
           
-            pterms["FB4_18_1"]=new Array("iobsIOReady_SPECSIG","nAS_FSB","/fsbASrf_SPECSIG");
+            pterms["FB4_17_4"]=new Array("iobsOnce_SPECSIG","/iobsIOReady_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","/IOBERR","fsbASrf_SPECSIG","nADoutLE1");
           
-            pterms["FB4_18_2"]=new Array("iobsOnce_SPECSIG","iobsIOReady_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","IOBERR","nADoutLE1");
+            pterms["FB4_18_1"]=new Array("BERR_IOBS","nAS_FSB","/fsbASrf_SPECSIG");
           
-            pterms["FB4_18_3"]=new Array("iobsOnce_SPECSIG","/iobsIOReady_SPECSIG","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","/IOBERR","nADoutLE1");
+            pterms["FB4_18_2"]=new Array("iobsOnce_SPECSIG","BERR_IOBS","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","/IOBERR","nADoutLE1");
           
-            pterms["FB4_18_4"]=new Array("iobsOnce_SPECSIG","/iobsIOReady_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","/IOBERR","fsbASrf_SPECSIG","nADoutLE1");
+            pterms["FB4_18_3"]=new Array("iobsOnce_SPECSIG","/BERR_IOBS","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","IOBERR","nADoutLE1");
           
-            pterms["FB5_1_1"]=new Array("A_FSB14_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/iobsOnce_SPECSIG","IORW0","/nWE_FSB","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB4_18_4"]=new Array("iobsOnce_SPECSIG","/BERR_IOBS","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","IOBERR","fsbASrf_SPECSIG","nADoutLE1");
           
-            pterms["FB5_1_2"]=new Array("A_FSB14_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/iobsOnce_SPECSIG","IORW0","/nWE_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
+            pterms["FB5_1_1"]=new Array("/ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB5_1_3"]=new Array("A_FSB13_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/iobsOnce_SPECSIG","IORW0","/nWE_FSB","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB5_1_2"]=new Array("ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB5_1_4"]=new Array("A_FSB13_SPECSIG","A_FSB22_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","/csnOverlay1_SPECSIG","/iobsOnce_SPECSIG","IORW0","/nWE_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
+            pterms["FB5_1_3"]=new Array("A_FSB23_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
           
-            pterms["FB5_1_5"]=new Array("A_FSB14_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/iobsOnce_SPECSIG","IORW0","/nWE_FSB","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB5_1_4"]=new Array("A_FSB23_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB5_2_1"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/A_FSB20_SPECSIG");
+            pterms["FB5_1_5"]=new Array("A_FSB23_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
           
-            pterms["FB5_2_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB21_SPECSIG","/A_FSB20_SPECSIG","/csnOverlay1_SPECSIG");
+            pterms["FB5_2_1"]=new Array("A_FSB22_SPECSIG","/cntRefDone_SPECSIG","csnOverlay1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB5_2_3"]=new Array("A_FSB14_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/iobsOnce_SPECSIG","IORW0","/nWE_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
+            pterms["FB5_2_2"]=new Array("/A_FSB22_SPECSIG","/cntRefDone_SPECSIG","/csnOverlay1_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
           
-            pterms["FB5_2_4"]=new Array("A_FSB13_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/iobsOnce_SPECSIG","IORW0","/nWE_FSB","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB5_2_3"]=new Array("/A_FSB22_SPECSIG","/cntRefDone_SPECSIG","/csnOverlay1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB5_2_5"]=new Array("A_FSB13_SPECSIG","/A_FSB22_SPECSIG","A_FSB21_SPECSIG","A_FSB20_SPECSIG","A_FSB19_SPECSIG","A_FSB18_SPECSIG","A_FSB17_SPECSIG","A_FSB16_SPECSIG","csnOverlay1_SPECSIG","/iobsOnce_SPECSIG","IORW0","/nWE_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
+            pterms["FB5_2_4"]=new Array("/cntRefDone_SPECSIG","nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG","/fsbASrf_SPECSIG");
           
-            pterms["FB5_3_1"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB5_2_5"]=new Array("/cntRefDone_SPECSIG","nAS_FSB","ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG","/fsbASrf_SPECSIG");
           
-            pterms["FB5_3_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB5_3_1"]=new Array("cntRefCnt0_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt1_SPECSIG","cntRefCnt2_SPECSIG","cntRefCnt3_SPECSIG","cntRefCnt4_SPECSIG");
           
-            pterms["FB5_3_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB19_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB5_3_2"]=new Array("A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/A_FSB20_SPECSIG","/SW1_SPECSIG");
           
-            pterms["FB5_3_4"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB16_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB5_3_3"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/A_FSB20_SPECSIG","SW1_SPECSIG");
           
-            pterms["FB5_3_5"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","nWE_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB5_3_4"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/A_FSB20_SPECSIG","/csnOverlay1_SPECSIG");
           
-            pterms["FB5_4_1"]=new Array("iobsPS_FSM_FFd2_SPECSIG","iobsPS_FSM_FFd1_SPECSIG","iobsIOACTr_SPECSIG");
+            pterms["FB5_4_1"]=new Array("ramRAMDIS2_SPECSIG","nAS_FSB","/fsbASrf_SPECSIG");
           
-            pterms["FB5_4_2"]=new Array("/iobsPS_FSM_FFd2_SPECSIG","iobsPS_FSM_FFd1_SPECSIG","/iobsIOACTr_SPECSIG");
+            pterms["FB5_4_2"]=new Array("ramOnce_SPECSIG","/cntRefDone_SPECSIG","/ramRAMDIS2_SPECSIG","/nAS_FSB","ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
           
-            pterms["FB5_4_3"]=new Array("iobsOnce_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB5_4_3"]=new Array("ramOnce_SPECSIG","/cntRefDone_SPECSIG","/ramRAMDIS2_SPECSIG","ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB5_4_4"]=new Array("/A_FSB23_SPECSIG","/A_FSB20_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB5_4_4"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","ramOnce_SPECSIG","/cntRefDone_SPECSIG","csnOverlay1_SPECSIG","/ramRAMDIS2_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
           
-            pterms["FB5_4_5"]=new Array("nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","/fsbASrf_SPECSIG","nADoutLE1");
+            pterms["FB5_4_5"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","ramOnce_SPECSIG","/cntRefDone_SPECSIG","csnOverlay1_SPECSIG","/ramRAMDIS2_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG","fsbASrf_SPECSIG");
           
             pterms["FB5_5_1"]=new Array("/ramRASEL_SPECSIG");
           
-            pterms["FB5_5_2"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB18_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB5_5_2"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","ramOnce_SPECSIG","/cntRefDone_SPECSIG","/csnOverlay1_SPECSIG","/ramRAMDIS2_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
           
-            pterms["FB5_5_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB17_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
-          
-            pterms["FB5_5_4"]=new Array("/A_FSB14_SPECSIG","/A_FSB13_SPECSIG","/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
-          
-            pterms["FB5_5_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","csnOverlay1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB5_5_3"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","ramOnce_SPECSIG","/cntRefDone_SPECSIG","/csnOverlay1_SPECSIG","/ramRAMDIS2_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG","fsbASrf_SPECSIG");
           
             pterms["FB5_6_1"]=new Array("nWE_FSB","/nAS_FSB");
           
-            pterms["FB5_6_2"]=new Array("/A_FSB14_SPECSIG","/A_FSB13_SPECSIG","/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/iobsOnce_SPECSIG");
+            pterms["FB5_6_2"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
           
-            pterms["FB5_6_3"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","csnOverlay1_SPECSIG","/iobsOnce_SPECSIG");
+            pterms["FB5_6_3"]=new Array("A_FSB22_SPECSIG","/cntRefDone_SPECSIG","csnOverlay1_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
           
-            pterms["FB5_7_1"]=new Array("A_FSB23_SPECSIG","/iobsOnce_SPECSIG","iobsPS_FSM_FFd1_SPECSIG");
+            pterms["FB5_6_4"]=new Array("/A_FSB22_SPECSIG","/cntRefDone_SPECSIG","/csnOverlay1_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
           
-            pterms["FB5_7_2"]=new Array("/iobsOnce_SPECSIG","iobsPS_FSM_FFd2_SPECSIG","/nADoutLE1");
+            pterms["FB5_7_1"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
           
-            pterms["FB5_7_3"]=new Array("/iobsOnce_SPECSIG","iobsPS_FSM_FFd1_SPECSIG","/nADoutLE1");
+            pterms["FB5_7_2"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB5_7_4"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/iobsOnce_SPECSIG");
+            pterms["FB5_7_3"]=new Array("A_FSB22_SPECSIG","/cntRefDone_SPECSIG","csnOverlay1_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
           
-            pterms["FB5_7_5"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/iobsOnce_SPECSIG");
+            pterms["FB5_7_4"]=new Array("A_FSB22_SPECSIG","/cntRefDone_SPECSIG","csnOverlay1_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB5_8_1"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
+            pterms["FB5_7_5"]=new Array("/A_FSB22_SPECSIG","/cntRefDone_SPECSIG","/csnOverlay1_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
           
-            pterms["FB5_8_2"]=new Array("A_FSB23_SPECSIG","/iobsOnce_SPECSIG","iobsPS_FSM_FFd2_SPECSIG");
+            pterms["FB5_8_1"]=new Array("ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG");
           
-            pterms["FB5_8_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB20_SPECSIG","/iobsOnce_SPECSIG");
+            pterms["FB5_8_2"]=new Array("/ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB5_8_4"]=new Array("A_FSB22_SPECSIG","/iobsOnce_SPECSIG","iobsPS_FSM_FFd2_SPECSIG");
+            pterms["FB5_8_3"]=new Array("/ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB5_8_5"]=new Array("A_FSB22_SPECSIG","/iobsOnce_SPECSIG","iobsPS_FSM_FFd1_SPECSIG");
+            pterms["FB5_8_4"]=new Array("A_FSB23_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
           
-            pterms["FB5_9_1"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB19_SPECSIG","/iobsOnce_SPECSIG");
+            pterms["FB5_8_5"]=new Array("A_FSB23_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB5_9_2"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB18_SPECSIG","/iobsOnce_SPECSIG");
+            pterms["FB5_9_1"]=new Array("A_FSB23_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
           
-            pterms["FB5_9_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB17_SPECSIG","/iobsOnce_SPECSIG");
+            pterms["FB5_9_2"]=new Array("/A_FSB22_SPECSIG","/cntRefDone_SPECSIG","/csnOverlay1_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB5_9_4"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB16_SPECSIG","/iobsOnce_SPECSIG");
+            pterms["FB5_9_3"]=new Array("ramOnce_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
           
-            pterms["FB5_9_5"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/iobsOnce_SPECSIG","nWE_FSB");
+            pterms["FB5_9_4"]=new Array("/cntRefDone_SPECSIG","ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
+          
+            pterms["FB5_9_5"]=new Array("/cntRefDone_SPECSIG","nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG","/fsbASrf_SPECSIG");
           
             pterms["FB5_10_1"]=new Array("A_FSB14_SPECSIG","/ramRASEL_SPECSIG");
           
@@ -576,81 +618,95 @@
           
             pterms["FB5_11_4"]=new Array("ramRASEL_SPECSIG","A_FSB6_SPECSIG");
           
-            pterms["FB5_12_1"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
+            pterms["FB5_12_1"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB21_SPECSIG");
           
-            pterms["FB5_12_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
+            pterms["FB5_12_2"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB20_SPECSIG");
           
-            pterms["FB5_12_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB19_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
+            pterms["FB5_12_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB19_SPECSIG");
           
-            pterms["FB5_12_4"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB16_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
+            pterms["FB5_12_4"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB17_SPECSIG");
           
-            pterms["FB5_12_5"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","nWE_FSB","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
+            pterms["FB5_12_5"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB16_SPECSIG");
           
-            pterms["FB5_13_1"]=new Array("/iobsPS_FSM_FFd2_SPECSIG","iobsPS_FSM_FFd1_SPECSIG");
+            pterms["FB5_13_1"]=new Array("iobsOnce_SPECSIG");
           
-            pterms["FB5_13_2"]=new Array("iobsPS_FSM_FFd1_SPECSIG","iobsIOACTr_SPECSIG");
+            pterms["FB5_13_2"]=new Array("/nADoutLE1");
           
-            pterms["FB5_13_3"]=new Array("iobsOnce_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
+            pterms["FB5_13_3"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
           
-            pterms["FB5_13_4"]=new Array("/A_FSB23_SPECSIG","/A_FSB20_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
+            pterms["FB5_13_4"]=new Array("/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
           
-            pterms["FB5_13_5"]=new Array("nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/fsbASrf_SPECSIG","nADoutLE1");
+            pterms["FB5_13_5"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG");
           
-            pterms["FB5_14_1"]=new Array("A_FSB12_SPECSIG","/ramRASEL_SPECSIG");
+            pterms["FB5_14_1"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB18_SPECSIG");
           
-            pterms["FB5_14_2"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB18_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
+            pterms["FB5_14_2"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","nWE_FSB");
           
-            pterms["FB5_14_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB17_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
+            pterms["FB5_14_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB20_SPECSIG","SW1_SPECSIG");
           
-            pterms["FB5_14_4"]=new Array("/A_FSB14_SPECSIG","/A_FSB13_SPECSIG","/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
+            pterms["FB5_14_4"]=new Array("/A_FSB14_SPECSIG","/A_FSB13_SPECSIG","/A_FSB23_SPECSIG","A_FSB21_SPECSIG");
           
-            pterms["FB5_14_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","csnOverlay1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
+            pterms["FB5_14_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","csnOverlay1_SPECSIG");
           
             pterms["FB5_15_1"]=new Array("A_FSB16_SPECSIG","/ramRASEL_SPECSIG");
           
             pterms["FB5_15_2"]=new Array("ramRASEL_SPECSIG","A_FSB7_SPECSIG");
           
-            pterms["FB5_15_3"]=new Array("ramRASEL_SPECSIG","A_FSB3_SPECSIG");
+            pterms["FB5_15_3"]=new Array("A_FSB12_SPECSIG","/ramRASEL_SPECSIG");
           
-            pterms["FB5_16_1"]=new Array("BERR_IOBS","nAS_FSB","/fsbASrf_SPECSIG");
+            pterms["FB5_15_4"]=new Array("ramRASEL_SPECSIG","A_FSB3_SPECSIG");
           
-            pterms["FB5_16_2"]=new Array("iobsOnce_SPECSIG","BERR_IOBS","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","/IOBERR","nADoutLE1");
+            pterms["FB5_16_1"]=new Array("ramOnce_SPECSIG","nAS_FSB","/fsbASrf_SPECSIG");
           
-            pterms["FB5_16_3"]=new Array("iobsOnce_SPECSIG","/BERR_IOBS","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","IOBERR","nADoutLE1");
+            pterms["FB5_16_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/ramOnce_SPECSIG","csnOverlay1_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB5_16_4"]=new Array("iobsOnce_SPECSIG","/BERR_IOBS","/iobsPS_FSM_FFd2_SPECSIG","/iobsIOACTr_SPECSIG","IOBERR","fsbASrf_SPECSIG","nADoutLE1");
+            pterms["FB5_16_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/ramOnce_SPECSIG","csnOverlay1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB5_17_1"]=new Array("A_FSB23_SPECSIG","/iobsOnce_SPECSIG","/IORW0","nWE_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
+            pterms["FB5_16_4"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/ramOnce_SPECSIG","/csnOverlay1_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB5_17_2"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","/iobsOnce_SPECSIG","IORW0","/nWE_FSB","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB5_16_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/ramOnce_SPECSIG","/csnOverlay1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB5_17_3"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","/iobsOnce_SPECSIG","IORW0","/nWE_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
+            pterms["FB5_17_1"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/ramOnce_SPECSIG","/csnOverlay1_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG");
           
-            pterms["FB5_17_4"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","/iobsOnce_SPECSIG","/IORW0","nWE_FSB","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB5_17_2"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/ramOnce_SPECSIG","/csnOverlay1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB5_17_5"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","/iobsOnce_SPECSIG","/IORW0","nWE_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
+            pterms["FB5_17_3"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
           
-            pterms["FB5_18_1"]=new Array("IORW0","/iobsIORW1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","/nADoutLE1");
+            pterms["FB5_17_4"]=new Array("A_FSB22_SPECSIG","/cntRefDone_SPECSIG","csnOverlay1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
           
-            pterms["FB5_18_2"]=new Array("/IORW0","iobsIORW1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","/nADoutLE1");
+            pterms["FB5_17_5"]=new Array("/A_FSB22_SPECSIG","/cntRefDone_SPECSIG","/csnOverlay1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
           
-            pterms["FB5_18_3"]=new Array("A_FSB23_SPECSIG","/iobsOnce_SPECSIG","IORW0","/nWE_FSB","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB5_18_1"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/ramOnce_SPECSIG","csnOverlay1_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG");
           
-            pterms["FB5_18_4"]=new Array("A_FSB23_SPECSIG","/iobsOnce_SPECSIG","IORW0","/nWE_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG","nADoutLE1");
+            pterms["FB5_18_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/ramOnce_SPECSIG","csnOverlay1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB5_18_5"]=new Array("A_FSB23_SPECSIG","/iobsOnce_SPECSIG","/IORW0","nWE_FSB","/nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
+            pterms["FB5_18_3"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
+          
+            pterms["FB5_18_4"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
+          
+            pterms["FB5_18_5"]=new Array("A_FSB22_SPECSIG","/cntRefDone_SPECSIG","csnOverlay1_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
           
             pterms["FB6_1_1"]=new Array("/nVMA_IOB","/iobmES0_SPECSIG","/iobmES1_SPECSIG","/iobmES2_SPECSIG","/iobmES3_SPECSIG","iobmES4_SPECSIG");
           
-            pterms["FB6_1_2"]=new Array("nBERR_IOB","/iobmIOS_FSM_FFd4_SPECSIG","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","CLK_IOB","IOBERR","iobmRESrf_SPECSIG","iobmRESrr_SPECSIG");
+            pterms["FB6_1_2"]=new Array("CLK_IOB","nBERR_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","IOBERR","iobmRESrf_SPECSIG","iobmRESrr_SPECSIG");
+          
+            pterms["FB6_1_3"]=new Array("CLK_IOB","/nBERR_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","/IOBERR","iobmDTACKrf_SPECSIG","iobmDTACKrr_SPECSIG");
+          
+            pterms["FB6_1_4"]=new Array("CLK_IOB","/nBERR_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","/IOBERR","iobmBERRrf_SPECSIG","iobmBERRrr_SPECSIG");
+          
+            pterms["FB6_1_5"]=new Array("CLK_IOB","/nBERR_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","/IOBERR","iobmRESrf_SPECSIG","iobmRESrr_SPECSIG");
           
             pterms["FB6_2_1"]=new Array("/nVMA_IOB","/iobmES0_SPECSIG","/iobmES1_SPECSIG","/iobmES2_SPECSIG","/iobmES3_SPECSIG","/iobmES4_SPECSIG");
           
             pterms["FB6_2_2"]=new Array("nVMA_IOB","iobmES0_SPECSIG","iobmES1_SPECSIG","iobmES2_SPECSIG","/iobmES3_SPECSIG","/iobmES4_SPECSIG","IOACT","iobmVPArf_SPECSIG","iobmVPArr_SPECSIG");
           
-            pterms["FB6_3_1"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG");
+            pterms["FB6_2_3"]=new Array("/nAoutOE");
           
-            pterms["FB6_3_2"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG","/iobmIOREQr_SPECSIG");
+            pterms["FB6_3_1"]=new Array("iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG");
+          
+            pterms["FB6_3_2"]=new Array("iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd1_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG");
+          
+            pterms["FB6_3_3"]=new Array("/CLK_IOB","/iobmIOS_FSM_FFd1_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG","iobmIOREQr_SPECSIG","/nAoutOE");
           
             pterms["FB6_4_1"]=new Array("iobmES3_SPECSIG","/iobmEr_SPECSIG","iobmEr2_SPECSIG");
           
@@ -670,13 +726,11 @@
           
             pterms["FB6_6_3"]=new Array("/iobmES0_SPECSIG","/iobmES1_SPECSIG","/iobmES2_SPECSIG","/iobmES3_SPECSIG","/iobmES4_SPECSIG","/iobmEr2_SPECSIG");
           
-            pterms["FB6_7_1"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG");
+            pterms["FB6_7_1"]=new Array("iobmIOS_FSM_FFd2_SPECSIG");
           
-            pterms["FB6_7_2"]=new Array("iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG");
+            pterms["FB6_7_2"]=new Array("iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd1_SPECSIG");
           
-            pterms["FB6_7_3"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG","CLK_IOB");
-          
-            pterms["FB6_7_4"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG","/iobmIOREQr_SPECSIG");
+            pterms["FB6_7_3"]=new Array("/iobmIOS_FSM_FFd1_SPECSIG","iobmIOREQr_SPECSIG","/nAoutOE");
           
             pterms["FB6_8_1"]=new Array("iobmES4_SPECSIG","/iobmEr_SPECSIG","iobmEr2_SPECSIG");
           
@@ -686,35 +740,37 @@
           
             pterms["FB6_8_4"]=new Array("iobmES0_SPECSIG","iobmES1_SPECSIG","/iobmES2_SPECSIG","/iobmES3_SPECSIG","iobmES4_SPECSIG");
           
-            pterms["FB6_9_1"]=new Array("/IOL0");
+            pterms["FB6_9_1"]=new Array("IOL0","/iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG");
           
-            pterms["FB6_9_2"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG");
+            pterms["FB6_9_2"]=new Array("IOL0","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG");
           
-            pterms["FB6_9_3"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG");
+            pterms["FB6_9_3"]=new Array("/IORW0","IOL0","iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd1_SPECSIG");
           
-            pterms["FB6_9_4"]=new Array("IORW0","iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG","/iobmIOS_FSM_FFd1_SPECSIG");
+            pterms["FB6_9_4"]=new Array("/nAoutOE");
           
-            pterms["FB6_10_1"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd3_SPECSIG");
+            pterms["FB6_10_1"]=new Array("iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd1_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG");
           
-            pterms["FB6_10_2"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","CLK_IOB","iobmETACK_SPECSIG");
+            pterms["FB6_10_2"]=new Array("CLK_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmETACK_SPECSIG");
           
-            pterms["FB6_10_3"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","CLK_IOB","iobmDTACKrf_SPECSIG","iobmDTACKrr_SPECSIG");
+            pterms["FB6_10_3"]=new Array("CLK_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmDTACKrf_SPECSIG","iobmDTACKrr_SPECSIG");
           
-            pterms["FB6_10_4"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","CLK_IOB","iobmBERRrf_SPECSIG","iobmBERRrr_SPECSIG");
+            pterms["FB6_10_4"]=new Array("CLK_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmBERRrf_SPECSIG","iobmBERRrr_SPECSIG");
           
-            pterms["FB6_10_5"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","CLK_IOB","iobmRESrf_SPECSIG","iobmRESrr_SPECSIG");
+            pterms["FB6_10_5"]=new Array("CLK_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmRESrf_SPECSIG","iobmRESrr_SPECSIG");
           
-            pterms["FB6_11_1"]=new Array("/IOU0");
+            pterms["FB6_11_1"]=new Array("IOU0","/iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG");
           
-            pterms["FB6_11_2"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG");
+            pterms["FB6_11_2"]=new Array("IOU0","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG");
           
-            pterms["FB6_11_3"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG");
+            pterms["FB6_11_3"]=new Array("/IORW0","IOU0","iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd1_SPECSIG");
           
-            pterms["FB6_11_4"]=new Array("IORW0","iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG","/iobmIOS_FSM_FFd1_SPECSIG");
+            pterms["FB6_11_4"]=new Array("/nAoutOE");
           
-            pterms["FB6_12_1"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG");
+            pterms["FB6_12_1"]=new Array("/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG");
           
-            pterms["FB6_12_2"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG");
+            pterms["FB6_12_2"]=new Array("iobmIOS_FSM_FFd1_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG");
+          
+            pterms["FB6_12_3"]=new Array("/nAoutOE");
           
             pterms["FB6_13_1"]=new Array("/iobmES0_SPECSIG","/iobmES2_SPECSIG");
           
@@ -732,61 +788,61 @@
           
             pterms["FB6_15_1"]=new Array("/ALE0M","/ALE0S");
           
-            pterms["FB6_15_2"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","CLK_IOB","iobmRESrf_SPECSIG","iobmRESrr_SPECSIG");
+            pterms["FB6_15_2"]=new Array("CLK_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmDTACKrf_SPECSIG","iobmDTACKrr_SPECSIG");
           
-            pterms["FB6_16_1"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG");
+            pterms["FB6_16_1"]=new Array("iobmIOS_FSM_FFd1_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG");
           
-            pterms["FB6_16_2"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG","/iobmIOREQr_SPECSIG");
+            pterms["FB6_16_2"]=new Array("/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG","/iobmIOREQr_SPECSIG");
           
-            pterms["FB6_16_3"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","CLK_IOB","iobmETACK_SPECSIG");
+            pterms["FB6_16_3"]=new Array("/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG","nAoutOE");
           
-            pterms["FB6_16_4"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","CLK_IOB","iobmDTACKrf_SPECSIG","iobmDTACKrr_SPECSIG");
+            pterms["FB6_16_4"]=new Array("CLK_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmETACK_SPECSIG");
           
-            pterms["FB6_16_5"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","CLK_IOB","iobmBERRrf_SPECSIG","iobmBERRrr_SPECSIG");
+            pterms["FB6_16_5"]=new Array("CLK_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmBERRrf_SPECSIG","iobmBERRrr_SPECSIG");
           
-            pterms["FB6_17_1"]=new Array("iobmIOS_FSM_FFd4_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG");
+            pterms["FB6_17_1"]=new Array("iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG");
           
-            pterms["FB6_17_2"]=new Array("/iobmIOS_FSM_FFd4_SPECSIG","iobmIOS_FSM_FFd3_SPECSIG");
+            pterms["FB6_17_2"]=new Array("CLK_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmRESrf_SPECSIG","iobmRESrr_SPECSIG");
           
-            pterms["FB6_17_3"]=new Array("nBERR_IOB","/iobmIOS_FSM_FFd4_SPECSIG","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","CLK_IOB","IOBERR","iobmETACK_SPECSIG");
+            pterms["FB6_18_1"]=new Array("iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd1_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG","IOBERR");
           
-            pterms["FB6_17_4"]=new Array("nBERR_IOB","/iobmIOS_FSM_FFd4_SPECSIG","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","CLK_IOB","IOBERR","iobmDTACKrf_SPECSIG","iobmDTACKrr_SPECSIG");
+            pterms["FB6_18_2"]=new Array("CLK_IOB","nBERR_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","IOBERR","iobmETACK_SPECSIG");
           
-            pterms["FB6_17_5"]=new Array("nBERR_IOB","/iobmIOS_FSM_FFd4_SPECSIG","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","CLK_IOB","IOBERR","iobmBERRrf_SPECSIG","iobmBERRrr_SPECSIG");
+            pterms["FB6_18_3"]=new Array("CLK_IOB","/nBERR_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","/IOBERR","iobmETACK_SPECSIG");
           
-            pterms["FB6_18_1"]=new Array("iobmIOS_FSM_FFd4_SPECSIG","/iobmIOS_FSM_FFd3_SPECSIG","/iobmIOS_FSM_FFd2_SPECSIG","/iobmIOS_FSM_FFd1_SPECSIG","IOBERR");
+            pterms["FB6_18_4"]=new Array("CLK_IOB","nBERR_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","IOBERR","iobmDTACKrf_SPECSIG","iobmDTACKrr_SPECSIG");
           
-            pterms["FB6_18_2"]=new Array("/nBERR_IOB","/iobmIOS_FSM_FFd4_SPECSIG","iobmIOS_FSM_FFd3_SPECSIG","CLK_IOB","/IOBERR","iobmETACK_SPECSIG");
+            pterms["FB6_18_5"]=new Array("CLK_IOB","nBERR_IOB","iobmIOS_FSM_FFd3_SPECSIG","iobmIOS_FSM_FFd1_SPECSIG","iobmIOS_FSM_FFd2_SPECSIG","IOBERR","iobmBERRrf_SPECSIG","iobmBERRrr_SPECSIG");
           
-            pterms["FB6_18_3"]=new Array("/nBERR_IOB","/iobmIOS_FSM_FFd4_SPECSIG","iobmIOS_FSM_FFd3_SPECSIG","CLK_IOB","/IOBERR","iobmDTACKrf_SPECSIG","iobmDTACKrr_SPECSIG");
+            pterms["FB7_1_1"]=new Array("A_FSB22_SPECSIG","/cntRefDone_SPECSIG","csnOverlay1_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
           
-            pterms["FB6_18_4"]=new Array("/nBERR_IOB","/iobmIOS_FSM_FFd4_SPECSIG","iobmIOS_FSM_FFd3_SPECSIG","CLK_IOB","/IOBERR","iobmBERRrf_SPECSIG","iobmBERRrr_SPECSIG");
+            pterms["FB7_1_2"]=new Array("/A_FSB22_SPECSIG","/cntRefDone_SPECSIG","/csnOverlay1_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
           
-            pterms["FB6_18_5"]=new Array("/nBERR_IOB","/iobmIOS_FSM_FFd4_SPECSIG","iobmIOS_FSM_FFd3_SPECSIG","CLK_IOB","/IOBERR","iobmRESrf_SPECSIG","iobmRESrr_SPECSIG");
+            pterms["FB7_1_3"]=new Array("/A_FSB21_SPECSIG","/cntRefDone_SPECSIG","/csnOverlay1_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
           
-            pterms["FB7_1_1"]=new Array("ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
+            pterms["FB7_1_4"]=new Array("/A_FSB21_SPECSIG","/cntRefDone_SPECSIG","/csnOverlay1_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB7_1_2"]=new Array("/ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd1_SPECSIG");
+            pterms["FB7_1_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/ramOnce_SPECSIG","/csnOverlay1_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG");
           
-            pterms["FB7_1_3"]=new Array("/ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd3_SPECSIG");
+            pterms["FB7_2_1"]=new Array("ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB7_1_4"]=new Array("A_FSB23_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
+            pterms["FB7_2_2"]=new Array("/ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd1_SPECSIG");
           
-            pterms["FB7_1_5"]=new Array("A_FSB23_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB7_2_3"]=new Array("/ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB7_2_1"]=new Array("A_FSB11_SPECSIG","/ramRASEL_SPECSIG");
+            pterms["FB7_2_4"]=new Array("A_FSB23_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
           
-            pterms["FB7_2_2"]=new Array("ramRASEL_SPECSIG","A_FSB2_SPECSIG");
+            pterms["FB7_2_5"]=new Array("A_FSB23_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB7_2_3"]=new Array("TimeoutB","nAS_FSB","/fsbASrf_SPECSIG");
+            pterms["FB7_3_1"]=new Array("TimeoutB","nAS_FSB","/fsbASrf_SPECSIG");
           
-            pterms["FB7_2_4"]=new Array("/TimeoutB","cntTimeoutBPre_SPECSIG","/nAS_FSB","/cntRefCnt0_SPECSIG","/cntRefCnt5_SPECSIG","/cntRefCnt6_SPECSIG","/cntRefCnt1_SPECSIG","/cntRefCnt2_SPECSIG","/cntRefCnt3_SPECSIG","/cntRefCnt4_SPECSIG","/cntRefCnt7_SPECSIG");
+            pterms["FB7_3_2"]=new Array("/TimeoutB","cntTimeoutBPre_SPECSIG","/nAS_FSB","/cntRefCnt0_SPECSIG","/cntRefCnt5_SPECSIG","/cntRefCnt6_SPECSIG","/cntRefCnt1_SPECSIG","/cntRefCnt2_SPECSIG","/cntRefCnt3_SPECSIG","/cntRefCnt4_SPECSIG","/cntRefCnt7_SPECSIG");
           
-            pterms["FB7_2_5"]=new Array("/TimeoutB","cntTimeoutBPre_SPECSIG","/cntRefCnt0_SPECSIG","/cntRefCnt5_SPECSIG","/cntRefCnt6_SPECSIG","/cntRefCnt1_SPECSIG","/cntRefCnt2_SPECSIG","/cntRefCnt3_SPECSIG","/cntRefCnt4_SPECSIG","/cntRefCnt7_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB7_3_3"]=new Array("/TimeoutB","cntTimeoutBPre_SPECSIG","/cntRefCnt0_SPECSIG","/cntRefCnt5_SPECSIG","/cntRefCnt6_SPECSIG","/cntRefCnt1_SPECSIG","/cntRefCnt2_SPECSIG","/cntRefCnt3_SPECSIG","/cntRefCnt4_SPECSIG","/cntRefCnt7_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB7_3_1"]=new Array("/cntRefDone_SPECSIG","/RefAck");
+            pterms["FB7_3_4"]=new Array("A_FSB11_SPECSIG","/ramRASEL_SPECSIG");
           
-            pterms["FB7_3_2"]=new Array("/cntRefCnt0_SPECSIG","/cntRefCnt5_SPECSIG","/cntRefCnt6_SPECSIG","/cntRefCnt1_SPECSIG","/cntRefCnt2_SPECSIG","/cntRefCnt3_SPECSIG","/cntRefCnt4_SPECSIG","/cntRefCnt7_SPECSIG");
+            pterms["FB7_3_5"]=new Array("ramRASEL_SPECSIG","A_FSB2_SPECSIG");
           
             pterms["FB7_4_1"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
           
@@ -802,13 +858,15 @@
           
             pterms["FB7_6_2"]=new Array("ramRASEL_SPECSIG","A_FSB1_SPECSIG");
           
-            pterms["FB7_7_1"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/A_FSB20_SPECSIG","/csnOverlay0_SPECSIG","/nAS_FSB");
+            pterms["FB7_7_1"]=new Array("ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB7_7_2"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/A_FSB20_SPECSIG","/csnOverlay0_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB7_7_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/ramOnce_SPECSIG","csnOverlay1_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB7_7_3"]=new Array("/nRES");
+            pterms["FB7_7_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/ramOnce_SPECSIG","csnOverlay1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB7_7_4"]=new Array("A_FSB9_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","ramRASEL_SPECSIG");
+            pterms["FB7_7_4"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/ramOnce_SPECSIG","/csnOverlay1_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
+          
+            pterms["FB7_7_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/ramOnce_SPECSIG","/csnOverlay1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","fsbASrf_SPECSIG");
           
             pterms["FB7_8_1"]=new Array("A_FSB23_SPECSIG","A_FSB18_SPECSIG");
           
@@ -822,556 +880,626 @@
           
             pterms["FB7_9_1"]=new Array("A_FSB21_SPECSIG");
           
-            pterms["FB7_9_2"]=new Array("A_FSB9_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","ramRASEL_SPECSIG");
+            pterms["FB7_9_2"]=new Array("A_FSB9_SPECSIG","/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","ramRASEL_SPECSIG");
           
-            pterms["FB7_10_1"]=new Array("cntTimeoutBPre_SPECSIG","nAS_FSB","/fsbASrf_SPECSIG");
+            pterms["FB7_9_3"]=new Array("A_FSB9_SPECSIG","/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","ramRASEL_SPECSIG");
           
-            pterms["FB7_10_2"]=new Array("/cntTimeoutBPre_SPECSIG","/nAS_FSB","/cntRefCnt0_SPECSIG","/cntRefCnt5_SPECSIG","/cntRefCnt6_SPECSIG","/cntRefCnt1_SPECSIG","/cntRefCnt2_SPECSIG","/cntRefCnt3_SPECSIG","/cntRefCnt4_SPECSIG","/cntRefCnt7_SPECSIG");
+            pterms["FB7_10_1"]=new Array("A_FSB23_SPECSIG","TimeoutB");
           
-            pterms["FB7_10_3"]=new Array("/cntTimeoutBPre_SPECSIG","/cntRefCnt0_SPECSIG","/cntRefCnt5_SPECSIG","/cntRefCnt6_SPECSIG","/cntRefCnt1_SPECSIG","/cntRefCnt2_SPECSIG","/cntRefCnt3_SPECSIG","/cntRefCnt4_SPECSIG","/cntRefCnt7_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB7_10_2"]=new Array("/A_FSB22_SPECSIG","TimeoutB");
+          
+            pterms["FB7_10_3"]=new Array("A_FSB21_SPECSIG","TimeoutB");
+          
+            pterms["FB7_10_4"]=new Array("/A_FSB20_SPECSIG","TimeoutB");
+          
+            pterms["FB7_10_5"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","/ramRAMReady_SPECSIG");
           
             pterms["FB7_11_1"]=new Array("A_FSB20_SPECSIG","ramRASEL_SPECSIG");
           
             pterms["FB7_11_2"]=new Array("A_FSB19_SPECSIG","/ramRASEL_SPECSIG");
           
-            pterms["FB7_11_3"]=new Array("TimeoutA","nAS_FSB","/fsbASrf_SPECSIG");
+            pterms["FB7_11_3"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/fsbReady0r_SPECSIG","/ramRAMReady_SPECSIG");
           
-            pterms["FB7_11_4"]=new Array("/TimeoutA","/nAS_FSB","/cntRefCnt0_SPECSIG","/cntRefCnt5_SPECSIG","/cntRefCnt6_SPECSIG","/cntRefCnt1_SPECSIG","/cntRefCnt2_SPECSIG","/cntRefCnt3_SPECSIG","/cntRefCnt4_SPECSIG");
+            pterms["FB7_12_1"]=new Array("/SW0_SPECSIG");
           
-            pterms["FB7_11_5"]=new Array("/TimeoutA","/cntRefCnt0_SPECSIG","/cntRefCnt5_SPECSIG","/cntRefCnt6_SPECSIG","/cntRefCnt1_SPECSIG","/cntRefCnt2_SPECSIG","/cntRefCnt3_SPECSIG","/cntRefCnt4_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB7_12_2"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB7_12_1"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
+            pterms["FB7_12_3"]=new Array("A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB7_12_2"]=new Array("A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
+            pterms["FB7_12_4"]=new Array("/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB7_12_3"]=new Array("/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
+            pterms["FB7_12_5"]=new Array("nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/fsbASrf_SPECSIG");
           
-            pterms["FB7_12_4"]=new Array("/cntRefDone_SPECSIG","/nAS_FSB","ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
+            pterms["FB7_13_1"]=new Array("A_FSB23_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB7_12_5"]=new Array("/cntRefDone_SPECSIG","ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB7_13_2"]=new Array("ramOnce_SPECSIG","cntRefDone_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB7_13_1"]=new Array("ramOnce_SPECSIG","cntRefDone_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
+            pterms["FB7_13_3"]=new Array("ramOnce_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/cntRefCnt5_SPECSIG");
           
-            pterms["FB7_13_2"]=new Array("ramOnce_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/cntRefCnt5_SPECSIG");
+            pterms["FB7_13_4"]=new Array("ramOnce_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/cntRefCnt6_SPECSIG");
           
-            pterms["FB7_13_3"]=new Array("ramOnce_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/cntRefCnt6_SPECSIG");
+            pterms["FB7_13_5"]=new Array("ramOnce_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/cntRefCnt7_SPECSIG");
           
-            pterms["FB7_13_4"]=new Array("ramOnce_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/cntRefCnt7_SPECSIG");
+            pterms["FB7_14_1"]=new Array("SW0_SPECSIG");
           
-            pterms["FB7_13_5"]=new Array("nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/fsbASrf_SPECSIG");
+            pterms["FB7_14_2"]=new Array("/cntRefDone_SPECSIG","/nAS_FSB","ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
           
-            pterms["FB7_14_1"]=new Array("A_FSB23_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
+            pterms["FB7_14_3"]=new Array("/cntRefDone_SPECSIG","ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB7_14_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB7_15_1"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB7_14_3"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
+            pterms["FB7_15_2"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB7_14_4"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB7_15_3"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB7_14_5"]=new Array("/cntRefDone_SPECSIG","nAS_FSB","ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG","/fsbASrf_SPECSIG");
+            pterms["FB7_15_4"]=new Array("/cntRefDone_SPECSIG","nAS_FSB","ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG","/fsbASrf_SPECSIG");
           
-            pterms["FB7_15_1"]=new Array("/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/cntRefCnt5_SPECSIG","ramBACTr_SPECSIG");
+            pterms["FB7_16_1"]=new Array("/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/cntRefCnt5_SPECSIG","ramBACTr_SPECSIG");
           
-            pterms["FB7_15_2"]=new Array("nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/cntRefCnt5_SPECSIG","/fsbASrf_SPECSIG");
+            pterms["FB7_16_2"]=new Array("nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/cntRefCnt5_SPECSIG","/fsbASrf_SPECSIG");
           
-            pterms["FB7_15_3"]=new Array("nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/cntRefCnt6_SPECSIG","/fsbASrf_SPECSIG");
+            pterms["FB7_16_3"]=new Array("nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/cntRefCnt6_SPECSIG","/fsbASrf_SPECSIG");
           
-            pterms["FB7_15_4"]=new Array("nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/cntRefCnt7_SPECSIG","/fsbASrf_SPECSIG");
+            pterms["FB7_16_4"]=new Array("nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/cntRefCnt7_SPECSIG","/fsbASrf_SPECSIG");
           
-            pterms["FB7_15_5"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
+            pterms["FB7_16_5"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB7_16_1"]=new Array("ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
+            pterms["FB7_17_1"]=new Array("ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB7_16_2"]=new Array("cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
+            pterms["FB7_17_2"]=new Array("cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
           
-            pterms["FB7_16_3"]=new Array("/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/cntRefCnt6_SPECSIG","ramBACTr_SPECSIG");
+            pterms["FB7_17_3"]=new Array("/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","/cntRefCnt6_SPECSIG","ramBACTr_SPECSIG");
           
-            pterms["FB7_16_4"]=new Array("/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","ramBACTr_SPECSIG","/cntRefCnt7_SPECSIG");
+            pterms["FB7_17_4"]=new Array("/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","ramBACTr_SPECSIG","/cntRefCnt7_SPECSIG");
           
-            pterms["FB7_16_5"]=new Array("/cntRefDone_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
+            pterms["FB7_17_5"]=new Array("/cntRefDone_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
           
-            pterms["FB7_17_1"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG");
+            pterms["FB7_18_1"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/ramOnce_SPECSIG","csnOverlay1_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG");
           
-            pterms["FB7_17_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB7_18_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/ramOnce_SPECSIG","csnOverlay1_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB7_17_3"]=new Array("A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB7_18_3"]=new Array("A_FSB22_SPECSIG","/cntRefDone_SPECSIG","csnOverlay1_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB7_17_4"]=new Array("/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB7_18_4"]=new Array("/A_FSB22_SPECSIG","/cntRefDone_SPECSIG","/csnOverlay1_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB7_17_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB7_18_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/ramOnce_SPECSIG","/csnOverlay1_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG");
           
-            pterms["FB7_18_1"]=new Array("A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
+            pterms["FB8_1_1"]=new Array("IORW0","iobsIORW1_SPECSIG","/nADoutLE1");
           
-            pterms["FB7_18_2"]=new Array("/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
+            pterms["FB8_1_2"]=new Array("/IORW0","/iobsIORW1_SPECSIG","/nADoutLE1");
           
-            pterms["FB7_18_3"]=new Array("/A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
+            pterms["FB8_1_3"]=new Array("nAS_FSB","/fsbASrf_SPECSIG","nADoutLE1");
           
-            pterms["FB7_18_4"]=new Array("/A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB8_1_4"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB21_SPECSIG","nADoutLE1");
           
-            pterms["FB7_18_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG");
+            pterms["FB8_1_5"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/IORW0","nADoutLE1");
           
-            pterms["FB8_1_1"]=new Array("/ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd3_SPECSIG");
+            pterms["FB8_2_1"]=new Array("A_FSB19_SPECSIG");
           
-            pterms["FB8_1_2"]=new Array("ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
+            pterms["FB8_2_2"]=new Array("iobsPS_FSM_FFd2_SPECSIG");
           
-            pterms["FB8_1_3"]=new Array("A_FSB23_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
+            pterms["FB8_2_3"]=new Array("iobsPS_FSM_FFd1_SPECSIG");
           
-            pterms["FB8_1_4"]=new Array("A_FSB23_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB8_2_4"]=new Array("iobsOnce_SPECSIG","nADoutLE1");
           
-            pterms["FB8_1_5"]=new Array("A_FSB23_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
+            pterms["FB8_2_5"]=new Array("IORW0","nWE_FSB","nADoutLE1");
           
-            pterms["FB8_2_1"]=new Array("A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB8_3_1"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
           
-            pterms["FB8_2_2"]=new Array("/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
+            pterms["FB8_3_2"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB20_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
           
-            pterms["FB8_2_3"]=new Array("/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB8_3_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB19_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
           
-            pterms["FB8_2_4"]=new Array("/cntRefDone_SPECSIG","nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG","/fsbASrf_SPECSIG");
+            pterms["FB8_3_4"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB17_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
           
-            pterms["FB8_2_5"]=new Array("/cntRefDone_SPECSIG","nAS_FSB","ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG","/fsbASrf_SPECSIG");
+            pterms["FB8_3_5"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB16_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
           
-            pterms["FB8_3_1"]=new Array("/TimeoutB","/fsbBERR0r_SPECSIG");
+            pterms["FB8_4_1"]=new Array("iobsPS_FSM_FFd2_SPECSIG","iobsPS_FSM_FFd1_SPECSIG","iobsIOACTr_SPECSIG");
           
-            pterms["FB8_3_2"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
+            pterms["FB8_4_2"]=new Array("/iobsPS_FSM_FFd2_SPECSIG","iobsPS_FSM_FFd1_SPECSIG","/iobsIOACTr_SPECSIG");
           
-            pterms["FB8_3_3"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","/fsbBERR0r_SPECSIG");
+            pterms["FB8_4_3"]=new Array("iobsOnce_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
           
-            pterms["FB8_3_4"]=new Array("A_FSB19_SPECSIG");
+            pterms["FB8_4_4"]=new Array("nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","/fsbASrf_SPECSIG","nADoutLE1");
           
-            pterms["FB8_4_1"]=new Array("ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd3_SPECSIG");
+            pterms["FB8_4_5"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
           
-            pterms["FB8_4_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
+            pterms["FB8_5_1"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB18_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
           
-            pterms["FB8_4_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB8_5_2"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","nWE_FSB","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
           
-            pterms["FB8_4_4"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
+            pterms["FB8_5_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB20_SPECSIG","SW1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
           
-            pterms["FB8_4_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB8_5_4"]=new Array("/A_FSB14_SPECSIG","/A_FSB13_SPECSIG","/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
           
-            pterms["FB8_5_1"]=new Array("RefAck");
-          
-            pterms["FB8_5_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramRAMDIS2_SPECSIG","/nAS_FSB","/ramRAMDIS1_SPECSIG");
-          
-            pterms["FB8_5_3"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/ramRAMDIS2_SPECSIG","/nAS_FSB","/ramRAMDIS1_SPECSIG");
+            pterms["FB8_5_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","csnOverlay1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG","nADoutLE1");
           
             pterms["FB8_6_1"]=new Array("/nWE_FSB","/nLDS_FSB","/ramRAMDIS2_SPECSIG","/nAS_FSB","/ramRAMDIS1_SPECSIG");
           
-            pterms["FB8_7_1"]=new Array("ramOnce_SPECSIG","nAS_FSB","/fsbASrf_SPECSIG");
+            pterms["FB8_6_2"]=new Array("RefAck");
           
-            pterms["FB8_7_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
+            pterms["FB8_6_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramRAMDIS2_SPECSIG","/nAS_FSB","/ramRAMDIS1_SPECSIG");
           
-            pterms["FB8_7_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB8_6_4"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/ramRAMDIS2_SPECSIG","/nAS_FSB","/ramRAMDIS1_SPECSIG");
           
-            pterms["FB8_7_4"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
+            pterms["FB8_7_1"]=new Array("/RESr0","/RESr1","RESr2");
           
-            pterms["FB8_7_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB8_7_2"]=new Array("/nWE_FSB","/nUDS_FSB","/ramRAMDIS2_SPECSIG","/nAS_FSB","/ramRAMDIS1_SPECSIG");
           
-            pterms["FB8_8_1"]=new Array("/nWE_FSB","/nUDS_FSB","/ramRAMDIS2_SPECSIG","/nAS_FSB","/ramRAMDIS1_SPECSIG");
+            pterms["FB8_8_1"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
           
-            pterms["FB8_8_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB21_SPECSIG");
+            pterms["FB8_8_2"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB20_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
           
-            pterms["FB8_8_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG");
+            pterms["FB8_8_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB19_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
           
-            pterms["FB8_8_4"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB19_SPECSIG");
+            pterms["FB8_8_4"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB17_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
           
-            pterms["FB8_8_5"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","nWE_FSB");
+            pterms["FB8_8_5"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB16_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
           
-            pterms["FB8_9_1"]=new Array("iobsOnce_SPECSIG");
+            pterms["FB8_9_1"]=new Array("/iobsPS_FSM_FFd2_SPECSIG","iobsPS_FSM_FFd1_SPECSIG");
           
-            pterms["FB8_9_2"]=new Array("/nADoutLE1");
+            pterms["FB8_9_2"]=new Array("iobsPS_FSM_FFd1_SPECSIG","iobsIOACTr_SPECSIG");
           
-            pterms["FB8_9_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB20_SPECSIG");
+            pterms["FB8_9_3"]=new Array("iobsOnce_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
           
-            pterms["FB8_9_4"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
+            pterms["FB8_9_4"]=new Array("nAS_FSB","/iobsPS_FSM_FFd2_SPECSIG","/fsbASrf_SPECSIG","nADoutLE1");
           
-            pterms["FB8_9_5"]=new Array("/iobsPS_FSM_FFd2_SPECSIG","/iobsPS_FSM_FFd1_SPECSIG");
+            pterms["FB8_9_5"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
           
-            pterms["FB8_10_1"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB18_SPECSIG");
+            pterms["FB8_10_1"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB18_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
           
-            pterms["FB8_10_2"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB17_SPECSIG");
+            pterms["FB8_10_2"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","nWE_FSB","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
           
-            pterms["FB8_10_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB16_SPECSIG");
+            pterms["FB8_10_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB20_SPECSIG","SW1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
           
-            pterms["FB8_10_4"]=new Array("/A_FSB14_SPECSIG","/A_FSB13_SPECSIG","/A_FSB23_SPECSIG","A_FSB21_SPECSIG");
+            pterms["FB8_10_4"]=new Array("/A_FSB14_SPECSIG","/A_FSB13_SPECSIG","/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
           
-            pterms["FB8_10_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","csnOverlay1_SPECSIG");
+            pterms["FB8_10_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","csnOverlay1_SPECSIG","/iobsPS_FSM_FFd2_SPECSIG","nADoutLE1");
           
-            pterms["FB8_11_1"]=new Array("nAS_FSB");
+            pterms["FB8_11_1"]=new Array("/BERR_IOBS","/TimeoutB","/fsbBERR0r_SPECSIG","/fsbBERR1r_SPECSIG");
           
-            pterms["FB8_11_2"]=new Array("/BERR_IOBS","/TimeoutB","/fsbBERR0r_SPECSIG","/fsbBERR1r_SPECSIG");
+            pterms["FB8_11_2"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","/BERR_IOBS","/fsbBERR0r_SPECSIG","/fsbBERR1r_SPECSIG");
           
-            pterms["FB8_11_3"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","/BERR_IOBS","/fsbBERR0r_SPECSIG","/fsbBERR1r_SPECSIG");
+            pterms["FB8_12_1"]=new Array("nAS_FSB");
           
-            pterms["FB8_12_1"]=new Array("ramOnce_SPECSIG","/cntRefDone_SPECSIG","/ramRAMDIS2_SPECSIG","ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB8_12_2"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/iobsOnce_SPECSIG","nWE_FSB");
           
-            pterms["FB8_12_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","ramOnce_SPECSIG","/cntRefDone_SPECSIG","/ramRAMDIS2_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
+            pterms["FB8_12_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB20_SPECSIG","/iobsOnce_SPECSIG","SW1_SPECSIG");
           
-            pterms["FB8_12_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","ramOnce_SPECSIG","/cntRefDone_SPECSIG","/ramRAMDIS2_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB8_12_4"]=new Array("/A_FSB14_SPECSIG","/A_FSB13_SPECSIG","/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/iobsOnce_SPECSIG");
           
-            pterms["FB8_12_4"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","ramOnce_SPECSIG","/cntRefDone_SPECSIG","/ramRAMDIS2_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
+            pterms["FB8_12_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/iobsOnce_SPECSIG","csnOverlay1_SPECSIG");
           
-            pterms["FB8_12_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","ramOnce_SPECSIG","/cntRefDone_SPECSIG","/ramRAMDIS2_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB8_13_1"]=new Array("A_FSB23_SPECSIG","/iobsOnce_SPECSIG","iobsPS_FSM_FFd1_SPECSIG");
           
-            pterms["FB8_13_1"]=new Array("ramRAMDIS2_SPECSIG","nAS_FSB","/fsbASrf_SPECSIG");
+            pterms["FB8_13_2"]=new Array("/iobsOnce_SPECSIG","iobsPS_FSM_FFd1_SPECSIG","/nADoutLE1");
           
-            pterms["FB8_13_2"]=new Array("ramOnce_SPECSIG","/cntRefDone_SPECSIG","/ramRAMDIS2_SPECSIG","/nAS_FSB","ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
+            pterms["FB8_13_3"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/iobsOnce_SPECSIG");
           
-            pterms["FB8_13_3"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
+            pterms["FB8_13_4"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/iobsOnce_SPECSIG","/csnOverlay1_SPECSIG");
           
-            pterms["FB8_13_4"]=new Array("A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
+            pterms["FB8_13_5"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB20_SPECSIG","/iobsOnce_SPECSIG");
           
-            pterms["FB8_13_5"]=new Array("/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
+            pterms["FB8_14_1"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
           
-            pterms["FB8_14_1"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
+            pterms["FB8_14_2"]=new Array("A_FSB23_SPECSIG","/iobsOnce_SPECSIG","iobsPS_FSM_FFd2_SPECSIG");
           
-            pterms["FB8_14_2"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB8_14_3"]=new Array("A_FSB22_SPECSIG","/iobsOnce_SPECSIG","iobsPS_FSM_FFd2_SPECSIG");
           
-            pterms["FB8_14_3"]=new Array("A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
+            pterms["FB8_14_4"]=new Array("A_FSB22_SPECSIG","/iobsOnce_SPECSIG","iobsPS_FSM_FFd1_SPECSIG");
           
-            pterms["FB8_14_4"]=new Array("A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB8_14_5"]=new Array("/iobsOnce_SPECSIG","iobsPS_FSM_FFd2_SPECSIG","/nADoutLE1");
           
-            pterms["FB8_14_5"]=new Array("/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
+            pterms["FB8_15_1"]=new Array("RESr0","RESr1","IPL2r0","RESr2","/RESDone","IPL2r1");
           
-            pterms["FB8_15_1"]=new Array("ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG");
+            pterms["FB8_15_2"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB19_SPECSIG","/iobsOnce_SPECSIG");
           
-            pterms["FB8_15_2"]=new Array("/ramRS_FSM_FFd1_SPECSIG","ramRS_FSM_FFd3_SPECSIG");
+            pterms["FB8_15_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB18_SPECSIG","/iobsOnce_SPECSIG");
           
-            pterms["FB8_15_3"]=new Array("/ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd1_SPECSIG","/ramRS_FSM_FFd3_SPECSIG");
+            pterms["FB8_15_4"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB17_SPECSIG","/iobsOnce_SPECSIG");
           
-            pterms["FB8_15_4"]=new Array("A_FSB23_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
+            pterms["FB8_15_5"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB16_SPECSIG","/iobsOnce_SPECSIG");
           
-            pterms["FB8_15_5"]=new Array("A_FSB23_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB8_16_1"]=new Array("/TimeoutB","/fsbBERR0r_SPECSIG");
           
-            pterms["FB8_16_1"]=new Array("A_FSB23_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
+            pterms["FB8_16_2"]=new Array("nAS_FSB","/fsbASrf_SPECSIG");
           
-            pterms["FB8_16_2"]=new Array("/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB8_16_3"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","/A_FSB21_SPECSIG","A_FSB20_SPECSIG","/fsbBERR0r_SPECSIG");
           
-            pterms["FB8_16_3"]=new Array("ramOnce_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
+            pterms["FB8_17_1"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB19_SPECSIG","nADoutLE1");
           
-            pterms["FB8_16_4"]=new Array("/cntRefDone_SPECSIG","ramRS_FSM_FFd2_SPECSIG","ramRS_FSM_FFd3_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
+            pterms["FB8_17_2"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB18_SPECSIG","nADoutLE1");
           
-            pterms["FB8_16_5"]=new Array("/cntRefDone_SPECSIG","nAS_FSB","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG","/fsbASrf_SPECSIG");
+            pterms["FB8_17_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB17_SPECSIG","nADoutLE1");
           
-            pterms["FB8_17_1"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG");
+            pterms["FB8_17_4"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB16_SPECSIG","nADoutLE1");
           
-            pterms["FB8_17_2"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","/csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB8_17_5"]=new Array("/A_FSB23_SPECSIG","/A_FSB20_SPECSIG","SW1_SPECSIG","nADoutLE1");
           
-            pterms["FB8_17_3"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
+            pterms["FB8_18_1"]=new Array("/IORW0","/nWE_FSB","nADoutLE1");
           
-            pterms["FB8_17_4"]=new Array("A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
+            pterms["FB8_18_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","nADoutLE1");
           
-            pterms["FB8_17_5"]=new Array("/A_FSB22_SPECSIG","/csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","cntRefCnt5_SPECSIG","cntRefCnt6_SPECSIG","cntRefCnt7_SPECSIG");
+            pterms["FB8_18_3"]=new Array("/A_FSB23_SPECSIG","A_FSB21_SPECSIG","/A_FSB20_SPECSIG","nADoutLE1");
           
-            pterms["FB8_18_1"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG");
+            pterms["FB8_18_4"]=new Array("/A_FSB14_SPECSIG","/A_FSB13_SPECSIG","/A_FSB23_SPECSIG","A_FSB21_SPECSIG","nADoutLE1");
           
-            pterms["FB8_18_2"]=new Array("/A_FSB23_SPECSIG","/A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/ramOnce_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","fsbASrf_SPECSIG");
+            pterms["FB8_18_5"]=new Array("/A_FSB23_SPECSIG","A_FSB22_SPECSIG","A_FSB21_SPECSIG","csnOverlay1_SPECSIG","nADoutLE1");
           
-            pterms["FB8_18_3"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
+          d2["ramBACTr_SPECSIG"]=new Array("FB1_1_1");
           
-            pterms["FB8_18_4"]=new Array("A_FSB22_SPECSIG","/A_FSB21_SPECSIG","/cntRefDone_SPECSIG","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG","fsbASrf_SPECSIG");
+            d2imp["ramBACTr_SPECSIG"]=new Array("1");
           
-            pterms["FB8_18_5"]=new Array("A_FSB22_SPECSIG","csnOverlay1_SPECSIG","/cntRefDone_SPECSIG","/nAS_FSB","/ramRS_FSM_FFd2_SPECSIG","/ramRS_FSM_FFd1_SPECSIG","/ramBACTr_SPECSIG");
+              gblclk["ramBACTr_SPECSIG"]=new Array("CLK_FSB");
+            prld["ramBACTr_SPECSIG"]="GND";
+          d2["iobmRESrr_SPECSIG"]=new Array("FB1_2_1");
           
-          d2["iobsIOACTr_SPECSIG"]=new Array("FB1_1_1");
+            d2imp["iobmRESrr_SPECSIG"]=new Array("1");
           
-            d2imp["iobsIOACTr_SPECSIG"]=new Array("1");
+              gblclk["iobmRESrr_SPECSIG"]=new Array("CLK2X_IOB");
+            prld["iobmRESrr_SPECSIG"]="GND";
+          d2["iobmRESrf_SPECSIG"]=new Array("FB1_3_1");
           
-              gblclk["iobsIOACTr_SPECSIG"]=new Array("CLK_FSB");
-            prld["iobsIOACTr_SPECSIG"]="GND";
-          d2["iobmIOREQr_SPECSIG"]=new Array("FB1_2_1");
-          
-            d2imp["iobmIOREQr_SPECSIG"]=new Array("1");
-          clkNegs["iobmIOREQr_SPECSIG"]=1;
-              gblclk["iobmIOREQr_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmIOREQr_SPECSIG"]="GND";
-          d2["iobmEr2_SPECSIG"]=new Array("FB1_3_1");
-          
-            d2imp["iobmEr2_SPECSIG"]=new Array("1");
-          
-              gblclk["iobmEr2_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmEr2_SPECSIG"]="GND";
-          d2["iobmDTACKrr_SPECSIG"]=new Array("FB1_4_1");
-          
-            d2imp["iobmDTACKrr_SPECSIG"]=new Array("1");
-          
-              gblclk["iobmDTACKrr_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmDTACKrr_SPECSIG"]="GND";
-          d2["iobmDTACKrf_SPECSIG"]=new Array("FB1_5_1");
-          
-            d2imp["iobmDTACKrf_SPECSIG"]=new Array("1");
-          clkNegs["iobmDTACKrf_SPECSIG"]=1;
-              gblclk["iobmDTACKrf_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmDTACKrf_SPECSIG"]="GND";
-          d2["iobmBERRrr_SPECSIG"]=new Array("FB1_6_1");
-          
-            d2imp["iobmBERRrr_SPECSIG"]=new Array("1");
-          
-              gblclk["iobmBERRrr_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmBERRrr_SPECSIG"]="GND";
-          d2["iobmBERRrf_SPECSIG"]=new Array("FB1_7_1");
-          
-            d2imp["iobmBERRrf_SPECSIG"]=new Array("1");
-          clkNegs["iobmBERRrf_SPECSIG"]=1;
-              gblclk["iobmBERRrf_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmBERRrf_SPECSIG"]="GND";
-          d2["fsbASrf_SPECSIG"]=new Array("FB1_8_1");
+            d2imp["iobmRESrf_SPECSIG"]=new Array("1");
+          clkNegs["iobmRESrf_SPECSIG"]=1;
+              gblclk["iobmRESrf_SPECSIG"]=new Array("CLK2X_IOB");
+            prld["iobmRESrf_SPECSIG"]="GND";
+          d2["fsbASrf_SPECSIG"]=new Array("FB1_4_1");
           
             d2imp["fsbASrf_SPECSIG"]=new Array("1");
           clkNegs["fsbASrf_SPECSIG"]=1;
               gblclk["fsbASrf_SPECSIG"]=new Array("CLK_FSB");
             prld["fsbASrf_SPECSIG"]="GND";
-          d2["cntRefCnt7_SPECSIG"]=new Array("FB1_9_1");
-          
-            d2imp["cntRefCnt7_SPECSIG"]=new Array("1");
-          
-              gblclk["cntRefCnt7_SPECSIG"]=new Array("CLK_FSB");
-            prld["cntRefCnt7_SPECSIG"]="GND";
-          d2["cntRefCnt6_SPECSIG"]=new Array("FB1_10_1");
-          
-            d2imp["cntRefCnt6_SPECSIG"]=new Array("1");
-          
-              gblclk["cntRefCnt6_SPECSIG"]=new Array("CLK_FSB");
-            prld["cntRefCnt6_SPECSIG"]="GND";
-          d2["cntRefCnt5_SPECSIG"]=new Array("FB1_11_1");
-          
-            d2imp["cntRefCnt5_SPECSIG"]=new Array("1");
-          
-              gblclk["cntRefCnt5_SPECSIG"]=new Array("CLK_FSB");
-            prld["cntRefCnt5_SPECSIG"]="GND";
-          d2["cntRefCnt4_SPECSIG"]=new Array("FB1_12_1");
-          
-            d2imp["cntRefCnt4_SPECSIG"]=new Array("1");
-          
-              gblclk["cntRefCnt4_SPECSIG"]=new Array("CLK_FSB");
-            prld["cntRefCnt4_SPECSIG"]="GND";
-          d2["cntRefCnt3_SPECSIG"]=new Array("FB1_13_1");
-          
-            d2imp["cntRefCnt3_SPECSIG"]=new Array("1");
-          
-              gblclk["cntRefCnt3_SPECSIG"]=new Array("CLK_FSB");
-            prld["cntRefCnt3_SPECSIG"]="GND";
-          d2["cntRefCnt2_SPECSIG"]=new Array("FB1_14_1");
+          d2["cntRefCnt2_SPECSIG"]=new Array("FB1_5_1");
           
             d2imp["cntRefCnt2_SPECSIG"]=new Array("1");
           
               gblclk["cntRefCnt2_SPECSIG"]=new Array("CLK_FSB");
             prld["cntRefCnt2_SPECSIG"]="GND";
-          d2["cntRefCnt1_SPECSIG"]=new Array("FB1_15_1");
+          d2["cntRefCnt1_SPECSIG"]=new Array("FB1_6_1");
           
             d2imp["cntRefCnt1_SPECSIG"]=new Array("1");
           
               gblclk["cntRefCnt1_SPECSIG"]=new Array("CLK_FSB");
             prld["cntRefCnt1_SPECSIG"]="GND";
+          d2["RefAck"]=new Array("FB1_7_1");
+          
+            d2imp["RefAck"]=new Array("1");
+          
+              gblclk["RefAck"]=new Array("CLK_FSB");
+            prld["RefAck"]="GND";
+          d2["RESr2"]=new Array("FB1_8_1");
+          
+            d2imp["RESr2"]=new Array("1");
+          
+              gblclk["RESr2"]=new Array("CLK_FSB");
+            prld["RESr2"]="GND";
+          d2["RESr1"]=new Array("FB1_9_1");
+          
+            d2imp["RESr1"]=new Array("1");
+          
+              gblclk["RESr1"]=new Array("CLK_FSB");
+            prld["RESr1"]="GND";
+          d2["RESr0"]=new Array("FB1_10_1");
+          
+            d2imp["RESr0"]=new Array("1");
+          
+              gblclk["RESr0"]=new Array("CLK_FSB");
+            prld["RESr0"]="GND";
+          d2["IPL2r1"]=new Array("FB1_11_1");
+          
+            d2imp["IPL2r1"]=new Array("1");
+          
+              gblclk["IPL2r1"]=new Array("CLK_FSB");
+            prld["IPL2r1"]="GND";
+          d2["IPL2r0"]=new Array("FB1_12_1");
+          
+            d2imp["IPL2r0"]=new Array("1");
+          
+              gblclk["IPL2r0"]=new Array("CLK_FSB");
+            prld["IPL2r0"]="GND";
+          d2["ALE0S"]=new Array("FB1_13_1");
+          
+            d2imp["ALE0S"]=new Array("1");
+          
+              gblclk["ALE0S"]=new Array("CLK_FSB");
+            prld["ALE0S"]="GND";
+          d2["OpTxFX_DC708_SPECSIG"]=new Array("FB1_14_1");
+          
+            d2imp["OpTxFX_DC708_SPECSIG"]=new Array("1");
+          
+          d2["iobsIOU1_SPECSIG"]=new Array("FB1_15_1");
+          
+            d2imp["iobsIOU1_SPECSIG"]=new Array("1");
+          
+              gblclk["iobsIOU1_SPECSIG"]=new Array("CLK_FSB");
+            
+          ce["iobsIOU1_SPECSIG"]=new Array("FB1_15_2");
+          
+            ceimp["iobsIOU1_SPECSIG"]=new Array("1");
+          prld["iobsIOU1_SPECSIG"]="GND";
+          d2["iobsIOL1_SPECSIG"]=new Array("FB1_16_1");
+          
+            d2imp["iobsIOL1_SPECSIG"]=new Array("1");
+          
+              gblclk["iobsIOL1_SPECSIG"]=new Array("CLK_FSB");
+            
+          ce["iobsIOL1_SPECSIG"]=new Array("FB1_16_2");
+          
+            ceimp["iobsIOL1_SPECSIG"]=new Array("1");
+          prld["iobsIOL1_SPECSIG"]="GND";
+          d2["iobmIOS_FSM_FFd1_SPECSIG"]=new Array("FB1_17_1","FB1_17_2");
+          
+            d2imp["iobmIOS_FSM_FFd1_SPECSIG"]=new Array("1","1");
+          
+              gblclk["iobmIOS_FSM_FFd1_SPECSIG"]=new Array("CLK2X_IOB");
+            prld["iobmIOS_FSM_FFd1_SPECSIG"]="GND";
+          d2["IOU0"]=new Array("FB1_18_1","FB1_18_2");
+          
+            d2imp["IOU0"]=new Array("1","1");
+          
+              gblclk["IOU0"]=new Array("CLK_FSB");
+            
+          ce["IOU0"]=new Array("FB1_18_3");
+          
+            ceimp["IOU0"]=new Array("1");
+          prld["IOU0"]="GND";
+          d2["iobsIOACTr_SPECSIG"]=new Array("FB2_6_1");
+          
+            d2imp["iobsIOACTr_SPECSIG"]=new Array("1");
+          
+              gblclk["iobsIOACTr_SPECSIG"]=new Array("CLK_FSB");
+            prld["iobsIOACTr_SPECSIG"]="GND";
+          d2["iobmVPArr_SPECSIG"]=new Array("FB2_7_1");
+          
+            d2imp["iobmVPArr_SPECSIG"]=new Array("1");
+          
+              gblclk["iobmVPArr_SPECSIG"]=new Array("CLK2X_IOB");
+            prld["iobmVPArr_SPECSIG"]="GND";
+          d2["iobmVPArf_SPECSIG"]=new Array("FB2_8_1");
+          
+            d2imp["iobmVPArf_SPECSIG"]=new Array("1");
+          clkNegs["iobmVPArf_SPECSIG"]=1;
+              gblclk["iobmVPArf_SPECSIG"]=new Array("CLK2X_IOB");
+            prld["iobmVPArf_SPECSIG"]="GND";
+          d2["iobmIOREQr_SPECSIG"]=new Array("FB2_9_1");
+          
+            d2imp["iobmIOREQr_SPECSIG"]=new Array("1");
+          clkNegs["iobmIOREQr_SPECSIG"]=1;
+              gblclk["iobmIOREQr_SPECSIG"]=new Array("CLK2X_IOB");
+            prld["iobmIOREQr_SPECSIG"]="GND";
+          d2["iobmEr2_SPECSIG"]=new Array("FB2_10_1");
+          
+            d2imp["iobmEr2_SPECSIG"]=new Array("1");
+          
+              gblclk["iobmEr2_SPECSIG"]=new Array("CLK2X_IOB");
+            prld["iobmEr2_SPECSIG"]="GND";
+          d2["iobmEr_SPECSIG"]=new Array("FB2_11_1");
+          
+            d2imp["iobmEr_SPECSIG"]=new Array("1");
+          clkNegs["iobmEr_SPECSIG"]=1;
+              gblclk["iobmEr_SPECSIG"]=new Array("CLK_IOB");
+            prld["iobmEr_SPECSIG"]="GND";
+          d2["iobmDTACKrr_SPECSIG"]=new Array("FB2_12_1");
+          
+            d2imp["iobmDTACKrr_SPECSIG"]=new Array("1");
+          
+              gblclk["iobmDTACKrr_SPECSIG"]=new Array("CLK2X_IOB");
+            prld["iobmDTACKrr_SPECSIG"]="GND";
+          d2["iobmDTACKrf_SPECSIG"]=new Array("FB2_13_1");
+          
+            d2imp["iobmDTACKrf_SPECSIG"]=new Array("1");
+          clkNegs["iobmDTACKrf_SPECSIG"]=1;
+              gblclk["iobmDTACKrf_SPECSIG"]=new Array("CLK2X_IOB");
+            prld["iobmDTACKrf_SPECSIG"]="GND";
+          d2["iobmBGr1_SPECSIG"]=new Array("FB2_14_1");
+          
+            d2imp["iobmBGr1_SPECSIG"]=new Array("1");
+          
+              gblclk["iobmBGr1_SPECSIG"]=new Array("CLK2X_IOB");
+            prld["iobmBGr1_SPECSIG"]="GND";
+          d2["iobmBGr0_SPECSIG"]=new Array("FB2_15_1");
+          
+            d2imp["iobmBGr0_SPECSIG"]=new Array("1");
+          
+              gblclk["iobmBGr0_SPECSIG"]=new Array("CLK2X_IOB");
+            prld["iobmBGr0_SPECSIG"]="GND";
+          d2["iobmBERRrr_SPECSIG"]=new Array("FB2_16_1");
+          
+            d2imp["iobmBERRrr_SPECSIG"]=new Array("1");
+          
+              gblclk["iobmBERRrr_SPECSIG"]=new Array("CLK2X_IOB");
+            prld["iobmBERRrr_SPECSIG"]="GND";
+          d2["iobmBERRrf_SPECSIG"]=new Array("FB2_17_1");
+          
+            d2imp["iobmBERRrf_SPECSIG"]=new Array("1");
+          clkNegs["iobmBERRrf_SPECSIG"]=1;
+              gblclk["iobmBERRrf_SPECSIG"]=new Array("CLK2X_IOB");
+            prld["iobmBERRrf_SPECSIG"]="GND";
           d2["cntRefCnt0_SPECSIG"]=new Array("VCC");
           
             d2imp["cntRefCnt0_SPECSIG"]=new Array("1");
           
               gblclk["cntRefCnt0_SPECSIG"]=new Array("CLK_FSB");
             prld["cntRefCnt0_SPECSIG"]="GND";
-          d2["RefAck"]=new Array("FB1_17_1");
+          d2["fsbReady1r_SPECSIG"]=new Array("FB3_1_1","FB3_1_2","FB3_1_3","FB3_1_4","FB3_18_2","FB3_18_3","FB3_18_4","FB3_18_5");
           
-            d2imp["RefAck"]=new Array("1");
-          
-              gblclk["RefAck"]=new Array("CLK_FSB");
-            prld["RefAck"]="GND";
-          d2["OpTxFX_DC609_SPECSIG"]=new Array("FB1_18_1");
-          
-            d2imp["OpTxFX_DC609_SPECSIG"]=new Array("1");
-          
-          d2["iobmVPArr_SPECSIG"]=new Array("FB2_14_1");
-          
-            d2imp["iobmVPArr_SPECSIG"]=new Array("1");
-          
-              gblclk["iobmVPArr_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmVPArr_SPECSIG"]="GND";
-          d2["iobmVPArf_SPECSIG"]=new Array("FB2_15_1");
-          
-            d2imp["iobmVPArf_SPECSIG"]=new Array("1");
-          clkNegs["iobmVPArf_SPECSIG"]=1;
-              gblclk["iobmVPArf_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmVPArf_SPECSIG"]="GND";
-          d2["iobmRESrr_SPECSIG"]=new Array("FB2_16_1");
-          
-            d2imp["iobmRESrr_SPECSIG"]=new Array("1");
-          
-              gblclk["iobmRESrr_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmRESrr_SPECSIG"]="GND";
-          d2["iobmRESrf_SPECSIG"]=new Array("FB2_17_1");
-          
-            d2imp["iobmRESrf_SPECSIG"]=new Array("1");
-          clkNegs["iobmRESrf_SPECSIG"]=1;
-              gblclk["iobmRESrf_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmRESrf_SPECSIG"]="GND";
-          d2["iobmEr_SPECSIG"]=new Array("FB2_18_1");
-          
-            d2imp["iobmEr_SPECSIG"]=new Array("1");
-          clkNegs["iobmEr_SPECSIG"]=1;
-              gblclk["iobmEr_SPECSIG"]=new Array("CLK_IOB");
-            prld["iobmEr_SPECSIG"]="GND";
-          d2["fsbVPA_SPECSIG"]=new Array("FB3_2_1","FB3_2_2","FB3_2_3","FB3_2_4","FB3_2_5","FB3_1_1","FB3_1_2","FB3_1_3","FB3_1_4","FB3_1_5","FB3_18_1","FB3_18_2","FB3_18_3","FB3_18_4","FB3_18_5","FB3_3_1","FB3_3_2","FB3_3_3","FB3_3_4","FB3_3_5","FB3_4_1","FB3_4_2","FB3_4_3","FB3_4_4","FB3_4_5");
-          
-            d2imp["fsbVPA_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
-          
-              gblclk["fsbVPA_SPECSIG"]=new Array("CLK_FSB");
-            prld["fsbVPA_SPECSIG"]="GND";
-          d2["fsbReady1r_SPECSIG"]=new Array("FB3_5_1","FB3_5_2","FB3_5_3","FB3_5_4","FB3_5_5","FB3_6_1","FB3_6_2");
-          
-            d2imp["fsbReady1r_SPECSIG"]=new Array("1","1","1","1","1","1","1");
+            d2imp["fsbReady1r_SPECSIG"]=new Array("1","1","1","1","1","1","1","1");
           
               gblclk["fsbReady1r_SPECSIG"]=new Array("CLK_FSB");
             prld["fsbReady1r_SPECSIG"]="GND";
+          d2["iobsIORW1_SPECSIG"]=new Array("FB3_3_1","FB3_3_2","FB3_3_3","FB3_3_4","FB3_3_5","FB3_2_1","FB3_2_2","FB3_2_3","FB3_2_4","FB3_2_5","FB3_1_5","FB3_4_1","FB3_4_2","FB3_4_3","FB3_4_4","FB3_4_5","FB3_5_5");
+          
+            d2imp["iobsIORW1_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
+          
+              gblclk["iobsIORW1_SPECSIG"]=new Array("CLK_FSB");
+            prld["iobsIORW1_SPECSIG"]="GND";
+          d2["fsbReady2r_SPECSIG"]=new Array("FB3_5_1","FB3_5_2","FB3_5_3","FB3_5_4","FB3_6_1","FB3_6_2","FB3_6_3","FB3_6_4","FB3_6_5");
+          
+            d2imp["fsbReady2r_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1");
+          
+              gblclk["fsbReady2r_SPECSIG"]=new Array("CLK_FSB");
+            prld["fsbReady2r_SPECSIG"]="GND";
           d2["nDTACK_FSB"]=new Array("FB3_9_1","FB3_9_2","FB3_9_3","FB3_9_4","FB3_9_5","FB3_8_1","FB3_8_2","FB3_8_3","FB3_8_4","FB3_8_5","FB3_7_1","FB3_7_2","FB3_7_3","FB3_10_1","FB3_10_2","FB3_10_3","FB3_10_4","FB3_10_5","FB3_11_1","FB3_11_2","FB3_11_3","FB3_11_4","FB3_11_5");
           
             d2imp["nDTACK_FSB"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
           
               gblclk["nDTACK_FSB"]=new Array("CLK_FSB");
             prld["nDTACK_FSB"]="GND";
-          d2["iobsIORW1_SPECSIG"]=new Array("FB3_13_1","FB3_13_2","FB3_13_3","FB3_13_4","FB3_13_5","FB3_12_1","FB3_12_2","FB3_12_3","FB3_12_4","FB3_12_5","FB3_14_1","FB3_14_2","FB3_14_3","FB3_14_4","FB3_14_5","FB3_15_5");
+          d2["fsbVPA_SPECSIG"]=new Array("FB3_15_1","FB3_15_2","FB3_15_3","FB3_15_4","FB3_15_5","FB3_14_1","FB3_14_2","FB3_14_3","FB3_14_4","FB3_14_5","FB3_13_1","FB3_13_2","FB3_13_3","FB3_13_4","FB3_13_5","FB3_16_1","FB3_16_2","FB3_16_3","FB3_16_4","FB3_16_5","FB3_17_2","FB3_17_3");
           
-            d2imp["iobsIORW1_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
+            d2imp["fsbVPA_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
           
-              gblclk["iobsIORW1_SPECSIG"]=new Array("CLK_FSB");
-            prld["iobsIORW1_SPECSIG"]="GND";
-          d2["fsbReady2r_SPECSIG"]=new Array("FB3_15_1","FB3_15_2","FB3_15_3","FB3_15_4","FB3_16_1","FB3_16_2","FB3_16_3","FB3_16_4","FB3_16_5");
-          
-            d2imp["fsbReady2r_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1");
-          
-              gblclk["fsbReady2r_SPECSIG"]=new Array("CLK_FSB");
-            prld["fsbReady2r_SPECSIG"]="GND";
+              gblclk["fsbVPA_SPECSIG"]=new Array("CLK_FSB");
+            prld["fsbVPA_SPECSIG"]="GND";
           d2["nROMWE"]=new Array("FB3_17_1");
           
             d2imp["nROMWE"]=new Array("1");
           
-          d2["ramBACTr_SPECSIG"]=new Array("FB4_1_1");
-          
-            d2imp["ramBACTr_SPECSIG"]=new Array("1");
-          
-              gblclk["ramBACTr_SPECSIG"]=new Array("CLK_FSB");
-            prld["ramBACTr_SPECSIG"]="GND";
-          d2["nAoutOE"]=new Array("GND");
-          
-            d2imp["nAoutOE"]=new Array("1");
-          
-          d2["iobsClear1_SPECSIG"]=new Array("FB4_3_1");
+          d2["iobsClear1_SPECSIG"]=new Array("FB3_18_1");
           
             d2imp["iobsClear1_SPECSIG"]=new Array("1");
           
               gblclk["iobsClear1_SPECSIG"]=new Array("CLK_FSB");
             prld["iobsClear1_SPECSIG"]="GND";
-          d2["ALE0S"]=new Array("FB4_4_1");
+          d2["cntRefCnt6_SPECSIG"]=new Array("FB4_1_1");
           
-            d2imp["ALE0S"]=new Array("1");
+            d2imp["cntRefCnt6_SPECSIG"]=new Array("1");
           
-              gblclk["ALE0S"]=new Array("CLK_FSB");
-            prld["ALE0S"]="GND";
+              gblclk["cntRefCnt6_SPECSIG"]=new Array("CLK_FSB");
+            prld["cntRefCnt6_SPECSIG"]="GND";
+          d2["nAoutOE"]=new Array("FB4_2_1","FB4_2_2","FB4_2_3");
+          
+            d2imp["nAoutOE"]=new Array("1","1","1");
+          
+              gblclk["nAoutOE"]=new Array("CLK2X_IOB");
+            prld["nAoutOE"]="VCC";
+          d2["cntRefCnt5_SPECSIG"]=new Array("FB4_3_1");
+          
+            d2imp["cntRefCnt5_SPECSIG"]=new Array("1");
+          
+              gblclk["cntRefCnt5_SPECSIG"]=new Array("CLK_FSB");
+            prld["cntRefCnt5_SPECSIG"]="GND";
+          d2["cntRefCnt4_SPECSIG"]=new Array("FB4_4_1");
+          
+            d2imp["cntRefCnt4_SPECSIG"]=new Array("1");
+          
+              gblclk["cntRefCnt4_SPECSIG"]=new Array("CLK_FSB");
+            prld["cntRefCnt4_SPECSIG"]="GND";
           d2["nDoutOE"]=new Array("FB4_5_1","FB4_5_2");
           
             d2imp["nDoutOE"]=new Array("1","1");
           
               gblclk["nDoutOE"]=new Array("CLK2X_IOB");
             prld["nDoutOE"]="GND";
-          d2["nDinOE"]=new Array("FB4_6_1","FB4_6_2");
+          d2["nDinOE"]=new Array("FB4_6_1","FB4_6_2","FB4_6_3");
           
-            d2imp["nDinOE"]=new Array("1","1");
+            d2imp["nDinOE"]=new Array("1","1","1");
           
-          d2["iobsPS_FSM_FFd1_SPECSIG"]=new Array("FB4_7_1","FB4_7_2");
+          d2["cntRefCnt3_SPECSIG"]=new Array("FB4_7_1");
+          
+            d2imp["cntRefCnt3_SPECSIG"]=new Array("1");
+          
+              gblclk["cntRefCnt3_SPECSIG"]=new Array("CLK_FSB");
+            prld["cntRefCnt3_SPECSIG"]="GND";
+          d2["iobsPS_FSM_FFd1_SPECSIG"]=new Array("FB4_8_1","FB4_8_2");
           
             d2imp["iobsPS_FSM_FFd1_SPECSIG"]=new Array("1","1");
           
               gblclk["iobsPS_FSM_FFd1_SPECSIG"]=new Array("CLK_FSB");
             prld["iobsPS_FSM_FFd1_SPECSIG"]="GND";
-          d2["iobsIOU1_SPECSIG"]=new Array("FB4_8_1");
-          
-            d2imp["iobsIOU1_SPECSIG"]=new Array("1");
-          
-              gblclk["iobsIOU1_SPECSIG"]=new Array("CLK_FSB");
-            
-          ce["iobsIOU1_SPECSIG"]=new Array("FB4_8_2");
-          
-            ceimp["iobsIOU1_SPECSIG"]=new Array("1");
-          prld["iobsIOU1_SPECSIG"]="GND";
-          d2["iobsIOL1_SPECSIG"]=new Array("FB4_9_1");
-          
-            d2imp["iobsIOL1_SPECSIG"]=new Array("1");
-          
-              gblclk["iobsIOL1_SPECSIG"]=new Array("CLK_FSB");
-            
-          ce["iobsIOL1_SPECSIG"]=new Array("FB4_9_2");
-          
-            ceimp["iobsIOL1_SPECSIG"]=new Array("1");
-          prld["iobsIOL1_SPECSIG"]="GND";
-          d2["iobmIOS_FSM_FFd2_SPECSIG"]=new Array("FB4_10_1","FB4_10_2");
-          
-            d2imp["iobmIOS_FSM_FFd2_SPECSIG"]=new Array("1","1");
-          
-              gblclk["iobmIOS_FSM_FFd2_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmIOS_FSM_FFd2_SPECSIG"]="GND";
-          d2["nVPA_FSB"]=new Array("FB4_11_1");
-          
-            d2imp["nVPA_FSB"]=new Array("1");
-          
-          d2["iobmIOS_FSM_FFd1_SPECSIG"]=new Array("FB4_12_1","FB4_12_2");
-          
-            d2imp["iobmIOS_FSM_FFd1_SPECSIG"]=new Array("1","1");
-          
-              gblclk["iobmIOS_FSM_FFd1_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmIOS_FSM_FFd1_SPECSIG"]="GND";
-          d2["fsbBERR1r_SPECSIG"]=new Array("FB4_13_1","FB4_13_2");
+          d2["fsbBERR1r_SPECSIG"]=new Array("FB4_9_1","FB4_9_2");
           
             d2imp["fsbBERR1r_SPECSIG"]=new Array("1","1");
           
               gblclk["fsbBERR1r_SPECSIG"]=new Array("CLK_FSB");
             prld["fsbBERR1r_SPECSIG"]="GND";
-          d2["csnOverlay1_SPECSIG"]=new Array("FB4_14_1");
+          d2["csnOverlay1_SPECSIG"]=new Array("FB4_10_1");
           
             d2imp["csnOverlay1_SPECSIG"]=new Array("1");
           
               gblclk["csnOverlay1_SPECSIG"]=new Array("CLK_FSB");
             
-          ce["csnOverlay1_SPECSIG"]=new Array("FB4_14_2");
+          ce["csnOverlay1_SPECSIG"]=new Array("FB4_10_2");
           
             ceimp["csnOverlay1_SPECSIG"]=new Array("1");
           prld["csnOverlay1_SPECSIG"]="GND";
-          d2["OpTxFX_DC610_SPECSIG"]=new Array("FB4_15_1","FB4_15_2");
+          d2["nVPA_FSB"]=new Array("FB4_11_1");
           
-            d2imp["OpTxFX_DC610_SPECSIG"]=new Array("1","1");
+            d2imp["nVPA_FSB"]=new Array("1");
           
-          d2["IOU0"]=new Array("FB4_16_1","FB4_16_2");
+          d2["cntRefDone_SPECSIG"]=new Array("FB4_12_1","FB4_12_2");
           
-            d2imp["IOU0"]=new Array("1","1");
+            d2imp["cntRefDone_SPECSIG"]=new Array("1","1");
           
-              gblclk["IOU0"]=new Array("CLK_FSB");
+              gblclk["cntRefDone_SPECSIG"]=new Array("CLK_FSB");
+            prld["cntRefDone_SPECSIG"]="GND";
+          d2["csnOverlay0_SPECSIG"]=new Array("FB4_13_1","FB4_13_2");
+          
+            d2imp["csnOverlay0_SPECSIG"]=new Array("1","1");
+          
+              gblclk["csnOverlay0_SPECSIG"]=new Array("CLK_FSB");
             
-          ce["IOU0"]=new Array("FB4_16_3");
+              rst["csnOverlay0_SPECSIG"]=new Array("FB4_13_3");
+              
+                rstimp["csnOverlay0_SPECSIG"]=new Array("1");
+              prld["csnOverlay0_SPECSIG"]="GND";
+          d2["cntTimeoutBPre_SPECSIG"]=new Array("FB4_14_1","FB4_14_2","FB4_14_3");
           
-            ceimp["IOU0"]=new Array("1");
-          prld["IOU0"]="GND";
-          d2["IOL0"]=new Array("FB4_17_1","FB4_17_2");
+            d2imp["cntTimeoutBPre_SPECSIG"]=new Array("1","1","1");
+          
+              gblclk["cntTimeoutBPre_SPECSIG"]=new Array("CLK_FSB");
+            prld["cntTimeoutBPre_SPECSIG"]="GND";
+          d2["TimeoutA"]=new Array("FB4_15_1","FB4_15_2","FB4_15_3");
+          
+            d2imp["TimeoutA"]=new Array("1","1","1");
+          
+              gblclk["TimeoutA"]=new Array("CLK_FSB");
+            prld["TimeoutA"]="GND";
+          d2["IOL0"]=new Array("FB4_16_1","FB4_16_2");
           
             d2imp["IOL0"]=new Array("1","1");
           
               gblclk["IOL0"]=new Array("CLK_FSB");
             
-          ce["IOL0"]=new Array("FB4_17_3");
+          ce["IOL0"]=new Array("FB4_16_3");
           
             ceimp["IOL0"]=new Array("1");
           prld["IOL0"]="GND";
-          d2["iobsIOReady_SPECSIG"]=new Array("FB4_18_1","FB4_18_2","FB4_18_3","FB4_18_4");
+          d2["iobsIOReady_SPECSIG"]=new Array("FB4_17_1","FB4_17_2","FB4_17_3","FB4_17_4");
           
             d2imp["iobsIOReady_SPECSIG"]=new Array("1","1","1","1");
           
               gblclk["iobsIOReady_SPECSIG"]=new Array("CLK_FSB");
             prld["iobsIOReady_SPECSIG"]="GND";
-          d2["nROMCS"]=new Array("FB5_2_1","FB5_2_2");
+          d2["BERR_IOBS"]=new Array("FB4_18_1","FB4_18_2","FB4_18_3","FB4_18_4");
           
-            d2imp["nROMCS"]=new Array("1","1");
+            d2imp["BERR_IOBS"]=new Array("1","1","1","1");
           
-          d2["iobsPS_FSM_FFd2_SPECSIG"]=new Array("FB5_4_1","FB5_4_2","FB5_4_3","FB5_4_4","FB5_4_5","FB5_3_1","FB5_3_2","FB5_3_3","FB5_3_4","FB5_3_5","FB5_5_2","FB5_5_3","FB5_5_4","FB5_5_5");
+              gblclk["BERR_IOBS"]=new Array("CLK_FSB");
+            prld["BERR_IOBS"]="GND";
+          d2["ramRASEL_SPECSIG"]=new Array("FB5_1_1","FB5_1_2","FB5_1_3","FB5_1_4","FB5_1_5","FB5_2_1","FB5_2_2","FB5_2_3","FB5_2_4","FB5_2_5","FB5_18_1","FB5_18_2","FB5_18_3","FB5_18_4","FB5_18_5","FB5_17_1","FB5_17_2","FB5_17_3","FB5_17_4","FB5_17_5");
           
-            d2imp["iobsPS_FSM_FFd2_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1");
+            d2imp["ramRASEL_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
           
-              gblclk["iobsPS_FSM_FFd2_SPECSIG"]=new Array("CLK_FSB");
-            prld["iobsPS_FSM_FFd2_SPECSIG"]="GND";
+              gblclk["ramRASEL_SPECSIG"]=new Array("CLK_FSB");
+            prld["ramRASEL_SPECSIG"]="GND";
+          d2["nROMCS"]=new Array("FB5_3_2","FB5_3_3","FB5_3_4");
+          
+            d2imp["nROMCS"]=new Array("1","1","1");
+          
+          d2["cntRefCnt7_SPECSIG"]=new Array("FB5_3_1");
+          
+            d2imp["cntRefCnt7_SPECSIG"]=new Array("1");
+          
+              gblclk["cntRefCnt7_SPECSIG"]=new Array("CLK_FSB");
+            prld["cntRefCnt7_SPECSIG"]="GND";
+          d2["ramRAMDIS2_SPECSIG"]=new Array("FB5_4_1","FB5_4_2","FB5_4_3","FB5_4_4","FB5_4_5","FB5_5_2","FB5_5_3");
+          
+            d2imp["ramRAMDIS2_SPECSIG"]=new Array("1","1","1","1","1","1","1");
+          
+              gblclk["ramRAMDIS2_SPECSIG"]=new Array("CLK_FSB");
+            prld["ramRAMDIS2_SPECSIG"]="GND";
           d2["nCAS"]=new Array("FB5_5_1");
           
             d2imp["nCAS"]=new Array("1");
@@ -1382,12 +1510,12 @@
           
             d2imp["nOE"]=new Array("1");
           
-          d2["iobsOnce_SPECSIG"]=new Array("FB5_8_1","FB5_8_2","FB5_8_3","FB5_8_4","FB5_8_5","FB5_7_1","FB5_7_2","FB5_7_3","FB5_7_4","FB5_7_5","FB5_6_2","FB5_6_3","FB5_9_1","FB5_9_2","FB5_9_3","FB5_9_4","FB5_9_5");
+          d2["ramRAMDIS1_SPECSIG"]=new Array("FB5_8_1","FB5_8_2","FB5_8_3","FB5_8_4","FB5_8_5","FB5_7_1","FB5_7_2","FB5_7_3","FB5_7_4","FB5_7_5","FB5_6_2","FB5_6_3","FB5_6_4","FB5_9_1","FB5_9_2","FB5_9_3","FB5_9_4","FB5_9_5");
           
-            d2imp["iobsOnce_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
+            d2imp["ramRAMDIS1_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
           
-              gblclk["iobsOnce_SPECSIG"]=new Array("CLK_FSB");
-            prld["iobsOnce_SPECSIG"]="GND";
+              gblclk["ramRAMDIS1_SPECSIG"]=new Array("CLK_FSB");
+            prld["ramRAMDIS1_SPECSIG"]="GND";
           d2["RA4_SPECSIG"]=new Array("FB5_10_1","FB5_10_2");
           
             d2imp["RA4_SPECSIG"]=new Array("1","1");
@@ -1400,13 +1528,13 @@
           
             d2imp["RA5_SPECSIG"]=new Array("1","1");
           
-          d2["IOREQ"]=new Array("FB5_13_1","FB5_13_2","FB5_13_3","FB5_13_4","FB5_13_5","FB5_12_1","FB5_12_2","FB5_12_3","FB5_12_4","FB5_12_5","FB5_14_2","FB5_14_3","FB5_14_4","FB5_14_5");
+          d2["iobsLoad1_SPECSIG"]=new Array("FB5_13_1","FB5_13_2","FB5_13_3","FB5_13_4","FB5_13_5","FB5_12_1","FB5_12_2","FB5_12_3","FB5_12_4","FB5_12_5","FB5_14_1","FB5_14_2","FB5_14_3","FB5_14_4","FB5_14_5");
           
-            d2imp["IOREQ"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1");
+            d2imp["iobsLoad1_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
           
-              gblclk["IOREQ"]=new Array("CLK_FSB");
-            prld["IOREQ"]="GND";
-          d2["RA2_SPECSIG"]=new Array("FB5_14_1","FB5_15_3");
+              gblclk["iobsLoad1_SPECSIG"]=new Array("CLK_FSB");
+            prld["iobsLoad1_SPECSIG"]="GND";
+          d2["RA2_SPECSIG"]=new Array("FB5_15_3","FB5_15_4");
           
             d2imp["RA2_SPECSIG"]=new Array("1","1");
           
@@ -1414,18 +1542,12 @@
           
             d2imp["RA6_SPECSIG"]=new Array("1","1");
           
-          d2["BERR_IOBS"]=new Array("FB5_16_1","FB5_16_2","FB5_16_3","FB5_16_4");
+          d2["ramOnce_SPECSIG"]=new Array("FB5_16_1","FB5_16_2","FB5_16_3","FB5_16_4","FB5_16_5");
           
-            d2imp["BERR_IOBS"]=new Array("1","1","1","1");
+            d2imp["ramOnce_SPECSIG"]=new Array("1","1","1","1","1");
           
-              gblclk["BERR_IOBS"]=new Array("CLK_FSB");
-            prld["BERR_IOBS"]="GND";
-          d2["IORW0"]=new Array("FB5_18_1","FB5_18_2","FB5_18_3","FB5_18_4","FB5_18_5","FB5_1_1","FB5_1_2","FB5_1_3","FB5_1_4","FB5_1_5","FB5_2_3","FB5_2_4","FB5_2_5","FB5_17_1","FB5_17_2","FB5_17_3","FB5_17_4","FB5_17_5");
-          
-            d2imp["IORW0"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
-          
-              gblclk["IORW0"]=new Array("CLK_FSB");
-            prld["IORW0"]="GND";
+              gblclk["ramOnce_SPECSIG"]=new Array("CLK_FSB");
+            prld["ramOnce_SPECSIG"]="GND";
           d2["iobmETACK_SPECSIG"]=new Array("FB6_1_1");
           
             d2imp["iobmETACK_SPECSIG"]=new Array("1");
@@ -1437,13 +1559,17 @@
             d2imp["nVMA_IOB"]=new Array("1","1");
           
               gblclk["nVMA_IOB"]=new Array("CLK2X_IOB");
-            prld["nVMA_IOB"]="GND";
-          d2["ALE0M"]=new Array("FB6_3_1","FB6_3_2");
+            
+              trst["nVMA_IOB"]=new Array("FB6_2_3");
+              
+                trstimp["nVMA_IOB"]=new Array("1");
+              prld["nVMA_IOB"]="GND";
+          d2["iobmIOS_FSM_FFd3_SPECSIG"]=new Array("FB6_3_1","FB6_3_2","FB6_3_3");
           
-            d2imp["ALE0M"]=new Array("1","1");
+            d2imp["iobmIOS_FSM_FFd3_SPECSIG"]=new Array("1","1","1");
           
-              gblclk["ALE0M"]=new Array("CLK2X_IOB");
-            prld["ALE0M"]="GND";
+              gblclk["iobmIOS_FSM_FFd3_SPECSIG"]=new Array("CLK2X_IOB");
+            prld["iobmIOS_FSM_FFd3_SPECSIG"]="GND";
           d2["iobmES3_SPECSIG"]=new Array("FB6_4_1","FB6_4_2","FB6_4_3");
           
             d2imp["iobmES3_SPECSIG"]=new Array("1","1","1");
@@ -1462,42 +1588,54 @@
           
               gblclk["iobmES0_SPECSIG"]=new Array("CLK2X_IOB");
             prld["iobmES0_SPECSIG"]="GND";
-          d2["iobmIOS_FSM_FFd4_SPECSIG"]=new Array("FB6_7_1","FB6_7_2","FB6_7_3","FB6_7_4");
+          d2["ALE0M"]=new Array("FB6_7_1","FB6_7_2","FB6_7_3");
           
-            d2imp["iobmIOS_FSM_FFd4_SPECSIG"]=new Array("1","1","1","1");
+            d2imp["ALE0M"]=new Array("1","1","1");
           
-              gblclk["iobmIOS_FSM_FFd4_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmIOS_FSM_FFd4_SPECSIG"]="GND";
+              gblclk["ALE0M"]=new Array("CLK2X_IOB");
+            prld["ALE0M"]="GND";
           d2["iobmES4_SPECSIG"]=new Array("FB6_8_1","FB6_8_2","FB6_8_3","FB6_8_4");
           
             d2imp["iobmES4_SPECSIG"]=new Array("1","1","1","1");
           
               gblclk["iobmES4_SPECSIG"]=new Array("CLK2X_IOB");
             prld["iobmES4_SPECSIG"]="GND";
-          d2["nLDS_IOB"]=new Array("FB6_9_1","FB6_9_2","FB6_9_3","FB6_9_4");
+          d2["nLDS_IOB"]=new Array("FB6_9_1","FB6_9_2","FB6_9_3");
           
-            d2imp["nLDS_IOB"]=new Array("1","1","1","1");
+            d2imp["nLDS_IOB"]=new Array("1","1","1");
           clkNegs["nLDS_IOB"]=1;
               gblclk["nLDS_IOB"]=new Array("CLK2X_IOB");
-            prld["nLDS_IOB"]="GND";
-          d2["iobmIOS_FSM_FFd3_SPECSIG"]=new Array("FB6_10_1","FB6_10_2","FB6_10_3","FB6_10_4","FB6_10_5");
+            
+              trst["nLDS_IOB"]=new Array("FB6_9_4");
+              
+                trstimp["nLDS_IOB"]=new Array("1");
+              prld["nLDS_IOB"]="GND";
+          d2["iobmIOS_FSM_FFd2_SPECSIG"]=new Array("FB6_10_1","FB6_10_2","FB6_10_3","FB6_10_4","FB6_10_5");
           
-            d2imp["iobmIOS_FSM_FFd3_SPECSIG"]=new Array("1","1","1","1","1");
+            d2imp["iobmIOS_FSM_FFd2_SPECSIG"]=new Array("1","1","1","1","1");
           
-              gblclk["iobmIOS_FSM_FFd3_SPECSIG"]=new Array("CLK2X_IOB");
-            prld["iobmIOS_FSM_FFd3_SPECSIG"]="GND";
-          d2["nUDS_IOB"]=new Array("FB6_11_1","FB6_11_2","FB6_11_3","FB6_11_4");
+              gblclk["iobmIOS_FSM_FFd2_SPECSIG"]=new Array("CLK2X_IOB");
+            prld["iobmIOS_FSM_FFd2_SPECSIG"]="GND";
+          d2["nUDS_IOB"]=new Array("FB6_11_1","FB6_11_2","FB6_11_3");
           
-            d2imp["nUDS_IOB"]=new Array("1","1","1","1");
+            d2imp["nUDS_IOB"]=new Array("1","1","1");
           clkNegs["nUDS_IOB"]=1;
               gblclk["nUDS_IOB"]=new Array("CLK2X_IOB");
-            prld["nUDS_IOB"]="GND";
+            
+              trst["nUDS_IOB"]=new Array("FB6_11_4");
+              
+                trstimp["nUDS_IOB"]=new Array("1");
+              prld["nUDS_IOB"]="GND";
           d2["nAS_IOB"]=new Array("FB6_12_1","FB6_12_2");
           
             d2imp["nAS_IOB"]=new Array("1","1");
           clkNegs["nAS_IOB"]=1;
               gblclk["nAS_IOB"]=new Array("CLK2X_IOB");
-            prld["nAS_IOB"]="GND";
+            
+              trst["nAS_IOB"]=new Array("FB6_12_3");
+              
+                trstimp["nAS_IOB"]=new Array("1");
+              prld["nAS_IOB"]="GND";
           d2["iobmES2_SPECSIG"]=new Array("FB6_13_1","FB6_13_2","FB6_13_3","FB6_13_4","FB6_13_5");
           
             d2imp["iobmES2_SPECSIG"]=new Array("1","1","1","1","1");
@@ -1514,40 +1652,40 @@
           
             d2imp["nADoutLE0"]=new Array("1");
           
-          d2["IOACT"]=new Array("FB6_16_1","FB6_16_2","FB6_16_3","FB6_16_4","FB6_16_5","FB6_15_2");
+          d2["IOACT"]=new Array("FB6_16_1","FB6_16_2","FB6_16_3","FB6_16_4","FB6_16_5","FB6_15_2","FB6_17_2");
           
-            d2imp["IOACT"]=new Array("1","1","1","1","1","1");
+            d2imp["IOACT"]=new Array("1","1","1","1","1","1","1");
           
               gblclk["IOACT"]=new Array("CLK2X_IOB");
             prld["IOACT"]="GND";
-          d2["nDinLE"]=new Array("FB6_17_1","FB6_17_2");
+          d2["nDinLE"]=new Array("FB6_17_1");
           
-            d2imp["nDinLE"]=new Array("1","1");
+            d2imp["nDinLE"]=new Array("1");
           clkNegs["nDinLE"]=1;
               gblclk["nDinLE"]=new Array("CLK2X_IOB");
             prld["nDinLE"]="GND";
-          d2["IOBERR"]=new Array("FB6_18_1","FB6_18_2","FB6_18_3","FB6_18_4","FB6_18_5","FB6_1_2","FB6_17_3","FB6_17_4","FB6_17_5");
+          d2["IOBERR"]=new Array("FB6_18_1","FB6_18_2","FB6_18_3","FB6_18_4","FB6_18_5","FB6_1_2","FB6_1_3","FB6_1_4","FB6_1_5");
           
             d2imp["IOBERR"]=new Array("1","1","1","1","1","1","1","1","1");
           
               gblclk["IOBERR"]=new Array("CLK2X_IOB");
             prld["IOBERR"]="GND";
-          d2["TimeoutB"]=new Array("FB7_2_3","FB7_2_4","FB7_2_5");
+          d2["ramRAMReady_SPECSIG"]=new Array("FB7_1_1","FB7_1_2","FB7_1_3","FB7_1_4","FB7_1_5","FB7_2_1","FB7_2_2","FB7_2_3","FB7_2_4","FB7_2_5","FB7_18_1","FB7_18_2","FB7_18_3","FB7_18_4","FB7_18_5","FB7_17_5");
+          
+            d2imp["ramRAMReady_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
+          
+              gblclk["ramRAMReady_SPECSIG"]=new Array("CLK_FSB");
+            prld["ramRAMReady_SPECSIG"]="GND";
+          d2["RA1_SPECSIG"]=new Array("FB7_3_4","FB7_3_5");
+          
+            d2imp["RA1_SPECSIG"]=new Array("1","1");
+          
+          d2["TimeoutB"]=new Array("FB7_3_1","FB7_3_2","FB7_3_3");
           
             d2imp["TimeoutB"]=new Array("1","1","1");
           
               gblclk["TimeoutB"]=new Array("CLK_FSB");
             prld["TimeoutB"]="GND";
-          d2["RA1_SPECSIG"]=new Array("FB7_2_1","FB7_2_2");
-          
-            d2imp["RA1_SPECSIG"]=new Array("1","1");
-          
-          d2["cntRefDone_SPECSIG"]=new Array("FB7_3_1","FB7_3_2");
-          
-            d2imp["cntRefDone_SPECSIG"]=new Array("1","1");
-          
-              gblclk["cntRefDone_SPECSIG"]=new Array("CLK_FSB");
-            prld["cntRefDone_SPECSIG"]="GND";
           d2["fsbReady0r_SPECSIG"]=new Array("FB7_4_1","FB7_4_2","FB7_4_3");
           
             d2imp["fsbReady0r_SPECSIG"]=new Array("1","1","1");
@@ -1562,17 +1700,13 @@
           
             d2imp["RA0_SPECSIG"]=new Array("1","1");
           
-          d2["csnOverlay0_SPECSIG"]=new Array("FB7_7_1","FB7_7_2");
+          d2["ramRS_FSM_FFd1_SPECSIG"]=new Array("FB7_7_1","FB7_7_2","FB7_7_3","FB7_7_4","FB7_7_5");
           
-            d2imp["csnOverlay0_SPECSIG"]=new Array("1","1");
+            d2imp["ramRS_FSM_FFd1_SPECSIG"]=new Array("1","1","1","1","1");
           
-              gblclk["csnOverlay0_SPECSIG"]=new Array("CLK_FSB");
-            
-              rst["csnOverlay0_SPECSIG"]=new Array("FB7_7_3");
-              
-                rstimp["csnOverlay0_SPECSIG"]=new Array("1");
-              prld["csnOverlay0_SPECSIG"]="GND";
-          d2["RA8_SPECSIG"]=new Array("FB7_8_1","FB7_8_2","FB7_8_3","FB7_8_4","FB7_8_5","FB7_7_4","FB7_9_2");
+              gblclk["ramRS_FSM_FFd1_SPECSIG"]=new Array("CLK_FSB");
+            prld["ramRS_FSM_FFd1_SPECSIG"]="GND";
+          d2["RA8_SPECSIG"]=new Array("FB7_8_1","FB7_8_2","FB7_8_3","FB7_8_4","FB7_8_5","FB7_9_2","FB7_9_3");
           
             d2imp["RA8_SPECSIG"]=new Array("1","1","1","1","1","1","1");
           
@@ -1580,63 +1714,45 @@
           
             d2imp["RA10_SPECSIG"]=new Array("1");
           
-          d2["cntTimeoutBPre_SPECSIG"]=new Array("FB7_10_1","FB7_10_2","FB7_10_3");
+          d2["OpTxOpTxFX_DC182_INV783_SPECSIG"]=new Array("FB7_10_1","FB7_10_2","FB7_10_3","FB7_10_4","FB7_10_5","FB7_11_3");
           
-            d2imp["cntTimeoutBPre_SPECSIG"]=new Array("1","1","1");
+            d2imp["OpTxOpTxFX_DC182_INV783_SPECSIG"]=new Array("1","1","1","1","1","1");
           
-              gblclk["cntTimeoutBPre_SPECSIG"]=new Array("CLK_FSB");
-            prld["cntTimeoutBPre_SPECSIG"]="GND";
           d2["RA9_SPECSIG"]=new Array("FB7_11_1","FB7_11_2");
           
             d2imp["RA9_SPECSIG"]=new Array("1","1");
           
-          d2["TimeoutA"]=new Array("FB7_11_3","FB7_11_4","FB7_11_5");
+          d2["CLK25EN"]=new Array("FB7_12_1");
           
-            d2imp["TimeoutA"]=new Array("1","1","1");
+            d2imp["CLK25EN"]=new Array("1");
           
-              gblclk["TimeoutA"]=new Array("CLK_FSB");
-            prld["TimeoutA"]="GND";
-          d2["ramRS_FSM_FFd3_SPECSIG"]=new Array("FB7_14_1","FB7_13_1","FB7_13_2","FB7_13_3","FB7_13_4","FB7_13_5","FB7_12_1","FB7_12_2","FB7_12_3","FB7_12_4","FB7_12_5");
+          d2["ramRS_FSM_FFd3_SPECSIG"]=new Array("FB7_13_1","FB7_13_2","FB7_13_3","FB7_13_4","FB7_13_5","FB7_12_2","FB7_12_3","FB7_12_4","FB7_12_5","FB7_14_2","FB7_14_3");
           
             d2imp["ramRS_FSM_FFd3_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1");
           
               gblclk["ramRS_FSM_FFd3_SPECSIG"]=new Array("CLK_FSB");
             prld["ramRS_FSM_FFd3_SPECSIG"]="GND";
-          d2["ramRS_FSM_FFd2_SPECSIG"]=new Array("FB7_16_1","FB7_16_2","FB7_16_3","FB7_16_4","FB7_15_1","FB7_15_2","FB7_15_3","FB7_15_4","FB7_15_5","FB7_14_2","FB7_14_3","FB7_14_4","FB7_14_5");
+          d2["CLK20EN"]=new Array("FB7_14_1");
+          
+            d2imp["CLK20EN"]=new Array("1");
+          
+          d2["ramRS_FSM_FFd2_SPECSIG"]=new Array("FB7_17_1","FB7_17_2","FB7_17_3","FB7_17_4","FB7_16_1","FB7_16_2","FB7_16_3","FB7_16_4","FB7_16_5","FB7_15_1","FB7_15_2","FB7_15_3","FB7_15_4");
           
             d2imp["ramRS_FSM_FFd2_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1");
           
               gblclk["ramRS_FSM_FFd2_SPECSIG"]=new Array("CLK_FSB");
             prld["ramRS_FSM_FFd2_SPECSIG"]="GND";
-          d2["ramRAMReady_SPECSIG"]=new Array("FB7_18_1","FB7_18_2","FB7_18_3","FB7_18_4","FB7_18_5","FB7_1_1","FB7_1_2","FB7_1_3","FB7_1_4","FB7_1_5","FB7_17_1","FB7_17_2","FB7_17_3","FB7_17_4","FB7_17_5","FB7_16_5");
-          
-            d2imp["ramRAMReady_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
-          
-              gblclk["ramRAMReady_SPECSIG"]=new Array("CLK_FSB");
-            prld["ramRAMReady_SPECSIG"]="GND";
-          d2["ramRASEL_SPECSIG"]=new Array("FB8_1_1","FB8_1_2","FB8_1_3","FB8_1_4","FB8_1_5","FB8_2_1","FB8_2_2","FB8_2_3","FB8_2_4","FB8_2_5","FB8_18_1","FB8_18_2","FB8_18_3","FB8_18_4","FB8_18_5","FB8_17_1","FB8_17_2","FB8_17_3","FB8_17_4","FB8_17_5");
-          
-            d2imp["ramRASEL_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
-          
-              gblclk["ramRASEL_SPECSIG"]=new Array("CLK_FSB");
-            prld["ramRASEL_SPECSIG"]="GND";
-          d2["RA11_SPECSIG"]=new Array("FB8_3_4");
+          d2["RA11_SPECSIG"]=new Array("FB8_2_1");
           
             d2imp["RA11_SPECSIG"]=new Array("1");
           
-          d2["fsbBERR0r_SPECSIG"]=new Array("FB8_3_1","FB8_3_2","FB8_3_3");
+          d2["iobsPS_FSM_FFd2_SPECSIG"]=new Array("FB8_4_1","FB8_4_2","FB8_4_3","FB8_4_4","FB8_4_5","FB8_3_1","FB8_3_2","FB8_3_3","FB8_3_4","FB8_3_5","FB8_5_1","FB8_5_2","FB8_5_3","FB8_5_4","FB8_5_5");
           
-            d2imp["fsbBERR0r_SPECSIG"]=new Array("1","1","1");
+            d2imp["iobsPS_FSM_FFd2_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
           
-              gblclk["fsbBERR0r_SPECSIG"]=new Array("CLK_FSB");
-            prld["fsbBERR0r_SPECSIG"]="GND";
-          d2["ramRS_FSM_FFd1_SPECSIG"]=new Array("FB8_4_1","FB8_4_2","FB8_4_3","FB8_4_4","FB8_4_5");
-          
-            d2imp["ramRS_FSM_FFd1_SPECSIG"]=new Array("1","1","1","1","1");
-          
-              gblclk["ramRS_FSM_FFd1_SPECSIG"]=new Array("CLK_FSB");
-            prld["ramRS_FSM_FFd1_SPECSIG"]="GND";
-          d2["nRAS"]=new Array("FB8_5_1","FB8_5_2","FB8_5_3");
+              gblclk["iobsPS_FSM_FFd2_SPECSIG"]=new Array("CLK_FSB");
+            prld["iobsPS_FSM_FFd2_SPECSIG"]="GND";
+          d2["nRAS"]=new Array("FB8_6_2","FB8_6_3","FB8_6_4");
           
             d2imp["nRAS"]=new Array("1","1","1");
           
@@ -1644,38 +1760,58 @@
           
             d2imp["nRAMLWE"]=new Array("1");
           
-          d2["ramOnce_SPECSIG"]=new Array("FB8_7_1","FB8_7_2","FB8_7_3","FB8_7_4","FB8_7_5");
+          d2["RESDone"]=new Array("VCC");
           
-            d2imp["ramOnce_SPECSIG"]=new Array("1","1","1","1","1");
+            d2imp["RESDone"]=new Array("1");
           
-              gblclk["ramOnce_SPECSIG"]=new Array("CLK_FSB");
-            prld["ramOnce_SPECSIG"]="GND";
-          d2["nRAMUWE"]=new Array("FB8_8_1");
+              gblclk["RESDone"]=new Array("CLK_FSB");
+            
+          ce["RESDone"]=new Array("FB8_7_1");
+          
+            ceimp["RESDone"]=new Array("1");
+          prld["RESDone"]="GND";
+          d2["nRAMUWE"]=new Array("FB8_7_2");
           
             d2imp["nRAMUWE"]=new Array("1");
           
-          d2["iobsLoad1_SPECSIG"]=new Array("FB8_9_1","FB8_9_2","FB8_9_3","FB8_9_4","FB8_9_5","FB8_8_2","FB8_8_3","FB8_8_4","FB8_8_5","FB8_10_1","FB8_10_2","FB8_10_3","FB8_10_4","FB8_10_5");
+          d2["IOREQ"]=new Array("FB8_9_1","FB8_9_2","FB8_9_3","FB8_9_4","FB8_9_5","FB8_8_1","FB8_8_2","FB8_8_3","FB8_8_4","FB8_8_5","FB8_10_1","FB8_10_2","FB8_10_3","FB8_10_4","FB8_10_5");
           
-            d2imp["iobsLoad1_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1");
+            d2imp["IOREQ"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
           
-              gblclk["iobsLoad1_SPECSIG"]=new Array("CLK_FSB");
-            prld["iobsLoad1_SPECSIG"]="GND";
-          d2["nBERR_FSB"]=new Array("FB8_11_1","FB8_11_2","FB8_11_3");
+              gblclk["IOREQ"]=new Array("CLK_FSB");
+            prld["IOREQ"]="GND";
+          d2["nBERR_FSB"]=new Array("FB8_12_1","FB8_11_1","FB8_11_2");
           
             d2imp["nBERR_FSB"]=new Array("1","1","1");
           
-          d2["ramRAMDIS2_SPECSIG"]=new Array("FB8_13_1","FB8_13_2","FB8_12_1","FB8_12_2","FB8_12_3","FB8_12_4","FB8_12_5");
+          d2["iobsOnce_SPECSIG"]=new Array("FB8_14_1","FB8_14_2","FB8_14_3","FB8_14_4","FB8_14_5","FB8_13_1","FB8_13_2","FB8_13_3","FB8_13_4","FB8_13_5","FB8_12_2","FB8_12_3","FB8_12_4","FB8_12_5","FB8_15_2","FB8_15_3","FB8_15_4","FB8_15_5");
           
-            d2imp["ramRAMDIS2_SPECSIG"]=new Array("1","1","1","1","1","1","1");
+            d2imp["iobsOnce_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
           
-              gblclk["ramRAMDIS2_SPECSIG"]=new Array("CLK_FSB");
-            prld["ramRAMDIS2_SPECSIG"]="GND";
-          d2["ramRAMDIS1_SPECSIG"]=new Array("FB8_15_1","FB8_15_2","FB8_15_3","FB8_15_4","FB8_15_5","FB8_14_1","FB8_14_2","FB8_14_3","FB8_14_4","FB8_14_5","FB8_13_3","FB8_13_4","FB8_13_5","FB8_16_1","FB8_16_2","FB8_16_3","FB8_16_4","FB8_16_5");
+              gblclk["iobsOnce_SPECSIG"]=new Array("CLK_FSB");
+            prld["iobsOnce_SPECSIG"]="GND";
+          d2["nBR_IOB"]=new Array("GND");
           
-            d2imp["ramRAMDIS1_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
+            d2imp["nBR_IOB"]=new Array("1");
           
-              gblclk["ramRAMDIS1_SPECSIG"]=new Array("CLK_FSB");
-            prld["ramRAMDIS1_SPECSIG"]="GND";
+              gblclk["nBR_IOB"]=new Array("CLK_FSB");
+            
+          ce["nBR_IOB"]=new Array("FB8_15_1");
+          
+            ceimp["nBR_IOB"]=new Array("1");
+          prld["nBR_IOB"]="VCC";
+          d2["fsbBERR0r_SPECSIG"]=new Array("FB8_16_1","FB8_16_2","FB8_16_3");
+          
+            d2imp["fsbBERR0r_SPECSIG"]=new Array("1","1","1");
+          
+              gblclk["fsbBERR0r_SPECSIG"]=new Array("CLK_FSB");
+            prld["fsbBERR0r_SPECSIG"]="GND";
+          d2["IORW0"]=new Array("FB8_18_1","FB8_18_2","FB8_18_3","FB8_18_4","FB8_18_5","FB8_1_1","FB8_1_2","FB8_1_3","FB8_1_4","FB8_1_5","FB8_2_2","FB8_2_3","FB8_2_4","FB8_2_5","FB8_17_1","FB8_17_2","FB8_17_3","FB8_17_4","FB8_17_5");
+          
+            d2imp["IORW0"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
+          
+              gblclk["IORW0"]=new Array("CLK_FSB");
+            prld["IORW0"]="GND";
 
       uimSignals = new Array();
 
diff --git a/cpld/XC95144XL/MXSE_html/fit/errs.htm b/cpld/XC95144XL/MXSE_html/fit/errs.htm
index 020a3d6..9c5ecd9 100644
--- a/cpld/XC95144XL/MXSE_html/fit/errs.htm
+++ b/cpld/XC95144XL/MXSE_html/fit/errs.htm
@@ -5,7 +5,10 @@
 </head>
 <body class="pgBgnd" id="XC95144XL">
 <span id="error" class="pgRef"><h3 align="center">Errors and Warnings</h3>
-<b>There are 0 error(s), 1 warning(s), and 0 information.</b><br><br><table width="90%" border="1" cellpadding="0" cellspacing="0"><tr><td>[Warning]:Cpld - Unable to retrieve the path to the iSE Project Repository. Will   use the default filename of 'MXSE.ise'.INFO:Cpld - Inferring BUFG constraint for signal 'CLK2X_IOB' based upon the LOC   constraint 'P22'. It is recommended that you declare this BUFG explicitedly   in your design. Note that for certain device families the output of a BUFG   constraint can not drive a gated clock, and the BUFG constraint will be   ignored.INFO:Cpld - Inferring BUFG constraint for signal 'CLK_FSB' based upon the LOC   constraint 'P27'. It is recommended that you declare this BUFG explicitedly   in your design. Note that for certain device families the output of a BUFG   constraint can not drive a gated clock, and the BUFG constraint will be   ignored.INFO:Cpld - Inferring BUFG constraint for signal 'CLK_IOB' based upon the LOC   constraint 'P23'. It is recommended that you declare this BUFG explicitedly   in your design. Note that for certain device families the output of a BUFG   constraint can not drive a gated clock, and the BUFG constraint will be   ignored.</td></tr></table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
+<b>There are 0 error(s), 2 warning(s), and 0 information.</b><br><br><table width="90%" border="1" cellpadding="0" cellspacing="0">
+<tr><td>[Warning]:Cpld - Unable to retrieve the path to the iSE Project Repository. Will   use the default filename of 'MXSE.ise'.INFO:Cpld - Inferring BUFG constraint for signal 'CLK2X_IOB' based upon the LOC   constraint 'P22'. It is recommended that you declare this BUFG explicitedly   in your design. Note that for certain device families the output of a BUFG   constraint can not drive a gated clock, and the BUFG constraint will be   ignored.INFO:Cpld - Inferring BUFG constraint for signal 'CLK_FSB' based upon the LOC   constraint 'P27'. It is recommended that you declare this BUFG explicitedly   in your design. Note that for certain device families the output of a BUFG   constraint can not drive a gated clock, and the BUFG constraint will be   ignored.INFO:Cpld - Inferring BUFG constraint for signal 'CLK_IOB' based upon the LOC   constraint 'P23'. It is recommended that you declare this BUFG explicitedly   in your design. Note that for certain device families the output of a BUFG   constraint can not drive a gated clock, and the BUFG constraint will be   ignored.</td></tr>
+<tr><td>[Warning]:Cpld:1007 - Removing unused input(s) 'SW&lt;2&gt;'.  The input(s) are unused   after optimization. Please verify functionality via simulation.</td></tr>
+</table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
 <td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
 <td align="right"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page"></td>
 </tr></table></span></form>
diff --git a/cpld/XC95144XL/MXSE_html/fit/failtable.js b/cpld/XC95144XL/MXSE_html/fit/failtable.js
deleted file mode 100644
index 045081f..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/failtable.js
+++ /dev/null
@@ -1 +0,0 @@
-function showFailTable() { parent.leftnav.showFailTable(); }
diff --git a/cpld/XC95144XL/MXSE_html/fit/fbs 2.htm b/cpld/XC95144XL/MXSE_html/fit/fbs 2.htm
deleted file mode 100644
index 26211fb..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/fbs 2.htm	
+++ /dev/null
@@ -1,77 +0,0 @@
-<html>
-<head>
-<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
-<script src="fbs.js"></script><link rel="stylesheet" type="text/css" href="style.css">
-</head>
-<body class="pgBgnd" id="XC95144XL">
-<span id="fbsum" class="pgRef"><h3 align="center">Function Blocks</h3>
-<table align="center" width="90%" border="1" cellpadding="0" cellspacing="0">
-<tr class="pgHeader">
-<th>Function Block</th>
-<th>Macrocells Used/Total</th>
-<th>Function Block Inputs Used/Total</th>
-<th>Product Terms Used/Total</th>
-<th>Pins Used/Total</th>
-</tr>
-<tr>
-<td align="center"><a href="javascript:showFBDetail('FB1');" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">9 / 18</td>
-<td align="center">36 / 54</td>
-<td align="center">80 / 90</td>
-<td align="center">10 / 11</td>
-</tr>
-<tr>
-<td align="center"><a href="javascript:showFBDetail('FB2');" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">18 / 18</td>
-<td align="center">35 / 54</td>
-<td align="center">34 / 90</td>
-<td align="center">6 / 10</td>
-</tr>
-<tr>
-<td align="center"><a href="javascript:showFBDetail('FB3');" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">14 / 18</td>
-<td align="center">35 / 54</td>
-<td align="center">77 / 90</td>
-<td align="center">5 / 10</td>
-</tr>
-<tr>
-<td align="center"><a href="javascript:showFBDetail('FB4');" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">10 / 18</td>
-<td align="center">36 / 54</td>
-<td align="center">82 / 90</td>
-<td align="center">10 / 10</td>
-</tr>
-<tr>
-<td align="center"><a href="javascript:showFBDetail('FB5');" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">17 / 18</td>
-<td align="center">35 / 54</td>
-<td align="center">47 / 90</td>
-<td align="center">4 / 10</td>
-</tr>
-<tr>
-<td align="center"><a href="javascript:showFBDetail('FB6');" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">18 / 18</td>
-<td align="center">24 / 54</td>
-<td align="center">37 / 90</td>
-<td align="center">10 / 10</td>
-</tr>
-<tr>
-<td align="center"><a href="javascript:showFBDetail('FB7');" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">17 / 18</td>
-<td align="center">35 / 54</td>
-<td align="center">76 / 90</td>
-<td align="center">10 / 10</td>
-</tr>
-<tr>
-<td align="center"><a href="javascript:showFBDetail('FB8');" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">7 / 18</td>
-<td align="center">8 / 54</td>
-<td align="center">6 / 90</td>
-<td align="center">10 / 10</td>
-</tr>
-</table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
-<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
-<td align="right"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page"></td>
-</tr></table></span></form>
-</body>
-</html>
diff --git a/cpld/XC95144XL/MXSE_html/fit/fbs.htm b/cpld/XC95144XL/MXSE_html/fit/fbs.htm
index 7e5a523..5bd0cc4 100644
--- a/cpld/XC95144XL/MXSE_html/fit/fbs.htm
+++ b/cpld/XC95144XL/MXSE_html/fit/fbs.htm
@@ -16,35 +16,35 @@
 <tr>
 <td align="center"><a href="javascript:showFBDetail('FB1');" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">18 / 18</td>
-<td align="center">16 / 54</td>
-<td align="center">17 / 90</td>
+<td align="center">21 / 54</td>
+<td align="center">23 / 90</td>
 <td align="center">10 / 11</td>
 </tr>
 <tr>
 <td align="center"><a href="javascript:showFBDetail('FB2');" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">5 / 18</td>
-<td align="center">3 / 54</td>
-<td align="center">5 / 90</td>
+<td align="center">13 / 18</td>
+<td align="center">9 / 54</td>
+<td align="center">12 / 90</td>
 <td align="center">8 / 10</td>
 </tr>
 <tr>
 <td align="center"><a href="javascript:showFBDetail('FB3');" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">6 / 18</td>
-<td align="center">39 / 54</td>
+<td align="center">7 / 18</td>
+<td align="center">38 / 54</td>
 <td align="center">81 / 90</td>
 <td align="center">9 / 10</td>
 </tr>
 <tr>
 <td align="center"><a href="javascript:showFBDetail('FB4');" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">18 / 18</td>
-<td align="center">29 / 54</td>
-<td align="center">34 / 90</td>
-<td align="center">9 / 10</td>
+<td align="center">41 / 54</td>
+<td align="center">41 / 90</td>
+<td align="center">10 / 10</td>
 </tr>
 <tr>
 <td align="center"><a href="javascript:showFBDetail('FB5');" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">13 / 18</td>
-<td align="center">31 / 54</td>
+<td align="center">14 / 18</td>
+<td align="center">42 / 54</td>
 <td align="center">81 / 90</td>
 <td align="center">8 / 10</td>
 </tr>
@@ -52,22 +52,22 @@
 <td align="center"><a href="javascript:showFBDetail('FB6');" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">18 / 18</td>
 <td align="center">34 / 54</td>
-<td align="center">62 / 90</td>
+<td align="center">64 / 90</td>
 <td align="center">10 / 10</td>
 </tr>
 <tr>
 <td align="center"><a href="javascript:showFBDetail('FB7');" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
 <td align="center">15 / 18</td>
-<td align="center">39 / 54</td>
-<td align="center">73 / 90</td>
-<td align="center">6 / 10</td>
+<td align="center">36 / 54</td>
+<td align="center">75 / 90</td>
+<td align="center">10 / 10</td>
 </tr>
 <tr>
 <td align="center"><a href="javascript:showFBDetail('FB8');" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
 <td align="center">12 / 18</td>
-<td align="center">36 / 54</td>
+<td align="center">37 / 54</td>
 <td align="center">81 / 90</td>
-<td align="center">5 / 10</td>
+<td align="center">7 / 10</td>
 </tr>
 </table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
 <td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
diff --git a/cpld/XC95144XL/MXSE_html/fit/fbs_FB1 2.htm b/cpld/XC95144XL/MXSE_html/fit/fbs_FB1 2.htm
deleted file mode 100644
index 19067b9..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/fbs_FB1 2.htm	
+++ /dev/null
@@ -1,265 +0,0 @@
-<html>
-<head>
-<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
-<script src="tooltips.js"></script><script src="fbs.js"></script><link rel="stylesheet" type="text/css" href="style.css">
-</head>
-<body class="pgBgnd" id="XC95144XL">
-<span id="fbsel" class="pgRef"><table cellspacing="0" cellpadding="0" border="0" width="90%" align="center"><tr>
-<td width="33%" valign="center" align="left"></td>
-<td width="33%" valign="center" align="center"><form name="fbopt"><select onchange="javascript:showFB(document.fbopt.fbType.options[document.fbopt.fbType.options.selectedIndex].value)" name="fbType"><option value="FB1" selected>FB1</option>
-<option value="FB2">FB2</option>
-<option value="FB3">FB3</option>
-<option value="FB4">FB4</option>
-<option value="FB5">FB5</option>
-<option value="FB6">FB6</option>
-<option value="FB7">FB7</option>
-<option value="FB8">FB8</option></select></form></td>
-<td width="33%" valign="center" align="right"></td>
-</tr></table></span><div><span id="fbdata" class="pgRef"><table align="center" width="90%" border="1" cellpadding="0" cellspacing="0">
-<tr class="pgHeader">
-<th width="10%">Signal Name</th>
-<th width="10%">Total Product Terms</th>
-<th width="30%">Product Terms</th>
-<th width="10%">Location</th>
-<th width="10%">Power Mode</th>
-<th width="10%">Pin Number</th>
-<th width="10%">PinType</th>
-<th width="10%">Pin Use</th>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC1</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('nDTACK_FSB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDTACK_FSB</a></td>
-<td align="center" width="10%">23</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB1_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB1_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB1_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a> <a href="Javascript:showPT('FB1_18_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_4</a> <a href="Javascript:showPT('FB1_18_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_5</a> <a href="Javascript:showPT('FB1_1_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_1</a> <a href="Javascript:showPT('FB1_1_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_2</a> <a href="Javascript:showPT('FB1_1_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_3</a> <a href="Javascript:showPT('FB1_1_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_4</a> <a href="Javascript:showPT('FB1_1_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_5</a> <a href="Javascript:showPT('FB1_2_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_1</a> <a href="Javascript:showPT('FB1_2_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_2</a> <a href="Javascript:showPT('FB1_2_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_3</a> <a href="Javascript:showPT('FB1_2_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_4</a> <a href="Javascript:showPT('FB1_2_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_5</a> <a href="Javascript:showPT('FB1_3_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_1</a> <a href="Javascript:showPT('FB1_3_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_2</a> <a href="Javascript:showPT('FB1_3_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_3</a> <a href="Javascript:showPT('FB1_3_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_4</a> <a href="Javascript:showPT('FB1_3_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_5</a> <a href="Javascript:showPT('FB1_4_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_3</a> <a href="Javascript:showPT('FB1_4_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_4</a> <a href="Javascript:showPT('FB1_4_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_5</a>
-</td>
-<td align="center" width="10%">MC2</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">11</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC3</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">12</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;9&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('OpTxFX_DC606_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$FX_DC$606</a></td>
-<td align="center" width="10%">5</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB1_4_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_1</a> <a href="Javascript:showPT('FB1_4_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_2</a> <a href="Javascript:showPT('FB1_5_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_1</a> <a href="Javascript:showPT('FB1_5_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_2</a> <a href="Javascript:showPT('FB1_5_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_3</a>
-</td>
-<td align="center" width="10%">MC4</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC5</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">13</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'nAS_FSB'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('nBERR_FSB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nBERR_FSB</a></td>
-<td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB1_6_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_1</a> <a href="Javascript:showPT('FB1_6_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_2</a> <a href="Javascript:showPT('FB1_6_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_3</a>
-</td>
-<td align="center" width="10%">MC6</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">14</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('fsbReady1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready1r</a></td>
-<td align="center" width="10%">7</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB1_6_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_4</a> <a href="Javascript:showPT('FB1_6_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_5</a> <a href="Javascript:showPT('FB1_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a> <a href="Javascript:showPT('FB1_7_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_2</a> <a href="Javascript:showPT('FB1_7_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_3</a> <a href="Javascript:showPT('FB1_7_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_4</a> <a href="Javascript:showPT('FB1_7_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_5</a>
-</td>
-<td align="center" width="10%">MC7</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC8</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">15</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;5&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC9</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">16</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;2&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('fsbVPA__or00001fsbVPA__or00001_D2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA__or00001/fsb/VPA__or00001_D2</a></td>
-<td align="center" width="10%">8</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB1_10_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_1</a> <a href="Javascript:showPT('FB1_10_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_2</a> <a href="Javascript:showPT('FB1_10_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_3</a> <a href="Javascript:showPT('FB1_10_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_4</a> <a href="Javascript:showPT('FB1_10_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_5</a> <a href="Javascript:showPT('FB1_9_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_1</a> <a href="Javascript:showPT('FB1_9_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_2</a> <a href="Javascript:showPT('FB1_9_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_3</a>
-</td>
-<td align="center" width="10%">MC10</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('nOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nOE</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB1_11_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_1</a>
-</td>
-<td align="center" width="10%">MC11</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">17</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('fsbReady2r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready2r</a></td>
-<td align="center" width="10%">9</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB1_11_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_2</a> <a href="Javascript:showPT('FB1_11_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_3</a> <a href="Javascript:showPT('FB1_11_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_4</a> <a href="Javascript:showPT('FB1_11_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_5</a> <a href="Javascript:showPT('FB1_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a> <a href="Javascript:showPT('FB1_12_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_2</a> <a href="Javascript:showPT('FB1_12_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_3</a> <a href="Javascript:showPT('FB1_12_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_4</a> <a href="Javascript:showPT('FB1_12_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_5</a>
-</td>
-<td align="center" width="10%">MC12</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">18</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'nBERR_IOB'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC13</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC14</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">19</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;6&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('fsbVPA_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA</a></td>
-<td align="center" width="10%">22</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB1_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a> <a href="Javascript:showPT('FB1_13_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_2</a> <a href="Javascript:showPT('FB1_13_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_3</a> <a href="Javascript:showPT('FB1_13_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_4</a> <a href="Javascript:showPT('FB1_13_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_5</a> <a href="Javascript:showPT('FB1_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a> <a href="Javascript:showPT('FB1_14_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_2</a> <a href="Javascript:showPT('FB1_14_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_3</a> <a href="Javascript:showPT('FB1_14_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_4</a> <a href="Javascript:showPT('FB1_14_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_5</a> <a href="Javascript:showPT('FB1_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a> <a href="Javascript:showPT('FB1_15_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_2</a> <a href="Javascript:showPT('FB1_15_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_3</a> <a href="Javascript:showPT('FB1_15_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_4</a> <a href="Javascript:showPT('FB1_15_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_5</a> <a href="Javascript:showPT('FB1_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB1_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a> <a href="Javascript:showPT('FB1_16_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_3</a> <a href="Javascript:showPT('FB1_16_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_4</a> <a href="Javascript:showPT('FB1_16_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_5</a> <a href="Javascript:showPT('FB1_17_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_3</a> <a href="Javascript:showPT('FB1_17_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_4</a>
-</td>
-<td align="center" width="10%">MC15</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">20</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;7&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC16</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('OpTxFX_DC602_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$FX_DC$602</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB1_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a> <a href="Javascript:showPT('FB1_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a>
-</td>
-<td align="center" width="10%">MC17</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">22</td>
-<td width="8%" align="center">I/O/GCK1</td>
-<td align="center" width="10%">GCK</td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC18</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-</table></span></div>
-<div id="tipBox"></div>
-<br><span id="fbsiguse" class="pgRef"><b>Signals Used By Logic in Function Block</b><br><ol>
-<li><a href="Javascript:showEqn('OpTxFX_DC602_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$FX_DC$602</a></li>
-<li><a href="Javascript:showEqn('OpTxFX_DC606_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$FX_DC$606</a></li>
-<li>A_FSB&lt;10&gt;</li>
-<li>A_FSB&lt;11&gt;</li>
-<li>A_FSB&lt;12&gt;</li>
-<li>A_FSB&lt;13&gt;</li>
-<li>A_FSB&lt;14&gt;</li>
-<li>A_FSB&lt;15&gt;</li>
-<li>A_FSB&lt;16&gt;</li>
-<li>A_FSB&lt;17&gt;</li>
-<li>A_FSB&lt;18&gt;</li>
-<li>A_FSB&lt;19&gt;</li>
-<li>A_FSB&lt;20&gt;</li>
-<li>A_FSB&lt;21&gt;</li>
-<li>A_FSB&lt;22&gt;</li>
-<li>A_FSB&lt;23&gt;</li>
-<li>A_FSB&lt;8&gt;</li>
-<li>A_FSB&lt;9&gt;</li>
-<li><a href="Javascript:showEqn('BERR_IOBS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">BERR_IOBS</a></li>
-<li><a href="Javascript:showEqn('TimeoutA')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutA</a></li>
-<li><a href="Javascript:showEqn('TimeoutB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutB</a></li>
-<li><a href="Javascript:showEqn('csnOverlay1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay1</a></li>
-<li><a href="Javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></li>
-<li><a href="Javascript:showEqn('fsbBERR0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR0r</a></li>
-<li><a href="Javascript:showEqn('fsbBERR1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR1r</a></li>
-<li><a href="Javascript:showEqn('fsbReady0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready0r</a></li>
-<li><a href="Javascript:showEqn('fsbReady1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready1r</a></li>
-<li><a href="Javascript:showEqn('fsbReady2r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready2r</a></li>
-<li><a href="Javascript:showEqn('fsbVPA_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA</a></li>
-<li><a href="Javascript:showEqn('fsbVPA__or00001fsbVPA__or00001_D2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA__or00001/fsb/VPA__or00001_D2</a></li>
-<li><a href="Javascript:showEqn('iobsIOReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOReady</a></li>
-<li><a href="Javascript:showEqn('nADoutLE1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nADoutLE1</a></li>
-<li>nAS_FSB</li>
-<li><a href="Javascript:showEqn('nDTACK_FSB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDTACK_FSB</a></li>
-<li>nWE_FSB</li>
-<li><a href="Javascript:showEqn('ramRAMReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMReady</a></li>
-</ol></span><form><span class="pgRef"><table width="90%" align="center"><tr>
-<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
-<td align="center"><table align="center" width="90%" border="0" cellpadding="0" cellspacing="0"><tr><td width="100%" align="center"><input type="button" onclick="javascript:showFB('FB2')" onmouseover="window.status='show next Function Block'; return true;" onmouseout="window.status=''" value="next"></td></tr></table></td>
-<td align="right">
-<input type="button" onclick="javascript:showLegend('logiclegend.htm')" onmouseover="window.status='show Legend'; return true;" onmouseout="window.status=''" value="legend"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page">
-</td>
-</tr></table></span></form>
-</body>
-</html>
diff --git a/cpld/XC95144XL/MXSE_html/fit/fbs_FB1.htm b/cpld/XC95144XL/MXSE_html/fit/fbs_FB1.htm
index e560ea0..8c32774 100644
--- a/cpld/XC95144XL/MXSE_html/fit/fbs_FB1.htm
+++ b/cpld/XC95144XL/MXSE_html/fit/fbs_FB1.htm
@@ -27,7 +27,7 @@
 <th width="10%">Pin Use</th>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsIOACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOACTr</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('ramBACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/BACTr</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB1_1_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_1</a>
 </td>
@@ -38,7 +38,7 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOREQr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOREQr</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmRESrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrr</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB1_2_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_1</a>
 </td>
@@ -49,7 +49,7 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;13&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmEr2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er2</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmRESrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrf</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB1_3_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_1</a>
 </td>
@@ -60,7 +60,7 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;14&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmDTACKrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrr</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB1_4_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_1</a>
 </td>
@@ -71,7 +71,7 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmDTACKrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrf</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('cntRefCnt2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;2&gt;</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB1_5_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_1</a>
 </td>
@@ -82,7 +82,7 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;15&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmBERRrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrr</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('cntRefCnt1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;1&gt;</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB1_6_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_1</a>
 </td>
@@ -93,7 +93,7 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;16&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmBERRrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrf</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('RefAck')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RefAck</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB1_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a>
 </td>
@@ -104,7 +104,7 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('RESr2')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RESr2</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB1_8_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_1</a>
 </td>
@@ -115,7 +115,7 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;17&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntRefCnt7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;7&gt;</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('RESr1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RESr1</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB1_9_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_1</a>
 </td>
@@ -126,7 +126,7 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;18&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntRefCnt6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;6&gt;</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('RESr0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RESr0</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB1_10_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_1</a>
 </td>
@@ -137,7 +137,7 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntRefCnt5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;5&gt;</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('IPL2r1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IPL2r1</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB1_11_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_1</a>
 </td>
@@ -148,7 +148,7 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;19&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntRefCnt4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;4&gt;</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('IPL2r0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IPL2r0</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB1_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a>
 </td>
@@ -159,7 +159,7 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;20&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntRefCnt3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;3&gt;</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('ALE0S')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ALE0S</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB1_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a>
 </td>
@@ -170,7 +170,7 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntRefCnt2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;2&gt;</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('OpTxFX_DC708_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$FX_DC$708</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB1_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a>
 </td>
@@ -181,9 +181,9 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;21&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntRefCnt1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;1&gt;</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB1_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobsIOU1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU1</a></td>
+<td align="center" width="10%">2</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB1_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a> <a href="Javascript:showPT('FB1_15_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_2</a>
 </td>
 <td align="center" width="10%">MC15</td>
 <td align="center" width="10%">STD</td>
@@ -192,9 +192,9 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;22&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntRefCnt0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;0&gt;</a></td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('VCC')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''"></a>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobsIOL1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOL1</a></td>
+<td align="center" width="10%">2</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB1_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB1_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a>
 </td>
 <td align="center" width="10%">MC16</td>
 <td align="center" width="10%">STD</td>
@@ -203,9 +203,9 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('RefAck')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RefAck</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB1_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd1</a></td>
+<td align="center" width="10%">2</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB1_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a> <a href="Javascript:showPT('FB1_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a>
 </td>
 <td align="center" width="10%">MC17</td>
 <td align="center" width="10%">STD</td>
@@ -214,9 +214,9 @@
 <td align="center" width="10%">GCK</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('OpTxFX_DC609_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$FX_DC$609</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB1_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('IOU0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOU0</a></td>
+<td align="center" width="10%">3</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB1_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB1_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB1_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a>
 </td>
 <td align="center" width="10%">MC18</td>
 <td align="center" width="10%">STD</td>
@@ -227,20 +227,25 @@
 </table></span></div>
 <div id="tipBox"></div>
 <br><span id="fbsiguse" class="pgRef"><b>Signals Used By Logic in Function Block</b><br><ol>
-<li><a href="Javascript:showEqn('IOACT')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOACT</a></li>
-<li><a href="Javascript:showEqn('IOREQ')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOREQ</a></li>
+<li><a href="Javascript:showEqn('IPL2r0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IPL2r0</a></li>
+<li><a href="Javascript:showEqn('RESr0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RESr0</a></li>
+<li><a href="Javascript:showEqn('RESr1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RESr1</a></li>
 <li><a href="Javascript:showEqn('cntRefCnt0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;0&gt;</a></li>
 <li><a href="Javascript:showEqn('cntRefCnt1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;1&gt;</a></li>
-<li><a href="Javascript:showEqn('cntRefCnt2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;2&gt;</a></li>
-<li><a href="Javascript:showEqn('cntRefCnt3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;3&gt;</a></li>
-<li><a href="Javascript:showEqn('cntRefCnt4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;4&gt;</a></li>
-<li><a href="Javascript:showEqn('cntRefCnt5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;5&gt;</a></li>
-<li><a href="Javascript:showEqn('cntRefCnt6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;6&gt;</a></li>
 <li><a href="Javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></li>
-<li><a href="Javascript:showEqn('iobmEr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er</a></li>
+<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd1</a></li>
+<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd2</a></li>
+<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd3</a></li>
+<li><a href="Javascript:showEqn('iobsIOU1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU1</a></li>
+<li><a href="Javascript:showEqn('iobsLoad1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Load1</a></li>
+<li><a href="Javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></li>
+<li><a href="Javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></li>
+<li><a href="Javascript:showEqn('nADoutLE1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nADoutLE1</a></li>
 <li>nAS_FSB</li>
-<li>nBERR_IOB</li>
-<li>nDTACK_IOB</li>
+<li>nIPL2</li>
+<li>nLDS_FSB</li>
+<li>nRES</li>
+<li>nUDS_FSB</li>
 <li><a href="Javascript:showEqn('ramRS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd1</a></li>
 <li><a href="Javascript:showEqn('ramRS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd2</a></li>
 </ol></span><form><span class="pgRef"><table width="90%" align="center"><tr>
diff --git a/cpld/XC95144XL/MXSE_html/fit/fbs_FB2 2.htm b/cpld/XC95144XL/MXSE_html/fit/fbs_FB2 2.htm
deleted file mode 100644
index c327863..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/fbs_FB2 2.htm	
+++ /dev/null
@@ -1,277 +0,0 @@
-<html>
-<head>
-<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
-<script src="tooltips.js"></script><script src="fbs.js"></script><link rel="stylesheet" type="text/css" href="style.css">
-</head>
-<body class="pgBgnd" id="XC95144XL">
-<span id="fbsel" class="pgRef"><table cellspacing="0" cellpadding="0" border="0" width="90%" align="center"><tr>
-<td width="33%" valign="center" align="left"></td>
-<td width="33%" valign="center" align="center"><form name="fbopt"><select onchange="javascript:showFB(document.fbopt.fbType.options[document.fbopt.fbType.options.selectedIndex].value)" name="fbType"><option value="FB1">FB1</option>
-<option value="FB2" selected>FB2</option>
-<option value="FB3">FB3</option>
-<option value="FB4">FB4</option>
-<option value="FB5">FB5</option>
-<option value="FB6">FB6</option>
-<option value="FB7">FB7</option>
-<option value="FB8">FB8</option></select></form></td>
-<td width="33%" valign="center" align="right"></td>
-</tr></table></span><div><span id="fbdata" class="pgRef"><table align="center" width="90%" border="1" cellpadding="0" cellspacing="0">
-<tr class="pgHeader">
-<th width="10%">Signal Name</th>
-<th width="10%">Total Product Terms</th>
-<th width="30%">Product Terms</th>
-<th width="10%">Location</th>
-<th width="10%">Power Mode</th>
-<th width="10%">Pin Number</th>
-<th width="10%">PinType</th>
-<th width="10%">Pin Use</th>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmVPArr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArr</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB2_1_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_1</a>
-</td>
-<td align="center" width="10%">MC1</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmVPArf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArf</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB2_2_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_1</a>
-</td>
-<td align="center" width="10%">MC2</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">99</td>
-<td width="8%" align="center">I/O/GSR</td>
-<td align="center" width="10%">GSR/I</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmRESrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrr</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB2_3_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_1</a>
-</td>
-<td align="center" width="10%">MC3</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmRESrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrf</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB2_4_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_1</a>
-</td>
-<td align="center" width="10%">MC4</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOREQr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOREQr</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB2_5_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_1</a>
-</td>
-<td align="center" width="10%">MC5</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">1</td>
-<td width="8%" align="center">I/O/GTS3</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntRefCnt3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;3&gt;</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB2_6_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_1</a>
-</td>
-<td align="center" width="10%">MC6</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">2</td>
-<td width="8%" align="center">I/O/GTS4</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntRefCnt2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;2&gt;</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB2_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a>
-</td>
-<td align="center" width="10%">MC7</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntRefCnt1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;1&gt;</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB2_8_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_1</a>
-</td>
-<td align="center" width="10%">MC8</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">3</td>
-<td width="8%" align="center">I/O/GTS1</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('fsbBERR1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR1r</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB2_9_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_1</a> <a href="Javascript:showPT('FB2_9_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_2</a>
-</td>
-<td align="center" width="10%">MC9</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">4</td>
-<td width="8%" align="center">I/O/GTS2</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntRefDone_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefDone</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB2_10_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_1</a> <a href="Javascript:showPT('FB2_10_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_2</a>
-</td>
-<td align="center" width="10%">MC10</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('nLDS_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nLDS_IOB</a></td>
-<td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB2_11_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_1</a> <a href="Javascript:showPT('FB2_11_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_2</a> <a href="Javascript:showPT('FB2_11_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_3</a>
-</td>
-<td align="center" width="10%">MC11</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">6</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('nUDS_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nUDS_IOB</a></td>
-<td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB2_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a> <a href="Javascript:showPT('FB2_12_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_2</a> <a href="Javascript:showPT('FB2_12_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_3</a>
-</td>
-<td align="center" width="10%">MC12</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">7</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntTimeoutBPre_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/TimeoutBPre</a></td>
-<td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB2_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a> <a href="Javascript:showPT('FB2_13_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_2</a> <a href="Javascript:showPT('FB2_13_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_3</a>
-</td>
-<td align="center" width="10%">MC13</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('nDoutOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDoutOE</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB2_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a> <a href="Javascript:showPT('FB2_14_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_2</a>
-</td>
-<td align="center" width="10%">MC14</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">8</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('TimeoutB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutB</a></td>
-<td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB2_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a> <a href="Javascript:showPT('FB2_15_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_2</a> <a href="Javascript:showPT('FB2_15_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_3</a>
-</td>
-<td align="center" width="10%">MC15</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">9</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;22&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('TimeoutA')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutA</a></td>
-<td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB2_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB2_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a> <a href="Javascript:showPT('FB2_16_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_3</a>
-</td>
-<td align="center" width="10%">MC16</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('nAS_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nAS_IOB</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB2_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a>
-</td>
-<td align="center" width="10%">MC17</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">10</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsIOReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOReady</a></td>
-<td align="center" width="10%">4</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB2_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB2_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB2_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a> <a href="Javascript:showPT('FB2_18_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_4</a>
-</td>
-<td align="center" width="10%">MC18</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-</table></span></div>
-<div id="tipBox"></div>
-<br><span id="fbsiguse" class="pgRef"><b>Signals Used By Logic in Function Block</b><br><ol>
-<li><a href="Javascript:showEqn('BERR_IOBS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">BERR_IOBS</a></li>
-<li><a href="Javascript:showEqn('IOBERR')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOBERR</a></li>
-<li><a href="Javascript:showEqn('IOL0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOL0</a></li>
-<li><a href="Javascript:showEqn('IOREQ')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOREQ</a></li>
-<li><a href="Javascript:showEqn('IORW0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IORW0</a></li>
-<li><a href="Javascript:showEqn('IOU0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOU0</a></li>
-<li><a href="Javascript:showEqn('RefAck')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RefAck</a></li>
-<li><a href="Javascript:showEqn('TimeoutA')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutA</a></li>
-<li><a href="Javascript:showEqn('TimeoutB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutB</a></li>
-<li><a href="Javascript:showEqn('cntRefCnt0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;0&gt;</a></li>
-<li><a href="Javascript:showEqn('cntRefCnt1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;1&gt;</a></li>
-<li><a href="Javascript:showEqn('cntRefCnt2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;2&gt;</a></li>
-<li><a href="Javascript:showEqn('cntRefCnt3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;3&gt;</a></li>
-<li><a href="Javascript:showEqn('cntRefCnt4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;4&gt;</a></li>
-<li><a href="Javascript:showEqn('cntRefCnt5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;5&gt;</a></li>
-<li><a href="Javascript:showEqn('cntRefCnt6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;6&gt;</a></li>
-<li><a href="Javascript:showEqn('cntRefCnt7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;7&gt;</a></li>
-<li><a href="Javascript:showEqn('cntRefDone_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefDone</a></li>
-<li><a href="Javascript:showEqn('cntTimeoutBPre_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/TimeoutBPre</a></li>
-<li><a href="Javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></li>
-<li><a href="Javascript:showEqn('fsbBERR1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR1r</a></li>
-<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd2</a></li>
-<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd3</a></li>
-<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd4</a></li>
-<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd5</a></li>
-<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd6</a></li>
-<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd7</a></li>
-<li><a href="Javascript:showEqn('iobsIOACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOACTr</a></li>
-<li><a href="Javascript:showEqn('iobsIOReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOReady</a></li>
-<li><a href="Javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></li>
-<li><a href="Javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></li>
-<li><a href="Javascript:showEqn('nADoutLE1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nADoutLE1</a></li>
-<li>nAS_FSB</li>
-<li>nRES</li>
-<li>nVPA_IOB</li>
-</ol></span><form><span class="pgRef"><table width="90%" align="center"><tr>
-<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
-<td align="center"><table align="center" width="90%" border="0" cellpadding="0" cellspacing="0"><tr><td width="100%" align="center">
-<input type="button" onclick="javascript:showFB('FB1')" onmouseover="window.status='show previous Function Block'; return true;" onmouseout="window.status=''" value="prev">
-                    
-                  <input type="button" onclick="javascript:showFB('FB3')" onmouseover="window.status='show next Function Block'; return true;" onmouseout="window.status=''" value="next">
-</td></tr></table></td>
-<td align="right">
-<input type="button" onclick="javascript:showLegend('logiclegend.htm')" onmouseover="window.status='show Legend'; return true;" onmouseout="window.status=''" value="legend"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page">
-</td>
-</tr></table></span></form>
-</body>
-</html>
diff --git a/cpld/XC95144XL/MXSE_html/fit/fbs_FB2.htm b/cpld/XC95144XL/MXSE_html/fit/fbs_FB2.htm
index 144d0fe..1bc03b3 100644
--- a/cpld/XC95144XL/MXSE_html/fit/fbs_FB2.htm
+++ b/cpld/XC95144XL/MXSE_html/fit/fbs_FB2.htm
@@ -77,87 +77,95 @@
 <td align="center" width="10%"> </td>
 </tr>
 <tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobsIOACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOACTr</a></td>
+<td align="center" width="10%">1</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB2_6_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_1</a>
+</td>
 <td align="center" width="10%">MC6</td>
-<td align="center" width="10%"> </td>
+<td align="center" width="10%">STD</td>
 <td align="center" width="10%">2</td>
 <td width="8%" align="center">I/O/GTS4</td>
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;5&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmVPArr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArr</a></td>
+<td align="center" width="10%">1</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB2_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a>
+</td>
 <td align="center" width="10%">MC7</td>
-<td align="center" width="10%"> </td>
+<td align="center" width="10%">STD</td>
 <td align="center" width="10%"> </td>
 <td align="center" width="10%">(b)</td>
-<td align="center" width="10%"> </td>
+<td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmVPArf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArf</a></td>
+<td align="center" width="10%">1</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB2_8_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_1</a>
+</td>
 <td align="center" width="10%">MC8</td>
-<td align="center" width="10%"> </td>
+<td align="center" width="10%">STD</td>
 <td align="center" width="10%">3</td>
 <td width="8%" align="center">I/O/GTS1</td>
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;6&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOREQr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOREQr</a></td>
+<td align="center" width="10%">1</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB2_9_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_1</a>
+</td>
 <td align="center" width="10%">MC9</td>
-<td align="center" width="10%"> </td>
+<td align="center" width="10%">STD</td>
 <td align="center" width="10%">4</td>
 <td width="8%" align="center">I/O/GTS2</td>
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;7&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmEr2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er2</a></td>
+<td align="center" width="10%">1</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB2_10_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_1</a>
+</td>
 <td align="center" width="10%">MC10</td>
-<td align="center" width="10%"> </td>
+<td align="center" width="10%">STD</td>
 <td align="center" width="10%"> </td>
 <td align="center" width="10%">(b)</td>
-<td align="center" width="10%"> </td>
+<td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmEr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er</a></td>
+<td align="center" width="10%">1</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB2_11_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_1</a>
+</td>
 <td align="center" width="10%">MC11</td>
-<td align="center" width="10%"> </td>
+<td align="center" width="10%">STD</td>
 <td align="center" width="10%">6</td>
 <td width="8%" align="center">I/O</td>
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;8&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmDTACKrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrr</a></td>
+<td align="center" width="10%">1</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB2_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a>
+</td>
 <td align="center" width="10%">MC12</td>
-<td align="center" width="10%"> </td>
+<td align="center" width="10%">STD</td>
 <td align="center" width="10%">7</td>
 <td width="8%" align="center">I/O</td>
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;9&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmDTACKrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrf</a></td>
+<td align="center" width="10%">1</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB2_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a>
+</td>
 <td align="center" width="10%">MC13</td>
-<td align="center" width="10%"> </td>
+<td align="center" width="10%">STD</td>
 <td align="center" width="10%"> </td>
 <td align="center" width="10%">(b)</td>
-<td align="center" width="10%"> </td>
+<td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmVPArr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArr</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmBGr1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BGr1</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB2_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a>
 </td>
@@ -168,7 +176,7 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;10&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmVPArf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArf</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmBGr0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BGr0</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB2_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a>
 </td>
@@ -179,7 +187,7 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;11&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmRESrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrr</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmBERRrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrr</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB2_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a>
 </td>
@@ -190,7 +198,7 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmRESrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrf</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmBERRrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrf</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB2_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a>
 </td>
@@ -201,9 +209,9 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;12&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmEr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB2_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('cntRefCnt0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;0&gt;</a></td>
+<td align="center" width="10%">0</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('VCC')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''"></a>
 </td>
 <td align="center" width="10%">MC18</td>
 <td align="center" width="10%">STD</td>
@@ -215,7 +223,13 @@
 <div id="tipBox"></div>
 <br><span id="fbsiguse" class="pgRef"><b>Signals Used By Logic in Function Block</b><br><ol>
 <li>E_IOB</li>
-<li>nRES</li>
+<li><a href="Javascript:showEqn('IOACT')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOACT</a></li>
+<li><a href="Javascript:showEqn('IOREQ')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOREQ</a></li>
+<li><a href="Javascript:showEqn('iobmBGr0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BGr0</a></li>
+<li><a href="Javascript:showEqn('iobmEr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er</a></li>
+<li>nBERR_IOB</li>
+<li>nBG_IOB</li>
+<li>nDTACK_IOB</li>
 <li>nVPA_IOB</li>
 </ol></span><form><span class="pgRef"><table width="90%" align="center"><tr>
 <td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
diff --git a/cpld/XC95144XL/MXSE_html/fit/fbs_FB3 2.htm b/cpld/XC95144XL/MXSE_html/fit/fbs_FB3 2.htm
deleted file mode 100644
index 2428c8b..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/fbs_FB3 2.htm	
+++ /dev/null
@@ -1,273 +0,0 @@
-<html>
-<head>
-<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
-<script src="tooltips.js"></script><script src="fbs.js"></script><link rel="stylesheet" type="text/css" href="style.css">
-</head>
-<body class="pgBgnd" id="XC95144XL">
-<span id="fbsel" class="pgRef"><table cellspacing="0" cellpadding="0" border="0" width="90%" align="center"><tr>
-<td width="33%" valign="center" align="left"></td>
-<td width="33%" valign="center" align="center"><form name="fbopt"><select onchange="javascript:showFB(document.fbopt.fbType.options[document.fbopt.fbType.options.selectedIndex].value)" name="fbType"><option value="FB1">FB1</option>
-<option value="FB2">FB2</option>
-<option value="FB3" selected>FB3</option>
-<option value="FB4">FB4</option>
-<option value="FB5">FB5</option>
-<option value="FB6">FB6</option>
-<option value="FB7">FB7</option>
-<option value="FB8">FB8</option></select></form></td>
-<td width="33%" valign="center" align="right"></td>
-</tr></table></span><div><span id="fbdata" class="pgRef"><table align="center" width="90%" border="1" cellpadding="0" cellspacing="0">
-<tr class="pgHeader">
-<th width="10%">Signal Name</th>
-<th width="10%">Total Product Terms</th>
-<th width="30%">Product Terms</th>
-<th width="10%">Location</th>
-<th width="10%">Power Mode</th>
-<th width="10%">Pin Number</th>
-<th width="10%">PinType</th>
-<th width="10%">Pin Use</th>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC1</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC2</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">23</td>
-<td width="8%" align="center">I/O/GCK2</td>
-<td align="center" width="10%">GCK</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('IORW0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IORW0</a></td>
-<td align="center" width="10%">18</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB3_1_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_1</a> <a href="Javascript:showPT('FB3_1_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_2</a> <a href="Javascript:showPT('FB3_1_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_3</a> <a href="Javascript:showPT('FB3_1_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_4</a> <a href="Javascript:showPT('FB3_2_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_1</a> <a href="Javascript:showPT('FB3_2_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_2</a> <a href="Javascript:showPT('FB3_2_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_3</a> <a href="Javascript:showPT('FB3_2_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_4</a> <a href="Javascript:showPT('FB3_2_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_5</a> <a href="Javascript:showPT('FB3_3_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_1</a> <a href="Javascript:showPT('FB3_3_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_2</a> <a href="Javascript:showPT('FB3_3_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_3</a> <a href="Javascript:showPT('FB3_3_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_4</a> <a href="Javascript:showPT('FB3_3_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_5</a> <a href="Javascript:showPT('FB3_4_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_2</a> <a href="Javascript:showPT('FB3_4_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_3</a> <a href="Javascript:showPT('FB3_4_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_4</a> <a href="Javascript:showPT('FB3_4_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_5</a>
-</td>
-<td align="center" width="10%">MC3</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsIOACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOACTr</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB3_4_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_1</a>
-</td>
-<td align="center" width="10%">MC4</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('nRAS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nRAS</a></td>
-<td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB3_5_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_1</a> <a href="Javascript:showPT('FB3_5_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_2</a> <a href="Javascript:showPT('FB3_5_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_3</a>
-</td>
-<td align="center" width="10%">MC5</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">24</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsClear1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Clear1</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB3_6_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_1</a>
-</td>
-<td align="center" width="10%">MC6</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">25</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'nLDS_FSB'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB3_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a>
-</td>
-<td align="center" width="10%">MC7</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ALE0S')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ALE0S</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB3_8_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_1</a>
-</td>
-<td align="center" width="10%">MC8</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">27</td>
-<td width="8%" align="center">I/O/GCK3</td>
-<td align="center" width="10%">GCK/I</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></td>
-<td align="center" width="10%">14</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB3_10_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_1</a> <a href="Javascript:showPT('FB3_10_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_2</a> <a href="Javascript:showPT('FB3_10_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_3</a> <a href="Javascript:showPT('FB3_10_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_4</a> <a href="Javascript:showPT('FB3_10_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_5</a> <a href="Javascript:showPT('FB3_8_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_2</a> <a href="Javascript:showPT('FB3_8_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_3</a> <a href="Javascript:showPT('FB3_8_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_4</a> <a href="Javascript:showPT('FB3_8_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_5</a> <a href="Javascript:showPT('FB3_9_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_1</a> <a href="Javascript:showPT('FB3_9_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_2</a> <a href="Javascript:showPT('FB3_9_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_3</a> <a href="Javascript:showPT('FB3_9_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_4</a> <a href="Javascript:showPT('FB3_9_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_5</a>
-</td>
-<td align="center" width="10%">MC9</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">28</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC10</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('nADoutLE1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nADoutLE1</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB3_11_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_1</a> <a href="Javascript:showPT('FB3_11_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_2</a>
-</td>
-<td align="center" width="10%">MC11</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">29</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB3_11_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_3</a> <a href="Javascript:showPT('FB3_11_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_4</a>
-</td>
-<td align="center" width="10%">MC12</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">30</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('IOREQ')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOREQ</a></td>
-<td align="center" width="10%">14</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB3_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a> <a href="Javascript:showPT('FB3_12_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_2</a> <a href="Javascript:showPT('FB3_12_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_3</a> <a href="Javascript:showPT('FB3_12_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_4</a> <a href="Javascript:showPT('FB3_12_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_5</a> <a href="Javascript:showPT('FB3_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a> <a href="Javascript:showPT('FB3_13_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_2</a> <a href="Javascript:showPT('FB3_13_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_3</a> <a href="Javascript:showPT('FB3_13_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_4</a> <a href="Javascript:showPT('FB3_13_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_5</a> <a href="Javascript:showPT('FB3_14_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_2</a> <a href="Javascript:showPT('FB3_14_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_3</a> <a href="Javascript:showPT('FB3_14_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_4</a> <a href="Javascript:showPT('FB3_14_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_5</a>
-</td>
-<td align="center" width="10%">MC13</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmETACK_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ETACK</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB3_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a>
-</td>
-<td align="center" width="10%">MC14</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">32</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('nVMA_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nVMA_IOB</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB3_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a> <a href="Javascript:showPT('FB3_15_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_2</a>
-</td>
-<td align="center" width="10%">MC15</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">33</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC16</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsIORW1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IORW1</a></td>
-<td align="center" width="10%">16</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB3_15_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_3</a> <a href="Javascript:showPT('FB3_15_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_4</a> <a href="Javascript:showPT('FB3_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB3_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a> <a href="Javascript:showPT('FB3_16_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_3</a> <a href="Javascript:showPT('FB3_16_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_4</a> <a href="Javascript:showPT('FB3_16_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_5</a> <a href="Javascript:showPT('FB3_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a> <a href="Javascript:showPT('FB3_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a> <a href="Javascript:showPT('FB3_17_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_3</a> <a href="Javascript:showPT('FB3_17_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_4</a> <a href="Javascript:showPT('FB3_17_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_5</a> <a href="Javascript:showPT('FB3_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB3_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a> <a href="Javascript:showPT('FB3_18_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_4</a> <a href="Javascript:showPT('FB3_18_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_5</a>
-</td>
-<td align="center" width="10%">MC17</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">34</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ramBACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/BACTr</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB3_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a>
-</td>
-<td align="center" width="10%">MC18</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-</table></span></div>
-<div id="tipBox"></div>
-<br><span id="fbsiguse" class="pgRef"><b>Signals Used By Logic in Function Block</b><br><ol>
-<li>A_FSB&lt;13&gt;</li>
-<li>A_FSB&lt;14&gt;</li>
-<li>A_FSB&lt;16&gt;</li>
-<li>A_FSB&lt;17&gt;</li>
-<li>A_FSB&lt;18&gt;</li>
-<li>A_FSB&lt;19&gt;</li>
-<li>A_FSB&lt;20&gt;</li>
-<li>A_FSB&lt;21&gt;</li>
-<li>A_FSB&lt;22&gt;</li>
-<li>A_FSB&lt;23&gt;</li>
-<li><a href="Javascript:showEqn('IOACT')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOACT</a></li>
-<li><a href="Javascript:showEqn('IORW0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IORW0</a></li>
-<li><a href="Javascript:showEqn('RefAck')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RefAck</a></li>
-<li><a href="Javascript:showEqn('csnOverlay1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay1</a></li>
-<li><a href="Javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></li>
-<li><a href="Javascript:showEqn('iobmES0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;0&gt;</a></li>
-<li><a href="Javascript:showEqn('iobmES1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;1&gt;</a></li>
-<li><a href="Javascript:showEqn('iobmES2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;2&gt;</a></li>
-<li><a href="Javascript:showEqn('iobmES3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;3&gt;</a></li>
-<li><a href="Javascript:showEqn('iobmES4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;4&gt;</a></li>
-<li><a href="Javascript:showEqn('iobmVPArf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArf</a></li>
-<li><a href="Javascript:showEqn('iobmVPArr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArr</a></li>
-<li><a href="Javascript:showEqn('iobsClear1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Clear1</a></li>
-<li><a href="Javascript:showEqn('iobsIOACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOACTr</a></li>
-<li><a href="Javascript:showEqn('iobsIORW1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IORW1</a></li>
-<li><a href="Javascript:showEqn('iobsLoad1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Load1</a></li>
-<li><a href="Javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></li>
-<li><a href="Javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></li>
-<li><a href="Javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></li>
-<li><a href="Javascript:showEqn('nADoutLE1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nADoutLE1</a></li>
-<li>nAS_FSB</li>
-<li><a href="Javascript:showEqn('nVMA_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nVMA_IOB</a></li>
-<li>nWE_FSB</li>
-<li><a href="Javascript:showEqn('ramRAMDIS1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS1</a></li>
-<li><a href="Javascript:showEqn('ramRAMDIS2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS2</a></li>
-</ol></span><form><span class="pgRef"><table width="90%" align="center"><tr>
-<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
-<td align="center"><table align="center" width="90%" border="0" cellpadding="0" cellspacing="0"><tr><td width="100%" align="center">
-<input type="button" onclick="javascript:showFB('FB2')" onmouseover="window.status='show previous Function Block'; return true;" onmouseout="window.status=''" value="prev">
-                    
-                  <input type="button" onclick="javascript:showFB('FB4')" onmouseover="window.status='show next Function Block'; return true;" onmouseout="window.status=''" value="next">
-</td></tr></table></td>
-<td align="right">
-<input type="button" onclick="javascript:showLegend('logiclegend.htm')" onmouseover="window.status='show Legend'; return true;" onmouseout="window.status=''" value="legend"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page">
-</td>
-</tr></table></span></form>
-</body>
-</html>
diff --git a/cpld/XC95144XL/MXSE_html/fit/fbs_FB3.htm b/cpld/XC95144XL/MXSE_html/fit/fbs_FB3.htm
index 81f012d..4412f3f 100644
--- a/cpld/XC95144XL/MXSE_html/fit/fbs_FB3.htm
+++ b/cpld/XC95144XL/MXSE_html/fit/fbs_FB3.htm
@@ -27,32 +27,33 @@
 <th width="10%">Pin Use</th>
 </tr>
 <tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
+<td align="center" width="10%"><a href="Javascript:showEqn('fsbReady1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready1r</a></td>
+<td align="center" width="10%">8</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB3_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB3_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a> <a href="Javascript:showPT('FB3_18_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_4</a> <a href="Javascript:showPT('FB3_18_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_5</a> <a href="Javascript:showPT('FB3_1_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_1</a> <a href="Javascript:showPT('FB3_1_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_2</a> <a href="Javascript:showPT('FB3_1_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_3</a> <a href="Javascript:showPT('FB3_1_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_4</a>
+</td>
 <td align="center" width="10%">MC1</td>
-<td align="center" width="10%"> </td>
+<td align="center" width="10%">STD</td>
 <td align="center" width="10%"> </td>
 <td align="center" width="10%">(b)</td>
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('fsbVPA_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA</a></td>
-<td align="center" width="10%">25</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB3_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB3_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB3_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a> <a href="Javascript:showPT('FB3_18_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_4</a> <a href="Javascript:showPT('FB3_18_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_5</a> <a href="Javascript:showPT('FB3_1_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_1</a> <a href="Javascript:showPT('FB3_1_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_2</a> <a href="Javascript:showPT('FB3_1_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_3</a> <a href="Javascript:showPT('FB3_1_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_4</a> <a href="Javascript:showPT('FB3_1_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_5</a> <a href="Javascript:showPT('FB3_2_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_1</a> <a href="Javascript:showPT('FB3_2_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_2</a> <a href="Javascript:showPT('FB3_2_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_3</a> <a href="Javascript:showPT('FB3_2_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_4</a> <a href="Javascript:showPT('FB3_2_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_5</a> <a href="Javascript:showPT('FB3_3_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_1</a> <a href="Javascript:showPT('FB3_3_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_2</a> <a href="Javascript:showPT('FB3_3_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_3</a> <a href="Javascript:showPT('FB3_3_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_4</a> <a href="Javascript:showPT('FB3_3_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_5</a> <a href="Javascript:showPT('FB3_4_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_1</a> <a href="Javascript:showPT('FB3_4_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_2</a> <a href="Javascript:showPT('FB3_4_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_3</a> <a href="Javascript:showPT('FB3_4_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_4</a> <a href="Javascript:showPT('FB3_4_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_5</a>
-</td>
+<td align="center" width="10%">(unused)</td>
+<td align="center" width="10%">0</td>
+<td align="center" width="30%"> </td>
 <td align="center" width="10%">MC2</td>
-<td align="center" width="10%">STD</td>
+<td align="center" width="10%"> </td>
 <td align="center" width="10%">23</td>
 <td width="8%" align="center">I/O/GCK2</td>
 <td align="center" width="10%">GCK/I</td>
 </tr>
 <tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobsIORW1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IORW1</a></td>
+<td align="center" width="10%">17</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB3_1_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_5</a> <a href="Javascript:showPT('FB3_2_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_1</a> <a href="Javascript:showPT('FB3_2_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_2</a> <a href="Javascript:showPT('FB3_2_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_3</a> <a href="Javascript:showPT('FB3_2_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_4</a> <a href="Javascript:showPT('FB3_2_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_5</a> <a href="Javascript:showPT('FB3_3_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_1</a> <a href="Javascript:showPT('FB3_3_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_2</a> <a href="Javascript:showPT('FB3_3_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_3</a> <a href="Javascript:showPT('FB3_3_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_4</a> <a href="Javascript:showPT('FB3_3_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_5</a> <a href="Javascript:showPT('FB3_4_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_1</a> <a href="Javascript:showPT('FB3_4_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_2</a> <a href="Javascript:showPT('FB3_4_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_3</a> <a href="Javascript:showPT('FB3_4_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_4</a> <a href="Javascript:showPT('FB3_4_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_5</a> <a href="Javascript:showPT('FB3_5_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_5</a>
+</td>
 <td align="center" width="10%">MC3</td>
-<td align="center" width="10%"> </td>
+<td align="center" width="10%">STD</td>
 <td align="center" width="10%"> </td>
 <td align="center" width="10%">(b)</td>
 <td align="center" width="10%">(b)</td>
@@ -68,9 +69,9 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('fsbReady1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready1r</a></td>
-<td align="center" width="10%">7</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB3_5_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_1</a> <a href="Javascript:showPT('FB3_5_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_2</a> <a href="Javascript:showPT('FB3_5_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_3</a> <a href="Javascript:showPT('FB3_5_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_4</a> <a href="Javascript:showPT('FB3_5_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_5</a> <a href="Javascript:showPT('FB3_6_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_1</a> <a href="Javascript:showPT('FB3_6_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_2</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('fsbReady2r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready2r</a></td>
+<td align="center" width="10%">9</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB3_5_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_1</a> <a href="Javascript:showPT('FB3_5_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_2</a> <a href="Javascript:showPT('FB3_5_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_3</a> <a href="Javascript:showPT('FB3_5_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_4</a> <a href="Javascript:showPT('FB3_6_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_1</a> <a href="Javascript:showPT('FB3_6_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_2</a> <a href="Javascript:showPT('FB3_6_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_3</a> <a href="Javascript:showPT('FB3_6_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_4</a> <a href="Javascript:showPT('FB3_6_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_5</a>
 </td>
 <td align="center" width="10%">MC5</td>
 <td align="center" width="10%">STD</td>
@@ -150,12 +151,11 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'nLDS_FSB'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsIORW1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IORW1</a></td>
-<td align="center" width="10%">16</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB3_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a> <a href="Javascript:showPT('FB3_12_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_2</a> <a href="Javascript:showPT('FB3_12_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_3</a> <a href="Javascript:showPT('FB3_12_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_4</a> <a href="Javascript:showPT('FB3_12_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_5</a> <a href="Javascript:showPT('FB3_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a> <a href="Javascript:showPT('FB3_13_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_2</a> <a href="Javascript:showPT('FB3_13_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_3</a> <a href="Javascript:showPT('FB3_13_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_4</a> <a href="Javascript:showPT('FB3_13_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_5</a> <a href="Javascript:showPT('FB3_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a> <a href="Javascript:showPT('FB3_14_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_2</a> <a href="Javascript:showPT('FB3_14_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_3</a> <a href="Javascript:showPT('FB3_14_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_4</a> <a href="Javascript:showPT('FB3_14_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_5</a> <a href="Javascript:showPT('FB3_15_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_5</a>
-</td>
+<td align="center" width="10%">(unused)</td>
+<td align="center" width="10%">0</td>
+<td align="center" width="30%"> </td>
 <td align="center" width="10%">MC13</td>
-<td align="center" width="10%">STD</td>
+<td align="center" width="10%"> </td>
 <td align="center" width="10%"> </td>
 <td align="center" width="10%">(b)</td>
 <td align="center" width="10%">(b)</td>
@@ -171,9 +171,9 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'nAS_FSB'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('fsbReady2r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready2r</a></td>
-<td align="center" width="10%">9</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB3_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a> <a href="Javascript:showPT('FB3_15_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_2</a> <a href="Javascript:showPT('FB3_15_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_3</a> <a href="Javascript:showPT('FB3_15_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_4</a> <a href="Javascript:showPT('FB3_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB3_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a> <a href="Javascript:showPT('FB3_16_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_3</a> <a href="Javascript:showPT('FB3_16_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_4</a> <a href="Javascript:showPT('FB3_16_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_5</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('fsbVPA_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA</a></td>
+<td align="center" width="10%">22</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB3_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a> <a href="Javascript:showPT('FB3_13_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_2</a> <a href="Javascript:showPT('FB3_13_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_3</a> <a href="Javascript:showPT('FB3_13_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_4</a> <a href="Javascript:showPT('FB3_13_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_5</a> <a href="Javascript:showPT('FB3_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a> <a href="Javascript:showPT('FB3_14_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_2</a> <a href="Javascript:showPT('FB3_14_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_3</a> <a href="Javascript:showPT('FB3_14_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_4</a> <a href="Javascript:showPT('FB3_14_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_5</a> <a href="Javascript:showPT('FB3_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a> <a href="Javascript:showPT('FB3_15_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_2</a> <a href="Javascript:showPT('FB3_15_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_3</a> <a href="Javascript:showPT('FB3_15_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_4</a> <a href="Javascript:showPT('FB3_15_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_5</a> <a href="Javascript:showPT('FB3_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB3_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a> <a href="Javascript:showPT('FB3_16_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_3</a> <a href="Javascript:showPT('FB3_16_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_4</a> <a href="Javascript:showPT('FB3_16_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_5</a> <a href="Javascript:showPT('FB3_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a> <a href="Javascript:showPT('FB3_17_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_3</a>
 </td>
 <td align="center" width="10%">MC15</td>
 <td align="center" width="10%">STD</td>
@@ -203,11 +203,12 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobsClear1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Clear1</a></td>
+<td align="center" width="10%">1</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB3_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a>
+</td>
 <td align="center" width="10%">MC18</td>
-<td align="center" width="10%"> </td>
+<td align="center" width="10%">STD</td>
 <td align="center" width="10%"> </td>
 <td align="center" width="10%">(b)</td>
 <td align="center" width="10%">(b)</td>
@@ -215,8 +216,8 @@
 </table></span></div>
 <div id="tipBox"></div>
 <br><span id="fbsiguse" class="pgRef"><b>Signals Used By Logic in Function Block</b><br><ol>
-<li><a href="Javascript:showEqn('OpTxFX_DC609_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$FX_DC$609</a></li>
-<li><a href="Javascript:showEqn('OpTxFX_DC610_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$FX_DC$610</a></li>
+<li><a href="Javascript:showEqn('OpTxOpTxFX_DC182_INV783_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$$OpTx$FX_DC$182_INV$783</a></li>
+<li><a href="Javascript:showEqn('OpTxFX_DC708_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$FX_DC$708</a></li>
 <li>A_FSB&lt;10&gt;</li>
 <li>A_FSB&lt;11&gt;</li>
 <li>A_FSB&lt;12&gt;</li>
@@ -234,13 +235,12 @@
 <li>A_FSB&lt;8&gt;</li>
 <li>A_FSB&lt;9&gt;</li>
 <li><a href="Javascript:showEqn('BERR_IOBS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">BERR_IOBS</a></li>
+<li>SW&lt;1&gt;</li>
 <li><a href="Javascript:showEqn('TimeoutA')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutA</a></li>
-<li><a href="Javascript:showEqn('TimeoutB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutB</a></li>
 <li><a href="Javascript:showEqn('csnOverlay1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay1</a></li>
 <li><a href="Javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></li>
 <li><a href="Javascript:showEqn('fsbBERR0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR0r</a></li>
 <li><a href="Javascript:showEqn('fsbBERR1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR1r</a></li>
-<li><a href="Javascript:showEqn('fsbReady0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready0r</a></li>
 <li><a href="Javascript:showEqn('fsbReady1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready1r</a></li>
 <li><a href="Javascript:showEqn('fsbReady2r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready2r</a></li>
 <li><a href="Javascript:showEqn('fsbVPA_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA</a></li>
@@ -251,9 +251,9 @@
 <li><a href="Javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></li>
 <li><a href="Javascript:showEqn('nADoutLE1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nADoutLE1</a></li>
 <li>nAS_FSB</li>
+<li><a href="Javascript:showEqn('nBR_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nBR_IOB</a></li>
 <li><a href="Javascript:showEqn('nDTACK_FSB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDTACK_FSB</a></li>
 <li>nWE_FSB</li>
-<li><a href="Javascript:showEqn('ramRAMReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMReady</a></li>
 </ol></span><form><span class="pgRef"><table width="90%" align="center"><tr>
 <td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
 <td align="center"><table align="center" width="90%" border="0" cellpadding="0" cellspacing="0"><tr><td width="100%" align="center">
diff --git a/cpld/XC95144XL/MXSE_html/fit/fbs_FB4 2.htm b/cpld/XC95144XL/MXSE_html/fit/fbs_FB4 2.htm
deleted file mode 100644
index dfd7983..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/fbs_FB4 2.htm	
+++ /dev/null
@@ -1,270 +0,0 @@
-<html>
-<head>
-<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
-<script src="tooltips.js"></script><script src="fbs.js"></script><link rel="stylesheet" type="text/css" href="style.css">
-</head>
-<body class="pgBgnd" id="XC95144XL">
-<span id="fbsel" class="pgRef"><table cellspacing="0" cellpadding="0" border="0" width="90%" align="center"><tr>
-<td width="33%" valign="center" align="left"></td>
-<td width="33%" valign="center" align="center"><form name="fbopt"><select onchange="javascript:showFB(document.fbopt.fbType.options[document.fbopt.fbType.options.selectedIndex].value)" name="fbType"><option value="FB1">FB1</option>
-<option value="FB2">FB2</option>
-<option value="FB3">FB3</option>
-<option value="FB4" selected>FB4</option>
-<option value="FB5">FB5</option>
-<option value="FB6">FB6</option>
-<option value="FB7">FB7</option>
-<option value="FB8">FB8</option></select></form></td>
-<td width="33%" valign="center" align="right"></td>
-</tr></table></span><div><span id="fbdata" class="pgRef"><table align="center" width="90%" border="1" cellpadding="0" cellspacing="0">
-<tr class="pgHeader">
-<th width="10%">Signal Name</th>
-<th width="10%">Total Product Terms</th>
-<th width="30%">Product Terms</th>
-<th width="10%">Location</th>
-<th width="10%">Power Mode</th>
-<th width="10%">Pin Number</th>
-<th width="10%">PinType</th>
-<th width="10%">Pin Use</th>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ramRASEL_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RASEL</a></td>
-<td align="center" width="10%">20</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB4_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a> <a href="Javascript:showPT('FB4_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a> <a href="Javascript:showPT('FB4_17_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_3</a> <a href="Javascript:showPT('FB4_17_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_4</a> <a href="Javascript:showPT('FB4_17_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_5</a> <a href="Javascript:showPT('FB4_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB4_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB4_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a> <a href="Javascript:showPT('FB4_18_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_4</a> <a href="Javascript:showPT('FB4_18_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_5</a> <a href="Javascript:showPT('FB4_1_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_1</a> <a href="Javascript:showPT('FB4_1_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_2</a> <a href="Javascript:showPT('FB4_1_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_3</a> <a href="Javascript:showPT('FB4_1_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_4</a> <a href="Javascript:showPT('FB4_1_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_5</a> <a href="Javascript:showPT('FB4_2_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_1</a> <a href="Javascript:showPT('FB4_2_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_2</a> <a href="Javascript:showPT('FB4_2_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_3</a> <a href="Javascript:showPT('FB4_2_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_4</a> <a href="Javascript:showPT('FB4_2_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_5</a>
-</td>
-<td align="center" width="10%">MC1</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('RA0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;0&gt;</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB4_3_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_3</a> <a href="Javascript:showPT('FB4_3_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_4</a>
-</td>
-<td align="center" width="10%">MC2</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">87</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('csnOverlay1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay1</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB4_3_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_1</a> <a href="Javascript:showPT('FB4_3_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_2</a>
-</td>
-<td align="center" width="10%">MC3</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC4</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%"> </td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC5</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">89</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;10&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsLoad1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Load1</a></td>
-<td align="center" width="10%">14</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB4_5_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_1</a> <a href="Javascript:showPT('FB4_5_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_2</a> <a href="Javascript:showPT('FB4_5_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_3</a> <a href="Javascript:showPT('FB4_5_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_4</a> <a href="Javascript:showPT('FB4_6_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_1</a> <a href="Javascript:showPT('FB4_6_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_2</a> <a href="Javascript:showPT('FB4_6_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_3</a> <a href="Javascript:showPT('FB4_6_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_4</a> <a href="Javascript:showPT('FB4_6_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_5</a> <a href="Javascript:showPT('FB4_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a> <a href="Javascript:showPT('FB4_7_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_2</a> <a href="Javascript:showPT('FB4_7_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_3</a> <a href="Javascript:showPT('FB4_7_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_4</a> <a href="Javascript:showPT('FB4_7_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_5</a>
-</td>
-<td align="center" width="10%">MC6</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">90</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;1&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC7</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('RA2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;2&gt;</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB4_8_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_1</a> <a href="Javascript:showPT('FB4_8_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_2</a>
-</td>
-<td align="center" width="10%">MC8</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">91</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC9</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">92</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;12&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></td>
-<td align="center" width="10%">17</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB4_10_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_1</a> <a href="Javascript:showPT('FB4_10_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_2</a> <a href="Javascript:showPT('FB4_10_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_3</a> <a href="Javascript:showPT('FB4_10_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_4</a> <a href="Javascript:showPT('FB4_10_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_5</a> <a href="Javascript:showPT('FB4_11_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_1</a> <a href="Javascript:showPT('FB4_11_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_2</a> <a href="Javascript:showPT('FB4_11_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_3</a> <a href="Javascript:showPT('FB4_11_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_4</a> <a href="Javascript:showPT('FB4_11_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_5</a> <a href="Javascript:showPT('FB4_8_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_3</a> <a href="Javascript:showPT('FB4_8_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_4</a> <a href="Javascript:showPT('FB4_9_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_1</a> <a href="Javascript:showPT('FB4_9_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_2</a> <a href="Javascript:showPT('FB4_9_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_3</a> <a href="Javascript:showPT('FB4_9_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_4</a> <a href="Javascript:showPT('FB4_9_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_5</a>
-</td>
-<td align="center" width="10%">MC10</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC11</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">93</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;14&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('RA4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;4&gt;</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB4_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a> <a href="Javascript:showPT('FB4_12_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_2</a>
-</td>
-<td align="center" width="10%">MC12</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">94</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC13</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ramRAMDIS1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS1</a></td>
-<td align="center" width="10%">18</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB4_12_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_3</a> <a href="Javascript:showPT('FB4_12_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_4</a> <a href="Javascript:showPT('FB4_12_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_5</a> <a href="Javascript:showPT('FB4_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a> <a href="Javascript:showPT('FB4_13_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_2</a> <a href="Javascript:showPT('FB4_13_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_3</a> <a href="Javascript:showPT('FB4_13_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_4</a> <a href="Javascript:showPT('FB4_13_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_5</a> <a href="Javascript:showPT('FB4_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a> <a href="Javascript:showPT('FB4_14_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_2</a> <a href="Javascript:showPT('FB4_14_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_3</a> <a href="Javascript:showPT('FB4_14_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_4</a> <a href="Javascript:showPT('FB4_14_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_5</a> <a href="Javascript:showPT('FB4_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a> <a href="Javascript:showPT('FB4_15_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_2</a> <a href="Javascript:showPT('FB4_15_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_3</a> <a href="Javascript:showPT('FB4_15_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_4</a> <a href="Javascript:showPT('FB4_15_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_5</a>
-</td>
-<td align="center" width="10%">MC14</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">95</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;16&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC15</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">96</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;17&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('fsbBERR0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR0r</a></td>
-<td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB4_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB4_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a> <a href="Javascript:showPT('FB4_16_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_3</a>
-</td>
-<td align="center" width="10%">MC16</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('nDinOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDinOE</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB4_16_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_4</a> <a href="Javascript:showPT('FB4_16_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_5</a>
-</td>
-<td align="center" width="10%">MC17</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">97</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC18</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-</table></span></div>
-<div id="tipBox"></div>
-<br><span id="fbsiguse" class="pgRef"><b>Signals Used By Logic in Function Block</b><br><ol>
-<li>A_FSB&lt;10&gt;</li>
-<li>A_FSB&lt;12&gt;</li>
-<li>A_FSB&lt;13&gt;</li>
-<li>A_FSB&lt;14&gt;</li>
-<li>A_FSB&lt;16&gt;</li>
-<li>A_FSB&lt;17&gt;</li>
-<li>A_FSB&lt;18&gt;</li>
-<li>A_FSB&lt;19&gt;</li>
-<li>A_FSB&lt;1&gt;</li>
-<li>A_FSB&lt;20&gt;</li>
-<li>A_FSB&lt;21&gt;</li>
-<li>A_FSB&lt;22&gt;</li>
-<li>A_FSB&lt;23&gt;</li>
-<li>A_FSB&lt;3&gt;</li>
-<li>A_FSB&lt;5&gt;</li>
-<li><a href="Javascript:showEqn('TimeoutB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutB</a></li>
-<li><a href="Javascript:showEqn('cntRefCnt5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;5&gt;</a></li>
-<li><a href="Javascript:showEqn('cntRefCnt6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;6&gt;</a></li>
-<li><a href="Javascript:showEqn('cntRefCnt7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;7&gt;</a></li>
-<li><a href="Javascript:showEqn('cntRefDone_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefDone</a></li>
-<li><a href="Javascript:showEqn('csnOverlay0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay0</a></li>
-<li><a href="Javascript:showEqn('csnOverlay1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay1</a></li>
-<li><a href="Javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></li>
-<li><a href="Javascript:showEqn('fsbBERR0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR0r</a></li>
-<li><a href="Javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></li>
-<li><a href="Javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></li>
-<li><a href="Javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></li>
-<li><a href="Javascript:showEqn('nADoutLE1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nADoutLE1</a></li>
-<li>nAS_FSB</li>
-<li>nWE_FSB</li>
-<li><a href="Javascript:showEqn('ramBACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/BACTr</a></li>
-<li><a href="Javascript:showEqn('ramOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/Once</a></li>
-<li><a href="Javascript:showEqn('ramRASEL_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RASEL</a></li>
-<li><a href="Javascript:showEqn('ramRS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd1</a></li>
-<li><a href="Javascript:showEqn('ramRS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd2</a></li>
-<li><a href="Javascript:showEqn('ramRS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd3</a></li>
-</ol></span><form><span class="pgRef"><table width="90%" align="center"><tr>
-<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
-<td align="center"><table align="center" width="90%" border="0" cellpadding="0" cellspacing="0"><tr><td width="100%" align="center">
-<input type="button" onclick="javascript:showFB('FB3')" onmouseover="window.status='show previous Function Block'; return true;" onmouseout="window.status=''" value="prev">
-                    
-                  <input type="button" onclick="javascript:showFB('FB5')" onmouseover="window.status='show next Function Block'; return true;" onmouseout="window.status=''" value="next">
-</td></tr></table></td>
-<td align="right">
-<input type="button" onclick="javascript:showLegend('logiclegend.htm')" onmouseover="window.status='show Legend'; return true;" onmouseout="window.status=''" value="legend"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page">
-</td>
-</tr></table></span></form>
-</body>
-</html>
diff --git a/cpld/XC95144XL/MXSE_html/fit/fbs_FB4.htm b/cpld/XC95144XL/MXSE_html/fit/fbs_FB4.htm
index 19a00d3..15daf4a 100644
--- a/cpld/XC95144XL/MXSE_html/fit/fbs_FB4.htm
+++ b/cpld/XC95144XL/MXSE_html/fit/fbs_FB4.htm
@@ -27,7 +27,7 @@
 <th width="10%">Pin Use</th>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ramBACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/BACTr</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('cntRefCnt6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;6&gt;</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB4_1_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_1</a>
 </td>
@@ -39,8 +39,8 @@
 </tr>
 <tr>
 <td align="center" width="10%"><a href="Javascript:showEqn('nAoutOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nAoutOE</a></td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('GND')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''"></a>
+<td align="center" width="10%">3</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB4_2_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_1</a> <a href="Javascript:showPT('FB4_2_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_2</a> <a href="Javascript:showPT('FB4_2_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_3</a>
 </td>
 <td align="center" width="10%">MC2</td>
 <td align="center" width="10%">STD</td>
@@ -49,7 +49,7 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsClear1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Clear1</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('cntRefCnt5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;5&gt;</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB4_3_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_1</a>
 </td>
@@ -60,7 +60,7 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ALE0S')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ALE0S</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('cntRefCnt4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;4&gt;</a></td>
 <td align="center" width="10%">1</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB4_4_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_1</a>
 </td>
@@ -83,8 +83,8 @@
 </tr>
 <tr>
 <td align="center" width="10%"><a href="Javascript:showEqn('nDinOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDinOE</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB4_6_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_1</a> <a href="Javascript:showPT('FB4_6_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_2</a>
+<td align="center" width="10%">3</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB4_6_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_1</a> <a href="Javascript:showPT('FB4_6_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_2</a> <a href="Javascript:showPT('FB4_6_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_3</a>
 </td>
 <td align="center" width="10%">MC6</td>
 <td align="center" width="10%">STD</td>
@@ -93,9 +93,9 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB4_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a> <a href="Javascript:showPT('FB4_7_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_2</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('cntRefCnt3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;3&gt;</a></td>
+<td align="center" width="10%">1</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB4_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a>
 </td>
 <td align="center" width="10%">MC7</td>
 <td align="center" width="10%">STD</td>
@@ -104,7 +104,7 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsIOU1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU1</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></td>
 <td align="center" width="10%">2</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB4_8_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_1</a> <a href="Javascript:showPT('FB4_8_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_2</a>
 </td>
@@ -115,7 +115,7 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'nRES'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsIOL1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOL1</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('fsbBERR1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR1r</a></td>
 <td align="center" width="10%">2</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB4_9_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_1</a> <a href="Javascript:showPT('FB4_9_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_2</a>
 </td>
@@ -123,10 +123,10 @@
 <td align="center" width="10%">STD</td>
 <td align="center" width="10%">92</td>
 <td width="8%" align="center">I/O</td>
-<td align="center" width="10%">(b)</td>
+<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'nIPL2'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd2</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('csnOverlay1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay1</a></td>
 <td align="center" width="10%">2</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB4_10_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_1</a> <a href="Javascript:showPT('FB4_10_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_2</a>
 </td>
@@ -148,7 +148,7 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd1</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('cntRefDone_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefDone</a></td>
 <td align="center" width="10%">2</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB4_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a> <a href="Javascript:showPT('FB4_12_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_2</a>
 </td>
@@ -159,9 +159,9 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;1&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('fsbBERR1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR1r</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB4_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a> <a href="Javascript:showPT('FB4_13_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_2</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('csnOverlay0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay0</a></td>
+<td align="center" width="10%">3</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB4_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a> <a href="Javascript:showPT('FB4_13_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_2</a> <a href="Javascript:showPT('FB4_13_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_3</a>
 </td>
 <td align="center" width="10%">MC13</td>
 <td align="center" width="10%">STD</td>
@@ -170,9 +170,9 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('csnOverlay1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay1</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB4_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a> <a href="Javascript:showPT('FB4_14_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_2</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('cntTimeoutBPre_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/TimeoutBPre</a></td>
+<td align="center" width="10%">3</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB4_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a> <a href="Javascript:showPT('FB4_14_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_2</a> <a href="Javascript:showPT('FB4_14_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_3</a>
 </td>
 <td align="center" width="10%">MC14</td>
 <td align="center" width="10%">STD</td>
@@ -181,9 +181,9 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;2&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('OpTxFX_DC610_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$FX_DC$610</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB4_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a> <a href="Javascript:showPT('FB4_15_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_2</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('TimeoutA')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutA</a></td>
+<td align="center" width="10%">3</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB4_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a> <a href="Javascript:showPT('FB4_15_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_2</a> <a href="Javascript:showPT('FB4_15_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_3</a>
 </td>
 <td align="center" width="10%">MC15</td>
 <td align="center" width="10%">STD</td>
@@ -192,7 +192,7 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;3&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('IOU0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOU0</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('IOL0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOL0</a></td>
 <td align="center" width="10%">3</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB4_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB4_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a> <a href="Javascript:showPT('FB4_16_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_3</a>
 </td>
@@ -203,9 +203,9 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('IOL0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOL0</a></td>
-<td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB4_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a> <a href="Javascript:showPT('FB4_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a> <a href="Javascript:showPT('FB4_17_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_3</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobsIOReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOReady</a></td>
+<td align="center" width="10%">4</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB4_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a> <a href="Javascript:showPT('FB4_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a> <a href="Javascript:showPT('FB4_17_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_3</a> <a href="Javascript:showPT('FB4_17_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_4</a>
 </td>
 <td align="center" width="10%">MC17</td>
 <td align="center" width="10%">STD</td>
@@ -214,7 +214,7 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;4&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsIOReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOReady</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('BERR_IOBS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">BERR_IOBS</a></td>
 <td align="center" width="10%">4</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB4_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB4_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB4_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a> <a href="Javascript:showPT('FB4_18_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_4</a>
 </td>
@@ -234,27 +234,39 @@
 <li><a href="Javascript:showEqn('BERR_IOBS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">BERR_IOBS</a></li>
 <li><a href="Javascript:showEqn('IOBERR')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOBERR</a></li>
 <li><a href="Javascript:showEqn('IORW0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IORW0</a></li>
-<li><a href="Javascript:showEqn('TimeoutB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutB</a></li>
+<li><a href="Javascript:showEqn('RefAck')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RefAck</a></li>
+<li>SW&lt;1&gt;</li>
+<li><a href="Javascript:showEqn('TimeoutA')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutA</a></li>
+<li><a href="Javascript:showEqn('cntRefCnt0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;0&gt;</a></li>
+<li><a href="Javascript:showEqn('cntRefCnt1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;1&gt;</a></li>
+<li><a href="Javascript:showEqn('cntRefCnt2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;2&gt;</a></li>
+<li><a href="Javascript:showEqn('cntRefCnt3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;3&gt;</a></li>
+<li><a href="Javascript:showEqn('cntRefCnt4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;4&gt;</a></li>
+<li><a href="Javascript:showEqn('cntRefCnt5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;5&gt;</a></li>
+<li><a href="Javascript:showEqn('cntRefCnt6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;6&gt;</a></li>
+<li><a href="Javascript:showEqn('cntRefCnt7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;7&gt;</a></li>
+<li><a href="Javascript:showEqn('cntRefDone_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefDone</a></li>
+<li><a href="Javascript:showEqn('cntTimeoutBPre_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/TimeoutBPre</a></li>
 <li><a href="Javascript:showEqn('csnOverlay0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay0</a></li>
 <li><a href="Javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></li>
 <li><a href="Javascript:showEqn('fsbBERR1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR1r</a></li>
 <li><a href="Javascript:showEqn('fsbVPA_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA</a></li>
-<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd1</a></li>
+<li><a href="Javascript:showEqn('iobmBGr0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BGr0</a></li>
+<li><a href="Javascript:showEqn('iobmBGr1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BGr1</a></li>
 <li><a href="Javascript:showEqn('iobmIOS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd2</a></li>
 <li><a href="Javascript:showEqn('iobmIOS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd3</a></li>
-<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd4</a></li>
 <li><a href="Javascript:showEqn('iobsIOACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOACTr</a></li>
 <li><a href="Javascript:showEqn('iobsIOL1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOL1</a></li>
 <li><a href="Javascript:showEqn('iobsIOReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOReady</a></li>
-<li><a href="Javascript:showEqn('iobsIOU1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU1</a></li>
-<li><a href="Javascript:showEqn('iobsLoad1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Load1</a></li>
 <li><a href="Javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></li>
 <li><a href="Javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></li>
 <li><a href="Javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></li>
 <li><a href="Javascript:showEqn('nADoutLE1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nADoutLE1</a></li>
 <li>nAS_FSB</li>
+<li><a href="Javascript:showEqn('nAS_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nAS_IOB</a></li>
+<li><a href="Javascript:showEqn('nAoutOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nAoutOE</a></li>
 <li>nLDS_FSB</li>
-<li>nUDS_FSB</li>
+<li>nRES</li>
 <li>nWE_FSB</li>
 </ol></span><form><span class="pgRef"><table width="90%" align="center"><tr>
 <td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
diff --git a/cpld/XC95144XL/MXSE_html/fit/fbs_FB5 2.htm b/cpld/XC95144XL/MXSE_html/fit/fbs_FB5 2.htm
deleted file mode 100644
index a926fd6..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/fbs_FB5 2.htm	
+++ /dev/null
@@ -1,276 +0,0 @@
-<html>
-<head>
-<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
-<script src="tooltips.js"></script><script src="fbs.js"></script><link rel="stylesheet" type="text/css" href="style.css">
-</head>
-<body class="pgBgnd" id="XC95144XL">
-<span id="fbsel" class="pgRef"><table cellspacing="0" cellpadding="0" border="0" width="90%" align="center"><tr>
-<td width="33%" valign="center" align="left"></td>
-<td width="33%" valign="center" align="center"><form name="fbopt"><select onchange="javascript:showFB(document.fbopt.fbType.options[document.fbopt.fbType.options.selectedIndex].value)" name="fbType"><option value="FB1">FB1</option>
-<option value="FB2">FB2</option>
-<option value="FB3">FB3</option>
-<option value="FB4">FB4</option>
-<option value="FB5" selected>FB5</option>
-<option value="FB6">FB6</option>
-<option value="FB7">FB7</option>
-<option value="FB8">FB8</option></select></form></td>
-<td width="33%" valign="center" align="right"></td>
-</tr></table></span><div><span id="fbdata" class="pgRef"><table align="center" width="90%" border="1" cellpadding="0" cellspacing="0">
-<tr class="pgHeader">
-<th width="10%">Signal Name</th>
-<th width="10%">Total Product Terms</th>
-<th width="30%">Product Terms</th>
-<th width="10%">Location</th>
-<th width="10%">Power Mode</th>
-<th width="10%">Pin Number</th>
-<th width="10%">PinType</th>
-<th width="10%">Pin Use</th>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('IOACT')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOACT</a></td>
-<td align="center" width="10%">10</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB5_18_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_4</a> <a href="Javascript:showPT('FB5_18_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_5</a> <a href="Javascript:showPT('FB5_1_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_1</a> <a href="Javascript:showPT('FB5_1_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_2</a> <a href="Javascript:showPT('FB5_1_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_3</a> <a href="Javascript:showPT('FB5_1_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_4</a> <a href="Javascript:showPT('FB5_1_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_5</a> <a href="Javascript:showPT('FB5_2_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_3</a> <a href="Javascript:showPT('FB5_2_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_4</a> <a href="Javascript:showPT('FB5_2_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_5</a>
-</td>
-<td align="center" width="10%">MC1</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('RA1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;1&gt;</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB5_2_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_1</a> <a href="Javascript:showPT('FB5_2_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_2</a>
-</td>
-<td align="center" width="10%">MC2</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">35</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOS_FSM_FFd7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd7</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB5_3_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_1</a>
-</td>
-<td align="center" width="10%">MC3</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOS_FSM_FFd6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd6</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB5_4_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_1</a>
-</td>
-<td align="center" width="10%">MC4</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOS_FSM_FFd5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd5</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB5_5_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_1</a>
-</td>
-<td align="center" width="10%">MC5</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">36</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOS_FSM_FFd4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd4</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB5_6_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_1</a>
-</td>
-<td align="center" width="10%">MC6</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">37</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmBERRrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrr</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB5_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a>
-</td>
-<td align="center" width="10%">MC7</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('RA3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;3&gt;</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB5_8_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_1</a> <a href="Javascript:showPT('FB5_8_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_2</a>
-</td>
-<td align="center" width="10%">MC8</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">39</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmBERRrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrf</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB5_9_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_1</a>
-</td>
-<td align="center" width="10%">MC9</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">40</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntRefCnt0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;0&gt;</a></td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('VCC')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''"></a>
-</td>
-<td align="center" width="10%">MC10</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOS_FSM_FFd8_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd8</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB5_11_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_1</a> <a href="Javascript:showPT('FB5_11_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_2</a>
-</td>
-<td align="center" width="10%">MC11</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">41</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('nROMCS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nROMCS</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB5_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a> <a href="Javascript:showPT('FB5_12_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_2</a>
-</td>
-<td align="center" width="10%">MC12</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">42</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ALE0M')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ALE0M</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB5_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a> <a href="Javascript:showPT('FB5_13_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_2</a>
-</td>
-<td align="center" width="10%">MC13</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd2</a></td>
-<td align="center" width="10%">4</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB5_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a> <a href="Javascript:showPT('FB5_14_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_2</a> <a href="Javascript:showPT('FB5_14_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_3</a> <a href="Javascript:showPT('FB5_14_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_4</a>
-</td>
-<td align="center" width="10%">MC14</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">43</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('BERR_IOBS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">BERR_IOBS</a></td>
-<td align="center" width="10%">4</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB5_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a> <a href="Javascript:showPT('FB5_15_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_2</a> <a href="Javascript:showPT('FB5_15_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_3</a> <a href="Javascript:showPT('FB5_15_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_4</a>
-</td>
-<td align="center" width="10%">MC15</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">46</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd3</a></td>
-<td align="center" width="10%">5</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB5_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB5_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a> <a href="Javascript:showPT('FB5_16_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_3</a> <a href="Javascript:showPT('FB5_16_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_4</a> <a href="Javascript:showPT('FB5_16_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_5</a>
-</td>
-<td align="center" width="10%">MC16</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC17</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">49</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'E_IOB'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('IOBERR')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOBERR</a></td>
-<td align="center" width="10%">8</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB5_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a> <a href="Javascript:showPT('FB5_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a> <a href="Javascript:showPT('FB5_17_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_3</a> <a href="Javascript:showPT('FB5_17_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_4</a> <a href="Javascript:showPT('FB5_17_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_5</a> <a href="Javascript:showPT('FB5_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB5_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB5_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a>
-</td>
-<td align="center" width="10%">MC18</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-</table></span></div>
-<div id="tipBox"></div>
-<br><span id="fbsiguse" class="pgRef"><b>Signals Used By Logic in Function Block</b><br><ol>
-<li>A_FSB&lt;11&gt;</li>
-<li>A_FSB&lt;13&gt;</li>
-<li>A_FSB&lt;20&gt;</li>
-<li>A_FSB&lt;21&gt;</li>
-<li>A_FSB&lt;22&gt;</li>
-<li>A_FSB&lt;23&gt;</li>
-<li>A_FSB&lt;2&gt;</li>
-<li>A_FSB&lt;4&gt;</li>
-<li><a href="Javascript:showEqn('BERR_IOBS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">BERR_IOBS</a></li>
-<li>CLK_IOB</li>
-<li><a href="Javascript:showEqn('IOBERR')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOBERR</a></li>
-<li><a href="Javascript:showEqn('csnOverlay1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay1</a></li>
-<li><a href="Javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></li>
-<li><a href="Javascript:showEqn('iobmBERRrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrf</a></li>
-<li><a href="Javascript:showEqn('iobmBERRrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrr</a></li>
-<li><a href="Javascript:showEqn('iobmDTACKrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrf</a></li>
-<li><a href="Javascript:showEqn('iobmDTACKrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrr</a></li>
-<li><a href="Javascript:showEqn('iobmETACK_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ETACK</a></li>
-<li><a href="Javascript:showEqn('iobmIOREQr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOREQr</a></li>
-<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd1</a></li>
-<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd3</a></li>
-<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd4</a></li>
-<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd5</a></li>
-<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd6</a></li>
-<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd7</a></li>
-<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd8_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd8</a></li>
-<li><a href="Javascript:showEqn('iobmRESrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrf</a></li>
-<li><a href="Javascript:showEqn('iobmRESrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrr</a></li>
-<li><a href="Javascript:showEqn('iobsIOACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOACTr</a></li>
-<li><a href="Javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></li>
-<li><a href="Javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></li>
-<li><a href="Javascript:showEqn('nADoutLE1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nADoutLE1</a></li>
-<li>nAS_FSB</li>
-<li>nBERR_IOB</li>
-<li><a href="Javascript:showEqn('ramRASEL_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RASEL</a></li>
-</ol></span><form><span class="pgRef"><table width="90%" align="center"><tr>
-<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
-<td align="center"><table align="center" width="90%" border="0" cellpadding="0" cellspacing="0"><tr><td width="100%" align="center">
-<input type="button" onclick="javascript:showFB('FB4')" onmouseover="window.status='show previous Function Block'; return true;" onmouseout="window.status=''" value="prev">
-                    
-                  <input type="button" onclick="javascript:showFB('FB6')" onmouseover="window.status='show next Function Block'; return true;" onmouseout="window.status=''" value="next">
-</td></tr></table></td>
-<td align="right">
-<input type="button" onclick="javascript:showLegend('logiclegend.htm')" onmouseover="window.status='show Legend'; return true;" onmouseout="window.status=''" value="legend"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page">
-</td>
-</tr></table></span></form>
-</body>
-</html>
diff --git a/cpld/XC95144XL/MXSE_html/fit/fbs_FB5.htm b/cpld/XC95144XL/MXSE_html/fit/fbs_FB5.htm
index d2c4496..eeb2230 100644
--- a/cpld/XC95144XL/MXSE_html/fit/fbs_FB5.htm
+++ b/cpld/XC95144XL/MXSE_html/fit/fbs_FB5.htm
@@ -27,19 +27,20 @@
 <th width="10%">Pin Use</th>
 </tr>
 <tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
+<td align="center" width="10%"><a href="Javascript:showEqn('ramRASEL_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RASEL</a></td>
+<td align="center" width="10%">20</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB5_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a> <a href="Javascript:showPT('FB5_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a> <a href="Javascript:showPT('FB5_17_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_3</a> <a href="Javascript:showPT('FB5_17_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_4</a> <a href="Javascript:showPT('FB5_17_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_5</a> <a href="Javascript:showPT('FB5_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB5_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB5_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a> <a href="Javascript:showPT('FB5_18_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_4</a> <a href="Javascript:showPT('FB5_18_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_5</a> <a href="Javascript:showPT('FB5_1_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_1</a> <a href="Javascript:showPT('FB5_1_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_2</a> <a href="Javascript:showPT('FB5_1_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_3</a> <a href="Javascript:showPT('FB5_1_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_4</a> <a href="Javascript:showPT('FB5_1_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_5</a> <a href="Javascript:showPT('FB5_2_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_1</a> <a href="Javascript:showPT('FB5_2_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_2</a> <a href="Javascript:showPT('FB5_2_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_3</a> <a href="Javascript:showPT('FB5_2_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_4</a> <a href="Javascript:showPT('FB5_2_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_5</a>
+</td>
 <td align="center" width="10%">MC1</td>
-<td align="center" width="10%"> </td>
+<td align="center" width="10%">STD</td>
 <td align="center" width="10%"> </td>
 <td align="center" width="10%">(b)</td>
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
 <td align="center" width="10%"><a href="Javascript:showEqn('nROMCS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nROMCS</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB5_2_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_1</a> <a href="Javascript:showPT('FB5_2_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_2</a>
+<td align="center" width="10%">3</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB5_3_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_2</a> <a href="Javascript:showPT('FB5_3_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_3</a> <a href="Javascript:showPT('FB5_3_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_4</a>
 </td>
 <td align="center" width="10%">MC2</td>
 <td align="center" width="10%">STD</td>
@@ -48,19 +49,20 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
+<td align="center" width="10%"><a href="Javascript:showEqn('cntRefCnt7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;7&gt;</a></td>
+<td align="center" width="10%">1</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB5_3_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_1</a>
+</td>
 <td align="center" width="10%">MC3</td>
-<td align="center" width="10%"> </td>
+<td align="center" width="10%">STD</td>
 <td align="center" width="10%"> </td>
 <td align="center" width="10%">(b)</td>
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></td>
-<td align="center" width="10%">14</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB5_3_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_1</a> <a href="Javascript:showPT('FB5_3_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_2</a> <a href="Javascript:showPT('FB5_3_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_3</a> <a href="Javascript:showPT('FB5_3_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_4</a> <a href="Javascript:showPT('FB5_3_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_5</a> <a href="Javascript:showPT('FB5_4_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_1</a> <a href="Javascript:showPT('FB5_4_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_2</a> <a href="Javascript:showPT('FB5_4_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_3</a> <a href="Javascript:showPT('FB5_4_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_4</a> <a href="Javascript:showPT('FB5_4_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_5</a> <a href="Javascript:showPT('FB5_5_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_2</a> <a href="Javascript:showPT('FB5_5_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_3</a> <a href="Javascript:showPT('FB5_5_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_4</a> <a href="Javascript:showPT('FB5_5_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_5</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('ramRAMDIS2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS2</a></td>
+<td align="center" width="10%">7</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB5_4_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_1</a> <a href="Javascript:showPT('FB5_4_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_2</a> <a href="Javascript:showPT('FB5_4_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_3</a> <a href="Javascript:showPT('FB5_4_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_4</a> <a href="Javascript:showPT('FB5_4_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_5</a> <a href="Javascript:showPT('FB5_5_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_2</a> <a href="Javascript:showPT('FB5_5_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_3</a>
 </td>
 <td align="center" width="10%">MC4</td>
 <td align="center" width="10%">STD</td>
@@ -101,9 +103,9 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></td>
-<td align="center" width="10%">17</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB5_6_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_2</a> <a href="Javascript:showPT('FB5_6_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_3</a> <a href="Javascript:showPT('FB5_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a> <a href="Javascript:showPT('FB5_7_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_2</a> <a href="Javascript:showPT('FB5_7_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_3</a> <a href="Javascript:showPT('FB5_7_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_4</a> <a href="Javascript:showPT('FB5_7_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_5</a> <a href="Javascript:showPT('FB5_8_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_1</a> <a href="Javascript:showPT('FB5_8_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_2</a> <a href="Javascript:showPT('FB5_8_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_3</a> <a href="Javascript:showPT('FB5_8_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_4</a> <a href="Javascript:showPT('FB5_8_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_5</a> <a href="Javascript:showPT('FB5_9_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_1</a> <a href="Javascript:showPT('FB5_9_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_2</a> <a href="Javascript:showPT('FB5_9_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_3</a> <a href="Javascript:showPT('FB5_9_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_4</a> <a href="Javascript:showPT('FB5_9_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_5</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('ramRAMDIS1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS1</a></td>
+<td align="center" width="10%">18</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB5_6_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_2</a> <a href="Javascript:showPT('FB5_6_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_3</a> <a href="Javascript:showPT('FB5_6_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_4</a> <a href="Javascript:showPT('FB5_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a> <a href="Javascript:showPT('FB5_7_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_2</a> <a href="Javascript:showPT('FB5_7_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_3</a> <a href="Javascript:showPT('FB5_7_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_4</a> <a href="Javascript:showPT('FB5_7_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_5</a> <a href="Javascript:showPT('FB5_8_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_1</a> <a href="Javascript:showPT('FB5_8_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_2</a> <a href="Javascript:showPT('FB5_8_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_3</a> <a href="Javascript:showPT('FB5_8_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_4</a> <a href="Javascript:showPT('FB5_8_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_5</a> <a href="Javascript:showPT('FB5_9_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_1</a> <a href="Javascript:showPT('FB5_9_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_2</a> <a href="Javascript:showPT('FB5_9_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_3</a> <a href="Javascript:showPT('FB5_9_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_4</a> <a href="Javascript:showPT('FB5_9_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_5</a>
 </td>
 <td align="center" width="10%">MC8</td>
 <td align="center" width="10%">STD</td>
@@ -155,9 +157,9 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('IOREQ')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOREQ</a></td>
-<td align="center" width="10%">14</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB5_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a> <a href="Javascript:showPT('FB5_12_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_2</a> <a href="Javascript:showPT('FB5_12_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_3</a> <a href="Javascript:showPT('FB5_12_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_4</a> <a href="Javascript:showPT('FB5_12_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_5</a> <a href="Javascript:showPT('FB5_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a> <a href="Javascript:showPT('FB5_13_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_2</a> <a href="Javascript:showPT('FB5_13_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_3</a> <a href="Javascript:showPT('FB5_13_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_4</a> <a href="Javascript:showPT('FB5_13_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_5</a> <a href="Javascript:showPT('FB5_14_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_2</a> <a href="Javascript:showPT('FB5_14_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_3</a> <a href="Javascript:showPT('FB5_14_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_4</a> <a href="Javascript:showPT('FB5_14_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_5</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobsLoad1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Load1</a></td>
+<td align="center" width="10%">15</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB5_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a> <a href="Javascript:showPT('FB5_12_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_2</a> <a href="Javascript:showPT('FB5_12_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_3</a> <a href="Javascript:showPT('FB5_12_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_4</a> <a href="Javascript:showPT('FB5_12_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_5</a> <a href="Javascript:showPT('FB5_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a> <a href="Javascript:showPT('FB5_13_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_2</a> <a href="Javascript:showPT('FB5_13_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_3</a> <a href="Javascript:showPT('FB5_13_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_4</a> <a href="Javascript:showPT('FB5_13_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_5</a> <a href="Javascript:showPT('FB5_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a> <a href="Javascript:showPT('FB5_14_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_2</a> <a href="Javascript:showPT('FB5_14_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_3</a> <a href="Javascript:showPT('FB5_14_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_4</a> <a href="Javascript:showPT('FB5_14_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_5</a>
 </td>
 <td align="center" width="10%">MC13</td>
 <td align="center" width="10%">STD</td>
@@ -168,7 +170,7 @@
 <tr>
 <td align="center" width="10%"><a href="Javascript:showEqn('RA2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;2&gt;</a></td>
 <td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB5_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a> <a href="Javascript:showPT('FB5_15_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_3</a>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB5_15_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_3</a> <a href="Javascript:showPT('FB5_15_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_4</a>
 </td>
 <td align="center" width="10%">MC14</td>
 <td align="center" width="10%">STD</td>
@@ -188,9 +190,9 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('BERR_IOBS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">BERR_IOBS</a></td>
-<td align="center" width="10%">4</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB5_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB5_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a> <a href="Javascript:showPT('FB5_16_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_3</a> <a href="Javascript:showPT('FB5_16_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_4</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('ramOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/Once</a></td>
+<td align="center" width="10%">5</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB5_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB5_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a> <a href="Javascript:showPT('FB5_16_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_3</a> <a href="Javascript:showPT('FB5_16_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_4</a> <a href="Javascript:showPT('FB5_16_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_5</a>
 </td>
 <td align="center" width="10%">MC16</td>
 <td align="center" width="10%">STD</td>
@@ -209,12 +211,11 @@
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('IORW0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IORW0</a></td>
-<td align="center" width="10%">18</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB5_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a> <a href="Javascript:showPT('FB5_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a> <a href="Javascript:showPT('FB5_17_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_3</a> <a href="Javascript:showPT('FB5_17_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_4</a> <a href="Javascript:showPT('FB5_17_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_5</a> <a href="Javascript:showPT('FB5_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB5_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB5_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a> <a href="Javascript:showPT('FB5_18_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_4</a> <a href="Javascript:showPT('FB5_18_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_5</a> <a href="Javascript:showPT('FB5_1_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_1</a> <a href="Javascript:showPT('FB5_1_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_2</a> <a href="Javascript:showPT('FB5_1_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_3</a> <a href="Javascript:showPT('FB5_1_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_4</a> <a href="Javascript:showPT('FB5_1_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_5</a> <a href="Javascript:showPT('FB5_2_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_3</a> <a href="Javascript:showPT('FB5_2_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_4</a> <a href="Javascript:showPT('FB5_2_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_5</a>
-</td>
+<td align="center" width="10%">(unused)</td>
+<td align="center" width="10%">0</td>
+<td align="center" width="30%"> </td>
 <td align="center" width="10%">MC18</td>
-<td align="center" width="10%">STD</td>
+<td align="center" width="10%"> </td>
 <td align="center" width="10%"> </td>
 <td align="center" width="10%">(b)</td>
 <td align="center" width="10%">(b)</td>
@@ -239,20 +240,31 @@
 <li>A_FSB&lt;5&gt;</li>
 <li>A_FSB&lt;6&gt;</li>
 <li>A_FSB&lt;7&gt;</li>
-<li><a href="Javascript:showEqn('BERR_IOBS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">BERR_IOBS</a></li>
-<li><a href="Javascript:showEqn('IOBERR')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOBERR</a></li>
-<li><a href="Javascript:showEqn('IORW0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IORW0</a></li>
+<li>SW&lt;1&gt;</li>
+<li><a href="Javascript:showEqn('cntRefCnt0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;0&gt;</a></li>
+<li><a href="Javascript:showEqn('cntRefCnt1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;1&gt;</a></li>
+<li><a href="Javascript:showEqn('cntRefCnt2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;2&gt;</a></li>
+<li><a href="Javascript:showEqn('cntRefCnt3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;3&gt;</a></li>
+<li><a href="Javascript:showEqn('cntRefCnt4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;4&gt;</a></li>
+<li><a href="Javascript:showEqn('cntRefCnt5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;5&gt;</a></li>
+<li><a href="Javascript:showEqn('cntRefCnt6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;6&gt;</a></li>
+<li><a href="Javascript:showEqn('cntRefCnt7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;7&gt;</a></li>
+<li><a href="Javascript:showEqn('cntRefDone_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefDone</a></li>
 <li><a href="Javascript:showEqn('csnOverlay1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay1</a></li>
 <li><a href="Javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></li>
-<li><a href="Javascript:showEqn('iobsIOACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOACTr</a></li>
-<li><a href="Javascript:showEqn('iobsIORW1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IORW1</a></li>
 <li><a href="Javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></li>
 <li><a href="Javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></li>
 <li><a href="Javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></li>
 <li><a href="Javascript:showEqn('nADoutLE1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nADoutLE1</a></li>
 <li>nAS_FSB</li>
 <li>nWE_FSB</li>
+<li><a href="Javascript:showEqn('ramBACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/BACTr</a></li>
+<li><a href="Javascript:showEqn('ramOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/Once</a></li>
+<li><a href="Javascript:showEqn('ramRAMDIS2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS2</a></li>
 <li><a href="Javascript:showEqn('ramRASEL_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RASEL</a></li>
+<li><a href="Javascript:showEqn('ramRS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd1</a></li>
+<li><a href="Javascript:showEqn('ramRS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd2</a></li>
+<li><a href="Javascript:showEqn('ramRS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd3</a></li>
 </ol></span><form><span class="pgRef"><table width="90%" align="center"><tr>
 <td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
 <td align="center"><table align="center" width="90%" border="0" cellpadding="0" cellspacing="0"><tr><td width="100%" align="center">
diff --git a/cpld/XC95144XL/MXSE_html/fit/fbs_FB6 2.htm b/cpld/XC95144XL/MXSE_html/fit/fbs_FB6 2.htm
deleted file mode 100644
index 18b0e47..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/fbs_FB6 2.htm	
+++ /dev/null
@@ -1,266 +0,0 @@
-<html>
-<head>
-<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
-<script src="tooltips.js"></script><script src="fbs.js"></script><link rel="stylesheet" type="text/css" href="style.css">
-</head>
-<body class="pgBgnd" id="XC95144XL">
-<span id="fbsel" class="pgRef"><table cellspacing="0" cellpadding="0" border="0" width="90%" align="center"><tr>
-<td width="33%" valign="center" align="left"></td>
-<td width="33%" valign="center" align="center"><form name="fbopt"><select onchange="javascript:showFB(document.fbopt.fbType.options[document.fbopt.fbType.options.selectedIndex].value)" name="fbType"><option value="FB1">FB1</option>
-<option value="FB2">FB2</option>
-<option value="FB3">FB3</option>
-<option value="FB4">FB4</option>
-<option value="FB5">FB5</option>
-<option value="FB6" selected>FB6</option>
-<option value="FB7">FB7</option>
-<option value="FB8">FB8</option></select></form></td>
-<td width="33%" valign="center" align="right"></td>
-</tr></table></span><div><span id="fbdata" class="pgRef"><table align="center" width="90%" border="1" cellpadding="0" cellspacing="0">
-<tr class="pgHeader">
-<th width="10%">Signal Name</th>
-<th width="10%">Total Product Terms</th>
-<th width="30%">Product Terms</th>
-<th width="10%">Location</th>
-<th width="10%">Power Mode</th>
-<th width="10%">Pin Number</th>
-<th width="10%">PinType</th>
-<th width="10%">Pin Use</th>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmEr2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er2</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_1_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_1</a>
-</td>
-<td align="center" width="10%">MC1</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('nCAS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nCAS</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_2_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_1</a>
-</td>
-<td align="center" width="10%">MC2</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">74</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmDTACKrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrr</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_3_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_1</a>
-</td>
-<td align="center" width="10%">MC3</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmDTACKrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrf</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_4_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_1</a>
-</td>
-<td align="center" width="10%">MC4</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('RefAck')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RefAck</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_5_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_1</a>
-</td>
-<td align="center" width="10%">MC5</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">76</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;18&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('nRAMLWE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nRAMLWE</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_6_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_1</a>
-</td>
-<td align="center" width="10%">MC6</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">77</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsIOU1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU1</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a> <a href="Javascript:showPT('FB6_7_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_2</a>
-</td>
-<td align="center" width="10%">MC7</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsIOL1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOL1</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_8_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_1</a> <a href="Javascript:showPT('FB6_8_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_2</a>
-</td>
-<td align="center" width="10%">MC8</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">78</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;3&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('nRAMUWE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nRAMUWE</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_9_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_1</a>
-</td>
-<td align="center" width="10%">MC9</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">79</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmES3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;3&gt;</a></td>
-<td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_10_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_1</a> <a href="Javascript:showPT('FB6_10_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_2</a> <a href="Javascript:showPT('FB6_10_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_3</a>
-</td>
-<td align="center" width="10%">MC10</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmES1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;1&gt;</a></td>
-<td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_11_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_1</a> <a href="Javascript:showPT('FB6_11_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_2</a> <a href="Javascript:showPT('FB6_11_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_3</a>
-</td>
-<td align="center" width="10%">MC11</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">80</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;15&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('nROMWE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nROMWE</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a>
-</td>
-<td align="center" width="10%">MC12</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">81</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmES0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;0&gt;</a></td>
-<td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a> <a href="Javascript:showPT('FB6_13_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_2</a> <a href="Javascript:showPT('FB6_13_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_3</a>
-</td>
-<td align="center" width="10%">MC13</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('IOU0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOU0</a></td>
-<td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a> <a href="Javascript:showPT('FB6_14_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_2</a> <a href="Javascript:showPT('FB6_14_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_3</a>
-</td>
-<td align="center" width="10%">MC14</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">82</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;13&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('nVPA_FSB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nVPA_FSB</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a>
-</td>
-<td align="center" width="10%">MC15</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">85</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('IOL0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOL0</a></td>
-<td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB6_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a> <a href="Javascript:showPT('FB6_16_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_3</a>
-</td>
-<td align="center" width="10%">MC16</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmES4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;4&gt;</a></td>
-<td align="center" width="10%">4</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a> <a href="Javascript:showPT('FB6_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a> <a href="Javascript:showPT('FB6_17_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_3</a> <a href="Javascript:showPT('FB6_17_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_4</a>
-</td>
-<td align="center" width="10%">MC17</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">86</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;11&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmES2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;2&gt;</a></td>
-<td align="center" width="10%">5</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB6_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB6_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a> <a href="Javascript:showPT('FB6_18_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_4</a> <a href="Javascript:showPT('FB6_18_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_5</a>
-</td>
-<td align="center" width="10%">MC18</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-</table></span></div>
-<div id="tipBox"></div>
-<br><span id="fbsiguse" class="pgRef"><b>Signals Used By Logic in Function Block</b><br><ol>
-<li><a href="Javascript:showEqn('fsbVPA_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA</a></li>
-<li><a href="Javascript:showEqn('iobmES0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;0&gt;</a></li>
-<li><a href="Javascript:showEqn('iobmES1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;1&gt;</a></li>
-<li><a href="Javascript:showEqn('iobmES2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;2&gt;</a></li>
-<li><a href="Javascript:showEqn('iobmES3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;3&gt;</a></li>
-<li><a href="Javascript:showEqn('iobmES4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;4&gt;</a></li>
-<li><a href="Javascript:showEqn('iobmEr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er</a></li>
-<li><a href="Javascript:showEqn('iobmEr2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er2</a></li>
-<li><a href="Javascript:showEqn('iobsIOL1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOL1</a></li>
-<li><a href="Javascript:showEqn('iobsIOU1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU1</a></li>
-<li><a href="Javascript:showEqn('iobsLoad1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Load1</a></li>
-<li><a href="Javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></li>
-<li><a href="Javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></li>
-<li><a href="Javascript:showEqn('nADoutLE1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nADoutLE1</a></li>
-<li>nAS_FSB</li>
-<li>nDTACK_IOB</li>
-<li>nLDS_FSB</li>
-<li>nUDS_FSB</li>
-<li>nWE_FSB</li>
-<li><a href="Javascript:showEqn('ramRAMDIS1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS1</a></li>
-<li><a href="Javascript:showEqn('ramRAMDIS2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS2</a></li>
-<li><a href="Javascript:showEqn('ramRASEL_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RASEL</a></li>
-<li><a href="Javascript:showEqn('ramRS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd1</a></li>
-<li><a href="Javascript:showEqn('ramRS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd2</a></li>
-</ol></span><form><span class="pgRef"><table width="90%" align="center"><tr>
-<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
-<td align="center"><table align="center" width="90%" border="0" cellpadding="0" cellspacing="0"><tr><td width="100%" align="center">
-<input type="button" onclick="javascript:showFB('FB5')" onmouseover="window.status='show previous Function Block'; return true;" onmouseout="window.status=''" value="prev">
-                    
-                  <input type="button" onclick="javascript:showFB('FB7')" onmouseover="window.status='show next Function Block'; return true;" onmouseout="window.status=''" value="next">
-</td></tr></table></td>
-<td align="right">
-<input type="button" onclick="javascript:showLegend('logiclegend.htm')" onmouseover="window.status='show Legend'; return true;" onmouseout="window.status=''" value="legend"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page">
-</td>
-</tr></table></span></form>
-</body>
-</html>
diff --git a/cpld/XC95144XL/MXSE_html/fit/fbs_FB6.htm b/cpld/XC95144XL/MXSE_html/fit/fbs_FB6.htm
index 9c32a96..152d974 100644
--- a/cpld/XC95144XL/MXSE_html/fit/fbs_FB6.htm
+++ b/cpld/XC95144XL/MXSE_html/fit/fbs_FB6.htm
@@ -39,8 +39,8 @@
 </tr>
 <tr>
 <td align="center" width="10%"><a href="Javascript:showEqn('nVMA_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nVMA_IOB</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_2_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_1</a> <a href="Javascript:showPT('FB6_2_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_2</a>
+<td align="center" width="10%">3</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB6_2_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_1</a> <a href="Javascript:showPT('FB6_2_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_2</a> <a href="Javascript:showPT('FB6_2_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_3</a>
 </td>
 <td align="center" width="10%">MC2</td>
 <td align="center" width="10%">STD</td>
@@ -49,9 +49,9 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ALE0M')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ALE0M</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_3_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_1</a> <a href="Javascript:showPT('FB6_3_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_2</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd3</a></td>
+<td align="center" width="10%">3</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB6_3_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_1</a> <a href="Javascript:showPT('FB6_3_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_2</a> <a href="Javascript:showPT('FB6_3_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_3</a>
 </td>
 <td align="center" width="10%">MC3</td>
 <td align="center" width="10%">STD</td>
@@ -93,9 +93,9 @@
 <td align="center" width="10%"><a href="#" onmouseover="this._tip = 'nVPA_IOB'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOS_FSM_FFd4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd4</a></td>
-<td align="center" width="10%">4</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a> <a href="Javascript:showPT('FB6_7_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_2</a> <a href="Javascript:showPT('FB6_7_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_3</a> <a href="Javascript:showPT('FB6_7_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_4</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('ALE0M')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ALE0M</a></td>
+<td align="center" width="10%">3</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB6_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a> <a href="Javascript:showPT('FB6_7_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_2</a> <a href="Javascript:showPT('FB6_7_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_3</a>
 </td>
 <td align="center" width="10%">MC7</td>
 <td align="center" width="10%">STD</td>
@@ -126,7 +126,7 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd3</a></td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd2</a></td>
 <td align="center" width="10%">5</td>
 <td align="center" width="30%"> <a href="Javascript:showPT('FB6_10_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_1</a> <a href="Javascript:showPT('FB6_10_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_2</a> <a href="Javascript:showPT('FB6_10_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_3</a> <a href="Javascript:showPT('FB6_10_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_4</a> <a href="Javascript:showPT('FB6_10_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_5</a>
 </td>
@@ -149,8 +149,8 @@
 </tr>
 <tr>
 <td align="center" width="10%"><a href="Javascript:showEqn('nAS_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nAS_IOB</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a> <a href="Javascript:showPT('FB6_12_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_2</a>
+<td align="center" width="10%">3</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB6_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a> <a href="Javascript:showPT('FB6_12_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_2</a> <a href="Javascript:showPT('FB6_12_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_3</a>
 </td>
 <td align="center" width="10%">MC12</td>
 <td align="center" width="10%">STD</td>
@@ -193,8 +193,8 @@
 </tr>
 <tr>
 <td align="center" width="10%"><a href="Javascript:showEqn('IOACT')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOACT</a></td>
-<td align="center" width="10%">6</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_15_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_2</a> <a href="Javascript:showPT('FB6_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB6_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a> <a href="Javascript:showPT('FB6_16_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_3</a> <a href="Javascript:showPT('FB6_16_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_4</a> <a href="Javascript:showPT('FB6_16_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_5</a>
+<td align="center" width="10%">7</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB6_15_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_2</a> <a href="Javascript:showPT('FB6_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB6_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a> <a href="Javascript:showPT('FB6_16_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_3</a> <a href="Javascript:showPT('FB6_16_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_4</a> <a href="Javascript:showPT('FB6_16_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_5</a> <a href="Javascript:showPT('FB6_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a>
 </td>
 <td align="center" width="10%">MC16</td>
 <td align="center" width="10%">STD</td>
@@ -204,8 +204,8 @@
 </tr>
 <tr>
 <td align="center" width="10%"><a href="Javascript:showEqn('nDinLE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDinLE</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a> <a href="Javascript:showPT('FB6_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a>
+<td align="center" width="10%">1</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB6_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a>
 </td>
 <td align="center" width="10%">MC17</td>
 <td align="center" width="10%">STD</td>
@@ -216,7 +216,7 @@
 <tr>
 <td align="center" width="10%"><a href="Javascript:showEqn('IOBERR')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOBERR</a></td>
 <td align="center" width="10%">9</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB6_17_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_3</a> <a href="Javascript:showPT('FB6_17_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_4</a> <a href="Javascript:showPT('FB6_17_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_5</a> <a href="Javascript:showPT('FB6_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB6_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB6_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a> <a href="Javascript:showPT('FB6_18_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_4</a> <a href="Javascript:showPT('FB6_18_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_5</a> <a href="Javascript:showPT('FB6_1_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_2</a>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB6_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB6_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB6_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a> <a href="Javascript:showPT('FB6_18_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_4</a> <a href="Javascript:showPT('FB6_18_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_5</a> <a href="Javascript:showPT('FB6_1_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_2</a> <a href="Javascript:showPT('FB6_1_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_3</a> <a href="Javascript:showPT('FB6_1_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_4</a> <a href="Javascript:showPT('FB6_1_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_5</a>
 </td>
 <td align="center" width="10%">MC18</td>
 <td align="center" width="10%">STD</td>
@@ -251,7 +251,6 @@
 <li><a href="Javascript:showEqn('iobmIOS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd1</a></li>
 <li><a href="Javascript:showEqn('iobmIOS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd2</a></li>
 <li><a href="Javascript:showEqn('iobmIOS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd3</a></li>
-<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd4</a></li>
 <li><a href="Javascript:showEqn('iobmRESrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrf</a></li>
 <li><a href="Javascript:showEqn('iobmRESrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrr</a></li>
 <li><a href="Javascript:showEqn('iobmVPArf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArf</a></li>
@@ -259,6 +258,7 @@
 <li><a href="Javascript:showEqn('iobsClear1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Clear1</a></li>
 <li><a href="Javascript:showEqn('iobsLoad1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Load1</a></li>
 <li><a href="Javascript:showEqn('nADoutLE1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nADoutLE1</a></li>
+<li><a href="Javascript:showEqn('nAoutOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nAoutOE</a></li>
 <li>nBERR_IOB</li>
 <li><a href="Javascript:showEqn('nVMA_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nVMA_IOB</a></li>
 </ol></span><form><span class="pgRef"><table width="90%" align="center"><tr>
diff --git a/cpld/XC95144XL/MXSE_html/fit/fbs_FB7 2.htm b/cpld/XC95144XL/MXSE_html/fit/fbs_FB7 2.htm
deleted file mode 100644
index 57f9db0..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/fbs_FB7 2.htm	
+++ /dev/null
@@ -1,276 +0,0 @@
-<html>
-<head>
-<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
-<script src="tooltips.js"></script><script src="fbs.js"></script><link rel="stylesheet" type="text/css" href="style.css">
-</head>
-<body class="pgBgnd" id="XC95144XL">
-<span id="fbsel" class="pgRef"><table cellspacing="0" cellpadding="0" border="0" width="90%" align="center"><tr>
-<td width="33%" valign="center" align="left"></td>
-<td width="33%" valign="center" align="center"><form name="fbopt"><select onchange="javascript:showFB(document.fbopt.fbType.options[document.fbopt.fbType.options.selectedIndex].value)" name="fbType"><option value="FB1">FB1</option>
-<option value="FB2">FB2</option>
-<option value="FB3">FB3</option>
-<option value="FB4">FB4</option>
-<option value="FB5">FB5</option>
-<option value="FB6">FB6</option>
-<option value="FB7" selected>FB7</option>
-<option value="FB8">FB8</option></select></form></td>
-<td width="33%" valign="center" align="right"></td>
-</tr></table></span><div><span id="fbdata" class="pgRef"><table align="center" width="90%" border="1" cellpadding="0" cellspacing="0">
-<tr class="pgHeader">
-<th width="10%">Signal Name</th>
-<th width="10%">Total Product Terms</th>
-<th width="30%">Product Terms</th>
-<th width="10%">Location</th>
-<th width="10%">Power Mode</th>
-<th width="10%">Pin Number</th>
-<th width="10%">PinType</th>
-<th width="10%">Pin Use</th>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntRefCnt5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;5&gt;</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB7_1_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_1</a>
-</td>
-<td align="center" width="10%">MC1</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('RA5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;5&gt;</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB7_2_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_1</a> <a href="Javascript:showPT('FB7_2_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_2</a>
-</td>
-<td align="center" width="10%">MC2</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">50</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntRefCnt4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;4&gt;</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB7_3_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_1</a>
-</td>
-<td align="center" width="10%">MC3</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('csnOverlay0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay0</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB7_4_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_1</a> <a href="Javascript:showPT('FB7_4_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_2</a>
-</td>
-<td align="center" width="10%">MC4</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ramRS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd3</a></td>
-<td align="center" width="10%">11</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB7_4_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_3</a> <a href="Javascript:showPT('FB7_4_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_4</a> <a href="Javascript:showPT('FB7_4_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_5</a> <a href="Javascript:showPT('FB7_5_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_1</a> <a href="Javascript:showPT('FB7_5_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_2</a> <a href="Javascript:showPT('FB7_5_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_3</a> <a href="Javascript:showPT('FB7_5_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_4</a> <a href="Javascript:showPT('FB7_5_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_5</a> <a href="Javascript:showPT('FB7_6_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_3</a> <a href="Javascript:showPT('FB7_6_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_4</a> <a href="Javascript:showPT('FB7_6_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_5</a>
-</td>
-<td align="center" width="10%">MC5</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">52</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'nUDS_FSB'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('RA6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;6&gt;</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB7_6_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_1</a> <a href="Javascript:showPT('FB7_6_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_2</a>
-</td>
-<td align="center" width="10%">MC6</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">53</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('fsbReady0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready0r</a></td>
-<td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB7_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a> <a href="Javascript:showPT('FB7_7_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_2</a> <a href="Javascript:showPT('FB7_7_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_3</a>
-</td>
-<td align="center" width="10%">MC7</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ramRS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd1</a></td>
-<td align="center" width="10%">5</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB7_8_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_1</a> <a href="Javascript:showPT('FB7_8_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_2</a> <a href="Javascript:showPT('FB7_8_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_3</a> <a href="Javascript:showPT('FB7_8_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_4</a> <a href="Javascript:showPT('FB7_8_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_5</a>
-</td>
-<td align="center" width="10%">MC8</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">54</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'nDTACK_IOB'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('RA7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;7&gt;</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB7_9_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_1</a> <a href="Javascript:showPT('FB7_9_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_2</a>
-</td>
-<td align="center" width="10%">MC9</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">55</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ramOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/Once</a></td>
-<td align="center" width="10%">5</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB7_10_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_1</a> <a href="Javascript:showPT('FB7_10_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_2</a> <a href="Javascript:showPT('FB7_9_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_3</a> <a href="Javascript:showPT('FB7_9_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_4</a> <a href="Javascript:showPT('FB7_9_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_5</a>
-</td>
-<td align="center" width="10%">MC10</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ramRAMDIS2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS2</a></td>
-<td align="center" width="10%">7</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB7_10_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_3</a> <a href="Javascript:showPT('FB7_10_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_4</a> <a href="Javascript:showPT('FB7_10_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_5</a> <a href="Javascript:showPT('FB7_11_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_1</a> <a href="Javascript:showPT('FB7_11_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_2</a> <a href="Javascript:showPT('FB7_11_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_3</a> <a href="Javascript:showPT('FB7_11_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_4</a>
-</td>
-<td align="center" width="10%">MC11</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">56</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;4&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('RA8_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;8&gt;</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB7_11_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_5</a> <a href="Javascript:showPT('FB7_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a>
-</td>
-<td align="center" width="10%">MC12</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">58</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ramRS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd2</a></td>
-<td align="center" width="10%">13</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB7_12_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_2</a> <a href="Javascript:showPT('FB7_12_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_3</a> <a href="Javascript:showPT('FB7_12_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_4</a> <a href="Javascript:showPT('FB7_12_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_5</a> <a href="Javascript:showPT('FB7_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a> <a href="Javascript:showPT('FB7_13_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_2</a> <a href="Javascript:showPT('FB7_13_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_3</a> <a href="Javascript:showPT('FB7_13_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_4</a> <a href="Javascript:showPT('FB7_13_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_5</a> <a href="Javascript:showPT('FB7_14_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_2</a> <a href="Javascript:showPT('FB7_14_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_3</a> <a href="Javascript:showPT('FB7_14_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_4</a> <a href="Javascript:showPT('FB7_14_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_5</a>
-</td>
-<td align="center" width="10%">MC13</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntRefCnt7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;7&gt;</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB7_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a>
-</td>
-<td align="center" width="10%">MC14</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">59</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'nVPA_IOB'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('RA9_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;9&gt;</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB7_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a> <a href="Javascript:showPT('FB7_15_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_2</a>
-</td>
-<td align="center" width="10%">MC15</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">60</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntRefCnt6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;6&gt;</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB7_15_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_3</a>
-</td>
-<td align="center" width="10%">MC16</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ramRAMReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMReady</a></td>
-<td align="center" width="10%">16</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB7_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB7_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a> <a href="Javascript:showPT('FB7_16_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_3</a> <a href="Javascript:showPT('FB7_16_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_4</a> <a href="Javascript:showPT('FB7_16_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_5</a> <a href="Javascript:showPT('FB7_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a> <a href="Javascript:showPT('FB7_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a> <a href="Javascript:showPT('FB7_17_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_3</a> <a href="Javascript:showPT('FB7_17_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_4</a> <a href="Javascript:showPT('FB7_17_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_5</a> <a href="Javascript:showPT('FB7_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB7_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB7_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a> <a href="Javascript:showPT('FB7_18_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_4</a> <a href="Javascript:showPT('FB7_18_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_5</a> <a href="Javascript:showPT('FB7_1_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_2</a>
-</td>
-<td align="center" width="10%">MC17</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">61</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'nWE_FSB'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC18</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-</table></span></div>
-<div id="tipBox"></div>
-<br><span id="fbsiguse" class="pgRef"><b>Signals Used By Logic in Function Block</b><br><ol>
-<li>A_FSB&lt;15&gt;</li>
-<li>A_FSB&lt;16&gt;</li>
-<li>A_FSB&lt;17&gt;</li>
-<li>A_FSB&lt;18&gt;</li>
-<li>A_FSB&lt;19&gt;</li>
-<li>A_FSB&lt;20&gt;</li>
-<li>A_FSB&lt;21&gt;</li>
-<li>A_FSB&lt;22&gt;</li>
-<li>A_FSB&lt;23&gt;</li>
-<li>A_FSB&lt;6&gt;</li>
-<li>A_FSB&lt;7&gt;</li>
-<li>A_FSB&lt;8&gt;</li>
-<li>A_FSB&lt;9&gt;</li>
-<li><a href="Javascript:showEqn('cntRefCnt0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;0&gt;</a></li>
-<li><a href="Javascript:showEqn('cntRefCnt1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;1&gt;</a></li>
-<li><a href="Javascript:showEqn('cntRefCnt2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;2&gt;</a></li>
-<li><a href="Javascript:showEqn('cntRefCnt3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;3&gt;</a></li>
-<li><a href="Javascript:showEqn('cntRefCnt4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;4&gt;</a></li>
-<li><a href="Javascript:showEqn('cntRefCnt5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;5&gt;</a></li>
-<li><a href="Javascript:showEqn('cntRefCnt6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;6&gt;</a></li>
-<li><a href="Javascript:showEqn('cntRefCnt7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;7&gt;</a></li>
-<li><a href="Javascript:showEqn('cntRefDone_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefDone</a></li>
-<li><a href="Javascript:showEqn('csnOverlay0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay0</a></li>
-<li><a href="Javascript:showEqn('csnOverlay1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay1</a></li>
-<li><a href="Javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></li>
-<li><a href="Javascript:showEqn('fsbReady0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready0r</a></li>
-<li>nAS_FSB</li>
-<li><a href="Javascript:showEqn('ramBACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/BACTr</a></li>
-<li><a href="Javascript:showEqn('ramOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/Once</a></li>
-<li><a href="Javascript:showEqn('ramRAMDIS2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS2</a></li>
-<li><a href="Javascript:showEqn('ramRAMReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMReady</a></li>
-<li><a href="Javascript:showEqn('ramRASEL_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RASEL</a></li>
-<li><a href="Javascript:showEqn('ramRS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd1</a></li>
-<li><a href="Javascript:showEqn('ramRS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd2</a></li>
-<li><a href="Javascript:showEqn('ramRS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd3</a></li>
-</ol></span><form><span class="pgRef"><table width="90%" align="center"><tr>
-<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
-<td align="center"><table align="center" width="90%" border="0" cellpadding="0" cellspacing="0"><tr><td width="100%" align="center">
-<input type="button" onclick="javascript:showFB('FB6')" onmouseover="window.status='show previous Function Block'; return true;" onmouseout="window.status=''" value="prev">
-                    
-                  <input type="button" onclick="javascript:showFB('FB8')" onmouseover="window.status='show next Function Block'; return true;" onmouseout="window.status=''" value="next">
-</td></tr></table></td>
-<td align="right">
-<input type="button" onclick="javascript:showLegend('logiclegend.htm')" onmouseover="window.status='show Legend'; return true;" onmouseout="window.status=''" value="legend"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page">
-</td>
-</tr></table></span></form>
-</body>
-</html>
diff --git a/cpld/XC95144XL/MXSE_html/fit/fbs_FB7.htm b/cpld/XC95144XL/MXSE_html/fit/fbs_FB7.htm
index d095a8c..1940674 100644
--- a/cpld/XC95144XL/MXSE_html/fit/fbs_FB7.htm
+++ b/cpld/XC95144XL/MXSE_html/fit/fbs_FB7.htm
@@ -27,9 +27,9 @@
 <th width="10%">Pin Use</th>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('TimeoutB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutB</a></td>
-<td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB7_2_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_3</a> <a href="Javascript:showPT('FB7_2_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_4</a> <a href="Javascript:showPT('FB7_2_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_5</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('ramRAMReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMReady</a></td>
+<td align="center" width="10%">16</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB7_17_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_5</a> <a href="Javascript:showPT('FB7_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB7_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB7_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a> <a href="Javascript:showPT('FB7_18_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_4</a> <a href="Javascript:showPT('FB7_18_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_5</a> <a href="Javascript:showPT('FB7_1_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_1</a> <a href="Javascript:showPT('FB7_1_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_2</a> <a href="Javascript:showPT('FB7_1_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_3</a> <a href="Javascript:showPT('FB7_1_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_4</a> <a href="Javascript:showPT('FB7_1_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_5</a> <a href="Javascript:showPT('FB7_2_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_1</a> <a href="Javascript:showPT('FB7_2_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_2</a> <a href="Javascript:showPT('FB7_2_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_3</a> <a href="Javascript:showPT('FB7_2_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_4</a> <a href="Javascript:showPT('FB7_2_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_5</a>
 </td>
 <td align="center" width="10%">MC1</td>
 <td align="center" width="10%">STD</td>
@@ -40,7 +40,7 @@
 <tr>
 <td align="center" width="10%"><a href="Javascript:showEqn('RA1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;1&gt;</a></td>
 <td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB7_2_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_1</a> <a href="Javascript:showPT('FB7_2_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_2</a>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB7_3_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_4</a> <a href="Javascript:showPT('FB7_3_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_5</a>
 </td>
 <td align="center" width="10%">MC2</td>
 <td align="center" width="10%">STD</td>
@@ -49,9 +49,9 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntRefDone_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefDone</a></td>
-<td align="center" width="10%">2</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB7_3_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_1</a> <a href="Javascript:showPT('FB7_3_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_2</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('TimeoutB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutB</a></td>
+<td align="center" width="10%">3</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB7_3_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_1</a> <a href="Javascript:showPT('FB7_3_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_2</a> <a href="Javascript:showPT('FB7_3_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_3</a>
 </td>
 <td align="center" width="10%">MC3</td>
 <td align="center" width="10%">STD</td>
@@ -93,9 +93,9 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('csnOverlay0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay0</a></td>
-<td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB7_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a> <a href="Javascript:showPT('FB7_7_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_2</a> <a href="Javascript:showPT('FB7_7_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_3</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('ramRS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd1</a></td>
+<td align="center" width="10%">5</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB7_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a> <a href="Javascript:showPT('FB7_7_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_2</a> <a href="Javascript:showPT('FB7_7_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_3</a> <a href="Javascript:showPT('FB7_7_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_4</a> <a href="Javascript:showPT('FB7_7_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_5</a>
 </td>
 <td align="center" width="10%">MC7</td>
 <td align="center" width="10%">STD</td>
@@ -106,7 +106,7 @@
 <tr>
 <td align="center" width="10%"><a href="Javascript:showEqn('RA8_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;8&gt;</a></td>
 <td align="center" width="10%">7</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB7_7_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_4</a> <a href="Javascript:showPT('FB7_8_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_1</a> <a href="Javascript:showPT('FB7_8_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_2</a> <a href="Javascript:showPT('FB7_8_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_3</a> <a href="Javascript:showPT('FB7_8_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_4</a> <a href="Javascript:showPT('FB7_8_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_5</a> <a href="Javascript:showPT('FB7_9_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_2</a>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB7_8_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_1</a> <a href="Javascript:showPT('FB7_8_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_2</a> <a href="Javascript:showPT('FB7_8_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_3</a> <a href="Javascript:showPT('FB7_8_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_4</a> <a href="Javascript:showPT('FB7_8_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_5</a> <a href="Javascript:showPT('FB7_9_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_2</a> <a href="Javascript:showPT('FB7_9_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_3</a>
 </td>
 <td align="center" width="10%">MC8</td>
 <td align="center" width="10%">STD</td>
@@ -126,9 +126,9 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('cntTimeoutBPre_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/TimeoutBPre</a></td>
-<td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB7_10_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_1</a> <a href="Javascript:showPT('FB7_10_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_2</a> <a href="Javascript:showPT('FB7_10_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_3</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('OpTxOpTxFX_DC182_INV783_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$$OpTx$FX_DC$182_INV$783</a></td>
+<td align="center" width="10%">6</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB7_10_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_1</a> <a href="Javascript:showPT('FB7_10_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_2</a> <a href="Javascript:showPT('FB7_10_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_3</a> <a href="Javascript:showPT('FB7_10_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_4</a> <a href="Javascript:showPT('FB7_10_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_5</a> <a href="Javascript:showPT('FB7_11_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_3</a>
 </td>
 <td align="center" width="10%">MC10</td>
 <td align="center" width="10%">STD</td>
@@ -148,36 +148,37 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('TimeoutA')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutA</a></td>
-<td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB7_11_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_3</a> <a href="Javascript:showPT('FB7_11_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_4</a> <a href="Javascript:showPT('FB7_11_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_5</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('CLK25EN')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">CLK25EN</a></td>
+<td align="center" width="10%">1</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB7_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a>
 </td>
 <td align="center" width="10%">MC12</td>
 <td align="center" width="10%">STD</td>
 <td align="center" width="10%">58</td>
 <td width="8%" align="center">I/O</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC13</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
+<td align="center" width="10%">O</td>
 </tr>
 <tr>
 <td align="center" width="10%"><a href="Javascript:showEqn('ramRS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd3</a></td>
 <td align="center" width="10%">11</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB7_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a> <a href="Javascript:showPT('FB7_12_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_2</a> <a href="Javascript:showPT('FB7_12_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_3</a> <a href="Javascript:showPT('FB7_12_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_4</a> <a href="Javascript:showPT('FB7_12_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_5</a> <a href="Javascript:showPT('FB7_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a> <a href="Javascript:showPT('FB7_13_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_2</a> <a href="Javascript:showPT('FB7_13_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_3</a> <a href="Javascript:showPT('FB7_13_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_4</a> <a href="Javascript:showPT('FB7_13_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_5</a> <a href="Javascript:showPT('FB7_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB7_12_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_2</a> <a href="Javascript:showPT('FB7_12_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_3</a> <a href="Javascript:showPT('FB7_12_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_4</a> <a href="Javascript:showPT('FB7_12_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_5</a> <a href="Javascript:showPT('FB7_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a> <a href="Javascript:showPT('FB7_13_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_2</a> <a href="Javascript:showPT('FB7_13_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_3</a> <a href="Javascript:showPT('FB7_13_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_4</a> <a href="Javascript:showPT('FB7_13_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_5</a> <a href="Javascript:showPT('FB7_14_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_2</a> <a href="Javascript:showPT('FB7_14_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_3</a>
+</td>
+<td align="center" width="10%">MC13</td>
+<td align="center" width="10%">STD</td>
+<td align="center" width="10%"> </td>
+<td align="center" width="10%">(b)</td>
+<td align="center" width="10%">(b)</td>
+</tr>
+<tr>
+<td align="center" width="10%"><a href="Javascript:showEqn('CLK20EN')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">CLK20EN</a></td>
+<td align="center" width="10%">1</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB7_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a>
 </td>
 <td align="center" width="10%">MC14</td>
 <td align="center" width="10%">STD</td>
 <td align="center" width="10%">59</td>
 <td width="8%" align="center">I/O</td>
-<td align="center" width="10%">(b)</td>
+<td align="center" width="10%">O</td>
 </tr>
 <tr>
 <td align="center" width="10%">(unused)</td>
@@ -187,36 +188,35 @@
 <td align="center" width="10%"> </td>
 <td align="center" width="10%">60</td>
 <td width="8%" align="center">I/O</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ramRS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd2</a></td>
-<td align="center" width="10%">13</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB7_14_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_2</a> <a href="Javascript:showPT('FB7_14_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_3</a> <a href="Javascript:showPT('FB7_14_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_4</a> <a href="Javascript:showPT('FB7_14_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_5</a> <a href="Javascript:showPT('FB7_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a> <a href="Javascript:showPT('FB7_15_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_2</a> <a href="Javascript:showPT('FB7_15_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_3</a> <a href="Javascript:showPT('FB7_15_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_4</a> <a href="Javascript:showPT('FB7_15_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_5</a> <a href="Javascript:showPT('FB7_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB7_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a> <a href="Javascript:showPT('FB7_16_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_3</a> <a href="Javascript:showPT('FB7_16_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_4</a>
-</td>
-<td align="center" width="10%">MC16</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
+<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'SW&lt;1&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
 <td align="center" width="10%">(unused)</td>
 <td align="center" width="10%">0</td>
 <td align="center" width="30%"> </td>
-<td align="center" width="10%">MC17</td>
+<td align="center" width="10%">MC16</td>
 <td align="center" width="10%"> </td>
-<td align="center" width="10%">61</td>
-<td width="8%" align="center">I/O</td>
+<td align="center" width="10%"> </td>
+<td align="center" width="10%">(b)</td>
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ramRAMReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMReady</a></td>
-<td align="center" width="10%">16</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB7_16_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_5</a> <a href="Javascript:showPT('FB7_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a> <a href="Javascript:showPT('FB7_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a> <a href="Javascript:showPT('FB7_17_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_3</a> <a href="Javascript:showPT('FB7_17_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_4</a> <a href="Javascript:showPT('FB7_17_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_5</a> <a href="Javascript:showPT('FB7_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB7_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB7_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a> <a href="Javascript:showPT('FB7_18_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_4</a> <a href="Javascript:showPT('FB7_18_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_5</a> <a href="Javascript:showPT('FB7_1_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_1</a> <a href="Javascript:showPT('FB7_1_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_2</a> <a href="Javascript:showPT('FB7_1_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_3</a> <a href="Javascript:showPT('FB7_1_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_4</a> <a href="Javascript:showPT('FB7_1_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_5</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('ramRS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd2</a></td>
+<td align="center" width="10%">13</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB7_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a> <a href="Javascript:showPT('FB7_15_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_2</a> <a href="Javascript:showPT('FB7_15_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_3</a> <a href="Javascript:showPT('FB7_15_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_4</a> <a href="Javascript:showPT('FB7_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB7_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a> <a href="Javascript:showPT('FB7_16_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_3</a> <a href="Javascript:showPT('FB7_16_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_4</a> <a href="Javascript:showPT('FB7_16_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_5</a> <a href="Javascript:showPT('FB7_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a> <a href="Javascript:showPT('FB7_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a> <a href="Javascript:showPT('FB7_17_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_3</a> <a href="Javascript:showPT('FB7_17_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_4</a>
 </td>
-<td align="center" width="10%">MC18</td>
+<td align="center" width="10%">MC17</td>
 <td align="center" width="10%">STD</td>
+<td align="center" width="10%">61</td>
+<td width="8%" align="center">I/O</td>
+<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'SW&lt;0&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
+</tr>
+<tr>
+<td align="center" width="10%">(unused)</td>
+<td align="center" width="10%">0</td>
+<td align="center" width="30%"> </td>
+<td align="center" width="10%">MC18</td>
+<td align="center" width="10%"> </td>
 <td align="center" width="10%"> </td>
 <td align="center" width="10%">(b)</td>
 <td align="center" width="10%">(b)</td>
@@ -237,8 +237,7 @@
 <li>A_FSB&lt;2&gt;</li>
 <li>A_FSB&lt;8&gt;</li>
 <li>A_FSB&lt;9&gt;</li>
-<li><a href="Javascript:showEqn('RefAck')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RefAck</a></li>
-<li><a href="Javascript:showEqn('TimeoutA')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutA</a></li>
+<li>SW&lt;0&gt;</li>
 <li><a href="Javascript:showEqn('TimeoutB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutB</a></li>
 <li><a href="Javascript:showEqn('cntRefCnt0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;0&gt;</a></li>
 <li><a href="Javascript:showEqn('cntRefCnt1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;1&gt;</a></li>
@@ -250,12 +249,10 @@
 <li><a href="Javascript:showEqn('cntRefCnt7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;7&gt;</a></li>
 <li><a href="Javascript:showEqn('cntRefDone_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefDone</a></li>
 <li><a href="Javascript:showEqn('cntTimeoutBPre_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/TimeoutBPre</a></li>
-<li><a href="Javascript:showEqn('csnOverlay0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay0</a></li>
 <li><a href="Javascript:showEqn('csnOverlay1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay1</a></li>
 <li><a href="Javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></li>
 <li><a href="Javascript:showEqn('fsbReady0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready0r</a></li>
 <li>nAS_FSB</li>
-<li>nRES</li>
 <li><a href="Javascript:showEqn('ramBACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/BACTr</a></li>
 <li><a href="Javascript:showEqn('ramOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/Once</a></li>
 <li><a href="Javascript:showEqn('ramRAMReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMReady</a></li>
diff --git a/cpld/XC95144XL/MXSE_html/fit/fbs_FB8 2.htm b/cpld/XC95144XL/MXSE_html/fit/fbs_FB8 2.htm
deleted file mode 100644
index 4250038..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/fbs_FB8 2.htm	
+++ /dev/null
@@ -1,235 +0,0 @@
-<html>
-<head>
-<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
-<script src="tooltips.js"></script><script src="fbs.js"></script><link rel="stylesheet" type="text/css" href="style.css">
-</head>
-<body class="pgBgnd" id="XC95144XL">
-<span id="fbsel" class="pgRef"><table cellspacing="0" cellpadding="0" border="0" width="90%" align="center"><tr>
-<td width="33%" valign="center" align="left"></td>
-<td width="33%" valign="center" align="center"><form name="fbopt"><select onchange="javascript:showFB(document.fbopt.fbType.options[document.fbopt.fbType.options.selectedIndex].value)" name="fbType"><option value="FB1">FB1</option>
-<option value="FB2">FB2</option>
-<option value="FB3">FB3</option>
-<option value="FB4">FB4</option>
-<option value="FB5">FB5</option>
-<option value="FB6">FB6</option>
-<option value="FB7">FB7</option>
-<option value="FB8" selected>FB8</option></select></form></td>
-<td width="33%" valign="center" align="right"></td>
-</tr></table></span><div><span id="fbdata" class="pgRef"><table align="center" width="90%" border="1" cellpadding="0" cellspacing="0">
-<tr class="pgHeader">
-<th width="10%">Signal Name</th>
-<th width="10%">Total Product Terms</th>
-<th width="30%">Product Terms</th>
-<th width="10%">Location</th>
-<th width="10%">Power Mode</th>
-<th width="10%">Pin Number</th>
-<th width="10%">PinType</th>
-<th width="10%">Pin Use</th>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC1</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%"> </td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('RA11_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;11&gt;</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_2_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_1</a>
-</td>
-<td align="center" width="10%">MC2</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">63</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC3</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%"> </td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC4</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%"> </td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC5</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">64</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;8&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('RA10_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;10&gt;</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_6_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_1</a>
-</td>
-<td align="center" width="10%">MC6</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">65</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC7</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%"> </td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC8</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">66</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;23&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('nADoutLE0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nADoutLE0</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_9_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_1</a>
-</td>
-<td align="center" width="10%">MC9</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">67</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC10</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%"> </td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC11</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">68</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;21&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('nAoutOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nAoutOE</a></td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('GND')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''"></a>
-</td>
-<td align="center" width="10%">MC12</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">70</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC13</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%"> </td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC14</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">71</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;20&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('nDinLE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDinLE</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a>
-</td>
-<td align="center" width="10%">MC15</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">72</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%">O</td>
-</tr>
-<tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
-<td align="center" width="10%">MC16</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%"> </td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmIOS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd1</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a>
-</td>
-<td align="center" width="10%">MC17</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%">73</td>
-<td width="8%" align="center">I/O</td>
-<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A_FSB&lt;19&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
-</tr>
-<tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobmEr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er</a></td>
-<td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a>
-</td>
-<td align="center" width="10%">MC18</td>
-<td align="center" width="10%">STD</td>
-<td align="center" width="10%"> </td>
-<td align="center" width="10%">(b)</td>
-<td align="center" width="10%">(b)</td>
-</tr>
-</table></span></div>
-<div id="tipBox"></div>
-<br><span id="fbsiguse" class="pgRef"><b>Signals Used By Logic in Function Block</b><br><ol>
-<li><a href="Javascript:showEqn('ALE0M')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ALE0M</a></li>
-<li><a href="Javascript:showEqn('ALE0S')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ALE0S</a></li>
-<li>A_FSB&lt;19&gt;</li>
-<li>A_FSB&lt;21&gt;</li>
-<li>E_IOB</li>
-<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd2</a></li>
-<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd3</a></li>
-<li><a href="Javascript:showEqn('iobmIOS_FSM_FFd4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd4</a></li>
-</ol></span><form><span class="pgRef"><table width="90%" align="center"><tr>
-<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
-<td align="center"><table align="center" width="90%" border="0" cellpadding="0" cellspacing="0"><tr><td width="100%" align="center"><input type="button" onclick="javascript:showFB('FB7')" onmouseover="window.status='show previous Function Block'; return true;" onmouseout="window.status=''" value="prev"></td></tr></table></td>
-<td align="right">
-<input type="button" onclick="javascript:showLegend('logiclegend.htm')" onmouseover="window.status='show Legend'; return true;" onmouseout="window.status=''" value="legend"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page">
-</td>
-</tr></table></span></form>
-</body>
-</html>
diff --git a/cpld/XC95144XL/MXSE_html/fit/fbs_FB8.htm b/cpld/XC95144XL/MXSE_html/fit/fbs_FB8.htm
index 2294fe6..f3a37da 100644
--- a/cpld/XC95144XL/MXSE_html/fit/fbs_FB8.htm
+++ b/cpld/XC95144XL/MXSE_html/fit/fbs_FB8.htm
@@ -27,12 +27,11 @@
 <th width="10%">Pin Use</th>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ramRASEL_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RASEL</a></td>
-<td align="center" width="10%">20</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a> <a href="Javascript:showPT('FB8_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a> <a href="Javascript:showPT('FB8_17_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_3</a> <a href="Javascript:showPT('FB8_17_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_4</a> <a href="Javascript:showPT('FB8_17_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_5</a> <a href="Javascript:showPT('FB8_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB8_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB8_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a> <a href="Javascript:showPT('FB8_18_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_4</a> <a href="Javascript:showPT('FB8_18_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_5</a> <a href="Javascript:showPT('FB8_1_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_1</a> <a href="Javascript:showPT('FB8_1_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_2</a> <a href="Javascript:showPT('FB8_1_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_3</a> <a href="Javascript:showPT('FB8_1_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_4</a> <a href="Javascript:showPT('FB8_1_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_5</a> <a href="Javascript:showPT('FB8_2_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_1</a> <a href="Javascript:showPT('FB8_2_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_2</a> <a href="Javascript:showPT('FB8_2_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_3</a> <a href="Javascript:showPT('FB8_2_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_4</a> <a href="Javascript:showPT('FB8_2_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_5</a>
-</td>
+<td align="center" width="10%">(unused)</td>
+<td align="center" width="10%">0</td>
+<td align="center" width="30%"> </td>
 <td align="center" width="10%">MC1</td>
-<td align="center" width="10%">STD</td>
+<td align="center" width="10%"> </td>
 <td align="center" width="10%"> </td>
 <td align="center" width="10%">(b)</td>
 <td align="center" width="10%">(b)</td>
@@ -40,7 +39,7 @@
 <tr>
 <td align="center" width="10%"><a href="Javascript:showEqn('RA11_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;11&gt;</a></td>
 <td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_3_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_4</a>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB8_2_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_1</a>
 </td>
 <td align="center" width="10%">MC2</td>
 <td align="center" width="10%">STD</td>
@@ -49,20 +48,19 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('fsbBERR0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR0r</a></td>
-<td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_3_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_1</a> <a href="Javascript:showPT('FB8_3_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_2</a> <a href="Javascript:showPT('FB8_3_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_3</a>
-</td>
+<td align="center" width="10%">(unused)</td>
+<td align="center" width="10%">0</td>
+<td align="center" width="30%"> </td>
 <td align="center" width="10%">MC3</td>
-<td align="center" width="10%">STD</td>
+<td align="center" width="10%"> </td>
 <td align="center" width="10%"> </td>
 <td align="center" width="10%">(b)</td>
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ramRS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd1</a></td>
-<td align="center" width="10%">5</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_4_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_1</a> <a href="Javascript:showPT('FB8_4_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_2</a> <a href="Javascript:showPT('FB8_4_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_3</a> <a href="Javascript:showPT('FB8_4_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_4</a> <a href="Javascript:showPT('FB8_4_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_5</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></td>
+<td align="center" width="10%">15</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB8_3_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_1</a> <a href="Javascript:showPT('FB8_3_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_2</a> <a href="Javascript:showPT('FB8_3_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_3</a> <a href="Javascript:showPT('FB8_3_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_4</a> <a href="Javascript:showPT('FB8_3_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_5</a> <a href="Javascript:showPT('FB8_4_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_1</a> <a href="Javascript:showPT('FB8_4_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_2</a> <a href="Javascript:showPT('FB8_4_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_3</a> <a href="Javascript:showPT('FB8_4_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_4</a> <a href="Javascript:showPT('FB8_4_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_5</a> <a href="Javascript:showPT('FB8_5_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_1</a> <a href="Javascript:showPT('FB8_5_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_2</a> <a href="Javascript:showPT('FB8_5_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_3</a> <a href="Javascript:showPT('FB8_5_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_4</a> <a href="Javascript:showPT('FB8_5_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_5</a>
 </td>
 <td align="center" width="10%">MC4</td>
 <td align="center" width="10%">STD</td>
@@ -73,7 +71,7 @@
 <tr>
 <td align="center" width="10%"><a href="Javascript:showEqn('nRAS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nRAS</a></td>
 <td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_5_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_1</a> <a href="Javascript:showPT('FB8_5_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_2</a> <a href="Javascript:showPT('FB8_5_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_3</a>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB8_6_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_2</a> <a href="Javascript:showPT('FB8_6_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_3</a> <a href="Javascript:showPT('FB8_6_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_4</a>
 </td>
 <td align="center" width="10%">MC5</td>
 <td align="center" width="10%">STD</td>
@@ -93,9 +91,9 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ramOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/Once</a></td>
-<td align="center" width="10%">5</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a> <a href="Javascript:showPT('FB8_7_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_2</a> <a href="Javascript:showPT('FB8_7_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_3</a> <a href="Javascript:showPT('FB8_7_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_4</a> <a href="Javascript:showPT('FB8_7_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_5</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('RESDone')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RESDone</a></td>
+<td align="center" width="10%">1</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB8_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a> <a href="Javascript:showPT('VCC')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''"></a>
 </td>
 <td align="center" width="10%">MC7</td>
 <td align="center" width="10%">STD</td>
@@ -106,7 +104,7 @@
 <tr>
 <td align="center" width="10%"><a href="Javascript:showEqn('nRAMUWE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nRAMUWE</a></td>
 <td align="center" width="10%">1</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_8_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_1</a>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB8_7_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_2</a>
 </td>
 <td align="center" width="10%">MC8</td>
 <td align="center" width="10%">STD</td>
@@ -115,9 +113,9 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('iobsLoad1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Load1</a></td>
-<td align="center" width="10%">14</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_10_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_1</a> <a href="Javascript:showPT('FB8_10_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_2</a> <a href="Javascript:showPT('FB8_10_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_3</a> <a href="Javascript:showPT('FB8_10_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_4</a> <a href="Javascript:showPT('FB8_10_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_5</a> <a href="Javascript:showPT('FB8_8_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_2</a> <a href="Javascript:showPT('FB8_8_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_3</a> <a href="Javascript:showPT('FB8_8_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_4</a> <a href="Javascript:showPT('FB8_8_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_5</a> <a href="Javascript:showPT('FB8_9_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_1</a> <a href="Javascript:showPT('FB8_9_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_2</a> <a href="Javascript:showPT('FB8_9_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_3</a> <a href="Javascript:showPT('FB8_9_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_4</a> <a href="Javascript:showPT('FB8_9_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_5</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('IOREQ')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOREQ</a></td>
+<td align="center" width="10%">15</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB8_10_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_1</a> <a href="Javascript:showPT('FB8_10_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_2</a> <a href="Javascript:showPT('FB8_10_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_3</a> <a href="Javascript:showPT('FB8_10_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_4</a> <a href="Javascript:showPT('FB8_10_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_5</a> <a href="Javascript:showPT('FB8_8_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_1</a> <a href="Javascript:showPT('FB8_8_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_2</a> <a href="Javascript:showPT('FB8_8_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_3</a> <a href="Javascript:showPT('FB8_8_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_4</a> <a href="Javascript:showPT('FB8_8_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_5</a> <a href="Javascript:showPT('FB8_9_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_1</a> <a href="Javascript:showPT('FB8_9_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_2</a> <a href="Javascript:showPT('FB8_9_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_3</a> <a href="Javascript:showPT('FB8_9_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_4</a> <a href="Javascript:showPT('FB8_9_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_5</a>
 </td>
 <td align="center" width="10%">MC9</td>
 <td align="center" width="10%">STD</td>
@@ -148,7 +146,7 @@
 <tr>
 <td align="center" width="10%"><a href="Javascript:showEqn('nBERR_FSB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nBERR_FSB</a></td>
 <td align="center" width="10%">3</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_11_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_1</a> <a href="Javascript:showPT('FB8_11_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_2</a> <a href="Javascript:showPT('FB8_11_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_3</a>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB8_11_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_1</a> <a href="Javascript:showPT('FB8_11_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_2</a> <a href="Javascript:showPT('FB8_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a>
 </td>
 <td align="center" width="10%">MC12</td>
 <td align="center" width="10%">STD</td>
@@ -157,43 +155,44 @@
 <td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ramRAMDIS2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS2</a></td>
-<td align="center" width="10%">7</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a> <a href="Javascript:showPT('FB8_12_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_2</a> <a href="Javascript:showPT('FB8_12_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_3</a> <a href="Javascript:showPT('FB8_12_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_4</a> <a href="Javascript:showPT('FB8_12_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_5</a> <a href="Javascript:showPT('FB8_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a> <a href="Javascript:showPT('FB8_13_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_2</a>
-</td>
+<td align="center" width="10%">(unused)</td>
+<td align="center" width="10%">0</td>
+<td align="center" width="30%"> </td>
 <td align="center" width="10%">MC13</td>
-<td align="center" width="10%">STD</td>
+<td align="center" width="10%"> </td>
 <td align="center" width="10%"> </td>
 <td align="center" width="10%">(b)</td>
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
+<td align="center" width="10%"><a href="Javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></td>
+<td align="center" width="10%">18</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB8_12_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_2</a> <a href="Javascript:showPT('FB8_12_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_3</a> <a href="Javascript:showPT('FB8_12_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_4</a> <a href="Javascript:showPT('FB8_12_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_5</a> <a href="Javascript:showPT('FB8_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a> <a href="Javascript:showPT('FB8_13_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_2</a> <a href="Javascript:showPT('FB8_13_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_3</a> <a href="Javascript:showPT('FB8_13_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_4</a> <a href="Javascript:showPT('FB8_13_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_5</a> <a href="Javascript:showPT('FB8_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a> <a href="Javascript:showPT('FB8_14_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_2</a> <a href="Javascript:showPT('FB8_14_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_3</a> <a href="Javascript:showPT('FB8_14_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_4</a> <a href="Javascript:showPT('FB8_14_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_5</a> <a href="Javascript:showPT('FB8_15_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_2</a> <a href="Javascript:showPT('FB8_15_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_3</a> <a href="Javascript:showPT('FB8_15_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_4</a> <a href="Javascript:showPT('FB8_15_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_5</a>
+</td>
 <td align="center" width="10%">MC14</td>
-<td align="center" width="10%"> </td>
+<td align="center" width="10%">STD</td>
 <td align="center" width="10%">71</td>
 <td width="8%" align="center">I/O</td>
 <td align="center" width="10%">(b)</td>
 </tr>
 <tr>
-<td align="center" width="10%"><a href="Javascript:showEqn('ramRAMDIS1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS1</a></td>
-<td align="center" width="10%">18</td>
-<td align="center" width="30%"> <a href="Javascript:showPT('FB8_13_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_3</a> <a href="Javascript:showPT('FB8_13_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_4</a> <a href="Javascript:showPT('FB8_13_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_5</a> <a href="Javascript:showPT('FB8_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a> <a href="Javascript:showPT('FB8_14_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_2</a> <a href="Javascript:showPT('FB8_14_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_3</a> <a href="Javascript:showPT('FB8_14_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_4</a> <a href="Javascript:showPT('FB8_14_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_5</a> <a href="Javascript:showPT('FB8_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a> <a href="Javascript:showPT('FB8_15_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_2</a> <a href="Javascript:showPT('FB8_15_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_3</a> <a href="Javascript:showPT('FB8_15_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_4</a> <a href="Javascript:showPT('FB8_15_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_5</a> <a href="Javascript:showPT('FB8_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB8_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a> <a href="Javascript:showPT('FB8_16_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_3</a> <a href="Javascript:showPT('FB8_16_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_4</a> <a href="Javascript:showPT('FB8_16_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_5</a>
+<td align="center" width="10%"><a href="Javascript:showEqn('nBR_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nBR_IOB</a></td>
+<td align="center" width="10%">1</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB8_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a> <a href="Javascript:showPT('GND')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''"></a>
 </td>
 <td align="center" width="10%">MC15</td>
 <td align="center" width="10%">STD</td>
 <td align="center" width="10%">72</td>
 <td width="8%" align="center">I/O</td>
-<td align="center" width="10%">(b)</td>
+<td align="center" width="10%">O</td>
 </tr>
 <tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
+<td align="center" width="10%"><a href="Javascript:showEqn('fsbBERR0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR0r</a></td>
+<td align="center" width="10%">3</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB8_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB8_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a> <a href="Javascript:showPT('FB8_16_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_3</a>
+</td>
 <td align="center" width="10%">MC16</td>
-<td align="center" width="10%"> </td>
+<td align="center" width="10%">STD</td>
 <td align="center" width="10%"> </td>
 <td align="center" width="10%">(b)</td>
 <td align="center" width="10%">(b)</td>
@@ -206,14 +205,15 @@
 <td align="center" width="10%"> </td>
 <td align="center" width="10%">73</td>
 <td width="8%" align="center">I/O</td>
-<td align="center" width="10%">(b)</td>
+<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'nBG_IOB'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
 </tr>
 <tr>
-<td align="center" width="10%">(unused)</td>
-<td align="center" width="10%">0</td>
-<td align="center" width="30%"> </td>
+<td align="center" width="10%"><a href="Javascript:showEqn('IORW0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IORW0</a></td>
+<td align="center" width="10%">19</td>
+<td align="center" width="30%"> <a href="Javascript:showPT('FB8_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a> <a href="Javascript:showPT('FB8_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a> <a href="Javascript:showPT('FB8_17_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_3</a> <a href="Javascript:showPT('FB8_17_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_4</a> <a href="Javascript:showPT('FB8_17_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_5</a> <a href="Javascript:showPT('FB8_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB8_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB8_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a> <a href="Javascript:showPT('FB8_18_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_4</a> <a href="Javascript:showPT('FB8_18_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_5</a> <a href="Javascript:showPT('FB8_1_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_1</a> <a href="Javascript:showPT('FB8_1_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_2</a> <a href="Javascript:showPT('FB8_1_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_3</a> <a href="Javascript:showPT('FB8_1_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_4</a> <a href="Javascript:showPT('FB8_1_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_5</a> <a href="Javascript:showPT('FB8_2_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_2</a> <a href="Javascript:showPT('FB8_2_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_3</a> <a href="Javascript:showPT('FB8_2_4')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_4</a> <a href="Javascript:showPT('FB8_2_5')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_5</a>
+</td>
 <td align="center" width="10%">MC18</td>
-<td align="center" width="10%"> </td>
+<td align="center" width="10%">STD</td>
 <td align="center" width="10%"> </td>
 <td align="center" width="10%">(b)</td>
 <td align="center" width="10%">(b)</td>
@@ -232,16 +232,22 @@
 <li>A_FSB&lt;22&gt;</li>
 <li>A_FSB&lt;23&gt;</li>
 <li><a href="Javascript:showEqn('BERR_IOBS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">BERR_IOBS</a></li>
+<li><a href="Javascript:showEqn('IORW0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IORW0</a></li>
+<li><a href="Javascript:showEqn('IPL2r0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IPL2r0</a></li>
+<li><a href="Javascript:showEqn('IPL2r1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IPL2r1</a></li>
+<li><a href="Javascript:showEqn('RESDone')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RESDone</a></li>
+<li><a href="Javascript:showEqn('RESr0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RESr0</a></li>
+<li><a href="Javascript:showEqn('RESr1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RESr1</a></li>
+<li><a href="Javascript:showEqn('RESr2')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RESr2</a></li>
 <li><a href="Javascript:showEqn('RefAck')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RefAck</a></li>
+<li>SW&lt;1&gt;</li>
 <li><a href="Javascript:showEqn('TimeoutB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutB</a></li>
-<li><a href="Javascript:showEqn('cntRefCnt5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;5&gt;</a></li>
-<li><a href="Javascript:showEqn('cntRefCnt6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;6&gt;</a></li>
-<li><a href="Javascript:showEqn('cntRefCnt7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;7&gt;</a></li>
-<li><a href="Javascript:showEqn('cntRefDone_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefDone</a></li>
 <li><a href="Javascript:showEqn('csnOverlay1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay1</a></li>
 <li><a href="Javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></li>
 <li><a href="Javascript:showEqn('fsbBERR0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR0r</a></li>
 <li><a href="Javascript:showEqn('fsbBERR1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR1r</a></li>
+<li><a href="Javascript:showEqn('iobsIOACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOACTr</a></li>
+<li><a href="Javascript:showEqn('iobsIORW1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IORW1</a></li>
 <li><a href="Javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></li>
 <li><a href="Javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></li>
 <li><a href="Javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></li>
@@ -250,13 +256,8 @@
 <li>nLDS_FSB</li>
 <li>nUDS_FSB</li>
 <li>nWE_FSB</li>
-<li><a href="Javascript:showEqn('ramBACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/BACTr</a></li>
-<li><a href="Javascript:showEqn('ramOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/Once</a></li>
 <li><a href="Javascript:showEqn('ramRAMDIS1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS1</a></li>
 <li><a href="Javascript:showEqn('ramRAMDIS2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS2</a></li>
-<li><a href="Javascript:showEqn('ramRS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd1</a></li>
-<li><a href="Javascript:showEqn('ramRS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd2</a></li>
-<li><a href="Javascript:showEqn('ramRS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd3</a></li>
 </ol></span><form><span class="pgRef"><table width="90%" align="center"><tr>
 <td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
 <td align="center"><table align="center" width="90%" border="0" cellpadding="0" cellspacing="0"><tr><td width="100%" align="center"><input type="button" onclick="javascript:showFB('FB7')" onmouseover="window.status='show previous Function Block'; return true;" onmouseout="window.status=''" value="prev"></td></tr></table></td>
diff --git a/cpld/XC95144XL/MXSE_html/fit/header.gif b/cpld/XC95144XL/MXSE_html/fit/header.gif
deleted file mode 100644
index 526171b..0000000
Binary files a/cpld/XC95144XL/MXSE_html/fit/header.gif and /dev/null differ
diff --git a/cpld/XC95144XL/MXSE_html/fit/home.gif b/cpld/XC95144XL/MXSE_html/fit/home.gif
deleted file mode 100644
index d441184..0000000
Binary files a/cpld/XC95144XL/MXSE_html/fit/home.gif and /dev/null differ
diff --git a/cpld/XC95144XL/MXSE_html/fit/inputleft.js b/cpld/XC95144XL/MXSE_html/fit/inputleft.js
deleted file mode 100644
index 63fe42f..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/inputleft.js
+++ /dev/null
@@ -1 +0,0 @@
-function showInputLeft() { parent.leftnav.showInputLeft(); }
diff --git a/cpld/XC95144XL/MXSE_html/fit/legend.jpg b/cpld/XC95144XL/MXSE_html/fit/legend.jpg
deleted file mode 100644
index 1d04af0..0000000
Binary files a/cpld/XC95144XL/MXSE_html/fit/legend.jpg and /dev/null differ
diff --git a/cpld/XC95144XL/MXSE_html/fit/logic_legXC95.htm b/cpld/XC95144XL/MXSE_html/fit/logic_legXC95.htm
deleted file mode 100644
index e253a0b..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/logic_legXC95.htm
+++ /dev/null
@@ -1,2 +0,0 @@
-<html><body><pre>
-</pre></body></html>
diff --git a/cpld/XC95144XL/MXSE_html/fit/logic_legXbr.htm b/cpld/XC95144XL/MXSE_html/fit/logic_legXbr.htm
deleted file mode 100644
index d256e25..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/logic_legXbr.htm
+++ /dev/null
@@ -1,16 +0,0 @@
-<html><body><pre>
-I/O Style - OD    - OpenDrain
-          - PU    - Pullup
-          - PN    - Pulldown
-          - KPR   - Keeper
-          - S     - SchmittTrigger
-          - DG    - DataGate
-Reg Use   - LATCH - Transparent latch
-          - DFF   - D-flip-flop
-          - DEFF  - D-flip-flop with clock enable
-          - TFF   - T-flip-flop
-          - TDFF  - Dual-edge-triggered T-flip-flop
-          - DDFF  - Dual-edge-triggered flip-flop
-          - DDEFF - Dual-edge-triggered flip-flop with clock enable
-          /S (after any above flop/latch type) indicates initial state is Set
-</pre></body></html>
diff --git a/cpld/XC95144XL/MXSE_html/fit/logic_legXpla3.htm b/cpld/XC95144XL/MXSE_html/fit/logic_legXpla3.htm
deleted file mode 100644
index c0e6f4a..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/logic_legXpla3.htm
+++ /dev/null
@@ -1,3 +0,0 @@
-<html><body><pre>
-Legend: PU  - Pull Up
-</pre></body></html>
diff --git a/cpld/XC95144XL/MXSE_html/fit/logicleft.js b/cpld/XC95144XL/MXSE_html/fit/logicleft.js
deleted file mode 100644
index 2fa4142..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/logicleft.js
+++ /dev/null
@@ -1 +0,0 @@
-function showLogicLeft() { parent.leftnav.showLogicLeft(); }
diff --git a/cpld/XC95144XL/MXSE_html/fit/mapinput_00 2.htm b/cpld/XC95144XL/MXSE_html/fit/mapinput_00 2.htm
deleted file mode 100644
index a1fa8f4..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/mapinput_00 2.htm	
+++ /dev/null
@@ -1,304 +0,0 @@
-<html>
-<head>
-<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
-<script src="maplogic.js"></script><link rel="stylesheet" type="text/css" href="style.css">
-</head>
-<body class="pgBgnd" id="XC95144XL">
-<span id="mapin" class="pgRef"><h3 align="center">Inputs</h3>
-<table width="90%" border="1" cellpadding="0" cellspacing="0">
-<tr class="pgHeader">
-<th width="60%"><a href="javascript:Sort(10);">Signal Name</a></th>
-<th><a href="javascript:Sort(11);">Function Block</a></th>
-<th align="center">Macrocell</th>
-<th><a href="javascript:Sort(12);">Pin Number</a></th>
-<th align="center">Pin Type</th>
-<th align="center">Pin Use</th>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;10&gt;</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC5</td>
-<td align="center">89</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;11&gt;</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC17</td>
-<td align="center">86</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;12&gt;</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC9</td>
-<td align="center">92</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;13&gt;</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC14</td>
-<td align="center">82</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;14&gt;</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC11</td>
-<td align="center">93</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;15&gt;</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC11</td>
-<td align="center">80</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;16&gt;</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC14</td>
-<td align="center">95</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;17&gt;</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC15</td>
-<td align="center">96</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;18&gt;</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC5</td>
-<td align="center">76</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;19&gt;</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC17</td>
-<td align="center">73</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;1&gt;</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC6</td>
-<td align="center">90</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;20&gt;</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC14</td>
-<td align="center">71</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;21&gt;</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC11</td>
-<td align="center">68</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;22&gt;</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC15</td>
-<td align="center">9</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;23&gt;</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC8</td>
-<td align="center">66</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;2&gt;</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC9</td>
-<td align="center">16</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;3&gt;</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC8</td>
-<td align="center">78</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;4&gt;</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC11</td>
-<td align="center">56</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;5&gt;</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC8</td>
-<td align="center">15</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;6&gt;</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC14</td>
-<td align="center">19</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;7&gt;</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC15</td>
-<td align="center">20</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;8&gt;</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC5</td>
-<td align="center">64</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;9&gt;</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC3</td>
-<td align="center">12</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">CLK2X_IOB</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC17</td>
-<td align="center">22</td>
-<td align="center">I/O/GCK1</td>
-<td align="center">GCK</td>
-</tr>
-<tr>
-<td width="60%">CLK_FSB</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC2</td>
-<td align="center">23</td>
-<td align="center">I/O/GCK2</td>
-<td align="center">GCK</td>
-</tr>
-<tr>
-<td width="60%">CLK_IOB</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC8</td>
-<td align="center">27</td>
-<td align="center">I/O/GCK3</td>
-<td align="center">GCK/I</td>
-</tr>
-<tr>
-<td width="60%">E_IOB</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC17</td>
-<td align="center">49</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">nAS_FSB</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC5</td>
-<td align="center">13</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">nBERR_IOB</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC12</td>
-<td align="center">18</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">nDTACK_IOB</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC8</td>
-<td align="center">54</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">nLDS_FSB</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC6</td>
-<td align="center">25</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">nRES</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC2</td>
-<td align="center">99</td>
-<td align="center">I/O/GSR</td>
-<td align="center">GSR/I</td>
-</tr>
-<tr>
-<td width="60%">nUDS_FSB</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC5</td>
-<td align="center">52</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">nVPA_IOB</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC14</td>
-<td align="center">59</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">nWE_FSB</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC17</td>
-<td align="center">61</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-</table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
-<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
-<td align="right">
-<input type="button" onclick="javascript:showLegend('logiclegend.htm')" onmouseover="window.status='show Legend'; return true;" onmouseout="window.status=''" value="legend"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page">
-</td>
-</tr></table></span></form>
-</body>
-</html>
diff --git a/cpld/XC95144XL/MXSE_html/fit/mapinput_00.htm b/cpld/XC95144XL/MXSE_html/fit/mapinput_00.htm
index 6b46dde..964448d 100644
--- a/cpld/XC95144XL/MXSE_html/fit/mapinput_00.htm
+++ b/cpld/XC95144XL/MXSE_html/fit/mapinput_00.htm
@@ -231,6 +231,22 @@
 <td align="center">I</td>
 </tr>
 <tr>
+<td width="60%">SW&lt;0&gt;</td>
+<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
+<td align="center">MC17</td>
+<td align="center">61</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+</tr>
+<tr>
+<td width="60%">SW&lt;1&gt;</td>
+<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
+<td align="center">MC15</td>
+<td align="center">60</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+</tr>
+<tr>
 <td width="60%">nAS_FSB</td>
 <td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
 <td align="center">MC14</td>
@@ -247,6 +263,14 @@
 <td align="center">I</td>
 </tr>
 <tr>
+<td width="60%">nBG_IOB</td>
+<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
+<td align="center">MC17</td>
+<td align="center">73</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+</tr>
+<tr>
 <td width="60%">nDTACK_IOB</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC8</td>
@@ -255,6 +279,14 @@
 <td align="center">I</td>
 </tr>
 <tr>
+<td width="60%">nIPL2</td>
+<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center">MC9</td>
+<td align="center">92</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+</tr>
+<tr>
 <td width="60%">nLDS_FSB</td>
 <td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
 <td align="center">MC12</td>
diff --git a/cpld/XC95144XL/MXSE_html/fit/mapinput_01 2.htm b/cpld/XC95144XL/MXSE_html/fit/mapinput_01 2.htm
deleted file mode 100644
index 01c4e3a..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/mapinput_01 2.htm	
+++ /dev/null
@@ -1,304 +0,0 @@
-<html>
-<head>
-<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
-<script src="maplogic.js"></script><link rel="stylesheet" type="text/css" href="style.css">
-</head>
-<body class="pgBgnd" id="XC95144XL">
-<span id="mapin" class="pgRef"><h3 align="center">Inputs</h3>
-<table width="90%" border="1" cellpadding="0" cellspacing="0">
-<tr class="pgHeader">
-<th width="60%"><a href="javascript:Sort(10);">Signal Name</a></th>
-<th><a href="javascript:Sort(11);">Function Block</a></th>
-<th align="center">Macrocell</th>
-<th><a href="javascript:Sort(12);">Pin Number</a></th>
-<th align="center">Pin Type</th>
-<th align="center">Pin Use</th>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;9&gt;</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC3</td>
-<td align="center">12</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">nAS_FSB</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC5</td>
-<td align="center">13</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;5&gt;</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC8</td>
-<td align="center">15</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;2&gt;</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC9</td>
-<td align="center">16</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">nBERR_IOB</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC12</td>
-<td align="center">18</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;6&gt;</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC14</td>
-<td align="center">19</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;7&gt;</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC15</td>
-<td align="center">20</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">CLK2X_IOB</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC17</td>
-<td align="center">22</td>
-<td align="center">I/O/GCK1</td>
-<td align="center">GCK</td>
-</tr>
-<tr>
-<td width="60%">nRES</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC2</td>
-<td align="center">99</td>
-<td align="center">I/O/GSR</td>
-<td align="center">GSR/I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;22&gt;</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC15</td>
-<td align="center">9</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">CLK_FSB</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC2</td>
-<td align="center">23</td>
-<td align="center">I/O/GCK2</td>
-<td align="center">GCK</td>
-</tr>
-<tr>
-<td width="60%">nLDS_FSB</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC6</td>
-<td align="center">25</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">CLK_IOB</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC8</td>
-<td align="center">27</td>
-<td align="center">I/O/GCK3</td>
-<td align="center">GCK/I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;10&gt;</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC5</td>
-<td align="center">89</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;1&gt;</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC6</td>
-<td align="center">90</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;12&gt;</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC9</td>
-<td align="center">92</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;14&gt;</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC11</td>
-<td align="center">93</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;16&gt;</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC14</td>
-<td align="center">95</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;17&gt;</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC15</td>
-<td align="center">96</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">E_IOB</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC17</td>
-<td align="center">49</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;18&gt;</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC5</td>
-<td align="center">76</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;3&gt;</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC8</td>
-<td align="center">78</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;15&gt;</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC11</td>
-<td align="center">80</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;13&gt;</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC14</td>
-<td align="center">82</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;11&gt;</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC17</td>
-<td align="center">86</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">nUDS_FSB</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC5</td>
-<td align="center">52</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">nDTACK_IOB</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC8</td>
-<td align="center">54</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;4&gt;</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC11</td>
-<td align="center">56</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">nVPA_IOB</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC14</td>
-<td align="center">59</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">nWE_FSB</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC17</td>
-<td align="center">61</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;8&gt;</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC5</td>
-<td align="center">64</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;23&gt;</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC8</td>
-<td align="center">66</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;21&gt;</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC11</td>
-<td align="center">68</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;20&gt;</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC14</td>
-<td align="center">71</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;19&gt;</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC17</td>
-<td align="center">73</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-</table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
-<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
-<td align="right">
-<input type="button" onclick="javascript:showLegend('logiclegend.htm')" onmouseover="window.status='show Legend'; return true;" onmouseout="window.status=''" value="legend"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page">
-</td>
-</tr></table></span></form>
-</body>
-</html>
diff --git a/cpld/XC95144XL/MXSE_html/fit/mapinput_01.htm b/cpld/XC95144XL/MXSE_html/fit/mapinput_01.htm
index 730a99f..b2503fc 100644
--- a/cpld/XC95144XL/MXSE_html/fit/mapinput_01.htm
+++ b/cpld/XC95144XL/MXSE_html/fit/mapinput_01.htm
@@ -239,6 +239,14 @@
 <td align="center">I</td>
 </tr>
 <tr>
+<td width="60%">nIPL2</td>
+<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center">MC9</td>
+<td align="center">92</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+</tr>
+<tr>
 <td width="60%">A_FSB&lt;1&gt;</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC12</td>
@@ -294,6 +302,30 @@
 <td align="center">I/O</td>
 <td align="center">I</td>
 </tr>
+<tr>
+<td width="60%">SW&lt;1&gt;</td>
+<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
+<td align="center">MC15</td>
+<td align="center">60</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+</tr>
+<tr>
+<td width="60%">SW&lt;0&gt;</td>
+<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
+<td align="center">MC17</td>
+<td align="center">61</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+</tr>
+<tr>
+<td width="60%">nBG_IOB</td>
+<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
+<td align="center">MC17</td>
+<td align="center">73</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+</tr>
 </table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
 <td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
 <td align="right">
diff --git a/cpld/XC95144XL/MXSE_html/fit/mapinput_02 2.htm b/cpld/XC95144XL/MXSE_html/fit/mapinput_02 2.htm
deleted file mode 100644
index ddd0d2f..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/mapinput_02 2.htm	
+++ /dev/null
@@ -1,304 +0,0 @@
-<html>
-<head>
-<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
-<script src="maplogic.js"></script><link rel="stylesheet" type="text/css" href="style.css">
-</head>
-<body class="pgBgnd" id="XC95144XL">
-<span id="mapin" class="pgRef"><h3 align="center">Inputs</h3>
-<table width="90%" border="1" cellpadding="0" cellspacing="0">
-<tr class="pgHeader">
-<th width="60%"><a href="javascript:Sort(10);">Signal Name</a></th>
-<th><a href="javascript:Sort(11);">Function Block</a></th>
-<th align="center">Macrocell</th>
-<th><a href="javascript:Sort(12);">Pin Number</a></th>
-<th align="center">Pin Type</th>
-<th align="center">Pin Use</th>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;22&gt;</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC15</td>
-<td align="center">9</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;9&gt;</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC3</td>
-<td align="center">12</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">nAS_FSB</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC5</td>
-<td align="center">13</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;5&gt;</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC8</td>
-<td align="center">15</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;2&gt;</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC9</td>
-<td align="center">16</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">nBERR_IOB</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC12</td>
-<td align="center">18</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;6&gt;</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC14</td>
-<td align="center">19</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;7&gt;</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC15</td>
-<td align="center">20</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">CLK2X_IOB</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC17</td>
-<td align="center">22</td>
-<td align="center">I/O/GCK1</td>
-<td align="center">GCK</td>
-</tr>
-<tr>
-<td width="60%">CLK_FSB</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC2</td>
-<td align="center">23</td>
-<td align="center">I/O/GCK2</td>
-<td align="center">GCK</td>
-</tr>
-<tr>
-<td width="60%">nLDS_FSB</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC6</td>
-<td align="center">25</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">CLK_IOB</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC8</td>
-<td align="center">27</td>
-<td align="center">I/O/GCK3</td>
-<td align="center">GCK/I</td>
-</tr>
-<tr>
-<td width="60%">E_IOB</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC17</td>
-<td align="center">49</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">nUDS_FSB</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC5</td>
-<td align="center">52</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">nDTACK_IOB</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC8</td>
-<td align="center">54</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;4&gt;</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC11</td>
-<td align="center">56</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">nVPA_IOB</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC14</td>
-<td align="center">59</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">nWE_FSB</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC17</td>
-<td align="center">61</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;8&gt;</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC5</td>
-<td align="center">64</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;23&gt;</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC8</td>
-<td align="center">66</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;21&gt;</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC11</td>
-<td align="center">68</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;20&gt;</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC14</td>
-<td align="center">71</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;19&gt;</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC17</td>
-<td align="center">73</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;18&gt;</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC5</td>
-<td align="center">76</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;3&gt;</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC8</td>
-<td align="center">78</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;15&gt;</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC11</td>
-<td align="center">80</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;13&gt;</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC14</td>
-<td align="center">82</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;11&gt;</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC17</td>
-<td align="center">86</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;10&gt;</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC5</td>
-<td align="center">89</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;1&gt;</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC6</td>
-<td align="center">90</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;12&gt;</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC9</td>
-<td align="center">92</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;14&gt;</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC11</td>
-<td align="center">93</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;16&gt;</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC14</td>
-<td align="center">95</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">A_FSB&lt;17&gt;</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC15</td>
-<td align="center">96</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-</tr>
-<tr>
-<td width="60%">nRES</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC2</td>
-<td align="center">99</td>
-<td align="center">I/O/GSR</td>
-<td align="center">GSR/I</td>
-</tr>
-</table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
-<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
-<td align="right">
-<input type="button" onclick="javascript:showLegend('logiclegend.htm')" onmouseover="window.status='show Legend'; return true;" onmouseout="window.status=''" value="legend"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page">
-</td>
-</tr></table></span></form>
-</body>
-</html>
diff --git a/cpld/XC95144XL/MXSE_html/fit/mapinput_02.htm b/cpld/XC95144XL/MXSE_html/fit/mapinput_02.htm
index 6a7837d..949f3f2 100644
--- a/cpld/XC95144XL/MXSE_html/fit/mapinput_02.htm
+++ b/cpld/XC95144XL/MXSE_html/fit/mapinput_02.htm
@@ -231,6 +231,30 @@
 <td align="center">I</td>
 </tr>
 <tr>
+<td width="60%">SW&lt;1&gt;</td>
+<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
+<td align="center">MC15</td>
+<td align="center">60</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+</tr>
+<tr>
+<td width="60%">SW&lt;0&gt;</td>
+<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
+<td align="center">MC17</td>
+<td align="center">61</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+</tr>
+<tr>
+<td width="60%">nBG_IOB</td>
+<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
+<td align="center">MC17</td>
+<td align="center">73</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+</tr>
+<tr>
 <td width="60%">nBERR_IOB</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC5</td>
@@ -263,6 +287,14 @@
 <td align="center">I</td>
 </tr>
 <tr>
+<td width="60%">nIPL2</td>
+<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center">MC9</td>
+<td align="center">92</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+</tr>
+<tr>
 <td width="60%">A_FSB&lt;1&gt;</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC12</td>
diff --git a/cpld/XC95144XL/MXSE_html/fit/maplogic_00 2.htm b/cpld/XC95144XL/MXSE_html/fit/maplogic_00 2.htm
deleted file mode 100644
index 539a58a..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/maplogic_00 2.htm	
+++ /dev/null
@@ -1,1459 +0,0 @@
-<html>
-<head>
-<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
-<script src="maplogic.js"></script><link rel="stylesheet" type="text/css" href="style.css">
-</head>
-<body class="pgBgnd" id="XC95144XL">
-<span id="maplog" class="pgRef"><h3 align="center">Logic</h3>
-<table width="90%" border="1" cellpadding="0" cellspacing="0">
-<tr class="pgHeader">
-<th width="28%"><a href="javascript:Sort(0);">Signal Name</a></th>
-<th align="center">Total Pterms</th>
-<th align="center">Total Inputs</th>
-<th><a href="javascript:Sort(1);">Function Block</a></th>
-<th align="center">Macrocell</th>
-<th align="center">Power Mode</th>
-<th align="center">Slew Rate</th>
-<th><a href="javascript:Sort(2);">Pin Number</a></th>
-<th align="center">Pin Type</th>
-<th align="center">Pin Use</th>
-<th align="center">Reg Init State</th>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ALE0M')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ALE0M</a></td>
-<td align="center">2</td>
-<td align="center">7</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC13</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ALE0S')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ALE0S</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC8</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">27</td>
-<td align="center">I/O/GCK3</td>
-<td align="center">GCK/I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('BERR_IOBS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">BERR_IOBS</a></td>
-<td align="center">4</td>
-<td align="center">8</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC15</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">46</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('IOACT')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOACT</a></td>
-<td align="center">10</td>
-<td align="center">15</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC1</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('IOBERR')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOBERR</a></td>
-<td align="center">8</td>
-<td align="center">11</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC18</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('IOL0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOL0</a></td>
-<td align="center">3</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC16</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('IOREQ')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOREQ</a></td>
-<td align="center">14</td>
-<td align="center">19</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC13</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('IORW0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IORW0</a></td>
-<td align="center">18</td>
-<td align="center">20</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC3</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('IOU0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOU0</a></td>
-<td align="center">3</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC14</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">82</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('OpTxFX_DC602_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$FX_DC$602</a></td>
-<td align="center">2</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC17</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">22</td>
-<td align="center">I/O/GCK1</td>
-<td align="center">GCK</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('OpTxFX_DC606_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$FX_DC$606</a></td>
-<td align="center">5</td>
-<td align="center">12</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC4</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;0&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC2</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">87</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA10_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;10&gt;</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC6</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">65</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA11_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;11&gt;</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC2</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">63</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;1&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC2</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">35</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;2&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC8</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">91</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;3&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC8</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">39</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;4&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC12</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">94</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;5&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC2</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">50</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;6&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC6</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">53</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;7&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC9</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">55</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA8_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;8&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC12</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">58</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA9_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;9&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC15</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">60</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RefAck')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RefAck</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC5</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">76</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('TimeoutA')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutA</a></td>
-<td align="center">3</td>
-<td align="center">10</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC16</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('TimeoutB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutB</a></td>
-<td align="center">3</td>
-<td align="center">12</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC15</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">9</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;0&gt;</a></td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC10</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;1&gt;</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC8</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">3</td>
-<td align="center">I/O/GTS1</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;2&gt;</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC7</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;3&gt;</a></td>
-<td align="center">1</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC6</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">2</td>
-<td align="center">I/O/GTS4</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;4&gt;</a></td>
-<td align="center">1</td>
-<td align="center">4</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC3</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;5&gt;</a></td>
-<td align="center">1</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC1</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;6&gt;</a></td>
-<td align="center">1</td>
-<td align="center">6</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC16</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;7&gt;</a></td>
-<td align="center">1</td>
-<td align="center">7</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC14</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">59</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefDone_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefDone</a></td>
-<td align="center">2</td>
-<td align="center">10</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC10</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntTimeoutBPre_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/TimeoutBPre</a></td>
-<td align="center">3</td>
-<td align="center">11</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC13</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('csnOverlay0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay0</a></td>
-<td align="center">2</td>
-<td align="center">7</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC4</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('csnOverlay1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay1</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC3</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC7</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbBERR0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR0r</a></td>
-<td align="center">3</td>
-<td align="center">8</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC16</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbBERR1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR1r</a></td>
-<td align="center">2</td>
-<td align="center">4</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC9</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">4</td>
-<td align="center">I/O/GTS2</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbReady0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready0r</a></td>
-<td align="center">3</td>
-<td align="center">8</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC7</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbReady1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready1r</a></td>
-<td align="center">7</td>
-<td align="center">17</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC7</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbReady2r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready2r</a></td>
-<td align="center">9</td>
-<td align="center">22</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC12</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">18</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbVPA_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA</a></td>
-<td align="center">22</td>
-<td align="center">30</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC15</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">20</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbVPA__or00001fsbVPA__or00001_D2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA__or00001/fsb/VPA__or00001_D2</a></td>
-<td align="center">8</td>
-<td align="center">20</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC10</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmBERRrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrf</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC9</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">40</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmBERRrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrr</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC7</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmDTACKrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrf</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC4</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmDTACKrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrr</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC3</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmES0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;0&gt;</a></td>
-<td align="center">3</td>
-<td align="center">7</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC13</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmES1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;1&gt;</a></td>
-<td align="center">3</td>
-<td align="center">4</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC11</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">80</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmES2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;2&gt;</a></td>
-<td align="center">5</td>
-<td align="center">7</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC18</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmES3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;3&gt;</a></td>
-<td align="center">3</td>
-<td align="center">6</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC10</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmES4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;4&gt;</a></td>
-<td align="center">4</td>
-<td align="center">7</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC17</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">86</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmETACK_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ETACK</a></td>
-<td align="center">1</td>
-<td align="center">6</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC14</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">32</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmEr2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er2</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC1</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmEr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC18</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOREQr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOREQr</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC5</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">1</td>
-<td align="center">I/O/GTS3</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd1</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC17</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">73</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd2</a></td>
-<td align="center">4</td>
-<td align="center">9</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC14</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">43</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd3</a></td>
-<td align="center">5</td>
-<td align="center">10</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC16</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd4</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC6</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">37</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd5</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC5</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">36</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd6</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC4</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd7</a></td>
-<td align="center">1</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC3</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd8_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd8</a></td>
-<td align="center">2</td>
-<td align="center">4</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC11</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">41</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">SET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmRESrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrf</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC4</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmRESrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrr</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC3</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmVPArf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArf</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC2</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">99</td>
-<td align="center">I/O/GSR</td>
-<td align="center">GSR/I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmVPArr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArr</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC1</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsClear1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Clear1</a></td>
-<td align="center">1</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC6</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">25</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOACTr</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC4</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOL1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOL1</a></td>
-<td align="center">2</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC8</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">78</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsIORW1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IORW1</a></td>
-<td align="center">16</td>
-<td align="center">19</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC17</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">34</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOReady</a></td>
-<td align="center">4</td>
-<td align="center">8</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC18</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOU1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU1</a></td>
-<td align="center">2</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC7</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsLoad1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Load1</a></td>
-<td align="center">14</td>
-<td align="center">18</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC6</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">90</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></td>
-<td align="center">17</td>
-<td align="center">18</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC10</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC12</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">30</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></td>
-<td align="center">14</td>
-<td align="center">19</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC9</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">28</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nADoutLE0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nADoutLE0</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC9</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">67</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nADoutLE1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nADoutLE1</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC11</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">29</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center">SET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nAS_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nAS_IOB</a></td>
-<td align="center">1</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC17</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">10</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nAoutOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nAoutOE</a></td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC12</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">70</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nBERR_FSB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nBERR_FSB</a></td>
-<td align="center">3</td>
-<td align="center">9</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC6</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">14</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nCAS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nCAS</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC2</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">74</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nDTACK_FSB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDTACK_FSB</a></td>
-<td align="center">23</td>
-<td align="center">32</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC2</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">11</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nDinLE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDinLE</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC15</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">72</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nDinOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDinOE</a></td>
-<td align="center">2</td>
-<td align="center">6</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC17</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">97</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nDoutOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDoutOE</a></td>
-<td align="center">2</td>
-<td align="center">7</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC14</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">8</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nLDS_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nLDS_IOB</a></td>
-<td align="center">3</td>
-<td align="center">7</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC11</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">6</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nOE</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC11</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">17</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nRAMLWE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nRAMLWE</a></td>
-<td align="center">1</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC6</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">77</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nRAMUWE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nRAMUWE</a></td>
-<td align="center">1</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC9</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">79</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nRAS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nRAS</a></td>
-<td align="center">3</td>
-<td align="center">8</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC5</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">24</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nROMCS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nROMCS</a></td>
-<td align="center">2</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC12</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">42</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nROMWE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nROMWE</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC12</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">81</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nUDS_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nUDS_IOB</a></td>
-<td align="center">3</td>
-<td align="center">7</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC12</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">7</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nVMA_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nVMA_IOB</a></td>
-<td align="center">2</td>
-<td align="center">9</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC15</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">33</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nVPA_FSB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nVPA_FSB</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC15</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">85</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramBACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/BACTr</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC18</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/Once</a></td>
-<td align="center">5</td>
-<td align="center">10</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC10</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRAMDIS1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS1</a></td>
-<td align="center">18</td>
-<td align="center">15</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC14</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">95</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRAMDIS2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS2</a></td>
-<td align="center">7</td>
-<td align="center">15</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC11</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">56</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRAMReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMReady</a></td>
-<td align="center">16</td>
-<td align="center">15</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC17</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">61</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRASEL_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RASEL</a></td>
-<td align="center">20</td>
-<td align="center">15</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC1</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd1</a></td>
-<td align="center">5</td>
-<td align="center">10</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC8</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">54</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd2</a></td>
-<td align="center">13</td>
-<td align="center">14</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC13</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd3</a></td>
-<td align="center">11</td>
-<td align="center">14</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC5</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">52</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-</table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
-<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
-<td align="right">
-<input type="button" onclick="javascript:showLegend('logiclegend.htm')" onmouseover="window.status='show Legend'; return true;" onmouseout="window.status=''" value="legend"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page">
-</td>
-</tr></table></span></form>
-</body>
-</html>
diff --git a/cpld/XC95144XL/MXSE_html/fit/maplogic_00.htm b/cpld/XC95144XL/MXSE_html/fit/maplogic_00.htm
index 9013dae..46ccfc2 100644
--- a/cpld/XC95144XL/MXSE_html/fit/maplogic_00.htm
+++ b/cpld/XC95144XL/MXSE_html/fit/maplogic_00.htm
@@ -21,10 +21,10 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('ALE0M')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ALE0M</a></td>
-<td align="center">2</td>
+<td align="center">3</td>
 <td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC3</td>
+<td align="center">MC7</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -36,8 +36,8 @@
 <td width="28%"><a href="javascript:showEqn('ALE0S')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ALE0S</a></td>
 <td align="center">1</td>
 <td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC4</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC13</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -49,8 +49,8 @@
 <td width="28%"><a href="javascript:showEqn('BERR_IOBS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">BERR_IOBS</a></td>
 <td align="center">4</td>
 <td align="center">8</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC16</td>
+<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center">MC18</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -59,8 +59,34 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
+<td width="28%"><a href="javascript:showEqn('CLK20EN')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">CLK20EN</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
+<td align="center">MC14</td>
+<td align="center">STD</td>
+<td align="center">FAST</td>
+<td align="center">59</td>
+<td align="center">I/O</td>
+<td align="center">O</td>
+<td align="center"> </td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('CLK25EN')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">CLK25EN</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
+<td align="center">MC12</td>
+<td align="center">STD</td>
+<td align="center">FAST</td>
+<td align="center">58</td>
+<td align="center">I/O</td>
+<td align="center">O</td>
+<td align="center"> </td>
+</tr>
+<tr>
 <td width="28%"><a href="javascript:showEqn('IOACT')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOACT</a></td>
-<td align="center">6</td>
+<td align="center">7</td>
 <td align="center">13</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC16</td>
@@ -74,7 +100,7 @@
 <tr>
 <td width="28%"><a href="javascript:showEqn('IOBERR')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOBERR</a></td>
 <td align="center">9</td>
-<td align="center">14</td>
+<td align="center">13</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC18</td>
 <td align="center">STD</td>
@@ -89,20 +115,7 @@
 <td align="center">3</td>
 <td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC17</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">97</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('IOREQ')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOREQ</a></td>
-<td align="center">14</td>
-<td align="center">19</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC13</td>
+<td align="center">MC16</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -111,10 +124,23 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
+<td width="28%"><a href="javascript:showEqn('IOREQ')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOREQ</a></td>
+<td align="center">15</td>
+<td align="center">20</td>
+<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
+<td align="center">MC9</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">67</td>
+<td align="center">I/O</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
 <td width="28%"><a href="javascript:showEqn('IORW0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IORW0</a></td>
-<td align="center">18</td>
-<td align="center">20</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
+<td align="center">19</td>
+<td align="center">21</td>
+<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
 <td align="center">MC18</td>
 <td align="center">STD</td>
 <td align="center"> </td>
@@ -127,8 +153,8 @@
 <td width="28%"><a href="javascript:showEqn('IOU0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOU0</a></td>
 <td align="center">3</td>
 <td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC16</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC18</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -137,29 +163,55 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('OpTxFX_DC609_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$FX_DC$609</a></td>
+<td width="28%"><a href="javascript:showEqn('IPL2r0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IPL2r0</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC12</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">18</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('IPL2r1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IPL2r1</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC11</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">17</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('OpTxFX_DC708_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$FX_DC$708</a></td>
 <td align="center">1</td>
 <td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC18</td>
+<td align="center">MC14</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
+<td align="center">19</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('OpTxFX_DC610_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$FX_DC$610</a></td>
-<td align="center">2</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC15</td>
+<td width="28%"><a href="javascript:showEqn('OpTxOpTxFX_DC182_INV783_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$$OpTx$FX_DC$182_INV$783</a></td>
+<td align="center">6</td>
+<td align="center">8</td>
+<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
+<td align="center">MC10</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">96</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
 <td align="center"> </td>
 </tr>
 <tr>
@@ -319,89 +371,11 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('RefAck')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RefAck</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC17</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">22</td>
-<td align="center">I/O/GCK1</td>
-<td align="center">GCK</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('TimeoutA')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutA</a></td>
-<td align="center">3</td>
-<td align="center">10</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC12</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">58</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('TimeoutB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutB</a></td>
-<td align="center">3</td>
-<td align="center">12</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC1</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;0&gt;</a></td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC16</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;1&gt;</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC15</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">20</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;2&gt;</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC14</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">19</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;3&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('RESDone')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RESDone</a></td>
 <td align="center">1</td>
 <td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC13</td>
+<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
+<td align="center">MC7</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -410,35 +384,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;4&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('RESr0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RESr0</a></td>
 <td align="center">1</td>
-<td align="center">4</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC12</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">18</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;5&gt;</a></td>
 <td align="center">1</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC11</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">17</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;6&gt;</a></td>
-<td align="center">1</td>
-<td align="center">6</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC10</td>
 <td align="center">STD</td>
@@ -449,9 +397,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;7&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('RESr1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RESr1</a></td>
+<td align="center">1</td>
 <td align="center">1</td>
-<td align="center">7</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC9</td>
 <td align="center">STD</td>
@@ -462,59 +410,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntRefDone_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefDone</a></td>
-<td align="center">2</td>
-<td align="center">10</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC3</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntTimeoutBPre_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/TimeoutBPre</a></td>
-<td align="center">3</td>
-<td align="center">11</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC10</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('csnOverlay0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay0</a></td>
-<td align="center">3</td>
-<td align="center">8</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC7</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('csnOverlay1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay1</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC14</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">95</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></td>
+<td width="28%"><a href="javascript:showEqn('RESr2')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RESr2</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
@@ -527,11 +423,219 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
+<td width="28%"><a href="javascript:showEqn('RefAck')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RefAck</a></td>
+<td align="center">1</td>
+<td align="center">2</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC7</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('TimeoutA')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutA</a></td>
+<td align="center">3</td>
+<td align="center">10</td>
+<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center">MC15</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">96</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('TimeoutB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutB</a></td>
+<td align="center">3</td>
+<td align="center">12</td>
+<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
+<td align="center">MC3</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('cntRefCnt0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;0&gt;</a></td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC18</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('cntRefCnt1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;1&gt;</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC6</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">14</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('cntRefCnt2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;2&gt;</a></td>
+<td align="center">1</td>
+<td align="center">2</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC5</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">13</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('cntRefCnt3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;3&gt;</a></td>
+<td align="center">1</td>
+<td align="center">3</td>
+<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center">MC7</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('cntRefCnt4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;4&gt;</a></td>
+<td align="center">1</td>
+<td align="center">4</td>
+<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center">MC4</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('cntRefCnt5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;5&gt;</a></td>
+<td align="center">1</td>
+<td align="center">5</td>
+<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center">MC3</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('cntRefCnt6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;6&gt;</a></td>
+<td align="center">1</td>
+<td align="center">6</td>
+<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center">MC1</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('cntRefCnt7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;7&gt;</a></td>
+<td align="center">1</td>
+<td align="center">7</td>
+<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
+<td align="center">MC3</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('cntRefDone_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefDone</a></td>
+<td align="center">2</td>
+<td align="center">10</td>
+<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center">MC12</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">94</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('cntTimeoutBPre_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/TimeoutBPre</a></td>
+<td align="center">3</td>
+<td align="center">11</td>
+<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center">MC14</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">95</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('csnOverlay0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay0</a></td>
+<td align="center">3</td>
+<td align="center">8</td>
+<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center">MC13</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('csnOverlay1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay1</a></td>
+<td align="center">2</td>
+<td align="center">3</td>
+<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center">MC10</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC4</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
 <td width="28%"><a href="javascript:showEqn('fsbBERR0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR0r</a></td>
 <td align="center">3</td>
 <td align="center">8</td>
 <td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC3</td>
+<td align="center">MC16</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -544,12 +648,12 @@
 <td align="center">2</td>
 <td align="center">4</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC13</td>
+<td align="center">MC9</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
+<td align="center">92</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
@@ -567,8 +671,21 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('fsbReady1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready1r</a></td>
-<td align="center">7</td>
-<td align="center">17</td>
+<td align="center">8</td>
+<td align="center">18</td>
+<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
+<td align="center">MC1</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('fsbReady2r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready2r</a></td>
+<td align="center">9</td>
+<td align="center">22</td>
 <td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
 <td align="center">MC5</td>
 <td align="center">STD</td>
@@ -579,9 +696,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('fsbReady2r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready2r</a></td>
-<td align="center">9</td>
+<td width="28%"><a href="javascript:showEqn('fsbVPA_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA</a></td>
 <td align="center">22</td>
+<td align="center">31</td>
 <td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
 <td align="center">MC15</td>
 <td align="center">STD</td>
@@ -592,40 +709,53 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('fsbVPA_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA</a></td>
-<td align="center">25</td>
-<td align="center">31</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC2</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">23</td>
-<td align="center">I/O/GCK2</td>
-<td align="center">GCK/I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
 <td width="28%"><a href="javascript:showEqn('iobmBERRrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrf</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC7</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC17</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
+<td align="center">10</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('iobmBERRrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrr</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC6</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC16</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">14</td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmBGr0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BGr0</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC15</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">9</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmBGr1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BGr1</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC14</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">8</td>
 <td align="center">I/O</td>
 <td align="center">I</td>
 <td align="center">RESET</td>
@@ -634,26 +764,26 @@
 <td width="28%"><a href="javascript:showEqn('iobmDTACKrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrf</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC5</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC13</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">13</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('iobmDTACKrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrr</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC4</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC12</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
+<td align="center">7</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
@@ -738,6 +868,84 @@
 <td width="28%"><a href="javascript:showEqn('iobmEr2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er2</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC10</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmEr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC11</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">6</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmIOREQr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOREQr</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC9</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">4</td>
+<td align="center">I/O/GTS2</td>
+<td align="center">I</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd1</a></td>
+<td align="center">2</td>
+<td align="center">3</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC17</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">22</td>
+<td align="center">I/O/GCK1</td>
+<td align="center">GCK</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd2</a></td>
+<td align="center">5</td>
+<td align="center">11</td>
+<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
+<td align="center">MC10</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd3</a></td>
+<td align="center">3</td>
+<td align="center">6</td>
+<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
+<td align="center">MC3</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmRESrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrf</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC3</td>
 <td align="center">STD</td>
@@ -748,20 +956,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmEr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC18</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOREQr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOREQr</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmRESrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrr</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
@@ -774,49 +969,23 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd1</a></td>
-<td align="center">2</td>
-<td align="center">4</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC12</td>
+<td width="28%"><a href="javascript:showEqn('iobmVPArf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArf</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC8</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">94</td>
-<td align="center">I/O</td>
+<td align="center">3</td>
+<td align="center">I/O/GTS1</td>
 <td align="center">I</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd2</a></td>
-<td align="center">2</td>
-<td align="center">4</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC10</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd3</a></td>
-<td align="center">5</td>
-<td align="center">10</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC10</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd4</a></td>
-<td align="center">4</td>
-<td align="center">6</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmVPArr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArr</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
 <td align="center">MC7</td>
 <td align="center">STD</td>
 <td align="center"> </td>
@@ -826,63 +995,11 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmRESrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrf</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC17</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">10</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmRESrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrr</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC16</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmVPArf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArf</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC15</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">9</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmVPArr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArr</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC14</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">8</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
 <td width="28%"><a href="javascript:showEqn('iobsClear1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Clear1</a></td>
 <td align="center">1</td>
 <td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC3</td>
+<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
+<td align="center">MC18</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -894,34 +1011,34 @@
 <td width="28%"><a href="javascript:showEqn('iobsIOACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOACTr</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC1</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC6</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
+<td align="center">2</td>
+<td align="center">I/O/GTS4</td>
+<td align="center">I</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('iobsIOL1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOL1</a></td>
 <td align="center">2</td>
 <td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC9</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC16</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">92</td>
-<td align="center">I/O</td>
+<td align="center"> </td>
+<td align="center">(b)</td>
 <td align="center">(b)</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('iobsIORW1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IORW1</a></td>
-<td align="center">16</td>
-<td align="center">19</td>
+<td align="center">17</td>
+<td align="center">20</td>
 <td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC13</td>
+<td align="center">MC3</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -934,7 +1051,33 @@
 <td align="center">4</td>
 <td align="center">8</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC18</td>
+<td align="center">MC17</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">97</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobsIOU1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU1</a></td>
+<td align="center">2</td>
+<td align="center">2</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC15</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">20</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobsLoad1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Load1</a></td>
+<td align="center">15</td>
+<td align="center">19</td>
+<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
+<td align="center">MC13</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -943,9 +1086,22 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOU1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU1</a></td>
-<td align="center">2</td>
+<td width="28%"><a href="javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></td>
+<td align="center">18</td>
+<td align="center">19</td>
+<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
+<td align="center">MC14</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">71</td>
+<td align="center">I/O</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></td>
 <td align="center">2</td>
+<td align="center">3</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC8</td>
 <td align="center">STD</td>
@@ -956,49 +1112,10 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsLoad1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Load1</a></td>
-<td align="center">14</td>
-<td align="center">18</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC9</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">67</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></td>
-<td align="center">17</td>
-<td align="center">18</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC8</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">39</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC7</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
 <td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></td>
-<td align="center">14</td>
-<td align="center">19</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
+<td align="center">15</td>
+<td align="center">20</td>
+<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
 <td align="center">MC4</td>
 <td align="center">STD</td>
 <td align="center"> </td>
@@ -1035,7 +1152,7 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('nAS_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nAS_IOB</a></td>
-<td align="center">2</td>
+<td align="center">3</td>
 <td align="center">4</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC12</td>
@@ -1048,8 +1165,8 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('nAoutOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nAoutOE</a></td>
-<td align="center">0</td>
-<td align="center">0</td>
+<td align="center">3</td>
+<td align="center">4</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC2</td>
 <td align="center">STD</td>
@@ -1057,7 +1174,7 @@
 <td align="center">87</td>
 <td align="center">I/O</td>
 <td align="center">O</td>
-<td align="center"> </td>
+<td align="center">SET</td>
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('nBERR_FSB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nBERR_FSB</a></td>
@@ -1073,6 +1190,19 @@
 <td align="center"> </td>
 </tr>
 <tr>
+<td width="28%"><a href="javascript:showEqn('nBR_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nBR_IOB</a></td>
+<td align="center">1</td>
+<td align="center">6</td>
+<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
+<td align="center">MC15</td>
+<td align="center">STD</td>
+<td align="center">FAST</td>
+<td align="center">72</td>
+<td align="center">I/O</td>
+<td align="center">O</td>
+<td align="center">SET</td>
+</tr>
+<tr>
 <td width="28%"><a href="javascript:showEqn('nCAS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nCAS</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
@@ -1100,8 +1230,8 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('nDinLE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDinLE</a></td>
+<td align="center">1</td>
 <td align="center">2</td>
-<td align="center">3</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC17</td>
 <td align="center">STD</td>
@@ -1113,8 +1243,8 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('nDinOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDinOE</a></td>
-<td align="center">2</td>
-<td align="center">6</td>
+<td align="center">3</td>
+<td align="center">7</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC6</td>
 <td align="center">STD</td>
@@ -1127,7 +1257,7 @@
 <tr>
 <td width="28%"><a href="javascript:showEqn('nDoutOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDoutOE</a></td>
 <td align="center">2</td>
-<td align="center">4</td>
+<td align="center">3</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC5</td>
 <td align="center">STD</td>
@@ -1204,8 +1334,8 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('nROMCS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nROMCS</a></td>
-<td align="center">2</td>
-<td align="center">5</td>
+<td align="center">3</td>
+<td align="center">6</td>
 <td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
 <td align="center">MC2</td>
 <td align="center">STD</td>
@@ -1243,8 +1373,8 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('nVMA_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nVMA_IOB</a></td>
-<td align="center">2</td>
-<td align="center">9</td>
+<td align="center">3</td>
+<td align="center">10</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC2</td>
 <td align="center">STD</td>
@@ -1271,7 +1401,7 @@
 <td width="28%"><a href="javascript:showEqn('ramBACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/BACTr</a></td>
 <td align="center">1</td>
 <td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC1</td>
 <td align="center">STD</td>
 <td align="center"> </td>
@@ -1284,8 +1414,8 @@
 <td width="28%"><a href="javascript:showEqn('ramOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/Once</a></td>
 <td align="center">5</td>
 <td align="center">10</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC7</td>
+<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
+<td align="center">MC16</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -1297,11 +1427,11 @@
 <td width="28%"><a href="javascript:showEqn('ramRAMDIS1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS1</a></td>
 <td align="center">18</td>
 <td align="center">15</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC15</td>
+<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
+<td align="center">MC8</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">72</td>
+<td align="center">39</td>
 <td align="center">I/O</td>
 <td align="center">(b)</td>
 <td align="center">RESET</td>
@@ -1310,8 +1440,8 @@
 <td width="28%"><a href="javascript:showEqn('ramRAMDIS2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS2</a></td>
 <td align="center">7</td>
 <td align="center">15</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC13</td>
+<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
+<td align="center">MC4</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -1324,7 +1454,7 @@
 <td align="center">16</td>
 <td align="center">15</td>
 <td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC18</td>
+<td align="center">MC1</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -1336,7 +1466,7 @@
 <td width="28%"><a href="javascript:showEqn('ramRASEL_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RASEL</a></td>
 <td align="center">20</td>
 <td align="center">15</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
+<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
 <td align="center">MC1</td>
 <td align="center">STD</td>
 <td align="center"> </td>
@@ -1349,8 +1479,8 @@
 <td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd1</a></td>
 <td align="center">5</td>
 <td align="center">10</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC4</td>
+<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
+<td align="center">MC7</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -1363,12 +1493,12 @@
 <td align="center">13</td>
 <td align="center">14</td>
 <td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC16</td>
+<td align="center">MC17</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
+<td align="center">61</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
@@ -1376,11 +1506,11 @@
 <td align="center">11</td>
 <td align="center">14</td>
 <td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC14</td>
+<td align="center">MC13</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">59</td>
-<td align="center">I/O</td>
+<td align="center"> </td>
+<td align="center">(b)</td>
 <td align="center">(b)</td>
 <td align="center">RESET</td>
 </tr>
diff --git a/cpld/XC95144XL/MXSE_html/fit/maplogic_01 2.htm b/cpld/XC95144XL/MXSE_html/fit/maplogic_01 2.htm
deleted file mode 100644
index 0db044c..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/maplogic_01 2.htm	
+++ /dev/null
@@ -1,1459 +0,0 @@
-<html>
-<head>
-<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
-<script src="maplogic.js"></script><link rel="stylesheet" type="text/css" href="style.css">
-</head>
-<body class="pgBgnd" id="XC95144XL">
-<span id="maplog" class="pgRef"><h3 align="center">Logic</h3>
-<table width="90%" border="1" cellpadding="0" cellspacing="0">
-<tr class="pgHeader">
-<th width="28%"><a href="javascript:Sort(0);">Signal Name</a></th>
-<th align="center">Total Pterms</th>
-<th align="center">Total Inputs</th>
-<th><a href="javascript:Sort(1);">Function Block</a></th>
-<th align="center">Macrocell</th>
-<th align="center">Power Mode</th>
-<th align="center">Slew Rate</th>
-<th><a href="javascript:Sort(2);">Pin Number</a></th>
-<th align="center">Pin Type</th>
-<th align="center">Pin Use</th>
-<th align="center">Reg Init State</th>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nDTACK_FSB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDTACK_FSB</a></td>
-<td align="center">23</td>
-<td align="center">32</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC2</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">11</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('OpTxFX_DC606_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$FX_DC$606</a></td>
-<td align="center">5</td>
-<td align="center">12</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC4</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nBERR_FSB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nBERR_FSB</a></td>
-<td align="center">3</td>
-<td align="center">9</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC6</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">14</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbReady1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready1r</a></td>
-<td align="center">7</td>
-<td align="center">17</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC7</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbVPA__or00001fsbVPA__or00001_D2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA__or00001/fsb/VPA__or00001_D2</a></td>
-<td align="center">8</td>
-<td align="center">20</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC10</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nOE</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC11</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">17</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbReady2r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready2r</a></td>
-<td align="center">9</td>
-<td align="center">22</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC12</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">18</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbVPA_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA</a></td>
-<td align="center">22</td>
-<td align="center">30</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC15</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">20</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('OpTxFX_DC602_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$FX_DC$602</a></td>
-<td align="center">2</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC17</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">22</td>
-<td align="center">I/O/GCK1</td>
-<td align="center">GCK</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmVPArr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArr</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC1</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmVPArf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArf</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC2</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">99</td>
-<td align="center">I/O/GSR</td>
-<td align="center">GSR/I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmRESrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrr</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC3</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmRESrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrf</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC4</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOREQr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOREQr</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC5</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">1</td>
-<td align="center">I/O/GTS3</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;3&gt;</a></td>
-<td align="center">1</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC6</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">2</td>
-<td align="center">I/O/GTS4</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;2&gt;</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC7</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;1&gt;</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC8</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">3</td>
-<td align="center">I/O/GTS1</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbBERR1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR1r</a></td>
-<td align="center">2</td>
-<td align="center">4</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC9</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">4</td>
-<td align="center">I/O/GTS2</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefDone_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefDone</a></td>
-<td align="center">2</td>
-<td align="center">10</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC10</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nLDS_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nLDS_IOB</a></td>
-<td align="center">3</td>
-<td align="center">7</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC11</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">6</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nUDS_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nUDS_IOB</a></td>
-<td align="center">3</td>
-<td align="center">7</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC12</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">7</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntTimeoutBPre_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/TimeoutBPre</a></td>
-<td align="center">3</td>
-<td align="center">11</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC13</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nDoutOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDoutOE</a></td>
-<td align="center">2</td>
-<td align="center">7</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC14</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">8</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('TimeoutB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutB</a></td>
-<td align="center">3</td>
-<td align="center">12</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC15</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">9</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('TimeoutA')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutA</a></td>
-<td align="center">3</td>
-<td align="center">10</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC16</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nAS_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nAS_IOB</a></td>
-<td align="center">1</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC17</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">10</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOReady</a></td>
-<td align="center">4</td>
-<td align="center">8</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC18</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('IORW0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IORW0</a></td>
-<td align="center">18</td>
-<td align="center">20</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC3</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOACTr</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC4</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nRAS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nRAS</a></td>
-<td align="center">3</td>
-<td align="center">8</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC5</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">24</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsClear1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Clear1</a></td>
-<td align="center">1</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC6</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">25</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC7</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ALE0S')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ALE0S</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC8</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">27</td>
-<td align="center">I/O/GCK3</td>
-<td align="center">GCK/I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></td>
-<td align="center">14</td>
-<td align="center">19</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC9</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">28</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nADoutLE1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nADoutLE1</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC11</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">29</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center">SET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC12</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">30</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('IOREQ')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOREQ</a></td>
-<td align="center">14</td>
-<td align="center">19</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC13</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmETACK_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ETACK</a></td>
-<td align="center">1</td>
-<td align="center">6</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC14</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">32</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nVMA_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nVMA_IOB</a></td>
-<td align="center">2</td>
-<td align="center">9</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC15</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">33</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsIORW1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IORW1</a></td>
-<td align="center">16</td>
-<td align="center">19</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC17</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">34</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramBACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/BACTr</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC18</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRASEL_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RASEL</a></td>
-<td align="center">20</td>
-<td align="center">15</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC1</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;0&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC2</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">87</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('csnOverlay1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay1</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC3</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsLoad1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Load1</a></td>
-<td align="center">14</td>
-<td align="center">18</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC6</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">90</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;2&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC8</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">91</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></td>
-<td align="center">17</td>
-<td align="center">18</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC10</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;4&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC12</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">94</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRAMDIS1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS1</a></td>
-<td align="center">18</td>
-<td align="center">15</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC14</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">95</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbBERR0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR0r</a></td>
-<td align="center">3</td>
-<td align="center">8</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC16</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nDinOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDinOE</a></td>
-<td align="center">2</td>
-<td align="center">6</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC17</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">97</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('IOACT')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOACT</a></td>
-<td align="center">10</td>
-<td align="center">15</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC1</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;1&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC2</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">35</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd7</a></td>
-<td align="center">1</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC3</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd6</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC4</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd5</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC5</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">36</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd4</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC6</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">37</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmBERRrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrr</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC7</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;3&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC8</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">39</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmBERRrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrf</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC9</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">40</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;0&gt;</a></td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC10</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd8_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd8</a></td>
-<td align="center">2</td>
-<td align="center">4</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC11</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">41</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">SET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nROMCS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nROMCS</a></td>
-<td align="center">2</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC12</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">42</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ALE0M')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ALE0M</a></td>
-<td align="center">2</td>
-<td align="center">7</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC13</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd2</a></td>
-<td align="center">4</td>
-<td align="center">9</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC14</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">43</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('BERR_IOBS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">BERR_IOBS</a></td>
-<td align="center">4</td>
-<td align="center">8</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC15</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">46</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd3</a></td>
-<td align="center">5</td>
-<td align="center">10</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC16</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('IOBERR')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOBERR</a></td>
-<td align="center">8</td>
-<td align="center">11</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC18</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmEr2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er2</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC1</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nCAS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nCAS</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC2</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">74</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmDTACKrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrr</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC3</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmDTACKrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrf</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC4</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RefAck')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RefAck</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC5</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">76</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nRAMLWE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nRAMLWE</a></td>
-<td align="center">1</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC6</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">77</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOU1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU1</a></td>
-<td align="center">2</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC7</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOL1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOL1</a></td>
-<td align="center">2</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC8</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">78</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nRAMUWE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nRAMUWE</a></td>
-<td align="center">1</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC9</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">79</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmES3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;3&gt;</a></td>
-<td align="center">3</td>
-<td align="center">6</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC10</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmES1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;1&gt;</a></td>
-<td align="center">3</td>
-<td align="center">4</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC11</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">80</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nROMWE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nROMWE</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC12</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">81</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmES0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;0&gt;</a></td>
-<td align="center">3</td>
-<td align="center">7</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC13</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('IOU0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOU0</a></td>
-<td align="center">3</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC14</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">82</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nVPA_FSB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nVPA_FSB</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC15</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">85</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('IOL0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOL0</a></td>
-<td align="center">3</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC16</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmES4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;4&gt;</a></td>
-<td align="center">4</td>
-<td align="center">7</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC17</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">86</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmES2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;2&gt;</a></td>
-<td align="center">5</td>
-<td align="center">7</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC18</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;5&gt;</a></td>
-<td align="center">1</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC1</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;5&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC2</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">50</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;4&gt;</a></td>
-<td align="center">1</td>
-<td align="center">4</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC3</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('csnOverlay0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay0</a></td>
-<td align="center">2</td>
-<td align="center">7</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC4</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd3</a></td>
-<td align="center">11</td>
-<td align="center">14</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC5</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">52</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;6&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC6</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">53</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbReady0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready0r</a></td>
-<td align="center">3</td>
-<td align="center">8</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC7</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd1</a></td>
-<td align="center">5</td>
-<td align="center">10</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC8</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">54</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;7&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC9</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">55</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/Once</a></td>
-<td align="center">5</td>
-<td align="center">10</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC10</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRAMDIS2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS2</a></td>
-<td align="center">7</td>
-<td align="center">15</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC11</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">56</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA8_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;8&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC12</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">58</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd2</a></td>
-<td align="center">13</td>
-<td align="center">14</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC13</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;7&gt;</a></td>
-<td align="center">1</td>
-<td align="center">7</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC14</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">59</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA9_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;9&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC15</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">60</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;6&gt;</a></td>
-<td align="center">1</td>
-<td align="center">6</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC16</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRAMReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMReady</a></td>
-<td align="center">16</td>
-<td align="center">15</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC17</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">61</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA11_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;11&gt;</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC2</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">63</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA10_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;10&gt;</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC6</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">65</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nADoutLE0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nADoutLE0</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC9</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">67</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nAoutOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nAoutOE</a></td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC12</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">70</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nDinLE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDinLE</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC15</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">72</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd1</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC17</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">73</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmEr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC18</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-</table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
-<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
-<td align="right">
-<input type="button" onclick="javascript:showLegend('logiclegend.htm')" onmouseover="window.status='show Legend'; return true;" onmouseout="window.status=''" value="legend"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page">
-</td>
-</tr></table></span></form>
-</body>
-</html>
diff --git a/cpld/XC95144XL/MXSE_html/fit/maplogic_01.htm b/cpld/XC95144XL/MXSE_html/fit/maplogic_01.htm
index 7f50bea..c274b9b 100644
--- a/cpld/XC95144XL/MXSE_html/fit/maplogic_01.htm
+++ b/cpld/XC95144XL/MXSE_html/fit/maplogic_01.htm
@@ -20,9 +20,9 @@
 <th align="center">Reg Init State</th>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOACTr</a></td>
-<td align="center">1</td>
+<td width="28%"><a href="javascript:showEqn('ramBACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/BACTr</a></td>
 <td align="center">1</td>
+<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC1</td>
 <td align="center">STD</td>
@@ -33,7 +33,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOREQr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOREQr</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmRESrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrr</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
@@ -46,7 +46,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmEr2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er2</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmRESrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrf</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
@@ -59,7 +59,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmDTACKrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrr</a></td>
+<td width="28%"><a href="javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
@@ -72,9 +72,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmDTACKrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrf</a></td>
-<td align="center">1</td>
+<td width="28%"><a href="javascript:showEqn('cntRefCnt2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;2&gt;</a></td>
 <td align="center">1</td>
+<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC5</td>
 <td align="center">STD</td>
@@ -85,7 +85,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmBERRrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrr</a></td>
+<td width="28%"><a href="javascript:showEqn('cntRefCnt1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;1&gt;</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
@@ -98,9 +98,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmBERRrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrf</a></td>
-<td align="center">1</td>
+<td width="28%"><a href="javascript:showEqn('RefAck')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RefAck</a></td>
 <td align="center">1</td>
+<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC7</td>
 <td align="center">STD</td>
@@ -111,7 +111,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></td>
+<td width="28%"><a href="javascript:showEqn('RESr2')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RESr2</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
@@ -124,9 +124,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;7&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('RESr1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RESr1</a></td>
+<td align="center">1</td>
 <td align="center">1</td>
-<td align="center">7</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC9</td>
 <td align="center">STD</td>
@@ -137,9 +137,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;6&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('RESr0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RESr0</a></td>
+<td align="center">1</td>
 <td align="center">1</td>
-<td align="center">6</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC10</td>
 <td align="center">STD</td>
@@ -150,9 +150,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;5&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('IPL2r1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IPL2r1</a></td>
+<td align="center">1</td>
 <td align="center">1</td>
-<td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC11</td>
 <td align="center">STD</td>
@@ -163,9 +163,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;4&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('IPL2r0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IPL2r0</a></td>
+<td align="center">1</td>
 <td align="center">1</td>
-<td align="center">4</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC12</td>
 <td align="center">STD</td>
@@ -176,9 +176,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;3&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('ALE0S')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ALE0S</a></td>
 <td align="center">1</td>
-<td align="center">3</td>
+<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC13</td>
 <td align="center">STD</td>
@@ -189,7 +189,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;2&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('OpTxFX_DC708_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$FX_DC$708</a></td>
 <td align="center">1</td>
 <td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
@@ -199,12 +199,12 @@
 <td align="center">19</td>
 <td align="center">I/O</td>
 <td align="center">I</td>
-<td align="center">RESET</td>
+<td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;1&gt;</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
+<td width="28%"><a href="javascript:showEqn('iobsIOU1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU1</a></td>
+<td align="center">2</td>
+<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC15</td>
 <td align="center">STD</td>
@@ -215,9 +215,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;0&gt;</a></td>
-<td align="center">0</td>
-<td align="center">0</td>
+<td width="28%"><a href="javascript:showEqn('iobsIOL1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOL1</a></td>
+<td align="center">2</td>
+<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC16</td>
 <td align="center">STD</td>
@@ -228,9 +228,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('RefAck')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RefAck</a></td>
-<td align="center">1</td>
+<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd1</a></td>
 <td align="center">2</td>
+<td align="center">3</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC17</td>
 <td align="center">STD</td>
@@ -241,9 +241,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('OpTxFX_DC609_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$FX_DC$609</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
+<td width="28%"><a href="javascript:showEqn('IOU0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOU0</a></td>
+<td align="center">3</td>
+<td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC18</td>
 <td align="center">STD</td>
@@ -251,13 +251,117 @@
 <td align="center"> </td>
 <td align="center">(b)</td>
 <td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobsIOACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOACTr</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC6</td>
+<td align="center">STD</td>
 <td align="center"> </td>
+<td align="center">2</td>
+<td align="center">I/O/GTS4</td>
+<td align="center">I</td>
+<td align="center">RESET</td>
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('iobmVPArr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArr</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC7</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmVPArf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArf</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC8</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">3</td>
+<td align="center">I/O/GTS1</td>
+<td align="center">I</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmIOREQr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOREQr</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC9</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">4</td>
+<td align="center">I/O/GTS2</td>
+<td align="center">I</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmEr2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er2</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC10</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmEr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC11</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">6</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmDTACKrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrr</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC12</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">7</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmDTACKrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrf</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC13</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmBGr1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BGr1</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
 <td align="center">MC14</td>
 <td align="center">STD</td>
 <td align="center"> </td>
@@ -267,7 +371,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmVPArf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArf</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmBGr0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BGr0</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
@@ -280,7 +384,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmRESrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrr</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmBERRrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrr</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
@@ -293,7 +397,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmRESrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrf</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmBERRrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrf</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
@@ -306,9 +410,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmEr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
+<td width="28%"><a href="javascript:showEqn('cntRefCnt0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;0&gt;</a></td>
+<td align="center">0</td>
+<td align="center">0</td>
 <td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
 <td align="center">MC18</td>
 <td align="center">STD</td>
@@ -319,22 +423,35 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('fsbVPA_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA</a></td>
-<td align="center">25</td>
-<td align="center">31</td>
+<td width="28%"><a href="javascript:showEqn('fsbReady1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready1r</a></td>
+<td align="center">8</td>
+<td align="center">18</td>
 <td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC2</td>
+<td align="center">MC1</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">23</td>
-<td align="center">I/O/GCK2</td>
-<td align="center">GCK/I</td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('fsbReady1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready1r</a></td>
-<td align="center">7</td>
+<td width="28%"><a href="javascript:showEqn('iobsIORW1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IORW1</a></td>
 <td align="center">17</td>
+<td align="center">20</td>
+<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
+<td align="center">MC3</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('fsbReady2r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready2r</a></td>
+<td align="center">9</td>
+<td align="center">22</td>
 <td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
 <td align="center">MC5</td>
 <td align="center">STD</td>
@@ -358,22 +475,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsIORW1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IORW1</a></td>
-<td align="center">16</td>
-<td align="center">19</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC13</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbReady2r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready2r</a></td>
-<td align="center">9</td>
+<td width="28%"><a href="javascript:showEqn('fsbVPA_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA</a></td>
 <td align="center">22</td>
+<td align="center">31</td>
 <td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
 <td align="center">MC15</td>
 <td align="center">STD</td>
@@ -397,9 +501,22 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('ramBACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/BACTr</a></td>
+<td width="28%"><a href="javascript:showEqn('iobsClear1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Clear1</a></td>
 <td align="center">1</td>
-<td align="center">2</td>
+<td align="center">3</td>
+<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
+<td align="center">MC18</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('cntRefCnt6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;6&gt;</a></td>
+<td align="center">1</td>
+<td align="center">6</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC1</td>
 <td align="center">STD</td>
@@ -411,8 +528,8 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('nAoutOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nAoutOE</a></td>
-<td align="center">0</td>
-<td align="center">0</td>
+<td align="center">3</td>
+<td align="center">4</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC2</td>
 <td align="center">STD</td>
@@ -420,12 +537,12 @@
 <td align="center">87</td>
 <td align="center">I/O</td>
 <td align="center">O</td>
-<td align="center"> </td>
+<td align="center">SET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsClear1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Clear1</a></td>
+<td width="28%"><a href="javascript:showEqn('cntRefCnt5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;5&gt;</a></td>
 <td align="center">1</td>
-<td align="center">3</td>
+<td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC3</td>
 <td align="center">STD</td>
@@ -436,9 +553,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('ALE0S')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ALE0S</a></td>
+<td width="28%"><a href="javascript:showEqn('cntRefCnt4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;4&gt;</a></td>
 <td align="center">1</td>
-<td align="center">2</td>
+<td align="center">4</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC4</td>
 <td align="center">STD</td>
@@ -451,7 +568,7 @@
 <tr>
 <td width="28%"><a href="javascript:showEqn('nDoutOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDoutOE</a></td>
 <td align="center">2</td>
-<td align="center">4</td>
+<td align="center">3</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC5</td>
 <td align="center">STD</td>
@@ -463,8 +580,8 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('nDinOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDinOE</a></td>
-<td align="center">2</td>
-<td align="center">6</td>
+<td align="center">3</td>
+<td align="center">7</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC6</td>
 <td align="center">STD</td>
@@ -475,8 +592,8 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></td>
-<td align="center">2</td>
+<td width="28%"><a href="javascript:showEqn('cntRefCnt3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;3&gt;</a></td>
+<td align="center">1</td>
 <td align="center">3</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC7</td>
@@ -488,9 +605,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOU1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU1</a></td>
-<td align="center">2</td>
+<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></td>
 <td align="center">2</td>
+<td align="center">3</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC8</td>
 <td align="center">STD</td>
@@ -501,22 +618,22 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOL1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOL1</a></td>
-<td align="center">2</td>
+<td width="28%"><a href="javascript:showEqn('fsbBERR1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR1r</a></td>
 <td align="center">2</td>
+<td align="center">4</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC9</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center">92</td>
 <td align="center">I/O</td>
-<td align="center">(b)</td>
+<td align="center">I</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd2</a></td>
+<td width="28%"><a href="javascript:showEqn('csnOverlay1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay1</a></td>
 <td align="center">2</td>
-<td align="center">4</td>
+<td align="center">3</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC10</td>
 <td align="center">STD</td>
@@ -540,9 +657,9 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd1</a></td>
+<td width="28%"><a href="javascript:showEqn('cntRefDone_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefDone</a></td>
 <td align="center">2</td>
-<td align="center">4</td>
+<td align="center">10</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC12</td>
 <td align="center">STD</td>
@@ -553,9 +670,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('fsbBERR1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR1r</a></td>
-<td align="center">2</td>
-<td align="center">4</td>
+<td width="28%"><a href="javascript:showEqn('csnOverlay0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay0</a></td>
+<td align="center">3</td>
+<td align="center">8</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC13</td>
 <td align="center">STD</td>
@@ -566,9 +683,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('csnOverlay1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay1</a></td>
-<td align="center">2</td>
+<td width="28%"><a href="javascript:showEqn('cntTimeoutBPre_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/TimeoutBPre</a></td>
 <td align="center">3</td>
+<td align="center">11</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC14</td>
 <td align="center">STD</td>
@@ -579,9 +696,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('OpTxFX_DC610_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$FX_DC$610</a></td>
-<td align="center">2</td>
-<td align="center">5</td>
+<td width="28%"><a href="javascript:showEqn('TimeoutA')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutA</a></td>
+<td align="center">3</td>
+<td align="center">10</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC15</td>
 <td align="center">STD</td>
@@ -589,10 +706,10 @@
 <td align="center">96</td>
 <td align="center">I/O</td>
 <td align="center">I</td>
-<td align="center"> </td>
+<td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('IOU0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOU0</a></td>
+<td width="28%"><a href="javascript:showEqn('IOL0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOL0</a></td>
 <td align="center">3</td>
 <td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
@@ -605,9 +722,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('IOL0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOL0</a></td>
-<td align="center">3</td>
-<td align="center">5</td>
+<td width="28%"><a href="javascript:showEqn('iobsIOReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOReady</a></td>
+<td align="center">4</td>
+<td align="center">8</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC17</td>
 <td align="center">STD</td>
@@ -618,7 +735,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOReady</a></td>
+<td width="28%"><a href="javascript:showEqn('BERR_IOBS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">BERR_IOBS</a></td>
 <td align="center">4</td>
 <td align="center">8</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
@@ -631,9 +748,22 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
+<td width="28%"><a href="javascript:showEqn('ramRASEL_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RASEL</a></td>
+<td align="center">20</td>
+<td align="center">15</td>
+<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
+<td align="center">MC1</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
 <td width="28%"><a href="javascript:showEqn('nROMCS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nROMCS</a></td>
-<td align="center">2</td>
-<td align="center">5</td>
+<td align="center">3</td>
+<td align="center">6</td>
 <td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
 <td align="center">MC2</td>
 <td align="center">STD</td>
@@ -644,9 +774,22 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></td>
-<td align="center">14</td>
-<td align="center">19</td>
+<td width="28%"><a href="javascript:showEqn('cntRefCnt7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;7&gt;</a></td>
+<td align="center">1</td>
+<td align="center">7</td>
+<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
+<td align="center">MC3</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('ramRAMDIS2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS2</a></td>
+<td align="center">7</td>
+<td align="center">15</td>
 <td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
 <td align="center">MC4</td>
 <td align="center">STD</td>
@@ -683,9 +826,9 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></td>
-<td align="center">17</td>
+<td width="28%"><a href="javascript:showEqn('ramRAMDIS1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS1</a></td>
 <td align="center">18</td>
+<td align="center">15</td>
 <td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
 <td align="center">MC8</td>
 <td align="center">STD</td>
@@ -735,8 +878,8 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('IOREQ')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOREQ</a></td>
-<td align="center">14</td>
+<td width="28%"><a href="javascript:showEqn('iobsLoad1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Load1</a></td>
+<td align="center">15</td>
 <td align="center">19</td>
 <td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
 <td align="center">MC13</td>
@@ -774,9 +917,9 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('BERR_IOBS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">BERR_IOBS</a></td>
-<td align="center">4</td>
-<td align="center">8</td>
+<td width="28%"><a href="javascript:showEqn('ramOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/Once</a></td>
+<td align="center">5</td>
+<td align="center">10</td>
 <td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
 <td align="center">MC16</td>
 <td align="center">STD</td>
@@ -787,19 +930,6 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('IORW0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IORW0</a></td>
-<td align="center">18</td>
-<td align="center">20</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC18</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
 <td width="28%"><a href="javascript:showEqn('iobmETACK_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ETACK</a></td>
 <td align="center">1</td>
 <td align="center">6</td>
@@ -814,8 +944,8 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('nVMA_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nVMA_IOB</a></td>
-<td align="center">2</td>
-<td align="center">9</td>
+<td align="center">3</td>
+<td align="center">10</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC2</td>
 <td align="center">STD</td>
@@ -826,9 +956,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('ALE0M')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ALE0M</a></td>
-<td align="center">2</td>
-<td align="center">5</td>
+<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd3</a></td>
+<td align="center">3</td>
+<td align="center">6</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC3</td>
 <td align="center">STD</td>
@@ -878,9 +1008,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd4</a></td>
-<td align="center">4</td>
-<td align="center">6</td>
+<td width="28%"><a href="javascript:showEqn('ALE0M')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ALE0M</a></td>
+<td align="center">3</td>
+<td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC7</td>
 <td align="center">STD</td>
@@ -917,9 +1047,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd3</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd2</a></td>
 <td align="center">5</td>
-<td align="center">10</td>
+<td align="center">11</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC10</td>
 <td align="center">STD</td>
@@ -944,7 +1074,7 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('nAS_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nAS_IOB</a></td>
-<td align="center">2</td>
+<td align="center">3</td>
 <td align="center">4</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC12</td>
@@ -996,7 +1126,7 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('IOACT')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOACT</a></td>
-<td align="center">6</td>
+<td align="center">7</td>
 <td align="center">13</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC16</td>
@@ -1009,8 +1139,8 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('nDinLE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDinLE</a></td>
+<td align="center">1</td>
 <td align="center">2</td>
-<td align="center">3</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC17</td>
 <td align="center">STD</td>
@@ -1023,7 +1153,7 @@
 <tr>
 <td width="28%"><a href="javascript:showEqn('IOBERR')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOBERR</a></td>
 <td align="center">9</td>
-<td align="center">14</td>
+<td align="center">13</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC18</td>
 <td align="center">STD</td>
@@ -1034,9 +1164,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('TimeoutB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutB</a></td>
-<td align="center">3</td>
-<td align="center">12</td>
+<td width="28%"><a href="javascript:showEqn('ramRAMReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMReady</a></td>
+<td align="center">16</td>
+<td align="center">15</td>
 <td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
 <td align="center">MC1</td>
 <td align="center">STD</td>
@@ -1060,9 +1190,9 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntRefDone_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefDone</a></td>
-<td align="center">2</td>
-<td align="center">10</td>
+<td width="28%"><a href="javascript:showEqn('TimeoutB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutB</a></td>
+<td align="center">3</td>
+<td align="center">12</td>
 <td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
 <td align="center">MC3</td>
 <td align="center">STD</td>
@@ -1112,9 +1242,9 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('csnOverlay0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay0</a></td>
-<td align="center">3</td>
-<td align="center">8</td>
+<td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd1</a></td>
+<td align="center">5</td>
+<td align="center">10</td>
 <td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
 <td align="center">MC7</td>
 <td align="center">STD</td>
@@ -1151,9 +1281,9 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntTimeoutBPre_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/TimeoutBPre</a></td>
-<td align="center">3</td>
-<td align="center">11</td>
+<td width="28%"><a href="javascript:showEqn('OpTxOpTxFX_DC182_INV783_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$$OpTx$FX_DC$182_INV$783</a></td>
+<td align="center">6</td>
+<td align="center">8</td>
 <td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
 <td align="center">MC10</td>
 <td align="center">STD</td>
@@ -1161,7 +1291,7 @@
 <td align="center"> </td>
 <td align="center">(b)</td>
 <td align="center">(b)</td>
-<td align="center">RESET</td>
+<td align="center"> </td>
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('RA9_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;9&gt;</a></td>
@@ -1177,68 +1307,55 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('TimeoutA')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutA</a></td>
-<td align="center">3</td>
-<td align="center">10</td>
+<td width="28%"><a href="javascript:showEqn('CLK25EN')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">CLK25EN</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
 <td align="center">MC12</td>
 <td align="center">STD</td>
-<td align="center"> </td>
+<td align="center">FAST</td>
 <td align="center">58</td>
 <td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
+<td align="center">O</td>
+<td align="center"> </td>
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd3</a></td>
 <td align="center">11</td>
 <td align="center">14</td>
 <td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC14</td>
+<td align="center">MC13</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">59</td>
-<td align="center">I/O</td>
+<td align="center"> </td>
+<td align="center">(b)</td>
 <td align="center">(b)</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
+<td width="28%"><a href="javascript:showEqn('CLK20EN')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">CLK20EN</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
+<td align="center">MC14</td>
+<td align="center">STD</td>
+<td align="center">FAST</td>
+<td align="center">59</td>
+<td align="center">I/O</td>
+<td align="center">O</td>
+<td align="center"> </td>
+</tr>
+<tr>
 <td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd2</a></td>
 <td align="center">13</td>
 <td align="center">14</td>
 <td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC16</td>
+<td align="center">MC17</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRAMReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMReady</a></td>
-<td align="center">16</td>
-<td align="center">15</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC18</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRASEL_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RASEL</a></td>
-<td align="center">20</td>
-<td align="center">15</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC1</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
+<td align="center">61</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
@@ -1255,22 +1372,9 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('fsbBERR0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR0r</a></td>
-<td align="center">3</td>
-<td align="center">8</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC3</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd1</a></td>
-<td align="center">5</td>
-<td align="center">10</td>
+<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></td>
+<td align="center">15</td>
+<td align="center">20</td>
 <td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
 <td align="center">MC4</td>
 <td align="center">STD</td>
@@ -1307,9 +1411,9 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('ramOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/Once</a></td>
-<td align="center">5</td>
-<td align="center">10</td>
+<td width="28%"><a href="javascript:showEqn('RESDone')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RESDone</a></td>
+<td align="center">1</td>
+<td align="center">3</td>
 <td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
 <td align="center">MC7</td>
 <td align="center">STD</td>
@@ -1333,9 +1437,9 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsLoad1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Load1</a></td>
-<td align="center">14</td>
-<td align="center">18</td>
+<td width="28%"><a href="javascript:showEqn('IOREQ')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOREQ</a></td>
+<td align="center">15</td>
+<td align="center">20</td>
 <td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
 <td align="center">MC9</td>
 <td align="center">STD</td>
@@ -1359,11 +1463,37 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('ramRAMDIS2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS2</a></td>
-<td align="center">7</td>
-<td align="center">15</td>
+<td width="28%"><a href="javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></td>
+<td align="center">18</td>
+<td align="center">19</td>
 <td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC13</td>
+<td align="center">MC14</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">71</td>
+<td align="center">I/O</td>
+<td align="center">(b)</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('nBR_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nBR_IOB</a></td>
+<td align="center">1</td>
+<td align="center">6</td>
+<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
+<td align="center">MC15</td>
+<td align="center">STD</td>
+<td align="center">FAST</td>
+<td align="center">72</td>
+<td align="center">I/O</td>
+<td align="center">O</td>
+<td align="center">SET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('fsbBERR0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR0r</a></td>
+<td align="center">3</td>
+<td align="center">8</td>
+<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
+<td align="center">MC16</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -1372,15 +1502,15 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('ramRAMDIS1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS1</a></td>
-<td align="center">18</td>
-<td align="center">15</td>
+<td width="28%"><a href="javascript:showEqn('IORW0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IORW0</a></td>
+<td align="center">19</td>
+<td align="center">21</td>
 <td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC15</td>
+<td align="center">MC18</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">72</td>
-<td align="center">I/O</td>
+<td align="center"> </td>
+<td align="center">(b)</td>
 <td align="center">(b)</td>
 <td align="center">RESET</td>
 </tr>
diff --git a/cpld/XC95144XL/MXSE_html/fit/maplogic_02 2.htm b/cpld/XC95144XL/MXSE_html/fit/maplogic_02 2.htm
deleted file mode 100644
index 533b41d..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/maplogic_02 2.htm	
+++ /dev/null
@@ -1,1591 +0,0 @@
-<html>
-<head>
-<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
-<script src="maplogic.js"></script><link rel="stylesheet" type="text/css" href="style.css">
-</head>
-<body class="pgBgnd" id="XC95144XL">
-<span id="maplog" class="pgRef"><h3 align="center">Logic</h3>
-<table width="90%" border="1" cellpadding="0" cellspacing="0">
-<tr class="pgHeader">
-<th width="28%"><a href="javascript:Sort(0);">Signal Name</a></th>
-<th align="center">Total Pterms</th>
-<th align="center">Total Inputs</th>
-<th><a href="javascript:Sort(1);">Function Block</a></th>
-<th align="center">Macrocell</th>
-<th align="center">Power Mode</th>
-<th align="center">Slew Rate</th>
-<th><a href="javascript:Sort(2);">Pin Number</a></th>
-<th align="center">Pin Type</th>
-<th align="center">Pin Use</th>
-<th align="center">Reg Init State</th>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOREQr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOREQr</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC5</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">1</td>
-<td align="center">I/O/GTS3</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;3&gt;</a></td>
-<td align="center">1</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC6</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">2</td>
-<td align="center">I/O/GTS4</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;1&gt;</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC8</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">3</td>
-<td align="center">I/O/GTS1</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbBERR1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR1r</a></td>
-<td align="center">2</td>
-<td align="center">4</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC9</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">4</td>
-<td align="center">I/O/GTS2</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nLDS_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nLDS_IOB</a></td>
-<td align="center">3</td>
-<td align="center">7</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC11</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">6</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nUDS_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nUDS_IOB</a></td>
-<td align="center">3</td>
-<td align="center">7</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC12</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">7</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nDoutOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDoutOE</a></td>
-<td align="center">2</td>
-<td align="center">7</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC14</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">8</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('TimeoutB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutB</a></td>
-<td align="center">3</td>
-<td align="center">12</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC15</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">9</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nAS_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nAS_IOB</a></td>
-<td align="center">1</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC17</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">10</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nDTACK_FSB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDTACK_FSB</a></td>
-<td align="center">23</td>
-<td align="center">32</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC2</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">11</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nBERR_FSB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nBERR_FSB</a></td>
-<td align="center">3</td>
-<td align="center">9</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC6</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">14</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nOE</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC11</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">17</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbReady2r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready2r</a></td>
-<td align="center">9</td>
-<td align="center">22</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC12</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">18</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbVPA_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA</a></td>
-<td align="center">22</td>
-<td align="center">30</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC15</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">20</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('OpTxFX_DC602_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$FX_DC$602</a></td>
-<td align="center">2</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC17</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">22</td>
-<td align="center">I/O/GCK1</td>
-<td align="center">GCK</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nRAS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nRAS</a></td>
-<td align="center">3</td>
-<td align="center">8</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC5</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">24</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsClear1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Clear1</a></td>
-<td align="center">1</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC6</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">25</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ALE0S')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ALE0S</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC8</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">27</td>
-<td align="center">I/O/GCK3</td>
-<td align="center">GCK/I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></td>
-<td align="center">14</td>
-<td align="center">19</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC9</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">28</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nADoutLE1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nADoutLE1</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC11</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">29</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center">SET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC12</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">30</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmETACK_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ETACK</a></td>
-<td align="center">1</td>
-<td align="center">6</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC14</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">32</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nVMA_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nVMA_IOB</a></td>
-<td align="center">2</td>
-<td align="center">9</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC15</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">33</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsIORW1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IORW1</a></td>
-<td align="center">16</td>
-<td align="center">19</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC17</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">34</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;1&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC2</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">35</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd5</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC5</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">36</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd4</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC6</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">37</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;3&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC8</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">39</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmBERRrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrf</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC9</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">40</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd8_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd8</a></td>
-<td align="center">2</td>
-<td align="center">4</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC11</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">41</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">SET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nROMCS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nROMCS</a></td>
-<td align="center">2</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC12</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">42</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd2</a></td>
-<td align="center">4</td>
-<td align="center">9</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC14</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">43</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('BERR_IOBS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">BERR_IOBS</a></td>
-<td align="center">4</td>
-<td align="center">8</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC15</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">46</td>
-<td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;5&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC2</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">50</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd3</a></td>
-<td align="center">11</td>
-<td align="center">14</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC5</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">52</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;6&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC6</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">53</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd1</a></td>
-<td align="center">5</td>
-<td align="center">10</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC8</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">54</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;7&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC9</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">55</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRAMDIS2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS2</a></td>
-<td align="center">7</td>
-<td align="center">15</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC11</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">56</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA8_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;8&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC12</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">58</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;7&gt;</a></td>
-<td align="center">1</td>
-<td align="center">7</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC14</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">59</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA9_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;9&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC15</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">60</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRAMReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMReady</a></td>
-<td align="center">16</td>
-<td align="center">15</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC17</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">61</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA11_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;11&gt;</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC2</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">63</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA10_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;10&gt;</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC6</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">65</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nADoutLE0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nADoutLE0</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC9</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">67</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nAoutOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nAoutOE</a></td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC12</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">70</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nDinLE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDinLE</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC15</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">72</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd1</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC17</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">73</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nCAS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nCAS</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC2</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">74</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RefAck')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RefAck</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC5</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">76</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nRAMLWE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nRAMLWE</a></td>
-<td align="center">1</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC6</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">77</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOL1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOL1</a></td>
-<td align="center">2</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC8</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">78</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nRAMUWE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nRAMUWE</a></td>
-<td align="center">1</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC9</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">79</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmES1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;1&gt;</a></td>
-<td align="center">3</td>
-<td align="center">4</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC11</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">80</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nROMWE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nROMWE</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC12</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">81</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('IOU0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOU0</a></td>
-<td align="center">3</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC14</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">82</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nVPA_FSB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nVPA_FSB</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC15</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">85</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmES4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;4&gt;</a></td>
-<td align="center">4</td>
-<td align="center">7</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC17</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">86</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;0&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC2</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">87</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsLoad1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Load1</a></td>
-<td align="center">14</td>
-<td align="center">18</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC6</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">90</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;2&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC8</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">91</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('RA4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RA&lt;4&gt;</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC12</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">94</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRAMDIS1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS1</a></td>
-<td align="center">18</td>
-<td align="center">15</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC14</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">95</td>
-<td align="center">I/O</td>
-<td align="center">I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('nDinOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDinOE</a></td>
-<td align="center">2</td>
-<td align="center">6</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC17</td>
-<td align="center">STD</td>
-<td align="center">FAST</td>
-<td align="center">97</td>
-<td align="center">I/O</td>
-<td align="center">O</td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmVPArf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArf</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC2</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">99</td>
-<td align="center">I/O/GSR</td>
-<td align="center">GSR/I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('OpTxFX_DC606_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$FX_DC$606</a></td>
-<td align="center">5</td>
-<td align="center">12</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC4</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbReady1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready1r</a></td>
-<td align="center">7</td>
-<td align="center">17</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC7</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbVPA__or00001fsbVPA__or00001_D2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA__or00001/fsb/VPA__or00001_D2</a></td>
-<td align="center">8</td>
-<td align="center">20</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC10</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmVPArr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArr</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC1</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmRESrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrr</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC3</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmRESrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrf</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC4</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;2&gt;</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC7</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">T</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefDone_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefDone</a></td>
-<td align="center">2</td>
-<td align="center">10</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC10</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntTimeoutBPre_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/TimeoutBPre</a></td>
-<td align="center">3</td>
-<td align="center">11</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC13</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">T</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('TimeoutA')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutA</a></td>
-<td align="center">3</td>
-<td align="center">10</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC16</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">T</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOReady</a></td>
-<td align="center">4</td>
-<td align="center">8</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC18</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">T</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('IORW0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IORW0</a></td>
-<td align="center">18</td>
-<td align="center">20</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC3</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">T</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOACTr</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC4</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC7</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('IOREQ')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOREQ</a></td>
-<td align="center">14</td>
-<td align="center">19</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC13</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramBACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/BACTr</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC18</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRASEL_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RASEL</a></td>
-<td align="center">20</td>
-<td align="center">15</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC1</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('csnOverlay1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay1</a></td>
-<td align="center">2</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC3</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></td>
-<td align="center">17</td>
-<td align="center">18</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC10</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbBERR0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR0r</a></td>
-<td align="center">3</td>
-<td align="center">8</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC16</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('IOACT')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOACT</a></td>
-<td align="center">10</td>
-<td align="center">15</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC1</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd7</a></td>
-<td align="center">1</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC3</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd6</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC4</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmBERRrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrr</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC7</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;0&gt;</a></td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC10</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">T</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ALE0M')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ALE0M</a></td>
-<td align="center">2</td>
-<td align="center">7</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC13</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd3</a></td>
-<td align="center">5</td>
-<td align="center">10</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC16</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('IOBERR')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOBERR</a></td>
-<td align="center">8</td>
-<td align="center">11</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC18</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">T</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmEr2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er2</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC1</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmDTACKrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrr</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC3</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmDTACKrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrf</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC4</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOU1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU1</a></td>
-<td align="center">2</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC7</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmES3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;3&gt;</a></td>
-<td align="center">3</td>
-<td align="center">6</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC10</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">T</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmES0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;0&gt;</a></td>
-<td align="center">3</td>
-<td align="center">7</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC13</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">T</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('IOL0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOL0</a></td>
-<td align="center">3</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC16</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmES2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ES&lt;2&gt;</a></td>
-<td align="center">5</td>
-<td align="center">7</td>
-<td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
-<td align="center">MC18</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;5&gt;</a></td>
-<td align="center">1</td>
-<td align="center">5</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC1</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">T</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;4&gt;</a></td>
-<td align="center">1</td>
-<td align="center">4</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC3</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">T</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('csnOverlay0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay0</a></td>
-<td align="center">2</td>
-<td align="center">7</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC4</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">T</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbReady0r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready0r</a></td>
-<td align="center">3</td>
-<td align="center">8</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC7</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/Once</a></td>
-<td align="center">5</td>
-<td align="center">10</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC10</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">T</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd2</a></td>
-<td align="center">13</td>
-<td align="center">14</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC13</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">T</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;6&gt;</a></td>
-<td align="center">1</td>
-<td align="center">6</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC16</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">T</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmEr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC18</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-</table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
-<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
-<td align="right">
-<input type="button" onclick="javascript:showLegend('logiclegend.htm')" onmouseover="window.status='show Legend'; return true;" onmouseout="window.status=''" value="legend"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page">
-</td>
-</tr></table></span></form>
-</body>
-</html>
diff --git a/cpld/XC95144XL/MXSE_html/fit/maplogic_02.htm b/cpld/XC95144XL/MXSE_html/fit/maplogic_02.htm
index ffe7760..d437b2f 100644
--- a/cpld/XC95144XL/MXSE_html/fit/maplogic_02.htm
+++ b/cpld/XC95144XL/MXSE_html/fit/maplogic_02.htm
@@ -20,7 +20,72 @@
 <th align="center">Reg Init State</th>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmVPArr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArr</a></td>
+<td width="28%"><a href="javascript:showEqn('iobsIOACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOACTr</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC6</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">2</td>
+<td align="center">I/O/GTS4</td>
+<td align="center">I</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmVPArf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArf</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC8</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">3</td>
+<td align="center">I/O/GTS1</td>
+<td align="center">I</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmIOREQr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOREQr</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC9</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">4</td>
+<td align="center">I/O/GTS2</td>
+<td align="center">I</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmEr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC11</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">6</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmDTACKrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrr</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC12</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">7</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmBGr1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BGr1</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
@@ -33,7 +98,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmVPArf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArf</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmBGr0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BGr0</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
@@ -46,7 +111,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmRESrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrf</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmBERRrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrf</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
@@ -59,7 +124,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOREQr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOREQr</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmRESrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrr</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
@@ -72,7 +137,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmEr2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er2</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmRESrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrf</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
@@ -85,9 +150,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmDTACKrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrf</a></td>
-<td align="center">1</td>
+<td width="28%"><a href="javascript:showEqn('cntRefCnt2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;2&gt;</a></td>
 <td align="center">1</td>
+<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC5</td>
 <td align="center">STD</td>
@@ -98,7 +163,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmBERRrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrr</a></td>
+<td width="28%"><a href="javascript:showEqn('cntRefCnt1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;1&gt;</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
@@ -111,7 +176,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></td>
+<td width="28%"><a href="javascript:showEqn('RESr2')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RESr2</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
@@ -124,9 +189,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;7&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('RESr1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RESr1</a></td>
+<td align="center">1</td>
 <td align="center">1</td>
-<td align="center">7</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC9</td>
 <td align="center">STD</td>
@@ -137,9 +202,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;5&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('IPL2r1')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IPL2r1</a></td>
+<td align="center">1</td>
 <td align="center">1</td>
-<td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC11</td>
 <td align="center">STD</td>
@@ -150,9 +215,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;4&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('IPL2r0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IPL2r0</a></td>
+<td align="center">1</td>
 <td align="center">1</td>
-<td align="center">4</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC12</td>
 <td align="center">STD</td>
@@ -163,7 +228,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;2&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('OpTxFX_DC708_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$FX_DC$708</a></td>
 <td align="center">1</td>
 <td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
@@ -173,12 +238,12 @@
 <td align="center">19</td>
 <td align="center">I/O</td>
 <td align="center">I</td>
-<td align="center">RESET</td>
+<td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;1&gt;</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
+<td width="28%"><a href="javascript:showEqn('iobsIOU1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU1</a></td>
+<td align="center">2</td>
+<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC15</td>
 <td align="center">STD</td>
@@ -189,9 +254,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('RefAck')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RefAck</a></td>
-<td align="center">1</td>
+<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd1</a></td>
 <td align="center">2</td>
+<td align="center">3</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC17</td>
 <td align="center">STD</td>
@@ -202,22 +267,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('fsbVPA_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA</a></td>
-<td align="center">25</td>
-<td align="center">31</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC2</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center">23</td>
-<td align="center">I/O/GCK2</td>
-<td align="center">GCK/I</td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('fsbReady1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready1r</a></td>
-<td align="center">7</td>
-<td align="center">17</td>
+<td width="28%"><a href="javascript:showEqn('fsbReady2r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready2r</a></td>
+<td align="center">9</td>
+<td align="center">22</td>
 <td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
 <td align="center">MC5</td>
 <td align="center">STD</td>
@@ -241,9 +293,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('fsbReady2r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready2r</a></td>
-<td align="center">9</td>
+<td width="28%"><a href="javascript:showEqn('fsbVPA_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/VPA</a></td>
 <td align="center">22</td>
+<td align="center">31</td>
 <td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
 <td align="center">MC15</td>
 <td align="center">STD</td>
@@ -268,8 +320,8 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('nROMCS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nROMCS</a></td>
-<td align="center">2</td>
-<td align="center">5</td>
+<td align="center">3</td>
+<td align="center">6</td>
 <td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
 <td align="center">MC2</td>
 <td align="center">STD</td>
@@ -306,9 +358,9 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></td>
-<td align="center">17</td>
+<td width="28%"><a href="javascript:showEqn('ramRAMDIS1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS1</a></td>
 <td align="center">18</td>
+<td align="center">15</td>
 <td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
 <td align="center">MC8</td>
 <td align="center">STD</td>
@@ -462,29 +514,42 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('TimeoutA')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutA</a></td>
-<td align="center">3</td>
-<td align="center">10</td>
+<td width="28%"><a href="javascript:showEqn('CLK25EN')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">CLK25EN</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
 <td align="center">MC12</td>
 <td align="center">STD</td>
-<td align="center"> </td>
+<td align="center">FAST</td>
 <td align="center">58</td>
 <td align="center">I/O</td>
-<td align="center">(b)</td>
-<td align="center">RESET</td>
+<td align="center">O</td>
+<td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd3</a></td>
-<td align="center">11</td>
-<td align="center">14</td>
+<td width="28%"><a href="javascript:showEqn('CLK20EN')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">CLK20EN</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
 <td align="center">MC14</td>
 <td align="center">STD</td>
-<td align="center"> </td>
+<td align="center">FAST</td>
 <td align="center">59</td>
 <td align="center">I/O</td>
-<td align="center">(b)</td>
+<td align="center">O</td>
+<td align="center"> </td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd2</a></td>
+<td align="center">13</td>
+<td align="center">14</td>
+<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
+<td align="center">MC17</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center">61</td>
+<td align="center">I/O</td>
+<td align="center">I</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
@@ -540,9 +605,9 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsLoad1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Load1</a></td>
-<td align="center">14</td>
-<td align="center">18</td>
+<td width="28%"><a href="javascript:showEqn('IOREQ')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOREQ</a></td>
+<td align="center">15</td>
+<td align="center">20</td>
 <td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
 <td align="center">MC9</td>
 <td align="center">STD</td>
@@ -566,22 +631,35 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('ramRAMDIS1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS1</a></td>
+<td width="28%"><a href="javascript:showEqn('iobsOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Once</a></td>
 <td align="center">18</td>
-<td align="center">15</td>
+<td align="center">19</td>
 <td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC15</td>
+<td align="center">MC14</td>
 <td align="center">STD</td>
 <td align="center"> </td>
-<td align="center">72</td>
+<td align="center">71</td>
 <td align="center">I/O</td>
 <td align="center">(b)</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
+<td width="28%"><a href="javascript:showEqn('nBR_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nBR_IOB</a></td>
+<td align="center">1</td>
+<td align="center">6</td>
+<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
+<td align="center">MC15</td>
+<td align="center">STD</td>
+<td align="center">FAST</td>
+<td align="center">72</td>
+<td align="center">I/O</td>
+<td align="center">O</td>
+<td align="center">SET</td>
+</tr>
+<tr>
 <td width="28%"><a href="javascript:showEqn('nVMA_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nVMA_IOB</a></td>
-<td align="center">2</td>
-<td align="center">9</td>
+<td align="center">3</td>
+<td align="center">10</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC2</td>
 <td align="center">STD</td>
@@ -658,7 +736,7 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('nAS_IOB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nAS_IOB</a></td>
-<td align="center">2</td>
+<td align="center">3</td>
 <td align="center">4</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC12</td>
@@ -697,8 +775,8 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('nDinLE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDinLE</a></td>
+<td align="center">1</td>
 <td align="center">2</td>
-<td align="center">3</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC17</td>
 <td align="center">STD</td>
@@ -710,8 +788,8 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('nAoutOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nAoutOE</a></td>
-<td align="center">0</td>
-<td align="center">0</td>
+<td align="center">3</td>
+<td align="center">4</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC2</td>
 <td align="center">STD</td>
@@ -719,12 +797,12 @@
 <td align="center">87</td>
 <td align="center">I/O</td>
 <td align="center">O</td>
-<td align="center"> </td>
+<td align="center">SET</td>
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('nDoutOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDoutOE</a></td>
 <td align="center">2</td>
-<td align="center">4</td>
+<td align="center">3</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC5</td>
 <td align="center">STD</td>
@@ -736,8 +814,8 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('nDinOE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nDinOE</a></td>
-<td align="center">2</td>
-<td align="center">6</td>
+<td align="center">3</td>
+<td align="center">7</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC6</td>
 <td align="center">STD</td>
@@ -748,9 +826,9 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOU1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOU1</a></td>
-<td align="center">2</td>
+<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></td>
 <td align="center">2</td>
+<td align="center">3</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC8</td>
 <td align="center">STD</td>
@@ -761,16 +839,16 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOL1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOL1</a></td>
-<td align="center">2</td>
+<td width="28%"><a href="javascript:showEqn('fsbBERR1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR1r</a></td>
 <td align="center">2</td>
+<td align="center">4</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC9</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center">92</td>
 <td align="center">I/O</td>
-<td align="center">(b)</td>
+<td align="center">I</td>
 <td align="center">RESET</td>
 </tr>
 <tr>
@@ -787,9 +865,9 @@
 <td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd1</a></td>
+<td width="28%"><a href="javascript:showEqn('cntRefDone_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefDone</a></td>
 <td align="center">2</td>
-<td align="center">4</td>
+<td align="center">10</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC12</td>
 <td align="center">STD</td>
@@ -800,9 +878,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('csnOverlay1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay1</a></td>
-<td align="center">2</td>
+<td width="28%"><a href="javascript:showEqn('cntTimeoutBPre_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/TimeoutBPre</a></td>
 <td align="center">3</td>
+<td align="center">11</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC14</td>
 <td align="center">STD</td>
@@ -813,9 +891,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('OpTxFX_DC610_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$FX_DC$610</a></td>
-<td align="center">2</td>
-<td align="center">5</td>
+<td width="28%"><a href="javascript:showEqn('TimeoutA')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutA</a></td>
+<td align="center">3</td>
+<td align="center">10</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC15</td>
 <td align="center">STD</td>
@@ -823,12 +901,12 @@
 <td align="center">96</td>
 <td align="center">I/O</td>
 <td align="center">I</td>
-<td align="center"> </td>
+<td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('IOL0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOL0</a></td>
-<td align="center">3</td>
-<td align="center">5</td>
+<td width="28%"><a href="javascript:showEqn('iobsIOReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOReady</a></td>
+<td align="center">4</td>
+<td align="center">8</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC17</td>
 <td align="center">STD</td>
@@ -839,9 +917,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOACTr</a></td>
-<td align="center">1</td>
+<td width="28%"><a href="javascript:showEqn('ramBACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/BACTr</a></td>
 <td align="center">1</td>
+<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC1</td>
 <td align="center">STD</td>
@@ -855,7 +933,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmDTACKrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrr</a></td>
+<td width="28%"><a href="javascript:showEqn('fsbASrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/ASrf</a></td>
 <td align="center">1</td>
 <td align="center">1</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
@@ -871,9 +949,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmBERRrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrf</a></td>
-<td align="center">1</td>
+<td width="28%"><a href="javascript:showEqn('RefAck')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RefAck</a></td>
 <td align="center">1</td>
+<td align="center">2</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC7</td>
 <td align="center">STD</td>
@@ -887,9 +965,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;6&gt;</a></td>
+<td width="28%"><a href="javascript:showEqn('RESr0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RESr0</a></td>
+<td align="center">1</td>
 <td align="center">1</td>
-<td align="center">6</td>
 <td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
 <td align="center">MC10</td>
 <td align="center">STD</td>
@@ -897,134 +975,6 @@
 <td align="center"> </td>
 <td align="center">(b)</td>
 <td align="center">(b)</td>
-<td align="center">T</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;3&gt;</a></td>
-<td align="center">1</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC13</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">T</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('cntRefCnt0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;0&gt;</a></td>
-<td align="center">0</td>
-<td align="center">0</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC16</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">T</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('OpTxFX_DC609_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$FX_DC$609</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
-<td align="center">MC18</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center"> </td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmRESrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/RESrr</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC16</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobmEr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er</a></td>
-<td align="center">1</td>
-<td align="center">1</td>
-<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
-<td align="center">MC18</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsIORW1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IORW1</a></td>
-<td align="center">16</td>
-<td align="center">19</td>
-<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
-<td align="center">MC13</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">T</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramBACTr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/BACTr</a></td>
-<td align="center">1</td>
-<td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC1</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">D</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('iobsClear1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Clear1</a></td>
-<td align="center">1</td>
-<td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC3</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
 <td align="center">D</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -1034,8 +984,8 @@
 <td width="28%"><a href="javascript:showEqn('ALE0S')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ALE0S</a></td>
 <td align="center">1</td>
 <td align="center">2</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
-<td align="center">MC4</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC13</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -1047,10 +997,42 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd1</a></td>
+<td width="28%"><a href="javascript:showEqn('iobsIOL1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOL1</a></td>
 <td align="center">2</td>
+<td align="center">2</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC16</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">D</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('IOU0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOU0</a></td>
 <td align="center">3</td>
-<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center">5</td>
+<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
+<td align="center">MC18</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">D</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmVPArr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/VPArr</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
 <td align="center">MC7</td>
 <td align="center">STD</td>
 <td align="center"> </td>
@@ -1063,10 +1045,186 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd2</a></td>
-<td align="center">2</td>
+<td width="28%"><a href="javascript:showEqn('iobmEr2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/Er2</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC10</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">D</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmDTACKrf_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/DTACKrf</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC13</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">D</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobmBERRrr_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/BERRrr</a></td>
+<td align="center">1</td>
+<td align="center">1</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC16</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">D</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('cntRefCnt0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;0&gt;</a></td>
+<td align="center">0</td>
+<td align="center">0</td>
+<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
+<td align="center">MC18</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">T</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('fsbReady1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/Ready1r</a></td>
+<td align="center">8</td>
+<td align="center">18</td>
+<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
+<td align="center">MC1</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">D</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobsIORW1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IORW1</a></td>
+<td align="center">17</td>
+<td align="center">20</td>
+<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
+<td align="center">MC3</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">T</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobsClear1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Clear1</a></td>
+<td align="center">1</td>
+<td align="center">3</td>
+<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
+<td align="center">MC18</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">D</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('cntRefCnt6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;6&gt;</a></td>
+<td align="center">1</td>
+<td align="center">6</td>
+<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center">MC1</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">T</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('cntRefCnt5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;5&gt;</a></td>
+<td align="center">1</td>
+<td align="center">5</td>
+<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center">MC3</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">T</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('cntRefCnt4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;4&gt;</a></td>
+<td align="center">1</td>
 <td align="center">4</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center">MC4</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">T</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('cntRefCnt3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;3&gt;</a></td>
+<td align="center">1</td>
+<td align="center">3</td>
+<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
+<td align="center">MC7</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">T</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('csnOverlay1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay1</a></td>
+<td align="center">2</td>
+<td align="center">3</td>
+<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC10</td>
 <td align="center">STD</td>
 <td align="center"> </td>
@@ -1079,9 +1237,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('fsbBERR1r_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">fsb/BERR1r</a></td>
-<td align="center">2</td>
-<td align="center">4</td>
+<td width="28%"><a href="javascript:showEqn('csnOverlay0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay0</a></td>
+<td align="center">3</td>
+<td align="center">8</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
 <td align="center">MC13</td>
 <td align="center">STD</td>
@@ -1089,13 +1247,13 @@
 <td align="center"> </td>
 <td align="center">(b)</td>
 <td align="center">(b)</td>
-<td align="center">D</td>
+<td align="center">T</td>
 <td align="center"> </td>
 <td align="center"> </td>
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('IOU0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOU0</a></td>
+<td width="28%"><a href="javascript:showEqn('IOL0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOL0</a></td>
 <td align="center">3</td>
 <td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
@@ -1111,7 +1269,7 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsIOReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/IOReady</a></td>
+<td width="28%"><a href="javascript:showEqn('BERR_IOBS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">BERR_IOBS</a></td>
 <td align="center">4</td>
 <td align="center">8</td>
 <td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
@@ -1127,11 +1285,11 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></td>
-<td align="center">14</td>
-<td align="center">19</td>
+<td width="28%"><a href="javascript:showEqn('ramRASEL_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RASEL</a></td>
+<td align="center">20</td>
+<td align="center">15</td>
 <td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC4</td>
+<td align="center">MC1</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -1143,8 +1301,40 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('IOREQ')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOREQ</a></td>
-<td align="center">14</td>
+<td width="28%"><a href="javascript:showEqn('cntRefCnt7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefCnt&lt;7&gt;</a></td>
+<td align="center">1</td>
+<td align="center">7</td>
+<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
+<td align="center">MC3</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">T</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('ramRAMDIS2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS2</a></td>
+<td align="center">7</td>
+<td align="center">15</td>
+<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
+<td align="center">MC4</td>
+<td align="center">STD</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">(b)</td>
+<td align="center">(b)</td>
+<td align="center">T</td>
+<td align="center"> </td>
+<td align="center"> </td>
+<td align="center">RESET</td>
+</tr>
+<tr>
+<td width="28%"><a href="javascript:showEqn('iobsLoad1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/Load1</a></td>
+<td align="center">15</td>
 <td align="center">19</td>
 <td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
 <td align="center">MC13</td>
@@ -1159,9 +1349,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('BERR_IOBS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">BERR_IOBS</a></td>
-<td align="center">4</td>
-<td align="center">8</td>
+<td width="28%"><a href="javascript:showEqn('ramOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/Once</a></td>
+<td align="center">5</td>
+<td align="center">10</td>
 <td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
 <td align="center">MC16</td>
 <td align="center">STD</td>
@@ -1175,22 +1365,6 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('IORW0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IORW0</a></td>
-<td align="center">18</td>
-<td align="center">20</td>
-<td align="center"><a href="javascript:showFB('FB5')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB5</a></td>
-<td align="center">MC18</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">T</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
 <td width="28%"><a href="javascript:showEqn('iobmETACK_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/ETACK</a></td>
 <td align="center">1</td>
 <td align="center">6</td>
@@ -1207,9 +1381,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('ALE0M')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ALE0M</a></td>
-<td align="center">2</td>
-<td align="center">5</td>
+<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd3</a></td>
+<td align="center">3</td>
+<td align="center">6</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC3</td>
 <td align="center">STD</td>
@@ -1239,9 +1413,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd4</a></td>
-<td align="center">4</td>
-<td align="center">6</td>
+<td width="28%"><a href="javascript:showEqn('ALE0M')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ALE0M</a></td>
+<td align="center">3</td>
+<td align="center">5</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC7</td>
 <td align="center">STD</td>
@@ -1255,9 +1429,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd3</a></td>
+<td width="28%"><a href="javascript:showEqn('iobmIOS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobm/IOS_FSM_FFd2</a></td>
 <td align="center">5</td>
-<td align="center">10</td>
+<td align="center">11</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC10</td>
 <td align="center">STD</td>
@@ -1265,7 +1439,7 @@
 <td align="center"> </td>
 <td align="center">(b)</td>
 <td align="center">(b)</td>
-<td align="center">D</td>
+<td align="center">T</td>
 <td align="center"> </td>
 <td align="center"> </td>
 <td align="center">RESET</td>
@@ -1288,7 +1462,7 @@
 </tr>
 <tr>
 <td width="28%"><a href="javascript:showEqn('IOACT')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOACT</a></td>
-<td align="center">6</td>
+<td align="center">7</td>
 <td align="center">13</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC16</td>
@@ -1305,7 +1479,7 @@
 <tr>
 <td width="28%"><a href="javascript:showEqn('IOBERR')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IOBERR</a></td>
 <td align="center">9</td>
-<td align="center">14</td>
+<td align="center">13</td>
 <td align="center"><a href="javascript:showFB('FB6')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB6</a></td>
 <td align="center">MC18</td>
 <td align="center">STD</td>
@@ -1319,9 +1493,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('TimeoutB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutB</a></td>
-<td align="center">3</td>
-<td align="center">12</td>
+<td width="28%"><a href="javascript:showEqn('ramRAMReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMReady</a></td>
+<td align="center">16</td>
+<td align="center">15</td>
 <td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
 <td align="center">MC1</td>
 <td align="center">STD</td>
@@ -1329,15 +1503,15 @@
 <td align="center"> </td>
 <td align="center">(b)</td>
 <td align="center">(b)</td>
-<td align="center">T</td>
+<td align="center">D</td>
 <td align="center"> </td>
 <td align="center"> </td>
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntRefDone_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/RefDone</a></td>
-<td align="center">2</td>
-<td align="center">10</td>
+<td width="28%"><a href="javascript:showEqn('TimeoutB')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">TimeoutB</a></td>
+<td align="center">3</td>
+<td align="center">12</td>
 <td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
 <td align="center">MC3</td>
 <td align="center">STD</td>
@@ -1345,7 +1519,7 @@
 <td align="center"> </td>
 <td align="center">(b)</td>
 <td align="center">(b)</td>
-<td align="center">D</td>
+<td align="center">T</td>
 <td align="center"> </td>
 <td align="center"> </td>
 <td align="center">RESET</td>
@@ -1367,9 +1541,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('csnOverlay0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cs/nOverlay0</a></td>
-<td align="center">3</td>
-<td align="center">8</td>
+<td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd1</a></td>
+<td align="center">5</td>
+<td align="center">10</td>
 <td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
 <td align="center">MC7</td>
 <td align="center">STD</td>
@@ -1383,9 +1557,9 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('cntTimeoutBPre_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">cnt/TimeoutBPre</a></td>
-<td align="center">3</td>
-<td align="center">11</td>
+<td width="28%"><a href="javascript:showEqn('OpTxOpTxFX_DC182_INV783_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$$OpTx$FX_DC$182_INV$783</a></td>
+<td align="center">6</td>
+<td align="center">8</td>
 <td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
 <td align="center">MC10</td>
 <td align="center">STD</td>
@@ -1393,17 +1567,17 @@
 <td align="center"> </td>
 <td align="center">(b)</td>
 <td align="center">(b)</td>
-<td align="center">T</td>
 <td align="center"> </td>
 <td align="center"> </td>
-<td align="center">RESET</td>
+<td align="center"> </td>
+<td align="center"> </td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd2</a></td>
-<td align="center">13</td>
+<td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd3</a></td>
+<td align="center">11</td>
 <td align="center">14</td>
 <td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC16</td>
+<td align="center">MC13</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -1415,11 +1589,11 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('ramRAMReady_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMReady</a></td>
-<td align="center">16</td>
+<td width="28%"><a href="javascript:showEqn('iobsPS_FSM_FFd2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">iobs/PS_FSM_FFd2</a></td>
 <td align="center">15</td>
-<td align="center"><a href="javascript:showFB('FB7')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB7</a></td>
-<td align="center">MC18</td>
+<td align="center">20</td>
+<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
+<td align="center">MC4</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -1431,11 +1605,11 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('ramRASEL_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RASEL</a></td>
-<td align="center">20</td>
-<td align="center">15</td>
+<td width="28%"><a href="javascript:showEqn('RESDone')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">RESDone</a></td>
+<td align="center">1</td>
+<td align="center">3</td>
 <td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC1</td>
+<td align="center">MC7</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -1451,7 +1625,7 @@
 <td align="center">3</td>
 <td align="center">8</td>
 <td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC3</td>
+<td align="center">MC16</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
@@ -1463,43 +1637,11 @@
 <td align="center">RESET</td>
 </tr>
 <tr>
-<td width="28%"><a href="javascript:showEqn('ramRS_FSM_FFd1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RS_FSM_FFd1</a></td>
-<td align="center">5</td>
-<td align="center">10</td>
+<td width="28%"><a href="javascript:showEqn('IORW0')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IORW0</a></td>
+<td align="center">19</td>
+<td align="center">21</td>
 <td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC4</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">T</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramOnce_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/Once</a></td>
-<td align="center">5</td>
-<td align="center">10</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC7</td>
-<td align="center">STD</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">(b)</td>
-<td align="center">(b)</td>
-<td align="center">T</td>
-<td align="center"> </td>
-<td align="center"> </td>
-<td align="center">RESET</td>
-</tr>
-<tr>
-<td width="28%"><a href="javascript:showEqn('ramRAMDIS2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ram/RAMDIS2</a></td>
-<td align="center">7</td>
-<td align="center">15</td>
-<td align="center"><a href="javascript:showFB('FB8')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB8</a></td>
-<td align="center">MC13</td>
+<td align="center">MC18</td>
 <td align="center">STD</td>
 <td align="center"> </td>
 <td align="center"> </td>
diff --git a/cpld/XC95144XL/MXSE_html/fit/next.jpg b/cpld/XC95144XL/MXSE_html/fit/next.jpg
deleted file mode 100644
index b8bbb99..0000000
Binary files a/cpld/XC95144XL/MXSE_html/fit/next.jpg and /dev/null differ
diff --git a/cpld/XC95144XL/MXSE_html/fit/pin_legXC95.htm b/cpld/XC95144XL/MXSE_html/fit/pin_legXC95.htm
deleted file mode 100644
index db88bcb..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/pin_legXC95.htm
+++ /dev/null
@@ -1,13 +0,0 @@
-<html><body><pre>
-Legend :  NC  = Not Connected, unbonded pin
-         PGND = Unused I/O configured as additional Ground pin
-         TIE  = Unused I/O floating -- must tie to VCC, GND or other signal
-         VCC  = Dedicated Power Pin
-         GND  = Dedicated Ground Pin
-         TDI  = Test Data In, JTAG pin
-         TDO  = Test Data Out, JTAG pin
-         TCK  = Test Clock, JTAG pin
-         TMS  = Test Mode Select, JTAG pin
-         PE   = Port Enable pin
-  PROHIBITED  = User reserved pin
-</pre></body></html>
diff --git a/cpld/XC95144XL/MXSE_html/fit/pin_legXbr.htm b/cpld/XC95144XL/MXSE_html/fit/pin_legXbr.htm
deleted file mode 100644
index 00a6d2c..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/pin_legXbr.htm
+++ /dev/null
@@ -1,21 +0,0 @@
-<html><body><pre>
-Legend :  NC  = Not Connected, unbonded pin
-        PGND  = Unused I/O configured as additional Ground pin
-         KPR  = Unused I/O with weak keeper (leave unconnected)
-         WPU  = Unused I/O with weak pull up (leave unconnected)
-         WPD  = Unused I/O with weak pull down (leave unconnected)
-         TIE  = Unused I/O floating -- must tie to VCC, GND or other signal
-         VCC  = Dedicated Power Pin
-      VCCAUX  = Power supply for JTAG pins
-   VCCIO-3.3  = I/O supply voltage for LVTTL, LVCMOS33, SSTL3_I
-   VCCIO-2.5  = I/O supply voltage for LVCMOS25, SSTL2_I
-   VCCIO-1.8  = I/O supply voltage for LVCMOS18
-   VCCIO-1.5  = I/O supply voltage for LVCMOS15, HSTL_I
-        VREF  = Reference voltage for indicated input standard
-         GND  = Dedicated Ground Pin
-         TDI  = Test Data In, JTAG pin
-         TDO  = Test Data Out, JTAG pin
-         TCK  = Test Clock, JTAG pin
-         TMS  = Test Mode Select, JTAG pin
-  PROHIBITED  = User reserved pin
-</pre></body></html>
diff --git a/cpld/XC95144XL/MXSE_html/fit/pin_legXpla3.htm b/cpld/XC95144XL/MXSE_html/fit/pin_legXpla3.htm
deleted file mode 100644
index 8dad55d..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/pin_legXpla3.htm
+++ /dev/null
@@ -1,13 +0,0 @@
-<html><body><pre>
-Legend :  NC  = Not Connected, unbonded pin
-          PE  = Port Enable pin
-         WPU  = Unused with Internal Weak Pull Up
-         TIE  = Unused I/O floating -- must tie to VCC, GND or other signal
-         VCC  = Dedicated Power Pin
-         GND  = Dedicated Ground Pin
-         TDI  = Test Data In, JTAG pin
-         TDO  = Test Data Out, JTAG pin
-         TCK  = Test Clock, JTAG pin
-         TMS  = Test Mode Select, JTAG pin
-  PROHIBITED  = User reserved pin
-</pre></body></html>
diff --git a/cpld/XC95144XL/MXSE_html/fit/pins 2.htm b/cpld/XC95144XL/MXSE_html/fit/pins 2.htm
deleted file mode 100644
index 2c7fd7c..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/pins 2.htm	
+++ /dev/null
@@ -1,521 +0,0 @@
-<html>
-<head>
-<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
-<script src="pins.js"></script><link rel="stylesheet" type="text/css" href="style.css">
-</head>
-<body class="pgBgnd" id="XC95144XL">
-<span id="pin" class="pgRef"><table align="center" width="90%" border="0" cellpadding="0" cellspacing="0"><tr><td align="center" vlaign="bottom" width="90%"><h3>Pin List</h3></td></tr></table>
-<table align="center" width="90%" border="1" cellpadding="0" cellspacing="1">
-<tr>
-<th width="10%">Pin Num</th>
-<td width="20%" align="center">Pin Type</td>
-<th width="70%">Assigned Signal</th>
-</tr>
-<tr>
-<td width="10%" align="center">1</td>
-<td width="20%" align="center">I/O/GTS3</td>
-<td width="70%" align="center">KPR</td>
-</tr>
-<tr>
-<td width="10%" align="center">2</td>
-<td width="20%" align="center">I/O/GTS4</td>
-<td width="70%" align="center">KPR</td>
-</tr>
-<tr>
-<td width="10%" align="center">3</td>
-<td width="20%" align="center">I/O/GTS1</td>
-<td width="70%" align="center">KPR</td>
-</tr>
-<tr>
-<td width="10%" align="center">4</td>
-<td width="20%" align="center">I/O/GTS2</td>
-<td width="70%" align="center">KPR</td>
-</tr>
-<tr>
-<td width="10%" align="center">5</td>
-<td width="20%" align="center">VCCINT</td>
-<td width="70%" align="center">VCC</td>
-</tr>
-<tr>
-<td width="10%" align="center">6</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('nLDS_IOB')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">nLDS_IOB</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">7</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('nUDS_IOB')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">nUDS_IOB</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">8</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('nDoutOE')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">nDoutOE</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">9</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">A_FSB&lt;22&gt;</td>
-</tr>
-<tr>
-<td width="10%" align="center">10</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('nAS_IOB')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">nAS_IOB</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">11</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('nDTACK_FSB')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">nDTACK_FSB</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">12</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">A_FSB&lt;9&gt;</td>
-</tr>
-<tr>
-<td width="10%" align="center">13</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">nAS_FSB</td>
-</tr>
-<tr>
-<td width="10%" align="center">14</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('nBERR_FSB')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">nBERR_FSB</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">15</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">A_FSB&lt;5&gt;</td>
-</tr>
-<tr>
-<td width="10%" align="center">16</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">A_FSB&lt;2&gt;</td>
-</tr>
-<tr>
-<td width="10%" align="center">17</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('nOE')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">nOE</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">18</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">nBERR_IOB</td>
-</tr>
-<tr>
-<td width="10%" align="center">19</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">A_FSB&lt;6&gt;</td>
-</tr>
-<tr>
-<td width="10%" align="center">20</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">A_FSB&lt;7&gt;</td>
-</tr>
-<tr>
-<td width="10%" align="center">21</td>
-<td width="20%" align="center">GND</td>
-<td width="70%" align="center">GND</td>
-</tr>
-<tr>
-<td width="10%" align="center">22</td>
-<td width="20%" align="center">I/O/GCK1</td>
-<td width="70%" align="center">CLK2X_IOB</td>
-</tr>
-<tr>
-<td width="10%" align="center">23</td>
-<td width="20%" align="center">I/O/GCK2</td>
-<td width="70%" align="center">CLK_FSB</td>
-</tr>
-<tr>
-<td width="10%" align="center">24</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('nRAS')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">nRAS</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">25</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">nLDS_FSB</td>
-</tr>
-<tr>
-<td width="10%" align="center">26</td>
-<td width="20%" align="center">VCCIO</td>
-<td width="70%" align="center">VCC</td>
-</tr>
-<tr>
-<td width="10%" align="center">27</td>
-<td width="20%" align="center">I/O/GCK3</td>
-<td width="70%" align="center">CLK_IOB</td>
-</tr>
-<tr>
-<td width="10%" align="center">28</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">KPR</td>
-</tr>
-<tr>
-<td width="10%" align="center">29</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('nADoutLE1')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">nADoutLE1</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">30</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">KPR</td>
-</tr>
-<tr>
-<td width="10%" align="center">31</td>
-<td width="20%" align="center">GND</td>
-<td width="70%" align="center">GND</td>
-</tr>
-<tr>
-<td width="10%" align="center">32</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">KPR</td>
-</tr>
-<tr>
-<td width="10%" align="center">33</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('nVMA_IOB')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">nVMA_IOB</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">34</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">KPR</td>
-</tr>
-<tr>
-<td width="10%" align="center">35</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('RA1_SPECSIG')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">RA&lt;1&gt;</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">36</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">KPR</td>
-</tr>
-<tr>
-<td width="10%" align="center">37</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">KPR</td>
-</tr>
-<tr>
-<td width="10%" align="center">38</td>
-<td width="20%" align="center">VCCIO</td>
-<td width="70%" align="center">VCC</td>
-</tr>
-<tr>
-<td width="10%" align="center">39</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('RA3_SPECSIG')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">RA&lt;3&gt;</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">40</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">KPR</td>
-</tr>
-<tr>
-<td width="10%" align="center">41</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">KPR</td>
-</tr>
-<tr>
-<td width="10%" align="center">42</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('nROMCS')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">nROMCS</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">43</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">KPR</td>
-</tr>
-<tr>
-<td width="10%" align="center">44</td>
-<td width="20%" align="center">GND</td>
-<td width="70%" align="center">GND</td>
-</tr>
-<tr>
-<td width="10%" align="center">45</td>
-<td width="20%" align="center">TDI</td>
-<td width="70%" align="center">TDI</td>
-</tr>
-<tr>
-<td width="10%" align="center">46</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">KPR</td>
-</tr>
-<tr>
-<td width="10%" align="center">47</td>
-<td width="20%" align="center">TMS</td>
-<td width="70%" align="center">TMS</td>
-</tr>
-<tr>
-<td width="10%" align="center">48</td>
-<td width="20%" align="center">TCK</td>
-<td width="70%" align="center">TCK</td>
-</tr>
-<tr>
-<td width="10%" align="center">49</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">E_IOB</td>
-</tr>
-<tr>
-<td width="10%" align="center">50</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('RA5_SPECSIG')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">RA&lt;5&gt;</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">51</td>
-<td width="20%" align="center">VCCIO</td>
-<td width="70%" align="center">VCC</td>
-</tr>
-<tr>
-<td width="10%" align="center">52</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">nUDS_FSB</td>
-</tr>
-<tr>
-<td width="10%" align="center">53</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('RA6_SPECSIG')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">RA&lt;6&gt;</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">54</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">nDTACK_IOB</td>
-</tr>
-<tr>
-<td width="10%" align="center">55</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('RA7_SPECSIG')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">RA&lt;7&gt;</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">56</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">A_FSB&lt;4&gt;</td>
-</tr>
-<tr>
-<td width="10%" align="center">57</td>
-<td width="20%" align="center">VCCINT</td>
-<td width="70%" align="center">VCC</td>
-</tr>
-<tr>
-<td width="10%" align="center">58</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('RA8_SPECSIG')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">RA&lt;8&gt;</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">59</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">nVPA_IOB</td>
-</tr>
-<tr>
-<td width="10%" align="center">60</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('RA9_SPECSIG')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">RA&lt;9&gt;</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">61</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">nWE_FSB</td>
-</tr>
-<tr>
-<td width="10%" align="center">62</td>
-<td width="20%" align="center">GND</td>
-<td width="70%" align="center">GND</td>
-</tr>
-<tr>
-<td width="10%" align="center">63</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('RA11_SPECSIG')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">RA&lt;11&gt;</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">64</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">A_FSB&lt;8&gt;</td>
-</tr>
-<tr>
-<td width="10%" align="center">65</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('RA10_SPECSIG')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">RA&lt;10&gt;</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">66</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">A_FSB&lt;23&gt;</td>
-</tr>
-<tr>
-<td width="10%" align="center">67</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('nADoutLE0')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">nADoutLE0</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">68</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">A_FSB&lt;21&gt;</td>
-</tr>
-<tr>
-<td width="10%" align="center">69</td>
-<td width="20%" align="center">GND</td>
-<td width="70%" align="center">GND</td>
-</tr>
-<tr>
-<td width="10%" align="center">70</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('nAoutOE')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">nAoutOE</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">71</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">A_FSB&lt;20&gt;</td>
-</tr>
-<tr>
-<td width="10%" align="center">72</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('nDinLE')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">nDinLE</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">73</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">A_FSB&lt;19&gt;</td>
-</tr>
-<tr>
-<td width="10%" align="center">74</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('nCAS')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">nCAS</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">75</td>
-<td width="20%" align="center">GND</td>
-<td width="70%" align="center">GND</td>
-</tr>
-<tr>
-<td width="10%" align="center">76</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">A_FSB&lt;18&gt;</td>
-</tr>
-<tr>
-<td width="10%" align="center">77</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('nRAMLWE')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">nRAMLWE</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">78</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">A_FSB&lt;3&gt;</td>
-</tr>
-<tr>
-<td width="10%" align="center">79</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('nRAMUWE')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">nRAMUWE</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">80</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">A_FSB&lt;15&gt;</td>
-</tr>
-<tr>
-<td width="10%" align="center">81</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('nROMWE')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">nROMWE</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">82</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">A_FSB&lt;13&gt;</td>
-</tr>
-<tr>
-<td width="10%" align="center">83</td>
-<td width="20%" align="center">TDO</td>
-<td width="70%" align="center">TDO</td>
-</tr>
-<tr>
-<td width="10%" align="center">84</td>
-<td width="20%" align="center">GND</td>
-<td width="70%" align="center">GND</td>
-</tr>
-<tr>
-<td width="10%" align="center">85</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('nVPA_FSB')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">nVPA_FSB</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">86</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">A_FSB&lt;11&gt;</td>
-</tr>
-<tr>
-<td width="10%" align="center">87</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('RA0_SPECSIG')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">RA&lt;0&gt;</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">88</td>
-<td width="20%" align="center">VCCIO</td>
-<td width="70%" align="center">VCC</td>
-</tr>
-<tr>
-<td width="10%" align="center">89</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">A_FSB&lt;10&gt;</td>
-</tr>
-<tr>
-<td width="10%" align="center">90</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">A_FSB&lt;1&gt;</td>
-</tr>
-<tr>
-<td width="10%" align="center">91</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('RA2_SPECSIG')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">RA&lt;2&gt;</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">92</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">A_FSB&lt;12&gt;</td>
-</tr>
-<tr>
-<td width="10%" align="center">93</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">A_FSB&lt;14&gt;</td>
-</tr>
-<tr>
-<td width="10%" align="center">94</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('RA4_SPECSIG')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">RA&lt;4&gt;</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">95</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">A_FSB&lt;16&gt;</td>
-</tr>
-<tr>
-<td width="10%" align="center">96</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center">A_FSB&lt;17&gt;</td>
-</tr>
-<tr>
-<td width="10%" align="center">97</td>
-<td width="20%" align="center">I/O</td>
-<td width="70%" align="center"><a href="javascript:showEqn('nDinOE')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">nDinOE</a></td>
-</tr>
-<tr>
-<td width="10%" align="center">98</td>
-<td width="20%" align="center">VCCINT</td>
-<td width="70%" align="center">VCC</td>
-</tr>
-<tr>
-<td width="10%" align="center">99</td>
-<td width="20%" align="center">I/O/GSR</td>
-<td width="70%" align="center">nRES</td>
-</tr>
-<tr>
-<td width="10%" align="center">100</td>
-<td width="20%" align="center">GND</td>
-<td width="70%" align="center">GND</td>
-</tr>
-</table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
-<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
-<td align="right">
-<input type="button" onclick="javascript:showLegend('pinlegend.htm')" onmouseover="window.status='show Legend'; return true;" onmouseout="window.status=''" value="legend"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page">
-</td>
-</tr></table></span></form>
-</body>
-</html>
diff --git a/cpld/XC95144XL/MXSE_html/fit/pins.htm b/cpld/XC95144XL/MXSE_html/fit/pins.htm
index ca27360..50f2585 100644
--- a/cpld/XC95144XL/MXSE_html/fit/pins.htm
+++ b/cpld/XC95144XL/MXSE_html/fit/pins.htm
@@ -299,22 +299,22 @@
 <tr>
 <td width="10%" align="center">58</td>
 <td width="20%" align="center">I/O</td>
-<td width="70%" align="center">KPR</td>
+<td width="70%" align="center"><a href="javascript:showEqn('CLK25EN')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">CLK25EN</a></td>
 </tr>
 <tr>
 <td width="10%" align="center">59</td>
 <td width="20%" align="center">I/O</td>
-<td width="70%" align="center">KPR</td>
+<td width="70%" align="center"><a href="javascript:showEqn('CLK20EN')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">CLK20EN</a></td>
 </tr>
 <tr>
 <td width="10%" align="center">60</td>
 <td width="20%" align="center">I/O</td>
-<td width="70%" align="center">KPR</td>
+<td width="70%" align="center">SW&lt;1&gt;</td>
 </tr>
 <tr>
 <td width="10%" align="center">61</td>
 <td width="20%" align="center">I/O</td>
-<td width="70%" align="center">KPR</td>
+<td width="70%" align="center">SW&lt;0&gt;</td>
 </tr>
 <tr>
 <td width="10%" align="center">62</td>
@@ -369,12 +369,12 @@
 <tr>
 <td width="10%" align="center">72</td>
 <td width="20%" align="center">I/O</td>
-<td width="70%" align="center">KPR</td>
+<td width="70%" align="center"><a href="javascript:showEqn('nBR_IOB')" onmouseover="window.status='Show Equation'; return true;" onmouseout="window.status=''">nBR_IOB</a></td>
 </tr>
 <tr>
 <td width="10%" align="center">73</td>
 <td width="20%" align="center">I/O</td>
-<td width="70%" align="center">KPR</td>
+<td width="70%" align="center">nBG_IOB</td>
 </tr>
 <tr>
 <td width="10%" align="center">74</td>
@@ -469,7 +469,7 @@
 <tr>
 <td width="10%" align="center">92</td>
 <td width="20%" align="center">I/O</td>
-<td width="70%" align="center">KPR</td>
+<td width="70%" align="center">nIPL2</td>
 </tr>
 <tr>
 <td width="10%" align="center">93</td>
diff --git a/cpld/XC95144XL/MXSE_html/fit/print.jpg b/cpld/XC95144XL/MXSE_html/fit/print.jpg
deleted file mode 100644
index b558dec..0000000
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diff --git a/cpld/XC95144XL/MXSE_html/fit/products.gif b/cpld/XC95144XL/MXSE_html/fit/products.gif
deleted file mode 100644
index 7680404..0000000
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diff --git a/cpld/XC95144XL/MXSE_html/fit/purchase.gif b/cpld/XC95144XL/MXSE_html/fit/purchase.gif
deleted file mode 100644
index 177f4ba..0000000
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diff --git a/cpld/XC95144XL/MXSE_html/fit/spacer.gif b/cpld/XC95144XL/MXSE_html/fit/spacer.gif
deleted file mode 100644
index 0eba199..0000000
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diff --git a/cpld/XC95144XL/MXSE_html/fit/summary 2.htm b/cpld/XC95144XL/MXSE_html/fit/summary 2.htm
deleted file mode 100644
index be94ff0..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/summary 2.htm	
+++ /dev/null
@@ -1,155 +0,0 @@
-<html>
-<head>
-<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
-<script src="paths.js"></script><script src="summary.js"></script><link rel="stylesheet" type="text/css" href="../tim/toc.css">
-</head>
-<body class="pgBgnd" id="XC95144XL">
-<span id="summary" class="pgRef"><h3 align="center">Summary</h3>
-<table align="center" width="75%" border="1" cellspacing="0" cellpadding="3">
-<tr>
-<td width="40%"> <b>Design Name</b>
-</td>
-<td width="60%"> MXSE</td>
-</tr>
-<tr>
-<td width="40%"> <b>Fitting Status</b>
-</td>
-<td width="60%"> Successful</td>
-</tr>
-<tr>
-<td width="40%"> <b>Software Version</b>
-</td>
-<td width="60%"> P.20131013</td>
-</tr>
-<tr>
-<td width="40%"> <b>Device Used</b>
-</td>
-<td width="60%"> <a href="#" onclick="showDoc('XC95144XL')" onmouseover="window.status='show Device Info'; return true;" onmouseout="window.status=''">XC95144XL-10-TQ100</a>
-</td>
-</tr>
-<tr>
-<td width="40%"> <b>Date</b>
-</td>
-<td width="60%"> 12-11-2021,  6:24AM</td>
-</tr>
-</table></span><br><span id="sumres" class="pgRef"><h5 align="center">RESOURCES SUMMARY</h5>
-<table align="center" width="90%" border="1" cellspacing="0" cellpadding="0">
-<tr class="pgHeader">
-<th width="20%">Macrocells Used</th>
-<th width="20%">Pterms Used</th>
-<th width="20%">Registers Used</th>
-<th width="20%">Pins Used</th>
-<th width="20%">Function Block Inputs Used</th>
-</tr>
-<tr>
-<td width="20%" align="center">110/144  (77%)</td>
-<td width="20%" align="center">439/720  (61%)</td>
-<td width="20%" align="center">84/144  (59%)</td>
-<td width="20%" align="center">67/81  (83%)</td>
-<td width="20%" align="center">244/432  (57%)</td>
-</tr>
-</table></span><br><span id="pinres" class="pgRef"><h5 align="center">PIN RESOURCES</h5>
-<table align="center" width="90%" border="0" cellspacing="0" cellpadding="0"><tr>
-<td width="50%" valign="top"><table align="center" width="100%" border="1" cellspacing="0" cellpadding="0">
-<tr class="pgHeader">
-<th width="33%">Signal Type</th>
-<th width="33%">Required</th>
-<th width="33%">Mapped</th>
-</tr>
-<tr>
-<td width="33%"> Input</td>
-<td width="33%" align="center"> 31</td>
-<td width="33%" align="center"> 31</td>
-</tr>
-<tr>
-<td width="33%"> Output</td>
-<td width="33%" align="center"> 32</td>
-<td width="33%" align="center"> 32</td>
-</tr>
-<tr>
-<td width="33%"> Bidirectional</td>
-<td width="33%" align="center"> 0</td>
-<td width="33%" align="center"> 0</td>
-</tr>
-<tr>
-<td width="33%"> GCK</td>
-<td width="33%" align="center"> 3</td>
-<td width="33%" align="center"> 3</td>
-</tr>
-<tr>
-<td width="33%"> GTS</td>
-<td width="33%" align="center"> 0</td>
-<td width="33%" align="center"> 0</td>
-</tr>
-<tr>
-<td width="33%"> GSR</td>
-<td width="33%" align="center"> 1</td>
-<td width="33%" align="center"> 1</td>
-</tr>
-</table></td>
-<td width="50%" valign="top"><table align="center" width="100%" border="1" cellspacing="0" cellpadding="0">
-<tr class="pgHeader">
-<th width="33%">Pin Type</th>
-<th width="33%">Used</th>
-<th width="33%">Total</th>
-</tr>
-<tr>
-<td width="33%"> I/O</td>
-<td width="33%" align="center"> 
-              63</td>
-<td width="33%" align="center"> 74</td>
-</tr>
-<tr>
-<td width="33%"> GCK/IO</td>
-<td width="33%" align="center"> 3</td>
-<td width="33%" align="center"> 3</td>
-</tr>
-<tr>
-<td width="33%"> GTS/IO</td>
-<td width="33%" align="center"> 0</td>
-<td width="33%" align="center"> 4</td>
-</tr>
-<tr>
-<td width="33%"> GSR/IO</td>
-<td width="33%" align="center"> 1</td>
-<td width="33%" align="center"> 1</td>
-</tr>
-</table></td>
-</tr></table></span><br><span id="glbres" class="pgRef"><h5 align="center">GLOBAL RESOURCES</h5>
-<table align="center" width="90%" border="1" cellspacing="0" cellpadding="0">
-<tr>
-<td width="50%"> Signal mapped onto global clock net (GCK1)</td>
-<td width="50%"> CLK2X_IOB</td>
-</tr>
-<tr>
-<td width="50%"> Signal mapped onto global clock net (GCK2)</td>
-<td width="50%"> CLK_FSB</td>
-</tr>
-<tr>
-<td width="50%"> Signal mapped onto global clock net (GCK3)</td>
-<td width="50%"> CLK_IOB</td>
-</tr>
-<tr>
-<td width="50%"> Signal mapped onto global output enable net (GSR)</td>
-<td width="50%"> nRES</td>
-</tr>
-</table></span><br><span id="pwrres" class="pgRef"><h5 align="center">POWER DATA</h5>
-<table align="center" width="90%" border="1" cellspacing="0" cellpadding="0">
-<tr>
-<td width="50%"> Macrocells in high performance mode (MCHP)</td>
-<td width="50%"> 110</td>
-</tr>
-<tr>
-<td width="50%"> Macrocells in low power mode (MCLP)</td>
-<td width="50%"> 0</td>
-</tr>
-<tr>
-<td width="50%"> Total macrocells used (MC)</td>
-<td width="50%"> 110</td>
-</tr>
-</table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
-<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
-<td align="right"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page"></td>
-</tr></table></span></form>
-</body>
-</html>
diff --git a/cpld/XC95144XL/MXSE_html/fit/summary.htm b/cpld/XC95144XL/MXSE_html/fit/summary.htm
index 41a8c74..2c06e79 100644
--- a/cpld/XC95144XL/MXSE_html/fit/summary.htm
+++ b/cpld/XC95144XL/MXSE_html/fit/summary.htm
@@ -30,7 +30,7 @@
 <tr>
 <td width="40%"> <b>Date</b>
 </td>
-<td width="60%">  2-14-2022,  7:35PM</td>
+<td width="60%">  3-27-2022, 10:08AM</td>
 </tr>
 </table></span><br><span id="sumres" class="pgRef"><h5 align="center">RESOURCES SUMMARY</h5>
 <table align="center" width="90%" border="1" cellspacing="0" cellpadding="0">
@@ -42,11 +42,11 @@
 <th width="20%">Function Block Inputs Used</th>
 </tr>
 <tr>
-<td width="20%" align="center">105/144  (73%)</td>
-<td width="20%" align="center">434/720  (61%)</td>
-<td width="20%" align="center">80/144  (56%)</td>
-<td width="20%" align="center">67/81  (83%)</td>
-<td width="20%" align="center">227/432  (53%)</td>
+<td width="20%" align="center">115/144  (80%)</td>
+<td width="20%" align="center">458/720  (64%)</td>
+<td width="20%" align="center">89/144  (62%)</td>
+<td width="20%" align="center">74/81  (92%)</td>
+<td width="20%" align="center">258/432  (60%)</td>
 </tr>
 </table></span><br><span id="pinres" class="pgRef"><h5 align="center">PIN RESOURCES</h5>
 <table align="center" width="90%" border="0" cellspacing="0" cellpadding="0"><tr>
@@ -58,13 +58,13 @@
 </tr>
 <tr>
 <td width="33%"> Input</td>
-<td width="33%" align="center"> 32</td>
-<td width="33%" align="center"> 32</td>
+<td width="33%" align="center"> 36</td>
+<td width="33%" align="center"> 36</td>
 </tr>
 <tr>
 <td width="33%"> Output</td>
-<td width="33%" align="center"> 32</td>
-<td width="33%" align="center"> 32</td>
+<td width="33%" align="center"> 35</td>
+<td width="33%" align="center"> 35</td>
 </tr>
 <tr>
 <td width="33%"> Bidirectional</td>
@@ -96,7 +96,7 @@
 <tr>
 <td width="33%"> I/O</td>
 <td width="33%" align="center"> 
-              61</td>
+              68</td>
 <td width="33%" align="center"> 74</td>
 </tr>
 <tr>
@@ -133,7 +133,7 @@
 <table align="center" width="90%" border="1" cellspacing="0" cellpadding="0">
 <tr>
 <td width="50%"> Macrocells in high performance mode (MCHP)</td>
-<td width="50%"> 105</td>
+<td width="50%"> 115</td>
 </tr>
 <tr>
 <td width="50%"> Macrocells in low power mode (MCLP)</td>
@@ -141,7 +141,7 @@
 </tr>
 <tr>
 <td width="50%"> Total macrocells used (MC)</td>
-<td width="50%"> 105</td>
+<td width="50%"> 115</td>
 </tr>
 </table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
 <td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
diff --git a/cpld/XC95144XL/MXSE_html/fit/support.gif b/cpld/XC95144XL/MXSE_html/fit/support.gif
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diff --git a/cpld/XC95144XL/MXSE_html/fit/unmapinputdoc.htm b/cpld/XC95144XL/MXSE_html/fit/unmapinputdoc.htm
deleted file mode 100644
index fe242d6..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/unmapinputdoc.htm
+++ /dev/null
@@ -1,65 +0,0 @@
-<!doctype HTML public "-//W3C//DTD HTML 4.0 Frameset//EN">
-
-<html>
-
-<!--(==============================================================)-->
-<!--(Document created with RoboEditor. )============================-->
-<!--(==============================================================)-->
-
-<head>
-
-<title>unmapinputdoc</title>
-
-<!--(Meta)==========================================================-->
-
-<meta name=generator content="RoboHELP by eHelp Corporation - www.ehelp.com">
-<meta name=generator-major-version content=0.1>
-<meta name=generator-minor-version content=1>
-<meta name=filetype content=kadov>
-<meta name=filetype-version content=1>
-<meta name=page-count content=1>
-<meta name=layout-height content=353>
-<meta name=layout-width content=615>
-<meta name=date content="11 26, 2002 2:10:18 PM">
-
-
-
-<style>
-<!--
-p.whs1 {font-family: arial, sans-serif; font-size: 10pt;}
-
---></style><script language="javascript" title="WebHelpInlineScript">
-<!--
-function reDo() {
-  if (innerWidth != origWidth || innerHeight != origHeight)
-     location.reload();
-}
-if ((parseInt(navigator.appVersion) == 4) && (navigator.appName == "Netscape")) {
-	origWidth = innerWidth;
-	origHeight = innerHeight;
-	onresize = reDo;
-}
-//-->
-</script><style>
-<!--
-  div.WebHelpPopupMenu {position:absolute; left:0px; top:0px; z-index:4; visibility:hidden;}
-  p.WebHelpNavBar {text-align:right;}
--->
-</style>
-</head>
-
-<!--(Body)==========================================================-->
-
-
-<body>
-
-
-<h1>Unmapped Inputs</h1>
-
-<p class="whs1">This page shows 
- input signals which were either not mapped or <span style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">not 
- routed.</FONT></span></p>
-
-</body>
-
-</html>
diff --git a/cpld/XC95144XL/MXSE_html/fit/unmaplogicdoc.htm b/cpld/XC95144XL/MXSE_html/fit/unmaplogicdoc.htm
deleted file mode 100644
index 6371313..0000000
--- a/cpld/XC95144XL/MXSE_html/fit/unmaplogicdoc.htm
+++ /dev/null
@@ -1,68 +0,0 @@
-<!doctype HTML public "-//W3C//DTD HTML 4.0 Frameset//EN">
-
-<html>
-
-<!--(==============================================================)-->
-<!--(Document created with RoboEditor. )============================-->
-<!--(==============================================================)-->
-
-<head>
-
-<title>unmaplogicdoc</title>
-
-<!--(Meta)==========================================================-->
-
-<meta name=generator content="RoboHELP by eHelp Corporation - www.ehelp.com">
-<meta name=generator-major-version content=0.1>
-<meta name=generator-minor-version content=1>
-<meta name=filetype content=kadov>
-<meta name=filetype-version content=1>
-<meta name=page-count content=1>
-<meta name=layout-height content=353>
-<meta name=layout-width content=615>
-<meta name=date content="11 26, 2002 2:04:45 PM">
-
-
-
-<style>
-<!--
-p.whs1 {font-size: 22pt; font-weight: bold;}
-p.whs2 {font-family: arial, sans-serif; font-size: 10pt; font-weight: normal;}
-
---></style><script language="javascript" title="WebHelpInlineScript">
-<!--
-function reDo() {
-  if (innerWidth != origWidth || innerHeight != origHeight)
-     location.reload();
-}
-if ((parseInt(navigator.appVersion) == 4) && (navigator.appName == "Netscape")) {
-	origWidth = innerWidth;
-	origHeight = innerHeight;
-	onresize = reDo;
-}
-//-->
-</script><style>
-<!--
-  div.WebHelpPopupMenu {position:absolute; left:0px; top:0px; z-index:4; visibility:hidden;}
-  p.WebHelpNavBar {text-align:right;}
--->
-</style>
-</head>
-
-<!--(Body)==========================================================-->
-
-
-<body>
-
-
-<p class="whs1">Unmapped Logic</p>
-
-<p class="whs2">This page shows those equations whose 
- logic was either not placed or not <span style="font-family: arial, sans-serif;
-													font-size: 10pt;
-													font-weight: normal;"><FONT SIZE=2 style="font-size:10pt;">completely 
- placed in the specified device.</FONT></span></p>
-
-</body>
-
-</html>
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-<!doctype HTML public "-//W3C//DTD HTML 4.0 Frameset//EN">
-
-<html>
-
-<!--(==============================================================)-->
-<!--(Document created with RoboEditor. )============================-->
-<!--(==============================================================)-->
-
-<head>
-
-<title>CPLD Timing Analysis Glossary</title>
-
-<!--(Meta)==========================================================-->
-
-<meta http-equiv=Content-Type content="text/html; charset=UTF-8">
-<meta name=Author content=administrator>
-<meta name=generator content="RoboHELP by eHelp Corporation - www.ehelp.com">
-<meta name=generator-major-version content=0.1>
-<meta name=generator-minor-version content=1>
-<meta name=filetype content=kadov>
-<meta name=filetype-version content=1>
-<meta name=page-count content=1>
-<meta name=layout-height content=2677>
-<meta name=layout-width content=716>
-<meta name=date content="04 8, 2003 10:49:54 AM">
-
-
-<!--(Links)=========================================================-->
-
-<link rel=StyleSheet href=xilhtml.css>
-
-
-
-</head>
-
-<!--(Body)==========================================================-->
-
-
-<body>
-
-<h1>Introduction</h1>
-
-<p>This report is the result of a static timing analysis of your design 
- after it has been fit in the device that you selected. The timing values 
- given represent the worst-case values over the recommended operating conditions 
- for the part. </p>
-
-<h1>Overview</h1>
-
-<p>The timing report consists of a series of sections: </p>
-
-<h2>Summary</h2>
-
-<p>This table summarizes the external timing parameters for your device, 
- including <a href="#tPD"><!--kadov_tag{{<ignored>}}-->tPD<!--kadov_tag{{</ignored>}}--></a>, 
- <a href="#tCO"><!--kadov_tag{{<ignored>}}-->tCO<!--kadov_tag{{</ignored>}}--></a>, 
- <a href="#tSU"><!--kadov_tag{{<ignored>}}-->tSU<!--kadov_tag{{</ignored>}}--></a>, 
- <a href="#tCYC"><!--kadov_tag{{<ignored>}}-->tCYC<!--kadov_tag{{</ignored>}}--></a>, 
- and <a href="#fSYSTEM"><!--kadov_tag{{<ignored>}}-->fSYSTEM<!--kadov_tag{{</ignored>}}--></a>. 
- <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->For a more 
- detailed description of the timing model for your device, please refer 
- to the application notes linked below.</p>
-
-<h2>Timing Constraints</h2>
-
-<p>This section reports on any timing constraints that you created for 
- your design. Timing constraints can be entered using the Constraints Editor 
- tool, or by editing an Implementation Constraints File directly. For more 
- information on creating timing constraints, see the Constraints Guide. 
- </p>
-
-<p class=Note><span style="font-weight: bold;">Note</span> that if you 
- did not define any constraints for your design, then the timing analysis 
- software will automatically create a default set of constraints for you. 
- These include pad-to-pad, register-to-register, pad-to-register, and period 
- constraints. A constraint value of 0 <!--kadov_tag{{<ignored>}}-->ns<!--kadov_tag{{</ignored>}}--> 
- will be used for all of these automatically generated constraints. As 
- a result, all paths listed under each constraint will violate the constraint, 
- and will have a negative value for slack.</p>
-
-<p class=Note><span style="font-weight: bold;">Note</span> also that to 
- limit the size of the report, each path endpoint involved in a timing 
- path will only be listed once, under a single constraint. <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}--></p>
-
-<p>For each timing path listed under a constraint, there is a hyperlink 
- that can be used to open a window listing the individual internal delay 
- elements traversed in the path. To understand these delay elements, consult 
- the <a href="#Definitions">Definitions</a> section below, or the following 
- application notes and white papers: </p>
-
-<p><a href="http://www.xilinx.com/apps/epld.htm#CoolRunner2">XAPP375: Understanding 
- the <!--kadov_tag{{<ignored>}}-->CoolRunner-II<!--kadov_tag{{</ignored>}}--> 
- Timing Model</a> </p>
-
-<p><a href="http://www.xilinx.com/publications/whitepapers/index.htm">WP122: 
- Using the <!--kadov_tag{{<ignored>}}-->CoolRunner<!--kadov_tag{{</ignored>}}--> 
- XPLA3 Timing Model</a> </p>
-
-<p><a href="http://www.xilinx.com/apps/epld.htm#CoolRunner2">XAPP071: Using 
- the XC9500 Timing Model</a> </p>
-
-<p><a href="http://www.xilinx.com/apps/epld.htm#CoolRunner2">XAPP111: Using 
- the XC9500XL Timing Model</a></p>
-
-<p><a href="http://www.xilinx.com/apps/epld.htm#CoolRunner2"><!--kadov_tag{{<ignored>}}-->XAPP<!--kadov_tag{{</ignored>}}--> 
- 362: Using the XC9500XV Timing Model</a></p>
-
-<p>available in the literature section of <a href="http://www.xilinx.com"><!--kadov_tag{{<ignored>}}-->www.xilinx.com</a>.<!--kadov_tag{{</ignored>}}--> 
- </p>
-
-<h2>Data Sheet Report</h2>
-
-<p>This section of the report lists the external timing parameters for 
- your design. This includes; maximum external clock speed for each clock, 
- setup and hold times for each registered input, clock-to-output pad timing 
- for each registered output, clock to setup time for each register-to-register 
- timing path, and pad-to-pad time for each combinatorial path through your 
- design. </p>
-
-<h2>Going Further</h2>
-
-<p>To do more advanced timing analysis of your design, select the process 
- <span style="font-weight: bold;">Analyze Post-Fit Static Timing</span> 
- in <!--kadov_tag{{<ignored>}}-->iSE<!--kadov_tag{{</ignored>}}-->. This 
- will run <!--kadov_tag{{<ignored>}}-->Xilinx's<!--kadov_tag{{</ignored>}}--> 
- Timing Analyzer tool interactively. <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->The 
- Timing Analyzer provides a powerful, flexible, and easy way to perform 
- static timing analysis on <!--kadov_tag{{<ignored>}}-->FPGA<!--kadov_tag{{</ignored>}}--> 
- and <!--kadov_tag{{<ignored>}}-->CPLD<!--kadov_tag{{</ignored>}}--> designs. 
- With Timing Analyzer, analysis can be performed immediately after mapping, 
- placing or routing an <!--kadov_tag{{<ignored>}}-->FPGA<!--kadov_tag{{</ignored>}}--> 
- design, and after fitting and routing a <!--kadov_tag{{<ignored>}}-->CPLD<!--kadov_tag{{</ignored>}}--> 
- design. </p>
-
-<p>Timing Analyzer verifies that the delay along a given path or paths 
- meets specified timing requirements. It organizes and displays data that 
- allows you to analyze critical paths in a circuit, the cycle time of the 
- circuit, the delay along any specified <!--kadov_tag{{<ignored>}}-->path(s<!--kadov_tag{{</ignored>}}-->), 
- and the path with the greatest delay. It also provides a quick analysis 
- of the effect different speed grades have on the same design. <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}--></p>
-
-<p>Timing Analyzer performs setup and hold checks (skew analysis). It works 
- with synchronous systems composed of synchronous elements and combinatorial 
- logic. In synchronous design, Timing Analyzer takes into account all path 
- delays, including clock-to-out and setup requirements, while calculating 
- the worst-case timing of the design. </p>
-
-<p>Timing Analyzer creates timing analysis reports based on existing timing 
- constraints or user specified paths within the program. Timing reports 
- have a hierarchical browser to quickly jump to different sections of the 
- reports. Timing paths in reports can be cross probed to synthesis tools 
- (Exemplar and <!--kadov_tag{{<ignored>}}-->Synplicity<!--kadov_tag{{</ignored>}}-->) 
- and <!--kadov_tag{{<ignored>}}-->Floorplanner<!--kadov_tag{{</ignored>}}-->. 
- </p>
-
-<p>There are several ways to issue commands in Timing Analyzer. Timing 
- Analyzer can be controlled through <!--kadov_tag{{<ignored>}}-->GUI<!--kadov_tag{{</ignored>}}--> 
- features (menu commands) or its comprehensive macro command language facility. 
- You can select from menus, click toolbar buttons, type keyboard commands 
- in the console window, and run macros. </p>
-
-<h1><a name=Definitions></a>Definitions</h1>
-
-<h2><a name=tPD></a>Pad to Pad (<!--kadov_tag{{<ignored>}}-->tPD<!--kadov_tag{{</ignored>}}-->) 
- </h2>
-
-<p>Reports pad to pad paths that start at input pads and end at output 
- pads. The maximum external pad to pad delay. <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->Combinatorial 
- pad-to-pad paths begin at input pads, propagate through one or more levels 
- of combinatorial logic and end at output pads. Combinatorial paths also 
- trace through the enable inputs of 3-state controlled pads. Combinatorial 
- paths are not traced through clock, and asynchronous set and reset inputs 
- of registers. These paths are also broken at bidirectional pins</p>
-
-<h2><a name=tCO></a>Clock Pad to Output Pad (<!--kadov_tag{{<ignored>}}-->tCO<!--kadov_tag{{</ignored>}}-->) 
- </h2>
-
-<p>The maximum external clock pad to output pad delay. <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->Reports 
- paths that start at input <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->pads 
- trace through clock inputs of <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->registers 
- and end at output pads. Paths are not traced through PRE/<!--kadov_tag{{<ignored>}}-->CLR<!--kadov_tag{{</ignored>}}--> 
- <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->inputs 
- of registers. <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->You 
- can directly specify <!--kadov_tag{{<ignored>}}-->tCO<!--kadov_tag{{</ignored>}}--> 
- for all registered output paths in your design using the Pad-to-Pad <!--kadov_tag{{<ignored>}}-->timespec<!--kadov_tag{{</ignored>}}-->. 
- Clock-Pad-to-Pad paths for global clocks begin at global clock pads, propagate 
- through global clock buffers, and propagate through the flip-flop <!--kadov_tag{{<ignored>}}-->Q<!--kadov_tag{{</ignored>}}--> 
- output and any number of levels of combinatorial logic and end at the 
- output pad. Clock-Pad-to-Pad paths for product term clock paths begin 
- at input pads, propagate through any number of logic levels feeding into 
- a clock product term, propagate through the flip-flop <!--kadov_tag{{<ignored>}}-->Q<!--kadov_tag{{</ignored>}}--> 
- output and any number of levels of combinatorial logic and end at the 
- output pad. Clock-Pad-to-Pad paths also trace through the enable inputs 
- of 3-state controlled pads.</p>
-
-<h2><a name=tSU></a>Setup to Clock at Pad (<!--kadov_tag{{<ignored>}}-->tSU<!--kadov_tag{{</ignored>}}--> 
- or <!--kadov_tag{{<ignored>}}-->tSUF<!--kadov_tag{{</ignored>}}-->) </h2>
-
-<p>Reports external setup time of data <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->to 
- clock at pad. Data path starts at an input pad and ends at register <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->(Fast 
- Input Register for <!--kadov_tag{{<ignored>}}-->tSUF<!--kadov_tag{{</ignored>}}-->) 
- D/<!--kadov_tag{{<ignored>}}-->T<!--kadov_tag{{</ignored>}}--> <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->input. 
- Clock path starts at input pad and ends at the register clock input. <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->Paths 
- are not traced through registers. Pin-to-pin setup requirement is not 
- reported or guaranteed for product-term clocks derived from <!--kadov_tag{{<ignored>}}-->macrocell<!--kadov_tag{{</ignored>}}--> 
- feedback signals. </p>
-
-<p>The minimum required setup time for flip-flops. <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->You 
- can specify the <!--kadov_tag{{<ignored>}}-->tSU<!--kadov_tag{{</ignored>}}--> 
- (setup-to-clock) for all inputs in your design relative to a global clock 
- or product term clock. Each <!--kadov_tag{{<ignored>}}-->tSU<!--kadov_tag{{</ignored>}}--> 
- OFFSET timespec involves an input path and a clock path. Input paths start 
- at input pads, propagate through input buffers and any number of combinatorial 
- logic levels before ending at a flip-flop D/T input, including the receiving 
- flip-flop's tSU. <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->Input 
- paths are not traced through flip-flop clock pins, asynchronous set/reset 
- inputs or bidirectional I/O pins. Global clock paths start at global clock 
- pads, propagate through global clock buffers and end at the flip-flop 
- clock pin. Product term clock paths start at input pads, propagate through 
- a single level of logic implemented in a clock product term and end at 
- the flip-flop clock pin.</p>
-
-<h2><a name=tCYC></a>Clock to Setup (tCYC) </h2>
-
-<p>Register to register cycle time. Includes source register tCO and destination 
- register tSU. </p>
-
-<p class=Note><span style="font-weight: bold;">Note</span> that when the 
- computed Maximum Clock Speed is limited by tCYC, it is computed assuming 
- that all registers are rising-edge sensitive. </p>
-
-<h2><a name=fSYSTEM></a>fSYSTEM </h2>
-
-<p>Maximum clock operating frequency. <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->You 
- can specify the fSYSTEM (clock frequency or period) for all registered 
- paths in your design using a Register-to-Register timespec. Register-to-Register 
- paths begin at flip-flop clock inputs, propagate through the flip-flop 
- Q output and any number of levels of combinatorial logic and end at the 
- receiving flip-flop D/T input, including the receiving flip-flop's tSU. 
- When these flip-flops are clocked by the same clock, the delay on this 
- path is equivalent to the cycle time of the clock. Registered paths do 
- not propagate through clock, and asynchronous set and reset inputs of 
- registers as shown below. These paths are also broken at bidirectional 
- pins.</p>
-
-<p>&nbsp;</p>
-
-</body>
-
-</html>
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-<!-- $Id: cpldta_style.css,v 1.2 2003/03/20 05:15:52 soeren Exp $  -->
-<!-- Stylesheet for the CPLD HTML Timing Report                  -->
-
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-<!-- Following used for the header of the notes and warnings table  -->
-.cpldta_warnings_header {
-	font-style: normal;
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-	font-size: 10pt;
-	font-family: Arial, Helvetica, sans-serif;
-	text-align: center;
-	background-color: #FFFFCC; }
-
-<!-- style for general text value fields  -->
-.cpldta_text_normal {
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-	font-weight: normal;
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-	
-<!-- style for general text label fields  -->
-.cpldta_text_normal_bold {
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-.cpldta_constraint_description_normal {
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-.cpldta_constraint_name {
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-.cpldta_delaytable_header {
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-<head>
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-<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
-</head>
-<frameset rows="94,*" cols="*" frameborder="NO" border="0" framespacing="0">;
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-</body>
-</noframes> 
-</html>
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-<html>
-<head>
-<title>Timing Navigation</title>
-<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
-<link rel="stylesheet" type="text/css" href="../tim/toc.css">
-</head>
-
-<body bgcolor="#CCCCCC" text="#000000" onLoad="parent.frames.mainFrame.location='timing_report.htm'">
-<table width="100%" border="0" cellspacing="0" cellpadding="0">
-  <tr> 
-    <td colspan="3"> 
-      <div align="left"><SPAN class="HEADING">Timing Report</span></div>
-    </td>
-  </tr>
-  <tr>
-    <td width="7">&nbsp;</td>
-    <td colspan="2"><a href="timing_report.htm#TimingReport" target="mainFrame" class="SECONDARY-NAV">Description</a></td>
-  </tr>
-  <tr> 
-    <td width="7">&nbsp;</td>
-    <td colspan="2"><a href="timing_report.htm#Summary" target="mainFrame" class="SECONDARY-NAV">Summary</a></td>
-  </tr>
-  <tr> 
-    <td width="7">&nbsp;</td>
-    <td colspan="2"><a href="timing_report.htm#TimingConstraints" target="mainFrame" class="SECONDARY-NAV">Constraints</a></td>
-  </tr>
-  <tr> 
-    <td width="7">&nbsp;</td>
-    <td colspan="2"><a href="cpldta_glossary.htm" target="mainFrame" class="SECONDARY-NAV">Definitions</a></td>
-  </tr>
-  <tr> 
-    <td width="7">&nbsp;</td>
-    <td colspan="2">&nbsp;</td>
-  </tr>
-</table>
-</body>
-</html>
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-</body>
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-</html>
diff --git a/cpld/XC95144XL/MXSE_html/tim/timing_report 2.htm b/cpld/XC95144XL/MXSE_html/tim/timing_report 2.htm
deleted file mode 100644
index d147136..0000000
--- a/cpld/XC95144XL/MXSE_html/tim/timing_report 2.htm	
+++ /dev/null
@@ -1,2935 +0,0 @@
-<!DOCTYPE HTML PUBLIC "-//w3c//dtd html 4.0 transitional//en">
-<HTML>
-<HEAD>
-<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
-<meta name="Generator" content="Timing Report Generator:  version P.20131013">
-<meta name="Author" content="Copyright (c) 1995-2013 Xilinx, Inc.  All rights reserved.">
-<meta name="Description" content="Timing report for MXSE">
-<TITLE>Timing report for MXSE</TITLE>
-<script language="Javascript"> 
-<!-- 
-   function popWin(url,w,h,name){ 
-   window.open(url,name,'scrollbars=yes,resizable=Yes,WIDTH='+w+',height='+h); 
-   } 
-//--> 
-</script>
-</HEAD>
-<A NAME="Top"></a>
-<A NAME="TimingReport"></a><h1 ALIGN="center" CLASS="cpldta_text_report_header">Timing Report</h1>
-<CENTER><SPAN CLASS="cpldta_text_normal_bold"><A HREF="cpldta_glossary.htm"><B>Need help reading this report?</B></A></SPAN></CENTER><BR>
-<TABLE  WIDTH="60%" border="1" ALIGN="center">
- <TR>
-  <TD WIDTH="35%" CLASS="cpldta_text_normal_bold"><B>Design Name</B></TD>
-  <TD WIDTH="65%" CLASS="cpldta_text_normal">MXSE</TD>
- </TR>
- <TR>
-  <TD WIDTH="35%" CLASS="cpldta_text_normal_bold"><B>Device, Speed (SpeedFile Version)</B></TD>
-  <TD WIDTH="65%" CLASS="cpldta_text_normal"><A HREF="Javascript:popWin('http://www.xilinx.com/literature/index.htm','800','800','test');">XC95144XL</A>, -10 (3.0)</TD>
- </TR>
- <TR>
-  <TD WIDTH="35%" CLASS="cpldta_text_normal_bold"><B>Date Created</B></TD>  <TD WIDTH="65%" CLASS="cpldta_text_normal">Sat Dec 11 06:24:30 2021
-</TD>
- </TR>
- <TR>
-  <TD WIDTH="35%" CLASS="cpldta_text_normal_bold"><B>Created By</B></TD>  <TD WIDTH="65%" CLASS="cpldta_text_normal">Timing Report Generator:  version P.20131013</TD>
- </TR>
- <TR>
-  <TD WIDTH="35%" CLASS="cpldta_text_normal_bold"><B>Copyright</B></TD>  <TD WIDTH="65%" CLASS="cpldta_text_normal">Copyright (c) 1995-2013 Xilinx, Inc.  All rights reserved.</TD>
- </TR>
-</TABLE>
-<A NAME="Summary"></a><h2 ALIGN="center" CLASS="cpldta_text_section_header">Summary</h2>
-<TABLE WIDTH="80%" border="1" ALIGN="center">
- <TR CLASS="cpldta_warnings_header">
-  <TH BGCOLOR="#FFFFCC" WIDTH="100%" colspan="2">Performance Summary</TH>
- </TR>
- <TR>
-  <TD WIDTH="65%" CLASS="cpldta_text_normal_bold"><B>Min. Clock Period</B></TD>
-  <TD WIDTH="35%" CLASS="cpldta_text_normal">20.100 ns.</TD>
- </TR>
- <TR>
-  <TD WIDTH="65%" CLASS="cpldta_text_normal_bold"><B>Max. Clock Frequency </B><A HREF="cpldta_glossary.htm#fSYSTEM">(fSYSTEM)</A></TD>
-  <TD WIDTH="35%" CLASS="cpldta_text_normal">49.751 MHz. </TD>
- </TR>
- <TR>
-  <TD WIDTH="100%" colspan="2" CLASS="cpldta_text_normal">Limited by Cycle Time for CLK_FSB</TD>
- </TR>
- <TR>
-  <TD WIDTH="65%" CLASS="cpldta_text_normal_bold"><B>Clock to Setup </B><A HREF="cpldta_glossary.htm#tCYC">(tCYC)</A></TD>
-  <TD WIDTH="35%" CLASS="cpldta_text_normal">20.100 ns. </TD>
- </TR>
- <TR>
-  <TD WIDTH="65%" CLASS="cpldta_text_normal_bold"><B>Pad to Pad Delay </B><A HREF="cpldta_glossary.htm#tPD">(tPD)</A></TD>
-  <TD WIDTH="35%" CLASS="cpldta_text_normal">11.000 ns. </TD>
- </TR>
- <TR>
-  <TD WIDTH="65%" CLASS="cpldta_text_normal_bold"><B>Setup to Clock at the Pad </B><A HREF="cpldta_glossary.htm#tSU">(tSU)</A></TD>
-  <TD WIDTH="35%" CLASS="cpldta_text_normal">16.600 ns. </TD>
- </TR>
- <TR>
-  <TD WIDTH="65%" CLASS="cpldta_text_normal_bold"><B>Clock Pad to Output Pad Delay </B><A HREF="cpldta_glossary.htm#tCO">(tCO)</A></TD>
-  <TD WIDTH="35%" CLASS="cpldta_text_normal">14.500 ns. </TD>
- </TR>
-</TABLE>
-<HR>
-<A NAME="TimingConstraints"></a><h2 ALIGN="center" CLASS="cpldta_text_section_header">Timing Constraints</h2>
-<TABLE  WIDTH="80%" border="1" ALIGN="center">
- <TR>
-  <TH BGCOLOR="#FFFFCC" CLASS="cpldta_constraint_header">Constraint Name</TH>
-  <TH BGCOLOR="#FFFFCC" WIDTH="15%" CLASS="cpldta_time_header">Requirement (ns)</TH>
-  <TH BGCOLOR="#FFFFCC" WIDTH="15%" CLASS="cpldta_time_header">Delay (ns)</TH>
-  <TH BGCOLOR="#FFFFCC" WIDTH="15%" CLASS="cpldta_time_header">Paths</TH>
-  <TH BGCOLOR="#FFFFCC" WIDTH="15%" CLASS="cpldta_time_header">Paths Failing</TH>
- </TR>
- <TR>
-  <TD ALIGN="left" CLASS="cpldta_constraint_name"><A HREF="#TS_CLK_IOB">TS_CLK_IOB</A></TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value">142.8</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value">0.0</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value">0</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value">0</TD>
- </TR>
- <TR>
-  <TD ALIGN="left" CLASS="cpldta_constraint_name"><A HREF="#TS_CLK_FSB">TS_CLK_FSB</A></TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value">40.0</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value">20.1</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value">273</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value">0</TD>
- </TR>
- <TR>
-  <TD ALIGN="left" CLASS="cpldta_constraint_name"><A HREF="#TS_CLK2X_IOB">TS_CLK2X_IOB</A></TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value">66.6</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value">11.0</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value">120</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value">0</TD>
- </TR>
-</TABLE>
-</BR>
-</BR>
-<A NAME="TS_CLK_IOB">
-<h3 CLASS="cpldta_text_subsection_header">Constraint: TS_CLK_IOB</h3>
- <TABLE  WIDTH="80%" border="1" ALIGN="center">
-  <CAPTION CLASS="cpldta_text_caption"><B>Description: PERIOD:CLK_IOB:142.857nS:HIGH:71.428nS</B></CAPTION>
-  <TR CLASS="cpldta_delaytable_header">
-   <TH BGCOLOR="#FFFFCC" WIDTH="40%" CLASS="cpldta_constraint_header">Path</TH>
-   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Requirement (ns)</TH>
-   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Delay (ns)</TH>
-   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Slack (ns)</TH>
-  </TR>
- </TABLE>
- </BR>
- </BR>
-<A NAME="TS_CLK_FSB">
-<h3 CLASS="cpldta_text_subsection_header">Constraint: TS_CLK_FSB</h3>
- <TABLE  WIDTH="80%" border="1" ALIGN="center">
-  <CAPTION CLASS="cpldta_text_caption"><B>Description: PERIOD:CLK_FSB:40.000nS:HIGH:20.000nS</B></CAPTION>
-  <TR CLASS="cpldta_delaytable_header">
-   <TH BGCOLOR="#FFFFCC" WIDTH="40%" CLASS="cpldta_constraint_header">Path</TH>
-   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Requirement (ns)</TH>
-   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Delay (ns)</TH>
-   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Slack (ns)</TH>
-  </TR>
-  <TR>
-   <A NAME="_TimeoutA_Q_to_fsb_VPA_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_TimeoutA_Q_to_fsb_VPA_D();">TimeoutA.Q to fsb/VPA.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">20.100</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">19.900</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_TimeoutA_Q_to_fsb_VPA_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("TimeoutA.Q to fsb/VPA.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">TimeoutA</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPDI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">8.700</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/VPA__or00001/fsb/VPA__or00001_D2.UIM</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPTA2 + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.400</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/VPA.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
-</SCRIPT>
-  <TR>
-   <A NAME="_cs_nOverlay1_Q_to_fsb_VPA_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_cs_nOverlay1_Q_to_fsb_VPA_D();">cs/nOverlay1.Q to fsb/VPA.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">20.100</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">19.900</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_cs_nOverlay1_Q_to_fsb_VPA_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("cs/nOverlay1.Q to fsb/VPA.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cs/nOverlay1</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPDI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">8.700</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/VPA__or00001/fsb/VPA__or00001_D2.UIM</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPTA2 + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.400</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/VPA.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
-</SCRIPT>
-  <TR>
-   <A NAME="_fsb_Ready2r_Q_to_fsb_VPA_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_Ready2r_Q_to_fsb_VPA_D();">fsb/Ready2r.Q to fsb/VPA.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">20.100</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">19.900</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_fsb_Ready2r_Q_to_fsb_VPA_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("fsb/Ready2r.Q to fsb/VPA.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/Ready2r</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPDI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">8.700</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/VPA__or00001/fsb/VPA__or00001_D2.UIM</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPTA2 + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.400</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/VPA.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
-</SCRIPT>
- </TABLE>
- </BR>
- </BR>
-<A NAME="TS_CLK2X_IOB">
-<h3 CLASS="cpldta_text_subsection_header">Constraint: TS_CLK2X_IOB</h3>
- <TABLE  WIDTH="80%" border="1" ALIGN="center">
-  <CAPTION CLASS="cpldta_text_caption"><B>Description: PERIOD:CLK2X_IOB:66.666nS:HIGH:33.333nS</B></CAPTION>
-  <TR CLASS="cpldta_delaytable_header">
-   <TH BGCOLOR="#FFFFCC" WIDTH="40%" CLASS="cpldta_constraint_header">Path</TH>
-   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Requirement (ns)</TH>
-   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Delay (ns)</TH>
-   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Slack (ns)</TH>
-  </TR>
-  <TR>
-   <A NAME="_IOBERR_Q_to_IOBERR_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK2X_IOB_IOBERR_Q_to_IOBERR_D();">IOBERR.Q to IOBERR.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">66.600</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">55.600</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK2X_IOB_IOBERR_Q_to_IOBERR_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("IOBERR.Q to IOBERR.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">IOBERR</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">IOBERR.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
-</SCRIPT>
-  <TR>
-   <A NAME="_iobm_BERRrf_Q_to_IOACT_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK2X_IOB_iobm_BERRrf_Q_to_IOACT_D();">iobm/BERRrf.Q to IOACT.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">33.300</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">22.300</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK2X_IOB_iobm_BERRrf_Q_to_IOACT_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("iobm/BERRrf.Q to IOACT.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobm/BERRrf</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">IOACT.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
-</SCRIPT>
-  <TR>
-   <A NAME="_iobm_BERRrf_Q_to_IOBERR_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK2X_IOB_iobm_BERRrf_Q_to_IOBERR_D();">iobm/BERRrf.Q to IOBERR.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">33.300</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.000</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">22.300</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK2X_IOB_iobm_BERRrf_Q_to_IOBERR_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("iobm/BERRrf.Q to IOBERR.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">iobm/BERRrf</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">IOBERR.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
-</SCRIPT>
- </TABLE>
- </BR>
- </BR>
-  <BR><B>Number of constraints not met:</B>&nbsp;0<BR>
-<HR>
-<A NAME="DataSheet"></a>
-<h2 ALIGN="center" CLASS="cpldta_text_section_header">Data Sheet Report</h2>
- <A NAME="ClockSpeedList"></a>
- <h3 CLASS="cpldta_text_subsection_header">Maximum External Clock Speeds</h3>
- <TABLE  WIDTH="80%" border="1" ALIGN="center">
-  <TR>
-   <TH BGCOLOR="#FFFFCC" WIDTH="40%" CLASS="cpldta_constraint_header">Clock</TH>
-   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">fEXT (MHz)</TH>
-   <TH BGCOLOR="#FFFFCC" WIDTH="40%" CLASS="cpldta_constraint_header">Reason</TH>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">CLK_IOB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">111.111</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">Limited by Clock Pulse Width for CLK_IOB</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">CLK_FSB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">49.751</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">Limited by Cycle Time for CLK_FSB</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">CLK2X_IOB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">90.909</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">Limited by Cycle Time for CLK2X_IOB</TD>
-  </TR>
- </TABLE>
- <BR>
- <A NAME="SetupHoldTimesForClocks"></a>
- <h3 CLASS="cpldta_text_subsection_header">Setup/Hold Times for Clocks</h3>
- <TABLE  WIDTH="80%" border="1" ALIGN="center">
-  <CAPTION CLASS="cpldta_text_caption"><B>Setup/Hold Times for Clock CLK_IOB</B></CAPTION>
-  <TR>
-   <TH BGCOLOR="#FFFFCC" WIDTH="60%" CLASS="cpldta_constraint_header">Source Pad</TH>
-   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Setup to clk (edge) </TH>
-   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Hold to clk (edge) </TH>
-  </TR>
-  <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">E_IOB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">6.500</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
-  </TR>
- </TABLE><BR>
- <TABLE  WIDTH="80%" border="1" ALIGN="center">
-  <CAPTION CLASS="cpldta_text_caption"><B>Setup/Hold Times for Clock CLK_FSB</B></CAPTION>
-  <TR>
-   <TH BGCOLOR="#FFFFCC" WIDTH="60%" CLASS="cpldta_constraint_header">Source Pad</TH>
-   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Setup to clk (edge) </TH>
-   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Hold to clk (edge) </TH>
-  </TR>
-  <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<10></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">16.600</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<11></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">16.600</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<12></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">16.600</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<13></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">16.600</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<14></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">16.600</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<15></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">16.600</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<16></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">16.600</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<17></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">16.600</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<18></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">16.600</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<19></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">16.600</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<20></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">16.600</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<21></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">16.600</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<22></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">16.600</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<23></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">16.600</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<8></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">16.600</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<9></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">16.600</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">nAS_FSB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">7.900</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">nLDS_FSB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">6.500</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">nUDS_FSB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">6.500</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">nWE_FSB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">16.600</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
-  </TR>
- </TABLE><BR>
- <TABLE  WIDTH="80%" border="1" ALIGN="center">
-  <CAPTION CLASS="cpldta_text_caption"><B>Setup/Hold Times for Clock CLK2X_IOB</B></CAPTION>
-  <TR>
-   <TH BGCOLOR="#FFFFCC" WIDTH="60%" CLASS="cpldta_constraint_header">Source Pad</TH>
-   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Setup to clk (edge) </TH>
-   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Hold to clk (edge) </TH>
-  </TR>
-  <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">CLK_IOB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">7.500</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">nBERR_IOB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">7.500</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">nDTACK_IOB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">6.500</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">nRES</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">6.500</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">nVPA_IOB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">6.500</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
-  </TR>
- </TABLE><BR>
- <BR>
- <A NAME="ClockToPadTiming"></a>
- <h3 CLASS="cpldta_text_subsection_header">Clock to Pad Timing</h3>
- <TABLE  WIDTH="80%" border="1" ALIGN="center">
-  <CAPTION CLASS="cpldta_text_caption"><B>Clock CLK_FSB to Pad</B></CAPTION>
-  <TR>
-   <TH BGCOLOR="#FFFFCC" WIDTH="80%" CLASS="cpldta_constraint_header">Destination Pad</TH>
-   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Clock (edge) to Pad </TH>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<0></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">14.500</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<8></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">14.500</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<1></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<2></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<3></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<4></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<5></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<6></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<7></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<9></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nADoutLE0</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nBERR_FSB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nRAMLWE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nRAMUWE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nRAS</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nROMCS</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nVPA_FSB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nADoutLE1</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">5.800</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nCAS</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">5.800</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">5.800</TD>
-  </TR>
- </TABLE><BR>
- <TABLE  WIDTH="80%" border="1" ALIGN="center">
-  <CAPTION CLASS="cpldta_text_caption"><B>Clock CLK2X_IOB to Pad</B></CAPTION>
-  <TR>
-   <TH BGCOLOR="#FFFFCC" WIDTH="80%" CLASS="cpldta_constraint_header">Destination Pad</TH>
-   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Clock (edge) to Pad </TH>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nADoutLE0</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nAS_IOB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">5.800</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nDinLE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">5.800</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nDoutOE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">5.800</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nLDS_IOB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">5.800</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nUDS_IOB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">5.800</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nVMA_IOB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">5.800</TD>
-  </TR>
- </TABLE><BR>
- <BR>
- <A NAME="ClockToSetupTimesForClocks"></a>
- <h3 CLASS="cpldta_text_subsection_header">Clock to Setup Times for Clocks</h3>
- <TABLE  WIDTH="80%" border="1" ALIGN="center">
-  <CAPTION CLASS="cpldta_text_caption"><B>Clock to Setup for clock CLK_FSB</B></CAPTION>
-  <TR>
-   <TH BGCOLOR="#FFFFCC" WIDTH="40%" CLASS="cpldta_constraint_header">Source</TH>
-   <TH BGCOLOR="#FFFFCC" WIDTH="40%" CLASS="cpldta_constraint_header">Destination</TH>
-   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Delay</TH>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">20.100</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">20.100</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready2r.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">20.100</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">20.100</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">19.100</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">19.100</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">BERR_IOBS.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">BERR_IOBS.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IORW0.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IORW0.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<5>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<5>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<5>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RASEL.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<6>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<6>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<6>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RASEL.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<7>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<7>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<7>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RASEL.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefDone.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefDone.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefDone.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RASEL.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IORW0.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IORW1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Once.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RASEL.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IORW0.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RASEL.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/BERR0r.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/BERR0r.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/BERR1r.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/BERR1r.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready0r.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready1r.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready1r.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready2r.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOReady.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOReady.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Once.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IORW0.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Once.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Once.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IORW0.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IORW0.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IORW0.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/Once.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RASEL.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RASEL.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RASEL.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready2r.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<0>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<6>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<1>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<6>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<2>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<6>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<3>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<6>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<4>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<6>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<5>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<6>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<5>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<5>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<5>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<6>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<6>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<6>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<7>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<7>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<7>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefDone.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefDone.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefDone.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOREQ.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready1r.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready2r.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Load1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/Once.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready2r.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IORW1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/Once.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready0r.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready1r.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready1r.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready2r.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready2r.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOACTr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IORW1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IORW1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOReady.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready1r.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IORW1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Once.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOREQ.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IORW1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Once.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOREQ.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready1r.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Once.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/BACTr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/BACTr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/BACTr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RASEL.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/Once.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/Once.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/Once.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/Once.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/Once.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/Once.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/Once.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/Once.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RASEL.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">BERR_IOBS.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">BERR_IOBS.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">BERR_IOBS.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/BERR1r.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RefAck.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefDone.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/BERR0r.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<0>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<0>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<0>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<1>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<0>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<2>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<0>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<3>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<0>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<4>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<0>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<5>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<0>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<7>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<0>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefDone.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<0>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimeoutBPre.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<1>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<1>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<1>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<2>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<1>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<3>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<1>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<4>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<1>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<5>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<1>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<7>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<1>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefDone.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<1>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimeoutBPre.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<2>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<2>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<2>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<3>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<2>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<4>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<2>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<5>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<2>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<7>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<2>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefDone.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<2>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimeoutBPre.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<3>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<3>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<3>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<4>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<3>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<5>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<3>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<7>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<3>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefDone.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<3>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimeoutBPre.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<4>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<4>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<4>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<5>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<4>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<7>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<4>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefDone.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<4>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimeoutBPre.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<5>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<5>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<5>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<7>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<5>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefDone.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<5>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimeoutBPre.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<6>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<6>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<6>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<7>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<6>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefDone.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<6>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimeoutBPre.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<7>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<7>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefDone.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<7>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimeoutBPre.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefDone.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefDone.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimeoutBPre.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimeoutBPre.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimeoutBPre.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay0.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay0.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay0.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready0r.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">BERR_IOBS.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOREQ.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimeoutBPre.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay0.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.CE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/BERR0r.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/BERR1r.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready0r.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready1r.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOReady.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Load1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Once.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/BACTr.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/BERR0r.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/BERR0r.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/BERR1r.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/BERR1r.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready0r.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready0r.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Clear1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOACTr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">BERR_IOBS.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOACTr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOREQ.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOACTr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOReady.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOACTr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOL1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOL0.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IORW1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IORW0.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOReady.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOReady.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOU1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOU0.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Load1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOL1.CE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Load1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOU1.CE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Load1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Once.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">BERR_IOBS.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Once.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOREQ.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Once.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IORW1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Once.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOReady.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Once.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Load1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Once.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ALE0S.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOL0.CE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOREQ.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOU0.CE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Clear1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Load1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ALE0S.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">BERR_IOBS.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOL0.CE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOU0.CE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Clear1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOReady.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Load1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">BERR_IOBS.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOL0.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOU0.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Clear1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IORW1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IOReady.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Load1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nADoutLE1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/BACTr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/Once.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/Once.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready0r.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RASEL.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nCAS.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RefAck.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RefAck.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
- </TABLE><BR>
- <TABLE  WIDTH="80%" border="1" ALIGN="center">
-  <CAPTION CLASS="cpldta_text_caption"><B>Clock to Setup for clock CLK2X_IOB</B></CAPTION>
-  <TR>
-   <TH BGCOLOR="#FFFFCC" WIDTH="40%" CLASS="cpldta_constraint_header">Source</TH>
-   <TH BGCOLOR="#FFFFCC" WIDTH="40%" CLASS="cpldta_constraint_header">Destination</TH>
-   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Delay</TH>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOBERR.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOBERR.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/BERRrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOACT.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/BERRrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOBERR.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/BERRrr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOACT.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/BERRrr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOBERR.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/DTACKrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOACT.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/DTACKrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOBERR.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/DTACKrr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOACT.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/DTACKrr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOBERR.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOREQr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOACT.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOBERR.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd4.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOACT.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd5.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOACT.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd6.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOACT.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd7.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOACT.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd8.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOACT.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/RESrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOACT.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/RESrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOBERR.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/RESrr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOACT.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/RESrr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOBERR.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOACT.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nVMA_IOB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/BERRrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/BERRrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/BERRrr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/BERRrr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/DTACKrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/DTACKrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/DTACKrr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/DTACKrr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<0>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<0>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<0>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<1>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<0>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<2>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<0>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<3>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<0>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<4>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<0>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ETACK.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<0>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nVMA_IOB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<1>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<0>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<1>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<1>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<1>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<2>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<1>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<3>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<1>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<4>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<1>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ETACK.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<1>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nVMA_IOB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<2>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<0>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<2>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<2>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<2>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<3>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<2>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<4>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<2>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ETACK.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<2>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nVMA_IOB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<3>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<0>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<3>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<2>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<3>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<3>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<3>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<4>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<3>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ETACK.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<3>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nVMA_IOB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<4>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<0>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<4>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<2>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<4>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<4>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<4>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ETACK.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<4>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nVMA_IOB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ETACK.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOACT.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ETACK.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOBERR.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ETACK.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ETACK.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/Er2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<0>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/Er2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<1>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/Er2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<2>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/Er2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<3>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/Er2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ES<4>.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOREQr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ALE0M.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOREQr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd7.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOREQr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd8.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd8.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDoutOE.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ALE0M.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOACT.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_IOB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDinLE.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDoutOE.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nLDS_IOB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nUDS_IOB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd4.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ALE0M.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd4.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd4.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_IOB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd4.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDinLE.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd4.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDoutOE.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd4.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nLDS_IOB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd4.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nUDS_IOB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd5.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ALE0M.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd5.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd4.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd5.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_IOB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd5.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDoutOE.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd5.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nLDS_IOB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd5.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nUDS_IOB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd6.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ALE0M.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd6.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd5.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd6.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_IOB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd6.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDoutOE.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd6.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nLDS_IOB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd6.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nUDS_IOB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd7.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ALE0M.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd7.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd6.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd7.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_IOB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd7.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDoutOE.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd7.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nLDS_IOB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd7.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nUDS_IOB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd8.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ALE0M.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd8.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd7.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd8.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd8.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/RESrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/RESrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/RESrr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/RESrr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/VPArf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nVMA_IOB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/VPArr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nVMA_IOB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nVMA_IOB.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ETACK.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nVMA_IOB.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nVMA_IOB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
- </TABLE><BR>
- <BR>
- <A NAME="Pad2PadList"></a>
- <h3 CLASS="cpldta_text_subsection_header">Pad to Pad List</h3>
- <TABLE  WIDTH="80%" border="1" ALIGN="center">
-  <TR>
-   <TH BGCOLOR="#FFFFCC" WIDTH="40%" CLASS="cpldta_constraint_header">Source Pad</TH>
-   <TH BGCOLOR="#FFFFCC" WIDTH="40%" CLASS="cpldta_constraint_header">Destination Pad</TH>
-   <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Delay</TH>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<10></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<0></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<1></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<0></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<20></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDinOE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<21></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDinOE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<22></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDinOE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<23></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDinOE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<9></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<8></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_FSB</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDinOE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nWE_FSB</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDinOE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<11></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<1></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<12></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<2></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<13></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<3></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<14></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<4></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<15></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<5></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<16></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<6></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<17></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<7></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<18></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<8></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<19></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<11></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<19></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<9></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<20></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<9></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<20></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBERR_FSB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<20></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nROMCS</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<21></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<10></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<21></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBERR_FSB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<21></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAS</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<21></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nROMCS</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<22></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBERR_FSB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<22></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAS</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<22></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nROMCS</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<23></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBERR_FSB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<23></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAS</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<23></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nROMCS</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<2></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<1></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<3></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<2></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<4></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<3></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<5></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<4></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<6></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<5></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<7></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<6></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<8></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<7></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_FSB</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBERR_FSB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_FSB</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nOE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_FSB</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAMLWE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_FSB</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAMUWE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_FSB</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAS</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_FSB</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nROMWE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_FSB</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nVPA_FSB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nLDS_FSB</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAMLWE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nUDS_FSB</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAMUWE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nWE_FSB</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nOE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nWE_FSB</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAMLWE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nWE_FSB</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAMUWE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nWE_FSB</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nROMWE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
- </TABLE>
- <BR>
-<HR>
-<BR><SPAN CLASS="cpldta_text_normal_bold"><B>Number of paths analyzed:</B></SPAN> 
-<SPAN CLASS="cpldta_text_normal">393</SPAN>
-<BR><SPAN CLASS="cpldta_text_normal_bold"><B>Number of Timing errors:</B></SPAN> 
-<SPAN CLASS="cpldta_text_normal">0</SPAN>
-<BR><SPAN CLASS="cpldta_text_normal_bold"><B>Analysis Completed:</B></SPAN> <SPAN CLASS="cpldta_text_normal">Sat Dec 11 06:24:30 2021
-</SPAN>
-<HR>
-</HTML>
diff --git a/cpld/XC95144XL/MXSE_html/tim/timing_report.htm b/cpld/XC95144XL/MXSE_html/tim/timing_report.htm
index 2e300f7..45f4a36 100644
--- a/cpld/XC95144XL/MXSE_html/tim/timing_report.htm
+++ b/cpld/XC95144XL/MXSE_html/tim/timing_report.htm
@@ -27,7 +27,7 @@
   <TD WIDTH="65%" CLASS="cpldta_text_normal"><A HREF="Javascript:popWin('http://www.xilinx.com/literature/index.htm','800','800','test');">XC95144XL</A>, -10 (3.0)</TD>
  </TR>
  <TR>
-  <TD WIDTH="35%" CLASS="cpldta_text_normal_bold"><B>Date Created</B></TD>  <TD WIDTH="65%" CLASS="cpldta_text_normal">Mon Feb 07 04:05:06 2022
+  <TD WIDTH="35%" CLASS="cpldta_text_normal_bold"><B>Date Created</B></TD>  <TD WIDTH="65%" CLASS="cpldta_text_normal">Sun Mar 27 10:09:02 2022
 </TD>
  </TR>
  <TR>
@@ -44,18 +44,18 @@
  </TR>
  <TR>
   <TD WIDTH="65%" CLASS="cpldta_text_normal_bold"><B>Min. Clock Period</B></TD>
-  <TD WIDTH="35%" CLASS="cpldta_text_normal">19.100 ns.</TD>
+  <TD WIDTH="35%" CLASS="cpldta_text_normal">20.100 ns.</TD>
  </TR>
  <TR>
   <TD WIDTH="65%" CLASS="cpldta_text_normal_bold"><B>Max. Clock Frequency </B><A HREF="cpldta_glossary.htm#fSYSTEM">(fSYSTEM)</A></TD>
-  <TD WIDTH="35%" CLASS="cpldta_text_normal">52.356 MHz. </TD>
+  <TD WIDTH="35%" CLASS="cpldta_text_normal">49.751 MHz. </TD>
  </TR>
  <TR>
   <TD WIDTH="100%" colspan="2" CLASS="cpldta_text_normal">Limited by Cycle Time for CLK_FSB</TD>
  </TR>
  <TR>
   <TD WIDTH="65%" CLASS="cpldta_text_normal_bold"><B>Clock to Setup </B><A HREF="cpldta_glossary.htm#tCYC">(tCYC)</A></TD>
-  <TD WIDTH="35%" CLASS="cpldta_text_normal">19.100 ns. </TD>
+  <TD WIDTH="35%" CLASS="cpldta_text_normal">20.100 ns. </TD>
  </TR>
  <TR>
   <TD WIDTH="65%" CLASS="cpldta_text_normal_bold"><B>Pad to Pad Delay </B><A HREF="cpldta_glossary.htm#tPD">(tPD)</A></TD>
@@ -63,7 +63,7 @@
  </TR>
  <TR>
   <TD WIDTH="65%" CLASS="cpldta_text_normal_bold"><B>Setup to Clock at the Pad </B><A HREF="cpldta_glossary.htm#tSU">(tSU)</A></TD>
-  <TD WIDTH="35%" CLASS="cpldta_text_normal">15.600 ns. </TD>
+  <TD WIDTH="35%" CLASS="cpldta_text_normal">16.600 ns. </TD>
  </TR>
  <TR>
   <TD WIDTH="65%" CLASS="cpldta_text_normal_bold"><B>Clock Pad to Output Pad Delay </B><A HREF="cpldta_glossary.htm#tCO">(tCO)</A></TD>
@@ -90,15 +90,15 @@
  <TR>
   <TD ALIGN="left" CLASS="cpldta_constraint_name"><A HREF="#TS_CLK_FSB">TS_CLK_FSB</A></TD>
   <TD ALIGN="center" CLASS="cpldta_time_value">40.0</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value">19.1</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value">273</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value">20.1</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value">287</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value">0</TD>
  </TR>
  <TR>
   <TD ALIGN="left" CLASS="cpldta_constraint_name"><A HREF="#TS_CLK2X_IOB">TS_CLK2X_IOB</A></TD>
   <TD ALIGN="center" CLASS="cpldta_time_value">66.6</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value">11.0</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value">110</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value">105</TD>
   <TD ALIGN="center" CLASS="cpldta_time_value">0</TD>
  </TR>
 </TABLE>
@@ -128,19 +128,19 @@
    <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Slack (ns)</TH>
   </TR>
   <TR>
-   <A NAME="_TimeoutB_Q_to_nDTACK_FSB_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_TimeoutB_Q_to_nDTACK_FSB_D();">TimeoutB.Q to nDTACK_FSB.D</A></TD>
+   <A NAME="_cs_nOverlay1_Q_to_fsb_VPA_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_cs_nOverlay1_Q_to_fsb_VPA_D();">cs/nOverlay1.Q to fsb/VPA.D</A></TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">19.100</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">20.900</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">20.100</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">19.900</TD>
   </TR>
 <SCRIPT language="JavaScript">
 <!--
-function TS_CLK_FSB_TimeoutB_Q_to_nDTACK_FSB_D() {
+function TS_CLK_FSB_cs_nOverlay1_Q_to_fsb_VPA_D() {
    aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
    aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
    aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("TimeoutB.Q to nDTACK_FSB.D")
+   aWindow.document.writeln("cs/nOverlay1.Q to fsb/VPA.D")
    aWindow.document.writeln("</H3>")
    aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
    aWindow.document.writeln("<TR>")
@@ -151,49 +151,11 @@ function TS_CLK_FSB_TimeoutB_Q_to_nDTACK_FSB_D() {
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">TimeoutB</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cs/nOverlay1</TD>")
    aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPDI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">7.700</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">$OpTx$FX_DC$608.UIM</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPTA2 + tSUI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.400</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nDTACK_FSB.D</TD>")
-   aWindow.document.writeln("</TABLE>")
-   aWindow.document.close()
-}
-//-->
-</SCRIPT>
-  <TR>
-   <A NAME="_fsb_ASrf_Q_to_fsb_VPA_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_ASrf_Q_to_fsb_VPA_D();">fsb/ASrf.Q to fsb/VPA.D</A></TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">20.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">19.100</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">0.900</TD>
-  </TR>
-<SCRIPT language="JavaScript">
-<!--
-function TS_CLK_FSB_fsb_ASrf_Q_to_fsb_VPA_D() {
-   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
-   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
-   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("fsb/ASrf.Q to fsb/VPA.D")
-   aWindow.document.writeln("</H3>")
-   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
-   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
-   aWindow.document.writeln("</TR>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/ASrf</TD>")
-   aWindow.document.writeln("<TR>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPDI</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">7.700</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">$OpTx$FX_DC$607.UIM</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPDI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">8.700</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">$OpTx$$OpTx$FX_DC$182_INV$783.UIM</TD>")
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPTA2 + tSUI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.400</TD>")
@@ -204,19 +166,19 @@ function TS_CLK_FSB_fsb_ASrf_Q_to_fsb_VPA_D() {
 //-->
 </SCRIPT>
   <TR>
-   <A NAME="_BERR_IOBS_Q_to_fsb_VPA_D"></A>
-   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_BERR_IOBS_Q_to_fsb_VPA_D();">BERR_IOBS.Q to fsb/VPA.D</A></TD>
+   <A NAME="_cs_nOverlay1_Q_to_nDTACK_FSB_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_cs_nOverlay1_Q_to_nDTACK_FSB_D();">cs/nOverlay1.Q to nDTACK_FSB.D</A></TD>
    <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
-   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">11.400</TD>
-  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">28.600</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">20.100</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">19.900</TD>
   </TR>
 <SCRIPT language="JavaScript">
 <!--
-function TS_CLK_FSB_BERR_IOBS_Q_to_fsb_VPA_D() {
+function TS_CLK_FSB_cs_nOverlay1_Q_to_nDTACK_FSB_D() {
    aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
    aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
    aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
-   aWindow.document.writeln("BERR_IOBS.Q to fsb/VPA.D")
+   aWindow.document.writeln("cs/nOverlay1.Q to nDTACK_FSB.D")
    aWindow.document.writeln("</H3>")
    aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
    aWindow.document.writeln("<TR>")
@@ -227,7 +189,49 @@ function TS_CLK_FSB_BERR_IOBS_Q_to_fsb_VPA_D() {
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
-   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">BERR_IOBS</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">cs/nOverlay1</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPDI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">8.700</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">$OpTx$$OpTx$FX_DC$182_INV$783.UIM</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPTA2 + tSUI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.400</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">nDTACK_FSB.D</TD>")
+   aWindow.document.writeln("</TABLE>")
+   aWindow.document.close()
+}
+//-->
+</SCRIPT>
+  <TR>
+   <A NAME="_fsb_Ready0r_Q_to_fsb_VPA_D"></A>
+   <TD ALIGN="left" CLASS="cpldta_constraint_name" WIDTH="40%"><A HREF="javascript:TS_CLK_FSB_fsb_Ready0r_Q_to_fsb_VPA_D();">fsb/Ready0r.Q to fsb/VPA.D</A></TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">40.000</TD>
+   <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">20.100</TD>
+  <TD ALIGN="center" CLASS="cpldta_time_value" WIDTH="10%">19.900</TD>
+  </TR>
+<SCRIPT language="JavaScript">
+<!--
+function TS_CLK_FSB_fsb_Ready0r_Q_to_fsb_VPA_D() {
+   aWindow=window.open("","thewindow","toolbar=no,WIDTH=350,height=300,status=no,scrollbars=yes,resizable=yes,menubar=no")
+   aWindow.document.writeln("<link type=\"text/css\" rel=\"stylesheet\" href=\"cpldta_style.css\">")
+   aWindow.document.writeln("<H3 CLASS=\"cpldta_text_subsection_header\">Path Trace: ")
+   aWindow.document.writeln("fsb/Ready0r.Q to fsb/VPA.D")
+   aWindow.document.writeln("</H3>")
+   aWindow.document.writeln("<TABLE  WIDTH=\"90%\" border=\"1\" ALIGN=\"center\">")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Delay Type</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"20%\" CLASS=\"cpldta_time_header\">Delay (ns)</TH>")
+   aWindow.document.writeln("<TH BGCOLOR=\"#FFFFCC\" WIDTH=\"40%\" CLASS=\"cpldta_constraint_header\">Logical Resource</TH>")
+   aWindow.document.writeln("</TR>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tCOI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">1.000</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">fsb/Ready0r</TD>")
+   aWindow.document.writeln("<TR>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPDI</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">8.700</TD>")
+   aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">$OpTx$$OpTx$FX_DC$182_INV$783.UIM</TD>")
    aWindow.document.writeln("<TR>")
    aWindow.document.writeln("<TD WIDTH=\"40%\" CLASS=\"cpldta_datasheet_pathname\">tF + tLOGI + tPTA + tPTA2 + tSUI</TD>")
    aWindow.document.writeln("<TD WIDTH=\"20%\" CLASS=\"cpldta_datasheet_time_value\">10.400</TD>")
@@ -374,7 +378,7 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">CLK_FSB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">52.356</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">49.751</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">Limited by Cycle Time for CLK_FSB</TD>
   </TR>
   <TR>
@@ -463,17 +467,17 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
   </TR>
   <TR>
    <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<21></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">15.600</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">16.600</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
   </TR>
   <TR>
    <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<22></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">15.600</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">16.600</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
   </TR>
   <TR>
    <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">A_FSB<23></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">15.600</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">16.600</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
   </TR>
   <TR>
@@ -486,16 +490,31 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">7.900</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">SW<1></TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">7.900</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">nAS_FSB</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">15.600</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">nIPL2</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">6.500</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">nLDS_FSB</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">6.500</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">nRES</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">6.500</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">nUDS_FSB</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">6.500</TD>
@@ -524,6 +543,11 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">7.500</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">nBG_IOB</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">6.500</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">0.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="60%" CLASS="cpldta_datasheet_pathname">nDTACK_IOB</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">6.500</TD>
@@ -549,6 +573,10 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TH BGCOLOR="#FFFFCC" WIDTH="80%" CLASS="cpldta_constraint_header">Destination Pad</TH>
    <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Clock (edge) to Pad </TH>
   </TR>
+  <TR>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<1></TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">14.500</TD>
+  </TR>
   <TR>
    <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<2></TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">14.500</TD>
@@ -561,16 +589,28 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<5></TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">14.500</TD>
   </TR>
+  <TR>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<8></TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">14.500</TD>
+  </TR>
   <TR>
    <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nBERR_FSB</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">14.500</TD>
   </TR>
   <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<0></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nRAMUWE</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">14.500</TD>
   </TR>
   <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<1></TD>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nRAS</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">14.500</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nROMCS</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">14.500</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<0></TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
   </TR>
   <TR>
@@ -585,10 +625,6 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<7></TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
   </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<8></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
-  </TR>
   <TR>
    <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">RA<9></TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
@@ -601,18 +637,6 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nRAMLWE</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
   </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nRAMUWE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nRAS</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nROMCS</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
-  </TR>
   <TR>
    <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nVPA_FSB</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
@@ -621,6 +645,10 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nADoutLE1</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">5.800</TD>
   </TR>
+  <TR>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nBR_IOB</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">5.800</TD>
+  </TR>
   <TR>
    <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nCAS</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">5.800</TD>
@@ -636,12 +664,28 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TH BGCOLOR="#FFFFCC" WIDTH="80%" CLASS="cpldta_constraint_header">Destination Pad</TH>
    <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Clock (edge) to Pad </TH>
   </TR>
+  <TR>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nAS_IOB</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">14.500</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nLDS_IOB</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">14.500</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nUDS_IOB</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">14.500</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nVMA_IOB</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">14.500</TD>
+  </TR>
   <TR>
    <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nADoutLE0</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">13.500</TD>
   </TR>
   <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nAS_IOB</TD>
+   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nAoutOE</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">5.800</TD>
   </TR>
   <TR>
@@ -652,18 +696,6 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nDoutOE</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">5.800</TD>
   </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nLDS_IOB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">5.800</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nUDS_IOB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">5.800</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="80%" CLASS="cpldta_datasheet_pathname">nVMA_IOB</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">5.800</TD>
-  </TR>
  </TABLE><BR>
  <BR>
  <A NAME="ClockToSetupTimesForClocks"></a>
@@ -675,6 +707,41 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TH BGCOLOR="#FFFFCC" WIDTH="40%" CLASS="cpldta_constraint_header">Destination</TH>
    <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Delay</TH>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">20.100</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">20.100</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready0r.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">20.100</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready0r.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">20.100</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">20.100</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">20.100</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">19.100</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
@@ -710,11 +777,6 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<5>.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS1.D</TD>
@@ -735,11 +797,6 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<5>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<6>.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS1.D</TD>
@@ -760,11 +817,6 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<6>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<7>.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS1.D</TD>
@@ -785,11 +837,6 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<7>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefDone.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS1.D</TD>
@@ -810,19 +857,9 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefDone.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IORW0.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IORW1.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
   </TR>
   <TR>
@@ -830,11 +867,6 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Once.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS1.D</TD>
@@ -850,16 +882,6 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IORW0.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RASEL.D</TD>
@@ -870,11 +892,6 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/BERR0r.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
@@ -955,6 +972,16 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IORW0.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBR_IOB.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBR_IOB.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
@@ -980,11 +1007,6 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RASEL.D</TD>
@@ -995,109 +1017,24 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.400</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready2r.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<0>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<0>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<1>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<1>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<2>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<2>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<3>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<3>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<4>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<4>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<5>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<5>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<5>.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS2.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<6>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<6>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<5>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
@@ -1106,8 +1043,8 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<7>.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<6>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
@@ -1115,14 +1052,19 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS2.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<7>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefDone.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS2.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimeoutBPre.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefDone.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
@@ -1140,11 +1082,6 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready2r.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IORW1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Load1.D</TD>
@@ -1166,13 +1103,13 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IORW0.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
@@ -1185,6 +1122,11 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IORW1.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS1.D</TD>
@@ -1201,13 +1143,8 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready0r.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready0r.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
@@ -1222,7 +1159,7 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IORW1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IORW1.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IORW0.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
@@ -1255,11 +1192,6 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IORW1.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Once.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.D</TD>
@@ -1330,26 +1262,11 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/Once.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS2.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS2.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/VPA.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS2.D</TD>
@@ -1360,6 +1277,11 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS1.D</TD>
@@ -1375,6 +1297,11 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd2.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMDIS1.D</TD>
@@ -1395,6 +1322,11 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RASEL.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">BERR_IOBS.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">BERR_IOBS.D</TD>
@@ -1405,16 +1337,96 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/BERR1r.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IPL2r0.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IPL2r1.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IPL2r0.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBR_IOB.CE</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IPL2r1.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBR_IOB.CE</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RESDone.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBR_IOB.CE</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RESr0.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RESDone.CE</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RESr0.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RESr1.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RESr0.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBR_IOB.CE</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RESr1.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RESDone.CE</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RESr1.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RESr2.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RESr1.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBR_IOB.CE</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RESr2.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RESDone.CE</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RESr2.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBR_IOB.CE</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RefAck.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefDone.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/BERR0r.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<0>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<0>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<0>.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<1>.D</TD>
@@ -1460,6 +1472,16 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimeoutBPre.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<1>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<1>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<1>.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<2>.D</TD>
@@ -1500,6 +1522,16 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimeoutBPre.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<2>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<2>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<2>.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<3>.D</TD>
@@ -1535,6 +1567,16 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimeoutBPre.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<3>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<3>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<3>.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<4>.D</TD>
@@ -1565,6 +1607,16 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimeoutBPre.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<4>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<4>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<4>.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<5>.D</TD>
@@ -1590,6 +1642,16 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimeoutBPre.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<5>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<5>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<5>.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<6>.D</TD>
@@ -1610,6 +1672,16 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimeoutBPre.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<6>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<6>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<6>.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<7>.D</TD>
@@ -1625,6 +1697,11 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimeoutBPre.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<7>.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefCnt<7>.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefDone.D</TD>
@@ -1640,6 +1717,11 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/RefDone.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimeoutBPre.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimeoutBPre.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimeoutBPre.D</TD>
@@ -1655,6 +1737,11 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IORW0.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cs/nOverlay1.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready0r.D</TD>
@@ -1680,6 +1767,16 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOREQ.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutA.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">TimeoutB.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">cnt/TimeoutBPre.D</TD>
@@ -1735,11 +1832,6 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDTACK_FSB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/ASrf.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/BACTr.D</TD>
@@ -1807,7 +1899,7 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IORW1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IORW0.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/IORW1.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
@@ -1935,6 +2027,11 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Load1.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/Once.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd2.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobs/PS_FSM_FFd1.D</TD>
@@ -1990,6 +2087,11 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd1.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/Once.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RS_FSM_FFd3.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ram/RAMReady.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">fsb/Ready0r.D</TD>
@@ -2063,21 +2165,26 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOBERR.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/DTACKrf.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOACT.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/DTACKrf.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOBERR.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/DTACKrr.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOACT.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/DTACKrr.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOBERR.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ETACK.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOBERR.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd1.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOACT.D</TD>
@@ -2088,11 +2195,6 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOBERR.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOACT.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOBERR.D</TD>
@@ -2100,16 +2202,11 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOBERR.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd4.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOACT.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd4.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOBERR.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
@@ -2145,7 +2242,7 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/BERRrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
@@ -2155,27 +2252,32 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/BERRrr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/BGr0.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/BGr1.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/BGr0.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAoutOE.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/BGr1.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAoutOE.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/DTACKrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOACT.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/DTACKrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/DTACKrr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOACT.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/DTACKrr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
@@ -2340,7 +2442,12 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ETACK.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOBERR.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ETACK.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
@@ -2380,7 +2487,7 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOREQr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd4.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
@@ -2400,7 +2507,7 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd1.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd4.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
@@ -2430,152 +2537,97 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd1.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd4.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_IOB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDoutOE.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nLDS_IOB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nUDS_IOB.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ALE0M.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOACT.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd1.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd4.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_IOB.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDinLE.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDoutOE.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nLDS_IOB.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nUDS_IOB.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd4.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ALE0M.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd4.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd1.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd4.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd4.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd4.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd4.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd4.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_IOB.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd4.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDinLE.D</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd4.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDoutOE.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd4.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nLDS_IOB.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd4.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nUDS_IOB.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/RESrf.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/RESrr.Q</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.D</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd2.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
@@ -2588,6 +2640,31 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nVMA_IOB.D</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_IOB.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAoutOE.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAoutOE.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">ALE0M.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAoutOE.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">IOACT.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAoutOE.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/IOS_FSM_FFd3.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAoutOE.Q</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAoutOE.D</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nVMA_IOB.Q</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">iobm/ETACK.D</TD>
@@ -2608,6 +2685,16 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TH BGCOLOR="#FFFFCC" WIDTH="40%" CLASS="cpldta_constraint_header">Destination Pad</TH>
    <TH BGCOLOR="#FFFFCC" WIDTH="20%" CLASS="cpldta_time_header">Delay</TH>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<11></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<1></TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<12></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<2></TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<14></TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<4></TD>
@@ -2619,13 +2706,18 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<19></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<11></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<20></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBERR_FSB</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<20></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBERR_FSB</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nROMCS</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<21></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<8></TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
@@ -2633,16 +2725,61 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBERR_FSB</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<21></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAS</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<21></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nROMCS</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<22></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<8></TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<22></TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBERR_FSB</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<22></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAS</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<22></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nROMCS</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<23></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<8></TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<23></TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBERR_FSB</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<23></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAS</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<23></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nROMCS</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<2></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<1></TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<3></TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<2></TD>
@@ -2658,9 +2795,34 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<5></TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<9></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<8></TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">SW<1></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nROMCS</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_FSB</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBERR_FSB</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAMUWE</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_FSB</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAS</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nUDS_FSB</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAMUWE</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nWE_FSB</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAMUWE</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">11.000</TD>
   </TR>
   <TR>
@@ -2668,16 +2830,6 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<0></TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<11></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<1></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<12></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<2></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<13></TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<3></TD>
@@ -2698,6 +2850,11 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<8></TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<19></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<11></TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<19></TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<9></TD>
@@ -2718,11 +2875,6 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDinOE</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<20></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nROMCS</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<21></TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<10></TD>
@@ -2733,51 +2885,16 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDinOE</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<21></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAS</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<21></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nROMCS</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<22></TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDinOE</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<22></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAS</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<22></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nROMCS</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<23></TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDinOE</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<23></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAS</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<23></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nROMCS</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<2></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<1></TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<4></TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<3></TD>
@@ -2794,8 +2911,23 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">A_FSB<9></TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">RA<8></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">SW<0></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">CLK20EN</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">SW<0></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">CLK25EN</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">SW<1></TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDinOE</TD>
+   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
+  </TR>
+  <TR>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_FSB</TD>
+   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nBERR_FSB</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
   <TR>
@@ -2813,16 +2945,6 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAMLWE</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_FSB</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAMUWE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_FSB</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAS</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nAS_FSB</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nROMWE</TD>
@@ -2838,11 +2960,6 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAMLWE</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nUDS_FSB</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAMUWE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nWE_FSB</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nDinOE</TD>
@@ -2858,11 +2975,6 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAMLWE</TD>
    <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
   </TR>
-  <TR>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nWE_FSB</TD>
-   <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nRAMUWE</TD>
-   <TD WIDTH="20%" CLASS="cpldta_datasheet_time_value">10.000</TD>
-  </TR>
   <TR>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nWE_FSB</TD>
    <TD WIDTH="40%" CLASS="cpldta_datasheet_pathname">nROMWE</TD>
@@ -2872,10 +2984,10 @@ function TS_CLK2X_IOB_iobm_BERRrr_Q_to_IOBERR_D() {
  <BR>
 <HR>
 <BR><SPAN CLASS="cpldta_text_normal_bold"><B>Number of paths analyzed:</B></SPAN> 
-<SPAN CLASS="cpldta_text_normal">383</SPAN>
+<SPAN CLASS="cpldta_text_normal">392</SPAN>
 <BR><SPAN CLASS="cpldta_text_normal_bold"><B>Number of Timing errors:</B></SPAN> 
 <SPAN CLASS="cpldta_text_normal">0</SPAN>
-<BR><SPAN CLASS="cpldta_text_normal_bold"><B>Analysis Completed:</B></SPAN> <SPAN CLASS="cpldta_text_normal">Mon Feb 07 04:05:08 2022
+<BR><SPAN CLASS="cpldta_text_normal_bold"><B>Analysis Completed:</B></SPAN> <SPAN CLASS="cpldta_text_normal">Sun Mar 27 10:09:05 2022
 </SPAN>
 <HR>
 </HTML>
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deleted file mode 100644
index 29af0e1..0000000
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@@ -1,36 +0,0 @@
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-	font-weight: bold; color: #000000; 
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deleted file mode 100644
index 00e11b8..0000000
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-<table width="100%" border="0" cellspacing="0" cellpadding="0">
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deleted file mode 100644
index 43afc64..0000000
--- a/cpld/XC95144XL/MXSE_ngdbuild 2.xrpt	
+++ /dev/null
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-        <item dataType="int" stringID="NGDBUILD_NUM_GND" value="63"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="35"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_INV" value="243"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_OBUF" value="32"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_OR2" value="92"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_OR3" value="8"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_OR4" value="5"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_TS_TIMESPEC" value="1"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_VCC" value="1"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_XOR2" value="12"/>
-      </section>
-      <section stringID="NGDBUILD_CORE_GENERATION_SUMMARY">
-        <section stringID="NGDBUILD_CORE_INSTANCES"/>
-      </section>
-    </task>
-  </application>
-
-</document>
diff --git a/cpld/XC95144XL/MXSE_ngdbuild.xrpt b/cpld/XC95144XL/MXSE_ngdbuild.xrpt
index bbf3939..833922b 100644
--- a/cpld/XC95144XL/MXSE_ngdbuild.xrpt
+++ b/cpld/XC95144XL/MXSE_ngdbuild.xrpt
@@ -5,7 +5,7 @@
     The structure and the elements are likely to change over the next few releases.
     This means code written to parse this file will need to be revisited each subsequent release.-->
 
-  <application stringID="NgdBuild" timeStamp="Mon Feb 14 19:34:30 2022">
+  <application stringID="NgdBuild" timeStamp="Sun Mar 27 10:07:32 2022">
     <section stringID="User_Env">
       <table stringID="User_EnvVar">
         <column stringID="variable"/>
@@ -45,7 +45,7 @@
         <column stringID="speed"/>
         <row stringID="row" value="0">
           <item stringID="arch" value="QEMU Virtual CPU version 2.5+"/>
-          <item stringID="speed" value="1000 MHz"/>
+          <item stringID="speed" value="1001 MHz"/>
         </row>
         <row stringID="row" value="1">
           <item stringID="arch" value="QEMU Virtual CPU version 2.5+"/>
@@ -70,34 +70,38 @@
         <item dataType="int" stringID="NGDBUILD_NUM_INFOS" value="0"/>
       </section>
       <section stringID="NGDBUILD_PRE_UNISIM_SUMMARY">
-        <item dataType="int" stringID="NGDBUILD_NUM_AND2" value="169"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_AND3" value="25"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_AND4" value="14"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_FD" value="54"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_FDCE" value="26"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_GND" value="6"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="35"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_INV" value="256"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_OBUF" value="32"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_OR2" value="108"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_OR3" value="9"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_AND2" value="168"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_AND3" value="27"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_AND4" value="12"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_AND5" value="1"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_BUFE" value="1"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_FD" value="60"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_FDCE" value="29"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_GND" value="7"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="39"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_INV" value="260"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_OBUF" value="31"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_OR2" value="99"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_OR3" value="11"/>
         <item dataType="int" stringID="NGDBUILD_NUM_OR4" value="1"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_VCC" value="1"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_VCC" value="2"/>
         <item dataType="int" stringID="NGDBUILD_NUM_XOR2" value="12"/>
       </section>
       <section stringID="NGDBUILD_POST_UNISIM_SUMMARY">
-        <item dataType="int" stringID="NGDBUILD_NUM_AND2" value="169"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_AND3" value="25"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_AND4" value="14"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_GND" value="60"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="35"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_INV" value="256"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_OBUF" value="32"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_OR2" value="108"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_OR3" value="9"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_AND2" value="168"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_AND3" value="27"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_AND4" value="12"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_AND5" value="1"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_BUFE" value="1"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_GND" value="67"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="40"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_INV" value="260"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_OBUF" value="31"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_OR2" value="99"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_OR3" value="11"/>
         <item dataType="int" stringID="NGDBUILD_NUM_OR4" value="1"/>
         <item dataType="int" stringID="NGDBUILD_NUM_TS_TIMESPEC" value="1"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_VCC" value="1"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_VCC" value="2"/>
         <item dataType="int" stringID="NGDBUILD_NUM_XOR2" value="12"/>
       </section>
       <section stringID="NGDBUILD_CORE_GENERATION_SUMMARY">
diff --git a/cpld/XC95144XL/MXSE_pad.csv b/cpld/XC95144XL/MXSE_pad.csv
new file mode 100644
index 0000000..659a708
--- /dev/null
+++ b/cpld/XC95144XL/MXSE_pad.csv
@@ -0,0 +1,129 @@
+Release 8.1i - Fit P.20131013
+Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
+
+ 3-27-2022 10:08AM
+
+NOTE: This file is designed to be imported into a spreadsheet program
+such as Microsoft Excel for viewing, printing and sorting. The comma ','
+character is used as the data field separator.
+This file is also designed to support parsing.
+
+Input file:  MXSE.ngd
+output file: MXSE_pad.csv
+Part type:   xc95144xl
+Speed grade: -10
+Package:     tq100
+
+Pinout by Pin Number:
+
+-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,
+Pin Number,Signal Name,Pin Usage,Pin Name,Direction,IO Standard,IO Bank Number,{blank},Slew Rate,Termination,{blank},Voltage,Constraint,
+P1,TIE,,I/O/GTS3,,,,,,,,,,
+P2,A_FSB<5>,I,I/O/GTS4,INPUT,,,,,,,,,
+P3,A_FSB<6>,I,I/O/GTS1,INPUT,,,,,,,,,
+P4,A_FSB<7>,I,I/O/GTS2,INPUT,,,,,,,,,
+P5,VCC,,VCCINT,,,,,,,,,,
+P6,A_FSB<8>,I,I/O,INPUT,,,,,,,,,
+P7,A_FSB<9>,I,I/O,INPUT,,,,,,,,,
+P8,A_FSB<10>,I,I/O,INPUT,,,,,,,,,
+P9,A_FSB<11>,I,I/O,INPUT,,,,,,,,,
+P10,A_FSB<12>,I,I/O,INPUT,,,,,,,,,
+P11,A_FSB<13>,I,I/O,INPUT,,,,,,,,,
+P12,A_FSB<14>,I,I/O,INPUT,,,,,,,,,
+P13,A_FSB<15>,I,I/O,INPUT,,,,,,,,,
+P14,A_FSB<16>,I,I/O,INPUT,,,,,,,,,
+P15,A_FSB<17>,I,I/O,INPUT,,,,,,,,,
+P16,A_FSB<18>,I,I/O,INPUT,,,,,,,,,
+P17,A_FSB<19>,I,I/O,INPUT,,,,,,,,,
+P18,A_FSB<20>,I,I/O,INPUT,,,,,,,,,
+P19,A_FSB<21>,I,I/O,INPUT,,,,,,,,,
+P20,A_FSB<22>,I,I/O,INPUT,,,,,,,,,
+P21,GND,,GND,,,,,,,,,,
+P22,CLK2X_IOB,GCK,I/O/GCK1,,,,,,,,,,
+P23,CLK_IOB,GCK/I,I/O/GCK2,,,,,,,,,,
+P24,A_FSB<23>,I,I/O,INPUT,,,,,,,,,
+P25,E_IOB,I,I/O,INPUT,,,,,,,,,
+P26,VCC,,VCCIO,,,,,,,,,,
+P27,CLK_FSB,GCK,I/O/GCK3,,,,,,,,,,
+P28,nDTACK_FSB,O,I/O,OUTPUT,,,,,,,,,
+P29,nWE_FSB,I,I/O,INPUT,,,,,,,,,
+P30,nLDS_FSB,I,I/O,INPUT,,,,,,,,,
+P31,GND,,GND,,,,,,,,,,
+P32,nAS_FSB,I,I/O,INPUT,,,,,,,,,
+P33,nUDS_FSB,I,I/O,INPUT,,,,,,,,,
+P34,nROMWE,O,I/O,OUTPUT,,,,,,,,,
+P35,nROMCS,O,I/O,OUTPUT,,,,,,,,,
+P36,nCAS,O,I/O,OUTPUT,,,,,,,,,
+P37,nOE,O,I/O,OUTPUT,,,,,,,,,
+P38,VCC,,VCCIO,,,,,,,,,,
+P39,TIE,,I/O,,,,,,,,,,
+P40,RA<4>,O,I/O,OUTPUT,,,,,,,,,
+P41,RA<3>,O,I/O,OUTPUT,,,,,,,,,
+P42,RA<5>,O,I/O,OUTPUT,,,,,,,,,
+P43,RA<2>,O,I/O,OUTPUT,,,,,,,,,
+P44,GND,,GND,,,,,,,,,,
+P45,TDI,,TDI,,,,,,,,,,
+P46,RA<6>,O,I/O,OUTPUT,,,,,,,,,
+P47,TMS,,TMS,,,,,,,,,,
+P48,TCK,,TCK,,,,,,,,,,
+P49,TIE,,I/O,,,,,,,,,,
+P50,RA<1>,O,I/O,OUTPUT,,,,,,,,,
+P51,VCC,,VCCIO,,,,,,,,,,
+P52,RA<7>,O,I/O,OUTPUT,,,,,,,,,
+P53,RA<0>,O,I/O,OUTPUT,,,,,,,,,
+P54,RA<8>,O,I/O,OUTPUT,,,,,,,,,
+P55,RA<10>,O,I/O,OUTPUT,,,,,,,,,
+P56,RA<9>,O,I/O,OUTPUT,,,,,,,,,
+P57,VCC,,VCCINT,,,,,,,,,,
+P58,CLK25EN,O,I/O,OUTPUT,,,,,,,,,
+P59,CLK20EN,O,I/O,OUTPUT,,,,,,,,,
+P60,SW<1>,I,I/O,INPUT,,,,,,,,,
+P61,SW<0>,I,I/O,INPUT,,,,,,,,,
+P62,GND,,GND,,,,,,,,,,
+P63,RA<11>,O,I/O,OUTPUT,,,,,,,,,
+P64,nRAS,O,I/O,OUTPUT,,,,,,,,,
+P65,nRAMLWE,O,I/O,OUTPUT,,,,,,,,,
+P66,nRAMUWE,O,I/O,OUTPUT,,,,,,,,,
+P67,TIE,,I/O,,,,,,,,,,
+P68,TIE,,I/O,,,,,,,,,,
+P69,GND,,GND,,,,,,,,,,
+P70,nBERR_FSB,O,I/O,OUTPUT,,,,,,,,,
+P71,TIE,,I/O,,,,,,,,,,
+P72,nBR_IOB,O,I/O,OUTPUT,,,,,,,,,
+P73,nBG_IOB,I,I/O,INPUT,,,,,,,,,
+P74,nVMA_IOB,O,I/O,OUTPUT,,,,,,,,,
+P75,GND,,GND,,,,,,,,,,
+P76,nBERR_IOB,I,I/O,INPUT,,,,,,,,,
+P77,nVPA_IOB,I,I/O,INPUT,,,,,,,,,
+P78,nDTACK_IOB,I,I/O,INPUT,,,,,,,,,
+P79,nLDS_IOB,O,I/O,OUTPUT,,,,,,,,,
+P80,nUDS_IOB,O,I/O,OUTPUT,,,,,,,,,
+P81,nAS_IOB,O,I/O,OUTPUT,,,,,,,,,
+P82,nADoutLE1,O,I/O,OUTPUT,,,,,,,,,
+P83,TDO,,TDO,,,,,,,,,,
+P84,GND,,GND,,,,,,,,,,
+P85,nADoutLE0,O,I/O,OUTPUT,,,,,,,,,
+P86,nDinLE,O,I/O,OUTPUT,,,,,,,,,
+P87,nAoutOE,O,I/O,OUTPUT,,,,,,,,,
+P88,VCC,,VCCIO,,,,,,,,,,
+P89,nDoutOE,O,I/O,OUTPUT,,,,,,,,,
+P90,nDinOE,O,I/O,OUTPUT,,,,,,,,,
+P91,nRES,I,I/O,INPUT,,,,,,,,,
+P92,nIPL2,I,I/O,INPUT,,,,,,,,,
+P93,nVPA_FSB,O,I/O,OUTPUT,,,,,,,,,
+P94,A_FSB<1>,I,I/O,INPUT,,,,,,,,,
+P95,A_FSB<2>,I,I/O,INPUT,,,,,,,,,
+P96,A_FSB<3>,I,I/O,INPUT,,,,,,,,,
+P97,A_FSB<4>,I,I/O,INPUT,,,,,,,,,
+P98,VCC,,VCCINT,,,,,,,,,,
+P99,TIE,,I/O/GSR,,,,,,,,,,
+P100,GND,,GND,,,,,,,,,,
+
+To preserve the pinout above for future design iterations in
+Project Navigator simply execute the (Lock Pins) process
+located under the (Implement Design) process in a toolbox named
+(Optional Implementation Tools) or invoke PIN2UCF from the
+command line. The location constraints will be written into your
+specified UCF file
+
+
diff --git a/cpld/XC95144XL/MXSE_summary 2.html b/cpld/XC95144XL/MXSE_summary 2.html
deleted file mode 100644
index 14e9283..0000000
--- a/cpld/XC95144XL/MXSE_summary 2.html	
+++ /dev/null
@@ -1,98 +0,0 @@
-<HTML><HEAD><TITLE>Xilinx Design Summary</TITLE></HEAD>
-<BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>
-<TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
-<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
-<TD ALIGN=CENTER COLSPAN='4'><B>MXSE Project Status (10/23/2021 - 06:51:21)</B></TD></TR>
-<TR ALIGN=LEFT>
-<TD BGCOLOR='#FFFF99'><B>Project File:</B></TD>
-<TD>MXSE.xise</TD>
-<TD BGCOLOR='#FFFF99'><b>Parser Errors:</b></TD>
-<TD> No Errors </TD>
-</TR>
-<TR ALIGN=LEFT>
-<TD BGCOLOR='#FFFF99'><B>Module Name:</B></TD>
-<TD>MXSE</TD>
-<TD BGCOLOR='#FFFF99'><B>Implementation State:</B></TD>
-<TD>Fitted</TD>
-</TR>
-<TR ALIGN=LEFT>
-<TD BGCOLOR='#FFFF99'><B>Target Device:</B></TD>
-<TD>xc95144xl-10TQ100</TD>
-<TD BGCOLOR='#FFFF99'><UL><LI><B>Errors:</B></LI></UL></TD>
-<TD>
-No Errors</TD>
-</TR>
-<TR ALIGN=LEFT>
-<TD BGCOLOR='#FFFF99'><B>Product Version:</B></TD><TD>ISE 14.7</TD>
-<TD BGCOLOR='#FFFF99'><UL><LI><B>Warnings:</B></LI></UL></TD>
-<TD ALIGN=LEFT>No Warnings</TD>
-</TR>
-<TR ALIGN=LEFT>
-<TD BGCOLOR='#FFFF99'><B>Design Goal:</B></dif></TD>
-<TD>Balanced</TD>
-<TD BGCOLOR='#FFFF99'><UL><LI><B>Routing Results:</B></LI></UL></TD>
-<TD>
-&nbsp;</TD>
-</TR>
-<TR ALIGN=LEFT>
-<TD BGCOLOR='#FFFF99'><B>Design Strategy:</B></dif></TD>
-<TD><A HREF_DISABLED='Xilinx Default (unlocked)?&DataKey=Strategy'>Xilinx Default (unlocked)</A></TD>
-<TD BGCOLOR='#FFFF99'><UL><LI><B>Timing Constraints:</B></LI></UL></TD>
-<TD>&nbsp;</TD>
-</TR>
-<TR ALIGN=LEFT>
-<TD BGCOLOR='#FFFF99'><B>Environment:</B></dif></TD>
-<TD>
-<A HREF_DISABLED='C:/Users/zanek/Documents/GitHub/Warp-SE/cpld/XC95144XL\MXSE_envsettings.html'>
-System Settings</A>
-</TD>
-<TD BGCOLOR='#FFFF99'><UL><LI><B>Final Timing Score:</B></LI></UL></TD>
-<TD>&nbsp;&nbsp;</TD>
-</TR>
-</TABLE>
-
-
-
-&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
-<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='2'><B>Current Errors</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=CurrentErrors"><B>[-]</B></a></TD></TR>
-<TR ALIGN=LEFT BGCOLOR='#FFFF99'><TD COLSPAN='3'><B>No Errors Found</B></TD></TR>
-</TABLE>
-
-
-
-&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
-<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='2'><B>Current Warnings</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=CurrentWarnings"><B>[-]</B></a></TD></TR>
-<TR ALIGN=LEFT BGCOLOR='#FFFF99'><TD COLSPAN='3'><B>No Warnings Found</B></TD></TR>
-</TABLE>
-
-
-
-
-
-
-
-
-
-
-
-
-
-&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
-<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='6'><B>Detailed Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=DetailedReports"><B>[-]</B></a></TD></TR>
-<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD><B>Generated</B></TD>
-<TD ALIGN=LEFT><B>Errors</B></TD><TD ALIGN=LEFT><B>Warnings</B></TD><TD ALIGN=LEFT COLSPAN='2'><B>Infos</B></TD></TR>
-<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/zanek/Documents/GitHub/Warp-SE/cpld/XC95144XL\MXSE.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Sat Dec 11 06:24:06 2021</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
-<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/zanek/Documents/GitHub/Warp-SE/cpld/XC95144XL\MXSE.bld'>Translation Report</A></TD><TD>Current</TD><TD>Sat Dec 11 06:24:10 2021</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
-<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/zanek/Documents/GitHub/Warp-SE/cpld/XC95144XL\MXSE.rpt'>CPLD Fitter Report (Text)</A></TD><TD>Current</TD><TD>Sat Dec 11 06:24:23 2021</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/zanek/Documents/GitHub/Warp-SE/cpld/XC95144XL\_xmsgs/cpldfit.xmsgs?&DataKey=Warning'>1 Warning (1 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
-<TR ALIGN=LEFT><TD>Power Report</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD COLSPAN='2'>&nbsp;</TD></TR>
-</TABLE>
-&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
-<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='3'><B>Secondary Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=SecondaryReports"><B>[-]</B></a></TD></TR>
-<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD COLSPAN='2'><B>Generated</B></TD></TR>
-<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/zanek/Documents/GitHub/Warp-SE/cpld/XC95144XL\isim.log'>ISIM Simulator Log</A></TD><TD>Out of Date</TD><TD COLSPAN='2'>Sat Dec 11 07:14:04 2021</TD></TR>
-<TR ALIGN=LEFT><TD>Post-Fit Simulation Model Report</TD><TD>&nbsp;</TD><TD COLSPAN='2'>&nbsp;</TD></TR>
-</TABLE>
-
-
-<br><center><b>Date Generated:</b> 12/11/2021 - 07:16:19</center>
-</BODY></HTML>
\ No newline at end of file
diff --git a/cpld/XC95144XL/MXSE_summary.html b/cpld/XC95144XL/MXSE_summary.html
index 2c0a8a9..49c2e8a 100644
--- a/cpld/XC95144XL/MXSE_summary.html
+++ b/cpld/XC95144XL/MXSE_summary.html
@@ -2,7 +2,7 @@
 <BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>
 <TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
 <TR ALIGN=CENTER BGCOLOR='#99CCFF'>
-<TD ALIGN=CENTER COLSPAN='4'><B>MXSE Project Status (02/14/2022 - 19:36:00)</B></TD></TR>
+<TD ALIGN=CENTER COLSPAN='4'><B>MXSE Project Status (03/27/2022 - 10:12:15)</B></TD></TR>
 <TR ALIGN=LEFT>
 <TD BGCOLOR='#FFFF99'><B>Project File:</B></TD>
 <TD>WarpSE.xise</TD>
@@ -25,7 +25,7 @@ No Errors</TD>
 <TR ALIGN=LEFT>
 <TD BGCOLOR='#FFFF99'><B>Product Version:</B></TD><TD>ISE 14.7</TD>
 <TD BGCOLOR='#FFFF99'><UL><LI><B>Warnings:</B></LI></UL></TD>
-<TD ALIGN=LEFT>No Warnings</TD>
+<TD ALIGN=LEFT><A HREF_DISABLED='//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL\_xmsgs/*.xmsgs?&DataKey=Warning'>5 Warnings (0 new)</A></TD>
 </TR>
 <TR ALIGN=LEFT>
 <TD BGCOLOR='#FFFF99'><B>Design Goal:</B></dif></TD>
@@ -53,6 +53,27 @@ System Settings</A>
 
 
 
+&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
+<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='2'><B>Current Errors</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=CurrentErrors"><B>[-]</B></a></TD></TR>
+<TR ALIGN=LEFT BGCOLOR='#FFFF99'><TD COLSPAN='3'><B>No Errors Found</B></TD></TR>
+</TABLE>
+
+
+
+&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
+<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='2'><B>Current Warnings</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=CurrentWarnings"><B>[-]</B></a></TD></TR>
+<TR ALIGN=LEFT BGCOLOR='#FFFF99'><TD><B>Synthesis Warnings</B></TD><TD COLSPAN='2'><B>New</B></TD></TR>
+<TR ALIGN=LEFT><TD>WARNING:Xst:647: - Input &lt;SW&lt;2&gt;&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</TD><TD COLSPAN='2'>&nbsp;</TD></TR>
+<TR ALIGN=LEFT><TD>WARNING:Xst:1426: - The value init of the FF/Latch 0 hinder the constant cleaning in the block RESDone. You should achieve better results by setting this init to 1.</TD><TD COLSPAN='2'>&nbsp;</TD></TR>
+<TR ALIGN=LEFT><TD>WARNING:Xst:1426: - The value init of the FF/Latch 0 hinder the constant cleaning in the block Disable. You should achieve better results by setting this init to 1.</TD><TD COLSPAN='2'>&nbsp;</TD></TR>
+<TR ALIGN=LEFT><TD>WARNING:Xst:1426: - The value init of the FF/Latch RESDone hinder the constant cleaning in the block MXSE. You should achieve better results by setting this init to 1.</TD><TD COLSPAN='2'>&nbsp;</TD></TR>
+<TR ALIGN=LEFT><TD>WARNING:Xst:1426: - The value init of the FF/Latch Disable hinder the constant cleaning in the block MXSE. You should achieve better results by setting this init to 1.</TD><TD COLSPAN='2'>&nbsp;</TD></TR>
+</TABLE>
+
+
+
+
+
 
 
 
@@ -65,9 +86,9 @@ System Settings</A>
 <TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='6'><B>Detailed Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=DetailedReports"><B>[-]</B></a></TD></TR>
 <TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD><B>Generated</B></TD>
 <TD ALIGN=LEFT><B>Errors</B></TD><TD ALIGN=LEFT><B>Warnings</B></TD><TD ALIGN=LEFT COLSPAN='2'><B>Infos</B></TD></TR>
-<TR ALIGN=LEFT><TD><A HREF_DISABLED='//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL\MXSE.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Tue Feb 15 04:47:22 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
-<TR ALIGN=LEFT><TD><A HREF_DISABLED='//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL\MXSE.bld'>Translation Report</A></TD><TD>Current</TD><TD>Tue Feb 15 04:47:54 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
-<TR ALIGN=LEFT><TD><A HREF_DISABLED='//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL\MXSE.rpt'>CPLD Fitter Report (Text)</A></TD><TD>Current</TD><TD>Tue Feb 15 04:48:27 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL\_xmsgs/cpldfit.xmsgs?&DataKey=Warning'>1 Warning (1 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL\_xmsgs/cpldfit.xmsgs?&DataKey=Info'>3 Infos (3 new)</A></TD></TR>
+<TR ALIGN=LEFT><TD><A HREF_DISABLED='//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL\MXSE.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Sun Mar 27 10:07:11 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL\_xmsgs/xst.xmsgs?&DataKey=Warning'>5 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
+<TR ALIGN=LEFT><TD><A HREF_DISABLED='//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL\MXSE.bld'>Translation Report</A></TD><TD>Current</TD><TD>Sun Mar 27 10:07:43 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
+<TR ALIGN=LEFT><TD><A HREF_DISABLED='//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL\MXSE.rpt'>CPLD Fitter Report (Text)</A></TD><TD>Current</TD><TD>Sun Mar 27 10:08:18 2022</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL\_xmsgs/cpldfit.xmsgs?&DataKey=Warning'>2 Warnings (1 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL\_xmsgs/cpldfit.xmsgs?&DataKey=Info'>3 Infos (3 new)</A></TD></TR>
 <TR ALIGN=LEFT><TD>Power Report</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD COLSPAN='2'>&nbsp;</TD></TR>
 </TABLE>
 &nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
@@ -77,5 +98,5 @@ System Settings</A>
 </TABLE>
 
 
-<br><center><b>Date Generated:</b> 02/14/2022 - 19:36:00</center>
+<br><center><b>Date Generated:</b> 03/27/2022 - 10:12:16</center>
 </BODY></HTML>
\ No newline at end of file
diff --git a/cpld/XC95144XL/MXSE_xst 2.xrpt b/cpld/XC95144XL/MXSE_xst 2.xrpt
deleted file mode 100644
index 4ce5df1..0000000
--- a/cpld/XC95144XL/MXSE_xst 2.xrpt	
+++ /dev/null
@@ -1,134 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="yes" ?>
-<document OS="nt" product="ISE" version="14.7">
-
-  <!--The data in this file is primarily intended for consumption by Xilinx tools.
-    The structure and the elements are likely to change over the next few releases.
-    This means code written to parse this file will need to be revisited each subsequent release.-->
-
-  <application stringID="Xst" timeStamp="Sat Dec 11 06:24:04 2021">
-    <section stringID="User_Env">
-      <table stringID="User_EnvVar">
-        <column stringID="variable"/>
-        <column stringID="value"/>
-        <row stringID="row" value="0">
-          <item stringID="variable" value="Path"/>
-          <item stringID="value" value="C:\Xilinx\14.7\ISE_DS\ISE\\lib\nt;C:\Xilinx\14.7\ISE_DS\ISE\\bin\nt;C:\Xilinx\14.7\ISE_DS\ISE\bin\nt;C:\Xilinx\14.7\ISE_DS\ISE\lib\nt;C:\Xilinx\14.7\ISE_DS\ISE\..\..\..\DocNav;C:\Xilinx\14.7\ISE_DS\PlanAhead\bin;C:\Xilinx\14.7\ISE_DS\EDK\bin\nt;C:\Xilinx\14.7\ISE_DS\EDK\lib\nt;C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\nt\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnuwin\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnu\arm\nt\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt_be\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt_le\bin;C:\Xilinx\14.7\ISE_DS\common\bin\nt;C:\Xilinx\14.7\ISE_DS\common\lib\nt;C:\Program Files (x86)\Common Files\Oracle\Java\javapath;C:\ispLEVER_Classic2_0\ispcpld\bin;C:\ispLEVER_Classic2_0\ispFPGA\bin\nt;C:\ispLEVER_Classic2_0\active-hdl\BIN;C:\WinAVR-20100110\bin;C:\WinAVR-20100110\utils\bin;C:\Windows\system32;C:\Windows;C:\Windows\System32\Wbem;C:\Windows\System32\WindowsPowerShell\v1.0\;C:\Windows\System32\OpenSSH\;C:\Program Files\Microchip\xc8\v2.31\bin;C:\Program Files (x86)\NVIDIA Corporation\PhysX\Common;C:\Program Files\PuTTY\;C:\Program Files\WinMerge;C:\Program Files\dotnet\;C:\Users\zanek\AppData\Local\Microsoft\WindowsApps;C:\Users\zanek\AppData\Local\GitHubDesktop\bin;C:\altera\13.0sp1\modelsim_ase\win32aloem;C:\Users\zanek\.dotnet\tools;C:\Program Files (x86)\Skyworks\ClockBuilder Pro\Bin"/>
-        </row>
-        <row stringID="row" value="1">
-          <item stringID="variable" value="PATHEXT"/>
-          <item stringID="value" value=".COM;.EXE;.BAT;.CMD;.VBS;.VBE;.JS;.JSE;.WSF;.WSH;.MSC"/>
-        </row>
-        <row stringID="row" value="2">
-          <item stringID="variable" value="XILINX"/>
-          <item stringID="value" value="C:\Xilinx\14.7\ISE_DS\ISE\"/>
-        </row>
-        <row stringID="row" value="3">
-          <item stringID="variable" value="XILINX_DSP"/>
-          <item stringID="value" value="C:\Xilinx\14.7\ISE_DS\ISE"/>
-        </row>
-        <row stringID="row" value="4">
-          <item stringID="variable" value="XILINX_EDK"/>
-          <item stringID="value" value="C:\Xilinx\14.7\ISE_DS\EDK"/>
-        </row>
-        <row stringID="row" value="5">
-          <item stringID="variable" value="XILINX_PLANAHEAD"/>
-          <item stringID="value" value="C:\Xilinx\14.7\ISE_DS\PlanAhead"/>
-        </row>
-      </table>
-      <item stringID="User_EnvOs" value="OS Information">
-        <item stringID="User_EnvOsname" value="Microsoft , 64-bit"/>
-        <item stringID="User_EnvOsrelease" value="major release  (build 9200)"/>
-      </item>
-      <item stringID="User_EnvHost" value="ZanePC"/>
-      <table stringID="User_EnvCpu">
-        <column stringID="arch"/>
-        <column stringID="speed"/>
-        <row stringID="row" value="0">
-          <item stringID="arch" value="Intel(R) Core(TM) i7-4770K CPU @ 3.50GHz"/>
-          <item stringID="speed" value="3500 MHz"/>
-        </row>
-      </table>
-    </section>
-    <section stringID="XST_OPTION_SUMMARY">
-      <item DEFAULT="" label="-ifn" stringID="XST_IFN" value="MXSE.prj"/>
-      <item DEFAULT="MIXED" label="-ifmt" stringID="XST_IFMT" value="mixed"/>
-      <item DEFAULT="" label="-ofn" stringID="XST_OFN" value="MXSE"/>
-      <item DEFAULT="NGC" label="-ofmt" stringID="XST_OFMT" value="NGC"/>
-      <item DEFAULT="" label="-p" stringID="XST_P" value="xc9500xl"/>
-      <item DEFAULT="" label="-top" stringID="XST_TOP" value="MXSE"/>
-      <item DEFAULT="SPEED" label="-opt_mode" stringID="XST_OPTMODE" value="Speed"/>
-      <item DEFAULT="1" label="-opt_level" stringID="XST_OPTLEVEL" value="1"/>
-      <item DEFAULT="NO" label="-iuc" stringID="XST_IUC" value="NO"/>
-      <item DEFAULT="YES" label="-keep_hierarchy" stringID="XST_KEEPHIERARCHY" value="Yes"/>
-      <item DEFAULT="as_optimized" label="-netlist_hierarchy" stringID="XST_NETLISTHIERARCHY" value="As_Optimized"/>
-      <item DEFAULT="NO" label="-rtlview" stringID="XST_RTLVIEW" value="Yes"/>
-      <item DEFAULT="/" stringID="XST_HIERARCHYSEPARATOR" value="/"/>
-      <item DEFAULT="&lt;>" label="-bus_delimiter" stringID="XST_BUSDELIMITER" value="&lt;>"/>
-      <item DEFAULT="MAINTAIN" stringID="XST_CASE" value="Maintain"/>
-      <item DEFAULT="YES" label="-verilog2001" stringID="XST_VERILOG2001" value="YES"/>
-      <item DEFAULT="YES" label="-fsm_extract" stringID="XST_FSMEXTRACT" value="YES"/>
-      <item DEFAULT="AUTO" label="-fsm_encoding" stringID="XST_FSMENCODING" value="Auto"/>
-      <item DEFAULT="NO" label="-safe_implementation" stringID="XST_SAFEIMPLEMENTATION" value="No"/>
-      <item DEFAULT="YES" stringID="XST_MUXEXTRACT" value="Yes"/>
-      <item DEFAULT="YES" label="-resource_sharing" stringID="XST_RESOURCESHARING" value="YES"/>
-      <item DEFAULT="YES" label="-iobuf" stringID="XST_IOBUF" value="YES"/>
-      <item DEFAULT="YES" label="-equivalent_register_removal" stringID="XST_EQUIVALENTREGISTERREMOVAL" value="YES"/>
-    </section>
-    <section stringID="XST_HDL_SYNTHESIS_REPORT">
-      <item dataType="int" stringID="XST_COUNTERS" value="2"></item>
-      <item dataType="int" stringID="XST_REGISTERS" value="58">
-        <item dataType="int" stringID="XST_1BIT_REGISTER" value="58"/>
-      </item>
-    </section>
-    <section stringID="XST_ADVANCED_HDL_SYNTHESIS_REPORT">
-      <item dataType="int" stringID="XST_FSMS" value="3"/>
-      <item dataType="int" stringID="XST_COUNTERS" value="2"></item>
-      <item dataType="int" stringID="XST_REGISTERS" value="38">
-        <item dataType="int" stringID="XST_FLIPFLOPS" value="38"/>
-      </item>
-    </section>
-    <section stringID="XST_PARTITION_REPORT">
-      <section stringID="XST_PARTITION_IMPLEMENTATION_STATUS">
-        <section stringID="XST_NO_PARTITIONS_WERE_FOUND_IN_THIS_DESIGN"/>
-      </section>
-    </section>
-    <section stringID="XST_FINAL_REPORT">
-      <section stringID="XST_FINAL_RESULTS">
-        <item stringID="XST_RTL_TOP_LEVEL_OUTPUT_FILE_NAME" value="MXSE.ngr"/>
-        <item stringID="XST_TOP_LEVEL_OUTPUT_FILE_NAME" value="MXSE"/>
-        <item stringID="XST_OUTPUT_FORMAT" value="NGC"/>
-        <item stringID="XST_OPTIMIZATION_GOAL" value="Speed"/>
-        <item stringID="XST_KEEP_HIERARCHY" value="Yes"/>
-      </section>
-      <section stringID="XST_DESIGN_STATISTICS">
-        <item stringID="XST_IOS" value="67"/>
-      </section>
-      <section stringID="XST_CELL_USAGE">
-        <item dataType="int" stringID="XST_BELS" value="570">
-          <item dataType="int" stringID="XST_AND2" value="160"/>
-          <item dataType="int" stringID="XST_AND3" value="20"/>
-          <item dataType="int" stringID="XST_AND4" value="15"/>
-          <item dataType="int" stringID="XST_GND" value="6"/>
-          <item dataType="int" stringID="XST_INV" value="243"/>
-          <item dataType="int" stringID="XST_OR2" value="92"/>
-          <item dataType="int" stringID="XST_VCC" value="1"/>
-          <item dataType="int" stringID="XST_XOR2" value="12"/>
-        </item>
-        <item dataType="int" stringID="XST_FLIPFLOPSLATCHES" value="84">
-          <item dataType="int" stringID="XST_FD" value="57"/>
-          <item dataType="int" stringID="XST_FDCE" value="27"/>
-        </item>
-        <item dataType="int" stringID="XST_IO_BUFFERS" value="67">
-          <item dataType="int" stringID="XST_IBUF" value="35"/>
-          <item dataType="int" stringID="XST_OBUF" value="32"/>
-        </item>
-      </section>
-    </section>
-    <section stringID="XST_ERRORS_STATISTICS">
-      <item dataType="int" filtered="0" stringID="XST_NUMBER_OF_ERRORS" value="0"/>
-      <item dataType="int" filtered="0" stringID="XST_NUMBER_OF_WARNINGS" value="0"/>
-      <item dataType="int" filtered="0" stringID="XST_NUMBER_OF_INFOS" value="0"/>
-    </section>
-  </application>
-
-</document>
diff --git a/cpld/XC95144XL/MXSE_xst.xrpt b/cpld/XC95144XL/MXSE_xst.xrpt
index 0190b9e..d261941 100644
--- a/cpld/XC95144XL/MXSE_xst.xrpt
+++ b/cpld/XC95144XL/MXSE_xst.xrpt
@@ -5,7 +5,7 @@
     The structure and the elements are likely to change over the next few releases.
     This means code written to parse this file will need to be revisited each subsequent release.-->
 
-  <application stringID="Xst" timeStamp="Mon Feb 14 19:33:33 2022">
+  <application stringID="Xst" timeStamp="Sun Mar 27 10:06:33 2022">
     <section stringID="User_Env">
       <table stringID="User_EnvVar">
         <column stringID="variable"/>
@@ -45,7 +45,7 @@
         <column stringID="speed"/>
         <row stringID="row" value="0">
           <item stringID="arch" value="QEMU Virtual CPU version 2.5+"/>
-          <item stringID="speed" value="1000 MHz"/>
+          <item stringID="speed" value="1001 MHz"/>
         </row>
         <row stringID="row" value="1">
           <item stringID="arch" value="QEMU Virtual CPU version 2.5+"/>
@@ -80,15 +80,18 @@
     </section>
     <section stringID="XST_HDL_SYNTHESIS_REPORT">
       <item dataType="int" stringID="XST_COUNTERS" value="2"></item>
-      <item dataType="int" stringID="XST_REGISTERS" value="58">
-        <item dataType="int" stringID="XST_1BIT_REGISTER" value="58"/>
+      <item dataType="int" stringID="XST_REGISTERS" value="68">
+        <item dataType="int" stringID="XST_1BIT_REGISTER" value="68"/>
+      </item>
+      <item dataType="int" stringID="XST_TRISTATES" value="4">
+        <item dataType="int" stringID="XST_1BIT_TRISTATE_BUFFER" value="4"/>
       </item>
     </section>
     <section stringID="XST_ADVANCED_HDL_SYNTHESIS_REPORT">
       <item dataType="int" stringID="XST_FSMS" value="3"/>
       <item dataType="int" stringID="XST_COUNTERS" value="2"></item>
-      <item dataType="int" stringID="XST_REGISTERS" value="38">
-        <item dataType="int" stringID="XST_FLIPFLOPS" value="38"/>
+      <item dataType="int" stringID="XST_REGISTERS" value="47">
+        <item dataType="int" stringID="XST_FLIPFLOPS" value="47"/>
       </item>
     </section>
     <section stringID="XST_PARTITION_REPORT">
@@ -105,32 +108,33 @@
         <item stringID="XST_KEEP_HIERARCHY" value="Yes"/>
       </section>
       <section stringID="XST_DESIGN_STATISTICS">
-        <item stringID="XST_IOS" value="67"/>
+        <item stringID="XST_IOS" value="75"/>
       </section>
       <section stringID="XST_CELL_USAGE">
-        <item dataType="int" stringID="XST_BELS" value="607">
-          <item dataType="int" stringID="XST_AND2" value="169"/>
-          <item dataType="int" stringID="XST_AND3" value="25"/>
-          <item dataType="int" stringID="XST_AND4" value="14"/>
-          <item dataType="int" stringID="XST_GND" value="6"/>
-          <item dataType="int" stringID="XST_INV" value="256"/>
-          <item dataType="int" stringID="XST_OR2" value="108"/>
-          <item dataType="int" stringID="XST_VCC" value="1"/>
+        <item dataType="int" stringID="XST_BELS" value="606">
+          <item dataType="int" stringID="XST_AND2" value="168"/>
+          <item dataType="int" stringID="XST_AND3" value="27"/>
+          <item dataType="int" stringID="XST_AND4" value="12"/>
+          <item dataType="int" stringID="XST_GND" value="7"/>
+          <item dataType="int" stringID="XST_INV" value="260"/>
+          <item dataType="int" stringID="XST_OR2" value="99"/>
+          <item dataType="int" stringID="XST_VCC" value="2"/>
           <item dataType="int" stringID="XST_XOR2" value="12"/>
         </item>
-        <item dataType="int" stringID="XST_FLIPFLOPSLATCHES" value="80">
-          <item dataType="int" stringID="XST_FD" value="54"/>
-          <item dataType="int" stringID="XST_FDCE" value="26"/>
+        <item dataType="int" stringID="XST_FLIPFLOPSLATCHES" value="89">
+          <item dataType="int" stringID="XST_FD" value="60"/>
+          <item dataType="int" stringID="XST_FDCE" value="29"/>
         </item>
-        <item dataType="int" stringID="XST_IO_BUFFERS" value="67">
-          <item dataType="int" stringID="XST_IBUF" value="35"/>
-          <item dataType="int" stringID="XST_OBUF" value="32"/>
+        <item dataType="int" stringID="XST_TRISTATES" value="1"></item>
+        <item dataType="int" stringID="XST_IO_BUFFERS" value="74">
+          <item dataType="int" stringID="XST_IBUF" value="39"/>
+          <item dataType="int" stringID="XST_OBUF" value="31"/>
         </item>
       </section>
     </section>
     <section stringID="XST_ERRORS_STATISTICS">
       <item dataType="int" filtered="0" stringID="XST_NUMBER_OF_ERRORS" value="0"/>
-      <item dataType="int" filtered="0" stringID="XST_NUMBER_OF_WARNINGS" value="0"/>
+      <item dataType="int" filtered="0" stringID="XST_NUMBER_OF_WARNINGS" value="5"/>
       <item dataType="int" filtered="0" stringID="XST_NUMBER_OF_INFOS" value="0"/>
     </section>
   </application>
diff --git a/cpld/XC95144XL/WarpSE.gise b/cpld/XC95144XL/WarpSE.gise
index bf86ac7..132ad68 100644
--- a/cpld/XC95144XL/WarpSE.gise
+++ b/cpld/XC95144XL/WarpSE.gise
@@ -25,6 +25,8 @@
     <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGDBUILD_LOG" xil_pn:name="MXSE.bld"/>
     <file xil_pn:fileType="FILE_CMD_LOG" xil_pn:name="MXSE.cmd_log"/>
     <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_GYD" xil_pn:name="MXSE.gyd"/>
+    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_JEDEC" xil_pn:name="MXSE.jed"/>
+    <file xil_pn:fileType="FILE_LFP" xil_pn:name="MXSE.lfp"/>
     <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_LSO" xil_pn:name="MXSE.lso"/>
     <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_MFD" xil_pn:name="MXSE.mfd"/>
     <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGA" xil_pn:name="MXSE.nga"/>
@@ -43,11 +45,14 @@
     <file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="MXSE.xml"/>
     <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST" xil_pn:name="MXSE.xst"/>
     <file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="MXSE_build.xml"/>
+    <file xil_pn:fileType="FILE_HTML" xil_pn:name="MXSE_envsettings.html"/>
     <file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="MXSE_html"/>
     <file xil_pn:fileType="FILE_XRPT" xil_pn:name="MXSE_ngdbuild.xrpt"/>
     <file xil_pn:fileType="FILE_PAD_EXCEL_REPORT" xil_pn:name="MXSE_pad.csv"/>
     <file xil_pn:fileType="FILE_HTML" xil_pn:name="MXSE_summary.html"/>
     <file xil_pn:fileType="FILE_XRPT" xil_pn:name="MXSE_xst.xrpt"/>
+    <file xil_pn:fileType="FILE_CMD" xil_pn:name="_impact.cmd"/>
+    <file xil_pn:fileType="FILE_LOG" xil_pn:name="_impact.log"/>
     <file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="_ngo"/>
     <file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
     <file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/xst.xmsgs"/>
@@ -57,18 +62,20 @@
   </files>
 
   <transforms xmlns="http://www.xilinx.com/XMLSchema">
-    <transform xil_pn:end_ts="1644222322" xil_pn:name="TRAN_copyInitialToXSTAbstractSynthesis" xil_pn:start_ts="1644222321">
+    <transform xil_pn:end_ts="1648389978" xil_pn:name="TRAN_copyInitialToXSTAbstractSynthesis" xil_pn:start_ts="1648389978">
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="ReadyToRun"/>
     </transform>
-    <transform xil_pn:end_ts="1644222322" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="167449203504654628" xil_pn:start_ts="1644222322">
+    <transform xil_pn:end_ts="1648389978" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="167449203504654628" xil_pn:start_ts="1648389978">
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="ReadyToRun"/>
     </transform>
-    <transform xil_pn:end_ts="1644222367" xil_pn:in_ck="-7042198571556068688" xil_pn:name="TRANEXT_xstsynthesize_xc9500xl" xil_pn:prop_ck="-2899378119827487496" xil_pn:start_ts="1644222322">
+    <transform xil_pn:end_ts="1648390024" xil_pn:in_ck="-7042198571556068688" xil_pn:name="TRANEXT_xstsynthesize_xc9500xl" xil_pn:prop_ck="-2899378119827487496" xil_pn:start_ts="1648389978">
       <status xil_pn:value="SuccessfullyRun"/>
+      <status xil_pn:value="WarningsGenerated"/>
       <status xil_pn:value="ReadyToRun"/>
-      <status xil_pn:value="OutOfDateForInputs"/>
+      <status xil_pn:value="OutOfDateForOutputs"/>
+      <status xil_pn:value="OutputChanged"/>
       <outfile xil_pn:name="MXSE.lso"/>
       <outfile xil_pn:name="MXSE.ngc"/>
       <outfile xil_pn:name="MXSE.ngr"/>
@@ -81,25 +88,27 @@
       <outfile xil_pn:name="webtalk_pn.xml"/>
       <outfile xil_pn:name="xst"/>
     </transform>
-    <transform xil_pn:end_ts="1644224591" xil_pn:in_ck="72657061410852372" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="123229027434767103" xil_pn:start_ts="1644224591">
+    <transform xil_pn:end_ts="1648390024" xil_pn:in_ck="72657061410852372" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="123229027434767103" xil_pn:start_ts="1648390024">
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="ReadyToRun"/>
     </transform>
-    <transform xil_pn:end_ts="1644224623" xil_pn:in_ck="1136913611493600791" xil_pn:name="TRAN_ngdbuild" xil_pn:prop_ck="1893441463969615248" xil_pn:start_ts="1644224591">
+    <transform xil_pn:end_ts="1648390056" xil_pn:in_ck="1136913611493600791" xil_pn:name="TRAN_ngdbuild" xil_pn:prop_ck="1893441463969615248" xil_pn:start_ts="1648390024">
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="ReadyToRun"/>
-      <status xil_pn:value="OutOfDateForPredecessor"/>
+      <status xil_pn:value="OutOfDateForOutputs"/>
+      <status xil_pn:value="OutputChanged"/>
       <outfile xil_pn:name="MXSE.bld"/>
       <outfile xil_pn:name="MXSE.ngd"/>
       <outfile xil_pn:name="MXSE_ngdbuild.xrpt"/>
       <outfile xil_pn:name="_ngo"/>
       <outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
     </transform>
-    <transform xil_pn:end_ts="1644224694" xil_pn:in_ck="3398601133060" xil_pn:name="TRANEXT_vm6File_xc9500xl" xil_pn:prop_ck="-8996915014894439674" xil_pn:start_ts="1644224623">
+    <transform xil_pn:end_ts="1648390130" xil_pn:in_ck="3398601133060" xil_pn:name="TRANEXT_vm6File_xc9500xl" xil_pn:prop_ck="-8996915014894439674" xil_pn:start_ts="1648390056">
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="WarningsGenerated"/>
       <status xil_pn:value="ReadyToRun"/>
-      <status xil_pn:value="OutOfDateForPredecessor"/>
+      <status xil_pn:value="OutOfDateForOutputs"/>
+      <status xil_pn:value="OutputChanged"/>
       <outfile xil_pn:name="MXSE.gyd"/>
       <outfile xil_pn:name="MXSE.mfd"/>
       <outfile xil_pn:name="MXSE.nga"/>
@@ -114,16 +123,33 @@
       <outfile xil_pn:name="MXSE_html"/>
       <outfile xil_pn:name="MXSE_pad.csv"/>
     </transform>
-    <transform xil_pn:end_ts="1644224711" xil_pn:in_ck="3398601141924" xil_pn:name="TRAN_timRpt" xil_pn:prop_ck="111903974446" xil_pn:start_ts="1644224694">
+    <transform xil_pn:end_ts="1648390335" xil_pn:in_ck="3398601141924" xil_pn:name="TRANEXT_crtProg_xc9500" xil_pn:prop_ck="-6294026017969277533" xil_pn:start_ts="1648390320">
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="ReadyToRun"/>
-      <status xil_pn:value="OutOfDateForPredecessor"/>
+      <outfile xil_pn:name="MXSE.jed"/>
     </transform>
-    <transform xil_pn:end_ts="1644224548" xil_pn:in_ck="1136913611493600792" xil_pn:name="TRAN_createTimingConstraints" xil_pn:start_ts="1644224548">
+    <transform xil_pn:end_ts="1648390365" xil_pn:in_ck="3398601128638" xil_pn:name="TRAN_impactProgrammingTool_CPLD" xil_pn:prop_ck="-3598488201878296819" xil_pn:start_ts="1648390364">
+      <status xil_pn:value="SuccessfullyRun"/>
+      <status xil_pn:value="ReadyToRun"/>
+      <status xil_pn:value="OutOfDateForOutputs"/>
+      <status xil_pn:value="OutputChanged"/>
+      <outfile xil_pn:name="_impact.cmd"/>
+      <outfile xil_pn:name="_impact.log"/>
+    </transform>
+    <transform xil_pn:end_ts="1648390761" xil_pn:in_ck="3398601128638" xil_pn:name="TRAN_configureTargetDevice_CPLD" xil_pn:prop_ck="-154879694275837835" xil_pn:start_ts="1648390758">
+      <status xil_pn:value="SuccessfullyRun"/>
+      <status xil_pn:value="ReadyToRun"/>
+      <outfile xil_pn:name="_impact.cmd"/>
+      <outfile xil_pn:name="_impact.log"/>
+    </transform>
+    <transform xil_pn:end_ts="1648390147" xil_pn:in_ck="3398601141924" xil_pn:name="TRAN_timRpt" xil_pn:prop_ck="111903974446" xil_pn:start_ts="1648390130">
+      <status xil_pn:value="SuccessfullyRun"/>
+      <status xil_pn:value="ReadyToRun"/>
+    </transform>
+    <transform xil_pn:end_ts="1648388646" xil_pn:in_ck="1136913611493600792" xil_pn:name="TRAN_createTimingConstraints" xil_pn:start_ts="1648388646">
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="ReadyToRun"/>
       <status xil_pn:value="OutOfDateForInputs"/>
-      <status xil_pn:value="OutOfDateForPredecessor"/>
       <status xil_pn:value="InputChanged"/>
     </transform>
   </transforms>
diff --git a/cpld/XC95144XL/_impact.cmd b/cpld/XC95144XL/_impact.cmd
new file mode 100644
index 0000000..3e5d201
--- /dev/null
+++ b/cpld/XC95144XL/_impact.cmd
@@ -0,0 +1,41 @@
+setMode -bs
+setMode -bs
+setMode -bs
+setMode -bs
+setCable -port svf -file "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.svf"
+addDevice -p 1 -file "//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.jed"
+Erase -p 1 
+Program -p 1 -e -v 
+setMode -bs
+setMode -bs
+setMode -ss
+setMode -sm
+setMode -hw140
+setMode -spi
+setMode -acecf
+setMode -acempm
+setMode -pff
+setMode -bs
+saveProjectFile -file "\\192.168.64.1\Repos\Warp-SE\cpld\\auto_project.ipf"
+setMode -bs
+setMode -bs
+setMode -ss
+setMode -sm
+setMode -hw140
+setMode -spi
+setMode -acecf
+setMode -acempm
+setMode -pff
+setMode -bs
+saveProjectFile -file "\\192.168.64.1\Repos\Warp-SE\cpld\\auto_project.ipf"
+setMode -bs
+setMode -bs
+deleteDevice -position 1
+setMode -bs
+setMode -ss
+setMode -sm
+setMode -hw140
+setMode -spi
+setMode -acecf
+setMode -acempm
+setMode -pff
diff --git a/cpld/XC95144XL/_impact.log b/cpld/XC95144XL/_impact.log
new file mode 100644
index 0000000..8480969
--- /dev/null
+++ b/cpld/XC95144XL/_impact.log
@@ -0,0 +1,77 @@
+iMPACT Version: 14.7
+
+iMPACT log file Started on Sun Mar 27 10:19:44 2022
+
+Welcome to iMPACT
+iMPACT Version: 14.7
+Project: \\192.168.64.1\Repos\Warp-SE\cpld\\auto_project.ipf created.
+// *** BATCH CMD : setMode -bs
+// *** BATCH CMD : setCable -port svf -file"//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.svf"
+// *** BATCH CMD : addDevice -p 1 -file"//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.jed"
+'1': Loading file '//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/MXSE.jed' ...
+done.
+INFO:iMPACT:1777 - 
+   Reading C:/Xilinx/14.7/ISE_DS/ISE/xc9500xl/data/xc95144xl.bsd...
+INFO:iMPACT:501 - '1': Added Device xc95144xl successfully.
+----------------------------------------------------------------------
+INFO:iMPACT - Current time: 3/27/2022 10:20:16 AM
+WARNING:iMPACT - Warning: SVF Programming of 9500 series CPLDs is not supported   by every third-party boundary-scan tool provider. Please check for support   before using this SVF file to program a 9500 series device.
+// *** BATCH CMD : Erase -p 1 
+
+'1': Erasing device...
+'1': Erasure completed successfully.
+PROGRESS_START - Starting Operation.
+PROGRESS_END - End Operation.
+Elapsed time =      0 sec.
+INFO:iMPACT - Current time: 3/27/2022 10:20:29 AM
+WARNING:iMPACT - Warning: SVF Programming of 9500 series CPLDs is not supported   by every third-party boundary-scan tool provider. Please check for support   before using this SVF file to program a 9500 series device.
+// *** BATCH CMD : Program -p 1 -e -v 
+
+'1': Erasing device...
+'1': Erasure completed successfully.
+'1': Programming device...
+PROGRESS_START - Starting Operation.
+done.
+'1': Putting device in ISP mode...done.
+'1': Putting device in ISP mode...done.
+'1': Verifying device...done.
+'1': Verification completed successfully.
+'1': Putting device in ISP mode...done.
+'1': Programming completed successfully.
+PROGRESS_END - End Operation.
+Elapsed time =      3 sec.
+// *** BATCH CMD : setMode -bs
+// *** BATCH CMD : setMode -ss
+// *** BATCH CMD : setMode -sm
+// *** BATCH CMD : setMode -hw140
+// *** BATCH CMD : setMode -spi
+// *** BATCH CMD : setMode -acecf
+// *** BATCH CMD : setMode -acempm
+// *** BATCH CMD : setMode -pff
+// *** BATCH CMD : setMode -bs
+// *** BATCH CMD : saveProjectFile -file"\\192.168.64.1\Repos\Warp-SE\cpld\\auto_project.ipf"
+Backup of auto project '\\192.168.64.1\Repos\Warp-SE\cpld\\auto_project_1.ipf'created.
+Project: '\\192.168.64.1\Repos\Warp-SE\cpld\\auto_project.ipf' created.
+// *** BATCH CMD : setMode -bs
+// *** BATCH CMD : setMode -ss
+// *** BATCH CMD : setMode -sm
+// *** BATCH CMD : setMode -hw140
+// *** BATCH CMD : setMode -spi
+// *** BATCH CMD : setMode -acecf
+// *** BATCH CMD : setMode -acempm
+// *** BATCH CMD : setMode -pff
+// *** BATCH CMD : setMode -bs
+// *** BATCH CMD : saveProjectFile -file"\\192.168.64.1\Repos\Warp-SE\cpld\\auto_project.ipf"
+// *** BATCH CMD : setMode -bs
+INFO:iMPACT - Launching WebTalk, please refer to the webtalk log at   \\192.168.64.1\Repos\Warp-SE\cpld\webtalk.log for details.
+INFO:iMPACT - Running wbtc successfully.
+// *** BATCH CMD : setMode -bs
+// *** BATCH CMD : deleteDevice -position 1
+// *** BATCH CMD : setMode -bs
+// *** BATCH CMD : setMode -ss
+// *** BATCH CMD : setMode -sm
+// *** BATCH CMD : setMode -hw140
+// *** BATCH CMD : setMode -spi
+// *** BATCH CMD : setMode -acecf
+// *** BATCH CMD : setMode -acempm
+// *** BATCH CMD : setMode -pff
diff --git a/cpld/XC95144XL/_ngo/netlist.lst b/cpld/XC95144XL/_ngo/netlist.lst
index 4b55b8d..0a665c5 100644
--- a/cpld/XC95144XL/_ngo/netlist.lst
+++ b/cpld/XC95144XL/_ngo/netlist.lst
@@ -1,2 +1,2 @@
-\\192.168.64.1\Repos\Warp-SE\cpld\XC95144XL\MXSE.ngc 1644885239
+\\192.168.64.1\Repos\Warp-SE\cpld\XC95144XL\MXSE.ngc 1648390021
 OK
diff --git a/cpld/XC95144XL/_xmsgs/cpldfit.xmsgs b/cpld/XC95144XL/_xmsgs/cpldfit.xmsgs
index 410648a..7efb20c 100644
--- a/cpld/XC95144XL/_xmsgs/cpldfit.xmsgs
+++ b/cpld/XC95144XL/_xmsgs/cpldfit.xmsgs
@@ -17,5 +17,8 @@
 <msg type="info" file="Cpld" num="0" delta="new" >Inferring BUFG constraint for signal &apos;<arg fmt="%s" index="1">CLK_IOB</arg>&apos; based upon the LOC constraint &apos;<arg fmt="%s" index="2">P23</arg>&apos;. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored.
 </msg>
 
+<msg type="warning" file="Cpld" num="1007" delta="old" >Removing unused input(s) &apos;<arg fmt="%s" index="1">SW&lt;2&gt;</arg>&apos;.  The input(s) are unused after optimization. Please verify functionality via simulation.
+</msg>
+
 </messages>
 
diff --git a/cpld/XC95144XL/_xmsgs/pn_parser 2.xmsgs b/cpld/XC95144XL/_xmsgs/pn_parser 2.xmsgs
deleted file mode 100644
index f66074b..0000000
--- a/cpld/XC95144XL/_xmsgs/pn_parser 2.xmsgs	
+++ /dev/null
@@ -1,15 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<!-- IMPORTANT: This is an internal file that has been generated   -->
-<!--     by the Xilinx ISE software.  Any direct editing or        -->
-<!--     changes made to this file may result in unpredictable     -->
-<!--     behavior or data corruption.  It is strongly advised that -->
-<!--     users do not edit the contents of this file.              -->
-<!--                                                               -->
-<!-- Copyright (c) 1995-2013 Xilinx, Inc.  All rights reserved.    -->
-
-<messages>
-<msg type="info" file="ProjectMgmt" num="1845" ><arg fmt="%s" index="1">Analyzing Verilog file &quot;C:/Users/zanek/Documents/GitHub/Warp-SE/cpld/XC95144XL/t_ram.v&quot; into library work</arg>
-</msg>
-
-</messages>
-
diff --git a/cpld/XC95144XL/_xmsgs/pn_parser.xmsgs b/cpld/XC95144XL/_xmsgs/pn_parser.xmsgs
index 7c7d35f..2b18975 100644
--- a/cpld/XC95144XL/_xmsgs/pn_parser.xmsgs
+++ b/cpld/XC95144XL/_xmsgs/pn_parser.xmsgs
@@ -8,7 +8,7 @@
 <!-- Copyright (c) 1995-2013 Xilinx, Inc.  All rights reserved.    -->
 
 <messages>
-<msg type="info" file="ProjectMgmt" num="1845" ><arg fmt="%s" index="1">Analyzing Verilog file &quot;//192.168.64.1/Repos/Warp-SE/cpld/RAM.v&quot; into library work</arg>
+<msg type="info" file="ProjectMgmt" num="1845" ><arg fmt="%s" index="1">Analyzing Verilog file &quot;//192.168.64.1/Repos/Warp-SE/cpld/MXSE.v&quot; into library work</arg>
 </msg>
 
 </messages>
diff --git a/cpld/XC95144XL/_xmsgs/xst.xmsgs b/cpld/XC95144XL/_xmsgs/xst.xmsgs
index c42b14a..78dca83 100644
--- a/cpld/XC95144XL/_xmsgs/xst.xmsgs
+++ b/cpld/XC95144XL/_xmsgs/xst.xmsgs
@@ -5,5 +5,24 @@
      behavior or data corruption.  It is strongly advised that
      users do not edit the contents of this file. -->
 <messages>
+<msg type="warning" file="Xst" num="647" delta="old" >Input &lt;<arg fmt="%s" index="1">SW&lt;2&gt;</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
+</msg>
+
+<msg type="warning" file="Xst" num="1426" delta="old" >The value init of the FF/Latch <arg fmt="%s" index="1">0</arg> hinder the constant cleaning in the block <arg fmt="%s" index="2">RESDone</arg>.
+You should achieve better results by setting this init to <arg fmt="%i" index="3">1</arg>.
+</msg>
+
+<msg type="warning" file="Xst" num="1426" delta="old" >The value init of the FF/Latch <arg fmt="%s" index="1">0</arg> hinder the constant cleaning in the block <arg fmt="%s" index="2">Disable</arg>.
+You should achieve better results by setting this init to <arg fmt="%i" index="3">1</arg>.
+</msg>
+
+<msg type="warning" file="Xst" num="1426" delta="old" >The value init of the FF/Latch <arg fmt="%s" index="1">RESDone</arg> hinder the constant cleaning in the block <arg fmt="%s" index="2">MXSE</arg>.
+You should achieve better results by setting this init to <arg fmt="%i" index="3">1</arg>.
+</msg>
+
+<msg type="warning" file="Xst" num="1426" delta="old" >The value init of the FF/Latch <arg fmt="%s" index="1">Disable</arg> hinder the constant cleaning in the block <arg fmt="%s" index="2">MXSE</arg>.
+You should achieve better results by setting this init to <arg fmt="%i" index="3">1</arg>.
+</msg>
+
 </messages>
 
diff --git a/cpld/XC95144XL/iseconfig/MXSE.xreport b/cpld/XC95144XL/iseconfig/MXSE.xreport
index 40992eb..45d4fe8 100644
--- a/cpld/XC95144XL/iseconfig/MXSE.xreport
+++ b/cpld/XC95144XL/iseconfig/MXSE.xreport
@@ -1,9 +1,9 @@
 <?xml version='1.0' encoding='UTF-8'?>
 <report-views version="2.0" >
  <header>
-  <DateModified>2022-02-14T19:23:34</DateModified>
+  <DateModified>2022-03-27T09:50:01</DateModified>
   <ModuleName>MXSE</ModuleName>
-  <SummaryTimeStamp>Unknown</SummaryTimeStamp>
+  <SummaryTimeStamp>2022-03-27T09:48:59</SummaryTimeStamp>
   <SavedFilePath>//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/iseconfig/MXSE.xreport</SavedFilePath>
   <ImplementationReportsDirectory>//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL\</ImplementationReportsDirectory>
   <DateInitialized>2022-02-07T03:25:12</DateInitialized>
@@ -11,7 +11,7 @@
  </header>
  <body>
   <viewgroup label="Design Overview" >
-   <view inputState="Unknown" program="implementation" ShowPartitionData="false" type="FPGASummary" file="MXSE_summary.html" label="Summary" >
+   <view inputState="Unknown" program="implementation" ExpandErrors="true" ShowPartitionData="false" ExpandConstraints="true" type="FPGASummary" file="MXSE_summary.html" label="Summary" ExpandClockNets="true" ExpandWarnings="true" >
     <toc-item title="Design Overview" target="Design Overview" />
     <toc-item title="Design Utilization Summary" target="Design Utilization Summary" />
     <toc-item title="Performance Summary" target="Performance Summary" />
diff --git a/cpld/XC95144XL/webtalk_pn.xml b/cpld/XC95144XL/webtalk_pn.xml
new file mode 100644
index 0000000..120e65b
--- /dev/null
+++ b/cpld/XC95144XL/webtalk_pn.xml
@@ -0,0 +1,42 @@
+<?xml version="1.0" encoding="UTF-8" ?>
+<document>
+<!--The data in this file is primarily intended for consumption by Xilinx tools.
+The structure and the elements are likely to change over the next few releases.
+This means code written to parse this file will need to be revisited each subsequent release.-->
+<application name="pn" timeStamp="Sun Mar 27 10:06:20 2022">
+<section name="Project Information" visible="false">
+<property name="ProjectID" value="5A6450E3527B4316B60909A9F93EEB31" type="project"/>
+<property name="ProjectIteration" value="0" type="project"/>
+<property name="ProjectFile" value="//192.168.64.1/Repos/Warp-SE/cpld/XC95144XL/WarpSE.xise" type="project"/>
+<property name="ProjectCreationTimestamp" value="2022-02-07T03:24:53" type="project"/>
+</section>
+<section name="Project Statistics" visible="true">
+<property name="PROP_Enable_Message_Filtering" value="false" type="design"/>
+<property name="PROP_FitterReportFormat" value="HTML" type="process"/>
+<property name="PROP_LastAppliedGoal" value="Balanced" type="design"/>
+<property name="PROP_LastAppliedStrategy" value="Xilinx Default (unlocked)" type="design"/>
+<property name="PROP_ManualCompileOrderImp" value="false" type="design"/>
+<property name="PROP_PropSpecInProjFile" value="Store all values" type="design"/>
+<property name="PROP_Simulator" value="ISim (VHDL/Verilog)" type="design"/>
+<property name="PROP_SynthTopFile" value="changed" type="process"/>
+<property name="PROP_Top_Level_Module_Type" value="HDL" type="design"/>
+<property name="PROP_UseSmartGuide" value="false" type="design"/>
+<property name="PROP_UserConstraintEditorPreference" value="Text Editor" type="process"/>
+<property name="PROP_intProjectCreationTimestamp" value="2022-02-07T03:24:53" type="design"/>
+<property name="PROP_intWbtProjectID" value="5A6450E3527B4316B60909A9F93EEB31" type="design"/>
+<property name="PROP_intWorkingDirLocWRTProjDir" value="Same" type="design"/>
+<property name="PROP_intWorkingDirUsed" value="No" type="design"/>
+<property name="PROP_xilxSynthMaxFanout" value="100000" type="process"/>
+<property name="PROP_AutoTop" value="true" type="design"/>
+<property name="PROP_DevFamily" value="XC9500XL CPLDs" type="design"/>
+<property name="PROP_DevDevice" value="xc95144xl" type="design"/>
+<property name="PROP_DevFamilyPMName" value="xc9500xl" type="design"/>
+<property name="PROP_DevPackage" value="TQ100" type="design"/>
+<property name="PROP_Synthesis_Tool" value="XST (VHDL/Verilog)" type="design"/>
+<property name="PROP_DevSpeed" value="-10" type="design"/>
+<property name="PROP_PreferredLanguage" value="Verilog" type="design"/>
+<property name="FILE_UCF" value="1" type="source"/>
+<property name="FILE_VERILOG" value="7" type="source"/>
+</section>
+</application>
+</document>
diff --git a/cpld/XC95144XL/xlnx_auto_0_xdb/cst.xbcd b/cpld/XC95144XL/xlnx_auto_0_xdb/cst.xbcd
index b2f4c77..dd50c7d 100644
Binary files a/cpld/XC95144XL/xlnx_auto_0_xdb/cst.xbcd and b/cpld/XC95144XL/xlnx_auto_0_xdb/cst.xbcd differ
diff --git a/cpld/XC95144XL/xst/work/hdllib.ref b/cpld/XC95144XL/xst/work/hdllib.ref
index d0d92ba..3dc1e0d 100644
--- a/cpld/XC95144XL/xst/work/hdllib.ref
+++ b/cpld/XC95144XL/xst/work/hdllib.ref
@@ -1,7 +1,7 @@
-MO CNT NULL ../CNT.v vlg65/_c_n_t.bin 1644885214
-MO CS NULL ../CS.v vlg22/_c_s.bin 1644885214
-MO FSB NULL ../FSB.v vlg37/_f_s_b.bin 1644885214
-MO IOBM NULL ../IOBM.v vlg73/_i_o_b_m.bin 1644885214
-MO IOBS NULL ../IOBS.v vlg79/_i_o_b_s.bin 1644885214
-MO RAM NULL ../RAM.v vlg14/_r_a_m.bin 1644885214
-MO MXSE NULL ../MXSE.v vlg15/_m_x_s_e.bin 1644885214
+MO CNT NULL ../CNT.v vlg65/_c_n_t.bin 1648389994
+MO CS NULL ../CS.v vlg22/_c_s.bin 1648389994
+MO FSB NULL ../FSB.v vlg37/_f_s_b.bin 1648389994
+MO IOBM NULL ../IOBM.v vlg73/_i_o_b_m.bin 1648389994
+MO IOBS NULL ../IOBS.v vlg79/_i_o_b_s.bin 1648389994
+MO RAM NULL ../RAM.v vlg14/_r_a_m.bin 1648389994
+MO MXSE NULL ../MXSE.v vlg15/_m_x_s_e.bin 1648389994
diff --git a/cpld/XC95144XL/xst/work/vlg14/_r_a_m.bin b/cpld/XC95144XL/xst/work/vlg14/_r_a_m.bin
index 8f8d92c..3a21751 100644
Binary files a/cpld/XC95144XL/xst/work/vlg14/_r_a_m.bin and b/cpld/XC95144XL/xst/work/vlg14/_r_a_m.bin differ
diff --git a/cpld/XC95144XL/xst/work/vlg15/_m_x_s_e.bin b/cpld/XC95144XL/xst/work/vlg15/_m_x_s_e.bin
index 8e6df58..adcdfa7 100644
Binary files a/cpld/XC95144XL/xst/work/vlg15/_m_x_s_e.bin and b/cpld/XC95144XL/xst/work/vlg15/_m_x_s_e.bin differ
diff --git a/cpld/XC95144XL/xst/work/vlg22/_c_s.bin b/cpld/XC95144XL/xst/work/vlg22/_c_s.bin
index d3b8d35..a2d3c45 100644
Binary files a/cpld/XC95144XL/xst/work/vlg22/_c_s.bin and b/cpld/XC95144XL/xst/work/vlg22/_c_s.bin differ
diff --git a/cpld/XC95144XL/xst/work/vlg37/_f_s_b.bin b/cpld/XC95144XL/xst/work/vlg37/_f_s_b.bin
index a711059..56ad261 100644
Binary files a/cpld/XC95144XL/xst/work/vlg37/_f_s_b.bin and b/cpld/XC95144XL/xst/work/vlg37/_f_s_b.bin differ
diff --git a/cpld/XC95144XL/xst/work/vlg65/_c_n_t.bin b/cpld/XC95144XL/xst/work/vlg65/_c_n_t.bin
index 15e11bc..7adb98f 100644
Binary files a/cpld/XC95144XL/xst/work/vlg65/_c_n_t.bin and b/cpld/XC95144XL/xst/work/vlg65/_c_n_t.bin differ
diff --git a/cpld/XC95144XL/xst/work/vlg73/_i_o_b_m.bin b/cpld/XC95144XL/xst/work/vlg73/_i_o_b_m.bin
index 78994ae..adff547 100644
Binary files a/cpld/XC95144XL/xst/work/vlg73/_i_o_b_m.bin and b/cpld/XC95144XL/xst/work/vlg73/_i_o_b_m.bin differ
diff --git a/cpld/XC95144XL/xst/work/vlg79/_i_o_b_s.bin b/cpld/XC95144XL/xst/work/vlg79/_i_o_b_s.bin
index a4f3176..e221d4a 100644
Binary files a/cpld/XC95144XL/xst/work/vlg79/_i_o_b_s.bin and b/cpld/XC95144XL/xst/work/vlg79/_i_o_b_s.bin differ
diff --git a/cpld/auto_project.ipf b/cpld/auto_project.ipf
new file mode 100644
index 0000000..454b5e0
Binary files /dev/null and b/cpld/auto_project.ipf differ
diff --git a/cpld/auto_project_1.ipf b/cpld/auto_project_1.ipf
new file mode 100644
index 0000000..c80187c
Binary files /dev/null and b/cpld/auto_project_1.ipf differ
diff --git a/cpld/impact.xsl b/cpld/impact.xsl
new file mode 100644
index 0000000..e4999d7
--- /dev/null
+++ b/cpld/impact.xsl
@@ -0,0 +1,55 @@
+<xsl:stylesheet
+  xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
+  version="1.0">
+  
+  <xsl:output method="html"/>
+  
+  <xsl:template match="/">
+<b>
+  <xsl:text>Current iMPACT Usage Statistics.</xsl:text>
+  <br></br>
+  <xsl:text>Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved.</xsl:text>
+</b>
+  <br></br>
+  <br></br>
+  <xsl:text>This page displays the current iMPACT device usage statistics that will be sent to Xilinx using WebTalk.</xsl:text>
+
+<table width = "100%" border="1" CELLSPACING="0" cols="50% 50%">
+    <xsl:for-each select="document/application/section">
+<tr>
+<th COLSPAN="2" BGCOLOR="#99CCFF"><xsl:value-of select="@name"/></th>
+      
+</tr>
+    		<xsl:for-each select="property">
+<tr>
+	<td><xsl:value-of select="@name"/></td>
+
+	<td><xsl:value-of select="@value"/></td>
+</tr>
+
+        
+        </xsl:for-each>
+
+        <xsl:for-each select="item">
+<tr>
+          <td COLSPAN="2" BGCOLOR="#FFFF99"><b><xsl:value-of select="@name"/></b></td>
+</tr>
+          <xsl:value-of select="@value"/>
+          <xsl:for-each select="property">    
+<tr>
+      			<td><xsl:value-of select="@name"/></td>
+      			<td><xsl:value-of select="@value"/>&#x20;</td>
+</tr>
+      			 
+    			</xsl:for-each>
+          
+    		</xsl:for-each>
+    </xsl:for-each>
+</table>
+  </xsl:template>
+
+</xsl:stylesheet>
+      
+      <!--
+      <xsl:if test="position() != last()"> <h1><xsl:text> </xsl:text></h1></xsl:if>
+      -->
diff --git a/cpld/impact_impact.xwbt b/cpld/impact_impact.xwbt
new file mode 100644
index 0000000..4349c44
--- /dev/null
+++ b/cpld/impact_impact.xwbt
@@ -0,0 +1,8 @@
+INTSTYLE=impact
+INFILE=\\192.168.64.1\Repos\Warp-SE\cpld\impact.xsl
+OUTFILE=\\192.168.64.1\Repos\Warp-SE\cpld\impact.xsl
+FAMILY=Single
+PART=Single
+WORKINGDIR=\\192.168.64.1\Repos\Warp-SE\cpld
+LICENSE=iMPACT
+USER_INFO=iMPACT
diff --git a/cpld/usage_statistics_webtalk.html b/cpld/usage_statistics_webtalk.html
new file mode 100644
index 0000000..5d71c39
--- /dev/null
+++ b/cpld/usage_statistics_webtalk.html
@@ -0,0 +1,73 @@
+<HTML><HEAD><TITLE>Device Usage Statistics Report</TITLE></HEAD>
+<BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>
+<H3>Device Usage Page (usage_statistics_webtalk.html)</H3>This HTML page displays the device usage statistics that will be sent to Xilinx.<BR>&nbsp;<BR><HR>&nbsp;<BR>
+<TABLE BORDER CELLSPACING=0 WIDTH='100%'>
+<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN='4'><B>Software Version and Target Device</B></TD></TR>
+<TR ALIGN=LEFT>
+<TD BGCOLOR='#FFFF99'><B>Product Version:</B></TD>
+<TD><xtag-property name="ProductVersion">ISE:14.7</xtag-property><xtag-property name="ProductConfiguration"> (iMPACT)</xtag-property><xtag-property name="BuildVersion"> - P.20131013</xtag-property></TD>
+<TD BGCOLOR='#FFFF99'><B>Target Family:</B></TD>
+<TD><xtag-property name="TargetFamily">Single</xtag-property></TD>
+</TR>
+<TR ALIGN=LEFT>
+<TD BGCOLOR='#FFFF99'><B>OS Platform:</B></TD>
+<TD><xtag-property name="OSPlatform">NT</xtag-property></TD>
+<TD BGCOLOR='#FFFF99'><B>Target Device:</B></TD>
+<TD><xtag-property name="TargetDevice">Single</xtag-property></TD>
+</TR>
+<TR ALIGN=LEFT>
+<TD BGCOLOR='#FFFF99'><B>Project ID (random number)</B></TD>
+<TD><xtag-property name="RandomID">62b3f0bb02a74d88a0c5830d0cba1df9</xtag-property>.<xtag-property name="ProjectID">5dd6e529715843fb8382f9253b38abd3</xtag-property>.<xtag-property name="ProjectIteration">1</xtag-property></TD>
+<TD BGCOLOR='#FFFF99'><B>Target Package:</B></TD>
+<TD><xtag-property name="TargetPackage"></xtag-property></TD>
+</TR>
+<TR ALIGN=LEFT>
+<TD BGCOLOR='#FFFF99'><B>Registration ID</B></TD>
+<TD><xtag-property name="RegistrationID">iMPACT</xtag-property></TD>
+<TD BGCOLOR='#FFFF99'><B>Target Speed:</B></TD>
+<TD><xtag-property name="TargetSpeed"></xtag-property></TD>
+</TR>
+<TR ALIGN=LEFT>
+<TD BGCOLOR='#FFFF99'><B>Date Generated</B></TD>
+<TD><xtag-property name="Date Generated">2022-03-27T10:22:52</xtag-property></TD>
+<TD BGCOLOR='#FFFF99'><B>Tool Flow</B></TD>
+<TD><xtag-property name="ToolFlow">IMPACT</xtag-property></TD>
+</TR>
+</TABLE>
+
+&nbsp;<BR><TABLE BORDER CELLSPACING=0 WIDTH='100%'>
+<xtag-section name="iMPACT Project Info">
+<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN=2><B>iMPACT Project Info</B></TD></TR>
+<TR>
+<TD><xtag-property-name>Use Project File</xtag-property-name>=<xtag-property-value>Yes</xtag-property-value></TD>
+<TD><xtag-property-name>Project Entry</xtag-property-name>=<xtag-property-value>ise</xtag-property-value></TD>
+
+</TR><TR><TD><xtag-property-name>OS Name</xtag-property-name>=<xtag-property-value>Microsoft Windows 7</xtag-property-value></TD>
+<TD><xtag-property-name>User Lic. Info</xtag-property-name>=<xtag-property-value>212056110_0_0_574</xtag-property-value></TD>
+</TR></xtag-section></TABLE>
+
+&nbsp;<BR><TABLE BORDER CELLSPACING=0 WIDTH='100%'>
+<xtag-section name="iMPACT SVF File Mode">
+<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN=4><B>iMPACT SVF File Mode</B></TD></TR>
+<TR ALIGN=CENTER><TD COLSPAN=4><B>Chain Summary</B></TD></TR>
+<TR>
+<TD><xtag-property-name>Number of device</xtag-property-name>=<xtag-property-value>1</xtag-property-value></TD>
+<TD><xtag-property-name>Number of Xilinx device</xtag-property-name>=<xtag-property-value>1</xtag-property-value></TD>
+<TD><xtag-property-name>Number of Non-Xilinx device</xtag-property-name>=<xtag-property-value>0</xtag-property-value></TD>
+<TR ALIGN=CENTER><TD COLSPAN=4><B>Chain Description</B></TD></TR>
+<TR>
+<TD><xtag-property-name>Device1</xtag-property-name>=<xtag-property-value>xc9500xl</xtag-property-value></TD>
+<TD><xtag-property-name>Part1</xtag-property-name>=<xtag-property-value>xc95144xl</xtag-property-value></TD>
+<TR ALIGN=CENTER><TD COLSPAN=4><B>Boundary Scan Operations Statistics</B></TD></TR>
+<TR>
+<TD><xtag-property-name>SVF Operation</xtag-property-name>=<xtag-property-value>Erase -p 0 </xtag-property-value></TD>
+<TD><xtag-property-name>SVF Operation</xtag-property-name>=<xtag-property-value>Program -p 0 -e -v </xtag-property-value></TD>
+<TR ALIGN=CENTER><TD COLSPAN=4><B>Cable Summary</B></TD></TR>
+<TR>
+<TD><xtag-property-name>Cable Type</xtag-property-name>=<xtag-property-value>FILE</xtag-property-value></TD>
+<TD><xtag-property-name>Cable Speed</xtag-property-name>=<xtag-property-value>0</xtag-property-value></TD>
+<TD><xtag-property-name>Port</xtag-property-name>=<xtag-property-value>SVF</xtag-property-value></TD>
+<TD><xtag-property-name>Local_Server_Mode</xtag-property-name>=<xtag-property-value>Local</xtag-property-value></TD>
+<TR>
+</TR></xtag-section></TABLE>
+</BODY></HTML>
diff --git a/cpld/webtalk.log b/cpld/webtalk.log
new file mode 100644
index 0000000..2cd6d53
--- /dev/null
+++ b/cpld/webtalk.log
@@ -0,0 +1,16 @@
+Release 14.7 - WebTalk (P.20131013)
+Copyright (c) 1995-2010 Xilinx, Inc.  All rights reserved.
+
+Project Information
+--------------------
+ProjectID=5dd6e529715843fb8382f9253b38abd3
+ProjectIteration=1
+
+WebTalk Summary
+----------------
+INFO:WebTalk:2 - WebTalk is enabled.
+
+INFO:WebTalk:8 - WebTalk Install setting is ON.
+INFO:WebTalk:6 - WebTalk User setting is ON.
+
+INFO:WebTalk:5 - //192.168.64.1/Repos/Warp-SE/cpld/usage_statistics_webtalk.html WebTalk report has not been sent to Xilinx.  Please check your network and proxy settings.  For additional details about this file, please refer to the WebTalk help file at C:/Xilinx/14.7/ISE_DS/ISE/data/reports/webtalk_introduction.html
diff --git a/cpld/webtalk_impact.xml b/cpld/webtalk_impact.xml
new file mode 100644
index 0000000..47aeac9
--- /dev/null
+++ b/cpld/webtalk_impact.xml
@@ -0,0 +1,41 @@
+<?xml version="1.0" encoding="UTF-8" ?>
+<document>
+<!--The data in this file is primarily intended for consumption by Xilinx tools.
+The structure and the elements are likely to change over the next few releases.
+This means code written to parse this file will need to be revisited each subsequent release.-->
+<application name="impact" timeStamp="Sun Mar 27 10:22:46 2022">
+<section name="Project Information" visible="false">
+<property name="ProjectID" value="5dd6e529715843fb8382f9253b38abd3"/>
+<property name="ProjectIteration" value="1"/>
+</section>
+<section name="iMPACT Project Info" visible="true">
+<property name="Use Project File" value="Yes"/>
+<property name="Project Entry" value="ise"/>
+<property name="OS Name" value="Microsoft Windows 7"/>
+<property name="User Lic. Info" value="212056110_0_0_574"/>
+</section>
+<section name="iMPACT SVF File Mode" visible="true">
+<item name="Chain Summary">
+<property name="Number of device" value="1"/>
+<property name="Number of Xilinx device" value="1"/>
+<property name="Number of Non-Xilinx device" value="0"/>
+</item>
+<item name="Chain Description">
+<property name="Device1" value="xc9500xl"/>
+<property name="Part1" value="xc95144xl"/>
+</item>
+<item name="Boundary Scan Operations Statistics">
+<property name="SVF Operation" value="Erase -p 0
+"/>
+<property name="SVF Operation" value="Program -p 0 -e -v
+"/>
+</item>
+<item name="Cable Summary">
+<property name="Cable Type" value="FILE"/>
+<property name="Cable Speed" value="0"/>
+<property name="Port" value="SVF"/>
+<property name="Local_Server_Mode" value="Local"/>
+</item>
+</section>
+</application>
+</document>
diff --git a/gerber/WarpSE-BOM.csv b/gerber/WarpSE-BOM.csv
new file mode 100644
index 0000000..85cef0f
--- /dev/null
+++ b/gerber/WarpSE-BOM.csv
@@ -0,0 +1,29 @@
+"Source:","/Users/zane/Library/Mobile Documents/com~apple~CloudDocs/Repos/Warp-SE/WarpSE.kicad_sch"
+"Date:","Sunday, March 27, 2022 at 10:44:14 PM"
+"Tool:","Eeschema (6.0.2-0)"
+"Generator:","/Applications/KiCad/KiCad.app/Contents/SharedSupport/plugins/bom_jlc.py"
+"Component Count:","104"
+"Ref","Qnty","Value","Cmp name","Footprint","Description","Vendor","LCSC Part"
+"C1, C2, C3, C4, C7, C8, C9, C10, C12, C13, C14, C15, C16, C17, C18, C19, C20, C22, C24, C45, C50, C51, ","22","10u","C_Small","stdpads:C_0805","Unpolarized capacitor, small symbol","","C15850"
+"C5, C6, C11, C21, C23, C25, C26, C27, C28, C29, C30, C31, C32, C33, C34, C35, C36, C37, C38, C39, C40, C41, C42, C43, C44, C49, ","26","2u2","C_Small","stdpads:C_0603","Unpolarized capacitor, small symbol","","C23630"
+"C46, C47, C48, ","3","22p","C_Small","stdpads:C_0603","Unpolarized capacitor, small symbol","","C1653"
+"FID1, FID2, FID3, FID4, ","4","Fiducial","Fiducial","stdpads:Fiducial","Fiducial Marker","",""
+"H1, H2, H3, H4, H5, ","5","","MountingHole","stdpads:PasteHole_1.152mm_NPTH","Mounting Hole without connection","",""
+"J1, ","1","MacSEPDS","MacSEPDS","stdpads:DIN41612_R_3x32_Male_Vertical_THT","","",""
+"J2, ","1","JTAG","Conn_02x05_Odd_Even","Connector:Tag-Connect_TC2050-IDC-FP_2x05_P1.27mm_Vertical","Generic connector, double row, 02x05, odd/even pin numbering scheme (row 1 odd numbers, row 2 even numbers), script generated (kicad-library-utils/schlib/autogen/connector/)","",""
+"J3, ","1","microUSB","USB_B_Micro","stdpads:USB_Micro-B_ShouHan_MicroXNJ","USB Micro Type B connector","","C404969"
+"Q1, Q2, ","2","MMBT3904","MMBT3904","stdpads:SOT-23","0.2A Ic, 40V Vce, Small Signal NPN Transistor, SOT-23","","C20526"
+"R1, R2, ","2","47","R_Small","stdpads:R_0603","Resistor, small symbol","","C23182"
+"R3, R4, R5, R6, R7, R8, R9, R10, R11, R15, R16, ","11","10k","R_Small","stdpads:R_0603","Resistor, small symbol","","C25804"
+"SW1, ","1","CFG","SW_DIP_x03","stdpads:SW_DIP_SPSTx03_Slide_DSHP03TS_P1.27mm","3x DIP Switch, Single Pole Single Throw (SPST) switch, small symbol","","C319051"
+"U1, ","1","XC95144XL-TQ100","XC95144XL-TQ100","stdpads:TQFP-100_14x14mm_P0.5mm","CPLD, 144 Macrocells, 3200 Usable Gates","","C45126"
+"U2, U7, U13, U15, U16, U17, U18, U19, U20, U21, U22, U23, U24, ","13","74AHCT573PW","74573","stdpads:TSSOP-20_4.4x6.5mm_P0.65mm","","","C141311"
+"U3, ","1","AZ1117EH-3.3","AP1117-33","stdpads:SOT-223","1A Low Dropout regulator, positive, 3.3V fixed output, SOT-223","","C108494"
+"U4, ","1","20M","Oscillator_4P","stdpads:Crystal_SMD_3225-4Pin_3.2x2.5mm","","","C32529"
+"U5, ","1","25M","Oscillator_4P","stdpads:Crystal_SMD_3225-4Pin_3.2x2.5mm","","","C32526"
+"U6, ","1","DNP-AZ1117CH2-3.3","AZ1117CH2","stdpads:SOT-223","1A Low Dropout regulator, positive, 1.5V fixed output, SOT-223","",""
+"U8, U9, ","2","KM48C2100","DRAM-2Mx8-SOP-28","stdpads:SOJ-28_300mil","","",""
+"U10, U11, ","2","39SF040","Flash-512Kx8-PLCC-32","stdpads:PLCC-32","","","C72257"
+"U12, ","1","CH340G","CH340G","stdpads:SOIC-16_3.9mm","USB serial converter, UART, SOIC-16","","C14267"
+"U14, ","1","MC68HC000FN20","MC68000FN","stdpads:PLCC-68","Microprocessor, 16-bit bus","",""
+"Y1, ","1","12M","Crystal_Small","stdpads:Crystal_HC49-SMD","Two pin crystal, small symbol","","C111117"
diff --git a/gerber/Warp-SE-B_Cu.gbl b/gerber/WarpSE-B_Cu.gbl
similarity index 70%
rename from gerber/Warp-SE-B_Cu.gbl
rename to gerber/WarpSE-B_Cu.gbl
index 1a44a80..cf342ad 100644
--- a/gerber/Warp-SE-B_Cu.gbl
+++ b/gerber/WarpSE-B_Cu.gbl
@@ -1,12 +1,12 @@
-G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(6.0.1-0)*
-G04 #@! TF.CreationDate,2022-02-03T05:16:20-05:00*
-G04 #@! TF.ProjectId,Warp-SE,57617270-2d53-4452-9e6b-696361645f70,rev?*
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(6.0.2-0)*
+G04 #@! TF.CreationDate,2022-03-27T22:45:06-04:00*
+G04 #@! TF.ProjectId,WarpSE,57617270-5345-42e6-9b69-6361645f7063,rev?*
 G04 #@! TF.SameCoordinates,Original*
 G04 #@! TF.FileFunction,Copper,L4,Bot*
 G04 #@! TF.FilePolarity,Positive*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW (6.0.1-0)) date 2022-02-03 05:16:20*
+G04 Created by KiCad (PCBNEW (6.0.2-0)) date 2022-03-27 22:45:06*
 %MOMM*%
 %LPD*%
 G01*
@@ -36,55 +36,52 @@ G04 #@! TA.AperFunction,ComponentPad*
 %ADD11C,1.550000*%
 G04 #@! TD*
 G04 #@! TA.AperFunction,ComponentPad*
-%ADD12C,2.000000*%
+%ADD12O,1.070000X1.900000*%
 G04 #@! TD*
 G04 #@! TA.AperFunction,ComponentPad*
-%ADD13O,1.070000X1.900000*%
-G04 #@! TD*
-G04 #@! TA.AperFunction,ComponentPad*
-%ADD14C,1.300000*%
+%ADD13C,1.300000*%
 G04 #@! TD*
 G04 #@! TA.AperFunction,ViaPad*
-%ADD15C,0.800000*%
+%ADD14C,0.800000*%
 G04 #@! TD*
 G04 #@! TA.AperFunction,ViaPad*
-%ADD16C,0.500000*%
+%ADD15C,0.500000*%
 G04 #@! TD*
 G04 #@! TA.AperFunction,ViaPad*
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 G04 #@! TD*
 G04 #@! TA.AperFunction,ViaPad*
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 G04 APERTURE END LIST*
 D10*
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 G37*
 G04 #@! TD.AperFunction*
 M02*
diff --git a/gerber/Warp-SE-B_Mask.gbs b/gerber/WarpSE-B_Mask.gbs
similarity index 93%
rename from gerber/Warp-SE-B_Mask.gbs
rename to gerber/WarpSE-B_Mask.gbs
index 1481d84..2a1b602 100644
--- a/gerber/Warp-SE-B_Mask.gbs
+++ b/gerber/WarpSE-B_Mask.gbs
@@ -1,12 +1,12 @@
-G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(6.0.1-0)*
-G04 #@! TF.CreationDate,2022-02-03T05:16:20-05:00*
-G04 #@! TF.ProjectId,Warp-SE,57617270-2d53-4452-9e6b-696361645f70,rev?*
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(6.0.2-0)*
+G04 #@! TF.CreationDate,2022-03-27T22:45:06-04:00*
+G04 #@! TF.ProjectId,WarpSE,57617270-5345-42e6-9b69-6361645f7063,rev?*
 G04 #@! TF.SameCoordinates,Original*
 G04 #@! TF.FileFunction,Soldermask,Bot*
 G04 #@! TF.FilePolarity,Negative*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW (6.0.1-0)) date 2022-02-03 05:16:20*
+G04 Created by KiCad (PCBNEW (6.0.2-0)) date 2022-03-27 22:45:06*
 %MOMM*%
 %LPD*%
 G01*
@@ -32,7 +32,7 @@ G04 Aperture macros list end*
 %ADD10C,2.950000*%
 %ADD11RoundRect,0.299999X0.525001X0.525001X-0.525001X0.525001X-0.525001X-0.525001X0.525001X-0.525001X0*%
 %ADD12C,1.650000*%
-%ADD13C,2.100000*%
+%ADD13C,1.448000*%
 %ADD14C,2.474900*%
 %ADD15C,1.090600*%
 %ADD16O,1.170000X2.000000*%
@@ -140,7 +140,7 @@ X200660000Y-55880000D03*
 X200660000Y-53340000D03*
 X200660000Y-50800000D03*
 D13*
-X105283000Y-42418000D03*
+X105283000Y-39878000D03*
 X210312000Y-39878000D03*
 X210312000Y-137922000D03*
 X196469000Y-137922000D03*
diff --git a/gerber/Warp-SE-B_Paste.gbp b/gerber/WarpSE-B_Paste.gbp
similarity index 51%
rename from gerber/Warp-SE-B_Paste.gbp
rename to gerber/WarpSE-B_Paste.gbp
index 8f99438..71d953b 100644
--- a/gerber/Warp-SE-B_Paste.gbp
+++ b/gerber/WarpSE-B_Paste.gbp
@@ -1,12 +1,12 @@
-G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(6.0.1-0)*
-G04 #@! TF.CreationDate,2022-02-03T05:16:20-05:00*
-G04 #@! TF.ProjectId,Warp-SE,57617270-2d53-4452-9e6b-696361645f70,rev?*
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(6.0.2-0)*
+G04 #@! TF.CreationDate,2022-03-27T22:45:06-04:00*
+G04 #@! TF.ProjectId,WarpSE,57617270-5345-42e6-9b69-6361645f7063,rev?*
 G04 #@! TF.SameCoordinates,Original*
 G04 #@! TF.FileFunction,Paste,Bot*
 G04 #@! TF.FilePolarity,Positive*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW (6.0.1-0)) date 2022-02-03 05:16:20*
+G04 Created by KiCad (PCBNEW (6.0.2-0)) date 2022-03-27 22:45:06*
 %MOMM*%
 %LPD*%
 G01*
diff --git a/gerber/Warp-SE-B_Silkscreen.gbo b/gerber/WarpSE-B_Silkscreen.gbo
similarity index 93%
rename from gerber/Warp-SE-B_Silkscreen.gbo
rename to gerber/WarpSE-B_Silkscreen.gbo
index f31b727..82085c7 100644
--- a/gerber/Warp-SE-B_Silkscreen.gbo
+++ b/gerber/WarpSE-B_Silkscreen.gbo
@@ -1,12 +1,12 @@
-G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(6.0.1-0)*
-G04 #@! TF.CreationDate,2022-02-03T05:16:20-05:00*
-G04 #@! TF.ProjectId,Warp-SE,57617270-2d53-4452-9e6b-696361645f70,rev?*
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(6.0.2-0)*
+G04 #@! TF.CreationDate,2022-03-27T22:45:06-04:00*
+G04 #@! TF.ProjectId,WarpSE,57617270-5345-42e6-9b69-6361645f7063,rev?*
 G04 #@! TF.SameCoordinates,Original*
 G04 #@! TF.FileFunction,Legend,Bot*
 G04 #@! TF.FilePolarity,Positive*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW (6.0.1-0)) date 2022-02-03 05:16:20*
+G04 Created by KiCad (PCBNEW (6.0.2-0)) date 2022-03-27 22:45:06*
 %MOMM*%
 %LPD*%
 G01*
@@ -32,7 +32,7 @@ G04 Aperture macros list end*
 %ADD10C,2.950000*%
 %ADD11RoundRect,0.299999X0.525001X0.525001X-0.525001X0.525001X-0.525001X-0.525001X0.525001X-0.525001X0*%
 %ADD12C,1.650000*%
-%ADD13C,2.100000*%
+%ADD13C,1.448000*%
 %ADD14C,2.474900*%
 %ADD15C,1.090600*%
 %ADD16O,1.170000X2.000000*%
@@ -141,7 +141,7 @@ X200660000Y-55880000D03*
 X200660000Y-53340000D03*
 X200660000Y-50800000D03*
 D13*
-X105283000Y-42418000D03*
+X105283000Y-39878000D03*
 X210312000Y-39878000D03*
 X210312000Y-137922000D03*
 X196469000Y-137922000D03*
diff --git a/gerber/Warp-SE-Edge_Cuts.gm1 b/gerber/WarpSE-Edge_Cuts.gm1
similarity index 81%
rename from gerber/Warp-SE-Edge_Cuts.gm1
rename to gerber/WarpSE-Edge_Cuts.gm1
index e7148fe..199c879 100644
--- a/gerber/Warp-SE-Edge_Cuts.gm1
+++ b/gerber/WarpSE-Edge_Cuts.gm1
@@ -1,11 +1,11 @@
-G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(6.0.1-0)*
-G04 #@! TF.CreationDate,2022-02-03T05:16:20-05:00*
-G04 #@! TF.ProjectId,Warp-SE,57617270-2d53-4452-9e6b-696361645f70,rev?*
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(6.0.2-0)*
+G04 #@! TF.CreationDate,2022-03-27T22:45:06-04:00*
+G04 #@! TF.ProjectId,WarpSE,57617270-5345-42e6-9b69-6361645f7063,rev?*
 G04 #@! TF.SameCoordinates,Original*
 G04 #@! TF.FileFunction,Profile,NP*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW (6.0.1-0)) date 2022-02-03 05:16:20*
+G04 Created by KiCad (PCBNEW (6.0.2-0)) date 2022-03-27 22:45:06*
 %MOMM*%
 %LPD*%
 G01*
@@ -15,11 +15,6 @@ G04 #@! TA.AperFunction,Profile*
 G04 #@! TD*
 G04 APERTURE END LIST*
 D10*
-X105283000Y-37846000D02*
-G75*
-G03*
-X103251000Y-39878000I0J-2032000D01*
-G01*
 X103251000Y-127508000D02*
 G75*
 G03*
@@ -30,11 +25,6 @@ G75*
 G03*
 X192405000Y-129540000I-2032000J0D01*
 G01*
-X212344000Y-39878000D02*
-G75*
-G03*
-X210312000Y-37846000I-2032000J0D01*
-G01*
 X194437000Y-137922000D02*
 G75*
 G03*
@@ -57,4 +47,14 @@ X210312000Y-139954000D02*
 X196469000Y-139954000D01*
 X212344000Y-39878000D02*
 X212344000Y-137922000D01*
+X105283000Y-37846000D02*
+G75*
+G03*
+X103251000Y-39878000I0J-2032000D01*
+G01*
+X212344000Y-39878000D02*
+G75*
+G03*
+X210312000Y-37846000I-2032000J0D01*
+G01*
 M02*
diff --git a/gerber/Warp-SE-F_Cu.gtl b/gerber/WarpSE-F_Cu.gtl
similarity index 85%
rename from gerber/Warp-SE-F_Cu.gtl
rename to gerber/WarpSE-F_Cu.gtl
index d75d64e..b0604e3 100644
--- a/gerber/Warp-SE-F_Cu.gtl
+++ b/gerber/WarpSE-F_Cu.gtl
@@ -1,12 +1,12 @@
-G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(6.0.1-0)*
-G04 #@! TF.CreationDate,2022-02-03T05:16:20-05:00*
-G04 #@! TF.ProjectId,Warp-SE,57617270-2d53-4452-9e6b-696361645f70,rev?*
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(6.0.2-0)*
+G04 #@! TF.CreationDate,2022-03-27T22:45:06-04:00*
+G04 #@! TF.ProjectId,WarpSE,57617270-5345-42e6-9b69-6361645f7063,rev?*
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+G04 Created by KiCad (PCBNEW (6.0.2-0)) date 2022-03-27 22:45:06*
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diff --git a/gerber/Warp-SE-F_Mask.gts b/gerber/WarpSE-F_Mask.gts
similarity index 96%
rename from gerber/Warp-SE-F_Mask.gts
rename to gerber/WarpSE-F_Mask.gts
index c7cf010..5de86ca 100644
--- a/gerber/Warp-SE-F_Mask.gts
+++ b/gerber/WarpSE-F_Mask.gts
@@ -1,12 +1,12 @@
-G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(6.0.1-0)*
-G04 #@! TF.CreationDate,2022-02-03T05:16:20-05:00*
-G04 #@! TF.ProjectId,Warp-SE,57617270-2d53-4452-9e6b-696361645f70,rev?*
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(6.0.2-0)*
+G04 #@! TF.CreationDate,2022-03-27T22:45:06-04:00*
+G04 #@! TF.ProjectId,WarpSE,57617270-5345-42e6-9b69-6361645f7063,rev?*
 G04 #@! TF.SameCoordinates,Original*
 G04 #@! TF.FileFunction,Soldermask,Top*
 G04 #@! TF.FilePolarity,Negative*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW (6.0.1-0)) date 2022-02-03 05:16:20*
+G04 Created by KiCad (PCBNEW (6.0.2-0)) date 2022-03-27 22:45:06*
 %MOMM*%
 %LPD*%
 G01*
@@ -47,7 +47,7 @@ G04 Aperture macros list end*
 %ADD25RoundRect,0.262500X-0.262500X0.212500X-0.262500X-0.212500X0.262500X-0.212500X0.262500X0.212500X0*%
 %ADD26RoundRect,0.262500X0.262500X-0.212500X0.262500X0.212500X-0.262500X0.212500X-0.262500X-0.212500X0*%
 %ADD27C,2.000000*%
-%ADD28C,2.100000*%
+%ADD28C,1.448000*%
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@@ -66,7 +66,7 @@ G04 Aperture macros list end*
 %ADD44RoundRect,0.225000X0.175000X0.300000X-0.175000X0.300000X-0.175000X-0.300000X0.175000X-0.300000X0*%
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-%ADD47RoundRect,0.240000X-0.190000X0.572000X-0.190000X-0.572000X0.190000X-0.572000X0.190000X0.572000X0*%
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 %ADD48RoundRect,0.225000X-0.175000X-0.300000X0.175000X-0.300000X0.175000X0.300000X-0.175000X0.300000X0*%
 %ADD49RoundRect,0.200000X0.825000X0.150000X-0.825000X0.150000X-0.825000X-0.150000X0.825000X-0.150000X0*%
 %ADD50RoundRect,0.550000X-0.500000X1.750000X-0.500000X-1.750000X0.500000X-1.750000X0.500000X1.750000X0*%
@@ -661,12 +661,12 @@ D26*
 X109600000Y-103100000D03*
 X109600000Y-101600000D03*
 D27*
-X105283000Y-44958000D03*
-X210312000Y-44958000D03*
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 X210312000Y-135382000D03*
 X111125000Y-127508000D03*
 D28*
-X105283000Y-42418000D03*
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 X210312000Y-39878000D03*
 X210312000Y-137922000D03*
 X196469000Y-137922000D03*
@@ -676,10 +676,10 @@ X129150000Y-96300000D03*
 X129150000Y-97900000D03*
 X127450000Y-96300000D03*
 X127450000Y-97900000D03*
-X106553000Y-112992000D03*
-X106553000Y-114592000D03*
-X108077000Y-112992000D03*
-X108077000Y-114592000D03*
+X106553000Y-111976000D03*
+X106553000Y-113576000D03*
+X108077000Y-111976000D03*
+X108077000Y-113576000D03*
 D30*
 X130000000Y-91500000D03*
 X130000000Y-93700000D03*
@@ -911,15 +911,15 @@ X196200000Y-110800000D03*
 X194300000Y-110800000D03*
 X195250000Y-112900000D03*
 D47*
-X109220000Y-119380000D03*
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-X107950000Y-127000000D03*
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 D29*
-X105029000Y-112992000D03*
-X105029000Y-114592000D03*
+X105029000Y-111976000D03*
+X105029000Y-113576000D03*
 D26*
 X187579000Y-49530000D03*
 X187579000Y-48030000D03*
@@ -933,8 +933,8 @@ D48*
 X186106000Y-54991000D03*
 X187706000Y-54991000D03*
 D44*
-X194750000Y-56800000D03*
-X193150000Y-56800000D03*
+X194950000Y-58850000D03*
+X193350000Y-58850000D03*
 D24*
 X171150000Y-42550000D03*
 X171150000Y-43200000D03*
@@ -993,8 +993,8 @@ X167300000Y-43150000D03*
 X169200000Y-43150000D03*
 X168250000Y-41050000D03*
 D44*
-X194750000Y-55300000D03*
-X193150000Y-55300000D03*
+X194950000Y-57350000D03*
+X193350000Y-57350000D03*
 D26*
 X188450000Y-42650000D03*
 X188450000Y-41150000D03*
@@ -1006,4 +1006,16 @@ X121850000Y-57700000D03*
 X121850000Y-59200000D03*
 X196200000Y-39650000D03*
 X196200000Y-41150000D03*
+D44*
+X194950000Y-55550000D03*
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+D13*
+X144145000Y-47625000D03*
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+X151335000Y-47625000D03*
+D13*
+X147750000Y-67850000D03*
+X149450000Y-67850000D03*
 M02*
diff --git a/gerber/Warp-SE-F_Paste.gtp b/gerber/WarpSE-F_Paste.gtp
similarity index 95%
rename from gerber/Warp-SE-F_Paste.gtp
rename to gerber/WarpSE-F_Paste.gtp
index 3697fc7..55a0306 100644
--- a/gerber/Warp-SE-F_Paste.gtp
+++ b/gerber/WarpSE-F_Paste.gtp
@@ -1,12 +1,12 @@
-G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(6.0.1-0)*
-G04 #@! TF.CreationDate,2022-02-03T05:16:20-05:00*
-G04 #@! TF.ProjectId,Warp-SE,57617270-2d53-4452-9e6b-696361645f70,rev?*
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(6.0.2-0)*
+G04 #@! TF.CreationDate,2022-03-27T22:45:06-04:00*
+G04 #@! TF.ProjectId,WarpSE,57617270-5345-42e6-9b69-6361645f7063,rev?*
 G04 #@! TF.SameCoordinates,Original*
 G04 #@! TF.FileFunction,Paste,Top*
 G04 #@! TF.FilePolarity,Positive*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW (6.0.1-0)) date 2022-02-03 05:16:20*
+G04 Created by KiCad (PCBNEW (6.0.2-0)) date 2022-03-27 22:45:06*
 %MOMM*%
 %LPD*%
 G01*
@@ -56,7 +56,7 @@ G04 Aperture macros list end*
 %ADD34RoundRect,0.125000X0.175000X0.300000X-0.175000X0.300000X-0.175000X-0.300000X0.175000X-0.300000X0*%
 %ADD35RoundRect,0.125000X0.335876X0.088388X0.088388X0.335876X-0.335876X-0.088388X-0.088388X-0.335876X0*%
 %ADD36RoundRect,0.150000X-0.200000X0.475000X-0.200000X-0.475000X0.200000X-0.475000X0.200000X0.475000X0*%
-%ADD37RoundRect,0.165000X-0.190000X0.572000X-0.190000X-0.572000X0.190000X-0.572000X0.190000X0.572000X0*%
+%ADD37RoundRect,0.165000X0.190000X-0.572000X0.190000X0.572000X-0.190000X0.572000X-0.190000X-0.572000X0*%
 %ADD38RoundRect,0.125000X-0.175000X-0.300000X0.175000X-0.300000X0.175000X0.300000X-0.175000X0.300000X0*%
 %ADD39RoundRect,0.125000X0.825000X0.150000X-0.825000X0.150000X-0.825000X-0.150000X0.825000X-0.150000X0*%
 %ADD40RoundRect,0.450000X-0.500000X1.750000X-0.500000X-1.750000X0.500000X-1.750000X0.500000X1.750000X0*%
@@ -554,10 +554,10 @@ X129150000Y-96300000D03*
 X129150000Y-97900000D03*
 X127450000Y-96300000D03*
 X127450000Y-97900000D03*
-X106553000Y-112992000D03*
-X106553000Y-114592000D03*
-X108077000Y-112992000D03*
-X108077000Y-114592000D03*
+X106553000Y-111976000D03*
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+X108077000Y-111976000D03*
+X108077000Y-113576000D03*
 D25*
 X130000000Y-91500000D03*
 X130000000Y-93700000D03*
@@ -760,15 +760,15 @@ X196200000Y-110800000D03*
 X194300000Y-110800000D03*
 X195250000Y-112900000D03*
 D37*
-X109220000Y-119380000D03*
-X107950000Y-119380000D03*
-X106680000Y-119380000D03*
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-X109220000Y-127000000D03*
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-X105029000Y-112992000D03*
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 D23*
 X187579000Y-49530000D03*
 X187579000Y-48030000D03*
@@ -782,8 +782,8 @@ D38*
 X186106000Y-54991000D03*
 X187706000Y-54991000D03*
 D34*
-X194750000Y-56800000D03*
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 D21*
 X171150000Y-42550000D03*
 X171150000Y-43200000D03*
@@ -842,8 +842,8 @@ X167300000Y-43150000D03*
 X169200000Y-43150000D03*
 X168250000Y-41050000D03*
 D34*
-X194750000Y-55300000D03*
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 D23*
 X188450000Y-42650000D03*
 X188450000Y-41150000D03*
@@ -855,4 +855,16 @@ X121850000Y-57700000D03*
 X121850000Y-59200000D03*
 X196200000Y-39650000D03*
 X196200000Y-41150000D03*
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 M02*
diff --git a/gerber/Warp-SE-F_Silkscreen.gto b/gerber/WarpSE-F_Silkscreen.gto
similarity index 80%
rename from gerber/Warp-SE-F_Silkscreen.gto
rename to gerber/WarpSE-F_Silkscreen.gto
index f88967f..a7bf41d 100644
--- a/gerber/Warp-SE-F_Silkscreen.gto
+++ b/gerber/WarpSE-F_Silkscreen.gto
@@ -1,12 +1,12 @@
-G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(6.0.1-0)*
-G04 #@! TF.CreationDate,2022-02-03T05:16:20-05:00*
-G04 #@! TF.ProjectId,Warp-SE,57617270-2d53-4452-9e6b-696361645f70,rev?*
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(6.0.2-0)*
+G04 #@! TF.CreationDate,2022-03-27T22:45:06-04:00*
+G04 #@! TF.ProjectId,WarpSE,57617270-5345-42e6-9b69-6361645f7063,rev?*
 G04 #@! TF.SameCoordinates,Original*
 G04 #@! TF.FileFunction,Legend,Top*
 G04 #@! TF.FilePolarity,Positive*
 %FSLAX46Y46*%
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 %MOMM*%
 %LPD*%
 G01*
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 20,1,$1+$1,$6,$7,$8,$9,0*
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 G04 Aperture macros list end*
-%ADD10C,0.350000*%
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-%ADD12C,0.300000*%
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 %ADD13C,0.225000*%
 %ADD14C,0.152400*%
 %ADD15C,0.120000*%
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 %ADD35C,2.000000*%
-%ADD36C,2.100000*%
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 D18*
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diff --git a/gerber/Warp-SE-In1_Cu.g2 b/gerber/WarpSE-In1_Cu.g2
similarity index 85%
rename from gerber/Warp-SE-In1_Cu.g2
rename to gerber/WarpSE-In1_Cu.g2
index e55b9b7..5ea4ddf 100644
--- a/gerber/Warp-SE-In1_Cu.g2
+++ b/gerber/WarpSE-In1_Cu.g2
@@ -1,12 +1,12 @@
-G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(6.0.1-0)*
-G04 #@! TF.CreationDate,2022-02-03T05:16:20-05:00*
-G04 #@! TF.ProjectId,Warp-SE,57617270-2d53-4452-9e6b-696361645f70,rev?*
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(6.0.2-0)*
+G04 #@! TF.CreationDate,2022-03-27T22:45:06-04:00*
+G04 #@! TF.ProjectId,WarpSE,57617270-5345-42e6-9b69-6361645f7063,rev?*
 G04 #@! TF.SameCoordinates,Original*
 G04 #@! TF.FileFunction,Copper,L2,Inr*
 G04 #@! TF.FilePolarity,Positive*
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 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW (6.0.1-0)) date 2022-02-03 05:16:20*
+G04 Created by KiCad (PCBNEW (6.0.2-0)) date 2022-03-27 22:45:06*
 %MOMM*%
 %LPD*%
 G01*
@@ -36,31 +36,28 @@ G04 #@! TA.AperFunction,ComponentPad*
 %ADD11C,1.550000*%
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-%ADD12C,2.000000*%
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-G04 #@! TD*
-G04 #@! TA.AperFunction,ComponentPad*
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-%ADD17C,1.524000*%
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-%ADD20C,1.270000*%
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 G04 #@! TD*
 G04 APERTURE END LIST*
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diff --git a/gerber/Warp-SE-In2_Cu.g3 b/gerber/WarpSE-In2_Cu.g3
similarity index 60%
rename from gerber/Warp-SE-In2_Cu.g3
rename to gerber/WarpSE-In2_Cu.g3
index a18a60d..b6e6874 100644
--- a/gerber/Warp-SE-In2_Cu.g3
+++ b/gerber/WarpSE-In2_Cu.g3
@@ -1,12 +1,12 @@
-G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(6.0.1-0)*
-G04 #@! TF.CreationDate,2022-02-03T05:16:20-05:00*
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 G04 #@! TD*
 G04 #@! TA.AperFunction,ViaPad*
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 G04 #@! TD*
 G04 #@! TA.AperFunction,ViaPad*
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 G04 #@! TD*
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 G04 #@! TD*
 G04 APERTURE END LIST*
 D10*
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diff --git a/gerber/Warp-SE.drl b/gerber/WarpSE.drl
similarity index 65%
rename from gerber/Warp-SE.drl
rename to gerber/WarpSE.drl
index 5ac2258..4158a08 100644
--- a/gerber/Warp-SE.drl
+++ b/gerber/WarpSE.drl
@@ -1,8 +1,8 @@
 M48
-; DRILL file {KiCad (6.0.1-0)} date Thursday, February 03, 2022 at 05:16:24 AM
+; DRILL file {KiCad (6.0.2-0)} date Sunday, March 27, 2022 at 10:45:23 PM
 ; FORMAT={-:-/ absolute / inch / decimal}
-; #@! TF.CreationDate,2022-02-03T05:16:24-05:00
-; #@! TF.GenerationSoftware,Kicad,Pcbnew,(6.0.1-0)
+; #@! TF.CreationDate,2022-03-27T22:45:23-04:00
+; #@! TF.GenerationSoftware,Kicad,Pcbnew,(6.0.2-0)
 ; #@! TF.FileFunction,MixedPlating,1,4
 FMAT,2
 INCH
@@ -24,10 +24,10 @@ T7C0.0276
 T8C0.0300
 ; #@! TA.AperFunction,Plated,PTH,ComponentDrill
 T9C0.0394
-; #@! TA.AperFunction,Plated,PTH,ComponentDrill
-T10C0.0433
 ; #@! TA.AperFunction,NonPlated,NPTH,ComponentDrill
-T11C0.0390
+T10C0.0390
+; #@! TA.AperFunction,NonPlated,NPTH,ComponentDrill
+T11C0.0454
 ; #@! TA.AperFunction,NonPlated,NPTH,ComponentDrill
 T12C0.0935
 ; #@! TA.AperFunction,NonPlated,NPTH,ComponentDrill
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@@ -296,16 +395,20 @@ X5.6Y-3.7
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 T6
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 T10
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 T12
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