From 209685c956fa42c97c0c9f2b6cf015917664794c Mon Sep 17 00:00:00 2001 From: Zane Kaminski Date: Tue, 8 Oct 2024 22:48:55 -0400 Subject: [PATCH] Actually assign PDS R/W signal to I/O pin --- cpld/WarpSE.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cpld/WarpSE.v b/cpld/WarpSE.v index 45dedcf..ea061e2 100644 --- a/cpld/WarpSE.v +++ b/cpld/WarpSE.v @@ -169,7 +169,7 @@ module WarpSE( assign nAoutOE = !AoutOE; wire nAS_IOBout, RnW_IOBout, nLDS_IOBout, nUDS_IOBout, nVMA_IOBout; assign nAS_IOB = AoutOE ? nAS_IOBout : 1'bZ; - //assign RnW_IOB = AoutOE ? RnW_IOBout : 1'bZ; + assign RnW_IOB = AoutOE ? RnW_IOBout : 1'bZ; assign nLDS_IOB = AoutOE ? nLDS_IOBout : 1'bZ; assign nUDS_IOB = AoutOE ? nUDS_IOBout : 1'bZ; assign nVMA_IOB = AoutOE ? nVMA_IOBout : 1'bZ;