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Fixed cycle termination signal synchronization in IOBM

This commit is contained in:
Zane Kaminski 2023-03-31 23:18:22 -04:00
parent 259895d09c
commit 34259dd51c
1 changed files with 11 additions and 11 deletions
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22
cpld/IOBM.v
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@ -15,22 +15,22 @@ module IOBM(
/* DTACK, BERR, RESET synchronization */
reg DTACKrr, DTACKrf, VPArr, VPArf, BERRrr, BERRrf, RESrr, RESrf;
always @(posedge C16M) begin
DTACKrr <= ~nDTACK;
VPArr <= ~nVPA;
BERRrr <= ~nBERR;
RESrr <= ~nRES;
end
always @(negedge C16M) begin
always @(negedge C8M) begin
DTACKrf <= ~nDTACK;
VPArf <= ~nVPA;
BERRrf <= ~nBERR;
RESrf <= ~nRES;
end
wire DTACK = DTACKrr && DTACKrf;
wire BERR = BERRrr && BERRrf;
wire VPA = VPArr && VPArf;
wire RES = RESrr && RESrf;
always @(posedge C8M) begin
DTACKrr <= ~nDTACK;
VPArr <= ~nVPA;
BERRrr <= ~nBERR;
RESrr <= ~nRES;
end
wire DTACK = DTACKrf && DTACKrr;
wire BERR = BERRrf && BERRrr;
wire VPA = VPArf && VPArr;
wire RES = RESrf && RESrr;
/* E clock synchronization */
reg Er; always @(negedge C8M) begin Er <= E; end