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Added RAM/ROM address multiplexing
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parent
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commit
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11
cpld/RAM.v
11
cpld/RAM.v
@ -33,7 +33,16 @@ module RAM(
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assign RA[11] = A[19];
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assign RA[11] = A[19];
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assign RA[10] = A[21];
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assign RA[10] = A[21];
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assign RA[9:0] = RASEL ? {A[20], A[09:01]} : {A[19], A[18:10]};
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assign RA[09] = RASEL ? A[20] : A[19];
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assign RA[08] = (RASEL && RAMSEL) ? A[09] : A[18];
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assign RA[07] = RASEL ? A[08] : A[17];
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assign RA[06] = RASEL ? A[07] : A[16];
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assign RA[05] = RASEL ? A[06] : A[15];
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assign RA[04] = RASEL ? A[05] : A[14];
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assign RA[03] = RASEL ? A[04] : A[13];
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assign RA[02] = RASEL ? A[03] : A[12];
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assign RA[01] = RASEL ? A[02] : A[11];
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assign RA[00] = RASEL ? A[01] : A[10];
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always @(posedge CLK) begin
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always @(posedge CLK) begin
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if (~BACT) Once <= 0;
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if (~BACT) Once <= 0;
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