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Gate writes to motherboard RAM/ROM into reads.
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@ -51,7 +51,7 @@ module IOBS(
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// I/O selected, and FIFO secondary level empty
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if (BACT && IOPWCS && !ALE1 && !Sent && TS!=0) begin
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// Latch R/W now but latch address and LDS/UDS next cycle
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IORW1 <= nWE;
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IORW1 <= nWE || !IORealCS;
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Load1 <= 1;
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end else Load1 <= 0;
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end
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@ -87,7 +87,7 @@ module IOBS(
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IOL0 <= IOL1;
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IOU0 <= IOU1;
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end else begin // FSB request
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IORW <= nWE;
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IORW <= nWE || !IORealCS;
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IOL0 <= !nLDS;
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IOU0 <= !nUDS;
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end
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