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Gate RAM /OE with RAMCS instead of RAMCS0X
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@ -47,7 +47,7 @@ module RAM(
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/* RAM /OE control */
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/* RAM /OE control */
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always @(posedge CLK) begin
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always @(posedge CLK) begin
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if (nAS) nOE <= 1;
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if (nAS) nOE <= 1;
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else nOE <= !(BACT && RAMCS0X && nWE);
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else nOE <= !(BACT && RAMCS && nWE);
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end
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end
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/* ROM control signals */
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/* ROM control signals */
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