diff --git a/cpld/RAM.v b/cpld/RAM.v
index 6d35702..46b7e36 100644
--- a/cpld/RAM.v
+++ b/cpld/RAM.v
@@ -12,7 +12,7 @@ module RAM(
 	input RefReqIn, input RefUrgIn,
 	/* DRAM and NOR flash interface */
 	output [11:0] RA, output nRAS, output reg nCAS,
-	output nLWE, output nUWE, output reg nOE, output nROMOE, output nROMWE);
+	output nLWE, output nUWE, output nOE, output nROMOE, output nROMWE);
 
 	/* RAM control state */
 	reg [2:0] RS;
diff --git a/cpld/WarpSE.v b/cpld/WarpSE.v
index 70f48e0..f48d175 100644
--- a/cpld/WarpSE.v
+++ b/cpld/WarpSE.v
@@ -69,7 +69,7 @@ module WarpSE(
 	wire IOCS, IORealCS, IOPWCS, IACS;
 	wire ROMCS, ROMCS4X;
 	wire RAMCS, RAMCS0X;
-	wire QoSCS, SndQoSCS;
+	wire QoSCS, SndQoSCS, QoSEN;
 	CS cs(
 		/* MC68HC000 interface */
 		.A(A_FSB[23:08]),
@@ -200,7 +200,7 @@ module WarpSE(
 		.IODONE(IODONE),
 		.IOBERR(IOBERR));
 
-	wire QoSEN, SndQoSReady;
+	wire SndQoSReady;
 	CNT cnt(
 		/* FSB clock, 7.8336 MHz clock, and E clock inputs */
 		.CLK(FCLK),