From 79eeaead982a033682d1d8a4162618330f226955 Mon Sep 17 00:00:00 2001 From: Zane Kaminski Date: Thu, 3 Oct 2024 12:06:24 -0400 Subject: [PATCH 1/2] Fix RAM.v to compile --- cpld/RAM.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cpld/RAM.v b/cpld/RAM.v index 6d35702..46b7e36 100644 --- a/cpld/RAM.v +++ b/cpld/RAM.v @@ -12,7 +12,7 @@ module RAM( input RefReqIn, input RefUrgIn, /* DRAM and NOR flash interface */ output [11:0] RA, output nRAS, output reg nCAS, - output nLWE, output nUWE, output reg nOE, output nROMOE, output nROMWE); + output nLWE, output nUWE, output nOE, output nROMOE, output nROMWE); /* RAM control state */ reg [2:0] RS; From 92e346f6636f420ae4788f831a93a571c59878b6 Mon Sep 17 00:00:00 2001 From: Zane Kaminski Date: Thu, 3 Oct 2024 12:06:37 -0400 Subject: [PATCH 2/2] Fix WarpSE.v QosEN declaration --- cpld/WarpSE.v | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/cpld/WarpSE.v b/cpld/WarpSE.v index 20ae80e..0301253 100644 --- a/cpld/WarpSE.v +++ b/cpld/WarpSE.v @@ -69,7 +69,7 @@ module WarpSE( wire IOCS, IORealCS, IOPWCS, IACS; wire ROMCS, ROMCS4X; wire RAMCS, RAMCS0X; - wire QoSCS, SndQoSCS; + wire QoSCS, SndQoSCS, QoSEN; CS cs( /* MC68HC000 interface */ .A(A_FSB[23:08]), @@ -198,7 +198,7 @@ module WarpSE( .IODONE(IODONE), .IOBERR(IOBERR)); - wire QoSEN, SndQoSReady; + wire SndQoSReady; CNT cnt( /* FSB clock, 7.8336 MHz clock, and E clock inputs */ .CLK(FCLK),