Fix RAM.v to compile

This commit is contained in:
Zane Kaminski 2024-10-03 12:06:24 -04:00
parent d557f9e502
commit 79eeaead98

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@ -12,7 +12,7 @@ module RAM(
input RefReqIn, input RefUrgIn,
/* DRAM and NOR flash interface */
output [11:0] RA, output nRAS, output reg nCAS,
output nLWE, output nUWE, output reg nOE, output nROMOE, output nROMWE);
output nLWE, output nUWE, output nOE, output nROMOE, output nROMWE);
/* RAM control state */
reg [2:0] RS;