diff --git a/cpld/CNT.v b/cpld/CNT.v index 28b6615..bb3c949 100644 --- a/cpld/CNT.v +++ b/cpld/CNT.v @@ -1,22 +1,25 @@ module CNT( - /* C8M clock input */ - input C8M, input E, input Er, + /* FSB clock and E clock inputs */ + input CLK, input E, /* Refresh request */ - output reg RefReq, output RefUrgent, - /* Reset, switch, button */ - input [3:1] SW, output reg nRESout, input nIPL2, + output reg RefReq, output RefUrg, + /* Reset, button */ + output reg nRESout, input nIPL2, /* Mac PDS bus master control outputs */ - output reg AoutOE, output reg nBR_IOB, - /* Configuration outputs */ - output C20MEN, output C25MEN, output FastROMEN); + output reg AoutOE, output reg nBR_IOB); + + /* E clock synchronization */ + reg [1:0] Er; + wire EFall = Er[1] && !Er[0]; + always @(posedge CLK) Er[1:0] <= { Er[0], E }; /* Timer counts from 0 to 1010 (10) -- 11 states == 14.042 us * Refresh timer sequence - * | Timer | RefReq | RefUrgent | + * | Timer | RefReq | RefUrg | * |------------------------------| * | 0 0000 | 0 | 0 | * | 1 0001 | 0 | 0 | - * | 2 0010 | 0 | 0 | + * | 2 0010 | 1 | 0 | * | 3 0011 | 1 | 0 | * | 4 0100 | 1 | 0 | * | 5 0101 | 1 | 0 | @@ -29,60 +32,52 @@ module CNT( */ reg [3:0] Timer = 0; reg TimerTC; - assign RefUrgent = Timer[3]; - always @(negedge C8M) begin - if (Er && !E) begin - TimerTC <= Timer[3:0]==4'h8; + always @(posedge CLK) begin + if (EFall) begin if (TimerTC) Timer <= 0; else Timer <= Timer+1; - RefReq <= Timer[3:0]==4'h2 || - Timer[3:0]==4'h3 || Timer[3:0]==4'h4 || Timer[3:0]==4'h5 || - Timer[3:0]==4'h6 || Timer[3:0]==4'h7 || Timer[3:0]==4'h8; + RefReq <= !(Timer==4'h0 || Timer==4'h1); + TimerTC <= Timer[3:0]==4'h9; + end + end + assign RefUrg = Timer[3]; + + /* Long timer counts from 0 to 8191 -- 8192 states == 115.033 ms */ + reg [12:0] LTimer; + reg LTimerTC; + always @(posedge CLK) begin + if (EFall && TimerTC) begin + LTimer <= LTimer+1; + LTimerTC <= LTimer[12:0]==13'h1FFE; end end - /* Long timer counts from 0 to 8192 -- 8193 states == 115.046 ms */ - reg [13:0] LTimer; - wire LTimerTC = LTimer[13]; - always @(negedge C8M) begin - if (Er && !E) && TimerTC begin - if (LTimerTC) LTimer <= 0; - else LTimer <= LTimer+1; - end - end + reg nIPL2r; always @(posedge CLK) nIPL2r <= nIPL2; /* Startup sequence control */ reg [1:0] INITS = 0; - assign nAoutOE = !AoutOE; - always @(negedge C8M) begin - case (INITS) - 0: begin + wire INITSTC = EFall && TimerTC && LTimerTC; + always @(posedge CLK) begin + case (INITS[1:0]) + 2'h0: begin AoutOE <= 0; // Tristate PDS address and control nRESout <= 0; // Hold reset low nBR_IOB <= 0; // Default to request bus - if (LTimerTC) INITS <= 1; - else INITS <= 0; - end 1: begin - AoutOE <= 0; // Tristate PDS address and control - nRESout <= 0; // Hold reset low - nBR_IOB <= nBR_IOB | !nIPL2; // Disable bus request if NMI pressed - if (LTimerTC && !IPL2r) INITS <= 2; - end 2: begin - AoutOE <= 0; // Tristate PDS address and control - nRESout <= 0; // Hold reset low - if (LTimerTC) INITS <= 3; - end 3: begin - AoutOE <= !nBR_IOB; // Get on PDS bus if bus was requested + if (INITSTC) INITS <= 1; + end 2'h1: begin + AoutOE <= 0; + nRESout <= 0; + nBR_IOB <= !(!nBR_IOB && nIPL2r); // Disable bus request if NMI pressed + if (INITSTC && nIPL2r) INITS <= 2; + end 2'h2: begin + AoutOE <= !nBR_IOB; + nRESout <= 0; + if (INITSTC) INITS <= 3; + end 2'h3: begin nRESout <= 1; // Release reset INITS <= 3; end endcase end - // Enable both oscillators... only mount one - assign C20MEN = 1; - assign C25MEN = 1; - // Enable fast ROM - assign FastROMEN = 1; - endmodule diff --git a/cpld/CS.v b/cpld/CS.v index 0e43d03..f4a39dc 100644 --- a/cpld/CS.v +++ b/cpld/CS.v @@ -1,32 +1,23 @@ module CS( - /* Setting input */ - input FastROMEN, /* MC68HC000 interface */ input [23:08] A, input CLK, input nRES, input nWE, /* AS cycle detection */ input BACT, /* Device select outputs */ - output IOCS, output SCSICS, output IOPWCS, output IACS, output ROMCS, output RAMCS, output SndRAMCSWR); + output IOCS, output IOPWCS, output IACS, output ROMCS, output RAMCS, output SndRAMCSWR); /* Overlay control */ - reg nOverlay0 = 0; - reg nOverlay1 = 0; - wire Overlay = ~nOverlay1; - wire ODCS = A[23:20]==4'h4; // Disable overlay + reg nOverlay = 0; + wire Overlay = ~nOverlay; + wire ODCS = (A[23:20]==4'h4); // Disable overlay always @(posedge CLK, negedge nRES) begin - if (~nRES) nOverlay0 <= 0; - else if (BACT && ODCS) nOverlay0 <= 1; - end - always @(posedge CLK) begin - if (~BACT) nOverlay1 <= nOverlay0; + if (!nRES) nOverlay <= 0; + else if (BACT && ODCS) nOverlay <= 1; end /* Select signals - FSB domain */ - wire RAMCS_OverlayOff = A[23:22]==2'b00; - wire RAMCS_OverlayOn = A[23:21]==3'b011; - assign RAMCS = (RAMCS_OverlayOff && !Overlay) || // 000000-3FFFFF when overlay disabled - (RAMCS_OverlayOn && Overlay); // 600000-7FFFFF when overlay enabled - wire VidRAMCSWR64k = RAMCS && A[21:20]==2'h3 && A[19:16]==4'hF && ~nWE; // 3F0000-3FFFFF / 7F0000-7FFFFF + assign RAMCS = (A[23:22]==2'b00) && !Overlay; // 000000-3FFFFF when overlay disabled + wire VidRAMCSWR64k = RAMCS && (A[21:20]==2'h3) && (A[19:16]==4'hF) && ~nWE; // 3F0000-3FFFFF / 7F0000-7FFFFF wire VidRAMCSWR = VidRAMCSWR64k && ( (A[15:12]==4'h2) || // 1792 bytes RAM, 2304 bytes video (A[15:12]==4'h3) || // 4096 bytes video @@ -41,30 +32,28 @@ module CS( (A[15:12]==4'hE) || // 4096 bytes video (A[15:12]==4'hF)); // 3200 bytes video, 128 bytes RAM (system error space), 768 bytes sound assign SndRAMCSWR = VidRAMCSWR64k && ( - (A[15:12]==4'hF && (A[11:8]==4'hD || A[11:8]==4'hE || A[11:8]==4'hF)) || - (A[15:12]==4'hA && (A[11:8]==4'h1 || A[11:8]==4'h2 || A[11:8]==4'h3))); + ((A[15:12]==4'hF) && ((A[11:8]==4'hD) || (A[11:8]==4'hE) || (A[11:8]==4'hF))) || + ((A[15:12]==4'hA) && ((A[11:8]==4'h1) || (A[11:8]==4'h2) || (A[11:8]==4'h3)))); - assign ROMCS = (A[23:20]==4'h0 && FastROMEN && Overlay) || - (A[23:20]==4'h4 && FastROMEN) || - (A[23:20]==4'hC && !FastROMEN); + assign ROMCS = ((A[23:20]==4'h0) && Overlay) || + (A[23:20]==4'h4); /* Select signals - IOB domain */ - assign IACS = A[23:08]==16'hFFFF; // IACK - assign IOCS = (A[23:20]==4'h0 && !FastROMEN && !Overlay) || - (A[23:20]==4'h4 && !FastROMEN) || // Motherboard ROM - A[23:20]==4'h5 || // SCSI - A[23:20]==4'h6 || // empty - A[23:20]==4'h7 || // empty - A[23:20]==4'h8 || // empty - A[23:20]==4'h9 || // SCC read/reset - A[23:20]==4'hA || // empty - A[23:20]==4'hB || // SCC write - (A[23:20]==4'hC && FastROMEN) || // empty / fast ROM - A[23:20]==4'hD || // IWM - A[23:20]==4'hE || // VIA - A[23:20]==4'hF || // IACK + assign IACS = (A[23:08]==16'hFFFF); // IACK + assign IOCS = + (A[23:20]==4'h5) || // SCSI + (A[23:20]==4'h6) || // empty + (A[23:20]==4'h7) || // empty + (A[23:20]==4'h8) || // empty + (A[23:20]==4'h9) || // SCC read/reset + (A[23:20]==4'hA) || // empty + (A[23:20]==4'hB) || // SCC write + (A[23:20]==4'hC) || // empty / fast ROM + (A[23:20]==4'hD) || // IWM + (A[23:20]==4'hE) || // VIA + (A[23:20]==4'hF) || // IACK VidRAMCSWR; - assign SCSICS = A[23:20]==4'h5; // SCSI - assign IOPWCS = RAMCS_OverlayOff && ~nWE; + //assign IOCS = 0; + assign IOPWCS = RAMCS && !nWE; endmodule diff --git a/cpld/IOBM.v b/cpld/IOBM.v index bebbec3..7f06623 100644 --- a/cpld/IOBM.v +++ b/cpld/IOBM.v @@ -1,6 +1,6 @@ module IOBM( /* PDS interface */ - input C16M, input C8M, input E, input Er, + input C16M, input C8M, input E, output reg nASout, output reg nLDS, output reg nUDS, output reg nVMA, input nDTACK, input nVPA, input nBERR, input nRES, /* PDS address and data latch control */ @@ -32,10 +32,12 @@ module IOBM( wire VPA = VPArr && VPArf; wire RES = RESrr && RESrf; + /* E clock synchronization */ + reg Er; always @(negedge C8M) begin Er <= E; end + reg Er2; always @(posedge C16M) begin Er2 <= Er; end + /* E clock state */ reg [4:0] ES; - reg Er2; - always @(posedge C16M) begin Er2 <= Er; end always @(posedge C16M) begin if (Er2 && ~Er) ES <= 1; else if (ES==0 || ES==19) ES <= 0; @@ -100,8 +102,8 @@ module IOBM( always @(negedge C16M) begin nDinLE = IOS==4 || IOS==5; end reg DoutOE = 0; assign nDoutOE = !(AoutOE && DoutOE); always @(posedge C16M) begin - DoutOE <= IOWE && (IOS==1 || IOS==2 || IOS==3 || - IOS==4 || IOS==5 || IOS==6); + DoutOE <= ( IOWE && (IOS==1 || IOS==2 || IOS==3 || IOS==4 || IOS==5 || IOS==6)) || + (!IOREQr && IOS==0 && AoutOE); end /* AS, DS control */ diff --git a/cpld/RAM.v b/cpld/RAM.v index 3c522a9..3beaa5e 100644 --- a/cpld/RAM.v +++ b/cpld/RAM.v @@ -6,7 +6,7 @@ module RAM( /* Select and ready signals */ input RAMCS, input ROMCS, output RAM_Ready, /* Refresh Counter Interface */ - input RefReqIn, input RefUrgentIn, + input RefReqIn, input RefUrgIn, /* DRAM and NOR flash interface */ output [11:0] RA, output nRAS, output reg nCAS, output nLWE, output nUWE, output nOE, output nROMCS, output nROMWE); @@ -22,14 +22,14 @@ module RAM( /* Refresh request synchronization */ reg RefReqSync; always @(posedge CLK) RefReqSync <= RefReqIn; - reg RegUrgentSync; always @(posedge CLK) RegUrgentSync <= RefUrgentIn; + reg RegUrgSync; always @(posedge CLK) RegUrgSync <= RefUrgIn; /* Refresh command generation */ - reg RefReq, RefUrgent; // Refresh commands + reg RefReq, RefUrg; // Refresh commands reg RefDone; // Refresh done "remember" always @(posedge CLK) begin RefReq <= RefReqSync && !RefDone; - RefUrgent <= RegUrgentSync && !RefDone; + RefUrg <= RegUrgSync && !RefDone; if (!RefReqSync) RefDone <= 0; else if (RS==2 || RS==3) RefDone <= 1; // RS2 || RS3 to save 1 input end @@ -39,16 +39,16 @@ module RAM( // Non-urgent refresh can start during first clock of non-RAM cycle ( BACT && ~BACTr && ~RAMCS && RefReq) || // Urgent refresh can start during bus idle - (~BACT && RefUrgent) || + (~BACT && RefUrg) || // Urgent refresh can start during non-ram cycle - ( BACT && ~RAMCS && RefUrgent)); + ( BACT && ~RAMCS && RefUrg)); wire RefFromRS0Pre = RS==0 && // Urgent refresh can start during long RAM cycle after RAM access done. - BACT && RAMCS && !RAMEN && RefUrgent; + BACT && RAMCS && !RAMEN && RefUrg; wire RefFromRS0 = RefFromRS0Next || RefFromRS0Pre; // Urgent refresh cannot start when BACT and RAMCS and RAMEN, // since /RAS has already been asserted. For this we wait for RS7. - wire RefFromRS7 = RS==7 && RefUrgent; + wire RefFromRS7 = RS==7 && RefUrg; /* RAM enable (/AS -> /RAS) */ always @(posedge CLK) begin @@ -65,8 +65,8 @@ module RAM( /* Refresh state */ reg RefRAS = 0; - assign nROMCS = ~ROMCS; - assign nRAS = ~((~nAS && RAMCS && RAMEN) || RefRAS); + assign nROMCS = !ROMCS; + assign nRAS = 1;//~((~nAS && RAMCS && RAMEN) || RefRAS); assign nOE = ~(~nAS && nWE); assign nLWE = ~(~nAS && ~nWE && ~nLDS && RAMEN); assign nUWE = ~(~nAS && ~nWE && ~nUDS && RAMEN); @@ -153,13 +153,13 @@ module RAM( RefRAS <= 0; end else if (RS==7) begin // RS7 is final state of R/W or refresh operation. - if (~BACT && RefUrgent) begin + if (~BACT && RefUrg) begin // If /AS cycle terminated and urgent refresh request, // we know /RAS has been in precharge so we can go to RS2. RS <= 2; RAMReady <= 0; RASEL <= 1; - end else if (BACT && RefUrgent) begin + end else if (BACT && RefUrg) begin // But if /AS cycle hasn't terminated and we need to refresh, // we need to go to RS1 to add additional precharge time. RS <= 1; diff --git a/cpld/WarpSE-XC95144XL.ucf b/cpld/WarpSE-XC95144XL.ucf index 510a57a..cfd467a 100644 --- a/cpld/WarpSE-XC95144XL.ucf +++ b/cpld/WarpSE-XC95144XL.ucf @@ -1,13 +1,3 @@ -#Created by Constraints Editor (xc95144xl-tq100-10) - 2022/02/07 -NET "FCLK" TNM_NET = CLK_FSB; -TIMESPEC TS_CLK_FSB = PERIOD "CLK_FSB" 25 MHz HIGH 50%; -NET "C16M" TNM_NET = CLK2X_IOB; -TIMESPEC TS_CLK2X_IOB = PERIOD "CLK2X_IOB" 15.6672 MHz HIGH 50%; -NET "C8M" TNM_NET = CLK_IOB; -TIMESPEC TS_CLK_IOB = PERIOD "CLK_IOB" 7.8336 MHz HIGH 50%; -#PACE: Start of Constraints generated by PACE - -#PACE: Start of PACE I/O Pin Assignments NET "A_FSB<10>" LOC = "P8" ; NET "A_FSB<11>" LOC = "P9" ; NET "A_FSB<12>" LOC = "P10" ; @@ -83,9 +73,3 @@ NET "RA<9>" LOC = "P56" ; NET "SW<1>" LOC = "P61" ; NET "SW<2>" LOC = "P60" ; NET "SW<3>" LOC = "P67" ; - -#PACE: Start of PACE Area Constraints - -#PACE: Start of PACE Prohibit Constraints - -#PACE: End of Constraints generated by PACE diff --git a/cpld/WarpSE.v b/cpld/WarpSE.v index d25eda1..d9980cc 100644 --- a/cpld/WarpSE.v +++ b/cpld/WarpSE.v @@ -38,36 +38,33 @@ module WarpSE( output nDinLE, input [3:1] SW, output C20MEN, - output C25MEN); + output C25MEN); + + /* FSB clock oscillator enables */ + // Enable both oscillators... only mount one + assign C20MEN = 1; + assign C25MEN = 1; /* Reset input and open-drain output */ wire nRESin = nRES; wire nRESout; assign nRES = !nRESout ? 1'b0 : 1'bZ; - /* E clock registration */ - reg Er; always @(negedge C8M) begin Er <= E; end - /* AS cycle detection */ wire BACT; /* Refresh request/ack signals */ - wire RefReq, RefUrgent; - - /* Fast ROM enable setting */ - wire FastROMEN; + wire RefReq, RefUrg; /* FSB chip select signals */ - wire IOCS, SCSICS, IOPWCS, IACS, ROMCS, RAMCS, SndRAMCSWR; + wire IOCS, IOPWCS, IACS, ROMCS, RAMCS, SndRAMCSWR; CS cs( - /* Setting input */ - FastROMEN, /* MC68HC000 interface */ A_FSB[23:08], FCLK, nRESin, nWE_FSB, /* AS cycle detection */ BACT, /* Device select outputs */ - IOCS, SCSICS, IOPWCS, IACS, ROMCS, RAMCS, SndRAMCSWR); + IOCS, IOPWCS, IACS, ROMCS, RAMCS, SndRAMCSWR); wire RAM_Ready; RAM ram( @@ -78,7 +75,7 @@ module WarpSE( /* Select and ready signals */ RAMCS, ROMCS, RAM_Ready, /* Refresh Counter Interface */ - RefReq, RefUrgent, + RefReq, RefUrg, /* DRAM and NOR flash interface */ RA[11:0], nRAS, nCAS, nRAMLWE, nRAMUWE, nOE, nROMCS, nROMWE); @@ -114,26 +111,24 @@ module WarpSE( assign nVMA_IOB = AoutOE ? nVMA_IOBout : 1'bZ; IOBM iobm( /* PDS interface */ - C16M, C8M, E, Er, + C16M, C8M, E, nAS_IOBout, nLDS_IOBout, nUDS_IOBout, nVMA_IOBout, nDTACK_IOB, nVPA_IOB, nBERR_IOB, nRESin, /* PDS address and data latch control */ AoutOE, nDoutOE, ALE0M, nDinLE, /* IO bus slave port interface */ IOACT, IOBERR, - IOREQ, IOL0, IOU0, IORW0); + IOREQ, IOL0, IOU0, !IORW0); CNT cnt( - /* C8M and E clocks */ - C8M, E, Er, + /* FSB clock and E clock inputs */ + FCLK, E, /* Refresh request */ - RefReq, RefUrgent, - /* Reset, switch, button */ - SW[3:1], nRESout, nIPL2, + RefReq, RefUrg, + /* Reset, button */ + nRESout, nIPL2, /* Mac PDS bus master control outputs */ - AoutOE, nBR_IOB, - /* Configuration outputs */ - FastROMEN, C20MEN, C25MEN); + AoutOE, nBR_IOB); FSB fsb( /* MC68HC000 interface */ diff --git a/cpld/XC95144XL/.lso b/cpld/XC95144XL/.lso deleted file mode 100644 index 22de730..0000000 --- a/cpld/XC95144XL/.lso +++ /dev/null @@ -1 +0,0 @@ -work diff --git a/cpld/XC95144XL/CNT_summary.html b/cpld/XC95144XL/CNT_summary.html deleted file mode 100644 index 08e59ac..0000000 --- a/cpld/XC95144XL/CNT_summary.html +++ /dev/null @@ -1,81 +0,0 @@ -Xilinx Design Summary - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
MXSE Project Status (03/28/2022 - 09:28:10)
Project File:WarpSE.xiseParser Errors: No Errors
Module Name:CNTImplementation State:Fitted
Target Device:xc95144xl-10TQ100
  • Errors:
 
Product Version:ISE 14.7
  • Warnings:
 
Design Goal:Balanced
  • Routing Results:
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Design Strategy:Xilinx Default (unlocked)
  • Timing Constraints:
 
Environment: 
  • Final Timing Score:
  
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Detailed Reports [-]
Report NameStatusGeneratedErrorsWarningsInfos
Synthesis Report     
Translation Report     
Map Report     
Place and Route Report     
CPLD Fitter Report (Text)     
Power Report     
Post-PAR Static Timing Report     
Bitgen Report     
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Secondary Reports [-]
Report NameStatusGenerated
Post-Fit Simulation Model Report  
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Date Generated: 03/28/2022 - 09:28:10
- \ No newline at end of file diff --git a/cpld/XC95144XL/WarpSE.bld b/cpld/XC95144XL/WarpSE.bld index 89d0346..9fcf148 100644 --- a/cpld/XC95144XL/WarpSE.bld +++ b/cpld/XC95144XL/WarpSE.bld @@ -30,7 +30,7 @@ NGDBUILD Design Results Summary: Number of errors: 0 Number of warnings: 0 -Total memory usage is 154596 kilobytes +Total memory usage is 154340 kilobytes Writing NGD file "WarpSE.ngd" ... Total REAL time to NGDBUILD completion: 3 sec diff --git a/cpld/XC95144XL/WarpSE.cmd_log b/cpld/XC95144XL/WarpSE.cmd_log index 8d7980e..e9213bc 100644 --- a/cpld/XC95144XL/WarpSE.cmd_log +++ b/cpld/XC95144XL/WarpSE.cmd_log @@ -1,278 +1,42 @@ -xst -intstyle ise -ifn "Z:/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "Z:/Warp-SE/cpld/XC95144XL/WarpSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc Z:/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper WarpSE.ngd -tsim -intstyle ise WarpSE WarpSE.nga -taengine -intstyle ise -f WarpSE -l WarpSE.tim -e {Z:\Warp-SE\cpld\XC95144XL\taengine.err} -xst -intstyle ise -ifn "Z:/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "Z:/Warp-SE/cpld/XC95144XL/WarpSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc Z:/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper WarpSE.ngd -tsim -intstyle ise WarpSE WarpSE.nga -taengine -intstyle ise -f WarpSE -l WarpSE.tim -e {Z:\Warp-SE\cpld\XC95144XL\taengine.err} -xst -intstyle ise -ifn "Z:/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "Z:/Warp-SE/cpld/XC95144XL/WarpSE.syr" -xst -intstyle ise -ifn "Z:/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "Z:/Warp-SE/cpld/XC95144XL/WarpSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc Z:/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd -XSLTProcess WarpSE_build.xml -tsim -intstyle ise WarpSE WarpSE.nga -taengine -intstyle ise -f WarpSE -w --format html1 -l WarpSE_html/tim/timing_report.htm --cwd "Z:/Warp-SE/cpld/XC95144XL" timingan_cpld -intstyle ise "Z:/Warp-SE/cpld/XC95144XL/WarpSE.vm6" -xst -intstyle ise -ifn "Z:/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "Z:/Warp-SE/cpld/XC95144XL/WarpSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc Z:/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd -XSLTProcess WarpSE_build.xml -tsim -intstyle ise WarpSE WarpSE.nga -taengine -intstyle ise -f WarpSE -w --format html1 -l WarpSE_html/tim/timing_report.htm -xst -intstyle ise -ifn "Z:/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "Z:/Warp-SE/cpld/XC95144XL/WarpSE.syr" -xst -intstyle ise -ifn "Z:/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "Z:/Warp-SE/cpld/XC95144XL/WarpSE.syr" -xst -intstyle ise -ifn "Z:/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "Z:/Warp-SE/cpld/XC95144XL/WarpSE.syr" -xst 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C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd -XSLTProcess WarpSE_build.xml -tsim -intstyle ise WarpSE WarpSE.nga -hprep6 -s IEEE1149 -n WarpSE -i WarpSE -xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd -XSLTProcess WarpSE_build.xml -xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd -XSLTProcess WarpSE_build.xml -tsim -intstyle ise WarpSE WarpSE.nga -hprep6 -s IEEE1149 -n WarpSE -i WarpSE -ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd -XSLTProcess WarpSE_build.xml -tsim -intstyle ise WarpSE WarpSE.nga -hprep6 -s IEEE1149 -n WarpSE -i WarpSE -ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd -XSLTProcess WarpSE_build.xml -tsim -intstyle ise WarpSE WarpSE.nga -hprep6 -s IEEE1149 -n WarpSE -i WarpSE -xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" -xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd -XSLTProcess WarpSE_build.xml -tsim -intstyle ise WarpSE WarpSE.nga -hprep6 -s IEEE1149 -n WarpSE -i WarpSE -xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd -XSLTProcess WarpSE_build.xml -tsim -intstyle ise WarpSE WarpSE.nga -hprep6 -s IEEE1149 -n WarpSE -i WarpSE -xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn 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WarpSE.ngd -XSLTProcess WarpSE_build.xml -tsim -intstyle ise WarpSE WarpSE.nga -hprep6 -s IEEE1149 -n WarpSE -i WarpSE -xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd -XSLTProcess WarpSE_build.xml -tsim -intstyle ise WarpSE WarpSE.nga -hprep6 -s IEEE1149 -n WarpSE -i WarpSE -xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd -XSLTProcess WarpSE_build.xml -tsim -intstyle ise WarpSE WarpSE.nga -hprep6 -s IEEE1149 -n WarpSE -i WarpSE -xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd -XSLTProcess WarpSE_build.xml -tsim -intstyle ise WarpSE WarpSE.nga -hprep6 -s IEEE1149 -n WarpSE -i WarpSE -xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd -XSLTProcess WarpSE_build.xml -tsim -intstyle ise WarpSE WarpSE.nga -hprep6 -s IEEE1149 -n WarpSE -i WarpSE -xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd -XSLTProcess WarpSE_build.xml -tsim -intstyle ise WarpSE WarpSE.nga -hprep6 -s IEEE1149 -n WarpSE -i WarpSE -xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" -xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" -xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd -XSLTProcess WarpSE_build.xml -tsim -intstyle ise WarpSE WarpSE.nga -hprep6 -s IEEE1149 -n WarpSE -i WarpSE -xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd -XSLTProcess WarpSE_build.xml -tsim -intstyle ise WarpSE WarpSE.nga -hprep6 -s IEEE1149 -n WarpSE -i WarpSE -xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd -XSLTProcess WarpSE_build.xml -tsim -intstyle ise WarpSE WarpSE.nga -hprep6 -s IEEE1149 -n WarpSE -i WarpSE -xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" -xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd -XSLTProcess WarpSE_build.xml -tsim -intstyle ise WarpSE WarpSE.nga -hprep6 -s IEEE1149 -n WarpSE -i WarpSE -xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd -XSLTProcess WarpSE_build.xml -tsim -intstyle ise WarpSE WarpSE.nga -hprep6 -s IEEE1149 -n WarpSE -i WarpSE -xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd -XSLTProcess WarpSE_build.xml -tsim -intstyle ise WarpSE WarpSE.nga -hprep6 -s IEEE1149 -n WarpSE -i WarpSE -xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd -XSLTProcess WarpSE_build.xml -tsim -intstyle ise WarpSE WarpSE.nga -hprep6 -s IEEE1149 -n WarpSE -i WarpSE -ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd +cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper WarpSE.ngd XSLTProcess WarpSE_build.xml tsim -intstyle ise WarpSE WarpSE.nga taengine -intstyle ise -f WarpSE -w --format html1 -l WarpSE_html/tim/timing_report.htm hprep6 -s IEEE1149 -n WarpSE -i WarpSE xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" +ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd +cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper WarpSE.ngd +XSLTProcess WarpSE_build.xml xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd +cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper WarpSE.ngd XSLTProcess WarpSE_build.xml tsim -intstyle ise WarpSE WarpSE.nga hprep6 -s IEEE1149 -n WarpSE -i WarpSE xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd +cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper WarpSE.ngd XSLTProcess WarpSE_build.xml tsim -intstyle ise WarpSE WarpSE.nga hprep6 -s IEEE1149 -n WarpSE -i WarpSE xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd -XSLTProcess WarpSE_build.xml -tsim -intstyle ise WarpSE WarpSE.nga -hprep6 -s IEEE1149 -n WarpSE -i WarpSE -xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" -xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd +cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper WarpSE.ngd XSLTProcess WarpSE_build.xml tsim -intstyle ise WarpSE WarpSE.nga hprep6 -s IEEE1149 -n WarpSE -i WarpSE xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd +cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper WarpSE.ngd XSLTProcess WarpSE_build.xml tsim -intstyle ise WarpSE WarpSE.nga hprep6 -s IEEE1149 -n WarpSE -i WarpSE xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd -XSLTProcess WarpSE_build.xml -tsim -intstyle ise WarpSE WarpSE.nga -hprep6 -s IEEE1149 -n WarpSE -i WarpSE -xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd -XSLTProcess WarpSE_build.xml -tsim -intstyle ise WarpSE WarpSE.nga -hprep6 -s IEEE1149 -n WarpSE -i WarpSE -xst -intstyle ise -ifn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.xst" -ofn "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.syr" -ngdbuild -intstyle ise -dd _ngo -uc C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10 WarpSE.ngc WarpSE.ngd -cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper WarpSE.ngd +cpldfit -intstyle ise -p xc95144xl-10-TQ100 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper WarpSE.ngd XSLTProcess WarpSE_build.xml tsim -intstyle ise WarpSE WarpSE.nga hprep6 -s IEEE1149 -n WarpSE -i WarpSE diff --git a/cpld/XC95144XL/WarpSE.data b/cpld/XC95144XL/WarpSE.data deleted file mode 100644 index 71df4b5..0000000 --- a/cpld/XC95144XL/WarpSE.data +++ /dev/null @@ -1,1387 +0,0 @@ -MODELDATA -MODELDATA_VERSION "v1998.8" -DESIGN "WarpSE"; - -/* port drive, load, max capacitance and max transition in data file */ -PORTDATA -A_FSB<9>: MAXTRANS(0.0); -A_FSB<8>: MAXTRANS(0.0); -A_FSB<15>: MAXTRANS(0.0); -A_FSB<14>: MAXTRANS(0.0); -A_FSB<13>: MAXTRANS(0.0); -A_FSB<12>: MAXTRANS(0.0); -A_FSB<11>: MAXTRANS(0.0); -A_FSB<10>: MAXTRANS(0.0); -A_FSB<23>: MAXTRANS(0.0); -A_FSB<22>: MAXTRANS(0.0); -A_FSB<21>: MAXTRANS(0.0); -A_FSB<20>: MAXTRANS(0.0); -A_FSB<19>: MAXTRANS(0.0); -A_FSB<18>: MAXTRANS(0.0); -A_FSB<17>: MAXTRANS(0.0); -A_FSB<16>: MAXTRANS(0.0); -CLK2X_IOB: MAXTRANS(0.0); -CLK_FSB: MAXTRANS(0.0); -nAS_FSB: MAXTRANS(0.0); -nWE_FSB: MAXTRANS(0.0); -SW<1>: MAXTRANS(0.0); -nRES: MAXTRANS(0.0); -nLDS_FSB: MAXTRANS(0.0); -nUDS_FSB: MAXTRANS(0.0); -CLK_IOB: MAXTRANS(0.0); -nBERR_IOB: MAXTRANS(0.0); -E_IOB: MAXTRANS(0.0); -nIPL2: MAXTRANS(0.0); -nBG_IOB: MAXTRANS(0.0); -nDTACK_IOB: MAXTRANS(0.0); -nVPA_IOB: MAXTRANS(0.0); -A_FSB<1>: MAXTRANS(0.0); -A_FSB<2>: MAXTRANS(0.0); -A_FSB<3>: MAXTRANS(0.0); -A_FSB<4>: MAXTRANS(0.0); -A_FSB<5>: MAXTRANS(0.0); -A_FSB<6>: MAXTRANS(0.0); -A_FSB<7>: MAXTRANS(0.0); -SW<0>: MAXTRANS(0.0); -nVMA_IOB: MAXTRANS(0.0); -nAS_IOB: MAXTRANS(0.0); -nLDS_IOB: MAXTRANS(0.0); -nUDS_IOB: MAXTRANS(0.0); -nDTACK_FSB: MAXTRANS(0.0); -RA<0>: MAXTRANS(0.0); -RA<1>: MAXTRANS(0.0); -RA<2>: MAXTRANS(0.0); -RA<3>: MAXTRANS(0.0); -RA<4>: MAXTRANS(0.0); -RA<5>: MAXTRANS(0.0); -RA<6>: MAXTRANS(0.0); -RA<7>: MAXTRANS(0.0); -RA<8>: MAXTRANS(0.0); -RA<9>: MAXTRANS(0.0); -nBERR_FSB: MAXTRANS(0.0); -nOE: MAXTRANS(0.0); -nROMWE: MAXTRANS(0.0); -nVPA_FSB: MAXTRANS(0.0); -nADoutLE0: MAXTRANS(0.0); -nCAS: MAXTRANS(0.0); -nDinLE: MAXTRANS(0.0); -nDinOE: MAXTRANS(0.0); -nDoutOE: MAXTRANS(0.0); -nRAS: MAXTRANS(0.0); -RA<11>: MAXTRANS(0.0); -RA<10>: MAXTRANS(0.0); -CLK20EN: MAXTRANS(0.0); -CLK25EN: MAXTRANS(0.0); -nBR_IOB: MAXTRANS(0.0); -nADoutLE1: MAXTRANS(0.0); -nAoutOE: MAXTRANS(0.0); -nRAMLWE: MAXTRANS(0.0); -nRAMUWE: MAXTRANS(0.0); -nROMCS: MAXTRANS(0.0); -ENDPORTDATA - -/* timing arc data */ -TIMINGDATA - -ARCDATA -SW<0>_CLK20EN_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -SW<0>_CLK25EN_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -A_FSB<1>_RA<0>_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -A_FSB<10>_RA<0>_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -A_FSB<21>_RA<10>_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -A_FSB<19>_RA<11>_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -A_FSB<11>_RA<1>_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -A_FSB<2>_RA<1>_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -A_FSB<3>_RA<2>_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -A_FSB<12>_RA<2>_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -A_FSB<4>_RA<3>_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -A_FSB<13>_RA<3>_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -A_FSB<5>_RA<4>_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -A_FSB<14>_RA<4>_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -A_FSB<6>_RA<5>_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -A_FSB<15>_RA<5>_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -A_FSB<7>_RA<6>_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -A_FSB<16>_RA<6>_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -A_FSB<17>_RA<7>_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -A_FSB<8>_RA<7>_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -A_FSB<21>_RA<8>_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -A_FSB<9>_RA<8>_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -A_FSB<23>_RA<8>_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -A_FSB<22>_RA<8>_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -A_FSB<18>_RA<8>_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -A_FSB<20>_RA<9>_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -A_FSB<19>_RA<9>_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -nAS_FSB_nBERR_FSB_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -A_FSB<20>_nBERR_FSB_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -A_FSB<22>_nBERR_FSB_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -A_FSB<23>_nBERR_FSB_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -A_FSB<21>_nBERR_FSB_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -A_FSB<20>_nDinOE_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -A_FSB<23>_nDinOE_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -A_FSB<22>_nDinOE_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -A_FSB<21>_nDinOE_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -nAS_FSB_nDinOE_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -nWE_FSB_nDinOE_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -SW<1>_nDinOE_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -nAS_FSB_nOE_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -nWE_FSB_nOE_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -nLDS_FSB_nRAMLWE_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -nWE_FSB_nRAMLWE_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -nAS_FSB_nRAMLWE_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -nWE_FSB_nRAMUWE_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -nUDS_FSB_nRAMUWE_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -nAS_FSB_nRAMUWE_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -A_FSB<23>_nRAS_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -nAS_FSB_nRAS_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -A_FSB<21>_nRAS_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -A_FSB<22>_nRAS_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -A_FSB<22>_nROMCS_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -A_FSB<23>_nROMCS_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -SW<1>_nROMCS_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -A_FSB<20>_nROMCS_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -A_FSB<21>_nROMCS_delay: -CELL_RISE(scalar) { - VALUES("11"); -} -CELL_FALL(scalar) { - VALUES("11"); -} -ENDARCDATA - -ARCDATA -nAS_FSB_nROMWE_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -nWE_FSB_nROMWE_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -nAS_FSB_nVPA_FSB_delay: -CELL_RISE(scalar) { - VALUES("10"); -} -CELL_FALL(scalar) { - VALUES("10"); -} -ENDARCDATA - -ARCDATA -CLK_FSB_nDTACK_FSB_delay: -CELL_RISE(scalar) { - VALUES("5.8"); -} -CELL_FALL(scalar) { - VALUES("5.8"); -} -ENDARCDATA - -ARCDATA -CLK_FSB_RA<0>_delay: -CELL_RISE(scalar) { - VALUES("13.5"); -} -CELL_FALL(scalar) { - VALUES("13.5"); -} -ENDARCDATA - -ARCDATA -CLK_FSB_RA<1>_delay: -CELL_RISE(scalar) { - VALUES("14.5"); -} -CELL_FALL(scalar) { - VALUES("14.5"); -} -ENDARCDATA - -ARCDATA -CLK_FSB_RA<2>_delay: -CELL_RISE(scalar) { - VALUES("14.5"); -} -CELL_FALL(scalar) { - VALUES("14.5"); -} -ENDARCDATA - -ARCDATA -CLK_FSB_RA<3>_delay: -CELL_RISE(scalar) { - VALUES("13.5"); -} -CELL_FALL(scalar) { - VALUES("13.5"); -} -ENDARCDATA - -ARCDATA -CLK_FSB_RA<4>_delay: -CELL_RISE(scalar) { - VALUES("14.5"); -} -CELL_FALL(scalar) { - VALUES("14.5"); -} -ENDARCDATA - -ARCDATA -CLK_FSB_RA<5>_delay: -CELL_RISE(scalar) { - VALUES("14.5"); -} -CELL_FALL(scalar) { - VALUES("14.5"); -} -ENDARCDATA - -ARCDATA -CLK_FSB_RA<6>_delay: -CELL_RISE(scalar) { - VALUES("13.5"); -} -CELL_FALL(scalar) { - VALUES("13.5"); -} -ENDARCDATA - -ARCDATA -CLK_FSB_RA<7>_delay: -CELL_RISE(scalar) { - VALUES("13.5"); -} -CELL_FALL(scalar) { - VALUES("13.5"); -} -ENDARCDATA - -ARCDATA -CLK_FSB_RA<8>_delay: -CELL_RISE(scalar) { - VALUES("14.5"); -} -CELL_FALL(scalar) { - VALUES("14.5"); -} -ENDARCDATA - -ARCDATA -CLK_FSB_RA<9>_delay: -CELL_RISE(scalar) { - VALUES("13.5"); -} -CELL_FALL(scalar) { - VALUES("13.5"); -} -ENDARCDATA - -ARCDATA -CLK_FSB_nBERR_FSB_delay: -CELL_RISE(scalar) { - VALUES("14.5"); -} -CELL_FALL(scalar) { - VALUES("14.5"); -} -ENDARCDATA - -ARCDATA -CLK_FSB_nVPA_FSB_delay: -CELL_RISE(scalar) { - VALUES("13.5"); -} -CELL_FALL(scalar) { - VALUES("13.5"); -} -ENDARCDATA - -ARCDATA -CLK_FSB_nADoutLE0_delay: -CELL_RISE(scalar) { - VALUES("13.5"); -} -CELL_FALL(scalar) { - VALUES("13.5"); -} -ENDARCDATA - -ARCDATA -CLK_FSB_nCAS_delay: -CELL_RISE(scalar) { - VALUES("5.8"); -} -CELL_FALL(scalar) { - VALUES("5.8"); -} -ENDARCDATA - -ARCDATA -CLK_FSB_nRAS_delay: -CELL_RISE(scalar) { - VALUES("14.5"); -} -CELL_FALL(scalar) { - VALUES("14.5"); -} -ENDARCDATA - -ARCDATA -CLK_FSB_nBR_IOB_delay: -CELL_RISE(scalar) { - VALUES("5.8"); -} -CELL_FALL(scalar) { - VALUES("5.8"); -} -ENDARCDATA - -ARCDATA -CLK_FSB_nADoutLE1_delay: -CELL_RISE(scalar) { - VALUES("5.8"); -} -CELL_FALL(scalar) { - VALUES("5.8"); -} -ENDARCDATA - -ARCDATA -CLK_FSB_nRAMLWE_delay: -CELL_RISE(scalar) { - VALUES("13.5"); -} -CELL_FALL(scalar) { - VALUES("13.5"); -} -ENDARCDATA - -ARCDATA -CLK_FSB_nRAMUWE_delay: -CELL_RISE(scalar) { - VALUES("14.5"); -} -CELL_FALL(scalar) { - VALUES("14.5"); -} -ENDARCDATA - -ARCDATA -CLK_FSB_nROMCS_delay: -CELL_RISE(scalar) { - VALUES("14.5"); -} -CELL_FALL(scalar) { - VALUES("14.5"); -} -ENDARCDATA - -ARCDATA -CLK2X_IOB_nVMA_IOB_delay: -CELL_RISE(scalar) { - VALUES("14.5"); -} -CELL_FALL(scalar) { - VALUES("14.5"); -} -ENDARCDATA - -ARCDATA -CLK2X_IOB_nAS_IOB_delay: -CELL_RISE(scalar) { - VALUES("14.5"); -} -CELL_FALL(scalar) { - VALUES("14.5"); -} -ENDARCDATA - -ARCDATA -CLK2X_IOB_nLDS_IOB_delay: -CELL_RISE(scalar) { - VALUES("14.5"); -} -CELL_FALL(scalar) { - VALUES("14.5"); -} -ENDARCDATA - -ARCDATA -CLK2X_IOB_nUDS_IOB_delay: -CELL_RISE(scalar) { - VALUES("14.5"); -} -CELL_FALL(scalar) { - VALUES("14.5"); -} -ENDARCDATA - -ARCDATA -CLK2X_IOB_nADoutLE0_delay: -CELL_RISE(scalar) { - VALUES("13.5"); -} -CELL_FALL(scalar) { - VALUES("13.5"); -} -ENDARCDATA - -ARCDATA -CLK2X_IOB_nDinLE_delay: -CELL_RISE(scalar) { - VALUES("5.8"); -} -CELL_FALL(scalar) { - VALUES("5.8"); -} -ENDARCDATA - -ARCDATA -CLK2X_IOB_nDoutOE_delay: -CELL_RISE(scalar) { - VALUES("5.8"); -} -CELL_FALL(scalar) { - VALUES("5.8"); -} -ENDARCDATA - -ARCDATA -CLK2X_IOB_nAoutOE_delay: -CELL_RISE(scalar) { - VALUES("5.8"); -} -CELL_FALL(scalar) { - VALUES("5.8"); -} -ENDARCDATA - -ARCDATA -E_IOB_CLK_IOB_setup: -CONSTRAINT(scalar) { - VALUES("9.5"); -} -ENDARCDATA - -ARCDATA -E_IOB_CLK_IOB_hold: -CONSTRAINT(scalar) { - VALUES("-3"); -} -ENDARCDATA - -ARCDATA -A_FSB<10>_CLK_FSB_setup: -CONSTRAINT(scalar) { - VALUES("10.9"); -} -ENDARCDATA - -ARCDATA -A_FSB<11>_CLK_FSB_setup: -CONSTRAINT(scalar) { - VALUES("10.9"); -} -ENDARCDATA - -ARCDATA -A_FSB<12>_CLK_FSB_setup: -CONSTRAINT(scalar) { - VALUES("10.9"); -} -ENDARCDATA - -ARCDATA -A_FSB<13>_CLK_FSB_setup: -CONSTRAINT(scalar) { - VALUES("10.9"); -} -ENDARCDATA - -ARCDATA -A_FSB<14>_CLK_FSB_setup: -CONSTRAINT(scalar) { - VALUES("10.9"); -} -ENDARCDATA - -ARCDATA -A_FSB<15>_CLK_FSB_setup: -CONSTRAINT(scalar) { - VALUES("10.9"); -} -ENDARCDATA - -ARCDATA -A_FSB<16>_CLK_FSB_setup: -CONSTRAINT(scalar) { - VALUES("10.9"); -} -ENDARCDATA - -ARCDATA -A_FSB<17>_CLK_FSB_setup: -CONSTRAINT(scalar) { - VALUES("10.9"); -} -ENDARCDATA - -ARCDATA -A_FSB<18>_CLK_FSB_setup: -CONSTRAINT(scalar) { - VALUES("10.9"); -} -ENDARCDATA - -ARCDATA -A_FSB<19>_CLK_FSB_setup: -CONSTRAINT(scalar) { - VALUES("10.9"); -} -ENDARCDATA - -ARCDATA -A_FSB<20>_CLK_FSB_setup: -CONSTRAINT(scalar) { - VALUES("18.6"); -} -ENDARCDATA - -ARCDATA -A_FSB<21>_CLK_FSB_setup: -CONSTRAINT(scalar) { - VALUES("19.6"); -} -ENDARCDATA - -ARCDATA -A_FSB<22>_CLK_FSB_setup: -CONSTRAINT(scalar) { - VALUES("19.6"); -} -ENDARCDATA - -ARCDATA -A_FSB<23>_CLK_FSB_setup: -CONSTRAINT(scalar) { - VALUES("19.6"); -} -ENDARCDATA - -ARCDATA -A_FSB<8>_CLK_FSB_setup: -CONSTRAINT(scalar) { - VALUES("10.9"); -} -ENDARCDATA - -ARCDATA -A_FSB<9>_CLK_FSB_setup: -CONSTRAINT(scalar) { - VALUES("10.9"); -} -ENDARCDATA - -ARCDATA -SW<1>_CLK_FSB_setup: -CONSTRAINT(scalar) { - VALUES("10.9"); -} -ENDARCDATA - -ARCDATA -nAS_FSB_CLK_FSB_setup: -CONSTRAINT(scalar) { - VALUES("18.6"); -} -ENDARCDATA - -ARCDATA -nIPL2_CLK_FSB_setup: -CONSTRAINT(scalar) { - VALUES("9.5"); -} -ENDARCDATA - -ARCDATA -nLDS_FSB_CLK_FSB_setup: -CONSTRAINT(scalar) { - VALUES("9.5"); -} -ENDARCDATA - -ARCDATA -nRES_CLK_FSB_setup: -CONSTRAINT(scalar) { - VALUES("9.5"); -} -ENDARCDATA - -ARCDATA -nUDS_FSB_CLK_FSB_setup: -CONSTRAINT(scalar) { - VALUES("9.5"); -} -ENDARCDATA - -ARCDATA -nWE_FSB_CLK_FSB_setup: -CONSTRAINT(scalar) { - VALUES("10.9"); -} -ENDARCDATA - -ARCDATA -A_FSB<10>_CLK_FSB_hold: -CONSTRAINT(scalar) { - VALUES("-4.4"); -} -ENDARCDATA - -ARCDATA -A_FSB<11>_CLK_FSB_hold: -CONSTRAINT(scalar) { - VALUES("-4.4"); -} -ENDARCDATA - -ARCDATA -A_FSB<12>_CLK_FSB_hold: -CONSTRAINT(scalar) { - VALUES("-4.4"); -} -ENDARCDATA - -ARCDATA -A_FSB<13>_CLK_FSB_hold: -CONSTRAINT(scalar) { - VALUES("-4.4"); -} -ENDARCDATA - -ARCDATA -A_FSB<14>_CLK_FSB_hold: -CONSTRAINT(scalar) { - VALUES("-4.4"); -} -ENDARCDATA - -ARCDATA -A_FSB<15>_CLK_FSB_hold: -CONSTRAINT(scalar) { - VALUES("-4.4"); -} -ENDARCDATA - -ARCDATA -A_FSB<16>_CLK_FSB_hold: -CONSTRAINT(scalar) { - VALUES("-4.4"); -} -ENDARCDATA - -ARCDATA -A_FSB<17>_CLK_FSB_hold: -CONSTRAINT(scalar) { - VALUES("-4.4"); -} -ENDARCDATA - -ARCDATA -A_FSB<18>_CLK_FSB_hold: -CONSTRAINT(scalar) { - VALUES("-4.4"); -} -ENDARCDATA - -ARCDATA -A_FSB<19>_CLK_FSB_hold: -CONSTRAINT(scalar) { - VALUES("-4.4"); -} -ENDARCDATA - -ARCDATA -A_FSB<20>_CLK_FSB_hold: -CONSTRAINT(scalar) { - VALUES("-12.1"); -} -ENDARCDATA - -ARCDATA -A_FSB<21>_CLK_FSB_hold: -CONSTRAINT(scalar) { - VALUES("-13.1"); -} -ENDARCDATA - -ARCDATA -A_FSB<22>_CLK_FSB_hold: -CONSTRAINT(scalar) { - VALUES("-13.1"); -} -ENDARCDATA - -ARCDATA -A_FSB<23>_CLK_FSB_hold: -CONSTRAINT(scalar) { - VALUES("-13.1"); -} -ENDARCDATA - -ARCDATA -A_FSB<8>_CLK_FSB_hold: -CONSTRAINT(scalar) { - VALUES("-4.4"); -} -ENDARCDATA - -ARCDATA -A_FSB<9>_CLK_FSB_hold: -CONSTRAINT(scalar) { - VALUES("-4.4"); -} -ENDARCDATA - -ARCDATA -SW<1>_CLK_FSB_hold: -CONSTRAINT(scalar) { - VALUES("-4.4"); -} -ENDARCDATA - -ARCDATA -nAS_FSB_CLK_FSB_hold: -CONSTRAINT(scalar) { - VALUES("-12.1"); -} -ENDARCDATA - -ARCDATA -nIPL2_CLK_FSB_hold: -CONSTRAINT(scalar) { - VALUES("-3"); -} -ENDARCDATA - -ARCDATA -nLDS_FSB_CLK_FSB_hold: -CONSTRAINT(scalar) { - VALUES("-3"); -} -ENDARCDATA - -ARCDATA -nRES_CLK_FSB_hold: -CONSTRAINT(scalar) { - VALUES("-3"); -} -ENDARCDATA - -ARCDATA -nUDS_FSB_CLK_FSB_hold: -CONSTRAINT(scalar) { - VALUES("-3"); -} -ENDARCDATA - -ARCDATA -nWE_FSB_CLK_FSB_hold: -CONSTRAINT(scalar) { - VALUES("-4.4"); -} -ENDARCDATA - -ARCDATA -CLK_IOB_CLK2X_IOB_setup: -CONSTRAINT(scalar) { - VALUES("10.5"); -} -ENDARCDATA - -ARCDATA -nBERR_IOB_CLK2X_IOB_setup: -CONSTRAINT(scalar) { - VALUES("10.5"); -} -ENDARCDATA - -ARCDATA -nBG_IOB_CLK2X_IOB_setup: -CONSTRAINT(scalar) { - VALUES("9.5"); -} -ENDARCDATA - -ARCDATA -nDTACK_IOB_CLK2X_IOB_setup: -CONSTRAINT(scalar) { - VALUES("9.5"); -} -ENDARCDATA - -ARCDATA -nRES_CLK2X_IOB_setup: -CONSTRAINT(scalar) { - VALUES("9.5"); -} -ENDARCDATA - -ARCDATA -nVPA_IOB_CLK2X_IOB_setup: -CONSTRAINT(scalar) { - VALUES("9.5"); -} -ENDARCDATA - -ARCDATA -CLK_IOB_CLK2X_IOB_hold: -CONSTRAINT(scalar) { - VALUES("-4"); -} -ENDARCDATA - -ARCDATA -nBERR_IOB_CLK2X_IOB_hold: -CONSTRAINT(scalar) { - VALUES("-4"); -} -ENDARCDATA - -ARCDATA -nBG_IOB_CLK2X_IOB_hold: -CONSTRAINT(scalar) { - VALUES("-3"); -} -ENDARCDATA - -ARCDATA -nDTACK_IOB_CLK2X_IOB_hold: -CONSTRAINT(scalar) { - VALUES("-3"); -} -ENDARCDATA - -ARCDATA -nRES_CLK2X_IOB_hold: -CONSTRAINT(scalar) { - VALUES("-3"); -} -ENDARCDATA - -ARCDATA -nVPA_IOB_CLK2X_IOB_hold: -CONSTRAINT(scalar) { - VALUES("-3"); -} -ENDARCDATA - -ENDTIMINGDATA -ENDMODELDATA diff --git a/cpld/XC95144XL/WarpSE.gise b/cpld/XC95144XL/WarpSE.gise index 51a4c06..96bf393 100644 --- a/cpld/XC95144XL/WarpSE.gise +++ b/cpld/XC95144XL/WarpSE.gise @@ -22,18 +22,6 @@ - - - - - - - - - - - - @@ -71,19 +59,18 @@ - + - + - + - @@ -96,11 +83,11 @@ - + - + @@ -109,7 +96,7 @@ - + @@ -127,18 +114,12 @@ - + - - - - - - - + diff --git a/cpld/XC95144XL/WarpSE.gyd b/cpld/XC95144XL/WarpSE.gyd index 8d88775..1d69184 100644 --- a/cpld/XC95144XL/WarpSE.gyd +++ b/cpld/XC95144XL/WarpSE.gyd @@ -38,9 +38,9 @@ nVPA_IOB S:PIN77 nWE_FSB S:PIN29 RA<11> S:PIN63 RA<10> S:PIN55 -nRES S:PIN91 C25MEN S:PIN58 C20MEN S:PIN59 +nRES S:PIN91 RA<0> S:PIN53 RA<1> S:PIN50 RA<2> S:PIN43 @@ -51,68 +51,68 @@ RA<6> S:PIN46 RA<7> S:PIN52 RA<8> S:PIN54 RA<9> S:PIN56 -nBR_IOB S:PIN72 -nDTACK_FSB S:PIN28 -nAS_IOB S:PIN81 -nDinLE S:PIN86 -nLDS_IOB S:PIN79 -nUDS_IOB S:PIN80 -nVMA_IOB S:PIN74 -nBERR_FSB S:PIN70 nADoutLE0 S:PIN85 nADoutLE1 S:PIN82 +nAS_IOB S:PIN81 nAoutOE S:PIN87 +nBERR_FSB S:PIN70 +nBR_IOB S:PIN72 +nCAS S:PIN36 +nDTACK_FSB S:PIN28 +nDinLE S:PIN86 nDinOE S:PIN90 nDoutOE S:PIN89 +nLDS_IOB S:PIN79 nOE S:PIN37 nRAMLWE S:PIN65 nRAMUWE S:PIN66 nRAS S:PIN64 nROMCS S:PIN35 nROMWE S:PIN34 +nUDS_IOB S:PIN80 +nVMA_IOB S:PIN74 nVPA_FSB S:PIN93 -nCAS S:PIN36 ;The remaining section of the .gyd file is for documentation purposes only. ;It shows where your internal equations were placed in the last successful fit. -PARTITION FB1_1 ram/RegUrgentSync ram/RefUrgent ram/RefReqSync ram/RefReq - ram/RefRAS iobs/IOACTr fsb/ASrf iobs/IOU1 - iobs/IOL1 cnt/TimerTC iobs/IOU0 iobs/IOL0 - cnt/Timer<3> cnt/Timer<2> cnt/Timer<1> cnt/RefUrgent - iobs/IOReady cnt/RefReq -PARTITION FB2_9 iobm/VPArr iobm/VPArf iobm/RESrr iobm/RESrf - iobm/IOREQr iobm/Er2 iobm/Er iobm/DTACKrr - iobm/DTACKrf cnt/Timer<0> -PARTITION FB3_1 fsb/VPA EXP14_ EXP15_ -PARTITION FB3_5 EXP16_ EXP17_ iobs/IOREQ EXP18_ - fsb/nDTACK fsb/Ready1r EXP19_ iobs/IORW1 - EXP20_ EXP21_ iobs/IORW0 EXP22_ - nROMWE_OBUF EXP23_ -PARTITION FB4_1 EXP24_ nAoutOE_OBUF iobm/BERRrr iobm/BERRrf - nDoutOE_OBUF nDinOE_OBUF cnt/PORS_FSM_FFd1 N0 - cnt/IPL2r iobm/IOS_FSM_FFd1 nVPA_FSB_OBUF cnt/nRESout - cnt/PORS_FSM_FFd2 cnt/LTimer<0> cnt/LTimer<3> cnt/LTimer<2> - cnt/LTimer<1> iobm/IOBERR -PARTITION FB5_1 ram/RASEL nROMCS_OBUF ram/RefDone cs/nOverlay1 - ram/nCAS nOE_OBUF fsb/Ready0r cs/nOverlay0 - RA_4_OBUF ram/RAMEN RA_3_OBUF RA_5_OBUF - ram/RS_FSM_FFd2 RA_2_OBUF RA_6_OBUF EXP25_ - ram/RAMReady EXP26_ -PARTITION FB6_1 iobm/ETACK iobm/nVMA iobm/DoutOE iobm/ALE0 - iobm/IOS_FSM_FFd3 iobm/ES<3> iobm/ES<1> iobm/ES<0> - iobm/nLDS iobm/ES<4> iobm/nUDS iobm/nASout - iobm/IOS_FSM_FFd2 nADoutLE1_OBUF nADoutLE0_OBUF iobm/ES<2> - iobm/nDinLE iobm/IOACT -PARTITION FB7_1 cnt/LTimer<13> RA_1_OBUF cnt/LTimer<9> cnt/LTimer<8> +PARTITION FB1_1 ram/RefUrg ram/RefReqSync ram/RefReq iobs/IOACTr + iobm/Er iobm/DTACKrr iobm/DTACKrf iobm/BERRrr + iobm/BERRrf cnt/nIPL2r cnt/Er<0> ALE0S + ram/RS_FSM_FFd1 iobs/IOU1 iobs/IOL1 iobm/IOS_FSM_FFd1 + ALE0M ram/RefDone +PARTITION FB2_13 iobm/VPArr iobm/VPArf iobm/RESrr iobm/RESrf + iobm/IOREQr iobm/Er2 +PARTITION FB3_1 IORW0 EXP10_ EXP11_ EXP12_ + EXP13_ fsb/VPA EXP14_ EXP15_ + nDTACK_FSB_OBUF EXP16_ iobs/IORW1 EXP17_ + fsb/Ready1r cs/nOverlay EXP18_ IOREQ + nROMWE_OBUF iobs/Clear1 +PARTITION FB4_1 ram/RegUrgSync nAoutOE_OBUF ram/BACTr nRESout + nDoutOE_OBUF nDinOE_OBUF fsb/ASrf N0 + cnt/Er<1> cnt/TimerTC nVPA_FSB_OBUF cnt/LTimer<3> + cnt/LTimer<2> cnt/LTimer<1> RefReq IOU0 + IOL0 RefUrg +PARTITION FB5_1 EXP19_ nROMCS_OBUF iobs/Load1 EXP20_ + nCAS_OBUF nOE_OBUF iobs/PS_FSM_FFd2 ram/RS_FSM_FFd2 + RA_4_OBUF iobs/PS_FSM_FFd1 RA_3_OBUF RA_5_OBUF + +PARTITION FB5_14 RA_2_OBUF RA_6_OBUF iobs/IOReady iobs/Once + EXP21_ +PARTITION FB6_1 iobm/ETACK nVMA_IOBout iobm/IOS_FSM_FFd3 iobm/ES<3> + iobm/ES<1> iobm/ES<0> iobm/DoutOE iobm/ES<4> + nLDS_IOBout iobm/IOS_FSM_FFd2 nUDS_IOBout nAS_IOBout + iobm/ES<2> nADoutLE1_OBUF nADoutLE0_OBUF IOACT + nDinLE_OBUF IOBERR +PARTITION FB7_1 cnt/LTimerTC RA_1_OBUF cnt/LTimer<9> cnt/LTimer<8> RA_7_OBUF RA_0_OBUF cnt/LTimer<7> RA_8_OBUF - A_FSB_21_IBUF$BUF0 cnt/LTimer<6> RA_9_OBUF N1 - cnt/LTimer<5> N1$BUF0 cnt/LTimer<4> cnt/LTimer<12> + A_FSB_21_IBUF$BUF0 cnt/LTimer<6> RA_9_OBUF C25MEN_OBUF + cnt/LTimer<5> C25MEN_OBUF$BUF0 cnt/LTimer<4> cnt/LTimer<12> cnt/LTimer<11> cnt/LTimer<10> -PARTITION FB8_1 iobs/Once A_FSB_19_IBUF$BUF0 iobs/Clear1 iobs/ALE0 - nRAS_OBUF nRAMLWE_OBUF iobs/PS_FSM_FFd1 nRAMUWE_OBUF - ram/RS_FSM_FFd1 EXP27_ ram/RS_FSM_FFd3 iobs/nBERR_FSB - EXP28_ iobs/PS_FSM_FFd2 cnt/nBR_IOB iobs/Load1 - ram/BACTr EXP29_ +PARTITION FB8_1 ram/RASEL A_FSB_19_IBUF$BUF0 cnt/Timer<2> cnt/Timer<0> + nRAS_OBUF nRAMLWE_OBUF cnt/INITS_FSM_FFd2 nRAMUWE_OBUF + fsb/Ready0r cnt/Timer<1> ram/RAMReady nBERR_FSB_OBUF + EXP22_ ram/RAMEN nBR_IOB_OBUF ram/RS_FSM_FFd3 + cnt/INITS_FSM_FFd1 cnt/LTimer<0> diff --git a/cpld/XC95144XL/WarpSE.jed b/cpld/XC95144XL/WarpSE.jed index a1b9a1c..2bcac78 100644 --- a/cpld/XC95144XL/WarpSE.jed +++ b/cpld/XC95144XL/WarpSE.jed @@ -1,5 +1,5 @@ Programmer Jedec Bit Map -Date Extracted: Sat Mar 25 00:52:43 2023 +Date Extracted: Sun Mar 26 04:30:28 2023 QF93312* QP100* @@ -90,552 +90,552 @@ N PPMAP 153 95* N PPMAP 155 96* N PPMAP 157 97* N PPMAP 160 99* -L0000000 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000* -L0000064 00000000 00000000 00000100 00000000 00000000 00000000 01111100 00000000* -L0000128 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000* -L0000192 00000000 00000000 00000100 00000000 00000000 00000000 00000000 00000000* -L0000256 00000000 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00000000 00000000* +L0092832 00000000 00000000 00000000 00000000 00000000 00000100 00000000 00000000* +L0092896 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000* +L0092960 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000* +L0093024 000000 000000 000000 000000 000000 000000 001000 000000* +L0093072 000000 000000 000000 000000 000000 000001 000000 000000* +L0093120 000000 000000 000000 000000 000000 000001 000000 000000* +L0093168 000000 000000 000000 000000 000010 000000 000000 000000* +L0093216 000000 000000 000000 000000 000000 000001 000000 000000* +L0093264 000000 000000 000000 000000 000000 000001 000000 000000* +C3D12* +2A70 diff --git a/cpld/XC95144XL/WarpSE.mfd b/cpld/XC95144XL/WarpSE.mfd index 2fe7f52..d03a122 100644 --- a/cpld/XC95144XL/WarpSE.mfd +++ b/cpld/XC95144XL/WarpSE.mfd @@ -1,54 +1,23 @@ MDF Database: version 1.0 MDF_INFO | WarpSE | XC95144XL-10-TQ100 -MACROCELL | 5 | 1 | iobm/nVMA +MACROCELL | 5 | 1 | nVMA_IOBout ATTRIBUTES | 4622082 | 0 OUTPUTMC | 2 | 5 | 1 | 5 | 0 -INPUTS | 10 | nVMA_IOB | iobm/ES<0> | iobm/ES<1> | iobm/ES<2> | iobm/ES<3> | iobm/ES<4> | iobm/IOACT | iobm/VPArf | iobm/VPArr | nAoutOE -INPUTMC | 10 | 5 | 1 | 5 | 7 | 5 | 6 | 5 | 15 | 5 | 5 | 5 | 9 | 5 | 17 | 1 | 9 | 1 | 8 | 3 | 1 -EQ | 7 | +INPUTS | 10 | nVMA_IOB | iobm/ES<0> | iobm/ES<1> | iobm/ES<2> | iobm/ES<3> | iobm/ES<4> | IOACT | iobm/VPArf | iobm/VPArr | nAoutOE +INPUTMC | 10 | 5 | 1 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 15 | 1 | 13 | 1 | 12 | 3 | 1 +EQ | 6 | nVMA_IOB.T = !nVMA_IOB & !iobm/ES<0> & !iobm/ES<1> & !iobm/ES<2> & !iobm/ES<3> & !iobm/ES<4> # nVMA_IOB & iobm/ES<0> & iobm/ES<1> & iobm/ES<2> & - !iobm/ES<3> & !iobm/ES<4> & iobm/IOACT & iobm/VPArf & - iobm/VPArr; + !iobm/ES<3> & !iobm/ES<4> & IOACT & iobm/VPArf & iobm/VPArr; nVMA_IOB.CLK = C16M; // GCK nVMA_IOB.OE = !nAoutOE; GLOBALS | 1 | 2 | C16M -MACROCELL | 5 | 8 | iobm/nLDS -ATTRIBUTES | 8685314 | 0 -INPUTS | 6 | iobs/IOL0 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd1 | iobs/IORW0 | nAoutOE -INPUTMC | 6 | 0 | 11 | 5 | 4 | 5 | 12 | 3 | 9 | 2 | 14 | 3 | 1 -EQ | 8 | - !nLDS_IOB.D = iobs/IOL0 & !iobm/IOS_FSM_FFd3 & - iobm/IOS_FSM_FFd2 - # iobs/IOL0 & iobm/IOS_FSM_FFd1 & - iobm/IOS_FSM_FFd2 - # !iobs/IORW0 & iobs/IOL0 & iobm/IOS_FSM_FFd3 & - !iobm/IOS_FSM_FFd1; - !nLDS_IOB.CLK = C16M; // GCK - nLDS_IOB.OE = !nAoutOE; -GLOBALS | 1 | 2 | C16M - -MACROCELL | 5 | 10 | iobm/nUDS -ATTRIBUTES | 8685314 | 0 -INPUTS | 6 | iobs/IOU0 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd1 | iobs/IORW0 | nAoutOE -INPUTMC | 6 | 0 | 10 | 5 | 4 | 5 | 12 | 3 | 9 | 2 | 14 | 3 | 1 -EQ | 8 | - !nUDS_IOB.D = iobs/IOU0 & !iobm/IOS_FSM_FFd3 & - iobm/IOS_FSM_FFd2 - # iobs/IOU0 & iobm/IOS_FSM_FFd1 & - iobm/IOS_FSM_FFd2 - # !iobs/IORW0 & iobs/IOU0 & iobm/IOS_FSM_FFd3 & - !iobm/IOS_FSM_FFd1; - !nUDS_IOB.CLK = C16M; // GCK - nUDS_IOB.OE = !nAoutOE; -GLOBALS | 1 | 2 | C16M - -MACROCELL | 5 | 11 | iobm/nASout +MACROCELL | 5 | 11 | nAS_IOBout ATTRIBUTES | 8685314 | 0 INPUTS | 4 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd3 | nAoutOE -INPUTMC | 4 | 3 | 9 | 5 | 12 | 5 | 4 | 3 | 1 +INPUTMC | 4 | 0 | 15 | 5 | 9 | 5 | 2 | 3 | 1 EQ | 4 | nAS_IOB.D = !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd2 # iobm/IOS_FSM_FFd1 & !iobm/IOS_FSM_FFd2; @@ -56,100 +25,39 @@ EQ | 4 | nAS_IOB.OE = !nAoutOE; GLOBALS | 1 | 2 | C16M -MACROCELL | 3 | 13 | cnt/LTimer<0> -ATTRIBUTES | 4358976 | 0 -OUTPUTMC | 14 | 3 | 13 | 6 | 0 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 -INPUTS | 3 | cnt/LTimer<0> | cnt/LTimer<13> | cnt/TimerTC -INPUTMC | 3 | 3 | 13 | 6 | 0 | 0 | 9 -EQ | 3 | - !cnt/LTimer<0>.T = !cnt/LTimer<0> & cnt/LTimer<13> & cnt/TimerTC; - !cnt/LTimer<0>.CLK = C8M; // GCK - cnt/LTimer<0>.CE = cnt/TimerTC; -GLOBALS | 1 | 2 | C8M +MACROCELL | 5 | 8 | nLDS_IOBout +ATTRIBUTES | 8685314 | 0 +INPUTS | 6 | IOL0 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd1 | IORW0 | nAoutOE +INPUTMC | 6 | 3 | 16 | 5 | 2 | 5 | 9 | 0 | 15 | 2 | 0 | 3 | 1 +EQ | 6 | + !nLDS_IOB.D = IOL0 & !iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd2 + # IOL0 & iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 + # IORW0 & IOL0 & iobm/IOS_FSM_FFd3 & + !iobm/IOS_FSM_FFd1; + !nLDS_IOB.CLK = C16M; // GCK + nLDS_IOB.OE = !nAoutOE; +GLOBALS | 1 | 2 | C16M -MACROCELL | 6 | 0 | cnt/LTimer<13> -ATTRIBUTES | 4358976 | 0 -OUTPUTMC | 17 | 3 | 13 | 6 | 0 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 | 3 | 6 | 3 | 12 | 3 | 11 -INPUTS | 15 | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/LTimer<5> | cnt/LTimer<4> | cnt/LTimer<6> | cnt/LTimer<7> | cnt/LTimer<9> | cnt/LTimer<10> | cnt/LTimer<11> | cnt/LTimer<8> | cnt/LTimer<12> | cnt/LTimer<13> | cnt/TimerTC -INPUTMC | 15 | 3 | 13 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 | 6 | 0 | 0 | 9 -EQ | 7 | - cnt/LTimer<13>.T = cnt/LTimer<13> & cnt/TimerTC - # cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> & - cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> & cnt/LTimer<6> & - cnt/LTimer<7> & cnt/LTimer<9> & cnt/LTimer<10> & cnt/LTimer<11> & - cnt/LTimer<8> & cnt/LTimer<12>; - !cnt/LTimer<13>.CLK = C8M; // GCK - cnt/LTimer<13>.CE = cnt/TimerTC; -GLOBALS | 1 | 2 | C8M +MACROCELL | 5 | 10 | nUDS_IOBout +ATTRIBUTES | 8685314 | 0 +INPUTS | 6 | IOU0 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd1 | IORW0 | nAoutOE +INPUTMC | 6 | 3 | 15 | 5 | 2 | 5 | 9 | 0 | 15 | 2 | 0 | 3 | 1 +EQ | 6 | + !nUDS_IOB.D = IOU0 & !iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd2 + # IOU0 & iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 + # IORW0 & IOU0 & iobm/IOS_FSM_FFd3 & + !iobm/IOS_FSM_FFd1; + !nUDS_IOB.CLK = C16M; // GCK + nUDS_IOB.OE = !nAoutOE; +GLOBALS | 1 | 2 | C16M -MACROCELL | 3 | 16 | cnt/LTimer<1> -ATTRIBUTES | 8553280 | 0 -OUTPUTMC | 14 | 6 | 0 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 | 3 | 17 -INPUTS | 12 | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<13> | cnt/TimerTC | C8M | nBERR_IOB | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | iobm/IOBERR | iobm/RESrf | iobm/RESrr -INPUTMC | 10 | 3 | 13 | 3 | 16 | 6 | 0 | 0 | 9 | 5 | 4 | 3 | 9 | 5 | 12 | 3 | 17 | 1 | 11 | 1 | 10 -INPUTP | 2 | 35 | 123 -EXPORTS | 1 | 3 | 17 -EQ | 8 | - !cnt/LTimer<1>.D = cnt/LTimer<0> & cnt/LTimer<1> - # !cnt/LTimer<0> & !cnt/LTimer<1> - # cnt/LTimer<13> & cnt/TimerTC; - !cnt/LTimer<1>.CLK = C8M; // GCK - cnt/LTimer<1>.CE = cnt/TimerTC; - cnt/LTimer<1>.EXP = C8M & nBERR_IOB & iobm/IOS_FSM_FFd3 & - iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & iobm/IOBERR & iobm/RESrf & - iobm/RESrr -GLOBALS | 1 | 2 | C8M - -MACROCELL | 3 | 15 | cnt/LTimer<2> -ATTRIBUTES | 4358976 | 0 -OUTPUTMC | 12 | 6 | 0 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 -INPUTS | 5 | cnt/LTimer<0> | cnt/LTimer<13> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/TimerTC -INPUTMC | 5 | 3 | 13 | 6 | 0 | 3 | 16 | 3 | 15 | 0 | 9 -EQ | 5 | - cnt/LTimer<2>.T = cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> - # cnt/LTimer<0> & cnt/LTimer<1> & !cnt/TimerTC - # cnt/LTimer<13> & cnt/LTimer<2> & cnt/TimerTC; - !cnt/LTimer<2>.CLK = C8M; // GCK - cnt/LTimer<2>.CE = cnt/TimerTC; -GLOBALS | 1 | 2 | C8M - -MACROCELL | 3 | 14 | cnt/LTimer<3> -ATTRIBUTES | 4358976 | 0 -OUTPUTMC | 11 | 6 | 0 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 -INPUTS | 6 | cnt/LTimer<13> | cnt/LTimer<3> | cnt/TimerTC | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> -INPUTMC | 6 | 6 | 0 | 3 | 14 | 0 | 9 | 3 | 13 | 3 | 16 | 3 | 15 -EQ | 7 | - cnt/LTimer<3>.T = cnt/LTimer<13> & cnt/LTimer<3> & cnt/TimerTC - # cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> & - cnt/LTimer<2> - # cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> & - !cnt/TimerTC; - !cnt/LTimer<3>.CLK = C8M; // GCK - cnt/LTimer<3>.CE = cnt/TimerTC; -GLOBALS | 1 | 2 | C8M - -MACROCELL | 6 | 12 | cnt/LTimer<5> -ATTRIBUTES | 4358976 | 0 -OUTPUTMC | 9 | 6 | 0 | 6 | 12 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 -INPUTS | 8 | cnt/LTimer<13> | cnt/LTimer<5> | cnt/TimerTC | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/LTimer<4> -INPUTMC | 8 | 6 | 0 | 6 | 12 | 0 | 9 | 3 | 13 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 14 -EQ | 7 | - cnt/LTimer<5>.T = cnt/LTimer<13> & cnt/LTimer<5> & cnt/TimerTC - # cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> & - cnt/LTimer<2> & cnt/LTimer<3> & cnt/LTimer<4> - # cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> & - cnt/LTimer<3> & cnt/LTimer<4> & !cnt/TimerTC; - !cnt/LTimer<5>.CLK = C8M; // GCK - cnt/LTimer<5>.CE = cnt/TimerTC; -GLOBALS | 1 | 2 | C8M - -MACROCELL | 7 | 0 | iobs/Once +MACROCELL | 4 | 16 | iobs/Once ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 16 | 7 | 0 | 2 | 14 | 2 | 11 | 0 | 16 | 7 | 10 | 7 | 13 | 7 | 15 | 2 | 5 | 2 | 4 | 2 | 13 | 2 | 15 | 2 | 16 | 7 | 1 | 7 | 11 | 7 | 12 | 7 | 17 -INPUTS | 11 | iobs/Once | nAS_FSB | fsb/ASrf | A_FSB<23> | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB_19_IBUF$BUF0.EXP | EXP29_.EXP -INPUTMC | 6 | 7 | 0 | 0 | 6 | 7 | 13 | 7 | 6 | 7 | 1 | 7 | 17 +OUTPUTMC | 17 | 4 | 16 | 2 | 0 | 2 | 10 | 4 | 14 | 7 | 11 | 4 | 6 | 4 | 2 | 2 | 15 | 2 | 1 | 2 | 2 | 2 | 14 | 2 | 16 | 2 | 17 | 4 | 5 | 4 | 7 | 4 | 15 | 4 | 17 +INPUTS | 11 | iobs/Once | nAS_FSB | fsb/ASrf | A_FSB<23> | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | A_FSB<22> | A_FSB<21> | A_FSB<20> | iobs/IOReady.EXP | EXP21_.EXP +INPUTMC | 6 | 4 | 16 | 3 | 6 | 4 | 6 | 4 | 9 | 4 | 15 | 4 | 17 INPUTP | 5 | 54 | 36 | 30 | 29 | 28 -IMPORTS | 2 | 7 | 1 | 7 | 17 +IMPORTS | 2 | 4 | 15 | 4 | 17 EQ | 40 | iobs/Once.T = iobs/Once & nAS_FSB & !fsb/ASrf # A_FSB<23> & !iobs/Once & !nAS_FSB & @@ -160,324 +68,474 @@ EQ | 40 | !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 # A_FSB<22> & A_FSB<20> & !iobs/Once & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 -;Imported pterms FB8_2 - # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf - # A_FSB<14> & !A_FSB<23> & !A_FSB<22> & A_FSB<21> & - A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & - !nWE_FSB & !iobs/Once & cs/nOverlay1 & !nAS_FSB & nADoutLE1 - # A_FSB<14> & !A_FSB<23> & !A_FSB<22> & A_FSB<21> & - A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & - !nWE_FSB & !iobs/Once & cs/nOverlay1 & fsb/ASrf & nADoutLE1 - # A_FSB<13> & !A_FSB<23> & !A_FSB<22> & A_FSB<21> & - A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & - !nWE_FSB & !iobs/Once & cs/nOverlay1 & !nAS_FSB & nADoutLE1 - # A_FSB<13> & !A_FSB<23> & !A_FSB<22> & A_FSB<21> & - A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & - !nWE_FSB & !iobs/Once & cs/nOverlay1 & fsb/ASrf & nADoutLE1 -;Imported pterms FB8_18 +;Imported pterms FB5_16 # A_FSB<22> & A_FSB<21> & !iobs/Once & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf # A_FSB<22> & A_FSB<20> & !iobs/Once & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1; + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 +;Imported pterms FB5_18 + # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf + # A_FSB<14> & !A_FSB<23> & !A_FSB<22> & A_FSB<21> & + A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & + !iobs/Once & cs/nOverlay & !nWE_FSB & !nAS_FSB & nADoutLE1 + # A_FSB<14> & !A_FSB<23> & !A_FSB<22> & A_FSB<21> & + A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & + !iobs/Once & cs/nOverlay & !nWE_FSB & fsb/ASrf & nADoutLE1 + # A_FSB<13> & !A_FSB<23> & !A_FSB<22> & A_FSB<21> & + A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & + !iobs/Once & cs/nOverlay & !nWE_FSB & !nAS_FSB & nADoutLE1 + # A_FSB<13> & !A_FSB<23> & !A_FSB<22> & A_FSB<21> & + A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & + !iobs/Once & cs/nOverlay & !nWE_FSB & fsb/ASrf & nADoutLE1; iobs/Once.CLK = FCLK; // GCK GLOBALS | 1 | 2 | FCLK -MACROCELL | 6 | 14 | cnt/LTimer<4> +MACROCELL | 3 | 17 | RefUrg ATTRIBUTES | 4358976 | 0 -OUTPUTMC | 10 | 6 | 0 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 -INPUTS | 7 | cnt/LTimer<13> | cnt/LTimer<4> | cnt/TimerTC | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> -INPUTMC | 7 | 6 | 0 | 6 | 14 | 0 | 9 | 3 | 13 | 3 | 16 | 3 | 15 | 3 | 14 -EQ | 7 | - cnt/LTimer<4>.T = cnt/LTimer<13> & cnt/LTimer<4> & cnt/TimerTC - # cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> & - cnt/LTimer<2> & cnt/LTimer<3> - # cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> & - cnt/LTimer<3> & !cnt/TimerTC; - !cnt/LTimer<4>.CLK = C8M; // GCK - cnt/LTimer<4>.CE = cnt/TimerTC; -GLOBALS | 1 | 2 | C8M - -MACROCELL | 6 | 9 | cnt/LTimer<6> -ATTRIBUTES | 4358976 | 0 -OUTPUTMC | 8 | 6 | 0 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 -INPUTS | 9 | cnt/LTimer<13> | cnt/LTimer<6> | cnt/TimerTC | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/LTimer<5> | cnt/LTimer<4> -INPUTMC | 9 | 6 | 0 | 6 | 9 | 0 | 9 | 3 | 13 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14 -EQ | 7 | - cnt/LTimer<6>.T = cnt/LTimer<13> & cnt/LTimer<6> & cnt/TimerTC - # cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> & - cnt/LTimer<2> & cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> - # cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> & - cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> & !cnt/TimerTC; - !cnt/LTimer<6>.CLK = C8M; // GCK - cnt/LTimer<6>.CE = cnt/TimerTC; -GLOBALS | 1 | 2 | C8M - -MACROCELL | 6 | 6 | cnt/LTimer<7> -ATTRIBUTES | 4358976 | 0 -OUTPUTMC | 8 | 6 | 0 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 | 6 | 7 -INPUTS | 15 | cnt/LTimer<13> | cnt/LTimer<7> | cnt/TimerTC | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/LTimer<5> | cnt/LTimer<4> | cnt/LTimer<6> | A_FSB<9> | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | ram/RASEL -INPUTMC | 12 | 6 | 0 | 6 | 6 | 0 | 9 | 3 | 13 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 4 | 3 | 4 | 0 -INPUTP | 3 | 12 | 36 | 30 -EXPORTS | 1 | 6 | 7 -EQ | 11 | - cnt/LTimer<7>.T = cnt/LTimer<13> & cnt/LTimer<7> & cnt/TimerTC - # cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> & - cnt/LTimer<2> & cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> & - cnt/LTimer<6> - # cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> & - cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> & cnt/LTimer<6> & - !cnt/TimerTC; - !cnt/LTimer<7>.CLK = C8M; // GCK - cnt/LTimer<7>.CE = cnt/TimerTC; - cnt/LTimer<7>.EXP = A_FSB<9> & !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - ram/RASEL -GLOBALS | 1 | 2 | C8M - -MACROCELL | 6 | 2 | cnt/LTimer<9> -ATTRIBUTES | 4358976 | 0 -OUTPUTMC | 5 | 6 | 0 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 15 -INPUTS | 12 | cnt/LTimer<13> | cnt/LTimer<9> | cnt/TimerTC | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/LTimer<5> | cnt/LTimer<4> | cnt/LTimer<6> | cnt/LTimer<7> | cnt/LTimer<8> -INPUTMC | 12 | 6 | 0 | 6 | 2 | 0 | 9 | 3 | 13 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 3 +OUTPUTMC | 4 | 3 | 17 | 3 | 9 | 3 | 14 | 3 | 0 +INPUTS | 7 | cnt/Timer<0> | cnt/Timer<1> | cnt/Timer<2> | cnt/Er<0> | cnt/Er<1> | RefUrg | cnt/TimerTC +INPUTMC | 7 | 7 | 3 | 7 | 9 | 7 | 2 | 0 | 10 | 3 | 8 | 3 | 17 | 3 | 9 EQ | 9 | - cnt/LTimer<9>.T = cnt/LTimer<13> & cnt/LTimer<9> & cnt/TimerTC - # cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> & - cnt/LTimer<2> & cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> & - cnt/LTimer<6> & cnt/LTimer<7> & cnt/LTimer<8> - # cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> & - cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> & cnt/LTimer<6> & - cnt/LTimer<7> & cnt/LTimer<8> & !cnt/TimerTC; - !cnt/LTimer<9>.CLK = C8M; // GCK - cnt/LTimer<9>.CE = cnt/TimerTC; -GLOBALS | 1 | 2 | C8M + RefUrg.T = RefUrg & cnt/TimerTC & !cnt/Er<0> & cnt/Er<1> + # cnt/Timer<0> & cnt/Timer<1> & cnt/Timer<2> & + !cnt/TimerTC + # cnt/Timer<0> & cnt/Timer<1> & cnt/Timer<2> & + cnt/Er<0> + # cnt/Timer<0> & cnt/Timer<1> & cnt/Timer<2> & + !cnt/Er<1>; + RefUrg.CLK = FCLK; // GCK + RefUrg.CE = !cnt/Er<0> & cnt/Er<1>; +GLOBALS | 1 | 2 | FCLK -MACROCELL | 4 | 3 | cs/nOverlay1 +MACROCELL | 7 | 17 | cnt/LTimer<0> +ATTRIBUTES | 4358976 | 0 +OUTPUTMC | 14 | 6 | 17 | 6 | 16 | 3 | 13 | 3 | 12 | 3 | 11 | 6 | 14 | 6 | 12 | 6 | 9 | 6 | 6 | 6 | 3 | 6 | 2 | 6 | 15 | 6 | 0 | 7 | 0 +INPUTS | 11 | cnt/TimerTC | cnt/Er<0> | cnt/Er<1> | A_FSB<23> | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | ram/RefUrg | ram/BACTr | A_FSB<22> | cs/nOverlay | ram/RefReq +INPUTMC | 9 | 3 | 9 | 0 | 10 | 3 | 8 | 4 | 7 | 7 | 15 | 0 | 0 | 3 | 2 | 2 | 13 | 0 | 2 +INPUTP | 2 | 36 | 30 +EXPORTS | 1 | 7 | 0 +EQ | 11 | + cnt/LTimer<0>.T = Vcc; + cnt/LTimer<0>.CLK = FCLK; // GCK + cnt/LTimer<0>.CE = cnt/TimerTC & !cnt/Er<0> & cnt/Er<1>; + cnt/LTimer<0>.EXP = A_FSB<23> & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + !ram/RefUrg & ram/BACTr + # A_FSB<22> & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + !ram/RefUrg & ram/BACTr + # !cs/nOverlay & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + !ram/RefUrg & ram/BACTr + # !cs/nOverlay & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + !ram/RefUrg & !ram/RefReq +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 7 | 3 | cnt/Timer<0> +ATTRIBUTES | 4358976 | 0 +OUTPUTMC | 6 | 3 | 17 | 7 | 3 | 7 | 9 | 7 | 2 | 3 | 9 | 7 | 8 +INPUTS | 6 | cnt/Timer<0> | cnt/TimerTC | cnt/Er<0> | cnt/Er<1> | cnt/Timer<1> | cnt/Timer<2> +INPUTMC | 6 | 7 | 3 | 3 | 9 | 0 | 10 | 3 | 8 | 7 | 9 | 7 | 2 +EXPORTS | 1 | 7 | 2 +EQ | 5 | + !cnt/Timer<0>.T = !cnt/Timer<0> & cnt/TimerTC & !cnt/Er<0> & + cnt/Er<1>; + cnt/Timer<0>.CLK = FCLK; // GCK + cnt/Timer<0>.CE = !cnt/Er<0> & cnt/Er<1>; + cnt/Timer<0>.EXP = cnt/Timer<0> & cnt/Timer<1> & cnt/Timer<2> +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 7 | 9 | cnt/Timer<1> ATTRIBUTES | 8553280 | 0 -OUTPUTMC | 27 | 6 | 8 | 2 | 1 | 4 | 6 | 2 | 7 | 2 | 16 | 2 | 10 | 2 | 8 | 2 | 17 | 7 | 7 | 4 | 11 | 7 | 11 | 7 | 10 | 4 | 8 | 7 | 14 | 2 | 4 | 4 | 15 | 6 | 7 | 7 | 4 | 2 | 15 | 4 | 1 | 4 | 2 | 4 | 14 | 4 | 16 | 4 | 17 | 6 | 6 | 7 | 1 | 7 | 17 -INPUTS | 3 | cs/nOverlay0 | nAS_FSB | fsb/ASrf -INPUTMC | 2 | 4 | 7 | 0 | 6 -INPUTP | 1 | 54 -EQ | 3 | - cs/nOverlay1.D = cs/nOverlay0; - cs/nOverlay1.CLK = FCLK; // GCK - cs/nOverlay1.CE = nAS_FSB & !fsb/ASrf; +OUTPUTMC | 8 | 3 | 17 | 7 | 9 | 7 | 2 | 3 | 9 | 3 | 14 | 7 | 3 | 7 | 8 | 7 | 10 +INPUTS | 13 | cnt/Timer<0> | cnt/Timer<1> | A_FSB<23> | cnt/Er<0> | cnt/Er<1> | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | ram/RefUrg | ram/RefReq | A_FSB<22> | ram/BACTr | fsb/Ready0r.EXP +INPUTMC | 11 | 7 | 3 | 7 | 9 | 0 | 10 | 3 | 8 | 0 | 12 | 4 | 7 | 7 | 15 | 0 | 0 | 0 | 2 | 3 | 2 | 7 | 8 +INPUTP | 2 | 36 | 30 +EXPORTS | 1 | 7 | 10 +IMPORTS | 1 | 7 | 8 +EQ | 12 | + !cnt/Timer<1>.D = cnt/Timer<0> & cnt/Timer<1> +;Imported pterms FB8_9 + # !cnt/Timer<0> & !cnt/Timer<1> + # cnt/TimerTC & !cnt/Er<0> & cnt/Er<1>; + cnt/Timer<1>.CLK = FCLK; // GCK + cnt/Timer<1>.CE = !cnt/Er<0> & cnt/Er<1>; + cnt/Timer<1>.EXP = A_FSB<23> & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & !ram/RefReq + # A_FSB<22> & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & ram/BACTr + # A_FSB<22> & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & !ram/RefReq +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 7 | 2 | cnt/Timer<2> +ATTRIBUTES | 8553280 | 0 +OUTPUTMC | 6 | 3 | 17 | 7 | 2 | 3 | 9 | 3 | 14 | 7 | 3 | 7 | 1 +INPUTS | 8 | cnt/Timer<0> | cnt/Timer<2> | cnt/Timer<1> | cnt/TimerTC | cnt/Er<0> | cnt/Er<1> | A_FSB<19> | cnt/Timer<0>.EXP +INPUTMC | 7 | 7 | 3 | 7 | 2 | 7 | 9 | 3 | 9 | 0 | 10 | 3 | 8 | 7 | 3 +INPUTP | 1 | 26 +EXPORTS | 1 | 7 | 1 +IMPORTS | 1 | 7 | 3 +EQ | 8 | + !cnt/Timer<2>.D = !cnt/Timer<0> & !cnt/Timer<2> + # !cnt/Timer<1> & !cnt/Timer<2> + # cnt/TimerTC & !cnt/Er<0> & cnt/Er<1> +;Imported pterms FB8_4 + # cnt/Timer<0> & cnt/Timer<1> & cnt/Timer<2>; + cnt/Timer<2>.CLK = FCLK; // GCK + cnt/Timer<2>.CE = !cnt/Er<0> & cnt/Er<1>; + cnt/Timer<2>.EXP = A_FSB<19> GLOBALS | 1 | 2 | FCLK MACROCELL | 6 | 17 | cnt/LTimer<10> ATTRIBUTES | 4358976 | 0 -OUTPUTMC | 4 | 6 | 0 | 6 | 17 | 6 | 16 | 6 | 15 -INPUTS | 13 | cnt/LTimer<13> | cnt/LTimer<10> | cnt/TimerTC | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/LTimer<5> | cnt/LTimer<4> | cnt/LTimer<6> | cnt/LTimer<7> | cnt/LTimer<9> | cnt/LTimer<8> -INPUTMC | 13 | 6 | 0 | 6 | 17 | 0 | 9 | 3 | 13 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 3 -EQ | 9 | - cnt/LTimer<10>.T = cnt/LTimer<13> & cnt/LTimer<10> & cnt/TimerTC - # cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> & - cnt/LTimer<2> & cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> & - cnt/LTimer<6> & cnt/LTimer<7> & cnt/LTimer<9> & cnt/LTimer<8> - # cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> & - cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> & cnt/LTimer<6> & - cnt/LTimer<7> & cnt/LTimer<9> & cnt/LTimer<8> & !cnt/TimerTC; - !cnt/LTimer<10>.CLK = C8M; // GCK - cnt/LTimer<10>.CE = cnt/TimerTC; -GLOBALS | 1 | 2 | C8M +OUTPUTMC | 3 | 6 | 16 | 6 | 15 | 6 | 0 +INPUTS | 13 | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/LTimer<4> | cnt/LTimer<5> | cnt/LTimer<6> | cnt/LTimer<7> | cnt/LTimer<8> | cnt/LTimer<9> | cnt/TimerTC | cnt/Er<0> | cnt/Er<1> +INPUTMC | 13 | 7 | 17 | 3 | 13 | 3 | 12 | 3 | 11 | 6 | 14 | 6 | 12 | 6 | 9 | 6 | 6 | 6 | 3 | 6 | 2 | 3 | 9 | 0 | 10 | 3 | 8 +EQ | 5 | + cnt/LTimer<10>.T = cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> & + cnt/LTimer<3> & cnt/LTimer<4> & cnt/LTimer<5> & cnt/LTimer<6> & + cnt/LTimer<7> & cnt/LTimer<8> & cnt/LTimer<9>; + cnt/LTimer<10>.CLK = FCLK; // GCK + cnt/LTimer<10>.CE = cnt/TimerTC & !cnt/Er<0> & cnt/Er<1>; +GLOBALS | 1 | 2 | FCLK MACROCELL | 6 | 16 | cnt/LTimer<11> ATTRIBUTES | 4358976 | 0 -OUTPUTMC | 3 | 6 | 0 | 6 | 16 | 6 | 15 -INPUTS | 14 | cnt/LTimer<13> | cnt/LTimer<11> | cnt/TimerTC | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/LTimer<5> | cnt/LTimer<4> | cnt/LTimer<6> | cnt/LTimer<7> | cnt/LTimer<9> | cnt/LTimer<10> | cnt/LTimer<8> -INPUTMC | 14 | 6 | 0 | 6 | 16 | 0 | 9 | 3 | 13 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 3 -EQ | 11 | - cnt/LTimer<11>.T = cnt/LTimer<13> & cnt/LTimer<11> & cnt/TimerTC - # cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> & - cnt/LTimer<2> & cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> & - cnt/LTimer<6> & cnt/LTimer<7> & cnt/LTimer<9> & cnt/LTimer<10> & - cnt/LTimer<8> - # cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> & - cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> & cnt/LTimer<6> & - cnt/LTimer<7> & cnt/LTimer<9> & cnt/LTimer<10> & cnt/LTimer<8> & - !cnt/TimerTC; - !cnt/LTimer<11>.CLK = C8M; // GCK - cnt/LTimer<11>.CE = cnt/TimerTC; -GLOBALS | 1 | 2 | C8M +OUTPUTMC | 2 | 6 | 15 | 6 | 0 +INPUTS | 14 | cnt/LTimer<0> | cnt/LTimer<10> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/LTimer<4> | cnt/LTimer<5> | cnt/LTimer<6> | cnt/LTimer<7> | cnt/LTimer<8> | cnt/LTimer<9> | cnt/TimerTC | cnt/Er<0> | cnt/Er<1> +INPUTMC | 14 | 7 | 17 | 6 | 17 | 3 | 13 | 3 | 12 | 3 | 11 | 6 | 14 | 6 | 12 | 6 | 9 | 6 | 6 | 6 | 3 | 6 | 2 | 3 | 9 | 0 | 10 | 3 | 8 +EQ | 5 | + cnt/LTimer<11>.T = cnt/LTimer<0> & cnt/LTimer<10> & cnt/LTimer<1> & + cnt/LTimer<2> & cnt/LTimer<3> & cnt/LTimer<4> & cnt/LTimer<5> & + cnt/LTimer<6> & cnt/LTimer<7> & cnt/LTimer<8> & cnt/LTimer<9>; + cnt/LTimer<11>.CLK = FCLK; // GCK + cnt/LTimer<11>.CE = cnt/TimerTC & !cnt/Er<0> & cnt/Er<1>; +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 3 | 13 | cnt/LTimer<1> +ATTRIBUTES | 4358976 | 0 +OUTPUTMC | 12 | 6 | 17 | 6 | 16 | 3 | 12 | 3 | 11 | 6 | 14 | 6 | 12 | 6 | 9 | 6 | 6 | 6 | 3 | 6 | 2 | 6 | 15 | 6 | 0 +INPUTS | 4 | cnt/LTimer<0> | cnt/TimerTC | cnt/Er<0> | cnt/Er<1> +INPUTMC | 4 | 7 | 17 | 3 | 9 | 0 | 10 | 3 | 8 +EQ | 3 | + cnt/LTimer<1>.T = cnt/LTimer<0>; + cnt/LTimer<1>.CLK = FCLK; // GCK + cnt/LTimer<1>.CE = cnt/TimerTC & !cnt/Er<0> & cnt/Er<1>; +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 3 | 12 | cnt/LTimer<2> +ATTRIBUTES | 4358976 | 0 +OUTPUTMC | 11 | 6 | 17 | 6 | 16 | 3 | 11 | 6 | 14 | 6 | 12 | 6 | 9 | 6 | 6 | 6 | 3 | 6 | 2 | 6 | 15 | 6 | 0 +INPUTS | 5 | cnt/LTimer<0> | cnt/LTimer<1> | cnt/TimerTC | cnt/Er<0> | cnt/Er<1> +INPUTMC | 5 | 7 | 17 | 3 | 13 | 3 | 9 | 0 | 10 | 3 | 8 +EQ | 3 | + cnt/LTimer<2>.T = cnt/LTimer<0> & cnt/LTimer<1>; + cnt/LTimer<2>.CLK = FCLK; // GCK + cnt/LTimer<2>.CE = cnt/TimerTC & !cnt/Er<0> & cnt/Er<1>; +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 3 | 11 | cnt/LTimer<3> +ATTRIBUTES | 4358976 | 0 +OUTPUTMC | 10 | 6 | 17 | 6 | 16 | 6 | 14 | 6 | 12 | 6 | 9 | 6 | 6 | 6 | 3 | 6 | 2 | 6 | 15 | 6 | 0 +INPUTS | 6 | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/TimerTC | cnt/Er<0> | cnt/Er<1> +INPUTMC | 6 | 7 | 17 | 3 | 13 | 3 | 12 | 3 | 9 | 0 | 10 | 3 | 8 +EQ | 3 | + cnt/LTimer<3>.T = cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2>; + cnt/LTimer<3>.CLK = FCLK; // GCK + cnt/LTimer<3>.CE = cnt/TimerTC & !cnt/Er<0> & cnt/Er<1>; +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 6 | 14 | cnt/LTimer<4> +ATTRIBUTES | 4358976 | 0 +OUTPUTMC | 9 | 6 | 17 | 6 | 16 | 6 | 12 | 6 | 9 | 6 | 6 | 6 | 3 | 6 | 2 | 6 | 15 | 6 | 0 +INPUTS | 7 | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/TimerTC | cnt/Er<0> | cnt/Er<1> +INPUTMC | 7 | 7 | 17 | 3 | 13 | 3 | 12 | 3 | 11 | 3 | 9 | 0 | 10 | 3 | 8 +EQ | 4 | + cnt/LTimer<4>.T = cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> & + cnt/LTimer<3>; + cnt/LTimer<4>.CLK = FCLK; // GCK + cnt/LTimer<4>.CE = cnt/TimerTC & !cnt/Er<0> & cnt/Er<1>; +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 6 | 12 | cnt/LTimer<5> +ATTRIBUTES | 4358976 | 0 +OUTPUTMC | 8 | 6 | 17 | 6 | 16 | 6 | 9 | 6 | 6 | 6 | 3 | 6 | 2 | 6 | 15 | 6 | 0 +INPUTS | 8 | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/LTimer<4> | cnt/TimerTC | cnt/Er<0> | cnt/Er<1> +INPUTMC | 8 | 7 | 17 | 3 | 13 | 3 | 12 | 3 | 11 | 6 | 14 | 3 | 9 | 0 | 10 | 3 | 8 +EQ | 4 | + cnt/LTimer<5>.T = cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> & + cnt/LTimer<3> & cnt/LTimer<4>; + cnt/LTimer<5>.CLK = FCLK; // GCK + cnt/LTimer<5>.CE = cnt/TimerTC & !cnt/Er<0> & cnt/Er<1>; +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 6 | 9 | cnt/LTimer<6> +ATTRIBUTES | 4358976 | 0 +OUTPUTMC | 7 | 6 | 17 | 6 | 16 | 6 | 6 | 6 | 3 | 6 | 2 | 6 | 15 | 6 | 0 +INPUTS | 9 | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/LTimer<4> | cnt/LTimer<5> | cnt/TimerTC | cnt/Er<0> | cnt/Er<1> +INPUTMC | 9 | 7 | 17 | 3 | 13 | 3 | 12 | 3 | 11 | 6 | 14 | 6 | 12 | 3 | 9 | 0 | 10 | 3 | 8 +EQ | 4 | + cnt/LTimer<6>.T = cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> & + cnt/LTimer<3> & cnt/LTimer<4> & cnt/LTimer<5>; + cnt/LTimer<6>.CLK = FCLK; // GCK + cnt/LTimer<6>.CE = cnt/TimerTC & !cnt/Er<0> & cnt/Er<1>; +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 6 | 6 | cnt/LTimer<7> +ATTRIBUTES | 4358976 | 0 +OUTPUTMC | 6 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 2 | 6 | 15 | 6 | 0 +INPUTS | 10 | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/LTimer<4> | cnt/LTimer<5> | cnt/LTimer<6> | cnt/TimerTC | cnt/Er<0> | cnt/Er<1> +INPUTMC | 10 | 7 | 17 | 3 | 13 | 3 | 12 | 3 | 11 | 6 | 14 | 6 | 12 | 6 | 9 | 3 | 9 | 0 | 10 | 3 | 8 +EQ | 4 | + cnt/LTimer<7>.T = cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> & + cnt/LTimer<3> & cnt/LTimer<4> & cnt/LTimer<5> & cnt/LTimer<6>; + cnt/LTimer<7>.CLK = FCLK; // GCK + cnt/LTimer<7>.CE = cnt/TimerTC & !cnt/Er<0> & cnt/Er<1>; +GLOBALS | 1 | 2 | FCLK MACROCELL | 6 | 3 | cnt/LTimer<8> ATTRIBUTES | 4358976 | 0 -OUTPUTMC | 6 | 6 | 0 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 -INPUTS | 11 | cnt/LTimer<13> | cnt/LTimer<8> | cnt/TimerTC | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/LTimer<5> | cnt/LTimer<4> | cnt/LTimer<6> | cnt/LTimer<7> -INPUTMC | 11 | 6 | 0 | 6 | 3 | 0 | 9 | 3 | 13 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 +OUTPUTMC | 5 | 6 | 17 | 6 | 16 | 6 | 2 | 6 | 15 | 6 | 0 +INPUTS | 11 | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/LTimer<4> | cnt/LTimer<5> | cnt/LTimer<6> | cnt/LTimer<7> | cnt/TimerTC | cnt/Er<0> | cnt/Er<1> +INPUTMC | 11 | 7 | 17 | 3 | 13 | 3 | 12 | 3 | 11 | 6 | 14 | 6 | 12 | 6 | 9 | 6 | 6 | 3 | 9 | 0 | 10 | 3 | 8 +EQ | 5 | + cnt/LTimer<8>.T = cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> & + cnt/LTimer<3> & cnt/LTimer<4> & cnt/LTimer<5> & cnt/LTimer<6> & + cnt/LTimer<7>; + cnt/LTimer<8>.CLK = FCLK; // GCK + cnt/LTimer<8>.CE = cnt/TimerTC & !cnt/Er<0> & cnt/Er<1>; +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 6 | 2 | cnt/LTimer<9> +ATTRIBUTES | 4358976 | 0 +OUTPUTMC | 4 | 6 | 17 | 6 | 16 | 6 | 15 | 6 | 0 +INPUTS | 12 | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/LTimer<4> | cnt/LTimer<5> | cnt/LTimer<6> | cnt/LTimer<7> | cnt/LTimer<8> | cnt/TimerTC | cnt/Er<0> | cnt/Er<1> +INPUTMC | 12 | 7 | 17 | 3 | 13 | 3 | 12 | 3 | 11 | 6 | 14 | 6 | 12 | 6 | 9 | 6 | 6 | 6 | 3 | 3 | 9 | 0 | 10 | 3 | 8 +EQ | 5 | + cnt/LTimer<9>.T = cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> & + cnt/LTimer<3> & cnt/LTimer<4> & cnt/LTimer<5> & cnt/LTimer<6> & + cnt/LTimer<7> & cnt/LTimer<8>; + cnt/LTimer<9>.CLK = FCLK; // GCK + cnt/LTimer<9>.CE = cnt/TimerTC & !cnt/Er<0> & cnt/Er<1>; +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 2 | 13 | cs/nOverlay +ATTRIBUTES | 4358928 | 0 +OUTPUTMC | 26 | 4 | 15 | 2 | 13 | 4 | 0 | 7 | 8 | 2 | 12 | 2 | 4 | 2 | 9 | 2 | 8 | 4 | 17 | 2 | 16 | 7 | 15 | 4 | 5 | 7 | 13 | 4 | 2 | 2 | 14 | 7 | 10 | 6 | 7 | 2 | 1 | 2 | 2 | 2 | 6 | 4 | 7 | 4 | 8 | 7 | 1 | 7 | 14 | 7 | 16 | 7 | 17 +INPUTS | 17 | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | cs/nOverlay | nAS_FSB | fsb/ASrf | nRES.PIN | A_FSB<13> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | fsb/Ready1r | nWE_FSB | iobs/IOReady | nADoutLE1 +INPUTMC | 5 | 2 | 13 | 3 | 6 | 2 | 12 | 4 | 15 | 5 | 13 +INPUTP | 12 | 36 | 30 | 29 | 28 | 54 | 145 | 18 | 26 | 24 | 23 | 22 | 47 +EXPORTS | 1 | 2 | 12 EQ | 9 | - cnt/LTimer<8>.T = cnt/LTimer<13> & cnt/LTimer<8> & cnt/TimerTC - # cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> & - cnt/LTimer<2> & cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> & - cnt/LTimer<6> & cnt/LTimer<7> - # cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> & - cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> & cnt/LTimer<6> & - cnt/LTimer<7> & !cnt/TimerTC; - !cnt/LTimer<8>.CLK = C8M; // GCK - cnt/LTimer<8>.CE = cnt/TimerTC; -GLOBALS | 1 | 2 | C8M + cs/nOverlay.T = !A_FSB<23> & A_FSB<22> & !A_FSB<21> & !A_FSB<20> & + !cs/nOverlay & !nAS_FSB + # !A_FSB<23> & A_FSB<22> & !A_FSB<21> & !A_FSB<20> & + !cs/nOverlay & fsb/ASrf; + cs/nOverlay.CLK = FCLK; // GCK + cs/nOverlay.AR = !nRES.PIN; + cs/nOverlay.EXP = A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & cs/nOverlay & + !fsb/Ready1r & !nWE_FSB & !iobs/IOReady & !nADoutLE1 +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 2 | 0 | IORW0 +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 5 | 5 | 8 | 5 | 10 | 2 | 0 | 5 | 6 | 2 | 17 +INPUTS | 11 | IORW0 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | iobs/Once | nADoutLE1 | A_FSB<23> | A_FSB<22> | nAS_FSB | fsb/ASrf | EXP10_.EXP | iobs/Clear1.EXP +INPUTMC | 8 | 2 | 0 | 4 | 6 | 4 | 9 | 4 | 16 | 5 | 13 | 3 | 6 | 2 | 1 | 2 | 17 +INPUTP | 3 | 36 | 30 | 54 +IMPORTS | 2 | 2 | 1 | 2 | 17 +EQ | 41 | + !IORW0.D = !IORW0 & iobs/PS_FSM_FFd2 + # !IORW0 & iobs/PS_FSM_FFd1 + # iobs/Once & !IORW0 & nADoutLE1 + # !A_FSB<23> & !A_FSB<22> & !IORW0 & nADoutLE1 + # !IORW0 & nAS_FSB & !fsb/ASrf & nADoutLE1 +;Imported pterms FB3_2 + # A_FSB<22> & A_FSB<21> & !iobs/Once & !nWE_FSB & + !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 + # A_FSB<22> & A_FSB<21> & !iobs/Once & !nWE_FSB & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1 + # A_FSB<22> & A_FSB<20> & !iobs/Once & !nWE_FSB & + !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 + # A_FSB<22> & A_FSB<20> & !iobs/Once & !nWE_FSB & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1 + # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & + nADoutLE1 +;Imported pterms FB3_3 + # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & + nADoutLE1 + # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & + nADoutLE1 + # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & + nADoutLE1 +;Imported pterms FB3_18 + # !iobs/IORW1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & + !nADoutLE1 + # !A_FSB<23> & !A_FSB<21> & !A_FSB<20> & !IORW0 & + nADoutLE1 + # A_FSB<23> & !iobs/Once & !nWE_FSB & !nAS_FSB & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 + # A_FSB<23> & !iobs/Once & !nWE_FSB & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1; + IORW0.CLK = FCLK; // GCK +GLOBALS | 1 | 2 | FCLK MACROCELL | 6 | 15 | cnt/LTimer<12> ATTRIBUTES | 4358976 | 0 -OUTPUTMC | 2 | 6 | 0 | 6 | 15 -INPUTS | 15 | cnt/LTimer<13> | cnt/LTimer<12> | cnt/TimerTC | cnt/LTimer<0> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/LTimer<5> | cnt/LTimer<4> | cnt/LTimer<6> | cnt/LTimer<7> | cnt/LTimer<9> | cnt/LTimer<10> | cnt/LTimer<11> | cnt/LTimer<8> -INPUTMC | 15 | 6 | 0 | 6 | 15 | 0 | 9 | 3 | 13 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 -EQ | 11 | - cnt/LTimer<12>.T = cnt/LTimer<13> & cnt/LTimer<12> & cnt/TimerTC - # cnt/LTimer<0> & !cnt/LTimer<13> & cnt/LTimer<1> & - cnt/LTimer<2> & cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> & - cnt/LTimer<6> & cnt/LTimer<7> & cnt/LTimer<9> & cnt/LTimer<10> & - cnt/LTimer<11> & cnt/LTimer<8> - # cnt/LTimer<0> & cnt/LTimer<1> & cnt/LTimer<2> & - cnt/LTimer<3> & cnt/LTimer<5> & cnt/LTimer<4> & cnt/LTimer<6> & - cnt/LTimer<7> & cnt/LTimer<9> & cnt/LTimer<10> & cnt/LTimer<11> & - cnt/LTimer<8> & !cnt/TimerTC; - !cnt/LTimer<12>.CLK = C8M; // GCK - cnt/LTimer<12>.CE = cnt/TimerTC; -GLOBALS | 1 | 2 | C8M - -MACROCELL | 2 | 14 | iobs/IORW0 -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 5 | 5 | 8 | 5 | 10 | 2 | 14 | 5 | 2 | 2 | 13 -INPUTS | 11 | iobs/IORW0 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | iobs/Once | nADoutLE1 | A_FSB<23> | A_FSB<22> | nAS_FSB | fsb/ASrf | EXP21_.EXP | EXP22_.EXP -INPUTMC | 8 | 2 | 14 | 7 | 13 | 7 | 6 | 7 | 0 | 5 | 13 | 0 | 6 | 2 | 13 | 2 | 15 -INPUTP | 3 | 36 | 30 | 54 -IMPORTS | 2 | 2 | 13 | 2 | 15 -EQ | 41 | - !iobs/IORW0.D = !iobs/IORW0 & iobs/PS_FSM_FFd2 - # !iobs/IORW0 & iobs/PS_FSM_FFd1 - # iobs/Once & !iobs/IORW0 & nADoutLE1 - # !A_FSB<23> & !A_FSB<22> & !iobs/IORW0 & nADoutLE1 - # !iobs/IORW0 & nAS_FSB & !fsb/ASrf & nADoutLE1 -;Imported pterms FB3_14 - # !iobs/IORW1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & - !nADoutLE1 - # !A_FSB<23> & !A_FSB<21> & !A_FSB<20> & !iobs/IORW0 & - nADoutLE1 - # A_FSB<23> & !nWE_FSB & !iobs/Once & !nAS_FSB & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 - # A_FSB<23> & !nWE_FSB & !iobs/Once & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1 - # A_FSB<22> & A_FSB<21> & !nWE_FSB & !iobs/Once & - !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 -;Imported pterms FB3_16 - # A_FSB<22> & A_FSB<21> & !nWE_FSB & !iobs/Once & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1 - # A_FSB<22> & A_FSB<20> & !nWE_FSB & !iobs/Once & - !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 - # A_FSB<22> & A_FSB<20> & !nWE_FSB & !iobs/Once & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1 - # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & - nADoutLE1 - # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & - nADoutLE1 -;Imported pterms FB3_17 - # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & - nADoutLE1 - # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & - nADoutLE1; - iobs/IORW0.CLK = FCLK; // GCK +OUTPUTMC | 1 | 6 | 0 +INPUTS | 15 | cnt/LTimer<0> | cnt/LTimer<10> | cnt/LTimer<11> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/LTimer<4> | cnt/LTimer<5> | cnt/LTimer<6> | cnt/LTimer<7> | cnt/LTimer<8> | cnt/LTimer<9> | cnt/TimerTC | cnt/Er<0> | cnt/Er<1> +INPUTMC | 15 | 7 | 17 | 6 | 17 | 6 | 16 | 3 | 13 | 3 | 12 | 3 | 11 | 6 | 14 | 6 | 12 | 6 | 9 | 6 | 6 | 6 | 3 | 6 | 2 | 3 | 9 | 0 | 10 | 3 | 8 +EQ | 6 | + cnt/LTimer<12>.T = cnt/LTimer<0> & cnt/LTimer<10> & cnt/LTimer<11> & + cnt/LTimer<1> & cnt/LTimer<2> & cnt/LTimer<3> & cnt/LTimer<4> & + cnt/LTimer<5> & cnt/LTimer<6> & cnt/LTimer<7> & cnt/LTimer<8> & + cnt/LTimer<9>; + cnt/LTimer<12>.CLK = FCLK; // GCK + cnt/LTimer<12>.CE = cnt/TimerTC & !cnt/Er<0> & cnt/Er<1>; GLOBALS | 1 | 2 | FCLK -MACROCELL | 4 | 2 | ram/RefDone +MACROCELL | 3 | 9 | cnt/TimerTC +ATTRIBUTES | 8553280 | 0 +OUTPUTMC | 20 | 3 | 17 | 7 | 17 | 7 | 3 | 7 | 8 | 7 | 2 | 6 | 17 | 6 | 16 | 3 | 13 | 3 | 12 | 3 | 11 | 6 | 14 | 6 | 12 | 6 | 9 | 6 | 6 | 6 | 3 | 6 | 2 | 6 | 15 | 6 | 0 | 7 | 16 | 7 | 6 +INPUTS | 6 | RefUrg | cnt/Timer<0> | cnt/Timer<1> | cnt/Timer<2> | cnt/Er<0> | cnt/Er<1> +INPUTMC | 6 | 3 | 17 | 7 | 3 | 7 | 9 | 7 | 2 | 0 | 10 | 3 | 8 +EQ | 4 | + cnt/TimerTC.D = RefUrg & cnt/Timer<0> & !cnt/Timer<1> & + !cnt/Timer<2>; + cnt/TimerTC.CLK = FCLK; // GCK + cnt/TimerTC.CE = !cnt/Er<0> & cnt/Er<1>; +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 0 | 17 | ram/RefDone ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 4 | 4 | 2 | 0 | 1 | 0 | 3 | 4 | 1 -INPUTS | 9 | ram/RefDone | ram/RefReqSync | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | cs/nOverlay1 -INPUTMC | 5 | 4 | 2 | 0 | 2 | 7 | 8 | 4 | 12 | 4 | 3 -INPUTP | 4 | 36 | 30 | 29 | 28 -EXPORTS | 1 | 4 | 1 -EQ | 7 | +OUTPUTMC | 3 | 0 | 17 | 0 | 0 | 0 | 2 +INPUTS | 5 | ram/RefDone | ram/RefReqSync | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 +INPUTMC | 5 | 0 | 17 | 0 | 1 | 0 | 12 | 4 | 7 | 7 | 15 +EQ | 6 | ram/RefDone.D = ram/RefDone & ram/RefReqSync - # !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 & - ram/RefReqSync; + # ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & ram/RefReqSync + # !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + ram/RS_FSM_FFd3 & ram/RefReqSync; ram/RefDone.CLK = FCLK; // GCK - ram/RefDone.EXP = !A_FSB<23> & A_FSB<22> & !A_FSB<21> & !A_FSB<20> - # !A_FSB<23> & !A_FSB<21> & !A_FSB<20> & - !cs/nOverlay1 GLOBALS | 1 | 2 | FCLK -MACROCELL | 4 | 7 | cs/nOverlay0 -ATTRIBUTES | 4358928 | 0 -OUTPUTMC | 3 | 4 | 3 | 4 | 7 | 4 | 8 -INPUTS | 10 | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | cs/nOverlay0 | nAS_FSB | fsb/ASrf | nRES.PIN | ram/RASEL | A_FSB<5> -INPUTMC | 3 | 4 | 7 | 0 | 6 | 4 | 0 -INPUTP | 7 | 36 | 30 | 29 | 28 | 54 | 145 | 4 -EXPORTS | 1 | 4 | 8 -EQ | 7 | - cs/nOverlay0.T = !A_FSB<23> & A_FSB<22> & !A_FSB<21> & !A_FSB<20> & - !cs/nOverlay0 & !nAS_FSB - # !A_FSB<23> & A_FSB<22> & !A_FSB<21> & !A_FSB<20> & - !cs/nOverlay0 & fsb/ASrf; - cs/nOverlay0.CLK = FCLK; // GCK - cs/nOverlay0.AR = !nRES.PIN; - cs/nOverlay0.EXP = ram/RASEL & A_FSB<5> +MACROCELL | 3 | 16 | IOL0 +ATTRIBUTES | 8553280 | 0 +OUTPUTMC | 1 | 5 | 8 +INPUTS | 5 | iobs/IOL1 | nADoutLE1 | nLDS_FSB | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 +INPUTMC | 4 | 0 | 14 | 5 | 13 | 4 | 6 | 4 | 9 +INPUTP | 1 | 49 +EQ | 4 | + IOL0.D = !nLDS_FSB & nADoutLE1 + # iobs/IOL1 & !nADoutLE1; + IOL0.CLK = FCLK; // GCK + IOL0.CE = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1; GLOBALS | 1 | 2 | FCLK -MACROCELL | 4 | 6 | fsb/Ready0r +MACROCELL | 3 | 15 | IOU0 +ATTRIBUTES | 8553280 | 0 +OUTPUTMC | 1 | 5 | 10 +INPUTS | 5 | iobs/IOU1 | nADoutLE1 | nUDS_FSB | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 +INPUTMC | 4 | 0 | 13 | 5 | 13 | 4 | 6 | 4 | 9 +INPUTP | 1 | 56 +EQ | 4 | + IOU0.D = !nUDS_FSB & nADoutLE1 + # iobs/IOU1 & !nADoutLE1; + IOU0.CLK = FCLK; // GCK + IOU0.CE = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1; +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 3 | 14 | RefReq +ATTRIBUTES | 8553280 | 0 +OUTPUTMC | 1 | 0 | 1 +INPUTS | 5 | RefUrg | cnt/Timer<1> | cnt/Timer<2> | cnt/Er<0> | cnt/Er<1> +INPUTMC | 5 | 3 | 17 | 7 | 9 | 7 | 2 | 0 | 10 | 3 | 8 +EQ | 3 | + !RefReq.D = !RefUrg & !cnt/Timer<1> & !cnt/Timer<2>; + RefReq.CLK = FCLK; // GCK + RefReq.CE = !cnt/Er<0> & cnt/Er<1>; +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 6 | 0 | cnt/LTimerTC +ATTRIBUTES | 8553280 | 0 +OUTPUTMC | 2 | 7 | 16 | 7 | 6 +INPUTS | 16 | cnt/LTimer<0> | cnt/LTimer<10> | cnt/LTimer<11> | cnt/LTimer<1> | cnt/LTimer<2> | cnt/LTimer<3> | cnt/LTimer<4> | cnt/LTimer<5> | cnt/LTimer<6> | cnt/LTimer<7> | cnt/LTimer<8> | cnt/LTimer<9> | cnt/LTimer<12> | cnt/TimerTC | cnt/Er<0> | cnt/Er<1> +INPUTMC | 16 | 7 | 17 | 6 | 17 | 6 | 16 | 3 | 13 | 3 | 12 | 3 | 11 | 6 | 14 | 6 | 12 | 6 | 9 | 6 | 6 | 6 | 3 | 6 | 2 | 6 | 15 | 3 | 9 | 0 | 10 | 3 | 8 +EQ | 6 | + cnt/LTimerTC.D = !cnt/LTimer<0> & cnt/LTimer<10> & cnt/LTimer<11> & + cnt/LTimer<1> & cnt/LTimer<2> & cnt/LTimer<3> & cnt/LTimer<4> & + cnt/LTimer<5> & cnt/LTimer<6> & cnt/LTimer<7> & cnt/LTimer<8> & + cnt/LTimer<9> & cnt/LTimer<12>; + cnt/LTimerTC.CLK = FCLK; // GCK + cnt/LTimerTC.CE = cnt/TimerTC & !cnt/Er<0> & cnt/Er<1>; +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 7 | 8 | fsb/Ready0r ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 4 | 4 | 6 | 2 | 8 | 2 | 7 | 2 | 17 -INPUTS | 8 | A_FSB<23> | A_FSB<22> | A_FSB<21> | cs/nOverlay1 | fsb/Ready0r | ram/RAMReady | nAS_FSB | fsb/ASrf -INPUTMC | 4 | 4 | 3 | 4 | 6 | 4 | 16 | 0 | 6 -INPUTP | 4 | 36 | 30 | 29 | 54 +OUTPUTMC | 4 | 7 | 8 | 2 | 4 | 2 | 8 | 7 | 9 +INPUTS | 12 | A_FSB<23> | A_FSB<22> | cs/nOverlay | fsb/Ready0r | ram/RAMReady | nAS_FSB | fsb/ASrf | cnt/Timer<0> | cnt/Timer<1> | cnt/TimerTC | cnt/Er<0> | cnt/Er<1> +INPUTMC | 9 | 2 | 13 | 7 | 8 | 7 | 10 | 3 | 6 | 7 | 3 | 7 | 9 | 3 | 9 | 0 | 10 | 3 | 8 +INPUTP | 3 | 36 | 30 | 54 +EXPORTS | 1 | 7 | 9 EQ | 6 | !fsb/Ready0r.D = nAS_FSB & !fsb/ASrf - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - !fsb/Ready0r & !ram/RAMReady - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !fsb/Ready0r & !ram/RAMReady; + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay & + !fsb/Ready0r & !ram/RAMReady; fsb/Ready0r.CLK = FCLK; // GCK + fsb/Ready0r.EXP = !cnt/Timer<0> & !cnt/Timer<1> + # cnt/TimerTC & !cnt/Er<0> & cnt/Er<1> GLOBALS | 1 | 2 | FCLK -MACROCELL | 2 | 9 | fsb/Ready1r +MACROCELL | 2 | 12 | fsb/Ready1r ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 9 | 2 | 9 | 2 | 0 | 2 | 8 | 2 | 1 | 2 | 2 | 2 | 6 | 2 | 7 | 2 | 17 | 2 | 10 -INPUTS | 11 | nAS_FSB | fsb/ASrf | A_FSB<23> | fsb/Ready1r | iobs/IOReady | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<14> | A_FSB<13> | fsb/nDTACK.EXP -INPUTMC | 4 | 0 | 6 | 2 | 9 | 0 | 16 | 2 | 8 -INPUTP | 7 | 54 | 36 | 30 | 29 | 28 | 19 | 18 -EXPORTS | 1 | 2 | 10 -IMPORTS | 1 | 2 | 8 -EQ | 15 | +OUTPUTMC | 8 | 2 | 12 | 2 | 5 | 2 | 8 | 2 | 3 | 2 | 4 | 2 | 6 | 2 | 7 | 2 | 13 +INPUTS | 17 | nAS_FSB | fsb/ASrf | A_FSB<23> | fsb/Ready1r | iobs/IOReady | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<14> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | cs/nOverlay | nWE_FSB | nADoutLE1 | cs/nOverlay.EXP +INPUTMC | 6 | 3 | 6 | 2 | 12 | 4 | 15 | 2 | 13 | 5 | 13 | 2 | 13 +INPUTP | 11 | 54 | 36 | 30 | 29 | 28 | 19 | 26 | 24 | 23 | 22 | 47 +IMPORTS | 1 | 2 | 13 +EQ | 14 | !fsb/Ready1r.D = nAS_FSB & !fsb/ASrf # A_FSB<23> & !fsb/Ready1r & !iobs/IOReady # A_FSB<22> & A_FSB<21> & !fsb/Ready1r & !iobs/IOReady # A_FSB<22> & A_FSB<20> & !fsb/Ready1r & !iobs/IOReady -;Imported pterms FB3_9 # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & - !fsb/Ready1r & !iobs/IOReady & !nADoutLE1 + A_FSB<18> & A_FSB<17> & A_FSB<16> & cs/nOverlay & + !fsb/Ready1r & !nWE_FSB & !iobs/IOReady & !nADoutLE1 +;Imported pterms FB3_14 # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & - !fsb/Ready1r & !iobs/IOReady & !nADoutLE1; + A_FSB<18> & A_FSB<17> & A_FSB<16> & cs/nOverlay & + !fsb/Ready1r & !nWE_FSB & !iobs/IOReady & !nADoutLE1; fsb/Ready1r.CLK = FCLK; // GCK - fsb/Ready1r.EXP = !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & !A_FSB<22> GLOBALS | 1 | 2 | FCLK -MACROCELL | 2 | 0 | fsb/VPA +MACROCELL | 2 | 5 | fsb/VPA ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 4 | 2 | 0 | 3 | 10 | 2 | 1 | 2 | 17 -INPUTS | 11 | A_FSB<23> | fsb/Ready1r | fsb/VPA | iobs/IOReady | nAS_FSB | fsb/ASrf | A_FSB<22> | A_FSB<21> | A_FSB<20> | EXP14_.EXP | EXP23_.EXP -INPUTMC | 6 | 2 | 9 | 2 | 0 | 0 | 16 | 0 | 6 | 2 | 1 | 2 | 17 +OUTPUTMC | 4 | 2 | 5 | 3 | 10 | 2 | 4 | 2 | 6 +INPUTS | 11 | A_FSB<23> | fsb/Ready1r | fsb/VPA | iobs/IOReady | nAS_FSB | fsb/ASrf | A_FSB<22> | A_FSB<21> | A_FSB<20> | EXP13_.EXP | EXP14_.EXP +INPUTMC | 6 | 2 | 12 | 2 | 5 | 4 | 15 | 3 | 6 | 2 | 4 | 2 | 6 INPUTP | 5 | 36 | 54 | 30 | 29 | 28 -IMPORTS | 2 | 2 | 1 | 2 | 17 +IMPORTS | 2 | 2 | 4 | 2 | 6 EQ | 52 | fsb/VPA.D = A_FSB<23> & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB @@ -489,24 +547,35 @@ EQ | 52 | !iobs/IOReady & fsb/ASrf # A_FSB<22> & A_FSB<20> & !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB -;Imported pterms FB3_2 +;Imported pterms FB3_5 + # A_FSB<22> & A_FSB<20> & !fsb/Ready1r & fsb/VPA & + !iobs/IOReady & fsb/ASrf + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay & + !fsb/Ready0r & fsb/VPA & !nAS_FSB & !ram/RAMReady + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay & + !fsb/Ready0r & fsb/VPA & fsb/ASrf & !ram/RAMReady # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & - !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB & !nADoutLE1 - # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & - !fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf & !nADoutLE1 + A_FSB<18> & A_FSB<17> & A_FSB<16> & cs/nOverlay & + !fsb/Ready1r & fsb/VPA & !nWE_FSB & !iobs/IOReady & !nAS_FSB & + !nADoutLE1 # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & - !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB & !nADoutLE1 - # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & - !fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf & !nADoutLE1 + A_FSB<18> & A_FSB<17> & A_FSB<16> & cs/nOverlay & + !fsb/Ready1r & fsb/VPA & !nWE_FSB & !iobs/IOReady & !nAS_FSB & + !nADoutLE1 +;Imported pterms FB3_4 # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & - A_FSB<17> & A_FSB<16> & iobs/IOReady & !nAS_FSB -;Imported pterms FB3_3 + A_FSB<17> & A_FSB<16> & fsb/Ready1r & fsb/ASrf +;Imported pterms FB3_7 + # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & cs/nOverlay & + !fsb/Ready1r & fsb/VPA & !nWE_FSB & !iobs/IOReady & fsb/ASrf & + !nADoutLE1 + # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & cs/nOverlay & + !fsb/Ready1r & fsb/VPA & !nWE_FSB & !iobs/IOReady & fsb/ASrf & + !nADoutLE1 # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & @@ -514,43 +583,19 @@ EQ | 52 | # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & - A_FSB<17> & A_FSB<16> & fsb/Ready1r & fsb/ASrf + A_FSB<17> & A_FSB<16> & iobs/IOReady & !nAS_FSB # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & - A_FSB<17> & A_FSB<16> & iobs/IOReady & fsb/ASrf -;Imported pterms FB3_18 - # A_FSB<22> & A_FSB<20> & !fsb/Ready1r & fsb/VPA & - !iobs/IOReady & fsb/ASrf - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - !fsb/Ready0r & fsb/VPA & !nAS_FSB & !ram/RAMReady - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - !fsb/Ready0r & fsb/VPA & fsb/ASrf & !ram/RAMReady - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !fsb/Ready0r & fsb/VPA & !nAS_FSB & !ram/RAMReady - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !fsb/Ready0r & fsb/VPA & fsb/ASrf & !ram/RAMReady; + A_FSB<17> & A_FSB<16> & iobs/IOReady & fsb/ASrf; fsb/VPA.CLK = FCLK; // GCK GLOBALS | 1 | 2 | FCLK -MACROCELL | 0 | 11 | iobs/IOL0 +MACROCELL | 0 | 14 | iobs/IOL1 ATTRIBUTES | 8553280 | 0 -OUTPUTMC | 1 | 5 | 8 -INPUTS | 5 | iobs/IOL1 | nADoutLE1 | nLDS_FSB | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 -INPUTMC | 4 | 0 | 8 | 5 | 13 | 7 | 13 | 7 | 6 -INPUTP | 1 | 49 -EQ | 4 | - iobs/IOL0.D = !nLDS_FSB & nADoutLE1 - # iobs/IOL1 & !nADoutLE1; - iobs/IOL0.CLK = FCLK; // GCK - iobs/IOL0.CE = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1; -GLOBALS | 1 | 2 | FCLK - -MACROCELL | 0 | 8 | iobs/IOL1 -ATTRIBUTES | 8553280 | 0 -OUTPUTMC | 1 | 0 | 11 +OUTPUTMC | 1 | 3 | 16 INPUTS | 2 | nLDS_FSB | iobs/Load1 -INPUTMC | 1 | 7 | 15 +INPUTMC | 1 | 4 | 2 INPUTP | 1 | 49 EQ | 3 | iobs/IOL1.D = !nLDS_FSB; @@ -558,28 +603,28 @@ EQ | 3 | iobs/IOL1.CE = iobs/Load1; GLOBALS | 1 | 2 | FCLK -MACROCELL | 2 | 11 | iobs/IORW1 +MACROCELL | 2 | 10 | iobs/IORW1 ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 2 | 2 | 13 | 2 | 11 -INPUTS | 8 | nADoutLE1 | iobs/Once | nWE_FSB | iobs/IORW1 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | EXP19_.EXP | EXP20_.EXP -INPUTMC | 7 | 5 | 13 | 7 | 0 | 2 | 11 | 7 | 13 | 7 | 6 | 2 | 10 | 2 | 12 +OUTPUTMC | 2 | 2 | 10 | 2 | 17 +INPUTS | 8 | nADoutLE1 | iobs/Once | nWE_FSB | iobs/IORW1 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | EXP16_.EXP | EXP17_.EXP +INPUTMC | 7 | 5 | 13 | 4 | 16 | 2 | 10 | 4 | 6 | 4 | 9 | 2 | 9 | 2 | 11 INPUTP | 1 | 47 -IMPORTS | 2 | 2 | 10 | 2 | 12 +IMPORTS | 2 | 2 | 9 | 2 | 11 EQ | 20 | !iobs/IORW1.T = iobs/Once # !nADoutLE1 # nWE_FSB & iobs/IORW1 # !nWE_FSB & !iobs/IORW1 # !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 -;Imported pterms FB3_11 +;Imported pterms FB3_10 # nAS_FSB & !fsb/ASrf # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> # !A_FSB<23> & !A_FSB<22> & !A_FSB<19> + # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay # !A_FSB<23> & !A_FSB<22> & nWE_FSB - # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 -;Imported pterms FB3_10 +;Imported pterms FB3_9 # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & !A_FSB<22> -;Imported pterms FB3_13 +;Imported pterms FB3_12 # !A_FSB<23> & !A_FSB<22> & !A_FSB<20> # !A_FSB<23> & !A_FSB<22> & !A_FSB<18> # !A_FSB<23> & !A_FSB<22> & !A_FSB<17> @@ -588,41 +633,44 @@ EQ | 20 | iobs/IORW1.CLK = FCLK; // GCK GLOBALS | 1 | 2 | FCLK -MACROCELL | 0 | 16 | iobs/IOReady +MACROCELL | 4 | 15 | iobs/IOReady ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 9 | 2 | 9 | 2 | 0 | 0 | 16 | 2 | 8 | 2 | 1 | 2 | 2 | 2 | 6 | 2 | 7 | 2 | 17 -INPUTS | 8 | iobs/IOReady | nAS_FSB | fsb/ASrf | iobs/Once | iobs/PS_FSM_FFd2 | iobs/IOACTr | iobm/IOBERR | nADoutLE1 -INPUTMC | 7 | 0 | 16 | 0 | 6 | 7 | 0 | 7 | 13 | 0 | 5 | 3 | 17 | 5 | 13 -INPUTP | 1 | 54 -EQ | 8 | - iobs/IOReady.T = iobs/IOReady & nAS_FSB & !fsb/ASrf +OUTPUTMC | 9 | 2 | 12 | 2 | 5 | 4 | 14 | 2 | 8 | 2 | 4 | 2 | 6 | 2 | 7 | 2 | 13 | 4 | 16 +INPUTS | 17 | A_FSB<22> | A_FSB<21> | iobs/Once | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | fsb/ASrf | A_FSB<20> | A_FSB<14> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | cs/nOverlay | nWE_FSB | nAS_FSB | A_FSB<13> | RA_6_OBUF.EXP +INPUTMC | 6 | 4 | 16 | 4 | 6 | 4 | 9 | 3 | 6 | 2 | 13 | 4 | 14 +INPUTP | 11 | 30 | 29 | 28 | 19 | 26 | 24 | 23 | 22 | 47 | 54 | 18 +EXPORTS | 1 | 4 | 16 +IMPORTS | 1 | 4 | 14 +EQ | 22 | + iobs/IOReady.T = ;Imported pterms FB5_15 + iobs/IOReady & nAS_FSB & !fsb/ASrf # iobs/Once & iobs/IOReady & !iobs/PS_FSM_FFd2 & - !iobs/IOACTr & iobm/IOBERR & nADoutLE1 + !iobs/IOACTr & IOBERR & nADoutLE1 # iobs/Once & !iobs/IOReady & !nAS_FSB & - !iobs/PS_FSM_FFd2 & !iobs/IOACTr & !iobm/IOBERR & nADoutLE1 + !iobs/PS_FSM_FFd2 & !iobs/IOACTr & !IOBERR & nADoutLE1 # iobs/Once & !iobs/IOReady & !iobs/PS_FSM_FFd2 & - !iobs/IOACTr & !iobm/IOBERR & fsb/ASrf & nADoutLE1; + !iobs/IOACTr & !IOBERR & fsb/ASrf & nADoutLE1; iobs/IOReady.CLK = FCLK; // GCK + iobs/IOReady.EXP = A_FSB<22> & A_FSB<21> & !iobs/Once & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf + # A_FSB<22> & A_FSB<20> & !iobs/Once & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf + # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 + # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf + # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 GLOBALS | 1 | 2 | FCLK -MACROCELL | 0 | 10 | iobs/IOU0 +MACROCELL | 0 | 13 | iobs/IOU1 ATTRIBUTES | 8553280 | 0 -OUTPUTMC | 1 | 5 | 10 -INPUTS | 5 | iobs/IOU1 | nADoutLE1 | nUDS_FSB | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 -INPUTMC | 4 | 0 | 7 | 5 | 13 | 7 | 13 | 7 | 6 -INPUTP | 1 | 56 -EQ | 4 | - iobs/IOU0.D = !nUDS_FSB & nADoutLE1 - # iobs/IOU1 & !nADoutLE1; - iobs/IOU0.CLK = FCLK; // GCK - iobs/IOU0.CE = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1; -GLOBALS | 1 | 2 | FCLK - -MACROCELL | 0 | 7 | iobs/IOU1 -ATTRIBUTES | 8553280 | 0 -OUTPUTMC | 1 | 0 | 10 +OUTPUTMC | 1 | 3 | 15 INPUTS | 2 | nUDS_FSB | iobs/Load1 -INPUTMC | 1 | 7 | 15 +INPUTMC | 1 | 4 | 2 INPUTP | 1 | 56 EQ | 3 | iobs/IOU1.D = !nUDS_FSB; @@ -630,34 +678,51 @@ EQ | 3 | iobs/IOU1.CE = iobs/Load1; GLOBALS | 1 | 2 | FCLK -MACROCELL | 2 | 8 | fsb/nDTACK +MACROCELL | 7 | 11 | nBERR_FSB_OBUF +ATTRIBUTES | 4621058 | 0 +OUTPUTMC | 2 | 7 | 11 | 7 | 10 +INPUTS | 14 | nBERR_FSB | nAS_FSB | fsb/ASrf | iobs/Once | iobs/PS_FSM_FFd2 | iobs/IOACTr | IOBERR | nADoutLE1 | A_FSB<23> | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | ram/RefUrg | ram/BACTr +INPUTMC | 12 | 7 | 11 | 3 | 6 | 4 | 16 | 4 | 6 | 0 | 3 | 5 | 17 | 5 | 13 | 0 | 12 | 4 | 7 | 7 | 15 | 0 | 0 | 3 | 2 +INPUTP | 2 | 54 | 36 +EXPORTS | 1 | 7 | 10 +EQ | 10 | + nBERR_FSB.T = !nBERR_FSB & nAS_FSB & !fsb/ASrf + # iobs/Once & !nBERR_FSB & !iobs/PS_FSM_FFd2 & + !iobs/IOACTr & !IOBERR & nADoutLE1 + # iobs/Once & nBERR_FSB & !nAS_FSB & + !iobs/PS_FSM_FFd2 & !iobs/IOACTr & IOBERR & nADoutLE1 + # iobs/Once & nBERR_FSB & !iobs/PS_FSM_FFd2 & + !iobs/IOACTr & IOBERR & fsb/ASrf & nADoutLE1; + nBERR_FSB.CLK = FCLK; // GCK + nBERR_FSB_OBUF.EXP = A_FSB<23> & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & ram/BACTr +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 2 | 8 | nDTACK_FSB_OBUF ATTRIBUTES | 8815362 | 0 OUTPUTMC | 3 | 2 | 8 | 2 | 7 | 2 | 9 -INPUTS | 19 | A_FSB<14> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | cs/nOverlay1 | fsb/Ready1r | iobs/IOReady | nDTACK_FSB | nADoutLE1 | A_FSB<13> | A_FSB<23> | A_FSB<22> | fsb/Ready0r | ram/RAMReady | EXP18_.EXP -INPUTMC | 8 | 4 | 3 | 2 | 9 | 0 | 16 | 2 | 8 | 5 | 13 | 4 | 6 | 4 | 16 | 2 | 7 -INPUTP | 11 | 19 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 18 | 36 | 30 +INPUTS | 19 | A_FSB<13> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | cs/nOverlay | fsb/Ready1r | nWE_FSB | iobs/IOReady | nDTACK_FSB | nADoutLE1 | A_FSB<14> | A_FSB<23> | A_FSB<22> | fsb/Ready0r | ram/RAMReady | EXP15_.EXP +INPUTMC | 8 | 2 | 13 | 2 | 12 | 4 | 15 | 2 | 8 | 5 | 13 | 7 | 8 | 7 | 10 | 2 | 7 +INPUTP | 11 | 18 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 19 | 36 | 30 EXPORTS | 1 | 2 | 9 IMPORTS | 1 | 2 | 7 -EQ | 34 | - nDTACK_FSB.D = !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !fsb/Ready0r & nDTACK_FSB & !ram/RAMReady +EQ | 26 | + nDTACK_FSB.D = A_FSB<22> & A_FSB<21> & !fsb/Ready1r & + !iobs/IOReady & nDTACK_FSB + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay & + !fsb/Ready0r & nDTACK_FSB & !ram/RAMReady # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & - !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB & !nADoutLE1 + A_FSB<18> & A_FSB<17> & A_FSB<16> & cs/nOverlay & + !fsb/Ready1r & !nWE_FSB & !iobs/IOReady & nDTACK_FSB & !nADoutLE1 # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & - !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB & !nADoutLE1 + A_FSB<18> & A_FSB<17> & A_FSB<16> & cs/nOverlay & + !fsb/Ready1r & !nWE_FSB & !iobs/IOReady & nDTACK_FSB & !nADoutLE1 ;Imported pterms FB3_8 # nAS_FSB & !fsb/ASrf # A_FSB<23> & !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB - # A_FSB<22> & A_FSB<21> & !fsb/Ready1r & - !iobs/IOReady & nDTACK_FSB # A_FSB<22> & A_FSB<20> & !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - !fsb/Ready0r & nDTACK_FSB & !ram/RAMReady -;Imported pterms FB3_7 # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & @@ -667,129 +732,121 @@ EQ | 34 | A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & iobs/IOReady; nDTACK_FSB.CLK = FCLK; // GCK - fsb/nDTACK.EXP = A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & - !fsb/Ready1r & !iobs/IOReady & !nADoutLE1 - # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & - !fsb/Ready1r & !iobs/IOReady & !nADoutLE1 + nDTACK_FSB_OBUF.EXP = !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & !A_FSB<22> GLOBALS | 1 | 2 | FCLK -MACROCELL | 7 | 11 | iobs/nBERR_FSB +MACROCELL | 7 | 14 | nBR_IOB_OBUF ATTRIBUTES | 4621058 | 0 -OUTPUTMC | 3 | 7 | 11 | 7 | 10 | 7 | 12 -INPUTS | 17 | nAS_FSB | nBERR_FSB | fsb/ASrf | A_FSB<14> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | iobs/Once | cs/nOverlay1 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | A_FSB<13> | ram/RS_FSM_FFd3.EXP -INPUTMC | 7 | 7 | 11 | 0 | 6 | 7 | 0 | 4 | 3 | 7 | 13 | 7 | 6 | 7 | 10 -INPUTP | 10 | 54 | 19 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 18 -EXPORTS | 1 | 7 | 12 -IMPORTS | 1 | 7 | 10 -EQ | 21 | - nBERR_FSB.T = nAS_FSB & !nBERR_FSB & !fsb/ASrf -;Imported pterms FB8_11 - # iobs/Once & !nBERR_FSB & !iobs/PS_FSM_FFd2 & - !iobs/IOACTr & !iobm/IOBERR & nADoutLE1 - # iobs/Once & !nAS_FSB & nBERR_FSB & - !iobs/PS_FSM_FFd2 & !iobs/IOACTr & iobm/IOBERR & nADoutLE1 - # iobs/Once & nBERR_FSB & !iobs/PS_FSM_FFd2 & - !iobs/IOACTr & iobm/IOBERR & fsb/ASrf & nADoutLE1; - nBERR_FSB.CLK = FCLK; // GCK - iobs/nBERR_FSB.EXP = A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 - # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf - # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 - # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf -GLOBALS | 1 | 2 | FCLK - -MACROCELL | 7 | 14 | cnt/nBR_IOB -ATTRIBUTES | 4621058 | 0 -OUTPUTMC | 3 | 7 | 13 | 3 | 1 | 7 | 15 -INPUTS | 8 | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<19> | A_FSB<17> | A_FSB<16> | cs/nOverlay1 | iobs/PS_FSM_FFd2.EXP -INPUTMC | 2 | 4 | 3 | 7 | 13 -INPUTP | 6 | 36 | 30 | 29 | 26 | 23 | 22 +OUTPUTMC | 4 | 7 | 14 | 3 | 1 | 7 | 13 | 7 | 15 +INPUTS | 13 | nBR_IOB | cnt/INITS_FSM_FFd1 | cnt/INITS_FSM_FFd2 | A_FSB<23> | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | ram/RefUrg | ram/BACTr | A_FSB<22> | ram/RefReq | cs/nOverlay | ram/RAMEN.EXP +INPUTMC | 11 | 7 | 14 | 7 | 16 | 7 | 6 | 0 | 12 | 4 | 7 | 7 | 15 | 0 | 0 | 3 | 2 | 0 | 2 | 2 | 13 | 7 | 13 +INPUTP | 2 | 36 | 30 EXPORTS | 1 | 7 | 15 IMPORTS | 1 | 7 | 13 -EQ | 10 | - nBR_IOB.T = ;Imported pterms FB8_14 - nBR_IOB & !cnt/PORS_FSM_FFd1 & !cnt/PORS_FSM_FFd2 - # !nBR_IOB & !cnt/PORS_FSM_FFd1 & cnt/PORS_FSM_FFd2 & - cnt/IPL2r; - !nBR_IOB.CLK = C8M; // GCK - cnt/nBR_IOB.EXP = !A_FSB<23> & !A_FSB<22> & !A_FSB<21> - # !A_FSB<23> & !A_FSB<22> & !A_FSB<19> - # !A_FSB<23> & !A_FSB<22> & !A_FSB<17> - # !A_FSB<23> & !A_FSB<22> & !A_FSB<16> - # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 -GLOBALS | 1 | 2 | C8M +EQ | 14 | + nBR_IOB.T = nBR_IOB & !cnt/INITS_FSM_FFd1 & + !cnt/INITS_FSM_FFd2 +;Imported pterms FB8_14 + # !nBR_IOB & !cnt/INITS_FSM_FFd1 & + cnt/INITS_FSM_FFd2 & !cnt/nIPL2r; + nBR_IOB.CLK = FCLK; // GCK + nBR_IOB_OBUF.EXP = A_FSB<23> & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & ram/BACTr + # A_FSB<22> & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & ram/BACTr + # A_FSB<22> & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & !ram/RefReq + # !cs/nOverlay & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & !ram/RefReq +GLOBALS | 1 | 2 | FCLK -MACROCELL | 4 | 0 | ram/RASEL +MACROCELL | 7 | 0 | ram/RASEL ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 13 | 6 | 5 | 6 | 1 | 4 | 13 | 4 | 10 | 4 | 8 | 4 | 7 | 4 | 14 | 6 | 4 | 6 | 7 | 6 | 10 | 4 | 4 | 6 | 6 | 6 | 8 -INPUTS | 8 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | nAS_FSB | fsb/ASrf | ram/RefUrgent | nROMCS_OBUF.EXP | EXP26_.EXP -INPUTMC | 7 | 7 | 8 | 4 | 12 | 7 | 10 | 0 | 6 | 0 | 1 | 4 | 1 | 4 | 17 +OUTPUTMC | 11 | 6 | 5 | 6 | 1 | 4 | 13 | 4 | 10 | 4 | 4 | 4 | 11 | 4 | 14 | 6 | 4 | 6 | 7 | 6 | 10 | 4 | 9 +INPUTS | 8 | nAS_FSB | ram/RS_FSM_FFd1 | fsb/ASrf | ram/RefUrg | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | A_FSB_19_IBUF$BUF0.EXP | cnt/LTimer<0>.EXP +INPUTMC | 7 | 0 | 12 | 3 | 6 | 0 | 0 | 4 | 7 | 7 | 15 | 7 | 1 | 7 | 17 INPUTP | 1 | 54 -IMPORTS | 2 | 4 | 1 | 4 | 17 -EQ | 36 | - !ram/RASEL.D = ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 - # ram/RS_FSM_FFd2 & ram/RS_FSM_FFd3 - # !nAS_FSB & ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 - # ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf - # nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RefUrgent & - !ram/RS_FSM_FFd3 & !fsb/ASrf -;Imported pterms FB5_2 - # A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd2 & - !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq - # A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd2 & - !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq - # !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd2 & - !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB & +IMPORTS | 2 | 7 | 1 | 7 | 17 +EQ | 26 | + !ram/RASEL.D = !nAS_FSB & ram/RS_FSM_FFd1 + # ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 + # ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3 + # ram/RS_FSM_FFd1 & !ram/RefUrg + # ram/RS_FSM_FFd1 & fsb/ASrf +;Imported pterms FB8_2 + # A_FSB<23> & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + !ram/RefUrg & !ram/RefReq + # A_FSB<22> & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + !ram/RefUrg & !ram/RefReq + # nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + !ram/RefUrg & !fsb/ASrf + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay & !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & !ram/RAMEN - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & !ram/RAMEN & fsb/ASrf -;Imported pterms FB5_18 - # A_FSB<23> & !ram/RS_FSM_FFd2 & !ram/RefUrgent & - !ram/RS_FSM_FFd3 & ram/BACTr - # A_FSB<23> & !ram/RS_FSM_FFd2 & !ram/RefUrgent & - !ram/RS_FSM_FFd3 & !ram/RefReq - # A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd2 & - !ram/RefUrgent & !ram/RS_FSM_FFd3 & ram/BACTr - # A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd2 & - !ram/RefUrgent & !ram/RS_FSM_FFd3 & ram/BACTr - # !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd2 & - !ram/RefUrgent & !ram/RS_FSM_FFd3 & ram/BACTr -;Imported pterms FB5_17 - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & - !ram/RAMEN - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & !ram/RAMEN & - fsb/ASrf; +;Imported pterms FB8_18 + # A_FSB<23> & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + !ram/RefUrg & ram/BACTr + # A_FSB<22> & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + !ram/RefUrg & ram/BACTr + # !cs/nOverlay & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + !ram/RefUrg & ram/BACTr + # !cs/nOverlay & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + !ram/RefUrg & !ram/RefReq; ram/RASEL.CLK = FCLK; // GCK GLOBALS | 1 | 2 | FCLK -MACROCELL | 0 | 9 | cnt/TimerTC -ATTRIBUTES | 8520480 | 0 -OUTPUTMC | 18 | 3 | 13 | 6 | 0 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 | 0 | 14 | 0 | 13 | 1 | 17 | 0 | 12 -INPUTS | 5 | cnt/Timer<1> | cnt/Timer<2> | cnt/Timer<0> | cnt/Timer<3> | E -INPUTMC | 4 | 0 | 14 | 0 | 13 | 1 | 17 | 0 | 12 -INPUTP | 1 | 37 -EQ | 3 | - cnt/TimerTC.D = !cnt/Timer<1> & !cnt/Timer<2> & !cnt/Timer<0> & - cnt/Timer<3>; - cnt/TimerTC.CLK = E; - -MACROCELL | 5 | 4 | iobm/IOS_FSM_FFd3 +MACROCELL | 0 | 12 | ram/RS_FSM_FFd1 ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 13 | 5 | 8 | 5 | 10 | 5 | 11 | 5 | 4 | 3 | 9 | 5 | 12 | 3 | 17 | 5 | 17 | 5 | 3 | 5 | 2 | 3 | 0 | 3 | 16 | 5 | 16 +OUTPUTMC | 13 | 0 | 17 | 7 | 0 | 0 | 12 | 4 | 7 | 7 | 15 | 7 | 13 | 7 | 10 | 4 | 8 | 7 | 9 | 7 | 11 | 7 | 12 | 7 | 14 | 7 | 16 +INPUTS | 3 | ram/RS_FSM_FFd3 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 +INPUTMC | 3 | 7 | 15 | 0 | 12 | 4 | 7 +EQ | 3 | + ram/RS_FSM_FFd1.D = ram/RS_FSM_FFd3 + # ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2; + ram/RS_FSM_FFd1.CLK = FCLK; // GCK +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 4 | 7 | ram/RS_FSM_FFd2 +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 15 | 0 | 17 | 7 | 0 | 0 | 12 | 4 | 7 | 7 | 15 | 7 | 12 | 7 | 10 | 4 | 8 | 7 | 1 | 7 | 9 | 7 | 11 | 7 | 14 | 7 | 16 | 7 | 17 | 4 | 6 +INPUTS | 20 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd3 | ram/RS_FSM_FFd2 | nAS_FSB | ram/RefUrg | A_FSB<14> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | iobs/Once | cs/nOverlay | nWE_FSB | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | fsb/ASrf | A_FSB<13> | RA_4_OBUF.EXP +INPUTMC | 10 | 0 | 12 | 7 | 15 | 4 | 7 | 0 | 0 | 4 | 16 | 2 | 13 | 4 | 6 | 4 | 9 | 3 | 6 | 4 | 8 +INPUTP | 10 | 54 | 19 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 18 +EXPORTS | 1 | 4 | 6 +IMPORTS | 1 | 4 | 8 +EQ | 24 | + ram/RS_FSM_FFd2.D = ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3 + # ram/RS_FSM_FFd2 & ram/RS_FSM_FFd3 + # !nAS_FSB & ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 & + ram/RefUrg +;Imported pterms FB5_9 + # ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 & ram/RefUrg & + fsb/ASrf + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay & !nAS_FSB & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & ram/RefUrg + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay & !nAS_FSB & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & ram/RAMEN + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & ram/RefUrg & + fsb/ASrf + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & ram/RAMEN & + fsb/ASrf; + ram/RS_FSM_FFd2.CLK = FCLK; // GCK + ram/RS_FSM_FFd2.EXP = A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf + # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 5 | 2 | iobm/IOS_FSM_FFd3 +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 12 | 5 | 11 | 5 | 8 | 5 | 10 | 5 | 2 | 0 | 15 | 5 | 9 | 5 | 15 | 5 | 17 | 0 | 16 | 5 | 6 | 5 | 14 | 5 | 16 INPUTS | 6 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd3 | C8M | iobm/IOREQr | nAoutOE -INPUTMC | 5 | 3 | 9 | 5 | 12 | 5 | 4 | 1 | 12 | 3 | 1 +INPUTMC | 5 | 0 | 15 | 5 | 9 | 5 | 2 | 1 | 16 | 3 | 1 INPUTP | 1 | 35 EQ | 6 | iobm/IOS_FSM_FFd3.D = iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 @@ -800,56 +857,22 @@ EQ | 6 | iobm/IOS_FSM_FFd3.CLK = C16M; // GCK GLOBALS | 1 | 2 | C16M -MACROCELL | 7 | 8 | ram/RS_FSM_FFd1 +MACROCELL | 0 | 15 | iobm/IOS_FSM_FFd1 ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 11 | 4 | 2 | 4 | 0 | 7 | 8 | 4 | 12 | 7 | 10 | 4 | 9 | 4 | 16 | 0 | 4 | 4 | 8 | 7 | 7 | 7 | 9 -INPUTS | 6 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | nAS_FSB | ram/RefUrgent | nRAMUWE_OBUF.EXP -INPUTMC | 5 | 7 | 8 | 4 | 12 | 7 | 10 | 0 | 1 | 7 | 7 -INPUTP | 1 | 54 -EXPORTS | 1 | 7 | 9 -IMPORTS | 1 | 7 | 7 -EQ | 23 | - ram/RS_FSM_FFd1.D = ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 - # !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd3 - # !nAS_FSB & ram/RS_FSM_FFd1 & ram/RefUrgent & - !ram/RS_FSM_FFd3 -;Imported pterms FB8_8 - # ram/RS_FSM_FFd1 & ram/RefUrgent & - !ram/RS_FSM_FFd3 & fsb/ASrf - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB & - !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & ram/RefUrgent & !ram/RAMEN - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & ram/RefUrgent & !ram/RAMEN & - fsb/ASrf - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & - ram/RefUrgent & !ram/RAMEN - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & - ram/RefUrgent & !ram/RAMEN & fsb/ASrf; - ram/RS_FSM_FFd1.CLK = FCLK; // GCK - ram/RS_FSM_FFd1.EXP = ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 & - !ram/RS_FSM_FFd3 - # ram/RS_FSM_FFd1 & !ram/RefUrgent & - !ram/RS_FSM_FFd3 -GLOBALS | 1 | 2 | FCLK - -MACROCELL | 3 | 9 | iobm/IOS_FSM_FFd1 -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 12 | 5 | 8 | 5 | 10 | 5 | 11 | 5 | 4 | 3 | 9 | 5 | 12 | 3 | 17 | 5 | 17 | 5 | 3 | 5 | 16 | 3 | 0 | 3 | 16 +OUTPUTMC | 12 | 5 | 11 | 5 | 8 | 5 | 10 | 5 | 2 | 0 | 15 | 5 | 9 | 5 | 15 | 5 | 17 | 0 | 16 | 5 | 6 | 5 | 16 | 5 | 14 INPUTS | 3 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd1 -INPUTMC | 3 | 5 | 4 | 5 | 12 | 3 | 9 +INPUTMC | 3 | 5 | 2 | 5 | 9 | 0 | 15 EQ | 3 | iobm/IOS_FSM_FFd1.D = iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 # !iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd2; iobm/IOS_FSM_FFd1.CLK = C16M; // GCK GLOBALS | 1 | 2 | C16M -MACROCELL | 5 | 12 | iobm/IOS_FSM_FFd2 +MACROCELL | 5 | 9 | iobm/IOS_FSM_FFd2 ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 13 | 5 | 8 | 5 | 10 | 5 | 11 | 5 | 4 | 3 | 9 | 5 | 12 | 3 | 17 | 5 | 17 | 5 | 3 | 5 | 2 | 5 | 16 | 3 | 0 | 3 | 16 +OUTPUTMC | 11 | 5 | 11 | 5 | 8 | 5 | 10 | 5 | 2 | 0 | 15 | 5 | 9 | 5 | 15 | 5 | 17 | 0 | 16 | 5 | 6 | 5 | 16 INPUTS | 11 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | C8M | iobm/ETACK | iobm/BERRrf | iobm/BERRrr | iobm/DTACKrf | iobm/DTACKrr | iobm/RESrf | iobm/RESrr -INPUTMC | 10 | 5 | 4 | 3 | 9 | 5 | 12 | 5 | 0 | 3 | 3 | 3 | 2 | 1 | 16 | 1 | 15 | 1 | 11 | 1 | 10 +INPUTMC | 10 | 5 | 2 | 0 | 15 | 5 | 9 | 5 | 0 | 0 | 8 | 0 | 7 | 0 | 6 | 0 | 5 | 1 | 15 | 1 | 14 INPUTP | 1 | 35 EQ | 11 | iobm/IOS_FSM_FFd2.T = iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd1 & @@ -857,139 +880,108 @@ EQ | 11 | # C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & iobm/ETACK # C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & - iobm/IOS_FSM_FFd2 & iobm/BERRrf & iobm/BERRrr - # C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & iobm/DTACKrf & iobm/DTACKrr # C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & + iobm/IOS_FSM_FFd2 & iobm/BERRrf & iobm/BERRrr + # C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & iobm/RESrf & iobm/RESrr; iobm/IOS_FSM_FFd2.CLK = C16M; // GCK GLOBALS | 1 | 2 | C16M -MACROCELL | 4 | 12 | ram/RS_FSM_FFd2 -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 15 | 4 | 2 | 4 | 0 | 7 | 8 | 4 | 12 | 7 | 10 | 4 | 9 | 4 | 16 | 0 | 4 | 4 | 1 | 4 | 11 | 4 | 14 | 4 | 15 | 4 | 17 | 7 | 7 | 7 | 9 -INPUTS | 9 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | nAS_FSB | ram/RS_FSM_FFd3 | fsb/ASrf | ram/RefUrgent | ram/RefReq | ram/BACTr | RA_5_OBUF.EXP -INPUTMC | 8 | 7 | 8 | 4 | 12 | 7 | 10 | 0 | 6 | 0 | 1 | 0 | 3 | 7 | 16 | 4 | 11 +MACROCELL | 7 | 15 | ram/RS_FSM_FFd3 +ATTRIBUTES | 4358912 | 0 +OUTPUTMC | 14 | 0 | 17 | 7 | 0 | 0 | 12 | 4 | 7 | 7 | 15 | 7 | 12 | 7 | 10 | 4 | 8 | 7 | 1 | 7 | 9 | 7 | 11 | 7 | 14 | 7 | 16 | 7 | 17 +INPUTS | 10 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | nAS_FSB | fsb/ASrf | ram/RefUrg | cs/nOverlay | ram/BACTr | nBR_IOB_OBUF.EXP | cnt/INITS_FSM_FFd1.EXP +INPUTMC | 9 | 0 | 12 | 4 | 7 | 7 | 15 | 3 | 6 | 0 | 0 | 2 | 13 | 3 | 2 | 7 | 14 | 7 | 16 INPUTP | 1 | 54 -IMPORTS | 1 | 4 | 11 -EQ | 19 | - !ram/RS_FSM_FFd2.D = ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 - # !nAS_FSB & ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 - # ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd3 & fsb/ASrf - # !ram/RS_FSM_FFd2 & !ram/RefUrgent & - !ram/RS_FSM_FFd3 & ram/BACTr - # !ram/RS_FSM_FFd2 & !ram/RefUrgent & - !ram/RS_FSM_FFd3 & !ram/RefReq -;Imported pterms FB5_12 - # nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RefUrgent & - !ram/RS_FSM_FFd3 & !fsb/ASrf - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & fsb/ASrf - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & fsb/ASrf; - ram/RS_FSM_FFd2.CLK = FCLK; // GCK +IMPORTS | 2 | 7 | 14 | 7 | 16 +EQ | 30 | + !ram/RS_FSM_FFd3.T = !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 & + ram/RS_FSM_FFd3 + # !nAS_FSB & ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 + # ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg + # ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & fsb/ASrf + # !cs/nOverlay & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & ram/BACTr +;Imported pterms FB8_15 + # A_FSB<23> & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & ram/BACTr + # A_FSB<22> & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & ram/BACTr + # A_FSB<22> & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & !ram/RefReq + # !cs/nOverlay & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & !ram/RefReq +;Imported pterms FB8_17 + # A_FSB<23> & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & !ram/RefReq + # nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & !fsb/ASrf + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay & !nAS_FSB & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & !ram/RAMEN + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & !ram/RAMEN & + fsb/ASrf; + ram/RS_FSM_FFd3.CLK = FCLK; // GCK GLOBALS | 1 | 2 | FCLK -MACROCELL | 7 | 13 | iobs/PS_FSM_FFd2 +MACROCELL | 4 | 6 | iobs/PS_FSM_FFd2 ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 21 | 7 | 0 | 2 | 14 | 0 | 11 | 2 | 11 | 0 | 16 | 0 | 10 | 7 | 10 | 7 | 13 | 7 | 6 | 7 | 15 | 7 | 3 | 7 | 2 | 2 | 6 | 2 | 13 | 2 | 15 | 2 | 16 | 7 | 1 | 7 | 11 | 7 | 12 | 7 | 17 | 7 | 14 -INPUTS | 12 | iobs/PS_FSM_FFd1 | iobs/IOACTr | iobs/PS_FSM_FFd2 | nADoutLE1 | A_FSB<23> | iobs/Once | nAS_FSB | nBR_IOB | cnt/PORS_FSM_FFd1 | cnt/PORS_FSM_FFd2 | cnt/IPL2r | EXP28_.EXP -INPUTMC | 10 | 7 | 6 | 0 | 5 | 7 | 13 | 5 | 13 | 7 | 0 | 7 | 14 | 3 | 6 | 3 | 12 | 3 | 8 | 7 | 12 -INPUTP | 2 | 36 | 54 -EXPORTS | 1 | 7 | 14 -IMPORTS | 1 | 7 | 12 -EQ | 32 | +OUTPUTMC | 19 | 4 | 16 | 2 | 0 | 3 | 16 | 3 | 15 | 2 | 10 | 4 | 14 | 7 | 11 | 4 | 6 | 4 | 9 | 4 | 2 | 0 | 11 | 2 | 15 | 2 | 17 | 2 | 1 | 2 | 2 | 4 | 5 | 4 | 7 | 4 | 15 | 4 | 17 +INPUTS | 12 | iobs/PS_FSM_FFd1 | iobs/IOACTr | iobs/PS_FSM_FFd2 | nADoutLE1 | A_FSB<23> | iobs/Once | nAS_FSB | fsb/ASrf | A_FSB<22> | A_FSB<21> | nOE_OBUF.EXP | ram/RS_FSM_FFd2.EXP +INPUTMC | 8 | 4 | 9 | 0 | 3 | 4 | 6 | 5 | 13 | 4 | 16 | 3 | 6 | 4 | 5 | 4 | 7 +INPUTP | 4 | 36 | 54 | 30 | 29 +IMPORTS | 2 | 4 | 5 | 4 | 7 +EQ | 29 | iobs/PS_FSM_FFd2.T = iobs/PS_FSM_FFd1 & iobs/IOACTr # !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & !nADoutLE1 # A_FSB<23> & !iobs/Once & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 -;Imported pterms FB8_13 # A_FSB<23> & !iobs/Once & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf # A_FSB<22> & A_FSB<21> & !iobs/Once & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 +;Imported pterms FB5_6 # A_FSB<22> & A_FSB<21> & !iobs/Once & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf # A_FSB<22> & A_FSB<20> & !iobs/Once & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 # A_FSB<22> & A_FSB<20> & !iobs/Once & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf -;Imported pterms FB8_12 # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 + # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 +;Imported pterms FB5_8 # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 - # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf; + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf; iobs/PS_FSM_FFd2.CLK = FCLK; // GCK - iobs/PS_FSM_FFd2.EXP = nBR_IOB & !cnt/PORS_FSM_FFd1 & !cnt/PORS_FSM_FFd2 - # !nBR_IOB & !cnt/PORS_FSM_FFd1 & cnt/PORS_FSM_FFd2 & - cnt/IPL2r GLOBALS | 1 | 2 | FCLK -MACROCELL | 0 | 1 | ram/RefUrgent +MACROCELL | 0 | 0 | ram/RefUrg ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 12 | 4 | 0 | 7 | 8 | 4 | 12 | 7 | 9 | 4 | 9 | 4 | 16 | 4 | 1 | 4 | 11 | 4 | 14 | 4 | 15 | 4 | 17 | 7 | 7 -INPUTS | 2 | ram/RefDone | ram/RegUrgentSync -INPUTMC | 2 | 4 | 2 | 0 | 0 +OUTPUTMC | 13 | 7 | 0 | 4 | 7 | 7 | 15 | 7 | 13 | 7 | 10 | 4 | 8 | 7 | 1 | 7 | 9 | 7 | 11 | 7 | 12 | 7 | 14 | 7 | 16 | 7 | 17 +INPUTS | 2 | ram/RefDone | ram/RegUrgSync +INPUTMC | 2 | 0 | 17 | 3 | 0 EQ | 2 | - ram/RefUrgent.D = !ram/RefDone & ram/RegUrgentSync; - ram/RefUrgent.CLK = FCLK; // GCK + ram/RefUrg.D = !ram/RefDone & ram/RegUrgSync; + ram/RefUrg.CLK = FCLK; // GCK GLOBALS | 1 | 2 | FCLK -MACROCELL | 7 | 10 | ram/RS_FSM_FFd3 +MACROCELL | 5 | 5 | iobm/ES<0> ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 14 | 4 | 0 | 7 | 8 | 4 | 12 | 7 | 10 | 4 | 9 | 4 | 16 | 4 | 1 | 4 | 11 | 4 | 14 | 4 | 15 | 4 | 17 | 7 | 7 | 7 | 9 | 7 | 11 -INPUTS | 14 | A_FSB<22> | cs/nOverlay1 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | iobs/Once | nBERR_FSB | iobs/PS_FSM_FFd2 | iobs/IOACTr | iobm/IOBERR | nADoutLE1 | nAS_FSB | fsb/ASrf | EXP27_.EXP -INPUTMC | 12 | 4 | 3 | 7 | 8 | 4 | 12 | 7 | 10 | 7 | 0 | 7 | 11 | 7 | 13 | 0 | 5 | 3 | 17 | 5 | 13 | 0 | 6 | 7 | 9 -INPUTP | 2 | 30 | 54 -EXPORTS | 1 | 7 | 11 -IMPORTS | 1 | 7 | 9 -EQ | 27 | - !ram/RS_FSM_FFd3.T = A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd1 & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 - # !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd1 & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 -;Imported pterms FB8_10 - # !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 & - ram/RS_FSM_FFd3 - # A_FSB<23> & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & - !ram/RS_FSM_FFd3 - # nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & - !fsb/ASrf - # !ram/RS_FSM_FFd2 & !ram/RefUrgent & - !ram/RS_FSM_FFd3 & !ram/RAMEN - # A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd1 & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 -;Imported pterms FB8_9 - # ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 & - !ram/RS_FSM_FFd3 - # ram/RS_FSM_FFd1 & !ram/RefUrgent & - !ram/RS_FSM_FFd3; - ram/RS_FSM_FFd3.CLK = FCLK; // GCK - ram/RS_FSM_FFd3.EXP = iobs/Once & !nBERR_FSB & !iobs/PS_FSM_FFd2 & - !iobs/IOACTr & !iobm/IOBERR & nADoutLE1 - # iobs/Once & !nAS_FSB & nBERR_FSB & - !iobs/PS_FSM_FFd2 & !iobs/IOACTr & iobm/IOBERR & nADoutLE1 - # iobs/Once & nBERR_FSB & !iobs/PS_FSM_FFd2 & - !iobs/IOACTr & iobm/IOBERR & fsb/ASrf & nADoutLE1 -GLOBALS | 1 | 2 | FCLK - -MACROCELL | 5 | 7 | iobm/ES<0> -ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 7 | 5 | 1 | 5 | 7 | 5 | 6 | 5 | 15 | 5 | 5 | 5 | 9 | 5 | 0 +OUTPUTMC | 7 | 5 | 1 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 0 INPUTS | 7 | iobm/ES<0> | iobm/Er | iobm/Er2 | iobm/ES<1> | iobm/ES<2> | iobm/ES<3> | iobm/ES<4> -INPUTMC | 7 | 5 | 7 | 1 | 14 | 1 | 13 | 5 | 6 | 5 | 15 | 5 | 5 | 5 | 9 +INPUTMC | 7 | 5 | 5 | 0 | 4 | 1 | 17 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 EQ | 6 | !iobm/ES<0>.T = iobm/ES<0> & !iobm/Er & iobm/Er2 # !iobm/ES<0> & !iobm/ES<1> & !iobm/ES<2> & @@ -999,75 +991,11 @@ EQ | 6 | iobm/ES<0>.CLK = C16M; // GCK GLOBALS | 1 | 2 | C16M -MACROCELL | 7 | 6 | iobs/PS_FSM_FFd1 +MACROCELL | 5 | 4 | iobm/ES<1> ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 21 | 7 | 0 | 2 | 14 | 0 | 11 | 2 | 11 | 0 | 10 | 7 | 13 | 7 | 6 | 7 | 15 | 7 | 3 | 7 | 2 | 2 | 6 | 2 | 4 | 2 | 5 | 2 | 13 | 2 | 15 | 2 | 16 | 7 | 1 | 7 | 11 | 7 | 12 | 7 | 17 | 7 | 7 -INPUTS | 7 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | iobs/IOACTr | nWE_FSB | nUDS_FSB | nAS_FSB | ram/RAMEN -INPUTMC | 4 | 7 | 13 | 7 | 6 | 0 | 5 | 4 | 9 -INPUTP | 3 | 47 | 56 | 54 -EXPORTS | 1 | 7 | 7 -EQ | 4 | - iobs/PS_FSM_FFd1.D = iobs/PS_FSM_FFd2 - # iobs/PS_FSM_FFd1 & iobs/IOACTr; - iobs/PS_FSM_FFd1.CLK = FCLK; // GCK - iobs/PS_FSM_FFd1.EXP = !nWE_FSB & !nUDS_FSB & !nAS_FSB & ram/RAMEN -GLOBALS | 1 | 2 | FCLK - -MACROCELL | 4 | 9 | ram/RAMEN -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 10 | 7 | 6 | 7 | 7 | 7 | 9 | 4 | 9 | 4 | 14 | 7 | 4 | 7 | 5 | 4 | 1 | 4 | 8 | 4 | 16 -INPUTS | 10 | ram/RS_FSM_FFd2 | ram/RAMEN | ram/RS_FSM_FFd3 | ram/RS_FSM_FFd1 | ram/RefUrgent | ram/BACTr | ram/RefReq | nAS_FSB | fsb/ASrf | RA_4_OBUF.EXP -INPUTMC | 9 | 4 | 12 | 4 | 9 | 7 | 10 | 7 | 8 | 0 | 1 | 7 | 16 | 0 | 3 | 0 | 6 | 4 | 8 -INPUTP | 1 | 54 -IMPORTS | 1 | 4 | 8 -EQ | 18 | - ram/RAMEN.D = ram/RS_FSM_FFd2 & ram/RAMEN - # ram/RS_FSM_FFd3 & ram/RAMEN - # !ram/RS_FSM_FFd1 & !ram/RefUrgent & ram/RAMEN & - ram/BACTr - # !ram/RS_FSM_FFd1 & !ram/RefUrgent & ram/RAMEN & - !ram/RefReq - # nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RefUrgent & - !ram/RS_FSM_FFd3 & !fsb/ASrf -;Imported pterms FB5_9 - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB & - !ram/RS_FSM_FFd1 & ram/RAMEN - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - !ram/RS_FSM_FFd1 & ram/RAMEN & fsb/ASrf - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & ram/RAMEN - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !ram/RS_FSM_FFd1 & ram/RAMEN & fsb/ASrf; - ram/RAMEN.CLK = FCLK; // GCK -GLOBALS | 1 | 2 | FCLK - -MACROCELL | 0 | 14 | cnt/Timer<1> -ATTRIBUTES | 8520480 | 0 -OUTPUTMC | 6 | 0 | 9 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 17 | 0 | 15 -INPUTS | 4 | cnt/TimerTC | cnt/Timer<1> | cnt/Timer<0> | E -INPUTMC | 3 | 0 | 9 | 0 | 14 | 1 | 17 -INPUTP | 1 | 37 -EQ | 3 | - cnt/Timer<1>.D = !cnt/TimerTC & cnt/Timer<1> & !cnt/Timer<0> - # !cnt/TimerTC & !cnt/Timer<1> & cnt/Timer<0>; - cnt/Timer<1>.CLK = E; - -MACROCELL | 0 | 13 | cnt/Timer<2> -ATTRIBUTES | 4326176 | 0 -OUTPUTMC | 5 | 0 | 9 | 0 | 13 | 0 | 12 | 0 | 17 | 0 | 15 -INPUTS | 5 | cnt/TimerTC | cnt/Timer<1> | cnt/Timer<0> | cnt/Timer<2> | E -INPUTMC | 4 | 0 | 9 | 0 | 14 | 1 | 17 | 0 | 13 -INPUTP | 1 | 37 -EQ | 3 | - cnt/Timer<2>.T = cnt/TimerTC & cnt/Timer<2> - # !cnt/TimerTC & cnt/Timer<1> & cnt/Timer<0>; - cnt/Timer<2>.CLK = E; - -MACROCELL | 5 | 6 | iobm/ES<1> -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 7 | 5 | 1 | 5 | 7 | 5 | 6 | 5 | 15 | 5 | 5 | 5 | 9 | 5 | 0 +OUTPUTMC | 7 | 5 | 1 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 0 INPUTS | 4 | iobm/ES<0> | iobm/ES<1> | iobm/Er | iobm/Er2 -INPUTMC | 4 | 5 | 7 | 5 | 6 | 1 | 14 | 1 | 13 +INPUTMC | 4 | 5 | 5 | 5 | 4 | 0 | 4 | 1 | 17 EQ | 4 | !iobm/ES<1>.D = iobm/ES<0> & iobm/ES<1> # !iobm/ES<0> & !iobm/ES<1> @@ -1075,33 +1003,11 @@ EQ | 4 | iobm/ES<1>.CLK = C16M; // GCK GLOBALS | 1 | 2 | C16M -MACROCELL | 1 | 17 | cnt/Timer<0> -ATTRIBUTES | 8520480 | 0 -OUTPUTMC | 7 | 0 | 9 | 0 | 14 | 0 | 13 | 1 | 17 | 0 | 12 | 0 | 17 | 0 | 15 -INPUTS | 3 | cnt/TimerTC | cnt/Timer<0> | E -INPUTMC | 2 | 0 | 9 | 1 | 17 -INPUTP | 1 | 37 -EQ | 2 | - cnt/Timer<0>.D = !cnt/TimerTC & !cnt/Timer<0>; - cnt/Timer<0>.CLK = E; - -MACROCELL | 0 | 12 | cnt/Timer<3> -ATTRIBUTES | 4326176 | 0 -OUTPUTMC | 4 | 0 | 9 | 0 | 12 | 0 | 17 | 0 | 15 -INPUTS | 6 | cnt/TimerTC | cnt/Timer<1> | cnt/Timer<2> | cnt/Timer<0> | cnt/Timer<3> | E -INPUTMC | 5 | 0 | 9 | 0 | 14 | 0 | 13 | 1 | 17 | 0 | 12 -INPUTP | 1 | 37 -EQ | 4 | - cnt/Timer<3>.T = cnt/TimerTC & cnt/Timer<3> - # !cnt/TimerTC & cnt/Timer<1> & cnt/Timer<2> & - cnt/Timer<0>; - cnt/Timer<3>.CLK = E; - -MACROCELL | 5 | 15 | iobm/ES<2> +MACROCELL | 5 | 12 | iobm/ES<2> ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 6 | 5 | 1 | 5 | 7 | 5 | 15 | 5 | 5 | 5 | 9 | 5 | 0 +OUTPUTMC | 6 | 5 | 1 | 5 | 5 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 0 INPUTS | 7 | iobm/ES<0> | iobm/ES<2> | iobm/ES<1> | iobm/Er | iobm/Er2 | iobm/ES<3> | iobm/ES<4> -INPUTMC | 7 | 5 | 7 | 5 | 15 | 5 | 6 | 1 | 14 | 1 | 13 | 5 | 5 | 5 | 9 +INPUTMC | 7 | 5 | 5 | 5 | 12 | 5 | 4 | 0 | 4 | 1 | 17 | 5 | 3 | 5 | 7 EQ | 6 | !iobm/ES<2>.D = !iobm/ES<0> & !iobm/ES<2> # !iobm/ES<1> & !iobm/ES<2> @@ -1111,11 +1017,56 @@ EQ | 6 | iobm/ES<2>.CLK = C16M; // GCK GLOBALS | 1 | 2 | C16M -MACROCELL | 5 | 5 | iobm/ES<3> +MACROCELL | 4 | 9 | iobs/PS_FSM_FFd1 +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 20 | 4 | 16 | 2 | 0 | 3 | 16 | 3 | 15 | 2 | 10 | 4 | 6 | 4 | 9 | 4 | 2 | 0 | 11 | 2 | 15 | 2 | 17 | 2 | 1 | 2 | 2 | 2 | 14 | 2 | 16 | 4 | 5 | 4 | 7 | 4 | 15 | 4 | 17 | 4 | 8 +INPUTS | 6 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | iobs/IOACTr | A_FSB<14> | ram/RASEL | A_FSB<5> +INPUTMC | 4 | 4 | 6 | 4 | 9 | 0 | 3 | 7 | 0 +INPUTP | 2 | 19 | 4 +EXPORTS | 1 | 4 | 8 +EQ | 5 | + iobs/PS_FSM_FFd1.D = iobs/PS_FSM_FFd2 + # iobs/PS_FSM_FFd1 & iobs/IOACTr; + iobs/PS_FSM_FFd1.CLK = FCLK; // GCK + iobs/PS_FSM_FFd1.EXP = A_FSB<14> & !ram/RASEL + # ram/RASEL & A_FSB<5> +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 7 | 13 | ram/RAMEN +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 9 | 4 | 8 | 7 | 7 | 7 | 12 | 7 | 13 | 7 | 10 | 7 | 5 | 7 | 1 | 7 | 16 | 7 | 14 +INPUTS | 15 | A_FSB<23> | A_FSB<22> | cs/nOverlay | nAS_FSB | ram/RS_FSM_FFd1 | ram/RAMEN | fsb/ASrf | ram/RefUrg | ram/RefReq | ram/BACTr | nBR_IOB | cnt/INITS_FSM_FFd1 | cnt/INITS_FSM_FFd2 | cnt/nIPL2r | EXP22_.EXP +INPUTMC | 12 | 2 | 13 | 0 | 12 | 7 | 13 | 3 | 6 | 0 | 0 | 0 | 2 | 3 | 2 | 7 | 14 | 7 | 16 | 7 | 6 | 0 | 9 | 7 | 12 +INPUTP | 3 | 36 | 30 | 54 +EXPORTS | 1 | 7 | 14 +IMPORTS | 1 | 7 | 12 +EQ | 19 | + ram/RAMEN.D = !ram/RS_FSM_FFd1 & !ram/RefUrg & ram/RAMEN & + ram/BACTr + # !ram/RS_FSM_FFd1 & !ram/RefUrg & ram/RAMEN & + !ram/RefReq + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay & !nAS_FSB & + !ram/RS_FSM_FFd1 & ram/RAMEN + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay & + !ram/RS_FSM_FFd1 & ram/RAMEN & fsb/ASrf +;Imported pterms FB8_13 + # ram/RS_FSM_FFd3 & ram/RAMEN + # ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & ram/RAMEN + # !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 & ram/RAMEN + # nAS_FSB & ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & !fsb/ASrf + # nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & !fsb/ASrf; + ram/RAMEN.CLK = FCLK; // GCK + ram/RAMEN.EXP = !nBR_IOB & !cnt/INITS_FSM_FFd1 & + cnt/INITS_FSM_FFd2 & !cnt/nIPL2r +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 5 | 3 | iobm/ES<3> ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 6 | 5 | 1 | 5 | 7 | 5 | 15 | 5 | 5 | 5 | 9 | 5 | 0 +OUTPUTMC | 6 | 5 | 1 | 5 | 5 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 0 INPUTS | 6 | iobm/ES<3> | iobm/Er | iobm/Er2 | iobm/ES<0> | iobm/ES<1> | iobm/ES<2> -INPUTMC | 6 | 5 | 5 | 1 | 14 | 1 | 13 | 5 | 7 | 5 | 6 | 5 | 15 +INPUTMC | 6 | 5 | 3 | 0 | 4 | 1 | 17 | 5 | 5 | 5 | 4 | 5 | 12 EQ | 4 | iobm/ES<3>.T = iobm/ES<3> & !iobm/Er & iobm/Er2 # iobm/ES<0> & iobm/ES<1> & iobm/ES<2> & iobm/Er @@ -1123,11 +1074,11 @@ EQ | 4 | iobm/ES<3>.CLK = C16M; // GCK GLOBALS | 1 | 2 | C16M -MACROCELL | 5 | 9 | iobm/ES<4> +MACROCELL | 5 | 7 | iobm/ES<4> ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 5 | 5 | 1 | 5 | 7 | 5 | 15 | 5 | 9 | 5 | 0 +OUTPUTMC | 5 | 5 | 1 | 5 | 5 | 5 | 12 | 5 | 7 | 5 | 0 INPUTS | 7 | iobm/ES<4> | iobm/Er | iobm/Er2 | iobm/ES<0> | iobm/ES<1> | iobm/ES<2> | iobm/ES<3> -INPUTMC | 7 | 5 | 9 | 1 | 14 | 1 | 13 | 5 | 7 | 5 | 6 | 5 | 15 | 5 | 5 +INPUTMC | 7 | 5 | 7 | 0 | 4 | 1 | 17 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 EQ | 8 | iobm/ES<4>.T = iobm/ES<4> & !iobm/Er & iobm/Er2 # iobm/ES<0> & iobm/ES<1> & iobm/ES<2> & @@ -1139,185 +1090,150 @@ EQ | 8 | iobm/ES<4>.CLK = C16M; // GCK GLOBALS | 1 | 2 | C16M -MACROCELL | 3 | 6 | cnt/PORS_FSM_FFd1 +MACROCELL | 7 | 16 | cnt/INITS_FSM_FFd1 ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 5 | 7 | 13 | 3 | 6 | 3 | 12 | 3 | 11 | 3 | 1 -INPUTS | 4 | cnt/LTimer<13> | cnt/PORS_FSM_FFd1 | cnt/PORS_FSM_FFd2 | cnt/IPL2r -INPUTMC | 4 | 6 | 0 | 3 | 6 | 3 | 12 | 3 | 8 -EQ | 3 | - cnt/PORS_FSM_FFd1.T = cnt/LTimer<13> & !cnt/PORS_FSM_FFd1 & - cnt/PORS_FSM_FFd2 & !cnt/IPL2r; - !cnt/PORS_FSM_FFd1.CLK = C8M; // GCK -GLOBALS | 1 | 2 | C8M +OUTPUTMC | 7 | 7 | 14 | 7 | 16 | 7 | 6 | 3 | 3 | 3 | 1 | 7 | 13 | 7 | 15 +INPUTS | 18 | cnt/TimerTC | cnt/LTimerTC | cnt/INITS_FSM_FFd1 | cnt/INITS_FSM_FFd2 | cnt/Er<0> | cnt/nIPL2r | cnt/Er<1> | A_FSB<23> | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | ram/RefUrg | ram/RefReq | nAS_FSB | fsb/ASrf | A_FSB<22> | cs/nOverlay | ram/RAMEN +INPUTMC | 15 | 3 | 9 | 6 | 0 | 7 | 16 | 7 | 6 | 0 | 10 | 0 | 9 | 3 | 8 | 0 | 12 | 4 | 7 | 7 | 15 | 0 | 0 | 0 | 2 | 3 | 6 | 2 | 13 | 7 | 13 +INPUTP | 3 | 36 | 54 | 30 +EXPORTS | 1 | 7 | 15 +EQ | 12 | + cnt/INITS_FSM_FFd1.T = cnt/TimerTC & cnt/LTimerTC & !cnt/INITS_FSM_FFd1 & + cnt/INITS_FSM_FFd2 & !cnt/Er<0> & cnt/nIPL2r & cnt/Er<1>; + cnt/INITS_FSM_FFd1.CLK = FCLK; // GCK + cnt/INITS_FSM_FFd1.EXP = A_FSB<23> & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & !ram/RefReq + # nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & !fsb/ASrf + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay & !nAS_FSB & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & !ram/RAMEN + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & !ram/RAMEN & + fsb/ASrf +GLOBALS | 1 | 2 | FCLK -MACROCELL | 0 | 5 | iobs/IOACTr +MACROCELL | 7 | 6 | cnt/INITS_FSM_FFd2 +ATTRIBUTES | 4358912 | 0 +OUTPUTMC | 6 | 7 | 14 | 7 | 16 | 7 | 6 | 3 | 3 | 3 | 1 | 7 | 13 +INPUTS | 6 | cnt/TimerTC | cnt/LTimerTC | cnt/INITS_FSM_FFd1 | cnt/INITS_FSM_FFd2 | cnt/Er<0> | cnt/Er<1> +INPUTMC | 6 | 3 | 9 | 6 | 0 | 7 | 16 | 7 | 6 | 0 | 10 | 3 | 8 +EQ | 5 | + cnt/INITS_FSM_FFd2.T = cnt/TimerTC & cnt/LTimerTC & cnt/INITS_FSM_FFd1 & + cnt/INITS_FSM_FFd2 & !cnt/Er<0> & cnt/Er<1> + # cnt/TimerTC & cnt/LTimerTC & !cnt/INITS_FSM_FFd1 & + !cnt/INITS_FSM_FFd2 & !cnt/Er<0> & cnt/Er<1>; + cnt/INITS_FSM_FFd2.CLK = FCLK; // GCK +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 0 | 3 | iobs/IOACTr ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 5 | 0 | 16 | 7 | 10 | 7 | 13 | 7 | 6 | 2 | 6 -INPUTS | 1 | iobm/IOACT -INPUTMC | 1 | 5 | 17 +OUTPUTMC | 5 | 4 | 14 | 7 | 11 | 4 | 6 | 4 | 9 | 2 | 15 +INPUTS | 1 | IOACT +INPUTMC | 1 | 5 | 15 EQ | 2 | - iobs/IOACTr.D = iobm/IOACT; + iobs/IOACTr.D = IOACT; iobs/IOACTr.CLK = FCLK; // GCK GLOBALS | 1 | 2 | FCLK -MACROCELL | 3 | 12 | cnt/PORS_FSM_FFd2 +MACROCELL | 1 | 16 | iobm/IOREQr ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 5 | 7 | 13 | 3 | 6 | 3 | 12 | 3 | 11 | 3 | 1 -INPUTS | 3 | cnt/LTimer<13> | cnt/PORS_FSM_FFd2 | cnt/PORS_FSM_FFd1 -INPUTMC | 3 | 6 | 0 | 3 | 12 | 3 | 6 -EQ | 3 | - cnt/PORS_FSM_FFd2.D = cnt/LTimer<13> & !cnt/PORS_FSM_FFd1 - # !cnt/LTimer<13> & cnt/PORS_FSM_FFd2; - !cnt/PORS_FSM_FFd2.CLK = C8M; // GCK -GLOBALS | 1 | 2 | C8M +OUTPUTMC | 4 | 5 | 2 | 5 | 15 | 0 | 16 | 5 | 6 +INPUTS | 1 | IOREQ +INPUTMC | 1 | 2 | 15 +EQ | 2 | + iobm/IOREQr.D = IOREQ; + !iobm/IOREQr.CLK = C16M; // GCK +GLOBALS | 1 | 2 | C16M -MACROCELL | 7 | 15 | iobs/Load1 +MACROCELL | 4 | 2 | iobs/Load1 ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 3 | 0 | 8 | 0 | 7 | 5 | 13 -INPUTS | 11 | nADoutLE1 | iobs/Once | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nAS_FSB | fsb/ASrf | A_FSB<23> | A_FSB<22> | nWE_FSB | cnt/nBR_IOB.EXP | ram/BACTr.EXP -INPUTMC | 7 | 5 | 13 | 7 | 0 | 7 | 13 | 7 | 6 | 0 | 6 | 7 | 14 | 7 | 16 -INPUTP | 4 | 54 | 36 | 30 | 47 -IMPORTS | 2 | 7 | 14 | 7 | 16 +OUTPUTMC | 3 | 0 | 14 | 0 | 13 | 5 | 13 +INPUTS | 11 | nADoutLE1 | iobs/Once | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nAS_FSB | fsb/ASrf | A_FSB<23> | A_FSB<22> | cs/nOverlay | nROMCS_OBUF.EXP | EXP20_.EXP +INPUTMC | 8 | 5 | 13 | 4 | 16 | 4 | 6 | 4 | 9 | 3 | 6 | 2 | 13 | 4 | 1 | 4 | 3 +INPUTP | 3 | 54 | 36 | 30 +IMPORTS | 2 | 4 | 1 | 4 | 3 EQ | 17 | !iobs/Load1.D = iobs/Once # !nADoutLE1 # nAS_FSB & !fsb/ASrf # !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 - # !A_FSB<23> & !A_FSB<22> & nWE_FSB -;Imported pterms FB8_15 + # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay +;Imported pterms FB5_2 # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> # !A_FSB<23> & !A_FSB<22> & !A_FSB<19> - # !A_FSB<23> & !A_FSB<22> & !A_FSB<17> # !A_FSB<23> & !A_FSB<22> & !A_FSB<16> - # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 -;Imported pterms FB8_17 + # !A_FSB<23> & !A_FSB<22> & nWE_FSB +;Imported pterms FB5_4 # !A_FSB<23> & !A_FSB<22> & !A_FSB<20> # !A_FSB<23> & !A_FSB<22> & !A_FSB<18> + # !A_FSB<23> & !A_FSB<22> & !A_FSB<17> # !A_FSB<23> & !A_FSB<21> & !A_FSB<20> # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & !A_FSB<22>; iobs/Load1.CLK = FCLK; // GCK GLOBALS | 1 | 2 | FCLK -MACROCELL | 7 | 16 | ram/BACTr +MACROCELL | 5 | 15 | IOACT ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 6 | 4 | 16 | 4 | 12 | 4 | 9 | 4 | 15 | 4 | 17 | 7 | 15 -INPUTS | 9 | nAS_FSB | fsb/ASrf | A_FSB<23> | A_FSB<22> | A_FSB<20> | A_FSB<18> | A_FSB<21> | A_FSB<14> | A_FSB<13> -INPUTMC | 1 | 0 | 6 -INPUTP | 8 | 54 | 36 | 30 | 28 | 24 | 29 | 19 | 18 -EXPORTS | 1 | 7 | 15 -EQ | 6 | - !ram/BACTr.D = nAS_FSB & !fsb/ASrf; - ram/BACTr.CLK = FCLK; // GCK - ram/BACTr.EXP = !A_FSB<23> & !A_FSB<22> & !A_FSB<20> - # !A_FSB<23> & !A_FSB<22> & !A_FSB<18> - # !A_FSB<23> & !A_FSB<21> & !A_FSB<20> - # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & !A_FSB<22> -GLOBALS | 1 | 2 | FCLK +OUTPUTMC | 2 | 5 | 1 | 0 | 3 +INPUTS | 11 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd3 | iobm/IOREQr | C8M | iobm/ETACK | iobm/BERRrf | iobm/BERRrr | iobm/DTACKrf | iobm/DTACKrr | nADoutLE0_OBUF.EXP +INPUTMC | 10 | 0 | 15 | 5 | 9 | 5 | 2 | 1 | 16 | 5 | 0 | 0 | 8 | 0 | 7 | 0 | 6 | 0 | 5 | 5 | 14 +INPUTP | 1 | 35 +IMPORTS | 1 | 5 | 14 +EQ | 13 | + !IOACT.D = iobm/IOS_FSM_FFd1 & !iobm/IOS_FSM_FFd2 + # !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd2 & + !iobm/IOREQr + # C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & + iobm/ETACK + # C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & + iobm/DTACKrf & iobm/DTACKrr + # C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & + iobm/BERRrf & iobm/BERRrr +;Imported pterms FB6_15 + # C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & + iobm/RESrf & iobm/RESrr; + IOACT.CLK = C16M; // GCK +GLOBALS | 1 | 2 | C16M -MACROCELL | 0 | 3 | ram/RefReq -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 6 | 4 | 15 | 4 | 12 | 4 | 9 | 4 | 1 | 4 | 14 | 4 | 17 -INPUTS | 2 | ram/RefDone | ram/RefReqSync -INPUTMC | 2 | 4 | 2 | 0 | 2 -EQ | 2 | - ram/RefReq.D = !ram/RefDone & ram/RefReqSync; - ram/RefReq.CLK = FCLK; // GCK -GLOBALS | 1 | 2 | FCLK - -MACROCELL | 3 | 17 | iobm/IOBERR +MACROCELL | 5 | 17 | IOBERR ATTRIBUTES | 4358912 | 0 -OUTPUTMC | 5 | 0 | 16 | 7 | 10 | 3 | 17 | 3 | 0 | 3 | 16 -INPUTS | 13 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | iobm/IOBERR | C8M | nBERR_IOB | iobm/ETACK | iobm/BERRrf | iobm/BERRrr | iobm/DTACKrf | iobm/DTACKrr | EXP24_.EXP | cnt/LTimer<1>.EXP -INPUTMC | 11 | 5 | 4 | 3 | 9 | 5 | 12 | 3 | 17 | 5 | 0 | 3 | 3 | 3 | 2 | 1 | 16 | 1 | 15 | 3 | 0 | 3 | 16 +OUTPUTMC | 4 | 4 | 14 | 7 | 11 | 5 | 17 | 5 | 16 +INPUTS | 12 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | IOBERR | C8M | nBERR_IOB | iobm/ETACK | iobm/BERRrf | iobm/BERRrr | iobm/DTACKrf | iobm/DTACKrr | nDinLE_OBUF.EXP +INPUTMC | 10 | 5 | 2 | 0 | 15 | 5 | 9 | 5 | 17 | 5 | 0 | 0 | 8 | 0 | 7 | 0 | 6 | 0 | 5 | 5 | 16 INPUTP | 2 | 35 | 123 -IMPORTS | 2 | 3 | 0 | 3 | 16 -EQ | 27 | - iobm/IOBERR.T = iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd1 & - !iobm/IOS_FSM_FFd2 & iobm/IOBERR +IMPORTS | 1 | 5 | 16 +EQ | 26 | + IOBERR.T = iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd1 & + !iobm/IOS_FSM_FFd2 & IOBERR # C8M & nBERR_IOB & iobm/IOS_FSM_FFd3 & - iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & iobm/IOBERR & iobm/ETACK + iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & IOBERR & iobm/ETACK # C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 & - iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/ETACK + iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !IOBERR & iobm/ETACK # C8M & nBERR_IOB & iobm/IOS_FSM_FFd3 & - iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & iobm/IOBERR & iobm/BERRrf & - iobm/BERRrr - # C8M & nBERR_IOB & iobm/IOS_FSM_FFd3 & - iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & iobm/IOBERR & iobm/DTACKrf & + iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & IOBERR & iobm/DTACKrf & iobm/DTACKrr -;Imported pterms FB4_1 - # C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 & - iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/BERRrf & + # C8M & nBERR_IOB & iobm/IOS_FSM_FFd3 & + iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & IOBERR & iobm/BERRrf & iobm/BERRrr - # C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 & - iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/DTACKrf & - iobm/DTACKrr - # C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 & - iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/RESrf & +;Imported pterms FB6_17 + # C8M & nBERR_IOB & iobm/IOS_FSM_FFd3 & + iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & IOBERR & iobm/RESrf & iobm/RESrr -;Imported pterms FB4_17 - # C8M & nBERR_IOB & iobm/IOS_FSM_FFd3 & - iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & iobm/IOBERR & iobm/RESrf & + # C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 & + iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !IOBERR & iobm/DTACKrf & + iobm/DTACKrr + # C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 & + iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !IOBERR & iobm/BERRrf & + iobm/BERRrr + # C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 & + iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !IOBERR & iobm/RESrf & iobm/RESrr; - iobm/IOBERR.CLK = C16M; // GCK + IOBERR.CLK = C16M; // GCK GLOBALS | 1 | 2 | C16M -MACROCELL | 1 | 12 | iobm/IOREQr +MACROCELL | 0 | 4 | iobm/Er ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 3 | 5 | 4 | 5 | 17 | 5 | 3 -INPUTS | 1 | iobs/IOREQ -INPUTMC | 1 | 2 | 6 -EQ | 2 | - iobm/IOREQr.D = iobs/IOREQ; - !iobm/IOREQr.CLK = C16M; // GCK -GLOBALS | 1 | 2 | C16M - -MACROCELL | 0 | 2 | ram/RefReqSync -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 2 | 4 | 2 | 0 | 3 -INPUTS | 1 | cnt/RefReq -INPUTMC | 1 | 0 | 17 -EQ | 2 | - ram/RefReqSync.D = cnt/RefReq; - ram/RefReqSync.CLK = FCLK; // GCK -GLOBALS | 1 | 2 | FCLK - -MACROCELL | 3 | 8 | cnt/IPL2r -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 2 | 7 | 13 | 3 | 6 -INPUTS | 1 | nIPL2 -INPUTP | 1 | 146 -EQ | 2 | - cnt/IPL2r.D = !nIPL2; - !cnt/IPL2r.CLK = C8M; // GCK -GLOBALS | 1 | 2 | C8M - -MACROCELL | 3 | 11 | cnt/nRESout -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 2 | 3 | 11 | 3 | 7 -INPUTS | 4 | cnt/LTimer<13> | cnt/PORS_FSM_FFd1 | cnt/PORS_FSM_FFd2 | cnt/nRESout -INPUTMC | 4 | 6 | 0 | 3 | 6 | 3 | 12 | 3 | 11 -EQ | 5 | - cnt/nRESout.D = cnt/LTimer<13> & cnt/PORS_FSM_FFd1 & - !cnt/PORS_FSM_FFd2 - # cnt/PORS_FSM_FFd1 & !cnt/PORS_FSM_FFd2 & - cnt/nRESout; - !cnt/nRESout.CLK = C8M; // GCK -GLOBALS | 1 | 2 | C8M - -MACROCELL | 5 | 0 | iobm/ETACK -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 3 | 5 | 12 | 3 | 17 | 5 | 17 -INPUTS | 6 | nVMA_IOB | iobm/ES<0> | iobm/ES<1> | iobm/ES<2> | iobm/ES<3> | iobm/ES<4> -INPUTMC | 6 | 5 | 1 | 5 | 7 | 5 | 6 | 5 | 15 | 5 | 5 | 5 | 9 -EQ | 3 | - iobm/ETACK.D = !nVMA_IOB & !iobm/ES<0> & !iobm/ES<1> & !iobm/ES<2> & - !iobm/ES<3> & iobm/ES<4>; - iobm/ETACK.CLK = C16M; // GCK -GLOBALS | 1 | 2 | C16M - -MACROCELL | 1 | 14 | iobm/Er -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 6 | 5 | 7 | 5 | 6 | 5 | 15 | 5 | 5 | 5 | 9 | 1 | 13 +OUTPUTMC | 6 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 1 | 17 INPUTS | 1 | E INPUTP | 1 | 37 EQ | 2 | @@ -1325,99 +1241,60 @@ EQ | 2 | !iobm/Er.CLK = C8M; // GCK GLOBALS | 1 | 2 | C8M -MACROCELL | 5 | 17 | iobm/IOACT +MACROCELL | 3 | 2 | ram/BACTr ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 2 | 5 | 1 | 0 | 5 -INPUTS | 11 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd3 | iobm/IOREQr | C8M | iobm/ETACK | iobm/BERRrf | iobm/BERRrr | iobm/DTACKrf | iobm/DTACKrr | iobm/nDinLE.EXP -INPUTMC | 10 | 3 | 9 | 5 | 12 | 5 | 4 | 1 | 12 | 5 | 0 | 3 | 3 | 3 | 2 | 1 | 16 | 1 | 15 | 5 | 16 -INPUTP | 1 | 35 -IMPORTS | 1 | 5 | 16 -EQ | 13 | - !iobm/IOACT.D = iobm/IOS_FSM_FFd1 & !iobm/IOS_FSM_FFd2 - # !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd2 & - !iobm/IOREQr - # C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & - iobm/ETACK - # C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & - iobm/BERRrf & iobm/BERRrr - # C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & - iobm/DTACKrf & iobm/DTACKrr -;Imported pterms FB6_17 - # C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & - iobm/RESrf & iobm/RESrr; - iobm/IOACT.CLK = C16M; // GCK -GLOBALS | 1 | 2 | C16M - -MACROCELL | 0 | 17 | cnt/RefReq -ATTRIBUTES | 8520480 | 0 -OUTPUTMC | 1 | 0 | 2 -INPUTS | 5 | cnt/Timer<1> | cnt/Timer<3> | cnt/Timer<2> | cnt/Timer<0> | E -INPUTMC | 4 | 0 | 14 | 0 | 12 | 0 | 13 | 1 | 17 -INPUTP | 1 | 37 -EQ | 5 | - cnt/RefReq.D = cnt/Timer<1> & !cnt/Timer<3> - # cnt/Timer<2> & !cnt/Timer<3> - # !cnt/Timer<1> & !cnt/Timer<2> & !cnt/Timer<0> & - cnt/Timer<3>; - cnt/RefReq.CLK = E; - -MACROCELL | 0 | 15 | cnt/RefUrgent -ATTRIBUTES | 8520480 | 0 -OUTPUTMC | 1 | 0 | 0 -INPUTS | 5 | cnt/Timer<1> | cnt/Timer<2> | cnt/Timer<3> | cnt/Timer<0> | E -INPUTMC | 4 | 0 | 14 | 0 | 13 | 0 | 12 | 1 | 17 -INPUTP | 1 | 37 -EQ | 4 | - cnt/RefUrgent.D = cnt/Timer<1> & cnt/Timer<2> & !cnt/Timer<3> - # !cnt/Timer<1> & !cnt/Timer<2> & !cnt/Timer<0> & - cnt/Timer<3>; - cnt/RefUrgent.CLK = E; - -MACROCELL | 0 | 6 | fsb/ASrf -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 34 | 7 | 0 | 4 | 3 | 2 | 14 | 4 | 7 | 4 | 6 | 2 | 9 | 2 | 0 | 2 | 10 | 0 | 16 | 2 | 7 | 7 | 11 | 4 | 0 | 7 | 7 | 4 | 12 | 7 | 12 | 7 | 9 | 4 | 9 | 7 | 15 | 7 | 16 | 2 | 5 | 4 | 16 | 2 | 1 | 2 | 2 | 2 | 4 | 2 | 13 | 2 | 15 | 2 | 16 | 2 | 17 | 4 | 1 | 4 | 8 | 4 | 11 | 7 | 1 | 7 | 10 | 7 | 17 -INPUTS | 1 | nAS_FSB +OUTPUTMC | 7 | 7 | 10 | 7 | 15 | 7 | 13 | 7 | 9 | 7 | 11 | 7 | 14 | 7 | 17 +INPUTS | 2 | nAS_FSB | fsb/ASrf +INPUTMC | 1 | 3 | 6 INPUTP | 1 | 54 EQ | 2 | - fsb/ASrf.D = !nAS_FSB; - !fsb/ASrf.CLK = FCLK; // GCK + !ram/BACTr.D = nAS_FSB & !fsb/ASrf; + ram/BACTr.CLK = FCLK; // GCK GLOBALS | 1 | 2 | FCLK -MACROCELL | 5 | 3 | iobm/ALE0 +MACROCELL | 0 | 2 | ram/RefReq ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 1 | 5 | 14 -INPUTS | 4 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd3 | iobm/IOREQr -INPUTMC | 4 | 3 | 9 | 5 | 12 | 5 | 4 | 1 | 12 -EQ | 4 | - !iobm/ALE0.D = iobm/IOS_FSM_FFd1 & !iobm/IOS_FSM_FFd2 - # !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd2 & - !iobm/IOREQr; - iobm/ALE0.CLK = C16M; // GCK -GLOBALS | 1 | 2 | C16M - -MACROCELL | 3 | 3 | iobm/BERRrf -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 4 | 5 | 12 | 3 | 17 | 5 | 17 | 3 | 0 -INPUTS | 1 | nBERR_IOB -INPUTP | 1 | 123 +OUTPUTMC | 7 | 7 | 10 | 7 | 14 | 7 | 13 | 7 | 1 | 7 | 9 | 7 | 16 | 7 | 17 +INPUTS | 2 | ram/RefDone | ram/RefReqSync +INPUTMC | 2 | 0 | 17 | 0 | 1 EQ | 2 | - iobm/BERRrf.D = !nBERR_IOB; - !iobm/BERRrf.CLK = C16M; // GCK -GLOBALS | 1 | 2 | C16M + ram/RefReq.D = !ram/RefDone & ram/RefReqSync; + ram/RefReq.CLK = FCLK; // GCK +GLOBALS | 1 | 2 | FCLK -MACROCELL | 3 | 2 | iobm/BERRrr +MACROCELL | 0 | 1 | ram/RefReqSync ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 4 | 5 | 12 | 3 | 17 | 5 | 17 | 3 | 0 -INPUTS | 1 | nBERR_IOB -INPUTP | 1 | 123 +OUTPUTMC | 2 | 0 | 17 | 0 | 2 +INPUTS | 1 | RefReq +INPUTMC | 1 | 3 | 14 EQ | 2 | - iobm/BERRrr.D = !nBERR_IOB; - iobm/BERRrr.CLK = C16M; // GCK -GLOBALS | 1 | 2 | C16M + ram/RefReqSync.D = RefReq; + ram/RefReqSync.CLK = FCLK; // GCK +GLOBALS | 1 | 2 | FCLK -MACROCELL | 1 | 16 | iobm/DTACKrf +MACROCELL | 0 | 10 | cnt/Er<0> ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 4 | 5 | 12 | 3 | 17 | 5 | 17 | 3 | 0 +OUTPUTMC | 24 | 3 | 17 | 7 | 17 | 7 | 3 | 7 | 9 | 7 | 2 | 6 | 17 | 6 | 16 | 3 | 13 | 3 | 12 | 3 | 11 | 6 | 14 | 6 | 12 | 6 | 9 | 6 | 6 | 6 | 3 | 6 | 2 | 6 | 15 | 3 | 9 | 3 | 14 | 6 | 0 | 7 | 16 | 7 | 6 | 3 | 8 | 7 | 8 +INPUTS | 1 | E +INPUTP | 1 | 37 +EQ | 2 | + cnt/Er<0>.D = E; + cnt/Er<0>.CLK = FCLK; // GCK +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 0 | 9 | cnt/nIPL2r +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 2 | 7 | 13 | 7 | 16 +INPUTS | 1 | nIPL2 +INPUTP | 1 | 146 +EQ | 2 | + cnt/nIPL2r.D = nIPL2; + cnt/nIPL2r.CLK = FCLK; // GCK +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 0 | 6 | iobm/DTACKrf +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 4 | 5 | 9 | 5 | 15 | 5 | 17 | 5 | 16 INPUTS | 1 | nDTACK_IOB INPUTP | 1 | 127 EQ | 2 | @@ -1425,9 +1302,9 @@ EQ | 2 | !iobm/DTACKrf.CLK = C16M; // GCK GLOBALS | 1 | 2 | C16M -MACROCELL | 1 | 15 | iobm/DTACKrr +MACROCELL | 0 | 5 | iobm/DTACKrr ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 4 | 5 | 12 | 3 | 17 | 5 | 17 | 3 | 0 +OUTPUTMC | 4 | 5 | 9 | 5 | 15 | 5 | 17 | 5 | 16 INPUTS | 1 | nDTACK_IOB INPUTP | 1 | 127 EQ | 2 | @@ -1435,48 +1312,28 @@ EQ | 2 | iobm/DTACKrr.CLK = C16M; // GCK GLOBALS | 1 | 2 | C16M -MACROCELL | 5 | 2 | iobm/DoutOE +MACROCELL | 5 | 0 | iobm/ETACK ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 1 | 3 | 4 -INPUTS | 3 | iobs/IORW0 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd3 -INPUTMC | 3 | 2 | 14 | 5 | 12 | 5 | 4 +OUTPUTMC | 3 | 5 | 9 | 5 | 15 | 5 | 17 +INPUTS | 6 | nVMA_IOB | iobm/ES<0> | iobm/ES<1> | iobm/ES<2> | iobm/ES<3> | iobm/ES<4> +INPUTMC | 6 | 5 | 1 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 EQ | 3 | - iobm/DoutOE.D = iobs/IORW0 & iobm/IOS_FSM_FFd3 - # iobs/IORW0 & iobm/IOS_FSM_FFd2; - iobm/DoutOE.CLK = C16M; // GCK + iobm/ETACK.D = !nVMA_IOB & !iobm/ES<0> & !iobm/ES<1> & !iobm/ES<2> & + !iobm/ES<3> & iobm/ES<4>; + iobm/ETACK.CLK = C16M; // GCK GLOBALS | 1 | 2 | C16M -MACROCELL | 1 | 13 | iobm/Er2 +MACROCELL | 1 | 17 | iobm/Er2 ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 5 | 5 | 7 | 5 | 6 | 5 | 15 | 5 | 5 | 5 | 9 +OUTPUTMC | 5 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 INPUTS | 1 | iobm/Er -INPUTMC | 1 | 1 | 14 +INPUTMC | 1 | 0 | 4 EQ | 2 | iobm/Er2.D = iobm/Er; iobm/Er2.CLK = C16M; // GCK GLOBALS | 1 | 2 | C16M -MACROCELL | 1 | 11 | iobm/RESrf -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 4 | 5 | 12 | 3 | 16 | 5 | 16 | 3 | 0 -INPUTS | 1 | nRES.PIN -INPUTP | 1 | 145 -EQ | 2 | - iobm/RESrf.D = !nRES.PIN; - !iobm/RESrf.CLK = C16M; // GCK -GLOBALS | 1 | 2 | C16M - -MACROCELL | 1 | 10 | iobm/RESrr -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 4 | 5 | 12 | 3 | 16 | 5 | 16 | 3 | 0 -INPUTS | 1 | nRES.PIN -INPUTP | 1 | 145 -EQ | 2 | - iobm/RESrr.D = !nRES.PIN; - iobm/RESrr.CLK = C16M; // GCK -GLOBALS | 1 | 2 | C16M - -MACROCELL | 1 | 9 | iobm/VPArf +MACROCELL | 1 | 13 | iobm/VPArf ATTRIBUTES | 8553216 | 0 OUTPUTMC | 1 | 5 | 1 INPUTS | 1 | nVPA_IOB @@ -1486,7 +1343,7 @@ EQ | 2 | !iobm/VPArf.CLK = C16M; // GCK GLOBALS | 1 | 2 | C16M -MACROCELL | 1 | 8 | iobm/VPArr +MACROCELL | 1 | 12 | iobm/VPArr ATTRIBUTES | 8553216 | 0 OUTPUTMC | 1 | 5 | 1 INPUTS | 1 | nVPA_IOB @@ -1496,147 +1353,217 @@ EQ | 2 | iobm/VPArr.CLK = C16M; // GCK GLOBALS | 1 | 2 | C16M -MACROCELL | 7 | 3 | iobs/ALE0 +MACROCELL | 0 | 16 | ALE0M +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 1 | 5 | 14 +INPUTS | 4 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd3 | iobm/IOREQr +INPUTMC | 4 | 0 | 15 | 5 | 9 | 5 | 2 | 1 | 16 +EQ | 4 | + !ALE0M.D = iobm/IOS_FSM_FFd1 & !iobm/IOS_FSM_FFd2 + # !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd2 & + !iobm/IOREQr; + ALE0M.CLK = C16M; // GCK +GLOBALS | 1 | 2 | C16M + +MACROCELL | 0 | 11 | ALE0S ATTRIBUTES | 8553216 | 0 OUTPUTMC | 1 | 5 | 14 INPUTS | 2 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 -INPUTMC | 2 | 7 | 13 | 7 | 6 +INPUTMC | 2 | 4 | 6 | 4 | 9 EQ | 2 | - iobs/ALE0.D = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1; - iobs/ALE0.CLK = FCLK; // GCK + ALE0S.D = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1; + ALE0S.CLK = FCLK; // GCK GLOBALS | 1 | 2 | FCLK -MACROCELL | 7 | 2 | iobs/Clear1 +MACROCELL | 2 | 15 | IOREQ ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 2 | 5 | 13 | 7 | 1 -INPUTS | 4 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nADoutLE1 | A_FSB<19> -INPUTMC | 3 | 7 | 13 | 7 | 6 | 5 | 13 -INPUTP | 1 | 26 -EXPORTS | 1 | 7 | 1 -EQ | 3 | - iobs/Clear1.D = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & !nADoutLE1; - iobs/Clear1.CLK = FCLK; // GCK - iobs/Clear1.EXP = A_FSB<19> -GLOBALS | 1 | 2 | FCLK - -MACROCELL | 2 | 6 | iobs/IOREQ -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 2 | 1 | 12 | 2 | 7 -INPUTS | 23 | iobs/PS_FSM_FFd1 | nADoutLE1 | iobs/PS_FSM_FFd2 | iobs/IOACTr | A_FSB<9> | A_FSB<8> | A_FSB<15> | A_FSB<14> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | fsb/Ready1r | iobs/IOReady | EXP17_.EXP -INPUTMC | 7 | 7 | 6 | 5 | 13 | 7 | 13 | 0 | 5 | 2 | 9 | 0 | 16 | 2 | 5 -INPUTP | 16 | 12 | 11 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22 -EXPORTS | 1 | 2 | 7 -IMPORTS | 1 | 2 | 5 -EQ | 38 | - iobs/IOREQ.D = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 +OUTPUTMC | 1 | 1 | 16 +INPUTS | 10 | iobs/PS_FSM_FFd1 | nADoutLE1 | iobs/PS_FSM_FFd2 | iobs/IOACTr | A_FSB<23> | iobs/Once | nAS_FSB | fsb/ASrf | EXP18_.EXP | nROMWE_OBUF.EXP +INPUTMC | 8 | 4 | 9 | 5 | 13 | 4 | 6 | 0 | 3 | 4 | 16 | 3 | 6 | 2 | 14 | 2 | 16 +INPUTP | 2 | 36 | 54 +IMPORTS | 2 | 2 | 14 | 2 | 16 +EQ | 30 | + IOREQ.D = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 # iobs/PS_FSM_FFd2 & !iobs/IOACTr # !iobs/PS_FSM_FFd1 & !nADoutLE1 -;Imported pterms FB3_6 # A_FSB<23> & !iobs/Once & !nAS_FSB & !iobs/PS_FSM_FFd1 # A_FSB<23> & !iobs/Once & !iobs/PS_FSM_FFd1 & fsb/ASrf +;Imported pterms FB3_15 # A_FSB<22> & A_FSB<21> & !iobs/Once & !nAS_FSB & !iobs/PS_FSM_FFd1 # A_FSB<22> & A_FSB<21> & !iobs/Once & !iobs/PS_FSM_FFd1 & fsb/ASrf # A_FSB<22> & A_FSB<20> & !iobs/Once & !nAS_FSB & !iobs/PS_FSM_FFd1 -;Imported pterms FB3_5 # A_FSB<22> & A_FSB<20> & !iobs/Once & !iobs/PS_FSM_FFd1 & fsb/ASrf # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd1 + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd1 +;Imported pterms FB3_17 # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !iobs/PS_FSM_FFd1 & fsb/ASrf + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !iobs/PS_FSM_FFd1 & fsb/ASrf # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd1 + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd1 # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !iobs/PS_FSM_FFd1 & fsb/ASrf; - iobs/IOREQ.CLK = FCLK; // GCK - iobs/IOREQ.EXP = A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & - A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & - A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & - A_FSB<17> & A_FSB<16> & fsb/Ready1r - # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & - A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & - A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & - A_FSB<17> & A_FSB<16> & iobs/IOReady + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !iobs/PS_FSM_FFd1 & fsb/ASrf; + IOREQ.CLK = FCLK; // GCK GLOBALS | 1 | 2 | FCLK -MACROCELL | 4 | 16 | ram/RAMReady +MACROCELL | 3 | 8 | cnt/Er<1> ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 5 | 4 | 6 | 2 | 8 | 2 | 7 | 2 | 17 | 4 | 17 -INPUTS | 13 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/RefUrgent | ram/RS_FSM_FFd3 | nAS_FSB | fsb/ASrf | A_FSB<23> | ram/BACTr | A_FSB<22> | A_FSB<21> | cs/nOverlay1 | ram/RAMEN | EXP25_.EXP -INPUTMC | 9 | 7 | 8 | 4 | 12 | 0 | 1 | 7 | 10 | 0 | 6 | 7 | 16 | 4 | 3 | 4 | 9 | 4 | 15 -INPUTP | 4 | 54 | 36 | 30 | 29 -EXPORTS | 1 | 4 | 17 -IMPORTS | 1 | 4 | 15 -EQ | 34 | - ram/RAMReady.D = ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & - !ram/RefUrgent & !ram/RS_FSM_FFd3 - # A_FSB<23> & !ram/RS_FSM_FFd2 & !ram/RefUrgent & - !ram/RS_FSM_FFd3 & ram/BACTr - # nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RefUrgent & - !ram/RS_FSM_FFd3 & !fsb/ASrf -;Imported pterms FB5_16 - # A_FSB<23> & !ram/RS_FSM_FFd2 & !ram/RefUrgent & - !ram/RS_FSM_FFd3 & !ram/RefReq - # A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd2 & - !ram/RefUrgent & !ram/RS_FSM_FFd3 & ram/BACTr - # A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd2 & - !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq - # A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd2 & - !ram/RefUrgent & !ram/RS_FSM_FFd3 & ram/BACTr - # !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd2 & - !ram/RefUrgent & !ram/RS_FSM_FFd3 & ram/BACTr -;Imported pterms FB5_15 - # A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd2 & - !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq - # !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd2 & - !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - !ram/RS_FSM_FFd2 & !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RAMEN - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RefUrgent & - !ram/RS_FSM_FFd3 & !ram/RAMEN; - ram/RAMReady.CLK = FCLK; // GCK - ram/RAMReady.EXP = !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & +OUTPUTMC | 23 | 3 | 17 | 7 | 17 | 7 | 3 | 7 | 9 | 7 | 2 | 6 | 17 | 6 | 16 | 3 | 13 | 3 | 12 | 3 | 11 | 6 | 14 | 6 | 12 | 6 | 9 | 6 | 6 | 6 | 3 | 6 | 2 | 6 | 15 | 3 | 9 | 3 | 14 | 6 | 0 | 7 | 16 | 7 | 6 | 7 | 8 +INPUTS | 1 | cnt/Er<0> +INPUTMC | 1 | 0 | 10 +EQ | 2 | + cnt/Er<1>.D = cnt/Er<0>; + cnt/Er<1>.CLK = FCLK; // GCK +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 3 | 6 | fsb/ASrf +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 34 | 4 | 16 | 2 | 13 | 2 | 0 | 7 | 8 | 2 | 12 | 2 | 5 | 2 | 9 | 4 | 14 | 7 | 11 | 2 | 7 | 7 | 0 | 4 | 5 | 7 | 15 | 4 | 6 | 7 | 13 | 4 | 2 | 3 | 2 | 2 | 15 | 7 | 10 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 4 | 2 | 6 | 2 | 14 | 2 | 16 | 2 | 17 | 4 | 7 | 4 | 8 | 4 | 15 | 4 | 17 | 7 | 1 | 7 | 12 | 7 | 16 +INPUTS | 1 | nAS_FSB +INPUTP | 1 | 54 +EQ | 2 | + fsb/ASrf.D = !nAS_FSB; + !fsb/ASrf.CLK = FCLK; // GCK +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 0 | 8 | iobm/BERRrf +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 4 | 5 | 9 | 5 | 15 | 5 | 17 | 5 | 16 +INPUTS | 1 | nBERR_IOB +INPUTP | 1 | 123 +EQ | 2 | + iobm/BERRrf.D = !nBERR_IOB; + !iobm/BERRrf.CLK = C16M; // GCK +GLOBALS | 1 | 2 | C16M + +MACROCELL | 0 | 7 | iobm/BERRrr +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 4 | 5 | 9 | 5 | 15 | 5 | 17 | 5 | 16 +INPUTS | 1 | nBERR_IOB +INPUTP | 1 | 123 +EQ | 2 | + iobm/BERRrr.D = !nBERR_IOB; + iobm/BERRrr.CLK = C16M; // GCK +GLOBALS | 1 | 2 | C16M + +MACROCELL | 5 | 6 | iobm/DoutOE +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 1 | 3 | 4 +INPUTS | 6 | IORW0 | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd2 | iobm/IOS_FSM_FFd1 | iobm/IOREQr | nAoutOE +INPUTMC | 6 | 2 | 0 | 5 | 2 | 5 | 9 | 0 | 15 | 1 | 16 | 3 | 1 +EQ | 5 | + iobm/DoutOE.D = !IORW0 & iobm/IOS_FSM_FFd3 + # !IORW0 & iobm/IOS_FSM_FFd2 + # !iobm/IOS_FSM_FFd3 & !iobm/IOS_FSM_FFd1 & + !iobm/IOS_FSM_FFd2 & !iobm/IOREQr & !nAoutOE; + iobm/DoutOE.CLK = C16M; // GCK +GLOBALS | 1 | 2 | C16M + +MACROCELL | 1 | 15 | iobm/RESrf +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 3 | 5 | 9 | 5 | 14 | 5 | 16 +INPUTS | 1 | nRES.PIN +INPUTP | 1 | 145 +EQ | 2 | + iobm/RESrf.D = !nRES.PIN; + !iobm/RESrf.CLK = C16M; // GCK +GLOBALS | 1 | 2 | C16M + +MACROCELL | 1 | 14 | iobm/RESrr +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 3 | 5 | 9 | 5 | 14 | 5 | 16 +INPUTS | 1 | nRES.PIN +INPUTP | 1 | 145 +EQ | 2 | + iobm/RESrr.D = !nRES.PIN; + iobm/RESrr.CLK = C16M; // GCK +GLOBALS | 1 | 2 | C16M + +MACROCELL | 2 | 17 | iobs/Clear1 +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 2 | 5 | 13 | 2 | 0 +INPUTS | 12 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nADoutLE1 | iobs/IORW1 | A_FSB<23> | A_FSB<21> | A_FSB<20> | IORW0 | iobs/Once | nWE_FSB | nAS_FSB | fsb/ASrf +INPUTMC | 7 | 4 | 6 | 4 | 9 | 5 | 13 | 2 | 10 | 2 | 0 | 4 | 16 | 3 | 6 +INPUTP | 5 | 36 | 29 | 28 | 47 | 54 +EXPORTS | 1 | 2 | 0 +EQ | 10 | + iobs/Clear1.D = iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & !nADoutLE1; + iobs/Clear1.CLK = FCLK; // GCK + iobs/Clear1.EXP = !iobs/IORW1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & + !nADoutLE1 + # !A_FSB<23> & !A_FSB<21> & !A_FSB<20> & !IORW0 & + nADoutLE1 + # A_FSB<23> & !iobs/Once & !nWE_FSB & !nAS_FSB & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 + # A_FSB<23> & !iobs/Once & !nWE_FSB & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1 +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 3 | 3 | nRESout +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 1 | 3 | 7 +INPUTS | 2 | cnt/INITS_FSM_FFd1 | cnt/INITS_FSM_FFd2 +INPUTMC | 2 | 7 | 16 | 7 | 6 +EQ | 2 | + nRESout.D = cnt/INITS_FSM_FFd1 & !cnt/INITS_FSM_FFd2; + nRESout.CLK = FCLK; // GCK +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 7 | 10 | ram/RAMReady +ATTRIBUTES | 8553216 | 0 +OUTPUTMC | 3 | 7 | 8 | 2 | 4 | 2 | 8 +INPUTS | 14 | A_FSB<23> | A_FSB<22> | cs/nOverlay | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | ram/RefUrg | ram/RAMEN | nAS_FSB | fsb/ASrf | ram/RefReq | ram/BACTr | cnt/Timer<1>.EXP | nBERR_FSB_OBUF.EXP +INPUTMC | 11 | 2 | 13 | 0 | 12 | 4 | 7 | 7 | 15 | 0 | 0 | 7 | 13 | 3 | 6 | 0 | 2 | 3 | 2 | 7 | 9 | 7 | 11 +INPUTP | 3 | 36 | 30 | 54 +IMPORTS | 2 | 7 | 9 | 7 | 11 +EQ | 22 | + ram/RAMReady.D = ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg + # !cs/nOverlay & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & ram/BACTr + # !cs/nOverlay & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & !ram/RefReq + # nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & !fsb/ASrf + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & !ram/RefUrg & !ram/RAMEN - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & !ram/RAMEN & - fsb/ASrf +;Imported pterms FB8_10 + # A_FSB<23> & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & !ram/RefReq + # A_FSB<22> & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & ram/BACTr + # A_FSB<22> & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & !ram/RefReq +;Imported pterms FB8_12 + # A_FSB<23> & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & ram/BACTr; + ram/RAMReady.CLK = FCLK; // GCK GLOBALS | 1 | 2 | FCLK -MACROCELL | 0 | 4 | ram/RefRAS +MACROCELL | 3 | 0 | ram/RegUrgSync ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 1 | 7 | 4 -INPUTS | 2 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 -INPUTMC | 2 | 7 | 8 | 4 | 12 +OUTPUTMC | 1 | 0 | 0 +INPUTS | 1 | RefUrg +INPUTMC | 1 | 3 | 17 EQ | 2 | - ram/RefRAS.D = !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2; - ram/RefRAS.CLK = FCLK; // GCK -GLOBALS | 1 | 2 | FCLK - -MACROCELL | 0 | 0 | ram/RegUrgentSync -ATTRIBUTES | 8553216 | 0 -OUTPUTMC | 1 | 0 | 1 -INPUTS | 1 | cnt/RefUrgent -INPUTMC | 1 | 0 | 15 -EQ | 2 | - ram/RegUrgentSync.D = cnt/RefUrgent; - ram/RegUrgentSync.CLK = FCLK; // GCK + ram/RegUrgSync.D = RefUrg; + ram/RegUrgSync.CLK = FCLK; // GCK GLOBALS | 1 | 2 | FCLK MACROCELL | 6 | 5 | RA_0_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 3 | A_FSB<10> | ram/RASEL | A_FSB<1> -INPUTMC | 1 | 4 | 0 +INPUTMC | 1 | 7 | 0 INPUTP | 2 | 13 | 149 EQ | 2 | RA<0> = A_FSB<10> & !ram/RASEL @@ -1645,7 +1572,7 @@ EQ | 2 | MACROCELL | 6 | 1 | RA_1_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 3 | A_FSB<11> | ram/RASEL | A_FSB<2> -INPUTMC | 1 | 4 | 0 +INPUTMC | 1 | 7 | 0 INPUTP | 2 | 15 | 153 EQ | 2 | RA<1> = A_FSB<11> & !ram/RASEL @@ -1655,7 +1582,7 @@ MACROCELL | 4 | 13 | RA_2_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 4 | 14 INPUTS | 4 | A_FSB<12> | ram/RASEL | A_FSB<3> | A_FSB<7> -INPUTMC | 1 | 4 | 0 +INPUTMC | 1 | 7 | 0 INPUTP | 3 | 17 | 155 | 8 EXPORTS | 1 | 4 | 14 EQ | 3 | @@ -1665,87 +1592,71 @@ EQ | 3 | MACROCELL | 4 | 10 | RA_3_OBUF ATTRIBUTES | 264962 | 0 -OUTPUTMC | 1 | 4 | 11 -INPUTS | 5 | A_FSB<13> | ram/RASEL | A_FSB<4> | A_FSB<15> | A_FSB<6> -INPUTMC | 1 | 4 | 0 -INPUTP | 4 | 18 | 157 | 21 | 6 -EXPORTS | 1 | 4 | 11 -EQ | 4 | +INPUTS | 3 | A_FSB<13> | ram/RASEL | A_FSB<4> +INPUTMC | 1 | 7 | 0 +INPUTP | 2 | 18 | 157 +EQ | 2 | RA<3> = A_FSB<13> & !ram/RASEL # ram/RASEL & A_FSB<4>; - RA_3_OBUF.EXP = A_FSB<15> & !ram/RASEL - # ram/RASEL & A_FSB<6> MACROCELL | 4 | 8 | RA_4_OBUF ATTRIBUTES | 264962 | 0 -OUTPUTMC | 1 | 4 | 9 -INPUTS | 11 | A_FSB<14> | ram/RASEL | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | nAS_FSB | ram/RS_FSM_FFd1 | ram/RAMEN | fsb/ASrf | A_FSB<21> | cs/nOverlay0.EXP -INPUTMC | 6 | 4 | 0 | 4 | 3 | 7 | 8 | 4 | 9 | 0 | 6 | 4 | 7 -INPUTP | 5 | 19 | 36 | 30 | 54 | 29 -EXPORTS | 1 | 4 | 9 -IMPORTS | 1 | 4 | 7 -EQ | 11 | - RA<4> = A_FSB<14> & !ram/RASEL -;Imported pterms FB5_8 +OUTPUTMC | 1 | 4 | 7 +INPUTS | 11 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/RefUrg | fsb/ASrf | A_FSB<23> | A_FSB<22> | cs/nOverlay | nAS_FSB | ram/RS_FSM_FFd3 | ram/RAMEN | iobs/PS_FSM_FFd1.EXP +INPUTMC | 8 | 0 | 12 | 4 | 7 | 0 | 0 | 3 | 6 | 2 | 13 | 7 | 15 | 7 | 13 | 4 | 9 +INPUTP | 3 | 36 | 30 | 54 +EXPORTS | 1 | 4 | 7 +IMPORTS | 1 | 4 | 9 +EQ | 15 | + RA<4> = ;Imported pterms FB5_10 + A_FSB<14> & !ram/RASEL # ram/RASEL & A_FSB<5>; - RA_4_OBUF.EXP = !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB & - !ram/RS_FSM_FFd1 & ram/RAMEN - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - !ram/RS_FSM_FFd1 & ram/RAMEN & fsb/ASrf - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & ram/RAMEN - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !ram/RS_FSM_FFd1 & ram/RAMEN & fsb/ASrf + RA_4_OBUF.EXP = ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 & ram/RefUrg & + fsb/ASrf + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay & !nAS_FSB & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & ram/RefUrg + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay & !nAS_FSB & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & ram/RAMEN + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & ram/RefUrg & + fsb/ASrf + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay & + !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & ram/RAMEN & + fsb/ASrf MACROCELL | 4 | 11 | RA_5_OBUF ATTRIBUTES | 264962 | 0 -OUTPUTMC | 1 | 4 | 12 -INPUTS | 10 | nAS_FSB | ram/RS_FSM_FFd2 | ram/RefUrgent | ram/RS_FSM_FFd3 | fsb/ASrf | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | A_FSB<21> | RA_3_OBUF.EXP -INPUTMC | 6 | 4 | 12 | 0 | 1 | 7 | 10 | 0 | 6 | 4 | 3 | 4 | 10 -INPUTP | 4 | 54 | 36 | 30 | 29 -EXPORTS | 1 | 4 | 12 -IMPORTS | 1 | 4 | 10 -EQ | 13 | - RA<5> = ;Imported pterms FB5_11 - A_FSB<15> & !ram/RASEL +INPUTS | 3 | A_FSB<15> | ram/RASEL | A_FSB<6> +INPUTMC | 1 | 7 | 0 +INPUTP | 2 | 21 | 6 +EQ | 2 | + RA<5> = A_FSB<15> & !ram/RASEL # ram/RASEL & A_FSB<6>; - RA_5_OBUF.EXP = nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RefUrgent & - !ram/RS_FSM_FFd3 & !fsb/ASrf - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & fsb/ASrf - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & fsb/ASrf MACROCELL | 4 | 14 | RA_6_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 4 | 15 -INPUTS | 12 | A_FSB<16> | ram/RASEL | A_FSB<22> | cs/nOverlay1 | ram/RS_FSM_FFd2 | ram/RefUrgent | ram/RS_FSM_FFd3 | ram/RefReq | A_FSB<23> | ram/RAMEN | A_FSB<21> | RA_2_OBUF.EXP -INPUTMC | 8 | 4 | 0 | 4 | 3 | 4 | 12 | 0 | 1 | 7 | 10 | 0 | 3 | 4 | 9 | 4 | 13 -INPUTP | 4 | 22 | 30 | 36 | 29 +INPUTS | 11 | A_FSB<16> | ram/RASEL | iobs/IOReady | nAS_FSB | fsb/ASrf | iobs/Once | iobs/PS_FSM_FFd2 | iobs/IOACTr | IOBERR | nADoutLE1 | RA_2_OBUF.EXP +INPUTMC | 9 | 7 | 0 | 4 | 15 | 3 | 6 | 4 | 16 | 4 | 6 | 0 | 3 | 5 | 17 | 5 | 13 | 4 | 13 +INPUTP | 2 | 22 | 54 EXPORTS | 1 | 4 | 15 IMPORTS | 1 | 4 | 13 -EQ | 12 | +EQ | 10 | RA<6> = A_FSB<16> & !ram/RASEL ;Imported pterms FB5_14 # ram/RASEL & A_FSB<7>; - RA_6_OBUF.EXP = A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd2 & - !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq - # !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd2 & - !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - !ram/RS_FSM_FFd2 & !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RAMEN - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RefUrgent & - !ram/RS_FSM_FFd3 & !ram/RAMEN + RA_6_OBUF.EXP = iobs/IOReady & nAS_FSB & !fsb/ASrf + # iobs/Once & iobs/IOReady & !iobs/PS_FSM_FFd2 & + !iobs/IOACTr & IOBERR & nADoutLE1 + # iobs/Once & !iobs/IOReady & !nAS_FSB & + !iobs/PS_FSM_FFd2 & !iobs/IOACTr & !IOBERR & nADoutLE1 + # iobs/Once & !iobs/IOReady & !iobs/PS_FSM_FFd2 & + !iobs/IOACTr & !IOBERR & fsb/ASrf & nADoutLE1 MACROCELL | 6 | 4 | RA_7_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 3 | A_FSB<17> | ram/RASEL | A_FSB<8> -INPUTMC | 1 | 4 | 0 +INPUTMC | 1 | 7 | 0 INPUTP | 2 | 23 | 11 EQ | 2 | RA<7> = A_FSB<8> & ram/RASEL @@ -1753,27 +1664,21 @@ EQ | 2 | MACROCELL | 6 | 7 | RA_8_OBUF ATTRIBUTES | 264962 | 0 -INPUTS | 8 | A_FSB<23> | A_FSB<18> | ram/RASEL | A_FSB<22> | A_FSB<21> | cs/nOverlay1 | cnt/LTimer<7>.EXP | A_FSB_21_IBUF$BUF0.EXP -INPUTMC | 4 | 4 | 0 | 4 | 3 | 6 | 6 | 6 | 8 -INPUTP | 4 | 36 | 24 | 30 | 29 -IMPORTS | 2 | 6 | 6 | 6 | 8 -EQ | 11 | +INPUTS | 6 | A_FSB<18> | cs/nOverlay | A_FSB<22> | A_FSB<23> | ram/RASEL | A_FSB<9> +INPUTMC | 2 | 2 | 13 | 7 | 0 +INPUTP | 4 | 24 | 30 | 36 | 12 +EQ | 6 | RA<8> = A_FSB<23> & A_FSB<18> + # A_FSB<22> & A_FSB<18> + # A_FSB<18> & !cs/nOverlay # A_FSB<18> & !ram/RASEL - # A_FSB<22> & !A_FSB<21> & A_FSB<18> - # A_FSB<22> & A_FSB<18> & cs/nOverlay1 - # !A_FSB<22> & A_FSB<18> & !cs/nOverlay1 -;Imported pterms FB7_7 - # A_FSB<9> & !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - ram/RASEL -;Imported pterms FB7_9 - # A_FSB<9> & !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & ram/RASEL; + # A_FSB<9> & !A_FSB<23> & !A_FSB<22> & cs/nOverlay & + ram/RASEL; MACROCELL | 6 | 10 | RA_9_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 3 | A_FSB<19> | ram/RASEL | A_FSB<20> -INPUTMC | 1 | 4 | 0 +INPUTMC | 1 | 7 | 0 INPUTP | 2 | 26 | 28 EQ | 2 | RA<9> = A_FSB<20> & ram/RASEL @@ -1782,63 +1687,109 @@ EQ | 2 | MACROCELL | 3 | 4 | nDoutOE_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 2 | iobm/DoutOE | nAoutOE -INPUTMC | 2 | 5 | 2 | 3 | 1 +INPUTMC | 2 | 5 | 6 | 3 | 1 EQ | 1 | !nDoutOE = iobm/DoutOE & !nAoutOE; MACROCELL | 4 | 5 | nOE_OBUF ATTRIBUTES | 264962 | 0 -INPUTS | 2 | nWE_FSB | nAS_FSB -INPUTP | 2 | 47 | 54 -EQ | 1 | - !nOE = nWE_FSB & !nAS_FSB; +OUTPUTMC | 1 | 4 | 6 +INPUTS | 17 | A_FSB<22> | A_FSB<21> | iobs/Once | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | fsb/ASrf | A_FSB<20> | nAS_FSB | A_FSB<14> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | cs/nOverlay | nWE_FSB | A_FSB<13> | nCAS_OBUF.EXP +INPUTMC | 6 | 4 | 16 | 4 | 6 | 4 | 9 | 3 | 6 | 2 | 13 | 4 | 4 +INPUTP | 11 | 30 | 29 | 28 | 54 | 19 | 26 | 24 | 23 | 22 | 47 | 18 +EXPORTS | 1 | 4 | 6 +IMPORTS | 1 | 4 | 4 +EQ | 14 | + !nOE = ;Imported pterms FB5_5 + nWE_FSB & !nAS_FSB; + nOE_OBUF.EXP = A_FSB<22> & A_FSB<21> & !iobs/Once & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf + # A_FSB<22> & A_FSB<20> & !iobs/Once & !nAS_FSB & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 + # A_FSB<22> & A_FSB<20> & !iobs/Once & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf + # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 + # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 MACROCELL | 2 | 16 | nROMWE_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 2 | 15 -INPUTS | 16 | nWE_FSB | nAS_FSB | A_FSB<14> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | iobs/Once | cs/nOverlay1 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | fsb/ASrf | nADoutLE1 | A_FSB<13> -INPUTMC | 6 | 7 | 0 | 4 | 3 | 7 | 13 | 7 | 6 | 0 | 6 | 5 | 13 +INPUTS | 14 | nWE_FSB | nAS_FSB | A_FSB<14> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | iobs/Once | cs/nOverlay | iobs/PS_FSM_FFd1 | fsb/ASrf | A_FSB<13> +INPUTMC | 4 | 4 | 16 | 2 | 13 | 4 | 9 | 3 | 6 INPUTP | 10 | 47 | 54 | 19 | 29 | 28 | 26 | 24 | 23 | 22 | 18 EXPORTS | 1 | 2 | 15 -EQ | 9 | +EQ | 10 | !nROMWE = !nWE_FSB & !nAS_FSB; nROMWE_OBUF.EXP = A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & - nADoutLE1 + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !iobs/PS_FSM_FFd1 & fsb/ASrf # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & - nADoutLE1 + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd1 + # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !iobs/PS_FSM_FFd1 & fsb/ASrf MACROCELL | 3 | 10 | nVPA_FSB_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 2 | fsb/VPA | nAS_FSB -INPUTMC | 1 | 2 | 0 +INPUTMC | 1 | 2 | 5 INPUTP | 1 | 54 EQ | 1 | !nVPA_FSB = fsb/VPA & !nAS_FSB; -MACROCELL | 5 | 16 | iobm/nDinLE -ATTRIBUTES | 8684290 | 0 -OUTPUTMC | 1 | 5 | 17 -INPUTS | 6 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | C8M | iobm/IOS_FSM_FFd3 | iobm/RESrf | iobm/RESrr -INPUTMC | 5 | 3 | 9 | 5 | 12 | 5 | 4 | 1 | 11 | 1 | 10 -INPUTP | 1 | 35 -EXPORTS | 1 | 5 | 17 -EQ | 4 | - nDinLE.D = iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2; - !nDinLE.CLK = C16M; // GCK - iobm/nDinLE.EXP = C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & - iobm/RESrf & iobm/RESrr -GLOBALS | 1 | 2 | C16M - MACROCELL | 5 | 14 | nADoutLE0_OBUF ATTRIBUTES | 264962 | 0 -INPUTS | 2 | iobm/ALE0 | iobs/ALE0 -INPUTMC | 2 | 5 | 3 | 7 | 3 -EQ | 1 | - nADoutLE0 = !iobm/ALE0 & !iobs/ALE0; +OUTPUTMC | 1 | 5 | 15 +INPUTS | 7 | ALE0M | ALE0S | C8M | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd1 | iobm/RESrf | iobm/RESrr +INPUTMC | 6 | 0 | 16 | 0 | 11 | 5 | 2 | 0 | 15 | 1 | 15 | 1 | 14 +INPUTP | 1 | 35 +EXPORTS | 1 | 5 | 15 +EQ | 3 | + nADoutLE0 = !ALE0M & !ALE0S; + nADoutLE0_OBUF.EXP = C8M & iobm/IOS_FSM_FFd3 & iobm/IOS_FSM_FFd1 & + iobm/RESrf & iobm/RESrr + +MACROCELL | 4 | 4 | nCAS_OBUF +ATTRIBUTES | 8684290 | 0 +OUTPUTMC | 1 | 4 | 5 +INPUTS | 3 | ram/RASEL | nWE_FSB | nAS_FSB +INPUTMC | 1 | 7 | 0 +INPUTP | 2 | 47 | 54 +EXPORTS | 1 | 4 | 5 +EQ | 3 | + nCAS.D = !ram/RASEL; + !nCAS.CLK = FCLK; // GCK + nCAS_OBUF.EXP = nWE_FSB & !nAS_FSB +GLOBALS | 1 | 2 | FCLK + +MACROCELL | 5 | 16 | nDinLE_OBUF +ATTRIBUTES | 8684290 | 0 +OUTPUTMC | 1 | 5 | 17 +INPUTS | 12 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | C8M | nBERR_IOB | iobm/IOS_FSM_FFd3 | IOBERR | iobm/RESrf | iobm/RESrr | iobm/DTACKrf | iobm/DTACKrr | iobm/BERRrf | iobm/BERRrr +INPUTMC | 10 | 0 | 15 | 5 | 9 | 5 | 2 | 5 | 17 | 1 | 15 | 1 | 14 | 0 | 6 | 0 | 5 | 0 | 8 | 0 | 7 +INPUTP | 2 | 35 | 123 +EXPORTS | 1 | 5 | 17 +EQ | 14 | + nDinLE.D = iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2; + !nDinLE.CLK = C16M; // GCK + nDinLE_OBUF.EXP = C8M & nBERR_IOB & iobm/IOS_FSM_FFd3 & + iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & IOBERR & iobm/RESrf & + iobm/RESrr + # C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 & + iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !IOBERR & iobm/DTACKrf & + iobm/DTACKrr + # C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 & + iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !IOBERR & iobm/BERRrf & + iobm/BERRrr + # C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 & + iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !IOBERR & iobm/RESrf & + iobm/RESrr +GLOBALS | 1 | 2 | C16M MACROCELL | 3 | 5 | nDinOE_OBUF ATTRIBUTES | 264962 | 0 @@ -1849,79 +1800,48 @@ EQ | 3 | # A_FSB<22> & A_FSB<21> & nWE_FSB & !nAS_FSB # A_FSB<22> & A_FSB<20> & nWE_FSB & !nAS_FSB; -MACROCELL | 7 | 4 | nRAS_OBUF -ATTRIBUTES | 264962 | 0 -INPUTS | 7 | ram/RefRAS | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | nAS_FSB | ram/RAMEN | A_FSB<21> -INPUTMC | 3 | 0 | 4 | 4 | 3 | 4 | 9 -INPUTP | 4 | 36 | 30 | 54 | 29 -EQ | 5 | - !nRAS = ram/RefRAS - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB & - ram/RAMEN - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !nAS_FSB & ram/RAMEN; - -MACROCELL | 4 | 4 | ram/nCAS -ATTRIBUTES | 8684290 | 0 -INPUTS | 1 | ram/RASEL -INPUTMC | 1 | 4 | 0 -EQ | 2 | - nCAS.D = !ram/RASEL; - !nCAS.CLK = FCLK; // GCK -GLOBALS | 1 | 2 | FCLK - MACROCELL | 3 | 7 | N0 ATTRIBUTES | 265986 | 0 -INPUTS | 1 | cnt/nRESout -INPUTMC | 1 | 3 | 11 +INPUTS | 1 | nRESout +INPUTMC | 1 | 3 | 3 EQ | 2 | nRES = Gnd; - nRES.OE = !cnt/nRESout; + nRES.OE = !nRESout; MACROCELL | 7 | 1 | A_FSB_19_IBUF$BUF0 ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 7 | 0 -INPUTS | 19 | A_FSB<13> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | iobs/Once | cs/nOverlay1 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | fsb/ASrf | A_FSB<14> | A_FSB<23> | A_FSB<22> | nAS_FSB | nADoutLE1 | iobs/Clear1.EXP -INPUTMC | 7 | 7 | 0 | 4 | 3 | 7 | 13 | 7 | 6 | 0 | 6 | 5 | 13 | 7 | 2 -INPUTP | 12 | 18 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 19 | 36 | 30 | 54 +INPUTS | 11 | A_FSB<23> | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | ram/RefUrg | ram/RefReq | A_FSB<22> | nAS_FSB | fsb/ASrf | cs/nOverlay | ram/RAMEN | cnt/Timer<2>.EXP +INPUTMC | 8 | 4 | 7 | 7 | 15 | 0 | 0 | 0 | 2 | 3 | 6 | 2 | 13 | 7 | 13 | 7 | 2 +INPUTP | 3 | 36 | 30 | 54 EXPORTS | 1 | 7 | 0 IMPORTS | 1 | 7 | 2 -EQ | 17 | +EQ | 12 | RA<11> = ;Imported pterms FB8_3 A_FSB<19>; - A_FSB_19_IBUF$BUF0.EXP = A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf - # A_FSB<14> & !A_FSB<23> & !A_FSB<22> & A_FSB<21> & - A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & - !nWE_FSB & !iobs/Once & cs/nOverlay1 & !nAS_FSB & nADoutLE1 - # A_FSB<14> & !A_FSB<23> & !A_FSB<22> & A_FSB<21> & - A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & - !nWE_FSB & !iobs/Once & cs/nOverlay1 & fsb/ASrf & nADoutLE1 - # A_FSB<13> & !A_FSB<23> & !A_FSB<22> & A_FSB<21> & - A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & - !nWE_FSB & !iobs/Once & cs/nOverlay1 & !nAS_FSB & nADoutLE1 - # A_FSB<13> & !A_FSB<23> & !A_FSB<22> & A_FSB<21> & - A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & - !nWE_FSB & !iobs/Once & cs/nOverlay1 & fsb/ASrf & nADoutLE1 + A_FSB_19_IBUF$BUF0.EXP = A_FSB<23> & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + !ram/RefUrg & !ram/RefReq + # A_FSB<22> & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + !ram/RefUrg & !ram/RefReq + # nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & + !ram/RefUrg & !fsb/ASrf + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay & !nAS_FSB & + !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & !ram/RAMEN + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay & + !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & !ram/RAMEN & fsb/ASrf MACROCELL | 6 | 8 | A_FSB_21_IBUF$BUF0 ATTRIBUTES | 264962 | 0 -OUTPUTMC | 1 | 6 | 7 -INPUTS | 6 | A_FSB<21> | A_FSB<9> | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | ram/RASEL -INPUTMC | 2 | 4 | 3 | 4 | 0 -INPUTP | 4 | 29 | 12 | 36 | 30 -EXPORTS | 1 | 6 | 7 -EQ | 3 | +INPUTS | 1 | A_FSB<21> +INPUTP | 1 | 29 +EQ | 1 | RA<10> = A_FSB<21>; - A_FSB_21_IBUF$BUF0.EXP = A_FSB<9> & !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & ram/RASEL MACROCELL | 5 | 13 | nADoutLE1_OBUF ATTRIBUTES | 8815366 | 0 -OUTPUTMC | 17 | 2 | 16 | 2 | 14 | 2 | 1 | 5 | 13 | 0 | 11 | 2 | 11 | 0 | 16 | 0 | 10 | 2 | 8 | 7 | 10 | 7 | 13 | 7 | 15 | 7 | 2 | 2 | 6 | 2 | 13 | 2 | 15 | 7 | 1 +OUTPUTMC | 19 | 2 | 13 | 2 | 0 | 3 | 16 | 3 | 15 | 2 | 12 | 2 | 4 | 2 | 10 | 4 | 14 | 7 | 11 | 2 | 8 | 4 | 6 | 4 | 2 | 2 | 15 | 2 | 17 | 5 | 13 | 2 | 1 | 2 | 2 | 2 | 6 | 4 | 17 INPUTS | 3 | iobs/Clear1 | nADoutLE1 | iobs/Load1 -INPUTMC | 3 | 7 | 2 | 5 | 13 | 7 | 15 +INPUTMC | 3 | 2 | 17 | 5 | 13 | 4 | 2 EQ | 3 | !nADoutLE1.D = iobs/Load1 # !iobs/Clear1 & !nADoutLE1; @@ -1930,220 +1850,208 @@ GLOBALS | 1 | 2 | FCLK MACROCELL | 3 | 1 | nAoutOE_OBUF ATTRIBUTES | 8815366 | 0 -OUTPUTMC | 6 | 5 | 1 | 5 | 8 | 5 | 10 | 5 | 11 | 5 | 4 | 3 | 4 -INPUTS | 3 | nBR_IOB | cnt/PORS_FSM_FFd1 | cnt/PORS_FSM_FFd2 -INPUTMC | 3 | 7 | 14 | 3 | 6 | 3 | 12 -EQ | 2 | - !nAoutOE.D = !nBR_IOB & cnt/PORS_FSM_FFd1 & !cnt/PORS_FSM_FFd2; - !nAoutOE.CLK = C8M; // GCK -GLOBALS | 1 | 2 | C8M +OUTPUTMC | 8 | 5 | 1 | 5 | 11 | 5 | 8 | 5 | 10 | 5 | 2 | 5 | 6 | 3 | 4 | 3 | 1 +INPUTS | 4 | nBR_IOB | cnt/INITS_FSM_FFd1 | cnt/INITS_FSM_FFd2 | nAoutOE +INPUTMC | 4 | 7 | 14 | 7 | 16 | 7 | 6 | 3 | 1 +EQ | 5 | + !nAoutOE.D = !nBR_IOB & cnt/INITS_FSM_FFd1 & + cnt/INITS_FSM_FFd2 + # cnt/INITS_FSM_FFd1 & !cnt/INITS_FSM_FFd2 & + !nAoutOE; + nAoutOE.CLK = FCLK; // GCK +GLOBALS | 1 | 2 | FCLK MACROCELL | 7 | 5 | nRAMLWE_OBUF ATTRIBUTES | 264962 | 0 -INPUTS | 4 | nWE_FSB | nLDS_FSB | nAS_FSB | ram/RAMEN -INPUTMC | 1 | 4 | 9 -INPUTP | 3 | 47 | 49 | 54 +INPUTS | 4 | nLDS_FSB | nWE_FSB | nAS_FSB | ram/RAMEN +INPUTMC | 1 | 7 | 13 +INPUTP | 3 | 49 | 47 | 54 EQ | 1 | - !nRAMLWE = !nWE_FSB & !nLDS_FSB & !nAS_FSB & ram/RAMEN; + !nRAMLWE = !nLDS_FSB & !nWE_FSB & !nAS_FSB & ram/RAMEN; MACROCELL | 7 | 7 | nRAMUWE_OBUF ATTRIBUTES | 264962 | 0 -OUTPUTMC | 1 | 7 | 8 -INPUTS | 12 | ram/RS_FSM_FFd1 | ram/RefUrgent | ram/RS_FSM_FFd3 | fsb/ASrf | A_FSB<23> | A_FSB<22> | cs/nOverlay1 | nAS_FSB | ram/RS_FSM_FFd2 | ram/RAMEN | A_FSB<21> | iobs/PS_FSM_FFd1.EXP -INPUTMC | 8 | 7 | 8 | 0 | 1 | 7 | 10 | 0 | 6 | 4 | 3 | 4 | 12 | 4 | 9 | 7 | 6 -INPUTP | 4 | 36 | 30 | 54 | 29 -EXPORTS | 1 | 7 | 8 -IMPORTS | 1 | 7 | 6 -EQ | 15 | - !nRAMUWE = ;Imported pterms FB8_7 - !nWE_FSB & !nUDS_FSB & !nAS_FSB & ram/RAMEN; - nRAMUWE_OBUF.EXP = ram/RS_FSM_FFd1 & ram/RefUrgent & - !ram/RS_FSM_FFd3 & fsb/ASrf - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB & - !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & ram/RefUrgent & !ram/RAMEN - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & ram/RefUrgent & !ram/RAMEN & - fsb/ASrf - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & - ram/RefUrgent & !ram/RAMEN - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & - ram/RefUrgent & !ram/RAMEN & fsb/ASrf +INPUTS | 4 | nWE_FSB | nUDS_FSB | nAS_FSB | ram/RAMEN +INPUTMC | 1 | 7 | 13 +INPUTP | 3 | 47 | 56 | 54 +EQ | 1 | + !nRAMUWE = !nWE_FSB & !nUDS_FSB & !nAS_FSB & ram/RAMEN; MACROCELL | 4 | 1 | nROMCS_OBUF ATTRIBUTES | 264962 | 0 -OUTPUTMC | 1 | 4 | 0 -INPUTS | 12 | A_FSB<22> | A_FSB<21> | ram/RS_FSM_FFd2 | ram/RefUrgent | ram/RS_FSM_FFd3 | ram/RefReq | cs/nOverlay1 | A_FSB<23> | nAS_FSB | ram/RAMEN | fsb/ASrf | ram/RefDone.EXP -INPUTMC | 8 | 4 | 12 | 0 | 1 | 7 | 10 | 0 | 3 | 4 | 3 | 4 | 9 | 0 | 6 | 4 | 2 -INPUTP | 4 | 30 | 29 | 36 | 54 -EXPORTS | 1 | 4 | 0 -IMPORTS | 1 | 4 | 2 -EQ | 14 | - !nROMCS = ;Imported pterms FB5_3 - !A_FSB<23> & A_FSB<22> & !A_FSB<21> & !A_FSB<20> - # !A_FSB<23> & !A_FSB<21> & !A_FSB<20> & - !cs/nOverlay1; - nROMCS_OBUF.EXP = A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd2 & - !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq - # A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd2 & - !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq - # !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd2 & - !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & !nAS_FSB & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & !ram/RAMEN - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & !ram/RAMEN & fsb/ASrf +OUTPUTMC | 1 | 4 | 2 +INPUTS | 8 | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<16> | nWE_FSB | EXP19_.EXP +INPUTMC | 1 | 4 | 0 +INPUTP | 7 | 36 | 30 | 29 | 28 | 26 | 22 | 47 +EXPORTS | 1 | 4 | 2 +IMPORTS | 1 | 4 | 0 +EQ | 7 | + !nROMCS = !A_FSB<23> & A_FSB<22> & !A_FSB<21> & !A_FSB<20> +;Imported pterms FB5_1 + # !A_FSB<23> & !A_FSB<21> & !A_FSB<20> & !cs/nOverlay; + nROMCS_OBUF.EXP = !A_FSB<23> & !A_FSB<22> & !A_FSB<21> + # !A_FSB<23> & !A_FSB<22> & !A_FSB<19> + # !A_FSB<23> & !A_FSB<22> & !A_FSB<16> + # !A_FSB<23> & !A_FSB<22> & nWE_FSB -MACROCELL | 6 | 11 | N1 +MACROCELL | 6 | 11 | C25MEN_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 0 EQ | 1 | C25MEN = Vcc; -MACROCELL | 6 | 13 | N1$BUF0 +MACROCELL | 6 | 13 | C25MEN_OBUF$BUF0 ATTRIBUTES | 264962 | 0 INPUTS | 0 EQ | 1 | C20MEN = Vcc; -MACROCELL | 2 | 1 | EXP14_ +MACROCELL | 7 | 4 | nRAS_OBUF +ATTRIBUTES | 264962 | 0 +INPUTS | 0 +EQ | 1 | + nRAS = Vcc; + +MACROCELL | 2 | 1 | EXP10_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 2 | 0 -INPUTS | 25 | A_FSB<14> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | cs/nOverlay1 | fsb/Ready1r | fsb/VPA | iobs/IOReady | nAS_FSB | nADoutLE1 | fsb/ASrf | A_FSB<13> | A_FSB<9> | A_FSB<8> | A_FSB<15> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | A_FSB<22> | EXP15_.EXP -INPUTMC | 7 | 4 | 3 | 2 | 9 | 2 | 0 | 0 | 16 | 5 | 13 | 0 | 6 | 2 | 2 -INPUTP | 18 | 19 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 54 | 18 | 12 | 11 | 21 | 17 | 15 | 13 | 36 | 30 +INPUTS | 17 | A_FSB<22> | A_FSB<21> | iobs/Once | nWE_FSB | nAS_FSB | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nADoutLE1 | fsb/ASrf | A_FSB<20> | A_FSB<14> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | cs/nOverlay | EXP11_.EXP +INPUTMC | 7 | 4 | 16 | 4 | 6 | 4 | 9 | 5 | 13 | 3 | 6 | 2 | 13 | 2 | 2 +INPUTP | 10 | 30 | 29 | 47 | 54 | 28 | 19 | 26 | 24 | 23 | 22 EXPORTS | 1 | 2 | 0 IMPORTS | 1 | 2 | 2 -EQ | 29 | - EXP14_.EXP = A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & - !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB & !nADoutLE1 +EQ | 25 | + EXP10_.EXP = A_FSB<22> & A_FSB<21> & !iobs/Once & !nWE_FSB & + !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 + # A_FSB<22> & A_FSB<21> & !iobs/Once & !nWE_FSB & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1 + # A_FSB<22> & A_FSB<20> & !iobs/Once & !nWE_FSB & + !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 + # A_FSB<22> & A_FSB<20> & !iobs/Once & !nWE_FSB & + !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1 # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & - !fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf & !nADoutLE1 + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & + nADoutLE1 +;Imported pterms FB3_3 + # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & + nADoutLE1 # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & - !fsb/Ready1r & fsb/VPA & !iobs/IOReady & !nAS_FSB & !nADoutLE1 + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & + nADoutLE1 # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & cs/nOverlay1 & - !fsb/Ready1r & fsb/VPA & !iobs/IOReady & fsb/ASrf & !nADoutLE1 + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & + nADoutLE1 + +MACROCELL | 2 | 2 | EXP11_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 2 | 1 +INPUTS | 16 | A_FSB<14> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | iobs/Once | cs/nOverlay | nWE_FSB | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | fsb/ASrf | nADoutLE1 | A_FSB<13> | nAS_FSB +INPUTMC | 6 | 4 | 16 | 2 | 13 | 4 | 6 | 4 | 9 | 3 | 6 | 5 | 13 +INPUTP | 10 | 19 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 18 | 54 +EXPORTS | 1 | 2 | 1 +EQ | 12 | + EXP11_.EXP = A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & + nADoutLE1 + # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & + nADoutLE1 + # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & + nADoutLE1 + +MACROCELL | 2 | 3 | EXP12_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 2 | 4 +INPUTS | 18 | A_FSB<9> | A_FSB<8> | A_FSB<15> | A_FSB<14> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | fsb/Ready1r | fsb/ASrf +INPUTMC | 2 | 2 | 12 | 3 | 6 +INPUTP | 16 | 12 | 11 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22 +EXPORTS | 1 | 2 | 4 +EQ | 4 | + EXP12_.EXP = A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & + A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & + A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & + A_FSB<17> & A_FSB<16> & fsb/Ready1r & fsb/ASrf + +MACROCELL | 2 | 4 | EXP13_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 2 | 5 +INPUTS | 21 | A_FSB<22> | A_FSB<20> | fsb/Ready1r | fsb/VPA | iobs/IOReady | fsb/ASrf | A_FSB<23> | cs/nOverlay | fsb/Ready0r | nAS_FSB | ram/RAMReady | A_FSB<14> | A_FSB<21> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | nADoutLE1 | A_FSB<13> | EXP12_.EXP +INPUTMC | 9 | 2 | 12 | 2 | 5 | 4 | 15 | 3 | 6 | 2 | 13 | 7 | 8 | 7 | 10 | 5 | 13 | 2 | 3 +INPUTP | 12 | 30 | 28 | 36 | 54 | 19 | 29 | 26 | 24 | 23 | 22 | 47 | 18 +EXPORTS | 1 | 2 | 5 +IMPORTS | 1 | 2 | 3 +EQ | 19 | + EXP13_.EXP = A_FSB<22> & A_FSB<20> & !fsb/Ready1r & fsb/VPA & + !iobs/IOReady & fsb/ASrf + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay & + !fsb/Ready0r & fsb/VPA & !nAS_FSB & !ram/RAMReady + # !A_FSB<23> & !A_FSB<22> & cs/nOverlay & + !fsb/Ready0r & fsb/VPA & fsb/ASrf & !ram/RAMReady + # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & cs/nOverlay & + !fsb/Ready1r & fsb/VPA & !nWE_FSB & !iobs/IOReady & !nAS_FSB & + !nADoutLE1 + # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & cs/nOverlay & + !fsb/Ready1r & fsb/VPA & !nWE_FSB & !iobs/IOReady & !nAS_FSB & + !nADoutLE1 +;Imported pterms FB3_4 + # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & + A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & + A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & + A_FSB<17> & A_FSB<16> & fsb/Ready1r & fsb/ASrf + +MACROCELL | 2 | 6 | EXP14_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 2 | 5 +INPUTS | 24 | A_FSB<14> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | cs/nOverlay | fsb/Ready1r | fsb/VPA | nWE_FSB | iobs/IOReady | fsb/ASrf | nADoutLE1 | A_FSB<13> | A_FSB<9> | A_FSB<8> | A_FSB<15> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | A_FSB<22> | nAS_FSB +INPUTMC | 6 | 2 | 13 | 2 | 12 | 2 | 5 | 4 | 15 | 3 | 6 | 5 | 13 +INPUTP | 18 | 19 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 18 | 12 | 11 | 21 | 17 | 15 | 13 | 36 | 30 | 54 +EXPORTS | 1 | 2 | 5 +EQ | 20 | + EXP14_.EXP = A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & cs/nOverlay & + !fsb/Ready1r & fsb/VPA & !nWE_FSB & !iobs/IOReady & fsb/ASrf & + !nADoutLE1 + # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & cs/nOverlay & + !fsb/Ready1r & fsb/VPA & !nWE_FSB & !iobs/IOReady & fsb/ASrf & + !nADoutLE1 + # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & + A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & + A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & + A_FSB<17> & A_FSB<16> & fsb/Ready1r & !nAS_FSB # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & iobs/IOReady & !nAS_FSB -;Imported pterms FB3_3 - # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & - A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & - A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & - A_FSB<17> & A_FSB<16> & fsb/Ready1r & !nAS_FSB - # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & - A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & - A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & - A_FSB<17> & A_FSB<16> & fsb/Ready1r & fsb/ASrf # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & iobs/IOReady & fsb/ASrf -MACROCELL | 2 | 2 | EXP15_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 2 | 1 -INPUTS | 20 | A_FSB<9> | A_FSB<8> | A_FSB<15> | A_FSB<14> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | fsb/Ready1r | nAS_FSB | fsb/ASrf | iobs/IOReady -INPUTMC | 3 | 2 | 9 | 0 | 6 | 0 | 16 -INPUTP | 17 | 12 | 11 | 21 | 19 | 18 | 17 | 15 | 13 | 36 | 30 | 29 | 28 | 26 | 24 | 23 | 22 | 54 -EXPORTS | 1 | 2 | 1 -EQ | 12 | - EXP15_.EXP = A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & - A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & - A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & - A_FSB<17> & A_FSB<16> & fsb/Ready1r & !nAS_FSB - # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & - A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & - A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & - A_FSB<17> & A_FSB<16> & fsb/Ready1r & fsb/ASrf - # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & - A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & - A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & - A_FSB<17> & A_FSB<16> & iobs/IOReady & fsb/ASrf - -MACROCELL | 2 | 4 | EXP16_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 2 | 5 -INPUTS | 15 | A_FSB<22> | A_FSB<20> | iobs/Once | iobs/PS_FSM_FFd1 | fsb/ASrf | A_FSB<14> | A_FSB<21> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | cs/nOverlay1 | nAS_FSB | A_FSB<13> -INPUTMC | 4 | 7 | 0 | 7 | 6 | 0 | 6 | 4 | 3 -INPUTP | 11 | 30 | 28 | 19 | 29 | 26 | 24 | 23 | 22 | 47 | 54 | 18 -EXPORTS | 1 | 2 | 5 -EQ | 14 | - EXP16_.EXP = A_FSB<22> & A_FSB<20> & !iobs/Once & - !iobs/PS_FSM_FFd1 & fsb/ASrf - # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd1 - # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !iobs/PS_FSM_FFd1 & fsb/ASrf - # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd1 - # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !iobs/PS_FSM_FFd1 & fsb/ASrf - -MACROCELL | 2 | 5 | EXP17_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 2 | 6 -INPUTS | 9 | A_FSB<23> | iobs/Once | nAS_FSB | iobs/PS_FSM_FFd1 | fsb/ASrf | A_FSB<22> | A_FSB<21> | A_FSB<20> | EXP16_.EXP -INPUTMC | 4 | 7 | 0 | 7 | 6 | 0 | 6 | 2 | 4 -INPUTP | 5 | 36 | 54 | 30 | 29 | 28 -EXPORTS | 1 | 2 | 6 -IMPORTS | 1 | 2 | 4 -EQ | 25 | - EXP17_.EXP = A_FSB<23> & !iobs/Once & !nAS_FSB & - !iobs/PS_FSM_FFd1 - # A_FSB<23> & !iobs/Once & !iobs/PS_FSM_FFd1 & - fsb/ASrf - # A_FSB<22> & A_FSB<21> & !iobs/Once & !nAS_FSB & - !iobs/PS_FSM_FFd1 - # A_FSB<22> & A_FSB<21> & !iobs/Once & - !iobs/PS_FSM_FFd1 & fsb/ASrf - # A_FSB<22> & A_FSB<20> & !iobs/Once & !nAS_FSB & - !iobs/PS_FSM_FFd1 -;Imported pterms FB3_5 - # A_FSB<22> & A_FSB<20> & !iobs/Once & - !iobs/PS_FSM_FFd1 & fsb/ASrf - # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd1 - # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !iobs/PS_FSM_FFd1 & fsb/ASrf - # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd1 - # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !iobs/PS_FSM_FFd1 & fsb/ASrf - -MACROCELL | 2 | 7 | EXP18_ +MACROCELL | 2 | 7 | EXP15_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 2 | 8 -INPUTS | 13 | nAS_FSB | fsb/ASrf | A_FSB<23> | fsb/Ready1r | iobs/IOReady | nDTACK_FSB | A_FSB<22> | A_FSB<21> | A_FSB<20> | cs/nOverlay1 | fsb/Ready0r | ram/RAMReady | iobs/IOREQ.EXP -INPUTMC | 8 | 0 | 6 | 2 | 9 | 0 | 16 | 2 | 8 | 4 | 3 | 4 | 6 | 4 | 16 | 2 | 6 -INPUTP | 5 | 54 | 36 | 30 | 29 | 28 +INPUTS | 21 | nAS_FSB | fsb/ASrf | A_FSB<23> | fsb/Ready1r | iobs/IOReady | nDTACK_FSB | A_FSB<22> | A_FSB<20> | A_FSB<9> | A_FSB<8> | A_FSB<15> | A_FSB<14> | A_FSB<13> | A_FSB<12> | A_FSB<11> | A_FSB<10> | A_FSB<21> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> +INPUTMC | 4 | 3 | 6 | 2 | 12 | 4 | 15 | 2 | 8 +INPUTP | 17 | 54 | 36 | 30 | 28 | 12 | 11 | 21 | 19 | 18 | 17 | 15 | 13 | 29 | 26 | 24 | 23 | 22 EXPORTS | 1 | 2 | 8 -IMPORTS | 1 | 2 | 6 -EQ | 18 | - EXP18_.EXP = nAS_FSB & !fsb/ASrf +EQ | 13 | + EXP15_.EXP = nAS_FSB & !fsb/ASrf # A_FSB<23> & !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB - # A_FSB<22> & A_FSB<21> & !fsb/Ready1r & - !iobs/IOReady & nDTACK_FSB # A_FSB<22> & A_FSB<20> & !fsb/Ready1r & !iobs/IOReady & nDTACK_FSB - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - !fsb/Ready0r & nDTACK_FSB & !ram/RAMReady -;Imported pterms FB3_7 # A_FSB<9> & A_FSB<8> & A_FSB<15> & A_FSB<14> & A_FSB<13> & A_FSB<12> & A_FSB<11> & A_FSB<10> & A_FSB<23> & A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & @@ -2153,303 +2061,160 @@ EQ | 18 | A_FSB<22> & A_FSB<21> & A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & iobs/IOReady -MACROCELL | 2 | 10 | EXP19_ +MACROCELL | 2 | 9 | EXP16_ ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 2 | 11 -INPUTS | 9 | nAS_FSB | fsb/ASrf | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<19> | nWE_FSB | cs/nOverlay1 | fsb/Ready1r.EXP -INPUTMC | 3 | 0 | 6 | 4 | 3 | 2 | 9 +OUTPUTMC | 1 | 2 | 10 +INPUTS | 9 | nAS_FSB | fsb/ASrf | A_FSB<23> | A_FSB<22> | A_FSB<21> | A_FSB<19> | cs/nOverlay | nWE_FSB | nDTACK_FSB_OBUF.EXP +INPUTMC | 3 | 3 | 6 | 2 | 13 | 2 | 8 INPUTP | 6 | 54 | 36 | 30 | 29 | 26 | 47 -EXPORTS | 1 | 2 | 11 -IMPORTS | 1 | 2 | 9 +EXPORTS | 1 | 2 | 10 +IMPORTS | 1 | 2 | 8 EQ | 7 | - EXP19_.EXP = nAS_FSB & !fsb/ASrf + EXP16_.EXP = nAS_FSB & !fsb/ASrf # !A_FSB<23> & !A_FSB<22> & !A_FSB<21> # !A_FSB<23> & !A_FSB<22> & !A_FSB<19> + # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay # !A_FSB<23> & !A_FSB<22> & nWE_FSB - # !A_FSB<23> & !A_FSB<22> & !cs/nOverlay1 -;Imported pterms FB3_10 +;Imported pterms FB3_9 # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & !A_FSB<22> -MACROCELL | 2 | 12 | EXP20_ +MACROCELL | 2 | 11 | EXP17_ ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 2 | 11 +OUTPUTMC | 1 | 2 | 10 INPUTS | 7 | A_FSB<23> | A_FSB<22> | A_FSB<20> | A_FSB<18> | A_FSB<17> | A_FSB<16> | A_FSB<21> INPUTP | 7 | 36 | 30 | 28 | 24 | 23 | 22 | 29 -EXPORTS | 1 | 2 | 11 +EXPORTS | 1 | 2 | 10 EQ | 5 | - EXP20_.EXP = !A_FSB<23> & !A_FSB<22> & !A_FSB<20> + EXP17_.EXP = !A_FSB<23> & !A_FSB<22> & !A_FSB<20> # !A_FSB<23> & !A_FSB<22> & !A_FSB<18> # !A_FSB<23> & !A_FSB<22> & !A_FSB<17> # !A_FSB<23> & !A_FSB<22> & !A_FSB<16> # !A_FSB<23> & !A_FSB<21> & !A_FSB<20> -MACROCELL | 2 | 13 | EXP21_ +MACROCELL | 2 | 14 | EXP18_ ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 2 | 14 -INPUTS | 13 | iobs/IORW1 | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | nADoutLE1 | A_FSB<23> | A_FSB<21> | A_FSB<20> | iobs/IORW0 | nWE_FSB | iobs/Once | nAS_FSB | fsb/ASrf | A_FSB<22> -INPUTMC | 7 | 2 | 11 | 7 | 13 | 7 | 6 | 5 | 13 | 2 | 14 | 7 | 0 | 0 | 6 -INPUTP | 6 | 36 | 29 | 28 | 47 | 54 | 30 -EXPORTS | 1 | 2 | 14 -EQ | 10 | - EXP21_.EXP = !iobs/IORW1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & - !nADoutLE1 - # !A_FSB<23> & !A_FSB<21> & !A_FSB<20> & !iobs/IORW0 & - nADoutLE1 - # A_FSB<23> & !nWE_FSB & !iobs/Once & !nAS_FSB & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 - # A_FSB<23> & !nWE_FSB & !iobs/Once & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1 - # A_FSB<22> & A_FSB<21> & !nWE_FSB & !iobs/Once & - !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 - -MACROCELL | 2 | 15 | EXP22_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 2 | 14 -INPUTS | 18 | A_FSB<22> | A_FSB<21> | nWE_FSB | iobs/Once | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | fsb/ASrf | nADoutLE1 | A_FSB<20> | nAS_FSB | A_FSB<14> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | cs/nOverlay1 | A_FSB<13> | nROMWE_OBUF.EXP -INPUTMC | 7 | 7 | 0 | 7 | 13 | 7 | 6 | 0 | 6 | 5 | 13 | 4 | 3 | 2 | 16 -INPUTP | 11 | 30 | 29 | 47 | 28 | 54 | 19 | 26 | 24 | 23 | 22 | 18 -EXPORTS | 1 | 2 | 14 -IMPORTS | 1 | 2 | 16 -EQ | 23 | - EXP22_.EXP = A_FSB<22> & A_FSB<21> & !nWE_FSB & !iobs/Once & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1 - # A_FSB<22> & A_FSB<20> & !nWE_FSB & !iobs/Once & - !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & nADoutLE1 - # A_FSB<22> & A_FSB<20> & !nWE_FSB & !iobs/Once & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & nADoutLE1 +OUTPUTMC | 1 | 2 | 15 +INPUTS | 14 | A_FSB<22> | A_FSB<21> | iobs/Once | nAS_FSB | iobs/PS_FSM_FFd1 | fsb/ASrf | A_FSB<20> | A_FSB<14> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | cs/nOverlay | nWE_FSB +INPUTMC | 4 | 4 | 16 | 4 | 9 | 3 | 6 | 2 | 13 +INPUTP | 10 | 30 | 29 | 54 | 28 | 19 | 26 | 24 | 23 | 22 | 47 +EXPORTS | 1 | 2 | 15 +EQ | 11 | + EXP18_.EXP = A_FSB<22> & A_FSB<21> & !iobs/Once & !nAS_FSB & + !iobs/PS_FSM_FFd1 + # A_FSB<22> & A_FSB<21> & !iobs/Once & + !iobs/PS_FSM_FFd1 & fsb/ASrf + # A_FSB<22> & A_FSB<20> & !iobs/Once & !nAS_FSB & + !iobs/PS_FSM_FFd1 + # A_FSB<22> & A_FSB<20> & !iobs/Once & + !iobs/PS_FSM_FFd1 & fsb/ASrf # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & - nADoutLE1 - # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & - nADoutLE1 -;Imported pterms FB3_17 - # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & - nADoutLE1 - # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf & - nADoutLE1 + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !nAS_FSB & !iobs/PS_FSM_FFd1 -MACROCELL | 2 | 17 | EXP23_ +MACROCELL | 4 | 0 | EXP19_ ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 2 | 0 -INPUTS | 12 | A_FSB<22> | A_FSB<20> | fsb/Ready1r | fsb/VPA | iobs/IOReady | fsb/ASrf | A_FSB<23> | cs/nOverlay1 | fsb/Ready0r | nAS_FSB | ram/RAMReady | A_FSB<21> -INPUTMC | 7 | 2 | 9 | 2 | 0 | 0 | 16 | 0 | 6 | 4 | 3 | 4 | 6 | 4 | 16 -INPUTP | 5 | 30 | 28 | 36 | 54 | 29 -EXPORTS | 1 | 2 | 0 -EQ | 10 | - EXP23_.EXP = A_FSB<22> & A_FSB<20> & !fsb/Ready1r & fsb/VPA & - !iobs/IOReady & fsb/ASrf - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - !fsb/Ready0r & fsb/VPA & !nAS_FSB & !ram/RAMReady - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - !fsb/Ready0r & fsb/VPA & fsb/ASrf & !ram/RAMReady - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !fsb/Ready0r & fsb/VPA & !nAS_FSB & !ram/RAMReady - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !fsb/Ready0r & fsb/VPA & fsb/ASrf & !ram/RAMReady +OUTPUTMC | 1 | 4 | 1 +INPUTS | 4 | A_FSB<23> | A_FSB<21> | A_FSB<20> | cs/nOverlay +INPUTMC | 1 | 2 | 13 +INPUTP | 3 | 36 | 29 | 28 +EXPORTS | 1 | 4 | 1 +EQ | 1 | + EXP19_.EXP = !A_FSB<23> & !A_FSB<21> & !A_FSB<20> & !cs/nOverlay -MACROCELL | 3 | 0 | EXP24_ +MACROCELL | 4 | 3 | EXP20_ ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 3 | 17 -INPUTS | 12 | C8M | nBERR_IOB | iobm/IOS_FSM_FFd3 | iobm/IOS_FSM_FFd1 | iobm/IOS_FSM_FFd2 | iobm/IOBERR | iobm/BERRrf | iobm/BERRrr | iobm/DTACKrf | iobm/DTACKrr | iobm/RESrf | iobm/RESrr -INPUTMC | 10 | 5 | 4 | 3 | 9 | 5 | 12 | 3 | 17 | 3 | 3 | 3 | 2 | 1 | 16 | 1 | 15 | 1 | 11 | 1 | 10 -INPUTP | 2 | 35 | 123 -EXPORTS | 1 | 3 | 17 -EQ | 9 | - EXP24_.EXP = C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 & - iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/BERRrf & - iobm/BERRrr - # C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 & - iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/DTACKrf & - iobm/DTACKrr - # C8M & !nBERR_IOB & iobm/IOS_FSM_FFd3 & - iobm/IOS_FSM_FFd1 & iobm/IOS_FSM_FFd2 & !iobm/IOBERR & iobm/RESrf & - iobm/RESrr +OUTPUTMC | 1 | 4 | 2 +INPUTS | 8 | A_FSB<23> | A_FSB<22> | A_FSB<20> | A_FSB<18> | A_FSB<17> | A_FSB<21> | A_FSB<14> | A_FSB<13> +INPUTP | 8 | 36 | 30 | 28 | 24 | 23 | 29 | 19 | 18 +EXPORTS | 1 | 4 | 2 +EQ | 5 | + EXP20_.EXP = !A_FSB<23> & !A_FSB<22> & !A_FSB<20> + # !A_FSB<23> & !A_FSB<22> & !A_FSB<18> + # !A_FSB<23> & !A_FSB<22> & !A_FSB<17> + # !A_FSB<23> & !A_FSB<21> & !A_FSB<20> + # !A_FSB<14> & !A_FSB<13> & !A_FSB<23> & !A_FSB<22> -MACROCELL | 4 | 15 | EXP25_ +MACROCELL | 4 | 17 | EXP21_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 4 | 16 -INPUTS | 10 | A_FSB<23> | ram/RS_FSM_FFd2 | ram/RefUrgent | ram/RS_FSM_FFd3 | ram/RefReq | A_FSB<22> | A_FSB<21> | ram/BACTr | cs/nOverlay1 | RA_6_OBUF.EXP -INPUTMC | 7 | 4 | 12 | 0 | 1 | 7 | 10 | 0 | 3 | 7 | 16 | 4 | 3 | 4 | 14 -INPUTP | 3 | 36 | 30 | 29 +INPUTS | 18 | A_FSB<13> | A_FSB<21> | A_FSB<20> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | iobs/Once | cs/nOverlay | nWE_FSB | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | fsb/ASrf | A_FSB<14> | A_FSB<23> | A_FSB<22> | nAS_FSB | nADoutLE1 +INPUTMC | 6 | 4 | 16 | 2 | 13 | 4 | 6 | 4 | 9 | 3 | 6 | 5 | 13 +INPUTP | 12 | 18 | 29 | 28 | 26 | 24 | 23 | 22 | 47 | 19 | 36 | 30 | 54 EXPORTS | 1 | 4 | 16 -IMPORTS | 1 | 4 | 14 -EQ | 20 | - EXP25_.EXP = A_FSB<23> & !ram/RS_FSM_FFd2 & !ram/RefUrgent & - !ram/RS_FSM_FFd3 & !ram/RefReq - # A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd2 & - !ram/RefUrgent & !ram/RS_FSM_FFd3 & ram/BACTr - # A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd2 & - !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq - # A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd2 & - !ram/RefUrgent & !ram/RS_FSM_FFd3 & ram/BACTr - # !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd2 & - !ram/RefUrgent & !ram/RS_FSM_FFd3 & ram/BACTr -;Imported pterms FB5_15 - # A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd2 & - !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq - # !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd2 & - !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RefReq - # !A_FSB<23> & !A_FSB<22> & cs/nOverlay1 & - !ram/RS_FSM_FFd2 & !ram/RefUrgent & !ram/RS_FSM_FFd3 & !ram/RAMEN - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RefUrgent & - !ram/RS_FSM_FFd3 & !ram/RAMEN - -MACROCELL | 4 | 17 | EXP26_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 4 | 0 -INPUTS | 10 | A_FSB<23> | ram/RS_FSM_FFd2 | ram/RefUrgent | ram/RS_FSM_FFd3 | ram/BACTr | ram/RefReq | A_FSB<22> | A_FSB<21> | cs/nOverlay1 | ram/RAMReady.EXP -INPUTMC | 7 | 4 | 12 | 0 | 1 | 7 | 10 | 7 | 16 | 0 | 3 | 4 | 3 | 4 | 16 -INPUTP | 3 | 36 | 30 | 29 -EXPORTS | 1 | 4 | 0 -IMPORTS | 1 | 4 | 16 -EQ | 17 | - EXP26_.EXP = A_FSB<23> & !ram/RS_FSM_FFd2 & !ram/RefUrgent & - !ram/RS_FSM_FFd3 & ram/BACTr - # A_FSB<23> & !ram/RS_FSM_FFd2 & !ram/RefUrgent & - !ram/RS_FSM_FFd3 & !ram/RefReq - # A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd2 & - !ram/RefUrgent & !ram/RS_FSM_FFd3 & ram/BACTr - # A_FSB<22> & cs/nOverlay1 & !ram/RS_FSM_FFd2 & - !ram/RefUrgent & !ram/RS_FSM_FFd3 & ram/BACTr - # !A_FSB<22> & !cs/nOverlay1 & !ram/RS_FSM_FFd2 & - !ram/RefUrgent & !ram/RS_FSM_FFd3 & ram/BACTr -;Imported pterms FB5_17 - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & - !ram/RAMEN - # !A_FSB<23> & A_FSB<22> & A_FSB<21> & - !cs/nOverlay1 & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & !ram/RAMEN & - fsb/ASrf - -MACROCELL | 7 | 9 | EXP27_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 7 | 10 -INPUTS | 11 | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | ram/RS_FSM_FFd3 | A_FSB<23> | nAS_FSB | fsb/ASrf | ram/RefUrgent | ram/RAMEN | A_FSB<22> | A_FSB<21> | ram/RS_FSM_FFd1.EXP -INPUTMC | 7 | 7 | 8 | 4 | 12 | 7 | 10 | 0 | 6 | 0 | 1 | 4 | 9 | 7 | 8 -INPUTP | 4 | 36 | 54 | 30 | 29 -EXPORTS | 1 | 7 | 10 -IMPORTS | 1 | 7 | 8 EQ | 15 | - EXP27_.EXP = !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 & - ram/RS_FSM_FFd3 - # A_FSB<23> & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & - !ram/RS_FSM_FFd3 - # nAS_FSB & !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 & - !fsb/ASrf - # !ram/RS_FSM_FFd2 & !ram/RefUrgent & - !ram/RS_FSM_FFd3 & !ram/RAMEN - # A_FSB<22> & !A_FSB<21> & !ram/RS_FSM_FFd1 & - !ram/RS_FSM_FFd2 & !ram/RS_FSM_FFd3 -;Imported pterms FB8_9 - # ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 & - !ram/RS_FSM_FFd3 - # ram/RS_FSM_FFd1 & !ram/RefUrgent & - !ram/RS_FSM_FFd3 + EXP21_.EXP = A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & + A_FSB<18> & A_FSB<17> & A_FSB<16> & !iobs/Once & cs/nOverlay & + !nWE_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf + # A_FSB<14> & !A_FSB<23> & !A_FSB<22> & A_FSB<21> & + A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & + !iobs/Once & cs/nOverlay & !nWE_FSB & !nAS_FSB & nADoutLE1 + # A_FSB<14> & !A_FSB<23> & !A_FSB<22> & A_FSB<21> & + A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & + !iobs/Once & cs/nOverlay & !nWE_FSB & fsb/ASrf & nADoutLE1 + # A_FSB<13> & !A_FSB<23> & !A_FSB<22> & A_FSB<21> & + A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & + !iobs/Once & cs/nOverlay & !nWE_FSB & !nAS_FSB & nADoutLE1 + # A_FSB<13> & !A_FSB<23> & !A_FSB<22> & A_FSB<21> & + A_FSB<20> & A_FSB<19> & A_FSB<18> & A_FSB<17> & A_FSB<16> & + !iobs/Once & cs/nOverlay & !nWE_FSB & fsb/ASrf & nADoutLE1 -MACROCELL | 7 | 12 | EXP28_ +MACROCELL | 7 | 12 | EXP22_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 7 | 13 -INPUTS | 10 | A_FSB<23> | iobs/Once | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | fsb/ASrf | A_FSB<22> | A_FSB<21> | nAS_FSB | A_FSB<20> | iobs/nBERR_FSB.EXP -INPUTMC | 5 | 7 | 0 | 7 | 13 | 7 | 6 | 0 | 6 | 7 | 11 -INPUTP | 5 | 36 | 30 | 29 | 54 | 28 +INPUTS | 7 | ram/RS_FSM_FFd3 | ram/RAMEN | ram/RS_FSM_FFd1 | ram/RS_FSM_FFd2 | nAS_FSB | ram/RefUrg | fsb/ASrf +INPUTMC | 6 | 7 | 15 | 7 | 13 | 0 | 12 | 4 | 7 | 0 | 0 | 3 | 6 +INPUTP | 1 | 54 EXPORTS | 1 | 7 | 13 -IMPORTS | 1 | 7 | 11 -EQ | 23 | - EXP28_.EXP = A_FSB<23> & !iobs/Once & !iobs/PS_FSM_FFd2 & - !iobs/PS_FSM_FFd1 & fsb/ASrf - # A_FSB<22> & A_FSB<21> & !iobs/Once & !nAS_FSB & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 - # A_FSB<22> & A_FSB<21> & !iobs/Once & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf - # A_FSB<22> & A_FSB<20> & !iobs/Once & !nAS_FSB & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 - # A_FSB<22> & A_FSB<20> & !iobs/Once & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf -;Imported pterms FB8_12 - # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 - # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf - # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 - # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf +EQ | 7 | + EXP22_.EXP = ram/RS_FSM_FFd3 & ram/RAMEN + # ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & ram/RAMEN + # !ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 & ram/RAMEN + # nAS_FSB & ram/RS_FSM_FFd1 & ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & !fsb/ASrf + # nAS_FSB & !ram/RS_FSM_FFd1 & !ram/RS_FSM_FFd2 & + !ram/RS_FSM_FFd3 & !ram/RefUrg & !fsb/ASrf -MACROCELL | 7 | 17 | EXP29_ -ATTRIBUTES | 2048 | 0 -OUTPUTMC | 1 | 7 | 0 -INPUTS | 16 | A_FSB<22> | A_FSB<21> | iobs/Once | iobs/PS_FSM_FFd2 | iobs/PS_FSM_FFd1 | fsb/ASrf | A_FSB<20> | A_FSB<14> | A_FSB<19> | A_FSB<18> | A_FSB<17> | A_FSB<16> | nWE_FSB | cs/nOverlay1 | nAS_FSB | A_FSB<13> -INPUTMC | 5 | 7 | 0 | 7 | 13 | 7 | 6 | 0 | 6 | 4 | 3 -INPUTP | 11 | 30 | 29 | 28 | 19 | 26 | 24 | 23 | 22 | 47 | 54 | 18 -EXPORTS | 1 | 7 | 0 -EQ | 13 | - EXP29_.EXP = A_FSB<22> & A_FSB<21> & !iobs/Once & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf - # A_FSB<22> & A_FSB<20> & !iobs/Once & - !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf - # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 - # A_FSB<14> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 & fsb/ASrf - # A_FSB<13> & A_FSB<21> & A_FSB<20> & A_FSB<19> & - A_FSB<18> & A_FSB<17> & A_FSB<16> & !nWE_FSB & !iobs/Once & - cs/nOverlay1 & !nAS_FSB & !iobs/PS_FSM_FFd2 & !iobs/PS_FSM_FFd1 - -PIN | A_FSB<9> | 64 | 0 | N/A | 12 | 5 | 6 | 6 | 2 | 6 | 2 | 1 | 2 | 2 | 6 | 8 -PIN | A_FSB<8> | 64 | 0 | N/A | 11 | 4 | 6 | 4 | 2 | 6 | 2 | 1 | 2 | 2 -PIN | A_FSB<15> | 64 | 0 | N/A | 21 | 4 | 4 | 10 | 2 | 6 | 2 | 1 | 2 | 2 -PIN | A_FSB<14> | 64 | 0 | N/A | 19 | 13 | 2 | 16 | 2 | 2 | 2 | 6 | 4 | 8 | 2 | 9 | 2 | 8 | 7 | 11 | 7 | 1 | 2 | 4 | 2 | 1 | 2 | 15 | 7 | 16 | 7 | 17 -PIN | A_FSB<13> | 64 | 0 | N/A | 18 | 13 | 2 | 16 | 2 | 2 | 2 | 6 | 4 | 10 | 2 | 9 | 2 | 8 | 7 | 11 | 7 | 1 | 2 | 4 | 2 | 1 | 2 | 15 | 7 | 16 | 7 | 17 -PIN | A_FSB<12> | 64 | 0 | N/A | 17 | 4 | 4 | 13 | 2 | 6 | 2 | 1 | 2 | 2 -PIN | A_FSB<11> | 64 | 0 | N/A | 15 | 4 | 6 | 1 | 2 | 6 | 2 | 1 | 2 | 2 -PIN | A_FSB<10> | 64 | 0 | N/A | 13 | 4 | 6 | 5 | 2 | 6 | 2 | 1 | 2 | 2 -PIN | A_FSB<23> | 64 | 0 | N/A | 36 | 37 | 7 | 0 | 2 | 14 | 4 | 7 | 4 | 6 | 2 | 9 | 2 | 0 | 2 | 10 | 2 | 8 | 2 | 17 | 7 | 7 | 4 | 11 | 7 | 13 | 7 | 9 | 4 | 8 | 7 | 15 | 2 | 5 | 4 | 16 | 6 | 7 | 3 | 5 | 7 | 4 | 2 | 13 | 2 | 1 | 2 | 2 | 2 | 6 | 2 | 7 | 2 | 12 | 4 | 1 | 4 | 2 | 4 | 14 | 4 | 15 | 4 | 17 | 6 | 6 | 6 | 8 | 7 | 1 | 7 | 12 | 7 | 14 | 7 | 16 -PIN | A_FSB<22> | 64 | 0 | N/A | 30 | 40 | 7 | 0 | 2 | 14 | 4 | 7 | 4 | 6 | 2 | 9 | 2 | 0 | 2 | 10 | 2 | 8 | 2 | 17 | 7 | 7 | 4 | 11 | 7 | 12 | 7 | 10 | 4 | 8 | 7 | 15 | 2 | 5 | 4 | 15 | 6 | 7 | 3 | 5 | 7 | 4 | 2 | 15 | 2 | 1 | 2 | 2 | 2 | 4 | 2 | 6 | 2 | 7 | 2 | 12 | 2 | 13 | 4 | 1 | 4 | 2 | 4 | 14 | 4 | 16 | 4 | 17 | 6 | 6 | 6 | 8 | 7 | 1 | 7 | 9 | 7 | 14 | 7 | 16 | 7 | 17 -PIN | A_FSB<21> | 64 | 0 | N/A | 29 | 38 | 7 | 0 | 2 | 13 | 4 | 7 | 4 | 6 | 2 | 9 | 2 | 0 | 2 | 10 | 2 | 8 | 2 | 17 | 7 | 7 | 4 | 11 | 7 | 12 | 7 | 9 | 4 | 8 | 7 | 14 | 2 | 5 | 4 | 15 | 6 | 7 | 3 | 5 | 7 | 4 | 6 | 8 | 2 | 16 | 2 | 1 | 2 | 2 | 2 | 4 | 2 | 6 | 2 | 7 | 2 | 12 | 2 | 15 | 4 | 1 | 4 | 2 | 4 | 14 | 4 | 16 | 4 | 17 | 7 | 1 | 7 | 11 | 7 | 16 | 7 | 17 -PIN | A_FSB<20> | 64 | 0 | N/A | 28 | 24 | 7 | 0 | 2 | 13 | 4 | 7 | 2 | 9 | 2 | 0 | 2 | 7 | 2 | 8 | 7 | 12 | 7 | 11 | 2 | 5 | 6 | 10 | 3 | 5 | 2 | 17 | 2 | 1 | 2 | 2 | 2 | 4 | 2 | 6 | 2 | 12 | 2 | 15 | 2 | 16 | 4 | 2 | 7 | 1 | 7 | 16 | 7 | 17 -PIN | A_FSB<19> | 64 | 0 | N/A | 26 | 14 | 2 | 16 | 2 | 2 | 2 | 6 | 2 | 15 | 2 | 10 | 2 | 8 | 7 | 11 | 7 | 14 | 2 | 4 | 6 | 10 | 2 | 1 | 7 | 1 | 7 | 2 | 7 | 17 -PIN | A_FSB<18> | 64 | 0 | N/A | 24 | 13 | 2 | 16 | 2 | 12 | 2 | 6 | 6 | 7 | 2 | 2 | 2 | 8 | 7 | 11 | 7 | 1 | 2 | 4 | 2 | 1 | 2 | 15 | 7 | 16 | 7 | 17 -PIN | A_FSB<17> | 64 | 0 | N/A | 23 | 13 | 2 | 16 | 2 | 12 | 2 | 6 | 6 | 4 | 2 | 2 | 2 | 8 | 7 | 11 | 7 | 14 | 2 | 4 | 2 | 1 | 2 | 15 | 7 | 1 | 7 | 17 -PIN | A_FSB<16> | 64 | 0 | N/A | 22 | 13 | 2 | 16 | 2 | 12 | 2 | 6 | 4 | 14 | 2 | 2 | 2 | 8 | 7 | 11 | 7 | 14 | 2 | 4 | 2 | 1 | 2 | 15 | 7 | 1 | 7 | 17 -PIN | C16M | 4096 | 0 | N/A | 33 | 28 | 5 | 1 | 5 | 4 | 3 | 9 | 5 | 12 | 5 | 7 | 5 | 6 | 5 | 15 | 5 | 5 | 5 | 9 | 3 | 17 | 5 | 0 | 5 | 17 | 5 | 3 | 3 | 2 | 1 | 15 | 5 | 2 | 1 | 13 | 1 | 10 | 1 | 8 | 5 | 8 | 5 | 10 | 5 | 11 | 1 | 12 | 3 | 3 | 1 | 16 | 1 | 11 | 1 | 9 | 5 | 16 -PIN | nWE_FSB | 64 | 0 | N/A | 47 | 16 | 2 | 15 | 2 | 13 | 2 | 1 | 7 | 6 | 2 | 11 | 2 | 8 | 7 | 11 | 7 | 15 | 2 | 4 | 4 | 5 | 2 | 16 | 3 | 5 | 7 | 5 | 2 | 10 | 7 | 1 | 7 | 17 -PIN | C8M | 8256 | 0 | N/A | 35 | 27 | 5 | 4 | 5 | 12 | 3 | 17 | 5 | 17 | 3 | 0 | 3 | 16 | 5 | 16 | 3 | 13 | 6 | 0 | 3 | 15 | 3 | 14 | 6 | 12 | 6 | 14 | 6 | 9 | 6 | 6 | 6 | 2 | 6 | 17 | 6 | 16 | 6 | 3 | 6 | 15 | 7 | 14 | 3 | 6 | 3 | 12 | 3 | 8 | 3 | 11 | 1 | 14 | 3 | 1 -PIN | FCLK | 16384 | 0 | N/A | 42 | 38 | 7 | 0 | 4 | 3 | 2 | 14 | 4 | 2 | 4 | 7 | 4 | 6 | 2 | 9 | 2 | 0 | 0 | 11 | 0 | 8 | 2 | 11 | 0 | 16 | 0 | 10 | 0 | 7 | 2 | 8 | 7 | 11 | 4 | 0 | 7 | 8 | 4 | 12 | 7 | 13 | 0 | 1 | 7 | 10 | 7 | 6 | 4 | 9 | 0 | 5 | 7 | 15 | 7 | 16 | 0 | 3 | 0 | 2 | 7 | 3 | 7 | 2 | 2 | 6 | 4 | 16 | 0 | 4 | 0 | 0 | 5 | 13 | 0 | 6 | 4 | 4 -PIN | nAS_FSB | 64 | 0 | N/A | 54 | 43 | 7 | 0 | 4 | 3 | 2 | 14 | 4 | 7 | 4 | 6 | 2 | 9 | 2 | 0 | 2 | 10 | 0 | 16 | 2 | 7 | 7 | 11 | 4 | 0 | 7 | 8 | 4 | 12 | 7 | 13 | 7 | 9 | 4 | 9 | 7 | 15 | 7 | 16 | 0 | 6 | 2 | 5 | 4 | 16 | 4 | 5 | 2 | 16 | 3 | 10 | 3 | 5 | 7 | 4 | 7 | 5 | 7 | 6 | 2 | 1 | 2 | 2 | 2 | 4 | 2 | 13 | 2 | 15 | 2 | 17 | 4 | 1 | 4 | 8 | 4 | 11 | 7 | 1 | 7 | 7 | 7 | 10 | 7 | 12 | 7 | 17 -PIN | nLDS_FSB | 64 | 0 | N/A | 49 | 3 | 0 | 11 | 0 | 8 | 7 | 5 -PIN | nUDS_FSB | 64 | 0 | N/A | 56 | 3 | 0 | 10 | 0 | 7 | 7 | 6 -PIN | nBERR_IOB | 64 | 0 | N/A | 123 | 5 | 3 | 17 | 3 | 3 | 3 | 2 | 3 | 0 | 3 | 16 -PIN | E | 64 | 0 | N/A | 37 | 8 | 0 | 9 | 0 | 14 | 0 | 13 | 1 | 17 | 0 | 12 | 1 | 14 | 0 | 17 | 0 | 15 -PIN | nIPL2 | 64 | 0 | N/A | 146 | 1 | 3 | 8 -PIN | nDTACK_IOB | 64 | 0 | N/A | 127 | 2 | 1 | 16 | 1 | 15 -PIN | nVPA_IOB | 64 | 0 | N/A | 125 | 2 | 1 | 9 | 1 | 8 +PIN | A_FSB<9> | 64 | 0 | N/A | 12 | 4 | 2 | 3 | 2 | 7 | 6 | 7 | 2 | 6 +PIN | A_FSB<8> | 64 | 0 | N/A | 11 | 4 | 2 | 3 | 2 | 7 | 6 | 4 | 2 | 6 +PIN | A_FSB<15> | 64 | 0 | N/A | 21 | 4 | 2 | 3 | 2 | 7 | 4 | 11 | 2 | 6 +PIN | A_FSB<14> | 64 | 0 | N/A | 19 | 16 | 4 | 15 | 4 | 7 | 2 | 12 | 2 | 4 | 2 | 7 | 2 | 8 | 4 | 5 | 2 | 16 | 2 | 14 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 6 | 4 | 3 | 4 | 9 | 4 | 17 +PIN | A_FSB<13> | 64 | 0 | N/A | 18 | 14 | 4 | 15 | 4 | 10 | 2 | 6 | 2 | 4 | 2 | 7 | 2 | 8 | 4 | 5 | 2 | 16 | 2 | 13 | 2 | 2 | 2 | 3 | 4 | 3 | 4 | 7 | 4 | 17 +PIN | A_FSB<12> | 64 | 0 | N/A | 17 | 4 | 2 | 3 | 2 | 7 | 4 | 13 | 2 | 6 +PIN | A_FSB<11> | 64 | 0 | N/A | 15 | 4 | 2 | 3 | 2 | 7 | 6 | 1 | 2 | 6 +PIN | A_FSB<10> | 64 | 0 | N/A | 13 | 4 | 2 | 3 | 2 | 7 | 6 | 5 | 2 | 6 +PIN | A_FSB<23> | 64 | 0 | N/A | 36 | 32 | 4 | 16 | 2 | 13 | 2 | 0 | 7 | 8 | 2 | 12 | 2 | 5 | 2 | 9 | 2 | 8 | 4 | 17 | 4 | 3 | 7 | 14 | 4 | 6 | 7 | 13 | 4 | 2 | 2 | 15 | 7 | 10 | 6 | 7 | 3 | 5 | 4 | 1 | 2 | 3 | 2 | 4 | 2 | 6 | 2 | 7 | 2 | 11 | 2 | 17 | 4 | 0 | 4 | 8 | 7 | 1 | 7 | 9 | 7 | 11 | 7 | 16 | 7 | 17 +PIN | A_FSB<22> | 64 | 0 | N/A | 30 | 32 | 4 | 16 | 2 | 13 | 2 | 0 | 7 | 8 | 2 | 12 | 2 | 5 | 2 | 9 | 2 | 8 | 4 | 17 | 4 | 5 | 7 | 14 | 4 | 6 | 7 | 13 | 4 | 2 | 2 | 14 | 7 | 10 | 6 | 7 | 3 | 5 | 4 | 1 | 2 | 1 | 2 | 3 | 2 | 4 | 2 | 6 | 2 | 7 | 2 | 11 | 4 | 3 | 4 | 8 | 4 | 15 | 7 | 1 | 7 | 9 | 7 | 16 | 7 | 17 +PIN | A_FSB<21> | 64 | 0 | N/A | 29 | 26 | 4 | 16 | 2 | 13 | 4 | 1 | 2 | 12 | 2 | 5 | 2 | 9 | 2 | 8 | 4 | 6 | 4 | 0 | 2 | 14 | 3 | 5 | 6 | 8 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 4 | 2 | 6 | 2 | 7 | 2 | 11 | 2 | 16 | 2 | 17 | 4 | 3 | 4 | 5 | 4 | 7 | 4 | 15 | 4 | 17 +PIN | A_FSB<20> | 64 | 0 | N/A | 28 | 24 | 4 | 16 | 2 | 13 | 4 | 1 | 2 | 12 | 2 | 5 | 2 | 7 | 2 | 8 | 4 | 5 | 4 | 0 | 2 | 14 | 6 | 10 | 3 | 5 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 4 | 2 | 6 | 2 | 11 | 2 | 16 | 2 | 17 | 4 | 3 | 4 | 7 | 4 | 15 | 4 | 17 +PIN | A_FSB<19> | 64 | 0 | N/A | 26 | 19 | 4 | 15 | 4 | 17 | 2 | 12 | 2 | 4 | 2 | 9 | 2 | 8 | 4 | 5 | 4 | 1 | 2 | 14 | 6 | 10 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 6 | 2 | 7 | 2 | 13 | 2 | 16 | 4 | 7 | 7 | 2 +PIN | A_FSB<18> | 64 | 0 | N/A | 24 | 18 | 4 | 15 | 6 | 7 | 2 | 12 | 2 | 4 | 2 | 7 | 2 | 8 | 4 | 5 | 2 | 16 | 2 | 14 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 6 | 2 | 11 | 2 | 13 | 4 | 3 | 4 | 7 | 4 | 17 +PIN | A_FSB<17> | 64 | 0 | N/A | 23 | 18 | 4 | 15 | 6 | 4 | 2 | 12 | 2 | 4 | 2 | 7 | 2 | 8 | 4 | 5 | 2 | 16 | 2 | 14 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 6 | 2 | 11 | 2 | 13 | 4 | 3 | 4 | 7 | 4 | 17 +PIN | A_FSB<16> | 64 | 0 | N/A | 22 | 18 | 4 | 15 | 4 | 14 | 2 | 12 | 2 | 4 | 2 | 7 | 2 | 8 | 4 | 5 | 4 | 1 | 2 | 14 | 2 | 1 | 2 | 2 | 2 | 3 | 2 | 6 | 2 | 11 | 2 | 13 | 2 | 16 | 4 | 7 | 4 | 17 +PIN | C16M | 4096 | 0 | N/A | 33 | 28 | 5 | 1 | 5 | 2 | 0 | 15 | 5 | 9 | 5 | 5 | 5 | 4 | 5 | 12 | 5 | 3 | 5 | 7 | 5 | 15 | 5 | 17 | 0 | 5 | 5 | 0 | 1 | 17 | 1 | 12 | 0 | 16 | 0 | 7 | 5 | 6 | 1 | 14 | 5 | 11 | 5 | 8 | 5 | 10 | 1 | 16 | 0 | 6 | 1 | 13 | 0 | 8 | 1 | 15 | 5 | 16 +PIN | FCLK | 16384 | 0 | N/A | 42 | 64 | 4 | 16 | 3 | 17 | 7 | 17 | 7 | 3 | 7 | 9 | 7 | 2 | 6 | 17 | 6 | 16 | 3 | 13 | 3 | 12 | 3 | 11 | 6 | 14 | 6 | 12 | 6 | 9 | 6 | 6 | 6 | 3 | 6 | 2 | 2 | 13 | 2 | 0 | 6 | 15 | 3 | 9 | 0 | 17 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 0 | 7 | 8 | 2 | 12 | 2 | 5 | 0 | 14 | 2 | 10 | 4 | 15 | 0 | 13 | 7 | 11 | 2 | 8 | 7 | 14 | 7 | 0 | 0 | 12 | 4 | 7 | 7 | 15 | 4 | 6 | 0 | 0 | 4 | 9 | 7 | 13 | 7 | 16 | 7 | 6 | 0 | 3 | 4 | 2 | 3 | 2 | 0 | 2 | 0 | 1 | 0 | 10 | 0 | 9 | 0 | 11 | 2 | 15 | 3 | 8 | 2 | 17 | 3 | 3 | 7 | 10 | 3 | 0 | 5 | 13 | 3 | 1 | 3 | 6 | 4 | 4 +PIN | nAS_FSB | 64 | 0 | N/A | 54 | 39 | 4 | 16 | 2 | 13 | 2 | 0 | 7 | 8 | 2 | 12 | 2 | 5 | 2 | 9 | 4 | 14 | 7 | 11 | 2 | 7 | 7 | 0 | 4 | 7 | 7 | 15 | 4 | 6 | 7 | 13 | 4 | 2 | 3 | 2 | 2 | 15 | 3 | 6 | 7 | 10 | 4 | 4 | 2 | 16 | 3 | 10 | 3 | 5 | 7 | 5 | 7 | 7 | 2 | 1 | 2 | 2 | 2 | 4 | 2 | 6 | 2 | 14 | 2 | 17 | 4 | 5 | 4 | 8 | 4 | 15 | 4 | 17 | 7 | 1 | 7 | 12 | 7 | 16 +PIN | nWE_FSB | 64 | 0 | N/A | 47 | 21 | 4 | 15 | 7 | 7 | 2 | 12 | 2 | 4 | 2 | 10 | 2 | 8 | 4 | 5 | 4 | 1 | 2 | 14 | 4 | 4 | 2 | 16 | 3 | 5 | 7 | 5 | 2 | 1 | 2 | 2 | 2 | 6 | 2 | 9 | 2 | 13 | 2 | 17 | 4 | 7 | 4 | 17 +PIN | nLDS_FSB | 64 | 0 | N/A | 49 | 3 | 3 | 16 | 0 | 14 | 7 | 5 +PIN | nUDS_FSB | 64 | 0 | N/A | 56 | 3 | 3 | 15 | 0 | 13 | 7 | 7 +PIN | C8M | 8256 | 0 | N/A | 35 | 7 | 5 | 2 | 5 | 9 | 5 | 15 | 5 | 17 | 5 | 14 | 5 | 16 | 0 | 4 +PIN | nBERR_IOB | 64 | 0 | N/A | 123 | 4 | 5 | 17 | 0 | 8 | 0 | 7 | 5 | 16 +PIN | E | 64 | 0 | N/A | 37 | 2 | 0 | 4 | 0 | 10 +PIN | nIPL2 | 64 | 0 | N/A | 146 | 1 | 0 | 9 +PIN | nDTACK_IOB | 64 | 0 | N/A | 127 | 2 | 0 | 6 | 0 | 5 +PIN | nVPA_IOB | 64 | 0 | N/A | 125 | 2 | 1 | 13 | 1 | 12 PIN | A_FSB<1> | 64 | 0 | N/A | 149 | 1 | 6 | 5 PIN | A_FSB<2> | 64 | 0 | N/A | 153 | 1 | 6 | 1 PIN | A_FSB<3> | 64 | 0 | N/A | 155 | 1 | 4 | 13 PIN | A_FSB<4> | 64 | 0 | N/A | 157 | 1 | 4 | 10 -PIN | A_FSB<5> | 64 | 0 | N/A | 4 | 1 | 4 | 7 -PIN | A_FSB<6> | 64 | 0 | N/A | 6 | 1 | 4 | 10 +PIN | A_FSB<5> | 64 | 0 | N/A | 4 | 1 | 4 | 9 +PIN | A_FSB<6> | 64 | 0 | N/A | 6 | 1 | 4 | 11 PIN | A_FSB<7> | 64 | 0 | N/A | 8 | 1 | 4 | 13 PIN | nVMA_IOB | 536871040 | 0 | N/A | 118 +PIN | nAS_IOB | 536871040 | 0 | N/A | 135 PIN | nLDS_IOB | 536871040 | 0 | N/A | 130 PIN | nUDS_IOB | 536871040 | 0 | N/A | 134 -PIN | nAS_IOB | 536871040 | 0 | N/A | 135 -PIN | nDTACK_FSB | 536871040 | 0 | N/A | 44 PIN | nBERR_FSB | 536871040 | 0 | N/A | 112 +PIN | nDTACK_FSB | 536871040 | 0 | N/A | 44 PIN | nBR_IOB | 536871040 | 0 | N/A | 116 PIN | RA<0> | 536871040 | 0 | N/A | 86 PIN | RA<1> | 536871040 | 0 | N/A | 79 @@ -2465,11 +2230,10 @@ PIN | nDoutOE | 536871040 | 0 | N/A | 143 PIN | nOE | 536871040 | 0 | N/A | 60 PIN | nROMWE | 536871040 | 0 | N/A | 57 PIN | nVPA_FSB | 536871040 | 0 | N/A | 147 -PIN | nDinLE | 536871040 | 0 | N/A | 140 PIN | nADoutLE0 | 536871040 | 0 | N/A | 139 -PIN | nDinOE | 536871040 | 0 | N/A | 144 -PIN | nRAS | 536871040 | 0 | N/A | 103 PIN | nCAS | 536871040 | 0 | N/A | 59 +PIN | nDinLE | 536871040 | 0 | N/A | 140 +PIN | nDinOE | 536871040 | 0 | N/A | 144 PIN | RA<11> | 536871040 | 0 | N/A | 102 PIN | RA<10> | 536871040 | 0 | N/A | 90 PIN | nADoutLE1 | 536871040 | 0 | N/A | 136 @@ -2479,4 +2243,5 @@ PIN | nRAMUWE | 536871040 | 0 | N/A | 105 PIN | nROMCS | 536871040 | 0 | N/A | 58 PIN | C25MEN | 536871040 | 0 | N/A | 95 PIN | C20MEN | 536871040 | 0 | N/A | 96 -PIN | nRES | 536870976 | 0 | N/A | 145 | 3 | 4 | 7 | 1 | 11 | 1 | 10 +PIN | nRAS | 536871040 | 0 | N/A | 103 +PIN | nRES | 536870976 | 0 | N/A | 145 | 3 | 2 | 13 | 1 | 15 | 1 | 14 diff --git a/cpld/XC95144XL/WarpSE.mod b/cpld/XC95144XL/WarpSE.mod deleted file mode 100644 index 868140c..0000000 --- a/cpld/XC95144XL/WarpSE.mod +++ /dev/null @@ -1,233 +0,0 @@ -MODEL -MODEL_VERSION "v1998.8"; -DESIGN "WarpSE"; - -/* port names and type */ -INPUT S:PIN7 = A_FSB<9>; -INPUT S:PIN6 = A_FSB<8>; -INPUT S:PIN13 = A_FSB<15>; -INPUT S:PIN12 = A_FSB<14>; -INPUT S:PIN11 = A_FSB<13>; -INPUT S:PIN10 = A_FSB<12>; -INPUT S:PIN9 = A_FSB<11>; -INPUT S:PIN8 = A_FSB<10>; -INPUT S:PIN24 = A_FSB<23>; -INPUT S:PIN20 = A_FSB<22>; -INPUT S:PIN19 = A_FSB<21>; -INPUT S:PIN18 = A_FSB<20>; -INPUT S:PIN17 = A_FSB<19>; -INPUT S:PIN16 = A_FSB<18>; -INPUT S:PIN15 = A_FSB<17>; -INPUT S:PIN14 = A_FSB<16>; -INPUT S:PIN22 = CLK2X_IOB; -INPUT S:PIN27 = CLK_FSB; -INPUT S:PIN32 = nAS_FSB; -INPUT S:PIN29 = nWE_FSB; -INPUT S:PIN60 = SW<1>; -INPUT S:PIN91 = nRES; -INPUT S:PIN30 = nLDS_FSB; -INPUT S:PIN33 = nUDS_FSB; -INPUT S:PIN23 = CLK_IOB; -INPUT S:PIN76 = nBERR_IOB; -INPUT S:PIN25 = E_IOB; -INPUT S:PIN92 = nIPL2; -INPUT S:PIN73 = nBG_IOB; -INPUT S:PIN78 = nDTACK_IOB; -INPUT S:PIN77 = nVPA_IOB; -INPUT S:PIN94 = A_FSB<1>; -INPUT S:PIN95 = A_FSB<2>; -INPUT S:PIN96 = A_FSB<3>; -INPUT S:PIN97 = A_FSB<4>; -INPUT S:PIN2 = A_FSB<5>; -INPUT S:PIN3 = A_FSB<6>; -INPUT S:PIN4 = A_FSB<7>; -INPUT S:PIN61 = SW<0>; -TRIOUT S:PIN74 = nVMA_IOB; -TRIOUT S:PIN81 = nAS_IOB; -TRIOUT S:PIN79 = nLDS_IOB; -TRIOUT S:PIN80 = nUDS_IOB; -OUTPUT S:PIN28 = nDTACK_FSB; -OUTPUT S:PIN53 = RA<0>; -OUTPUT S:PIN50 = RA<1>; -OUTPUT S:PIN43 = RA<2>; -OUTPUT S:PIN41 = RA<3>; -OUTPUT S:PIN40 = RA<4>; -OUTPUT S:PIN42 = RA<5>; -OUTPUT S:PIN46 = RA<6>; -OUTPUT S:PIN52 = RA<7>; -OUTPUT S:PIN54 = RA<8>; -OUTPUT S:PIN56 = RA<9>; -OUTPUT S:PIN70 = nBERR_FSB; -OUTPUT S:PIN37 = nOE; -OUTPUT S:PIN34 = nROMWE; -OUTPUT S:PIN93 = nVPA_FSB; -OUTPUT S:PIN85 = nADoutLE0; -OUTPUT S:PIN36 = nCAS; -OUTPUT S:PIN86 = nDinLE; -OUTPUT S:PIN90 = nDinOE; -OUTPUT S:PIN89 = nDoutOE; -OUTPUT S:PIN64 = nRAS; -OUTPUT S:PIN63 = RA<11>; -OUTPUT S:PIN55 = RA<10>; -OUTPUT S:PIN59 = CLK20EN; -OUTPUT S:PIN58 = CLK25EN; -OUTPUT S:PIN72 = nBR_IOB; -OUTPUT S:PIN82 = nADoutLE1; -OUTPUT S:PIN87 = nAoutOE; -OUTPUT S:PIN65 = nRAMLWE; -OUTPUT S:PIN66 = nRAMUWE; -OUTPUT S:PIN35 = nROMCS; - -/* timing arc definitions */ -SW<0>_CLK20EN_delay: DELAY SW<0> CLK20EN; -SW<0>_CLK25EN_delay: DELAY SW<0> CLK25EN; -A_FSB<1>_RA<0>_delay: DELAY A_FSB<1> RA<0>; -A_FSB<10>_RA<0>_delay: DELAY A_FSB<10> RA<0>; -A_FSB<21>_RA<10>_delay: DELAY A_FSB<21> RA<10>; -A_FSB<19>_RA<11>_delay: DELAY A_FSB<19> RA<11>; -A_FSB<11>_RA<1>_delay: DELAY A_FSB<11> RA<1>; -A_FSB<2>_RA<1>_delay: DELAY A_FSB<2> RA<1>; -A_FSB<3>_RA<2>_delay: DELAY A_FSB<3> RA<2>; -A_FSB<12>_RA<2>_delay: DELAY A_FSB<12> RA<2>; -A_FSB<4>_RA<3>_delay: DELAY A_FSB<4> RA<3>; -A_FSB<13>_RA<3>_delay: DELAY A_FSB<13> RA<3>; -A_FSB<5>_RA<4>_delay: DELAY A_FSB<5> RA<4>; -A_FSB<14>_RA<4>_delay: DELAY A_FSB<14> RA<4>; -A_FSB<6>_RA<5>_delay: DELAY A_FSB<6> RA<5>; -A_FSB<15>_RA<5>_delay: DELAY A_FSB<15> RA<5>; -A_FSB<7>_RA<6>_delay: DELAY A_FSB<7> RA<6>; -A_FSB<16>_RA<6>_delay: DELAY A_FSB<16> RA<6>; -A_FSB<17>_RA<7>_delay: DELAY A_FSB<17> RA<7>; -A_FSB<8>_RA<7>_delay: DELAY A_FSB<8> RA<7>; -A_FSB<21>_RA<8>_delay: DELAY A_FSB<21> RA<8>; -A_FSB<9>_RA<8>_delay: DELAY A_FSB<9> RA<8>; -A_FSB<23>_RA<8>_delay: DELAY A_FSB<23> RA<8>; -A_FSB<22>_RA<8>_delay: DELAY A_FSB<22> RA<8>; -A_FSB<18>_RA<8>_delay: DELAY A_FSB<18> RA<8>; -A_FSB<20>_RA<9>_delay: DELAY A_FSB<20> RA<9>; -A_FSB<19>_RA<9>_delay: DELAY A_FSB<19> RA<9>; -nAS_FSB_nBERR_FSB_delay: DELAY nAS_FSB nBERR_FSB; -A_FSB<20>_nBERR_FSB_delay: DELAY A_FSB<20> nBERR_FSB; -A_FSB<22>_nBERR_FSB_delay: DELAY A_FSB<22> nBERR_FSB; -A_FSB<23>_nBERR_FSB_delay: DELAY A_FSB<23> nBERR_FSB; -A_FSB<21>_nBERR_FSB_delay: DELAY A_FSB<21> nBERR_FSB; -A_FSB<20>_nDinOE_delay: DELAY A_FSB<20> nDinOE; -A_FSB<23>_nDinOE_delay: DELAY A_FSB<23> nDinOE; -A_FSB<22>_nDinOE_delay: DELAY A_FSB<22> nDinOE; -A_FSB<21>_nDinOE_delay: DELAY A_FSB<21> nDinOE; -nAS_FSB_nDinOE_delay: DELAY nAS_FSB nDinOE; -nWE_FSB_nDinOE_delay: DELAY nWE_FSB nDinOE; -SW<1>_nDinOE_delay: DELAY SW<1> nDinOE; -nAS_FSB_nOE_delay: DELAY nAS_FSB nOE; -nWE_FSB_nOE_delay: DELAY nWE_FSB nOE; -nLDS_FSB_nRAMLWE_delay: DELAY nLDS_FSB nRAMLWE; -nWE_FSB_nRAMLWE_delay: DELAY nWE_FSB nRAMLWE; -nAS_FSB_nRAMLWE_delay: DELAY nAS_FSB nRAMLWE; -nWE_FSB_nRAMUWE_delay: DELAY nWE_FSB nRAMUWE; -nUDS_FSB_nRAMUWE_delay: DELAY nUDS_FSB nRAMUWE; -nAS_FSB_nRAMUWE_delay: DELAY nAS_FSB nRAMUWE; -A_FSB<23>_nRAS_delay: DELAY A_FSB<23> nRAS; -nAS_FSB_nRAS_delay: DELAY nAS_FSB nRAS; -A_FSB<21>_nRAS_delay: DELAY A_FSB<21> nRAS; -A_FSB<22>_nRAS_delay: DELAY A_FSB<22> nRAS; -A_FSB<22>_nROMCS_delay: DELAY A_FSB<22> nROMCS; -A_FSB<23>_nROMCS_delay: DELAY A_FSB<23> nROMCS; -SW<1>_nROMCS_delay: DELAY SW<1> nROMCS; -A_FSB<20>_nROMCS_delay: DELAY A_FSB<20> nROMCS; -A_FSB<21>_nROMCS_delay: DELAY A_FSB<21> nROMCS; -nAS_FSB_nROMWE_delay: DELAY nAS_FSB nROMWE; -nWE_FSB_nROMWE_delay: DELAY nWE_FSB nROMWE; -nAS_FSB_nVPA_FSB_delay: DELAY nAS_FSB nVPA_FSB; -CLK_FSB_nDTACK_FSB_delay: DELAY CLK_FSB nDTACK_FSB; -CLK_FSB_RA<0>_delay: DELAY CLK_FSB RA<0>; -CLK_FSB_RA<1>_delay: DELAY CLK_FSB RA<1>; -CLK_FSB_RA<2>_delay: DELAY CLK_FSB RA<2>; -CLK_FSB_RA<3>_delay: DELAY CLK_FSB RA<3>; -CLK_FSB_RA<4>_delay: DELAY CLK_FSB RA<4>; -CLK_FSB_RA<5>_delay: DELAY CLK_FSB RA<5>; -CLK_FSB_RA<6>_delay: DELAY CLK_FSB RA<6>; -CLK_FSB_RA<7>_delay: DELAY CLK_FSB RA<7>; -CLK_FSB_RA<8>_delay: DELAY CLK_FSB RA<8>; -CLK_FSB_RA<9>_delay: DELAY CLK_FSB RA<9>; -CLK_FSB_nBERR_FSB_delay: DELAY CLK_FSB nBERR_FSB; -CLK_FSB_nVPA_FSB_delay: DELAY CLK_FSB nVPA_FSB; -CLK_FSB_nADoutLE0_delay: DELAY CLK_FSB nADoutLE0; -CLK_FSB_nCAS_delay: DELAY CLK_FSB nCAS; -CLK_FSB_nRAS_delay: DELAY CLK_FSB nRAS; -CLK_FSB_nBR_IOB_delay: DELAY CLK_FSB nBR_IOB; -CLK_FSB_nADoutLE1_delay: DELAY CLK_FSB nADoutLE1; -CLK_FSB_nRAMLWE_delay: DELAY CLK_FSB nRAMLWE; -CLK_FSB_nRAMUWE_delay: DELAY CLK_FSB nRAMUWE; -CLK_FSB_nROMCS_delay: DELAY CLK_FSB nROMCS; -CLK2X_IOB_nVMA_IOB_delay: DELAY (ENABLE_HIGH) CLK2X_IOB nVMA_IOB; -CLK2X_IOB_nAS_IOB_delay: DELAY (ENABLE_HIGH) CLK2X_IOB nAS_IOB; -CLK2X_IOB_nLDS_IOB_delay: DELAY (ENABLE_HIGH) CLK2X_IOB nLDS_IOB; -CLK2X_IOB_nUDS_IOB_delay: DELAY (ENABLE_HIGH) CLK2X_IOB nUDS_IOB; -CLK2X_IOB_nADoutLE0_delay: DELAY CLK2X_IOB nADoutLE0; -CLK2X_IOB_nDinLE_delay: DELAY CLK2X_IOB nDinLE; -CLK2X_IOB_nDoutOE_delay: DELAY CLK2X_IOB nDoutOE; -CLK2X_IOB_nAoutOE_delay: DELAY CLK2X_IOB nAoutOE; - -/* timing check arc definitions */ -E_IOB_CLK_IOB_setup: SETUP(POSEDGE) E_IOB CLK_IOB; -E_IOB_CLK_IOB_hold: HOLD(POSEDGE) E_IOB CLK_IOB; -A_FSB<10>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<10> CLK_FSB; -A_FSB<11>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<11> CLK_FSB; -A_FSB<12>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<12> CLK_FSB; -A_FSB<13>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<13> CLK_FSB; -A_FSB<14>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<14> CLK_FSB; -A_FSB<15>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<15> CLK_FSB; -A_FSB<16>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<16> CLK_FSB; -A_FSB<17>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<17> CLK_FSB; -A_FSB<18>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<18> CLK_FSB; -A_FSB<19>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<19> CLK_FSB; -A_FSB<20>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<20> CLK_FSB; -A_FSB<21>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<21> CLK_FSB; -A_FSB<22>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<22> CLK_FSB; -A_FSB<23>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<23> CLK_FSB; -A_FSB<8>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<8> CLK_FSB; -A_FSB<9>_CLK_FSB_setup: SETUP(POSEDGE) A_FSB<9> CLK_FSB; -SW<1>_CLK_FSB_setup: SETUP(POSEDGE) SW<1> CLK_FSB; -nAS_FSB_CLK_FSB_setup: SETUP(POSEDGE) nAS_FSB CLK_FSB; -nIPL2_CLK_FSB_setup: SETUP(POSEDGE) nIPL2 CLK_FSB; -nLDS_FSB_CLK_FSB_setup: SETUP(POSEDGE) nLDS_FSB CLK_FSB; -nRES_CLK_FSB_setup: SETUP(POSEDGE) nRES CLK_FSB; -nUDS_FSB_CLK_FSB_setup: SETUP(POSEDGE) nUDS_FSB CLK_FSB; -nWE_FSB_CLK_FSB_setup: SETUP(POSEDGE) nWE_FSB CLK_FSB; -A_FSB<10>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<10> CLK_FSB; -A_FSB<11>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<11> CLK_FSB; -A_FSB<12>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<12> CLK_FSB; -A_FSB<13>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<13> CLK_FSB; -A_FSB<14>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<14> CLK_FSB; -A_FSB<15>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<15> CLK_FSB; -A_FSB<16>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<16> CLK_FSB; -A_FSB<17>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<17> CLK_FSB; -A_FSB<18>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<18> CLK_FSB; -A_FSB<19>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<19> CLK_FSB; -A_FSB<20>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<20> CLK_FSB; -A_FSB<21>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<21> CLK_FSB; -A_FSB<22>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<22> CLK_FSB; -A_FSB<23>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<23> CLK_FSB; -A_FSB<8>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<8> CLK_FSB; -A_FSB<9>_CLK_FSB_hold: HOLD(POSEDGE) A_FSB<9> CLK_FSB; -SW<1>_CLK_FSB_hold: HOLD(POSEDGE) SW<1> CLK_FSB; -nAS_FSB_CLK_FSB_hold: HOLD(POSEDGE) nAS_FSB CLK_FSB; -nIPL2_CLK_FSB_hold: HOLD(POSEDGE) nIPL2 CLK_FSB; -nLDS_FSB_CLK_FSB_hold: HOLD(POSEDGE) nLDS_FSB CLK_FSB; -nRES_CLK_FSB_hold: HOLD(POSEDGE) nRES CLK_FSB; -nUDS_FSB_CLK_FSB_hold: HOLD(POSEDGE) nUDS_FSB CLK_FSB; -nWE_FSB_CLK_FSB_hold: HOLD(POSEDGE) nWE_FSB CLK_FSB; -CLK_IOB_CLK2X_IOB_setup: SETUP(POSEDGE) CLK_IOB CLK2X_IOB; -nBERR_IOB_CLK2X_IOB_setup: SETUP(POSEDGE) nBERR_IOB CLK2X_IOB; -nBG_IOB_CLK2X_IOB_setup: SETUP(POSEDGE) nBG_IOB CLK2X_IOB; -nDTACK_IOB_CLK2X_IOB_setup: SETUP(POSEDGE) nDTACK_IOB CLK2X_IOB; -nRES_CLK2X_IOB_setup: SETUP(POSEDGE) nRES CLK2X_IOB; -nVPA_IOB_CLK2X_IOB_setup: SETUP(POSEDGE) nVPA_IOB CLK2X_IOB; -CLK_IOB_CLK2X_IOB_hold: HOLD(POSEDGE) CLK_IOB CLK2X_IOB; -nBERR_IOB_CLK2X_IOB_hold: HOLD(POSEDGE) nBERR_IOB CLK2X_IOB; -nBG_IOB_CLK2X_IOB_hold: HOLD(POSEDGE) nBG_IOB CLK2X_IOB; -nDTACK_IOB_CLK2X_IOB_hold: HOLD(POSEDGE) nDTACK_IOB CLK2X_IOB; -nRES_CLK2X_IOB_hold: HOLD(POSEDGE) nRES CLK2X_IOB; -nVPA_IOB_CLK2X_IOB_hold: HOLD(POSEDGE) nVPA_IOB CLK2X_IOB; - -ENDMODEL diff --git a/cpld/XC95144XL/WarpSE.nga b/cpld/XC95144XL/WarpSE.nga index a809756..51dacc4 100644 --- a/cpld/XC95144XL/WarpSE.nga +++ b/cpld/XC95144XL/WarpSE.nga @@ -1,3 +1,3 @@ XILINX-XDB 0.1 STUB 0.1 ASCII XILINX-XDM V1.6e -$76:0=#Zl|/;6&?:183-c=/83:1<$.'0;294,773!;;<=4>01295567!890$3:*2056728>;<=4>4123-46< 8=;<7?80182356.991#=5>?:0:34?7?89#:<6&=712962672;=;<$??;)0;45<509:1>5>?)028,667839;<=4<012*64=/;9:;6>>?0;1345/' :?;<7=:0180156.991#?8>?:2734?5289#o7%:?0;634?278 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j1|BCF~6zHIZpqMN \ No newline at end of file diff --git a/cpld/XC95144XL/WarpSE.pad b/cpld/XC95144XL/WarpSE.pad index 3a6643e..3f92a30 100644 --- a/cpld/XC95144XL/WarpSE.pad +++ b/cpld/XC95144XL/WarpSE.pad @@ -1,7 +1,7 @@ Release 8.1i - Fit P.20131013 Copyright(c) 1995-2003 Xilinx Inc. All rights reserved - 3-25-2023 0:52AM + 3-26-2023 4:30AM NOTE: This file is designed to be imported into a spreadsheet program such as Microsoft Excel for viewing, printing and sorting. The pipe '|' diff --git a/cpld/XC95144XL/WarpSE.pnx b/cpld/XC95144XL/WarpSE.pnx index 8d0e15a..e54b78a 100644 --- a/cpld/XC95144XL/WarpSE.pnx +++ b/cpld/XC95144XL/WarpSE.pnx @@ -15,4 +15,4 @@ sr (SLOW|FAST|slow|fast) "SLOW" dir (BIDIR|bidir|INPUT|input|OUTPUT|output) "BIDIR"> ]> - + diff --git a/cpld/XC95144XL/WarpSE.rpt b/cpld/XC95144XL/WarpSE.rpt index 8ccbdce..aacc19b 100644 --- a/cpld/XC95144XL/WarpSE.rpt +++ b/cpld/XC95144XL/WarpSE.rpt @@ -1,7 +1,7 @@ cpldfit: version P.20131013 Xilinx Inc. Fitter Report -Design Name: WarpSE Date: 3-25-2023, 0:52AM +Design Name: WarpSE Date: 3-26-2023, 4:30AM Device Used: XC95144XL-10-TQ100 Fitting Status: Successful @@ -9,22 +9,22 @@ Fitting Status: Successful Macrocells Product Terms Function Block Registers Pins Used/Tot Used/Tot Inps Used/Tot Used/Tot Used/Tot -119/144 ( 83%) 428 /720 ( 59%) 230/432 ( 53%) 94 /144 ( 65%) 71 /81 ( 88%) +118/144 ( 82%) 384 /720 ( 53%) 224/432 ( 52%) 93 /144 ( 65%) 71 /81 ( 88%) ** Function Block Resources ** Function Mcells FB Inps Pterms IO Block Used/Tot Used/Tot Used/Tot Used/Tot -FB1 18/18* 28/54 39/90 11/11* -FB2 10/18 8/54 11/90 8/10 -FB3 7/18 33/54 81/90 10/10* -FB4 17/18 34/54 40/90 10/10* -FB5 16/18 32/54 72/90 8/10 -FB6 18/18* 32/54 55/90 10/10* -FB7 18/18* 30/54 55/90 8/10 -FB8 15/18 33/54 75/90 6/10 +FB1 18/18* 21/54 25/90 11/11* +FB2 6/18 4/54 6/90 8/10 +FB3 9/18 34/54 82/90 10/10* +FB4 18/18* 31/54 34/90 10/10* +FB5 14/18 34/54 69/90 8/10 +FB6 18/18* 34/54 63/90 10/10* +FB7 18/18* 31/54 34/90 8/10 +FB8 17/18 35/54 71/90 6/10 ----- ----- ----- ----- - 119/144 230/432 428/720 71/81 + 118/144 224/432 384/720 71/81 * - Resource is exhausted @@ -51,7 +51,7 @@ GSR : 0 0 | ** Power Data ** -There are 119 macrocells in high performance mode (MCHP). +There are 118 macrocells in high performance mode (MCHP). There are 0 macrocells in low power mode (MCLP). End of Mapped Resource Summary ************************** Errors and Warnings *************************** @@ -87,9 +87,9 @@ WARNING:Cpld:1007 - Removing unused input(s) 'nBG_IOB'. The input(s) are unused Signal Total Total Loc Pin Pin Pin Pwr Slew Reg Init Name Pts Inps No. Type Use Mode Rate State -nDTACK_FSB 10 26 FB3_9 28 I/O O STD FAST RESET +nDTACK_FSB 9 26 FB3_9 28 I/O O STD FAST RESET nROMWE 1 2 FB3_17 34 I/O O STD FAST -nAoutOE 1 3 FB4_2 87 I/O O STD FAST SET +nAoutOE 2 4 FB4_2 87 I/O O STD FAST SET nDoutOE 1 2 FB4_5 89 I/O O STD FAST nDinOE 3 6 FB4_6 90 I/O O STD FAST nRES 1 1 FB4_8 91 I/O I/O STD FAST @@ -112,111 +112,110 @@ nDinLE 1 2 FB6_17 86 I/O O STD FAST RESET RA<1> 2 3 FB7_2 50 I/O O STD FAST RA<7> 2 3 FB7_5 52 I/O O STD FAST RA<0> 2 3 FB7_6 53 I/O O STD FAST -RA<8> 7 7 FB7_8 54 I/O O STD FAST +RA<8> 5 6 FB7_8 54 I/O O STD FAST RA<10> 1 1 FB7_9 55 I/O O STD FAST RA<9> 2 3 FB7_11 56 I/O O STD FAST C25MEN 0 0 FB7_12 58 I/O O STD FAST C20MEN 0 0 FB7_14 59 I/O O STD FAST RA<11> 1 1 FB8_2 63 I/O O STD FAST -nRAS 3 7 FB8_5 64 I/O O STD FAST +nRAS 0 0 FB8_5 64 I/O O STD FAST nRAMLWE 1 4 FB8_6 65 I/O O STD FAST nRAMUWE 1 4 FB8_8 66 I/O O STD FAST nBERR_FSB 4 8 FB8_12 70 I/O O STD FAST RESET nBR_IOB 2 4 FB8_15 72 I/O O STD FAST RESET -** 83 Buried Nodes ** +** 82 Buried Nodes ** Signal Total Total Loc Pwr Reg Init Name Pts Inps Mode State -ram/RegUrgentSync 1 1 FB1_1 STD RESET -ram/RefUrgent 1 2 FB1_2 STD RESET -ram/RefReqSync 1 1 FB1_3 STD RESET -ram/RefReq 1 2 FB1_4 STD RESET -ram/RefRAS 1 2 FB1_5 STD RESET -iobs/IOACTr 1 1 FB1_6 STD RESET -fsb/ASrf 1 1 FB1_7 STD RESET -iobs/IOU1 2 2 FB1_8 STD RESET -iobs/IOL1 2 2 FB1_9 STD RESET -cnt/TimerTC 2 5 FB1_10 STD RESET -iobs/IOU0 3 5 FB1_11 STD RESET -iobs/IOL0 3 5 FB1_12 STD RESET -cnt/Timer<3> 3 6 FB1_13 STD RESET -cnt/Timer<2> 3 5 FB1_14 STD RESET -cnt/Timer<1> 3 4 FB1_15 STD RESET -cnt/RefUrgent 3 5 FB1_16 STD RESET -iobs/IOReady 4 8 FB1_17 STD RESET -cnt/RefReq 4 5 FB1_18 STD RESET -iobm/VPArr 1 1 FB2_9 STD RESET -iobm/VPArf 1 1 FB2_10 STD RESET -iobm/RESrr 1 1 FB2_11 STD RESET -iobm/RESrf 1 1 FB2_12 STD RESET -iobm/IOREQr 1 1 FB2_13 STD RESET -iobm/Er2 1 1 FB2_14 STD RESET -iobm/Er 1 1 FB2_15 STD RESET -iobm/DTACKrr 1 1 FB2_16 STD RESET -iobm/DTACKrf 1 1 FB2_17 STD RESET -cnt/Timer<0> 2 3 FB2_18 STD RESET -fsb/VPA 18 26 FB3_1 STD RESET -iobs/IOREQ 13 19 FB3_7 STD RESET -fsb/Ready1r 6 17 FB3_10 STD RESET -iobs/IORW1 16 19 FB3_12 STD RESET -iobs/IORW0 17 20 FB3_15 STD RESET -iobm/BERRrr 1 1 FB4_3 STD RESET -iobm/BERRrf 1 1 FB4_4 STD RESET -cnt/PORS_FSM_FFd1 1 4 FB4_7 STD RESET -cnt/IPL2r 1 1 FB4_9 STD RESET -iobm/IOS_FSM_FFd1 2 3 FB4_10 STD RESET -cnt/nRESout 2 4 FB4_12 STD RESET -cnt/PORS_FSM_FFd2 2 3 FB4_13 STD RESET +ram/RefUrg 1 2 FB1_1 STD RESET +ram/RefReqSync 1 1 FB1_2 STD RESET +ram/RefReq 1 2 FB1_3 STD RESET +iobs/IOACTr 1 1 FB1_4 STD RESET +iobm/Er 1 1 FB1_5 STD RESET +iobm/DTACKrr 1 1 FB1_6 STD RESET +iobm/DTACKrf 1 1 FB1_7 STD RESET +iobm/BERRrr 1 1 FB1_8 STD RESET +iobm/BERRrf 1 1 FB1_9 STD RESET +cnt/nIPL2r 1 1 FB1_10 STD RESET +cnt/Er<0> 1 1 FB1_11 STD RESET +ALE0S 1 2 FB1_12 STD RESET +ram/RS_FSM_FFd1 2 3 FB1_13 STD RESET +iobs/IOU1 2 2 FB1_14 STD RESET +iobs/IOL1 2 2 FB1_15 STD RESET +iobm/IOS_FSM_FFd1 2 3 FB1_16 STD RESET +ALE0M 2 4 FB1_17 STD RESET +ram/RefDone 3 5 FB1_18 STD RESET +iobm/VPArr 1 1 FB2_13 STD RESET +iobm/VPArf 1 1 FB2_14 STD RESET +iobm/RESrr 1 1 FB2_15 STD RESET +iobm/RESrf 1 1 FB2_16 STD RESET +iobm/IOREQr 1 1 FB2_17 STD RESET +iobm/Er2 1 1 FB2_18 STD RESET +IORW0 17 20 FB3_1 STD RESET +fsb/VPA 16 26 FB3_6 STD RESET +iobs/IORW1 16 19 FB3_11 STD RESET +fsb/Ready1r 6 17 FB3_13 STD RESET +cs/nOverlay 3 8 FB3_14 STD RESET +IOREQ 13 19 FB3_16 STD RESET +iobs/Clear1 1 3 FB3_18 STD RESET +ram/RegUrgSync 1 1 FB4_1 STD RESET +ram/BACTr 1 2 FB4_3 STD RESET +nRESout 1 2 FB4_4 STD RESET +fsb/ASrf 1 1 FB4_7 STD RESET +cnt/Er<1> 1 1 FB4_9 STD RESET +cnt/TimerTC 2 6 FB4_10 STD RESET +cnt/LTimer<3> 2 6 FB4_12 STD RESET +cnt/LTimer<2> 2 5 FB4_13 STD RESET +cnt/LTimer<1> 2 4 FB4_14 STD RESET Signal Total Total Loc Pwr Reg Init Name Pts Inps Mode State -cnt/LTimer<0> 2 3 FB4_14 STD RESET -cnt/LTimer<3> 4 6 FB4_15 STD RESET -cnt/LTimer<2> 4 5 FB4_16 STD RESET -cnt/LTimer<1> 4 4 FB4_17 STD RESET -iobm/IOBERR 9 13 FB4_18 STD RESET -ram/RASEL 17 13 FB5_1 STD RESET -ram/RefDone 2 4 FB5_3 STD RESET -cs/nOverlay1 2 3 FB5_4 STD RESET -fsb/Ready0r 3 8 FB5_7 STD RESET -cs/nOverlay0 3 8 FB5_8 STD RESET -ram/RAMEN 9 13 FB5_10 STD RESET -ram/RS_FSM_FFd2 10 12 FB5_13 STD RESET -ram/RAMReady 12 13 FB5_17 STD RESET +RefReq 2 5 FB4_15 STD RESET +IOU0 3 5 FB4_16 STD RESET +IOL0 3 5 FB4_17 STD RESET +RefUrg 5 7 FB4_18 STD RESET +iobs/Load1 14 18 FB5_3 STD RESET +iobs/PS_FSM_FFd2 12 19 FB5_7 STD RESET +ram/RS_FSM_FFd2 8 10 FB5_8 STD RESET +iobs/PS_FSM_FFd1 2 3 FB5_10 STD RESET +iobs/IOReady 4 8 FB5_16 STD RESET +iobs/Once 15 18 FB5_17 STD RESET iobm/ETACK 1 6 FB6_1 STD RESET -iobm/DoutOE 2 3 FB6_3 STD RESET -iobm/ALE0 2 4 FB6_4 STD RESET -iobm/IOS_FSM_FFd3 3 6 FB6_5 STD RESET -iobm/ES<3> 3 6 FB6_6 STD RESET -iobm/ES<1> 3 4 FB6_7 STD RESET -iobm/ES<0> 3 7 FB6_8 STD RESET -iobm/ES<4> 4 7 FB6_10 STD RESET -iobm/IOS_FSM_FFd2 5 11 FB6_13 STD RESET -iobm/ES<2> 5 7 FB6_16 STD RESET -iobm/IOACT 6 12 FB6_18 STD RESET -cnt/LTimer<13> 3 15 FB7_1 STD RESET -cnt/LTimer<9> 4 12 FB7_3 STD RESET -cnt/LTimer<8> 4 11 FB7_4 STD RESET -cnt/LTimer<7> 4 10 FB7_7 STD RESET -cnt/LTimer<6> 4 9 FB7_10 STD RESET -cnt/LTimer<5> 4 8 FB7_13 STD RESET -cnt/LTimer<4> 4 7 FB7_15 STD RESET -cnt/LTimer<12> 4 15 FB7_16 STD RESET -cnt/LTimer<11> 4 14 FB7_17 STD RESET -cnt/LTimer<10> 4 13 FB7_18 STD RESET -iobs/Once 15 18 FB8_1 STD RESET -iobs/Clear1 1 3 FB8_3 STD RESET -iobs/ALE0 1 2 FB8_4 STD RESET -iobs/PS_FSM_FFd1 2 3 FB8_7 STD RESET -ram/RS_FSM_FFd1 8 11 FB8_9 STD RESET -ram/RS_FSM_FFd3 9 11 FB8_11 STD RESET +iobm/IOS_FSM_FFd3 3 6 FB6_3 STD RESET +iobm/ES<3> 3 6 FB6_4 STD RESET +iobm/ES<1> 3 4 FB6_5 STD RESET +iobm/ES<0> 3 7 FB6_6 STD RESET +iobm/DoutOE 3 6 FB6_7 STD RESET +iobm/ES<4> 4 7 FB6_8 STD RESET +iobm/IOS_FSM_FFd2 5 11 FB6_10 STD RESET +iobm/ES<2> 5 7 FB6_13 STD RESET +IOACT 6 12 FB6_16 STD RESET +IOBERR 9 13 FB6_18 STD RESET +cnt/LTimerTC 2 16 FB7_1 STD RESET +cnt/LTimer<9> 2 12 FB7_3 STD RESET +cnt/LTimer<8> 2 11 FB7_4 STD RESET +cnt/LTimer<7> 2 10 FB7_7 STD RESET +cnt/LTimer<6> 2 9 FB7_10 STD RESET +cnt/LTimer<5> 2 8 FB7_13 STD RESET +cnt/LTimer<4> 2 7 FB7_15 STD RESET +cnt/LTimer<12> 2 15 FB7_16 STD RESET +cnt/LTimer<11> 2 14 FB7_17 STD RESET +cnt/LTimer<10> 2 13 FB7_18 STD RESET +ram/RASEL 14 12 FB8_1 STD RESET +cnt/Timer<2> 5 6 FB8_3 STD RESET +cnt/Timer<0> 2 4 FB8_4 STD RESET +cnt/INITS_FSM_FFd2 2 6 FB8_7 STD RESET +fsb/Ready0r 2 7 FB8_9 STD RESET +cnt/Timer<1> 4 5 FB8_10 STD RESET +ram/RAMReady 9 12 FB8_11 STD RESET +ram/RAMEN 9 12 FB8_14 STD RESET +ram/RS_FSM_FFd3 13 12 FB8_16 STD RESET Signal Total Total Loc Pwr Reg Init Name Pts Inps Mode State -iobs/PS_FSM_FFd2 12 19 FB8_14 STD RESET -iobs/Load1 14 18 FB8_16 STD RESET -ram/BACTr 1 2 FB8_17 STD RESET +cnt/INITS_FSM_FFd1 1 7 FB8_17 STD RESET +cnt/LTimer<0> 1 3 FB8_18 STD RESET ** 35 Inputs ** @@ -274,66 +273,63 @@ Pin Type/Use - I - Input GCK - Global Clock X - Signal used as input to the macrocell logic. Pin No. - ~ - User Assigned *********************************** FB1 *********************************** -Number of function block inputs used/remaining: 28/26 -Number of signals used by logic mapping into function block: 28 +Number of function block inputs used/remaining: 21/33 +Number of signals used by logic mapping into function block: 21 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use -ram/RegUrgentSync 1 0 0 4 FB1_1 (b) (b) -ram/RefUrgent 1 0 0 4 FB1_2 11 I/O I -ram/RefReqSync 1 0 0 4 FB1_3 12 I/O I -ram/RefReq 1 0 0 4 FB1_4 (b) (b) -ram/RefRAS 1 0 0 4 FB1_5 13 I/O I -iobs/IOACTr 1 0 0 4 FB1_6 14 I/O I -fsb/ASrf 1 0 0 4 FB1_7 (b) (b) -iobs/IOU1 2 0 0 3 FB1_8 15 I/O I -iobs/IOL1 2 0 0 3 FB1_9 16 I/O I -cnt/TimerTC 2 0 0 3 FB1_10 (b) (b) -iobs/IOU0 3 0 0 2 FB1_11 17 I/O I -iobs/IOL0 3 0 0 2 FB1_12 18 I/O I -cnt/Timer<3> 3 0 0 2 FB1_13 (b) (b) -cnt/Timer<2> 3 0 0 2 FB1_14 19 I/O I -cnt/Timer<1> 3 0 0 2 FB1_15 20 I/O I -cnt/RefUrgent 3 0 0 2 FB1_16 (b) (b) -iobs/IOReady 4 0 0 1 FB1_17 22 GCK/I/O GCK -cnt/RefReq 4 0 0 1 FB1_18 (b) (b) +ram/RefUrg 1 0 0 4 FB1_1 (b) (b) +ram/RefReqSync 1 0 0 4 FB1_2 11 I/O I +ram/RefReq 1 0 0 4 FB1_3 12 I/O I +iobs/IOACTr 1 0 0 4 FB1_4 (b) (b) +iobm/Er 1 0 0 4 FB1_5 13 I/O I +iobm/DTACKrr 1 0 0 4 FB1_6 14 I/O I +iobm/DTACKrf 1 0 0 4 FB1_7 (b) (b) +iobm/BERRrr 1 0 0 4 FB1_8 15 I/O I +iobm/BERRrf 1 0 0 4 FB1_9 16 I/O I +cnt/nIPL2r 1 0 0 4 FB1_10 (b) (b) +cnt/Er<0> 1 0 0 4 FB1_11 17 I/O I +ALE0S 1 0 0 4 FB1_12 18 I/O I +ram/RS_FSM_FFd1 2 0 0 3 FB1_13 (b) (b) +iobs/IOU1 2 0 0 3 FB1_14 19 I/O I +iobs/IOL1 2 0 0 3 FB1_15 20 I/O I +iobm/IOS_FSM_FFd1 2 0 0 3 FB1_16 (b) (b) +ALE0M 2 0 0 3 FB1_17 22 GCK/I/O GCK +ram/RefDone 3 0 0 2 FB1_18 (b) (b) Signals Used by Logic in Function Block - 1: E 11: iobm/IOBERR 20: nADoutLE1 - 2: cnt/RefReq 12: iobs/IOACTr 21: nAS_FSB - 3: cnt/RefUrgent 13: iobs/IOL1 22: nLDS_FSB - 4: cnt/Timer<0> 14: iobs/IOReady 23: nUDS_FSB - 5: cnt/Timer<1> 15: iobs/IOU1 24: ram/RS_FSM_FFd1 - 6: cnt/Timer<2> 16: iobs/Load1 25: ram/RS_FSM_FFd2 - 7: cnt/Timer<3> 17: iobs/Once 26: ram/RefDone - 8: cnt/TimerTC 18: iobs/PS_FSM_FFd1 27: ram/RefReqSync - 9: fsb/ASrf 19: iobs/PS_FSM_FFd2 28: ram/RegUrgentSync - 10: iobm/IOACT + 1: E 8: iobs/Load1 15: nUDS_FSB + 2: IOACT 9: iobs/PS_FSM_FFd1 16: ram/RS_FSM_FFd1 + 3: RefReq 10: iobs/PS_FSM_FFd2 17: ram/RS_FSM_FFd2 + 4: iobm/IOREQr 11: nBERR_IOB 18: ram/RS_FSM_FFd3 + 5: iobm/IOS_FSM_FFd1 12: nDTACK_IOB 19: ram/RefDone + 6: iobm/IOS_FSM_FFd2 13: nIPL2 20: ram/RefReqSync + 7: iobm/IOS_FSM_FFd3 14: nLDS_FSB 21: ram/RegUrgSync Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs -ram/RegUrgentSync ..X..................................... 1 -ram/RefUrgent .........................X.X............ 2 -ram/RefReqSync .X...................................... 1 -ram/RefReq .........................XX............. 2 -ram/RefRAS .......................XX............... 2 -iobs/IOACTr .........X.............................. 1 -fsb/ASrf ....................X................... 1 -iobs/IOU1 ...............X......X................. 2 -iobs/IOL1 ...............X.....X.................. 2 -cnt/TimerTC X..XXXX................................. 5 -iobs/IOU0 ..............X..XXX..X................. 5 -iobs/IOL0 ............X....XXX.X.................. 5 -cnt/Timer<3> X..XXXXX................................ 6 -cnt/Timer<2> X..XXX.X................................ 5 -cnt/Timer<1> X..XX..X................................ 4 -cnt/RefUrgent X..XXXX................................. 5 -iobs/IOReady ........X.XX.X..X.XXX................... 8 -cnt/RefReq X..XXXX................................. 5 +ram/RefUrg ..................X.X................... 2 +ram/RefReqSync ..X..................................... 1 +ram/RefReq ..................XX.................... 2 +iobs/IOACTr .X...................................... 1 +iobm/Er X....................................... 1 +iobm/DTACKrr ...........X............................ 1 +iobm/DTACKrf ...........X............................ 1 +iobm/BERRrr ..........X............................. 1 +iobm/BERRrf ..........X............................. 1 +cnt/nIPL2r ............X........................... 1 +cnt/Er<0> X....................................... 1 +ALE0S ........XX.............................. 2 +ram/RS_FSM_FFd1 ...............XXX...................... 3 +iobs/IOU1 .......X......X......................... 2 +iobs/IOL1 .......X.....X.......................... 2 +iobm/IOS_FSM_FFd1 ....XXX................................. 3 +ALE0M ...XXXX................................. 4 +ram/RefDone ...............XXXXX.................... 5 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB2 *********************************** -Number of function block inputs used/remaining: 8/46 -Number of signals used by logic mapping into function block: 8 +Number of function block inputs used/remaining: 4/50 +Number of signals used by logic mapping into function block: 4 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use (unused) 0 0 0 5 FB2_1 (b) @@ -344,384 +340,392 @@ Name Pt Pt Pt Pt # Type Use (unused) 0 0 0 5 FB2_6 2 GTS/I/O I (unused) 0 0 0 5 FB2_7 (b) (unused) 0 0 0 5 FB2_8 3 GTS/I/O I -iobm/VPArr 1 0 0 4 FB2_9 4 GTS/I/O I -iobm/VPArf 1 0 0 4 FB2_10 (b) (b) -iobm/RESrr 1 0 0 4 FB2_11 6 I/O I -iobm/RESrf 1 0 0 4 FB2_12 7 I/O I -iobm/IOREQr 1 0 0 4 FB2_13 (b) (b) -iobm/Er2 1 0 0 4 FB2_14 8 I/O I -iobm/Er 1 0 0 4 FB2_15 9 I/O I -iobm/DTACKrr 1 0 0 4 FB2_16 (b) (b) -iobm/DTACKrf 1 0 0 4 FB2_17 10 I/O I -cnt/Timer<0> 2 0 0 3 FB2_18 (b) (b) +(unused) 0 0 0 5 FB2_9 4 GTS/I/O I +(unused) 0 0 0 5 FB2_10 (b) +(unused) 0 0 0 5 FB2_11 6 I/O I +(unused) 0 0 0 5 FB2_12 7 I/O I +iobm/VPArr 1 0 0 4 FB2_13 (b) (b) +iobm/VPArf 1 0 0 4 FB2_14 8 I/O I +iobm/RESrr 1 0 0 4 FB2_15 9 I/O I +iobm/RESrf 1 0 0 4 FB2_16 (b) (b) +iobm/IOREQr 1 0 0 4 FB2_17 10 I/O I +iobm/Er2 1 0 0 4 FB2_18 (b) (b) Signals Used by Logic in Function Block - 1: E 4: cnt/TimerTC 7: nDTACK_IOB - 2: nRES.PIN 5: iobm/Er 8: nVPA_IOB - 3: cnt/Timer<0> 6: iobs/IOREQ + 1: IOREQ 3: iobm/Er 4: nVPA_IOB + 2: nRES.PIN Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs -iobm/VPArr .......X................................ 1 -iobm/VPArf .......X................................ 1 +iobm/VPArr ...X.................................... 1 +iobm/VPArf ...X.................................... 1 iobm/RESrr .X...................................... 1 iobm/RESrf .X...................................... 1 -iobm/IOREQr .....X.................................. 1 -iobm/Er2 ....X................................... 1 -iobm/Er X....................................... 1 -iobm/DTACKrr ......X................................. 1 -iobm/DTACKrf ......X................................. 1 -cnt/Timer<0> X.XX.................................... 3 +iobm/IOREQr X....................................... 1 +iobm/Er2 ..X..................................... 1 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB3 *********************************** -Number of function block inputs used/remaining: 33/21 -Number of signals used by logic mapping into function block: 33 -Signal Total Imp Exp Unused Loc Pin Pin Pin -Name Pt Pt Pt Pt # Type Use -fsb/VPA 18 13<- 0 0 FB3_1 (b) (b) -(unused) 0 0 /\5 0 FB3_2 23 GCK/I/O GCK/I -(unused) 0 0 /\3 2 FB3_3 (b) (b) -(unused) 0 0 0 5 FB3_4 (b) -(unused) 0 0 \/5 0 FB3_5 24 I/O I -(unused) 0 0 \/5 0 FB3_6 25 I/O I -iobs/IOREQ 13 10<- \/2 0 FB3_7 (b) (b) -(unused) 0 0 \/5 0 FB3_8 27 GCK/I/O GCK -nDTACK_FSB 10 7<- \/2 0 FB3_9 28 I/O O -fsb/Ready1r 6 2<- \/1 0 FB3_10 (b) (b) -(unused) 0 0 \/5 0 FB3_11 29 I/O I -iobs/IORW1 16 11<- 0 0 FB3_12 30 I/O I -(unused) 0 0 /\5 0 FB3_13 (b) (b) -(unused) 0 0 \/5 0 FB3_14 32 I/O I -iobs/IORW0 17 12<- 0 0 FB3_15 33 I/O I -(unused) 0 0 /\5 0 FB3_16 (b) (b) -nROMWE 1 0 /\2 2 FB3_17 34 I/O O -(unused) 0 0 \/5 0 FB3_18 (b) (b) - -Signals Used by Logic in Function Block - 1: A_FSB<10> 12: A_FSB<21> 23: iobs/IORW0 - 2: A_FSB<11> 13: A_FSB<22> 24: iobs/IORW1 - 3: A_FSB<12> 14: A_FSB<23> 25: iobs/IOReady - 4: A_FSB<13> 15: A_FSB<8> 26: iobs/Once - 5: A_FSB<14> 16: A_FSB<9> 27: iobs/PS_FSM_FFd1 - 6: A_FSB<15> 17: cs/nOverlay1 28: iobs/PS_FSM_FFd2 - 7: A_FSB<16> 18: fsb/ASrf 29: nADoutLE1 - 8: A_FSB<17> 19: fsb/Ready0r 30: nAS_FSB - 9: A_FSB<18> 20: fsb/Ready1r 31: nDTACK_FSB - 10: A_FSB<19> 21: fsb/VPA 32: nWE_FSB - 11: A_FSB<20> 22: iobs/IOACTr 33: ram/RAMReady - -Signal 1 2 3 4 FB -Name 0----+----0----+----0----+----0----+----0 Inputs -fsb/VPA XXXXXXXXXXXXXXXXXXXXX...X...XX.XX....... 26 -iobs/IOREQ ...XX.XXXXXXXX..XX...X...XXXXX.X........ 19 -nDTACK_FSB XXXXXXXXXXXXXXXXXXXX....X...XXXXX....... 26 -fsb/Ready1r ...XX.XXXXXXXX..XX.X....X...XX.X........ 17 -iobs/IORW1 ...XX.XXXXXXXX..XX.....X.XXXXX.X........ 19 -iobs/IORW0 ...XX.XXXXXXXX..XX....XX.XXXXX.X........ 20 -nROMWE .............................X.X........ 2 - 0----+----1----+----2----+----3----+----4 - 0 0 0 0 - *********************************** FB4 *********************************** Number of function block inputs used/remaining: 34/20 Number of signals used by logic mapping into function block: 34 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use -(unused) 0 0 /\3 2 FB4_1 (b) (b) -nAoutOE 1 0 0 4 FB4_2 87 I/O O -iobm/BERRrr 1 0 0 4 FB4_3 (b) (b) -iobm/BERRrf 1 0 0 4 FB4_4 (b) (b) -nDoutOE 1 0 0 4 FB4_5 89 I/O O -nDinOE 3 0 0 2 FB4_6 90 I/O O -cnt/PORS_FSM_FFd1 1 0 0 4 FB4_7 (b) (b) -nRES 1 0 0 4 FB4_8 91 I/O I/O -cnt/IPL2r 1 0 0 4 FB4_9 92 I/O I -iobm/IOS_FSM_FFd1 2 0 0 3 FB4_10 (b) (b) -nVPA_FSB 1 0 0 4 FB4_11 93 I/O O -cnt/nRESout 2 0 0 3 FB4_12 94 I/O I -cnt/PORS_FSM_FFd2 2 0 0 3 FB4_13 (b) (b) -cnt/LTimer<0> 2 0 0 3 FB4_14 95 I/O I -cnt/LTimer<3> 4 0 0 1 FB4_15 96 I/O I -cnt/LTimer<2> 4 0 0 1 FB4_16 (b) (b) -cnt/LTimer<1> 4 0 \/1 0 FB4_17 97 I/O I -iobm/IOBERR 9 4<- 0 0 FB4_18 (b) (b) +IORW0 17 12<- 0 0 FB3_1 (b) (b) +(unused) 0 0 /\5 0 FB3_2 23 GCK/I/O GCK/I +(unused) 0 0 /\3 2 FB3_3 (b) (b) +(unused) 0 0 \/1 4 FB3_4 (b) (b) +(unused) 0 0 \/5 0 FB3_5 24 I/O I +fsb/VPA 16 11<- 0 0 FB3_6 25 I/O I +(unused) 0 0 /\5 0 FB3_7 (b) (b) +(unused) 0 0 \/5 0 FB3_8 27 GCK/I/O GCK +nDTACK_FSB 9 5<- \/1 0 FB3_9 28 I/O O +(unused) 0 0 \/5 0 FB3_10 (b) (b) +iobs/IORW1 16 11<- 0 0 FB3_11 29 I/O I +(unused) 0 0 /\5 0 FB3_12 30 I/O I +fsb/Ready1r 6 1<- 0 0 FB3_13 (b) (b) +cs/nOverlay 3 0 /\1 1 FB3_14 32 I/O I +(unused) 0 0 \/5 0 FB3_15 33 I/O I +IOREQ 13 8<- 0 0 FB3_16 (b) (b) +nROMWE 1 0 /\3 1 FB3_17 34 I/O O +iobs/Clear1 1 0 \/4 0 FB3_18 (b) (b) Signals Used by Logic in Function Block - 1: A_FSB<20> 13: cnt/PORS_FSM_FFd2 24: iobm/IOS_FSM_FFd1 - 2: A_FSB<21> 14: cnt/TimerTC 25: iobm/IOS_FSM_FFd2 - 3: A_FSB<22> 15: cnt/nRESout 26: iobm/IOS_FSM_FFd3 - 4: A_FSB<23> 16: fsb/VPA 27: iobm/RESrf - 5: C8M 17: iobm/BERRrf 28: iobm/RESrr - 6: cnt/IPL2r 18: iobm/BERRrr 29: nAS_FSB - 7: cnt/LTimer<0> 19: iobm/DTACKrf 30: nAoutOE - 8: cnt/LTimer<13> 20: iobm/DTACKrr 31: nBERR_IOB - 9: cnt/LTimer<1> 21: iobm/DoutOE 32: nBR_IOB - 10: cnt/LTimer<2> 22: iobm/ETACK 33: nIPL2 - 11: cnt/LTimer<3> 23: iobm/IOBERR 34: nWE_FSB - 12: cnt/PORS_FSM_FFd1 + 1: A_FSB<10> 13: A_FSB<22> 24: iobs/IOACTr + 2: A_FSB<11> 14: A_FSB<23> 25: iobs/IORW1 + 3: A_FSB<12> 15: A_FSB<8> 26: iobs/IOReady + 4: A_FSB<13> 16: A_FSB<9> 27: iobs/Once + 5: A_FSB<14> 17: IORW0 28: iobs/PS_FSM_FFd1 + 6: A_FSB<15> 18: nRES.PIN 29: iobs/PS_FSM_FFd2 + 7: A_FSB<16> 19: cs/nOverlay 30: nADoutLE1 + 8: A_FSB<17> 20: fsb/ASrf 31: nAS_FSB + 9: A_FSB<18> 21: fsb/Ready0r 32: nDTACK_FSB + 10: A_FSB<19> 22: fsb/Ready1r 33: nWE_FSB + 11: A_FSB<20> 23: fsb/VPA 34: ram/RAMReady + 12: A_FSB<21> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs -nAoutOE ...........XX..................X........ 3 -iobm/BERRrr ..............................X......... 1 -iobm/BERRrf ..............................X......... 1 -nDoutOE ....................X........X.......... 2 -nDinOE XXXX........................X....X...... 6 -cnt/PORS_FSM_FFd1 .....X.X...XX........................... 4 -nRES ..............X......................... 1 -cnt/IPL2r ................................X....... 1 -iobm/IOS_FSM_FFd1 .......................XXX.............. 3 -nVPA_FSB ...............X............X........... 2 -cnt/nRESout .......X...XX.X......................... 4 -cnt/PORS_FSM_FFd2 .......X...XX........................... 3 -cnt/LTimer<0> ......XX.....X.......................... 3 -cnt/LTimer<3> ......XXXXX..X.......................... 6 -cnt/LTimer<2> ......XXXX...X.......................... 5 -cnt/LTimer<1> ......XXX....X.......................... 4 -iobm/IOBERR ....X...........XXXX.XXXXXXX..X......... 13 +IORW0 ...XX.XXXXXXXX..X.XX....X.XXXXX.X....... 20 +fsb/VPA XXXXXXXXXXXXXXXX..XXXXX..X...XX.XX...... 26 +nDTACK_FSB XXXXXXXXXXXXXXXX..XXXX...X...XXXXX...... 26 +iobs/IORW1 ...XX.XXXXXXXX....XX....X.XXXXX.X....... 19 +fsb/Ready1r ...XX.XXXXXXXX....XX.X...X...XX.X....... 17 +cs/nOverlay ..........XXXX...XXX..........X......... 8 +IOREQ ...XX.XXXXXXXX....XX...X..XXXXX.X....... 19 +nROMWE ..............................X.X....... 2 +iobs/Clear1 ...........................XXX.......... 3 + 0----+----1----+----2----+----3----+----4 + 0 0 0 0 + *********************************** FB4 *********************************** +Number of function block inputs used/remaining: 31/23 +Number of signals used by logic mapping into function block: 31 +Signal Total Imp Exp Unused Loc Pin Pin Pin +Name Pt Pt Pt Pt # Type Use +ram/RegUrgSync 1 0 0 4 FB4_1 (b) (b) +nAoutOE 2 0 0 3 FB4_2 87 I/O O +ram/BACTr 1 0 0 4 FB4_3 (b) (b) +nRESout 1 0 0 4 FB4_4 (b) (b) +nDoutOE 1 0 0 4 FB4_5 89 I/O O +nDinOE 3 0 0 2 FB4_6 90 I/O O +fsb/ASrf 1 0 0 4 FB4_7 (b) (b) +nRES 1 0 0 4 FB4_8 91 I/O I/O +cnt/Er<1> 1 0 0 4 FB4_9 92 I/O I +cnt/TimerTC 2 0 0 3 FB4_10 (b) (b) +nVPA_FSB 1 0 0 4 FB4_11 93 I/O O +cnt/LTimer<3> 2 0 0 3 FB4_12 94 I/O I +cnt/LTimer<2> 2 0 0 3 FB4_13 (b) (b) +cnt/LTimer<1> 2 0 0 3 FB4_14 95 I/O I +RefReq 2 0 0 3 FB4_15 96 I/O I +IOU0 3 0 0 2 FB4_16 (b) (b) +IOL0 3 0 0 2 FB4_17 97 I/O I +RefUrg 5 0 0 0 FB4_18 (b) (b) + +Signals Used by Logic in Function Block + 1: A_FSB<20> 12: cnt/LTimer<2> 22: iobs/PS_FSM_FFd1 + 2: A_FSB<21> 13: cnt/Timer<0> 23: iobs/PS_FSM_FFd2 + 3: A_FSB<22> 14: cnt/Timer<1> 24: nADoutLE1 + 4: A_FSB<23> 15: cnt/Timer<2> 25: nAS_FSB + 5: RefUrg 16: cnt/TimerTC 26: nAoutOE + 6: cnt/Er<0> 17: fsb/ASrf 27: nBR_IOB + 7: cnt/Er<1> 18: fsb/VPA 28: nLDS_FSB + 8: cnt/INITS_FSM_FFd1 19: iobm/DoutOE 29: nRESout + 9: cnt/INITS_FSM_FFd2 20: iobs/IOL1 30: nUDS_FSB + 10: cnt/LTimer<0> 21: iobs/IOU1 31: nWE_FSB + 11: cnt/LTimer<1> + +Signal 1 2 3 4 FB +Name 0----+----0----+----0----+----0----+----0 Inputs +ram/RegUrgSync ....X................................... 1 +nAoutOE .......XX................XX............. 4 +ram/BACTr ................X.......X............... 2 +nRESout .......XX............................... 2 +nDoutOE ..................X......X.............. 2 +nDinOE XXXX....................X.....X......... 6 +fsb/ASrf ........................X............... 1 +nRES ............................X........... 1 +cnt/Er<1> .....X.................................. 1 +cnt/TimerTC ....XXX.....XXX......................... 6 +nVPA_FSB .................X......X............... 2 +cnt/LTimer<3> .....XX..XXX...X........................ 6 +cnt/LTimer<2> .....XX..XX....X........................ 5 +cnt/LTimer<1> .....XX..X.....X........................ 4 +RefReq ....XXX......XX......................... 5 +IOU0 ....................XXXX.....X.......... 5 +IOL0 ...................X.XXX...X............ 5 +RefUrg ....XXX.....XXXX........................ 7 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB5 *********************************** -Number of function block inputs used/remaining: 32/22 -Number of signals used by logic mapping into function block: 32 +Number of function block inputs used/remaining: 34/20 +Number of signals used by logic mapping into function block: 34 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use -ram/RASEL 17 12<- 0 0 FB5_1 (b) (b) -nROMCS 2 2<- /\5 0 FB5_2 35 I/O O -ram/RefDone 2 0 /\2 1 FB5_3 (b) (b) -cs/nOverlay1 2 0 0 3 FB5_4 (b) (b) -nCAS 1 0 0 4 FB5_5 36 I/O O -nOE 1 0 0 4 FB5_6 37 I/O O -fsb/Ready0r 3 0 0 2 FB5_7 (b) (b) -cs/nOverlay0 3 0 \/1 1 FB5_8 39 I/O (b) -RA<4> 2 1<- \/4 0 FB5_9 40 I/O O -ram/RAMEN 9 4<- 0 0 FB5_10 (b) (b) -RA<3> 2 0 \/2 1 FB5_11 41 I/O O -RA<5> 2 2<- \/5 0 FB5_12 42 I/O O -ram/RS_FSM_FFd2 10 5<- 0 0 FB5_13 (b) (b) +(unused) 0 0 \/1 4 FB5_1 (b) (b) +nROMCS 2 1<- \/4 0 FB5_2 35 I/O O +iobs/Load1 14 9<- 0 0 FB5_3 (b) (b) +(unused) 0 0 /\5 0 FB5_4 (b) (b) +nCAS 1 0 \/1 3 FB5_5 36 I/O O +nOE 1 1<- \/5 0 FB5_6 37 I/O O +iobs/PS_FSM_FFd2 12 7<- 0 0 FB5_7 (b) (b) +ram/RS_FSM_FFd2 8 5<- /\2 0 FB5_8 39 I/O (b) +RA<4> 2 2<- /\5 0 FB5_9 40 I/O O +iobs/PS_FSM_FFd1 2 0 /\2 1 FB5_10 (b) (b) +RA<3> 2 0 0 3 FB5_11 41 I/O O +RA<5> 2 0 0 3 FB5_12 42 I/O O +(unused) 0 0 0 5 FB5_13 (b) RA<2> 2 0 \/1 2 FB5_14 43 I/O O RA<6> 2 1<- \/4 0 FB5_15 46 I/O O -(unused) 0 0 \/5 0 FB5_16 (b) (b) -ram/RAMReady 12 9<- \/2 0 FB5_17 49 I/O (b) -(unused) 0 0 \/5 0 FB5_18 (b) (b) +iobs/IOReady 4 4<- \/5 0 FB5_16 (b) (b) +iobs/Once 15 10<- 0 0 FB5_17 49 I/O (b) +(unused) 0 0 /\5 0 FB5_18 (b) (b) Signals Used by Logic in Function Block - 1: A_FSB<12> 12: A_FSB<5> 23: ram/RAMEN - 2: A_FSB<13> 13: A_FSB<6> 24: ram/RAMReady - 3: A_FSB<14> 14: A_FSB<7> 25: ram/RASEL - 4: A_FSB<15> 15: nRES.PIN 26: ram/RS_FSM_FFd1 - 5: A_FSB<16> 16: cs/nOverlay0 27: ram/RS_FSM_FFd2 - 6: A_FSB<20> 17: cs/nOverlay1 28: ram/RS_FSM_FFd3 - 7: A_FSB<21> 18: fsb/ASrf 29: ram/RefDone - 8: A_FSB<22> 19: fsb/Ready0r 30: ram/RefReq - 9: A_FSB<23> 20: nAS_FSB 31: ram/RefReqSync - 10: A_FSB<3> 21: nWE_FSB 32: ram/RefUrgent - 11: A_FSB<4> 22: ram/BACTr + 1: A_FSB<12> 13: A_FSB<3> 24: iobs/PS_FSM_FFd1 + 2: A_FSB<13> 14: A_FSB<4> 25: iobs/PS_FSM_FFd2 + 3: A_FSB<14> 15: A_FSB<5> 26: nADoutLE1 + 4: A_FSB<15> 16: A_FSB<6> 27: nAS_FSB + 5: A_FSB<16> 17: A_FSB<7> 28: nWE_FSB + 6: A_FSB<17> 18: IOBERR 29: ram/RAMEN + 7: A_FSB<18> 19: cs/nOverlay 30: ram/RASEL + 8: A_FSB<19> 20: fsb/ASrf 31: ram/RS_FSM_FFd1 + 9: A_FSB<20> 21: iobs/IOACTr 32: ram/RS_FSM_FFd2 + 10: A_FSB<21> 22: iobs/IOReady 33: ram/RS_FSM_FFd3 + 11: A_FSB<22> 23: iobs/Once 34: ram/RefUrg + 12: A_FSB<23> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs -ram/RASEL ......XXX.......XX.X.XX..XXX.X.X........ 13 -nROMCS .....XXXX.......X....................... 5 -ram/RefDone .........................XX.X.X......... 4 -cs/nOverlay1 ...............X.X.X.................... 3 -nCAS ........................X............... 1 -nOE ...................XX................... 2 -fsb/Ready0r ......XXX.......XXXX...X................ 8 -cs/nOverlay0 .....XXXX.....XX.X.X.................... 8 -RA<4> ..X........X............X............... 3 -ram/RAMEN ......XXX.......XX.X.XX..XXX.X.X........ 13 -RA<3> .X........X.............X............... 3 -RA<5> ...X........X...........X............... 3 -ram/RS_FSM_FFd2 ......XXX.......XX.X.X...XXX.X.X........ 12 -RA<2> X........X..............X............... 3 -RA<6> ....X........X..........X............... 3 -ram/RAMReady ......XXX.......XX.X.XX..XXX.X.X........ 13 +nROMCS ........XXXX......X..................... 5 +iobs/Load1 .XX.XXXXXXXX......XX..XXXXXX............ 18 +nCAS .............................X.......... 1 +nOE ..........................XX............ 2 +iobs/PS_FSM_FFd2 .XX.XXXXXXXX......XXX.XXXXXX............ 19 +ram/RS_FSM_FFd2 ..........XX......XX......X.X.XXXX...... 10 +RA<4> ..X...........X..............X.......... 3 +iobs/PS_FSM_FFd1 ....................X..XX............... 3 +RA<3> .X...........X...............X.......... 3 +RA<5> ...X...........X.............X.......... 3 +RA<2> X...........X................X.......... 3 +RA<6> ....X...........X............X.......... 3 +iobs/IOReady .................X.XXXX.XXX............. 8 +iobs/Once .XX.XXXXXXXX......XX..XXXXXX............ 18 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB6 *********************************** -Number of function block inputs used/remaining: 32/22 -Number of signals used by logic mapping into function block: 32 +Number of function block inputs used/remaining: 34/20 +Number of signals used by logic mapping into function block: 34 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use iobm/ETACK 1 0 0 4 FB6_1 (b) (b) nVMA_IOB 3 0 0 2 FB6_2 74 I/O O -iobm/DoutOE 2 0 0 3 FB6_3 (b) (b) -iobm/ALE0 2 0 0 3 FB6_4 (b) (b) -iobm/IOS_FSM_FFd3 3 0 0 2 FB6_5 76 I/O I -iobm/ES<3> 3 0 0 2 FB6_6 77 I/O I -iobm/ES<1> 3 0 0 2 FB6_7 (b) (b) -iobm/ES<0> 3 0 0 2 FB6_8 78 I/O I +iobm/IOS_FSM_FFd3 3 0 0 2 FB6_3 (b) (b) +iobm/ES<3> 3 0 0 2 FB6_4 (b) (b) +iobm/ES<1> 3 0 0 2 FB6_5 76 I/O I +iobm/ES<0> 3 0 0 2 FB6_6 77 I/O I +iobm/DoutOE 3 0 0 2 FB6_7 (b) (b) +iobm/ES<4> 4 0 0 1 FB6_8 78 I/O I nLDS_IOB 4 0 0 1 FB6_9 79 I/O O -iobm/ES<4> 4 0 0 1 FB6_10 (b) (b) +iobm/IOS_FSM_FFd2 5 0 0 0 FB6_10 (b) (b) nUDS_IOB 4 0 0 1 FB6_11 80 I/O O nAS_IOB 3 0 0 2 FB6_12 81 I/O O -iobm/IOS_FSM_FFd2 5 0 0 0 FB6_13 (b) (b) +iobm/ES<2> 5 0 0 0 FB6_13 (b) (b) nADoutLE1 2 0 0 3 FB6_14 82 I/O O -nADoutLE0 1 0 0 4 FB6_15 85 I/O O -iobm/ES<2> 5 0 0 0 FB6_16 (b) (b) -nDinLE 1 0 \/1 3 FB6_17 86 I/O O -iobm/IOACT 6 1<- 0 0 FB6_18 (b) (b) +nADoutLE0 1 0 \/1 3 FB6_15 85 I/O O +IOACT 6 1<- 0 0 FB6_16 (b) (b) +nDinLE 1 0 \/4 0 FB6_17 86 I/O O +IOBERR 9 4<- 0 0 FB6_18 (b) (b) Signals Used by Logic in Function Block - 1: C8M 12: iobm/ETACK 23: iobm/VPArr - 2: iobm/ALE0 13: iobm/Er 24: iobs/ALE0 - 3: iobm/BERRrf 14: iobm/Er2 25: iobs/Clear1 - 4: iobm/BERRrr 15: iobm/IOACT 26: iobs/IOL0 - 5: iobm/DTACKrf 16: iobm/IOREQr 27: iobs/IORW0 - 6: iobm/DTACKrr 17: iobm/IOS_FSM_FFd1 28: iobs/IOU0 - 7: iobm/ES<0> 18: iobm/IOS_FSM_FFd2 29: iobs/Load1 - 8: iobm/ES<1> 19: iobm/IOS_FSM_FFd3 30: nADoutLE1 - 9: iobm/ES<2> 20: iobm/RESrf 31: nAoutOE - 10: iobm/ES<3> 21: iobm/RESrr 32: nVMA_IOB - 11: iobm/ES<4> 22: iobm/VPArf + 1: ALE0M 13: iobm/ES<0> 24: iobm/IOS_FSM_FFd3 + 2: ALE0S 14: iobm/ES<1> 25: iobm/RESrf + 3: C8M 15: iobm/ES<2> 26: iobm/RESrr + 4: IOACT 16: iobm/ES<3> 27: iobm/VPArf + 5: IOBERR 17: iobm/ES<4> 28: iobm/VPArr + 6: IOL0 18: iobm/ETACK 29: iobs/Clear1 + 7: IORW0 19: iobm/Er 30: iobs/Load1 + 8: IOU0 20: iobm/Er2 31: nADoutLE1 + 9: iobm/BERRrf 21: iobm/IOREQr 32: nAoutOE + 10: iobm/BERRrr 22: iobm/IOS_FSM_FFd1 33: nBERR_IOB + 11: iobm/DTACKrf 23: iobm/IOS_FSM_FFd2 34: nVMA_IOB + 12: iobm/DTACKrr Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs -iobm/ETACK ......XXXXX....................X........ 6 -nVMA_IOB ......XXXXX...X......XX.......XX........ 10 -iobm/DoutOE .................XX.......X............. 3 -iobm/ALE0 ...............XXXX..................... 4 -iobm/IOS_FSM_FFd3 X..............XXXX...........X......... 6 -iobm/ES<3> ......XXXX..XX.......................... 6 -iobm/ES<1> ......XX....XX.......................... 4 -iobm/ES<0> ......XXXXX.XX.......................... 7 -nLDS_IOB ................XXX......XX...X......... 6 -iobm/ES<4> ......XXXXX.XX.......................... 7 -nUDS_IOB ................XXX.......XX..X......... 6 -nAS_IOB ................XXX...........X......... 4 -iobm/IOS_FSM_FFd2 X.XXXX.....X....XXXXX................... 11 -nADoutLE1 ........................X...XX.......... 3 -nADoutLE0 .X.....................X................ 2 -iobm/ES<2> ......XXXXX.XX.......................... 7 -nDinLE ................XX...................... 2 -iobm/IOACT X.XXXX.....X...XXXXXX................... 12 +iobm/ETACK ............XXXXX................X...... 6 +nVMA_IOB ...X........XXXXX.........XX...X.X...... 10 +iobm/IOS_FSM_FFd3 ..X.................XXXX.......X........ 6 +iobm/ES<3> ............XXXX..XX.................... 6 +iobm/ES<1> ............XX....XX.................... 4 +iobm/ES<0> ............XXXXX.XX.................... 7 +iobm/DoutOE ......X.............XXXX.......X........ 6 +iobm/ES<4> ............XXXXX.XX.................... 7 +nLDS_IOB .....XX..............XXX.......X........ 6 +iobm/IOS_FSM_FFd2 ..X.....XXXX.....X...XXXXX.............. 11 +nUDS_IOB ......XX.............XXX.......X........ 6 +nAS_IOB .....................XXX.......X........ 4 +iobm/ES<2> ............XXXXX.XX.................... 7 +nADoutLE1 ............................XXX......... 3 +nADoutLE0 XX...................................... 2 +IOACT ..X.....XXXX.....X..XXXXXX.............. 12 +nDinLE .....................XX................. 2 +IOBERR ..X.X...XXXX.....X...XXXXX......X....... 13 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB7 *********************************** -Number of function block inputs used/remaining: 30/24 -Number of signals used by logic mapping into function block: 30 +Number of function block inputs used/remaining: 31/23 +Number of signals used by logic mapping into function block: 31 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use -cnt/LTimer<13> 3 0 0 2 FB7_1 (b) (b) +cnt/LTimerTC 2 0 0 3 FB7_1 (b) (b) RA<1> 2 0 0 3 FB7_2 50 I/O O -cnt/LTimer<9> 4 0 0 1 FB7_3 (b) (b) -cnt/LTimer<8> 4 0 0 1 FB7_4 (b) (b) +cnt/LTimer<9> 2 0 0 3 FB7_3 (b) (b) +cnt/LTimer<8> 2 0 0 3 FB7_4 (b) (b) RA<7> 2 0 0 3 FB7_5 52 I/O O RA<0> 2 0 0 3 FB7_6 53 I/O O -cnt/LTimer<7> 4 0 \/1 0 FB7_7 (b) (b) -RA<8> 7 2<- 0 0 FB7_8 54 I/O O -RA<10> 1 0 /\1 3 FB7_9 55 I/O O -cnt/LTimer<6> 4 0 0 1 FB7_10 (b) (b) +cnt/LTimer<7> 2 0 0 3 FB7_7 (b) (b) +RA<8> 5 0 0 0 FB7_8 54 I/O O +RA<10> 1 0 0 4 FB7_9 55 I/O O +cnt/LTimer<6> 2 0 0 3 FB7_10 (b) (b) RA<9> 2 0 0 3 FB7_11 56 I/O O C25MEN 0 0 0 5 FB7_12 58 I/O O -cnt/LTimer<5> 4 0 0 1 FB7_13 (b) (b) +cnt/LTimer<5> 2 0 0 3 FB7_13 (b) (b) C20MEN 0 0 0 5 FB7_14 59 I/O O -cnt/LTimer<4> 4 0 0 1 FB7_15 60 I/O (b) -cnt/LTimer<12> 4 0 0 1 FB7_16 (b) (b) -cnt/LTimer<11> 4 0 0 1 FB7_17 61 I/O (b) -cnt/LTimer<10> 4 0 0 1 FB7_18 (b) (b) +cnt/LTimer<4> 2 0 0 3 FB7_15 60 I/O (b) +cnt/LTimer<12> 2 0 0 3 FB7_16 (b) (b) +cnt/LTimer<11> 2 0 0 3 FB7_17 61 I/O (b) +cnt/LTimer<10> 2 0 0 3 FB7_18 (b) (b) Signals Used by Logic in Function Block - 1: A_FSB<10> 11: A_FSB<2> 21: cnt/LTimer<3> - 2: A_FSB<11> 12: A_FSB<8> 22: cnt/LTimer<4> - 3: A_FSB<17> 13: A_FSB<9> 23: cnt/LTimer<5> - 4: A_FSB<18> 14: cnt/LTimer<0> 24: cnt/LTimer<6> - 5: A_FSB<19> 15: cnt/LTimer<10> 25: cnt/LTimer<7> - 6: A_FSB<1> 16: cnt/LTimer<11> 26: cnt/LTimer<8> - 7: A_FSB<20> 17: cnt/LTimer<12> 27: cnt/LTimer<9> - 8: A_FSB<21> 18: cnt/LTimer<13> 28: cnt/TimerTC - 9: A_FSB<22> 19: cnt/LTimer<1> 29: cs/nOverlay1 - 10: A_FSB<23> 20: cnt/LTimer<2> 30: ram/RASEL + 1: A_FSB<10> 12: A_FSB<8> 22: cnt/LTimer<3> + 2: A_FSB<11> 13: A_FSB<9> 23: cnt/LTimer<4> + 3: A_FSB<17> 14: cnt/Er<0> 24: cnt/LTimer<5> + 4: A_FSB<18> 15: cnt/Er<1> 25: cnt/LTimer<6> + 5: A_FSB<19> 16: cnt/LTimer<0> 26: cnt/LTimer<7> + 6: A_FSB<1> 17: cnt/LTimer<10> 27: cnt/LTimer<8> + 7: A_FSB<20> 18: cnt/LTimer<11> 28: cnt/LTimer<9> + 8: A_FSB<21> 19: cnt/LTimer<12> 29: cnt/TimerTC + 9: A_FSB<22> 20: cnt/LTimer<1> 30: cs/nOverlay + 10: A_FSB<23> 21: cnt/LTimer<2> 31: ram/RASEL + 11: A_FSB<2> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs -cnt/LTimer<13> .............XXXXXXXXXXXXXXX............ 15 -RA<1> .X........X..................X.......... 3 -cnt/LTimer<9> .............X...XXXXXXXXXXX............ 12 -cnt/LTimer<8> .............X...XXXXXXXXX.X............ 11 -RA<7> ..X........X.................X.......... 3 -RA<0> X....X.......................X.......... 3 -cnt/LTimer<7> .............X...XXXXXXXX..X............ 10 -RA<8> ...X...XXX..X...............XX.......... 7 +cnt/LTimerTC .............XXXXXXXXXXXXXXXX........... 16 +RA<1> .X........X...................X......... 3 +cnt/LTimer<9> .............XXX...XXXXXXXX.X........... 12 +cnt/LTimer<8> .............XXX...XXXXXXX..X........... 11 +RA<7> ..X........X..................X......... 3 +RA<0> X....X........................X......... 3 +cnt/LTimer<7> .............XXX...XXXXXX...X........... 10 +RA<8> ...X....XX..X................XX......... 6 RA<10> .......X................................ 1 -cnt/LTimer<6> .............X...XXXXXXX...X............ 9 -RA<9> ....X.X......................X.......... 3 +cnt/LTimer<6> .............XXX...XXXXX....X........... 9 +RA<9> ....X.X.......................X......... 3 C25MEN ........................................ 0 -cnt/LTimer<5> .............X...XXXXXX....X............ 8 +cnt/LTimer<5> .............XXX...XXXX.....X........... 8 C20MEN ........................................ 0 -cnt/LTimer<4> .............X...XXXXX.....X............ 7 -cnt/LTimer<12> .............XXXXXXXXXXXXXXX............ 15 -cnt/LTimer<11> .............XXX.XXXXXXXXXXX............ 14 -cnt/LTimer<10> .............XX..XXXXXXXXXXX............ 13 +cnt/LTimer<4> .............XXX...XXX......X........... 7 +cnt/LTimer<12> .............XXXXX.XXXXXXXXXX........... 15 +cnt/LTimer<11> .............XXXX..XXXXXXXXXX........... 14 +cnt/LTimer<10> .............XXX...XXXXXXXXXX........... 13 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB8 *********************************** -Number of function block inputs used/remaining: 33/21 -Number of signals used by logic mapping into function block: 33 +Number of function block inputs used/remaining: 35/19 +Number of signals used by logic mapping into function block: 35 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use -iobs/Once 15 10<- 0 0 FB8_1 (b) (b) +ram/RASEL 14 9<- 0 0 FB8_1 (b) (b) RA<11> 1 1<- /\5 0 FB8_2 63 I/O O -iobs/Clear1 1 0 /\1 3 FB8_3 (b) (b) -iobs/ALE0 1 0 0 4 FB8_4 (b) (b) -nRAS 3 0 0 2 FB8_5 64 I/O O +cnt/Timer<2> 5 1<- /\1 0 FB8_3 (b) (b) +cnt/Timer<0> 2 0 /\1 2 FB8_4 (b) (b) +nRAS 0 0 0 5 FB8_5 64 I/O O nRAMLWE 1 0 0 4 FB8_6 65 I/O O -iobs/PS_FSM_FFd1 2 0 \/1 2 FB8_7 (b) (b) -nRAMUWE 1 1<- \/5 0 FB8_8 66 I/O O -ram/RS_FSM_FFd1 8 5<- \/2 0 FB8_9 67 I/O (b) -(unused) 0 0 \/5 0 FB8_10 (b) (b) -ram/RS_FSM_FFd3 9 7<- \/3 0 FB8_11 68 I/O (b) -nBERR_FSB 4 3<- \/4 0 FB8_12 70 I/O O +cnt/INITS_FSM_FFd2 2 0 0 3 FB8_7 (b) (b) +nRAMUWE 1 0 0 4 FB8_8 66 I/O O +fsb/Ready0r 2 0 \/2 1 FB8_9 67 I/O (b) +cnt/Timer<1> 4 2<- \/3 0 FB8_10 (b) (b) +ram/RAMReady 9 4<- 0 0 FB8_11 68 I/O (b) +nBERR_FSB 4 0 /\1 0 FB8_12 70 I/O O (unused) 0 0 \/5 0 FB8_13 (b) (b) -iobs/PS_FSM_FFd2 12 9<- \/2 0 FB8_14 71 I/O (b) -nBR_IOB 2 2<- \/5 0 FB8_15 72 I/O O -iobs/Load1 14 9<- 0 0 FB8_16 (b) (b) -ram/BACTr 1 0 /\4 0 FB8_17 73 I/O (b) -(unused) 0 0 \/5 0 FB8_18 (b) (b) +ram/RAMEN 9 5<- \/1 0 FB8_14 71 I/O (b) +nBR_IOB 2 1<- \/4 0 FB8_15 72 I/O O +ram/RS_FSM_FFd3 13 8<- 0 0 FB8_16 (b) (b) +cnt/INITS_FSM_FFd1 1 0 /\4 0 FB8_17 73 I/O (b) +cnt/LTimer<0> 1 0 \/4 0 FB8_18 (b) (b) Signals Used by Logic in Function Block - 1: A_FSB<13> 12: cnt/PORS_FSM_FFd1 23: nBERR_FSB - 2: A_FSB<14> 13: cnt/PORS_FSM_FFd2 24: nBR_IOB - 3: A_FSB<16> 14: cs/nOverlay1 25: nLDS_FSB - 4: A_FSB<17> 15: fsb/ASrf 26: nUDS_FSB - 5: A_FSB<18> 16: iobm/IOBERR 27: nWE_FSB - 6: A_FSB<19> 17: iobs/IOACTr 28: ram/RAMEN - 7: A_FSB<20> 18: iobs/Once 29: ram/RS_FSM_FFd1 - 8: A_FSB<21> 19: iobs/PS_FSM_FFd1 30: ram/RS_FSM_FFd2 - 9: A_FSB<22> 20: iobs/PS_FSM_FFd2 31: ram/RS_FSM_FFd3 - 10: A_FSB<23> 21: nADoutLE1 32: ram/RefRAS - 11: cnt/IPL2r 22: nAS_FSB 33: ram/RefUrgent + 1: A_FSB<19> 13: cnt/TimerTC 25: nLDS_FSB + 2: A_FSB<22> 14: cnt/nIPL2r 26: nUDS_FSB + 3: A_FSB<23> 15: cs/nOverlay 27: nWE_FSB + 4: IOBERR 16: fsb/ASrf 28: ram/BACTr + 5: cnt/Er<0> 17: fsb/Ready0r 29: ram/RAMEN + 6: cnt/Er<1> 18: iobs/IOACTr 30: ram/RAMReady + 7: cnt/INITS_FSM_FFd1 19: iobs/Once 31: ram/RS_FSM_FFd1 + 8: cnt/INITS_FSM_FFd2 20: iobs/PS_FSM_FFd2 32: ram/RS_FSM_FFd2 + 9: cnt/LTimerTC 21: nADoutLE1 33: ram/RS_FSM_FFd3 + 10: cnt/Timer<0> 22: nAS_FSB 34: ram/RefReq + 11: cnt/Timer<1> 23: nBERR_FSB 35: ram/RefUrg + 12: cnt/Timer<2> 24: nBR_IOB Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs -iobs/Once XXXXXXXXXX...XX..XXXXX....X............. 18 -RA<11> .....X.................................. 1 -iobs/Clear1 ..................XXX................... 3 -iobs/ALE0 ..................XX.................... 2 -nRAS .......XXX...X.......X.....X...X........ 7 -nRAMLWE .....................X..X.XX............ 4 -iobs/PS_FSM_FFd1 ................X.XX.................... 3 -nRAMUWE .....................X...XXX............ 4 -ram/RS_FSM_FFd1 .......XXX...XX......X.....XXXX.X....... 11 -ram/RS_FSM_FFd3 .......XXX...XX......X.....XXXX.X....... 11 -nBERR_FSB ..............XXXX.XXXX................. 8 -iobs/PS_FSM_FFd2 XXXXXXXXXX...XX.XXXXXX....X............. 19 -nBR_IOB ..........XXX..........X................ 4 -iobs/Load1 XXXXXXXXXX...XX..XXXXX....X............. 18 -ram/BACTr ..............X......X.................. 2 +ram/RASEL .XX...........XX.....X.....XX.XXXXX..... 12 +RA<11> X....................................... 1 +cnt/Timer<2> ....XX...XXXX........................... 6 +cnt/Timer<0> ....XX...X..X........................... 4 +nRAS ........................................ 0 +nRAMLWE .....................X..X.X.X........... 4 +cnt/INITS_FSM_FFd2 ....XXXXX...X........................... 6 +nRAMUWE .....................X...XX.X........... 4 +fsb/Ready0r .XX...........XXX....X.......X.......... 7 +cnt/Timer<1> ....XX...XX.X........................... 5 +ram/RAMReady .XX...........XX.....X.....XX.XXXXX..... 12 +nBERR_FSB ...X...........X.XXXXXX................. 8 +ram/RAMEN .XX...........XX.....X.....XX.XXXXX..... 12 +nBR_IOB ......XX.....X.........X................ 4 +ram/RS_FSM_FFd3 .XX...........XX.....X.....XX.XXXXX..... 12 +cnt/INITS_FSM_FFd1 ....XXXXX...XX.......................... 7 +cnt/LTimer<0> ....XX......X........................... 3 0----+----1----+----2----+----3----+----4 0 0 0 0 ******************************* Equations ******************************** ********** Mapped Logic ********** +FDCPE_ALE0M: FDCPE port map (ALE0M,ALE0M_D,C16M,'0','0'); +ALE0M_D <= ((iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2) + OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2 AND + NOT iobm/IOREQr)); -assign C20MEN = 1'b1; +FDCPE_ALE0S: FDCPE port map (ALE0S,ALE0S_D,FCLK,'0','0'); +ALE0S_D <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1); -assign C25MEN = 1'b1; +C20MEN <= '1'; +C25MEN <= '1'; @@ -749,855 +753,831 @@ assign C25MEN = 1'b1; - - - - - -assign RA[0] = ((A_FSB[10] && !ram/RASEL) - || (ram/RASEL && A_FSB[1])); - - -assign RA[1] = ((A_FSB[11] && !ram/RASEL) - || (ram/RASEL && A_FSB[2])); - - -assign RA[2] = ((A_FSB[12] && !ram/RASEL) - || (ram/RASEL && A_FSB[3])); - - -assign RA[3] = ((A_FSB[13] && !ram/RASEL) - || (ram/RASEL && A_FSB[4])); - - -assign RA[4] = ((ram/RASEL && A_FSB[5]) - || (A_FSB[14] && !ram/RASEL)); - - -assign RA[5] = ((A_FSB[15] && !ram/RASEL) - || (ram/RASEL && A_FSB[6])); - - -assign RA[6] = ((ram/RASEL && A_FSB[7]) - || (A_FSB[16] && !ram/RASEL)); - - -assign RA[7] = ((A_FSB[8] && ram/RASEL) - || (A_FSB[17] && !ram/RASEL)); - - -assign RA[8] = ((A_FSB[9] && !A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && - ram/RASEL) - || (A_FSB[9] && !A_FSB[23] && A_FSB[22] && A_FSB[21] && - !cs/nOverlay1 && ram/RASEL) - || (A_FSB[23] && A_FSB[18]) - || (A_FSB[18] && !ram/RASEL) - || (A_FSB[22] && !A_FSB[21] && A_FSB[18]) - || (A_FSB[22] && A_FSB[18] && cs/nOverlay1) - || (!A_FSB[22] && A_FSB[18] && !cs/nOverlay1)); - - -assign RA[9] = ((A_FSB[20] && ram/RASEL) - || (A_FSB[19] && !ram/RASEL)); - - -assign RA[10] = A_FSB[21]; - - -assign RA[11] = A_FSB[19]; - -FDCPE FDCPE_cnt/IPL2r (cnt/IPL2r,!nIPL2,!C8M,1'b0,1'b0); - -FTCPE FTCPE_cnt/LTimer0 (cnt/LTimer[0],cnt/LTimer_T[0],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_T[0] = (!cnt/LTimer[0] && cnt/LTimer[13] && cnt/TimerTC); - -FDCPE FDCPE_cnt/LTimer1 (cnt/LTimer[1],cnt/LTimer_D[1],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_D[1] = ((cnt/LTimer[0] && cnt/LTimer[1]) - || (!cnt/LTimer[0] && !cnt/LTimer[1]) - || (cnt/LTimer[13] && cnt/TimerTC)); - -FTCPE FTCPE_cnt/LTimer2 (cnt/LTimer[2],cnt/LTimer_T[2],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_T[2] = ((cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1]) - || (cnt/LTimer[0] && cnt/LTimer[1] && !cnt/TimerTC) - || (cnt/LTimer[13] && cnt/LTimer[2] && cnt/TimerTC)); - -FTCPE FTCPE_cnt/LTimer3 (cnt/LTimer[3],cnt/LTimer_T[3],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_T[3] = ((cnt/LTimer[13] && cnt/LTimer[3] && cnt/TimerTC) - || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && - cnt/LTimer[2]) - || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && - !cnt/TimerTC)); - -FTCPE FTCPE_cnt/LTimer4 (cnt/LTimer[4],cnt/LTimer_T[4],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_T[4] = ((cnt/LTimer[13] && cnt/LTimer[4] && cnt/TimerTC) - || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && - cnt/LTimer[2] && cnt/LTimer[3]) - || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && - cnt/LTimer[3] && !cnt/TimerTC)); - -FTCPE FTCPE_cnt/LTimer5 (cnt/LTimer[5],cnt/LTimer_T[5],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_T[5] = ((cnt/LTimer[13] && cnt/LTimer[5] && cnt/TimerTC) - || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && - cnt/LTimer[2] && cnt/LTimer[3] && cnt/LTimer[4]) - || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && - cnt/LTimer[3] && cnt/LTimer[4] && !cnt/TimerTC)); - -FTCPE FTCPE_cnt/LTimer6 (cnt/LTimer[6],cnt/LTimer_T[6],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_T[6] = ((cnt/LTimer[13] && cnt/LTimer[6] && cnt/TimerTC) - || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && - cnt/LTimer[2] && cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4]) - || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && - cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && !cnt/TimerTC)); - -FTCPE FTCPE_cnt/LTimer7 (cnt/LTimer[7],cnt/LTimer_T[7],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_T[7] = ((cnt/LTimer[13] && cnt/LTimer[7] && cnt/TimerTC) - || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && - cnt/LTimer[2] && cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && - cnt/LTimer[6]) - || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && - cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && cnt/LTimer[6] && - !cnt/TimerTC)); - -FTCPE FTCPE_cnt/LTimer8 (cnt/LTimer[8],cnt/LTimer_T[8],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_T[8] = ((cnt/LTimer[13] && cnt/LTimer[8] && cnt/TimerTC) - || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && - cnt/LTimer[2] && cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && - cnt/LTimer[6] && cnt/LTimer[7]) - || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && - cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && cnt/LTimer[6] && - cnt/LTimer[7] && !cnt/TimerTC)); - -FTCPE FTCPE_cnt/LTimer9 (cnt/LTimer[9],cnt/LTimer_T[9],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_T[9] = ((cnt/LTimer[13] && cnt/LTimer[9] && cnt/TimerTC) - || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && - cnt/LTimer[2] && cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && - cnt/LTimer[6] && cnt/LTimer[7] && cnt/LTimer[8]) - || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && - cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && cnt/LTimer[6] && - cnt/LTimer[7] && cnt/LTimer[8] && !cnt/TimerTC)); - -FTCPE FTCPE_cnt/LTimer10 (cnt/LTimer[10],cnt/LTimer_T[10],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_T[10] = ((cnt/LTimer[13] && cnt/LTimer[10] && cnt/TimerTC) - || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && - cnt/LTimer[2] && cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && - cnt/LTimer[6] && cnt/LTimer[7] && cnt/LTimer[9] && cnt/LTimer[8]) - || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && - cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && cnt/LTimer[6] && - cnt/LTimer[7] && cnt/LTimer[9] && cnt/LTimer[8] && !cnt/TimerTC)); - -FTCPE FTCPE_cnt/LTimer11 (cnt/LTimer[11],cnt/LTimer_T[11],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_T[11] = ((cnt/LTimer[13] && cnt/LTimer[11] && cnt/TimerTC) - || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && - cnt/LTimer[2] && cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && - cnt/LTimer[6] && cnt/LTimer[7] && cnt/LTimer[9] && cnt/LTimer[10] && - cnt/LTimer[8]) - || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && - cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && cnt/LTimer[6] && - cnt/LTimer[7] && cnt/LTimer[9] && cnt/LTimer[10] && cnt/LTimer[8] && - !cnt/TimerTC)); - -FTCPE FTCPE_cnt/LTimer12 (cnt/LTimer[12],cnt/LTimer_T[12],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_T[12] = ((cnt/LTimer[13] && cnt/LTimer[12] && cnt/TimerTC) - || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && - cnt/LTimer[2] && cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && - cnt/LTimer[6] && cnt/LTimer[7] && cnt/LTimer[9] && cnt/LTimer[10] && - cnt/LTimer[11] && cnt/LTimer[8]) - || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && - cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && cnt/LTimer[6] && - cnt/LTimer[7] && cnt/LTimer[9] && cnt/LTimer[10] && cnt/LTimer[11] && - cnt/LTimer[8] && !cnt/TimerTC)); - -FTCPE FTCPE_cnt/LTimer13 (cnt/LTimer[13],cnt/LTimer_T[13],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_T[13] = ((cnt/LTimer[13] && cnt/TimerTC) - || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && - cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && cnt/LTimer[6] && - cnt/LTimer[7] && cnt/LTimer[9] && cnt/LTimer[10] && cnt/LTimer[11] && - cnt/LTimer[8] && cnt/LTimer[12])); - -FTCPE FTCPE_cnt/PORS_FSM_FFd1 (cnt/PORS_FSM_FFd1,cnt/PORS_FSM_FFd1_T,!C8M,1'b0,1'b0); -assign cnt/PORS_FSM_FFd1_T = (cnt/LTimer[13] && !cnt/PORS_FSM_FFd1 && - cnt/PORS_FSM_FFd2 && !cnt/IPL2r); - -FDCPE FDCPE_cnt/PORS_FSM_FFd2 (cnt/PORS_FSM_FFd2,cnt/PORS_FSM_FFd2_D,!C8M,1'b0,1'b0); -assign cnt/PORS_FSM_FFd2_D = ((cnt/LTimer[13] && !cnt/PORS_FSM_FFd1) - || (!cnt/LTimer[13] && cnt/PORS_FSM_FFd2)); - -FDCPE FDCPE_cnt/RefReq (cnt/RefReq,cnt/RefReq_D,E,1'b0,1'b0); -assign cnt/RefReq_D = ((cnt/Timer[1] && !cnt/Timer[3]) - || (cnt/Timer[2] && !cnt/Timer[3]) - || (!cnt/Timer[1] && !cnt/Timer[2] && !cnt/Timer[0] && - cnt/Timer[3])); - -FDCPE FDCPE_cnt/RefUrgent (cnt/RefUrgent,cnt/RefUrgent_D,E,1'b0,1'b0); -assign cnt/RefUrgent_D = ((cnt/Timer[1] && cnt/Timer[2] && !cnt/Timer[3]) - || (!cnt/Timer[1] && !cnt/Timer[2] && !cnt/Timer[0] && - cnt/Timer[3])); - -FDCPE FDCPE_cnt/Timer0 (cnt/Timer[0],cnt/Timer_D[0],E,1'b0,1'b0); -assign cnt/Timer_D[0] = (!cnt/TimerTC && !cnt/Timer[0]); - -FDCPE FDCPE_cnt/Timer1 (cnt/Timer[1],cnt/Timer_D[1],E,1'b0,1'b0); -assign cnt/Timer_D[1] = ((!cnt/TimerTC && cnt/Timer[1] && !cnt/Timer[0]) - || (!cnt/TimerTC && !cnt/Timer[1] && cnt/Timer[0])); - -FTCPE FTCPE_cnt/Timer2 (cnt/Timer[2],cnt/Timer_T[2],E,1'b0,1'b0); -assign cnt/Timer_T[2] = ((cnt/TimerTC && cnt/Timer[2]) - || (!cnt/TimerTC && cnt/Timer[1] && cnt/Timer[0])); - -FTCPE FTCPE_cnt/Timer3 (cnt/Timer[3],cnt/Timer_T[3],E,1'b0,1'b0); -assign cnt/Timer_T[3] = ((cnt/TimerTC && cnt/Timer[3]) - || (!cnt/TimerTC && cnt/Timer[1] && cnt/Timer[2] && - cnt/Timer[0])); - -FDCPE FDCPE_cnt/TimerTC (cnt/TimerTC,cnt/TimerTC_D,E,1'b0,1'b0); -assign cnt/TimerTC_D = (!cnt/Timer[1] && !cnt/Timer[2] && !cnt/Timer[0] && - cnt/Timer[3]); - -FDCPE FDCPE_cnt/nRESout (cnt/nRESout,cnt/nRESout_D,!C8M,1'b0,1'b0); -assign cnt/nRESout_D = ((cnt/LTimer[13] && cnt/PORS_FSM_FFd1 && - !cnt/PORS_FSM_FFd2) - || (cnt/PORS_FSM_FFd1 && !cnt/PORS_FSM_FFd2 && - cnt/nRESout)); - -FTCPE FTCPE_cs/nOverlay0 (cs/nOverlay0,cs/nOverlay0_T,FCLK,!nRES.PIN,1'b0); -assign cs/nOverlay0_T = ((!A_FSB[23] && A_FSB[22] && !A_FSB[21] && !A_FSB[20] && - !cs/nOverlay0 && !nAS_FSB) - || (!A_FSB[23] && A_FSB[22] && !A_FSB[21] && !A_FSB[20] && - !cs/nOverlay0 && fsb/ASrf)); - -FDCPE FDCPE_cs/nOverlay1 (cs/nOverlay1,cs/nOverlay0,FCLK,1'b0,1'b0,cs/nOverlay1_CE); -assign cs/nOverlay1_CE = (nAS_FSB && !fsb/ASrf); - -FDCPE FDCPE_fsb/ASrf (fsb/ASrf,!nAS_FSB,!FCLK,1'b0,1'b0); - -FDCPE FDCPE_fsb/Ready0r (fsb/Ready0r,fsb/Ready0r_D,FCLK,1'b0,1'b0); -assign fsb/Ready0r_D = ((nAS_FSB && !fsb/ASrf) - || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && - !fsb/Ready0r && !ram/RAMReady) - || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && - !cs/nOverlay1 && !fsb/Ready0r && !ram/RAMReady)); - -FDCPE FDCPE_fsb/Ready1r (fsb/Ready1r,fsb/Ready1r_D,FCLK,1'b0,1'b0); -assign fsb/Ready1r_D = ((A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && - !fsb/Ready1r && !iobs/IOReady && !nADoutLE1) - || (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && - !fsb/Ready1r && !iobs/IOReady && !nADoutLE1) - || (nAS_FSB && !fsb/ASrf) - || (A_FSB[23] && !fsb/Ready1r && !iobs/IOReady) - || (A_FSB[22] && A_FSB[21] && !fsb/Ready1r && - !iobs/IOReady) - || (A_FSB[22] && A_FSB[20] && !fsb/Ready1r && - !iobs/IOReady)); - -FDCPE FDCPE_fsb/VPA (fsb/VPA,fsb/VPA_D,FCLK,1'b0,1'b0); -assign fsb/VPA_D = ((EXP15_.EXP) - || (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && - !fsb/Ready1r && fsb/VPA && !iobs/IOReady && !nAS_FSB && !nADoutLE1) - || (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && - !fsb/Ready1r && fsb/VPA && !iobs/IOReady && fsb/ASrf && !nADoutLE1) - || (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && - !fsb/Ready1r && fsb/VPA && !iobs/IOReady && !nAS_FSB && !nADoutLE1) - || (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && - !fsb/Ready1r && fsb/VPA && !iobs/IOReady && fsb/ASrf && !nADoutLE1) - || (A_FSB[9] && A_FSB[8] && A_FSB[15] && A_FSB[14] && - A_FSB[13] && A_FSB[12] && A_FSB[11] && A_FSB[10] && A_FSB[23] && - A_FSB[22] && A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && - A_FSB[17] && A_FSB[16] && iobs/IOReady && !nAS_FSB) - || (A_FSB[22] && A_FSB[20] && !fsb/Ready1r && fsb/VPA && - !iobs/IOReady && fsb/ASrf) - || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && - !fsb/Ready0r && fsb/VPA && !nAS_FSB && !ram/RAMReady) - || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && - !fsb/Ready0r && fsb/VPA && fsb/ASrf && !ram/RAMReady) - || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && - !cs/nOverlay1 && !fsb/Ready0r && fsb/VPA && !nAS_FSB && !ram/RAMReady) - || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && - !cs/nOverlay1 && !fsb/Ready0r && fsb/VPA && fsb/ASrf && !ram/RAMReady) - || (A_FSB[23] && !fsb/Ready1r && fsb/VPA && - !iobs/IOReady && !nAS_FSB) - || (A_FSB[23] && !fsb/Ready1r && fsb/VPA && - !iobs/IOReady && fsb/ASrf) - || (A_FSB[22] && A_FSB[21] && !fsb/Ready1r && fsb/VPA && - !iobs/IOReady && !nAS_FSB) - || (A_FSB[22] && A_FSB[21] && !fsb/Ready1r && fsb/VPA && - !iobs/IOReady && fsb/ASrf) - || (A_FSB[22] && A_FSB[20] && !fsb/Ready1r && fsb/VPA && - !iobs/IOReady && !nAS_FSB)); - -FDCPE FDCPE_iobm/ALE0 (iobm/ALE0,iobm/ALE0_D,C16M,1'b0,1'b0); -assign iobm/ALE0_D = ((iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2) - || (!iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd2 && - !iobm/IOREQr)); - -FDCPE FDCPE_iobm/BERRrf (iobm/BERRrf,!nBERR_IOB,!C16M,1'b0,1'b0); - -FDCPE FDCPE_iobm/BERRrr (iobm/BERRrr,!nBERR_IOB,C16M,1'b0,1'b0); - -FDCPE FDCPE_iobm/DTACKrf (iobm/DTACKrf,!nDTACK_IOB,!C16M,1'b0,1'b0); - -FDCPE FDCPE_iobm/DTACKrr (iobm/DTACKrr,!nDTACK_IOB,C16M,1'b0,1'b0); - -FDCPE FDCPE_iobm/DoutOE (iobm/DoutOE,iobm/DoutOE_D,C16M,1'b0,1'b0); -assign iobm/DoutOE_D = ((iobs/IORW0 && iobm/IOS_FSM_FFd3) - || (iobs/IORW0 && iobm/IOS_FSM_FFd2)); - -FTCPE FTCPE_iobm/ES0 (iobm/ES[0],iobm/ES_T[0],C16M,1'b0,1'b0); -assign iobm/ES_T[0] = ((iobm/ES[0] && !iobm/Er && iobm/Er2) - || (!iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] && - !iobm/ES[3] && !iobm/ES[4] && iobm/Er) - || (!iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] && - !iobm/ES[3] && !iobm/ES[4] && !iobm/Er2)); - -FDCPE FDCPE_iobm/ES1 (iobm/ES[1],iobm/ES_D[1],C16M,1'b0,1'b0); -assign iobm/ES_D[1] = ((iobm/ES[0] && iobm/ES[1]) - || (!iobm/ES[0] && !iobm/ES[1]) - || (!iobm/Er && iobm/Er2)); - -FDCPE FDCPE_iobm/ES2 (iobm/ES[2],iobm/ES_D[2],C16M,1'b0,1'b0); -assign iobm/ES_D[2] = ((!iobm/ES[0] && !iobm/ES[2]) - || (!iobm/ES[1] && !iobm/ES[2]) - || (!iobm/Er && iobm/Er2) - || (iobm/ES[0] && iobm/ES[1] && iobm/ES[2]) - || (!iobm/ES[2] && !iobm/ES[3] && iobm/ES[4])); - -FTCPE FTCPE_iobm/ES3 (iobm/ES[3],iobm/ES_T[3],C16M,1'b0,1'b0); -assign iobm/ES_T[3] = ((iobm/ES[3] && !iobm/Er && iobm/Er2) - || (iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && iobm/Er) - || (iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && !iobm/Er2)); - -FTCPE FTCPE_iobm/ES4 (iobm/ES[4],iobm/ES_T[4],C16M,1'b0,1'b0); -assign iobm/ES_T[4] = ((iobm/ES[4] && !iobm/Er && iobm/Er2) - || (iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && - iobm/ES[3] && iobm/Er) - || (iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && - iobm/ES[3] && !iobm/Er2) - || (iobm/ES[0] && iobm/ES[1] && !iobm/ES[2] && - !iobm/ES[3] && iobm/ES[4])); - -FDCPE FDCPE_iobm/ETACK (iobm/ETACK,iobm/ETACK_D,C16M,1'b0,1'b0); -assign iobm/ETACK_D = (!nVMA_IOB && !iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] && - !iobm/ES[3] && iobm/ES[4]); - -FDCPE FDCPE_iobm/Er (iobm/Er,E,!C8M,1'b0,1'b0); - -FDCPE FDCPE_iobm/Er2 (iobm/Er2,iobm/Er,C16M,1'b0,1'b0); - -FDCPE FDCPE_iobm/IOACT (iobm/IOACT,iobm/IOACT_D,C16M,1'b0,1'b0); -assign iobm/IOACT_D = ((C8M && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && - iobm/RESrf && iobm/RESrr) - || (iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2) - || (!iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd2 && - !iobm/IOREQr) - || (C8M && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && +FDCPE_IOACT: FDCPE port map (IOACT,IOACT_D,C16M,'0','0'); +IOACT_D <= ((C8M AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND + iobm/RESrf AND iobm/RESrr) + OR (iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2) + OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2 AND + NOT iobm/IOREQr) + OR (C8M AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND iobm/ETACK) - || (C8M && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && - iobm/BERRrf && iobm/BERRrr) - || (C8M && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && - iobm/DTACKrf && iobm/DTACKrr)); + OR (C8M AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND + iobm/DTACKrf AND iobm/DTACKrr) + OR (C8M AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND + iobm/BERRrf AND iobm/BERRrr)); -FTCPE FTCPE_iobm/IOBERR (iobm/IOBERR,iobm/IOBERR_T,C16M,1'b0,1'b0); -assign iobm/IOBERR_T = ((C8M && !nBERR_IOB && iobm/IOS_FSM_FFd3 && - iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/BERRrf && - iobm/BERRrr) - || (C8M && !nBERR_IOB && iobm/IOS_FSM_FFd3 && - iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/DTACKrf && +FTCPE_IOBERR: FTCPE port map (IOBERR,IOBERR_T,C16M,'0','0'); +IOBERR_T <= ((C8M AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND + iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/RESrf AND + iobm/RESrr) + OR (C8M AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND + iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/DTACKrf AND iobm/DTACKrr) - || (C8M && !nBERR_IOB && iobm/IOS_FSM_FFd3 && - iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/RESrf && - iobm/RESrr) - || (C8M && nBERR_IOB && iobm/IOS_FSM_FFd3 && - iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/RESrf && - iobm/RESrr) - || (iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd1 && - !iobm/IOS_FSM_FFd2 && iobm/IOBERR) - || (C8M && nBERR_IOB && iobm/IOS_FSM_FFd3 && - iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/ETACK) - || (C8M && !nBERR_IOB && iobm/IOS_FSM_FFd3 && - iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/ETACK) - || (C8M && nBERR_IOB && iobm/IOS_FSM_FFd3 && - iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/BERRrf && + OR (C8M AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND + iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/BERRrf AND iobm/BERRrr) - || (C8M && nBERR_IOB && iobm/IOS_FSM_FFd3 && - iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/DTACKrf && - iobm/DTACKrr)); + OR (C8M AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND + iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/RESrf AND + iobm/RESrr) + OR (iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND + NOT iobm/IOS_FSM_FFd2 AND IOBERR) + OR (C8M AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND + iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/ETACK) + OR (C8M AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND + iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/ETACK) + OR (C8M AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND + iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/DTACKrf AND + iobm/DTACKrr) + OR (C8M AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND + iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/BERRrf AND + iobm/BERRrr)); -FDCPE FDCPE_iobm/IOREQr (iobm/IOREQr,iobs/IOREQ,!C16M,1'b0,1'b0); +FDCPE_IOL0: FDCPE port map (IOL0,IOL0_D,FCLK,'0','0',IOL0_CE); +IOL0_D <= ((NOT nLDS_FSB AND nADoutLE1) + OR (iobs/IOL1 AND NOT nADoutLE1)); +IOL0_CE <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1); -FDCPE FDCPE_iobm/IOS_FSM_FFd1 (iobm/IOS_FSM_FFd1,iobm/IOS_FSM_FFd1_D,C16M,1'b0,1'b0); -assign iobm/IOS_FSM_FFd1_D = ((iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1) - || (!iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd2)); +FDCPE_IOREQ: FDCPE port map (IOREQ,IOREQ_D,FCLK,'0','0'); +IOREQ_D <= ((A_FSB(22) AND A_FSB(21) AND NOT iobs/Once AND NOT nAS_FSB AND + NOT iobs/PS_FSM_FFd1) + OR (A_FSB(22) AND A_FSB(21) AND NOT iobs/Once AND + NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (A_FSB(22) AND A_FSB(20) AND NOT iobs/Once AND NOT nAS_FSB AND + NOT iobs/PS_FSM_FFd1) + OR (A_FSB(22) AND A_FSB(20) AND NOT iobs/Once AND + NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND + NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd1) + OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND + NOT nWE_FSB AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND + NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd1) + OR (A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND + NOT nWE_FSB AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) + OR (iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr) + OR (NOT iobs/PS_FSM_FFd1 AND NOT nADoutLE1) + OR (A_FSB(23) AND NOT iobs/Once AND NOT nAS_FSB AND + NOT iobs/PS_FSM_FFd1) + OR (A_FSB(23) AND NOT iobs/Once AND NOT iobs/PS_FSM_FFd1 AND + fsb/ASrf)); -FTCPE FTCPE_iobm/IOS_FSM_FFd2 (iobm/IOS_FSM_FFd2,iobm/IOS_FSM_FFd2_T,C16M,1'b0,1'b0); -assign iobm/IOS_FSM_FFd2_T = ((iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd1 && - !iobm/IOS_FSM_FFd2) - || (C8M && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && - iobm/IOS_FSM_FFd2 && iobm/ETACK) - || (C8M && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && - iobm/IOS_FSM_FFd2 && iobm/BERRrf && iobm/BERRrr) - || (C8M && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && - iobm/IOS_FSM_FFd2 && iobm/DTACKrf && iobm/DTACKrr) - || (C8M && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && - iobm/IOS_FSM_FFd2 && iobm/RESrf && iobm/RESrr)); - -FDCPE FDCPE_iobm/IOS_FSM_FFd3 (iobm/IOS_FSM_FFd3,iobm/IOS_FSM_FFd3_D,C16M,1'b0,1'b0); -assign iobm/IOS_FSM_FFd3_D = ((iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2) - || (iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd1 && - !iobm/IOS_FSM_FFd2) - || (!C8M && !iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2 && - iobm/IOREQr && !nAoutOE)); - -FDCPE FDCPE_iobm/RESrf (iobm/RESrf,!nRES.PIN,!C16M,1'b0,1'b0); - -FDCPE FDCPE_iobm/RESrr (iobm/RESrr,!nRES.PIN,C16M,1'b0,1'b0); - -FDCPE FDCPE_iobm/VPArf (iobm/VPArf,!nVPA_IOB,!C16M,1'b0,1'b0); - -FDCPE FDCPE_iobm/VPArr (iobm/VPArr,!nVPA_IOB,C16M,1'b0,1'b0); - -FDCPE FDCPE_iobs/ALE0 (iobs/ALE0,iobs/ALE0_D,FCLK,1'b0,1'b0); -assign iobs/ALE0_D = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1); - -FDCPE FDCPE_iobs/Clear1 (iobs/Clear1,iobs/Clear1_D,FCLK,1'b0,1'b0); -assign iobs/Clear1_D = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && !nADoutLE1); - -FDCPE FDCPE_iobs/IOACTr (iobs/IOACTr,iobm/IOACT,FCLK,1'b0,1'b0); - -FDCPE FDCPE_iobs/IOL0 (iobs/IOL0,iobs/IOL0_D,FCLK,1'b0,1'b0,iobs/IOL0_CE); -assign iobs/IOL0_D = ((!nLDS_FSB && nADoutLE1) - || (iobs/IOL1 && !nADoutLE1)); -assign iobs/IOL0_CE = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1); - -FDCPE FDCPE_iobs/IOL1 (iobs/IOL1,!nLDS_FSB,FCLK,1'b0,1'b0,iobs/Load1); - -FDCPE FDCPE_iobs/IOREQ (iobs/IOREQ,iobs/IOREQ_D,FCLK,1'b0,1'b0); -assign iobs/IOREQ_D = ((EXP16_.EXP) - || (A_FSB[23] && !iobs/Once && !nAS_FSB && - !iobs/PS_FSM_FFd1) - || (A_FSB[23] && !iobs/Once && !iobs/PS_FSM_FFd1 && - fsb/ASrf) - || (A_FSB[22] && A_FSB[21] && !iobs/Once && !nAS_FSB && - !iobs/PS_FSM_FFd1) - || (A_FSB[22] && A_FSB[21] && !iobs/Once && - !iobs/PS_FSM_FFd1 && fsb/ASrf) - || (A_FSB[22] && A_FSB[20] && !iobs/Once && !nAS_FSB && - !iobs/PS_FSM_FFd1) - || (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) - || (iobs/PS_FSM_FFd2 && !iobs/IOACTr) - || (!iobs/PS_FSM_FFd1 && !nADoutLE1)); - -FDCPE FDCPE_iobs/IORW0 (iobs/IORW0,iobs/IORW0_D,FCLK,1'b0,1'b0); -assign iobs/IORW0_D = ((!iobs/IORW1 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && - !nADoutLE1) - || (!A_FSB[23] && !A_FSB[21] && !A_FSB[20] && !iobs/IORW0 && +FDCPE_IORW0: FDCPE port map (IORW0,IORW0_D,FCLK,'0','0'); +IORW0_D <= ((EXP11_.EXP) + OR (A_FSB(22) AND A_FSB(21) AND NOT iobs/Once AND NOT nWE_FSB AND + NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) + OR (A_FSB(22) AND A_FSB(21) AND NOT iobs/Once AND NOT nWE_FSB AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1) + OR (A_FSB(22) AND A_FSB(20) AND NOT iobs/Once AND NOT nWE_FSB AND + NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) + OR (A_FSB(22) AND A_FSB(20) AND NOT iobs/Once AND NOT nWE_FSB AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1) + OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND + NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) - || (A_FSB[23] && !nWE_FSB && !iobs/Once && !nAS_FSB && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1) - || (A_FSB[23] && !nWE_FSB && !iobs/Once && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf && nADoutLE1) - || (A_FSB[22] && A_FSB[21] && !nWE_FSB && !iobs/Once && - !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1) - || (nROMWE_OBUF.EXP) - || (A_FSB[22] && A_FSB[21] && !nWE_FSB && !iobs/Once && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf && nADoutLE1) - || (A_FSB[22] && A_FSB[20] && !nWE_FSB && !iobs/Once && - !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1) - || (A_FSB[22] && A_FSB[20] && !nWE_FSB && !iobs/Once && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf && nADoutLE1) - || (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && - cs/nOverlay1 && !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && + OR (NOT iobs/IORW1 AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND + NOT nADoutLE1) + OR (NOT A_FSB(23) AND NOT A_FSB(21) AND NOT A_FSB(20) AND NOT IORW0 AND nADoutLE1) - || (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && - cs/nOverlay1 && !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && - nADoutLE1) - || (!iobs/IORW0 && iobs/PS_FSM_FFd2) - || (!iobs/IORW0 && iobs/PS_FSM_FFd1) - || (iobs/Once && !iobs/IORW0 && nADoutLE1) - || (!A_FSB[23] && !A_FSB[22] && !iobs/IORW0 && nADoutLE1) - || (!iobs/IORW0 && nAS_FSB && !fsb/ASrf && nADoutLE1)); + OR (A_FSB(23) AND NOT iobs/Once AND NOT nWE_FSB AND NOT nAS_FSB AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) + OR (A_FSB(23) AND NOT iobs/Once AND NOT nWE_FSB AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1) + OR (NOT IORW0 AND iobs/PS_FSM_FFd2) + OR (NOT IORW0 AND iobs/PS_FSM_FFd1) + OR (iobs/Once AND NOT IORW0 AND nADoutLE1) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT IORW0 AND nADoutLE1) + OR (NOT IORW0 AND nAS_FSB AND NOT fsb/ASrf AND nADoutLE1)); -FTCPE FTCPE_iobs/IORW1 (iobs/IORW1,iobs/IORW1_T,FCLK,1'b0,1'b0); -assign iobs/IORW1_T = ((iobs/Once) - || (!nADoutLE1) - || (fsb/Ready1r.EXP) - || (nAS_FSB && !fsb/ASrf) - || (!A_FSB[23] && !A_FSB[22] && !A_FSB[21]) - || (!A_FSB[23] && !A_FSB[22] && !A_FSB[19]) - || (!A_FSB[23] && !A_FSB[22] && nWE_FSB) - || (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1) - || (!A_FSB[23] && !A_FSB[22] && !A_FSB[20]) - || (!A_FSB[23] && !A_FSB[22] && !A_FSB[18]) - || (!A_FSB[23] && !A_FSB[22] && !A_FSB[17]) - || (!A_FSB[23] && !A_FSB[22] && !A_FSB[16]) - || (!A_FSB[23] && !A_FSB[21] && !A_FSB[20]) - || (nWE_FSB && iobs/IORW1) - || (!nWE_FSB && !iobs/IORW1) - || (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)); - -FTCPE FTCPE_iobs/IOReady (iobs/IOReady,iobs/IOReady_T,FCLK,1'b0,1'b0); -assign iobs/IOReady_T = ((iobs/IOReady && nAS_FSB && !fsb/ASrf) - || (iobs/Once && iobs/IOReady && !iobs/PS_FSM_FFd2 && - !iobs/IOACTr && iobm/IOBERR && nADoutLE1) - || (iobs/Once && !iobs/IOReady && !nAS_FSB && - !iobs/PS_FSM_FFd2 && !iobs/IOACTr && !iobm/IOBERR && nADoutLE1) - || (iobs/Once && !iobs/IOReady && !iobs/PS_FSM_FFd2 && - !iobs/IOACTr && !iobm/IOBERR && fsb/ASrf && nADoutLE1)); - -FDCPE FDCPE_iobs/IOU0 (iobs/IOU0,iobs/IOU0_D,FCLK,1'b0,1'b0,iobs/IOU0_CE); -assign iobs/IOU0_D = ((!nUDS_FSB && nADoutLE1) - || (iobs/IOU1 && !nADoutLE1)); -assign iobs/IOU0_CE = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1); - -FDCPE FDCPE_iobs/IOU1 (iobs/IOU1,!nUDS_FSB,FCLK,1'b0,1'b0,iobs/Load1); - -FDCPE FDCPE_iobs/Load1 (iobs/Load1,iobs/Load1_D,FCLK,1'b0,1'b0); -assign iobs/Load1_D = ((iobs/Once) - || (!nADoutLE1) - || (!A_FSB[23] && !A_FSB[22] && !A_FSB[21]) - || (!A_FSB[23] && !A_FSB[22] && !A_FSB[19]) - || (!A_FSB[23] && !A_FSB[22] && !A_FSB[17]) - || (!A_FSB[23] && !A_FSB[22] && !A_FSB[16]) - || (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1) - || (!A_FSB[23] && !A_FSB[22] && !A_FSB[20]) - || (!A_FSB[23] && !A_FSB[22] && !A_FSB[18]) - || (!A_FSB[23] && !A_FSB[21] && !A_FSB[20]) - || (!A_FSB[14] && !A_FSB[13] && !A_FSB[23] && !A_FSB[22]) - || (nAS_FSB && !fsb/ASrf) - || (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) - || (!A_FSB[23] && !A_FSB[22] && nWE_FSB)); - -FTCPE FTCPE_iobs/Once (iobs/Once,iobs/Once_T,FCLK,1'b0,1'b0); -assign iobs/Once_T = ((A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && - cs/nOverlay1 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf) - || (A_FSB[14] && !A_FSB[23] && !A_FSB[22] && A_FSB[21] && - A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && - !nWE_FSB && !iobs/Once && cs/nOverlay1 && !nAS_FSB && nADoutLE1) - || (A_FSB[14] && !A_FSB[23] && !A_FSB[22] && A_FSB[21] && - A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && - !nWE_FSB && !iobs/Once && cs/nOverlay1 && fsb/ASrf && nADoutLE1) - || (A_FSB[13] && !A_FSB[23] && !A_FSB[22] && A_FSB[21] && - A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && - !nWE_FSB && !iobs/Once && cs/nOverlay1 && !nAS_FSB && nADoutLE1) - || (A_FSB[13] && !A_FSB[23] && !A_FSB[22] && A_FSB[21] && - A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && - !nWE_FSB && !iobs/Once && cs/nOverlay1 && fsb/ASrf && nADoutLE1) - || (A_FSB[22] && A_FSB[21] && !iobs/Once && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf) - || (A_FSB[22] && A_FSB[20] && !iobs/Once && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf) - || (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && - cs/nOverlay1 && !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) - || (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && - cs/nOverlay1 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf) - || (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && - cs/nOverlay1 && !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) - || (iobs/Once && nAS_FSB && !fsb/ASrf) - || (A_FSB[23] && !iobs/Once && !nAS_FSB && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) - || (A_FSB[23] && !iobs/Once && !iobs/PS_FSM_FFd2 && - !iobs/PS_FSM_FFd1 && fsb/ASrf) - || (A_FSB[22] && A_FSB[21] && !iobs/Once && !nAS_FSB && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) - || (A_FSB[22] && A_FSB[20] && !iobs/Once && !nAS_FSB && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)); - -FDCPE FDCPE_iobs/PS_FSM_FFd1 (iobs/PS_FSM_FFd1,iobs/PS_FSM_FFd1_D,FCLK,1'b0,1'b0); -assign iobs/PS_FSM_FFd1_D = ((iobs/PS_FSM_FFd2) - || (iobs/PS_FSM_FFd1 && iobs/IOACTr)); - -FTCPE FTCPE_iobs/PS_FSM_FFd2 (iobs/PS_FSM_FFd2,iobs/PS_FSM_FFd2_T,FCLK,1'b0,1'b0); -assign iobs/PS_FSM_FFd2_T = ((iobs/nBERR_FSB.EXP) - || (A_FSB[23] && !iobs/Once && !iobs/PS_FSM_FFd2 && - !iobs/PS_FSM_FFd1 && fsb/ASrf) - || (A_FSB[22] && A_FSB[21] && !iobs/Once && !nAS_FSB && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) - || (A_FSB[22] && A_FSB[21] && !iobs/Once && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf) - || (A_FSB[22] && A_FSB[20] && !iobs/Once && !nAS_FSB && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) - || (A_FSB[22] && A_FSB[20] && !iobs/Once && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf) - || (iobs/PS_FSM_FFd1 && iobs/IOACTr) - || (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && !nADoutLE1) - || (A_FSB[23] && !iobs/Once && !nAS_FSB && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)); +FDCPE_IOU0: FDCPE port map (IOU0,IOU0_D,FCLK,'0','0',IOU0_CE); +IOU0_D <= ((NOT nUDS_FSB AND nADoutLE1) + OR (iobs/IOU1 AND NOT nADoutLE1)); +IOU0_CE <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1); -assign nADoutLE0 = (!iobm/ALE0 && !iobs/ALE0); +RA(0) <= ((A_FSB(10) AND NOT ram/RASEL) + OR (ram/RASEL AND A_FSB(1))); -FDCPE FDCPE_nADoutLE1 (nADoutLE1,nADoutLE1_D,FCLK,1'b0,1'b0); -assign nADoutLE1_D = ((iobs/Load1) - || (!iobs/Clear1 && !nADoutLE1)); -FDCPE FDCPE_nAS_IOB (nAS_IOB_I,nAS_IOB,!C16M,1'b0,1'b0); -assign nAS_IOB = ((!iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd2) - || (iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2)); -assign nAS_IOB = nAS_IOB_OE ? nAS_IOB_I : 1'bZ; -assign nAS_IOB_OE = !nAoutOE; +RA(1) <= ((A_FSB(11) AND NOT ram/RASEL) + OR (ram/RASEL AND A_FSB(2))); -FDCPE FDCPE_nAoutOE (nAoutOE,nAoutOE_D,!C8M,1'b0,1'b0); -assign nAoutOE_D = (!nBR_IOB && cnt/PORS_FSM_FFd1 && !cnt/PORS_FSM_FFd2); -FTCPE FTCPE_nBERR_FSB (nBERR_FSB,nBERR_FSB_T,FCLK,1'b0,1'b0); -assign nBERR_FSB_T = ((iobs/Once && !nBERR_FSB && !iobs/PS_FSM_FFd2 && - !iobs/IOACTr && !iobm/IOBERR && nADoutLE1) - || (iobs/Once && !nAS_FSB && nBERR_FSB && - !iobs/PS_FSM_FFd2 && !iobs/IOACTr && iobm/IOBERR && nADoutLE1) - || (iobs/Once && nBERR_FSB && !iobs/PS_FSM_FFd2 && - !iobs/IOACTr && iobm/IOBERR && fsb/ASrf && nADoutLE1) - || (nAS_FSB && !nBERR_FSB && !fsb/ASrf)); +RA(2) <= ((A_FSB(12) AND NOT ram/RASEL) + OR (ram/RASEL AND A_FSB(3))); -FTCPE FTCPE_nBR_IOB (nBR_IOB,nBR_IOB_T,!C8M,1'b0,1'b0); -assign nBR_IOB_T = ((nBR_IOB && !cnt/PORS_FSM_FFd1 && !cnt/PORS_FSM_FFd2) - || (!nBR_IOB && !cnt/PORS_FSM_FFd1 && cnt/PORS_FSM_FFd2 && - cnt/IPL2r)); -FDCPE FDCPE_nCAS (nCAS,!ram/RASEL,!FCLK,1'b0,1'b0); +RA(3) <= ((A_FSB(13) AND NOT ram/RASEL) + OR (ram/RASEL AND A_FSB(4))); -FDCPE FDCPE_nDTACK_FSB (nDTACK_FSB,nDTACK_FSB_D,FCLK,1'b0,1'b0); -assign nDTACK_FSB_D = ((iobs/IOREQ.EXP) - || (nAS_FSB && !fsb/ASrf) - || (A_FSB[23] && !fsb/Ready1r && !iobs/IOReady && + +RA(4) <= ((A_FSB(14) AND NOT ram/RASEL) + OR (ram/RASEL AND A_FSB(5))); + + +RA(5) <= ((A_FSB(15) AND NOT ram/RASEL) + OR (ram/RASEL AND A_FSB(6))); + + +RA(6) <= ((ram/RASEL AND A_FSB(7)) + OR (A_FSB(16) AND NOT ram/RASEL)); + + +RA(7) <= ((A_FSB(8) AND ram/RASEL) + OR (A_FSB(17) AND NOT ram/RASEL)); + + +RA(8) <= ((A_FSB(23) AND A_FSB(18)) + OR (A_FSB(22) AND A_FSB(18)) + OR (A_FSB(18) AND NOT cs/nOverlay) + OR (A_FSB(18) AND NOT ram/RASEL) + OR (A_FSB(9) AND NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND + ram/RASEL)); + + +RA(9) <= ((A_FSB(20) AND ram/RASEL) + OR (A_FSB(19) AND NOT ram/RASEL)); + + +RA(10) <= A_FSB(21); + + +RA(11) <= A_FSB(19); + +FDCPE_RefReq: FDCPE port map (RefReq,RefReq_D,FCLK,'0','0',RefReq_CE); +RefReq_D <= (NOT RefUrg AND NOT cnt/Timer(1) AND NOT cnt/Timer(2)); +RefReq_CE <= (NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_RefUrg: FTCPE port map (RefUrg,RefUrg_T,FCLK,'0','0',RefUrg_CE); +RefUrg_T <= ((RefUrg AND cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)) + OR (cnt/Timer(0) AND cnt/Timer(1) AND cnt/Timer(2) AND + NOT cnt/TimerTC) + OR (cnt/Timer(0) AND cnt/Timer(1) AND cnt/Timer(2) AND + cnt/Er(0)) + OR (cnt/Timer(0) AND cnt/Timer(1) AND cnt/Timer(2) AND + NOT cnt/Er(1))); +RefUrg_CE <= (NOT cnt/Er(0) AND cnt/Er(1)); + +FDCPE_cnt/Er0: FDCPE port map (cnt/Er(0),E,FCLK,'0','0'); + +FDCPE_cnt/Er1: FDCPE port map (cnt/Er(1),cnt/Er(0),FCLK,'0','0'); + +FTCPE_cnt/INITS_FSM_FFd1: FTCPE port map (cnt/INITS_FSM_FFd1,cnt/INITS_FSM_FFd1_T,FCLK,'0','0'); +cnt/INITS_FSM_FFd1_T <= (cnt/TimerTC AND cnt/LTimerTC AND NOT cnt/INITS_FSM_FFd1 AND + cnt/INITS_FSM_FFd2 AND NOT cnt/Er(0) AND cnt/nIPL2r AND cnt/Er(1)); + +FTCPE_cnt/INITS_FSM_FFd2: FTCPE port map (cnt/INITS_FSM_FFd2,cnt/INITS_FSM_FFd2_T,FCLK,'0','0'); +cnt/INITS_FSM_FFd2_T <= ((cnt/TimerTC AND cnt/LTimerTC AND cnt/INITS_FSM_FFd1 AND + cnt/INITS_FSM_FFd2 AND NOT cnt/Er(0) AND cnt/Er(1)) + OR (cnt/TimerTC AND cnt/LTimerTC AND NOT cnt/INITS_FSM_FFd1 AND + NOT cnt/INITS_FSM_FFd2 AND NOT cnt/Er(0) AND cnt/Er(1))); + +FTCPE_cnt/LTimer0: FTCPE port map (cnt/LTimer(0),'1',FCLK,'0','0',cnt/LTimer_CE(0)); +cnt/LTimer_CE(0) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_cnt/LTimer1: FTCPE port map (cnt/LTimer(1),cnt/LTimer(0),FCLK,'0','0',cnt/LTimer_CE(1)); +cnt/LTimer_CE(1) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_cnt/LTimer2: FTCPE port map (cnt/LTimer(2),cnt/LTimer_T(2),FCLK,'0','0',cnt/LTimer_CE(2)); +cnt/LTimer_T(2) <= (cnt/LTimer(0) AND cnt/LTimer(1)); +cnt/LTimer_CE(2) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_cnt/LTimer3: FTCPE port map (cnt/LTimer(3),cnt/LTimer_T(3),FCLK,'0','0',cnt/LTimer_CE(3)); +cnt/LTimer_T(3) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2)); +cnt/LTimer_CE(3) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_cnt/LTimer4: FTCPE port map (cnt/LTimer(4),cnt/LTimer_T(4),FCLK,'0','0',cnt/LTimer_CE(4)); +cnt/LTimer_T(4) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND + cnt/LTimer(3)); +cnt/LTimer_CE(4) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_cnt/LTimer5: FTCPE port map (cnt/LTimer(5),cnt/LTimer_T(5),FCLK,'0','0',cnt/LTimer_CE(5)); +cnt/LTimer_T(5) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND + cnt/LTimer(3) AND cnt/LTimer(4)); +cnt/LTimer_CE(5) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_cnt/LTimer6: FTCPE port map (cnt/LTimer(6),cnt/LTimer_T(6),FCLK,'0','0',cnt/LTimer_CE(6)); +cnt/LTimer_T(6) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND + cnt/LTimer(3) AND cnt/LTimer(4) AND cnt/LTimer(5)); +cnt/LTimer_CE(6) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_cnt/LTimer7: FTCPE port map (cnt/LTimer(7),cnt/LTimer_T(7),FCLK,'0','0',cnt/LTimer_CE(7)); +cnt/LTimer_T(7) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND + cnt/LTimer(3) AND cnt/LTimer(4) AND cnt/LTimer(5) AND cnt/LTimer(6)); +cnt/LTimer_CE(7) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_cnt/LTimer8: FTCPE port map (cnt/LTimer(8),cnt/LTimer_T(8),FCLK,'0','0',cnt/LTimer_CE(8)); +cnt/LTimer_T(8) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND + cnt/LTimer(3) AND cnt/LTimer(4) AND cnt/LTimer(5) AND cnt/LTimer(6) AND + cnt/LTimer(7)); +cnt/LTimer_CE(8) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_cnt/LTimer9: FTCPE port map (cnt/LTimer(9),cnt/LTimer_T(9),FCLK,'0','0',cnt/LTimer_CE(9)); +cnt/LTimer_T(9) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND + cnt/LTimer(3) AND cnt/LTimer(4) AND cnt/LTimer(5) AND cnt/LTimer(6) AND + cnt/LTimer(7) AND cnt/LTimer(8)); +cnt/LTimer_CE(9) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_cnt/LTimer10: FTCPE port map (cnt/LTimer(10),cnt/LTimer_T(10),FCLK,'0','0',cnt/LTimer_CE(10)); +cnt/LTimer_T(10) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND + cnt/LTimer(3) AND cnt/LTimer(4) AND cnt/LTimer(5) AND cnt/LTimer(6) AND + cnt/LTimer(7) AND cnt/LTimer(8) AND cnt/LTimer(9)); +cnt/LTimer_CE(10) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_cnt/LTimer11: FTCPE port map (cnt/LTimer(11),cnt/LTimer_T(11),FCLK,'0','0',cnt/LTimer_CE(11)); +cnt/LTimer_T(11) <= (cnt/LTimer(0) AND cnt/LTimer(10) AND cnt/LTimer(1) AND + cnt/LTimer(2) AND cnt/LTimer(3) AND cnt/LTimer(4) AND cnt/LTimer(5) AND + cnt/LTimer(6) AND cnt/LTimer(7) AND cnt/LTimer(8) AND cnt/LTimer(9)); +cnt/LTimer_CE(11) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_cnt/LTimer12: FTCPE port map (cnt/LTimer(12),cnt/LTimer_T(12),FCLK,'0','0',cnt/LTimer_CE(12)); +cnt/LTimer_T(12) <= (cnt/LTimer(0) AND cnt/LTimer(10) AND cnt/LTimer(11) AND + cnt/LTimer(1) AND cnt/LTimer(2) AND cnt/LTimer(3) AND cnt/LTimer(4) AND + cnt/LTimer(5) AND cnt/LTimer(6) AND cnt/LTimer(7) AND cnt/LTimer(8) AND + cnt/LTimer(9)); +cnt/LTimer_CE(12) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FDCPE_cnt/LTimerTC: FDCPE port map (cnt/LTimerTC,cnt/LTimerTC_D,FCLK,'0','0',cnt/LTimerTC_CE); +cnt/LTimerTC_D <= (NOT cnt/LTimer(0) AND cnt/LTimer(10) AND cnt/LTimer(11) AND + cnt/LTimer(1) AND cnt/LTimer(2) AND cnt/LTimer(3) AND cnt/LTimer(4) AND + cnt/LTimer(5) AND cnt/LTimer(6) AND cnt/LTimer(7) AND cnt/LTimer(8) AND + cnt/LTimer(9) AND cnt/LTimer(12)); +cnt/LTimerTC_CE <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_cnt/Timer0: FTCPE port map (cnt/Timer(0),cnt/Timer_T(0),FCLK,'0','0',cnt/Timer_CE(0)); +cnt/Timer_T(0) <= (NOT cnt/Timer(0) AND cnt/TimerTC AND NOT cnt/Er(0) AND + cnt/Er(1)); +cnt/Timer_CE(0) <= (NOT cnt/Er(0) AND cnt/Er(1)); + +FDCPE_cnt/Timer1: FDCPE port map (cnt/Timer(1),cnt/Timer_D(1),FCLK,'0','0',cnt/Timer_CE(1)); +cnt/Timer_D(1) <= ((NOT cnt/Timer(0) AND NOT cnt/Timer(1)) + OR (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)) + OR (cnt/Timer(0) AND cnt/Timer(1))); +cnt/Timer_CE(1) <= (NOT cnt/Er(0) AND cnt/Er(1)); + +FDCPE_cnt/Timer2: FDCPE port map (cnt/Timer(2),cnt/Timer_D(2),FCLK,'0','0',cnt/Timer_CE(2)); +cnt/Timer_D(2) <= ((cnt/Timer(0) AND cnt/Timer(1) AND cnt/Timer(2)) + OR (NOT cnt/Timer(0) AND NOT cnt/Timer(2)) + OR (NOT cnt/Timer(1) AND NOT cnt/Timer(2)) + OR (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1))); +cnt/Timer_CE(2) <= (NOT cnt/Er(0) AND cnt/Er(1)); + +FDCPE_cnt/TimerTC: FDCPE port map (cnt/TimerTC,cnt/TimerTC_D,FCLK,'0','0',cnt/TimerTC_CE); +cnt/TimerTC_D <= (RefUrg AND cnt/Timer(0) AND NOT cnt/Timer(1) AND + NOT cnt/Timer(2)); +cnt/TimerTC_CE <= (NOT cnt/Er(0) AND cnt/Er(1)); + +FDCPE_cnt/nIPL2r: FDCPE port map (cnt/nIPL2r,nIPL2,FCLK,'0','0'); + +FTCPE_cs/nOverlay: FTCPE port map (cs/nOverlay,cs/nOverlay_T,FCLK,NOT nRES.PIN,'0'); +cs/nOverlay_T <= ((NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND + NOT cs/nOverlay AND NOT nAS_FSB) + OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND + NOT cs/nOverlay AND fsb/ASrf)); + +FDCPE_fsb/ASrf: FDCPE port map (fsb/ASrf,NOT nAS_FSB,NOT FCLK,'0','0'); + +FDCPE_fsb/Ready0r: FDCPE port map (fsb/Ready0r,fsb/Ready0r_D,FCLK,'0','0'); +fsb/Ready0r_D <= ((nAS_FSB AND NOT fsb/ASrf) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND + NOT fsb/Ready0r AND NOT ram/RAMReady)); + +FDCPE_fsb/Ready1r: FDCPE port map (fsb/Ready1r,fsb/Ready1r_D,FCLK,'0','0'); +fsb/Ready1r_D <= ((A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND cs/nOverlay AND + NOT fsb/Ready1r AND NOT nWE_FSB AND NOT iobs/IOReady AND NOT nADoutLE1) + OR (nAS_FSB AND NOT fsb/ASrf) + OR (A_FSB(23) AND NOT fsb/Ready1r AND NOT iobs/IOReady) + OR (A_FSB(22) AND A_FSB(21) AND NOT fsb/Ready1r AND + NOT iobs/IOReady) + OR (A_FSB(22) AND A_FSB(20) AND NOT fsb/Ready1r AND + NOT iobs/IOReady) + OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND cs/nOverlay AND + NOT fsb/Ready1r AND NOT nWE_FSB AND NOT iobs/IOReady AND NOT nADoutLE1)); + +FDCPE_fsb/VPA: FDCPE port map (fsb/VPA,fsb/VPA_D,FCLK,'0','0'); +fsb/VPA_D <= ((EXP12_.EXP) + OR (A_FSB(22) AND A_FSB(20) AND NOT fsb/Ready1r AND fsb/VPA AND + NOT iobs/IOReady AND fsb/ASrf) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND + NOT fsb/Ready0r AND fsb/VPA AND NOT nAS_FSB AND NOT ram/RAMReady) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND + NOT fsb/Ready0r AND fsb/VPA AND fsb/ASrf AND NOT ram/RAMReady) + OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND cs/nOverlay AND + NOT fsb/Ready1r AND fsb/VPA AND NOT nWE_FSB AND NOT iobs/IOReady AND NOT nAS_FSB AND + NOT nADoutLE1) + OR (A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND cs/nOverlay AND + NOT fsb/Ready1r AND fsb/VPA AND NOT nWE_FSB AND NOT iobs/IOReady AND NOT nAS_FSB AND + NOT nADoutLE1) + OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND cs/nOverlay AND + NOT fsb/Ready1r AND fsb/VPA AND NOT nWE_FSB AND NOT iobs/IOReady AND fsb/ASrf AND + NOT nADoutLE1) + OR (A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND cs/nOverlay AND + NOT fsb/Ready1r AND fsb/VPA AND NOT nWE_FSB AND NOT iobs/IOReady AND fsb/ASrf AND + NOT nADoutLE1) + OR (A_FSB(9) AND A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND + A_FSB(13) AND A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND A_FSB(23) AND + A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND + A_FSB(17) AND A_FSB(16) AND fsb/Ready1r AND NOT nAS_FSB) + OR (A_FSB(9) AND A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND + A_FSB(13) AND A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND A_FSB(23) AND + A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND + A_FSB(17) AND A_FSB(16) AND iobs/IOReady AND NOT nAS_FSB) + OR (A_FSB(9) AND A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND + A_FSB(13) AND A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND A_FSB(23) AND + A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND + A_FSB(17) AND A_FSB(16) AND iobs/IOReady AND fsb/ASrf) + OR (A_FSB(23) AND NOT fsb/Ready1r AND fsb/VPA AND + NOT iobs/IOReady AND NOT nAS_FSB) + OR (A_FSB(23) AND NOT fsb/Ready1r AND fsb/VPA AND + NOT iobs/IOReady AND fsb/ASrf) + OR (A_FSB(22) AND A_FSB(21) AND NOT fsb/Ready1r AND fsb/VPA AND + NOT iobs/IOReady AND NOT nAS_FSB) + OR (A_FSB(22) AND A_FSB(21) AND NOT fsb/Ready1r AND fsb/VPA AND + NOT iobs/IOReady AND fsb/ASrf) + OR (A_FSB(22) AND A_FSB(20) AND NOT fsb/Ready1r AND fsb/VPA AND + NOT iobs/IOReady AND NOT nAS_FSB)); + +FDCPE_iobm/BERRrf: FDCPE port map (iobm/BERRrf,NOT nBERR_IOB,NOT C16M,'0','0'); + +FDCPE_iobm/BERRrr: FDCPE port map (iobm/BERRrr,NOT nBERR_IOB,C16M,'0','0'); + +FDCPE_iobm/DTACKrf: FDCPE port map (iobm/DTACKrf,NOT nDTACK_IOB,NOT C16M,'0','0'); + +FDCPE_iobm/DTACKrr: FDCPE port map (iobm/DTACKrr,NOT nDTACK_IOB,C16M,'0','0'); + +FDCPE_iobm/DoutOE: FDCPE port map (iobm/DoutOE,iobm/DoutOE_D,C16M,'0','0'); +iobm/DoutOE_D <= ((NOT IORW0 AND iobm/IOS_FSM_FFd3) + OR (NOT IORW0 AND iobm/IOS_FSM_FFd2) + OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND + NOT iobm/IOS_FSM_FFd2 AND NOT iobm/IOREQr AND NOT nAoutOE)); + +FTCPE_iobm/ES0: FTCPE port map (iobm/ES(0),iobm/ES_T(0),C16M,'0','0'); +iobm/ES_T(0) <= ((iobm/ES(0) AND NOT iobm/Er AND iobm/Er2) + OR (NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND + NOT iobm/ES(3) AND NOT iobm/ES(4) AND iobm/Er) + OR (NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND + NOT iobm/ES(3) AND NOT iobm/ES(4) AND NOT iobm/Er2)); + +FDCPE_iobm/ES1: FDCPE port map (iobm/ES(1),iobm/ES_D(1),C16M,'0','0'); +iobm/ES_D(1) <= ((iobm/ES(0) AND iobm/ES(1)) + OR (NOT iobm/ES(0) AND NOT iobm/ES(1)) + OR (NOT iobm/Er AND iobm/Er2)); + +FDCPE_iobm/ES2: FDCPE port map (iobm/ES(2),iobm/ES_D(2),C16M,'0','0'); +iobm/ES_D(2) <= ((NOT iobm/ES(0) AND NOT iobm/ES(2)) + OR (NOT iobm/ES(1) AND NOT iobm/ES(2)) + OR (NOT iobm/Er AND iobm/Er2) + OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2)) + OR (NOT iobm/ES(2) AND NOT iobm/ES(3) AND iobm/ES(4))); + +FTCPE_iobm/ES3: FTCPE port map (iobm/ES(3),iobm/ES_T(3),C16M,'0','0'); +iobm/ES_T(3) <= ((iobm/ES(3) AND NOT iobm/Er AND iobm/Er2) + OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND iobm/Er) + OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND NOT iobm/Er2)); + +FTCPE_iobm/ES4: FTCPE port map (iobm/ES(4),iobm/ES_T(4),C16M,'0','0'); +iobm/ES_T(4) <= ((iobm/ES(4) AND NOT iobm/Er AND iobm/Er2) + OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND + iobm/ES(3) AND iobm/Er) + OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND + iobm/ES(3) AND NOT iobm/Er2) + OR (iobm/ES(0) AND iobm/ES(1) AND NOT iobm/ES(2) AND + NOT iobm/ES(3) AND iobm/ES(4))); + +FDCPE_iobm/ETACK: FDCPE port map (iobm/ETACK,iobm/ETACK_D,C16M,'0','0'); +iobm/ETACK_D <= (NOT nVMA_IOB AND NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND + NOT iobm/ES(3) AND iobm/ES(4)); + +FDCPE_iobm/Er: FDCPE port map (iobm/Er,E,NOT C8M,'0','0'); + +FDCPE_iobm/Er2: FDCPE port map (iobm/Er2,iobm/Er,C16M,'0','0'); + +FDCPE_iobm/IOREQr: FDCPE port map (iobm/IOREQr,IOREQ,NOT C16M,'0','0'); + +FDCPE_iobm/IOS_FSM_FFd1: FDCPE port map (iobm/IOS_FSM_FFd1,iobm/IOS_FSM_FFd1_D,C16M,'0','0'); +iobm/IOS_FSM_FFd1_D <= ((iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1) + OR (NOT iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2)); + +FTCPE_iobm/IOS_FSM_FFd2: FTCPE port map (iobm/IOS_FSM_FFd2,iobm/IOS_FSM_FFd2_T,C16M,'0','0'); +iobm/IOS_FSM_FFd2_T <= ((iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND + NOT iobm/IOS_FSM_FFd2) + OR (C8M AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND + iobm/IOS_FSM_FFd2 AND iobm/ETACK) + OR (C8M AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND + iobm/IOS_FSM_FFd2 AND iobm/DTACKrf AND iobm/DTACKrr) + OR (C8M AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND + iobm/IOS_FSM_FFd2 AND iobm/BERRrf AND iobm/BERRrr) + OR (C8M AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND + iobm/IOS_FSM_FFd2 AND iobm/RESrf AND iobm/RESrr)); + +FDCPE_iobm/IOS_FSM_FFd3: FDCPE port map (iobm/IOS_FSM_FFd3,iobm/IOS_FSM_FFd3_D,C16M,'0','0'); +iobm/IOS_FSM_FFd3_D <= ((iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2) + OR (iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND + NOT iobm/IOS_FSM_FFd2) + OR (NOT C8M AND NOT iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2 AND + iobm/IOREQr AND NOT nAoutOE)); + +FDCPE_iobm/RESrf: FDCPE port map (iobm/RESrf,NOT nRES.PIN,NOT C16M,'0','0'); + +FDCPE_iobm/RESrr: FDCPE port map (iobm/RESrr,NOT nRES.PIN,C16M,'0','0'); + +FDCPE_iobm/VPArf: FDCPE port map (iobm/VPArf,NOT nVPA_IOB,NOT C16M,'0','0'); + +FDCPE_iobm/VPArr: FDCPE port map (iobm/VPArr,NOT nVPA_IOB,C16M,'0','0'); + +FDCPE_iobs/Clear1: FDCPE port map (iobs/Clear1,iobs/Clear1_D,FCLK,'0','0'); +iobs/Clear1_D <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND NOT nADoutLE1); + +FDCPE_iobs/IOACTr: FDCPE port map (iobs/IOACTr,IOACT,FCLK,'0','0'); + +FDCPE_iobs/IOL1: FDCPE port map (iobs/IOL1,NOT nLDS_FSB,FCLK,'0','0',iobs/Load1); + +FTCPE_iobs/IORW1: FTCPE port map (iobs/IORW1,iobs/IORW1_T,FCLK,'0','0'); +iobs/IORW1_T <= ((iobs/Once) + OR (NOT nADoutLE1) + OR (nDTACK_FSB_OBUF.EXP) + OR (nAS_FSB AND NOT fsb/ASrf) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21)) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(19)) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND nWE_FSB) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(20)) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(18)) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(17)) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(16)) + OR (NOT A_FSB(23) AND NOT A_FSB(21) AND NOT A_FSB(20)) + OR (nWE_FSB AND iobs/IORW1) + OR (NOT nWE_FSB AND NOT iobs/IORW1) + OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1)); + +FTCPE_iobs/IOReady: FTCPE port map (iobs/IOReady,iobs/IOReady_T,FCLK,'0','0'); +iobs/IOReady_T <= ((iobs/IOReady AND nAS_FSB AND NOT fsb/ASrf) + OR (iobs/Once AND iobs/IOReady AND NOT iobs/PS_FSM_FFd2 AND + NOT iobs/IOACTr AND IOBERR AND nADoutLE1) + OR (iobs/Once AND NOT iobs/IOReady AND NOT nAS_FSB AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND NOT IOBERR AND nADoutLE1) + OR (iobs/Once AND NOT iobs/IOReady AND NOT iobs/PS_FSM_FFd2 AND + NOT iobs/IOACTr AND NOT IOBERR AND fsb/ASrf AND nADoutLE1)); + +FDCPE_iobs/IOU1: FDCPE port map (iobs/IOU1,NOT nUDS_FSB,FCLK,'0','0',iobs/Load1); + +FDCPE_iobs/Load1: FDCPE port map (iobs/Load1,iobs/Load1_D,FCLK,'0','0'); +iobs/Load1_D <= ((iobs/Once) + OR (NOT nADoutLE1) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21)) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(19)) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(16)) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND nWE_FSB) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(20)) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(18)) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(17)) + OR (NOT A_FSB(23) AND NOT A_FSB(21) AND NOT A_FSB(20)) + OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND NOT A_FSB(22)) + OR (nAS_FSB AND NOT fsb/ASrf) + OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay)); + +FTCPE_iobs/Once: FTCPE port map (iobs/Once,iobs/Once_T,FCLK,'0','0'); +iobs/Once_T <= ((A_FSB(22) AND A_FSB(21) AND NOT iobs/Once AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (A_FSB(22) AND A_FSB(20) AND NOT iobs/Once AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND + NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) + OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND + NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND + NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) + OR (A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND + NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (A_FSB(14) AND NOT A_FSB(23) AND NOT A_FSB(22) AND A_FSB(21) AND + A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND + NOT iobs/Once AND cs/nOverlay AND NOT nWE_FSB AND NOT nAS_FSB AND nADoutLE1) + OR (A_FSB(14) AND NOT A_FSB(23) AND NOT A_FSB(22) AND A_FSB(21) AND + A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND + NOT iobs/Once AND cs/nOverlay AND NOT nWE_FSB AND fsb/ASrf AND nADoutLE1) + OR (A_FSB(13) AND NOT A_FSB(23) AND NOT A_FSB(22) AND A_FSB(21) AND + A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND + NOT iobs/Once AND cs/nOverlay AND NOT nWE_FSB AND NOT nAS_FSB AND nADoutLE1) + OR (A_FSB(13) AND NOT A_FSB(23) AND NOT A_FSB(22) AND A_FSB(21) AND + A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND + NOT iobs/Once AND cs/nOverlay AND NOT nWE_FSB AND fsb/ASrf AND nADoutLE1) + OR (iobs/Once AND nAS_FSB AND NOT fsb/ASrf) + OR (A_FSB(23) AND NOT iobs/Once AND NOT nAS_FSB AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) + OR (A_FSB(23) AND NOT iobs/Once AND NOT iobs/PS_FSM_FFd2 AND + NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (A_FSB(22) AND A_FSB(21) AND NOT iobs/Once AND NOT nAS_FSB AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) + OR (A_FSB(22) AND A_FSB(20) AND NOT iobs/Once AND NOT nAS_FSB AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1)); + +FDCPE_iobs/PS_FSM_FFd1: FDCPE port map (iobs/PS_FSM_FFd1,iobs/PS_FSM_FFd1_D,FCLK,'0','0'); +iobs/PS_FSM_FFd1_D <= ((iobs/PS_FSM_FFd2) + OR (iobs/PS_FSM_FFd1 AND iobs/IOACTr)); + +FTCPE_iobs/PS_FSM_FFd2: FTCPE port map (iobs/PS_FSM_FFd2,iobs/PS_FSM_FFd2_T,FCLK,'0','0'); +iobs/PS_FSM_FFd2_T <= ((A_FSB(22) AND A_FSB(21) AND NOT iobs/Once AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (A_FSB(22) AND A_FSB(20) AND NOT iobs/Once AND NOT nAS_FSB AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) + OR (A_FSB(22) AND A_FSB(20) AND NOT iobs/Once AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND + NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) + OR (A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND + NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) + OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND + NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND + NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (iobs/PS_FSM_FFd1 AND iobs/IOACTr) + OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND NOT nADoutLE1) + OR (A_FSB(23) AND NOT iobs/Once AND NOT nAS_FSB AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) + OR (A_FSB(23) AND NOT iobs/Once AND NOT iobs/PS_FSM_FFd2 AND + NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (A_FSB(22) AND A_FSB(21) AND NOT iobs/Once AND NOT nAS_FSB AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1)); + + +nADoutLE0 <= (NOT ALE0M AND NOT ALE0S); + +FDCPE_nADoutLE1: FDCPE port map (nADoutLE1,nADoutLE1_D,FCLK,'0','0'); +nADoutLE1_D <= ((iobs/Load1) + OR (NOT iobs/Clear1 AND NOT nADoutLE1)); + +FDCPE_nAS_IOB: FDCPE port map (nAS_IOB_I,nAS_IOB,NOT C16M,'0','0'); +nAS_IOB <= ((NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2) + OR (iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2)); +nAS_IOB <= nAS_IOB_I when nAS_IOB_OE = '1' else 'Z'; +nAS_IOB_OE <= NOT nAoutOE; + +FDCPE_nAoutOE: FDCPE port map (nAoutOE,nAoutOE_D,FCLK,'0','0'); +nAoutOE_D <= ((NOT nBR_IOB AND cnt/INITS_FSM_FFd1 AND + cnt/INITS_FSM_FFd2) + OR (cnt/INITS_FSM_FFd1 AND NOT cnt/INITS_FSM_FFd2 AND + NOT nAoutOE)); + +FTCPE_nBERR_FSB: FTCPE port map (nBERR_FSB,nBERR_FSB_T,FCLK,'0','0'); +nBERR_FSB_T <= ((NOT nBERR_FSB AND nAS_FSB AND NOT fsb/ASrf) + OR (iobs/Once AND NOT nBERR_FSB AND NOT iobs/PS_FSM_FFd2 AND + NOT iobs/IOACTr AND NOT IOBERR AND nADoutLE1) + OR (iobs/Once AND nBERR_FSB AND NOT nAS_FSB AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND IOBERR AND nADoutLE1) + OR (iobs/Once AND nBERR_FSB AND NOT iobs/PS_FSM_FFd2 AND + NOT iobs/IOACTr AND IOBERR AND fsb/ASrf AND nADoutLE1)); + +FTCPE_nBR_IOB: FTCPE port map (nBR_IOB,nBR_IOB_T,FCLK,'0','0'); +nBR_IOB_T <= ((NOT nBR_IOB AND NOT cnt/INITS_FSM_FFd1 AND + cnt/INITS_FSM_FFd2 AND NOT cnt/nIPL2r) + OR (nBR_IOB AND NOT cnt/INITS_FSM_FFd1 AND + NOT cnt/INITS_FSM_FFd2)); + +FDCPE_nCAS: FDCPE port map (nCAS,NOT ram/RASEL,NOT FCLK,'0','0'); + +FDCPE_nDTACK_FSB: FDCPE port map (nDTACK_FSB,nDTACK_FSB_D,FCLK,'0','0'); +nDTACK_FSB_D <= ((nAS_FSB AND NOT fsb/ASrf) + OR (A_FSB(23) AND NOT fsb/Ready1r AND NOT iobs/IOReady AND nDTACK_FSB) - || (A_FSB[22] && A_FSB[21] && !fsb/Ready1r && - !iobs/IOReady && nDTACK_FSB) - || (A_FSB[22] && A_FSB[20] && !fsb/Ready1r && - !iobs/IOReady && nDTACK_FSB) - || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && - !fsb/Ready0r && nDTACK_FSB && !ram/RAMReady) - || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && - !cs/nOverlay1 && !fsb/Ready0r && nDTACK_FSB && !ram/RAMReady) - || (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && - !fsb/Ready1r && !iobs/IOReady && nDTACK_FSB && !nADoutLE1) - || (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && - !fsb/Ready1r && !iobs/IOReady && nDTACK_FSB && !nADoutLE1)); + OR (A_FSB(22) AND A_FSB(20) AND NOT fsb/Ready1r AND + NOT iobs/IOReady AND nDTACK_FSB) + OR (A_FSB(9) AND A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND + A_FSB(13) AND A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND A_FSB(23) AND + A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND + A_FSB(17) AND A_FSB(16) AND fsb/Ready1r) + OR (A_FSB(9) AND A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND + A_FSB(13) AND A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND A_FSB(23) AND + A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND + A_FSB(17) AND A_FSB(16) AND iobs/IOReady) + OR (A_FSB(22) AND A_FSB(21) AND NOT fsb/Ready1r AND + NOT iobs/IOReady AND nDTACK_FSB) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND + NOT fsb/Ready0r AND nDTACK_FSB AND NOT ram/RAMReady) + OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND cs/nOverlay AND + NOT fsb/Ready1r AND NOT nWE_FSB AND NOT iobs/IOReady AND nDTACK_FSB AND NOT nADoutLE1) + OR (A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND cs/nOverlay AND + NOT fsb/Ready1r AND NOT nWE_FSB AND NOT iobs/IOReady AND nDTACK_FSB AND NOT nADoutLE1)); -FDCPE FDCPE_nDinLE (nDinLE,nDinLE_D,!C16M,1'b0,1'b0); -assign nDinLE_D = (iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2); +FDCPE_nDinLE: FDCPE port map (nDinLE,nDinLE_D,NOT C16M,'0','0'); +nDinLE_D <= (iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2); -assign nDinOE = ((A_FSB[23] && nWE_FSB && !nAS_FSB) - || (A_FSB[22] && A_FSB[21] && nWE_FSB && !nAS_FSB) - || (A_FSB[22] && A_FSB[20] && nWE_FSB && !nAS_FSB)); +nDinOE <= ((A_FSB(23) AND nWE_FSB AND NOT nAS_FSB) + OR (A_FSB(22) AND A_FSB(21) AND nWE_FSB AND NOT nAS_FSB) + OR (A_FSB(22) AND A_FSB(20) AND nWE_FSB AND NOT nAS_FSB)); -assign nDoutOE = !((iobm/DoutOE && !nAoutOE)); +nDoutOE <= NOT ((iobm/DoutOE AND NOT nAoutOE)); -FDCPE FDCPE_nLDS_IOB (nLDS_IOB_I,nLDS_IOB,!C16M,1'b0,1'b0); -assign nLDS_IOB = ((iobs/IOL0 && !iobm/IOS_FSM_FFd3 && - iobm/IOS_FSM_FFd2) - || (iobs/IOL0 && iobm/IOS_FSM_FFd1 && - iobm/IOS_FSM_FFd2) - || (!iobs/IORW0 && iobs/IOL0 && iobm/IOS_FSM_FFd3 && - !iobm/IOS_FSM_FFd1)); -assign nLDS_IOB = nLDS_IOB_OE ? nLDS_IOB_I : 1'bZ; -assign nLDS_IOB_OE = !nAoutOE; +FDCPE_nLDS_IOB: FDCPE port map (nLDS_IOB_I,nLDS_IOB,NOT C16M,'0','0'); +nLDS_IOB <= ((IOL0 AND NOT iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2) + OR (IOL0 AND iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2) + OR (IORW0 AND IOL0 AND iobm/IOS_FSM_FFd3 AND + NOT iobm/IOS_FSM_FFd1)); +nLDS_IOB <= nLDS_IOB_I when nLDS_IOB_OE = '1' else 'Z'; +nLDS_IOB_OE <= NOT nAoutOE; -assign nOE = !((nWE_FSB && !nAS_FSB)); +nOE <= NOT ((nWE_FSB AND NOT nAS_FSB)); -assign nRAMLWE = !((!nWE_FSB && !nLDS_FSB && !nAS_FSB && ram/RAMEN)); +nRAMLWE <= NOT ((NOT nLDS_FSB AND NOT nWE_FSB AND NOT nAS_FSB AND ram/RAMEN)); -assign nRAMUWE = !((!nWE_FSB && !nUDS_FSB && !nAS_FSB && ram/RAMEN)); +nRAMUWE <= NOT ((NOT nWE_FSB AND NOT nUDS_FSB AND NOT nAS_FSB AND ram/RAMEN)); -assign nRAS = !(((ram/RefRAS) - || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && !nAS_FSB && - ram/RAMEN) - || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && - !cs/nOverlay1 && !nAS_FSB && ram/RAMEN))); +nRAS <= '1'; -assign nRES_I = 1'b0; -assign nRES = nRES_OE ? nRES_I : 1'bZ; -assign nRES_OE = !cnt/nRESout; +nRES_I <= '0'; +nRES <= nRES_I when nRES_OE = '1' else 'Z'; +nRES_OE <= NOT nRESout; + +FDCPE_nRESout: FDCPE port map (nRESout,nRESout_D,FCLK,'0','0'); +nRESout_D <= (cnt/INITS_FSM_FFd1 AND NOT cnt/INITS_FSM_FFd2); -assign nROMCS = !(((!A_FSB[23] && A_FSB[22] && !A_FSB[21] && !A_FSB[20]) - || (!A_FSB[23] && !A_FSB[21] && !A_FSB[20] && - !cs/nOverlay1))); +nROMCS <= NOT (((NOT A_FSB(23) AND NOT A_FSB(21) AND NOT A_FSB(20) AND NOT cs/nOverlay) + OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20)))); -assign nROMWE = !((!nWE_FSB && !nAS_FSB)); +nROMWE <= NOT ((NOT nWE_FSB AND NOT nAS_FSB)); -FDCPE FDCPE_nUDS_IOB (nUDS_IOB_I,nUDS_IOB,!C16M,1'b0,1'b0); -assign nUDS_IOB = ((iobs/IOU0 && !iobm/IOS_FSM_FFd3 && - iobm/IOS_FSM_FFd2) - || (iobs/IOU0 && iobm/IOS_FSM_FFd1 && - iobm/IOS_FSM_FFd2) - || (!iobs/IORW0 && iobs/IOU0 && iobm/IOS_FSM_FFd3 && - !iobm/IOS_FSM_FFd1)); -assign nUDS_IOB = nUDS_IOB_OE ? nUDS_IOB_I : 1'bZ; -assign nUDS_IOB_OE = !nAoutOE; +FDCPE_nUDS_IOB: FDCPE port map (nUDS_IOB_I,nUDS_IOB,NOT C16M,'0','0'); +nUDS_IOB <= ((IOU0 AND NOT iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2) + OR (IOU0 AND iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2) + OR (IORW0 AND IOU0 AND iobm/IOS_FSM_FFd3 AND + NOT iobm/IOS_FSM_FFd1)); +nUDS_IOB <= nUDS_IOB_I when nUDS_IOB_OE = '1' else 'Z'; +nUDS_IOB_OE <= NOT nAoutOE; -FTCPE FTCPE_nVMA_IOB (nVMA_IOB_I,nVMA_IOB_T,C16M,1'b0,1'b0); -assign nVMA_IOB_T = ((!nVMA_IOB && !iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] && - !iobm/ES[3] && !iobm/ES[4]) - || (nVMA_IOB && iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && - !iobm/ES[3] && !iobm/ES[4] && iobm/IOACT && iobm/VPArf && - iobm/VPArr)); -assign nVMA_IOB = nVMA_IOB_OE ? nVMA_IOB_I : 1'bZ; -assign nVMA_IOB_OE = !nAoutOE; +FTCPE_nVMA_IOB: FTCPE port map (nVMA_IOB_I,nVMA_IOB_T,C16M,'0','0'); +nVMA_IOB_T <= ((NOT nVMA_IOB AND NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND + NOT iobm/ES(3) AND NOT iobm/ES(4)) + OR (nVMA_IOB AND iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND + NOT iobm/ES(3) AND NOT iobm/ES(4) AND IOACT AND iobm/VPArf AND iobm/VPArr)); +nVMA_IOB <= nVMA_IOB_I when nVMA_IOB_OE = '1' else 'Z'; +nVMA_IOB_OE <= NOT nAoutOE; -assign nVPA_FSB = !((fsb/VPA && !nAS_FSB)); +nVPA_FSB <= NOT ((fsb/VPA AND NOT nAS_FSB)); -FDCPE FDCPE_ram/BACTr (ram/BACTr,ram/BACTr_D,FCLK,1'b0,1'b0); -assign ram/BACTr_D = (nAS_FSB && !fsb/ASrf); +FDCPE_ram/BACTr: FDCPE port map (ram/BACTr,ram/BACTr_D,FCLK,'0','0'); +ram/BACTr_D <= (nAS_FSB AND NOT fsb/ASrf); -FDCPE FDCPE_ram/RAMEN (ram/RAMEN,ram/RAMEN_D,FCLK,1'b0,1'b0); -assign ram/RAMEN_D = ((!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && !nAS_FSB && - !ram/RS_FSM_FFd1 && ram/RAMEN) - || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && - !ram/RS_FSM_FFd1 && ram/RAMEN && fsb/ASrf) - || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && - !cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd1 && ram/RAMEN) - || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && - !cs/nOverlay1 && !ram/RS_FSM_FFd1 && ram/RAMEN && fsb/ASrf) - || (ram/RS_FSM_FFd2 && ram/RAMEN) - || (ram/RS_FSM_FFd3 && ram/RAMEN) - || (!ram/RS_FSM_FFd1 && !ram/RefUrgent && ram/RAMEN && +FDCPE_ram/RAMEN: FDCPE port map (ram/RAMEN,ram/RAMEN_D,FCLK,'0','0'); +ram/RAMEN_D <= ((ram/RS_FSM_FFd3 AND ram/RAMEN) + OR (ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND ram/RAMEN) + OR (NOT ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd2 AND ram/RAMEN) + OR (nAS_FSB AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT fsb/ASrf) + OR (nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT fsb/ASrf) + OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RefUrg AND ram/RAMEN AND ram/BACTr) - || (!ram/RS_FSM_FFd1 && !ram/RefUrgent && ram/RAMEN && - !ram/RefReq) - || (nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RefUrgent && - !ram/RS_FSM_FFd3 && !fsb/ASrf)); + OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RefUrg AND ram/RAMEN AND + NOT ram/RefReq) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND NOT nAS_FSB AND + NOT ram/RS_FSM_FFd1 AND ram/RAMEN) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND + NOT ram/RS_FSM_FFd1 AND ram/RAMEN AND fsb/ASrf)); -FDCPE FDCPE_ram/RAMReady (ram/RAMReady,ram/RAMReady_D,FCLK,1'b0,1'b0); -assign ram/RAMReady_D = ((RA_6_OBUF.EXP) - || (A_FSB[23] && !ram/RS_FSM_FFd2 && !ram/RefUrgent && - !ram/RS_FSM_FFd3 && !ram/RefReq) - || (A_FSB[22] && !A_FSB[21] && !ram/RS_FSM_FFd2 && - !ram/RefUrgent && !ram/RS_FSM_FFd3 && ram/BACTr) - || (A_FSB[22] && !A_FSB[21] && !ram/RS_FSM_FFd2 && - !ram/RefUrgent && !ram/RS_FSM_FFd3 && !ram/RefReq) - || (A_FSB[22] && cs/nOverlay1 && !ram/RS_FSM_FFd2 && - !ram/RefUrgent && !ram/RS_FSM_FFd3 && ram/BACTr) - || (!A_FSB[22] && !cs/nOverlay1 && !ram/RS_FSM_FFd2 && - !ram/RefUrgent && !ram/RS_FSM_FFd3 && ram/BACTr) - || (ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && - !ram/RefUrgent && !ram/RS_FSM_FFd3) - || (A_FSB[23] && !ram/RS_FSM_FFd2 && !ram/RefUrgent && - !ram/RS_FSM_FFd3 && ram/BACTr) - || (nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RefUrgent && - !ram/RS_FSM_FFd3 && !fsb/ASrf)); +FDCPE_ram/RAMReady: FDCPE port map (ram/RAMReady,ram/RAMReady_D,FCLK,'0','0'); +ram/RAMReady_D <= ((A_FSB(23) AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT ram/RefReq) + OR (A_FSB(22) AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND ram/BACTr) + OR (A_FSB(22) AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT ram/RefReq) + OR (A_FSB(23) AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND ram/BACTr) + OR (ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg) + OR (NOT cs/nOverlay AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND ram/BACTr) + OR (NOT cs/nOverlay AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT ram/RefReq) + OR (nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT fsb/ASrf) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND + NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND + NOT ram/RAMEN)); -FDCPE FDCPE_ram/RASEL (ram/RASEL,ram/RASEL_D,FCLK,1'b0,1'b0); -assign ram/RASEL_D = ((A_FSB[22] && !A_FSB[21] && !ram/RS_FSM_FFd2 && - !ram/RefUrgent && !ram/RS_FSM_FFd3 && !ram/RefReq) - || (A_FSB[22] && cs/nOverlay1 && !ram/RS_FSM_FFd2 && - !ram/RefUrgent && !ram/RS_FSM_FFd3 && !ram/RefReq) - || (!A_FSB[22] && !cs/nOverlay1 && !ram/RS_FSM_FFd2 && - !ram/RefUrgent && !ram/RS_FSM_FFd3 && !ram/RefReq) - || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && !nAS_FSB && - !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && !ram/RAMEN) - || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && - !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && !ram/RAMEN && fsb/ASrf) - || (ram/RAMReady.EXP) - || (A_FSB[23] && !ram/RS_FSM_FFd2 && !ram/RefUrgent && - !ram/RS_FSM_FFd3 && ram/BACTr) - || (A_FSB[23] && !ram/RS_FSM_FFd2 && !ram/RefUrgent && - !ram/RS_FSM_FFd3 && !ram/RefReq) - || (A_FSB[22] && !A_FSB[21] && !ram/RS_FSM_FFd2 && - !ram/RefUrgent && !ram/RS_FSM_FFd3 && ram/BACTr) - || (A_FSB[22] && cs/nOverlay1 && !ram/RS_FSM_FFd2 && - !ram/RefUrgent && !ram/RS_FSM_FFd3 && ram/BACTr) - || (!A_FSB[22] && !cs/nOverlay1 && !ram/RS_FSM_FFd2 && - !ram/RefUrgent && !ram/RS_FSM_FFd3 && ram/BACTr) - || (ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2) - || (ram/RS_FSM_FFd2 && ram/RS_FSM_FFd3) - || (!nAS_FSB && ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3) - || (ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && fsb/ASrf) - || (nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RefUrgent && - !ram/RS_FSM_FFd3 && !fsb/ASrf)); +FDCPE_ram/RASEL: FDCPE port map (ram/RASEL,ram/RASEL_D,FCLK,'0','0'); +ram/RASEL_D <= ((A_FSB(23) AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND + NOT ram/RefUrg AND NOT ram/RefReq) + OR (A_FSB(22) AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND + NOT ram/RefUrg AND NOT ram/RefReq) + OR (nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND + NOT ram/RefUrg AND NOT fsb/ASrf) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND NOT nAS_FSB AND + NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND NOT ram/RAMEN) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND + NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND NOT ram/RAMEN AND fsb/ASrf) + OR (A_FSB(23) AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND + NOT ram/RefUrg AND ram/BACTr) + OR (A_FSB(22) AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND + NOT ram/RefUrg AND ram/BACTr) + OR (NOT cs/nOverlay AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND + NOT ram/RefUrg AND ram/BACTr) + OR (NOT cs/nOverlay AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND + NOT ram/RefUrg AND NOT ram/RefReq) + OR (NOT nAS_FSB AND ram/RS_FSM_FFd1) + OR (ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2) + OR (ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3) + OR (ram/RS_FSM_FFd1 AND NOT ram/RefUrg) + OR (ram/RS_FSM_FFd1 AND fsb/ASrf)); -FDCPE FDCPE_ram/RS_FSM_FFd1 (ram/RS_FSM_FFd1,ram/RS_FSM_FFd1_D,FCLK,1'b0,1'b0); -assign ram/RS_FSM_FFd1_D = ((ram/RS_FSM_FFd1 && ram/RefUrgent && - !ram/RS_FSM_FFd3 && fsb/ASrf) - || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && !nAS_FSB && - !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && ram/RefUrgent && !ram/RAMEN) - || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && - !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && ram/RefUrgent && !ram/RAMEN && +FDCPE_ram/RS_FSM_FFd1: FDCPE port map (ram/RS_FSM_FFd1,ram/RS_FSM_FFd1_D,FCLK,'0','0'); +ram/RS_FSM_FFd1_D <= ((ram/RS_FSM_FFd3) + OR (ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2)); + +FDCPE_ram/RS_FSM_FFd2: FDCPE port map (ram/RS_FSM_FFd2,ram/RS_FSM_FFd2_D,FCLK,'0','0'); +ram/RS_FSM_FFd2_D <= ((ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd2 AND ram/RefUrg AND fsb/ASrf) - || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && - !cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && - ram/RefUrgent && !ram/RAMEN) - || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && - !cs/nOverlay1 && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && - ram/RefUrgent && !ram/RAMEN && fsb/ASrf) - || (ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2) - || (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd3) - || (!nAS_FSB && ram/RS_FSM_FFd1 && ram/RefUrgent && - !ram/RS_FSM_FFd3)); + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND NOT nAS_FSB AND + NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND ram/RefUrg) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND NOT nAS_FSB AND + NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND ram/RAMEN) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND + NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND ram/RefUrg AND + fsb/ASrf) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND + NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND ram/RAMEN AND + fsb/ASrf) + OR (ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3) + OR (ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3) + OR (NOT nAS_FSB AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd2 AND + ram/RefUrg)); -FDCPE FDCPE_ram/RS_FSM_FFd2 (ram/RS_FSM_FFd2,ram/RS_FSM_FFd2_D,FCLK,1'b0,1'b0); -assign ram/RS_FSM_FFd2_D = ((nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RefUrgent && - !ram/RS_FSM_FFd3 && !fsb/ASrf) - || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && !nAS_FSB && - !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3) - || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && - !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && fsb/ASrf) - || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && - !cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3) - || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && - !cs/nOverlay1 && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && fsb/ASrf) - || (ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2) - || (!nAS_FSB && ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3) - || (ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && fsb/ASrf) - || (!ram/RS_FSM_FFd2 && !ram/RefUrgent && - !ram/RS_FSM_FFd3 && ram/BACTr) - || (!ram/RS_FSM_FFd2 && !ram/RefUrgent && - !ram/RS_FSM_FFd3 && !ram/RefReq)); - -FTCPE FTCPE_ram/RS_FSM_FFd3 (ram/RS_FSM_FFd3,ram/RS_FSM_FFd3_T,FCLK,1'b0,1'b0); -assign ram/RS_FSM_FFd3_T = ((ram/RS_FSM_FFd1.EXP) - || (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2 && +FTCPE_ram/RS_FSM_FFd3: FTCPE port map (ram/RS_FSM_FFd3,ram/RS_FSM_FFd3_T,FCLK,'0','0'); +ram/RS_FSM_FFd3_T <= ((A_FSB(23) AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND ram/BACTr) + OR (A_FSB(22) AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND ram/BACTr) + OR (A_FSB(22) AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT ram/RefReq) + OR (NOT cs/nOverlay AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT ram/RefReq) + OR (A_FSB(23) AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT ram/RefReq) + OR (nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT fsb/ASrf) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND NOT nAS_FSB AND + NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND NOT ram/RAMEN) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND + NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND NOT ram/RAMEN AND + fsb/ASrf) + OR (NOT ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3) - || (A_FSB[23] && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && - !ram/RS_FSM_FFd3) - || (nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && - !fsb/ASrf) - || (!ram/RS_FSM_FFd2 && !ram/RefUrgent && - !ram/RS_FSM_FFd3 && !ram/RAMEN) - || (A_FSB[22] && !A_FSB[21] && !ram/RS_FSM_FFd1 && - !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3) - || (A_FSB[22] && cs/nOverlay1 && !ram/RS_FSM_FFd1 && - !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3) - || (!A_FSB[22] && !cs/nOverlay1 && !ram/RS_FSM_FFd1 && - !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3)); + OR (NOT nAS_FSB AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3) + OR (ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg) + OR (ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND fsb/ASrf) + OR (NOT cs/nOverlay AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND ram/BACTr)); -FDCPE FDCPE_ram/RefDone (ram/RefDone,ram/RefDone_D,FCLK,1'b0,1'b0); -assign ram/RefDone_D = ((ram/RefDone && ram/RefReqSync) - || (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2 && - ram/RefReqSync)); +FDCPE_ram/RefDone: FDCPE port map (ram/RefDone,ram/RefDone_D,FCLK,'0','0'); +ram/RefDone_D <= ((ram/RefDone AND ram/RefReqSync) + OR (ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND ram/RefReqSync) + OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + ram/RS_FSM_FFd3 AND ram/RefReqSync)); -FDCPE FDCPE_ram/RefRAS (ram/RefRAS,ram/RefRAS_D,FCLK,1'b0,1'b0); -assign ram/RefRAS_D = (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2); +FDCPE_ram/RefReq: FDCPE port map (ram/RefReq,ram/RefReq_D,FCLK,'0','0'); +ram/RefReq_D <= (NOT ram/RefDone AND ram/RefReqSync); -FDCPE FDCPE_ram/RefReq (ram/RefReq,ram/RefReq_D,FCLK,1'b0,1'b0); -assign ram/RefReq_D = (!ram/RefDone && ram/RefReqSync); +FDCPE_ram/RefReqSync: FDCPE port map (ram/RefReqSync,RefReq,FCLK,'0','0'); -FDCPE FDCPE_ram/RefReqSync (ram/RefReqSync,cnt/RefReq,FCLK,1'b0,1'b0); +FDCPE_ram/RefUrg: FDCPE port map (ram/RefUrg,ram/RefUrg_D,FCLK,'0','0'); +ram/RefUrg_D <= (NOT ram/RefDone AND ram/RegUrgSync); -FDCPE FDCPE_ram/RefUrgent (ram/RefUrgent,ram/RefUrgent_D,FCLK,1'b0,1'b0); -assign ram/RefUrgent_D = (!ram/RefDone && ram/RegUrgentSync); - -FDCPE FDCPE_ram/RegUrgentSync (ram/RegUrgentSync,cnt/RefUrgent,FCLK,1'b0,1'b0); +FDCPE_ram/RegUrgSync: FDCPE port map (ram/RegUrgSync,RefUrg,FCLK,'0','0'); Register Legend: FDCPE (Q,D,C,CLR,PRE,CE); @@ -1728,4 +1708,4 @@ Global Clock Optimization : ON Global Set/Reset Optimization : ON Global Ouput Enable Optimization : ON Input Limit : 54 -Pterm Limit : 50 +Pterm Limit : 25 diff --git a/cpld/XC95144XL/WarpSE.syr b/cpld/XC95144XL/WarpSE.syr index 14584e0..c41e17d 100644 --- a/cpld/XC95144XL/WarpSE.syr +++ b/cpld/XC95144XL/WarpSE.syr @@ -56,8 +56,8 @@ Equivalent register Removal : YES ---- General Options Optimization Goal : Speed -Optimization Effort : 2 -Keep Hierarchy : No +Optimization Effort : 1 +Keep Hierarchy : Yes Netlist Hierarchy : As_Optimized RTL Output : Yes Hierarchy Separator : / @@ -144,21 +144,21 @@ Performing bidirectional port resolution... Synthesizing Unit . Related source file is "../CS.v". - Found 1-bit register for signal . - Found 1-bit register for signal . + Found 1-bit register for signal . Summary: - inferred 2 D-type flip-flop(s). + inferred 1 D-type flip-flop(s). Unit synthesized. Synthesizing Unit . Related source file is "../RAM.v". +WARNING:Xst:646 - Signal is assigned but never used. This unconnected signal will be trimmed during the optimization process. Found finite state machine for signal . ----------------------------------------------------------------------- | States | 8 | | Transitions | 21 | | Inputs | 6 | - | Outputs | 9 | + | Outputs | 8 | | Clock | CLK (rising_edge) | | Power Up State | 000 | | Encoding | automatic | @@ -170,14 +170,13 @@ Synthesizing Unit . Found 1-bit register for signal . Found 1-bit register for signal . Found 1-bit register for signal . - Found 1-bit register for signal . Found 1-bit register for signal . Found 1-bit register for signal . - Found 1-bit register for signal . - Found 1-bit register for signal . + Found 1-bit register for signal . + Found 1-bit register for signal . Summary: inferred 1 Finite State Machine(s). - inferred 10 D-type flip-flop(s). + inferred 9 D-type flip-flop(s). Unit synthesized. @@ -259,25 +258,25 @@ Unit synthesized. Synthesizing Unit . Related source file is "../CNT.v". -WARNING:Xst:647 - Input is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. - Found finite state machine for signal . + Found finite state machine for signal . ----------------------------------------------------------------------- | States | 4 | | Transitions | 8 | | Inputs | 2 | | Outputs | 4 | - | Clock | C8M (falling_edge) | + | Clock | CLK (rising_edge) | | Power Up State | 00 | | Encoding | automatic | | Implementation | automatic | ----------------------------------------------------------------------- - Found 1-bit register for signal . Found 1-bit register for signal . Found 1-bit register for signal . Found 1-bit register for signal . Found 1-bit register for signal . - Found 1-bit register for signal . - Found 14-bit up counter for signal . + Found 2-bit register for signal . + Found 13-bit up counter for signal . + Found 1-bit register for signal . + Found 1-bit register for signal . Found 4-bit up counter for signal . Found 1-bit register for signal . Summary: @@ -302,9 +301,9 @@ Unit synthesized. Synthesizing Unit . Related source file is "../WarpSE.v". +WARNING:Xst:647 - Input is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:646 - Signal is assigned but never used. This unconnected signal will be trimmed during the optimization process. -WARNING:Xst:646 - Signal is assigned but never used. This unconnected signal will be trimmed during the optimization process. Found 1-bit tristate buffer for signal . Found 1-bit tristate buffer for signal . Found 1-bit tristate buffer for signal . @@ -320,11 +319,12 @@ HDL Synthesis Report Macro Statistics # Counters : 3 - 14-bit up counter : 1 + 13-bit up counter : 1 4-bit up counter : 1 5-bit up counter : 1 -# Registers : 61 - 1-bit register : 61 +# Registers : 60 + 1-bit register : 59 + 2-bit register : 1 # Tristates : 5 1-bit tristate buffer : 5 @@ -335,7 +335,7 @@ Macro Statistics ========================================================================= Analyzing FSM for best encoding. -Optimizing FSM on signal with johnson encoding. +Optimizing FSM on signal with johnson encoding. ------------------- State | Encoding ------------------- @@ -369,18 +369,18 @@ Optimizing FSM on signal with johnson encoding. 01 | 10 ------------------- Analyzing FSM for best encoding. -Optimizing FSM on signal with compact encoding. +Optimizing FSM on signal with sequential encoding. ------------------- State | Encoding ------------------- 000 | 000 - 010 | 010 - 001 | 101 - 101 | 001 - 011 | 011 - 100 | 111 - 111 | 100 - 110 | 110 + 010 | 001 + 001 | 010 + 101 | 011 + 011 | 100 + 100 | 101 + 111 | 110 + 110 | 111 ------------------- ========================================================================= @@ -389,11 +389,11 @@ Advanced HDL Synthesis Report Macro Statistics # FSMs : 4 # Counters : 3 - 14-bit up counter : 1 + 13-bit up counter : 1 4-bit up counter : 1 5-bit up counter : 1 -# Registers : 49 - Flip-Flops : 49 +# Registers : 47 + Flip-Flops : 47 ========================================================================= @@ -402,32 +402,42 @@ Macro Statistics ========================================================================= Optimizing unit ... - implementation constraint: INIT=r : cs/nOverlay0 - implementation constraint: INIT=r : fsb/ASrf - implementation constraint: INIT=r : iobm/IOREQr - implementation constraint: INIT=r : cnt/PORS_FSM_FFd1 - implementation constraint: INIT=r : cnt/PORS_FSM_FFd2 - implementation constraint: INIT=r : cs/nOverlay1 - implementation constraint: INIT=r : ram/RAMEN - implementation constraint: INIT=r : ram/RAMReady - implementation constraint: INIT=r : ram/RASEL - implementation constraint: INIT=r : ram/RefRAS - implementation constraint: INIT=r : iobs/IOACTr - implementation constraint: INIT=r : iobs/Once - implementation constraint: INIT=r : ram/RS_FSM_FFd3 - implementation constraint: INIT=r : iobm/ETACK - implementation constraint: INIT=r : iobm/DoutOE - implementation constraint: INIT=r : ram/RS_FSM_FFd2 - implementation constraint: INIT=r : iobm/IOS_FSM_FFd2 - implementation constraint: INIT=r : iobm/IOS_FSM_FFd3 - implementation constraint: INIT=r : iobs/PS_FSM_FFd2 - implementation constraint: INIT=r : iobm/IOS_FSM_FFd1 - implementation constraint: INIT=r : iobs/PS_FSM_FFd1 - implementation constraint: INIT=r : ram/RS_FSM_FFd1 - implementation constraint: INIT=r : cnt/Timer_3 - implementation constraint: INIT=r : cnt/Timer_2 - implementation constraint: INIT=r : cnt/Timer_1 - implementation constraint: INIT=r : cnt/Timer_0 + +Optimizing unit ... + implementation constraint: INIT=r : nOverlay + +Optimizing unit ... + implementation constraint: INIT=r : RAMEN + implementation constraint: INIT=r : RAMReady + implementation constraint: INIT=r : RASEL + implementation constraint: INIT=r : RS_FSM_FFd1 + implementation constraint: INIT=r : RS_FSM_FFd2 + implementation constraint: INIT=r : RS_FSM_FFd3 + +Optimizing unit ... + implementation constraint: INIT=r : IOACTr + implementation constraint: INIT=r : PS_FSM_FFd2 + implementation constraint: INIT=r : Once + implementation constraint: INIT=r : PS_FSM_FFd1 + +Optimizing unit ... + implementation constraint: INIT=r : ASrf + +Optimizing unit ... + implementation constraint: INIT=r : IOREQr + implementation constraint: INIT=r : ETACK + implementation constraint: INIT=r : DoutOE + implementation constraint: INIT=r : IOS_FSM_FFd1 + implementation constraint: INIT=r : IOS_FSM_FFd2 + implementation constraint: INIT=r : IOS_FSM_FFd3 + +Optimizing unit ... + implementation constraint: INIT=r : Timer_3 + implementation constraint: INIT=r : Timer_0 + implementation constraint: INIT=r : Timer_1 + implementation constraint: INIT=r : INITS_FSM_FFd2 + implementation constraint: INIT=r : Timer_2 + implementation constraint: INIT=r : INITS_FSM_FFd1 ========================================================================= * Partition Report * @@ -448,7 +458,7 @@ RTL Top Level Output File Name : WarpSE.ngr Top Level Output File Name : WarpSE Output Format : NGC Optimization Goal : Speed -Keep Hierarchy : No +Keep Hierarchy : Yes Target Technology : XC9500XL CPLDs Macro Preserve : YES XOR Preserve : YES @@ -459,22 +469,23 @@ Design Statistics # IOs : 75 Cell Usage : -# BELS : 574 +# BELS : 571 # AND2 : 172 -# AND3 : 19 -# AND4 : 15 +# AND3 : 27 +# AND4 : 7 # AND5 : 3 -# AND6 : 1 -# AND8 : 4 -# GND : 1 -# INV : 236 -# OR2 : 98 +# AND6 : 2 +# AND8 : 3 +# GND : 6 +# INV : 226 +# OR2 : 97 # OR3 : 4 -# VCC : 1 +# OR4 : 1 +# VCC : 3 # XOR2 : 20 -# FlipFlops/Latches : 94 -# FD : 62 -# FDCE : 32 +# FlipFlops/Latches : 93 +# FD : 56 +# FDCE : 37 # IO Buffers : 71 # IBUF : 35 # IOBUFE : 1 @@ -483,12 +494,12 @@ Cell Usage : ========================================================================= -Total REAL time to Xst completion: 15.00 secs -Total CPU time to Xst completion: 15.07 secs +Total REAL time to Xst completion: 5.00 secs +Total CPU time to Xst completion: 4.98 secs --> -Total memory usage is 266244 kilobytes +Total memory usage is 264516 kilobytes Number of errors : 0 ( 0 filtered) Number of warnings : 5 ( 0 filtered) diff --git a/cpld/XC95144XL/WarpSE.tim b/cpld/XC95144XL/WarpSE.tim index 45fff9d..e69de29 100644 --- a/cpld/XC95144XL/WarpSE.tim +++ b/cpld/XC95144XL/WarpSE.tim @@ -1,919 +0,0 @@ - Performance Summary Report - -------------------------- - -Design: WarpSE -Device: XC95144XL-10-TQ100 -Speed File: Version 3.0 -Program: Timing Report Generator: version P.20131013 -Date: Mon Mar 28 09:28:06 2022 - -Timing Constraint Summary: - -TS_CLK_IOB=PERIOD:CLK_IOB:142.857nS:HIGH:71.428nS N/A -TS_CLK_FSB=PERIOD:CLK_FSB:40.000nS:HIGH:20.000nS Met -TS_CLK2X_IOB=PERIOD:CLK2X_IOB:66.666nS:HIGH:33.333nS Met - -Performance Summary: - -Pad to Pad (tPD) : 11.0ns (1 macrocell levels) -Pad 'A_FSB<11>' to Pad 'RA<1>' - -Clock net 'CLK_IOB' path delays: - -Setup to Clock at the Pad (tSU) : 6.5ns (0 macrocell levels) -Data signal 'E_IOB' to DFF D input Pin at 'iobm/Er.D' -Clock pad 'CLK_IOB' (GCK) - - Minimum Clock Period: 9.0ns - Maximum Internal Clock Speed: 111.1Mhz - (Limited by Clock Pulse Width) - -Clock net 'CLK_FSB' path delays: - -Clock Pad to Output Pad (tCO) : 14.5ns (2 macrocell levels) -Clock Pad 'CLK_FSB' to Output Pad 'RA<1>' (GCK) - -Clock to Setup (tCYC) : 20.1ns (2 macrocell levels) -Clock to Q, net 'cs/nOverlay1.Q' to DFF Setup(D) at 'fsb/VPA.D' (GCK) -Target FF drives output net 'fsb/VPA' - -Setup to Clock at the Pad (tSU) : 16.6ns (1 macrocell levels) -Data signal 'A_FSB<23>' to DFF D input Pin at 'fsb/VPA.D' -Clock pad 'CLK_FSB' (GCK) - - Minimum Clock Period: 20.1ns - Maximum Internal Clock Speed: 49.7Mhz - (Limited by Cycle Time) - -Clock net 'CLK2X_IOB' path delays: - -Clock Pad to Output Pad (tCO) : 14.5ns (2 macrocell levels) -Clock Pad 'CLK2X_IOB' to Output Pad 'nVMA_IOB' (GCK) - -Clock to Setup (tCYC) : 11.0ns (1 macrocell levels) -Clock to Q, net 'iobm/IOS_FSM_FFd3.Q' to DFF Setup(D) at 'IOACT.D' (GCK) -Target FF drives output net 'IOACT' - -Setup to Clock at the Pad (tSU) : 7.5ns (0 macrocell levels) -Data signal 'CLK_IOB' to DFF D input Pin at 'IOACT.D' -Clock pad 'CLK2X_IOB' (GCK) - - Minimum Clock Period: 11.0ns - Maximum Internal Clock Speed: 90.9Mhz - (Limited by Cycle Time) - --------------------------------------------------------------------------------- - Pad to Pad (tPD) (nsec) - -\ From A A A A A A A A A A A - \ _ _ _ _ _ _ _ _ _ _ _ - \ F F F F F F F F F F F - \ S S S S S S S S S S S - \ B B B B B B B B B B B - \ < < < < < < < < < < < - \ 1 1 1 1 1 1 1 1 1 1 1 - \ 0 1 2 3 4 5 6 7 8 9 > - \ > > > > > > > > > > - To \------------------------------------------------------------------ - -CLK20EN -CLK25EN -RA<0> 10.0 10.0 -RA<10> -RA<11> 10.0 -RA<1> 11.0 -RA<2> 11.0 -RA<3> 10.0 -RA<4> 11.0 -RA<5> 11.0 -RA<6> 10.0 -RA<7> 10.0 -RA<8> 10.0 -RA<9> 10.0 -nBERR_FSB -nDinOE -nOE -nRAMLWE -nRAMUWE -nRAS -nROMCS -nROMWE -nVPA_FSB - --------------------------------------------------------------------------------- - Pad to Pad (tPD) (nsec) - -\ From A A A A A A A A A A A - \ _ _ _ _ _ _ _ _ _ _ _ - \ F F F F F F F F F F F - \ S S S S S S S S S S S - \ B B B B B B B B B B B - \ < < < < < < < < < < < - \ 2 2 2 2 2 3 4 5 6 7 8 - \ 0 1 2 3 > > > > > > > - \ > > > > - To \------------------------------------------------------------------ - -CLK20EN -CLK25EN -RA<0> -RA<10> 10.0 -RA<11> -RA<1> 11.0 -RA<2> 11.0 -RA<3> 10.0 -RA<4> 11.0 -RA<5> 11.0 -RA<6> 10.0 -RA<7> 10.0 -RA<8> 11.0 11.0 11.0 -RA<9> 10.0 -nBERR_FSB 11.0 11.0 11.0 11.0 -nDinOE 10.0 10.0 10.0 10.0 -nOE -nRAMLWE -nRAMUWE -nRAS 11.0 11.0 11.0 -nROMCS 11.0 11.0 11.0 11.0 -nROMWE -nVPA_FSB - --------------------------------------------------------------------------------- - Pad to Pad (tPD) (nsec) - -\ From A S S n n n n - \ _ W W A L U W - \ F < < S D D E - \ S 0 1 _ S S _ - \ B > > F _ _ F - \ < S F F S - \ 9 B S S B - \ > B B - \ - To \------------------------------------------ - -CLK20EN 10.0 -CLK25EN 10.0 -RA<0> -RA<10> -RA<11> -RA<1> -RA<2> -RA<3> -RA<4> -RA<5> -RA<6> -RA<7> -RA<8> 11.0 -RA<9> -nBERR_FSB 10.0 -nDinOE 10.0 10.0 10.0 -nOE 10.0 10.0 -nRAMLWE 10.0 10.0 10.0 -nRAMUWE 11.0 11.0 11.0 -nRAS 11.0 -nROMCS 11.0 -nROMWE 10.0 10.0 -nVPA_FSB 10.0 - --------------------------------------------------------------------------------- - Clock Pad to Output Pad (tCO) (nsec) - -\ From C C - \ L L - \ K K - \ 2 _ - \ X F - \ _ S - \ I B - \ O - \ B - \ - To \------------ - -RA<0> 13.5 -RA<1> 14.5 -RA<2> 14.5 -RA<3> 13.5 -RA<4> 14.5 -RA<5> 14.5 -RA<6> 13.5 -RA<7> 13.5 -RA<8> 14.5 -RA<9> 13.5 -nADoutLE0 13.5 13.5 -nADoutLE1 5.8 -nAS_IOB 14.5 -nAoutOE 5.8 -nBERR_FSB 14.5 -nBR_IOB 5.8 -nCAS 5.8 -nDTACK_FSB 5.8 -nDinLE 5.8 -nDoutOE 5.8 -nLDS_IOB 14.5 -nRAMLWE 13.5 -nRAMUWE 14.5 -nRAS 14.5 -nROMCS 14.5 -nUDS_IOB 14.5 -nVMA_IOB 14.5 -nVPA_FSB 13.5 - --------------------------------------------------------------------------------- - Setup to Clock at Pad (tSU or tSUF) (nsec) - -\ From C C C - \ L L L - \ K K K - \ 2 _ _ - \ X F I - \ _ S O - \ I B B - \ O - \ B - \ - To \------------------ - -A_FSB<10> 7.9 -A_FSB<11> 7.9 -A_FSB<12> 7.9 -A_FSB<13> 7.9 -A_FSB<14> 7.9 -A_FSB<15> 7.9 -A_FSB<16> 7.9 -A_FSB<17> 7.9 -A_FSB<18> 7.9 -A_FSB<19> 7.9 -A_FSB<20> 15.6 -A_FSB<21> 16.6 -A_FSB<22> 16.6 -A_FSB<23> 16.6 -A_FSB<8> 7.9 -A_FSB<9> 7.9 -CLK_IOB 7.5 -E_IOB 6.5 -SW<1> 7.9 -nAS_FSB 15.6 -nBERR_IOB 7.5 -nBG_IOB 6.5 -nDTACK_IOB 6.5 -nIPL2 6.5 -nLDS_FSB 6.5 -nRES 6.5 6.5 -nUDS_FSB 6.5 -nVPA_IOB 6.5 -nWE_FSB 7.9 - --------------------------------------------------------------------------------- - Clock to Setup (tCYC) (nsec) - (Clock: CLK_FSB) - -\ From B I I I R R R R R T - \ E O P P E E E E e i - \ R R L L S S S S f m - \ R W 2 2 D r r r A e - \ _ 0 r r o 0 1 2 c o - \ I . 0 1 n . . . k u - \ O Q . . e Q Q Q . t - \ B Q Q . Q A - \ S Q . - \ . Q - \ Q - \ - \ - \ - \ - \ - \ - \ - To \------------------------------------------------------------ - -ALE0S.D -BERR_IOBS.D 10.0 -IOL0.CE -IOL0.D -IOREQ.D -IORW0.D 11.4 -IOU0.CE -IOU0.D -IPL2r1.D 10.0 -RESDone.CE 10.0 10.0 10.0 -RESr1.D 10.0 -RESr2.D 10.0 -RefAck.D -TimeoutA.D 10.0 -TimeoutB.D -cnt/RefCnt<1>.D -cnt/RefCnt<2>.D -cnt/RefCnt<3>.D -cnt/RefCnt<4>.D -cnt/RefCnt<5>.D -cnt/RefCnt<6>.D -cnt/RefCnt<7>.D -cnt/RefDone.D 10.0 -cnt/TimeoutBPre.D -cs/nOverlay0.D -cs/nOverlay1.CE -cs/nOverlay1.D -fsb/BERR0r.D -fsb/BERR1r.D 10.0 -fsb/Ready0r.D -fsb/Ready1r.D -fsb/Ready2r.D 11.0 -fsb/VPA.D 11.4 11.4 -iobs/Clear1.D -iobs/IOL1.CE -iobs/IORW1.D -iobs/IOReady.D -iobs/IOU1.CE -iobs/Load1.D -iobs/Once.D -iobs/PS_FSM_FFd1.D -iobs/PS_FSM_FFd2.D -nADoutLE1.D -nBR_IOB.CE 10.0 10.0 10.0 10.0 10.0 10.0 -nCAS.D -nDTACK_FSB.D 11.4 11.4 -ram/BACTr.D -ram/Once.D -ram/RAMDIS1.D -ram/RAMDIS2.D -ram/RAMReady.D -ram/RASEL.D -ram/RS_FSM_FFd1.D -ram/RS_FSM_FFd2.D -ram/RS_FSM_FFd3.D - --------------------------------------------------------------------------------- - Clock to Setup (tCYC) (nsec) - (Clock: CLK_FSB) - -\ From T c c c c c c c c c - \ i n n n n n n n n n - \ m t t t t t t t t t - \ e / / / / / / / / / - \ o R R R R R R R R R - \ u e e e e e e e e e - \ t f f f f f f f f f - \ B C C C C C C C C D - \ . n n n n n n n n o - \ Q t t t t t t t t n - \ < < < < < < < < e - \ 0 1 2 3 4 5 6 7 . - \ > > > > > > > > Q - \ . . . . . . . . - \ Q Q Q Q Q Q Q Q - \ - \ - \ - To \------------------------------------------------------------ - -ALE0S.D -BERR_IOBS.D -IOL0.CE -IOL0.D -IOREQ.D -IORW0.D -IOU0.CE -IOU0.D -IPL2r1.D -RESDone.CE -RESr1.D -RESr2.D -RefAck.D -TimeoutA.D 10.0 10.0 10.0 10.0 10.0 10.0 10.0 -TimeoutB.D 10.0 10.0 10.0 10.0 10.0 10.0 10.0 10.0 10.0 -cnt/RefCnt<1>.D 10.0 -cnt/RefCnt<2>.D 10.0 10.0 -cnt/RefCnt<3>.D 10.0 10.0 10.0 -cnt/RefCnt<4>.D 10.0 10.0 10.0 10.0 -cnt/RefCnt<5>.D 10.0 10.0 10.0 10.0 10.0 -cnt/RefCnt<6>.D 10.0 10.0 10.0 10.0 10.0 10.0 -cnt/RefCnt<7>.D 10.0 10.0 10.0 10.0 10.0 10.0 10.0 -cnt/RefDone.D 10.0 10.0 10.0 10.0 10.0 10.0 10.0 10.0 10.0 -cnt/TimeoutBPre.D 10.0 10.0 10.0 10.0 10.0 10.0 10.0 10.0 -cs/nOverlay0.D -cs/nOverlay1.CE -cs/nOverlay1.D -fsb/BERR0r.D 10.0 -fsb/BERR1r.D -fsb/Ready0r.D -fsb/Ready1r.D -fsb/Ready2r.D -fsb/VPA.D 19.1 -iobs/Clear1.D -iobs/IOL1.CE -iobs/IORW1.D -iobs/IOReady.D -iobs/IOU1.CE -iobs/Load1.D -iobs/Once.D -iobs/PS_FSM_FFd1.D -iobs/PS_FSM_FFd2.D -nADoutLE1.D -nBR_IOB.CE -nCAS.D -nDTACK_FSB.D 19.1 -ram/BACTr.D -ram/Once.D -ram/RAMDIS1.D 11.4 11.4 11.4 11.4 -ram/RAMDIS2.D 11.0 11.0 11.0 11.0 -ram/RAMReady.D 11.4 11.4 11.4 11.4 -ram/RASEL.D 11.4 11.4 11.4 11.4 -ram/RS_FSM_FFd1.D -ram/RS_FSM_FFd2.D 11.4 11.4 11.4 11.4 -ram/RS_FSM_FFd3.D 11.0 11.0 11.0 11.0 - --------------------------------------------------------------------------------- - Clock to Setup (tCYC) (nsec) - (Clock: CLK_FSB) - -\ From c c c f f f f f f f - \ n s s s s s s s s s - \ t / / b b b b b b b - \ / n n / / / / / / / - \ T O O A B B R R R V - \ i v v S E E e e e P - \ m e e r R R a a a A - \ e r r f R R d d d . - \ o l l . 0 1 y y y Q - \ u a a Q r r 0 1 2 - \ t y y . . r r r - \ B 0 1 Q Q . . . - \ P . . Q Q Q - \ r Q Q - \ e - \ . - \ Q - \ - To \------------------------------------------------------------ - -ALE0S.D -BERR_IOBS.D 10.0 -IOL0.CE -IOL0.D -IOREQ.D 11.0 10.0 -IORW0.D 10.0 11.0 -IOU0.CE -IOU0.D -IPL2r1.D -RESDone.CE -RESr1.D -RESr2.D -RefAck.D -TimeoutA.D 10.0 -TimeoutB.D 10.0 10.0 -cnt/RefCnt<1>.D -cnt/RefCnt<2>.D -cnt/RefCnt<3>.D -cnt/RefCnt<4>.D -cnt/RefCnt<5>.D -cnt/RefCnt<6>.D -cnt/RefCnt<7>.D -cnt/RefDone.D -cnt/TimeoutBPre.D 10.0 10.0 -cs/nOverlay0.D 10.0 10.0 -cs/nOverlay1.CE 10.0 -cs/nOverlay1.D 10.0 -fsb/BERR0r.D 10.0 10.0 -fsb/BERR1r.D 10.0 10.0 -fsb/Ready0r.D 10.0 10.0 10.0 -fsb/Ready1r.D 11.0 10.0 11.0 -fsb/Ready2r.D 11.0 11.0 11.0 -fsb/VPA.D 20.1 19.1 11.4 11.4 20.1 11.4 11.4 11.4 -iobs/Clear1.D -iobs/IOL1.CE -iobs/IORW1.D 11.4 11.0 -iobs/IOReady.D 10.0 -iobs/IOU1.CE -iobs/Load1.D 11.0 10.0 -iobs/Once.D 11.4 10.0 -iobs/PS_FSM_FFd1.D -iobs/PS_FSM_FFd2.D 11.0 10.0 -nADoutLE1.D -nBR_IOB.CE -nCAS.D -nDTACK_FSB.D 20.1 11.0 11.4 11.4 20.1 11.4 11.4 -ram/BACTr.D 10.0 -ram/Once.D 10.0 10.0 -ram/RAMDIS1.D 11.4 11.0 -ram/RAMDIS2.D 11.0 11.0 -ram/RAMReady.D 11.0 11.0 -ram/RASEL.D 11.4 11.4 -ram/RS_FSM_FFd1.D 10.0 10.0 -ram/RS_FSM_FFd2.D 11.4 11.4 -ram/RS_FSM_FFd3.D 11.0 11.0 - --------------------------------------------------------------------------------- - Clock to Setup (tCYC) (nsec) - (Clock: CLK_FSB) - -\ From i i i i i i i i i i - \ o o o o o o o o o o - \ b b b b b b b b b b - \ s s s s s s s s s s - \ / / / / / / / / / / - \ C I I I I I L O P P - \ l O O O O O o n S S - \ e A L R R U a c _ _ - \ a C 1 W e 1 d e F F - \ r T . 1 a . 1 . S S - \ 1 r Q . d Q . Q M M - \ . . Q y Q _ _ - \ Q Q . F F - \ Q F F - \ d d - \ 1 2 - \ . . - \ Q Q - To \------------------------------------------------------------ - -ALE0S.D 10.0 10.0 -BERR_IOBS.D 10.0 10.0 10.0 -IOL0.CE 10.0 10.0 -IOL0.D 10.0 -IOREQ.D 10.0 10.0 10.0 11.0 -IORW0.D 11.0 11.4 11.4 11.4 -IOU0.CE 10.0 10.0 -IOU0.D 10.0 -IPL2r1.D -RESDone.CE -RESr1.D -RESr2.D -RefAck.D -TimeoutA.D -TimeoutB.D -cnt/RefCnt<1>.D -cnt/RefCnt<2>.D -cnt/RefCnt<3>.D -cnt/RefCnt<4>.D -cnt/RefCnt<5>.D -cnt/RefCnt<6>.D -cnt/RefCnt<7>.D -cnt/RefDone.D -cnt/TimeoutBPre.D -cs/nOverlay0.D -cs/nOverlay1.CE -cs/nOverlay1.D -fsb/BERR0r.D -fsb/BERR1r.D -fsb/Ready0r.D -fsb/Ready1r.D 11.0 -fsb/Ready2r.D -fsb/VPA.D 11.4 -iobs/Clear1.D 10.0 10.0 -iobs/IOL1.CE 10.0 -iobs/IORW1.D 10.0 10.0 11.0 11.0 -iobs/IOReady.D 10.0 10.0 10.0 10.0 -iobs/IOU1.CE 10.0 -iobs/Load1.D 10.0 10.0 10.0 -iobs/Once.D 11.4 11.0 10.0 -iobs/PS_FSM_FFd1.D 10.0 10.0 10.0 -iobs/PS_FSM_FFd2.D 10.0 10.0 11.0 11.0 -nADoutLE1.D 10.0 10.0 -nBR_IOB.CE -nCAS.D -nDTACK_FSB.D 11.4 -ram/BACTr.D -ram/Once.D -ram/RAMDIS1.D -ram/RAMDIS2.D -ram/RAMReady.D -ram/RASEL.D -ram/RS_FSM_FFd1.D -ram/RS_FSM_FFd2.D -ram/RS_FSM_FFd3.D - --------------------------------------------------------------------------------- - Clock to Setup (tCYC) (nsec) - (Clock: CLK_FSB) - -\ From n n n r r r r r r r - \ A B D a a a a a a a - \ D R T m m m m m m m - \ o _ A / / / / / / / - \ u I C B O R R R R R - \ t O K A n A A A S S - \ L B _ C c M M S _ _ - \ E . F T e D R E F F - \ 1 Q S r . I e L S S - \ . B . Q S a . M M - \ Q . Q 2 d Q _ _ - \ Q . y F F - \ Q . F F - \ Q d d - \ 1 2 - \ . . - \ Q Q - \ - To \------------------------------------------------------------ - -ALE0S.D -BERR_IOBS.D 10.0 -IOL0.CE -IOL0.D 10.0 -IOREQ.D 11.0 -IORW0.D 11.4 -IOU0.CE -IOU0.D 10.0 -IPL2r1.D -RESDone.CE -RESr1.D -RESr2.D -RefAck.D 10.0 10.0 -TimeoutA.D -TimeoutB.D -cnt/RefCnt<1>.D -cnt/RefCnt<2>.D -cnt/RefCnt<3>.D -cnt/RefCnt<4>.D -cnt/RefCnt<5>.D -cnt/RefCnt<6>.D -cnt/RefCnt<7>.D -cnt/RefDone.D -cnt/TimeoutBPre.D -cs/nOverlay0.D -cs/nOverlay1.CE -cs/nOverlay1.D -fsb/BERR0r.D -fsb/BERR1r.D -fsb/Ready0r.D 10.0 -fsb/Ready1r.D 11.0 -fsb/Ready2r.D -fsb/VPA.D 11.0 11.4 20.1 -iobs/Clear1.D 10.0 -iobs/IOL1.CE -iobs/IORW1.D 10.0 -iobs/IOReady.D 10.0 -iobs/IOU1.CE -iobs/Load1.D 10.0 -iobs/Once.D 11.0 -iobs/PS_FSM_FFd1.D -iobs/PS_FSM_FFd2.D 11.0 -nADoutLE1.D 10.0 -nBR_IOB.CE -nCAS.D 10.0 -nDTACK_FSB.D 11.0 11.4 11.4 20.1 -ram/BACTr.D -ram/Once.D 10.0 10.0 10.0 -ram/RAMDIS1.D 11.0 11.0 11.4 11.0 -ram/RAMDIS2.D 11.0 11.0 11.0 11.0 -ram/RAMReady.D 11.0 11.0 11.0 11.0 -ram/RASEL.D 11.0 11.4 11.4 11.4 -ram/RS_FSM_FFd1.D 10.0 10.0 10.0 -ram/RS_FSM_FFd2.D 11.0 11.4 11.4 -ram/RS_FSM_FFd3.D 10.0 11.0 11.0 - --------------------------------------------------------------------------------- - Clock to Setup (tCYC) (nsec) - (Clock: CLK_FSB) - -\ From r - \ a - \ m - \ / - \ R - \ S - \ _ - \ F - \ S - \ M - \ _ - \ F - \ F - \ d - \ 3 - \ . - \ Q - \ - To \------ - -ALE0S.D -BERR_IOBS.D -IOL0.CE -IOL0.D -IOREQ.D -IORW0.D -IOU0.CE -IOU0.D -IPL2r1.D -RESDone.CE -RESr1.D -RESr2.D -RefAck.D -TimeoutA.D -TimeoutB.D -cnt/RefCnt<1>.D -cnt/RefCnt<2>.D -cnt/RefCnt<3>.D -cnt/RefCnt<4>.D -cnt/RefCnt<5>.D -cnt/RefCnt<6>.D -cnt/RefCnt<7>.D -cnt/RefDone.D -cnt/TimeoutBPre.D -cs/nOverlay0.D -cs/nOverlay1.CE -cs/nOverlay1.D -fsb/BERR0r.D -fsb/BERR1r.D -fsb/Ready0r.D -fsb/Ready1r.D -fsb/Ready2r.D -fsb/VPA.D -iobs/Clear1.D -iobs/IOL1.CE -iobs/IORW1.D -iobs/IOReady.D -iobs/IOU1.CE -iobs/Load1.D -iobs/Once.D -iobs/PS_FSM_FFd1.D -iobs/PS_FSM_FFd2.D -nADoutLE1.D -nBR_IOB.CE -nCAS.D -nDTACK_FSB.D -ram/BACTr.D -ram/Once.D 10.0 -ram/RAMDIS1.D 11.0 -ram/RAMDIS2.D 11.0 -ram/RAMReady.D 11.0 -ram/RASEL.D 11.0 -ram/RS_FSM_FFd1.D 10.0 -ram/RS_FSM_FFd2.D 11.4 -ram/RS_FSM_FFd3.D 11.0 - --------------------------------------------------------------------------------- - Clock to Setup (tCYC) (nsec) - (Clock: CLK2X_IOB) - -\ From I I i i i i i i i i - \ O O o o o o o o o o - \ A B b b b b b b b b - \ C E m m m m m m m m - \ T R / / / / / / / / - \ . R B B B B D D E E - \ Q . E E G G T T S S - \ Q R R r r A A < < - \ R R 0 1 C C 0 1 - \ r r . . K K > > - \ f r Q Q r r . . - \ . . f r Q Q - \ Q Q . . - \ Q Q - \ - \ - \ - \ - \ - To \------------------------------------------------------------ - -ALE0M.D -IOACT.D 10.0 10.0 11.0 11.0 -IOBERR.D 11.0 11.0 11.0 11.0 11.0 -iobm/BGr1.D 10.0 -iobm/ES<0>.D 10.0 10.0 -iobm/ES<1>.D 10.0 10.0 -iobm/ES<2>.D 10.0 10.0 -iobm/ES<3>.D 10.0 10.0 -iobm/ES<4>.D 10.0 10.0 -iobm/ETACK.D 10.0 10.0 -iobm/IOS_FSM_FFd1.D -iobm/IOS_FSM_FFd2.D 10.0 10.0 10.0 10.0 -iobm/IOS_FSM_FFd3.D -nAS_IOB.D -nAoutOE.D 10.0 10.0 -nDinLE.D -nDoutOE.D -nLDS_IOB.D -nUDS_IOB.D -nVMA_IOB.D 10.0 10.0 10.0 - --------------------------------------------------------------------------------- - Clock to Setup (tCYC) (nsec) - (Clock: CLK2X_IOB) - -\ From i i i i i i i i i i - \ o o o o o o o o o o - \ b b b b b b b b b b - \ m m m m m m m m m m - \ / / / / / / / / / / - \ E E E E E I I I I R - \ S S S T r O O O O E - \ < < < A 2 R S S S S - \ 2 3 4 C . E _ _ _ r - \ > > > K Q Q F F F f - \ . . . . r S S S . - \ Q Q Q Q . M M M Q - \ Q _ _ _ - \ F F F - \ F F F - \ d d d - \ 1 2 3 - \ . . . - \ Q Q Q - To \------------------------------------------------------------ - -ALE0M.D 10.0 10.0 10.0 10.0 -IOACT.D 10.0 10.0 11.0 10.0 11.0 11.0 -IOBERR.D 10.0 11.0 11.0 11.0 11.0 -iobm/BGr1.D -iobm/ES<0>.D 10.0 10.0 10.0 10.0 -iobm/ES<1>.D 10.0 -iobm/ES<2>.D 10.0 10.0 10.0 10.0 -iobm/ES<3>.D 10.0 10.0 10.0 -iobm/ES<4>.D 10.0 10.0 10.0 10.0 -iobm/ETACK.D 10.0 10.0 10.0 -iobm/IOS_FSM_FFd1.D 10.0 10.0 10.0 -iobm/IOS_FSM_FFd2.D 10.0 10.0 10.0 10.0 10.0 -iobm/IOS_FSM_FFd3.D 10.0 10.0 10.0 10.0 -nAS_IOB.D 10.0 10.0 10.0 -nAoutOE.D -nDinLE.D 10.0 10.0 -nDoutOE.D 10.0 10.0 -nLDS_IOB.D 10.0 10.0 10.0 -nUDS_IOB.D 10.0 10.0 10.0 -nVMA_IOB.D 10.0 10.0 10.0 - --------------------------------------------------------------------------------- - Clock to Setup (tCYC) (nsec) - (Clock: CLK2X_IOB) - -\ From i i i n n n - \ o o o A A V - \ b b b S o M - \ m m m _ u A - \ / / / I t _ - \ R V V O O I - \ E P P B E O - \ S A A . . B - \ r r r Q Q . - \ r f r Q - \ . . . - \ Q Q Q - \ - \ - \ - \ - \ - \ - \ - To \------------------------------------ - -ALE0M.D 10.0 -IOACT.D 11.0 10.0 -IOBERR.D 11.0 -iobm/BGr1.D -iobm/ES<0>.D -iobm/ES<1>.D -iobm/ES<2>.D -iobm/ES<3>.D -iobm/ES<4>.D -iobm/ETACK.D 10.0 -iobm/IOS_FSM_FFd1.D -iobm/IOS_FSM_FFd2.D 10.0 -iobm/IOS_FSM_FFd3.D 10.0 -nAS_IOB.D -nAoutOE.D 10.0 10.0 -nDinLE.D -nDoutOE.D -nLDS_IOB.D -nUDS_IOB.D -nVMA_IOB.D 10.0 10.0 10.0 - -Path Type Definition: - -Pad to Pad (tPD) - Reports pad to pad paths that start - at input pads and end at output pads. - Paths are not traced through - registers. - -Clock Pad to Output Pad (tCO) - Reports paths that start at input - pads trace through clock inputs of - registers and end at output pads. - Paths are not traced through PRE/CLR - inputs of registers. - -Setup to Clock at Pad (tSU or tSUF) - Reports external setup time of data - to clock at pad. Data path starts at - an input pad and ends at register - (Fast Input Register for tSUF) D/T - input. Clock path starts at input pad - and ends at the register clock input. - Paths are not traced through - registers. Pin-to-pin setup - requirement is not reported or - guaranteed for product-term clocks - derived from macrocell feedback - signals. - -Clock to Setup (tCYC) - Register to register cycle time. - Include source register tCO and - destination register tSU. Note that - when the computed Maximum Clock Speed - is limited by tCYC it is computed - assuming that all registers are - rising-edge sensitive. - diff --git a/cpld/XC95144XL/WarpSE.tspec b/cpld/XC95144XL/WarpSE.tspec index 592ada0..6112318 100644 --- a/cpld/XC95144XL/WarpSE.tspec +++ b/cpld/XC95144XL/WarpSE.tspec @@ -1,402 +1,880 @@ -TS_CLK_IOB:FROM:cnt/LTimer<0>.Q:TO:cnt/LTimer<0>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<13>.Q:TO:cnt/LTimer<0>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<13>.Q:TO:cnt/LTimer<13>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<11>.Q:TO:cnt/LTimer<13>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<12>.Q:TO:cnt/LTimer<13>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<0>.Q:TO:cnt/LTimer<13>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<1>.Q:TO:cnt/LTimer<13>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<2>.Q:TO:cnt/LTimer<13>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<10>.Q:TO:cnt/LTimer<13>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<3>.Q:TO:cnt/LTimer<13>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<4>.Q:TO:cnt/LTimer<13>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<5>.Q:TO:cnt/LTimer<13>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<6>.Q:TO:cnt/LTimer<13>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<7>.Q:TO:cnt/LTimer<13>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<8>.Q:TO:cnt/LTimer<13>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<9>.Q:TO:cnt/LTimer<13>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<13>.Q:TO:cnt/LTimer<1>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<1>.Q:TO:cnt/LTimer<1>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<0>.Q:TO:cnt/LTimer<1>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<13>.Q:TO:cnt/LTimer<2>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<2>.Q:TO:cnt/LTimer<2>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<0>.Q:TO:cnt/LTimer<2>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<1>.Q:TO:cnt/LTimer<2>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<13>.Q:TO:cnt/LTimer<3>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<3>.Q:TO:cnt/LTimer<3>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<0>.Q:TO:cnt/LTimer<3>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<1>.Q:TO:cnt/LTimer<3>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<2>.Q:TO:cnt/LTimer<3>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<13>.Q:TO:cnt/LTimer<5>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<5>.Q:TO:cnt/LTimer<5>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<0>.Q:TO:cnt/LTimer<5>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<1>.Q:TO:cnt/LTimer<5>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<2>.Q:TO:cnt/LTimer<5>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<3>.Q:TO:cnt/LTimer<5>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<4>.Q:TO:cnt/LTimer<5>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<13>.Q:TO:cnt/LTimer<4>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<4>.Q:TO:cnt/LTimer<4>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<3>.Q:TO:cnt/LTimer<4>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<0>.Q:TO:cnt/LTimer<4>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<1>.Q:TO:cnt/LTimer<4>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<2>.Q:TO:cnt/LTimer<4>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<13>.Q:TO:cnt/LTimer<6>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<6>.Q:TO:cnt/LTimer<6>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<5>.Q:TO:cnt/LTimer<6>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<0>.Q:TO:cnt/LTimer<6>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<1>.Q:TO:cnt/LTimer<6>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<2>.Q:TO:cnt/LTimer<6>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<3>.Q:TO:cnt/LTimer<6>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<4>.Q:TO:cnt/LTimer<6>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<13>.Q:TO:cnt/LTimer<7>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<7>.Q:TO:cnt/LTimer<7>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<5>.Q:TO:cnt/LTimer<7>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<6>.Q:TO:cnt/LTimer<7>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<0>.Q:TO:cnt/LTimer<7>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<1>.Q:TO:cnt/LTimer<7>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<2>.Q:TO:cnt/LTimer<7>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<3>.Q:TO:cnt/LTimer<7>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<4>.Q:TO:cnt/LTimer<7>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<13>.Q:TO:cnt/LTimer<9>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<9>.Q:TO:cnt/LTimer<9>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<0>.Q:TO:cnt/LTimer<9>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<1>.Q:TO:cnt/LTimer<9>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<2>.Q:TO:cnt/LTimer<9>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<3>.Q:TO:cnt/LTimer<9>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<4>.Q:TO:cnt/LTimer<9>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<5>.Q:TO:cnt/LTimer<9>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<6>.Q:TO:cnt/LTimer<9>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<7>.Q:TO:cnt/LTimer<9>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<8>.Q:TO:cnt/LTimer<9>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<13>.Q:TO:cnt/LTimer<10>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<10>.Q:TO:cnt/LTimer<10>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<9>.Q:TO:cnt/LTimer<10>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<0>.Q:TO:cnt/LTimer<10>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<1>.Q:TO:cnt/LTimer<10>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<2>.Q:TO:cnt/LTimer<10>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<3>.Q:TO:cnt/LTimer<10>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<4>.Q:TO:cnt/LTimer<10>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<5>.Q:TO:cnt/LTimer<10>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<6>.Q:TO:cnt/LTimer<10>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<7>.Q:TO:cnt/LTimer<10>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<8>.Q:TO:cnt/LTimer<10>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<13>.Q:TO:cnt/LTimer<11>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<11>.Q:TO:cnt/LTimer<11>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<0>.Q:TO:cnt/LTimer<11>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<1>.Q:TO:cnt/LTimer<11>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<2>.Q:TO:cnt/LTimer<11>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<10>.Q:TO:cnt/LTimer<11>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<3>.Q:TO:cnt/LTimer<11>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<4>.Q:TO:cnt/LTimer<11>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<5>.Q:TO:cnt/LTimer<11>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<6>.Q:TO:cnt/LTimer<11>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<7>.Q:TO:cnt/LTimer<11>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<8>.Q:TO:cnt/LTimer<11>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<9>.Q:TO:cnt/LTimer<11>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<13>.Q:TO:cnt/LTimer<8>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<8>.Q:TO:cnt/LTimer<8>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<7>.Q:TO:cnt/LTimer<8>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<5>.Q:TO:cnt/LTimer<8>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<6>.Q:TO:cnt/LTimer<8>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<0>.Q:TO:cnt/LTimer<8>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<1>.Q:TO:cnt/LTimer<8>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<2>.Q:TO:cnt/LTimer<8>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<3>.Q:TO:cnt/LTimer<8>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<4>.Q:TO:cnt/LTimer<8>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<13>.Q:TO:cnt/LTimer<12>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<12>.Q:TO:cnt/LTimer<12>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<10>.Q:TO:cnt/LTimer<12>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<11>.Q:TO:cnt/LTimer<12>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<9>.Q:TO:cnt/LTimer<12>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<0>.Q:TO:cnt/LTimer<12>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<1>.Q:TO:cnt/LTimer<12>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<2>.Q:TO:cnt/LTimer<12>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<3>.Q:TO:cnt/LTimer<12>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<4>.Q:TO:cnt/LTimer<12>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<5>.Q:TO:cnt/LTimer<12>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<6>.Q:TO:cnt/LTimer<12>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<7>.Q:TO:cnt/LTimer<12>.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<8>.Q:TO:cnt/LTimer<12>.D:1428 -TS_CLK_IOB:FROM:cnt/PORS_FSM_FFd1.Q:TO:cnt/nBR_IOB.D:1428 -TS_CLK_IOB:FROM:cnt/nBR_IOB.Q:TO:cnt/nBR_IOB.D:1428 -TS_CLK_IOB:FROM:cnt/PORS_FSM_FFd2.Q:TO:cnt/nBR_IOB.D:1428 -TS_CLK_IOB:FROM:cnt/IPL2r.Q:TO:cnt/nBR_IOB.D:1428 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/IOS_FSM_FFd3.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/IOS_FSM_FFd3.D:666 -TS_CLK_IOB:FROM:nAoutOE_OBUF.Q:TO:iobm/IOS_FSM_FFd3.D:1428 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/IOS_FSM_FFd3.D:666 -TS_CLK2X_IOB:FROM:iobm/IOREQr.Q:TO:iobm/IOS_FSM_FFd3.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/IOS_FSM_FFd2.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/IOS_FSM_FFd2.D:666 -TS_CLK2X_IOB:FROM:iobm/ETACK.Q:TO:iobm/IOS_FSM_FFd2.D:666 -TS_CLK2X_IOB:FROM:iobm/BERRrr.Q:TO:iobm/IOS_FSM_FFd2.D:666 -TS_CLK2X_IOB:FROM:iobm/BERRrf.Q:TO:iobm/IOS_FSM_FFd2.D:666 -TS_CLK2X_IOB:FROM:iobm/DTACKrr.Q:TO:iobm/IOS_FSM_FFd2.D:666 -TS_CLK2X_IOB:FROM:iobm/DTACKrf.Q:TO:iobm/IOS_FSM_FFd2.D:666 -TS_CLK2X_IOB:FROM:iobm/RESrr.Q:TO:iobm/IOS_FSM_FFd2.D:666 -TS_CLK2X_IOB:FROM:iobm/RESrf.Q:TO:iobm/IOS_FSM_FFd2.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/IOS_FSM_FFd2.D:666 -TS_CLK_IOB:FROM:cnt/PORS_FSM_FFd1.Q:TO:cnt/PORS_FSM_FFd1.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<13>.Q:TO:cnt/PORS_FSM_FFd1.D:1428 -TS_CLK_IOB:FROM:cnt/PORS_FSM_FFd2.Q:TO:cnt/PORS_FSM_FFd1.D:1428 -TS_CLK_IOB:FROM:cnt/IPL2r.Q:TO:cnt/PORS_FSM_FFd1.D:1428 -TS_CLK_IOB:FROM:cnt/LTimer<13>.Q:TO:cnt/PORS_FSM_FFd2.D:1428 -TS_CLK_IOB:FROM:cnt/PORS_FSM_FFd1.Q:TO:cnt/PORS_FSM_FFd2.D:1428 -TS_CLK_IOB:FROM:cnt/PORS_FSM_FFd2.Q:TO:cnt/PORS_FSM_FFd2.D:1428 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/IOBERR.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/IOBERR.D:666 -TS_CLK2X_IOB:FROM:iobm/IOBERR.Q:TO:iobm/IOBERR.D:666 -TS_CLK2X_IOB:FROM:iobm/ETACK.Q:TO:iobm/IOBERR.D:666 -TS_CLK2X_IOB:FROM:iobm/BERRrr.Q:TO:iobm/IOBERR.D:666 -TS_CLK2X_IOB:FROM:iobm/BERRrf.Q:TO:iobm/IOBERR.D:666 -TS_CLK2X_IOB:FROM:iobm/DTACKrr.Q:TO:iobm/IOBERR.D:666 -TS_CLK2X_IOB:FROM:iobm/DTACKrf.Q:TO:iobm/IOBERR.D:666 -TS_CLK2X_IOB:FROM:iobm/RESrr.Q:TO:iobm/IOBERR.D:666 -TS_CLK2X_IOB:FROM:iobm/RESrf.Q:TO:iobm/IOBERR.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/IOBERR.D:666 -TS_CLK_IOB:FROM:cnt/LTimer<13>.Q:TO:cnt/nRESout.D:1428 -TS_CLK_IOB:FROM:cnt/nRESout.Q:TO:cnt/nRESout.D:1428 -TS_CLK_IOB:FROM:cnt/PORS_FSM_FFd1.Q:TO:cnt/nRESout.D:1428 -TS_CLK_IOB:FROM:cnt/PORS_FSM_FFd2.Q:TO:cnt/nRESout.D:1428 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/IOACT.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/IOACT.D:666 -TS_CLK2X_IOB:FROM:iobm/ETACK.Q:TO:iobm/IOACT.D:666 -TS_CLK2X_IOB:FROM:iobm/BERRrr.Q:TO:iobm/IOACT.D:666 -TS_CLK2X_IOB:FROM:iobm/BERRrf.Q:TO:iobm/IOACT.D:666 -TS_CLK2X_IOB:FROM:iobm/DTACKrr.Q:TO:iobm/IOACT.D:666 -TS_CLK2X_IOB:FROM:iobm/DTACKrf.Q:TO:iobm/IOACT.D:666 -TS_CLK2X_IOB:FROM:iobm/RESrr.Q:TO:iobm/IOACT.D:666 -TS_CLK2X_IOB:FROM:iobm/RESrf.Q:TO:iobm/IOACT.D:666 -TS_CLK2X_IOB:FROM:iobm/IOREQr.Q:TO:iobm/IOACT.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/IOACT.D:666 -TS_CLK_IOB:FROM:cnt/nBR_IOB.Q:TO:nAoutOE_OBUF.D:1428 -TS_CLK_IOB:FROM:cnt/PORS_FSM_FFd1.Q:TO:nAoutOE_OBUF.D:1428 -TS_CLK_IOB:FROM:cnt/PORS_FSM_FFd2.Q:TO:nAoutOE_OBUF.D:1428 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/Once.D:400 -TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:iobs/Once.D:400 -TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/Once.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/Once.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/Once.D:400 -TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/Once.D:400 -TS_CLK_FSB:FROM:cs/nOverlay0.Q:TO:cs/nOverlay1.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:cs/nOverlay1.CE:400 -TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/IORW0.D:400 -TS_CLK_FSB:FROM:iobs/IORW1.Q:TO:iobs/IORW0.D:400 -TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:iobs/IORW0.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/IORW0.D:400 -TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/IORW0.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/IORW0.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/IORW0.D:400 -TS_CLK_FSB:FROM:iobs/IORW0.Q:TO:iobs/IORW0.D:400 -TS_CLK_FSB:FROM:ram/RefReqSync.Q:TO:ram/RefDone.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RefDone.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RefDone.D:400 -TS_CLK_FSB:FROM:ram/RefDone.Q:TO:ram/RefDone.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:cs/nOverlay0.D:400 -TS_CLK_FSB:FROM:cs/nOverlay0.Q:TO:cs/nOverlay0.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/Ready0r.D:400 -TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:fsb/Ready0r.D:400 -TS_CLK_FSB:FROM:ram/RAMReady.Q:TO:fsb/Ready0r.D:400 -TS_CLK_FSB:FROM:fsb/Ready0r.Q:TO:fsb/Ready0r.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/Ready1r.D:400 -TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:fsb/Ready1r.D:400 -TS_CLK_FSB:FROM:iobs/IOReady.Q:TO:fsb/Ready1r.D:400 -TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:fsb/Ready1r.D:400 -TS_CLK_FSB:FROM:fsb/Ready1r.Q:TO:fsb/Ready1r.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/VPA.D:400 -TS_CLK_FSB:FROM:fsb/Ready0r.Q:TO:fsb/VPA.D:400 -TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:fsb/VPA.D:400 -TS_CLK_FSB:FROM:ram/RAMReady.Q:TO:fsb/VPA.D:400 -TS_CLK_FSB:FROM:fsb/Ready1r.Q:TO:fsb/VPA.D:400 -TS_CLK_FSB:FROM:iobs/IOReady.Q:TO:fsb/VPA.D:400 -TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:fsb/VPA.D:400 -TS_CLK_FSB:FROM:fsb/VPA.Q:TO:fsb/VPA.D:400 -TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/IOL0.D:400 -TS_CLK_FSB:FROM:iobs/IOL1.Q:TO:iobs/IOL0.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/IOL0.CE:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/IOL0.CE:400 -TS_CLK_FSB:FROM:iobs/Load1.Q:TO:iobs/IOL1.CE:400 -TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:iobs/IORW1.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/IORW1.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/IORW1.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/IORW1.D:400 -TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/IORW1.D:400 -TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/IORW1.D:400 -TS_CLK_FSB:FROM:iobs/IORW1.Q:TO:iobs/IORW1.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/IOReady.D:400 -TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/IOReady.D:400 -TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/IOReady.D:400 -TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:iobs/IOReady.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/IOReady.D:400 -TS_CLK_FSB:FROM:iobs/IOReady.Q:TO:iobs/IOReady.D:400 -TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/IOU0.D:400 -TS_CLK_FSB:FROM:iobs/IOU1.Q:TO:iobs/IOU0.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/IOU0.CE:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/IOU0.CE:400 -TS_CLK_FSB:FROM:iobs/Load1.Q:TO:iobs/IOU1.CE:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/nDTACK.D:400 -TS_CLK_FSB:FROM:fsb/Ready0r.Q:TO:fsb/nDTACK.D:400 -TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:fsb/nDTACK.D:400 -TS_CLK_FSB:FROM:ram/RAMReady.Q:TO:fsb/nDTACK.D:400 -TS_CLK_FSB:FROM:fsb/Ready1r.Q:TO:fsb/nDTACK.D:400 -TS_CLK_FSB:FROM:iobs/IOReady.Q:TO:fsb/nDTACK.D:400 -TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:fsb/nDTACK.D:400 -TS_CLK_FSB:FROM:fsb/nDTACK.Q:TO:fsb/nDTACK.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/nBERR_FSB.D:400 -TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/nBERR_FSB.D:400 -TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/nBERR_FSB.D:400 -TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:iobs/nBERR_FSB.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/nBERR_FSB.D:400 -TS_CLK_FSB:FROM:iobs/nBERR_FSB.Q:TO:iobs/nBERR_FSB.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RASEL.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RASEL.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RASEL.D:400 -TS_CLK_FSB:FROM:ram/RefUrgent.Q:TO:ram/RASEL.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RASEL.D:400 -TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RASEL.D:400 -TS_CLK_FSB:FROM:ram/RAMEN.Q:TO:ram/RASEL.D:400 -TS_CLK_FSB:FROM:ram/RefReq.Q:TO:ram/RASEL.D:400 -TS_CLK_FSB:FROM:ram/BACTr.Q:TO:ram/RASEL.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RS_FSM_FFd1.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RS_FSM_FFd1.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RS_FSM_FFd1.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RS_FSM_FFd1.D:400 -TS_CLK_FSB:FROM:ram/RefUrgent.Q:TO:ram/RS_FSM_FFd1.D:400 -TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RS_FSM_FFd1.D:400 -TS_CLK_FSB:FROM:ram/RAMEN.Q:TO:ram/RS_FSM_FFd1.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RS_FSM_FFd2.D:400 -TS_CLK_FSB:FROM:ram/RefUrgent.Q:TO:ram/RS_FSM_FFd2.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RS_FSM_FFd2.D:400 -TS_CLK_FSB:FROM:ram/RefReq.Q:TO:ram/RS_FSM_FFd2.D:400 -TS_CLK_FSB:FROM:ram/BACTr.Q:TO:ram/RS_FSM_FFd2.D:400 -TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RS_FSM_FFd2.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RS_FSM_FFd2.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RS_FSM_FFd2.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/PS_FSM_FFd2.D:400 -TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:iobs/PS_FSM_FFd2.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/PS_FSM_FFd2.D:400 -TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/PS_FSM_FFd2.D:400 -TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:iobs/PS_FSM_FFd2.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/PS_FSM_FFd2.D:400 -TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/PS_FSM_FFd2.D:400 -TS_CLK_FSB:FROM:ram/RefDone.Q:TO:ram/RefUrgent.D:400 -TS_CLK_FSB:FROM:ram/RegUrgentSync.Q:TO:ram/RefUrgent.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RS_FSM_FFd3.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RS_FSM_FFd3.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RS_FSM_FFd3.D:400 -TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RS_FSM_FFd3.D:400 -TS_CLK_FSB:FROM:ram/RAMEN.Q:TO:ram/RS_FSM_FFd3.D:400 -TS_CLK_FSB:FROM:ram/RefUrgent.Q:TO:ram/RS_FSM_FFd3.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RS_FSM_FFd3.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/PS_FSM_FFd1.D:400 -TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:iobs/PS_FSM_FFd1.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/PS_FSM_FFd1.D:400 -TS_CLK_FSB:FROM:ram/RAMEN.Q:TO:ram/RAMEN.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RAMEN.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RAMEN.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RAMEN.D:400 -TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RAMEN.D:400 -TS_CLK_FSB:FROM:ram/BACTr.Q:TO:ram/RAMEN.D:400 -TS_CLK_FSB:FROM:ram/RefReq.Q:TO:ram/RAMEN.D:400 -TS_CLK_FSB:FROM:ram/RefUrgent.Q:TO:ram/RAMEN.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RAMEN.D:400 -TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/Load1.D:400 -TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:iobs/Load1.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/Load1.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/Load1.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/Load1.D:400 -TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/Load1.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/BACTr.D:400 -TS_CLK_FSB:FROM:ram/RefReqSync.Q:TO:ram/RefReq.D:400 -TS_CLK_FSB:FROM:ram/RefDone.Q:TO:ram/RefReq.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/ALE0.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/ALE0.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/Clear1.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/Clear1.D:400 -TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/Clear1.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/IOREQ.D:400 -TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:iobs/IOREQ.D:400 -TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/IOREQ.D:400 -TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:iobs/IOREQ.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/IOREQ.D:400 -TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/IOREQ.D:400 -TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/IOREQ.D:400 -TS_CLK_FSB:FROM:ram/RefUrgent.Q:TO:ram/RAMReady.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RAMReady.D:400 -TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RAMReady.D:400 -TS_CLK_FSB:FROM:ram/RAMEN.Q:TO:ram/RAMReady.D:400 -TS_CLK_FSB:FROM:ram/BACTr.Q:TO:ram/RAMReady.D:400 -TS_CLK_FSB:FROM:ram/RefReq.Q:TO:ram/RAMReady.D:400 -TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RAMReady.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RAMReady.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RAMReady.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RefRAS.D:400 -TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RefRAS.D:400 -TS_CLK_FSB:FROM:ram/RASEL.Q:TO:ram/nCAS.D:400 -TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:nADoutLE1_OBUF.D:400 -TS_CLK_FSB:FROM:iobs/Load1.Q:TO:nADoutLE1_OBUF.D:400 -TS_CLK_FSB:FROM:iobs/Clear1.Q:TO:nADoutLE1_OBUF.D:400 -TS_CLK2X_IOB:FROM:iobm/IOACT.Q:TO:iobm/nVMA.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/nVMA.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/nVMA.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/nVMA.D:666 -TS_CLK2X_IOB:FROM:iobm/nVMA.Q:TO:iobm/nVMA.D:666 -TS_CLK2X_IOB:FROM:iobm/VPArr.Q:TO:iobm/nVMA.D:666 -TS_CLK2X_IOB:FROM:iobm/VPArf.Q:TO:iobm/nVMA.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/nVMA.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:iobm/nVMA.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/nLDS.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/nLDS.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/nLDS.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/nUDS.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/nUDS.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/nUDS.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/nASout.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/nASout.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/nASout.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/IOS_FSM_FFd1.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/IOS_FSM_FFd1.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/IOS_FSM_FFd1.D:666 -TS_CLK2X_IOB:FROM:iobm/Er2.Q:TO:iobm/ES<0>.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/ES<0>.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/ES<0>.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:iobm/ES<0>.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/ES<0>.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/ES<0>.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/ES<1>.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/ES<1>.D:666 -TS_CLK2X_IOB:FROM:iobm/Er2.Q:TO:iobm/ES<1>.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:iobm/ES<1>.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/ES<1>.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/ES<1>.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/ES<2>.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/ES<2>.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/ES<2>.D:666 -TS_CLK2X_IOB:FROM:iobm/Er2.Q:TO:iobm/ES<2>.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:iobm/ES<2>.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/ES<2>.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/ES<3>.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/ES<3>.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/ES<3>.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/ES<3>.D:666 -TS_CLK2X_IOB:FROM:iobm/Er2.Q:TO:iobm/ES<3>.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:iobm/ES<3>.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:iobm/ES<4>.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/ES<4>.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/ES<4>.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/ES<4>.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/ES<4>.D:666 -TS_CLK2X_IOB:FROM:iobm/Er2.Q:TO:iobm/ES<4>.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/ETACK.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/ETACK.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/ETACK.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/ETACK.D:666 -TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:iobm/ETACK.D:666 -TS_CLK2X_IOB:FROM:iobm/nVMA.Q:TO:iobm/ETACK.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/ALE0.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/ALE0.D:666 -TS_CLK2X_IOB:FROM:iobm/IOREQr.Q:TO:iobm/ALE0.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/ALE0.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/DoutOE.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/DoutOE.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/nDinLE.D:666 -TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/nDinLE.D:666 +AUTO_TS_P2P:FROM:FCLK:TO:nRES:1 +AUTO_TS_F2P:FROM:nRESout.Q:TO:nRES:1 +AUTO_TS_P2P:FROM:C16M:TO:nVMA_IOB:1 +AUTO_TS_P2P:FROM:FCLK:TO:nVMA_IOB:1 +AUTO_TS_F2P:FROM:nVMA_IOBout.Q:TO:nVMA_IOB:1 +AUTO_TS_F2P:FROM:nAoutOE_OBUF.Q:TO:nVMA_IOB:1 +AUTO_TS_P2P:FROM:C16M:TO:nAS_IOB:1 +AUTO_TS_P2P:FROM:FCLK:TO:nAS_IOB:1 +AUTO_TS_F2P:FROM:nAS_IOBout.Q:TO:nAS_IOB:1 +AUTO_TS_F2P:FROM:nAoutOE_OBUF.Q:TO:nAS_IOB:1 +AUTO_TS_P2P:FROM:C16M:TO:nLDS_IOB:1 +AUTO_TS_P2P:FROM:FCLK:TO:nLDS_IOB:1 +AUTO_TS_F2P:FROM:nLDS_IOBout.Q:TO:nLDS_IOB:1 +AUTO_TS_F2P:FROM:nAoutOE_OBUF.Q:TO:nLDS_IOB:1 +AUTO_TS_P2P:FROM:C16M:TO:nUDS_IOB:1 +AUTO_TS_P2P:FROM:FCLK:TO:nUDS_IOB:1 +AUTO_TS_F2P:FROM:nUDS_IOBout.Q:TO:nUDS_IOB:1 +AUTO_TS_F2P:FROM:nAoutOE_OBUF.Q:TO:nUDS_IOB:1 +AUTO_TS_P2P:FROM:FCLK:TO:nBERR_FSB:1 +AUTO_TS_F2P:FROM:nBERR_FSB_OBUF.Q:TO:nBERR_FSB:1 +AUTO_TS_P2P:FROM:FCLK:TO:nDTACK_FSB:1 +AUTO_TS_F2P:FROM:nDTACK_FSB_OBUF.Q:TO:nDTACK_FSB:1 +AUTO_TS_P2P:FROM:FCLK:TO:nBR_IOB:1 +AUTO_TS_F2P:FROM:nBR_IOB_OBUF.Q:TO:nBR_IOB:1 +AUTO_TS_P2P:FROM:A_FSB<10>:TO:RA<0>:1 +AUTO_TS_P2P:FROM:FCLK:TO:RA<0>:1 +AUTO_TS_P2P:FROM:A_FSB<1>:TO:RA<0>:1 +AUTO_TS_F2P:FROM:ram/RASEL.Q:TO:RA<0>:1 +AUTO_TS_P2P:FROM:A_FSB<11>:TO:RA<1>:1 +AUTO_TS_P2P:FROM:FCLK:TO:RA<1>:1 +AUTO_TS_P2P:FROM:A_FSB<2>:TO:RA<1>:1 +AUTO_TS_F2P:FROM:ram/RASEL.Q:TO:RA<1>:1 +AUTO_TS_P2P:FROM:FCLK:TO:RA<2>:1 +AUTO_TS_P2P:FROM:A_FSB<12>:TO:RA<2>:1 +AUTO_TS_P2P:FROM:A_FSB<3>:TO:RA<2>:1 +AUTO_TS_F2P:FROM:ram/RASEL.Q:TO:RA<2>:1 +AUTO_TS_P2P:FROM:A_FSB<13>:TO:RA<3>:1 +AUTO_TS_P2P:FROM:FCLK:TO:RA<3>:1 +AUTO_TS_P2P:FROM:A_FSB<4>:TO:RA<3>:1 +AUTO_TS_F2P:FROM:ram/RASEL.Q:TO:RA<3>:1 +AUTO_TS_P2P:FROM:A_FSB<14>:TO:RA<4>:1 +AUTO_TS_P2P:FROM:FCLK:TO:RA<4>:1 +AUTO_TS_P2P:FROM:A_FSB<5>:TO:RA<4>:1 +AUTO_TS_F2P:FROM:ram/RASEL.Q:TO:RA<4>:1 +AUTO_TS_P2P:FROM:FCLK:TO:RA<5>:1 +AUTO_TS_P2P:FROM:A_FSB<15>:TO:RA<5>:1 +AUTO_TS_P2P:FROM:A_FSB<6>:TO:RA<5>:1 +AUTO_TS_F2P:FROM:ram/RASEL.Q:TO:RA<5>:1 +AUTO_TS_P2P:FROM:A_FSB<16>:TO:RA<6>:1 +AUTO_TS_P2P:FROM:FCLK:TO:RA<6>:1 +AUTO_TS_P2P:FROM:A_FSB<7>:TO:RA<6>:1 +AUTO_TS_F2P:FROM:ram/RASEL.Q:TO:RA<6>:1 +AUTO_TS_P2P:FROM:A_FSB<8>:TO:RA<7>:1 +AUTO_TS_P2P:FROM:FCLK:TO:RA<7>:1 +AUTO_TS_P2P:FROM:A_FSB<17>:TO:RA<7>:1 +AUTO_TS_F2P:FROM:ram/RASEL.Q:TO:RA<7>:1 +AUTO_TS_P2P:FROM:A_FSB<23>:TO:RA<8>:1 +AUTO_TS_P2P:FROM:A_FSB<22>:TO:RA<8>:1 +AUTO_TS_P2P:FROM:FCLK:TO:RA<8>:1 +AUTO_TS_P2P:FROM:A_FSB<21>:TO:RA<8>:1 +AUTO_TS_P2P:FROM:A_FSB<9>:TO:RA<8>:1 +AUTO_TS_P2P:FROM:A_FSB<18>:TO:RA<8>:1 +AUTO_TS_F2P:FROM:cs/nOverlay1.Q:TO:RA<8>:1 +AUTO_TS_F2P:FROM:ram/RASEL.Q:TO:RA<8>:1 +AUTO_TS_P2P:FROM:A_FSB<20>:TO:RA<9>:1 +AUTO_TS_P2P:FROM:FCLK:TO:RA<9>:1 +AUTO_TS_P2P:FROM:A_FSB<19>:TO:RA<9>:1 +AUTO_TS_F2P:FROM:ram/RASEL.Q:TO:RA<9>:1 +AUTO_TS_P2P:FROM:FCLK:TO:nDoutOE:1 +AUTO_TS_P2P:FROM:C16M:TO:nDoutOE:1 +AUTO_TS_F2P:FROM:nAoutOE_OBUF.Q:TO:nDoutOE:1 +AUTO_TS_F2P:FROM:iobm/DoutOE.Q:TO:nDoutOE:1 +AUTO_TS_P2P:FROM:nAS_FSB:TO:nOE:1 +AUTO_TS_P2P:FROM:nWE_FSB:TO:nOE:1 +AUTO_TS_P2P:FROM:nAS_FSB:TO:nVPA_FSB:1 +AUTO_TS_P2P:FROM:FCLK:TO:nVPA_FSB:1 +AUTO_TS_F2P:FROM:fsb/VPA.Q:TO:nVPA_FSB:1 +AUTO_TS_P2P:FROM:C16M:TO:nADoutLE0:1 +AUTO_TS_P2P:FROM:FCLK:TO:nADoutLE0:1 +AUTO_TS_F2P:FROM:ALE0M.Q:TO:nADoutLE0:1 +AUTO_TS_F2P:FROM:ALE0S.Q:TO:nADoutLE0:1 +AUTO_TS_P2P:FROM:FCLK:TO:nCAS:1 +AUTO_TS_F2P:FROM:nCAS_OBUF.Q:TO:nCAS:1 +AUTO_TS_P2P:FROM:C16M:TO:nDinLE:1 +AUTO_TS_F2P:FROM:nDinLE_OBUF.Q:TO:nDinLE:1 +AUTO_TS_P2P:FROM:A_FSB<23>:TO:nDinOE:1 +AUTO_TS_P2P:FROM:nAS_FSB:TO:nDinOE:1 +AUTO_TS_P2P:FROM:nWE_FSB:TO:nDinOE:1 +AUTO_TS_P2P:FROM:A_FSB<22>:TO:nDinOE:1 +AUTO_TS_P2P:FROM:A_FSB<21>:TO:nDinOE:1 +AUTO_TS_P2P:FROM:A_FSB<20>:TO:nDinOE:1 +AUTO_TS_P2P:FROM:A_FSB<19>:TO:RA<11>:1 +AUTO_TS_P2P:FROM:A_FSB<21>:TO:RA<10>:1 +AUTO_TS_P2P:FROM:FCLK:TO:nADoutLE1:1 +AUTO_TS_F2P:FROM:nADoutLE1_OBUF.Q:TO:nADoutLE1:1 +AUTO_TS_P2P:FROM:FCLK:TO:nAoutOE:1 +AUTO_TS_F2P:FROM:nAoutOE_OBUF.Q:TO:nAoutOE:1 +AUTO_TS_P2P:FROM:A_FSB<23>:TO:nROMCS:1 +AUTO_TS_P2P:FROM:A_FSB<22>:TO:nROMCS:1 +AUTO_TS_P2P:FROM:A_FSB<21>:TO:nROMCS:1 +AUTO_TS_P2P:FROM:A_FSB<20>:TO:nROMCS:1 +AUTO_TS_P2P:FROM:FCLK:TO:nROMCS:1 +AUTO_TS_F2P:FROM:cs/nOverlay1.Q:TO:nROMCS:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/IOS_FSM_FFd3.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/IOS_FSM_FFd3.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/IOS_FSM_FFd3.D:1 +AUTO_TS_F2F:FROM:iobm/IOREQr.Q:TO:iobm/IOS_FSM_FFd3.D:1 +AUTO_TS_F2F:FROM:nAoutOE_OBUF.Q:TO:iobm/IOS_FSM_FFd3.D:1 +AUTO_TS_P2F:FROM:C16M:TO:iobm/IOS_FSM_FFd3.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:iobm/IOS_FSM_FFd3.D:1 +AUTO_TS_P2F:FROM:C8M:TO:iobm/IOS_FSM_FFd3.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/IOS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/IOS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/IOS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:iobm/ETACK.Q:TO:iobm/IOS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:iobm/BERRrf.Q:TO:iobm/IOS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:iobm/BERRrr.Q:TO:iobm/IOS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:iobm/DTACKrf.Q:TO:iobm/IOS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:iobm/DTACKrr.Q:TO:iobm/IOS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:iobm/RESrf.Q:TO:iobm/IOS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:iobm/RESrr.Q:TO:iobm/IOS_FSM_FFd2.D:1 +AUTO_TS_P2F:FROM:C16M:TO:iobm/IOS_FSM_FFd2.D:1 +AUTO_TS_P2F:FROM:C8M:TO:iobm/IOS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd3.Q:TO:IOACT.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd2.Q:TO:IOACT.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd1.Q:TO:IOACT.D:1 +AUTO_TS_F2F:FROM:iobm/RESrf.Q:TO:IOACT.D:1 +AUTO_TS_F2F:FROM:iobm/RESrr.Q:TO:IOACT.D:1 +AUTO_TS_F2F:FROM:iobm/IOREQr.Q:TO:IOACT.D:1 +AUTO_TS_F2F:FROM:iobm/ETACK.Q:TO:IOACT.D:1 +AUTO_TS_F2F:FROM:iobm/BERRrf.Q:TO:IOACT.D:1 +AUTO_TS_F2F:FROM:iobm/BERRrr.Q:TO:IOACT.D:1 +AUTO_TS_F2F:FROM:iobm/DTACKrf.Q:TO:IOACT.D:1 +AUTO_TS_F2F:FROM:iobm/DTACKrr.Q:TO:IOACT.D:1 +AUTO_TS_P2F:FROM:C16M:TO:IOACT.D:1 +AUTO_TS_P2F:FROM:C8M:TO:IOACT.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd2.Q:TO:IOBERR.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd3.Q:TO:IOBERR.D:1 +AUTO_TS_F2F:FROM:IOBERR.Q:TO:IOBERR.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd1.Q:TO:IOBERR.D:1 +AUTO_TS_F2F:FROM:iobm/RESrf.Q:TO:IOBERR.D:1 +AUTO_TS_F2F:FROM:iobm/RESrr.Q:TO:IOBERR.D:1 +AUTO_TS_F2F:FROM:iobm/BERRrf.Q:TO:IOBERR.D:1 +AUTO_TS_F2F:FROM:iobm/BERRrr.Q:TO:IOBERR.D:1 +AUTO_TS_F2F:FROM:iobm/DTACKrf.Q:TO:IOBERR.D:1 +AUTO_TS_F2F:FROM:iobm/DTACKrr.Q:TO:IOBERR.D:1 +AUTO_TS_F2F:FROM:iobm/ETACK.Q:TO:IOBERR.D:1 +AUTO_TS_P2F:FROM:C16M:TO:IOBERR.D:1 +AUTO_TS_P2F:FROM:C8M:TO:IOBERR.D:1 +AUTO_TS_P2F:FROM:nBERR_IOB:TO:IOBERR.D:1 +AUTO_TS_F2F:FROM:iobs/Once.Q:TO:iobs/Once.D:1 +AUTO_TS_F2F:FROM:fsb/ASrf.Q:TO:iobs/Once.D:1 +AUTO_TS_F2F:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/Once.D:1 +AUTO_TS_F2F:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/Once.D:1 +AUTO_TS_F2F:FROM:cs/nOverlay1.Q:TO:iobs/Once.D:1 +AUTO_TS_F2F:FROM:nADoutLE1_OBUF.Q:TO:iobs/Once.D:1 +AUTO_TS_P2F:FROM:A_FSB<22>:TO:iobs/Once.D:1 +AUTO_TS_P2F:FROM:A_FSB<21>:TO:iobs/Once.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:iobs/Once.D:1 +AUTO_TS_P2F:FROM:A_FSB<20>:TO:iobs/Once.D:1 +AUTO_TS_P2F:FROM:A_FSB<14>:TO:iobs/Once.D:1 +AUTO_TS_P2F:FROM:A_FSB<19>:TO:iobs/Once.D:1 +AUTO_TS_P2F:FROM:A_FSB<18>:TO:iobs/Once.D:1 +AUTO_TS_P2F:FROM:A_FSB<17>:TO:iobs/Once.D:1 +AUTO_TS_P2F:FROM:A_FSB<16>:TO:iobs/Once.D:1 +AUTO_TS_P2F:FROM:nAS_FSB:TO:iobs/Once.D:1 +AUTO_TS_P2F:FROM:nWE_FSB:TO:iobs/Once.D:1 +AUTO_TS_P2F:FROM:A_FSB<13>:TO:iobs/Once.D:1 +AUTO_TS_P2F:FROM:A_FSB<23>:TO:iobs/Once.D:1 +AUTO_TS_F2F:FROM:cnt/Timer<0>.Q:TO:RefUrg.D:1 +AUTO_TS_F2F:FROM:cnt/Timer<1>.Q:TO:RefUrg.D:1 +AUTO_TS_F2F:FROM:cnt/Timer<2>.Q:TO:RefUrg.D:1 +AUTO_TS_F2F:FROM:cnt/Er<0>.Q:TO:RefUrg.D:1 +AUTO_TS_F2F:FROM:cnt/Er<1>.Q:TO:RefUrg.D:1 +AUTO_TS_F2F:FROM:cnt/TimerTC.Q:TO:RefUrg.D:1 +AUTO_TS_F2F:FROM:RefUrg.Q:TO:RefUrg.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:RefUrg.D:1 +AUTO_TS_F2F:FROM:cnt/Er<0>.Q:TO:RefUrg.CE:1 +AUTO_TS_F2F:FROM:cnt/Er<1>.Q:TO:RefUrg.CE:1 +AUTO_TS_P2F:FROM:FCLK:TO:RefUrg.CE:1 +AUTO_TS_F2F:FROM:cnt/Er<0>.Q:TO:cnt/LTimer<0>.CE:1 +AUTO_TS_F2F:FROM:cnt/Er<1>.Q:TO:cnt/LTimer<0>.CE:1 +AUTO_TS_F2F:FROM:cnt/TimerTC.Q:TO:cnt/LTimer<0>.CE:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/LTimer<0>.CE:1 +AUTO_TS_F2F:FROM:cnt/Timer<0>.Q:TO:cnt/Timer<0>.D:1 +AUTO_TS_F2F:FROM:cnt/Er<0>.Q:TO:cnt/Timer<0>.D:1 +AUTO_TS_F2F:FROM:cnt/Er<1>.Q:TO:cnt/Timer<0>.D:1 +AUTO_TS_F2F:FROM:cnt/TimerTC.Q:TO:cnt/Timer<0>.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/Timer<0>.D:1 +AUTO_TS_F2F:FROM:cnt/Er<0>.Q:TO:cnt/Timer<0>.CE:1 +AUTO_TS_F2F:FROM:cnt/Er<1>.Q:TO:cnt/Timer<0>.CE:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/Timer<0>.CE:1 +AUTO_TS_F2F:FROM:cnt/Timer<0>.Q:TO:cnt/Timer<1>.D:1 +AUTO_TS_F2F:FROM:cnt/Timer<1>.Q:TO:cnt/Timer<1>.D:1 +AUTO_TS_F2F:FROM:cnt/Er<0>.Q:TO:cnt/Timer<1>.D:1 +AUTO_TS_F2F:FROM:cnt/Er<1>.Q:TO:cnt/Timer<1>.D:1 +AUTO_TS_F2F:FROM:cnt/TimerTC.Q:TO:cnt/Timer<1>.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/Timer<1>.D:1 +AUTO_TS_F2F:FROM:cnt/Er<0>.Q:TO:cnt/Timer<1>.CE:1 +AUTO_TS_F2F:FROM:cnt/Er<1>.Q:TO:cnt/Timer<1>.CE:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/Timer<1>.CE:1 +AUTO_TS_F2F:FROM:cnt/Timer<0>.Q:TO:cnt/Timer<2>.D:1 +AUTO_TS_F2F:FROM:cnt/Timer<2>.Q:TO:cnt/Timer<2>.D:1 +AUTO_TS_F2F:FROM:cnt/Timer<1>.Q:TO:cnt/Timer<2>.D:1 +AUTO_TS_F2F:FROM:cnt/Er<0>.Q:TO:cnt/Timer<2>.D:1 +AUTO_TS_F2F:FROM:cnt/Er<1>.Q:TO:cnt/Timer<2>.D:1 +AUTO_TS_F2F:FROM:cnt/TimerTC.Q:TO:cnt/Timer<2>.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/Timer<2>.D:1 +AUTO_TS_F2F:FROM:cnt/Er<0>.Q:TO:cnt/Timer<2>.CE:1 +AUTO_TS_F2F:FROM:cnt/Er<1>.Q:TO:cnt/Timer<2>.CE:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/Timer<2>.CE:1 +AUTO_TS_F2F:FROM:cs/nOverlay0.Q:TO:cs/nOverlay1.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:cs/nOverlay1.D:1 +AUTO_TS_F2F:FROM:fsb/ASrf.Q:TO:cs/nOverlay1.CE:1 +AUTO_TS_P2F:FROM:FCLK:TO:cs/nOverlay1.CE:1 +AUTO_TS_P2F:FROM:nAS_FSB:TO:cs/nOverlay1.CE:1 +AUTO_TS_F2F:FROM:cnt/LTimer<0>.Q:TO:cnt/LTimer<10>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<1>.Q:TO:cnt/LTimer<10>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<2>.Q:TO:cnt/LTimer<10>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<3>.Q:TO:cnt/LTimer<10>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<4>.Q:TO:cnt/LTimer<10>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<5>.Q:TO:cnt/LTimer<10>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<6>.Q:TO:cnt/LTimer<10>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<7>.Q:TO:cnt/LTimer<10>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<8>.Q:TO:cnt/LTimer<10>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<9>.Q:TO:cnt/LTimer<10>.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/LTimer<10>.D:1 +AUTO_TS_F2F:FROM:cnt/Er<0>.Q:TO:cnt/LTimer<10>.CE:1 +AUTO_TS_F2F:FROM:cnt/Er<1>.Q:TO:cnt/LTimer<10>.CE:1 +AUTO_TS_F2F:FROM:cnt/TimerTC.Q:TO:cnt/LTimer<10>.CE:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/LTimer<10>.CE:1 +AUTO_TS_F2F:FROM:cnt/LTimer<0>.Q:TO:cnt/LTimer<11>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<1>.Q:TO:cnt/LTimer<11>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<2>.Q:TO:cnt/LTimer<11>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<3>.Q:TO:cnt/LTimer<11>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<4>.Q:TO:cnt/LTimer<11>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<5>.Q:TO:cnt/LTimer<11>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<6>.Q:TO:cnt/LTimer<11>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<7>.Q:TO:cnt/LTimer<11>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<8>.Q:TO:cnt/LTimer<11>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<9>.Q:TO:cnt/LTimer<11>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<10>.Q:TO:cnt/LTimer<11>.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/LTimer<11>.D:1 +AUTO_TS_F2F:FROM:cnt/Er<0>.Q:TO:cnt/LTimer<11>.CE:1 +AUTO_TS_F2F:FROM:cnt/Er<1>.Q:TO:cnt/LTimer<11>.CE:1 +AUTO_TS_F2F:FROM:cnt/TimerTC.Q:TO:cnt/LTimer<11>.CE:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/LTimer<11>.CE:1 +AUTO_TS_F2F:FROM:cnt/LTimer<0>.Q:TO:cnt/LTimer<1>.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/LTimer<1>.D:1 +AUTO_TS_F2F:FROM:cnt/Er<0>.Q:TO:cnt/LTimer<1>.CE:1 +AUTO_TS_F2F:FROM:cnt/Er<1>.Q:TO:cnt/LTimer<1>.CE:1 +AUTO_TS_F2F:FROM:cnt/TimerTC.Q:TO:cnt/LTimer<1>.CE:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/LTimer<1>.CE:1 +AUTO_TS_F2F:FROM:cnt/LTimer<0>.Q:TO:cnt/LTimer<2>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<1>.Q:TO:cnt/LTimer<2>.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/LTimer<2>.D:1 +AUTO_TS_F2F:FROM:cnt/Er<0>.Q:TO:cnt/LTimer<2>.CE:1 +AUTO_TS_F2F:FROM:cnt/Er<1>.Q:TO:cnt/LTimer<2>.CE:1 +AUTO_TS_F2F:FROM:cnt/TimerTC.Q:TO:cnt/LTimer<2>.CE:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/LTimer<2>.CE:1 +AUTO_TS_F2F:FROM:cnt/LTimer<0>.Q:TO:cnt/LTimer<3>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<1>.Q:TO:cnt/LTimer<3>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<2>.Q:TO:cnt/LTimer<3>.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/LTimer<3>.D:1 +AUTO_TS_F2F:FROM:cnt/Er<0>.Q:TO:cnt/LTimer<3>.CE:1 +AUTO_TS_F2F:FROM:cnt/Er<1>.Q:TO:cnt/LTimer<3>.CE:1 +AUTO_TS_F2F:FROM:cnt/TimerTC.Q:TO:cnt/LTimer<3>.CE:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/LTimer<3>.CE:1 +AUTO_TS_F2F:FROM:cnt/LTimer<0>.Q:TO:cnt/LTimer<4>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<1>.Q:TO:cnt/LTimer<4>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<2>.Q:TO:cnt/LTimer<4>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<3>.Q:TO:cnt/LTimer<4>.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/LTimer<4>.D:1 +AUTO_TS_F2F:FROM:cnt/Er<0>.Q:TO:cnt/LTimer<4>.CE:1 +AUTO_TS_F2F:FROM:cnt/Er<1>.Q:TO:cnt/LTimer<4>.CE:1 +AUTO_TS_F2F:FROM:cnt/TimerTC.Q:TO:cnt/LTimer<4>.CE:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/LTimer<4>.CE:1 +AUTO_TS_F2F:FROM:cnt/LTimer<0>.Q:TO:cnt/LTimer<5>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<1>.Q:TO:cnt/LTimer<5>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<2>.Q:TO:cnt/LTimer<5>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<3>.Q:TO:cnt/LTimer<5>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<4>.Q:TO:cnt/LTimer<5>.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/LTimer<5>.D:1 +AUTO_TS_F2F:FROM:cnt/Er<0>.Q:TO:cnt/LTimer<5>.CE:1 +AUTO_TS_F2F:FROM:cnt/Er<1>.Q:TO:cnt/LTimer<5>.CE:1 +AUTO_TS_F2F:FROM:cnt/TimerTC.Q:TO:cnt/LTimer<5>.CE:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/LTimer<5>.CE:1 +AUTO_TS_F2F:FROM:cnt/LTimer<0>.Q:TO:cnt/LTimer<6>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<1>.Q:TO:cnt/LTimer<6>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<2>.Q:TO:cnt/LTimer<6>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<3>.Q:TO:cnt/LTimer<6>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<4>.Q:TO:cnt/LTimer<6>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<5>.Q:TO:cnt/LTimer<6>.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/LTimer<6>.D:1 +AUTO_TS_F2F:FROM:cnt/Er<0>.Q:TO:cnt/LTimer<6>.CE:1 +AUTO_TS_F2F:FROM:cnt/Er<1>.Q:TO:cnt/LTimer<6>.CE:1 +AUTO_TS_F2F:FROM:cnt/TimerTC.Q:TO:cnt/LTimer<6>.CE:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/LTimer<6>.CE:1 +AUTO_TS_F2F:FROM:cnt/LTimer<0>.Q:TO:cnt/LTimer<7>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<1>.Q:TO:cnt/LTimer<7>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<2>.Q:TO:cnt/LTimer<7>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<3>.Q:TO:cnt/LTimer<7>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<4>.Q:TO:cnt/LTimer<7>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<5>.Q:TO:cnt/LTimer<7>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<6>.Q:TO:cnt/LTimer<7>.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/LTimer<7>.D:1 +AUTO_TS_F2F:FROM:cnt/Er<0>.Q:TO:cnt/LTimer<7>.CE:1 +AUTO_TS_F2F:FROM:cnt/Er<1>.Q:TO:cnt/LTimer<7>.CE:1 +AUTO_TS_F2F:FROM:cnt/TimerTC.Q:TO:cnt/LTimer<7>.CE:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/LTimer<7>.CE:1 +AUTO_TS_F2F:FROM:cnt/LTimer<0>.Q:TO:cnt/LTimer<8>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<1>.Q:TO:cnt/LTimer<8>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<2>.Q:TO:cnt/LTimer<8>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<3>.Q:TO:cnt/LTimer<8>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<4>.Q:TO:cnt/LTimer<8>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<5>.Q:TO:cnt/LTimer<8>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<6>.Q:TO:cnt/LTimer<8>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<7>.Q:TO:cnt/LTimer<8>.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/LTimer<8>.D:1 +AUTO_TS_F2F:FROM:cnt/Er<0>.Q:TO:cnt/LTimer<8>.CE:1 +AUTO_TS_F2F:FROM:cnt/Er<1>.Q:TO:cnt/LTimer<8>.CE:1 +AUTO_TS_F2F:FROM:cnt/TimerTC.Q:TO:cnt/LTimer<8>.CE:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/LTimer<8>.CE:1 +AUTO_TS_F2F:FROM:cnt/LTimer<0>.Q:TO:cnt/LTimer<9>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<1>.Q:TO:cnt/LTimer<9>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<2>.Q:TO:cnt/LTimer<9>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<3>.Q:TO:cnt/LTimer<9>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<4>.Q:TO:cnt/LTimer<9>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<5>.Q:TO:cnt/LTimer<9>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<6>.Q:TO:cnt/LTimer<9>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<7>.Q:TO:cnt/LTimer<9>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<8>.Q:TO:cnt/LTimer<9>.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/LTimer<9>.D:1 +AUTO_TS_F2F:FROM:cnt/Er<0>.Q:TO:cnt/LTimer<9>.CE:1 +AUTO_TS_F2F:FROM:cnt/Er<1>.Q:TO:cnt/LTimer<9>.CE:1 +AUTO_TS_F2F:FROM:cnt/TimerTC.Q:TO:cnt/LTimer<9>.CE:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/LTimer<9>.CE:1 +AUTO_TS_F2F:FROM:iobs/PS_FSM_FFd2.Q:TO:IORW0.D:1 +AUTO_TS_F2F:FROM:iobs/PS_FSM_FFd1.Q:TO:IORW0.D:1 +AUTO_TS_F2F:FROM:nADoutLE1_OBUF.Q:TO:IORW0.D:1 +AUTO_TS_F2F:FROM:iobs/IORW1.Q:TO:IORW0.D:1 +AUTO_TS_F2F:FROM:IORW0.Q:TO:IORW0.D:1 +AUTO_TS_F2F:FROM:iobs/Once.Q:TO:IORW0.D:1 +AUTO_TS_F2F:FROM:fsb/ASrf.Q:TO:IORW0.D:1 +AUTO_TS_F2F:FROM:cs/nOverlay1.Q:TO:IORW0.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:IORW0.D:1 +AUTO_TS_P2F:FROM:A_FSB<23>:TO:IORW0.D:1 +AUTO_TS_P2F:FROM:A_FSB<21>:TO:IORW0.D:1 +AUTO_TS_P2F:FROM:A_FSB<20>:TO:IORW0.D:1 +AUTO_TS_P2F:FROM:nAS_FSB:TO:IORW0.D:1 +AUTO_TS_P2F:FROM:nWE_FSB:TO:IORW0.D:1 +AUTO_TS_P2F:FROM:A_FSB<22>:TO:IORW0.D:1 +AUTO_TS_P2F:FROM:A_FSB<14>:TO:IORW0.D:1 +AUTO_TS_P2F:FROM:A_FSB<19>:TO:IORW0.D:1 +AUTO_TS_P2F:FROM:A_FSB<18>:TO:IORW0.D:1 +AUTO_TS_P2F:FROM:A_FSB<17>:TO:IORW0.D:1 +AUTO_TS_P2F:FROM:A_FSB<16>:TO:IORW0.D:1 +AUTO_TS_P2F:FROM:A_FSB<13>:TO:IORW0.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<0>.Q:TO:cnt/LTimer<12>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<1>.Q:TO:cnt/LTimer<12>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<2>.Q:TO:cnt/LTimer<12>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<3>.Q:TO:cnt/LTimer<12>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<4>.Q:TO:cnt/LTimer<12>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<5>.Q:TO:cnt/LTimer<12>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<6>.Q:TO:cnt/LTimer<12>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<7>.Q:TO:cnt/LTimer<12>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<8>.Q:TO:cnt/LTimer<12>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<9>.Q:TO:cnt/LTimer<12>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<10>.Q:TO:cnt/LTimer<12>.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<11>.Q:TO:cnt/LTimer<12>.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/LTimer<12>.D:1 +AUTO_TS_F2F:FROM:cnt/Er<0>.Q:TO:cnt/LTimer<12>.CE:1 +AUTO_TS_F2F:FROM:cnt/Er<1>.Q:TO:cnt/LTimer<12>.CE:1 +AUTO_TS_F2F:FROM:cnt/TimerTC.Q:TO:cnt/LTimer<12>.CE:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/LTimer<12>.CE:1 +AUTO_TS_F2F:FROM:cnt/Timer<0>.Q:TO:cnt/TimerTC.D:1 +AUTO_TS_F2F:FROM:cnt/Timer<1>.Q:TO:cnt/TimerTC.D:1 +AUTO_TS_F2F:FROM:cnt/Timer<2>.Q:TO:cnt/TimerTC.D:1 +AUTO_TS_F2F:FROM:RefUrg.Q:TO:cnt/TimerTC.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/TimerTC.D:1 +AUTO_TS_F2F:FROM:cnt/Er<0>.Q:TO:cnt/TimerTC.CE:1 +AUTO_TS_F2F:FROM:cnt/Er<1>.Q:TO:cnt/TimerTC.CE:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/TimerTC.CE:1 +AUTO_TS_F2F:FROM:ram/RefDone.Q:TO:ram/RefDone.D:1 +AUTO_TS_F2F:FROM:ram/RefReqSync.Q:TO:ram/RefDone.D:1 +AUTO_TS_F2F:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RefDone.D:1 +AUTO_TS_F2F:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RefDone.D:1 +AUTO_TS_F2F:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RefDone.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:ram/RefDone.D:1 +AUTO_TS_F2F:FROM:cs/nOverlay0.Q:TO:cs/nOverlay0.D:1 +AUTO_TS_F2F:FROM:fsb/ASrf.Q:TO:cs/nOverlay0.D:1 +AUTO_TS_P2F:FROM:A_FSB<23>:TO:cs/nOverlay0.D:1 +AUTO_TS_P2F:FROM:A_FSB<22>:TO:cs/nOverlay0.D:1 +AUTO_TS_P2F:FROM:A_FSB<21>:TO:cs/nOverlay0.D:1 +AUTO_TS_P2F:FROM:A_FSB<20>:TO:cs/nOverlay0.D:1 +AUTO_TS_P2F:FROM:nAS_FSB:TO:cs/nOverlay0.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:cs/nOverlay0.D:1 +AUTO_TS_F2F:FROM:nRESout.Q:TO:cs/nOverlay0.RSTF:1 +AUTO_TS_P2F:FROM:nRES:TO:cs/nOverlay0.RSTF:1 +AUTO_TS_P2F:FROM:FCLK:TO:cs/nOverlay0.RSTF:1 +AUTO_TS_F2F:FROM:nADoutLE1_OBUF.Q:TO:IOL0.D:1 +AUTO_TS_F2F:FROM:iobs/IOL1.Q:TO:IOL0.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:IOL0.D:1 +AUTO_TS_P2F:FROM:nLDS_FSB:TO:IOL0.D:1 +AUTO_TS_F2F:FROM:iobs/PS_FSM_FFd2.Q:TO:IOL0.CE:1 +AUTO_TS_F2F:FROM:iobs/PS_FSM_FFd1.Q:TO:IOL0.CE:1 +AUTO_TS_P2F:FROM:FCLK:TO:IOL0.CE:1 +AUTO_TS_F2F:FROM:nADoutLE1_OBUF.Q:TO:IOU0.D:1 +AUTO_TS_F2F:FROM:iobs/IOU1.Q:TO:IOU0.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:IOU0.D:1 +AUTO_TS_P2F:FROM:nUDS_FSB:TO:IOU0.D:1 +AUTO_TS_F2F:FROM:iobs/PS_FSM_FFd2.Q:TO:IOU0.CE:1 +AUTO_TS_F2F:FROM:iobs/PS_FSM_FFd1.Q:TO:IOU0.CE:1 +AUTO_TS_P2F:FROM:FCLK:TO:IOU0.CE:1 +AUTO_TS_F2F:FROM:cnt/Timer<1>.Q:TO:RefReq.D:1 +AUTO_TS_F2F:FROM:cnt/Timer<2>.Q:TO:RefReq.D:1 +AUTO_TS_F2F:FROM:RefUrg.Q:TO:RefReq.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:RefReq.D:1 +AUTO_TS_F2F:FROM:cnt/Er<0>.Q:TO:RefReq.CE:1 +AUTO_TS_F2F:FROM:cnt/Er<1>.Q:TO:RefReq.CE:1 +AUTO_TS_P2F:FROM:FCLK:TO:RefReq.CE:1 +AUTO_TS_F2F:FROM:cnt/LTimer<0>.Q:TO:cnt/LTimerTC.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<1>.Q:TO:cnt/LTimerTC.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<2>.Q:TO:cnt/LTimerTC.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<3>.Q:TO:cnt/LTimerTC.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<4>.Q:TO:cnt/LTimerTC.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<5>.Q:TO:cnt/LTimerTC.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<6>.Q:TO:cnt/LTimerTC.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<7>.Q:TO:cnt/LTimerTC.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<8>.Q:TO:cnt/LTimerTC.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<9>.Q:TO:cnt/LTimerTC.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<10>.Q:TO:cnt/LTimerTC.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<11>.Q:TO:cnt/LTimerTC.D:1 +AUTO_TS_F2F:FROM:cnt/LTimer<12>.Q:TO:cnt/LTimerTC.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/LTimerTC.D:1 +AUTO_TS_F2F:FROM:cnt/Er<0>.Q:TO:cnt/LTimerTC.CE:1 +AUTO_TS_F2F:FROM:cnt/Er<1>.Q:TO:cnt/LTimerTC.CE:1 +AUTO_TS_F2F:FROM:cnt/TimerTC.Q:TO:cnt/LTimerTC.CE:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/LTimerTC.CE:1 +AUTO_TS_F2F:FROM:fsb/ASrf.Q:TO:fsb/Ready0r.D:1 +AUTO_TS_F2F:FROM:cs/nOverlay1.Q:TO:fsb/Ready0r.D:1 +AUTO_TS_F2F:FROM:fsb/Ready0r.Q:TO:fsb/Ready0r.D:1 +AUTO_TS_F2F:FROM:ram/RAMReady.Q:TO:fsb/Ready0r.D:1 +AUTO_TS_P2F:FROM:nAS_FSB:TO:fsb/Ready0r.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:fsb/Ready0r.D:1 +AUTO_TS_P2F:FROM:A_FSB<23>:TO:fsb/Ready0r.D:1 +AUTO_TS_P2F:FROM:A_FSB<22>:TO:fsb/Ready0r.D:1 +AUTO_TS_P2F:FROM:A_FSB<21>:TO:fsb/Ready0r.D:1 +AUTO_TS_F2F:FROM:cs/nOverlay1.Q:TO:fsb/Ready1r.D:1 +AUTO_TS_F2F:FROM:nADoutLE1_OBUF.Q:TO:fsb/Ready1r.D:1 +AUTO_TS_F2F:FROM:fsb/Ready1r.Q:TO:fsb/Ready1r.D:1 +AUTO_TS_F2F:FROM:iobs/IOReady.Q:TO:fsb/Ready1r.D:1 +AUTO_TS_F2F:FROM:fsb/ASrf.Q:TO:fsb/Ready1r.D:1 +AUTO_TS_P2F:FROM:A_FSB<21>:TO:fsb/Ready1r.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:fsb/Ready1r.D:1 +AUTO_TS_P2F:FROM:A_FSB<14>:TO:fsb/Ready1r.D:1 +AUTO_TS_P2F:FROM:A_FSB<20>:TO:fsb/Ready1r.D:1 +AUTO_TS_P2F:FROM:A_FSB<19>:TO:fsb/Ready1r.D:1 +AUTO_TS_P2F:FROM:A_FSB<18>:TO:fsb/Ready1r.D:1 +AUTO_TS_P2F:FROM:A_FSB<17>:TO:fsb/Ready1r.D:1 +AUTO_TS_P2F:FROM:A_FSB<16>:TO:fsb/Ready1r.D:1 +AUTO_TS_P2F:FROM:nWE_FSB:TO:fsb/Ready1r.D:1 +AUTO_TS_P2F:FROM:A_FSB<13>:TO:fsb/Ready1r.D:1 +AUTO_TS_P2F:FROM:nAS_FSB:TO:fsb/Ready1r.D:1 +AUTO_TS_P2F:FROM:A_FSB<23>:TO:fsb/Ready1r.D:1 +AUTO_TS_P2F:FROM:A_FSB<22>:TO:fsb/Ready1r.D:1 +AUTO_TS_F2F:FROM:fsb/Ready1r.Q:TO:fsb/VPA.D:1 +AUTO_TS_F2F:FROM:fsb/ASrf.Q:TO:fsb/VPA.D:1 +AUTO_TS_F2F:FROM:iobs/IOReady.Q:TO:fsb/VPA.D:1 +AUTO_TS_F2F:FROM:cs/nOverlay1.Q:TO:fsb/VPA.D:1 +AUTO_TS_F2F:FROM:nADoutLE1_OBUF.Q:TO:fsb/VPA.D:1 +AUTO_TS_F2F:FROM:fsb/VPA.Q:TO:fsb/VPA.D:1 +AUTO_TS_F2F:FROM:fsb/Ready0r.Q:TO:fsb/VPA.D:1 +AUTO_TS_F2F:FROM:ram/RAMReady.Q:TO:fsb/VPA.D:1 +AUTO_TS_P2F:FROM:A_FSB<9>:TO:fsb/VPA.D:1 +AUTO_TS_P2F:FROM:A_FSB<8>:TO:fsb/VPA.D:1 +AUTO_TS_P2F:FROM:A_FSB<15>:TO:fsb/VPA.D:1 +AUTO_TS_P2F:FROM:A_FSB<14>:TO:fsb/VPA.D:1 +AUTO_TS_P2F:FROM:A_FSB<13>:TO:fsb/VPA.D:1 +AUTO_TS_P2F:FROM:A_FSB<12>:TO:fsb/VPA.D:1 +AUTO_TS_P2F:FROM:A_FSB<11>:TO:fsb/VPA.D:1 +AUTO_TS_P2F:FROM:A_FSB<10>:TO:fsb/VPA.D:1 +AUTO_TS_P2F:FROM:A_FSB<23>:TO:fsb/VPA.D:1 +AUTO_TS_P2F:FROM:A_FSB<22>:TO:fsb/VPA.D:1 +AUTO_TS_P2F:FROM:A_FSB<21>:TO:fsb/VPA.D:1 +AUTO_TS_P2F:FROM:A_FSB<20>:TO:fsb/VPA.D:1 +AUTO_TS_P2F:FROM:A_FSB<19>:TO:fsb/VPA.D:1 +AUTO_TS_P2F:FROM:A_FSB<18>:TO:fsb/VPA.D:1 +AUTO_TS_P2F:FROM:A_FSB<17>:TO:fsb/VPA.D:1 +AUTO_TS_P2F:FROM:A_FSB<16>:TO:fsb/VPA.D:1 +AUTO_TS_P2F:FROM:nAS_FSB:TO:fsb/VPA.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:fsb/VPA.D:1 +AUTO_TS_P2F:FROM:nWE_FSB:TO:fsb/VPA.D:1 +AUTO_TS_F2F:FROM:iobs/Load1.Q:TO:iobs/IOL1.CE:1 +AUTO_TS_P2F:FROM:FCLK:TO:iobs/IOL1.CE:1 +AUTO_TS_F2F:FROM:iobs/Once.Q:TO:iobs/IORW1.D:1 +AUTO_TS_F2F:FROM:nADoutLE1_OBUF.Q:TO:iobs/IORW1.D:1 +AUTO_TS_F2F:FROM:fsb/ASrf.Q:TO:iobs/IORW1.D:1 +AUTO_TS_F2F:FROM:cs/nOverlay1.Q:TO:iobs/IORW1.D:1 +AUTO_TS_F2F:FROM:iobs/IORW1.Q:TO:iobs/IORW1.D:1 +AUTO_TS_F2F:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/IORW1.D:1 +AUTO_TS_F2F:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/IORW1.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:iobs/IORW1.D:1 +AUTO_TS_P2F:FROM:A_FSB<23>:TO:iobs/IORW1.D:1 +AUTO_TS_P2F:FROM:A_FSB<22>:TO:iobs/IORW1.D:1 +AUTO_TS_P2F:FROM:A_FSB<14>:TO:iobs/IORW1.D:1 +AUTO_TS_P2F:FROM:A_FSB<13>:TO:iobs/IORW1.D:1 +AUTO_TS_P2F:FROM:nAS_FSB:TO:iobs/IORW1.D:1 +AUTO_TS_P2F:FROM:A_FSB<21>:TO:iobs/IORW1.D:1 +AUTO_TS_P2F:FROM:A_FSB<19>:TO:iobs/IORW1.D:1 +AUTO_TS_P2F:FROM:nWE_FSB:TO:iobs/IORW1.D:1 +AUTO_TS_P2F:FROM:A_FSB<20>:TO:iobs/IORW1.D:1 +AUTO_TS_P2F:FROM:A_FSB<18>:TO:iobs/IORW1.D:1 +AUTO_TS_P2F:FROM:A_FSB<17>:TO:iobs/IORW1.D:1 +AUTO_TS_P2F:FROM:A_FSB<16>:TO:iobs/IORW1.D:1 +AUTO_TS_F2F:FROM:fsb/ASrf.Q:TO:iobs/IOReady.D:1 +AUTO_TS_F2F:FROM:iobs/IOReady.Q:TO:iobs/IOReady.D:1 +AUTO_TS_F2F:FROM:iobs/Once.Q:TO:iobs/IOReady.D:1 +AUTO_TS_F2F:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/IOReady.D:1 +AUTO_TS_F2F:FROM:nADoutLE1_OBUF.Q:TO:iobs/IOReady.D:1 +AUTO_TS_F2F:FROM:iobs/IOACTr.Q:TO:iobs/IOReady.D:1 +AUTO_TS_F2F:FROM:IOBERR.Q:TO:iobs/IOReady.D:1 +AUTO_TS_P2F:FROM:nAS_FSB:TO:iobs/IOReady.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:iobs/IOReady.D:1 +AUTO_TS_P2F:FROM:C16M:TO:iobs/IOReady.D:1 +AUTO_TS_F2F:FROM:iobs/Load1.Q:TO:iobs/IOU1.CE:1 +AUTO_TS_P2F:FROM:FCLK:TO:iobs/IOU1.CE:1 +AUTO_TS_F2F:FROM:fsb/ASrf.Q:TO:nBERR_FSB_OBUF.D:1 +AUTO_TS_F2F:FROM:nBERR_FSB_OBUF.Q:TO:nBERR_FSB_OBUF.D:1 +AUTO_TS_F2F:FROM:iobs/Once.Q:TO:nBERR_FSB_OBUF.D:1 +AUTO_TS_F2F:FROM:iobs/PS_FSM_FFd2.Q:TO:nBERR_FSB_OBUF.D:1 +AUTO_TS_F2F:FROM:nADoutLE1_OBUF.Q:TO:nBERR_FSB_OBUF.D:1 +AUTO_TS_F2F:FROM:iobs/IOACTr.Q:TO:nBERR_FSB_OBUF.D:1 +AUTO_TS_F2F:FROM:IOBERR.Q:TO:nBERR_FSB_OBUF.D:1 +AUTO_TS_P2F:FROM:nAS_FSB:TO:nBERR_FSB_OBUF.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:nBERR_FSB_OBUF.D:1 +AUTO_TS_P2F:FROM:C16M:TO:nBERR_FSB_OBUF.D:1 +AUTO_TS_F2F:FROM:fsb/Ready1r.Q:TO:nDTACK_FSB_OBUF.D:1 +AUTO_TS_F2F:FROM:iobs/IOReady.Q:TO:nDTACK_FSB_OBUF.D:1 +AUTO_TS_F2F:FROM:fsb/ASrf.Q:TO:nDTACK_FSB_OBUF.D:1 +AUTO_TS_F2F:FROM:nDTACK_FSB_OBUF.Q:TO:nDTACK_FSB_OBUF.D:1 +AUTO_TS_F2F:FROM:cs/nOverlay1.Q:TO:nDTACK_FSB_OBUF.D:1 +AUTO_TS_F2F:FROM:fsb/Ready0r.Q:TO:nDTACK_FSB_OBUF.D:1 +AUTO_TS_F2F:FROM:ram/RAMReady.Q:TO:nDTACK_FSB_OBUF.D:1 +AUTO_TS_F2F:FROM:nADoutLE1_OBUF.Q:TO:nDTACK_FSB_OBUF.D:1 +AUTO_TS_P2F:FROM:A_FSB<9>:TO:nDTACK_FSB_OBUF.D:1 +AUTO_TS_P2F:FROM:A_FSB<8>:TO:nDTACK_FSB_OBUF.D:1 +AUTO_TS_P2F:FROM:A_FSB<15>:TO:nDTACK_FSB_OBUF.D:1 +AUTO_TS_P2F:FROM:A_FSB<14>:TO:nDTACK_FSB_OBUF.D:1 +AUTO_TS_P2F:FROM:A_FSB<13>:TO:nDTACK_FSB_OBUF.D:1 +AUTO_TS_P2F:FROM:A_FSB<12>:TO:nDTACK_FSB_OBUF.D:1 +AUTO_TS_P2F:FROM:A_FSB<11>:TO:nDTACK_FSB_OBUF.D:1 +AUTO_TS_P2F:FROM:A_FSB<10>:TO:nDTACK_FSB_OBUF.D:1 +AUTO_TS_P2F:FROM:A_FSB<23>:TO:nDTACK_FSB_OBUF.D:1 +AUTO_TS_P2F:FROM:A_FSB<22>:TO:nDTACK_FSB_OBUF.D:1 +AUTO_TS_P2F:FROM:A_FSB<21>:TO:nDTACK_FSB_OBUF.D:1 +AUTO_TS_P2F:FROM:A_FSB<20>:TO:nDTACK_FSB_OBUF.D:1 +AUTO_TS_P2F:FROM:A_FSB<19>:TO:nDTACK_FSB_OBUF.D:1 +AUTO_TS_P2F:FROM:A_FSB<18>:TO:nDTACK_FSB_OBUF.D:1 +AUTO_TS_P2F:FROM:A_FSB<17>:TO:nDTACK_FSB_OBUF.D:1 +AUTO_TS_P2F:FROM:A_FSB<16>:TO:nDTACK_FSB_OBUF.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:nDTACK_FSB_OBUF.D:1 +AUTO_TS_P2F:FROM:nAS_FSB:TO:nDTACK_FSB_OBUF.D:1 +AUTO_TS_P2F:FROM:nWE_FSB:TO:nDTACK_FSB_OBUF.D:1 +AUTO_TS_F2F:FROM:nBR_IOB_OBUF.Q:TO:nBR_IOB_OBUF.D:1 +AUTO_TS_F2F:FROM:cnt/INITS_FSM_FFd1.Q:TO:nBR_IOB_OBUF.D:1 +AUTO_TS_F2F:FROM:cnt/INITS_FSM_FFd2.Q:TO:nBR_IOB_OBUF.D:1 +AUTO_TS_F2F:FROM:cnt/nIPL2r.Q:TO:nBR_IOB_OBUF.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:nBR_IOB_OBUF.D:1 +AUTO_TS_F2F:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RASEL.D:1 +AUTO_TS_F2F:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RASEL.D:1 +AUTO_TS_F2F:FROM:ram/RefUrg.Q:TO:ram/RASEL.D:1 +AUTO_TS_F2F:FROM:ram/RefReq.Q:TO:ram/RASEL.D:1 +AUTO_TS_F2F:FROM:cs/nOverlay1.Q:TO:ram/RASEL.D:1 +AUTO_TS_F2F:FROM:ram/BACTr.Q:TO:ram/RASEL.D:1 +AUTO_TS_F2F:FROM:ram/RAMEN.Q:TO:ram/RASEL.D:1 +AUTO_TS_F2F:FROM:fsb/ASrf.Q:TO:ram/RASEL.D:1 +AUTO_TS_F2F:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RASEL.D:1 +AUTO_TS_P2F:FROM:A_FSB<22>:TO:ram/RASEL.D:1 +AUTO_TS_P2F:FROM:A_FSB<21>:TO:ram/RASEL.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:ram/RASEL.D:1 +AUTO_TS_P2F:FROM:A_FSB<23>:TO:ram/RASEL.D:1 +AUTO_TS_P2F:FROM:nAS_FSB:TO:ram/RASEL.D:1 +AUTO_TS_F2F:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RS_FSM_FFd1.D:1 +AUTO_TS_F2F:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RS_FSM_FFd1.D:1 +AUTO_TS_F2F:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RS_FSM_FFd1.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:ram/RS_FSM_FFd1.D:1 +AUTO_TS_F2F:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:ram/RefUrg.Q:TO:ram/RS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:fsb/ASrf.Q:TO:ram/RS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:ram/RAMEN.Q:TO:ram/RS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:cs/nOverlay1.Q:TO:ram/RS_FSM_FFd2.D:1 +AUTO_TS_P2F:FROM:A_FSB<23>:TO:ram/RS_FSM_FFd2.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:ram/RS_FSM_FFd2.D:1 +AUTO_TS_P2F:FROM:nAS_FSB:TO:ram/RS_FSM_FFd2.D:1 +AUTO_TS_P2F:FROM:A_FSB<22>:TO:ram/RS_FSM_FFd2.D:1 +AUTO_TS_P2F:FROM:A_FSB<21>:TO:ram/RS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RS_FSM_FFd3.D:1 +AUTO_TS_F2F:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RS_FSM_FFd3.D:1 +AUTO_TS_F2F:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RS_FSM_FFd3.D:1 +AUTO_TS_F2F:FROM:ram/RefUrg.Q:TO:ram/RS_FSM_FFd3.D:1 +AUTO_TS_F2F:FROM:ram/RefReq.Q:TO:ram/RS_FSM_FFd3.D:1 +AUTO_TS_F2F:FROM:cs/nOverlay1.Q:TO:ram/RS_FSM_FFd3.D:1 +AUTO_TS_F2F:FROM:ram/RAMEN.Q:TO:ram/RS_FSM_FFd3.D:1 +AUTO_TS_F2F:FROM:fsb/ASrf.Q:TO:ram/RS_FSM_FFd3.D:1 +AUTO_TS_F2F:FROM:ram/BACTr.Q:TO:ram/RS_FSM_FFd3.D:1 +AUTO_TS_P2F:FROM:A_FSB<22>:TO:ram/RS_FSM_FFd3.D:1 +AUTO_TS_P2F:FROM:A_FSB<21>:TO:ram/RS_FSM_FFd3.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:ram/RS_FSM_FFd3.D:1 +AUTO_TS_P2F:FROM:A_FSB<23>:TO:ram/RS_FSM_FFd3.D:1 +AUTO_TS_P2F:FROM:nAS_FSB:TO:ram/RS_FSM_FFd3.D:1 +AUTO_TS_F2F:FROM:iobs/Once.Q:TO:iobs/PS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/PS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/PS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:cs/nOverlay1.Q:TO:iobs/PS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:fsb/ASrf.Q:TO:iobs/PS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:iobs/IOACTr.Q:TO:iobs/PS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:nADoutLE1_OBUF.Q:TO:iobs/PS_FSM_FFd2.D:1 +AUTO_TS_P2F:FROM:A_FSB<14>:TO:iobs/PS_FSM_FFd2.D:1 +AUTO_TS_P2F:FROM:A_FSB<21>:TO:iobs/PS_FSM_FFd2.D:1 +AUTO_TS_P2F:FROM:A_FSB<20>:TO:iobs/PS_FSM_FFd2.D:1 +AUTO_TS_P2F:FROM:A_FSB<19>:TO:iobs/PS_FSM_FFd2.D:1 +AUTO_TS_P2F:FROM:A_FSB<18>:TO:iobs/PS_FSM_FFd2.D:1 +AUTO_TS_P2F:FROM:A_FSB<17>:TO:iobs/PS_FSM_FFd2.D:1 +AUTO_TS_P2F:FROM:A_FSB<16>:TO:iobs/PS_FSM_FFd2.D:1 +AUTO_TS_P2F:FROM:nAS_FSB:TO:iobs/PS_FSM_FFd2.D:1 +AUTO_TS_P2F:FROM:nWE_FSB:TO:iobs/PS_FSM_FFd2.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:iobs/PS_FSM_FFd2.D:1 +AUTO_TS_P2F:FROM:A_FSB<13>:TO:iobs/PS_FSM_FFd2.D:1 +AUTO_TS_P2F:FROM:A_FSB<23>:TO:iobs/PS_FSM_FFd2.D:1 +AUTO_TS_P2F:FROM:A_FSB<22>:TO:iobs/PS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:ram/RefDone.Q:TO:ram/RefUrg.D:1 +AUTO_TS_F2F:FROM:ram/RegUrgSync.Q:TO:ram/RefUrg.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:ram/RefUrg.D:1 +AUTO_TS_F2F:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/PS_FSM_FFd1.D:1 +AUTO_TS_F2F:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/PS_FSM_FFd1.D:1 +AUTO_TS_F2F:FROM:iobs/IOACTr.Q:TO:iobs/PS_FSM_FFd1.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:iobs/PS_FSM_FFd1.D:1 +AUTO_TS_F2F:FROM:cnt/Er<0>.Q:TO:cnt/INITS_FSM_FFd1.D:1 +AUTO_TS_F2F:FROM:cnt/Er<1>.Q:TO:cnt/INITS_FSM_FFd1.D:1 +AUTO_TS_F2F:FROM:cnt/TimerTC.Q:TO:cnt/INITS_FSM_FFd1.D:1 +AUTO_TS_F2F:FROM:cnt/LTimerTC.Q:TO:cnt/INITS_FSM_FFd1.D:1 +AUTO_TS_F2F:FROM:cnt/INITS_FSM_FFd1.Q:TO:cnt/INITS_FSM_FFd1.D:1 +AUTO_TS_F2F:FROM:cnt/INITS_FSM_FFd2.Q:TO:cnt/INITS_FSM_FFd1.D:1 +AUTO_TS_F2F:FROM:cnt/nIPL2r.Q:TO:cnt/INITS_FSM_FFd1.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/INITS_FSM_FFd1.D:1 +AUTO_TS_F2F:FROM:cnt/Er<0>.Q:TO:cnt/INITS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:cnt/Er<1>.Q:TO:cnt/INITS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:cnt/TimerTC.Q:TO:cnt/INITS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:cnt/LTimerTC.Q:TO:cnt/INITS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:cnt/INITS_FSM_FFd1.Q:TO:cnt/INITS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:cnt/INITS_FSM_FFd2.Q:TO:cnt/INITS_FSM_FFd2.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/INITS_FSM_FFd2.D:1 +AUTO_TS_F2F:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RAMEN.D:1 +AUTO_TS_F2F:FROM:ram/RAMEN.Q:TO:ram/RAMEN.D:1 +AUTO_TS_F2F:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RAMEN.D:1 +AUTO_TS_F2F:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RAMEN.D:1 +AUTO_TS_F2F:FROM:ram/RefUrg.Q:TO:ram/RAMEN.D:1 +AUTO_TS_F2F:FROM:ram/BACTr.Q:TO:ram/RAMEN.D:1 +AUTO_TS_F2F:FROM:fsb/ASrf.Q:TO:ram/RAMEN.D:1 +AUTO_TS_F2F:FROM:ram/RefReq.Q:TO:ram/RAMEN.D:1 +AUTO_TS_F2F:FROM:cs/nOverlay1.Q:TO:ram/RAMEN.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:ram/RAMEN.D:1 +AUTO_TS_P2F:FROM:nAS_FSB:TO:ram/RAMEN.D:1 +AUTO_TS_P2F:FROM:A_FSB<23>:TO:ram/RAMEN.D:1 +AUTO_TS_P2F:FROM:A_FSB<22>:TO:ram/RAMEN.D:1 +AUTO_TS_P2F:FROM:A_FSB<21>:TO:ram/RAMEN.D:1 +AUTO_TS_F2F:FROM:iobs/Once.Q:TO:iobs/Load1.D:1 +AUTO_TS_F2F:FROM:nADoutLE1_OBUF.Q:TO:iobs/Load1.D:1 +AUTO_TS_F2F:FROM:cs/nOverlay1.Q:TO:iobs/Load1.D:1 +AUTO_TS_F2F:FROM:fsb/ASrf.Q:TO:iobs/Load1.D:1 +AUTO_TS_F2F:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/Load1.D:1 +AUTO_TS_F2F:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/Load1.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:iobs/Load1.D:1 +AUTO_TS_P2F:FROM:A_FSB<23>:TO:iobs/Load1.D:1 +AUTO_TS_P2F:FROM:A_FSB<22>:TO:iobs/Load1.D:1 +AUTO_TS_P2F:FROM:A_FSB<21>:TO:iobs/Load1.D:1 +AUTO_TS_P2F:FROM:A_FSB<19>:TO:iobs/Load1.D:1 +AUTO_TS_P2F:FROM:A_FSB<16>:TO:iobs/Load1.D:1 +AUTO_TS_P2F:FROM:A_FSB<20>:TO:iobs/Load1.D:1 +AUTO_TS_P2F:FROM:A_FSB<18>:TO:iobs/Load1.D:1 +AUTO_TS_P2F:FROM:A_FSB<17>:TO:iobs/Load1.D:1 +AUTO_TS_P2F:FROM:A_FSB<14>:TO:iobs/Load1.D:1 +AUTO_TS_P2F:FROM:A_FSB<13>:TO:iobs/Load1.D:1 +AUTO_TS_P2F:FROM:nAS_FSB:TO:iobs/Load1.D:1 +AUTO_TS_P2F:FROM:nWE_FSB:TO:iobs/Load1.D:1 +AUTO_TS_F2F:FROM:fsb/ASrf.Q:TO:ram/BACTr.D:1 +AUTO_TS_P2F:FROM:nAS_FSB:TO:ram/BACTr.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:ram/BACTr.D:1 +AUTO_TS_F2F:FROM:ram/RefDone.Q:TO:ram/RefReq.D:1 +AUTO_TS_F2F:FROM:ram/RefReqSync.Q:TO:ram/RefReq.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:ram/RefReq.D:1 +AUTO_TS_F2F:FROM:RefReq.Q:TO:ram/RefReqSync.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:ram/RefReqSync.D:1 +AUTO_TS_F2F:FROM:iobs/PS_FSM_FFd2.Q:TO:ALE0S.D:1 +AUTO_TS_F2F:FROM:iobs/PS_FSM_FFd1.Q:TO:ALE0S.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:ALE0S.D:1 +AUTO_TS_F2F:FROM:iobs/Once.Q:TO:IOREQ.D:1 +AUTO_TS_F2F:FROM:fsb/ASrf.Q:TO:IOREQ.D:1 +AUTO_TS_F2F:FROM:iobs/PS_FSM_FFd1.Q:TO:IOREQ.D:1 +AUTO_TS_F2F:FROM:cs/nOverlay1.Q:TO:IOREQ.D:1 +AUTO_TS_F2F:FROM:iobs/PS_FSM_FFd2.Q:TO:IOREQ.D:1 +AUTO_TS_F2F:FROM:iobs/IOACTr.Q:TO:IOREQ.D:1 +AUTO_TS_F2F:FROM:nADoutLE1_OBUF.Q:TO:IOREQ.D:1 +AUTO_TS_P2F:FROM:A_FSB<22>:TO:IOREQ.D:1 +AUTO_TS_P2F:FROM:A_FSB<20>:TO:IOREQ.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:IOREQ.D:1 +AUTO_TS_P2F:FROM:A_FSB<14>:TO:IOREQ.D:1 +AUTO_TS_P2F:FROM:A_FSB<21>:TO:IOREQ.D:1 +AUTO_TS_P2F:FROM:A_FSB<19>:TO:IOREQ.D:1 +AUTO_TS_P2F:FROM:A_FSB<18>:TO:IOREQ.D:1 +AUTO_TS_P2F:FROM:A_FSB<17>:TO:IOREQ.D:1 +AUTO_TS_P2F:FROM:A_FSB<16>:TO:IOREQ.D:1 +AUTO_TS_P2F:FROM:nAS_FSB:TO:IOREQ.D:1 +AUTO_TS_P2F:FROM:nWE_FSB:TO:IOREQ.D:1 +AUTO_TS_P2F:FROM:A_FSB<13>:TO:IOREQ.D:1 +AUTO_TS_P2F:FROM:A_FSB<23>:TO:IOREQ.D:1 +AUTO_TS_F2F:FROM:cnt/Er<0>.Q:TO:cnt/Er<1>.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:cnt/Er<1>.D:1 +AUTO_TS_F2F:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/Clear1.D:1 +AUTO_TS_F2F:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/Clear1.D:1 +AUTO_TS_F2F:FROM:nADoutLE1_OBUF.Q:TO:iobs/Clear1.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:iobs/Clear1.D:1 +AUTO_TS_F2F:FROM:cnt/INITS_FSM_FFd1.Q:TO:nRESout.D:1 +AUTO_TS_F2F:FROM:cnt/INITS_FSM_FFd2.Q:TO:nRESout.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:nRESout.D:1 +AUTO_TS_F2F:FROM:cs/nOverlay1.Q:TO:ram/RAMReady.D:1 +AUTO_TS_F2F:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RAMReady.D:1 +AUTO_TS_F2F:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RAMReady.D:1 +AUTO_TS_F2F:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RAMReady.D:1 +AUTO_TS_F2F:FROM:ram/RefUrg.Q:TO:ram/RAMReady.D:1 +AUTO_TS_F2F:FROM:ram/RefReq.Q:TO:ram/RAMReady.D:1 +AUTO_TS_F2F:FROM:ram/BACTr.Q:TO:ram/RAMReady.D:1 +AUTO_TS_F2F:FROM:fsb/ASrf.Q:TO:ram/RAMReady.D:1 +AUTO_TS_F2F:FROM:ram/RAMEN.Q:TO:ram/RAMReady.D:1 +AUTO_TS_P2F:FROM:A_FSB<22>:TO:ram/RAMReady.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:ram/RAMReady.D:1 +AUTO_TS_P2F:FROM:A_FSB<23>:TO:ram/RAMReady.D:1 +AUTO_TS_P2F:FROM:nAS_FSB:TO:ram/RAMReady.D:1 +AUTO_TS_P2F:FROM:A_FSB<21>:TO:ram/RAMReady.D:1 +AUTO_TS_F2F:FROM:RefUrg.Q:TO:ram/RegUrgSync.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:ram/RegUrgSync.D:1 +AUTO_TS_F2F:FROM:ram/RASEL.Q:TO:nCAS_OBUF.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:nCAS_OBUF.D:1 +AUTO_TS_F2F:FROM:iobs/Load1.Q:TO:nADoutLE1_OBUF.D:1 +AUTO_TS_F2F:FROM:nADoutLE1_OBUF.Q:TO:nADoutLE1_OBUF.D:1 +AUTO_TS_F2F:FROM:iobs/Clear1.Q:TO:nADoutLE1_OBUF.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:nADoutLE1_OBUF.D:1 +AUTO_TS_F2F:FROM:nAoutOE_OBUF.Q:TO:nAoutOE_OBUF.D:1 +AUTO_TS_F2F:FROM:cnt/INITS_FSM_FFd1.Q:TO:nAoutOE_OBUF.D:1 +AUTO_TS_F2F:FROM:cnt/INITS_FSM_FFd2.Q:TO:nAoutOE_OBUF.D:1 +AUTO_TS_F2F:FROM:nBR_IOB_OBUF.Q:TO:nAoutOE_OBUF.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:nAoutOE_OBUF.D:1 +AUTO_TS_F2F:FROM:nVMA_IOBout.Q:TO:nVMA_IOBout.D:1 +AUTO_TS_F2F:FROM:iobm/ES<0>.Q:TO:nVMA_IOBout.D:1 +AUTO_TS_F2F:FROM:iobm/ES<1>.Q:TO:nVMA_IOBout.D:1 +AUTO_TS_F2F:FROM:iobm/ES<2>.Q:TO:nVMA_IOBout.D:1 +AUTO_TS_F2F:FROM:iobm/ES<3>.Q:TO:nVMA_IOBout.D:1 +AUTO_TS_F2F:FROM:iobm/ES<4>.Q:TO:nVMA_IOBout.D:1 +AUTO_TS_F2F:FROM:IOACT.Q:TO:nVMA_IOBout.D:1 +AUTO_TS_F2F:FROM:iobm/VPArf.Q:TO:nVMA_IOBout.D:1 +AUTO_TS_F2F:FROM:iobm/VPArr.Q:TO:nVMA_IOBout.D:1 +AUTO_TS_P2F:FROM:C16M:TO:nVMA_IOBout.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd1.Q:TO:nAS_IOBout.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd2.Q:TO:nAS_IOBout.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd3.Q:TO:nAS_IOBout.D:1 +AUTO_TS_P2F:FROM:C16M:TO:nAS_IOBout.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd1.Q:TO:nLDS_IOBout.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd2.Q:TO:nLDS_IOBout.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd3.Q:TO:nLDS_IOBout.D:1 +AUTO_TS_F2F:FROM:IOL0.Q:TO:nLDS_IOBout.D:1 +AUTO_TS_F2F:FROM:IORW0.Q:TO:nLDS_IOBout.D:1 +AUTO_TS_P2F:FROM:C16M:TO:nLDS_IOBout.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:nLDS_IOBout.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd1.Q:TO:nUDS_IOBout.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd2.Q:TO:nUDS_IOBout.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd3.Q:TO:nUDS_IOBout.D:1 +AUTO_TS_F2F:FROM:IOU0.Q:TO:nUDS_IOBout.D:1 +AUTO_TS_F2F:FROM:IORW0.Q:TO:nUDS_IOBout.D:1 +AUTO_TS_P2F:FROM:C16M:TO:nUDS_IOBout.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:nUDS_IOBout.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/IOS_FSM_FFd1.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/IOS_FSM_FFd1.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/IOS_FSM_FFd1.D:1 +AUTO_TS_P2F:FROM:C16M:TO:iobm/IOS_FSM_FFd1.D:1 +AUTO_TS_F2F:FROM:iobm/ES<0>.Q:TO:iobm/ES<0>.D:1 +AUTO_TS_F2F:FROM:iobm/Er2.Q:TO:iobm/ES<0>.D:1 +AUTO_TS_F2F:FROM:iobm/ES<1>.Q:TO:iobm/ES<0>.D:1 +AUTO_TS_F2F:FROM:iobm/ES<2>.Q:TO:iobm/ES<0>.D:1 +AUTO_TS_F2F:FROM:iobm/ES<3>.Q:TO:iobm/ES<0>.D:1 +AUTO_TS_F2F:FROM:iobm/ES<4>.Q:TO:iobm/ES<0>.D:1 +AUTO_TS_F2F:FROM:iobm/Er.Q:TO:iobm/ES<0>.D:1 +AUTO_TS_P2F:FROM:C16M:TO:iobm/ES<0>.D:1 +AUTO_TS_P2F:FROM:C8M:TO:iobm/ES<0>.D:1 +AUTO_TS_F2F:FROM:iobm/ES<0>.Q:TO:iobm/ES<1>.D:1 +AUTO_TS_F2F:FROM:iobm/ES<1>.Q:TO:iobm/ES<1>.D:1 +AUTO_TS_F2F:FROM:iobm/Er2.Q:TO:iobm/ES<1>.D:1 +AUTO_TS_F2F:FROM:iobm/Er.Q:TO:iobm/ES<1>.D:1 +AUTO_TS_P2F:FROM:C16M:TO:iobm/ES<1>.D:1 +AUTO_TS_P2F:FROM:C8M:TO:iobm/ES<1>.D:1 +AUTO_TS_F2F:FROM:iobm/ES<0>.Q:TO:iobm/ES<2>.D:1 +AUTO_TS_F2F:FROM:iobm/ES<2>.Q:TO:iobm/ES<2>.D:1 +AUTO_TS_F2F:FROM:iobm/ES<1>.Q:TO:iobm/ES<2>.D:1 +AUTO_TS_F2F:FROM:iobm/Er2.Q:TO:iobm/ES<2>.D:1 +AUTO_TS_F2F:FROM:iobm/ES<3>.Q:TO:iobm/ES<2>.D:1 +AUTO_TS_F2F:FROM:iobm/ES<4>.Q:TO:iobm/ES<2>.D:1 +AUTO_TS_F2F:FROM:iobm/Er.Q:TO:iobm/ES<2>.D:1 +AUTO_TS_P2F:FROM:C16M:TO:iobm/ES<2>.D:1 +AUTO_TS_P2F:FROM:C8M:TO:iobm/ES<2>.D:1 +AUTO_TS_F2F:FROM:iobm/ES<3>.Q:TO:iobm/ES<3>.D:1 +AUTO_TS_F2F:FROM:iobm/Er2.Q:TO:iobm/ES<3>.D:1 +AUTO_TS_F2F:FROM:iobm/ES<0>.Q:TO:iobm/ES<3>.D:1 +AUTO_TS_F2F:FROM:iobm/ES<1>.Q:TO:iobm/ES<3>.D:1 +AUTO_TS_F2F:FROM:iobm/ES<2>.Q:TO:iobm/ES<3>.D:1 +AUTO_TS_F2F:FROM:iobm/Er.Q:TO:iobm/ES<3>.D:1 +AUTO_TS_P2F:FROM:C16M:TO:iobm/ES<3>.D:1 +AUTO_TS_P2F:FROM:C8M:TO:iobm/ES<3>.D:1 +AUTO_TS_F2F:FROM:iobm/ES<4>.Q:TO:iobm/ES<4>.D:1 +AUTO_TS_F2F:FROM:iobm/Er2.Q:TO:iobm/ES<4>.D:1 +AUTO_TS_F2F:FROM:iobm/ES<0>.Q:TO:iobm/ES<4>.D:1 +AUTO_TS_F2F:FROM:iobm/ES<1>.Q:TO:iobm/ES<4>.D:1 +AUTO_TS_F2F:FROM:iobm/ES<2>.Q:TO:iobm/ES<4>.D:1 +AUTO_TS_F2F:FROM:iobm/ES<3>.Q:TO:iobm/ES<4>.D:1 +AUTO_TS_F2F:FROM:iobm/Er.Q:TO:iobm/ES<4>.D:1 +AUTO_TS_P2F:FROM:C16M:TO:iobm/ES<4>.D:1 +AUTO_TS_P2F:FROM:C8M:TO:iobm/ES<4>.D:1 +AUTO_TS_F2F:FROM:nVMA_IOBout.Q:TO:iobm/ETACK.D:1 +AUTO_TS_F2F:FROM:iobm/ES<0>.Q:TO:iobm/ETACK.D:1 +AUTO_TS_F2F:FROM:iobm/ES<1>.Q:TO:iobm/ETACK.D:1 +AUTO_TS_F2F:FROM:iobm/ES<2>.Q:TO:iobm/ETACK.D:1 +AUTO_TS_F2F:FROM:iobm/ES<3>.Q:TO:iobm/ETACK.D:1 +AUTO_TS_F2F:FROM:iobm/ES<4>.Q:TO:iobm/ETACK.D:1 +AUTO_TS_P2F:FROM:C16M:TO:iobm/ETACK.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd1.Q:TO:ALE0M.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd2.Q:TO:ALE0M.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd3.Q:TO:ALE0M.D:1 +AUTO_TS_F2F:FROM:iobm/IOREQr.Q:TO:ALE0M.D:1 +AUTO_TS_P2F:FROM:C16M:TO:ALE0M.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/DoutOE.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/DoutOE.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/DoutOE.D:1 +AUTO_TS_F2F:FROM:iobm/IOREQr.Q:TO:iobm/DoutOE.D:1 +AUTO_TS_F2F:FROM:IORW0.Q:TO:iobm/DoutOE.D:1 +AUTO_TS_F2F:FROM:nAoutOE_OBUF.Q:TO:iobm/DoutOE.D:1 +AUTO_TS_P2F:FROM:C16M:TO:iobm/DoutOE.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:iobm/DoutOE.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd1.Q:TO:nDinLE_OBUF.D:1 +AUTO_TS_F2F:FROM:iobm/IOS_FSM_FFd2.Q:TO:nDinLE_OBUF.D:1 +AUTO_TS_P2F:FROM:C16M:TO:nDinLE_OBUF.D:1 +AUTO_TS_F2F:FROM:IOACT.Q:TO:iobs/IOACTr.D:1 +AUTO_TS_P2F:FROM:C16M:TO:iobs/IOACTr.D:1 +AUTO_TS_F2F:FROM:IOREQ.Q:TO:iobm/IOREQr.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:iobm/IOREQr.D:1 +AUTO_TS_F2F:FROM:iobm/Er.Q:TO:iobm/Er2.D:1 +AUTO_TS_P2F:FROM:C8M:TO:iobm/Er2.D:1 +AUTO_TS_F2F:FROM:nRESout.Q:TO:iobm/RESrf.D:1 +AUTO_TS_P2F:FROM:nRES:TO:iobm/RESrf.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:iobm/RESrf.D:1 +AUTO_TS_F2F:FROM:nRESout.Q:TO:iobm/RESrr.D:1 +AUTO_TS_P2F:FROM:nRES:TO:iobm/RESrr.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:iobm/RESrr.D:1 +AUTO_TS_P2F:FROM:C16M:TO:C16M_IBUF/FCLK:1 +AUTO_TS_P2F:FROM:C16M:TO:C16M_IBUF/FCLK-:1 +AUTO_TS_P2F:FROM:FCLK:TO:FCLK_IBUF/FCLK:1 +AUTO_TS_P2F:FROM:nLDS_FSB:TO:iobs/IOL1.D:1 +AUTO_TS_P2F:FROM:nUDS_FSB:TO:iobs/IOU1.D:1 +AUTO_TS_P2F:FROM:E:TO:iobm/Er.D:1 +AUTO_TS_P2F:FROM:C8M:TO:C8M_IBUF/FCLK-:1 +AUTO_TS_P2F:FROM:E:TO:cnt/Er<0>.D:1 +AUTO_TS_P2F:FROM:nIPL2:TO:cnt/nIPL2r.D:1 +AUTO_TS_P2F:FROM:nDTACK_IOB:TO:iobm/DTACKrf.D:1 +AUTO_TS_P2F:FROM:nDTACK_IOB:TO:iobm/DTACKrr.D:1 +AUTO_TS_P2F:FROM:nVPA_IOB:TO:iobm/VPArf.D:1 +AUTO_TS_P2F:FROM:nVPA_IOB:TO:iobm/VPArr.D:1 +AUTO_TS_P2F:FROM:nAS_FSB:TO:fsb/ASrf.D:1 +AUTO_TS_P2F:FROM:FCLK:TO:FCLK_IBUF/FCLK-:1 +AUTO_TS_P2F:FROM:nBERR_IOB:TO:iobm/BERRrf.D:1 +AUTO_TS_P2F:FROM:nBERR_IOB:TO:iobm/BERRrr.D:1 diff --git a/cpld/XC95144XL/WarpSE.vm6 b/cpld/XC95144XL/WarpSE.vm6 index aedfc0a..a7258c5 100644 --- a/cpld/XC95144XL/WarpSE.vm6 +++ b/cpld/XC95144XL/WarpSE.vm6 @@ -8,830 +8,434 @@ NETWORK | WarpSE | 0 | 0 | 16391 INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_9_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<9> | 9502 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | A_FSB<9> | 9417 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_9_IBUF | 9297 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_9_IBUF | 9213 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_8_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<8> | 9503 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | A_FSB<8> | 9418 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_8_IBUF | 9298 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_8_IBUF | 9214 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_15_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<15> | 9504 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | A_FSB<15> | 9419 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_15_IBUF | 9299 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_15_IBUF | 9215 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_14_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<14> | 9505 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | A_FSB<14> | 9420 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_13_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<13> | 9506 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | A_FSB<13> | 9421 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_12_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<12> | 9507 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | A_FSB<12> | 9422 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_12_IBUF | 9302 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_12_IBUF | 9218 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_11_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<11> | 9508 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | A_FSB<11> | 9423 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_11_IBUF | 9303 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_11_IBUF | 9219 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_10_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<10> | 9509 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | A_FSB<10> | 9424 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_10_IBUF | 9304 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_10_IBUF | 9220 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_23_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<23> | 9510 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | A_FSB<23> | 9425 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_22_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<22> | 9511 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | A_FSB<22> | 9426 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_21_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<21> | 9512 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | A_FSB<21> | 9427 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_20_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<20> | 9513 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | A_FSB<20> | 9428 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_19_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<19> | 9514 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | A_FSB<19> | 9429 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_18_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<18> | 9515 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | A_FSB<18> | 9430 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_17_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<17> | 9516 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | A_FSB<17> | 9431 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_16_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<16> | 9517 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | A_FSB<16> | 9432 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX INPUT_INSTANCE | 0 | 0 | NULL | C16M_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 2 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | C16M | 9518 | PI | 454 | 0 | WarpSE_COPY_0_COPY_0 | CLK2X_IOB;CLK2X_IOB;CLK2X_IOB | NULL | NULL | 0 | 100 | NOTYPE +NODE | C16M | 9433 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 3 | 5 | II_FCLK -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 7 | 5 | II_FCLKINV -NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV +NODE | C16M_IBUF/FCLK- | 9230 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV -MACROCELL_INSTANCE | PrldLow+Tff+PinTrst+OptxMapped | iobm/nVMA | WarpSE_COPY_0_COPY_0 | 2155893760 | 11 | 3 +MACROCELL_INSTANCE | PrldLow+Tff+PinTrst+OptxMapped | nVMA_IOBout | WarpSE_COPY_0_COPY_0 | 2155893760 | 11 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/nVMA | 9316 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 1 | 0 | MC_UIM +NODE | nVMA_IOBout | 9232 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nVMA_IOBout.Q | nVMA_IOBout | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM +NODE | iobm/ES<0> | 9298 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +NODE | iobm/ES<1> | 9299 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<2> | 9387 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM +NODE | iobm/ES<2> | 9300 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<3> | 9388 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM +NODE | iobm/ES<3> | 9303 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<4> | 9389 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM +NODE | iobm/ES<4> | 9304 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOACT | 9404 | ? | 545 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOACT.Q | iobm/IOACT | 1 | 0 | MC_UIM +NODE | IOACT | 9310 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IOACT.Q | IOACT | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/VPArf | 9419 | ? | 545 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArf.Q | iobm/VPArf | 1 | 0 | MC_UIM +NODE | iobm/VPArf | 9326 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArf.Q | iobm/VPArf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/VPArr | 9420 | ? | 545 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArr.Q | iobm/VPArr | 1 | 0 | MC_UIM +NODE | iobm/VPArr | 9327 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArr.Q | iobm/VPArr | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/AoutOE | 9460 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +NODE | AoutOE | 9374 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | iobm/nVMA$Q | 9315 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 0 | 0 | MC_Q +NODE | nVMA_IOBout$Q | 9231 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nVMA_IOBout.Q | nVMA_IOBout | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/nVMA | 9316 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 1 | 0 | MC_UIM +NODE | nVMA_IOBout | 9232 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nVMA_IOBout.Q | nVMA_IOBout | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 2 | 0 | MC_OE -NODE | iobm/nVMA$OE | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.BUFOE.OUT | iobm/nVMA | 2 | 0 | MC_OE +NODE | nVMA_IOBout$OE | 9233 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nVMA_IOBout.BUFOE.OUT | nVMA_IOBout | 2 | 0 | MC_OE -SIGNAL_INSTANCE | iobm/nVMA.SI | iobm/nVMA | 0 | 10 | 3 +SIGNAL_INSTANCE | nVMA_IOBout.SI | nVMA_IOBout | 0 | 10 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/nVMA | 9316 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 1 | 0 | MC_UIM +NODE | nVMA_IOBout | 9232 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nVMA_IOBout.Q | nVMA_IOBout | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM +NODE | iobm/ES<0> | 9298 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +NODE | iobm/ES<1> | 9299 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<2> | 9387 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM +NODE | iobm/ES<2> | 9300 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<3> | 9388 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM +NODE | iobm/ES<3> | 9303 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<4> | 9389 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM +NODE | iobm/ES<4> | 9304 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOACT | 9404 | ? | 545 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOACT.Q | iobm/IOACT | 1 | 0 | MC_UIM +NODE | IOACT | 9310 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IOACT.Q | IOACT | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/VPArf | 9419 | ? | 545 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArf.Q | iobm/VPArf | 1 | 0 | MC_UIM +NODE | iobm/VPArf | 9326 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArf.Q | iobm/VPArf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/VPArr | 9420 | ? | 545 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArr.Q | iobm/VPArr | 1 | 0 | MC_UIM +NODE | iobm/VPArr | 9327 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArr.Q | iobm/VPArr | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/AoutOE | 9460 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +NODE | AoutOE | 9374 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/nVMA.D1 | 9538 | ? | 545 | 4096 | iobm/nVMA | NULL | NULL | iobm/nVMA.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nVMA_IOBout.D1 | 9453 | ? | 0 | 4096 | nVMA_IOBout | NULL | NULL | nVMA_IOBout.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/nVMA.D2 | 9539 | ? | 545 | 4096 | iobm/nVMA | NULL | NULL | iobm/nVMA.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 6 | IV_FALSE | iobm/nVMA | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4> -SPPTERM | 9 | IV_TRUE | iobm/nVMA | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4> | IV_TRUE | iobm/IOACT | IV_TRUE | iobm/VPArf | IV_TRUE | iobm/VPArr +SIGNAL | NODE | nVMA_IOBout.D2 | 9454 | ? | 0 | 4096 | nVMA_IOBout | NULL | NULL | nVMA_IOBout.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 6 | IV_FALSE | nVMA_IOBout | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4> +SPPTERM | 9 | IV_TRUE | nVMA_IOBout | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4> | IV_TRUE | IOACT | IV_TRUE | iobm/VPArf | IV_TRUE | iobm/VPArr OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST -SIGNAL | NODE | iobm/nVMA.TRST | 9541 | ? | 0 | 4096 | iobm/nVMA | NULL | NULL | iobm/nVMA.SI | 4 | 9 | MC_SI_TRST -SPPTERM | 1 | IV_FALSE | cnt/AoutOE +SIGNAL | NODE | nVMA_IOBout.TRST | 9456 | ? | 0 | 4096 | nVMA_IOBout | NULL | NULL | nVMA_IOBout.SI | 4 | 9 | MC_SI_TRST +SPPTERM | 1 | IV_FALSE | AoutOE -SRFF_INSTANCE | iobm/nVMA.REG | iobm/nVMA | 0 | 2 | 1 +SRFF_INSTANCE | nVMA_IOBout.REG | nVMA_IOBout | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/nVMA.D | 9537 | ? | 545 | 0 | iobm/nVMA | NULL | NULL | iobm/nVMA.XOR | 0 | 7 | ALU_F +NODE | nVMA_IOBout.D | 9452 | ? | 0 | 0 | nVMA_IOBout | NULL | NULL | nVMA_IOBout.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/nVMA.Q | 9542 | ? | 561 | 0 | iobm/nVMA | NULL | NULL | iobm/nVMA.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB +NODE | nVMA_IOBout.Q | 9457 | ? | 0 | 0 | nVMA_IOBout | NULL | NULL | nVMA_IOBout.REG | 0 | 8 | SRFF_Q -BUF_INSTANCE | iobm/nVMA.BUFOE | iobm/nVMA | 0 | 1 | 1 +BUF_INSTANCE | nVMA_IOBout.BUFOE | nVMA_IOBout | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN -SIGNAL | NODE | iobm/nVMA.TRST | 9541 | ? | 0 | 4096 | iobm/nVMA | NULL | NULL | iobm/nVMA.SI | 4 | 9 | MC_SI_TRST -SPPTERM | 1 | IV_FALSE | cnt/AoutOE +SIGNAL | NODE | nVMA_IOBout.TRST | 9456 | ? | 0 | 4096 | nVMA_IOBout | NULL | NULL | nVMA_IOBout.SI | 4 | 9 | MC_SI_TRST +SPPTERM | 1 | IV_FALSE | AoutOE OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT -NODE | iobm/nVMA.BUFOE.OUT | 9540 | ? | 0 | 0 | iobm/nVMA | NULL | NULL | iobm/nVMA.BUFOE | 0 | 10 | BUF_OUT +NODE | nVMA_IOBout.BUFOE.OUT | 9455 | ? | 0 | 0 | nVMA_IOBout | NULL | NULL | nVMA_IOBout.BUFOE | 0 | 10 | BUF_OUT -MACROCELL_INSTANCE | Inv+PrldLow+PinTrst+OptxMapped+Ce | iobm/nLDS | WarpSE_COPY_0_COPY_0 | 2424325376 | 7 | 2 +MACROCELL_INSTANCE | PrldLow+PinTrst+OptxMapped+Ce | nAS_IOBout | WarpSE_COPY_0_COPY_0 | 2424325120 | 5 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOL0 | 9352 | ? | 547 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOL0.Q | iobs/IOL0 | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd1 | 9293 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd2 | 9294 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd3 | 9292 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | AoutOE | 9374 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IORW0 | 9345 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/AoutOE | 9460 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV +NODE | C16M_IBUF/FCLK- | 9230 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | iobm/nLDS | 9318 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nLDS.Q | iobm/nLDS | 0 | 0 | MC_Q +NODE | nAS_IOBout | 9234 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAS_IOBout.Q | nAS_IOBout | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 2 | 0 | MC_OE -NODE | iobm/nLDS$OE | 9319 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nLDS.BUFOE.OUT | iobm/nLDS | 2 | 0 | MC_OE +NODE | nAS_IOBout$OE | 9235 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAS_IOBout.BUFOE.OUT | nAS_IOBout | 2 | 0 | MC_OE -SIGNAL_INSTANCE | iobm/nLDS.SI | iobm/nLDS | 0 | 6 | 3 +SIGNAL_INSTANCE | nAS_IOBout.SI | nAS_IOBout | 0 | 4 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOL0 | 9352 | ? | 547 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOL0.Q | iobs/IOL0 | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd1 | 9293 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd2 | 9294 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd3 | 9292 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IORW0 | 9345 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/AoutOE | 9460 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +NODE | AoutOE | 9374 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/nLDS.D1 | 9544 | ? | 547 | 4096 | iobm/nLDS | NULL | NULL | iobm/nLDS.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nAS_IOBout.D1 | 9459 | ? | 0 | 4096 | nAS_IOBout | NULL | NULL | nAS_IOBout.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/nLDS.D2 | 9545 | ? | 547 | 4096 | iobm/nLDS | NULL | NULL | iobm/nLDS.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | iobs/IOL0 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd2 -SPPTERM | 3 | IV_TRUE | iobs/IOL0 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 -SPPTERM | 4 | IV_FALSE | iobs/IORW0 | IV_TRUE | iobs/IOL0 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 -OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST -SIGNAL | NODE | iobm/nLDS.TRST | 9547 | ? | 0 | 4096 | iobm/nLDS | NULL | NULL | iobm/nLDS.SI | 4 | 9 | MC_SI_TRST -SPPTERM | 1 | IV_FALSE | cnt/AoutOE - -SRFF_INSTANCE | iobm/nLDS.REG | iobm/nLDS | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/nLDS.D | 9543 | ? | 547 | 0 | iobm/nLDS | NULL | NULL | iobm/nLDS.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/nLDS.Q | 9548 | ? | 0 | 0 | iobm/nLDS | NULL | NULL | iobm/nLDS.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -BUF_INSTANCE | iobm/nLDS.BUFOE | iobm/nLDS | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN -SIGNAL | NODE | iobm/nLDS.TRST | 9547 | ? | 0 | 4096 | iobm/nLDS | NULL | NULL | iobm/nLDS.SI | 4 | 9 | MC_SI_TRST -SPPTERM | 1 | IV_FALSE | cnt/AoutOE -OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT -NODE | iobm/nLDS.BUFOE.OUT | 9546 | ? | 0 | 0 | iobm/nLDS | NULL | NULL | iobm/nLDS.BUFOE | 0 | 10 | BUF_OUT - -MACROCELL_INSTANCE | Inv+PrldLow+PinTrst+OptxMapped+Ce | iobm/nUDS | WarpSE_COPY_0_COPY_0 | 2424325376 | 7 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOU0 | 9357 | ? | 549 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOU0.Q | iobs/IOU0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IORW0 | 9345 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/AoutOE | 9460 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | iobm/nUDS | 9320 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nUDS.Q | iobm/nUDS | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 2 | 0 | MC_OE -NODE | iobm/nUDS$OE | 9321 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nUDS.BUFOE.OUT | iobm/nUDS | 2 | 0 | MC_OE - -SIGNAL_INSTANCE | iobm/nUDS.SI | iobm/nUDS | 0 | 6 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOU0 | 9357 | ? | 549 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOU0.Q | iobs/IOU0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IORW0 | 9345 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/AoutOE | 9460 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/nUDS.D1 | 9550 | ? | 549 | 4096 | iobm/nUDS | NULL | NULL | iobm/nUDS.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/nUDS.D2 | 9551 | ? | 549 | 4096 | iobm/nUDS | NULL | NULL | iobm/nUDS.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | iobs/IOU0 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd2 -SPPTERM | 3 | IV_TRUE | iobs/IOU0 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 -SPPTERM | 4 | IV_FALSE | iobs/IORW0 | IV_TRUE | iobs/IOU0 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 -OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST -SIGNAL | NODE | iobm/nUDS.TRST | 9553 | ? | 0 | 4096 | iobm/nUDS | NULL | NULL | iobm/nUDS.SI | 4 | 9 | MC_SI_TRST -SPPTERM | 1 | IV_FALSE | cnt/AoutOE - -SRFF_INSTANCE | iobm/nUDS.REG | iobm/nUDS | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/nUDS.D | 9549 | ? | 549 | 0 | iobm/nUDS | NULL | NULL | iobm/nUDS.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/nUDS.Q | 9554 | ? | 0 | 0 | iobm/nUDS | NULL | NULL | iobm/nUDS.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -BUF_INSTANCE | iobm/nUDS.BUFOE | iobm/nUDS | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN -SIGNAL | NODE | iobm/nUDS.TRST | 9553 | ? | 0 | 4096 | iobm/nUDS | NULL | NULL | iobm/nUDS.SI | 4 | 9 | MC_SI_TRST -SPPTERM | 1 | IV_FALSE | cnt/AoutOE -OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT -NODE | iobm/nUDS.BUFOE.OUT | 9552 | ? | 0 | 0 | iobm/nUDS | NULL | NULL | iobm/nUDS.BUFOE | 0 | 10 | BUF_OUT - -MACROCELL_INSTANCE | PrldLow+PinTrst+OptxMapped+Ce | iobm/nASout | WarpSE_COPY_0_COPY_0 | 2424325120 | 5 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/AoutOE | 9460 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | iobm/nASout | 9322 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nASout.Q | iobm/nASout | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 2 | 0 | MC_OE -NODE | iobm/nASout$OE | 9323 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nASout.BUFOE.OUT | iobm/nASout | 2 | 0 | MC_OE - -SIGNAL_INSTANCE | iobm/nASout.SI | iobm/nASout | 0 | 4 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/AoutOE | 9460 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/nASout.D1 | 9556 | ? | 550 | 4096 | iobm/nASout | NULL | NULL | iobm/nASout.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/nASout.D2 | 9557 | ? | 550 | 4096 | iobm/nASout | NULL | NULL | iobm/nASout.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | nAS_IOBout.D2 | 9460 | ? | 0 | 4096 | nAS_IOBout | NULL | NULL | nAS_IOBout.SI | 2 | 9 | MC_SI_D2 SPPTERM | 2 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2 SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST -SIGNAL | NODE | iobm/nASout.TRST | 9559 | ? | 0 | 4096 | iobm/nASout | NULL | NULL | iobm/nASout.SI | 4 | 9 | MC_SI_TRST -SPPTERM | 1 | IV_FALSE | cnt/AoutOE +SIGNAL | NODE | nAS_IOBout.TRST | 9462 | ? | 0 | 4096 | nAS_IOBout | NULL | NULL | nAS_IOBout.SI | 4 | 9 | MC_SI_TRST +SPPTERM | 1 | IV_FALSE | AoutOE -SRFF_INSTANCE | iobm/nASout.REG | iobm/nASout | 0 | 2 | 1 +SRFF_INSTANCE | nAS_IOBout.REG | nAS_IOBout | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/nASout.D | 9555 | ? | 550 | 0 | iobm/nASout | NULL | NULL | iobm/nASout.XOR | 0 | 7 | ALU_F +NODE | nAS_IOBout.D | 9458 | ? | 0 | 0 | nAS_IOBout | NULL | NULL | nAS_IOBout.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV +NODE | C16M_IBUF/FCLK- | 9230 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/nASout.Q | 9560 | ? | 0 | 0 | iobm/nASout | NULL | NULL | iobm/nASout.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB +NODE | nAS_IOBout.Q | 9463 | ? | 0 | 0 | nAS_IOBout | NULL | NULL | nAS_IOBout.REG | 0 | 8 | SRFF_Q -BUF_INSTANCE | iobm/nASout.BUFOE | iobm/nASout | 0 | 1 | 1 +BUF_INSTANCE | nAS_IOBout.BUFOE | nAS_IOBout | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN -SIGNAL | NODE | iobm/nASout.TRST | 9559 | ? | 0 | 4096 | iobm/nASout | NULL | NULL | iobm/nASout.SI | 4 | 9 | MC_SI_TRST -SPPTERM | 1 | IV_FALSE | cnt/AoutOE +SIGNAL | NODE | nAS_IOBout.TRST | 9462 | ? | 0 | 4096 | nAS_IOBout | NULL | NULL | nAS_IOBout.SI | 4 | 9 | MC_SI_TRST +SPPTERM | 1 | IV_FALSE | AoutOE OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT -NODE | iobm/nASout.BUFOE.OUT | 9558 | ? | 0 | 0 | iobm/nASout | NULL | NULL | iobm/nASout.BUFOE | 0 | 10 | BUF_OUT +NODE | nAS_IOBout.BUFOE.OUT | 9461 | ? | 0 | 0 | nAS_IOBout | NULL | NULL | nAS_IOBout.BUFOE | 0 | 10 | BUF_OUT -INPUT_INSTANCE | 0 | 0 | NULL | nWE_FSB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | nWE_FSB | 9519 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +MACROCELL_INSTANCE | Inv+PrldLow+PinTrst+OptxMapped+Ce | nLDS_IOBout | WarpSE_COPY_0_COPY_0 | 2424325376 | 7 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | IOL0 | 9265 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IOL0.Q | IOL0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9292 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9294 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9293 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | IORW0 | 9261 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | AoutOE | 9374 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | C16M_IBUF/FCLK- | 9230 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | nLDS_IOBout | 9236 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nLDS_IOBout.Q | nLDS_IOBout | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 2 | 0 | MC_OE +NODE | nLDS_IOBout$OE | 9237 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nLDS_IOBout.BUFOE.OUT | nLDS_IOBout | 2 | 0 | MC_OE -INPUT_INSTANCE | 0 | 0 | NULL | C8M_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 2 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | C8M | 9520 | PI | 455 | 0 | WarpSE_COPY_0_COPY_0 | CLK_IOB;CLK_IOB;CLK_IOB | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 7 | 5 | II_FCLKINV -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV - -MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped+Ce | cnt/LTimer<0> | WarpSE_COPY_0_COPY_0 | 2424313088 | 4 | 1 +SIGNAL_INSTANCE | nLDS_IOBout.SI | nLDS_IOBout | 0 | 6 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +NODE | IOL0 | 9265 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IOL0.Q | IOL0 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd3 | 9292 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd2 | 9294 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | cnt/LTimer<0>.SI | cnt/LTimer<0> | 0 | 3 | 3 +NODE | iobm/IOS_FSM_FFd1 | 9293 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +NODE | IORW0 | 9261 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +NODE | AoutOE | 9374 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/LTimer<0>.D1 | 9562 | ? | 458 | 4096 | cnt/LTimer<0> | NULL | NULL | cnt/LTimer<0>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nLDS_IOBout.D1 | 9465 | ? | 0 | 4096 | nLDS_IOBout | NULL | NULL | nLDS_IOBout.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/LTimer<0>.D2 | 9563 | ? | 458 | 4096 | cnt/LTimer<0> | NULL | NULL | cnt/LTimer<0>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_FALSE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/TimerTC -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | cnt/LTimer<0>.CE | 9564 | ? | 460 | 4096 | cnt/LTimer<0> | NULL | NULL | cnt/LTimer<0>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC +SIGNAL | NODE | nLDS_IOBout.D2 | 9466 | ? | 0 | 4096 | nLDS_IOBout | NULL | NULL | nLDS_IOBout.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 3 | IV_TRUE | IOL0 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd2 +SPPTERM | 3 | IV_TRUE | IOL0 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 +SPPTERM | 4 | IV_TRUE | IORW0 | IV_TRUE | IOL0 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 +OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST +SIGNAL | NODE | nLDS_IOBout.TRST | 9468 | ? | 0 | 4096 | nLDS_IOBout | NULL | NULL | nLDS_IOBout.SI | 4 | 9 | MC_SI_TRST +SPPTERM | 1 | IV_FALSE | AoutOE -SRFF_INSTANCE | cnt/LTimer<0>.REG | cnt/LTimer<0> | 0 | 3 | 1 +SRFF_INSTANCE | nLDS_IOBout.REG | nLDS_IOBout | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/LTimer<0>.D | 9561 | ? | 458 | 0 | cnt/LTimer<0> | NULL | NULL | cnt/LTimer<0>.XOR | 0 | 7 | ALU_F +NODE | nLDS_IOBout.D | 9464 | ? | 0 | 0 | nLDS_IOBout | NULL | NULL | nLDS_IOBout.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | cnt/LTimer<0>.CE | 9564 | ? | 460 | 4096 | cnt/LTimer<0> | NULL | NULL | cnt/LTimer<0>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC +NODE | C16M_IBUF/FCLK- | 9230 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/LTimer<0>.Q | 9565 | ? | 485 | 0 | cnt/LTimer<0> | NULL | NULL | cnt/LTimer<0>.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB +NODE | nLDS_IOBout.Q | 9469 | ? | 0 | 0 | nLDS_IOBout | NULL | NULL | nLDS_IOBout.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/LTimer<13> | WarpSE_COPY_0_COPY_0 | 2424312832 | 16 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<9> | 9339 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<10> | 9341 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<11> | 9342 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<11>.Q | cnt/LTimer<11> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<8> | 9343 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<12> | 9344 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<12>.Q | cnt/LTimer<12> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM +BUF_INSTANCE | nLDS_IOBout.BUFOE | nLDS_IOBout | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN +SIGNAL | NODE | nLDS_IOBout.TRST | 9468 | ? | 0 | 4096 | nLDS_IOBout | NULL | NULL | nLDS_IOBout.SI | 4 | 9 | MC_SI_TRST +SPPTERM | 1 | IV_FALSE | AoutOE +OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT +NODE | nLDS_IOBout.BUFOE.OUT | 9467 | ? | 0 | 0 | nLDS_IOBout | NULL | NULL | nLDS_IOBout.BUFOE | 0 | 10 | BUF_OUT -SIGNAL_INSTANCE | cnt/LTimer<13>.SI | cnt/LTimer<13> | 0 | 15 | 3 +MACROCELL_INSTANCE | Inv+PrldLow+PinTrst+OptxMapped+Ce | nUDS_IOBout | WarpSE_COPY_0_COPY_0 | 2424325376 | 7 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +NODE | IOU0 | 9266 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IOU0.Q | IOU0 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd3 | 9292 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd2 | 9294 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd1 | 9293 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM +NODE | IORW0 | 9261 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM +NODE | AoutOE | 9374 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM +NODE | C16M_IBUF/FCLK- | 9230 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | nUDS_IOBout | 9238 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nUDS_IOBout.Q | nUDS_IOBout | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 2 | 0 | MC_OE +NODE | nUDS_IOBout$OE | 9239 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nUDS_IOBout.BUFOE.OUT | nUDS_IOBout | 2 | 0 | MC_OE + +SIGNAL_INSTANCE | nUDS_IOBout.SI | nUDS_IOBout | 0 | 6 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM +NODE | IOU0 | 9266 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IOU0.Q | IOU0 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<9> | 9339 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd3 | 9292 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<10> | 9341 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd2 | 9294 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<11> | 9342 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<11>.Q | cnt/LTimer<11> | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd1 | 9293 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<8> | 9343 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM +NODE | IORW0 | 9261 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<12> | 9344 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<12>.Q | cnt/LTimer<12> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +NODE | AoutOE | 9374 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/LTimer<13>.D1 | 9567 | ? | 461 | 4096 | cnt/LTimer<13> | NULL | NULL | cnt/LTimer<13>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nUDS_IOBout.D1 | 9471 | ? | 0 | 4096 | nUDS_IOBout | NULL | NULL | nUDS_IOBout.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/LTimer<13>.D2 | 9568 | ? | 461 | 4096 | cnt/LTimer<13> | NULL | NULL | cnt/LTimer<13>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/TimerTC -SPPTERM | 13 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7> | IV_TRUE | cnt/LTimer<9> | IV_TRUE | cnt/LTimer<10> | IV_TRUE | cnt/LTimer<11> | IV_TRUE | cnt/LTimer<8> | IV_TRUE | cnt/LTimer<12> -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | cnt/LTimer<13>.CE | 9569 | ? | 462 | 4096 | cnt/LTimer<13> | NULL | NULL | cnt/LTimer<13>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC +SIGNAL | NODE | nUDS_IOBout.D2 | 9472 | ? | 0 | 4096 | nUDS_IOBout | NULL | NULL | nUDS_IOBout.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 3 | IV_TRUE | IOU0 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd2 +SPPTERM | 3 | IV_TRUE | IOU0 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 +SPPTERM | 4 | IV_TRUE | IORW0 | IV_TRUE | IOU0 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 +OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST +SIGNAL | NODE | nUDS_IOBout.TRST | 9474 | ? | 0 | 4096 | nUDS_IOBout | NULL | NULL | nUDS_IOBout.SI | 4 | 9 | MC_SI_TRST +SPPTERM | 1 | IV_FALSE | AoutOE -SRFF_INSTANCE | cnt/LTimer<13>.REG | cnt/LTimer<13> | 0 | 3 | 1 +SRFF_INSTANCE | nUDS_IOBout.REG | nUDS_IOBout | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/LTimer<13>.D | 9566 | ? | 461 | 0 | cnt/LTimer<13> | NULL | NULL | cnt/LTimer<13>.XOR | 0 | 7 | ALU_F +NODE | nUDS_IOBout.D | 9470 | ? | 0 | 0 | nUDS_IOBout | NULL | NULL | nUDS_IOBout.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | cnt/LTimer<13>.CE | 9569 | ? | 462 | 4096 | cnt/LTimer<13> | NULL | NULL | cnt/LTimer<13>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC +NODE | C16M_IBUF/FCLK- | 9230 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/LTimer<13>.Q | 9570 | ? | 495 | 0 | cnt/LTimer<13> | NULL | NULL | cnt/LTimer<13>.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB +NODE | nUDS_IOBout.Q | 9475 | ? | 0 | 0 | nUDS_IOBout | NULL | NULL | nUDS_IOBout.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped+Ce | cnt/LTimer<1> | WarpSE_COPY_0_COPY_0 | 2424308992 | 13 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nBERR_IOB_IBUF | 9361 | ? | 565 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOBERR | 9396 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrf | 9416 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrr | 9417 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | cnt/LTimer<1>.EXP | 10095 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.EXP | cnt/LTimer<1> | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | cnt/LTimer<1>.SI | cnt/LTimer<1> | 0 | 12 | 4 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nBERR_IOB_IBUF | 9361 | ? | 565 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOBERR | 9396 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrf | 9416 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrr | 9417 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/LTimer<1>.D1 | 9572 | ? | 463 | 4096 | cnt/LTimer<1> | NULL | NULL | cnt/LTimer<1>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/LTimer<1>.D2 | 9573 | ? | 463 | 4096 | cnt/LTimer<1> | NULL | NULL | cnt/LTimer<1>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> -SPPTERM | 2 | IV_FALSE | cnt/LTimer<0> | IV_FALSE | cnt/LTimer<1> -SPPTERM | 2 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/TimerTC -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | cnt/LTimer<1>.EXP | 10093 | ? | 559 | 0 | cnt/LTimer<1> | NULL | NULL | cnt/LTimer<1>.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 8 | IV_TRUE | C8M_IBUF | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOBERR | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | cnt/LTimer<1>.CE | 9574 | ? | 464 | 4096 | cnt/LTimer<1> | NULL | NULL | cnt/LTimer<1>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC - -SRFF_INSTANCE | cnt/LTimer<1>.REG | cnt/LTimer<1> | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/LTimer<1>.D | 9571 | ? | 463 | 0 | cnt/LTimer<1> | NULL | NULL | cnt/LTimer<1>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | cnt/LTimer<1>.CE | 9574 | ? | 464 | 4096 | cnt/LTimer<1> | NULL | NULL | cnt/LTimer<1>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/LTimer<1>.Q | 9575 | ? | 485 | 0 | cnt/LTimer<1> | NULL | NULL | cnt/LTimer<1>.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/LTimer<2> | WarpSE_COPY_0_COPY_0 | 2424312832 | 6 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | cnt/LTimer<2>.SI | cnt/LTimer<2> | 0 | 5 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/LTimer<2>.D1 | 9577 | ? | 465 | 4096 | cnt/LTimer<2> | NULL | NULL | cnt/LTimer<2>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/LTimer<2>.D2 | 9578 | ? | 465 | 4096 | cnt/LTimer<2> | NULL | NULL | cnt/LTimer<2>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | cnt/LTimer<0> | IV_FALSE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<1> -SPPTERM | 3 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_FALSE | cnt/TimerTC -SPPTERM | 3 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/TimerTC -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | cnt/LTimer<2>.CE | 9579 | ? | 466 | 4096 | cnt/LTimer<2> | NULL | NULL | cnt/LTimer<2>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC - -SRFF_INSTANCE | cnt/LTimer<2>.REG | cnt/LTimer<2> | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/LTimer<2>.D | 9576 | ? | 465 | 0 | cnt/LTimer<2> | NULL | NULL | cnt/LTimer<2>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | cnt/LTimer<2>.CE | 9579 | ? | 466 | 4096 | cnt/LTimer<2> | NULL | NULL | cnt/LTimer<2>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/LTimer<2>.Q | 9580 | ? | 485 | 0 | cnt/LTimer<2> | NULL | NULL | cnt/LTimer<2>.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/LTimer<3> | WarpSE_COPY_0_COPY_0 | 2424312832 | 7 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | cnt/LTimer<3>.SI | cnt/LTimer<3> | 0 | 6 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/LTimer<3>.D1 | 9582 | ? | 467 | 4096 | cnt/LTimer<3> | NULL | NULL | cnt/LTimer<3>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/LTimer<3>.D2 | 9583 | ? | 467 | 4096 | cnt/LTimer<3> | NULL | NULL | cnt/LTimer<3>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/TimerTC -SPPTERM | 4 | IV_TRUE | cnt/LTimer<0> | IV_FALSE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> -SPPTERM | 4 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_FALSE | cnt/TimerTC -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | cnt/LTimer<3>.CE | 9584 | ? | 468 | 4096 | cnt/LTimer<3> | NULL | NULL | cnt/LTimer<3>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC - -SRFF_INSTANCE | cnt/LTimer<3>.REG | cnt/LTimer<3> | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/LTimer<3>.D | 9581 | ? | 467 | 0 | cnt/LTimer<3> | NULL | NULL | cnt/LTimer<3>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | cnt/LTimer<3>.CE | 9584 | ? | 468 | 4096 | cnt/LTimer<3> | NULL | NULL | cnt/LTimer<3>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/LTimer<3>.Q | 9585 | ? | 485 | 0 | cnt/LTimer<3> | NULL | NULL | cnt/LTimer<3>.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/LTimer<5> | WarpSE_COPY_0_COPY_0 | 2424312832 | 9 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | cnt/LTimer<5>.SI | cnt/LTimer<5> | 0 | 8 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/LTimer<5>.D1 | 9587 | ? | 469 | 4096 | cnt/LTimer<5> | NULL | NULL | cnt/LTimer<5>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/LTimer<5>.D2 | 9588 | ? | 469 | 4096 | cnt/LTimer<5> | NULL | NULL | cnt/LTimer<5>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/TimerTC -SPPTERM | 6 | IV_TRUE | cnt/LTimer<0> | IV_FALSE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<4> -SPPTERM | 6 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<4> | IV_FALSE | cnt/TimerTC -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | cnt/LTimer<5>.CE | 9589 | ? | 470 | 4096 | cnt/LTimer<5> | NULL | NULL | cnt/LTimer<5>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC - -SRFF_INSTANCE | cnt/LTimer<5>.REG | cnt/LTimer<5> | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/LTimer<5>.D | 9586 | ? | 469 | 0 | cnt/LTimer<5> | NULL | NULL | cnt/LTimer<5>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | cnt/LTimer<5>.CE | 9589 | ? | 470 | 4096 | cnt/LTimer<5> | NULL | NULL | cnt/LTimer<5>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/LTimer<5>.Q | 9590 | ? | 485 | 0 | cnt/LTimer<5> | NULL | NULL | cnt/LTimer<5>.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB +BUF_INSTANCE | nUDS_IOBout.BUFOE | nUDS_IOBout | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN +SIGNAL | NODE | nUDS_IOBout.TRST | 9474 | ? | 0 | 4096 | nUDS_IOBout | NULL | NULL | nUDS_IOBout.SI | 4 | 9 | MC_SI_TRST +SPPTERM | 1 | IV_FALSE | AoutOE +OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT +NODE | nUDS_IOBout.BUFOE.OUT | 9473 | ? | 0 | 0 | nUDS_IOBout | NULL | NULL | nUDS_IOBout.BUFOE | 0 | 10 | BUF_OUT INPUT_INSTANCE | 0 | 0 | NULL | FCLK_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 2 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | FCLK | 9521 | PI | 456 | 0 | WarpSE_COPY_0_COPY_0 | CLK_FSB;CLK_FSB;CLK_FSB | NULL | NULL | 0 | 100 | NOTYPE +NODE | FCLK | 9434 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 3 | 5 | II_FCLK -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 7 | 5 | II_FCLKINV -NODE | FCLK_IBUF/FCLK- | 9334 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 7 | 5 | II_FCLKINV +NODE | FCLK_IBUF/FCLK- | 9241 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 7 | 5 | II_FCLKINV INPUT_INSTANCE | 0 | 0 | NULL | nAS_FSB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | nAS_FSB | 9524 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | nAS_FSB | 9440 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX + +INPUT_INSTANCE | 0 | 0 | NULL | nWE_FSB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | nWE_FSB | 9436 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobs/Once | WarpSE_COPY_0_COPY_0 | 2155877376 | 12 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF$BUF0.EXP | 10137 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.EXP | A_FSB_19_IBUF$BUF0 | 4 | 0 | MC_EXPORT +NODE | iobs/IOReady.EXP | 10007 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.EXP | iobs/IOReady | 4 | 0 | MC_EXPORT INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP29_.EXP | 10149 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP29_.EXP | EXP29_ | 4 | 0 | MC_EXPORT +NODE | EXP21_.EXP | 10008 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP21_.EXP | EXP21_ | 4 | 0 | MC_EXPORT INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM SIGNAL_INSTANCE | iobs/Once.SI | iobs/Once | 0 | 11 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF$BUF0.EXP | 10137 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.EXP | A_FSB_19_IBUF$BUF0 | 4 | 0 | MC_EXPORT +NODE | iobs/IOReady.EXP | 10007 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.EXP | iobs/IOReady | 4 | 0 | MC_EXPORT INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP29_.EXP | 10149 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP29_.EXP | EXP29_ | 4 | 0 | MC_EXPORT +NODE | EXP21_.EXP | 10008 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP21_.EXP | EXP21_ | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobs/Once.D1 | 9592 | ? | 499 | 4096 | iobs/Once | NULL | NULL | iobs/Once.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobs/Once.D1 | 9477 | ? | 0 | 4096 | iobs/Once | NULL | NULL | iobs/Once.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobs/Once.D2 | 9593 | ? | 499 | 4096 | iobs/Once | NULL | NULL | iobs/Once.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | A_FSB_19_IBUF$BUF0.EXP -SPPTERM | 1 | IV_TRUE | EXP29_.EXP +SIGNAL | NODE | iobs/Once.D2 | 9478 | ? | 0 | 4096 | iobs/Once | NULL | NULL | iobs/Once.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | iobs/IOReady.EXP +SPPTERM | 1 | IV_TRUE | EXP21_.EXP SPPTERM | 3 | IV_TRUE | iobs/Once | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf @@ -840,1102 +444,1912 @@ SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iob SRFF_INSTANCE | iobs/Once.REG | iobs/Once | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobs/Once.D | 9591 | ? | 499 | 0 | iobs/Once | NULL | NULL | iobs/Once.XOR | 0 | 7 | ALU_F +NODE | iobs/Once.D | 9476 | ? | 0 | 0 | iobs/Once | NULL | NULL | iobs/Once.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobs/Once.Q | 9594 | ? | 539 | 0 | iobs/Once | NULL | NULL | iobs/Once.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB +NODE | iobs/Once.Q | 9479 | ? | 0 | 0 | iobs/Once | NULL | NULL | iobs/Once.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/LTimer<4> | WarpSE_COPY_0_COPY_0 | 2424312832 | 8 | 1 +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | RefUrg | WarpSE_COPY_0_COPY_0 | 2155877376 | 8 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM +NODE | cnt/Timer<0> | 9245 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM +NODE | cnt/Timer<1> | 9246 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +NODE | cnt/Timer<2> | 9247 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +NODE | RefUrg | 9243 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RefUrg.Q | RefUrg | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM +NODE | RefUrg | 9243 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RefUrg.Q | RefUrg | 1 | 0 | MC_UIM -SIGNAL_INSTANCE | cnt/LTimer<4>.SI | cnt/LTimer<4> | 0 | 7 | 3 +SIGNAL_INSTANCE | RefUrg.SI | RefUrg | 0 | 7 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM +NODE | cnt/Timer<0> | 9245 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM +NODE | cnt/Timer<1> | 9246 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +NODE | cnt/Timer<2> | 9247 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +NODE | RefUrg | 9243 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RefUrg.Q | RefUrg | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/LTimer<4>.D1 | 9596 | ? | 471 | 4096 | cnt/LTimer<4> | NULL | NULL | cnt/LTimer<4>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | RefUrg.D1 | 9481 | ? | 0 | 4096 | RefUrg | NULL | NULL | RefUrg.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/LTimer<4>.D2 | 9597 | ? | 471 | 4096 | cnt/LTimer<4> | NULL | NULL | cnt/LTimer<4>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/TimerTC -SPPTERM | 5 | IV_TRUE | cnt/LTimer<0> | IV_FALSE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> -SPPTERM | 5 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_FALSE | cnt/TimerTC +SIGNAL | NODE | RefUrg.D2 | 9482 | ? | 0 | 4096 | RefUrg | NULL | NULL | RefUrg.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_TRUE | RefUrg | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> +SPPTERM | 4 | IV_TRUE | cnt/Timer<0> | IV_TRUE | cnt/Timer<1> | IV_TRUE | cnt/Timer<2> | IV_FALSE | cnt/TimerTC +SPPTERM | 4 | IV_TRUE | cnt/Timer<0> | IV_TRUE | cnt/Timer<1> | IV_TRUE | cnt/Timer<2> | IV_TRUE | cnt/Er<0> +SPPTERM | 4 | IV_TRUE | cnt/Timer<0> | IV_TRUE | cnt/Timer<1> | IV_TRUE | cnt/Timer<2> | IV_FALSE | cnt/Er<1> OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | cnt/LTimer<4>.CE | 9598 | ? | 472 | 4096 | cnt/LTimer<4> | NULL | NULL | cnt/LTimer<4>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC +SIGNAL | NODE | RefUrg.CE | 9483 | ? | 0 | 4096 | RefUrg | NULL | NULL | RefUrg.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> -SRFF_INSTANCE | cnt/LTimer<4>.REG | cnt/LTimer<4> | 0 | 3 | 1 +SRFF_INSTANCE | RefUrg.REG | RefUrg | 0 | 3 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/LTimer<4>.D | 9595 | ? | 471 | 0 | cnt/LTimer<4> | NULL | NULL | cnt/LTimer<4>.XOR | 0 | 7 | ALU_F +NODE | RefUrg.D | 9480 | ? | 0 | 0 | RefUrg | NULL | NULL | RefUrg.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | cnt/LTimer<4>.CE | 9598 | ? | 472 | 4096 | cnt/LTimer<4> | NULL | NULL | cnt/LTimer<4>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC +SIGNAL | NODE | RefUrg.CE | 9483 | ? | 0 | 4096 | RefUrg | NULL | NULL | RefUrg.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/LTimer<4>.Q | 9599 | ? | 485 | 0 | cnt/LTimer<4> | NULL | NULL | cnt/LTimer<4>.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB +NODE | RefUrg.Q | 9484 | ? | 0 | 0 | RefUrg | NULL | NULL | RefUrg.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/LTimer<6> | WarpSE_COPY_0_COPY_0 | 2424312832 | 10 | 1 +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/LTimer<0> | WarpSE_COPY_0_COPY_0 | 2155877376 | 12 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM +NODE | ram/RefUrg | 9297 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrg.Q | ram/RefUrg | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM +NODE | ram/BACTr | 9314 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RefReq | 9315 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | cnt/LTimer<6>.SI | cnt/LTimer<6> | 0 | 9 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/LTimer<6>.D1 | 9601 | ? | 473 | 4096 | cnt/LTimer<6> | NULL | NULL | cnt/LTimer<6>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/LTimer<6>.D2 | 9602 | ? | 473 | 4096 | cnt/LTimer<6> | NULL | NULL | cnt/LTimer<6>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/TimerTC -SPPTERM | 7 | IV_TRUE | cnt/LTimer<0> | IV_FALSE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> -SPPTERM | 7 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_FALSE | cnt/TimerTC -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | cnt/LTimer<6>.CE | 9603 | ? | 474 | 4096 | cnt/LTimer<6> | NULL | NULL | cnt/LTimer<6>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC - -SRFF_INSTANCE | cnt/LTimer<6>.REG | cnt/LTimer<6> | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/LTimer<6>.D | 9600 | ? | 473 | 0 | cnt/LTimer<6> | NULL | NULL | cnt/LTimer<6>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | cnt/LTimer<6>.CE | 9603 | ? | 474 | 4096 | cnt/LTimer<6> | NULL | NULL | cnt/LTimer<6>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/LTimer<6>.Q | 9604 | ? | 485 | 0 | cnt/LTimer<6> | NULL | NULL | cnt/LTimer<6>.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/LTimer<7> | WarpSE_COPY_0_COPY_0 | 2424312832 | 16 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_9_IBUF | 9297 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<0> | 9244 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | cnt/LTimer<7>.EXP | 10122 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.EXP | cnt/LTimer<7> | 4 | 0 | MC_EXPORT +NODE | cnt/LTimer<0>.EXP | 10034 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.EXP | cnt/LTimer<0> | 4 | 0 | MC_EXPORT -SIGNAL_INSTANCE | cnt/LTimer<7>.SI | cnt/LTimer<7> | 0 | 15 | 4 +SIGNAL_INSTANCE | cnt/LTimer<0>.SI | cnt/LTimer<0> | 0 | 11 | 4 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM +NODE | ram/RefUrg | 9297 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrg.Q | ram/RefUrg | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM +NODE | ram/BACTr | 9314 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_9_IBUF | 9297 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +NODE | ram/RefReq | 9315 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/LTimer<7>.D1 | 9606 | ? | 475 | 4096 | cnt/LTimer<7> | NULL | NULL | cnt/LTimer<7>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/LTimer<0>.D1 | 9486 | ? | 0 | 4096 | cnt/LTimer<0> | NULL | NULL | cnt/LTimer<0>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/LTimer<7>.D2 | 9607 | ? | 475 | 4096 | cnt/LTimer<7> | NULL | NULL | cnt/LTimer<7>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<7> | IV_TRUE | cnt/TimerTC -SPPTERM | 8 | IV_TRUE | cnt/LTimer<0> | IV_FALSE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<6> -SPPTERM | 8 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<6> | IV_FALSE | cnt/TimerTC +SIGNAL | NODE | cnt/LTimer<0>.D2 | 9487 | ? | 0 | 4096 | cnt/LTimer<0> | NULL | NULL | cnt/LTimer<0>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 0 | IV_DC OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | cnt/LTimer<7>.EXP | 10120 | ? | 0 | 0 | cnt/LTimer<7> | NULL | NULL | cnt/LTimer<7>.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 5 | IV_TRUE | A_FSB_9_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_TRUE | ram/RASEL +SIGNAL | NODE | cnt/LTimer<0>.EXP | 10023 | ? | 0 | 0 | cnt/LTimer<0> | NULL | NULL | cnt/LTimer<0>.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefUrg | IV_TRUE | ram/BACTr +SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefUrg | IV_TRUE | ram/BACTr +SPPTERM | 5 | IV_FALSE | cs/nOverlay | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefUrg | IV_TRUE | ram/BACTr +SPPTERM | 5 | IV_FALSE | cs/nOverlay | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefUrg | IV_FALSE | ram/RefReq OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | cnt/LTimer<7>.CE | 9608 | ? | 476 | 4096 | cnt/LTimer<7> | NULL | NULL | cnt/LTimer<7>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC +SIGNAL | NODE | cnt/LTimer<0>.CE | 9488 | ? | 0 | 4096 | cnt/LTimer<0> | NULL | NULL | cnt/LTimer<0>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> -SRFF_INSTANCE | cnt/LTimer<7>.REG | cnt/LTimer<7> | 0 | 3 | 1 +SRFF_INSTANCE | cnt/LTimer<0>.REG | cnt/LTimer<0> | 0 | 3 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/LTimer<7>.D | 9605 | ? | 475 | 0 | cnt/LTimer<7> | NULL | NULL | cnt/LTimer<7>.XOR | 0 | 7 | ALU_F +NODE | cnt/LTimer<0>.D | 9485 | ? | 0 | 0 | cnt/LTimer<0> | NULL | NULL | cnt/LTimer<0>.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | cnt/LTimer<7>.CE | 9608 | ? | 476 | 4096 | cnt/LTimer<7> | NULL | NULL | cnt/LTimer<7>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC +SIGNAL | NODE | cnt/LTimer<0>.CE | 9488 | ? | 0 | 4096 | cnt/LTimer<0> | NULL | NULL | cnt/LTimer<0>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/LTimer<7>.Q | 9609 | ? | 485 | 0 | cnt/LTimer<7> | NULL | NULL | cnt/LTimer<7>.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB +NODE | cnt/LTimer<0>.Q | 9489 | ? | 0 | 0 | cnt/LTimer<0> | NULL | NULL | cnt/LTimer<0>.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/LTimer<9> | WarpSE_COPY_0_COPY_0 | 2424312832 | 13 | 1 +MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | cnt/Timer<0> | WarpSE_COPY_0_COPY_0 | 2155877632 | 7 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM +NODE | cnt/Timer<0> | 9245 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<9> | 9339 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +NODE | cnt/Timer<1> | 9246 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<8> | 9343 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV +NODE | cnt/Timer<2> | 9247 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/LTimer<9> | 9339 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM +NODE | cnt/Timer<0> | 9245 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | cnt/Timer<0>.EXP | 10026 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.EXP | cnt/Timer<0> | 4 | 0 | MC_EXPORT -SIGNAL_INSTANCE | cnt/LTimer<9>.SI | cnt/LTimer<9> | 0 | 12 | 3 +SIGNAL_INSTANCE | cnt/Timer<0>.SI | cnt/Timer<0> | 0 | 6 | 4 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM +NODE | cnt/Timer<0> | 9245 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<9> | 9339 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +NODE | cnt/Timer<1> | 9246 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<8> | 9343 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM +NODE | cnt/Timer<2> | 9247 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/LTimer<9>.D1 | 9611 | ? | 477 | 4096 | cnt/LTimer<9> | NULL | NULL | cnt/LTimer<9>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/Timer<0>.D1 | 9491 | ? | 0 | 4096 | cnt/Timer<0> | NULL | NULL | cnt/Timer<0>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/LTimer<9>.D2 | 9612 | ? | 477 | 4096 | cnt/LTimer<9> | NULL | NULL | cnt/LTimer<9>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<9> | IV_TRUE | cnt/TimerTC -SPPTERM | 10 | IV_TRUE | cnt/LTimer<0> | IV_FALSE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7> | IV_TRUE | cnt/LTimer<8> -SPPTERM | 10 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7> | IV_TRUE | cnt/LTimer<8> | IV_FALSE | cnt/TimerTC +SIGNAL | NODE | cnt/Timer<0>.D2 | 9492 | ? | 0 | 4096 | cnt/Timer<0> | NULL | NULL | cnt/Timer<0>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_FALSE | cnt/Timer<0> | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | cnt/Timer<0>.EXP | 10015 | ? | 0 | 0 | cnt/Timer<0> | NULL | NULL | cnt/Timer<0>.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 3 | IV_TRUE | cnt/Timer<0> | IV_TRUE | cnt/Timer<1> | IV_TRUE | cnt/Timer<2> OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | cnt/LTimer<9>.CE | 9613 | ? | 478 | 4096 | cnt/LTimer<9> | NULL | NULL | cnt/LTimer<9>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC +SIGNAL | NODE | cnt/Timer<0>.CE | 9493 | ? | 0 | 4096 | cnt/Timer<0> | NULL | NULL | cnt/Timer<0>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> -SRFF_INSTANCE | cnt/LTimer<9>.REG | cnt/LTimer<9> | 0 | 3 | 1 +SRFF_INSTANCE | cnt/Timer<0>.REG | cnt/Timer<0> | 0 | 3 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/LTimer<9>.D | 9610 | ? | 477 | 0 | cnt/LTimer<9> | NULL | NULL | cnt/LTimer<9>.XOR | 0 | 7 | ALU_F +NODE | cnt/Timer<0>.D | 9490 | ? | 0 | 0 | cnt/Timer<0> | NULL | NULL | cnt/Timer<0>.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | cnt/LTimer<9>.CE | 9613 | ? | 478 | 4096 | cnt/LTimer<9> | NULL | NULL | cnt/LTimer<9>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC +SIGNAL | NODE | cnt/Timer<0>.CE | 9493 | ? | 0 | 4096 | cnt/Timer<0> | NULL | NULL | cnt/Timer<0>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/LTimer<9>.Q | 9614 | ? | 485 | 0 | cnt/LTimer<9> | NULL | NULL | cnt/LTimer<9>.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB +NODE | cnt/Timer<0>.Q | 9494 | ? | 0 | 0 | cnt/Timer<0> | NULL | NULL | cnt/Timer<0>.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | PrldLow+OptxMapped | cs/nOverlay1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 4 | 1 +MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | cnt/Timer<1> | WarpSE_COPY_0_COPY_0 | 2155873536 | 14 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay0 | 9348 | ? | 505 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM +NODE | cnt/Timer<0> | 9245 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | cnt/Timer<1> | 9246 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9290 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RefUrg | 9297 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrg.Q | ram/RefUrg | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RefReq | 9315 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9314 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready0r.EXP | 10027 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.EXP | fsb/Ready0r | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +NODE | cnt/Timer<1> | 9246 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | cnt/Timer<1>.EXP | 10028 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.EXP | cnt/Timer<1> | 4 | 0 | MC_EXPORT -SIGNAL_INSTANCE | cs/nOverlay1.SI | cs/nOverlay1 | 0 | 3 | 3 +SIGNAL_INSTANCE | cnt/Timer<1>.SI | cnt/Timer<1> | 0 | 13 | 4 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay0 | 9348 | ? | 505 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM +NODE | cnt/Timer<0> | 9245 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | cnt/Timer<1> | 9246 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9290 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RefUrg | 9297 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrg.Q | ram/RefUrg | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RefReq | 9315 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9314 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready0r.EXP | 10027 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.EXP | fsb/Ready0r | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cs/nOverlay1.D1 | 9616 | ? | 501 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/Timer<1>.D1 | 9496 | ? | 0 | 4096 | cnt/Timer<1> | NULL | NULL | cnt/Timer<1>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cs/nOverlay1.D2 | 9617 | ? | 501 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | cs/nOverlay0 +SIGNAL | NODE | cnt/Timer<1>.D2 | 9497 | ? | 0 | 4096 | cnt/Timer<1> | NULL | NULL | cnt/Timer<1>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | fsb/Ready0r.EXP +SPPTERM | 2 | IV_TRUE | cnt/Timer<0> | IV_TRUE | cnt/Timer<1> +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | cnt/Timer<1>.EXP | 10017 | ? | 0 | 0 | cnt/Timer<1> | NULL | NULL | cnt/Timer<1>.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 6 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefUrg | IV_FALSE | ram/RefReq +SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefUrg | IV_TRUE | ram/BACTr +SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefUrg | IV_FALSE | ram/RefReq OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | cs/nOverlay1.CE | 9618 | ? | 502 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf +SIGNAL | NODE | cnt/Timer<1>.CE | 9498 | ? | 0 | 4096 | cnt/Timer<1> | NULL | NULL | cnt/Timer<1>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> -SRFF_INSTANCE | cs/nOverlay1.REG | cs/nOverlay1 | 0 | 3 | 1 +SRFF_INSTANCE | cnt/Timer<1>.REG | cnt/Timer<1> | 0 | 3 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cs/nOverlay1.D | 9615 | ? | 501 | 0 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.XOR | 0 | 7 | ALU_F +NODE | cnt/Timer<1>.D | 9495 | ? | 0 | 0 | cnt/Timer<1> | NULL | NULL | cnt/Timer<1>.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | cs/nOverlay1.CE | 9618 | ? | 502 | 4096 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf +SIGNAL | NODE | cnt/Timer<1>.CE | 9498 | ? | 0 | 4096 | cnt/Timer<1> | NULL | NULL | cnt/Timer<1>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cs/nOverlay1.Q | 9619 | ? | 540 | 0 | cs/nOverlay1 | NULL | NULL | cs/nOverlay1.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB +NODE | cnt/Timer<1>.Q | 9499 | ? | 0 | 0 | cnt/Timer<1> | NULL | NULL | cnt/Timer<1>.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/LTimer<10> | WarpSE_COPY_0_COPY_0 | 2424312832 | 14 | 1 +MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | cnt/Timer<2> | WarpSE_COPY_0_COPY_0 | 2155873536 | 9 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM +NODE | cnt/Timer<0> | 9245 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<10> | 9341 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM +NODE | cnt/Timer<2> | 9247 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +NODE | cnt/Timer<1> | 9246 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<9> | 9339 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<8> | 9343 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV +NODE | cnt/Timer<0>.EXP | 10026 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.EXP | cnt/Timer<0> | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/LTimer<10> | 9341 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM +NODE | cnt/Timer<2> | 9247 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | cnt/Timer<2>.EXP | 10025 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.EXP | cnt/Timer<2> | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | cnt/Timer<2>.SI | cnt/Timer<2> | 0 | 8 | 4 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Timer<0> | 9245 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Timer<2> | 9247 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Timer<1> | 9246 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Timer<0>.EXP | 10026 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.EXP | cnt/Timer<0> | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/Timer<2>.D1 | 9501 | ? | 0 | 4096 | cnt/Timer<2> | NULL | NULL | cnt/Timer<2>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cnt/Timer<2>.D2 | 9502 | ? | 0 | 4096 | cnt/Timer<2> | NULL | NULL | cnt/Timer<2>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | cnt/Timer<0>.EXP +SPPTERM | 2 | IV_FALSE | cnt/Timer<0> | IV_FALSE | cnt/Timer<2> +SPPTERM | 2 | IV_FALSE | cnt/Timer<1> | IV_FALSE | cnt/Timer<2> +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | cnt/Timer<2>.EXP | 10014 | ? | 0 | 0 | cnt/Timer<2> | NULL | NULL | cnt/Timer<2>.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 1 | IV_TRUE | A_FSB_19_IBUF +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | cnt/Timer<2>.CE | 9503 | ? | 0 | 4096 | cnt/Timer<2> | NULL | NULL | cnt/Timer<2>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> + +SRFF_INSTANCE | cnt/Timer<2>.REG | cnt/Timer<2> | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | cnt/Timer<2>.D | 9500 | ? | 0 | 0 | cnt/Timer<2> | NULL | NULL | cnt/Timer<2>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | cnt/Timer<2>.CE | 9503 | ? | 0 | 4096 | cnt/Timer<2> | NULL | NULL | cnt/Timer<2>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | cnt/Timer<2>.Q | 9504 | ? | 0 | 0 | cnt/Timer<2> | NULL | NULL | cnt/Timer<2>.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/LTimer<10> | WarpSE_COPY_0_COPY_0 | 2155877376 | 14 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<0> | 9244 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<1> | 9250 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<2> | 9251 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<3> | 9252 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<4> | 9253 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<5> | 9254 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<6> | 9255 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<7> | 9256 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<8> | 9257 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<9> | 9258 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cnt/LTimer<10> | 9248 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM SIGNAL_INSTANCE | cnt/LTimer<10>.SI | cnt/LTimer<10> | 0 | 13 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<0> | 9244 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<10> | 9341 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<1> | 9250 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +NODE | cnt/LTimer<2> | 9251 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<3> | 9252 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<4> | 9253 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<5> | 9254 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<6> | 9255 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<7> | 9256 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<8> | 9257 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<9> | 9258 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<9> | 9339 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<8> | 9343 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/LTimer<10>.D1 | 9621 | ? | 479 | 4096 | cnt/LTimer<10> | NULL | NULL | cnt/LTimer<10>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/LTimer<10>.D1 | 9506 | ? | 0 | 0 | cnt/LTimer<10> | NULL | NULL | cnt/LTimer<10>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/LTimer<10>.D2 | 9622 | ? | 479 | 4096 | cnt/LTimer<10> | NULL | NULL | cnt/LTimer<10>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<10> | IV_TRUE | cnt/TimerTC -SPPTERM | 11 | IV_TRUE | cnt/LTimer<0> | IV_FALSE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7> | IV_TRUE | cnt/LTimer<9> | IV_TRUE | cnt/LTimer<8> -SPPTERM | 11 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7> | IV_TRUE | cnt/LTimer<9> | IV_TRUE | cnt/LTimer<8> | IV_FALSE | cnt/TimerTC +SIGNAL | NODE | cnt/LTimer<10>.D2 | 9507 | ? | 0 | 4096 | cnt/LTimer<10> | NULL | NULL | cnt/LTimer<10>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 10 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7> | IV_TRUE | cnt/LTimer<8> | IV_TRUE | cnt/LTimer<9> OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | cnt/LTimer<10>.CE | 9623 | ? | 480 | 4096 | cnt/LTimer<10> | NULL | NULL | cnt/LTimer<10>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC +SIGNAL | NODE | cnt/LTimer<10>.CE | 9508 | ? | 0 | 4096 | cnt/LTimer<10> | NULL | NULL | cnt/LTimer<10>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> SRFF_INSTANCE | cnt/LTimer<10>.REG | cnt/LTimer<10> | 0 | 3 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/LTimer<10>.D | 9620 | ? | 479 | 0 | cnt/LTimer<10> | NULL | NULL | cnt/LTimer<10>.XOR | 0 | 7 | ALU_F +NODE | cnt/LTimer<10>.D | 9505 | ? | 0 | 0 | cnt/LTimer<10> | NULL | NULL | cnt/LTimer<10>.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | cnt/LTimer<10>.CE | 9623 | ? | 480 | 4096 | cnt/LTimer<10> | NULL | NULL | cnt/LTimer<10>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC +SIGNAL | NODE | cnt/LTimer<10>.CE | 9508 | ? | 0 | 4096 | cnt/LTimer<10> | NULL | NULL | cnt/LTimer<10>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/LTimer<10>.Q | 9624 | ? | 485 | 0 | cnt/LTimer<10> | NULL | NULL | cnt/LTimer<10>.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB +NODE | cnt/LTimer<10>.Q | 9509 | ? | 0 | 0 | cnt/LTimer<10> | NULL | NULL | cnt/LTimer<10>.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/LTimer<11> | WarpSE_COPY_0_COPY_0 | 2424312832 | 15 | 1 +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/LTimer<11> | WarpSE_COPY_0_COPY_0 | 2155877376 | 15 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<0> | 9244 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<11> | 9342 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<11>.Q | cnt/LTimer<11> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<10> | 9248 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +NODE | cnt/LTimer<1> | 9250 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<2> | 9251 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<3> | 9252 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<4> | 9253 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<5> | 9254 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<6> | 9255 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<7> | 9256 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<8> | 9257 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<9> | 9258 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<9> | 9339 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<10> | 9341 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<8> | 9343 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/LTimer<11> | 9342 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<11>.Q | cnt/LTimer<11> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<11> | 9249 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<11>.Q | cnt/LTimer<11> | 1 | 0 | MC_UIM SIGNAL_INSTANCE | cnt/LTimer<11>.SI | cnt/LTimer<11> | 0 | 14 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<0> | 9244 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<11> | 9342 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<11>.Q | cnt/LTimer<11> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<10> | 9248 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +NODE | cnt/LTimer<1> | 9250 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<2> | 9251 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<3> | 9252 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<4> | 9253 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<5> | 9254 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<6> | 9255 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<7> | 9256 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<8> | 9257 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<9> | 9258 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<9> | 9339 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<10> | 9341 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<8> | 9343 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/LTimer<11>.D1 | 9626 | ? | 481 | 4096 | cnt/LTimer<11> | NULL | NULL | cnt/LTimer<11>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/LTimer<11>.D1 | 9511 | ? | 0 | 0 | cnt/LTimer<11> | NULL | NULL | cnt/LTimer<11>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/LTimer<11>.D2 | 9627 | ? | 481 | 4096 | cnt/LTimer<11> | NULL | NULL | cnt/LTimer<11>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<11> | IV_TRUE | cnt/TimerTC -SPPTERM | 12 | IV_TRUE | cnt/LTimer<0> | IV_FALSE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7> | IV_TRUE | cnt/LTimer<9> | IV_TRUE | cnt/LTimer<10> | IV_TRUE | cnt/LTimer<8> -SPPTERM | 12 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7> | IV_TRUE | cnt/LTimer<9> | IV_TRUE | cnt/LTimer<10> | IV_TRUE | cnt/LTimer<8> | IV_FALSE | cnt/TimerTC +SIGNAL | NODE | cnt/LTimer<11>.D2 | 9512 | ? | 0 | 4096 | cnt/LTimer<11> | NULL | NULL | cnt/LTimer<11>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 11 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<10> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7> | IV_TRUE | cnt/LTimer<8> | IV_TRUE | cnt/LTimer<9> OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | cnt/LTimer<11>.CE | 9628 | ? | 482 | 4096 | cnt/LTimer<11> | NULL | NULL | cnt/LTimer<11>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC +SIGNAL | NODE | cnt/LTimer<11>.CE | 9513 | ? | 0 | 4096 | cnt/LTimer<11> | NULL | NULL | cnt/LTimer<11>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> SRFF_INSTANCE | cnt/LTimer<11>.REG | cnt/LTimer<11> | 0 | 3 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/LTimer<11>.D | 9625 | ? | 481 | 0 | cnt/LTimer<11> | NULL | NULL | cnt/LTimer<11>.XOR | 0 | 7 | ALU_F +NODE | cnt/LTimer<11>.D | 9510 | ? | 0 | 0 | cnt/LTimer<11> | NULL | NULL | cnt/LTimer<11>.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | cnt/LTimer<11>.CE | 9628 | ? | 482 | 4096 | cnt/LTimer<11> | NULL | NULL | cnt/LTimer<11>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC +SIGNAL | NODE | cnt/LTimer<11>.CE | 9513 | ? | 0 | 4096 | cnt/LTimer<11> | NULL | NULL | cnt/LTimer<11>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/LTimer<11>.Q | 9629 | ? | 485 | 0 | cnt/LTimer<11> | NULL | NULL | cnt/LTimer<11>.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB +NODE | cnt/LTimer<11>.Q | 9514 | ? | 0 | 0 | cnt/LTimer<11> | NULL | NULL | cnt/LTimer<11>.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/LTimer<8> | WarpSE_COPY_0_COPY_0 | 2424312832 | 12 | 1 +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/LTimer<1> | WarpSE_COPY_0_COPY_0 | 2155877376 | 5 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<0> | 9244 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<8> | 9343 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/LTimer<8> | 9343 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<1> | 9250 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | cnt/LTimer<1>.SI | cnt/LTimer<1> | 0 | 4 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<0> | 9244 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/LTimer<1>.D1 | 9516 | ? | 0 | 0 | cnt/LTimer<1> | NULL | NULL | cnt/LTimer<1>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cnt/LTimer<1>.D2 | 9517 | ? | 0 | 4096 | cnt/LTimer<1> | NULL | NULL | cnt/LTimer<1>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | cnt/LTimer<0> +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | cnt/LTimer<1>.CE | 9518 | ? | 0 | 4096 | cnt/LTimer<1> | NULL | NULL | cnt/LTimer<1>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> + +SRFF_INSTANCE | cnt/LTimer<1>.REG | cnt/LTimer<1> | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | cnt/LTimer<1>.D | 9515 | ? | 0 | 0 | cnt/LTimer<1> | NULL | NULL | cnt/LTimer<1>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | cnt/LTimer<1>.CE | 9518 | ? | 0 | 4096 | cnt/LTimer<1> | NULL | NULL | cnt/LTimer<1>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | cnt/LTimer<1>.Q | 9519 | ? | 0 | 0 | cnt/LTimer<1> | NULL | NULL | cnt/LTimer<1>.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/LTimer<2> | WarpSE_COPY_0_COPY_0 | 2155877376 | 6 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<0> | 9244 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<1> | 9250 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cnt/LTimer<2> | 9251 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | cnt/LTimer<2>.SI | cnt/LTimer<2> | 0 | 5 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<0> | 9244 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<1> | 9250 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/LTimer<2>.D1 | 9521 | ? | 0 | 0 | cnt/LTimer<2> | NULL | NULL | cnt/LTimer<2>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cnt/LTimer<2>.D2 | 9522 | ? | 0 | 4096 | cnt/LTimer<2> | NULL | NULL | cnt/LTimer<2>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | cnt/LTimer<2>.CE | 9523 | ? | 0 | 4096 | cnt/LTimer<2> | NULL | NULL | cnt/LTimer<2>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> + +SRFF_INSTANCE | cnt/LTimer<2>.REG | cnt/LTimer<2> | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | cnt/LTimer<2>.D | 9520 | ? | 0 | 0 | cnt/LTimer<2> | NULL | NULL | cnt/LTimer<2>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | cnt/LTimer<2>.CE | 9523 | ? | 0 | 4096 | cnt/LTimer<2> | NULL | NULL | cnt/LTimer<2>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | cnt/LTimer<2>.Q | 9524 | ? | 0 | 0 | cnt/LTimer<2> | NULL | NULL | cnt/LTimer<2>.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/LTimer<3> | WarpSE_COPY_0_COPY_0 | 2155877376 | 7 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<0> | 9244 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<1> | 9250 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<2> | 9251 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cnt/LTimer<3> | 9252 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | cnt/LTimer<3>.SI | cnt/LTimer<3> | 0 | 6 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<0> | 9244 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<1> | 9250 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<2> | 9251 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/LTimer<3>.D1 | 9526 | ? | 0 | 0 | cnt/LTimer<3> | NULL | NULL | cnt/LTimer<3>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cnt/LTimer<3>.D2 | 9527 | ? | 0 | 4096 | cnt/LTimer<3> | NULL | NULL | cnt/LTimer<3>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 3 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | cnt/LTimer<3>.CE | 9528 | ? | 0 | 4096 | cnt/LTimer<3> | NULL | NULL | cnt/LTimer<3>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> + +SRFF_INSTANCE | cnt/LTimer<3>.REG | cnt/LTimer<3> | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | cnt/LTimer<3>.D | 9525 | ? | 0 | 0 | cnt/LTimer<3> | NULL | NULL | cnt/LTimer<3>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | cnt/LTimer<3>.CE | 9528 | ? | 0 | 4096 | cnt/LTimer<3> | NULL | NULL | cnt/LTimer<3>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | cnt/LTimer<3>.Q | 9529 | ? | 0 | 0 | cnt/LTimer<3> | NULL | NULL | cnt/LTimer<3>.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/LTimer<4> | WarpSE_COPY_0_COPY_0 | 2155877376 | 8 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<0> | 9244 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<1> | 9250 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<2> | 9251 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<3> | 9252 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cnt/LTimer<4> | 9253 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | cnt/LTimer<4>.SI | cnt/LTimer<4> | 0 | 7 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<0> | 9244 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<1> | 9250 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<2> | 9251 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<3> | 9252 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/LTimer<4>.D1 | 9531 | ? | 0 | 0 | cnt/LTimer<4> | NULL | NULL | cnt/LTimer<4>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cnt/LTimer<4>.D2 | 9532 | ? | 0 | 4096 | cnt/LTimer<4> | NULL | NULL | cnt/LTimer<4>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | cnt/LTimer<4>.CE | 9533 | ? | 0 | 4096 | cnt/LTimer<4> | NULL | NULL | cnt/LTimer<4>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> + +SRFF_INSTANCE | cnt/LTimer<4>.REG | cnt/LTimer<4> | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | cnt/LTimer<4>.D | 9530 | ? | 0 | 0 | cnt/LTimer<4> | NULL | NULL | cnt/LTimer<4>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | cnt/LTimer<4>.CE | 9533 | ? | 0 | 4096 | cnt/LTimer<4> | NULL | NULL | cnt/LTimer<4>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | cnt/LTimer<4>.Q | 9534 | ? | 0 | 0 | cnt/LTimer<4> | NULL | NULL | cnt/LTimer<4>.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/LTimer<5> | WarpSE_COPY_0_COPY_0 | 2155877376 | 9 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<0> | 9244 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<1> | 9250 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<2> | 9251 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<3> | 9252 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<4> | 9253 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cnt/LTimer<5> | 9254 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | cnt/LTimer<5>.SI | cnt/LTimer<5> | 0 | 8 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<0> | 9244 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<1> | 9250 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<2> | 9251 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<3> | 9252 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<4> | 9253 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/LTimer<5>.D1 | 9536 | ? | 0 | 0 | cnt/LTimer<5> | NULL | NULL | cnt/LTimer<5>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cnt/LTimer<5>.D2 | 9537 | ? | 0 | 4096 | cnt/LTimer<5> | NULL | NULL | cnt/LTimer<5>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 5 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<4> +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | cnt/LTimer<5>.CE | 9538 | ? | 0 | 4096 | cnt/LTimer<5> | NULL | NULL | cnt/LTimer<5>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> + +SRFF_INSTANCE | cnt/LTimer<5>.REG | cnt/LTimer<5> | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | cnt/LTimer<5>.D | 9535 | ? | 0 | 0 | cnt/LTimer<5> | NULL | NULL | cnt/LTimer<5>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | cnt/LTimer<5>.CE | 9538 | ? | 0 | 4096 | cnt/LTimer<5> | NULL | NULL | cnt/LTimer<5>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | cnt/LTimer<5>.Q | 9539 | ? | 0 | 0 | cnt/LTimer<5> | NULL | NULL | cnt/LTimer<5>.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/LTimer<6> | WarpSE_COPY_0_COPY_0 | 2155877376 | 10 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<0> | 9244 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<1> | 9250 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<2> | 9251 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<3> | 9252 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<4> | 9253 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<5> | 9254 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cnt/LTimer<6> | 9255 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | cnt/LTimer<6>.SI | cnt/LTimer<6> | 0 | 9 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<0> | 9244 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<1> | 9250 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<2> | 9251 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<3> | 9252 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<4> | 9253 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<5> | 9254 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/LTimer<6>.D1 | 9541 | ? | 0 | 0 | cnt/LTimer<6> | NULL | NULL | cnt/LTimer<6>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cnt/LTimer<6>.D2 | 9542 | ? | 0 | 4096 | cnt/LTimer<6> | NULL | NULL | cnt/LTimer<6>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 6 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<5> +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | cnt/LTimer<6>.CE | 9543 | ? | 0 | 4096 | cnt/LTimer<6> | NULL | NULL | cnt/LTimer<6>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> + +SRFF_INSTANCE | cnt/LTimer<6>.REG | cnt/LTimer<6> | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | cnt/LTimer<6>.D | 9540 | ? | 0 | 0 | cnt/LTimer<6> | NULL | NULL | cnt/LTimer<6>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | cnt/LTimer<6>.CE | 9543 | ? | 0 | 4096 | cnt/LTimer<6> | NULL | NULL | cnt/LTimer<6>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | cnt/LTimer<6>.Q | 9544 | ? | 0 | 0 | cnt/LTimer<6> | NULL | NULL | cnt/LTimer<6>.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/LTimer<7> | WarpSE_COPY_0_COPY_0 | 2155877376 | 11 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<0> | 9244 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<1> | 9250 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<2> | 9251 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<3> | 9252 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<4> | 9253 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<5> | 9254 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<6> | 9255 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cnt/LTimer<7> | 9256 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | cnt/LTimer<7>.SI | cnt/LTimer<7> | 0 | 10 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<0> | 9244 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<1> | 9250 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<2> | 9251 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<3> | 9252 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<4> | 9253 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<5> | 9254 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<6> | 9255 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/LTimer<7>.D1 | 9546 | ? | 0 | 0 | cnt/LTimer<7> | NULL | NULL | cnt/LTimer<7>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cnt/LTimer<7>.D2 | 9547 | ? | 0 | 4096 | cnt/LTimer<7> | NULL | NULL | cnt/LTimer<7>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 7 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<6> +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | cnt/LTimer<7>.CE | 9548 | ? | 0 | 4096 | cnt/LTimer<7> | NULL | NULL | cnt/LTimer<7>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> + +SRFF_INSTANCE | cnt/LTimer<7>.REG | cnt/LTimer<7> | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | cnt/LTimer<7>.D | 9545 | ? | 0 | 0 | cnt/LTimer<7> | NULL | NULL | cnt/LTimer<7>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | cnt/LTimer<7>.CE | 9548 | ? | 0 | 4096 | cnt/LTimer<7> | NULL | NULL | cnt/LTimer<7>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | cnt/LTimer<7>.Q | 9549 | ? | 0 | 0 | cnt/LTimer<7> | NULL | NULL | cnt/LTimer<7>.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/LTimer<8> | WarpSE_COPY_0_COPY_0 | 2155877376 | 12 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<0> | 9244 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<1> | 9250 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<2> | 9251 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<3> | 9252 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<4> | 9253 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<5> | 9254 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<6> | 9255 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<7> | 9256 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cnt/LTimer<8> | 9257 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM SIGNAL_INSTANCE | cnt/LTimer<8>.SI | cnt/LTimer<8> | 0 | 11 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<0> | 9244 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<8> | 9343 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<1> | 9250 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +NODE | cnt/LTimer<2> | 9251 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<3> | 9252 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<4> | 9253 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<5> | 9254 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<6> | 9255 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<7> | 9256 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/LTimer<8>.D1 | 9631 | ? | 483 | 4096 | cnt/LTimer<8> | NULL | NULL | cnt/LTimer<8>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/LTimer<8>.D1 | 9551 | ? | 0 | 0 | cnt/LTimer<8> | NULL | NULL | cnt/LTimer<8>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/LTimer<8>.D2 | 9632 | ? | 483 | 4096 | cnt/LTimer<8> | NULL | NULL | cnt/LTimer<8>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<8> | IV_TRUE | cnt/TimerTC -SPPTERM | 9 | IV_TRUE | cnt/LTimer<0> | IV_FALSE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7> -SPPTERM | 9 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7> | IV_FALSE | cnt/TimerTC +SIGNAL | NODE | cnt/LTimer<8>.D2 | 9552 | ? | 0 | 4096 | cnt/LTimer<8> | NULL | NULL | cnt/LTimer<8>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 8 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7> OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | cnt/LTimer<8>.CE | 9633 | ? | 484 | 4096 | cnt/LTimer<8> | NULL | NULL | cnt/LTimer<8>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC +SIGNAL | NODE | cnt/LTimer<8>.CE | 9553 | ? | 0 | 4096 | cnt/LTimer<8> | NULL | NULL | cnt/LTimer<8>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> SRFF_INSTANCE | cnt/LTimer<8>.REG | cnt/LTimer<8> | 0 | 3 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/LTimer<8>.D | 9630 | ? | 483 | 0 | cnt/LTimer<8> | NULL | NULL | cnt/LTimer<8>.XOR | 0 | 7 | ALU_F +NODE | cnt/LTimer<8>.D | 9550 | ? | 0 | 0 | cnt/LTimer<8> | NULL | NULL | cnt/LTimer<8>.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | cnt/LTimer<8>.CE | 9633 | ? | 484 | 4096 | cnt/LTimer<8> | NULL | NULL | cnt/LTimer<8>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC +SIGNAL | NODE | cnt/LTimer<8>.CE | 9553 | ? | 0 | 4096 | cnt/LTimer<8> | NULL | NULL | cnt/LTimer<8>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/LTimer<8>.Q | 9634 | ? | 485 | 0 | cnt/LTimer<8> | NULL | NULL | cnt/LTimer<8>.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB +NODE | cnt/LTimer<8>.Q | 9554 | ? | 0 | 0 | cnt/LTimer<8> | NULL | NULL | cnt/LTimer<8>.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/LTimer<12> | WarpSE_COPY_0_COPY_0 | 2424312832 | 16 | 1 +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/LTimer<9> | WarpSE_COPY_0_COPY_0 | 2155877376 | 13 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<0> | 9244 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<12> | 9344 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<12>.Q | cnt/LTimer<12> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<1> | 9250 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +NODE | cnt/LTimer<2> | 9251 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<3> | 9252 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<4> | 9253 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<5> | 9254 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<6> | 9255 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<7> | 9256 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<8> | 9257 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<9> | 9339 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<10> | 9341 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<11> | 9342 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<11>.Q | cnt/LTimer<11> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<8> | 9343 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/LTimer<12> | 9344 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<12>.Q | cnt/LTimer<12> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<9> | 9258 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM -SIGNAL_INSTANCE | cnt/LTimer<12>.SI | cnt/LTimer<12> | 0 | 15 | 3 +SIGNAL_INSTANCE | cnt/LTimer<9>.SI | cnt/LTimer<9> | 0 | 12 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<0> | 9244 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<12> | 9344 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<12>.Q | cnt/LTimer<12> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<1> | 9250 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +NODE | cnt/LTimer<2> | 9251 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<0> | 9327 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<3> | 9252 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1> | 9329 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<4> | 9253 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<2> | 9330 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<5> | 9254 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<3> | 9331 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<6> | 9255 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<5> | 9332 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<7> | 9256 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<4> | 9336 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM +NODE | cnt/LTimer<8> | 9257 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<6> | 9337 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<7> | 9338 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<9> | 9339 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<10> | 9341 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<11> | 9342 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<11>.Q | cnt/LTimer<11> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<8> | 9343 | ? | 485 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/LTimer<12>.D1 | 9636 | ? | 485 | 4096 | cnt/LTimer<12> | NULL | NULL | cnt/LTimer<12>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/LTimer<9>.D1 | 9556 | ? | 0 | 0 | cnt/LTimer<9> | NULL | NULL | cnt/LTimer<9>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/LTimer<12>.D2 | 9637 | ? | 485 | 4096 | cnt/LTimer<12> | NULL | NULL | cnt/LTimer<12>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<12> | IV_TRUE | cnt/TimerTC -SPPTERM | 13 | IV_TRUE | cnt/LTimer<0> | IV_FALSE | cnt/LTimer<13> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7> | IV_TRUE | cnt/LTimer<9> | IV_TRUE | cnt/LTimer<10> | IV_TRUE | cnt/LTimer<11> | IV_TRUE | cnt/LTimer<8> -SPPTERM | 13 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7> | IV_TRUE | cnt/LTimer<9> | IV_TRUE | cnt/LTimer<10> | IV_TRUE | cnt/LTimer<11> | IV_TRUE | cnt/LTimer<8> | IV_FALSE | cnt/TimerTC +SIGNAL | NODE | cnt/LTimer<9>.D2 | 9557 | ? | 0 | 4096 | cnt/LTimer<9> | NULL | NULL | cnt/LTimer<9>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 9 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7> | IV_TRUE | cnt/LTimer<8> OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | cnt/LTimer<12>.CE | 9638 | ? | 486 | 4096 | cnt/LTimer<12> | NULL | NULL | cnt/LTimer<12>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC +SIGNAL | NODE | cnt/LTimer<9>.CE | 9558 | ? | 0 | 4096 | cnt/LTimer<9> | NULL | NULL | cnt/LTimer<9>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> -SRFF_INSTANCE | cnt/LTimer<12>.REG | cnt/LTimer<12> | 0 | 3 | 1 +SRFF_INSTANCE | cnt/LTimer<9>.REG | cnt/LTimer<9> | 0 | 3 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/LTimer<12>.D | 9635 | ? | 485 | 0 | cnt/LTimer<12> | NULL | NULL | cnt/LTimer<12>.XOR | 0 | 7 | ALU_F +NODE | cnt/LTimer<9>.D | 9555 | ? | 0 | 0 | cnt/LTimer<9> | NULL | NULL | cnt/LTimer<9>.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | cnt/LTimer<12>.CE | 9638 | ? | 486 | 4096 | cnt/LTimer<12> | NULL | NULL | cnt/LTimer<12>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_TRUE | cnt/TimerTC +SIGNAL | NODE | cnt/LTimer<9>.CE | 9558 | ? | 0 | 4096 | cnt/LTimer<9> | NULL | NULL | cnt/LTimer<9>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/LTimer<12>.Q | 9639 | ? | 485 | 0 | cnt/LTimer<12> | NULL | NULL | cnt/LTimer<12>.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB - -MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobs/IORW0 | WarpSE_COPY_0_COPY_0 | 2155873536 | 12 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IORW0 | 9345 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP21_.EXP | 10088 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP21_.EXP | EXP21_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP22_.EXP | 10089 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP22_.EXP | EXP22_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobs/IORW0 | 9345 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobs/IORW0.SI | iobs/IORW0 | 0 | 11 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IORW0 | 9345 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP21_.EXP | 10088 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP21_.EXP | EXP21_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP22_.EXP | 10089 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP22_.EXP | EXP22_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobs/IORW0.D1 | 9641 | ? | 503 | 4096 | iobs/IORW0 | NULL | NULL | iobs/IORW0.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobs/IORW0.D2 | 9642 | ? | 503 | 4096 | iobs/IORW0 | NULL | NULL | iobs/IORW0.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | EXP21_.EXP -SPPTERM | 1 | IV_TRUE | EXP22_.EXP -SPPTERM | 2 | IV_FALSE | iobs/IORW0 | IV_TRUE | iobs/PS_FSM_FFd2 -SPPTERM | 2 | IV_FALSE | iobs/IORW0 | IV_TRUE | iobs/PS_FSM_FFd1 -SPPTERM | 3 | IV_TRUE | iobs/Once | IV_FALSE | iobs/IORW0 | IV_TRUE | iobs/ALE1 -SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | iobs/IORW0 | IV_TRUE | iobs/ALE1 -SPPTERM | 4 | IV_FALSE | iobs/IORW0 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf | IV_TRUE | iobs/ALE1 - -SRFF_INSTANCE | iobs/IORW0.REG | iobs/IORW0 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobs/IORW0.D | 9640 | ? | 503 | 0 | iobs/IORW0 | NULL | NULL | iobs/IORW0.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobs/IORW0.Q | 9643 | ? | 568 | 0 | iobs/IORW0 | NULL | NULL | iobs/IORW0.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RefDone | WarpSE_COPY_0_COPY_0 | 2155873280 | 10 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefDone | 9346 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefReqSync | 9398 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReqSync.Q | ram/RefReqSync | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | ram/RefDone | 9346 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | ram/RefDone.EXP | 10108 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.EXP | ram/RefDone | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | ram/RefDone.SI | ram/RefDone | 0 | 9 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefDone | 9346 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefReqSync | 9398 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReqSync.Q | ram/RefReqSync | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | ram/RefDone.D1 | 9645 | ? | 504 | 4096 | ram/RefDone | NULL | NULL | ram/RefDone.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | ram/RefDone.D2 | 9646 | ? | 504 | 4096 | ram/RefDone | NULL | NULL | ram/RefDone.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | ram/RefDone | IV_TRUE | ram/RefReqSync -SPPTERM | 3 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RefReqSync -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | ram/RefDone.EXP | 10097 | ? | 0 | 0 | ram/RefDone | NULL | NULL | ram/RefDone.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF -SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | cs/nOverlay1 - -SRFF_INSTANCE | ram/RefDone.REG | ram/RefDone | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | ram/RefDone.D | 9644 | ? | 504 | 0 | ram/RefDone | NULL | NULL | ram/RefDone.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | ram/RefDone.Q | 9647 | ? | 533 | 0 | ram/RefDone | NULL | NULL | ram/RefDone.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB +NODE | cnt/LTimer<9>.Q | 9559 | ? | 0 | 0 | cnt/LTimer<9> | NULL | NULL | cnt/LTimer<9>.REG | 0 | 8 | SRFF_Q INPUT_INSTANCE | 0 | 0 | NULL | N01 | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | nRES | 9492 | PIPO | 571 | 64 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRES | 0 | 6 | OI_OUT +NODE | nRES | 9406 | PIPO | 0 | 64 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRES | 0 | 6 | OI_OUT OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | N01 | 9347 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX +NODE | N01 | 9259 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cs/nOverlay0 | WarpSE_COPY_0_COPY_0 | 2155877376 | 11 | 2 +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cs/nOverlay | WarpSE_COPY_0_COPY_0 | 2155877376 | 18 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay0 | 9348 | ? | 505 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N01 | 9347 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX +NODE | N01 | 9259 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_5_IBUF | 9429 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_5_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9270 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9276 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cs/nOverlay0 | 9348 | ? | 505 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | cs/nOverlay0.EXP | 10109 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.EXP | cs/nOverlay0 | 4 | 0 | MC_EXPORT +NODE | cs/nOverlay.EXP | 9981 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.EXP | cs/nOverlay | 4 | 0 | MC_EXPORT -SIGNAL_INSTANCE | cs/nOverlay0.SI | cs/nOverlay0 | 0 | 10 | 4 +SIGNAL_INSTANCE | cs/nOverlay.SI | cs/nOverlay | 0 | 17 | 4 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay0 | 9348 | ? | 505 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.Q | cs/nOverlay0 | 1 | 0 | MC_UIM +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N01 | 9347 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX +NODE | N01 | 9259 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_5_IBUF | 9429 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_5_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9270 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9276 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cs/nOverlay0.D1 | 9649 | ? | 505 | 4096 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cs/nOverlay.D1 | 9561 | ? | 0 | 4096 | cs/nOverlay | NULL | NULL | cs/nOverlay.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cs/nOverlay0.D2 | 9650 | ? | 505 | 6144 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | cs/nOverlay0 | IV_FALSE | nAS_FSB_IBUF -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | cs/nOverlay0 | IV_TRUE | fsb/ASrf +SIGNAL | NODE | cs/nOverlay.D2 | 9562 | ? | 0 | 6144 | cs/nOverlay | NULL | NULL | cs/nOverlay.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | cs/nOverlay | IV_FALSE | nAS_FSB_IBUF +SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | cs/nOverlay | IV_TRUE | fsb/ASrf OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | cs/nOverlay0.RSTF | 9651 | ? | 506 | 4096 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | cs/nOverlay.RSTF | 9563 | ? | 0 | 4096 | cs/nOverlay | NULL | NULL | cs/nOverlay.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | N01 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | cs/nOverlay0.EXP | 10098 | ? | 0 | 0 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_5_IBUF +SIGNAL | NODE | cs/nOverlay.EXP | 9968 | ? | 0 | 0 | cs/nOverlay | NULL | NULL | cs/nOverlay.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 12 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay | IV_FALSE | fsb/Ready1r | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/IOReady | IV_FALSE | ALE1 -SRFF_INSTANCE | cs/nOverlay0.REG | cs/nOverlay0 | 0 | 3 | 1 +SRFF_INSTANCE | cs/nOverlay.REG | cs/nOverlay | 0 | 3 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cs/nOverlay0.D | 9648 | ? | 505 | 0 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.XOR | 0 | 7 | ALU_F +NODE | cs/nOverlay.D | 9560 | ? | 0 | 0 | cs/nOverlay | NULL | NULL | cs/nOverlay.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | cs/nOverlay0.RSTF | 9651 | ? | 506 | 4096 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | cs/nOverlay.RSTF | 9563 | ? | 0 | 4096 | cs/nOverlay | NULL | NULL | cs/nOverlay.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | N01 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cs/nOverlay0.Q | 9652 | ? | 505 | 0 | cs/nOverlay0 | NULL | NULL | cs/nOverlay0.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB +NODE | cs/nOverlay.Q | 9564 | ? | 0 | 0 | cs/nOverlay | NULL | NULL | cs/nOverlay.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/Ready0r | WarpSE_COPY_0_COPY_0 | 2155873536 | 9 | 1 +MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | IORW0 | WarpSE_COPY_0_COPY_0 | 2155873536 | 12 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | IORW0 | 9261 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready0r | 9349 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMReady | 9424 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP10_.EXP | 9972 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP10_.EXP | EXP10_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Clear1.EXP | 9984 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.EXP | iobs/Clear1 | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | fsb/Ready0r | 9349 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM +NODE | IORW0 | 9261 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM -SIGNAL_INSTANCE | fsb/Ready0r.SI | fsb/Ready0r | 0 | 8 | 2 +SIGNAL_INSTANCE | IORW0.SI | IORW0 | 0 | 11 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | IORW0 | 9261 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready0r | 9349 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMReady | 9424 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP10_.EXP | 9972 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP10_.EXP | EXP10_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Clear1.EXP | 9984 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.EXP | iobs/Clear1 | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | fsb/Ready0r.D1 | 9654 | ? | 507 | 4096 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | IORW0.D1 | 9566 | ? | 0 | 4096 | IORW0 | NULL | NULL | IORW0.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | fsb/Ready0r.D2 | 9655 | ? | 507 | 4096 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | IORW0.D2 | 9567 | ? | 0 | 4096 | IORW0 | NULL | NULL | IORW0.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | EXP10_.EXP +SPPTERM | 1 | IV_TRUE | iobs/Clear1.EXP +SPPTERM | 2 | IV_FALSE | IORW0 | IV_TRUE | iobs/PS_FSM_FFd2 +SPPTERM | 2 | IV_FALSE | IORW0 | IV_TRUE | iobs/PS_FSM_FFd1 +SPPTERM | 3 | IV_TRUE | iobs/Once | IV_FALSE | IORW0 | IV_TRUE | ALE1 +SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | IORW0 | IV_TRUE | ALE1 +SPPTERM | 4 | IV_FALSE | IORW0 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf | IV_TRUE | ALE1 + +SRFF_INSTANCE | IORW0.REG | IORW0 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | IORW0.D | 9565 | ? | 0 | 0 | IORW0 | NULL | NULL | IORW0.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | IORW0.Q | 9568 | ? | 0 | 0 | IORW0 | NULL | NULL | IORW0.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/LTimer<12> | WarpSE_COPY_0_COPY_0 | 2155877376 | 16 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<0> | 9244 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<10> | 9248 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<11> | 9249 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<11>.Q | cnt/LTimer<11> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<1> | 9250 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<2> | 9251 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<3> | 9252 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<4> | 9253 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<5> | 9254 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<6> | 9255 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<7> | 9256 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<8> | 9257 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<9> | 9258 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cnt/LTimer<12> | 9262 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<12>.Q | cnt/LTimer<12> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | cnt/LTimer<12>.SI | cnt/LTimer<12> | 0 | 15 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<0> | 9244 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<10> | 9248 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<11> | 9249 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<11>.Q | cnt/LTimer<11> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<1> | 9250 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<2> | 9251 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<3> | 9252 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<4> | 9253 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<5> | 9254 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<6> | 9255 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<7> | 9256 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<8> | 9257 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<9> | 9258 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/LTimer<12>.D1 | 9570 | ? | 0 | 0 | cnt/LTimer<12> | NULL | NULL | cnt/LTimer<12>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cnt/LTimer<12>.D2 | 9571 | ? | 0 | 4096 | cnt/LTimer<12> | NULL | NULL | cnt/LTimer<12>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 12 | IV_TRUE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<10> | IV_TRUE | cnt/LTimer<11> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7> | IV_TRUE | cnt/LTimer<8> | IV_TRUE | cnt/LTimer<9> +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | cnt/LTimer<12>.CE | 9572 | ? | 0 | 4096 | cnt/LTimer<12> | NULL | NULL | cnt/LTimer<12>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> + +SRFF_INSTANCE | cnt/LTimer<12>.REG | cnt/LTimer<12> | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | cnt/LTimer<12>.D | 9569 | ? | 0 | 0 | cnt/LTimer<12> | NULL | NULL | cnt/LTimer<12>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | cnt/LTimer<12>.CE | 9572 | ? | 0 | 4096 | cnt/LTimer<12> | NULL | NULL | cnt/LTimer<12>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | cnt/LTimer<12>.Q | 9573 | ? | 0 | 0 | cnt/LTimer<12> | NULL | NULL | cnt/LTimer<12>.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+OptxMapped | cnt/TimerTC | WarpSE_COPY_0_COPY_0 | 2155873280 | 7 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RefUrg | 9243 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RefUrg.Q | RefUrg | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Timer<0> | 9245 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Timer<1> | 9246 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Timer<2> | 9247 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | cnt/TimerTC.SI | cnt/TimerTC | 0 | 6 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RefUrg | 9243 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RefUrg.Q | RefUrg | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Timer<0> | 9245 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Timer<1> | 9246 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Timer<2> | 9247 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/TimerTC.D1 | 9575 | ? | 0 | 4096 | cnt/TimerTC | NULL | NULL | cnt/TimerTC.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cnt/TimerTC.D2 | 9576 | ? | 0 | 4096 | cnt/TimerTC | NULL | NULL | cnt/TimerTC.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_TRUE | RefUrg | IV_TRUE | cnt/Timer<0> | IV_FALSE | cnt/Timer<1> | IV_FALSE | cnt/Timer<2> +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | cnt/TimerTC.CE | 9577 | ? | 0 | 4096 | cnt/TimerTC | NULL | NULL | cnt/TimerTC.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> + +SRFF_INSTANCE | cnt/TimerTC.REG | cnt/TimerTC | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | cnt/TimerTC.D | 9574 | ? | 0 | 0 | cnt/TimerTC | NULL | NULL | cnt/TimerTC.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | cnt/TimerTC.CE | 9577 | ? | 0 | 4096 | cnt/TimerTC | NULL | NULL | cnt/TimerTC.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | cnt/TimerTC.Q | 9578 | ? | 0 | 0 | cnt/TimerTC | NULL | NULL | cnt/TimerTC.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RefDone | WarpSE_COPY_0_COPY_0 | 2155873280 | 6 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RefDone | 9264 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RefReqSync | 9316 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReqSync.Q | ram/RefReqSync | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9290 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | ram/RefDone | 9264 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | ram/RefDone.SI | ram/RefDone | 0 | 5 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RefDone | 9264 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RefReqSync | 9316 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReqSync.Q | ram/RefReqSync | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9290 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | ram/RefDone.D1 | 9580 | ? | 0 | 4096 | ram/RefDone | NULL | NULL | ram/RefDone.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | ram/RefDone.D2 | 9581 | ? | 0 | 4096 | ram/RefDone | NULL | NULL | ram/RefDone.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_TRUE | ram/RefDone | IV_TRUE | ram/RefReqSync +SPPTERM | 4 | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | ram/RefReqSync +SPPTERM | 4 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd3 | IV_TRUE | ram/RefReqSync + +SRFF_INSTANCE | ram/RefDone.REG | ram/RefDone | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | ram/RefDone.D | 9579 | ? | 0 | 0 | ram/RefDone | NULL | NULL | ram/RefDone.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | ram/RefDone.Q | 9582 | ? | 0 | 0 | ram/RefDone | NULL | NULL | ram/RefDone.REG | 0 | 8 | SRFF_Q + +INPUT_INSTANCE | 0 | 0 | NULL | nLDS_FSB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | nLDS_FSB | 9435 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | nLDS_FSB_IBUF | 9272 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX + +MACROCELL_INSTANCE | PrldLow+OptxMapped | IOL0 | WarpSE_COPY_0_COPY_0 | 2155873280 | 6 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOL1 | 9273 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOL1.Q | iobs/IOL1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nLDS_FSB_IBUF | 9272 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | IOL0 | 9265 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IOL0.Q | IOL0 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | IOL0.SI | IOL0 | 0 | 5 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOL1 | 9273 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOL1.Q | iobs/IOL1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nLDS_FSB_IBUF | 9272 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | IOL0.D1 | 9584 | ? | 0 | 4096 | IOL0 | NULL | NULL | IOL0.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | IOL0.D2 | 9585 | ? | 0 | 4096 | IOL0 | NULL | NULL | IOL0.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_FALSE | nLDS_FSB_IBUF | IV_TRUE | ALE1 +SPPTERM | 2 | IV_TRUE | iobs/IOL1 | IV_FALSE | ALE1 +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | IOL0.CE | 9586 | ? | 0 | 4096 | IOL0 | NULL | NULL | IOL0.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 + +SRFF_INSTANCE | IOL0.REG | IOL0 | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | IOL0.D | 9583 | ? | 0 | 0 | IOL0 | NULL | NULL | IOL0.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | IOL0.CE | 9586 | ? | 0 | 4096 | IOL0 | NULL | NULL | IOL0.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | IOL0.Q | 9587 | ? | 0 | 0 | IOL0 | NULL | NULL | IOL0.REG | 0 | 8 | SRFF_Q + +INPUT_INSTANCE | 0 | 0 | NULL | nUDS_FSB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | nUDS_FSB | 9437 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | nUDS_FSB_IBUF | 9277 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX + +MACROCELL_INSTANCE | PrldLow+OptxMapped | IOU0 | WarpSE_COPY_0_COPY_0 | 2155873280 | 6 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOU1 | 9278 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOU1.Q | iobs/IOU1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nUDS_FSB_IBUF | 9277 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | IOU0 | 9266 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IOU0.Q | IOU0 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | IOU0.SI | IOU0 | 0 | 5 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOU1 | 9278 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOU1.Q | iobs/IOU1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nUDS_FSB_IBUF | 9277 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | IOU0.D1 | 9589 | ? | 0 | 4096 | IOU0 | NULL | NULL | IOU0.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | IOU0.D2 | 9590 | ? | 0 | 4096 | IOU0 | NULL | NULL | IOU0.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_FALSE | nUDS_FSB_IBUF | IV_TRUE | ALE1 +SPPTERM | 2 | IV_TRUE | iobs/IOU1 | IV_FALSE | ALE1 +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | IOU0.CE | 9591 | ? | 0 | 4096 | IOU0 | NULL | NULL | IOU0.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 + +SRFF_INSTANCE | IOU0.REG | IOU0 | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | IOU0.D | 9588 | ? | 0 | 0 | IOU0 | NULL | NULL | IOU0.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | IOU0.CE | 9591 | ? | 0 | 4096 | IOU0 | NULL | NULL | IOU0.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | IOU0.Q | 9592 | ? | 0 | 0 | IOU0 | NULL | NULL | IOU0.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | RefReq | WarpSE_COPY_0_COPY_0 | 2155873536 | 6 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RefUrg | 9243 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RefUrg.Q | RefUrg | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Timer<1> | 9246 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Timer<2> | 9247 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | RefReq | 9267 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RefReq.Q | RefReq | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | RefReq.SI | RefReq | 0 | 5 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RefUrg | 9243 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RefUrg.Q | RefUrg | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Timer<1> | 9246 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Timer<2> | 9247 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | RefReq.D1 | 9594 | ? | 0 | 4096 | RefReq | NULL | NULL | RefReq.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | RefReq.D2 | 9595 | ? | 0 | 4096 | RefReq | NULL | NULL | RefReq.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 3 | IV_FALSE | RefUrg | IV_FALSE | cnt/Timer<1> | IV_FALSE | cnt/Timer<2> +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | RefReq.CE | 9596 | ? | 0 | 4096 | RefReq | NULL | NULL | RefReq.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> + +SRFF_INSTANCE | RefReq.REG | RefReq | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | RefReq.D | 9593 | ? | 0 | 0 | RefReq | NULL | NULL | RefReq.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | RefReq.CE | 9596 | ? | 0 | 4096 | RefReq | NULL | NULL | RefReq.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | RefReq.Q | 9597 | ? | 0 | 0 | RefReq | NULL | NULL | RefReq.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+OptxMapped | cnt/LTimerTC | WarpSE_COPY_0_COPY_0 | 2155873280 | 17 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<0> | 9244 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<10> | 9248 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<11> | 9249 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<11>.Q | cnt/LTimer<11> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<1> | 9250 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<2> | 9251 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<3> | 9252 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<4> | 9253 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<5> | 9254 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<6> | 9255 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<7> | 9256 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<8> | 9257 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<9> | 9258 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<12> | 9262 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<12>.Q | cnt/LTimer<12> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cnt/LTimerTC | 9268 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimerTC.Q | cnt/LTimerTC | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | cnt/LTimerTC.SI | cnt/LTimerTC | 0 | 16 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<0> | 9244 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.Q | cnt/LTimer<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<10> | 9248 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<10>.Q | cnt/LTimer<10> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<11> | 9249 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<11>.Q | cnt/LTimer<11> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<1> | 9250 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.Q | cnt/LTimer<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<2> | 9251 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<2>.Q | cnt/LTimer<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<3> | 9252 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<3>.Q | cnt/LTimer<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<4> | 9253 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<4>.Q | cnt/LTimer<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<5> | 9254 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<5>.Q | cnt/LTimer<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<6> | 9255 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<6>.Q | cnt/LTimer<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<7> | 9256 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.Q | cnt/LTimer<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<8> | 9257 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<8>.Q | cnt/LTimer<8> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<9> | 9258 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<9>.Q | cnt/LTimer<9> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimer<12> | 9262 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<12>.Q | cnt/LTimer<12> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/LTimerTC.D1 | 9599 | ? | 0 | 4096 | cnt/LTimerTC | NULL | NULL | cnt/LTimerTC.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cnt/LTimerTC.D2 | 9600 | ? | 0 | 4096 | cnt/LTimerTC | NULL | NULL | cnt/LTimerTC.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 13 | IV_FALSE | cnt/LTimer<0> | IV_TRUE | cnt/LTimer<10> | IV_TRUE | cnt/LTimer<11> | IV_TRUE | cnt/LTimer<1> | IV_TRUE | cnt/LTimer<2> | IV_TRUE | cnt/LTimer<3> | IV_TRUE | cnt/LTimer<4> | IV_TRUE | cnt/LTimer<5> | IV_TRUE | cnt/LTimer<6> | IV_TRUE | cnt/LTimer<7> | IV_TRUE | cnt/LTimer<8> | IV_TRUE | cnt/LTimer<9> | IV_TRUE | cnt/LTimer<12> +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | cnt/LTimerTC.CE | 9601 | ? | 0 | 4096 | cnt/LTimerTC | NULL | NULL | cnt/LTimerTC.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> + +SRFF_INSTANCE | cnt/LTimerTC.REG | cnt/LTimerTC | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | cnt/LTimerTC.D | 9598 | ? | 0 | 0 | cnt/LTimerTC | NULL | NULL | cnt/LTimerTC.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | cnt/LTimerTC.CE | 9601 | ? | 0 | 4096 | cnt/LTimerTC | NULL | NULL | cnt/LTimerTC.SI | 10 | 9 | MC_SI_CE +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | cnt/LTimerTC.Q | 9602 | ? | 0 | 0 | cnt/LTimerTC | NULL | NULL | cnt/LTimerTC.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/Ready0r | WarpSE_COPY_0_COPY_0 | 2155873536 | 13 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready0r | 9269 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMReady | 9340 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Timer<0> | 9245 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Timer<1> | 9246 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | fsb/Ready0r | 9269 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | fsb/Ready0r.EXP | 10027 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.EXP | fsb/Ready0r | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | fsb/Ready0r.SI | fsb/Ready0r | 0 | 12 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready0r | 9269 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMReady | 9340 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Timer<0> | 9245 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Timer<1> | 9246 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | fsb/Ready0r.D1 | 9604 | ? | 0 | 4096 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | fsb/Ready0r.D2 | 9605 | ? | 0 | 4096 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.SI | 2 | 9 | MC_SI_D2 SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf -SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_FALSE | ram/RAMReady -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_FALSE | ram/RAMReady +SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay | IV_FALSE | fsb/Ready0r | IV_FALSE | ram/RAMReady +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | fsb/Ready0r.EXP | 10016 | ? | 0 | 0 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 2 | IV_FALSE | cnt/Timer<0> | IV_FALSE | cnt/Timer<1> +SPPTERM | 3 | IV_TRUE | cnt/TimerTC | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> SRFF_INSTANCE | fsb/Ready0r.REG | fsb/Ready0r | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | fsb/Ready0r.D | 9653 | ? | 507 | 0 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.XOR | 0 | 7 | ALU_F +NODE | fsb/Ready0r.D | 9603 | ? | 0 | 0 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | fsb/Ready0r.Q | 9656 | ? | 520 | 0 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB +NODE | fsb/Ready0r.Q | 9606 | ? | 0 | 0 | fsb/Ready0r | NULL | NULL | fsb/Ready0r.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/Ready1r | WarpSE_COPY_0_COPY_0 | 2155873536 | 12 | 2 +MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | fsb/Ready1r | WarpSE_COPY_0_COPY_0 | 2155873536 | 18 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +NODE | fsb/Ready1r | 9270 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +NODE | iobs/IOReady | 9276 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/nDTACK.EXP | 10084 | ? | 508 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.EXP | fsb/nDTACK | 4 | 0 | MC_EXPORT +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay.EXP | 9981 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.EXP | cs/nOverlay | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | fsb/Ready1r.EXP | 10085 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.EXP | fsb/Ready1r | 4 | 0 | MC_EXPORT +NODE | fsb/Ready1r | 9270 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM -SIGNAL_INSTANCE | fsb/Ready1r.SI | fsb/Ready1r | 0 | 11 | 3 +SIGNAL_INSTANCE | fsb/Ready1r.SI | fsb/Ready1r | 0 | 17 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +NODE | fsb/Ready1r | 9270 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +NODE | iobs/IOReady | 9276 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/nDTACK.EXP | 10084 | ? | 508 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.EXP | fsb/nDTACK | 4 | 0 | MC_EXPORT +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay.EXP | 9981 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.EXP | cs/nOverlay | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | fsb/Ready1r.D1 | 9658 | ? | 508 | 4096 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | fsb/Ready1r.D1 | 9608 | ? | 0 | 4096 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | fsb/Ready1r.D2 | 9659 | ? | 508 | 4096 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | fsb/nDTACK.EXP +SIGNAL | NODE | fsb/Ready1r.D2 | 9609 | ? | 0 | 4096 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | cs/nOverlay.EXP SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf SPPTERM | 3 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady SPPTERM | 4 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady SPPTERM | 4 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | fsb/Ready1r.EXP | 10071 | ? | 514 | 0 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 4 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF +SPPTERM | 12 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay | IV_FALSE | fsb/Ready1r | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/IOReady | IV_FALSE | ALE1 SRFF_INSTANCE | fsb/Ready1r.REG | fsb/Ready1r | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | fsb/Ready1r.D | 9657 | ? | 508 | 0 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.XOR | 0 | 7 | ALU_F +NODE | fsb/Ready1r.D | 9607 | ? | 0 | 0 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | fsb/Ready1r.Q | 9660 | ? | 520 | 0 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB +NODE | fsb/Ready1r.Q | 9610 | ? | 0 | 0 | fsb/Ready1r | NULL | NULL | fsb/Ready1r.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | PrldLow+OptxMapped | fsb/VPA | WarpSE_COPY_0_COPY_0 | 2155873280 | 12 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +NODE | fsb/Ready1r | 9270 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/VPA | 9351 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM +NODE | fsb/VPA | 9271 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +NODE | iobs/IOReady | 9276 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP14_.EXP | 10078 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP14_.EXP | EXP14_ | 4 | 0 | MC_EXPORT +NODE | EXP13_.EXP | 9975 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP13_.EXP | EXP13_ | 4 | 0 | MC_EXPORT INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP23_.EXP | 10091 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP23_.EXP | EXP23_ | 4 | 0 | MC_EXPORT +NODE | EXP14_.EXP | 9976 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP14_.EXP | EXP14_ | 4 | 0 | MC_EXPORT INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | fsb/VPA | 9351 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM +NODE | fsb/VPA | 9271 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM SIGNAL_INSTANCE | fsb/VPA.SI | fsb/VPA | 0 | 11 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +NODE | fsb/Ready1r | 9270 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/VPA | 9351 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM +NODE | fsb/VPA | 9271 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +NODE | iobs/IOReady | 9276 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP14_.EXP | 10078 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP14_.EXP | EXP14_ | 4 | 0 | MC_EXPORT +NODE | EXP13_.EXP | 9975 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP13_.EXP | EXP13_ | 4 | 0 | MC_EXPORT INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP23_.EXP | 10091 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP23_.EXP | EXP23_ | 4 | 0 | MC_EXPORT +NODE | EXP14_.EXP | 9976 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP14_.EXP | EXP14_ | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | fsb/VPA.D1 | 9662 | ? | 509 | 4096 | fsb/VPA | NULL | NULL | fsb/VPA.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | fsb/VPA.D1 | 9612 | ? | 0 | 4096 | fsb/VPA | NULL | NULL | fsb/VPA.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | fsb/VPA.D2 | 9663 | ? | 509 | 4096 | fsb/VPA | NULL | NULL | fsb/VPA.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | fsb/VPA.D2 | 9613 | ? | 0 | 4096 | fsb/VPA | NULL | NULL | fsb/VPA.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | EXP13_.EXP SPPTERM | 1 | IV_TRUE | EXP14_.EXP -SPPTERM | 1 | IV_TRUE | EXP23_.EXP SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/ASrf SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF @@ -1944,1618 +2358,1204 @@ SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb SRFF_INSTANCE | fsb/VPA.REG | fsb/VPA | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | fsb/VPA.D | 9661 | ? | 509 | 0 | fsb/VPA | NULL | NULL | fsb/VPA.XOR | 0 | 7 | ALU_F +NODE | fsb/VPA.D | 9611 | ? | 0 | 0 | fsb/VPA | NULL | NULL | fsb/VPA.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | fsb/VPA.Q | 9664 | ? | 509 | 0 | fsb/VPA | NULL | NULL | fsb/VPA.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -INPUT_INSTANCE | 0 | 0 | NULL | nLDS_FSB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | nLDS_FSB | 9522 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | nLDS_FSB_IBUF | 9353 | ? | 512 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX - -MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/IOL0 | WarpSE_COPY_0_COPY_0 | 2155873280 | 6 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOL1 | 9354 | ? | 510 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOL1.Q | iobs/IOL1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nLDS_FSB_IBUF | 9353 | ? | 512 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobs/IOL0 | 9352 | ? | 547 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOL0.Q | iobs/IOL0 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobs/IOL0.SI | iobs/IOL0 | 0 | 5 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOL1 | 9354 | ? | 510 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOL1.Q | iobs/IOL1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nLDS_FSB_IBUF | 9353 | ? | 512 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobs/IOL0.D1 | 9666 | ? | 510 | 4096 | iobs/IOL0 | NULL | NULL | iobs/IOL0.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobs/IOL0.D2 | 9667 | ? | 510 | 4096 | iobs/IOL0 | NULL | NULL | iobs/IOL0.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_FALSE | nLDS_FSB_IBUF | IV_TRUE | iobs/ALE1 -SPPTERM | 2 | IV_TRUE | iobs/IOL1 | IV_FALSE | iobs/ALE1 -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | iobs/IOL0.CE | 9668 | ? | 511 | 4096 | iobs/IOL0 | NULL | NULL | iobs/IOL0.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 - -SRFF_INSTANCE | iobs/IOL0.REG | iobs/IOL0 | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobs/IOL0.D | 9665 | ? | 510 | 0 | iobs/IOL0 | NULL | NULL | iobs/IOL0.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | iobs/IOL0.CE | 9668 | ? | 511 | 4096 | iobs/IOL0 | NULL | NULL | iobs/IOL0.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobs/IOL0.Q | 9669 | ? | 547 | 0 | iobs/IOL0 | NULL | NULL | iobs/IOL0.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB +NODE | fsb/VPA.Q | 9614 | ? | 0 | 0 | fsb/VPA | NULL | NULL | fsb/VPA.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/IOL1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 3 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nLDS_FSB_IBUF | 9353 | ? | 512 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nLDS_FSB_IBUF | 9272 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Load1 | 9393 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM +NODE | iobs/Load1 | 9309 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobs/IOL1 | 9354 | ? | 510 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOL1.Q | iobs/IOL1 | 1 | 0 | MC_UIM +NODE | iobs/IOL1 | 9273 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOL1.Q | iobs/IOL1 | 1 | 0 | MC_UIM SIGNAL_INSTANCE | iobs/IOL1.SI | iobs/IOL1 | 0 | 2 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nLDS_FSB_IBUF | 9353 | ? | 512 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nLDS_FSB_IBUF | 9272 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Load1 | 9393 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM +NODE | iobs/Load1 | 9309 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobs/IOL1.D1 | 9671 | ? | 512 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobs/IOL1.D1 | 9616 | ? | 0 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobs/IOL1.D2 | 9672 | ? | 512 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobs/IOL1.D2 | 9617 | ? | 0 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 2 | 9 | MC_SI_D2 SPPTERM | 1 | IV_FALSE | nLDS_FSB_IBUF OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | iobs/IOL1.CE | 9673 | ? | 513 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | iobs/IOL1.CE | 9618 | ? | 0 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 10 | 9 | MC_SI_CE SPPTERM | 1 | IV_TRUE | iobs/Load1 SRFF_INSTANCE | iobs/IOL1.REG | iobs/IOL1 | 0 | 3 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobs/IOL1.D | 9670 | ? | 512 | 0 | iobs/IOL1 | NULL | NULL | iobs/IOL1.XOR | 0 | 7 | ALU_F +NODE | iobs/IOL1.D | 9615 | ? | 0 | 0 | iobs/IOL1 | NULL | NULL | iobs/IOL1.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | iobs/IOL1.CE | 9673 | ? | 513 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | iobs/IOL1.CE | 9618 | ? | 0 | 4096 | iobs/IOL1 | NULL | NULL | iobs/IOL1.SI | 10 | 9 | MC_SI_CE SPPTERM | 1 | IV_TRUE | iobs/Load1 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobs/IOL1.Q | 9674 | ? | 510 | 0 | iobs/IOL1 | NULL | NULL | iobs/IOL1.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB +NODE | iobs/IOL1.Q | 9619 | ? | 0 | 0 | iobs/IOL1 | NULL | NULL | iobs/IOL1.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | iobs/IORW1 | WarpSE_COPY_0_COPY_0 | 2155877632 | 9 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IORW1 | 9355 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM +NODE | iobs/IORW1 | 9275 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP19_.EXP | 10086 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP19_.EXP | EXP19_ | 4 | 0 | MC_EXPORT +NODE | EXP16_.EXP | 9979 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP16_.EXP | EXP16_ | 4 | 0 | MC_EXPORT INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP20_.EXP | 10087 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP20_.EXP | EXP20_ | 4 | 0 | MC_EXPORT +NODE | EXP17_.EXP | 9980 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP17_.EXP | EXP17_ | 4 | 0 | MC_EXPORT INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobs/IORW1 | 9355 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM +NODE | iobs/IORW1 | 9275 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM SIGNAL_INSTANCE | iobs/IORW1.SI | iobs/IORW1 | 0 | 8 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IORW1 | 9355 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM +NODE | iobs/IORW1 | 9275 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP19_.EXP | 10086 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP19_.EXP | EXP19_ | 4 | 0 | MC_EXPORT +NODE | EXP16_.EXP | 9979 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP16_.EXP | EXP16_ | 4 | 0 | MC_EXPORT INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP20_.EXP | 10087 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP20_.EXP | EXP20_ | 4 | 0 | MC_EXPORT +NODE | EXP17_.EXP | 9980 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP17_.EXP | EXP17_ | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobs/IORW1.D1 | 9676 | ? | 514 | 4096 | iobs/IORW1 | NULL | NULL | iobs/IORW1.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobs/IORW1.D1 | 9621 | ? | 0 | 4096 | iobs/IORW1 | NULL | NULL | iobs/IORW1.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobs/IORW1.D2 | 9677 | ? | 514 | 4096 | iobs/IORW1 | NULL | NULL | iobs/IORW1.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobs/IORW1.D2 | 9622 | ? | 0 | 4096 | iobs/IORW1 | NULL | NULL | iobs/IORW1.SI | 2 | 9 | MC_SI_D2 SPPTERM | 1 | IV_TRUE | iobs/Once -SPPTERM | 1 | IV_FALSE | iobs/ALE1 -SPPTERM | 1 | IV_TRUE | EXP19_.EXP -SPPTERM | 1 | IV_TRUE | EXP20_.EXP +SPPTERM | 1 | IV_FALSE | ALE1 +SPPTERM | 1 | IV_TRUE | EXP16_.EXP +SPPTERM | 1 | IV_TRUE | EXP17_.EXP SPPTERM | 2 | IV_TRUE | nWE_FSB_IBUF | IV_TRUE | iobs/IORW1 SPPTERM | 2 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/IORW1 SPPTERM | 2 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 SRFF_INSTANCE | iobs/IORW1.REG | iobs/IORW1 | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobs/IORW1.D | 9675 | ? | 514 | 0 | iobs/IORW1 | NULL | NULL | iobs/IORW1.XOR | 0 | 7 | ALU_F +NODE | iobs/IORW1.D | 9620 | ? | 0 | 0 | iobs/IORW1 | NULL | NULL | iobs/IORW1.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobs/IORW1.Q | 9678 | ? | 514 | 0 | iobs/IORW1 | NULL | NULL | iobs/IORW1.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB +NODE | iobs/IORW1.Q | 9623 | ? | 0 | 0 | iobs/IORW1 | NULL | NULL | iobs/IORW1.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobs/IOReady | WarpSE_COPY_0_COPY_0 | 2155877376 | 9 | 1 +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobs/IOReady | WarpSE_COPY_0_COPY_0 | 2155877376 | 18 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOACTr | 9391 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOBERR | 9396 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RA_6_OBUF.EXP | 10006 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.EXP | RA_6_OBUF | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +NODE | iobs/IOReady | 9276 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | iobs/IOReady.EXP | 10007 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.EXP | iobs/IOReady | 4 | 0 | MC_EXPORT -SIGNAL_INSTANCE | iobs/IOReady.SI | iobs/IOReady | 0 | 8 | 2 +SIGNAL_INSTANCE | iobs/IOReady.SI | iobs/IOReady | 0 | 17 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOACTr | 9391 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOBERR | 9396 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RA_6_OBUF.EXP | 10006 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.EXP | RA_6_OBUF | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobs/IOReady.D1 | 9680 | ? | 515 | 4096 | iobs/IOReady | NULL | NULL | iobs/IOReady.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobs/IOReady.D1 | 9625 | ? | 0 | 4096 | iobs/IOReady | NULL | NULL | iobs/IOReady.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobs/IOReady.D2 | 9681 | ? | 515 | 4096 | iobs/IOReady | NULL | NULL | iobs/IOReady.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | iobs/IOReady | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf -SPPTERM | 6 | IV_TRUE | iobs/Once | IV_TRUE | iobs/IOReady | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_TRUE | iobm/IOBERR | IV_TRUE | iobs/ALE1 -SPPTERM | 7 | IV_TRUE | iobs/Once | IV_FALSE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_FALSE | iobm/IOBERR | IV_TRUE | iobs/ALE1 -SPPTERM | 7 | IV_TRUE | iobs/Once | IV_FALSE | iobs/IOReady | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_FALSE | iobm/IOBERR | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1 +SIGNAL | NODE | iobs/IOReady.D2 | 9626 | ? | 0 | 4096 | iobs/IOReady | NULL | NULL | iobs/IOReady.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | RA_6_OBUF.EXP +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | iobs/IOReady.EXP | 9995 | ? | 0 | 0 | iobs/IOReady | NULL | NULL | iobs/IOReady.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf +SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf +SPPTERM | 13 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 +SPPTERM | 13 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf +SPPTERM | 13 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 SRFF_INSTANCE | iobs/IOReady.REG | iobs/IOReady | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobs/IOReady.D | 9679 | ? | 515 | 0 | iobs/IOReady | NULL | NULL | iobs/IOReady.XOR | 0 | 7 | ALU_F +NODE | iobs/IOReady.D | 9624 | ? | 0 | 0 | iobs/IOReady | NULL | NULL | iobs/IOReady.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobs/IOReady.Q | 9682 | ? | 520 | 0 | iobs/IOReady | NULL | NULL | iobs/IOReady.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -INPUT_INSTANCE | 0 | 0 | NULL | nUDS_FSB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | nUDS_FSB | 9523 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | nUDS_FSB_IBUF | 9358 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX - -MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/IOU0 | WarpSE_COPY_0_COPY_0 | 2155873280 | 6 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOU1 | 9359 | ? | 516 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOU1.Q | iobs/IOU1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nUDS_FSB_IBUF | 9358 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobs/IOU0 | 9357 | ? | 549 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOU0.Q | iobs/IOU0 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobs/IOU0.SI | iobs/IOU0 | 0 | 5 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOU1 | 9359 | ? | 516 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOU1.Q | iobs/IOU1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nUDS_FSB_IBUF | 9358 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobs/IOU0.D1 | 9684 | ? | 516 | 4096 | iobs/IOU0 | NULL | NULL | iobs/IOU0.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobs/IOU0.D2 | 9685 | ? | 516 | 4096 | iobs/IOU0 | NULL | NULL | iobs/IOU0.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_FALSE | nUDS_FSB_IBUF | IV_TRUE | iobs/ALE1 -SPPTERM | 2 | IV_TRUE | iobs/IOU1 | IV_FALSE | iobs/ALE1 -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | iobs/IOU0.CE | 9686 | ? | 517 | 4096 | iobs/IOU0 | NULL | NULL | iobs/IOU0.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 - -SRFF_INSTANCE | iobs/IOU0.REG | iobs/IOU0 | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobs/IOU0.D | 9683 | ? | 516 | 0 | iobs/IOU0 | NULL | NULL | iobs/IOU0.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | iobs/IOU0.CE | 9686 | ? | 517 | 4096 | iobs/IOU0 | NULL | NULL | iobs/IOU0.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobs/IOU0.Q | 9687 | ? | 549 | 0 | iobs/IOU0 | NULL | NULL | iobs/IOU0.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB +NODE | iobs/IOReady.Q | 9627 | ? | 0 | 0 | iobs/IOReady | NULL | NULL | iobs/IOReady.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/IOU1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 3 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nUDS_FSB_IBUF | 9358 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nUDS_FSB_IBUF | 9277 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Load1 | 9393 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM +NODE | iobs/Load1 | 9309 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobs/IOU1 | 9359 | ? | 516 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOU1.Q | iobs/IOU1 | 1 | 0 | MC_UIM +NODE | iobs/IOU1 | 9278 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOU1.Q | iobs/IOU1 | 1 | 0 | MC_UIM SIGNAL_INSTANCE | iobs/IOU1.SI | iobs/IOU1 | 0 | 2 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nUDS_FSB_IBUF | 9358 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nUDS_FSB_IBUF | 9277 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Load1 | 9393 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM +NODE | iobs/Load1 | 9309 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobs/IOU1.D1 | 9689 | ? | 518 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobs/IOU1.D1 | 9629 | ? | 0 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobs/IOU1.D2 | 9690 | ? | 518 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobs/IOU1.D2 | 9630 | ? | 0 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 2 | 9 | MC_SI_D2 SPPTERM | 1 | IV_FALSE | nUDS_FSB_IBUF OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | iobs/IOU1.CE | 9691 | ? | 519 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | iobs/IOU1.CE | 9631 | ? | 0 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 10 | 9 | MC_SI_CE SPPTERM | 1 | IV_TRUE | iobs/Load1 SRFF_INSTANCE | iobs/IOU1.REG | iobs/IOU1 | 0 | 3 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobs/IOU1.D | 9688 | ? | 518 | 0 | iobs/IOU1 | NULL | NULL | iobs/IOU1.XOR | 0 | 7 | ALU_F +NODE | iobs/IOU1.D | 9628 | ? | 0 | 0 | iobs/IOU1 | NULL | NULL | iobs/IOU1.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | iobs/IOU1.CE | 9691 | ? | 519 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | iobs/IOU1.CE | 9631 | ? | 0 | 4096 | iobs/IOU1 | NULL | NULL | iobs/IOU1.SI | 10 | 9 | MC_SI_CE SPPTERM | 1 | IV_TRUE | iobs/Load1 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobs/IOU1.Q | 9692 | ? | 516 | 0 | iobs/IOU1 | NULL | NULL | iobs/IOU1.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB +NODE | iobs/IOU1.Q | 9632 | ? | 0 | 0 | iobs/IOU1 | NULL | NULL | iobs/IOU1.REG | 0 | 8 | SRFF_Q + +INPUT_INSTANCE | 0 | 0 | NULL | C8M_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 2 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | C8M | 9438 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | C8M_IBUF | 9279 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 7 | 5 | II_FCLKINV +NODE | C8M_IBUF/FCLK- | 9280 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV INPUT_INSTANCE | 0 | 0 | NULL | nBERR_IOB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | nBERR_IOB | 9525 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | nBERR_IOB | 9439 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | nBERR_IOB_IBUF | 9361 | ? | 565 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX +NODE | nBERR_IOB_IBUF | 9281 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX -MACROCELL_INSTANCE | PrldLow+OptxMapped | fsb/nDTACK | WarpSE_COPY_0_COPY_0 | 2155873280 | 20 | 3 +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | nBERR_FSB_OBUF | WarpSE_COPY_0_COPY_0 | 2155877376 | 15 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +NODE | nBERR_FSB_OBUF.UIM | 9283 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.Q | nBERR_FSB_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +NODE | iobs/IOACTr | 9307 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +NODE | IOBERR | 9311 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd1 | 9290 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/nDTACK.UIM | 9363 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +NODE | ram/RefUrg | 9297 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrg.Q | ram/RefUrg | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready0r | 9349 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMReady | 9424 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP18_.EXP | 10083 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP18_.EXP | EXP18_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | ram/BACTr | 9314 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | fsb/nDTACK | 9362 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 0 | 0 | MC_Q +NODE | nBERR_FSB_OBUF | 9282 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.Q | nBERR_FSB_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | fsb/nDTACK.UIM | 9363 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM +NODE | nBERR_FSB_OBUF.UIM | 9283 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.Q | nBERR_FSB_OBUF | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | fsb/nDTACK.EXP | 10084 | ? | 508 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.EXP | fsb/nDTACK | 4 | 0 | MC_EXPORT +NODE | nBERR_FSB_OBUF.EXP | 10029 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.EXP | nBERR_FSB_OBUF | 4 | 0 | MC_EXPORT -SIGNAL_INSTANCE | fsb/nDTACK.SI | fsb/nDTACK | 0 | 19 | 3 +SIGNAL_INSTANCE | nBERR_FSB_OBUF.SI | nBERR_FSB_OBUF | 0 | 14 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +NODE | nBERR_FSB_OBUF.UIM | 9283 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.Q | nBERR_FSB_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +NODE | iobs/IOACTr | 9307 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +NODE | IOBERR | 9311 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd1 | 9290 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/nDTACK.UIM | 9363 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +NODE | ram/RefUrg | 9297 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrg.Q | ram/RefUrg | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready0r | 9349 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMReady | 9424 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP18_.EXP | 10083 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP18_.EXP | EXP18_ | 4 | 0 | MC_EXPORT +NODE | ram/BACTr | 9314 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | fsb/nDTACK.D1 | 9694 | ? | 520 | 4096 | fsb/nDTACK | NULL | NULL | fsb/nDTACK.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nBERR_FSB_OBUF.D1 | 9634 | ? | 0 | 4096 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | fsb/nDTACK.D2 | 9695 | ? | 520 | 4096 | fsb/nDTACK | NULL | NULL | fsb/nDTACK.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | EXP18_.EXP -SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | fsb/nDTACK.UIM | IV_FALSE | ram/RAMReady -SPPTERM | 13 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/nDTACK.UIM | IV_FALSE | iobs/ALE1 -SPPTERM | 13 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/nDTACK.UIM | IV_FALSE | iobs/ALE1 +SIGNAL | NODE | nBERR_FSB_OBUF.D2 | 9635 | ? | 0 | 4096 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 3 | IV_FALSE | nBERR_FSB_OBUF.UIM | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf +SPPTERM | 6 | IV_TRUE | iobs/Once | IV_FALSE | nBERR_FSB_OBUF.UIM | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_FALSE | IOBERR | IV_TRUE | ALE1 +SPPTERM | 7 | IV_TRUE | iobs/Once | IV_TRUE | nBERR_FSB_OBUF.UIM | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_TRUE | IOBERR | IV_TRUE | ALE1 +SPPTERM | 7 | IV_TRUE | iobs/Once | IV_TRUE | nBERR_FSB_OBUF.UIM | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_TRUE | IOBERR | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | fsb/nDTACK.EXP | 10070 | ? | 508 | 0 | fsb/nDTACK | NULL | NULL | fsb/nDTACK.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 12 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_FALSE | iobs/ALE1 -SPPTERM | 12 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_FALSE | iobs/ALE1 +SIGNAL | NODE | nBERR_FSB_OBUF.EXP | 10018 | ? | 0 | 0 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 6 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefUrg | IV_TRUE | ram/BACTr -SRFF_INSTANCE | fsb/nDTACK.REG | fsb/nDTACK | 0 | 2 | 1 +SRFF_INSTANCE | nBERR_FSB_OBUF.REG | nBERR_FSB_OBUF | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | fsb/nDTACK.D | 9693 | ? | 520 | 0 | fsb/nDTACK | NULL | NULL | fsb/nDTACK.XOR | 0 | 7 | ALU_F +NODE | nBERR_FSB_OBUF.D | 9633 | ? | 0 | 0 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | fsb/nDTACK.Q | 9696 | ? | 520 | 0 | fsb/nDTACK | NULL | NULL | fsb/nDTACK.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB +NODE | nBERR_FSB_OBUF.Q | 9636 | ? | 0 | 0 | nBERR_FSB_OBUF | NULL | NULL | nBERR_FSB_OBUF.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobs/nBERR_FSB | WarpSE_COPY_0_COPY_0 | 2155877376 | 18 | 3 +MACROCELL_INSTANCE | PrldLow+OptxMapped | nDTACK_FSB_OBUF | WarpSE_COPY_0_COPY_0 | 2155873280 | 20 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/nBERR_FSB.UIM | 9365 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.Q | iobs/nBERR_FSB | 1 | 0 | MC_UIM +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | fsb/Ready1r | 9270 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +NODE | iobs/IOReady | 9276 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nDTACK_FSB_OBUF.UIM | 9285 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +NODE | fsb/Ready0r | 9269 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3.EXP | 10143 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.EXP | ram/RS_FSM_FFd3 | 4 | 0 | MC_EXPORT +NODE | ram/RAMReady | 9340 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP15_.EXP | 9977 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP15_.EXP | EXP15_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | iobs/nBERR_FSB | 9364 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.Q | iobs/nBERR_FSB | 0 | 0 | MC_Q +NODE | nDTACK_FSB_OBUF | 9284 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobs/nBERR_FSB.UIM | 9365 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.Q | iobs/nBERR_FSB | 1 | 0 | MC_UIM +NODE | nDTACK_FSB_OBUF.UIM | 9285 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | iobs/nBERR_FSB.EXP | 10144 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.EXP | iobs/nBERR_FSB | 4 | 0 | MC_EXPORT +NODE | nDTACK_FSB_OBUF.EXP | 9978 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.EXP | nDTACK_FSB_OBUF | 4 | 0 | MC_EXPORT -SIGNAL_INSTANCE | iobs/nBERR_FSB.SI | iobs/nBERR_FSB | 0 | 17 | 3 +SIGNAL_INSTANCE | nDTACK_FSB_OBUF.SI | nDTACK_FSB_OBUF | 0 | 19 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/nBERR_FSB.UIM | 9365 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.Q | iobs/nBERR_FSB | 1 | 0 | MC_UIM +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +NODE | fsb/Ready1r | 9270 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +NODE | iobs/IOReady | 9276 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +NODE | nDTACK_FSB_OBUF.UIM | 9285 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3.EXP | 10143 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.EXP | ram/RS_FSM_FFd3 | 4 | 0 | MC_EXPORT +NODE | fsb/Ready0r | 9269 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMReady | 9340 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP15_.EXP | 9977 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP15_.EXP | EXP15_ | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobs/nBERR_FSB.D1 | 9698 | ? | 521 | 4096 | iobs/nBERR_FSB | NULL | NULL | iobs/nBERR_FSB.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nDTACK_FSB_OBUF.D1 | 9638 | ? | 0 | 4096 | nDTACK_FSB_OBUF | NULL | NULL | nDTACK_FSB_OBUF.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobs/nBERR_FSB.D2 | 9699 | ? | 521 | 4096 | iobs/nBERR_FSB | NULL | NULL | iobs/nBERR_FSB.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | ram/RS_FSM_FFd3.EXP -SPPTERM | 3 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | iobs/nBERR_FSB.UIM | IV_FALSE | fsb/ASrf +SIGNAL | NODE | nDTACK_FSB_OBUF.D2 | 9639 | ? | 0 | 4096 | nDTACK_FSB_OBUF | NULL | NULL | nDTACK_FSB_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | EXP15_.EXP +SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM +SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay | IV_FALSE | fsb/Ready0r | IV_TRUE | nDTACK_FSB_OBUF.UIM | IV_FALSE | ram/RAMReady +SPPTERM | 13 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay | IV_FALSE | fsb/Ready1r | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM | IV_FALSE | ALE1 +SPPTERM | 13 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay | IV_FALSE | fsb/Ready1r | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM | IV_FALSE | ALE1 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | iobs/nBERR_FSB.EXP | 10131 | ? | 525 | 0 | iobs/nBERR_FSB | NULL | NULL | iobs/nBERR_FSB.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 13 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 -SPPTERM | 13 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf -SPPTERM | 13 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 -SPPTERM | 13 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf +SIGNAL | NODE | nDTACK_FSB_OBUF.EXP | 9965 | ? | 0 | 0 | nDTACK_FSB_OBUF | NULL | NULL | nDTACK_FSB_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 4 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF -SRFF_INSTANCE | iobs/nBERR_FSB.REG | iobs/nBERR_FSB | 0 | 2 | 1 +SRFF_INSTANCE | nDTACK_FSB_OBUF.REG | nDTACK_FSB_OBUF | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobs/nBERR_FSB.D | 9697 | ? | 521 | 0 | iobs/nBERR_FSB | NULL | NULL | iobs/nBERR_FSB.XOR | 0 | 7 | ALU_F +NODE | nDTACK_FSB_OBUF.D | 9637 | ? | 0 | 0 | nDTACK_FSB_OBUF | NULL | NULL | nDTACK_FSB_OBUF.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobs/nBERR_FSB.Q | 9700 | ? | 521 | 0 | iobs/nBERR_FSB | NULL | NULL | iobs/nBERR_FSB.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB +NODE | nDTACK_FSB_OBUF.Q | 9640 | ? | 0 | 0 | nDTACK_FSB_OBUF | NULL | NULL | nDTACK_FSB_OBUF.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/nBR_IOB | WarpSE_COPY_0_COPY_0 | 2424312832 | 9 | 3 +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | nBR_IOB_OBUF | WarpSE_COPY_0_COPY_0 | 2155877376 | 14 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | nBR_IOB_OBUF | 9287 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nBR_IOB_OBUF.Q | nBR_IOB_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | cnt/INITS_FSM_FFd1 | 9305 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd1.Q | cnt/INITS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | cnt/INITS_FSM_FFd2 | 9306 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd2.Q | cnt/INITS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +NODE | ram/RS_FSM_FFd1 | 9290 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2.EXP | 10146 | ? | 487 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.EXP | iobs/PS_FSM_FFd2 | 4 | 0 | MC_EXPORT +NODE | ram/RefUrg | 9297 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrg.Q | ram/RefUrg | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9314 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RefReq | 9315 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMEN.EXP | 10031 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.EXP | ram/RAMEN | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | cnt/nBR_IOB$Q | 9366 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.Q | cnt/nBR_IOB | 0 | 0 | MC_Q +NODE | nBR_IOB_OBUF$Q | 9286 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nBR_IOB_OBUF.Q | nBR_IOB_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/nBR_IOB | 9367 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.Q | cnt/nBR_IOB | 1 | 0 | MC_UIM +NODE | nBR_IOB_OBUF | 9287 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nBR_IOB_OBUF.Q | nBR_IOB_OBUF | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | cnt/nBR_IOB.EXP | 10147 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.EXP | cnt/nBR_IOB | 4 | 0 | MC_EXPORT +NODE | nBR_IOB_OBUF.EXP | 10032 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nBR_IOB_OBUF.EXP | nBR_IOB_OBUF | 4 | 0 | MC_EXPORT -SIGNAL_INSTANCE | cnt/nBR_IOB.SI | cnt/nBR_IOB | 0 | 8 | 3 +SIGNAL_INSTANCE | nBR_IOB_OBUF.SI | nBR_IOB_OBUF | 0 | 13 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | nBR_IOB_OBUF | 9287 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nBR_IOB_OBUF.Q | nBR_IOB_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | cnt/INITS_FSM_FFd1 | 9305 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd1.Q | cnt/INITS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | cnt/INITS_FSM_FFd2 | 9306 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd2.Q | cnt/INITS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +NODE | ram/RS_FSM_FFd1 | 9290 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2.EXP | 10146 | ? | 487 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.EXP | iobs/PS_FSM_FFd2 | 4 | 0 | MC_EXPORT +NODE | ram/RefUrg | 9297 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrg.Q | ram/RefUrg | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9314 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RefReq | 9315 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMEN.EXP | 10031 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.EXP | ram/RAMEN | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/nBR_IOB.D1 | 9702 | ? | 487 | 4096 | cnt/nBR_IOB | NULL | NULL | cnt/nBR_IOB.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nBR_IOB_OBUF.D1 | 9642 | ? | 0 | 4096 | nBR_IOB_OBUF | NULL | NULL | nBR_IOB_OBUF.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/nBR_IOB.D2 | 9703 | ? | 487 | 4096 | cnt/nBR_IOB | NULL | NULL | cnt/nBR_IOB.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | iobs/PS_FSM_FFd2.EXP +SIGNAL | NODE | nBR_IOB_OBUF.D2 | 9643 | ? | 0 | 4096 | nBR_IOB_OBUF | NULL | NULL | nBR_IOB_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | ram/RAMEN.EXP +SPPTERM | 3 | IV_TRUE | nBR_IOB_OBUF | IV_FALSE | cnt/INITS_FSM_FFd1 | IV_FALSE | cnt/INITS_FSM_FFd2 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | cnt/nBR_IOB.EXP | 10134 | ? | 531 | 0 | cnt/nBR_IOB | NULL | NULL | cnt/nBR_IOB.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_19_IBUF -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_17_IBUF -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_16_IBUF -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 +SIGNAL | NODE | nBR_IOB_OBUF.EXP | 10021 | ? | 0 | 0 | nBR_IOB_OBUF | NULL | NULL | nBR_IOB_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 6 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefUrg | IV_TRUE | ram/BACTr +SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefUrg | IV_TRUE | ram/BACTr +SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefUrg | IV_FALSE | ram/RefReq +SPPTERM | 6 | IV_FALSE | cs/nOverlay | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefUrg | IV_FALSE | ram/RefReq -SRFF_INSTANCE | cnt/nBR_IOB.REG | cnt/nBR_IOB | 0 | 2 | 1 +SRFF_INSTANCE | nBR_IOB_OBUF.REG | nBR_IOB_OBUF | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/nBR_IOB.D | 9701 | ? | 487 | 0 | cnt/nBR_IOB | NULL | NULL | cnt/nBR_IOB.XOR | 0 | 7 | ALU_F +NODE | nBR_IOB_OBUF.D | 9641 | ? | 0 | 0 | nBR_IOB_OBUF | NULL | NULL | nBR_IOB_OBUF.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/nBR_IOB.Q | 9704 | ? | 498 | 0 | cnt/nBR_IOB | NULL | NULL | cnt/nBR_IOB.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB +NODE | nBR_IOB_OBUF.Q | 9644 | ? | 0 | 0 | nBR_IOB_OBUF | NULL | NULL | nBR_IOB_OBUF.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | ram/RASEL | WarpSE_COPY_0_COPY_0 | 2155873536 | 9 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd1 | 9290 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | ram/RefUrg | 9297 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrg.Q | ram/RefUrg | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nROMCS_OBUF.EXP | 10107 | ? | 522 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.EXP | nROMCS_OBUF | 4 | 0 | MC_EXPORT +NODE | A_FSB_19_IBUF$BUF0.EXP | 10024 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.EXP | A_FSB_19_IBUF$BUF0 | 4 | 0 | MC_EXPORT INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP26_.EXP | 10117 | ? | 522 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP26_.EXP | EXP26_ | 4 | 0 | MC_EXPORT +NODE | cnt/LTimer<0>.EXP | 10034 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.EXP | cnt/LTimer<0> | 4 | 0 | MC_EXPORT INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +NODE | ram/RASEL | 9289 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM SIGNAL_INSTANCE | ram/RASEL.SI | ram/RASEL | 0 | 8 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd1 | 9290 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | ram/RefUrg | 9297 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrg.Q | ram/RefUrg | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nROMCS_OBUF.EXP | 10107 | ? | 522 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.EXP | nROMCS_OBUF | 4 | 0 | MC_EXPORT +NODE | A_FSB_19_IBUF$BUF0.EXP | 10024 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.EXP | A_FSB_19_IBUF$BUF0 | 4 | 0 | MC_EXPORT INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP26_.EXP | 10117 | ? | 522 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP26_.EXP | EXP26_ | 4 | 0 | MC_EXPORT +NODE | cnt/LTimer<0>.EXP | 10034 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<0>.EXP | cnt/LTimer<0> | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | ram/RASEL.D1 | 9706 | ? | 522 | 4096 | ram/RASEL | NULL | NULL | ram/RASEL.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | ram/RASEL.D1 | 9646 | ? | 0 | 4096 | ram/RASEL | NULL | NULL | ram/RASEL.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | ram/RASEL.D2 | 9707 | ? | 522 | 4096 | ram/RASEL | NULL | NULL | ram/RASEL.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | nROMCS_OBUF.EXP -SPPTERM | 1 | IV_TRUE | EXP26_.EXP -SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2 -SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd3 -SPPTERM | 3 | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 -SPPTERM | 3 | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf -SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | fsb/ASrf +SIGNAL | NODE | ram/RASEL.D2 | 9647 | ? | 0 | 4096 | ram/RASEL | NULL | NULL | ram/RASEL.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | A_FSB_19_IBUF$BUF0.EXP +SPPTERM | 1 | IV_TRUE | cnt/LTimer<0>.EXP +SPPTERM | 2 | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd1 +SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 +SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3 +SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RefUrg +SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | fsb/ASrf SRFF_INSTANCE | ram/RASEL.REG | ram/RASEL | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | ram/RASEL.D | 9705 | ? | 522 | 0 | ram/RASEL | NULL | NULL | ram/RASEL.XOR | 0 | 7 | ALU_F +NODE | ram/RASEL.D | 9645 | ? | 0 | 0 | ram/RASEL | NULL | NULL | ram/RASEL.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | ram/RASEL.Q | 9708 | ? | 543 | 0 | ram/RASEL | NULL | NULL | ram/RASEL.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB +NODE | ram/RASEL.Q | 9648 | ? | 0 | 0 | ram/RASEL | NULL | NULL | ram/RASEL.REG | 0 | 8 | SRFF_Q -INPUT_INSTANCE | 0 | 0 | NULL | E_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | E | 9526 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX - -MACROCELL_INSTANCE | PrldLow+OptxMapped | cnt/TimerTC | WarpSE_COPY_0_COPY_0 | 2155873280 | 5 | 1 +MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RS_FSM_FFd1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 4 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<1> | 9382 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<2> | 9383 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd1 | 9290 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<3> | 9386 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<3>.Q | cnt/Timer<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd1 | 9290 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -SIGNAL_INSTANCE | cnt/TimerTC.SI | cnt/TimerTC | 0 | 5 | 3 +SIGNAL_INSTANCE | ram/RS_FSM_FFd1.SI | ram/RS_FSM_FFd1 | 0 | 3 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<1> | 9382 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<2> | 9383 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd1 | 9290 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<3> | 9386 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<3>.Q | cnt/Timer<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/TimerTC.D1 | 9710 | ? | 0 | 4096 | cnt/TimerTC | NULL | NULL | cnt/TimerTC.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | ram/RS_FSM_FFd1.D1 | 9650 | ? | 0 | 4096 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/TimerTC.D2 | 9711 | ? | 0 | 4096 | cnt/TimerTC | NULL | NULL | cnt/TimerTC.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_FALSE | cnt/Timer<1> | IV_FALSE | cnt/Timer<2> | IV_FALSE | cnt/Timer<0> | IV_TRUE | cnt/Timer<3> -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | cnt/TimerTC.CLKF | 9712 | ? | 486 | 4096 | cnt/TimerTC | NULL | NULL | cnt/TimerTC.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 1 | IV_TRUE | E_IBUF - -SRFF_INSTANCE | cnt/TimerTC.REG | cnt/TimerTC | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/TimerTC.D | 9709 | ? | 0 | 0 | cnt/TimerTC | NULL | NULL | cnt/TimerTC.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | cnt/TimerTC.CLKF | 9712 | ? | 486 | 4096 | cnt/TimerTC | NULL | NULL | cnt/TimerTC.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 1 | IV_TRUE | E_IBUF -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/TimerTC.Q | 9713 | ? | 486 | 0 | cnt/TimerTC | NULL | NULL | cnt/TimerTC.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/IOS_FSM_FFd3 | WarpSE_COPY_0_COPY_0 | 2155873280 | 7 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOREQr | 9397 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/AoutOE | 9460 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/IOS_FSM_FFd3.SI | iobm/IOS_FSM_FFd3 | 0 | 6 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOREQr | 9397 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/AoutOE | 9460 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/IOS_FSM_FFd3.D1 | 9715 | ? | 551 | 4096 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/IOS_FSM_FFd3.D2 | 9716 | ? | 551 | 4096 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 -SPPTERM | 3 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 -SPPTERM | 5 | IV_FALSE | C8M_IBUF | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOREQr | IV_FALSE | cnt/AoutOE - -SRFF_INSTANCE | iobm/IOS_FSM_FFd3.REG | iobm/IOS_FSM_FFd3 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/IOS_FSM_FFd3.D | 9714 | ? | 551 | 0 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/IOS_FSM_FFd3.Q | 9717 | ? | 568 | 0 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB | CLK2X_IOB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RS_FSM_FFd1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 7 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nRAMUWE_OBUF.EXP | 10140 | ? | 523 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.EXP | nRAMUWE_OBUF | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | ram/RS_FSM_FFd1.EXP | 10141 | ? | 527 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.EXP | ram/RS_FSM_FFd1 | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | ram/RS_FSM_FFd1.SI | ram/RS_FSM_FFd1 | 0 | 6 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nRAMUWE_OBUF.EXP | 10140 | ? | 523 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.EXP | nRAMUWE_OBUF | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | ram/RS_FSM_FFd1.D1 | 9719 | ? | 523 | 4096 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | ram/RS_FSM_FFd1.D2 | 9720 | ? | 523 | 4096 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | nRAMUWE_OBUF.EXP -SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2 -SPPTERM | 2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3 -SPPTERM | 4 | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | ram/RS_FSM_FFd1.EXP | 10128 | ? | 527 | 0 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 3 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 -SPPTERM | 3 | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 +SIGNAL | NODE | ram/RS_FSM_FFd1.D2 | 9651 | ? | 0 | 4096 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | ram/RS_FSM_FFd3 +SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 SRFF_INSTANCE | ram/RS_FSM_FFd1.REG | ram/RS_FSM_FFd1 | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | ram/RS_FSM_FFd1.D | 9718 | ? | 523 | 0 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.XOR | 0 | 7 | ALU_F +NODE | ram/RS_FSM_FFd1.D | 9649 | ? | 0 | 0 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | ram/RS_FSM_FFd1.Q | 9721 | ? | 541 | 0 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB +NODE | ram/RS_FSM_FFd1.Q | 9652 | ? | 0 | 0 | ram/RS_FSM_FFd1 | NULL | NULL | ram/RS_FSM_FFd1.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RS_FSM_FFd2 | WarpSE_COPY_0_COPY_0 | 2155873280 | 21 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9290 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RefUrg | 9297 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrg.Q | ram/RefUrg | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RA_4_OBUF.EXP | 10003 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.EXP | RA_4_OBUF | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | ram/RS_FSM_FFd2.EXP | 10002 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.EXP | ram/RS_FSM_FFd2 | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | ram/RS_FSM_FFd2.SI | ram/RS_FSM_FFd2 | 0 | 20 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9290 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RefUrg | 9297 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrg.Q | ram/RefUrg | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RA_4_OBUF.EXP | 10003 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.EXP | RA_4_OBUF | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | ram/RS_FSM_FFd2.D1 | 9654 | ? | 0 | 4096 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | ram/RS_FSM_FFd2.D2 | 9655 | ? | 0 | 4096 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | RA_4_OBUF.EXP +SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd3 +SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd3 +SPPTERM | 4 | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RefUrg +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | ram/RS_FSM_FFd2.EXP | 9990 | ? | 0 | 0 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 13 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf +SPPTERM | 13 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf + +SRFF_INSTANCE | ram/RS_FSM_FFd2.REG | ram/RS_FSM_FFd2 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | ram/RS_FSM_FFd2.D | 9653 | ? | 0 | 0 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | ram/RS_FSM_FFd2.Q | 9656 | ? | 0 | 0 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/IOS_FSM_FFd3 | WarpSE_COPY_0_COPY_0 | 2155873280 | 7 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9293 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9294 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9292 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | C8M_IBUF | 9279 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOREQr | 9308 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | AoutOE | 9374 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd3 | 9292 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/IOS_FSM_FFd3.SI | iobm/IOS_FSM_FFd3 | 0 | 6 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9293 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9294 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9292 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | C8M_IBUF | 9279 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOREQr | 9308 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | AoutOE | 9374 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/IOS_FSM_FFd3.D1 | 9658 | ? | 0 | 4096 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/IOS_FSM_FFd3.D2 | 9659 | ? | 0 | 4096 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 +SPPTERM | 3 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 +SPPTERM | 5 | IV_FALSE | C8M_IBUF | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOREQr | IV_FALSE | AoutOE + +SRFF_INSTANCE | iobm/IOS_FSM_FFd3.REG | iobm/IOS_FSM_FFd3 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/IOS_FSM_FFd3.D | 9657 | ? | 0 | 0 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/IOS_FSM_FFd3.Q | 9660 | ? | 0 | 0 | iobm/IOS_FSM_FFd3 | NULL | NULL | iobm/IOS_FSM_FFd3.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/IOS_FSM_FFd1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 4 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd3 | 9292 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd2 | 9294 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd1 | 9293 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd1 | 9293 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM SIGNAL_INSTANCE | iobm/IOS_FSM_FFd1.SI | iobm/IOS_FSM_FFd1 | 0 | 3 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd3 | 9292 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd2 | 9294 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd1 | 9293 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/IOS_FSM_FFd1.D1 | 9723 | ? | 552 | 4096 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/IOS_FSM_FFd1.D1 | 9662 | ? | 0 | 4096 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/IOS_FSM_FFd1.D2 | 9724 | ? | 552 | 4096 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/IOS_FSM_FFd1.D2 | 9663 | ? | 0 | 4096 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2 SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 SPPTERM | 2 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd2 SRFF_INSTANCE | iobm/IOS_FSM_FFd1.REG | iobm/IOS_FSM_FFd1 | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/IOS_FSM_FFd1.D | 9722 | ? | 552 | 0 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.XOR | 0 | 7 | ALU_F +NODE | iobm/IOS_FSM_FFd1.D | 9661 | ? | 0 | 0 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/IOS_FSM_FFd1.Q | 9725 | ? | 574 | 0 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB +NODE | iobm/IOS_FSM_FFd1.Q | 9664 | ? | 0 | 0 | iobm/IOS_FSM_FFd1 | NULL | NULL | iobm/IOS_FSM_FFd1.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobm/IOS_FSM_FFd2 | WarpSE_COPY_0_COPY_0 | 2155877376 | 12 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd3 | 9292 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd1 | 9293 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd2 | 9294 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX +NODE | C8M_IBUF | 9279 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ETACK | 9402 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM +NODE | iobm/ETACK | 9323 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrf | 9409 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM +NODE | iobm/BERRrf | 9333 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrr | 9410 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM +NODE | iobm/BERRrr | 9334 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrf | 9412 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM +NODE | iobm/DTACKrf | 9321 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrr | 9413 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM +NODE | iobm/DTACKrr | 9322 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrf | 9416 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM +NODE | iobm/RESrf | 9336 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrr | 9417 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM +NODE | iobm/RESrr | 9337 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd2 | 9294 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM SIGNAL_INSTANCE | iobm/IOS_FSM_FFd2.SI | iobm/IOS_FSM_FFd2 | 0 | 11 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd3 | 9292 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd1 | 9293 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd2 | 9294 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX +NODE | C8M_IBUF | 9279 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ETACK | 9402 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM +NODE | iobm/ETACK | 9323 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrf | 9409 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM +NODE | iobm/BERRrf | 9333 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrr | 9410 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM +NODE | iobm/BERRrr | 9334 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrf | 9412 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM +NODE | iobm/DTACKrf | 9321 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrr | 9413 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM +NODE | iobm/DTACKrr | 9322 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrf | 9416 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM +NODE | iobm/RESrf | 9336 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrr | 9417 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM +NODE | iobm/RESrr | 9337 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/IOS_FSM_FFd2.D1 | 9727 | ? | 553 | 4096 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/IOS_FSM_FFd2.D1 | 9666 | ? | 0 | 4096 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/IOS_FSM_FFd2.D2 | 9728 | ? | 553 | 4096 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/IOS_FSM_FFd2.D2 | 9667 | ? | 0 | 4096 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2 SPPTERM | 3 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 SPPTERM | 5 | IV_TRUE | C8M_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/ETACK -SPPTERM | 6 | IV_TRUE | C8M_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr SPPTERM | 6 | IV_TRUE | C8M_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr +SPPTERM | 6 | IV_TRUE | C8M_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr SPPTERM | 6 | IV_TRUE | C8M_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr SRFF_INSTANCE | iobm/IOS_FSM_FFd2.REG | iobm/IOS_FSM_FFd2 | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/IOS_FSM_FFd2.D | 9726 | ? | 553 | 0 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.XOR | 0 | 7 | ALU_F +NODE | iobm/IOS_FSM_FFd2.D | 9665 | ? | 0 | 0 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/IOS_FSM_FFd2.Q | 9729 | ? | 574 | 0 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB | CLK2X_IOB +NODE | iobm/IOS_FSM_FFd2.Q | 9668 | ? | 0 | 0 | iobm/IOS_FSM_FFd2 | NULL | NULL | iobm/IOS_FSM_FFd2.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | ram/RS_FSM_FFd2 | WarpSE_COPY_0_COPY_0 | 2155873536 | 10 | 1 +MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | ram/RS_FSM_FFd3 | WarpSE_COPY_0_COPY_0 | 2155877632 | 11 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd1 | 9290 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM +NODE | ram/RefUrg | 9297 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrg.Q | ram/RefUrg | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefReq | 9395 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9394 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +NODE | ram/BACTr | 9314 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RA_5_OBUF.EXP | 10112 | ? | 524 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.EXP | RA_5_OBUF | 4 | 0 | MC_EXPORT +NODE | nBR_IOB_OBUF.EXP | 10032 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nBR_IOB_OBUF.EXP | nBR_IOB_OBUF | 4 | 0 | MC_EXPORT INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | cnt/INITS_FSM_FFd1.EXP | 10033 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd1.EXP | cnt/INITS_FSM_FFd1 | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -SIGNAL_INSTANCE | ram/RS_FSM_FFd2.SI | ram/RS_FSM_FFd2 | 0 | 9 | 2 +SIGNAL_INSTANCE | ram/RS_FSM_FFd3.SI | ram/RS_FSM_FFd3 | 0 | 10 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd1 | 9290 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM +NODE | ram/RefUrg | 9297 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrg.Q | ram/RefUrg | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefReq | 9395 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9394 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +NODE | ram/BACTr | 9314 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RA_5_OBUF.EXP | 10112 | ? | 524 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.EXP | RA_5_OBUF | 4 | 0 | MC_EXPORT +NODE | nBR_IOB_OBUF.EXP | 10032 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nBR_IOB_OBUF.EXP | nBR_IOB_OBUF | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/INITS_FSM_FFd1.EXP | 10033 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd1.EXP | cnt/INITS_FSM_FFd1 | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | ram/RS_FSM_FFd2.D1 | 9731 | ? | 524 | 4096 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | ram/RS_FSM_FFd3.D1 | 9670 | ? | 0 | 4096 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | ram/RS_FSM_FFd2.D2 | 9732 | ? | 524 | 4096 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | RA_5_OBUF.EXP -SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2 -SPPTERM | 3 | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 -SPPTERM | 3 | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf -SPPTERM | 4 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | ram/BACTr -SPPTERM | 4 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefReq - -SRFF_INSTANCE | ram/RS_FSM_FFd2.REG | ram/RS_FSM_FFd2 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | ram/RS_FSM_FFd2.D | 9730 | ? | 524 | 0 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | ram/RS_FSM_FFd2.Q | 9733 | ? | 541 | 0 | ram/RS_FSM_FFd2 | NULL | NULL | ram/RS_FSM_FFd2.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobs/PS_FSM_FFd2 | WarpSE_COPY_0_COPY_0 | 2155877376 | 13 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOACTr | 9391 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/nBR_IOB | 9367 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.Q | cnt/nBR_IOB | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/PORS_FSM_FFd1 | 9390 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/PORS_FSM_FFd2 | 9392 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/IPL2r | 9400 | ? | 491 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/IPL2r.Q | cnt/IPL2r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP28_.EXP | 10145 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP28_.EXP | EXP28_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | iobs/PS_FSM_FFd2.EXP | 10146 | ? | 487 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.EXP | iobs/PS_FSM_FFd2 | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | iobs/PS_FSM_FFd2.SI | iobs/PS_FSM_FFd2 | 0 | 12 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOACTr | 9391 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/nBR_IOB | 9367 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.Q | cnt/nBR_IOB | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/PORS_FSM_FFd1 | 9390 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/PORS_FSM_FFd2 | 9392 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/IPL2r | 9400 | ? | 491 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/IPL2r.Q | cnt/IPL2r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP28_.EXP | 10145 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP28_.EXP | EXP28_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobs/PS_FSM_FFd2.D1 | 9735 | ? | 525 | 4096 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobs/PS_FSM_FFd2.D2 | 9736 | ? | 525 | 4096 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | EXP28_.EXP -SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/IOACTr -SPPTERM | 3 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_FALSE | iobs/ALE1 -SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | iobs/PS_FSM_FFd2.EXP | 10133 | ? | 487 | 0 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 3 | IV_TRUE | cnt/nBR_IOB | IV_FALSE | cnt/PORS_FSM_FFd1 | IV_FALSE | cnt/PORS_FSM_FFd2 -SPPTERM | 4 | IV_FALSE | cnt/nBR_IOB | IV_FALSE | cnt/PORS_FSM_FFd1 | IV_TRUE | cnt/PORS_FSM_FFd2 | IV_TRUE | cnt/IPL2r - -SRFF_INSTANCE | iobs/PS_FSM_FFd2.REG | iobs/PS_FSM_FFd2 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobs/PS_FSM_FFd2.D | 9734 | ? | 525 | 0 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobs/PS_FSM_FFd2.Q | 9737 | ? | 539 | 0 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RefUrgent | WarpSE_COPY_0_COPY_0 | 2155873280 | 3 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefDone | 9346 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RegUrgentSync | 9433 | ? | 526 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RegUrgentSync.Q | ram/RegUrgentSync | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | ram/RefUrgent.SI | ram/RefUrgent | 0 | 2 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefDone | 9346 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RegUrgentSync | 9433 | ? | 526 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RegUrgentSync.Q | ram/RegUrgentSync | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | ram/RefUrgent.D1 | 9739 | ? | 526 | 4096 | ram/RefUrgent | NULL | NULL | ram/RefUrgent.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | ram/RefUrgent.D2 | 9740 | ? | 526 | 4096 | ram/RefUrgent | NULL | NULL | ram/RefUrgent.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_FALSE | ram/RefDone | IV_TRUE | ram/RegUrgentSync - -SRFF_INSTANCE | ram/RefUrgent.REG | ram/RefUrgent | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | ram/RefUrgent.D | 9738 | ? | 526 | 0 | ram/RefUrgent | NULL | NULL | ram/RefUrgent.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | ram/RefUrgent.Q | 9741 | ? | 540 | 0 | ram/RefUrgent | NULL | NULL | ram/RefUrgent.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | ram/RS_FSM_FFd3 | WarpSE_COPY_0_COPY_0 | 2155877632 | 15 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/nBERR_FSB.UIM | 9365 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.Q | iobs/nBERR_FSB | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOACTr | 9391 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOBERR | 9396 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP27_.EXP | 10142 | ? | 527 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP27_.EXP | EXP27_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | ram/RS_FSM_FFd3.EXP | 10143 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.EXP | ram/RS_FSM_FFd3 | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | ram/RS_FSM_FFd3.SI | ram/RS_FSM_FFd3 | 0 | 14 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/nBERR_FSB.UIM | 9365 | ? | 521 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.Q | iobs/nBERR_FSB | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOACTr | 9391 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOBERR | 9396 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP27_.EXP | 10142 | ? | 527 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP27_.EXP | EXP27_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | ram/RS_FSM_FFd3.D1 | 9743 | ? | 527 | 4096 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | ram/RS_FSM_FFd3.D2 | 9744 | ? | 527 | 4096 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | EXP27_.EXP -SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 -SPPTERM | 5 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | ram/RS_FSM_FFd3.EXP | 10130 | ? | 521 | 0 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 6 | IV_TRUE | iobs/Once | IV_FALSE | iobs/nBERR_FSB.UIM | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_FALSE | iobm/IOBERR | IV_TRUE | iobs/ALE1 -SPPTERM | 7 | IV_TRUE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | iobs/nBERR_FSB.UIM | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_TRUE | iobm/IOBERR | IV_TRUE | iobs/ALE1 -SPPTERM | 7 | IV_TRUE | iobs/Once | IV_TRUE | iobs/nBERR_FSB.UIM | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_TRUE | iobm/IOBERR | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1 +SIGNAL | NODE | ram/RS_FSM_FFd3.D2 | 9671 | ? | 0 | 4096 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | nBR_IOB_OBUF.EXP +SPPTERM | 1 | IV_TRUE | cnt/INITS_FSM_FFd1.EXP +SPPTERM | 3 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd3 +SPPTERM | 4 | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 +SPPTERM | 4 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefUrg +SPPTERM | 4 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf +SPPTERM | 6 | IV_FALSE | cs/nOverlay | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefUrg | IV_TRUE | ram/BACTr SRFF_INSTANCE | ram/RS_FSM_FFd3.REG | ram/RS_FSM_FFd3 | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | ram/RS_FSM_FFd3.D | 9742 | ? | 527 | 0 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.XOR | 0 | 7 | ALU_F +NODE | ram/RS_FSM_FFd3.D | 9669 | ? | 0 | 0 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | ram/RS_FSM_FFd3.Q | 9745 | ? | 540 | 0 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB +NODE | ram/RS_FSM_FFd3.Q | 9672 | ? | 0 | 0 | ram/RS_FSM_FFd3 | NULL | NULL | ram/RS_FSM_FFd3.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobs/PS_FSM_FFd2 | WarpSE_COPY_0_COPY_0 | 2155877376 | 13 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOACTr | 9307 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nOE_OBUF.EXP | 10001 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nOE_OBUF.EXP | nOE_OBUF | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2.EXP | 10002 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.EXP | ram/RS_FSM_FFd2 | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobs/PS_FSM_FFd2.SI | iobs/PS_FSM_FFd2 | 0 | 12 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOACTr | 9307 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nOE_OBUF.EXP | 10001 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nOE_OBUF.EXP | nOE_OBUF | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2.EXP | 10002 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.EXP | ram/RS_FSM_FFd2 | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobs/PS_FSM_FFd2.D1 | 9674 | ? | 0 | 4096 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobs/PS_FSM_FFd2.D2 | 9675 | ? | 0 | 4096 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | nOE_OBUF.EXP +SPPTERM | 1 | IV_TRUE | ram/RS_FSM_FFd2.EXP +SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/IOACTr +SPPTERM | 3 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_FALSE | ALE1 +SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 +SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf +SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 + +SRFF_INSTANCE | iobs/PS_FSM_FFd2.REG | iobs/PS_FSM_FFd2 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobs/PS_FSM_FFd2.D | 9673 | ? | 0 | 0 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobs/PS_FSM_FFd2.Q | 9676 | ? | 0 | 0 | iobs/PS_FSM_FFd2 | NULL | NULL | iobs/PS_FSM_FFd2.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RefUrg | WarpSE_COPY_0_COPY_0 | 2155873280 | 3 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RefDone | 9264 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RegUrgSync | 9348 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RegUrgSync.Q | ram/RegUrgSync | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | ram/RefUrg | 9297 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrg.Q | ram/RefUrg | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | ram/RefUrg.SI | ram/RefUrg | 0 | 2 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RefDone | 9264 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RegUrgSync | 9348 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RegUrgSync.Q | ram/RegUrgSync | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | ram/RefUrg.D1 | 9678 | ? | 0 | 4096 | ram/RefUrg | NULL | NULL | ram/RefUrg.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | ram/RefUrg.D2 | 9679 | ? | 0 | 4096 | ram/RefUrg | NULL | NULL | ram/RefUrg.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_FALSE | ram/RefDone | IV_TRUE | ram/RegUrgSync + +SRFF_INSTANCE | ram/RefUrg.REG | ram/RefUrg | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | ram/RefUrg.D | 9677 | ? | 0 | 0 | ram/RefUrg | NULL | NULL | ram/RefUrg.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | ram/RefUrg.Q | 9680 | ? | 0 | 0 | ram/RefUrg | NULL | NULL | ram/RefUrg.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | Inv+PrldLow+Tff+OptxMapped | iobm/ES<0> | WarpSE_COPY_0_COPY_0 | 2155877632 | 8 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM +NODE | iobm/ES<0> | 9298 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er | 9403 | ? | 569 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM +NODE | iobm/Er | 9313 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er2 | 9415 | ? | 558 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM +NODE | iobm/Er2 | 9324 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +NODE | iobm/ES<1> | 9299 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<2> | 9387 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM +NODE | iobm/ES<2> | 9300 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<3> | 9388 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM +NODE | iobm/ES<3> | 9303 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<4> | 9389 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM +NODE | iobm/ES<4> | 9304 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM +NODE | iobm/ES<0> | 9298 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM SIGNAL_INSTANCE | iobm/ES<0>.SI | iobm/ES<0> | 0 | 7 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM +NODE | iobm/ES<0> | 9298 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er | 9403 | ? | 569 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM +NODE | iobm/Er | 9313 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er2 | 9415 | ? | 558 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM +NODE | iobm/Er2 | 9324 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +NODE | iobm/ES<1> | 9299 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<2> | 9387 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM +NODE | iobm/ES<2> | 9300 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<3> | 9388 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM +NODE | iobm/ES<3> | 9303 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<4> | 9389 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM +NODE | iobm/ES<4> | 9304 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/ES<0>.D1 | 9747 | ? | 554 | 4096 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/ES<0>.D1 | 9682 | ? | 0 | 4096 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/ES<0>.D2 | 9748 | ? | 554 | 4096 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/ES<0>.D2 | 9683 | ? | 0 | 4096 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.SI | 2 | 9 | MC_SI_D2 SPPTERM | 3 | IV_TRUE | iobm/ES<0> | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2 SPPTERM | 6 | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4> | IV_TRUE | iobm/Er SPPTERM | 6 | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_FALSE | iobm/ES<4> | IV_FALSE | iobm/Er2 SRFF_INSTANCE | iobm/ES<0>.REG | iobm/ES<0> | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/ES<0>.D | 9746 | ? | 554 | 0 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.XOR | 0 | 7 | ALU_F +NODE | iobm/ES<0>.D | 9681 | ? | 0 | 0 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/ES<0>.Q | 9749 | ? | 561 | 0 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/PS_FSM_FFd1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 8 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOACTr | 9391 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nUDS_FSB_IBUF | 9358 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | iobs/PS_FSM_FFd1.EXP | 10139 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.EXP | iobs/PS_FSM_FFd1 | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | iobs/PS_FSM_FFd1.SI | iobs/PS_FSM_FFd1 | 0 | 7 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOACTr | 9391 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nUDS_FSB_IBUF | 9358 | ? | 518 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobs/PS_FSM_FFd1.D1 | 9751 | ? | 528 | 4096 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobs/PS_FSM_FFd1.D2 | 9752 | ? | 528 | 4096 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | iobs/PS_FSM_FFd2 -SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/IOACTr -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | iobs/PS_FSM_FFd1.EXP | 10126 | ? | 0 | 0 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 4 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nUDS_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RAMEN - -SRFF_INSTANCE | iobs/PS_FSM_FFd1.REG | iobs/PS_FSM_FFd1 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobs/PS_FSM_FFd1.D | 9750 | ? | 528 | 0 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobs/PS_FSM_FFd1.Q | 9753 | ? | 539 | 0 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RAMEN | WarpSE_COPY_0_COPY_0 | 2155873280 | 11 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9394 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefReq | 9395 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RA_4_OBUF.EXP | 10110 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.EXP | RA_4_OBUF | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | ram/RAMEN.SI | ram/RAMEN | 0 | 10 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9394 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefReq | 9395 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RA_4_OBUF.EXP | 10110 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.EXP | RA_4_OBUF | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | ram/RAMEN.D1 | 9755 | ? | 529 | 4096 | ram/RAMEN | NULL | NULL | ram/RAMEN.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | ram/RAMEN.D2 | 9756 | ? | 529 | 4096 | ram/RAMEN | NULL | NULL | ram/RAMEN.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | RA_4_OBUF.EXP -SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RAMEN -SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd3 | IV_TRUE | ram/RAMEN -SPPTERM | 4 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RefUrgent | IV_TRUE | ram/RAMEN | IV_TRUE | ram/BACTr -SPPTERM | 4 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RefUrgent | IV_TRUE | ram/RAMEN | IV_FALSE | ram/RefReq -SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | fsb/ASrf - -SRFF_INSTANCE | ram/RAMEN.REG | ram/RAMEN | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | ram/RAMEN.D | 9754 | ? | 529 | 0 | ram/RAMEN | NULL | NULL | ram/RAMEN.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | ram/RAMEN.Q | 9757 | ? | 540 | 0 | ram/RAMEN | NULL | NULL | ram/RAMEN.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | cnt/Timer<1> | WarpSE_COPY_0_COPY_0 | 2155873280 | 4 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<1> | 9382 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/Timer<1> | 9382 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | cnt/Timer<1>.SI | cnt/Timer<1> | 0 | 4 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<1> | 9382 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/Timer<1>.D1 | 9759 | ? | 0 | 4096 | cnt/Timer<1> | NULL | NULL | cnt/Timer<1>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/Timer<1>.D2 | 9760 | ? | 0 | 4096 | cnt/Timer<1> | NULL | NULL | cnt/Timer<1>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_FALSE | cnt/TimerTC | IV_TRUE | cnt/Timer<1> | IV_FALSE | cnt/Timer<0> -SPPTERM | 3 | IV_FALSE | cnt/TimerTC | IV_FALSE | cnt/Timer<1> | IV_TRUE | cnt/Timer<0> -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | cnt/Timer<1>.CLKF | 9761 | ? | 0 | 4096 | cnt/Timer<1> | NULL | NULL | cnt/Timer<1>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 1 | IV_TRUE | E_IBUF - -SRFF_INSTANCE | cnt/Timer<1>.REG | cnt/Timer<1> | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/Timer<1>.D | 9758 | ? | 0 | 0 | cnt/Timer<1> | NULL | NULL | cnt/Timer<1>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | cnt/Timer<1>.CLKF | 9761 | ? | 0 | 4096 | cnt/Timer<1> | NULL | NULL | cnt/Timer<1>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 1 | IV_TRUE | E_IBUF -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/Timer<1>.Q | 9762 | ? | 0 | 0 | cnt/Timer<1> | NULL | NULL | cnt/Timer<1>.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/Timer<2> | WarpSE_COPY_0_COPY_0 | 2155877376 | 5 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<1> | 9382 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<2> | 9383 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/Timer<2> | 9383 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | cnt/Timer<2>.SI | cnt/Timer<2> | 0 | 5 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<1> | 9382 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<2> | 9383 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/Timer<2>.D1 | 9764 | ? | 0 | 4096 | cnt/Timer<2> | NULL | NULL | cnt/Timer<2>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/Timer<2>.D2 | 9765 | ? | 0 | 4096 | cnt/Timer<2> | NULL | NULL | cnt/Timer<2>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | cnt/TimerTC | IV_TRUE | cnt/Timer<2> -SPPTERM | 3 | IV_FALSE | cnt/TimerTC | IV_TRUE | cnt/Timer<1> | IV_TRUE | cnt/Timer<0> -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | cnt/Timer<2>.CLKF | 9766 | ? | 0 | 4096 | cnt/Timer<2> | NULL | NULL | cnt/Timer<2>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 1 | IV_TRUE | E_IBUF - -SRFF_INSTANCE | cnt/Timer<2>.REG | cnt/Timer<2> | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/Timer<2>.D | 9763 | ? | 0 | 0 | cnt/Timer<2> | NULL | NULL | cnt/Timer<2>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | cnt/Timer<2>.CLKF | 9766 | ? | 0 | 4096 | cnt/Timer<2> | NULL | NULL | cnt/Timer<2>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 1 | IV_TRUE | E_IBUF -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/Timer<2>.Q | 9767 | ? | 0 | 0 | cnt/Timer<2> | NULL | NULL | cnt/Timer<2>.REG | 0 | 8 | SRFF_Q +NODE | iobm/ES<0>.Q | 9684 | ? | 0 | 0 | iobm/ES<0> | NULL | NULL | iobm/ES<0>.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobm/ES<1> | WarpSE_COPY_0_COPY_0 | 2155873536 | 5 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM +NODE | iobm/ES<0> | 9298 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +NODE | iobm/ES<1> | 9299 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er | 9403 | ? | 569 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM +NODE | iobm/Er | 9313 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er2 | 9415 | ? | 558 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM +NODE | iobm/Er2 | 9324 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +NODE | iobm/ES<1> | 9299 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM SIGNAL_INSTANCE | iobm/ES<1>.SI | iobm/ES<1> | 0 | 4 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM +NODE | iobm/ES<0> | 9298 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +NODE | iobm/ES<1> | 9299 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er | 9403 | ? | 569 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM +NODE | iobm/Er | 9313 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er2 | 9415 | ? | 558 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM +NODE | iobm/Er2 | 9324 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/ES<1>.D1 | 9769 | ? | 555 | 4096 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/ES<1>.D1 | 9686 | ? | 0 | 4096 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/ES<1>.D2 | 9770 | ? | 555 | 4096 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/ES<1>.D2 | 9687 | ? | 0 | 4096 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.SI | 2 | 9 | MC_SI_D2 SPPTERM | 2 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> SPPTERM | 2 | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> SPPTERM | 2 | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2 SRFF_INSTANCE | iobm/ES<1>.REG | iobm/ES<1> | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/ES<1>.D | 9768 | ? | 555 | 0 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.XOR | 0 | 7 | ALU_F +NODE | iobm/ES<1>.D | 9685 | ? | 0 | 0 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/ES<1>.Q | 9771 | ? | 561 | 0 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | cnt/Timer<0> | WarpSE_COPY_0_COPY_0 | 2155873280 | 3 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | cnt/Timer<0>.SI | cnt/Timer<0> | 0 | 3 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/Timer<0>.D1 | 9773 | ? | 0 | 4096 | cnt/Timer<0> | NULL | NULL | cnt/Timer<0>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/Timer<0>.D2 | 9774 | ? | 0 | 4096 | cnt/Timer<0> | NULL | NULL | cnt/Timer<0>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_FALSE | cnt/TimerTC | IV_FALSE | cnt/Timer<0> -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | cnt/Timer<0>.CLKF | 9775 | ? | 0 | 4096 | cnt/Timer<0> | NULL | NULL | cnt/Timer<0>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 1 | IV_TRUE | E_IBUF - -SRFF_INSTANCE | cnt/Timer<0>.REG | cnt/Timer<0> | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/Timer<0>.D | 9772 | ? | 0 | 0 | cnt/Timer<0> | NULL | NULL | cnt/Timer<0>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | cnt/Timer<0>.CLKF | 9775 | ? | 0 | 4096 | cnt/Timer<0> | NULL | NULL | cnt/Timer<0>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 1 | IV_TRUE | E_IBUF -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/Timer<0>.Q | 9776 | ? | 0 | 0 | cnt/Timer<0> | NULL | NULL | cnt/Timer<0>.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/Timer<3> | WarpSE_COPY_0_COPY_0 | 2155877376 | 6 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<1> | 9382 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<2> | 9383 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<3> | 9386 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<3>.Q | cnt/Timer<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/Timer<3> | 9386 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<3>.Q | cnt/Timer<3> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | cnt/Timer<3>.SI | cnt/Timer<3> | 0 | 6 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/TimerTC | 9370 | ? | 486 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<1> | 9382 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<2> | 9383 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<3> | 9386 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<3>.Q | cnt/Timer<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/Timer<3>.D1 | 9778 | ? | 0 | 4096 | cnt/Timer<3> | NULL | NULL | cnt/Timer<3>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/Timer<3>.D2 | 9779 | ? | 0 | 4096 | cnt/Timer<3> | NULL | NULL | cnt/Timer<3>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | cnt/TimerTC | IV_TRUE | cnt/Timer<3> -SPPTERM | 4 | IV_FALSE | cnt/TimerTC | IV_TRUE | cnt/Timer<1> | IV_TRUE | cnt/Timer<2> | IV_TRUE | cnt/Timer<0> -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | cnt/Timer<3>.CLKF | 9780 | ? | 0 | 4096 | cnt/Timer<3> | NULL | NULL | cnt/Timer<3>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 1 | IV_TRUE | E_IBUF - -SRFF_INSTANCE | cnt/Timer<3>.REG | cnt/Timer<3> | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/Timer<3>.D | 9777 | ? | 0 | 0 | cnt/Timer<3> | NULL | NULL | cnt/Timer<3>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | cnt/Timer<3>.CLKF | 9780 | ? | 0 | 4096 | cnt/Timer<3> | NULL | NULL | cnt/Timer<3>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 1 | IV_TRUE | E_IBUF -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/Timer<3>.Q | 9781 | ? | 0 | 0 | cnt/Timer<3> | NULL | NULL | cnt/Timer<3>.REG | 0 | 8 | SRFF_Q +NODE | iobm/ES<1>.Q | 9688 | ? | 0 | 0 | iobm/ES<1> | NULL | NULL | iobm/ES<1>.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobm/ES<2> | WarpSE_COPY_0_COPY_0 | 2155873536 | 8 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM +NODE | iobm/ES<0> | 9298 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<2> | 9387 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM +NODE | iobm/ES<2> | 9300 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +NODE | iobm/ES<1> | 9299 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er | 9403 | ? | 569 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM +NODE | iobm/Er | 9313 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er2 | 9415 | ? | 558 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM +NODE | iobm/Er2 | 9324 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<3> | 9388 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM +NODE | iobm/ES<3> | 9303 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<4> | 9389 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM +NODE | iobm/ES<4> | 9304 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/ES<2> | 9387 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM +NODE | iobm/ES<2> | 9300 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM SIGNAL_INSTANCE | iobm/ES<2>.SI | iobm/ES<2> | 0 | 7 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM +NODE | iobm/ES<0> | 9298 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<2> | 9387 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM +NODE | iobm/ES<2> | 9300 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +NODE | iobm/ES<1> | 9299 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er | 9403 | ? | 569 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM +NODE | iobm/Er | 9313 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er2 | 9415 | ? | 558 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM +NODE | iobm/Er2 | 9324 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<3> | 9388 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM +NODE | iobm/ES<3> | 9303 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<4> | 9389 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM +NODE | iobm/ES<4> | 9304 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/ES<2>.D1 | 9783 | ? | 556 | 4096 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/ES<2>.D1 | 9690 | ? | 0 | 4096 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/ES<2>.D2 | 9784 | ? | 556 | 4096 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/ES<2>.D2 | 9691 | ? | 0 | 4096 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.SI | 2 | 9 | MC_SI_D2 SPPTERM | 2 | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<2> SPPTERM | 2 | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> SPPTERM | 2 | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2 @@ -3564,102 +3564,244 @@ SPPTERM | 3 | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_TRUE | iobm/ES< SRFF_INSTANCE | iobm/ES<2>.REG | iobm/ES<2> | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/ES<2>.D | 9782 | ? | 556 | 0 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.XOR | 0 | 7 | ALU_F +NODE | iobm/ES<2>.D | 9689 | ? | 0 | 0 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/ES<2>.Q | 9785 | ? | 561 | 0 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB +NODE | iobm/ES<2>.Q | 9692 | ? | 0 | 0 | iobm/ES<2> | NULL | NULL | iobm/ES<2>.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/PS_FSM_FFd1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 7 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOACTr | 9307 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RASEL | 9289 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_5_IBUF | 9345 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_5_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | iobs/PS_FSM_FFd1.EXP | 10004 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.EXP | iobs/PS_FSM_FFd1 | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | iobs/PS_FSM_FFd1.SI | iobs/PS_FSM_FFd1 | 0 | 6 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOACTr | 9307 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RASEL | 9289 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_5_IBUF | 9345 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_5_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobs/PS_FSM_FFd1.D1 | 9694 | ? | 0 | 4096 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobs/PS_FSM_FFd1.D2 | 9695 | ? | 0 | 4096 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | iobs/PS_FSM_FFd2 +SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/IOACTr +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | iobs/PS_FSM_FFd1.EXP | 9992 | ? | 0 | 0 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 2 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | ram/RASEL +SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_5_IBUF + +SRFF_INSTANCE | iobs/PS_FSM_FFd1.REG | iobs/PS_FSM_FFd1 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobs/PS_FSM_FFd1.D | 9693 | ? | 0 | 0 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobs/PS_FSM_FFd1.Q | 9696 | ? | 0 | 0 | iobs/PS_FSM_FFd1 | NULL | NULL | iobs/PS_FSM_FFd1.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RAMEN | WarpSE_COPY_0_COPY_0 | 2155873280 | 16 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9290 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMEN | 9302 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RefUrg | 9297 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrg.Q | ram/RefUrg | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RefReq | 9315 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9314 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nBR_IOB_OBUF | 9287 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nBR_IOB_OBUF.Q | nBR_IOB_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/INITS_FSM_FFd1 | 9305 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd1.Q | cnt/INITS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/INITS_FSM_FFd2 | 9306 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd2.Q | cnt/INITS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/nIPL2r | 9319 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nIPL2r.Q | cnt/nIPL2r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP22_.EXP | 10030 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP22_.EXP | EXP22_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | ram/RAMEN | 9302 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | ram/RAMEN.EXP | 10031 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.EXP | ram/RAMEN | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | ram/RAMEN.SI | ram/RAMEN | 0 | 15 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9290 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMEN | 9302 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RefUrg | 9297 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrg.Q | ram/RefUrg | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RefReq | 9315 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/BACTr | 9314 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nBR_IOB_OBUF | 9287 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nBR_IOB_OBUF.Q | nBR_IOB_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/INITS_FSM_FFd1 | 9305 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd1.Q | cnt/INITS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/INITS_FSM_FFd2 | 9306 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd2.Q | cnt/INITS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/nIPL2r | 9319 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nIPL2r.Q | cnt/nIPL2r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP22_.EXP | 10030 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP22_.EXP | EXP22_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | ram/RAMEN.D1 | 9698 | ? | 0 | 4096 | ram/RAMEN | NULL | NULL | ram/RAMEN.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | ram/RAMEN.D2 | 9699 | ? | 0 | 4096 | ram/RAMEN | NULL | NULL | ram/RAMEN.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | EXP22_.EXP +SPPTERM | 4 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RefUrg | IV_TRUE | ram/RAMEN | IV_TRUE | ram/BACTr +SPPTERM | 4 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RefUrg | IV_TRUE | ram/RAMEN | IV_FALSE | ram/RefReq +SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RAMEN +SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RAMEN | IV_TRUE | fsb/ASrf +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | ram/RAMEN.EXP | 10020 | ? | 0 | 0 | ram/RAMEN | NULL | NULL | ram/RAMEN.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 4 | IV_FALSE | nBR_IOB_OBUF | IV_FALSE | cnt/INITS_FSM_FFd1 | IV_TRUE | cnt/INITS_FSM_FFd2 | IV_FALSE | cnt/nIPL2r + +SRFF_INSTANCE | ram/RAMEN.REG | ram/RAMEN | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | ram/RAMEN.D | 9697 | ? | 0 | 0 | ram/RAMEN | NULL | NULL | ram/RAMEN.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | ram/RAMEN.Q | 9700 | ? | 0 | 0 | ram/RAMEN | NULL | NULL | ram/RAMEN.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobm/ES<3> | WarpSE_COPY_0_COPY_0 | 2155877376 | 7 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<3> | 9388 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM +NODE | iobm/ES<3> | 9303 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er | 9403 | ? | 569 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM +NODE | iobm/Er | 9313 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er2 | 9415 | ? | 558 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM +NODE | iobm/Er2 | 9324 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM +NODE | iobm/ES<0> | 9298 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +NODE | iobm/ES<1> | 9299 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<2> | 9387 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM +NODE | iobm/ES<2> | 9300 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/ES<3> | 9388 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM +NODE | iobm/ES<3> | 9303 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM SIGNAL_INSTANCE | iobm/ES<3>.SI | iobm/ES<3> | 0 | 6 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<3> | 9388 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM +NODE | iobm/ES<3> | 9303 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er | 9403 | ? | 569 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM +NODE | iobm/Er | 9313 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er2 | 9415 | ? | 558 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM +NODE | iobm/Er2 | 9324 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM +NODE | iobm/ES<0> | 9298 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +NODE | iobm/ES<1> | 9299 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<2> | 9387 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM +NODE | iobm/ES<2> | 9300 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/ES<3>.D1 | 9787 | ? | 557 | 4096 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/ES<3>.D1 | 9702 | ? | 0 | 4096 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/ES<3>.D2 | 9788 | ? | 557 | 4096 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/ES<3>.D2 | 9703 | ? | 0 | 4096 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.SI | 2 | 9 | MC_SI_D2 SPPTERM | 3 | IV_TRUE | iobm/ES<3> | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2 SPPTERM | 4 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_TRUE | iobm/Er SPPTERM | 4 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_FALSE | iobm/Er2 SRFF_INSTANCE | iobm/ES<3>.REG | iobm/ES<3> | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/ES<3>.D | 9786 | ? | 557 | 0 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.XOR | 0 | 7 | ALU_F +NODE | iobm/ES<3>.D | 9701 | ? | 0 | 0 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/ES<3>.Q | 9789 | ? | 561 | 0 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB +NODE | iobm/ES<3>.Q | 9704 | ? | 0 | 0 | iobm/ES<3> | NULL | NULL | iobm/ES<3>.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobm/ES<4> | WarpSE_COPY_0_COPY_0 | 2155877376 | 8 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<4> | 9389 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM +NODE | iobm/ES<4> | 9304 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er | 9403 | ? | 569 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM +NODE | iobm/Er | 9313 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er2 | 9415 | ? | 558 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM +NODE | iobm/Er2 | 9324 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM +NODE | iobm/ES<0> | 9298 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +NODE | iobm/ES<1> | 9299 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<2> | 9387 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM +NODE | iobm/ES<2> | 9300 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<3> | 9388 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM +NODE | iobm/ES<3> | 9303 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/ES<4> | 9389 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM +NODE | iobm/ES<4> | 9304 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM SIGNAL_INSTANCE | iobm/ES<4>.SI | iobm/ES<4> | 0 | 7 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<4> | 9389 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM +NODE | iobm/ES<4> | 9304 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er | 9403 | ? | 569 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM +NODE | iobm/Er | 9313 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er2 | 9415 | ? | 558 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM +NODE | iobm/Er2 | 9324 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM +NODE | iobm/ES<0> | 9298 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +NODE | iobm/ES<1> | 9299 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<2> | 9387 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM +NODE | iobm/ES<2> | 9300 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<3> | 9388 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM +NODE | iobm/ES<3> | 9303 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/ES<4>.D1 | 9791 | ? | 558 | 4096 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/ES<4>.D1 | 9706 | ? | 0 | 4096 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/ES<4>.D2 | 9792 | ? | 558 | 4096 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/ES<4>.D2 | 9707 | ? | 0 | 4096 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.SI | 2 | 9 | MC_SI_D2 SPPTERM | 3 | IV_TRUE | iobm/ES<4> | IV_FALSE | iobm/Er | IV_TRUE | iobm/Er2 SPPTERM | 5 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_TRUE | iobm/ES<3> | IV_TRUE | iobm/Er SPPTERM | 5 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_TRUE | iobm/ES<2> | IV_TRUE | iobm/ES<3> | IV_FALSE | iobm/Er2 @@ -3667,4186 +3809,3874 @@ SPPTERM | 5 | IV_TRUE | iobm/ES<0> | IV_TRUE | iobm/ES<1> | IV_FALSE | iobm/ES<2 SRFF_INSTANCE | iobm/ES<4>.REG | iobm/ES<4> | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/ES<4>.D | 9790 | ? | 558 | 0 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.XOR | 0 | 7 | ALU_F +NODE | iobm/ES<4>.D | 9705 | ? | 0 | 0 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/ES<4>.Q | 9793 | ? | 561 | 0 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB +NODE | iobm/ES<4>.Q | 9708 | ? | 0 | 0 | iobm/ES<4> | NULL | NULL | iobm/ES<4>.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cnt/PORS_FSM_FFd1 | WarpSE_COPY_0_COPY_0 | 2424312832 | 5 | 1 +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/INITS_FSM_FFd1 | WarpSE_COPY_0_COPY_0 | 2155877376 | 19 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/PORS_FSM_FFd1 | 9390 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | cnt/LTimerTC | 9268 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimerTC.Q | cnt/LTimerTC | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/PORS_FSM_FFd2 | 9392 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | cnt/INITS_FSM_FFd1 | 9305 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd1.Q | cnt/INITS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/IPL2r | 9400 | ? | 491 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/IPL2r.Q | cnt/IPL2r | 1 | 0 | MC_UIM +NODE | cnt/INITS_FSM_FFd2 | 9306 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd2.Q | cnt/INITS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/nIPL2r | 9319 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nIPL2r.Q | cnt/nIPL2r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9290 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RefUrg | 9297 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrg.Q | ram/RefUrg | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RefReq | 9315 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMEN | 9302 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/PORS_FSM_FFd1 | 9390 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | cnt/INITS_FSM_FFd1 | 9305 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd1.Q | cnt/INITS_FSM_FFd1 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | cnt/INITS_FSM_FFd1.EXP | 10033 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd1.EXP | cnt/INITS_FSM_FFd1 | 4 | 0 | MC_EXPORT -SIGNAL_INSTANCE | cnt/PORS_FSM_FFd1.SI | cnt/PORS_FSM_FFd1 | 0 | 4 | 2 +SIGNAL_INSTANCE | cnt/INITS_FSM_FFd1.SI | cnt/INITS_FSM_FFd1 | 0 | 18 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/PORS_FSM_FFd1 | 9390 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | cnt/LTimerTC | 9268 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimerTC.Q | cnt/LTimerTC | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/PORS_FSM_FFd2 | 9392 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | cnt/INITS_FSM_FFd1 | 9305 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd1.Q | cnt/INITS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/IPL2r | 9400 | ? | 491 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/IPL2r.Q | cnt/IPL2r | 1 | 0 | MC_UIM +NODE | cnt/INITS_FSM_FFd2 | 9306 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd2.Q | cnt/INITS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/nIPL2r | 9319 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nIPL2r.Q | cnt/nIPL2r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd1 | 9290 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RefUrg | 9297 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrg.Q | ram/RefUrg | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RefReq | 9315 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMEN | 9302 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/PORS_FSM_FFd1.D1 | 9795 | ? | 491 | 4096 | cnt/PORS_FSM_FFd1 | NULL | NULL | cnt/PORS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/INITS_FSM_FFd1.D1 | 9710 | ? | 0 | 4096 | cnt/INITS_FSM_FFd1 | NULL | NULL | cnt/INITS_FSM_FFd1.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/PORS_FSM_FFd1.D2 | 9796 | ? | 491 | 4096 | cnt/PORS_FSM_FFd1 | NULL | NULL | cnt/PORS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_TRUE | cnt/LTimer<13> | IV_FALSE | cnt/PORS_FSM_FFd1 | IV_TRUE | cnt/PORS_FSM_FFd2 | IV_FALSE | cnt/IPL2r +SIGNAL | NODE | cnt/INITS_FSM_FFd1.D2 | 9711 | ? | 0 | 4096 | cnt/INITS_FSM_FFd1 | NULL | NULL | cnt/INITS_FSM_FFd1.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 7 | IV_TRUE | cnt/TimerTC | IV_TRUE | cnt/LTimerTC | IV_FALSE | cnt/INITS_FSM_FFd1 | IV_TRUE | cnt/INITS_FSM_FFd2 | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/nIPL2r | IV_TRUE | cnt/Er<1> +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | cnt/INITS_FSM_FFd1.EXP | 10022 | ? | 0 | 0 | cnt/INITS_FSM_FFd1 | NULL | NULL | cnt/INITS_FSM_FFd1.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 6 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefUrg | IV_FALSE | ram/RefReq +SPPTERM | 6 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefUrg | IV_FALSE | fsb/ASrf +SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RAMEN +SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RAMEN | IV_TRUE | fsb/ASrf -SRFF_INSTANCE | cnt/PORS_FSM_FFd1.REG | cnt/PORS_FSM_FFd1 | 0 | 2 | 1 +SRFF_INSTANCE | cnt/INITS_FSM_FFd1.REG | cnt/INITS_FSM_FFd1 | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/PORS_FSM_FFd1.D | 9794 | ? | 491 | 0 | cnt/PORS_FSM_FFd1 | NULL | NULL | cnt/PORS_FSM_FFd1.XOR | 0 | 7 | ALU_F +NODE | cnt/INITS_FSM_FFd1.D | 9709 | ? | 0 | 0 | cnt/INITS_FSM_FFd1 | NULL | NULL | cnt/INITS_FSM_FFd1.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/PORS_FSM_FFd1.Q | 9797 | ? | 498 | 0 | cnt/PORS_FSM_FFd1 | NULL | NULL | cnt/PORS_FSM_FFd1.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB +NODE | cnt/INITS_FSM_FFd1.Q | 9712 | ? | 0 | 0 | cnt/INITS_FSM_FFd1 | NULL | NULL | cnt/INITS_FSM_FFd1.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | cnt/INITS_FSM_FFd2 | WarpSE_COPY_0_COPY_0 | 2155877376 | 7 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimerTC | 9268 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimerTC.Q | cnt/LTimerTC | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/INITS_FSM_FFd1 | 9305 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd1.Q | cnt/INITS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/INITS_FSM_FFd2 | 9306 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd2.Q | cnt/INITS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cnt/INITS_FSM_FFd2 | 9306 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd2.Q | cnt/INITS_FSM_FFd2 | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | cnt/INITS_FSM_FFd2.SI | cnt/INITS_FSM_FFd2 | 0 | 6 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/TimerTC | 9263 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/TimerTC.Q | cnt/TimerTC | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/LTimerTC | 9268 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimerTC.Q | cnt/LTimerTC | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/INITS_FSM_FFd1 | 9305 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd1.Q | cnt/INITS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/INITS_FSM_FFd2 | 9306 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd2.Q | cnt/INITS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/INITS_FSM_FFd2.D1 | 9714 | ? | 0 | 4096 | cnt/INITS_FSM_FFd2 | NULL | NULL | cnt/INITS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cnt/INITS_FSM_FFd2.D2 | 9715 | ? | 0 | 4096 | cnt/INITS_FSM_FFd2 | NULL | NULL | cnt/INITS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 6 | IV_TRUE | cnt/TimerTC | IV_TRUE | cnt/LTimerTC | IV_TRUE | cnt/INITS_FSM_FFd1 | IV_TRUE | cnt/INITS_FSM_FFd2 | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> +SPPTERM | 6 | IV_TRUE | cnt/TimerTC | IV_TRUE | cnt/LTimerTC | IV_FALSE | cnt/INITS_FSM_FFd1 | IV_FALSE | cnt/INITS_FSM_FFd2 | IV_FALSE | cnt/Er<0> | IV_TRUE | cnt/Er<1> + +SRFF_INSTANCE | cnt/INITS_FSM_FFd2.REG | cnt/INITS_FSM_FFd2 | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | cnt/INITS_FSM_FFd2.D | 9713 | ? | 0 | 0 | cnt/INITS_FSM_FFd2 | NULL | NULL | cnt/INITS_FSM_FFd2.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | cnt/INITS_FSM_FFd2.Q | 9716 | ? | 0 | 0 | cnt/INITS_FSM_FFd2 | NULL | NULL | cnt/INITS_FSM_FFd2.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/IOACTr | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOACT | 9404 | ? | 545 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOACT.Q | iobm/IOACT | 1 | 0 | MC_UIM +NODE | IOACT | 9310 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IOACT.Q | IOACT | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobs/IOACTr | 9391 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM +NODE | iobs/IOACTr | 9307 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM SIGNAL_INSTANCE | iobs/IOACTr.SI | iobs/IOACTr | 0 | 1 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOACT | 9404 | ? | 545 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOACT.Q | iobm/IOACT | 1 | 0 | MC_UIM +NODE | IOACT | 9310 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IOACT.Q | IOACT | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobs/IOACTr.D1 | 9799 | ? | 530 | 4096 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobs/IOACTr.D1 | 9718 | ? | 0 | 4096 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobs/IOACTr.D2 | 9800 | ? | 530 | 4096 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | iobm/IOACT +SIGNAL | NODE | iobs/IOACTr.D2 | 9719 | ? | 0 | 4096 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | IOACT SRFF_INSTANCE | iobs/IOACTr.REG | iobs/IOACTr | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobs/IOACTr.D | 9798 | ? | 530 | 0 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.XOR | 0 | 7 | ALU_F +NODE | iobs/IOACTr.D | 9717 | ? | 0 | 0 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobs/IOACTr.Q | 9801 | ? | 539 | 0 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | cnt/PORS_FSM_FFd2 | WarpSE_COPY_0_COPY_0 | 2424308736 | 4 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/PORS_FSM_FFd2 | 9392 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/PORS_FSM_FFd1 | 9390 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/PORS_FSM_FFd2 | 9392 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | cnt/PORS_FSM_FFd2.SI | cnt/PORS_FSM_FFd2 | 0 | 3 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/PORS_FSM_FFd2 | 9392 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/PORS_FSM_FFd1 | 9390 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/PORS_FSM_FFd2.D1 | 9803 | ? | 492 | 4096 | cnt/PORS_FSM_FFd2 | NULL | NULL | cnt/PORS_FSM_FFd2.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/PORS_FSM_FFd2.D2 | 9804 | ? | 492 | 4096 | cnt/PORS_FSM_FFd2 | NULL | NULL | cnt/PORS_FSM_FFd2.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | cnt/LTimer<13> | IV_FALSE | cnt/PORS_FSM_FFd1 -SPPTERM | 2 | IV_FALSE | cnt/LTimer<13> | IV_TRUE | cnt/PORS_FSM_FFd2 - -SRFF_INSTANCE | cnt/PORS_FSM_FFd2.REG | cnt/PORS_FSM_FFd2 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/PORS_FSM_FFd2.D | 9802 | ? | 492 | 0 | cnt/PORS_FSM_FFd2 | NULL | NULL | cnt/PORS_FSM_FFd2.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/PORS_FSM_FFd2.Q | 9805 | ? | 498 | 0 | cnt/PORS_FSM_FFd2 | NULL | NULL | cnt/PORS_FSM_FFd2.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB - -MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobs/Load1 | WarpSE_COPY_0_COPY_0 | 2155873536 | 12 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/nBR_IOB.EXP | 10147 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.EXP | cnt/nBR_IOB | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr.EXP | 10148 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.EXP | ram/BACTr | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobs/Load1 | 9393 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobs/Load1.SI | iobs/Load1 | 0 | 11 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/nBR_IOB.EXP | 10147 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.EXP | cnt/nBR_IOB | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr.EXP | 10148 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.EXP | ram/BACTr | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobs/Load1.D1 | 9807 | ? | 531 | 4096 | iobs/Load1 | NULL | NULL | iobs/Load1.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobs/Load1.D2 | 9808 | ? | 531 | 4096 | iobs/Load1 | NULL | NULL | iobs/Load1.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | iobs/Once -SPPTERM | 1 | IV_FALSE | iobs/ALE1 -SPPTERM | 1 | IV_TRUE | cnt/nBR_IOB.EXP -SPPTERM | 1 | IV_TRUE | ram/BACTr.EXP -SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf -SPPTERM | 2 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | nWE_FSB_IBUF - -SRFF_INSTANCE | iobs/Load1.REG | iobs/Load1 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobs/Load1.D | 9806 | ? | 531 | 0 | iobs/Load1 | NULL | NULL | iobs/Load1.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobs/Load1.Q | 9809 | ? | 544 | 0 | iobs/Load1 | NULL | NULL | iobs/Load1.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | ram/BACTr | WarpSE_COPY_0_COPY_0 | 2155873536 | 10 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | ram/BACTr | 9394 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | ram/BACTr.EXP | 10148 | ? | 531 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.EXP | ram/BACTr | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | ram/BACTr.SI | ram/BACTr | 0 | 9 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | ram/BACTr.D1 | 9811 | ? | 532 | 4096 | ram/BACTr | NULL | NULL | ram/BACTr.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | ram/BACTr.D2 | 9812 | ? | 532 | 4096 | ram/BACTr | NULL | NULL | ram/BACTr.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | ram/BACTr.EXP | 10135 | ? | 531 | 0 | ram/BACTr | NULL | NULL | ram/BACTr.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_20_IBUF -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_18_IBUF -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF -SPPTERM | 4 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF - -SRFF_INSTANCE | ram/BACTr.REG | ram/BACTr | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | ram/BACTr.D | 9810 | ? | 532 | 0 | ram/BACTr | NULL | NULL | ram/BACTr.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | ram/BACTr.Q | 9813 | ? | 540 | 0 | ram/BACTr | NULL | NULL | ram/BACTr.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RefReq | WarpSE_COPY_0_COPY_0 | 2155873280 | 3 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefDone | 9346 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefReqSync | 9398 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReqSync.Q | ram/RefReqSync | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | ram/RefReq | 9395 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | ram/RefReq.SI | ram/RefReq | 0 | 2 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefDone | 9346 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefReqSync | 9398 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReqSync.Q | ram/RefReqSync | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | ram/RefReq.D1 | 9815 | ? | 533 | 4096 | ram/RefReq | NULL | NULL | ram/RefReq.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | ram/RefReq.D2 | 9816 | ? | 533 | 4096 | ram/RefReq | NULL | NULL | ram/RefReq.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_FALSE | ram/RefDone | IV_TRUE | ram/RefReqSync - -SRFF_INSTANCE | ram/RefReq.REG | ram/RefReq | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | ram/RefReq.D | 9814 | ? | 533 | 0 | ram/RefReq | NULL | NULL | ram/RefReq.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | ram/RefReq.Q | 9817 | ? | 540 | 0 | ram/RefReq | NULL | NULL | ram/RefReq.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | iobm/IOBERR | WarpSE_COPY_0_COPY_0 | 2155877376 | 14 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOBERR | 9396 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nBERR_IOB_IBUF | 9361 | ? | 565 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ETACK | 9402 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrf | 9409 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrr | 9410 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrf | 9412 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrr | 9413 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP24_.EXP | 10094 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP24_.EXP | EXP24_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1>.EXP | 10095 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.EXP | cnt/LTimer<1> | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/IOBERR | 9396 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/IOBERR.SI | iobm/IOBERR | 0 | 13 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOBERR | 9396 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nBERR_IOB_IBUF | 9361 | ? | 565 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ETACK | 9402 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrf | 9409 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrr | 9410 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrf | 9412 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrr | 9413 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP24_.EXP | 10094 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP24_.EXP | EXP24_ | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<1>.EXP | 10095 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<1>.EXP | cnt/LTimer<1> | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/IOBERR.D1 | 9819 | ? | 559 | 4096 | iobm/IOBERR | NULL | NULL | iobm/IOBERR.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/IOBERR.D2 | 9820 | ? | 559 | 4096 | iobm/IOBERR | NULL | NULL | iobm/IOBERR.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | EXP24_.EXP -SPPTERM | 1 | IV_TRUE | cnt/LTimer<1>.EXP -SPPTERM | 4 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOBERR -SPPTERM | 7 | IV_TRUE | C8M_IBUF | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOBERR | IV_TRUE | iobm/ETACK -SPPTERM | 7 | IV_TRUE | C8M_IBUF | IV_FALSE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOBERR | IV_TRUE | iobm/ETACK -SPPTERM | 8 | IV_TRUE | C8M_IBUF | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOBERR | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr -SPPTERM | 8 | IV_TRUE | C8M_IBUF | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | iobm/IOBERR | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr - -SRFF_INSTANCE | iobm/IOBERR.REG | iobm/IOBERR | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/IOBERR.D | 9818 | ? | 559 | 0 | iobm/IOBERR | NULL | NULL | iobm/IOBERR.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/IOBERR.Q | 9821 | ? | 559 | 0 | iobm/IOBERR | NULL | NULL | iobm/IOBERR.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB | CLK2X_IOB +NODE | iobs/IOACTr.Q | 9720 | ? | 0 | 0 | iobs/IOACTr | NULL | NULL | iobs/IOACTr.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/IOREQr | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOREQ | 9423 | ? | 560 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOREQ.Q | iobs/IOREQ | 1 | 0 | MC_UIM +NODE | IOREQ | 9330 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IOREQ.Q | IOREQ | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV +NODE | C16M_IBUF/FCLK- | 9230 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/IOREQr | 9397 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM +NODE | iobm/IOREQr | 9308 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM SIGNAL_INSTANCE | iobm/IOREQr.SI | iobm/IOREQr | 0 | 1 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOREQ | 9423 | ? | 560 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOREQ.Q | iobs/IOREQ | 1 | 0 | MC_UIM +NODE | IOREQ | 9330 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IOREQ.Q | IOREQ | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/IOREQr.D1 | 9823 | ? | 560 | 4096 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/IOREQr.D1 | 9722 | ? | 0 | 4096 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/IOREQr.D2 | 9824 | ? | 560 | 4096 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | iobs/IOREQ +SIGNAL | NODE | iobm/IOREQr.D2 | 9723 | ? | 0 | 4096 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | IOREQ SRFF_INSTANCE | iobm/IOREQr.REG | iobm/IOREQr | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/IOREQr.D | 9822 | ? | 560 | 0 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.XOR | 0 | 7 | ALU_F +NODE | iobm/IOREQr.D | 9721 | ? | 0 | 0 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV +NODE | C16M_IBUF/FCLK- | 9230 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/IOREQr.Q | 9825 | ? | 563 | 0 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB +NODE | iobm/IOREQr.Q | 9724 | ? | 0 | 0 | iobm/IOREQr | NULL | NULL | iobm/IOREQr.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RefReqSync | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 +MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobs/Load1 | WarpSE_COPY_0_COPY_0 | 2155873536 | 12 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefReq | 9405 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefReq.Q | cnt/RefReq | 1 | 0 | MC_UIM +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nROMCS_OBUF.EXP | 9998 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.EXP | nROMCS_OBUF | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP20_.EXP | 9999 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP20_.EXP | EXP20_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | ram/RefReqSync | 9398 | ? | 533 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReqSync.Q | ram/RefReqSync | 1 | 0 | MC_UIM +NODE | iobs/Load1 | 9309 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM -SIGNAL_INSTANCE | ram/RefReqSync.SI | ram/RefReqSync | 0 | 1 | 2 +SIGNAL_INSTANCE | iobs/Load1.SI | iobs/Load1 | 0 | 11 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefReq | 9405 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefReq.Q | cnt/RefReq | 1 | 0 | MC_UIM +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nROMCS_OBUF.EXP | 9998 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.EXP | nROMCS_OBUF | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP20_.EXP | 9999 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP20_.EXP | EXP20_ | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | ram/RefReqSync.D1 | 9827 | ? | 534 | 4096 | ram/RefReqSync | NULL | NULL | ram/RefReqSync.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobs/Load1.D1 | 9726 | ? | 0 | 4096 | iobs/Load1 | NULL | NULL | iobs/Load1.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | ram/RefReqSync.D2 | 9828 | ? | 534 | 4096 | ram/RefReqSync | NULL | NULL | ram/RefReqSync.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | cnt/RefReq +SIGNAL | NODE | iobs/Load1.D2 | 9727 | ? | 0 | 4096 | iobs/Load1 | NULL | NULL | iobs/Load1.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | iobs/Once +SPPTERM | 1 | IV_FALSE | ALE1 +SPPTERM | 1 | IV_TRUE | nROMCS_OBUF.EXP +SPPTERM | 1 | IV_TRUE | EXP20_.EXP +SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf +SPPTERM | 2 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay -SRFF_INSTANCE | ram/RefReqSync.REG | ram/RefReqSync | 0 | 2 | 1 +SRFF_INSTANCE | iobs/Load1.REG | iobs/Load1 | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | ram/RefReqSync.D | 9826 | ? | 534 | 0 | ram/RefReqSync | NULL | NULL | ram/RefReqSync.XOR | 0 | 7 | ALU_F +NODE | iobs/Load1.D | 9725 | ? | 0 | 0 | iobs/Load1 | NULL | NULL | iobs/Load1.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | ram/RefReqSync.Q | 9829 | ? | 533 | 0 | ram/RefReqSync | NULL | NULL | ram/RefReqSync.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB +NODE | iobs/Load1.Q | 9728 | ? | 0 | 0 | iobs/Load1 | NULL | NULL | iobs/Load1.REG | 0 | 8 | SRFF_Q -INPUT_INSTANCE | 0 | 0 | NULL | nIPL2_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | IOACT | WarpSE_COPY_0_COPY_0 | 2155873536 | 12 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9293 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9294 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9292 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOREQr | 9308 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | C8M_IBUF | 9279 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ETACK | 9323 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrf | 9333 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrr | 9334 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrf | 9321 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrr | 9322 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nADoutLE0_OBUF.EXP | 10011 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.EXP | nADoutLE0_OBUF | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | IOACT | 9310 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IOACT.Q | IOACT | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | IOACT.SI | IOACT | 0 | 11 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9293 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9294 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9292 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOREQr | 9308 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | C8M_IBUF | 9279 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ETACK | 9323 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrf | 9333 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrr | 9334 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrf | 9321 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrr | 9322 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nADoutLE0_OBUF.EXP | 10011 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.EXP | nADoutLE0_OBUF | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | IOACT.D1 | 9730 | ? | 0 | 4096 | IOACT | NULL | NULL | IOACT.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | IOACT.D2 | 9731 | ? | 0 | 4096 | IOACT | NULL | NULL | IOACT.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | nADoutLE0_OBUF.EXP +SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 +SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOREQr +SPPTERM | 4 | IV_TRUE | C8M_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/ETACK +SPPTERM | 5 | IV_TRUE | C8M_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr +SPPTERM | 5 | IV_TRUE | C8M_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr + +SRFF_INSTANCE | IOACT.REG | IOACT | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | IOACT.D | 9729 | ? | 0 | 0 | IOACT | NULL | NULL | IOACT.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | IOACT.Q | 9732 | ? | 0 | 0 | IOACT | NULL | NULL | IOACT.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | IOBERR | WarpSE_COPY_0_COPY_0 | 2155877376 | 13 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9292 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9293 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9294 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | IOBERR | 9311 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | C8M_IBUF | 9279 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nBERR_IOB_IBUF | 9281 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ETACK | 9323 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrf | 9333 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrr | 9334 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrf | 9321 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrr | 9322 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nDinLE_OBUF.EXP | 10012 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDinLE_OBUF.EXP | nDinLE_OBUF | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | IOBERR | 9311 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | IOBERR.SI | IOBERR | 0 | 12 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9292 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9293 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9294 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | IOBERR | 9311 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | C8M_IBUF | 9279 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nBERR_IOB_IBUF | 9281 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ETACK | 9323 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrf | 9333 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrr | 9334 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrf | 9321 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrr | 9322 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nDinLE_OBUF.EXP | 10012 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDinLE_OBUF.EXP | nDinLE_OBUF | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | IOBERR.D1 | 9734 | ? | 0 | 4096 | IOBERR | NULL | NULL | IOBERR.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | IOBERR.D2 | 9735 | ? | 0 | 4096 | IOBERR | NULL | NULL | IOBERR.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | nDinLE_OBUF.EXP +SPPTERM | 4 | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_TRUE | IOBERR +SPPTERM | 7 | IV_TRUE | C8M_IBUF | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | IOBERR | IV_TRUE | iobm/ETACK +SPPTERM | 7 | IV_TRUE | C8M_IBUF | IV_FALSE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_FALSE | IOBERR | IV_TRUE | iobm/ETACK +SPPTERM | 8 | IV_TRUE | C8M_IBUF | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | IOBERR | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr +SPPTERM | 8 | IV_TRUE | C8M_IBUF | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | IOBERR | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr + +SRFF_INSTANCE | IOBERR.REG | IOBERR | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | IOBERR.D | 9733 | ? | 0 | 0 | IOBERR | NULL | NULL | IOBERR.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | IOBERR.Q | 9736 | ? | 0 | 0 | IOBERR | NULL | NULL | IOBERR.REG | 0 | 8 | SRFF_Q + +INPUT_INSTANCE | 0 | 0 | NULL | E_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | nIPL2 | 9527 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | E | 9441 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | nIPL2_IBUF | 9399 | ? | 494 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nIPL2_IBUF | 0 | 5 | II_IMUX - -MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | cnt/IPL2r | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nIPL2_IBUF | 9399 | ? | 494 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nIPL2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/IPL2r | 9400 | ? | 491 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/IPL2r.Q | cnt/IPL2r | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | cnt/IPL2r.SI | cnt/IPL2r | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nIPL2_IBUF | 9399 | ? | 494 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nIPL2_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/IPL2r.D1 | 9831 | ? | 494 | 4096 | cnt/IPL2r | NULL | NULL | cnt/IPL2r.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/IPL2r.D2 | 9832 | ? | 494 | 4096 | cnt/IPL2r | NULL | NULL | cnt/IPL2r.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_FALSE | nIPL2_IBUF - -SRFF_INSTANCE | cnt/IPL2r.REG | cnt/IPL2r | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/IPL2r.D | 9830 | ? | 494 | 0 | cnt/IPL2r | NULL | NULL | cnt/IPL2r.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/IPL2r.Q | 9833 | ? | 491 | 0 | cnt/IPL2r | NULL | NULL | cnt/IPL2r.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB - -MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | cnt/nRESout | WarpSE_COPY_0_COPY_0 | 2424308736 | 5 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/PORS_FSM_FFd1 | 9390 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/PORS_FSM_FFd2 | 9392 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/nRESout | 9401 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nRESout.Q | cnt/nRESout | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/nRESout | 9401 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nRESout.Q | cnt/nRESout | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | cnt/nRESout.SI | cnt/nRESout | 0 | 4 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<13> | 9328 | ? | 495 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<13>.Q | cnt/LTimer<13> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/PORS_FSM_FFd1 | 9390 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/PORS_FSM_FFd2 | 9392 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/nRESout | 9401 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nRESout.Q | cnt/nRESout | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/nRESout.D1 | 9835 | ? | 495 | 4096 | cnt/nRESout | NULL | NULL | cnt/nRESout.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/nRESout.D2 | 9836 | ? | 495 | 4096 | cnt/nRESout | NULL | NULL | cnt/nRESout.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | cnt/LTimer<13> | IV_TRUE | cnt/PORS_FSM_FFd1 | IV_FALSE | cnt/PORS_FSM_FFd2 -SPPTERM | 3 | IV_TRUE | cnt/PORS_FSM_FFd1 | IV_FALSE | cnt/PORS_FSM_FFd2 | IV_TRUE | cnt/nRESout - -SRFF_INSTANCE | cnt/nRESout.REG | cnt/nRESout | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/nRESout.D | 9834 | ? | 495 | 0 | cnt/nRESout | NULL | NULL | cnt/nRESout.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/nRESout.Q | 9837 | ? | 571 | 0 | cnt/nRESout | NULL | NULL | cnt/nRESout.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/ETACK | WarpSE_COPY_0_COPY_0 | 2155873280 | 7 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/nVMA | 9316 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<2> | 9387 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<3> | 9388 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<4> | 9389 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/ETACK | 9402 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/ETACK.SI | iobm/ETACK | 0 | 6 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/nVMA | 9316 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<0> | 9379 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<1> | 9384 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<2> | 9387 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<3> | 9388 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ES<4> | 9389 | ? | 561 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/ETACK.D1 | 9839 | ? | 561 | 4096 | iobm/ETACK | NULL | NULL | iobm/ETACK.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/ETACK.D2 | 9840 | ? | 561 | 4096 | iobm/ETACK | NULL | NULL | iobm/ETACK.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 6 | IV_FALSE | iobm/nVMA | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_TRUE | iobm/ES<4> - -SRFF_INSTANCE | iobm/ETACK.REG | iobm/ETACK | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/ETACK.D | 9838 | ? | 561 | 0 | iobm/ETACK | NULL | NULL | iobm/ETACK.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/ETACK.Q | 9841 | ? | 562 | 0 | iobm/ETACK | NULL | NULL | iobm/ETACK.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB +NODE | E_IBUF | 9312 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/Er | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX +NODE | E_IBUF | 9312 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV +NODE | C8M_IBUF/FCLK- | 9280 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/Er | 9403 | ? | 569 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM +NODE | iobm/Er | 9313 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM SIGNAL_INSTANCE | iobm/Er.SI | iobm/Er | 0 | 1 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX +NODE | E_IBUF | 9312 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/Er.D1 | 9843 | ? | 496 | 4096 | iobm/Er | NULL | NULL | iobm/Er.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/Er.D1 | 9738 | ? | 0 | 4096 | iobm/Er | NULL | NULL | iobm/Er.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/Er.D2 | 9844 | ? | 496 | 4096 | iobm/Er | NULL | NULL | iobm/Er.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/Er.D2 | 9739 | ? | 0 | 4096 | iobm/Er | NULL | NULL | iobm/Er.SI | 2 | 9 | MC_SI_D2 SPPTERM | 1 | IV_TRUE | E_IBUF SRFF_INSTANCE | iobm/Er.REG | iobm/Er | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/Er.D | 9842 | ? | 496 | 0 | iobm/Er | NULL | NULL | iobm/Er.XOR | 0 | 7 | ALU_F +NODE | iobm/Er.D | 9737 | ? | 0 | 0 | iobm/Er | NULL | NULL | iobm/Er.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV +NODE | C8M_IBUF/FCLK- | 9280 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/Er.Q | 9845 | ? | 569 | 0 | iobm/Er | NULL | NULL | iobm/Er.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB +NODE | iobm/Er.Q | 9740 | ? | 0 | 0 | iobm/Er | NULL | NULL | iobm/Er.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobm/IOACT | WarpSE_COPY_0_COPY_0 | 2155873536 | 12 | 1 +MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | ram/BACTr | WarpSE_COPY_0_COPY_0 | 2155873536 | 3 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOREQr | 9397 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ETACK | 9402 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrf | 9409 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrr | 9410 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrf | 9412 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrr | 9413 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/nDinLE.EXP | 10119 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nDinLE.EXP | iobm/nDinLE | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/IOACT | 9404 | ? | 545 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOACT.Q | iobm/IOACT | 1 | 0 | MC_UIM +NODE | ram/BACTr | 9314 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -SIGNAL_INSTANCE | iobm/IOACT.SI | iobm/IOACT | 0 | 11 | 2 +SIGNAL_INSTANCE | ram/BACTr.SI | ram/BACTr | 0 | 2 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOREQr | 9397 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ETACK | 9402 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrf | 9409 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrr | 9410 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrf | 9412 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrr | 9413 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/nDinLE.EXP | 10119 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nDinLE.EXP | iobm/nDinLE | 4 | 0 | MC_EXPORT +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/IOACT.D1 | 9847 | ? | 562 | 4096 | iobm/IOACT | NULL | NULL | iobm/IOACT.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | ram/BACTr.D1 | 9742 | ? | 0 | 4096 | ram/BACTr | NULL | NULL | ram/BACTr.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/IOACT.D2 | 9848 | ? | 562 | 4096 | iobm/IOACT | NULL | NULL | iobm/IOACT.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | iobm/nDinLE.EXP -SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 -SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOREQr -SPPTERM | 4 | IV_TRUE | C8M_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/ETACK -SPPTERM | 5 | IV_TRUE | C8M_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr -SPPTERM | 5 | IV_TRUE | C8M_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr +SIGNAL | NODE | ram/BACTr.D2 | 9743 | ? | 0 | 4096 | ram/BACTr | NULL | NULL | ram/BACTr.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf -SRFF_INSTANCE | iobm/IOACT.REG | iobm/IOACT | 0 | 2 | 1 +SRFF_INSTANCE | ram/BACTr.REG | ram/BACTr | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/IOACT.D | 9846 | ? | 562 | 0 | iobm/IOACT | NULL | NULL | iobm/IOACT.XOR | 0 | 7 | ALU_F +NODE | ram/BACTr.D | 9741 | ? | 0 | 0 | ram/BACTr | NULL | NULL | ram/BACTr.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/IOACT.Q | 9849 | ? | 545 | 0 | iobm/IOACT | NULL | NULL | iobm/IOACT.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB | CLK2X_IOB +NODE | ram/BACTr.Q | 9744 | ? | 0 | 0 | ram/BACTr | NULL | NULL | ram/BACTr.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | PrldLow+OptxMapped | cnt/RefReq | WarpSE_COPY_0_COPY_0 | 2155873280 | 5 | 1 +MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RefReq | WarpSE_COPY_0_COPY_0 | 2155873280 | 3 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<1> | 9382 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM +NODE | ram/RefDone | 9264 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<3> | 9386 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<3>.Q | cnt/Timer<3> | 1 | 0 | MC_UIM +NODE | ram/RefReqSync | 9316 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReqSync.Q | ram/RefReqSync | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<2> | 9383 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/RefReq | 9405 | ? | 534 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefReq.Q | cnt/RefReq | 1 | 0 | MC_UIM +NODE | ram/RefReq | 9315 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM -SIGNAL_INSTANCE | cnt/RefReq.SI | cnt/RefReq | 0 | 5 | 3 +SIGNAL_INSTANCE | ram/RefReq.SI | ram/RefReq | 0 | 2 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<1> | 9382 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM +NODE | ram/RefDone | 9264 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.Q | ram/RefDone | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<3> | 9386 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<3>.Q | cnt/Timer<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<2> | 9383 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX +NODE | ram/RefReqSync | 9316 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReqSync.Q | ram/RefReqSync | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/RefReq.D1 | 9851 | ? | 0 | 4096 | cnt/RefReq | NULL | NULL | cnt/RefReq.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | ram/RefReq.D1 | 9746 | ? | 0 | 4096 | ram/RefReq | NULL | NULL | ram/RefReq.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/RefReq.D2 | 9852 | ? | 0 | 4096 | cnt/RefReq | NULL | NULL | cnt/RefReq.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | cnt/Timer<1> | IV_FALSE | cnt/Timer<3> -SPPTERM | 2 | IV_TRUE | cnt/Timer<2> | IV_FALSE | cnt/Timer<3> -SPPTERM | 4 | IV_FALSE | cnt/Timer<1> | IV_FALSE | cnt/Timer<2> | IV_FALSE | cnt/Timer<0> | IV_TRUE | cnt/Timer<3> -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | cnt/RefReq.CLKF | 9853 | ? | 534 | 4096 | cnt/RefReq | NULL | NULL | cnt/RefReq.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | ram/RefReq.D2 | 9747 | ? | 0 | 4096 | ram/RefReq | NULL | NULL | ram/RefReq.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_FALSE | ram/RefDone | IV_TRUE | ram/RefReqSync + +SRFF_INSTANCE | ram/RefReq.REG | ram/RefReq | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | ram/RefReq.D | 9745 | ? | 0 | 0 | ram/RefReq | NULL | NULL | ram/RefReq.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | ram/RefReq.Q | 9748 | ? | 0 | 0 | ram/RefReq | NULL | NULL | ram/RefReq.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RefReqSync | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RefReq | 9267 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RefReq.Q | RefReq | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | ram/RefReqSync | 9316 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReqSync.Q | ram/RefReqSync | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | ram/RefReqSync.SI | ram/RefReqSync | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | RefReq | 9267 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RefReq.Q | RefReq | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | ram/RefReqSync.D1 | 9750 | ? | 0 | 4096 | ram/RefReqSync | NULL | NULL | ram/RefReqSync.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | ram/RefReqSync.D2 | 9751 | ? | 0 | 4096 | ram/RefReqSync | NULL | NULL | ram/RefReqSync.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | RefReq + +SRFF_INSTANCE | ram/RefReqSync.REG | ram/RefReqSync | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | ram/RefReqSync.D | 9749 | ? | 0 | 0 | ram/RefReqSync | NULL | NULL | ram/RefReqSync.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | ram/RefReqSync.Q | 9752 | ? | 0 | 0 | ram/RefReqSync | NULL | NULL | ram/RefReqSync.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+OptxMapped | cnt/Er<0> | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | E_IBUF | 9312 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | cnt/Er<0>.SI | cnt/Er<0> | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | E_IBUF | 9312 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/Er<0>.D1 | 9754 | ? | 0 | 4096 | cnt/Er<0> | NULL | NULL | cnt/Er<0>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cnt/Er<0>.D2 | 9755 | ? | 0 | 4096 | cnt/Er<0> | NULL | NULL | cnt/Er<0>.SI | 2 | 9 | MC_SI_D2 SPPTERM | 1 | IV_TRUE | E_IBUF -SRFF_INSTANCE | cnt/RefReq.REG | cnt/RefReq | 0 | 2 | 1 +SRFF_INSTANCE | cnt/Er<0>.REG | cnt/Er<0> | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/RefReq.D | 9850 | ? | 0 | 0 | cnt/RefReq | NULL | NULL | cnt/RefReq.XOR | 0 | 7 | ALU_F +NODE | cnt/Er<0>.D | 9753 | ? | 0 | 0 | cnt/Er<0> | NULL | NULL | cnt/Er<0>.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | cnt/RefReq.CLKF | 9853 | ? | 534 | 4096 | cnt/RefReq | NULL | NULL | cnt/RefReq.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 1 | IV_TRUE | E_IBUF +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/RefReq.Q | 9854 | ? | 534 | 0 | cnt/RefReq | NULL | NULL | cnt/RefReq.REG | 0 | 8 | SRFF_Q +NODE | cnt/Er<0>.Q | 9756 | ? | 0 | 0 | cnt/Er<0> | NULL | NULL | cnt/Er<0>.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | PrldLow+OptxMapped | cnt/RefUrgent | WarpSE_COPY_0_COPY_0 | 2155873280 | 5 | 1 +INPUT_INSTANCE | 0 | 0 | NULL | nIPL2_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | nIPL2 | 9442 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | nIPL2_IBUF | 9318 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nIPL2_IBUF | 0 | 5 | II_IMUX + +MACROCELL_INSTANCE | PrldLow+OptxMapped | cnt/nIPL2r | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<1> | 9382 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM +NODE | nIPL2_IBUF | 9318 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nIPL2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<2> | 9383 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<3> | 9386 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<3>.Q | cnt/Timer<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/RefUrgent | 9406 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefUrgent.Q | cnt/RefUrgent | 1 | 0 | MC_UIM +NODE | cnt/nIPL2r | 9319 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nIPL2r.Q | cnt/nIPL2r | 1 | 0 | MC_UIM -SIGNAL_INSTANCE | cnt/RefUrgent.SI | cnt/RefUrgent | 0 | 5 | 3 +SIGNAL_INSTANCE | cnt/nIPL2r.SI | cnt/nIPL2r | 0 | 1 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<1> | 9382 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.Q | cnt/Timer<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<2> | 9383 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.Q | cnt/Timer<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<3> | 9386 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<3>.Q | cnt/Timer<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/Timer<0> | 9385 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<0>.Q | cnt/Timer<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | E_IBUF | 9369 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | E_IBUF | 0 | 5 | II_IMUX +NODE | nIPL2_IBUF | 9318 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nIPL2_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cnt/RefUrgent.D1 | 9856 | ? | 0 | 4096 | cnt/RefUrgent | NULL | NULL | cnt/RefUrgent.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/nIPL2r.D1 | 9758 | ? | 0 | 4096 | cnt/nIPL2r | NULL | NULL | cnt/nIPL2r.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cnt/RefUrgent.D2 | 9857 | ? | 0 | 4096 | cnt/RefUrgent | NULL | NULL | cnt/RefUrgent.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | cnt/Timer<1> | IV_TRUE | cnt/Timer<2> | IV_FALSE | cnt/Timer<3> -SPPTERM | 4 | IV_FALSE | cnt/Timer<1> | IV_FALSE | cnt/Timer<2> | IV_FALSE | cnt/Timer<0> | IV_TRUE | cnt/Timer<3> -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | cnt/RefUrgent.CLKF | 9858 | ? | 542 | 4096 | cnt/RefUrgent | NULL | NULL | cnt/RefUrgent.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 1 | IV_TRUE | E_IBUF +SIGNAL | NODE | cnt/nIPL2r.D2 | 9759 | ? | 0 | 4096 | cnt/nIPL2r | NULL | NULL | cnt/nIPL2r.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | nIPL2_IBUF -SRFF_INSTANCE | cnt/RefUrgent.REG | cnt/RefUrgent | 0 | 2 | 1 +SRFF_INSTANCE | cnt/nIPL2r.REG | cnt/nIPL2r | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cnt/RefUrgent.D | 9855 | ? | 0 | 0 | cnt/RefUrgent | NULL | NULL | cnt/RefUrgent.XOR | 0 | 7 | ALU_F +NODE | cnt/nIPL2r.D | 9757 | ? | 0 | 0 | cnt/nIPL2r | NULL | NULL | cnt/nIPL2r.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | cnt/RefUrgent.CLKF | 9858 | ? | 542 | 4096 | cnt/RefUrgent | NULL | NULL | cnt/RefUrgent.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 1 | IV_TRUE | E_IBUF +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cnt/RefUrgent.Q | 9859 | ? | 542 | 0 | cnt/RefUrgent | NULL | NULL | cnt/RefUrgent.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | fsb/ASrf | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK- | 9334 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | fsb/ASrf.SI | fsb/ASrf | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | fsb/ASrf.D1 | 9861 | ? | 535 | 4096 | fsb/ASrf | NULL | NULL | fsb/ASrf.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | fsb/ASrf.D2 | 9862 | ? | 535 | 4096 | fsb/ASrf | NULL | NULL | fsb/ASrf.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_FALSE | nAS_FSB_IBUF - -SRFF_INSTANCE | fsb/ASrf.REG | fsb/ASrf | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | fsb/ASrf.D | 9860 | ? | 535 | 0 | fsb/ASrf | NULL | NULL | fsb/ASrf.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK- | 9334 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | fsb/ASrf.Q | 9863 | ? | 540 | 0 | fsb/ASrf | NULL | NULL | fsb/ASrf.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | iobm/ALE0 | WarpSE_COPY_0_COPY_0 | 2155873536 | 5 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOREQr | 9397 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/ALE0 | 9408 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ALE0.Q | iobm/ALE0 | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/ALE0.SI | iobm/ALE0 | 0 | 4 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOREQr | 9397 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/ALE0.D1 | 9865 | ? | 563 | 4096 | iobm/ALE0 | NULL | NULL | iobm/ALE0.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/ALE0.D2 | 9866 | ? | 563 | 4096 | iobm/ALE0 | NULL | NULL | iobm/ALE0.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 -SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOREQr - -SRFF_INSTANCE | iobm/ALE0.REG | iobm/ALE0 | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/ALE0.D | 9864 | ? | 563 | 0 | iobm/ALE0 | NULL | NULL | iobm/ALE0.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/ALE0.Q | 9867 | ? | 0 | 0 | iobm/ALE0 | NULL | NULL | iobm/ALE0.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/BERRrf | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nBERR_IOB_IBUF | 9361 | ? | 565 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/BERRrf | 9409 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/BERRrf.SI | iobm/BERRrf | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nBERR_IOB_IBUF | 9361 | ? | 565 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/BERRrf.D1 | 9869 | ? | 564 | 4096 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/BERRrf.D2 | 9870 | ? | 564 | 4096 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_FALSE | nBERR_IOB_IBUF - -SRFF_INSTANCE | iobm/BERRrf.REG | iobm/BERRrf | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/BERRrf.D | 9868 | ? | 564 | 0 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/BERRrf.Q | 9871 | ? | 562 | 0 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/BERRrr | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nBERR_IOB_IBUF | 9361 | ? | 565 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/BERRrr | 9410 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/BERRrr.SI | iobm/BERRrr | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nBERR_IOB_IBUF | 9361 | ? | 565 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/BERRrr.D1 | 9873 | ? | 565 | 4096 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/BERRrr.D2 | 9874 | ? | 565 | 4096 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_FALSE | nBERR_IOB_IBUF - -SRFF_INSTANCE | iobm/BERRrr.REG | iobm/BERRrr | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/BERRrr.D | 9872 | ? | 565 | 0 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/BERRrr.Q | 9875 | ? | 562 | 0 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB +NODE | cnt/nIPL2r.Q | 9760 | ? | 0 | 0 | cnt/nIPL2r | NULL | NULL | cnt/nIPL2r.REG | 0 | 8 | SRFF_Q INPUT_INSTANCE | 0 | 0 | NULL | nDTACK_IOB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | nDTACK_IOB | 9528 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | nDTACK_IOB | 9443 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | nDTACK_IOB_IBUF | 9411 | ? | 567 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX +NODE | nDTACK_IOB_IBUF | 9320 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/DTACKrf | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nDTACK_IOB_IBUF | 9411 | ? | 567 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX +NODE | nDTACK_IOB_IBUF | 9320 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV +NODE | C16M_IBUF/FCLK- | 9230 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/DTACKrf | 9412 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM +NODE | iobm/DTACKrf | 9321 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM SIGNAL_INSTANCE | iobm/DTACKrf.SI | iobm/DTACKrf | 0 | 1 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nDTACK_IOB_IBUF | 9411 | ? | 567 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX +NODE | nDTACK_IOB_IBUF | 9320 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/DTACKrf.D1 | 9877 | ? | 566 | 4096 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/DTACKrf.D1 | 9762 | ? | 0 | 4096 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/DTACKrf.D2 | 9878 | ? | 566 | 4096 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/DTACKrf.D2 | 9763 | ? | 0 | 4096 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.SI | 2 | 9 | MC_SI_D2 SPPTERM | 1 | IV_FALSE | nDTACK_IOB_IBUF SRFF_INSTANCE | iobm/DTACKrf.REG | iobm/DTACKrf | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/DTACKrf.D | 9876 | ? | 566 | 0 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.XOR | 0 | 7 | ALU_F +NODE | iobm/DTACKrf.D | 9761 | ? | 0 | 0 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV +NODE | C16M_IBUF/FCLK- | 9230 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/DTACKrf.Q | 9879 | ? | 562 | 0 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB +NODE | iobm/DTACKrf.Q | 9764 | ? | 0 | 0 | iobm/DTACKrf | NULL | NULL | iobm/DTACKrf.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/DTACKrr | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nDTACK_IOB_IBUF | 9411 | ? | 567 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX +NODE | nDTACK_IOB_IBUF | 9320 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/DTACKrr | 9413 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM +NODE | iobm/DTACKrr | 9322 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM SIGNAL_INSTANCE | iobm/DTACKrr.SI | iobm/DTACKrr | 0 | 1 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nDTACK_IOB_IBUF | 9411 | ? | 567 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX +NODE | nDTACK_IOB_IBUF | 9320 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_IOB_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/DTACKrr.D1 | 9881 | ? | 567 | 4096 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/DTACKrr.D1 | 9766 | ? | 0 | 4096 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/DTACKrr.D2 | 9882 | ? | 567 | 4096 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/DTACKrr.D2 | 9767 | ? | 0 | 4096 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.SI | 2 | 9 | MC_SI_D2 SPPTERM | 1 | IV_FALSE | nDTACK_IOB_IBUF SRFF_INSTANCE | iobm/DTACKrr.REG | iobm/DTACKrr | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/DTACKrr.D | 9880 | ? | 567 | 0 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.XOR | 0 | 7 | ALU_F +NODE | iobm/DTACKrr.D | 9765 | ? | 0 | 0 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/DTACKrr.Q | 9883 | ? | 562 | 0 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB +NODE | iobm/DTACKrr.Q | 9768 | ? | 0 | 0 | iobm/DTACKrr | NULL | NULL | iobm/DTACKrr.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/DoutOE | WarpSE_COPY_0_COPY_0 | 2155873280 | 4 | 1 +MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/ETACK | WarpSE_COPY_0_COPY_0 | 2155873280 | 7 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IORW0 | 9345 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM +NODE | nVMA_IOBout | 9232 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nVMA_IOBout.Q | nVMA_IOBout | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | iobm/ES<0> | 9298 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +NODE | iobm/ES<1> | 9299 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +NODE | iobm/ES<2> | 9300 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<3> | 9303 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<4> | 9304 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/DoutOE | 9414 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DoutOE.Q | iobm/DoutOE | 1 | 0 | MC_UIM +NODE | iobm/ETACK | 9323 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ETACK.Q | iobm/ETACK | 1 | 0 | MC_UIM -SIGNAL_INSTANCE | iobm/DoutOE.SI | iobm/DoutOE | 0 | 3 | 2 +SIGNAL_INSTANCE | iobm/ETACK.SI | iobm/ETACK | 0 | 6 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IORW0 | 9345 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM +NODE | nVMA_IOBout | 9232 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nVMA_IOBout.Q | nVMA_IOBout | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | iobm/ES<0> | 9298 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<0>.Q | iobm/ES<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +NODE | iobm/ES<1> | 9299 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<1>.Q | iobm/ES<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<2> | 9300 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<2>.Q | iobm/ES<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<3> | 9303 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<3>.Q | iobm/ES<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/ES<4> | 9304 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ES<4>.Q | iobm/ES<4> | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/DoutOE.D1 | 9885 | ? | 568 | 4096 | iobm/DoutOE | NULL | NULL | iobm/DoutOE.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/ETACK.D1 | 9770 | ? | 0 | 4096 | iobm/ETACK | NULL | NULL | iobm/ETACK.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/DoutOE.D2 | 9886 | ? | 568 | 4096 | iobm/DoutOE | NULL | NULL | iobm/DoutOE.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | iobs/IORW0 | IV_TRUE | iobm/IOS_FSM_FFd3 -SPPTERM | 2 | IV_TRUE | iobs/IORW0 | IV_TRUE | iobm/IOS_FSM_FFd2 +SIGNAL | NODE | iobm/ETACK.D2 | 9771 | ? | 0 | 4096 | iobm/ETACK | NULL | NULL | iobm/ETACK.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 6 | IV_FALSE | nVMA_IOBout | IV_FALSE | iobm/ES<0> | IV_FALSE | iobm/ES<1> | IV_FALSE | iobm/ES<2> | IV_FALSE | iobm/ES<3> | IV_TRUE | iobm/ES<4> -SRFF_INSTANCE | iobm/DoutOE.REG | iobm/DoutOE | 0 | 2 | 1 +SRFF_INSTANCE | iobm/ETACK.REG | iobm/ETACK | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/DoutOE.D | 9884 | ? | 568 | 0 | iobm/DoutOE | NULL | NULL | iobm/DoutOE.XOR | 0 | 7 | ALU_F +NODE | iobm/ETACK.D | 9769 | ? | 0 | 0 | iobm/ETACK | NULL | NULL | iobm/ETACK.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/DoutOE.Q | 9887 | ? | 0 | 0 | iobm/DoutOE | NULL | NULL | iobm/DoutOE.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB +NODE | iobm/ETACK.Q | 9772 | ? | 0 | 0 | iobm/ETACK | NULL | NULL | iobm/ETACK.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/Er2 | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er | 9403 | ? | 569 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM +NODE | iobm/Er | 9313 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/Er2 | 9415 | ? | 558 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM +NODE | iobm/Er2 | 9324 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er2.Q | iobm/Er2 | 1 | 0 | MC_UIM SIGNAL_INSTANCE | iobm/Er2.SI | iobm/Er2 | 0 | 1 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/Er | 9403 | ? | 569 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM +NODE | iobm/Er | 9313 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/Er.Q | iobm/Er | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/Er2.D1 | 9889 | ? | 569 | 4096 | iobm/Er2 | NULL | NULL | iobm/Er2.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/Er2.D1 | 9774 | ? | 0 | 4096 | iobm/Er2 | NULL | NULL | iobm/Er2.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/Er2.D2 | 9890 | ? | 569 | 4096 | iobm/Er2 | NULL | NULL | iobm/Er2.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/Er2.D2 | 9775 | ? | 0 | 4096 | iobm/Er2 | NULL | NULL | iobm/Er2.SI | 2 | 9 | MC_SI_D2 SPPTERM | 1 | IV_TRUE | iobm/Er SRFF_INSTANCE | iobm/Er2.REG | iobm/Er2 | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/Er2.D | 9888 | ? | 569 | 0 | iobm/Er2 | NULL | NULL | iobm/Er2.XOR | 0 | 7 | ALU_F +NODE | iobm/Er2.D | 9773 | ? | 0 | 0 | iobm/Er2 | NULL | NULL | iobm/Er2.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/Er2.Q | 9891 | ? | 558 | 0 | iobm/Er2 | NULL | NULL | iobm/Er2.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/RESrf | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N01 | 9347 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/RESrf | 9416 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/RESrf.SI | iobm/RESrf | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N01 | 9347 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/RESrf.D1 | 9893 | ? | 570 | 4096 | iobm/RESrf | NULL | NULL | iobm/RESrf.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/RESrf.D2 | 9894 | ? | 570 | 4096 | iobm/RESrf | NULL | NULL | iobm/RESrf.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_FALSE | N01 - -SRFF_INSTANCE | iobm/RESrf.REG | iobm/RESrf | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/RESrf.D | 9892 | ? | 570 | 0 | iobm/RESrf | NULL | NULL | iobm/RESrf.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/RESrf.Q | 9895 | ? | 562 | 0 | iobm/RESrf | NULL | NULL | iobm/RESrf.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/RESrr | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N01 | 9347 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/RESrr | 9417 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | iobm/RESrr.SI | iobm/RESrr | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N01 | 9347 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/RESrr.D1 | 9897 | ? | 571 | 4096 | iobm/RESrr | NULL | NULL | iobm/RESrr.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/RESrr.D2 | 9898 | ? | 571 | 4096 | iobm/RESrr | NULL | NULL | iobm/RESrr.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_FALSE | N01 - -SRFF_INSTANCE | iobm/RESrr.REG | iobm/RESrr | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/RESrr.D | 9896 | ? | 571 | 0 | iobm/RESrr | NULL | NULL | iobm/RESrr.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/RESrr.Q | 9899 | ? | 562 | 0 | iobm/RESrr | NULL | NULL | iobm/RESrr.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB +NODE | iobm/Er2.Q | 9776 | ? | 0 | 0 | iobm/Er2 | NULL | NULL | iobm/Er2.REG | 0 | 8 | SRFF_Q INPUT_INSTANCE | 0 | 0 | NULL | nVPA_IOB_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | nVPA_IOB | 9529 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | nVPA_IOB | 9444 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | nVPA_IOB_IBUF | 9418 | ? | 573 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX +NODE | nVPA_IOB_IBUF | 9325 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/VPArf | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nVPA_IOB_IBUF | 9418 | ? | 573 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX +NODE | nVPA_IOB_IBUF | 9325 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV +NODE | C16M_IBUF/FCLK- | 9230 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/VPArf | 9419 | ? | 545 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArf.Q | iobm/VPArf | 1 | 0 | MC_UIM +NODE | iobm/VPArf | 9326 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArf.Q | iobm/VPArf | 1 | 0 | MC_UIM SIGNAL_INSTANCE | iobm/VPArf.SI | iobm/VPArf | 0 | 1 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nVPA_IOB_IBUF | 9418 | ? | 573 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX +NODE | nVPA_IOB_IBUF | 9325 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/VPArf.D1 | 9901 | ? | 572 | 4096 | iobm/VPArf | NULL | NULL | iobm/VPArf.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/VPArf.D1 | 9778 | ? | 0 | 4096 | iobm/VPArf | NULL | NULL | iobm/VPArf.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/VPArf.D2 | 9902 | ? | 572 | 4096 | iobm/VPArf | NULL | NULL | iobm/VPArf.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/VPArf.D2 | 9779 | ? | 0 | 4096 | iobm/VPArf | NULL | NULL | iobm/VPArf.SI | 2 | 9 | MC_SI_D2 SPPTERM | 1 | IV_FALSE | nVPA_IOB_IBUF SRFF_INSTANCE | iobm/VPArf.REG | iobm/VPArf | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/VPArf.D | 9900 | ? | 572 | 0 | iobm/VPArf | NULL | NULL | iobm/VPArf.XOR | 0 | 7 | ALU_F +NODE | iobm/VPArf.D | 9777 | ? | 0 | 0 | iobm/VPArf | NULL | NULL | iobm/VPArf.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV +NODE | C16M_IBUF/FCLK- | 9230 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/VPArf.Q | 9903 | ? | 545 | 0 | iobm/VPArf | NULL | NULL | iobm/VPArf.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB +NODE | iobm/VPArf.Q | 9780 | ? | 0 | 0 | iobm/VPArf | NULL | NULL | iobm/VPArf.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/VPArr | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nVPA_IOB_IBUF | 9418 | ? | 573 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX +NODE | nVPA_IOB_IBUF | 9325 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobm/VPArr | 9420 | ? | 545 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArr.Q | iobm/VPArr | 1 | 0 | MC_UIM +NODE | iobm/VPArr | 9327 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/VPArr.Q | iobm/VPArr | 1 | 0 | MC_UIM SIGNAL_INSTANCE | iobm/VPArr.SI | iobm/VPArr | 0 | 1 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nVPA_IOB_IBUF | 9418 | ? | 573 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX +NODE | nVPA_IOB_IBUF | 9325 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_IOB_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/VPArr.D1 | 9905 | ? | 573 | 4096 | iobm/VPArr | NULL | NULL | iobm/VPArr.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/VPArr.D1 | 9782 | ? | 0 | 4096 | iobm/VPArr | NULL | NULL | iobm/VPArr.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/VPArr.D2 | 9906 | ? | 573 | 4096 | iobm/VPArr | NULL | NULL | iobm/VPArr.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/VPArr.D2 | 9783 | ? | 0 | 4096 | iobm/VPArr | NULL | NULL | iobm/VPArr.SI | 2 | 9 | MC_SI_D2 SPPTERM | 1 | IV_FALSE | nVPA_IOB_IBUF SRFF_INSTANCE | iobm/VPArr.REG | iobm/VPArr | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/VPArr.D | 9904 | ? | 573 | 0 | iobm/VPArr | NULL | NULL | iobm/VPArr.XOR | 0 | 7 | ALU_F +NODE | iobm/VPArr.D | 9781 | ? | 0 | 0 | iobm/VPArr | NULL | NULL | iobm/VPArr.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK | 9313 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/VPArr.Q | 9907 | ? | 545 | 0 | iobm/VPArr | NULL | NULL | iobm/VPArr.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB +NODE | iobm/VPArr.Q | 9784 | ? | 0 | 0 | iobm/VPArr | NULL | NULL | iobm/VPArr.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/ALE0 | WarpSE_COPY_0_COPY_0 | 2155873280 | 3 | 1 +MACROCELL_INSTANCE | Inv+PrldLow+OptxMapped | ALE0M | WarpSE_COPY_0_COPY_0 | 2155873536 | 5 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd1 | 9293 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd2 | 9294 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | iobm/IOS_FSM_FFd3 | 9292 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOREQr | 9308 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobs/ALE0 | 9421 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/ALE0.Q | iobs/ALE0 | 1 | 0 | MC_UIM +NODE | ALE0M | 9328 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ALE0M.Q | ALE0M | 1 | 0 | MC_UIM -SIGNAL_INSTANCE | iobs/ALE0.SI | iobs/ALE0 | 0 | 2 | 2 +SIGNAL_INSTANCE | ALE0M.SI | ALE0M | 0 | 4 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd1 | 9293 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd2 | 9294 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9292 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOREQr | 9308 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobs/ALE0.D1 | 9909 | ? | 537 | 4096 | iobs/ALE0 | NULL | NULL | iobs/ALE0.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | ALE0M.D1 | 9786 | ? | 0 | 4096 | ALE0M | NULL | NULL | ALE0M.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobs/ALE0.D2 | 9910 | ? | 537 | 4096 | iobs/ALE0 | NULL | NULL | iobs/ALE0.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | ALE0M.D2 | 9787 | ? | 0 | 4096 | ALE0M | NULL | NULL | ALE0M.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 +SPPTERM | 3 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOREQr + +SRFF_INSTANCE | ALE0M.REG | ALE0M | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | ALE0M.D | 9785 | ? | 0 | 0 | ALE0M | NULL | NULL | ALE0M.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | ALE0M.Q | 9788 | ? | 0 | 0 | ALE0M | NULL | NULL | ALE0M.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+OptxMapped | ALE0S | WarpSE_COPY_0_COPY_0 | 2155873280 | 3 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | ALE0S | 9329 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ALE0S.Q | ALE0S | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | ALE0S.SI | ALE0S | 0 | 2 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | ALE0S.D1 | 9790 | ? | 0 | 4096 | ALE0S | NULL | NULL | ALE0S.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | ALE0S.D2 | 9791 | ? | 0 | 4096 | ALE0S | NULL | NULL | ALE0S.SI | 2 | 9 | MC_SI_D2 SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 -SRFF_INSTANCE | iobs/ALE0.REG | iobs/ALE0 | 0 | 2 | 1 +SRFF_INSTANCE | ALE0S.REG | ALE0S | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobs/ALE0.D | 9908 | ? | 537 | 0 | iobs/ALE0 | NULL | NULL | iobs/ALE0.XOR | 0 | 7 | ALU_F +NODE | ALE0S.D | 9789 | ? | 0 | 0 | ALE0S | NULL | NULL | ALE0S.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobs/ALE0.Q | 9911 | ? | 0 | 0 | iobs/ALE0 | NULL | NULL | iobs/ALE0.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB +NODE | ALE0S.Q | 9792 | ? | 0 | 0 | ALE0S | NULL | NULL | ALE0S.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/Clear1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 5 | 2 +MACROCELL_INSTANCE | PrldLow+OptxMapped | IOREQ | WarpSE_COPY_0_COPY_0 | 2155873280 | 11 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | iobs/IOACTr | 9307 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP18_.EXP | 9982 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP18_.EXP | EXP18_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nROMWE_OBUF.EXP | 9983 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.EXP | nROMWE_OBUF | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobs/Clear1 | 9422 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.Q | iobs/Clear1 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | iobs/Clear1.EXP | 10138 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.EXP | iobs/Clear1 | 4 | 0 | MC_EXPORT +NODE | IOREQ | 9330 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IOREQ.Q | IOREQ | 1 | 0 | MC_UIM -SIGNAL_INSTANCE | iobs/Clear1.SI | iobs/Clear1 | 0 | 4 | 3 +SIGNAL_INSTANCE | IOREQ.SI | IOREQ | 0 | 10 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +NODE | iobs/IOACTr | 9307 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP18_.EXP | 9982 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP18_.EXP | EXP18_ | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nROMWE_OBUF.EXP | 9983 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.EXP | nROMWE_OBUF | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobs/Clear1.D1 | 9913 | ? | 538 | 4096 | iobs/Clear1 | NULL | NULL | iobs/Clear1.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | IOREQ.D1 | 9794 | ? | 0 | 4096 | IOREQ | NULL | NULL | IOREQ.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobs/Clear1.D2 | 9914 | ? | 538 | 4096 | iobs/Clear1 | NULL | NULL | iobs/Clear1.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_FALSE | iobs/ALE1 +SIGNAL | NODE | IOREQ.D2 | 9795 | ? | 0 | 4096 | IOREQ | NULL | NULL | IOREQ.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | EXP18_.EXP +SPPTERM | 1 | IV_TRUE | nROMWE_OBUF.EXP +SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 +SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr +SPPTERM | 2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_FALSE | ALE1 +SPPTERM | 4 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd1 +SPPTERM | 4 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf + +SRFF_INSTANCE | IOREQ.REG | IOREQ | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | IOREQ.D | 9793 | ? | 0 | 0 | IOREQ | NULL | NULL | IOREQ.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | IOREQ.Q | 9796 | ? | 0 | 0 | IOREQ | NULL | NULL | IOREQ.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+OptxMapped | cnt/Er<1> | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | cnt/Er<1> | 9331 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<1>.Q | cnt/Er<1> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | cnt/Er<1>.SI | cnt/Er<1> | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cnt/Er<0> | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Er<0>.Q | cnt/Er<0> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cnt/Er<1>.D1 | 9798 | ? | 0 | 4096 | cnt/Er<1> | NULL | NULL | cnt/Er<1>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cnt/Er<1>.D2 | 9799 | ? | 0 | 4096 | cnt/Er<1> | NULL | NULL | cnt/Er<1>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | cnt/Er<0> + +SRFF_INSTANCE | cnt/Er<1>.REG | cnt/Er<1> | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | cnt/Er<1>.D | 9797 | ? | 0 | 0 | cnt/Er<1> | NULL | NULL | cnt/Er<1>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | cnt/Er<1>.Q | 9800 | ? | 0 | 0 | cnt/Er<1> | NULL | NULL | cnt/Er<1>.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | fsb/ASrf | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK- | 9241 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | fsb/ASrf.SI | fsb/ASrf | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | fsb/ASrf.D1 | 9802 | ? | 0 | 4096 | fsb/ASrf | NULL | NULL | fsb/ASrf.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | fsb/ASrf.D2 | 9803 | ? | 0 | 4096 | fsb/ASrf | NULL | NULL | fsb/ASrf.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_FALSE | nAS_FSB_IBUF + +SRFF_INSTANCE | fsb/ASrf.REG | fsb/ASrf | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | fsb/ASrf.D | 9801 | ? | 0 | 0 | fsb/ASrf | NULL | NULL | fsb/ASrf.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK- | 9241 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | fsb/ASrf.Q | 9804 | ? | 0 | 0 | fsb/ASrf | NULL | NULL | fsb/ASrf.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/BERRrf | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nBERR_IOB_IBUF | 9281 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | C16M_IBUF/FCLK- | 9230 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/BERRrf | 9333 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/BERRrf.SI | iobm/BERRrf | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nBERR_IOB_IBUF | 9281 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/BERRrf.D1 | 9806 | ? | 0 | 4096 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/BERRrf.D2 | 9807 | ? | 0 | 4096 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_FALSE | nBERR_IOB_IBUF + +SRFF_INSTANCE | iobm/BERRrf.REG | iobm/BERRrf | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/BERRrf.D | 9805 | ? | 0 | 0 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | C16M_IBUF/FCLK- | 9230 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/BERRrf.Q | 9808 | ? | 0 | 0 | iobm/BERRrf | NULL | NULL | iobm/BERRrf.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/BERRrr | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nBERR_IOB_IBUF | 9281 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/BERRrr | 9334 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/BERRrr.SI | iobm/BERRrr | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nBERR_IOB_IBUF | 9281 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/BERRrr.D1 | 9810 | ? | 0 | 4096 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/BERRrr.D2 | 9811 | ? | 0 | 4096 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_FALSE | nBERR_IOB_IBUF + +SRFF_INSTANCE | iobm/BERRrr.REG | iobm/BERRrr | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/BERRrr.D | 9809 | ? | 0 | 0 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/BERRrr.Q | 9812 | ? | 0 | 0 | iobm/BERRrr | NULL | NULL | iobm/BERRrr.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/DoutOE | WarpSE_COPY_0_COPY_0 | 2155873280 | 7 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | IORW0 | 9261 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9292 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9294 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9293 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOREQr | 9308 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | AoutOE | 9374 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/DoutOE | 9335 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DoutOE.Q | iobm/DoutOE | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/DoutOE.SI | iobm/DoutOE | 0 | 6 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | IORW0 | 9261 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9292 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9294 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9293 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOREQr | 9308 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOREQr.Q | iobm/IOREQr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | AoutOE | 9374 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/DoutOE.D1 | 9814 | ? | 0 | 4096 | iobm/DoutOE | NULL | NULL | iobm/DoutOE.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/DoutOE.D2 | 9815 | ? | 0 | 4096 | iobm/DoutOE | NULL | NULL | iobm/DoutOE.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_FALSE | IORW0 | IV_TRUE | iobm/IOS_FSM_FFd3 +SPPTERM | 2 | IV_FALSE | IORW0 | IV_TRUE | iobm/IOS_FSM_FFd2 +SPPTERM | 5 | IV_FALSE | iobm/IOS_FSM_FFd3 | IV_FALSE | iobm/IOS_FSM_FFd1 | IV_FALSE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOREQr | IV_FALSE | AoutOE + +SRFF_INSTANCE | iobm/DoutOE.REG | iobm/DoutOE | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/DoutOE.D | 9813 | ? | 0 | 0 | iobm/DoutOE | NULL | NULL | iobm/DoutOE.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/DoutOE.Q | 9816 | ? | 0 | 0 | iobm/DoutOE | NULL | NULL | iobm/DoutOE.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/RESrf | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | N01 | 9259 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | C16M_IBUF/FCLK- | 9230 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/RESrf | 9336 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/RESrf.SI | iobm/RESrf | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | N01 | 9259 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/RESrf.D1 | 9818 | ? | 0 | 4096 | iobm/RESrf | NULL | NULL | iobm/RESrf.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/RESrf.D2 | 9819 | ? | 0 | 4096 | iobm/RESrf | NULL | NULL | iobm/RESrf.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_FALSE | N01 + +SRFF_INSTANCE | iobm/RESrf.REG | iobm/RESrf | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/RESrf.D | 9817 | ? | 0 | 0 | iobm/RESrf | NULL | NULL | iobm/RESrf.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | C16M_IBUF/FCLK- | 9230 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/RESrf.Q | 9820 | ? | 0 | 0 | iobm/RESrf | NULL | NULL | iobm/RESrf.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+OptxMapped | iobm/RESrr | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | N01 | 9259 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobm/RESrr | 9337 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | iobm/RESrr.SI | iobm/RESrr | 0 | 1 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | N01 | 9259 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | N01 | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobm/RESrr.D1 | 9822 | ? | 0 | 4096 | iobm/RESrr | NULL | NULL | iobm/RESrr.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobm/RESrr.D2 | 9823 | ? | 0 | 4096 | iobm/RESrr | NULL | NULL | iobm/RESrr.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_FALSE | N01 + +SRFF_INSTANCE | iobm/RESrr.REG | iobm/RESrr | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | iobm/RESrr.D | 9821 | ? | 0 | 0 | iobm/RESrr | NULL | NULL | iobm/RESrr.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | C16M_IBUF/FCLK | 9229 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 3 | 5 | II_FCLK +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | iobm/RESrr.Q | 9824 | ? | 0 | 0 | iobm/RESrr | NULL | NULL | iobm/RESrr.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/Clear1 | WarpSE_COPY_0_COPY_0 | 2155873280 | 13 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IORW1 | 9275 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | IORW0 | 9261 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | iobs/Clear1 | 9338 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.Q | iobs/Clear1 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | iobs/Clear1.EXP | 9984 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.EXP | iobs/Clear1 | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | iobs/Clear1.SI | iobs/Clear1 | 0 | 12 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IORW1 | 9275 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | IORW0 | 9261 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IORW0.Q | IORW0 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | iobs/Clear1.D1 | 9826 | ? | 0 | 4096 | iobs/Clear1 | NULL | NULL | iobs/Clear1.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | iobs/Clear1.D2 | 9827 | ? | 0 | 4096 | iobs/Clear1 | NULL | NULL | iobs/Clear1.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 3 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_FALSE | ALE1 OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | iobs/Clear1.EXP | 10125 | ? | 0 | 0 | iobs/Clear1 | NULL | NULL | iobs/Clear1.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 1 | IV_TRUE | A_FSB_19_IBUF +SIGNAL | NODE | iobs/Clear1.EXP | 9971 | ? | 0 | 0 | iobs/Clear1 | NULL | NULL | iobs/Clear1.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 4 | IV_FALSE | iobs/IORW1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_FALSE | ALE1 +SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | IORW0 | IV_TRUE | ALE1 +SPPTERM | 7 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1 +SPPTERM | 7 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1 SRFF_INSTANCE | iobs/Clear1.REG | iobs/Clear1 | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobs/Clear1.D | 9912 | ? | 538 | 0 | iobs/Clear1 | NULL | NULL | iobs/Clear1.XOR | 0 | 7 | ALU_F +NODE | iobs/Clear1.D | 9825 | ? | 0 | 0 | iobs/Clear1 | NULL | NULL | iobs/Clear1.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobs/Clear1.Q | 9915 | ? | 544 | 0 | iobs/Clear1 | NULL | NULL | iobs/Clear1.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB +NODE | iobs/Clear1.Q | 9828 | ? | 0 | 0 | iobs/Clear1 | NULL | NULL | iobs/Clear1.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | PrldLow+OptxMapped | iobs/IOREQ | WarpSE_COPY_0_COPY_0 | 2155873280 | 24 | 2 +MACROCELL_INSTANCE | PrldLow+OptxMapped | nRESout | WarpSE_COPY_0_COPY_0 | 2155873280 | 3 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | cnt/INITS_FSM_FFd1 | 9305 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd1.Q | cnt/INITS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +NODE | cnt/INITS_FSM_FFd2 | 9306 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd2.Q | cnt/INITS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOACTr | 9391 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_9_IBUF | 9297 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_8_IBUF | 9298 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_15_IBUF | 9299 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_12_IBUF | 9302 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_11_IBUF | 9303 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_10_IBUF | 9304 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP17_.EXP | 10081 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP17_.EXP | EXP17_ | 4 | 0 | MC_EXPORT +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobs/IOREQ | 9423 | ? | 560 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOREQ.Q | iobs/IOREQ | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | iobs/IOREQ.EXP | 10082 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOREQ.EXP | iobs/IOREQ | 4 | 0 | MC_EXPORT +NODE | nRESout | 9339 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRESout.Q | nRESout | 1 | 0 | MC_UIM -SIGNAL_INSTANCE | iobs/IOREQ.SI | iobs/IOREQ | 0 | 23 | 3 +SIGNAL_INSTANCE | nRESout.SI | nRESout | 0 | 2 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | cnt/INITS_FSM_FFd1 | 9305 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd1.Q | cnt/INITS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOACTr | 9391 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_9_IBUF | 9297 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_8_IBUF | 9298 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_15_IBUF | 9299 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_12_IBUF | 9302 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_11_IBUF | 9303 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_10_IBUF | 9304 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP17_.EXP | 10081 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP17_.EXP | EXP17_ | 4 | 0 | MC_EXPORT +NODE | cnt/INITS_FSM_FFd2 | 9306 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd2.Q | cnt/INITS_FSM_FFd2 | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobs/IOREQ.D1 | 9917 | ? | 539 | 4096 | iobs/IOREQ | NULL | NULL | iobs/IOREQ.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nRESout.D1 | 9830 | ? | 0 | 4096 | nRESout | NULL | NULL | nRESout.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobs/IOREQ.D2 | 9918 | ? | 539 | 4096 | iobs/IOREQ | NULL | NULL | iobs/IOREQ.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | EXP17_.EXP -SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 -SPPTERM | 2 | IV_TRUE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr -SPPTERM | 2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_FALSE | iobs/ALE1 -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | iobs/IOREQ.EXP | 10068 | ? | 520 | 0 | iobs/IOREQ | NULL | NULL | iobs/IOREQ.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 17 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | fsb/Ready1r -SPPTERM | 17 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | iobs/IOReady +SIGNAL | NODE | nRESout.D2 | 9831 | ? | 0 | 4096 | nRESout | NULL | NULL | nRESout.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_TRUE | cnt/INITS_FSM_FFd1 | IV_FALSE | cnt/INITS_FSM_FFd2 -SRFF_INSTANCE | iobs/IOREQ.REG | iobs/IOREQ | 0 | 2 | 1 +SRFF_INSTANCE | nRESout.REG | nRESout | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobs/IOREQ.D | 9916 | ? | 539 | 0 | iobs/IOREQ | NULL | NULL | iobs/IOREQ.XOR | 0 | 7 | ALU_F +NODE | nRESout.D | 9829 | ? | 0 | 0 | nRESout | NULL | NULL | nRESout.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobs/IOREQ.Q | 9919 | ? | 560 | 0 | iobs/IOREQ | NULL | NULL | iobs/IOREQ.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB +NODE | nRESout.Q | 9832 | ? | 0 | 0 | nRESout | NULL | NULL | nRESout.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RAMReady | WarpSE_COPY_0_COPY_0 | 2155873280 | 14 | 2 +MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RAMReady | WarpSE_COPY_0_COPY_0 | 2155873280 | 15 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd1 | 9290 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | ram/RefUrg | 9297 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrg.Q | ram/RefUrg | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9394 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +NODE | ram/RAMEN | 9302 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +NODE | ram/RefReq | 9315 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM +NODE | ram/BACTr | 9314 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP25_.EXP | 10115 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP25_.EXP | EXP25_ | 4 | 0 | MC_EXPORT +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | cnt/Timer<1>.EXP | 10028 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.EXP | cnt/Timer<1> | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nBERR_FSB_OBUF.EXP | 10029 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.EXP | nBERR_FSB_OBUF | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | ram/RAMReady | 9424 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | ram/RAMReady.EXP | 10116 | ? | 522 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.EXP | ram/RAMReady | 4 | 0 | MC_EXPORT +NODE | ram/RAMReady | 9340 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM -SIGNAL_INSTANCE | ram/RAMReady.SI | ram/RAMReady | 0 | 13 | 3 +SIGNAL_INSTANCE | ram/RAMReady.SI | ram/RAMReady | 0 | 14 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd1 | 9290 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | ram/RefUrg | 9297 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrg.Q | ram/RefUrg | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9394 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM +NODE | ram/RAMEN | 9302 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +NODE | ram/RefReq | 9315 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM +NODE | ram/BACTr | 9314 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP25_.EXP | 10115 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP25_.EXP | EXP25_ | 4 | 0 | MC_EXPORT +NODE | cnt/Timer<1>.EXP | 10028 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<1>.EXP | cnt/Timer<1> | 4 | 0 | MC_EXPORT +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nBERR_FSB_OBUF.EXP | 10029 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.EXP | nBERR_FSB_OBUF | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | ram/RAMReady.D1 | 9921 | ? | 540 | 4096 | ram/RAMReady | NULL | NULL | ram/RAMReady.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | ram/RAMReady.D1 | 9834 | ? | 0 | 4096 | ram/RAMReady | NULL | NULL | ram/RAMReady.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | ram/RAMReady.D2 | 9922 | ? | 540 | 4096 | ram/RAMReady | NULL | NULL | ram/RAMReady.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | EXP25_.EXP -SPPTERM | 4 | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 -SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | ram/BACTr -SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | fsb/ASrf -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | ram/RAMReady.EXP | 10105 | ? | 522 | 0 | ram/RAMReady | NULL | NULL | ram/RAMReady.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RAMEN -SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RAMEN | IV_TRUE | fsb/ASrf +SIGNAL | NODE | ram/RAMReady.D2 | 9835 | ? | 0 | 4096 | ram/RAMReady | NULL | NULL | ram/RAMReady.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | cnt/Timer<1>.EXP +SPPTERM | 1 | IV_TRUE | nBERR_FSB_OBUF.EXP +SPPTERM | 4 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefUrg +SPPTERM | 6 | IV_FALSE | cs/nOverlay | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefUrg | IV_TRUE | ram/BACTr +SPPTERM | 6 | IV_FALSE | cs/nOverlay | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefUrg | IV_FALSE | ram/RefReq +SPPTERM | 6 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefUrg | IV_FALSE | fsb/ASrf +SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefUrg | IV_FALSE | ram/RAMEN SRFF_INSTANCE | ram/RAMReady.REG | ram/RAMReady | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | ram/RAMReady.D | 9920 | ? | 540 | 0 | ram/RAMReady | NULL | NULL | ram/RAMReady.XOR | 0 | 7 | ALU_F +NODE | ram/RAMReady.D | 9833 | ? | 0 | 0 | ram/RAMReady | NULL | NULL | ram/RAMReady.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | ram/RAMReady.Q | 9923 | ? | 520 | 0 | ram/RAMReady | NULL | NULL | ram/RAMReady.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB +NODE | ram/RAMReady.Q | 9836 | ? | 0 | 0 | ram/RAMReady | NULL | NULL | ram/RAMReady.REG | 0 | 8 | SRFF_Q INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_1_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<1> | 9530 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | A_FSB<1> | 9445 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_1_IBUF | 9425 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_1_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_1_IBUF | 9341 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_1_IBUF | 0 | 5 | II_IMUX INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_2_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<2> | 9531 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | A_FSB<2> | 9446 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_2_IBUF | 9426 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_2_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_2_IBUF | 9342 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_2_IBUF | 0 | 5 | II_IMUX INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_3_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<3> | 9532 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | A_FSB<3> | 9447 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_3_IBUF | 9427 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_3_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_3_IBUF | 9343 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_3_IBUF | 0 | 5 | II_IMUX INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_4_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<4> | 9533 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | A_FSB<4> | 9448 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_4_IBUF | 9428 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_4_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_4_IBUF | 9344 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_4_IBUF | 0 | 5 | II_IMUX INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_5_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<5> | 9534 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | A_FSB<5> | 9449 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_5_IBUF | 9429 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_5_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_5_IBUF | 9345 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_5_IBUF | 0 | 5 | II_IMUX INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_6_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<6> | 9535 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | A_FSB<6> | 9450 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_6_IBUF | 9430 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_6_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_6_IBUF | 9346 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_6_IBUF | 0 | 5 | II_IMUX INPUT_INSTANCE | 0 | 0 | NULL | A_FSB_7_IBUF | WarpSE_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | A_FSB<7> | 9536 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | A_FSB<7> | 9451 | PI | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | A_FSB_7_IBUF | 9431 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_7_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_7_IBUF | 9347 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_7_IBUF | 0 | 5 | II_IMUX -MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RefRAS | WarpSE_COPY_0_COPY_0 | 2155873280 | 3 | 1 +MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RegUrgSync | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | RefUrg | 9243 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RefUrg.Q | RefUrg | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | ram/RefRAS | 9432 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefRAS.Q | ram/RefRAS | 1 | 0 | MC_UIM +NODE | ram/RegUrgSync | 9348 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RegUrgSync.Q | ram/RegUrgSync | 1 | 0 | MC_UIM -SIGNAL_INSTANCE | ram/RefRAS.SI | ram/RefRAS | 0 | 2 | 2 +SIGNAL_INSTANCE | ram/RegUrgSync.SI | ram/RegUrgSync | 0 | 1 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | RefUrg | 9243 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RefUrg.Q | RefUrg | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | ram/RefRAS.D1 | 9925 | ? | 541 | 4096 | ram/RefRAS | NULL | NULL | ram/RefRAS.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | ram/RegUrgSync.D1 | 9838 | ? | 0 | 4096 | ram/RegUrgSync | NULL | NULL | ram/RegUrgSync.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | ram/RefRAS.D2 | 9926 | ? | 541 | 4096 | ram/RefRAS | NULL | NULL | ram/RefRAS.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2 +SIGNAL | NODE | ram/RegUrgSync.D2 | 9839 | ? | 0 | 4096 | ram/RegUrgSync | NULL | NULL | ram/RegUrgSync.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | RefUrg -SRFF_INSTANCE | ram/RefRAS.REG | ram/RefRAS | 0 | 2 | 1 +SRFF_INSTANCE | ram/RegUrgSync.REG | ram/RegUrgSync | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | ram/RefRAS.D | 9924 | ? | 541 | 0 | ram/RefRAS | NULL | NULL | ram/RefRAS.XOR | 0 | 7 | ALU_F +NODE | ram/RegUrgSync.D | 9837 | ? | 0 | 0 | ram/RegUrgSync | NULL | NULL | ram/RegUrgSync.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | ram/RefRAS.Q | 9927 | ? | 0 | 0 | ram/RefRAS | NULL | NULL | ram/RefRAS.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB - -MACROCELL_INSTANCE | PrldLow+OptxMapped | ram/RegUrgentSync | WarpSE_COPY_0_COPY_0 | 2155873280 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefUrgent | 9406 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefUrgent.Q | cnt/RefUrgent | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | ram/RegUrgentSync | 9433 | ? | 526 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RegUrgentSync.Q | ram/RegUrgentSync | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | ram/RegUrgentSync.SI | ram/RegUrgentSync | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/RefUrgent | 9406 | ? | 542 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/RefUrgent.Q | cnt/RefUrgent | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | ram/RegUrgentSync.D1 | 9929 | ? | 542 | 4096 | ram/RegUrgentSync | NULL | NULL | ram/RegUrgentSync.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | ram/RegUrgentSync.D2 | 9930 | ? | 542 | 4096 | ram/RegUrgentSync | NULL | NULL | ram/RegUrgentSync.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | cnt/RefUrgent - -SRFF_INSTANCE | ram/RegUrgentSync.REG | ram/RegUrgentSync | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | ram/RegUrgentSync.D | 9928 | ? | 542 | 0 | ram/RegUrgentSync | NULL | NULL | ram/RegUrgentSync.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | ram/RegUrgentSync.Q | 9931 | ? | 526 | 0 | ram/RegUrgentSync | NULL | NULL | ram/RegUrgentSync.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB +NODE | ram/RegUrgSync.Q | 9840 | ? | 0 | 0 | ram/RegUrgSync | NULL | NULL | ram/RegUrgSync.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | OptxMapped | RA_0_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 3 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_10_IBUF | 9304 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_10_IBUF | 9220 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +NODE | ram/RASEL | 9289 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_1_IBUF | 9425 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_1_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_1_IBUF | 9341 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_1_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | RA_0_OBUF | 9434 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_0_OBUF.Q | RA_0_OBUF | 0 | 0 | MC_Q +NODE | RA_0_OBUF | 9349 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_0_OBUF.Q | RA_0_OBUF | 0 | 0 | MC_Q SIGNAL_INSTANCE | RA_0_OBUF.SI | RA_0_OBUF | 0 | 3 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_10_IBUF | 9304 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_10_IBUF | 9220 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +NODE | ram/RASEL | 9289 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_1_IBUF | 9425 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_1_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_1_IBUF | 9341 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_1_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | RA_0_OBUF.D1 | 9933 | ? | 0 | 4096 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | RA_0_OBUF.D1 | 9842 | ? | 0 | 4096 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | RA_0_OBUF.D2 | 9934 | ? | 0 | 4096 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | RA_0_OBUF.D2 | 9843 | ? | 0 | 4096 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.SI | 2 | 9 | MC_SI_D2 SPPTERM | 2 | IV_TRUE | A_FSB_10_IBUF | IV_FALSE | ram/RASEL SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_1_IBUF SRFF_INSTANCE | RA_0_OBUF.REG | RA_0_OBUF | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | RA_0_OBUF.D | 9932 | ? | 0 | 0 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.XOR | 0 | 7 | ALU_F +NODE | RA_0_OBUF.D | 9841 | ? | 0 | 0 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | RA_0_OBUF.Q | 9935 | ? | 0 | 0 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.REG | 0 | 8 | SRFF_Q +NODE | RA_0_OBUF.Q | 9844 | ? | 0 | 0 | RA_0_OBUF | NULL | NULL | RA_0_OBUF.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | OptxMapped | RA_1_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 3 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_11_IBUF | 9303 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_11_IBUF | 9219 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +NODE | ram/RASEL | 9289 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_2_IBUF | 9426 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_2_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_2_IBUF | 9342 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_2_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | RA_1_OBUF | 9435 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.Q | RA_1_OBUF | 0 | 0 | MC_Q +NODE | RA_1_OBUF | 9350 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.Q | RA_1_OBUF | 0 | 0 | MC_Q SIGNAL_INSTANCE | RA_1_OBUF.SI | RA_1_OBUF | 0 | 3 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_11_IBUF | 9303 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_11_IBUF | 9219 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +NODE | ram/RASEL | 9289 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_2_IBUF | 9426 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_2_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_2_IBUF | 9342 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_2_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | RA_1_OBUF.D1 | 9937 | ? | 0 | 4096 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | RA_1_OBUF.D1 | 9846 | ? | 0 | 4096 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | RA_1_OBUF.D2 | 9938 | ? | 0 | 4096 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | RA_1_OBUF.D2 | 9847 | ? | 0 | 4096 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.SI | 2 | 9 | MC_SI_D2 SPPTERM | 2 | IV_TRUE | A_FSB_11_IBUF | IV_FALSE | ram/RASEL SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_2_IBUF SRFF_INSTANCE | RA_1_OBUF.REG | RA_1_OBUF | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | RA_1_OBUF.D | 9936 | ? | 0 | 0 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.XOR | 0 | 7 | ALU_F +NODE | RA_1_OBUF.D | 9845 | ? | 0 | 0 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | RA_1_OBUF.Q | 9939 | ? | 0 | 0 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.REG | 0 | 8 | SRFF_Q +NODE | RA_1_OBUF.Q | 9848 | ? | 0 | 0 | RA_1_OBUF | NULL | NULL | RA_1_OBUF.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | OptxMapped | RA_2_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 4 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_12_IBUF | 9302 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_12_IBUF | 9218 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +NODE | ram/RASEL | 9289 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_3_IBUF | 9427 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_3_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_3_IBUF | 9343 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_3_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_7_IBUF | 9431 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_7_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_7_IBUF | 9347 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_7_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | RA_2_OBUF | 9436 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.Q | RA_2_OBUF | 0 | 0 | MC_Q +NODE | RA_2_OBUF | 9351 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.Q | RA_2_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | RA_2_OBUF.EXP | 10113 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.EXP | RA_2_OBUF | 4 | 0 | MC_EXPORT +NODE | RA_2_OBUF.EXP | 10005 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.EXP | RA_2_OBUF | 4 | 0 | MC_EXPORT SIGNAL_INSTANCE | RA_2_OBUF.SI | RA_2_OBUF | 0 | 4 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_12_IBUF | 9302 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_12_IBUF | 9218 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +NODE | ram/RASEL | 9289 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_3_IBUF | 9427 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_3_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_3_IBUF | 9343 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_3_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_7_IBUF | 9431 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_7_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_7_IBUF | 9347 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_7_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | RA_2_OBUF.D1 | 9941 | ? | 0 | 4096 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | RA_2_OBUF.D1 | 9850 | ? | 0 | 4096 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | RA_2_OBUF.D2 | 9942 | ? | 0 | 4096 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | RA_2_OBUF.D2 | 9851 | ? | 0 | 4096 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.SI | 2 | 9 | MC_SI_D2 SPPTERM | 2 | IV_TRUE | A_FSB_12_IBUF | IV_FALSE | ram/RASEL SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_3_IBUF OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | RA_2_OBUF.EXP | 10102 | ? | 0 | 0 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | RA_2_OBUF.EXP | 9993 | ? | 0 | 0 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.SI | 7 | 9 | MC_SI_EXPORT SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_7_IBUF SRFF_INSTANCE | RA_2_OBUF.REG | RA_2_OBUF | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | RA_2_OBUF.D | 9940 | ? | 0 | 0 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.XOR | 0 | 7 | ALU_F +NODE | RA_2_OBUF.D | 9849 | ? | 0 | 0 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | RA_2_OBUF.Q | 9943 | ? | 0 | 0 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.REG | 0 | 8 | SRFF_Q +NODE | RA_2_OBUF.Q | 9852 | ? | 0 | 0 | RA_2_OBUF | NULL | NULL | RA_2_OBUF.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | OptxMapped | RA_3_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 5 | 2 +MACROCELL_INSTANCE | OptxMapped | RA_3_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 3 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +NODE | ram/RASEL | 9289 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_4_IBUF | 9428 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_4_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_15_IBUF | 9299 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_6_IBUF | 9430 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_6_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_4_IBUF | 9344 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_4_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | RA_3_OBUF | 9437 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.Q | RA_3_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | RA_3_OBUF.EXP | 10111 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.EXP | RA_3_OBUF | 4 | 0 | MC_EXPORT +NODE | RA_3_OBUF | 9352 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.Q | RA_3_OBUF | 0 | 0 | MC_Q -SIGNAL_INSTANCE | RA_3_OBUF.SI | RA_3_OBUF | 0 | 5 | 3 +SIGNAL_INSTANCE | RA_3_OBUF.SI | RA_3_OBUF | 0 | 3 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +NODE | ram/RASEL | 9289 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_4_IBUF | 9428 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_4_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_15_IBUF | 9299 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_6_IBUF | 9430 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_6_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_4_IBUF | 9344 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_4_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | RA_3_OBUF.D1 | 9945 | ? | 0 | 4096 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | RA_3_OBUF.D1 | 9854 | ? | 0 | 4096 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | RA_3_OBUF.D2 | 9946 | ? | 0 | 4096 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | RA_3_OBUF.D2 | 9855 | ? | 0 | 4096 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.SI | 2 | 9 | MC_SI_D2 SPPTERM | 2 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | ram/RASEL SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_4_IBUF -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | RA_3_OBUF.EXP | 10100 | ? | 0 | 0 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 2 | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | ram/RASEL -SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_6_IBUF SRFF_INSTANCE | RA_3_OBUF.REG | RA_3_OBUF | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | RA_3_OBUF.D | 9944 | ? | 0 | 0 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.XOR | 0 | 7 | ALU_F +NODE | RA_3_OBUF.D | 9853 | ? | 0 | 0 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | RA_3_OBUF.Q | 9947 | ? | 0 | 0 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.REG | 0 | 8 | SRFF_Q +NODE | RA_3_OBUF.Q | 9856 | ? | 0 | 0 | RA_3_OBUF | NULL | NULL | RA_3_OBUF.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | OptxMapped | RA_4_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 11 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +NODE | ram/RS_FSM_FFd1 | 9290 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | ram/RefUrg | 9297 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrg.Q | ram/RefUrg | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | ram/RAMEN | 9302 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay0.EXP | 10109 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.EXP | cs/nOverlay0 | 4 | 0 | MC_EXPORT +NODE | iobs/PS_FSM_FFd1.EXP | 10004 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.EXP | iobs/PS_FSM_FFd1 | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | RA_4_OBUF | 9438 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.Q | RA_4_OBUF | 0 | 0 | MC_Q +NODE | RA_4_OBUF | 9353 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.Q | RA_4_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | RA_4_OBUF.EXP | 10110 | ? | 529 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.EXP | RA_4_OBUF | 4 | 0 | MC_EXPORT +NODE | RA_4_OBUF.EXP | 10003 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.EXP | RA_4_OBUF | 4 | 0 | MC_EXPORT SIGNAL_INSTANCE | RA_4_OBUF.SI | RA_4_OBUF | 0 | 11 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +NODE | ram/RS_FSM_FFd1 | 9290 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | ram/RefUrg | 9297 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrg.Q | ram/RefUrg | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | ram/RAMEN | 9302 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay0.EXP | 10109 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay0.EXP | cs/nOverlay0 | 4 | 0 | MC_EXPORT +NODE | iobs/PS_FSM_FFd1.EXP | 10004 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.EXP | iobs/PS_FSM_FFd1 | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | RA_4_OBUF.D1 | 9949 | ? | 0 | 4096 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | RA_4_OBUF.D1 | 9858 | ? | 0 | 4096 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | RA_4_OBUF.D2 | 9950 | ? | 0 | 4096 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | cs/nOverlay0.EXP -SPPTERM | 2 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | ram/RASEL +SIGNAL | NODE | RA_4_OBUF.D2 | 9859 | ? | 0 | 4096 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | iobs/PS_FSM_FFd1.EXP OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | RA_4_OBUF.EXP | 10099 | ? | 529 | 0 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RAMEN -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RAMEN | IV_TRUE | fsb/ASrf -SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RAMEN -SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RAMEN | IV_TRUE | fsb/ASrf +SIGNAL | NODE | RA_4_OBUF.EXP | 9991 | ? | 0 | 0 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 4 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RefUrg | IV_TRUE | fsb/ASrf +SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | ram/RefUrg +SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | ram/RAMEN +SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | ram/RefUrg | IV_TRUE | fsb/ASrf +SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | ram/RAMEN | IV_TRUE | fsb/ASrf SRFF_INSTANCE | RA_4_OBUF.REG | RA_4_OBUF | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | RA_4_OBUF.D | 9948 | ? | 0 | 0 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.XOR | 0 | 7 | ALU_F +NODE | RA_4_OBUF.D | 9857 | ? | 0 | 0 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | RA_4_OBUF.Q | 9951 | ? | 0 | 0 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.REG | 0 | 8 | SRFF_Q +NODE | RA_4_OBUF.Q | 9860 | ? | 0 | 0 | RA_4_OBUF | NULL | NULL | RA_4_OBUF.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | OptxMapped | RA_5_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 10 | 2 +MACROCELL_INSTANCE | OptxMapped | RA_5_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 3 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_15_IBUF | 9215 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | ram/RASEL | 9289 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RA_3_OBUF.EXP | 10111 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.EXP | RA_3_OBUF | 4 | 0 | MC_EXPORT +NODE | A_FSB_6_IBUF | 9346 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_6_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | RA_5_OBUF | 9439 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.Q | RA_5_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | RA_5_OBUF.EXP | 10112 | ? | 524 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.EXP | RA_5_OBUF | 4 | 0 | MC_EXPORT +NODE | RA_5_OBUF | 9354 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.Q | RA_5_OBUF | 0 | 0 | MC_Q -SIGNAL_INSTANCE | RA_5_OBUF.SI | RA_5_OBUF | 0 | 10 | 3 +SIGNAL_INSTANCE | RA_5_OBUF.SI | RA_5_OBUF | 0 | 3 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_15_IBUF | 9215 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | ram/RASEL | 9289 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RA_3_OBUF.EXP | 10111 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.EXP | RA_3_OBUF | 4 | 0 | MC_EXPORT +NODE | A_FSB_6_IBUF | 9346 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_6_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | RA_5_OBUF.D1 | 9953 | ? | 0 | 4096 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | RA_5_OBUF.D1 | 9862 | ? | 0 | 4096 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | RA_5_OBUF.D2 | 9954 | ? | 0 | 4096 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | RA_3_OBUF.EXP -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | RA_5_OBUF.EXP | 10101 | ? | 524 | 0 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | fsb/ASrf -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf -SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 -SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf +SIGNAL | NODE | RA_5_OBUF.D2 | 9863 | ? | 0 | 4096 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_TRUE | A_FSB_15_IBUF | IV_FALSE | ram/RASEL +SPPTERM | 2 | IV_TRUE | ram/RASEL | IV_TRUE | A_FSB_6_IBUF SRFF_INSTANCE | RA_5_OBUF.REG | RA_5_OBUF | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | RA_5_OBUF.D | 9952 | ? | 0 | 0 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.XOR | 0 | 7 | ALU_F +NODE | RA_5_OBUF.D | 9861 | ? | 0 | 0 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | RA_5_OBUF.Q | 9955 | ? | 0 | 0 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.REG | 0 | 8 | SRFF_Q +NODE | RA_5_OBUF.Q | 9864 | ? | 0 | 0 | RA_5_OBUF | NULL | NULL | RA_5_OBUF.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | OptxMapped | RA_6_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 12 | 2 +MACROCELL_INSTANCE | OptxMapped | RA_6_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 11 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +NODE | ram/RASEL | 9289 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | iobs/IOReady | 9276 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefReq | 9395 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM +NODE | iobs/IOACTr | 9307 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | IOBERR | 9311 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RA_2_OBUF.EXP | 10113 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.EXP | RA_2_OBUF | 4 | 0 | MC_EXPORT +NODE | RA_2_OBUF.EXP | 10005 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.EXP | RA_2_OBUF | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | RA_6_OBUF | 9440 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.Q | RA_6_OBUF | 0 | 0 | MC_Q +NODE | RA_6_OBUF | 9355 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.Q | RA_6_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | RA_6_OBUF.EXP | 10114 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.EXP | RA_6_OBUF | 4 | 0 | MC_EXPORT +NODE | RA_6_OBUF.EXP | 10006 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.EXP | RA_6_OBUF | 4 | 0 | MC_EXPORT -SIGNAL_INSTANCE | RA_6_OBUF.SI | RA_6_OBUF | 0 | 12 | 3 +SIGNAL_INSTANCE | RA_6_OBUF.SI | RA_6_OBUF | 0 | 11 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +NODE | ram/RASEL | 9289 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | iobs/IOReady | 9276 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefReq | 9395 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM +NODE | iobs/IOACTr | 9307 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOACTr.Q | iobs/IOACTr | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | IOBERR | 9311 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RA_2_OBUF.EXP | 10113 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.EXP | RA_2_OBUF | 4 | 0 | MC_EXPORT +NODE | RA_2_OBUF.EXP | 10005 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.EXP | RA_2_OBUF | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | RA_6_OBUF.D1 | 9957 | ? | 0 | 4096 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | RA_6_OBUF.D1 | 9866 | ? | 0 | 4096 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | RA_6_OBUF.D2 | 9958 | ? | 0 | 4096 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | RA_6_OBUF.D2 | 9867 | ? | 0 | 4096 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.SI | 2 | 9 | MC_SI_D2 SPPTERM | 1 | IV_TRUE | RA_2_OBUF.EXP SPPTERM | 2 | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | ram/RASEL OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | RA_6_OBUF.EXP | 10103 | ? | 540 | 0 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefReq -SPPTERM | 6 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefReq -SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RAMEN -SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RAMEN +SIGNAL | NODE | RA_6_OBUF.EXP | 9994 | ? | 0 | 0 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 3 | IV_TRUE | iobs/IOReady | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf +SPPTERM | 6 | IV_TRUE | iobs/Once | IV_TRUE | iobs/IOReady | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_TRUE | IOBERR | IV_TRUE | ALE1 +SPPTERM | 7 | IV_TRUE | iobs/Once | IV_FALSE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_FALSE | IOBERR | IV_TRUE | ALE1 +SPPTERM | 7 | IV_TRUE | iobs/Once | IV_FALSE | iobs/IOReady | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/IOACTr | IV_FALSE | IOBERR | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1 SRFF_INSTANCE | RA_6_OBUF.REG | RA_6_OBUF | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | RA_6_OBUF.D | 9956 | ? | 0 | 0 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.XOR | 0 | 7 | ALU_F +NODE | RA_6_OBUF.D | 9865 | ? | 0 | 0 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | RA_6_OBUF.Q | 9959 | ? | 0 | 0 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.REG | 0 | 8 | SRFF_Q +NODE | RA_6_OBUF.Q | 9868 | ? | 0 | 0 | RA_6_OBUF | NULL | NULL | RA_6_OBUF.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | OptxMapped | RA_7_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 3 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +NODE | ram/RASEL | 9289 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_8_IBUF | 9298 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_8_IBUF | 9214 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | RA_7_OBUF | 9441 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_7_OBUF.Q | RA_7_OBUF | 0 | 0 | MC_Q +NODE | RA_7_OBUF | 9356 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_7_OBUF.Q | RA_7_OBUF | 0 | 0 | MC_Q SIGNAL_INSTANCE | RA_7_OBUF.SI | RA_7_OBUF | 0 | 3 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +NODE | ram/RASEL | 9289 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_8_IBUF | 9298 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_8_IBUF | 9214 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | RA_7_OBUF.D1 | 9961 | ? | 0 | 4096 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | RA_7_OBUF.D1 | 9870 | ? | 0 | 4096 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | RA_7_OBUF.D2 | 9962 | ? | 0 | 4096 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | RA_7_OBUF.D2 | 9871 | ? | 0 | 4096 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.SI | 2 | 9 | MC_SI_D2 SPPTERM | 2 | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | ram/RASEL SPPTERM | 2 | IV_TRUE | A_FSB_17_IBUF | IV_FALSE | ram/RASEL SRFF_INSTANCE | RA_7_OBUF.REG | RA_7_OBUF | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | RA_7_OBUF.D | 9960 | ? | 0 | 0 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.XOR | 0 | 7 | ALU_F +NODE | RA_7_OBUF.D | 9869 | ? | 0 | 0 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | RA_7_OBUF.Q | 9963 | ? | 0 | 0 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.REG | 0 | 8 | SRFF_Q +NODE | RA_7_OBUF.Q | 9872 | ? | 0 | 0 | RA_7_OBUF | NULL | NULL | RA_7_OBUF.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | OptxMapped | RA_8_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 8 | 1 +MACROCELL_INSTANCE | OptxMapped | RA_8_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 6 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | ram/RASEL | 9289 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<7>.EXP | 10122 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.EXP | cnt/LTimer<7> | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF$BUF0.EXP | 10123 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.EXP | A_FSB_21_IBUF$BUF0 | 4 | 0 | MC_EXPORT +NODE | A_FSB_9_IBUF | 9213 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | RA_8_OBUF | 9442 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_8_OBUF.Q | RA_8_OBUF | 0 | 0 | MC_Q +NODE | RA_8_OBUF | 9357 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_8_OBUF.Q | RA_8_OBUF | 0 | 0 | MC_Q -SIGNAL_INSTANCE | RA_8_OBUF.SI | RA_8_OBUF | 0 | 8 | 2 +SIGNAL_INSTANCE | RA_8_OBUF.SI | RA_8_OBUF | 0 | 6 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | ram/RASEL | 9289 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/LTimer<7>.EXP | 10122 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/LTimer<7>.EXP | cnt/LTimer<7> | 4 | 0 | MC_EXPORT -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF$BUF0.EXP | 10123 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.EXP | A_FSB_21_IBUF$BUF0 | 4 | 0 | MC_EXPORT +NODE | A_FSB_9_IBUF | 9213 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | RA_8_OBUF.D1 | 9965 | ? | 0 | 4096 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | RA_8_OBUF.D1 | 9874 | ? | 0 | 4096 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | RA_8_OBUF.D2 | 9966 | ? | 0 | 4096 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | cnt/LTimer<7>.EXP -SPPTERM | 1 | IV_TRUE | A_FSB_21_IBUF$BUF0.EXP +SIGNAL | NODE | RA_8_OBUF.D2 | 9875 | ? | 0 | 4096 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.SI | 2 | 9 | MC_SI_D2 SPPTERM | 2 | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_18_IBUF +SPPTERM | 2 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_18_IBUF +SPPTERM | 2 | IV_TRUE | A_FSB_18_IBUF | IV_FALSE | cs/nOverlay SPPTERM | 2 | IV_TRUE | A_FSB_18_IBUF | IV_FALSE | ram/RASEL -SPPTERM | 3 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_TRUE | A_FSB_18_IBUF -SPPTERM | 3 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | cs/nOverlay1 -SPPTERM | 3 | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_FALSE | cs/nOverlay1 +SPPTERM | 5 | IV_TRUE | A_FSB_9_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay | IV_TRUE | ram/RASEL SRFF_INSTANCE | RA_8_OBUF.REG | RA_8_OBUF | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | RA_8_OBUF.D | 9964 | ? | 0 | 0 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.XOR | 0 | 7 | ALU_F +NODE | RA_8_OBUF.D | 9873 | ? | 0 | 0 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | RA_8_OBUF.Q | 9967 | ? | 0 | 0 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.REG | 0 | 8 | SRFF_Q +NODE | RA_8_OBUF.Q | 9876 | ? | 0 | 0 | RA_8_OBUF | NULL | NULL | RA_8_OBUF.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | OptxMapped | RA_9_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 3 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +NODE | ram/RASEL | 9289 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | RA_9_OBUF | 9443 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.Q | RA_9_OBUF | 0 | 0 | MC_Q +NODE | RA_9_OBUF | 9358 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.Q | RA_9_OBUF | 0 | 0 | MC_Q SIGNAL_INSTANCE | RA_9_OBUF.SI | RA_9_OBUF | 0 | 3 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +NODE | ram/RASEL | 9289 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | RA_9_OBUF.D1 | 9969 | ? | 0 | 4096 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | RA_9_OBUF.D1 | 9878 | ? | 0 | 4096 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | RA_9_OBUF.D2 | 9970 | ? | 0 | 4096 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | RA_9_OBUF.D2 | 9879 | ? | 0 | 4096 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.SI | 2 | 9 | MC_SI_D2 SPPTERM | 2 | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | ram/RASEL SPPTERM | 2 | IV_TRUE | A_FSB_19_IBUF | IV_FALSE | ram/RASEL SRFF_INSTANCE | RA_9_OBUF.REG | RA_9_OBUF | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | RA_9_OBUF.D | 9968 | ? | 0 | 0 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.XOR | 0 | 7 | ALU_F +NODE | RA_9_OBUF.D | 9877 | ? | 0 | 0 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | RA_9_OBUF.Q | 9971 | ? | 0 | 0 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.REG | 0 | 8 | SRFF_Q +NODE | RA_9_OBUF.Q | 9880 | ? | 0 | 0 | RA_9_OBUF | NULL | NULL | RA_9_OBUF.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | Inv+OptxMapped | nDoutOE_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 2 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DoutOE | 9414 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DoutOE.Q | iobm/DoutOE | 1 | 0 | MC_UIM +NODE | iobm/DoutOE | 9335 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DoutOE.Q | iobm/DoutOE | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/AoutOE | 9460 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +NODE | AoutOE | 9374 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nDoutOE_OBUF | 9444 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDoutOE_OBUF.Q | nDoutOE_OBUF | 0 | 0 | MC_Q +NODE | nDoutOE_OBUF | 9359 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDoutOE_OBUF.Q | nDoutOE_OBUF | 0 | 0 | MC_Q SIGNAL_INSTANCE | nDoutOE_OBUF.SI | nDoutOE_OBUF | 0 | 2 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DoutOE | 9414 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DoutOE.Q | iobm/DoutOE | 1 | 0 | MC_UIM +NODE | iobm/DoutOE | 9335 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DoutOE.Q | iobm/DoutOE | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/AoutOE | 9460 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +NODE | AoutOE | 9374 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nDoutOE_OBUF.D1 | 9973 | ? | 0 | 4096 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nDoutOE_OBUF.D1 | 9882 | ? | 0 | 4096 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nDoutOE_OBUF.D2 | 9974 | ? | 0 | 4096 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | iobm/DoutOE | IV_FALSE | cnt/AoutOE +SIGNAL | NODE | nDoutOE_OBUF.D2 | 9883 | ? | 0 | 4096 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_TRUE | iobm/DoutOE | IV_FALSE | AoutOE SRFF_INSTANCE | nDoutOE_OBUF.REG | nDoutOE_OBUF | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nDoutOE_OBUF.D | 9972 | ? | 0 | 0 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.XOR | 0 | 7 | ALU_F +NODE | nDoutOE_OBUF.D | 9881 | ? | 0 | 0 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nDoutOE_OBUF.Q | 9975 | ? | 0 | 0 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.REG | 0 | 8 | SRFF_Q +NODE | nDoutOE_OBUF.Q | 9884 | ? | 0 | 0 | nDoutOE_OBUF | NULL | NULL | nDoutOE_OBUF.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | Inv+OptxMapped | nOE_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 2 | 1 +MACROCELL_INSTANCE | Inv+OptxMapped | nOE_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 17 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nCAS_OBUF.EXP | 10000 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nCAS_OBUF.EXP | nCAS_OBUF | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nOE_OBUF | 9445 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nOE_OBUF.Q | nOE_OBUF | 0 | 0 | MC_Q +NODE | nOE_OBUF | 9360 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nOE_OBUF.Q | nOE_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | nOE_OBUF.EXP | 10001 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nOE_OBUF.EXP | nOE_OBUF | 4 | 0 | MC_EXPORT -SIGNAL_INSTANCE | nOE_OBUF.SI | nOE_OBUF | 0 | 2 | 2 +SIGNAL_INSTANCE | nOE_OBUF.SI | nOE_OBUF | 0 | 17 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nCAS_OBUF.EXP | 10000 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nCAS_OBUF.EXP | nCAS_OBUF | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nOE_OBUF.D1 | 9977 | ? | 0 | 4096 | nOE_OBUF | NULL | NULL | nOE_OBUF.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nOE_OBUF.D1 | 9886 | ? | 0 | 4096 | nOE_OBUF | NULL | NULL | nOE_OBUF.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nOE_OBUF.D2 | 9978 | ? | 0 | 4096 | nOE_OBUF | NULL | NULL | nOE_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF +SIGNAL | NODE | nOE_OBUF.D2 | 9887 | ? | 0 | 4096 | nOE_OBUF | NULL | NULL | nOE_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | nCAS_OBUF.EXP +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | nOE_OBUF.EXP | 9989 | ? | 0 | 0 | nOE_OBUF | NULL | NULL | nOE_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf +SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 +SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf +SPPTERM | 13 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 +SPPTERM | 13 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 SRFF_INSTANCE | nOE_OBUF.REG | nOE_OBUF | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nOE_OBUF.D | 9976 | ? | 0 | 0 | nOE_OBUF | NULL | NULL | nOE_OBUF.XOR | 0 | 7 | ALU_F +NODE | nOE_OBUF.D | 9885 | ? | 0 | 0 | nOE_OBUF | NULL | NULL | nOE_OBUF.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nOE_OBUF.Q | 9979 | ? | 0 | 0 | nOE_OBUF | NULL | NULL | nOE_OBUF.REG | 0 | 8 | SRFF_Q +NODE | nOE_OBUF.Q | 9888 | ? | 0 | 0 | nOE_OBUF | NULL | NULL | nOE_OBUF.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | Inv+OptxMapped | nROMWE_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 16 | 2 +MACROCELL_INSTANCE | Inv+OptxMapped | nROMWE_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 14 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nROMWE_OBUF | 9446 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.Q | nROMWE_OBUF | 0 | 0 | MC_Q +NODE | nROMWE_OBUF | 9361 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.Q | nROMWE_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | nROMWE_OBUF.EXP | 10090 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.EXP | nROMWE_OBUF | 4 | 0 | MC_EXPORT +NODE | nROMWE_OBUF.EXP | 9983 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.EXP | nROMWE_OBUF | 4 | 0 | MC_EXPORT -SIGNAL_INSTANCE | nROMWE_OBUF.SI | nROMWE_OBUF | 0 | 16 | 3 +SIGNAL_INSTANCE | nROMWE_OBUF.SI | nROMWE_OBUF | 0 | 14 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nROMWE_OBUF.D1 | 9981 | ? | 0 | 4096 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nROMWE_OBUF.D1 | 9890 | ? | 0 | 4096 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nROMWE_OBUF.D2 | 9982 | ? | 0 | 4096 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | nROMWE_OBUF.D2 | 9891 | ? | 0 | 4096 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.SI | 2 | 9 | MC_SI_D2 SPPTERM | 2 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | nROMWE_OBUF.EXP | 10076 | ? | 503 | 0 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 14 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1 -SPPTERM | 14 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1 +SIGNAL | NODE | nROMWE_OBUF.EXP | 9970 | ? | 0 | 0 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 12 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf +SPPTERM | 12 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd1 +SPPTERM | 12 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf SRFF_INSTANCE | nROMWE_OBUF.REG | nROMWE_OBUF | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nROMWE_OBUF.D | 9980 | ? | 0 | 0 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.XOR | 0 | 7 | ALU_F +NODE | nROMWE_OBUF.D | 9889 | ? | 0 | 0 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nROMWE_OBUF.Q | 9983 | ? | 0 | 0 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.REG | 0 | 8 | SRFF_Q +NODE | nROMWE_OBUF.Q | 9892 | ? | 0 | 0 | nROMWE_OBUF | NULL | NULL | nROMWE_OBUF.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | Inv+OptxMapped | nVPA_FSB_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 2 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/VPA | 9351 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM +NODE | fsb/VPA | 9271 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nVPA_FSB_OBUF | 9447 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nVPA_FSB_OBUF.Q | nVPA_FSB_OBUF | 0 | 0 | MC_Q +NODE | nVPA_FSB_OBUF | 9362 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nVPA_FSB_OBUF.Q | nVPA_FSB_OBUF | 0 | 0 | MC_Q SIGNAL_INSTANCE | nVPA_FSB_OBUF.SI | nVPA_FSB_OBUF | 0 | 2 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/VPA | 9351 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM +NODE | fsb/VPA | 9271 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nVPA_FSB_OBUF.D1 | 9985 | ? | 0 | 4096 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nVPA_FSB_OBUF.D1 | 9894 | ? | 0 | 4096 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nVPA_FSB_OBUF.D2 | 9986 | ? | 0 | 4096 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | nVPA_FSB_OBUF.D2 | 9895 | ? | 0 | 4096 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.SI | 2 | 9 | MC_SI_D2 SPPTERM | 2 | IV_TRUE | fsb/VPA | IV_FALSE | nAS_FSB_IBUF SRFF_INSTANCE | nVPA_FSB_OBUF.REG | nVPA_FSB_OBUF | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nVPA_FSB_OBUF.D | 9984 | ? | 0 | 0 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.XOR | 0 | 7 | ALU_F +NODE | nVPA_FSB_OBUF.D | 9893 | ? | 0 | 0 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nVPA_FSB_OBUF.Q | 9987 | ? | 0 | 0 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.REG | 0 | 8 | SRFF_Q +NODE | nVPA_FSB_OBUF.Q | 9896 | ? | 0 | 0 | nVPA_FSB_OBUF | NULL | NULL | nVPA_FSB_OBUF.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | iobm/nDinLE | WarpSE_COPY_0_COPY_0 | 2424308736 | 7 | 2 +MACROCELL_INSTANCE | OptxMapped | nADoutLE0_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 7 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | ALE0M | 9328 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ALE0M.Q | ALE0M | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | ALE0S | 9329 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ALE0S.Q | ALE0S | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV +NODE | C8M_IBUF | 9279 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX +NODE | iobm/IOS_FSM_FFd3 | 9292 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd1 | 9293 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrf | 9416 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM +NODE | iobm/RESrf | 9336 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrr | 9417 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM +NODE | iobm/RESrr | 9337 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | iobm/nDinLE | 9448 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nDinLE.Q | iobm/nDinLE | 0 | 0 | MC_Q +NODE | nADoutLE0_OBUF | 9363 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.Q | nADoutLE0_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | iobm/nDinLE.EXP | 10119 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nDinLE.EXP | iobm/nDinLE | 4 | 0 | MC_EXPORT +NODE | nADoutLE0_OBUF.EXP | 10011 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.EXP | nADoutLE0_OBUF | 4 | 0 | MC_EXPORT -SIGNAL_INSTANCE | iobm/nDinLE.SI | iobm/nDinLE | 0 | 6 | 3 +SIGNAL_INSTANCE | nADoutLE0_OBUF.SI | nADoutLE0_OBUF | 0 | 7 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | ALE0M | 9328 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ALE0M.Q | ALE0M | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | ALE0S | 9329 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ALE0S.Q | ALE0S | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX +NODE | C8M_IBUF | 9279 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd3 | 9292 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrf | 9416 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM +NODE | iobm/IOS_FSM_FFd1 | 9293 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrr | 9417 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM +NODE | iobm/RESrf | 9336 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/RESrr | 9337 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | iobm/nDinLE.D1 | 9989 | ? | 574 | 4096 | iobm/nDinLE | NULL | NULL | iobm/nDinLE.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nADoutLE0_OBUF.D1 | 9898 | ? | 0 | 4096 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | iobm/nDinLE.D2 | 9990 | ? | 574 | 4096 | iobm/nDinLE | NULL | NULL | iobm/nDinLE.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 +SIGNAL | NODE | nADoutLE0_OBUF.D2 | 9899 | ? | 0 | 4096 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_FALSE | ALE0M | IV_FALSE | ALE0S OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | iobm/nDinLE.EXP | 10118 | ? | 562 | 0 | iobm/nDinLE | NULL | NULL | iobm/nDinLE.SI | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | nADoutLE0_OBUF.EXP | 10009 | ? | 0 | 0 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.SI | 7 | 9 | MC_SI_EXPORT SPPTERM | 5 | IV_TRUE | C8M_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr -SRFF_INSTANCE | iobm/nDinLE.REG | iobm/nDinLE | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | iobm/nDinLE.D | 9988 | ? | 574 | 0 | iobm/nDinLE | NULL | NULL | iobm/nDinLE.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C16M_IBUF/FCLK- | 9314 | ? | 563 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | iobm/nDinLE.Q | 9991 | ? | 0 | 0 | iobm/nDinLE | NULL | NULL | iobm/nDinLE.REG | 0 | 8 | SRFF_Q -TNAME | CLK2X_IOB - -MACROCELL_INSTANCE | OptxMapped | nADoutLE0_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ALE0 | 9408 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ALE0.Q | iobm/ALE0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE0 | 9421 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/ALE0.Q | iobs/ALE0 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nADoutLE0_OBUF | 9449 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.Q | nADoutLE0_OBUF | 0 | 0 | MC_Q - -SIGNAL_INSTANCE | nADoutLE0_OBUF.SI | nADoutLE0_OBUF | 0 | 2 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/ALE0 | 9408 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/ALE0.Q | iobm/ALE0 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE0 | 9421 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/ALE0.Q | iobs/ALE0 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nADoutLE0_OBUF.D1 | 9993 | ? | 0 | 4096 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nADoutLE0_OBUF.D2 | 9994 | ? | 0 | 4096 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_FALSE | iobm/ALE0 | IV_FALSE | iobs/ALE0 - SRFF_INSTANCE | nADoutLE0_OBUF.REG | nADoutLE0_OBUF | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nADoutLE0_OBUF.D | 9992 | ? | 0 | 0 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.XOR | 0 | 7 | ALU_F +NODE | nADoutLE0_OBUF.D | 9897 | ? | 0 | 0 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nADoutLE0_OBUF.Q | 9995 | ? | 0 | 0 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.REG | 0 | 8 | SRFF_Q +NODE | nADoutLE0_OBUF.Q | 9900 | ? | 0 | 0 | nADoutLE0_OBUF | NULL | NULL | nADoutLE0_OBUF.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | nCAS_OBUF | WarpSE_COPY_0_COPY_0 | 2424308736 | 4 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RASEL | 9289 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK- | 9241 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 7 | 5 | II_FCLKINV +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | nCAS_OBUF | 9364 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nCAS_OBUF.Q | nCAS_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | nCAS_OBUF.EXP | 10000 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nCAS_OBUF.EXP | nCAS_OBUF | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | nCAS_OBUF.SI | nCAS_OBUF | 0 | 3 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RASEL | 9289 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nCAS_OBUF.D1 | 9902 | ? | 0 | 4096 | nCAS_OBUF | NULL | NULL | nCAS_OBUF.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | nCAS_OBUF.D2 | 9903 | ? | 0 | 4096 | nCAS_OBUF | NULL | NULL | nCAS_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_FALSE | ram/RASEL +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | nCAS_OBUF.EXP | 9988 | ? | 0 | 0 | nCAS_OBUF | NULL | NULL | nCAS_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 2 | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF + +SRFF_INSTANCE | nCAS_OBUF.REG | nCAS_OBUF | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | nCAS_OBUF.D | 9901 | ? | 0 | 0 | nCAS_OBUF | NULL | NULL | nCAS_OBUF.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | FCLK_IBUF/FCLK- | 9241 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | nCAS_OBUF.Q | 9904 | ? | 0 | 0 | nCAS_OBUF | NULL | NULL | nCAS_OBUF.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | nDinLE_OBUF | WarpSE_COPY_0_COPY_0 | 2424308736 | 13 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9293 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9294 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | C16M_IBUF/FCLK- | 9230 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | C8M_IBUF | 9279 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nBERR_IOB_IBUF | 9281 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9292 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | IOBERR | 9311 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/RESrf | 9336 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/RESrr | 9337 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrf | 9321 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrr | 9322 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrf | 9333 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrr | 9334 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | nDinLE_OBUF | 9365 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDinLE_OBUF.Q | nDinLE_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | nDinLE_OBUF.EXP | 10012 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDinLE_OBUF.EXP | nDinLE_OBUF | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | nDinLE_OBUF.SI | nDinLE_OBUF | 0 | 12 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd1 | 9293 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd2 | 9294 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | C8M_IBUF | 9279 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nBERR_IOB_IBUF | 9281 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/IOS_FSM_FFd3 | 9292 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | IOBERR | 9311 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | IOBERR.Q | IOBERR | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/RESrf | 9336 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/RESrr | 9337 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrf | 9321 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/DTACKrr | 9322 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrf | 9333 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobm/BERRrr | 9334 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nDinLE_OBUF.D1 | 9906 | ? | 0 | 4096 | nDinLE_OBUF | NULL | NULL | nDinLE_OBUF.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | nDinLE_OBUF.D2 | 9907 | ? | 0 | 4096 | nDinLE_OBUF | NULL | NULL | nDinLE_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | nDinLE_OBUF.EXP | 10010 | ? | 0 | 0 | nDinLE_OBUF | NULL | NULL | nDinLE_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 8 | IV_TRUE | C8M_IBUF | IV_TRUE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_TRUE | IOBERR | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr +SPPTERM | 8 | IV_TRUE | C8M_IBUF | IV_FALSE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_FALSE | IOBERR | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr +SPPTERM | 8 | IV_TRUE | C8M_IBUF | IV_FALSE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_FALSE | IOBERR | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr +SPPTERM | 8 | IV_TRUE | C8M_IBUF | IV_FALSE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_FALSE | IOBERR | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr + +SRFF_INSTANCE | nDinLE_OBUF.REG | nDinLE_OBUF | 0 | 2 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | nDinLE_OBUF.D | 9905 | ? | 0 | 0 | nDinLE_OBUF | NULL | NULL | nDinLE_OBUF.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +NODE | C16M_IBUF/FCLK- | 9230 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C16M_IBUF | 7 | 5 | II_FCLKINV +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | nDinLE_OBUF.Q | 9908 | ? | 0 | 0 | nDinLE_OBUF | NULL | NULL | nDinLE_OBUF.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | OptxMapped | nDinOE_OBUF | WarpSE_COPY_0_COPY_0 | 2155872256 | 6 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nDinOE_OBUF | 9450 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDinOE_OBUF.Q | nDinOE_OBUF | 0 | 0 | MC_Q +NODE | nDinOE_OBUF | 9366 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDinOE_OBUF.Q | nDinOE_OBUF | 0 | 0 | MC_Q SIGNAL_INSTANCE | nDinOE_OBUF.SI | nDinOE_OBUF | 0 | 6 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nDinOE_OBUF.D1 | 9997 | ? | 0 | 4096 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nDinOE_OBUF.D1 | 9910 | ? | 0 | 4096 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nDinOE_OBUF.D2 | 9998 | ? | 0 | 4096 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | nDinOE_OBUF.D2 | 9911 | ? | 0 | 4096 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.SI | 2 | 9 | MC_SI_D2 SPPTERM | 3 | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF SPPTERM | 4 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF SPPTERM | 4 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF SRFF_INSTANCE | nDinOE_OBUF.REG | nDinOE_OBUF | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nDinOE_OBUF.D | 9996 | ? | 0 | 0 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.XOR | 0 | 7 | ALU_F +NODE | nDinOE_OBUF.D | 9909 | ? | 0 | 0 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nDinOE_OBUF.Q | 9999 | ? | 0 | 0 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | Inv+OptxMapped | nRAS_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 7 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefRAS | 9432 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefRAS.Q | ram/RefRAS | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nRAS_OBUF | 9451 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.Q | nRAS_OBUF | 0 | 0 | MC_Q - -SIGNAL_INSTANCE | nRAS_OBUF.SI | nRAS_OBUF | 0 | 7 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefRAS | 9432 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefRAS.Q | ram/RefRAS | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nRAS_OBUF.D1 | 10001 | ? | 0 | 4096 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nRAS_OBUF.D2 | 10002 | ? | 0 | 4096 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | ram/RefRAS -SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RAMEN -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RAMEN - -SRFF_INSTANCE | nRAS_OBUF.REG | nRAS_OBUF | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nRAS_OBUF.D | 10000 | ? | 0 | 0 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nRAS_OBUF.Q | 10003 | ? | 0 | 0 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | ram/nCAS | WarpSE_COPY_0_COPY_0 | 2424308736 | 2 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK- | 9334 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | ram/nCAS | 9452 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/nCAS.Q | ram/nCAS | 0 | 0 | MC_Q - -SIGNAL_INSTANCE | ram/nCAS.SI | ram/nCAS | 0 | 1 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | ram/nCAS.D1 | 10005 | ? | 543 | 4096 | ram/nCAS | NULL | NULL | ram/nCAS.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | ram/nCAS.D2 | 10006 | ? | 543 | 4096 | ram/nCAS | NULL | NULL | ram/nCAS.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_FALSE | ram/RASEL - -SRFF_INSTANCE | ram/nCAS.REG | ram/nCAS | 0 | 2 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | ram/nCAS.D | 10004 | ? | 543 | 0 | ram/nCAS | NULL | NULL | ram/nCAS.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK- | 9334 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 7 | 5 | II_FCLKINV -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | ram/nCAS.Q | 10007 | ? | 0 | 0 | ram/nCAS | NULL | NULL | ram/nCAS.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB +NODE | nDinOE_OBUF.Q | 9912 | ? | 0 | 0 | nDinOE_OBUF | NULL | NULL | nDinOE_OBUF.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | FbkInv+PinTrst+Merge+OptxMapped | N0 | WarpSE_COPY_0_COPY_0 | 2155923456 | 1 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/nRESout | 9401 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nRESout.Q | cnt/nRESout | 1 | 0 | MC_UIM +NODE | nRESout | 9339 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRESout.Q | nRESout | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | N0$Q | 9453 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N0.Q | N0 | 0 | 0 | MC_Q +NODE | N0 | 9367 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N0.Q | N0 | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 2 | 0 | MC_OE -NODE | N0$OE | 9454 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N0.BUFOE.OUT | N0 | 2 | 0 | MC_OE +NODE | N0$OE | 9368 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N0.BUFOE.OUT | N0 | 2 | 0 | MC_OE SIGNAL_INSTANCE | N0.SI | N0 | 0 | 1 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/nRESout | 9401 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nRESout.Q | cnt/nRESout | 1 | 0 | MC_UIM +NODE | nRESout | 9339 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRESout.Q | nRESout | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | N0.D1 | 10009 | ? | 571 | 4096 | N0 | NULL | NULL | N0.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | N0.D1 | 9914 | ? | 0 | 4096 | N0 | NULL | NULL | N0.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | N0.D2 | 10010 | ? | 571 | 4096 | N0 | NULL | NULL | N0.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | N0.D2 | 9915 | ? | 0 | 4096 | N0 | NULL | NULL | N0.SI | 2 | 9 | MC_SI_D2 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST -SIGNAL | NODE | N0.TRST | 10012 | ? | 571 | 4096 | N0 | NULL | NULL | N0.SI | 4 | 9 | MC_SI_TRST -SPPTERM | 1 | IV_FALSE | cnt/nRESout +SIGNAL | NODE | N0.TRST | 9917 | ? | 0 | 4096 | N0 | NULL | NULL | N0.SI | 4 | 9 | MC_SI_TRST +SPPTERM | 1 | IV_FALSE | nRESout SRFF_INSTANCE | N0.REG | N0 | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | N0.D | 10008 | ? | 571 | 0 | N0 | NULL | NULL | N0.XOR | 0 | 7 | ALU_F +NODE | N0.D | 9913 | ? | 0 | 0 | N0 | NULL | NULL | N0.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | N0.Q | 10013 | ? | 571 | 0 | N0 | NULL | NULL | N0.REG | 0 | 8 | SRFF_Q +NODE | N0.Q | 9918 | ? | 0 | 0 | N0 | NULL | NULL | N0.REG | 0 | 8 | SRFF_Q BUF_INSTANCE | N0.BUFOE | N0 | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN -SIGNAL | NODE | N0.TRST | 10012 | ? | 571 | 4096 | N0 | NULL | NULL | N0.SI | 4 | 9 | MC_SI_TRST -SPPTERM | 1 | IV_FALSE | cnt/nRESout +SIGNAL | NODE | N0.TRST | 9917 | ? | 0 | 4096 | N0 | NULL | NULL | N0.SI | 4 | 9 | MC_SI_TRST +SPPTERM | 1 | IV_FALSE | nRESout OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT -NODE | N0.BUFOE.OUT | 10011 | ? | 571 | 0 | N0 | NULL | NULL | N0.BUFOE | 0 | 10 | BUF_OUT +NODE | N0.BUFOE.OUT | 9916 | ? | 0 | 0 | N0 | NULL | NULL | N0.BUFOE | 0 | 10 | BUF_OUT -MACROCELL_INSTANCE | OptxMapped | A_FSB_19_IBUF$BUF0 | WarpSE_COPY_0_COPY_0 | 2155872256 | 19 | 2 +MACROCELL_INSTANCE | OptxMapped | A_FSB_19_IBUF$BUF0 | WarpSE_COPY_0_COPY_0 | 2155872256 | 11 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +NODE | ram/RefUrg | 9297 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrg.Q | ram/RefUrg | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +NODE | ram/RefReq | 9315 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +NODE | ram/RAMEN | 9302 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Clear1.EXP | 10138 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.EXP | iobs/Clear1 | 4 | 0 | MC_EXPORT +NODE | cnt/Timer<2>.EXP | 10025 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.EXP | cnt/Timer<2> | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | A_FSB_19_IBUF$BUF0 | 9455 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.Q | A_FSB_19_IBUF$BUF0 | 0 | 0 | MC_Q +NODE | A_FSB_19_IBUF$BUF0 | 9369 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.Q | A_FSB_19_IBUF$BUF0 | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | A_FSB_19_IBUF$BUF0.EXP | 10137 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.EXP | A_FSB_19_IBUF$BUF0 | 4 | 0 | MC_EXPORT +NODE | A_FSB_19_IBUF$BUF0.EXP | 10024 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.EXP | A_FSB_19_IBUF$BUF0 | 4 | 0 | MC_EXPORT -SIGNAL_INSTANCE | A_FSB_19_IBUF$BUF0.SI | A_FSB_19_IBUF$BUF0 | 0 | 19 | 3 +SIGNAL_INSTANCE | A_FSB_19_IBUF$BUF0.SI | A_FSB_19_IBUF$BUF0 | 0 | 11 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +NODE | ram/RefUrg | 9297 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrg.Q | ram/RefUrg | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +NODE | ram/RefReq | 9315 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +NODE | ram/RAMEN | 9302 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Clear1.EXP | 10138 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.EXP | iobs/Clear1 | 4 | 0 | MC_EXPORT +NODE | cnt/Timer<2>.EXP | 10025 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/Timer<2>.EXP | cnt/Timer<2> | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | A_FSB_19_IBUF$BUF0.D1 | 10015 | ? | 0 | 4096 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | A_FSB_19_IBUF$BUF0.D1 | 9920 | ? | 0 | 4096 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | A_FSB_19_IBUF$BUF0.D2 | 10016 | ? | 0 | 4096 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | iobs/Clear1.EXP +SIGNAL | NODE | A_FSB_19_IBUF$BUF0.D2 | 9921 | ? | 0 | 4096 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | cnt/Timer<2>.EXP OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | A_FSB_19_IBUF$BUF0.EXP | 10124 | ? | 499 | 0 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 13 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf -SPPTERM | 14 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | iobs/ALE1 -SPPTERM | 14 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1 -SPPTERM | 14 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | iobs/ALE1 -SPPTERM | 14 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1 +SIGNAL | NODE | A_FSB_19_IBUF$BUF0.EXP | 10013 | ? | 0 | 0 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefUrg | IV_FALSE | ram/RefReq +SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefUrg | IV_FALSE | ram/RefReq +SPPTERM | 5 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefUrg | IV_FALSE | fsb/ASrf +SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RAMEN +SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RAMEN | IV_TRUE | fsb/ASrf SRFF_INSTANCE | A_FSB_19_IBUF$BUF0.REG | A_FSB_19_IBUF$BUF0 | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | A_FSB_19_IBUF$BUF0.D | 10014 | ? | 0 | 0 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.XOR | 0 | 7 | ALU_F +NODE | A_FSB_19_IBUF$BUF0.D | 9919 | ? | 0 | 0 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | A_FSB_19_IBUF$BUF0.Q | 10017 | ? | 0 | 0 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.REG | 0 | 8 | SRFF_Q +NODE | A_FSB_19_IBUF$BUF0.Q | 9922 | ? | 0 | 0 | A_FSB_19_IBUF$BUF0 | NULL | NULL | A_FSB_19_IBUF$BUF0.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | OptxMapped | A_FSB_21_IBUF$BUF0 | WarpSE_COPY_0_COPY_0 | 2155872256 | 6 | 2 +MACROCELL_INSTANCE | OptxMapped | A_FSB_21_IBUF$BUF0 | WarpSE_COPY_0_COPY_0 | 2155872256 | 1 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_9_IBUF | 9297 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | A_FSB_21_IBUF$BUF0 | 9456 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.Q | A_FSB_21_IBUF$BUF0 | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | A_FSB_21_IBUF$BUF0.EXP | 10123 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.EXP | A_FSB_21_IBUF$BUF0 | 4 | 0 | MC_EXPORT +NODE | A_FSB_21_IBUF$BUF0 | 9370 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.Q | A_FSB_21_IBUF$BUF0 | 0 | 0 | MC_Q -SIGNAL_INSTANCE | A_FSB_21_IBUF$BUF0.SI | A_FSB_21_IBUF$BUF0 | 0 | 6 | 3 +SIGNAL_INSTANCE | A_FSB_21_IBUF$BUF0.SI | A_FSB_21_IBUF$BUF0 | 0 | 1 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_9_IBUF | 9297 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RASEL | 9368 | ? | 543 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RASEL.Q | ram/RASEL | 1 | 0 | MC_UIM +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | A_FSB_21_IBUF$BUF0.D1 | 10019 | ? | 0 | 4096 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | A_FSB_21_IBUF$BUF0.D1 | 9924 | ? | 0 | 4096 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | A_FSB_21_IBUF$BUF0.D2 | 10020 | ? | 0 | 4096 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | A_FSB_21_IBUF$BUF0.D2 | 9925 | ? | 0 | 4096 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.SI | 2 | 9 | MC_SI_D2 SPPTERM | 1 | IV_TRUE | A_FSB_21_IBUF -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | A_FSB_21_IBUF$BUF0.EXP | 10121 | ? | 0 | 0 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 6 | IV_TRUE | A_FSB_9_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_TRUE | ram/RASEL SRFF_INSTANCE | A_FSB_21_IBUF$BUF0.REG | A_FSB_21_IBUF$BUF0 | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | A_FSB_21_IBUF$BUF0.D | 10018 | ? | 0 | 0 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.XOR | 0 | 7 | ALU_F +NODE | A_FSB_21_IBUF$BUF0.D | 9923 | ? | 0 | 0 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | A_FSB_21_IBUF$BUF0.Q | 10021 | ? | 0 | 0 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.REG | 0 | 8 | SRFF_Q +NODE | A_FSB_21_IBUF$BUF0.Q | 9926 | ? | 0 | 0 | A_FSB_21_IBUF$BUF0 | NULL | NULL | A_FSB_21_IBUF$BUF0.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | Inv+PrldHigh+OptxMapped | nADoutLE1_OBUF | WarpSE_COPY_0_COPY_0 | 2155873024 | 4 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Clear1 | 9422 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.Q | iobs/Clear1 | 1 | 0 | MC_UIM +NODE | iobs/Clear1 | 9338 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.Q | iobs/Clear1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Load1 | 9393 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM +NODE | iobs/Load1 | 9309 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nADoutLE1_OBUF | 9457 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 0 | 0 | MC_Q +NODE | nADoutLE1_OBUF | 9371 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM SIGNAL_INSTANCE | nADoutLE1_OBUF.SI | nADoutLE1_OBUF | 0 | 3 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Clear1 | 9422 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.Q | iobs/Clear1 | 1 | 0 | MC_UIM +NODE | iobs/Clear1 | 9338 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Clear1.Q | iobs/Clear1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Load1 | 9393 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM +NODE | iobs/Load1 | 9309 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Load1.Q | iobs/Load1 | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nADoutLE1_OBUF.D1 | 10023 | ? | 544 | 4096 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nADoutLE1_OBUF.D1 | 9928 | ? | 0 | 4096 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nADoutLE1_OBUF.D2 | 10024 | ? | 544 | 4096 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | nADoutLE1_OBUF.D2 | 9929 | ? | 0 | 4096 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.SI | 2 | 9 | MC_SI_D2 SPPTERM | 1 | IV_TRUE | iobs/Load1 -SPPTERM | 2 | IV_FALSE | iobs/Clear1 | IV_FALSE | iobs/ALE1 +SPPTERM | 2 | IV_FALSE | iobs/Clear1 | IV_FALSE | ALE1 SRFF_INSTANCE | nADoutLE1_OBUF.REG | nADoutLE1_OBUF | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nADoutLE1_OBUF.D | 10022 | ? | 544 | 0 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.XOR | 0 | 7 | ALU_F +NODE | nADoutLE1_OBUF.D | 9927 | ? | 0 | 0 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | FCLK_IBUF/FCLK | 9333 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nADoutLE1_OBUF.Q | 10025 | ? | 544 | 0 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.REG | 0 | 8 | SRFF_Q -TNAME | CLK_FSB +NODE | nADoutLE1_OBUF.Q | 9930 | ? | 0 | 0 | nADoutLE1_OBUF | NULL | NULL | nADoutLE1_OBUF.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | Inv+PrldHigh+OptxMapped+Ce | nAoutOE_OBUF | WarpSE_COPY_0_COPY_0 | 2424308480 | 4 | 2 +MACROCELL_INSTANCE | Inv+PrldHigh+OptxMapped | nAoutOE_OBUF | WarpSE_COPY_0_COPY_0 | 2155873024 | 5 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/nBR_IOB | 9367 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.Q | cnt/nBR_IOB | 1 | 0 | MC_UIM +NODE | nBR_IOB_OBUF | 9287 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nBR_IOB_OBUF.Q | nBR_IOB_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/PORS_FSM_FFd1 | 9390 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | cnt/INITS_FSM_FFd1 | 9305 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd1.Q | cnt/INITS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/PORS_FSM_FFd2 | 9392 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | cnt/INITS_FSM_FFd2 | 9306 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd2.Q | cnt/INITS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV +NODE | AoutOE | 9374 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nAoutOE_OBUF | 9459 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 0 | 0 | MC_Q +NODE | nAoutOE_OBUF | 9373 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cnt/AoutOE | 9460 | ? | 551 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM +NODE | AoutOE | 9374 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM -SIGNAL_INSTANCE | nAoutOE_OBUF.SI | nAoutOE_OBUF | 0 | 3 | 2 +SIGNAL_INSTANCE | nAoutOE_OBUF.SI | nAoutOE_OBUF | 0 | 4 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/nBR_IOB | 9367 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.Q | cnt/nBR_IOB | 1 | 0 | MC_UIM +NODE | nBR_IOB_OBUF | 9287 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nBR_IOB_OBUF.Q | nBR_IOB_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/PORS_FSM_FFd1 | 9390 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd1.Q | cnt/PORS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | cnt/INITS_FSM_FFd1 | 9305 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd1.Q | cnt/INITS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cnt/PORS_FSM_FFd2 | 9392 | ? | 498 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/PORS_FSM_FFd2.Q | cnt/PORS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | cnt/INITS_FSM_FFd2 | 9306 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/INITS_FSM_FFd2.Q | cnt/INITS_FSM_FFd2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | AoutOE | 9374 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nAoutOE_OBUF.D1 | 10027 | ? | 498 | 4096 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nAoutOE_OBUF.D1 | 9932 | ? | 0 | 4096 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nAoutOE_OBUF.D2 | 10028 | ? | 498 | 4096 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_FALSE | cnt/nBR_IOB | IV_TRUE | cnt/PORS_FSM_FFd1 | IV_FALSE | cnt/PORS_FSM_FFd2 +SIGNAL | NODE | nAoutOE_OBUF.D2 | 9933 | ? | 0 | 4096 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 3 | IV_FALSE | nBR_IOB_OBUF | IV_TRUE | cnt/INITS_FSM_FFd1 | IV_TRUE | cnt/INITS_FSM_FFd2 +SPPTERM | 3 | IV_TRUE | cnt/INITS_FSM_FFd1 | IV_FALSE | cnt/INITS_FSM_FFd2 | IV_FALSE | AoutOE SRFF_INSTANCE | nAoutOE_OBUF.REG | nAoutOE_OBUF | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nAoutOE_OBUF.D | 10026 | ? | 498 | 0 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.XOR | 0 | 7 | ALU_F +NODE | nAoutOE_OBUF.D | 9931 | ? | 0 | 0 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -NODE | C8M_IBUF/FCLK- | 9326 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 7 | 5 | II_FCLKINV +NODE | FCLK_IBUF/FCLK | 9240 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | FCLK_IBUF | 3 | 5 | II_FCLK OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nAoutOE_OBUF.Q | 10029 | ? | 551 | 0 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.REG | 0 | 8 | SRFF_Q -TNAME | CLK_IOB +NODE | nAoutOE_OBUF.Q | 9934 | ? | 0 | 0 | nAoutOE_OBUF | NULL | NULL | nAoutOE_OBUF.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | Inv+OptxMapped | nRAMLWE_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 4 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nLDS_FSB_IBUF | 9272 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nLDS_FSB_IBUF | 9353 | ? | 512 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM +NODE | ram/RAMEN | 9302 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nRAMLWE_OBUF | 9461 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.Q | nRAMLWE_OBUF | 0 | 0 | MC_Q +NODE | nRAMLWE_OBUF | 9375 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.Q | nRAMLWE_OBUF | 0 | 0 | MC_Q SIGNAL_INSTANCE | nRAMLWE_OBUF.SI | nRAMLWE_OBUF | 0 | 4 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nLDS_FSB_IBUF | 9272 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nLDS_FSB_IBUF | 9353 | ? | 512 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM +NODE | ram/RAMEN | 9302 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nRAMLWE_OBUF.D1 | 10031 | ? | 0 | 4096 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nRAMLWE_OBUF.D1 | 9936 | ? | 0 | 4096 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nRAMLWE_OBUF.D2 | 10032 | ? | 0 | 4096 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nLDS_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RAMEN +SIGNAL | NODE | nRAMLWE_OBUF.D2 | 9937 | ? | 0 | 4096 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_FALSE | nLDS_FSB_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RAMEN SRFF_INSTANCE | nRAMLWE_OBUF.REG | nRAMLWE_OBUF | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nRAMLWE_OBUF.D | 10030 | ? | 0 | 0 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.XOR | 0 | 7 | ALU_F +NODE | nRAMLWE_OBUF.D | 9935 | ? | 0 | 0 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nRAMLWE_OBUF.Q | 10033 | ? | 0 | 0 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.REG | 0 | 8 | SRFF_Q +NODE | nRAMLWE_OBUF.Q | 9938 | ? | 0 | 0 | nRAMLWE_OBUF | NULL | NULL | nRAMLWE_OBUF.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | Inv+OptxMapped | nRAMUWE_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 12 | 2 +MACROCELL_INSTANCE | Inv+OptxMapped | nRAMUWE_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 4 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM +NODE | nUDS_FSB_IBUF | 9277 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1.EXP | 10139 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.EXP | iobs/PS_FSM_FFd1 | 4 | 0 | MC_EXPORT +NODE | ram/RAMEN | 9302 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nRAMUWE_OBUF | 9462 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.Q | nRAMUWE_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | nRAMUWE_OBUF.EXP | 10140 | ? | 523 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.EXP | nRAMUWE_OBUF | 4 | 0 | MC_EXPORT +NODE | nRAMUWE_OBUF | 9376 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.Q | nRAMUWE_OBUF | 0 | 0 | MC_Q -SIGNAL_INSTANCE | nRAMUWE_OBUF.SI | nRAMUWE_OBUF | 0 | 12 | 3 +SIGNAL_INSTANCE | nRAMUWE_OBUF.SI | nRAMUWE_OBUF | 0 | 4 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM +NODE | nUDS_FSB_IBUF | 9277 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1.EXP | 10139 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.EXP | iobs/PS_FSM_FFd1 | 4 | 0 | MC_EXPORT +NODE | ram/RAMEN | 9302 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nRAMUWE_OBUF.D1 | 10035 | ? | 0 | 4096 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nRAMUWE_OBUF.D1 | 9940 | ? | 0 | 4096 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nRAMUWE_OBUF.D2 | 10036 | ? | 0 | 4096 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | iobs/PS_FSM_FFd1.EXP -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | nRAMUWE_OBUF.EXP | 10127 | ? | 523 | 0 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 4 | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | fsb/ASrf -SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RefUrgent | IV_FALSE | ram/RAMEN -SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RefUrgent | IV_FALSE | ram/RAMEN | IV_TRUE | fsb/ASrf -SPPTERM | 9 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RefUrgent | IV_FALSE | ram/RAMEN -SPPTERM | 9 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RefUrgent | IV_FALSE | ram/RAMEN | IV_TRUE | fsb/ASrf +SIGNAL | NODE | nRAMUWE_OBUF.D2 | 9941 | ? | 0 | 4096 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nUDS_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ram/RAMEN SRFF_INSTANCE | nRAMUWE_OBUF.REG | nRAMUWE_OBUF | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nRAMUWE_OBUF.D | 10034 | ? | 0 | 0 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.XOR | 0 | 7 | ALU_F +NODE | nRAMUWE_OBUF.D | 9939 | ? | 0 | 0 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nRAMUWE_OBUF.Q | 10037 | ? | 0 | 0 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.REG | 0 | 8 | SRFF_Q +NODE | nRAMUWE_OBUF.Q | 9942 | ? | 0 | 0 | nRAMUWE_OBUF | NULL | NULL | nRAMUWE_OBUF.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | Inv+OptxMapped | nROMCS_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 12 | 2 +MACROCELL_INSTANCE | Inv+OptxMapped | nROMCS_OBUF | WarpSE_COPY_0_COPY_0 | 2155872512 | 8 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefReq | 9395 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefDone.EXP | 10108 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.EXP | ram/RefDone | 4 | 0 | MC_EXPORT +NODE | EXP19_.EXP | 9997 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP19_.EXP | EXP19_ | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | nROMCS_OBUF | 9463 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.Q | nROMCS_OBUF | 0 | 0 | MC_Q +NODE | nROMCS_OBUF | 9377 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.Q | nROMCS_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | nROMCS_OBUF.EXP | 10107 | ? | 522 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.EXP | nROMCS_OBUF | 4 | 0 | MC_EXPORT +NODE | nROMCS_OBUF.EXP | 9998 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.EXP | nROMCS_OBUF | 4 | 0 | MC_EXPORT -SIGNAL_INSTANCE | nROMCS_OBUF.SI | nROMCS_OBUF | 0 | 12 | 3 +SIGNAL_INSTANCE | nROMCS_OBUF.SI | nROMCS_OBUF | 0 | 8 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefReq | 9395 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefDone.EXP | 10108 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefDone.EXP | ram/RefDone | 4 | 0 | MC_EXPORT +NODE | EXP19_.EXP | 9997 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP19_.EXP | EXP19_ | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | nROMCS_OBUF.D1 | 10039 | ? | 0 | 4096 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nROMCS_OBUF.D1 | 9944 | ? | 0 | 4096 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | nROMCS_OBUF.D2 | 10040 | ? | 0 | 4096 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | ram/RefDone.EXP +SIGNAL | NODE | nROMCS_OBUF.D2 | 9945 | ? | 0 | 4096 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | EXP19_.EXP +SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | nROMCS_OBUF.EXP | 10096 | ? | 522 | 0 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefReq -SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefReq -SPPTERM | 6 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefReq -SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RAMEN -SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RAMEN | IV_TRUE | fsb/ASrf +SIGNAL | NODE | nROMCS_OBUF.EXP | 9986 | ? | 0 | 0 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_19_IBUF +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_16_IBUF +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | nWE_FSB_IBUF SRFF_INSTANCE | nROMCS_OBUF.REG | nROMCS_OBUF | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | nROMCS_OBUF.D | 10038 | ? | 0 | 0 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.XOR | 0 | 7 | ALU_F +NODE | nROMCS_OBUF.D | 9943 | ? | 0 | 0 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | nROMCS_OBUF.Q | 10041 | ? | 0 | 0 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.REG | 0 | 8 | SRFF_Q +NODE | nROMCS_OBUF.Q | 9946 | ? | 0 | 0 | nROMCS_OBUF | NULL | NULL | nROMCS_OBUF.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | FbkInv+Merge+OptxMapped | N1 | WarpSE_COPY_0_COPY_0 | 2155907072 | 0 | 1 +MACROCELL_INSTANCE | FbkInv+Merge+OptxMapped | C25MEN_OBUF | WarpSE_COPY_0_COPY_0 | 2155907072 | 0 | 1 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | N1$Q | 9464 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N1.Q | N1 | 0 | 0 | MC_Q +NODE | C25MEN_OBUF$Q | 9378 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | C25MEN_OBUF.Q | C25MEN_OBUF | 0 | 0 | MC_Q -SIGNAL_INSTANCE | N1.SI | N1 | 0 | 0 | 2 +SIGNAL_INSTANCE | C25MEN_OBUF.SI | C25MEN_OBUF | 0 | 0 | 2 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | N1.D1 | 10043 | ? | 0 | 4096 | N1 | NULL | NULL | N1.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | C25MEN_OBUF.D1 | 9948 | ? | 0 | 4096 | C25MEN_OBUF | NULL | NULL | C25MEN_OBUF.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | N1.D2 | 10044 | ? | 0 | 4096 | N1 | NULL | NULL | N1.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | C25MEN_OBUF.D2 | 9949 | ? | 0 | 4096 | C25MEN_OBUF | NULL | NULL | C25MEN_OBUF.SI | 2 | 9 | MC_SI_D2 SPPTERM | 0 | IV_DC -SRFF_INSTANCE | N1.REG | N1 | 0 | 1 | 1 +SRFF_INSTANCE | C25MEN_OBUF.REG | C25MEN_OBUF | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | N1.D | 10042 | ? | 0 | 0 | N1 | NULL | NULL | N1.XOR | 0 | 7 | ALU_F +NODE | C25MEN_OBUF.D | 9947 | ? | 0 | 0 | C25MEN_OBUF | NULL | NULL | C25MEN_OBUF.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | N1.Q | 10045 | ? | 0 | 0 | N1 | NULL | NULL | N1.REG | 0 | 8 | SRFF_Q +NODE | C25MEN_OBUF.Q | 9950 | ? | 0 | 0 | C25MEN_OBUF | NULL | NULL | C25MEN_OBUF.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | OptxMapped | N1$BUF0 | WarpSE_COPY_0_COPY_0 | 2155872256 | 0 | 1 +MACROCELL_INSTANCE | OptxMapped | C25MEN_OBUF$BUF0 | WarpSE_COPY_0_COPY_0 | 2155872256 | 0 | 1 OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | N1$BUF0 | 9465 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N1$BUF0.Q | N1$BUF0 | 0 | 0 | MC_Q +NODE | C25MEN_OBUF$BUF0 | 9379 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | C25MEN_OBUF$BUF0.Q | C25MEN_OBUF$BUF0 | 0 | 0 | MC_Q -SIGNAL_INSTANCE | N1$BUF0.SI | N1$BUF0 | 0 | 0 | 2 +SIGNAL_INSTANCE | C25MEN_OBUF$BUF0.SI | C25MEN_OBUF$BUF0 | 0 | 0 | 2 OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | N1$BUF0.D1 | 10047 | ? | 0 | 4096 | N1$BUF0 | NULL | NULL | N1$BUF0.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | C25MEN_OBUF$BUF0.D1 | 9952 | ? | 0 | 4096 | C25MEN_OBUF$BUF0 | NULL | NULL | C25MEN_OBUF$BUF0.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | N1$BUF0.D2 | 10048 | ? | 0 | 6144 | N1$BUF0 | NULL | NULL | N1$BUF0.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | C25MEN_OBUF$BUF0.D2 | 9953 | ? | 0 | 6144 | C25MEN_OBUF$BUF0 | NULL | NULL | C25MEN_OBUF$BUF0.SI | 2 | 9 | MC_SI_D2 SPPTERM | 0 | IV_DC -SRFF_INSTANCE | N1$BUF0.REG | N1$BUF0 | 0 | 1 | 1 +SRFF_INSTANCE | C25MEN_OBUF$BUF0.REG | C25MEN_OBUF$BUF0 | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | N1$BUF0.D | 10046 | ? | 0 | 0 | N1$BUF0 | NULL | NULL | N1$BUF0.XOR | 0 | 7 | ALU_F +NODE | C25MEN_OBUF$BUF0.D | 9951 | ? | 0 | 0 | C25MEN_OBUF$BUF0 | NULL | NULL | C25MEN_OBUF$BUF0.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | N1$BUF0.Q | 10049 | ? | 0 | 0 | N1$BUF0 | NULL | NULL | N1$BUF0.REG | 0 | 8 | SRFF_Q +NODE | C25MEN_OBUF$BUF0.Q | 9954 | ? | 0 | 0 | C25MEN_OBUF$BUF0 | NULL | NULL | C25MEN_OBUF$BUF0.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | FbkInv+Merge+OptxMapped | nRAS_OBUF | WarpSE_COPY_0_COPY_0 | 2155907072 | 0 | 1 +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | nRAS_OBUF | 9380 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.Q | nRAS_OBUF | 0 | 0 | MC_Q + +SIGNAL_INSTANCE | nRAS_OBUF.SI | nRAS_OBUF | 0 | 0 | 2 +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | nRAS_OBUF.D1 | 9956 | ? | 0 | 4096 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | nRAS_OBUF.D2 | 9957 | ? | 0 | 4096 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 0 | IV_DC + +SRFF_INSTANCE | nRAS_OBUF.REG | nRAS_OBUF | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | nRAS_OBUF.D | 9955 | ? | 0 | 0 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | nRAS_OBUF.Q | 9958 | ? | 0 | 0 | nRAS_OBUF | NULL | NULL | nRAS_OBUF.REG | 0 | 8 | SRFF_Q OUTPUT_INSTANCE | 0 | nVMA_IOB | WarpSE_COPY_0_COPY_0 | 7 | 2 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | iobm/nVMA$Q | 9315 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.Q | iobm/nVMA | 0 | 0 | MC_Q +NODE | nVMA_IOBout$Q | 9231 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nVMA_IOBout.Q | nVMA_IOBout | 0 | 0 | MC_Q INPUT_NODE_TYPE | 2 | 6 | OI_OE -NODE | iobm/nVMA$OE | 9317 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nVMA.BUFOE.OUT | iobm/nVMA | 2 | 0 | MC_OE +NODE | nVMA_IOBout$OE | 9233 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nVMA_IOBout.BUFOE.OUT | nVMA_IOBout | 2 | 0 | MC_OE OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nVMA_IOB | 9466 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVMA_IOB | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | nLDS_IOB | WarpSE_COPY_0_COPY_0 | 7 | 2 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | iobm/nLDS | 9318 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nLDS.Q | iobm/nLDS | 0 | 0 | MC_Q -INPUT_NODE_TYPE | 2 | 6 | OI_OE -NODE | iobm/nLDS$OE | 9319 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nLDS.BUFOE.OUT | iobm/nLDS | 2 | 0 | MC_OE -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nLDS_IOB | 9467 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_IOB | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | nUDS_IOB | WarpSE_COPY_0_COPY_0 | 7 | 2 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | iobm/nUDS | 9320 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nUDS.Q | iobm/nUDS | 0 | 0 | MC_Q -INPUT_NODE_TYPE | 2 | 6 | OI_OE -NODE | iobm/nUDS$OE | 9321 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nUDS.BUFOE.OUT | iobm/nUDS | 2 | 0 | MC_OE -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nUDS_IOB | 9468 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_IOB | 0 | 6 | OI_OUT +NODE | nVMA_IOB | 9381 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVMA_IOB | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | nAS_IOB | WarpSE_COPY_0_COPY_0 | 7 | 2 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | iobm/nASout | 9322 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nASout.Q | iobm/nASout | 0 | 0 | MC_Q +NODE | nAS_IOBout | 9234 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAS_IOBout.Q | nAS_IOBout | 0 | 0 | MC_Q INPUT_NODE_TYPE | 2 | 6 | OI_OE -NODE | iobm/nASout$OE | 9323 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nASout.BUFOE.OUT | iobm/nASout | 2 | 0 | MC_OE +NODE | nAS_IOBout$OE | 9235 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAS_IOBout.BUFOE.OUT | nAS_IOBout | 2 | 0 | MC_OE OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nAS_IOB | 9469 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_IOB | 0 | 6 | OI_OUT +NODE | nAS_IOB | 9382 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_IOB | 0 | 6 | OI_OUT -OUTPUT_INSTANCE | 0 | nDTACK_FSB | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +OUTPUT_INSTANCE | 0 | nLDS_IOB | WarpSE_COPY_0_COPY_0 | 7 | 2 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | fsb/nDTACK | 9362 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 0 | 0 | MC_Q +NODE | nLDS_IOBout | 9236 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nLDS_IOBout.Q | nLDS_IOBout | 0 | 0 | MC_Q +INPUT_NODE_TYPE | 2 | 6 | OI_OE +NODE | nLDS_IOBout$OE | 9237 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nLDS_IOBout.BUFOE.OUT | nLDS_IOBout | 2 | 0 | MC_OE OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nDTACK_FSB | 9470 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_FSB | 0 | 6 | OI_OUT +NODE | nLDS_IOB | 9383 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nLDS_IOB | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | nUDS_IOB | WarpSE_COPY_0_COPY_0 | 7 | 2 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | nUDS_IOBout | 9238 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nUDS_IOBout.Q | nUDS_IOBout | 0 | 0 | MC_Q +INPUT_NODE_TYPE | 2 | 6 | OI_OE +NODE | nUDS_IOBout$OE | 9239 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nUDS_IOBout.BUFOE.OUT | nUDS_IOBout | 2 | 0 | MC_OE +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | nUDS_IOB | 9384 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nUDS_IOB | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | nBERR_FSB | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | iobs/nBERR_FSB | 9364 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.Q | iobs/nBERR_FSB | 0 | 0 | MC_Q +NODE | nBERR_FSB_OBUF | 9282 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nBERR_FSB_OBUF.Q | nBERR_FSB_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nBERR_FSB | 9471 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_FSB | 0 | 6 | OI_OUT +NODE | nBERR_FSB | 9385 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_FSB | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | nDTACK_FSB | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | nDTACK_FSB_OBUF | 9284 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | nDTACK_FSB | 9386 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDTACK_FSB | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | nBR_IOB | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | cnt/nBR_IOB$Q | 9366 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cnt/nBR_IOB.Q | cnt/nBR_IOB | 0 | 0 | MC_Q +NODE | nBR_IOB_OBUF$Q | 9286 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nBR_IOB_OBUF.Q | nBR_IOB_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nBR_IOB | 9472 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBR_IOB | 0 | 6 | OI_OUT +NODE | nBR_IOB | 9387 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBR_IOB | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | RA<0> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | RA_0_OBUF | 9434 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_0_OBUF.Q | RA_0_OBUF | 0 | 0 | MC_Q +NODE | RA_0_OBUF | 9349 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_0_OBUF.Q | RA_0_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | RA<0> | 9473 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<0> | 0 | 6 | OI_OUT +NODE | RA<0> | 9388 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<0> | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | RA<1> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | RA_1_OBUF | 9435 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.Q | RA_1_OBUF | 0 | 0 | MC_Q +NODE | RA_1_OBUF | 9350 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_1_OBUF.Q | RA_1_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | RA<1> | 9474 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<1> | 0 | 6 | OI_OUT +NODE | RA<1> | 9389 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<1> | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | RA<2> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | RA_2_OBUF | 9436 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.Q | RA_2_OBUF | 0 | 0 | MC_Q +NODE | RA_2_OBUF | 9351 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_2_OBUF.Q | RA_2_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | RA<2> | 9475 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<2> | 0 | 6 | OI_OUT +NODE | RA<2> | 9390 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<2> | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | RA<3> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | RA_3_OBUF | 9437 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.Q | RA_3_OBUF | 0 | 0 | MC_Q +NODE | RA_3_OBUF | 9352 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_3_OBUF.Q | RA_3_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | RA<3> | 9476 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<3> | 0 | 6 | OI_OUT +NODE | RA<3> | 9391 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<3> | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | RA<4> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | RA_4_OBUF | 9438 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.Q | RA_4_OBUF | 0 | 0 | MC_Q +NODE | RA_4_OBUF | 9353 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_4_OBUF.Q | RA_4_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | RA<4> | 9477 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<4> | 0 | 6 | OI_OUT +NODE | RA<4> | 9392 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<4> | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | RA<5> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | RA_5_OBUF | 9439 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.Q | RA_5_OBUF | 0 | 0 | MC_Q +NODE | RA_5_OBUF | 9354 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_5_OBUF.Q | RA_5_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | RA<5> | 9478 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<5> | 0 | 6 | OI_OUT +NODE | RA<5> | 9393 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<5> | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | RA<6> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | RA_6_OBUF | 9440 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.Q | RA_6_OBUF | 0 | 0 | MC_Q +NODE | RA_6_OBUF | 9355 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.Q | RA_6_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | RA<6> | 9479 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<6> | 0 | 6 | OI_OUT +NODE | RA<6> | 9394 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<6> | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | RA<7> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | RA_7_OBUF | 9441 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_7_OBUF.Q | RA_7_OBUF | 0 | 0 | MC_Q +NODE | RA_7_OBUF | 9356 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_7_OBUF.Q | RA_7_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | RA<7> | 9480 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<7> | 0 | 6 | OI_OUT +NODE | RA<7> | 9395 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<7> | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | RA<8> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | RA_8_OBUF | 9442 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_8_OBUF.Q | RA_8_OBUF | 0 | 0 | MC_Q +NODE | RA_8_OBUF | 9357 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_8_OBUF.Q | RA_8_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | RA<8> | 9481 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<8> | 0 | 6 | OI_OUT +NODE | RA<8> | 9396 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<8> | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | RA<9> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | RA_9_OBUF | 9443 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.Q | RA_9_OBUF | 0 | 0 | MC_Q +NODE | RA_9_OBUF | 9358 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_9_OBUF.Q | RA_9_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | RA<9> | 9482 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<9> | 0 | 6 | OI_OUT +NODE | RA<9> | 9397 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<9> | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | nDoutOE | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nDoutOE_OBUF | 9444 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDoutOE_OBUF.Q | nDoutOE_OBUF | 0 | 0 | MC_Q +NODE | nDoutOE_OBUF | 9359 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDoutOE_OBUF.Q | nDoutOE_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nDoutOE | 9483 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDoutOE | 0 | 6 | OI_OUT +NODE | nDoutOE | 9398 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDoutOE | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | nOE | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nOE_OBUF | 9445 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nOE_OBUF.Q | nOE_OBUF | 0 | 0 | MC_Q +NODE | nOE_OBUF | 9360 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nOE_OBUF.Q | nOE_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nOE | 9484 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nOE | 0 | 6 | OI_OUT +NODE | nOE | 9399 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nOE | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | nROMWE | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nROMWE_OBUF | 9446 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.Q | nROMWE_OBUF | 0 | 0 | MC_Q +NODE | nROMWE_OBUF | 9361 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.Q | nROMWE_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nROMWE | 9485 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nROMWE | 0 | 6 | OI_OUT +NODE | nROMWE | 9400 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nROMWE | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | nVPA_FSB | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nVPA_FSB_OBUF | 9447 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nVPA_FSB_OBUF.Q | nVPA_FSB_OBUF | 0 | 0 | MC_Q +NODE | nVPA_FSB_OBUF | 9362 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nVPA_FSB_OBUF.Q | nVPA_FSB_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nVPA_FSB | 9486 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_FSB | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | nDinLE | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | iobm/nDinLE | 9448 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/nDinLE.Q | iobm/nDinLE | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nDinLE | 9487 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDinLE | 0 | 6 | OI_OUT +NODE | nVPA_FSB | 9401 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nVPA_FSB | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | nADoutLE0 | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nADoutLE0_OBUF | 9449 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.Q | nADoutLE0_OBUF | 0 | 0 | MC_Q +NODE | nADoutLE0_OBUF | 9363 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE0_OBUF.Q | nADoutLE0_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nADoutLE0 | 9488 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nADoutLE0 | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | nDinOE | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nDinOE_OBUF | 9450 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDinOE_OBUF.Q | nDinOE_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nDinOE | 9489 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDinOE | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | nRAS | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nRAS_OBUF | 9451 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.Q | nRAS_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nRAS | 9490 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRAS | 0 | 6 | OI_OUT +NODE | nADoutLE0 | 9402 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nADoutLE0 | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | nCAS | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | ram/nCAS | 9452 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/nCAS.Q | ram/nCAS | 0 | 0 | MC_Q +NODE | nCAS_OBUF | 9364 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nCAS_OBUF.Q | nCAS_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nCAS | 9491 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nCAS | 0 | 6 | OI_OUT +NODE | nCAS | 9403 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nCAS | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | nDinLE | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | nDinLE_OBUF | 9365 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDinLE_OBUF.Q | nDinLE_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | nDinLE | 9404 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDinLE | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | nDinOE | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | nDinOE_OBUF | 9366 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDinOE_OBUF.Q | nDinOE_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | nDinOE | 9405 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nDinOE | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | nRES | WarpSE_COPY_0_COPY_0 | 7 | 2 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | N0$Q | 9453 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N0.Q | N0 | 0 | 0 | MC_Q +NODE | N0 | 9367 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N0.Q | N0 | 0 | 0 | MC_Q INPUT_NODE_TYPE | 2 | 6 | OI_OE -NODE | N0$OE | 9454 | ? | 571 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N0.BUFOE.OUT | N0 | 2 | 0 | MC_OE +NODE | N0$OE | 9368 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N0.BUFOE.OUT | N0 | 2 | 0 | MC_OE OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nRES | 9492 | PIPO | 571 | 64 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRES | 0 | 6 | OI_OUT +NODE | nRES | 9406 | PIPO | 0 | 64 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRES | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | RA<11> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | A_FSB_19_IBUF$BUF0 | 9455 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.Q | A_FSB_19_IBUF$BUF0 | 0 | 0 | MC_Q +NODE | A_FSB_19_IBUF$BUF0 | 9369 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_19_IBUF$BUF0.Q | A_FSB_19_IBUF$BUF0 | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | RA<11> | 9493 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<11> | 0 | 6 | OI_OUT +NODE | RA<11> | 9407 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<11> | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | RA<10> | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | A_FSB_21_IBUF$BUF0 | 9456 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.Q | A_FSB_21_IBUF$BUF0 | 0 | 0 | MC_Q +NODE | A_FSB_21_IBUF$BUF0 | 9370 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | A_FSB_21_IBUF$BUF0.Q | A_FSB_21_IBUF$BUF0 | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | RA<10> | 9494 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<10> | 0 | 6 | OI_OUT +NODE | RA<10> | 9408 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | RA<10> | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | nADoutLE1 | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nADoutLE1_OBUF | 9457 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 0 | 0 | MC_Q +NODE | nADoutLE1_OBUF | 9371 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nADoutLE1 | 9495 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nADoutLE1 | 0 | 6 | OI_OUT +NODE | nADoutLE1 | 9409 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nADoutLE1 | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | nAoutOE | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nAoutOE_OBUF | 9459 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 0 | 0 | MC_Q +NODE | nAoutOE_OBUF | 9373 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nAoutOE_OBUF.Q | nAoutOE_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nAoutOE | 9496 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAoutOE | 0 | 6 | OI_OUT +NODE | nAoutOE | 9410 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAoutOE | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | nRAMLWE | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nRAMLWE_OBUF | 9461 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.Q | nRAMLWE_OBUF | 0 | 0 | MC_Q +NODE | nRAMLWE_OBUF | 9375 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMLWE_OBUF.Q | nRAMLWE_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nRAMLWE | 9497 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRAMLWE | 0 | 6 | OI_OUT +NODE | nRAMLWE | 9411 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRAMLWE | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | nRAMUWE | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nRAMUWE_OBUF | 9462 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.Q | nRAMUWE_OBUF | 0 | 0 | MC_Q +NODE | nRAMUWE_OBUF | 9376 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAMUWE_OBUF.Q | nRAMUWE_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nRAMUWE | 9498 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRAMUWE | 0 | 6 | OI_OUT +NODE | nRAMUWE | 9412 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRAMUWE | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | nROMCS | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | nROMCS_OBUF | 9463 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.Q | nROMCS_OBUF | 0 | 0 | MC_Q +NODE | nROMCS_OBUF | 9377 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMCS_OBUF.Q | nROMCS_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | nROMCS | 9499 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nROMCS | 0 | 6 | OI_OUT +NODE | nROMCS | 9413 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nROMCS | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | C25MEN | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | N1$Q | 9464 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N1.Q | N1 | 0 | 0 | MC_Q +NODE | C25MEN_OBUF$Q | 9378 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | C25MEN_OBUF.Q | C25MEN_OBUF | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | C25MEN | 9500 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C25MEN | 0 | 6 | OI_OUT +NODE | C25MEN | 9414 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C25MEN | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | C20MEN | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | N1$BUF0 | 9465 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | N1$BUF0.Q | N1$BUF0 | 0 | 0 | MC_Q +NODE | C25MEN_OBUF$BUF0 | 9379 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | C25MEN_OBUF$BUF0.Q | C25MEN_OBUF$BUF0 | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | C20MEN | 9501 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C20MEN | 0 | 6 | OI_OUT +NODE | C20MEN | 9415 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C20MEN | 0 | 6 | OI_OUT -MACROCELL_INSTANCE | NULL | EXP14_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 25 | 1 +OUTPUT_INSTANCE | 0 | nRAS | WarpSE_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | nRAS_OBUF | 9380 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nRAS_OBUF.Q | nRAS_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | nRAS | 9416 | PO | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nRAS | 0 | 6 | OI_OUT + +MACROCELL_INSTANCE | NULL | EXP10_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 17 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/VPA | 9351 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_9_IBUF | 9297 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_8_IBUF | 9298 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_15_IBUF | 9299 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_12_IBUF | 9302 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_11_IBUF | 9303 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_10_IBUF | 9304 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP15_.EXP | 10079 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP15_.EXP | EXP15_ | 4 | 0 | MC_EXPORT +NODE | EXP11_.EXP | 9973 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP11_.EXP | EXP11_ | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP14_.EXP | 10078 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP14_.EXP | EXP14_ | 4 | 0 | MC_EXPORT +NODE | EXP10_.EXP | 9972 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP10_.EXP | EXP10_ | 4 | 0 | MC_EXPORT -SIGNAL_INSTANCE | EXP14_.SI | EXP14_ | 0 | 25 | 1 +SIGNAL_INSTANCE | EXP10_.SI | EXP10_ | 0 | 17 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/VPA | 9351 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_9_IBUF | 9297 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_8_IBUF | 9298 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_15_IBUF | 9299 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_12_IBUF | 9302 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_11_IBUF | 9303 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_10_IBUF | 9304 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP15_.EXP | 10079 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP15_.EXP | EXP15_ | 4 | 0 | MC_EXPORT +NODE | EXP11_.EXP | 9973 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP11_.EXP | EXP11_ | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP14_.EXP | 10064 | ? | 509 | 0 | EXP14_ | NULL | NULL | EXP14_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 1 | IV_TRUE | EXP15_.EXP -SPPTERM | 14 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/ALE1 -SPPTERM | 14 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/ASrf | IV_FALSE | iobs/ALE1 -SPPTERM | 14 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/ALE1 -SPPTERM | 14 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/ASrf | IV_FALSE | iobs/ALE1 -SPPTERM | 18 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF +SIGNAL | NODE | EXP10_.EXP | 9959 | ? | 0 | 0 | EXP10_ | NULL | NULL | EXP10_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 1 | IV_TRUE | EXP11_.EXP +SPPTERM | 8 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1 +SPPTERM | 8 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1 +SPPTERM | 8 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1 +SPPTERM | 8 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1 +SPPTERM | 14 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1 -MACROCELL_INSTANCE | NULL | EXP15_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 20 | 1 +MACROCELL_INSTANCE | NULL | EXP11_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 16 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_9_IBUF | 9297 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_8_IBUF | 9298 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_15_IBUF | 9299 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_12_IBUF | 9302 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_11_IBUF | 9303 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_10_IBUF | 9304 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP15_.EXP | 10079 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP15_.EXP | EXP15_ | 4 | 0 | MC_EXPORT +NODE | EXP11_.EXP | 9973 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP11_.EXP | EXP11_ | 4 | 0 | MC_EXPORT -SIGNAL_INSTANCE | EXP15_.SI | EXP15_ | 0 | 20 | 1 +SIGNAL_INSTANCE | EXP11_.SI | EXP11_ | 0 | 16 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_9_IBUF | 9297 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_8_IBUF | 9298 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_15_IBUF | 9299 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_12_IBUF | 9302 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_11_IBUF | 9303 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_10_IBUF | 9304 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP15_.EXP | 10065 | ? | 509 | 0 | EXP15_ | NULL | NULL | EXP15_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 18 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | fsb/Ready1r | IV_FALSE | nAS_FSB_IBUF +SIGNAL | NODE | EXP11_.EXP | 9960 | ? | 0 | 0 | EXP11_ | NULL | NULL | EXP11_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 14 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1 +SPPTERM | 14 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | ALE1 +SPPTERM | 14 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1 + +MACROCELL_INSTANCE | NULL | EXP12_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 18 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_9_IBUF | 9213 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_8_IBUF | 9214 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_15_IBUF | 9215 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_12_IBUF | 9218 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_11_IBUF | 9219 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_10_IBUF | 9220 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9270 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP12_.EXP | 9974 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP12_.EXP | EXP12_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP12_.SI | EXP12_ | 0 | 18 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_9_IBUF | 9213 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_8_IBUF | 9214 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_15_IBUF | 9215 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_12_IBUF | 9218 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_11_IBUF | 9219 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_10_IBUF | 9220 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9270 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP12_.EXP | 9961 | ? | 0 | 0 | EXP12_ | NULL | NULL | EXP12_.SI | 7 | 9 | MC_SI_EXPORT SPPTERM | 18 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | fsb/Ready1r | IV_TRUE | fsb/ASrf + +MACROCELL_INSTANCE | NULL | EXP13_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 21 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9270 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/VPA | 9271 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9276 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready0r | 9269 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMReady | 9340 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP12_.EXP | 9974 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP12_.EXP | EXP12_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP13_.EXP | 9975 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP13_.EXP | EXP13_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP13_.SI | EXP13_ | 0 | 21 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9270 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/VPA | 9271 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9276 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready0r | 9269 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ram/RAMReady | 9340 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | EXP12_.EXP | 9974 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP12_.EXP | EXP12_ | 4 | 0 | MC_EXPORT +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP13_.EXP | 9962 | ? | 0 | 0 | EXP13_ | NULL | NULL | EXP13_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 1 | IV_TRUE | EXP12_.EXP +SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/ASrf +SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay | IV_FALSE | fsb/Ready0r | IV_TRUE | fsb/VPA | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RAMReady +SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay | IV_FALSE | fsb/Ready0r | IV_TRUE | fsb/VPA | IV_TRUE | fsb/ASrf | IV_FALSE | ram/RAMReady +SPPTERM | 14 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ALE1 +SPPTERM | 14 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ALE1 + +MACROCELL_INSTANCE | NULL | EXP14_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 24 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9270 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/VPA | 9271 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9276 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_9_IBUF | 9213 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_8_IBUF | 9214 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_15_IBUF | 9215 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_12_IBUF | 9218 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_11_IBUF | 9219 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_10_IBUF | 9220 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP14_.EXP | 9976 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP14_.EXP | EXP14_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP14_.SI | EXP14_ | 0 | 24 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/Ready1r | 9270 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/VPA | 9271 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | iobs/IOReady | 9276 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_9_IBUF | 9213 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_8_IBUF | 9214 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_15_IBUF | 9215 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_12_IBUF | 9218 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_11_IBUF | 9219 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_10_IBUF | 9220 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP14_.EXP | 9963 | ? | 0 | 0 | EXP14_ | NULL | NULL | EXP14_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 14 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/ASrf | IV_FALSE | ALE1 +SPPTERM | 14 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | cs/nOverlay | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/ASrf | IV_FALSE | ALE1 +SPPTERM | 18 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | fsb/Ready1r | IV_FALSE | nAS_FSB_IBUF +SPPTERM | 18 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | iobs/IOReady | IV_FALSE | nAS_FSB_IBUF SPPTERM | 18 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | iobs/IOReady | IV_TRUE | fsb/ASrf -MACROCELL_INSTANCE | NULL | EXP16_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 15 | 1 +MACROCELL_INSTANCE | NULL | EXP15_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 21 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | fsb/Ready1r | 9270 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | iobs/IOReady | 9276 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +NODE | nDTACK_FSB_OBUF.UIM | 9285 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_9_IBUF | 9213 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_8_IBUF | 9214 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_15_IBUF | 9215 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_12_IBUF | 9218 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_11_IBUF | 9219 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_10_IBUF | 9220 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP16_.EXP | 10080 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP16_.EXP | EXP16_ | 4 | 0 | MC_EXPORT +NODE | EXP15_.EXP | 9977 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP15_.EXP | EXP15_ | 4 | 0 | MC_EXPORT -SIGNAL_INSTANCE | EXP16_.SI | EXP16_ | 0 | 15 | 1 +SIGNAL_INSTANCE | EXP15_.SI | EXP15_ | 0 | 21 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | fsb/Ready1r | 9270 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | iobs/IOReady | 9276 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +NODE | nDTACK_FSB_OBUF.UIM | 9285 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.Q | nDTACK_FSB_OBUF | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_9_IBUF | 9213 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_9_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_8_IBUF | 9214 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_8_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_15_IBUF | 9215 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_15_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_12_IBUF | 9218 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_12_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_11_IBUF | 9219 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_11_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_10_IBUF | 9220 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_10_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP16_.EXP | 10066 | ? | 539 | 0 | EXP16_ | NULL | NULL | EXP16_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf -SPPTERM | 12 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd1 -SPPTERM | 12 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf -SPPTERM | 12 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd1 -SPPTERM | 12 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf - -MACROCELL_INSTANCE | NULL | EXP17_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 9 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP16_.EXP | 10080 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP16_.EXP | EXP16_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP17_.EXP | 10081 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP17_.EXP | EXP17_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP17_.SI | EXP17_ | 0 | 9 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP16_.EXP | 10080 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP16_.EXP | EXP16_ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP17_.EXP | 10067 | ? | 539 | 0 | EXP17_ | NULL | NULL | EXP17_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 1 | IV_TRUE | EXP16_.EXP -SPPTERM | 4 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd1 -SPPTERM | 4 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf -SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd1 -SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf -SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd1 - -MACROCELL_INSTANCE | NULL | EXP18_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 13 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/nDTACK.UIM | 9363 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready0r | 9349 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMReady | 9424 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOREQ.EXP | 10082 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOREQ.EXP | iobs/IOREQ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP18_.EXP | 10083 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP18_.EXP | EXP18_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP18_.SI | EXP18_ | 0 | 13 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/nDTACK.UIM | 9363 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/nDTACK.Q | fsb/nDTACK | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready0r | 9349 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMReady | 9424 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOREQ.EXP | 10082 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOREQ.EXP | iobs/IOREQ | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP18_.EXP | 10069 | ? | 520 | 0 | EXP18_ | NULL | NULL | EXP18_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 1 | IV_TRUE | iobs/IOREQ.EXP +SIGNAL | NODE | EXP15_.EXP | 9964 | ? | 0 | 0 | EXP15_ | NULL | NULL | EXP15_.SI | 7 | 9 | MC_SI_EXPORT SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf -SPPTERM | 4 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/nDTACK.UIM -SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/nDTACK.UIM -SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/nDTACK.UIM -SPPTERM | 6 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | fsb/nDTACK.UIM | IV_FALSE | ram/RAMReady +SPPTERM | 4 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM +SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/Ready1r | IV_FALSE | iobs/IOReady | IV_TRUE | nDTACK_FSB_OBUF.UIM +SPPTERM | 17 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | fsb/Ready1r +SPPTERM | 17 | IV_TRUE | A_FSB_9_IBUF | IV_TRUE | A_FSB_8_IBUF | IV_TRUE | A_FSB_15_IBUF | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_12_IBUF | IV_TRUE | A_FSB_11_IBUF | IV_TRUE | A_FSB_10_IBUF | IV_TRUE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_TRUE | iobs/IOReady -MACROCELL_INSTANCE | NULL | EXP19_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 9 | 1 +MACROCELL_INSTANCE | NULL | EXP16_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 9 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r.EXP | 10085 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.EXP | fsb/Ready1r | 4 | 0 | MC_EXPORT +NODE | nDTACK_FSB_OBUF.EXP | 9978 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.EXP | nDTACK_FSB_OBUF | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP19_.EXP | 10086 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP19_.EXP | EXP19_ | 4 | 0 | MC_EXPORT +NODE | EXP16_.EXP | 9979 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP16_.EXP | EXP16_ | 4 | 0 | MC_EXPORT -SIGNAL_INSTANCE | EXP19_.SI | EXP19_ | 0 | 9 | 1 +SIGNAL_INSTANCE | EXP16_.SI | EXP16_ | 0 | 9 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r.EXP | 10085 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.EXP | fsb/Ready1r | 4 | 0 | MC_EXPORT +NODE | nDTACK_FSB_OBUF.EXP | 9978 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nDTACK_FSB_OBUF.EXP | nDTACK_FSB_OBUF | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP19_.EXP | 10072 | ? | 514 | 0 | EXP19_ | NULL | NULL | EXP19_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 1 | IV_TRUE | fsb/Ready1r.EXP +SIGNAL | NODE | EXP16_.EXP | 9966 | ? | 0 | 0 | EXP16_ | NULL | NULL | EXP16_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 1 | IV_TRUE | nDTACK_FSB_OBUF.EXP SPPTERM | 2 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | fsb/ASrf SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_19_IBUF +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | nWE_FSB_IBUF -SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 -MACROCELL_INSTANCE | NULL | EXP20_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 7 | 1 +MACROCELL_INSTANCE | NULL | EXP17_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 7 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP20_.EXP | 10087 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP20_.EXP | EXP20_ | 4 | 0 | MC_EXPORT +NODE | EXP17_.EXP | 9980 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP17_.EXP | EXP17_ | 4 | 0 | MC_EXPORT -SIGNAL_INSTANCE | EXP20_.SI | EXP20_ | 0 | 7 | 1 +SIGNAL_INSTANCE | EXP17_.SI | EXP17_ | 0 | 7 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP20_.EXP | 10073 | ? | 514 | 0 | EXP20_ | NULL | NULL | EXP20_.SI | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP17_.EXP | 9967 | ? | 0 | 0 | EXP17_ | NULL | NULL | EXP17_.SI | 7 | 9 | MC_SI_EXPORT SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_20_IBUF SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_18_IBUF SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_17_IBUF SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_16_IBUF SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF -MACROCELL_INSTANCE | NULL | EXP21_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 13 | 1 +MACROCELL_INSTANCE | NULL | EXP18_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 14 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IORW1 | 9355 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IORW0 | 9345 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP21_.EXP | 10088 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP21_.EXP | EXP21_ | 4 | 0 | MC_EXPORT +NODE | EXP18_.EXP | 9982 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP18_.EXP | EXP18_ | 4 | 0 | MC_EXPORT -SIGNAL_INSTANCE | EXP21_.SI | EXP21_ | 0 | 13 | 1 +SIGNAL_INSTANCE | EXP18_.SI | EXP18_ | 0 | 14 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IORW1 | 9355 | ? | 514 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW1.Q | iobs/IORW1 | 1 | 0 | MC_UIM +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IORW0 | 9345 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IORW0.Q | iobs/IORW0 | 1 | 0 | MC_UIM +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP21_.EXP | 10074 | ? | 503 | 0 | EXP21_ | NULL | NULL | EXP21_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 4 | IV_FALSE | iobs/IORW1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_FALSE | iobs/ALE1 -SPPTERM | 5 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | iobs/IORW0 | IV_TRUE | iobs/ALE1 -SPPTERM | 7 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1 -SPPTERM | 7 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1 -SPPTERM | 8 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1 +SIGNAL | NODE | EXP18_.EXP | 9969 | ? | 0 | 0 | EXP18_ | NULL | NULL | EXP18_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd1 +SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf +SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd1 +SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf +SPPTERM | 12 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd1 -MACROCELL_INSTANCE | NULL | EXP22_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 18 | 1 +MACROCELL_INSTANCE | NULL | EXP19_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 4 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nROMWE_OBUF.EXP | 10090 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.EXP | nROMWE_OBUF | 4 | 0 | MC_EXPORT +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP22_.EXP | 10089 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP22_.EXP | EXP22_ | 4 | 0 | MC_EXPORT +NODE | EXP19_.EXP | 9997 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP19_.EXP | EXP19_ | 4 | 0 | MC_EXPORT -SIGNAL_INSTANCE | EXP22_.SI | EXP22_ | 0 | 18 | 1 +SIGNAL_INSTANCE | EXP19_.SI | EXP19_ | 0 | 4 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/ALE1 | 9458 | ? | 544 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nROMWE_OBUF.EXP | 10090 | ? | 503 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nROMWE_OBUF.EXP | nROMWE_OBUF | 4 | 0 | MC_EXPORT +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP22_.EXP | 10075 | ? | 503 | 0 | EXP22_ | NULL | NULL | EXP22_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 1 | IV_TRUE | nROMWE_OBUF.EXP -SPPTERM | 8 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1 -SPPTERM | 8 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1 -SPPTERM | 8 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf | IV_TRUE | iobs/ALE1 -SPPTERM | 14 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1 -SPPTERM | 14 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | iobs/ALE1 +SIGNAL | NODE | EXP19_.EXP | 9985 | ? | 0 | 0 | EXP19_ | NULL | NULL | EXP19_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 4 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF | IV_FALSE | cs/nOverlay -MACROCELL_INSTANCE | NULL | EXP23_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 12 | 1 +MACROCELL_INSTANCE | NULL | EXP20_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 8 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/VPA | 9351 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready0r | 9349 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMReady | 9424 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP23_.EXP | 10091 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP23_.EXP | EXP23_ | 4 | 0 | MC_EXPORT +NODE | EXP20_.EXP | 9999 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP20_.EXP | EXP20_ | 4 | 0 | MC_EXPORT -SIGNAL_INSTANCE | EXP23_.SI | EXP23_ | 0 | 12 | 1 +SIGNAL_INSTANCE | EXP20_.SI | EXP20_ | 0 | 8 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready1r | 9350 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready1r.Q | fsb/Ready1r | 1 | 0 | MC_UIM +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/VPA | 9351 | ? | 509 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/VPA.Q | fsb/VPA | 1 | 0 | MC_UIM +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/IOReady | 9356 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/IOReady.Q | iobs/IOReady | 1 | 0 | MC_UIM +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/Ready0r | 9349 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/Ready0r.Q | fsb/Ready0r | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMReady | 9424 | ? | 520 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.Q | ram/RAMReady | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP23_.EXP | 10077 | ? | 509 | 0 | EXP23_ | NULL | NULL | EXP23_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | fsb/Ready1r | IV_TRUE | fsb/VPA | IV_FALSE | iobs/IOReady | IV_TRUE | fsb/ASrf -SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | fsb/VPA | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RAMReady -SPPTERM | 7 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | fsb/VPA | IV_TRUE | fsb/ASrf | IV_FALSE | ram/RAMReady -SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | fsb/VPA | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | ram/RAMReady -SPPTERM | 8 | IV_FALSE | A_FSB_23_IBUF | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | fsb/Ready0r | IV_TRUE | fsb/VPA | IV_TRUE | fsb/ASrf | IV_FALSE | ram/RAMReady +SIGNAL | NODE | EXP20_.EXP | 9987 | ? | 0 | 0 | EXP20_ | NULL | NULL | EXP20_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_20_IBUF +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_18_IBUF +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | A_FSB_17_IBUF +SPPTERM | 3 | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | A_FSB_20_IBUF +SPPTERM | 4 | IV_FALSE | A_FSB_14_IBUF | IV_FALSE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF -MACROCELL_INSTANCE | NULL | EXP24_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 12 | 1 +MACROCELL_INSTANCE | NULL | EXP21_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 18 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nBERR_IOB_IBUF | 9361 | ? | 565 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOBERR | 9396 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrf | 9409 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrr | 9410 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrf | 9412 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrr | 9413 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrf | 9416 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrr | 9417 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP24_.EXP | 10094 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP24_.EXP | EXP24_ | 4 | 0 | MC_EXPORT +NODE | EXP21_.EXP | 10008 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP21_.EXP | EXP21_ | 4 | 0 | MC_EXPORT -SIGNAL_INSTANCE | EXP24_.SI | EXP24_ | 0 | 12 | 1 +SIGNAL_INSTANCE | EXP21_.SI | EXP21_ | 0 | 18 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | C8M_IBUF | 9325 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | C8M_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_13_IBUF | 9217 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nBERR_IOB_IBUF | 9361 | ? | 565 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nBERR_IOB_IBUF | 0 | 5 | II_IMUX +NODE | A_FSB_21_IBUF | 9223 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd3 | 9371 | ? | 568 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd3.Q | iobm/IOS_FSM_FFd3 | 1 | 0 | MC_UIM +NODE | A_FSB_20_IBUF | 9224 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd1 | 9373 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd1.Q | iobm/IOS_FSM_FFd1 | 1 | 0 | MC_UIM +NODE | A_FSB_19_IBUF | 9225 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOS_FSM_FFd2 | 9374 | ? | 574 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOS_FSM_FFd2.Q | iobm/IOS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | A_FSB_18_IBUF | 9226 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/IOBERR | 9396 | ? | 559 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/IOBERR.Q | iobm/IOBERR | 1 | 0 | MC_UIM +NODE | A_FSB_17_IBUF | 9227 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrf | 9409 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrf.Q | iobm/BERRrf | 1 | 0 | MC_UIM +NODE | A_FSB_16_IBUF | 9228 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/BERRrr | 9410 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/BERRrr.Q | iobm/BERRrr | 1 | 0 | MC_UIM +NODE | iobs/Once | 9242 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrf | 9412 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrf.Q | iobm/DTACKrf | 1 | 0 | MC_UIM +NODE | cs/nOverlay | 9260 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay.Q | cs/nOverlay | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/DTACKrr | 9413 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/DTACKrr.Q | iobm/DTACKrr | 1 | 0 | MC_UIM +NODE | nWE_FSB_IBUF | 9274 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrf | 9416 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrf.Q | iobm/RESrf | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd2 | 9296 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobm/RESrr | 9417 | ? | 562 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobm/RESrr.Q | iobm/RESrr | 1 | 0 | MC_UIM +NODE | iobs/PS_FSM_FFd1 | 9301 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_14_IBUF | 9216 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_23_IBUF | 9221 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | A_FSB_22_IBUF | 9222 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ALE1 | 9372 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | nADoutLE1_OBUF.Q | nADoutLE1_OBUF | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP24_.EXP | 10092 | ? | 559 | 0 | EXP24_ | NULL | NULL | EXP24_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 8 | IV_TRUE | C8M_IBUF | IV_FALSE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOBERR | IV_TRUE | iobm/BERRrf | IV_TRUE | iobm/BERRrr -SPPTERM | 8 | IV_TRUE | C8M_IBUF | IV_FALSE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOBERR | IV_TRUE | iobm/DTACKrf | IV_TRUE | iobm/DTACKrr -SPPTERM | 8 | IV_TRUE | C8M_IBUF | IV_FALSE | nBERR_IOB_IBUF | IV_TRUE | iobm/IOS_FSM_FFd3 | IV_TRUE | iobm/IOS_FSM_FFd1 | IV_TRUE | iobm/IOS_FSM_FFd2 | IV_FALSE | iobm/IOBERR | IV_TRUE | iobm/RESrf | IV_TRUE | iobm/RESrr +SIGNAL | NODE | EXP21_.EXP | 9996 | ? | 0 | 0 | EXP21_ | NULL | NULL | EXP21_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 13 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf +SPPTERM | 14 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ALE1 +SPPTERM | 14 | IV_TRUE | A_FSB_14_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1 +SPPTERM | 14 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | nAS_FSB_IBUF | IV_TRUE | ALE1 +SPPTERM | 14 | IV_TRUE | A_FSB_13_IBUF | IV_FALSE | A_FSB_23_IBUF | IV_FALSE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay | IV_FALSE | nWE_FSB_IBUF | IV_TRUE | fsb/ASrf | IV_TRUE | ALE1 -MACROCELL_INSTANCE | NULL | EXP25_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 10 | 1 +MACROCELL_INSTANCE | NULL | EXP22_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 7 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | ram/RAMEN | 9302 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd1 | 9290 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefReq | 9395 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | ram/RefUrg | 9297 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrg.Q | ram/RefUrg | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9394 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RA_6_OBUF.EXP | 10114 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.EXP | RA_6_OBUF | 4 | 0 | MC_EXPORT +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP25_.EXP | 10115 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP25_.EXP | EXP25_ | 4 | 0 | MC_EXPORT +NODE | EXP22_.EXP | 10030 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP22_.EXP | EXP22_ | 4 | 0 | MC_EXPORT -SIGNAL_INSTANCE | EXP25_.SI | EXP25_ | 0 | 10 | 1 +SIGNAL_INSTANCE | EXP22_.SI | EXP22_ | 0 | 7 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX +NODE | ram/RS_FSM_FFd3 | 9295 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM +NODE | ram/RAMEN | 9302 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd1 | 9290 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM +NODE | ram/RS_FSM_FFd2 | 9291 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefReq | 9395 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM +NODE | nAS_FSB_IBUF | 9288 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX +NODE | ram/RefUrg | 9297 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrg.Q | ram/RefUrg | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9394 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | RA_6_OBUF.EXP | 10114 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | RA_6_OBUF.EXP | RA_6_OBUF | 4 | 0 | MC_EXPORT +NODE | fsb/ASrf | 9332 | ? | 0 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP25_.EXP | 10104 | ? | 540 | 0 | EXP25_ | NULL | NULL | EXP25_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 1 | IV_TRUE | RA_6_OBUF.EXP -SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefReq -SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | ram/BACTr -SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefReq -SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | ram/BACTr -SPPTERM | 6 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | ram/BACTr - -MACROCELL_INSTANCE | NULL | EXP26_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 10 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9394 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefReq | 9395 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMReady.EXP | 10116 | ? | 522 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.EXP | ram/RAMReady | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP26_.EXP | 10117 | ? | 522 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP26_.EXP | EXP26_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP26_.SI | EXP26_ | 0 | 10 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/BACTr | 9394 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/BACTr.Q | ram/BACTr | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefReq | 9395 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefReq.Q | ram/RefReq | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMReady.EXP | 10116 | ? | 522 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMReady.EXP | ram/RAMReady | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP26_.EXP | 10106 | ? | 522 | 0 | EXP26_ | NULL | NULL | EXP26_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 1 | IV_TRUE | ram/RAMReady.EXP -SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | ram/BACTr -SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefReq -SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | ram/BACTr -SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | ram/BACTr -SPPTERM | 6 | IV_FALSE | A_FSB_22_IBUF | IV_FALSE | cs/nOverlay1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_TRUE | ram/BACTr - -MACROCELL_INSTANCE | NULL | EXP27_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 11 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1.EXP | 10141 | ? | 527 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.EXP | ram/RS_FSM_FFd1 | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP27_.EXP | 10142 | ? | 527 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP27_.EXP | EXP27_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP27_.SI | EXP27_ | 0 | 11 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1 | 9372 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.Q | ram/RS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd2 | 9375 | ? | 541 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd2.Q | ram/RS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd3 | 9378 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd3.Q | ram/RS_FSM_FFd3 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RefUrgent | 9377 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RefUrgent.Q | ram/RefUrgent | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RAMEN | 9381 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RAMEN.Q | ram/RAMEN | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ram/RS_FSM_FFd1.EXP | 10141 | ? | 527 | 0 | WarpSE_COPY_0_COPY_0 | NULL | ram/RS_FSM_FFd1.EXP | ram/RS_FSM_FFd1 | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP27_.EXP | 10129 | ? | 527 | 0 | EXP27_ | NULL | NULL | EXP27_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 1 | IV_TRUE | ram/RS_FSM_FFd1.EXP -SPPTERM | 3 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RS_FSM_FFd3 -SPPTERM | 4 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 -SPPTERM | 4 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | fsb/ASrf -SPPTERM | 4 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RefUrgent | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RAMEN -SPPTERM | 5 | IV_TRUE | A_FSB_22_IBUF | IV_FALSE | A_FSB_21_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 - -MACROCELL_INSTANCE | NULL | EXP28_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 10 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/nBERR_FSB.EXP | 10144 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.EXP | iobs/nBERR_FSB | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP28_.EXP | 10145 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP28_.EXP | EXP28_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP28_.SI | EXP28_ | 0 | 10 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_23_IBUF | 9305 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_23_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/nBERR_FSB.EXP | 10144 | ? | 525 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/nBERR_FSB.EXP | iobs/nBERR_FSB | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP28_.EXP | 10132 | ? | 525 | 0 | EXP28_ | NULL | NULL | EXP28_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 1 | IV_TRUE | iobs/nBERR_FSB.EXP -SPPTERM | 5 | IV_TRUE | A_FSB_23_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf -SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 -SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf -SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 -SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf - -MACROCELL_INSTANCE | NULL | EXP29_ | WarpSE_COPY_0_COPY_0 | 2147483648 | 16 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP29_.EXP | 10149 | ? | 499 | 0 | WarpSE_COPY_0_COPY_0 | NULL | EXP29_.EXP | EXP29_ | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | EXP29_.SI | EXP29_ | 0 | 16 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_22_IBUF | 9306 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_22_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_21_IBUF | 9307 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_21_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/Once | 9335 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/Once.Q | iobs/Once | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd2 | 9376 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd2.Q | iobs/PS_FSM_FFd2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | iobs/PS_FSM_FFd1 | 9380 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | iobs/PS_FSM_FFd1.Q | iobs/PS_FSM_FFd1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | fsb/ASrf | 9407 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | fsb/ASrf.Q | fsb/ASrf | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_20_IBUF | 9308 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_20_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_14_IBUF | 9300 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_14_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_19_IBUF | 9309 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_19_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_18_IBUF | 9310 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_18_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_17_IBUF | 9311 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_17_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_16_IBUF | 9312 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_16_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nWE_FSB_IBUF | 9324 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nWE_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs/nOverlay1 | 9340 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | cs/nOverlay1.Q | cs/nOverlay1 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | nAS_FSB_IBUF | 9360 | ? | 540 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | nAS_FSB_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | A_FSB_13_IBUF | 9301 | ? | 539 | 0 | WarpSE_COPY_0_COPY_0 | NULL | NULL | A_FSB_13_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP29_.EXP | 10136 | ? | 499 | 0 | EXP29_ | NULL | NULL | EXP29_.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf -SPPTERM | 6 | IV_TRUE | A_FSB_22_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_FALSE | iobs/Once | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf -SPPTERM | 13 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 -SPPTERM | 13 | IV_TRUE | A_FSB_14_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 | IV_TRUE | fsb/ASrf -SPPTERM | 13 | IV_TRUE | A_FSB_13_IBUF | IV_TRUE | A_FSB_21_IBUF | IV_TRUE | A_FSB_20_IBUF | IV_TRUE | A_FSB_19_IBUF | IV_TRUE | A_FSB_18_IBUF | IV_TRUE | A_FSB_17_IBUF | IV_TRUE | A_FSB_16_IBUF | IV_FALSE | nWE_FSB_IBUF | IV_FALSE | iobs/Once | IV_TRUE | cs/nOverlay1 | IV_FALSE | nAS_FSB_IBUF | IV_FALSE | iobs/PS_FSM_FFd2 | IV_FALSE | iobs/PS_FSM_FFd1 +SIGNAL | NODE | EXP22_.EXP | 10019 | ? | 0 | 0 | EXP22_ | NULL | NULL | EXP22_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 2 | IV_TRUE | ram/RS_FSM_FFd3 | IV_TRUE | ram/RAMEN +SPPTERM | 3 | IV_TRUE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RAMEN +SPPTERM | 3 | IV_FALSE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2 | IV_TRUE | ram/RAMEN +SPPTERM | 6 | IV_TRUE | nAS_FSB_IBUF | IV_TRUE | ram/RS_FSM_FFd1 | IV_TRUE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefUrg | IV_FALSE | fsb/ASrf +SPPTERM | 6 | IV_TRUE | nAS_FSB_IBUF | IV_FALSE | ram/RS_FSM_FFd1 | IV_FALSE | ram/RS_FSM_FFd2 | IV_FALSE | ram/RS_FSM_FFd3 | IV_FALSE | ram/RefUrg | IV_FALSE | fsb/ASrf FB_INSTANCE | FOOBAR1_ | WarpSE_COPY_0_COPY_0 | 0 | 0 | 0 -FBPIN | 1 | ram/RegUrgentSync | 1 | NULL | 0 | NULL | 0 -FBPIN | 2 | ram/RefUrgent | 1 | A_FSB_13_IBUF | 1 | NULL | 0 | 11 | 49152 -FBPIN | 3 | ram/RefReqSync | 1 | A_FSB_14_IBUF | 1 | NULL | 0 | 12 | 49152 -FBPIN | 4 | ram/RefReq | 1 | NULL | 0 | NULL | 0 -FBPIN | 5 | ram/RefRAS | 1 | A_FSB_15_IBUF | 1 | NULL | 0 | 13 | 49152 -FBPIN | 6 | iobs/IOACTr | 1 | A_FSB_16_IBUF | 1 | NULL | 0 | 14 | 49152 -FBPIN | 7 | fsb/ASrf | 1 | NULL | 0 | NULL | 0 -FBPIN | 8 | iobs/IOU1 | 1 | A_FSB_17_IBUF | 1 | NULL | 0 | 15 | 49152 -FBPIN | 9 | iobs/IOL1 | 1 | A_FSB_18_IBUF | 1 | NULL | 0 | 16 | 49152 -FBPIN | 10 | cnt/TimerTC | 1 | NULL | 0 | NULL | 0 -FBPIN | 11 | iobs/IOU0 | 1 | A_FSB_19_IBUF | 1 | NULL | 0 | 17 | 49152 -FBPIN | 12 | iobs/IOL0 | 1 | A_FSB_20_IBUF | 1 | NULL | 0 | 18 | 49152 -FBPIN | 13 | cnt/Timer<3> | 1 | NULL | 0 | NULL | 0 -FBPIN | 14 | cnt/Timer<2> | 1 | A_FSB_21_IBUF | 1 | NULL | 0 | 19 | 49152 -FBPIN | 15 | cnt/Timer<1> | 1 | A_FSB_22_IBUF | 1 | NULL | 0 | 20 | 49152 -FBPIN | 16 | cnt/RefUrgent | 1 | NULL | 0 | NULL | 0 -FBPIN | 17 | iobs/IOReady | 1 | C16M_IBUF | 0 | NULL | 0 | 22 | 57344 -FBPIN | 18 | cnt/RefReq | 1 | NULL | 0 | NULL | 0 +FBPIN | 1 | ram/RefUrg | 1 | NULL | 0 | NULL | 0 +FBPIN | 2 | ram/RefReqSync | 1 | A_FSB_13_IBUF | 1 | NULL | 0 | 11 | 49152 +FBPIN | 3 | ram/RefReq | 1 | A_FSB_14_IBUF | 1 | NULL | 0 | 12 | 49152 +FBPIN | 4 | iobs/IOACTr | 1 | NULL | 0 | NULL | 0 +FBPIN | 5 | iobm/Er | 1 | A_FSB_15_IBUF | 1 | NULL | 0 | 13 | 49152 +FBPIN | 6 | iobm/DTACKrr | 1 | A_FSB_16_IBUF | 1 | NULL | 0 | 14 | 49152 +FBPIN | 7 | iobm/DTACKrf | 1 | NULL | 0 | NULL | 0 +FBPIN | 8 | iobm/BERRrr | 1 | A_FSB_17_IBUF | 1 | NULL | 0 | 15 | 49152 +FBPIN | 9 | iobm/BERRrf | 1 | A_FSB_18_IBUF | 1 | NULL | 0 | 16 | 49152 +FBPIN | 10 | cnt/nIPL2r | 1 | NULL | 0 | NULL | 0 +FBPIN | 11 | cnt/Er<0> | 1 | A_FSB_19_IBUF | 1 | NULL | 0 | 17 | 49152 +FBPIN | 12 | ALE0S | 1 | A_FSB_20_IBUF | 1 | NULL | 0 | 18 | 49152 +FBPIN | 13 | ram/RS_FSM_FFd1 | 1 | NULL | 0 | NULL | 0 +FBPIN | 14 | iobs/IOU1 | 1 | A_FSB_21_IBUF | 1 | NULL | 0 | 19 | 49152 +FBPIN | 15 | iobs/IOL1 | 1 | A_FSB_22_IBUF | 1 | NULL | 0 | 20 | 49152 +FBPIN | 16 | iobm/IOS_FSM_FFd1 | 1 | NULL | 0 | NULL | 0 +FBPIN | 17 | ALE0M | 1 | C16M_IBUF | 0 | NULL | 0 | 22 | 57344 +FBPIN | 18 | ram/RefDone | 1 | NULL | 0 | NULL | 0 FB_INSTANCE | FOOBAR2_ | WarpSE_COPY_0_COPY_0 | 0 | 0 | 0 FBPIN | 6 | NULL | 0 | A_FSB_5_IBUF | 1 | NULL | 0 | 2 | 53248 FBPIN | 8 | NULL | 0 | A_FSB_6_IBUF | 1 | NULL | 0 | 3 | 53248 -FBPIN | 9 | iobm/VPArr | 1 | A_FSB_7_IBUF | 1 | NULL | 0 | 4 | 53248 -FBPIN | 10 | iobm/VPArf | 1 | NULL | 0 | NULL | 0 -FBPIN | 11 | iobm/RESrr | 1 | A_FSB_8_IBUF | 1 | NULL | 0 | 6 | 49152 -FBPIN | 12 | iobm/RESrf | 1 | A_FSB_9_IBUF | 1 | NULL | 0 | 7 | 49152 -FBPIN | 13 | iobm/IOREQr | 1 | NULL | 0 | NULL | 0 -FBPIN | 14 | iobm/Er2 | 1 | A_FSB_10_IBUF | 1 | NULL | 0 | 8 | 49152 -FBPIN | 15 | iobm/Er | 1 | A_FSB_11_IBUF | 1 | NULL | 0 | 9 | 49152 -FBPIN | 16 | iobm/DTACKrr | 1 | NULL | 0 | NULL | 0 -FBPIN | 17 | iobm/DTACKrf | 1 | A_FSB_12_IBUF | 1 | NULL | 0 | 10 | 49152 -FBPIN | 18 | cnt/Timer<0> | 1 | NULL | 0 | NULL | 0 +FBPIN | 9 | NULL | 0 | A_FSB_7_IBUF | 1 | NULL | 0 | 4 | 53248 +FBPIN | 11 | NULL | 0 | A_FSB_8_IBUF | 1 | NULL | 0 | 6 | 49152 +FBPIN | 12 | NULL | 0 | A_FSB_9_IBUF | 1 | NULL | 0 | 7 | 49152 +FBPIN | 13 | iobm/VPArr | 1 | NULL | 0 | NULL | 0 +FBPIN | 14 | iobm/VPArf | 1 | A_FSB_10_IBUF | 1 | NULL | 0 | 8 | 49152 +FBPIN | 15 | iobm/RESrr | 1 | A_FSB_11_IBUF | 1 | NULL | 0 | 9 | 49152 +FBPIN | 16 | iobm/RESrf | 1 | NULL | 0 | NULL | 0 +FBPIN | 17 | iobm/IOREQr | 1 | A_FSB_12_IBUF | 1 | NULL | 0 | 10 | 49152 +FBPIN | 18 | iobm/Er2 | 1 | NULL | 0 | NULL | 0 FB_INSTANCE | FOOBAR3_ | WarpSE_COPY_0_COPY_0 | 0 | 0 | 0 -FBPIN | 1 | fsb/VPA | 1 | NULL | 0 | NULL | 0 -FBPIN | 2 | EXP14_ | 1 | C8M_IBUF | 1 | NULL | 0 | 23 | 57344 -FBPIN | 3 | EXP15_ | 1 | NULL | 0 | NULL | 0 -FBPIN | 5 | EXP16_ | 1 | A_FSB_23_IBUF | 1 | NULL | 0 | 24 | 49152 -FBPIN | 6 | EXP17_ | 1 | E_IBUF | 1 | NULL | 0 | 25 | 49152 -FBPIN | 7 | iobs/IOREQ | 1 | NULL | 0 | NULL | 0 -FBPIN | 8 | EXP18_ | 1 | FCLK_IBUF | 0 | NULL | 0 | 27 | 57344 -FBPIN | 9 | fsb/nDTACK | 1 | NULL | 0 | nDTACK_FSB | 1 | 28 | 49152 -FBPIN | 10 | fsb/Ready1r | 1 | NULL | 0 | NULL | 0 -FBPIN | 11 | EXP19_ | 1 | nWE_FSB_IBUF | 1 | NULL | 0 | 29 | 49152 -FBPIN | 12 | iobs/IORW1 | 1 | nLDS_FSB_IBUF | 1 | NULL | 0 | 30 | 49152 -FBPIN | 13 | EXP20_ | 1 | NULL | 0 | NULL | 0 -FBPIN | 14 | EXP21_ | 1 | nAS_FSB_IBUF | 1 | NULL | 0 | 32 | 49152 -FBPIN | 15 | iobs/IORW0 | 1 | nUDS_FSB_IBUF | 1 | NULL | 0 | 33 | 49152 -FBPIN | 16 | EXP22_ | 1 | NULL | 0 | NULL | 0 +FBPIN | 1 | IORW0 | 1 | NULL | 0 | NULL | 0 +FBPIN | 2 | EXP10_ | 1 | C8M_IBUF | 1 | NULL | 0 | 23 | 57344 +FBPIN | 3 | EXP11_ | 1 | NULL | 0 | NULL | 0 +FBPIN | 4 | EXP12_ | 1 | NULL | 0 | NULL | 0 +FBPIN | 5 | EXP13_ | 1 | A_FSB_23_IBUF | 1 | NULL | 0 | 24 | 49152 +FBPIN | 6 | fsb/VPA | 1 | E_IBUF | 1 | NULL | 0 | 25 | 49152 +FBPIN | 7 | EXP14_ | 1 | NULL | 0 | NULL | 0 +FBPIN | 8 | EXP15_ | 1 | FCLK_IBUF | 0 | NULL | 0 | 27 | 57344 +FBPIN | 9 | nDTACK_FSB_OBUF | 1 | NULL | 0 | nDTACK_FSB | 1 | 28 | 49152 +FBPIN | 10 | EXP16_ | 1 | NULL | 0 | NULL | 0 +FBPIN | 11 | iobs/IORW1 | 1 | nWE_FSB_IBUF | 1 | NULL | 0 | 29 | 49152 +FBPIN | 12 | EXP17_ | 1 | nLDS_FSB_IBUF | 1 | NULL | 0 | 30 | 49152 +FBPIN | 13 | fsb/Ready1r | 1 | NULL | 0 | NULL | 0 +FBPIN | 14 | cs/nOverlay | 1 | nAS_FSB_IBUF | 1 | NULL | 0 | 32 | 49152 +FBPIN | 15 | EXP18_ | 1 | nUDS_FSB_IBUF | 1 | NULL | 0 | 33 | 49152 +FBPIN | 16 | IOREQ | 1 | NULL | 0 | NULL | 0 FBPIN | 17 | nROMWE_OBUF | 1 | NULL | 0 | nROMWE | 1 | 34 | 49152 -FBPIN | 18 | EXP23_ | 1 | NULL | 0 | NULL | 0 +FBPIN | 18 | iobs/Clear1 | 1 | NULL | 0 | NULL | 0 FB_INSTANCE | FOOBAR4_ | WarpSE_COPY_0_COPY_0 | 0 | 0 | 0 -FBPIN | 1 | EXP24_ | 1 | NULL | 0 | NULL | 0 +FBPIN | 1 | ram/RegUrgSync | 1 | NULL | 0 | NULL | 0 FBPIN | 2 | nAoutOE_OBUF | 1 | NULL | 0 | nAoutOE | 1 | 87 | 49152 -FBPIN | 3 | iobm/BERRrr | 1 | NULL | 0 | NULL | 0 -FBPIN | 4 | iobm/BERRrf | 1 | NULL | 0 | NULL | 0 +FBPIN | 3 | ram/BACTr | 1 | NULL | 0 | NULL | 0 +FBPIN | 4 | nRESout | 1 | NULL | 0 | NULL | 0 FBPIN | 5 | nDoutOE_OBUF | 1 | NULL | 0 | nDoutOE | 1 | 89 | 49152 FBPIN | 6 | nDinOE_OBUF | 1 | NULL | 0 | nDinOE | 1 | 90 | 49152 -FBPIN | 7 | cnt/PORS_FSM_FFd1 | 1 | NULL | 0 | NULL | 0 +FBPIN | 7 | fsb/ASrf | 1 | NULL | 0 | NULL | 0 FBPIN | 8 | N0 | 1 | N01 | 1 | nRES | 1 | 91 | 49152 -FBPIN | 9 | cnt/IPL2r | 1 | nIPL2_IBUF | 1 | NULL | 0 | 92 | 49152 -FBPIN | 10 | iobm/IOS_FSM_FFd1 | 1 | NULL | 0 | NULL | 0 +FBPIN | 9 | cnt/Er<1> | 1 | nIPL2_IBUF | 1 | NULL | 0 | 92 | 49152 +FBPIN | 10 | cnt/TimerTC | 1 | NULL | 0 | NULL | 0 FBPIN | 11 | nVPA_FSB_OBUF | 1 | NULL | 0 | nVPA_FSB | 1 | 93 | 49152 -FBPIN | 12 | cnt/nRESout | 1 | A_FSB_1_IBUF | 1 | NULL | 0 | 94 | 49152 -FBPIN | 13 | cnt/PORS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0 -FBPIN | 14 | cnt/LTimer<0> | 1 | A_FSB_2_IBUF | 1 | NULL | 0 | 95 | 49152 -FBPIN | 15 | cnt/LTimer<3> | 1 | A_FSB_3_IBUF | 1 | NULL | 0 | 96 | 49152 -FBPIN | 16 | cnt/LTimer<2> | 1 | NULL | 0 | NULL | 0 -FBPIN | 17 | cnt/LTimer<1> | 1 | A_FSB_4_IBUF | 1 | NULL | 0 | 97 | 49152 -FBPIN | 18 | iobm/IOBERR | 1 | NULL | 0 | NULL | 0 +FBPIN | 12 | cnt/LTimer<3> | 1 | A_FSB_1_IBUF | 1 | NULL | 0 | 94 | 49152 +FBPIN | 13 | cnt/LTimer<2> | 1 | NULL | 0 | NULL | 0 +FBPIN | 14 | cnt/LTimer<1> | 1 | A_FSB_2_IBUF | 1 | NULL | 0 | 95 | 49152 +FBPIN | 15 | RefReq | 1 | A_FSB_3_IBUF | 1 | NULL | 0 | 96 | 49152 +FBPIN | 16 | IOU0 | 1 | NULL | 0 | NULL | 0 +FBPIN | 17 | IOL0 | 1 | A_FSB_4_IBUF | 1 | NULL | 0 | 97 | 49152 +FBPIN | 18 | RefUrg | 1 | NULL | 0 | NULL | 0 FB_INSTANCE | FOOBAR5_ | WarpSE_COPY_0_COPY_0 | 0 | 0 | 0 -FBPIN | 1 | ram/RASEL | 1 | NULL | 0 | NULL | 0 +FBPIN | 1 | EXP19_ | 1 | NULL | 0 | NULL | 0 FBPIN | 2 | nROMCS_OBUF | 1 | NULL | 0 | nROMCS | 1 | 35 | 49152 -FBPIN | 3 | ram/RefDone | 1 | NULL | 0 | NULL | 0 -FBPIN | 4 | cs/nOverlay1 | 1 | NULL | 0 | NULL | 0 -FBPIN | 5 | ram/nCAS | 1 | NULL | 0 | nCAS | 1 | 36 | 49152 +FBPIN | 3 | iobs/Load1 | 1 | NULL | 0 | NULL | 0 +FBPIN | 4 | EXP20_ | 1 | NULL | 0 | NULL | 0 +FBPIN | 5 | nCAS_OBUF | 1 | NULL | 0 | nCAS | 1 | 36 | 49152 FBPIN | 6 | nOE_OBUF | 1 | NULL | 0 | nOE | 1 | 37 | 49152 -FBPIN | 7 | fsb/Ready0r | 1 | NULL | 0 | NULL | 0 -FBPIN | 8 | cs/nOverlay0 | 1 | NULL | 0 | NULL | 0 | 39 | 49152 +FBPIN | 7 | iobs/PS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0 +FBPIN | 8 | ram/RS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0 | 39 | 49152 FBPIN | 9 | RA_4_OBUF | 1 | NULL | 0 | RA<4> | 1 | 40 | 49152 -FBPIN | 10 | ram/RAMEN | 1 | NULL | 0 | NULL | 0 +FBPIN | 10 | iobs/PS_FSM_FFd1 | 1 | NULL | 0 | NULL | 0 FBPIN | 11 | RA_3_OBUF | 1 | NULL | 0 | RA<3> | 1 | 41 | 49152 FBPIN | 12 | RA_5_OBUF | 1 | NULL | 0 | RA<5> | 1 | 42 | 49152 -FBPIN | 13 | ram/RS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0 FBPIN | 14 | RA_2_OBUF | 1 | NULL | 0 | RA<2> | 1 | 43 | 49152 FBPIN | 15 | RA_6_OBUF | 1 | NULL | 0 | RA<6> | 1 | 46 | 49152 -FBPIN | 16 | EXP25_ | 1 | NULL | 0 | NULL | 0 -FBPIN | 17 | ram/RAMReady | 1 | NULL | 0 | NULL | 0 | 49 | 49152 -FBPIN | 18 | EXP26_ | 1 | NULL | 0 | NULL | 0 +FBPIN | 16 | iobs/IOReady | 1 | NULL | 0 | NULL | 0 +FBPIN | 17 | iobs/Once | 1 | NULL | 0 | NULL | 0 | 49 | 49152 +FBPIN | 18 | EXP21_ | 1 | NULL | 0 | NULL | 0 FB_INSTANCE | FOOBAR6_ | WarpSE_COPY_0_COPY_0 | 0 | 0 | 0 FBPIN | 1 | iobm/ETACK | 1 | NULL | 0 | NULL | 0 -FBPIN | 2 | iobm/nVMA | 1 | NULL | 0 | nVMA_IOB | 1 | 74 | 49152 -FBPIN | 3 | iobm/DoutOE | 1 | NULL | 0 | NULL | 0 -FBPIN | 4 | iobm/ALE0 | 1 | NULL | 0 | NULL | 0 -FBPIN | 5 | iobm/IOS_FSM_FFd3 | 1 | nBERR_IOB_IBUF | 1 | NULL | 0 | 76 | 49152 -FBPIN | 6 | iobm/ES<3> | 1 | nVPA_IOB_IBUF | 1 | NULL | 0 | 77 | 49152 -FBPIN | 7 | iobm/ES<1> | 1 | NULL | 0 | NULL | 0 -FBPIN | 8 | iobm/ES<0> | 1 | nDTACK_IOB_IBUF | 1 | NULL | 0 | 78 | 49152 -FBPIN | 9 | iobm/nLDS | 1 | NULL | 0 | nLDS_IOB | 1 | 79 | 49152 -FBPIN | 10 | iobm/ES<4> | 1 | NULL | 0 | NULL | 0 -FBPIN | 11 | iobm/nUDS | 1 | NULL | 0 | nUDS_IOB | 1 | 80 | 49152 -FBPIN | 12 | iobm/nASout | 1 | NULL | 0 | nAS_IOB | 1 | 81 | 49152 -FBPIN | 13 | iobm/IOS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0 +FBPIN | 2 | nVMA_IOBout | 1 | NULL | 0 | nVMA_IOB | 1 | 74 | 49152 +FBPIN | 3 | iobm/IOS_FSM_FFd3 | 1 | NULL | 0 | NULL | 0 +FBPIN | 4 | iobm/ES<3> | 1 | NULL | 0 | NULL | 0 +FBPIN | 5 | iobm/ES<1> | 1 | nBERR_IOB_IBUF | 1 | NULL | 0 | 76 | 49152 +FBPIN | 6 | iobm/ES<0> | 1 | nVPA_IOB_IBUF | 1 | NULL | 0 | 77 | 49152 +FBPIN | 7 | iobm/DoutOE | 1 | NULL | 0 | NULL | 0 +FBPIN | 8 | iobm/ES<4> | 1 | nDTACK_IOB_IBUF | 1 | NULL | 0 | 78 | 49152 +FBPIN | 9 | nLDS_IOBout | 1 | NULL | 0 | nLDS_IOB | 1 | 79 | 49152 +FBPIN | 10 | iobm/IOS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0 +FBPIN | 11 | nUDS_IOBout | 1 | NULL | 0 | nUDS_IOB | 1 | 80 | 49152 +FBPIN | 12 | nAS_IOBout | 1 | NULL | 0 | nAS_IOB | 1 | 81 | 49152 +FBPIN | 13 | iobm/ES<2> | 1 | NULL | 0 | NULL | 0 FBPIN | 14 | nADoutLE1_OBUF | 1 | NULL | 0 | nADoutLE1 | 1 | 82 | 49152 FBPIN | 15 | nADoutLE0_OBUF | 1 | NULL | 0 | nADoutLE0 | 1 | 85 | 49152 -FBPIN | 16 | iobm/ES<2> | 1 | NULL | 0 | NULL | 0 -FBPIN | 17 | iobm/nDinLE | 1 | NULL | 0 | nDinLE | 1 | 86 | 49152 -FBPIN | 18 | iobm/IOACT | 1 | NULL | 0 | NULL | 0 +FBPIN | 16 | IOACT | 1 | NULL | 0 | NULL | 0 +FBPIN | 17 | nDinLE_OBUF | 1 | NULL | 0 | nDinLE | 1 | 86 | 49152 +FBPIN | 18 | IOBERR | 1 | NULL | 0 | NULL | 0 FB_INSTANCE | FOOBAR7_ | WarpSE_COPY_0_COPY_0 | 0 | 0 | 0 -FBPIN | 1 | cnt/LTimer<13> | 1 | NULL | 0 | NULL | 0 +FBPIN | 1 | cnt/LTimerTC | 1 | NULL | 0 | NULL | 0 FBPIN | 2 | RA_1_OBUF | 1 | NULL | 0 | RA<1> | 1 | 50 | 49152 FBPIN | 3 | cnt/LTimer<9> | 1 | NULL | 0 | NULL | 0 FBPIN | 4 | cnt/LTimer<8> | 1 | NULL | 0 | NULL | 0 @@ -7857,33 +7687,33 @@ FBPIN | 8 | RA_8_OBUF | 1 | NULL | 0 | RA<8> | 1 | 54 | 49152 FBPIN | 9 | A_FSB_21_IBUF$BUF0 | 1 | NULL | 0 | RA<10> | 1 | 55 | 49152 FBPIN | 10 | cnt/LTimer<6> | 1 | NULL | 0 | NULL | 0 FBPIN | 11 | RA_9_OBUF | 1 | NULL | 0 | RA<9> | 1 | 56 | 49152 -FBPIN | 12 | N1 | 1 | NULL | 0 | C25MEN | 1 | 58 | 49152 +FBPIN | 12 | C25MEN_OBUF | 1 | NULL | 0 | C25MEN | 1 | 58 | 49152 FBPIN | 13 | cnt/LTimer<5> | 1 | NULL | 0 | NULL | 0 -FBPIN | 14 | N1$BUF0 | 1 | NULL | 0 | C20MEN | 1 | 59 | 49152 +FBPIN | 14 | C25MEN_OBUF$BUF0 | 1 | NULL | 0 | C20MEN | 1 | 59 | 49152 FBPIN | 15 | cnt/LTimer<4> | 1 | NULL | 0 | NULL | 0 | 60 | 49152 FBPIN | 16 | cnt/LTimer<12> | 1 | NULL | 0 | NULL | 0 FBPIN | 17 | cnt/LTimer<11> | 1 | NULL | 0 | NULL | 0 | 61 | 49152 FBPIN | 18 | cnt/LTimer<10> | 1 | NULL | 0 | NULL | 0 FB_INSTANCE | FOOBAR8_ | WarpSE_COPY_0_COPY_0 | 0 | 0 | 0 -FBPIN | 1 | iobs/Once | 1 | NULL | 0 | NULL | 0 +FBPIN | 1 | ram/RASEL | 1 | NULL | 0 | NULL | 0 FBPIN | 2 | A_FSB_19_IBUF$BUF0 | 1 | NULL | 0 | RA<11> | 1 | 63 | 49152 -FBPIN | 3 | iobs/Clear1 | 1 | NULL | 0 | NULL | 0 -FBPIN | 4 | iobs/ALE0 | 1 | NULL | 0 | NULL | 0 +FBPIN | 3 | cnt/Timer<2> | 1 | NULL | 0 | NULL | 0 +FBPIN | 4 | cnt/Timer<0> | 1 | NULL | 0 | NULL | 0 FBPIN | 5 | nRAS_OBUF | 1 | NULL | 0 | nRAS | 1 | 64 | 49152 FBPIN | 6 | nRAMLWE_OBUF | 1 | NULL | 0 | nRAMLWE | 1 | 65 | 49152 -FBPIN | 7 | iobs/PS_FSM_FFd1 | 1 | NULL | 0 | NULL | 0 +FBPIN | 7 | cnt/INITS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0 FBPIN | 8 | nRAMUWE_OBUF | 1 | NULL | 0 | nRAMUWE | 1 | 66 | 49152 -FBPIN | 9 | ram/RS_FSM_FFd1 | 1 | NULL | 0 | NULL | 0 | 67 | 49152 -FBPIN | 10 | EXP27_ | 1 | NULL | 0 | NULL | 0 -FBPIN | 11 | ram/RS_FSM_FFd3 | 1 | NULL | 0 | NULL | 0 | 68 | 49152 -FBPIN | 12 | iobs/nBERR_FSB | 1 | NULL | 0 | nBERR_FSB | 1 | 70 | 49152 -FBPIN | 13 | EXP28_ | 1 | NULL | 0 | NULL | 0 -FBPIN | 14 | iobs/PS_FSM_FFd2 | 1 | NULL | 0 | NULL | 0 | 71 | 49152 -FBPIN | 15 | cnt/nBR_IOB | 1 | NULL | 0 | nBR_IOB | 1 | 72 | 49152 -FBPIN | 16 | iobs/Load1 | 1 | NULL | 0 | NULL | 0 -FBPIN | 17 | ram/BACTr | 1 | NULL | 0 | NULL | 0 | 73 | 49152 -FBPIN | 18 | EXP29_ | 1 | NULL | 0 | NULL | 0 +FBPIN | 9 | fsb/Ready0r | 1 | NULL | 0 | NULL | 0 | 67 | 49152 +FBPIN | 10 | cnt/Timer<1> | 1 | NULL | 0 | NULL | 0 +FBPIN | 11 | ram/RAMReady | 1 | NULL | 0 | NULL | 0 | 68 | 49152 +FBPIN | 12 | nBERR_FSB_OBUF | 1 | NULL | 0 | nBERR_FSB | 1 | 70 | 49152 +FBPIN | 13 | EXP22_ | 1 | NULL | 0 | NULL | 0 +FBPIN | 14 | ram/RAMEN | 1 | NULL | 0 | NULL | 0 | 71 | 49152 +FBPIN | 15 | nBR_IOB_OBUF | 1 | NULL | 0 | nBR_IOB | 1 | 72 | 49152 +FBPIN | 16 | ram/RS_FSM_FFd3 | 1 | NULL | 0 | NULL | 0 +FBPIN | 17 | cnt/INITS_FSM_FFd1 | 1 | NULL | 0 | NULL | 0 | 73 | 49152 +FBPIN | 18 | cnt/LTimer<0> | 1 | NULL | 0 | NULL | 0 FB_INSTANCE | INPUTPINS_FOOBAR9_ | WarpSE_COPY_0_COPY_0 | 0 | 0 | 0 @@ -7891,91 +7721,84 @@ BUSINFO | A_FSB<23:1> | 23 | 0 | 0 | A_FSB<10> | 13 | A_FSB<11> | 12 | A_FSB<12> BUSINFO | RA<11:0> | 12 | 0 | 1 | RA<0> | 11 | RA<10> | 1 | RA<11> | 0 | RA<1> | 10 | RA<2> | 9 | RA<3> | 8 | RA<4> | 7 | RA<5> | 6 | RA<6> | 5 | RA<7> | 4 | RA<8> | 3 | RA<9> | 2 BUSINFO | SW<3:1> | 3 | 0 | 0 | SW<1> | 2 | SW<2> | 1 | SW<3> | 0 -FB_ORDER_OF_INPUTS | FOOBAR1_ | 0 | ram/RegUrgentSync | NULL | 2 | ram/RefDone | NULL | 5 | iobs/IOACTr | NULL | 7 | iobs/IOU1 | NULL | 8 | iobs/IOL1 | NULL -FB_ORDER_OF_INPUTS | FOOBAR1_ | 9 | cnt/TimerTC | NULL | 12 | nUDS_FSB | 33 | 13 | cnt/Timer<2> | NULL | 14 | cnt/Timer<1> | NULL | 15 | cnt/RefUrgent | NULL -FB_ORDER_OF_INPUTS | FOOBAR1_ | 16 | E | 25 | 17 | cnt/RefReq | NULL | 20 | iobs/Once | NULL | 25 | iobs/PS_FSM_FFd2 | NULL | 27 | ram/RefReqSync | NULL -FB_ORDER_OF_INPUTS | FOOBAR1_ | 29 | nLDS_FSB | 30 | 30 | iobs/Load1 | NULL | 36 | nAS_FSB | 32 | 37 | ram/RS_FSM_FFd2 | NULL | 40 | cnt/Timer<0> | NULL -FB_ORDER_OF_INPUTS | FOOBAR1_ | 41 | ram/RS_FSM_FFd1 | NULL | 43 | fsb/ASrf | NULL | 45 | iobs/IOReady | NULL | 47 | iobm/IOBERR | NULL | 49 | iobs/ALE1 | NULL -FB_ORDER_OF_INPUTS | FOOBAR1_ | 51 | iobs/PS_FSM_FFd1 | NULL | 52 | cnt/Timer<3> | NULL | 53 | iobm/IOACT | NULL +FB_ORDER_OF_INPUTS | FOOBAR1_ | 0 | ram/RegUrgSync | NULL | 1 | ram/RefReqSync | NULL | 2 | iobm/IOS_FSM_FFd3 | NULL | 6 | iobs/PS_FSM_FFd2 | NULL | 7 | ram/RS_FSM_FFd2 | NULL +FB_ORDER_OF_INPUTS | FOOBAR1_ | 9 | iobs/PS_FSM_FFd1 | NULL | 12 | ram/RS_FSM_FFd1 | NULL | 14 | RefReq | NULL | 15 | IOACT | NULL | 16 | iobm/IOREQr | NULL +FB_ORDER_OF_INPUTS | FOOBAR1_ | 17 | ram/RefDone | NULL | 23 | nBERR_IOB | 76 | 27 | nUDS_FSB | 33 | 29 | nLDS_FSB | 30 | 30 | ram/RS_FSM_FFd3 | NULL +FB_ORDER_OF_INPUTS | FOOBAR1_ | 39 | iobs/Load1 | NULL | 43 | nDTACK_IOB | 78 | 47 | iobm/IOS_FSM_FFd2 | NULL | 49 | nIPL2 | 92 | 50 | iobm/IOS_FSM_FFd1 | NULL +FB_ORDER_OF_INPUTS | FOOBAR1_ | 52 | E | 25 -FB_IMUX_INDEX | FOOBAR1_ | 0 | -1 | 74 | -1 | -1 | 5 | -1 | 7 | 8 | 9 | -1 | -1 | 272 | 13 | 14 | 15 | 242 | 17 | -1 | -1 | 126 | -1 | -1 | -1 | -1 | 139 | -1 | 2 | -1 | 260 | 141 | -1 | -1 | -1 | -1 | -1 | 268 | 84 | -1 | -1 | 35 | 134 | -1 | 6 | -1 | 16 | -1 | 71 | -1 | 103 | -1 | 132 | 12 | 107 +FB_IMUX_INDEX | FOOBAR1_ | 54 | 1 | 92 | -1 | -1 | -1 | 78 | 79 | -1 | 81 | -1 | -1 | 12 | -1 | 68 | 105 | 34 | 17 | -1 | -1 | -1 | -1 | -1 | 175 | -1 | -1 | -1 | 272 | -1 | 260 | 141 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 74 | -1 | -1 | -1 | 167 | -1 | -1 | -1 | 99 | -1 | 150 | 15 | -1 | 242 | -1 -FB_ORDER_OF_INPUTS | FOOBAR2_ | 4 | nRES | 91 | 6 | iobs/IOREQ | NULL | 7 | nDTACK_IOB | 78 | 11 | nVPA_IOB | 77 | 17 | cnt/Timer<0> | NULL -FB_ORDER_OF_INPUTS | FOOBAR2_ | 37 | iobm/Er | NULL | 51 | cnt/TimerTC | NULL | 52 | E | 25 +FB_ORDER_OF_INPUTS | FOOBAR2_ | 4 | nRES | 91 | 11 | nVPA_IOB | 77 | 15 | IOREQ | NULL | 36 | iobm/Er | NULL -FB_IMUX_INDEX | FOOBAR2_ | -1 | -1 | -1 | -1 | 148 | -1 | 42 | 167 | -1 | -1 | -1 | 171 | -1 | -1 | -1 | -1 | -1 | 35 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 32 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 9 | 242 | -1 +FB_IMUX_INDEX | FOOBAR2_ | -1 | -1 | -1 | -1 | 148 | -1 | -1 | -1 | -1 | -1 | -1 | 171 | -1 | -1 | -1 | 51 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 4 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 -FB_ORDER_OF_INPUTS | FOOBAR3_ | 0 | iobs/Once | NULL | 1 | A_FSB<14> | 12 | 2 | A_FSB<8> | 6 | 3 | cs/nOverlay1 | NULL | 4 | A_FSB<9> | 7 -FB_ORDER_OF_INPUTS | FOOBAR3_ | 5 | iobs/IOACTr | NULL | 6 | fsb/ASrf | NULL | 7 | A_FSB<17> | 15 | 8 | fsb/nDTACK.UIM | NULL | 9 | fsb/Ready1r | NULL -FB_ORDER_OF_INPUTS | FOOBAR3_ | 10 | A_FSB<11> | 9 | 11 | iobs/IORW1 | NULL | 13 | iobs/ALE1 | NULL | 14 | iobs/IORW0 | NULL | 16 | iobs/IOReady | NULL -FB_ORDER_OF_INPUTS | FOOBAR3_ | 21 | A_FSB<19> | 17 | 23 | A_FSB<23> | 24 | 28 | nWE_FSB | 29 | 30 | A_FSB<20> | 18 | 31 | A_FSB<10> | 8 -FB_ORDER_OF_INPUTS | FOOBAR3_ | 33 | nAS_FSB | 32 | 37 | A_FSB<13> | 11 | 39 | A_FSB<22> | 20 | 42 | A_FSB<12> | 10 | 43 | iobs/PS_FSM_FFd2 | NULL -FB_ORDER_OF_INPUTS | FOOBAR3_ | 44 | fsb/VPA | NULL | 45 | A_FSB<18> | 16 | 46 | A_FSB<15> | 13 | 47 | A_FSB<21> | 19 | 49 | ram/RAMReady | NULL -FB_ORDER_OF_INPUTS | FOOBAR3_ | 50 | fsb/Ready0r | NULL | 51 | iobs/PS_FSM_FFd1 | NULL | 53 | A_FSB<16> | 14 +FB_ORDER_OF_INPUTS | FOOBAR3_ | 0 | IORW0 | NULL | 1 | A_FSB<14> | 12 | 2 | A_FSB<21> | 19 | 3 | A_FSB<15> | 13 | 4 | A_FSB<9> | 7 +FB_ORDER_OF_INPUTS | FOOBAR3_ | 5 | fsb/VPA | NULL | 6 | iobs/PS_FSM_FFd2 | NULL | 7 | A_FSB<17> | 15 | 8 | nDTACK_FSB_OBUF.UIM | NULL | 9 | iobs/PS_FSM_FFd1 | NULL +FB_ORDER_OF_INPUTS | FOOBAR3_ | 10 | iobs/IORW1 | NULL | 12 | fsb/Ready1r | NULL | 13 | ALE1 | NULL | 14 | A_FSB<12> | 10 | 15 | iobs/IOReady | NULL +FB_ORDER_OF_INPUTS | FOOBAR3_ | 16 | A_FSB<13> | 11 | 20 | A_FSB<16> | 14 | 21 | A_FSB<19> | 17 | 23 | A_FSB<23> | 24 | 26 | cs/nOverlay | NULL +FB_ORDER_OF_INPUTS | FOOBAR3_ | 28 | nWE_FSB | 29 | 30 | A_FSB<20> | 18 | 35 | fsb/ASrf | NULL | 36 | nAS_FSB | 32 | 39 | A_FSB<22> | 20 +FB_ORDER_OF_INPUTS | FOOBAR3_ | 40 | A_FSB<8> | 6 | 43 | A_FSB<10> | 8 | 45 | A_FSB<18> | 16 | 47 | iobs/IOACTr | NULL | 49 | iobs/Once | NULL +FB_ORDER_OF_INPUTS | FOOBAR3_ | 50 | ram/RAMReady | NULL | 51 | nRES | 91 | 52 | A_FSB<11> | 9 | 53 | fsb/Ready0r | NULL -FB_IMUX_INDEX | FOOBAR3_ | 126 | 210 | 194 | 75 | 196 | 5 | 6 | 216 | 44 | 45 | 202 | 47 | -1 | 103 | 50 | -1 | 16 | -1 | -1 | -1 | -1 | 222 | -1 | 240 | -1 | -1 | -1 | -1 | 256 | -1 | 226 | 198 | -1 | 268 | -1 | -1 | -1 | 208 | -1 | 230 | -1 | -1 | 206 | 139 | 36 | 218 | 212 | 228 | -1 | 88 | 78 | 132 | -1 | 214 +FB_IMUX_INDEX | FOOBAR3_ | 36 | 210 | 228 | 212 | 196 | 41 | 78 | 216 | 44 | 81 | 46 | -1 | 48 | 103 | 206 | 87 | 208 | -1 | -1 | -1 | 214 | 222 | -1 | 240 | -1 | -1 | 49 | -1 | 256 | -1 | 226 | -1 | -1 | -1 | -1 | 60 | 268 | -1 | -1 | 230 | 194 | -1 | -1 | 198 | -1 | 218 | -1 | 3 | -1 | 88 | 136 | 148 | 202 | 134 -FB_ORDER_OF_INPUTS | FOOBAR4_ | 0 | fsb/VPA | NULL | 1 | cnt/AoutOE | NULL | 2 | iobm/BERRrr | NULL | 3 | iobm/BERRrf | NULL | 4 | iobm/IOS_FSM_FFd3 | NULL -FB_ORDER_OF_INPUTS | FOOBAR4_ | 6 | cnt/PORS_FSM_FFd1 | NULL | 8 | cnt/IPL2r | NULL | 9 | cnt/TimerTC | NULL | 10 | iobm/RESrr | NULL | 11 | iobm/RESrf | NULL -FB_ORDER_OF_INPUTS | FOOBAR4_ | 12 | cnt/PORS_FSM_FFd2 | NULL | 13 | cnt/LTimer<0> | NULL | 14 | cnt/LTimer<3> | NULL | 15 | iobm/DTACKrr | NULL | 16 | iobm/DTACKrf | NULL -FB_ORDER_OF_INPUTS | FOOBAR4_ | 17 | iobm/IOBERR | NULL | 23 | A_FSB<23> | 24 | 24 | iobm/ETACK | NULL | 28 | nWE_FSB | 29 | 30 | A_FSB<20> | 18 -FB_ORDER_OF_INPUTS | FOOBAR4_ | 33 | nAS_FSB | 32 | 36 | iobm/IOS_FSM_FFd1 | NULL | 37 | cnt/LTimer<1> | NULL | 39 | A_FSB<22> | 20 | 42 | cnt/nBR_IOB | NULL -FB_ORDER_OF_INPUTS | FOOBAR4_ | 43 | iobm/IOS_FSM_FFd2 | NULL | 45 | A_FSB<21> | 19 | 46 | nBERR_IOB | 76 | 47 | cnt/LTimer<13> | NULL | 48 | C8M | 23 -FB_ORDER_OF_INPUTS | FOOBAR4_ | 49 | nIPL2 | 92 | 50 | cnt/LTimer<2> | NULL | 51 | iobm/DoutOE | NULL | 53 | cnt/nRESout | NULL +FB_ORDER_OF_INPUTS | FOOBAR4_ | 0 | A_FSB<20> | 18 | 2 | cnt/Timer<2> | NULL | 3 | nRESout | NULL | 6 | iobs/PS_FSM_FFd2 | NULL | 8 | cnt/Er<1> | NULL +FB_ORDER_OF_INPUTS | FOOBAR4_ | 9 | cnt/TimerTC | NULL | 10 | cnt/Er<0> | NULL | 12 | cnt/LTimer<2> | NULL | 13 | iobs/IOU1 | NULL | 14 | iobs/IOL1 | NULL +FB_ORDER_OF_INPUTS | FOOBAR4_ | 16 | cnt/INITS_FSM_FFd1 | NULL | 17 | RefUrg | NULL | 18 | cnt/INITS_FSM_FFd2 | NULL | 21 | cnt/LTimer<0> | NULL | 23 | A_FSB<23> | 24 +FB_ORDER_OF_INPUTS | FOOBAR4_ | 27 | nUDS_FSB | 33 | 28 | nWE_FSB | 29 | 29 | nLDS_FSB | 30 | 30 | iobs/PS_FSM_FFd1 | NULL | 32 | iobm/DoutOE | NULL +FB_ORDER_OF_INPUTS | FOOBAR4_ | 34 | cnt/Timer<0> | NULL | 35 | fsb/ASrf | NULL | 36 | nAS_FSB | 32 | 37 | fsb/VPA | NULL | 39 | A_FSB<22> | 20 +FB_ORDER_OF_INPUTS | FOOBAR4_ | 40 | cnt/Timer<1> | NULL | 42 | nBR_IOB_OBUF | NULL | 45 | cnt/LTimer<1> | NULL | 47 | A_FSB<21> | 19 | 49 | ALE1 | NULL +FB_ORDER_OF_INPUTS | FOOBAR4_ | 51 | AoutOE | NULL -FB_IMUX_INDEX | FOOBAR4_ | 36 | 55 | 56 | 57 | 94 | -1 | 60 | -1 | 62 | 9 | 28 | 29 | 66 | 67 | 68 | 33 | 34 | 71 | -1 | -1 | -1 | -1 | -1 | 240 | 90 | -1 | -1 | -1 | 256 | -1 | 226 | -1 | -1 | 268 | -1 | -1 | 63 | 70 | -1 | 230 | -1 | -1 | 140 | 102 | -1 | 228 | 175 | 108 | 238 | 150 | 69 | 92 | -1 | 65 +FB_IMUX_INDEX | FOOBAR4_ | 226 | -1 | 128 | 57 | -1 | -1 | 78 | -1 | 62 | 63 | 10 | -1 | 66 | 13 | 14 | -1 | 142 | 71 | 132 | -1 | -1 | 143 | -1 | 240 | -1 | -1 | -1 | 272 | 256 | 260 | 81 | -1 | 96 | -1 | 129 | 60 | 268 | 41 | -1 | 230 | 135 | -1 | 140 | -1 | -1 | 67 | -1 | 228 | -1 | 103 | -1 | 55 | -1 | -1 -FB_ORDER_OF_INPUTS | FOOBAR5_ | 0 | ram/RASEL | NULL | 2 | ram/RefReqSync | NULL | 3 | ram/RefReq | NULL | 4 | nRES | 91 | 5 | A_FSB<16> | 14 -FB_ORDER_OF_INPUTS | FOOBAR5_ | 6 | fsb/ASrf | NULL | 7 | cs/nOverlay0 | NULL | 8 | A_FSB<3> | 96 | 10 | ram/RS_FSM_FFd3 | NULL | 12 | A_FSB<4> | 97 -FB_ORDER_OF_INPUTS | FOOBAR5_ | 13 | nWE_FSB | 29 | 14 | A_FSB<7> | 4 | 16 | ram/RAMReady | NULL | 19 | A_FSB<20> | 18 | 22 | ram/RefUrgent | NULL -FB_ORDER_OF_INPUTS | FOOBAR5_ | 23 | A_FSB<23> | 24 | 24 | A_FSB<22> | 20 | 30 | ram/RAMEN | NULL | 33 | A_FSB<6> | 3 | 34 | A_FSB<5> | 2 -FB_ORDER_OF_INPUTS | FOOBAR5_ | 35 | A_FSB<14> | 12 | 36 | nAS_FSB | 32 | 37 | ram/RS_FSM_FFd2 | NULL | 39 | ram/RefDone | NULL | 42 | A_FSB<12> | 10 -FB_ORDER_OF_INPUTS | FOOBAR5_ | 44 | A_FSB<13> | 11 | 45 | A_FSB<21> | 19 | 46 | A_FSB<15> | 13 | 47 | ram/BACTr | NULL | 50 | fsb/Ready0r | NULL -FB_ORDER_OF_INPUTS | FOOBAR5_ | 52 | cs/nOverlay1 | NULL | 53 | ram/RS_FSM_FFd1 | NULL +FB_ORDER_OF_INPUTS | FOOBAR5_ | 0 | ram/RASEL | NULL | 1 | A_FSB<14> | 12 | 3 | iobs/IOACTr | NULL | 4 | A_FSB<22> | 20 | 5 | A_FSB<16> | 14 +FB_ORDER_OF_INPUTS | FOOBAR5_ | 6 | fsb/ASrf | NULL | 7 | A_FSB<17> | 15 | 8 | A_FSB<3> | 96 | 9 | A_FSB<18> | 16 | 10 | A_FSB<6> | 3 +FB_ORDER_OF_INPUTS | FOOBAR5_ | 12 | A_FSB<4> | 97 | 13 | cs/nOverlay | NULL | 14 | A_FSB<7> | 4 | 15 | ram/RS_FSM_FFd3 | NULL | 16 | iobs/Once | NULL +FB_ORDER_OF_INPUTS | FOOBAR5_ | 19 | A_FSB<20> | 18 | 21 | A_FSB<19> | 17 | 22 | A_FSB<12> | 10 | 23 | A_FSB<23> | 24 | 25 | ram/RAMEN | NULL +FB_ORDER_OF_INPUTS | FOOBAR5_ | 28 | nWE_FSB | 29 | 30 | iobs/PS_FSM_FFd1 | NULL | 36 | nAS_FSB | 32 | 39 | A_FSB<5> | 2 | 42 | ram/RefUrg | NULL +FB_ORDER_OF_INPUTS | FOOBAR5_ | 43 | iobs/IOReady | NULL | 44 | A_FSB<13> | 11 | 46 | A_FSB<15> | 13 | 47 | A_FSB<21> | 19 | 48 | ram/RS_FSM_FFd2 | NULL +FB_ORDER_OF_INPUTS | FOOBAR5_ | 49 | ALE1 | NULL | 50 | iobs/PS_FSM_FFd2 | NULL | 52 | ram/RS_FSM_FFd1 | NULL | 53 | IOBERR | NULL -FB_IMUX_INDEX | FOOBAR5_ | 72 | -1 | 2 | 3 | 148 | 214 | 6 | 79 | 168 | -1 | 136 | -1 | 172 | 256 | 190 | -1 | 88 | -1 | -1 | 226 | -1 | -1 | 1 | 240 | 230 | -1 | -1 | -1 | -1 | -1 | 81 | -1 | -1 | 186 | 182 | 210 | 268 | 84 | -1 | 74 | -1 | -1 | 206 | -1 | 208 | 228 | 212 | 142 | -1 | -1 | 78 | -1 | 75 | 134 +FB_IMUX_INDEX | FOOBAR5_ | 126 | 210 | -1 | 3 | 230 | 214 | 60 | 216 | 168 | 218 | 186 | -1 | 172 | 49 | 190 | 141 | 88 | -1 | -1 | 226 | -1 | 222 | 206 | 240 | -1 | 139 | -1 | -1 | 256 | -1 | 81 | -1 | -1 | -1 | -1 | -1 | 268 | -1 | -1 | 182 | -1 | -1 | 0 | 87 | 208 | -1 | 212 | 228 | 79 | 103 | 78 | -1 | 12 | 107 -FB_ORDER_OF_INPUTS | FOOBAR6_ | 0 | iobm/ETACK | NULL | 1 | iobm/nVMA | NULL | 2 | iobs/Clear1 | NULL | 3 | iobm/BERRrf | NULL | 4 | iobm/IOS_FSM_FFd3 | NULL -FB_ORDER_OF_INPUTS | FOOBAR6_ | 5 | iobm/ES<3> | NULL | 6 | iobm/ES<1> | NULL | 7 | iobm/ES<0> | NULL | 8 | iobm/VPArr | NULL | 9 | iobm/VPArf | NULL -FB_ORDER_OF_INPUTS | FOOBAR6_ | 10 | iobs/IOU0 | NULL | 11 | iobs/IOL0 | NULL | 12 | iobm/IOREQr | NULL | 13 | iobm/Er2 | NULL | 14 | iobm/Er | NULL -FB_ORDER_OF_INPUTS | FOOBAR6_ | 15 | iobm/ES<2> | NULL | 17 | iobm/IOACT | NULL | 20 | iobm/ALE0 | NULL | 28 | iobm/RESrr | NULL | 29 | iobm/IOS_FSM_FFd2 | NULL -FB_ORDER_OF_INPUTS | FOOBAR6_ | 30 | iobs/Load1 | NULL | 33 | iobm/BERRrr | NULL | 36 | iobm/IOS_FSM_FFd1 | NULL | 42 | iobs/IORW0 | NULL | 43 | iobm/RESrf | NULL -FB_ORDER_OF_INPUTS | FOOBAR6_ | 45 | iobs/ALE0 | NULL | 46 | iobm/DTACKrf | NULL | 47 | iobm/ES<4> | NULL | 48 | C8M | 23 | 49 | iobs/ALE1 | NULL -FB_ORDER_OF_INPUTS | FOOBAR6_ | 51 | cnt/AoutOE | NULL | 52 | iobm/DTACKrr | NULL +FB_ORDER_OF_INPUTS | FOOBAR6_ | 0 | iobm/ETACK | NULL | 1 | AoutOE | NULL | 2 | iobs/Load1 | NULL | 3 | iobm/ES<3> | NULL | 4 | iobm/Er | NULL +FB_ORDER_OF_INPUTS | FOOBAR6_ | 5 | iobm/DTACKrr | NULL | 6 | iobm/DTACKrf | NULL | 7 | iobm/BERRrr | NULL | 8 | iobm/BERRrf | NULL | 9 | iobm/IOS_FSM_FFd2 | NULL +FB_ORDER_OF_INPUTS | FOOBAR6_ | 11 | ALE0S | NULL | 12 | iobm/VPArr | NULL | 13 | iobm/VPArf | NULL | 14 | iobm/RESrr | NULL | 15 | iobm/IOS_FSM_FFd1 | NULL +FB_ORDER_OF_INPUTS | FOOBAR6_ | 16 | ALE0M | NULL | 17 | iobm/Er2 | NULL | 22 | nVMA_IOBout | NULL | 23 | nBERR_IOB | 76 | 28 | iobm/ES<1> | NULL +FB_ORDER_OF_INPUTS | FOOBAR6_ | 29 | iobm/ES<2> | NULL | 37 | IOL0 | NULL | 38 | IOACT | NULL | 39 | iobm/ES<0> | NULL | 42 | iobm/ES<4> | NULL +FB_ORDER_OF_INPUTS | FOOBAR6_ | 43 | IOU0 | NULL | 44 | IORW0 | NULL | 46 | iobm/IOREQr | NULL | 48 | C8M | 23 | 49 | ALE1 | NULL +FB_ORDER_OF_INPUTS | FOOBAR6_ | 50 | iobs/Clear1 | NULL | 51 | iobm/IOS_FSM_FFd3 | NULL | 52 | iobm/RESrf | NULL | 53 | IOBERR | NULL -FB_IMUX_INDEX | FOOBAR6_ | 90 | 91 | 128 | 57 | 94 | 95 | 96 | 97 | 26 | 27 | 10 | 11 | 30 | 31 | 32 | 105 | -1 | 107 | -1 | -1 | 93 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 28 | 102 | 141 | -1 | -1 | 56 | -1 | -1 | 63 | -1 | -1 | -1 | -1 | -1 | 50 | 29 | -1 | 129 | 34 | 99 | 238 | 103 | -1 | 55 | 33 | -1 +FB_IMUX_INDEX | FOOBAR6_ | 90 | 55 | 74 | 93 | 4 | 5 | 6 | 7 | 8 | 99 | -1 | 11 | 30 | 31 | 32 | 15 | 16 | 35 | -1 | -1 | -1 | -1 | 91 | 175 | -1 | -1 | -1 | -1 | 94 | 102 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 70 | 105 | 95 | -1 | -1 | 97 | 69 | 36 | -1 | 34 | -1 | 238 | 103 | 53 | 92 | 33 | 107 -FB_ORDER_OF_INPUTS | FOOBAR7_ | 0 | cnt/LTimer<13> | NULL | 2 | A_FSB<21> | 19 | 3 | cs/nOverlay1 | NULL | 4 | A_FSB<2> | 95 | 6 | cnt/LTimer<7> | NULL -FB_ORDER_OF_INPUTS | FOOBAR7_ | 7 | A_FSB<17> | 15 | 9 | cnt/LTimer<6> | NULL | 12 | cnt/LTimer<5> | NULL | 13 | A_FSB<19> | 17 | 14 | cnt/LTimer<4> | NULL -FB_ORDER_OF_INPUTS | FOOBAR7_ | 15 | cnt/LTimer<2> | NULL | 16 | cnt/LTimer<1> | NULL | 17 | cnt/LTimer<10> | NULL | 23 | A_FSB<23> | 24 | 24 | A_FSB<22> | 20 -FB_ORDER_OF_INPUTS | FOOBAR7_ | 27 | cnt/LTimer<8> | NULL | 29 | cnt/LTimer<11> | NULL | 30 | A_FSB<20> | 18 | 31 | cnt/LTimer<3> | NULL | 33 | cnt/LTimer<12> | NULL -FB_ORDER_OF_INPUTS | FOOBAR7_ | 39 | A_FSB<1> | 94 | 43 | A_FSB<10> | 8 | 44 | cnt/LTimer<9> | NULL | 45 | cnt/LTimer<0> | NULL | 47 | ram/RASEL | NULL -FB_ORDER_OF_INPUTS | FOOBAR7_ | 49 | A_FSB<8> | 6 | 50 | A_FSB<18> | 16 | 51 | cnt/TimerTC | NULL | 52 | A_FSB<11> | 9 | 53 | A_FSB<9> | 7 +FB_ORDER_OF_INPUTS | FOOBAR7_ | 2 | cnt/LTimer<9> | NULL | 3 | cnt/LTimer<8> | NULL | 4 | A_FSB<2> | 95 | 6 | cnt/LTimer<7> | NULL | 7 | A_FSB<17> | 15 +FB_ORDER_OF_INPUTS | FOOBAR7_ | 9 | cnt/LTimer<6> | NULL | 10 | A_FSB<11> | 9 | 11 | cnt/LTimer<3> | NULL | 12 | cnt/LTimer<5> | NULL | 13 | cnt/LTimer<1> | NULL +FB_ORDER_OF_INPUTS | FOOBAR7_ | 14 | cnt/LTimer<4> | NULL | 15 | cnt/LTimer<12> | NULL | 16 | cnt/LTimer<11> | NULL | 17 | cnt/LTimer<10> | NULL | 18 | A_FSB<19> | 17 +FB_ORDER_OF_INPUTS | FOOBAR7_ | 19 | A_FSB<20> | 18 | 21 | cnt/LTimer<0> | NULL | 23 | A_FSB<23> | 24 | 24 | A_FSB<22> | 20 | 26 | cs/nOverlay | NULL +FB_ORDER_OF_INPUTS | FOOBAR7_ | 27 | ram/RASEL | NULL | 36 | cnt/TimerTC | NULL | 38 | cnt/Er<1> | NULL | 39 | cnt/Er<0> | NULL | 40 | A_FSB<8> | 6 +FB_ORDER_OF_INPUTS | FOOBAR7_ | 43 | A_FSB<10> | 8 | 45 | A_FSB<1> | 94 | 47 | A_FSB<21> | 19 | 49 | cnt/LTimer<2> | NULL | 50 | A_FSB<18> | 16 +FB_ORDER_OF_INPUTS | FOOBAR7_ | 53 | A_FSB<9> | 7 -FB_IMUX_INDEX | FOOBAR7_ | 108 | -1 | 228 | 75 | 164 | -1 | 114 | 216 | -1 | 117 | -1 | -1 | 120 | 222 | 122 | 69 | 70 | 125 | -1 | -1 | -1 | -1 | -1 | 240 | 230 | -1 | -1 | 111 | -1 | 124 | 226 | 68 | -1 | 123 | -1 | -1 | -1 | -1 | -1 | 156 | -1 | -1 | -1 | 198 | 110 | 67 | -1 | 72 | -1 | 194 | 218 | 9 | 202 | 196 +FB_IMUX_INDEX | FOOBAR7_ | -1 | -1 | 110 | 111 | 164 | -1 | 114 | 216 | -1 | 117 | 202 | 65 | 120 | 67 | 122 | 123 | 124 | 125 | 222 | 226 | -1 | 143 | -1 | 240 | 230 | -1 | 49 | 126 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 63 | -1 | 62 | 10 | 194 | -1 | -1 | 198 | -1 | 156 | -1 | 228 | -1 | 66 | 218 | -1 | -1 | 196 -FB_ORDER_OF_INPUTS | FOOBAR8_ | 0 | A_FSB<20> | 18 | 1 | ram/RefUrgent | NULL | 2 | A_FSB<21> | 19 | 4 | ram/RefRAS | NULL | 5 | A_FSB<16> | 14 -FB_ORDER_OF_INPUTS | FOOBAR8_ | 6 | iobs/PS_FSM_FFd1 | NULL | 7 | A_FSB<17> | 15 | 8 | ram/RS_FSM_FFd1 | NULL | 9 | ram/RAMEN | NULL | 10 | ram/RS_FSM_FFd3 | NULL -FB_ORDER_OF_INPUTS | FOOBAR8_ | 11 | iobs/nBERR_FSB.UIM | NULL | 12 | ram/RS_FSM_FFd2 | NULL | 13 | iobs/ALE1 | NULL | 14 | cnt/nBR_IOB | NULL | 16 | A_FSB<13> | 11 -FB_ORDER_OF_INPUTS | FOOBAR8_ | 21 | A_FSB<19> | 17 | 23 | A_FSB<23> | 24 | 25 | iobs/PS_FSM_FFd2 | NULL | 27 | iobs/Once | NULL | 28 | nWE_FSB | 29 -FB_ORDER_OF_INPUTS | FOOBAR8_ | 30 | cnt/PORS_FSM_FFd1 | NULL | 33 | nAS_FSB | 32 | 35 | A_FSB<14> | 12 | 37 | nLDS_FSB | 30 | 38 | cnt/IPL2r | NULL -FB_ORDER_OF_INPUTS | FOOBAR8_ | 39 | A_FSB<22> | 20 | 43 | fsb/ASrf | NULL | 44 | iobs/IOACTr | NULL | 45 | A_FSB<18> | 16 | 47 | iobm/IOBERR | NULL -FB_ORDER_OF_INPUTS | FOOBAR8_ | 49 | cnt/PORS_FSM_FFd2 | NULL | 51 | nUDS_FSB | 33 | 52 | cs/nOverlay1 | NULL +FB_ORDER_OF_INPUTS | FOOBAR8_ | 0 | ram/RefUrg | NULL | 2 | ram/RefReq | NULL | 3 | iobs/IOACTr | NULL | 4 | A_FSB<22> | 20 | 6 | fsb/ASrf | NULL +FB_ORDER_OF_INPUTS | FOOBAR8_ | 7 | ram/RS_FSM_FFd2 | NULL | 8 | nAS_FSB | 32 | 9 | cnt/nIPL2r | NULL | 10 | ram/RAMReady | NULL | 11 | nBERR_FSB_OBUF.UIM | NULL +FB_ORDER_OF_INPUTS | FOOBAR8_ | 12 | ram/RS_FSM_FFd1 | NULL | 13 | cs/nOverlay | NULL | 14 | nBR_IOB_OBUF | NULL | 15 | ram/RS_FSM_FFd3 | NULL | 16 | iobs/Once | NULL +FB_ORDER_OF_INPUTS | FOOBAR8_ | 17 | IOBERR | NULL | 21 | A_FSB<19> | 17 | 23 | A_FSB<23> | 24 | 27 | nUDS_FSB | 33 | 28 | nWE_FSB | 29 +FB_ORDER_OF_INPUTS | FOOBAR8_ | 29 | nLDS_FSB | 30 | 33 | ram/BACTr | NULL | 36 | cnt/TimerTC | NULL | 37 | cnt/Timer<2> | NULL | 38 | cnt/Er<1> | NULL +FB_ORDER_OF_INPUTS | FOOBAR8_ | 39 | cnt/Er<0> | NULL | 40 | cnt/Timer<1> | NULL | 43 | ram/RAMEN | NULL | 45 | cnt/Timer<0> | NULL | 47 | cnt/LTimerTC | NULL +FB_ORDER_OF_INPUTS | FOOBAR8_ | 49 | ALE1 | NULL | 50 | iobs/PS_FSM_FFd2 | NULL | 51 | cnt/INITS_FSM_FFd2 | NULL | 52 | cnt/INITS_FSM_FFd1 | NULL | 53 | fsb/Ready0r | NULL -FB_IMUX_INDEX | FOOBAR8_ | 226 | 1 | 228 | -1 | 4 | 214 | 132 | 216 | 134 | 81 | 136 | 137 | 84 | 103 | 140 | -1 | 208 | -1 | -1 | -1 | -1 | 222 | -1 | 240 | -1 | 139 | -1 | 126 | 256 | -1 | 60 | -1 | -1 | 268 | -1 | 210 | -1 | 260 | 62 | 230 | -1 | -1 | -1 | 6 | 5 | 218 | -1 | 71 | -1 | 66 | -1 | 272 | 75 | -1 +FB_IMUX_INDEX | FOOBAR8_ | 0 | -1 | 2 | 3 | 230 | -1 | 60 | 79 | 268 | 9 | 136 | 137 | 12 | 49 | 140 | 141 | 88 | 107 | -1 | -1 | -1 | 222 | -1 | 240 | -1 | -1 | -1 | 272 | 256 | 260 | -1 | -1 | -1 | 56 | -1 | -1 | 63 | 128 | 62 | 10 | 135 | -1 | -1 | 139 | -1 | 129 | -1 | 108 | -1 | 103 | 78 | 132 | 142 | 134 GLOBAL_FCLK | C16M | 0 | 0 | C8M | 1 | 1 | FCLK | 2 | 2 - -TIME_TSPEC | TS_CLK_IOB | PERIOD:CLK_IOB:142.857nS:HIGH:71.428nS | CLK_IOB | 10003 | 1428 | 714 | NULL - -TIME_TSPEC | TS_CLK_FSB | PERIOD:CLK_FSB:40.000nS:HIGH:20.000nS | CLK_FSB | 10003 | 400 | 200 | NULL - -TIME_TSPEC | TS_CLK2X_IOB | PERIOD:CLK2X_IOB:66.666nS:HIGH:33.333nS | CLK2X_IOB | 10003 | 666 | 333 | NULL diff --git a/cpld/XC95144XL/WarpSE.xise b/cpld/XC95144XL/WarpSE.xise index 9211478..4a5d300 100644 --- a/cpld/XC95144XL/WarpSE.xise +++ b/cpld/XC95144XL/WarpSE.xise @@ -36,11 +36,11 @@ - + - + @@ -64,7 +64,7 @@ - + @@ -78,7 +78,6 @@ - @@ -97,11 +96,11 @@ - + - + @@ -113,7 +112,7 @@ - + @@ -131,7 +130,7 @@ - + @@ -162,7 +161,6 @@ - @@ -196,7 +194,7 @@ - + @@ -241,8 +239,8 @@ - - + + diff --git a/cpld/XC95144XL/WarpSE.xml b/cpld/XC95144XL/WarpSE.xml index b36e1a7..367e0d2 100644 --- a/cpld/XC95144XL/WarpSE.xml +++ b/cpld/XC95144XL/WarpSE.xml @@ -1,3 +1,3 @@ -WarpSE.rptC:/Xilinx/14.7/ISE_DS/ISE/xc9500xl/data/xc95144xl.chpWarpSE.mfd
Cpld - Unable to retrieve the path to the iSE Project Repository. Will use the default filename of 'WarpSE.ise'.INFO:Cpld - Inferring BUFG constraint for signal 'C16M' based upon the LOC constraint 'P22'. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored.INFO:Cpld - Inferring BUFG constraint for signal 'C8M' based upon the LOC constraint 'P23'. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored.INFO:Cpld - Inferring BUFG constraint for signal 'FCLK' based upon the LOC constraint 'P27'. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored.Cpld:1007 - Removing unused input(s) 'SW<1>'. The input(s) are unused after optimization. Please verify functionality via simulation.Cpld:1007 - Removing unused input(s) 'SW<2>'. The input(s) are unused after optimization. Please verify functionality via simulation.Cpld:1007 - Removing unused input(s) 'SW<3>'. The input(s) are unused after optimization. Please verify functionality via simulation.Cpld:1007 - Removing unused input(s) 'nBG_IOB'. The input(s) are unused after optimization. Please verify functionality via simulation. +WarpSE.rptC:/Xilinx/14.7/ISE_DS/ISE/xc9500xl/data/xc95144xl.chpWarpSE.mfd
Cpld - Unable to retrieve the path to the iSE Project Repository. Will use the default filename of 'WarpSE.ise'.INFO:Cpld - Inferring BUFG constraint for signal 'C16M' based upon the LOC constraint 'P22'. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored.INFO:Cpld - Inferring BUFG constraint for signal 'C8M' based upon the LOC constraint 'P23'. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored.INFO:Cpld - Inferring BUFG constraint for signal 'FCLK' based upon the LOC constraint 'P27'. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored.Cpld:1007 - Removing unused input(s) 'SW<1>'. The input(s) are unused after optimization. Please verify functionality via simulation.Cpld:1007 - Removing unused input(s) 'SW<2>'. The input(s) are unused after optimization. Please verify functionality via simulation.Cpld:1007 - Removing unused input(s) 'SW<3>'. The input(s) are unused after optimization. Please verify functionality via simulation.Cpld:1007 - Removing unused input(s) 'nBG_IOB'. The input(s) are unused after optimization. Please verify functionality via simulation. diff --git a/cpld/XC95144XL/WarpSE.xst b/cpld/XC95144XL/WarpSE.xst index b4b1324..1d31f8c 100644 --- a/cpld/XC95144XL/WarpSE.xst +++ b/cpld/XC95144XL/WarpSE.xst @@ -8,9 +8,9 @@ run -p xc9500xl -top WarpSE -opt_mode Speed --opt_level 2 +-opt_level 1 -iuc NO --keep_hierarchy No +-keep_hierarchy Yes -netlist_hierarchy As_Optimized -rtlview Yes -hierarchy_separator / diff --git a/cpld/XC95144XL/WarpSE_bld.html b/cpld/XC95144XL/WarpSE_bld.html deleted file mode 100644 index 2b90479..0000000 --- a/cpld/XC95144XL/WarpSE_bld.html +++ /dev/null @@ -1 +0,0 @@ -Translation Report
Translation Report
Mon Mar 28 09:31:43 2022


Release 14.7 ngdbuild P.20131013 (nt)
Copyright (c) 1995-2013 Xilinx, Inc.  All rights reserved.

Command Line: C:\Xilinx\14.7\ISE_DS\ISE\bin\nt\unwrapped\ngdbuild.exe -intstyle
ise -dd _ngo -uc Z:/Warp-SE/cpld/WarpSE-XC95144XL.ucf -p xc95144xl-TQ100-10
WarpSE.ngc WarpSE.ngd

Reading NGO file "Z:/Warp-SE/cpld/XC95144XL/WarpSE.ngc" ...
Gathering constraint information from source properties...
Done.

Annotating constraints to design from ucf file
"Z:/Warp-SE/cpld/WarpSE-XC95144XL.ucf" ...
Resolving constraint associations...
Checking Constraint Associations...
Done...

Checking expanded design ...

Partition Implementation Status
-------------------------------

  No Partitions were found in this design.

-------------------------------

NGDBUILD Design Results Summary:
  Number of errors:     0
  Number of warnings:   0

Total memory usage is 117300 kilobytes

Writing NGD file "WarpSE.ngd" ...
Total REAL time to NGDBUILD completion:  17 sec
Total CPU time to NGDBUILD completion:   16 sec

Writing NGDBUILD log file "WarpSE.bld"...
\ No newline at end of file diff --git a/cpld/XC95144XL/WarpSE_envsettings.html b/cpld/XC95144XL/WarpSE_envsettings.html index e588217..305276d 100644 --- a/cpld/XC95144XL/WarpSE_envsettings.html +++ b/cpld/XC95144XL/WarpSE_envsettings.html @@ -98,7 +98,7 @@ -opt_level Optimization Effort -2 +1 1 @@ -110,7 +110,7 @@ -keep_hierarchy Keep Hierarchy -No +Yes YES diff --git a/cpld/XC95144XL/WarpSE_html/fit/ascii.htm b/cpld/XC95144XL/WarpSE_html/fit/ascii.htm index f49539f..ea64f9d 100644 --- a/cpld/XC95144XL/WarpSE_html/fit/ascii.htm +++ b/cpld/XC95144XL/WarpSE_html/fit/ascii.htm @@ -3,7 +3,7 @@ cpldfit: version P.20131013 Xilinx Inc. Fitter Report -Design Name: WarpSE Date: 3-25-2023, 0:52AM +Design Name: WarpSE Date: 3-26-2023, 4:30AM Device Used: XC95144XL-10-TQ100 Fitting Status: Successful @@ -11,22 +11,22 @@ Fitting Status: Successful Macrocells Product Terms Function Block Registers Pins Used/Tot Used/Tot Inps Used/Tot Used/Tot Used/Tot -119/144 ( 83%) 428 /720 ( 59%) 230/432 ( 53%) 94 /144 ( 65%) 71 /81 ( 88%) +118/144 ( 82%) 384 /720 ( 53%) 224/432 ( 52%) 93 /144 ( 65%) 71 /81 ( 88%) ** Function Block Resources ** Function Mcells FB Inps Pterms IO Block Used/Tot Used/Tot Used/Tot Used/Tot -FB1 18/18* 28/54 39/90 11/11* -FB2 10/18 8/54 11/90 8/10 -FB3 7/18 33/54 81/90 10/10* -FB4 17/18 34/54 40/90 10/10* -FB5 16/18 32/54 72/90 8/10 -FB6 18/18* 32/54 55/90 10/10* -FB7 18/18* 30/54 55/90 8/10 -FB8 15/18 33/54 75/90 6/10 +FB1 18/18* 21/54 25/90 11/11* +FB2 6/18 4/54 6/90 8/10 +FB3 9/18 34/54 82/90 10/10* +FB4 18/18* 31/54 34/90 10/10* +FB5 14/18 34/54 69/90 8/10 +FB6 18/18* 34/54 63/90 10/10* +FB7 18/18* 31/54 34/90 8/10 +FB8 17/18 35/54 71/90 6/10 ----- ----- ----- ----- - 119/144 230/432 428/720 71/81 + 118/144 224/432 384/720 71/81 * - Resource is exhausted @@ -53,7 +53,7 @@ GSR : 0 0 | ** Power Data ** -There are 119 macrocells in high performance mode (MCHP). +There are 118 macrocells in high performance mode (MCHP). There are 0 macrocells in low power mode (MCLP). End of Mapped Resource Summary ************************** Errors and Warnings *************************** @@ -89,9 +89,9 @@ WARNING:Cpld:1007 - Removing unused input(s) 'nBG_IOB'. The input(s) are unused Signal Total Total Loc Pin Pin Pin Pwr Slew Reg Init Name Pts Inps No. Type Use Mode Rate State -nDTACK_FSB 10 26 FB3_9 28 I/O O STD FAST RESET +nDTACK_FSB 9 26 FB3_9 28 I/O O STD FAST RESET nROMWE 1 2 FB3_17 34 I/O O STD FAST -nAoutOE 1 3 FB4_2 87 I/O O STD FAST SET +nAoutOE 2 4 FB4_2 87 I/O O STD FAST SET nDoutOE 1 2 FB4_5 89 I/O O STD FAST nDinOE 3 6 FB4_6 90 I/O O STD FAST nRES 1 1 FB4_8 91 I/O I/O STD FAST @@ -114,111 +114,110 @@ nDinLE 1 2 FB6_17 86 I/O O STD FAST RESET RA<1> 2 3 FB7_2 50 I/O O STD FAST RA<7> 2 3 FB7_5 52 I/O O STD FAST RA<0> 2 3 FB7_6 53 I/O O STD FAST -RA<8> 7 7 FB7_8 54 I/O O STD FAST +RA<8> 5 6 FB7_8 54 I/O O STD FAST RA<10> 1 1 FB7_9 55 I/O O STD FAST RA<9> 2 3 FB7_11 56 I/O O STD FAST C25MEN 0 0 FB7_12 58 I/O O STD FAST C20MEN 0 0 FB7_14 59 I/O O STD FAST RA<11> 1 1 FB8_2 63 I/O O STD FAST -nRAS 3 7 FB8_5 64 I/O O STD FAST +nRAS 0 0 FB8_5 64 I/O O STD FAST nRAMLWE 1 4 FB8_6 65 I/O O STD FAST nRAMUWE 1 4 FB8_8 66 I/O O STD FAST nBERR_FSB 4 8 FB8_12 70 I/O O STD FAST RESET nBR_IOB 2 4 FB8_15 72 I/O O STD FAST RESET -** 83 Buried Nodes ** +** 82 Buried Nodes ** Signal Total Total Loc Pwr Reg Init Name Pts Inps Mode State -ram/RegUrgentSync 1 1 FB1_1 STD RESET -ram/RefUrgent 1 2 FB1_2 STD RESET -ram/RefReqSync 1 1 FB1_3 STD RESET -ram/RefReq 1 2 FB1_4 STD RESET -ram/RefRAS 1 2 FB1_5 STD RESET -iobs/IOACTr 1 1 FB1_6 STD RESET -fsb/ASrf 1 1 FB1_7 STD RESET -iobs/IOU1 2 2 FB1_8 STD RESET -iobs/IOL1 2 2 FB1_9 STD RESET -cnt/TimerTC 2 5 FB1_10 STD RESET -iobs/IOU0 3 5 FB1_11 STD RESET -iobs/IOL0 3 5 FB1_12 STD RESET -cnt/Timer<3> 3 6 FB1_13 STD RESET -cnt/Timer<2> 3 5 FB1_14 STD RESET -cnt/Timer<1> 3 4 FB1_15 STD RESET -cnt/RefUrgent 3 5 FB1_16 STD RESET -iobs/IOReady 4 8 FB1_17 STD RESET -cnt/RefReq 4 5 FB1_18 STD RESET -iobm/VPArr 1 1 FB2_9 STD RESET -iobm/VPArf 1 1 FB2_10 STD RESET -iobm/RESrr 1 1 FB2_11 STD RESET -iobm/RESrf 1 1 FB2_12 STD RESET -iobm/IOREQr 1 1 FB2_13 STD RESET -iobm/Er2 1 1 FB2_14 STD RESET -iobm/Er 1 1 FB2_15 STD RESET -iobm/DTACKrr 1 1 FB2_16 STD RESET -iobm/DTACKrf 1 1 FB2_17 STD RESET -cnt/Timer<0> 2 3 FB2_18 STD RESET -fsb/VPA 18 26 FB3_1 STD RESET -iobs/IOREQ 13 19 FB3_7 STD RESET -fsb/Ready1r 6 17 FB3_10 STD RESET -iobs/IORW1 16 19 FB3_12 STD RESET -iobs/IORW0 17 20 FB3_15 STD RESET -iobm/BERRrr 1 1 FB4_3 STD RESET -iobm/BERRrf 1 1 FB4_4 STD RESET -cnt/PORS_FSM_FFd1 1 4 FB4_7 STD RESET -cnt/IPL2r 1 1 FB4_9 STD RESET -iobm/IOS_FSM_FFd1 2 3 FB4_10 STD RESET -cnt/nRESout 2 4 FB4_12 STD RESET -cnt/PORS_FSM_FFd2 2 3 FB4_13 STD RESET +ram/RefUrg 1 2 FB1_1 STD RESET +ram/RefReqSync 1 1 FB1_2 STD RESET +ram/RefReq 1 2 FB1_3 STD RESET +iobs/IOACTr 1 1 FB1_4 STD RESET +iobm/Er 1 1 FB1_5 STD RESET +iobm/DTACKrr 1 1 FB1_6 STD RESET +iobm/DTACKrf 1 1 FB1_7 STD RESET +iobm/BERRrr 1 1 FB1_8 STD RESET +iobm/BERRrf 1 1 FB1_9 STD RESET +cnt/nIPL2r 1 1 FB1_10 STD RESET +cnt/Er<0> 1 1 FB1_11 STD RESET +ALE0S 1 2 FB1_12 STD RESET +ram/RS_FSM_FFd1 2 3 FB1_13 STD RESET +iobs/IOU1 2 2 FB1_14 STD RESET +iobs/IOL1 2 2 FB1_15 STD RESET +iobm/IOS_FSM_FFd1 2 3 FB1_16 STD RESET +ALE0M 2 4 FB1_17 STD RESET +ram/RefDone 3 5 FB1_18 STD RESET +iobm/VPArr 1 1 FB2_13 STD RESET +iobm/VPArf 1 1 FB2_14 STD RESET +iobm/RESrr 1 1 FB2_15 STD RESET +iobm/RESrf 1 1 FB2_16 STD RESET +iobm/IOREQr 1 1 FB2_17 STD RESET +iobm/Er2 1 1 FB2_18 STD RESET +IORW0 17 20 FB3_1 STD RESET +fsb/VPA 16 26 FB3_6 STD RESET +iobs/IORW1 16 19 FB3_11 STD RESET +fsb/Ready1r 6 17 FB3_13 STD RESET +cs/nOverlay 3 8 FB3_14 STD RESET +IOREQ 13 19 FB3_16 STD RESET +iobs/Clear1 1 3 FB3_18 STD RESET +ram/RegUrgSync 1 1 FB4_1 STD RESET +ram/BACTr 1 2 FB4_3 STD RESET +nRESout 1 2 FB4_4 STD RESET +fsb/ASrf 1 1 FB4_7 STD RESET +cnt/Er<1> 1 1 FB4_9 STD RESET +cnt/TimerTC 2 6 FB4_10 STD RESET +cnt/LTimer<3> 2 6 FB4_12 STD RESET +cnt/LTimer<2> 2 5 FB4_13 STD RESET +cnt/LTimer<1> 2 4 FB4_14 STD RESET Signal Total Total Loc Pwr Reg Init Name Pts Inps Mode State -cnt/LTimer<0> 2 3 FB4_14 STD RESET -cnt/LTimer<3> 4 6 FB4_15 STD RESET -cnt/LTimer<2> 4 5 FB4_16 STD RESET -cnt/LTimer<1> 4 4 FB4_17 STD RESET -iobm/IOBERR 9 13 FB4_18 STD RESET -ram/RASEL 17 13 FB5_1 STD RESET -ram/RefDone 2 4 FB5_3 STD RESET -cs/nOverlay1 2 3 FB5_4 STD RESET -fsb/Ready0r 3 8 FB5_7 STD RESET -cs/nOverlay0 3 8 FB5_8 STD RESET -ram/RAMEN 9 13 FB5_10 STD RESET -ram/RS_FSM_FFd2 10 12 FB5_13 STD RESET -ram/RAMReady 12 13 FB5_17 STD RESET +RefReq 2 5 FB4_15 STD RESET +IOU0 3 5 FB4_16 STD RESET +IOL0 3 5 FB4_17 STD RESET +RefUrg 5 7 FB4_18 STD RESET +iobs/Load1 14 18 FB5_3 STD RESET +iobs/PS_FSM_FFd2 12 19 FB5_7 STD RESET +ram/RS_FSM_FFd2 8 10 FB5_8 STD RESET +iobs/PS_FSM_FFd1 2 3 FB5_10 STD RESET +iobs/IOReady 4 8 FB5_16 STD RESET +iobs/Once 15 18 FB5_17 STD RESET iobm/ETACK 1 6 FB6_1 STD RESET -iobm/DoutOE 2 3 FB6_3 STD RESET -iobm/ALE0 2 4 FB6_4 STD RESET -iobm/IOS_FSM_FFd3 3 6 FB6_5 STD RESET -iobm/ES<3> 3 6 FB6_6 STD RESET -iobm/ES<1> 3 4 FB6_7 STD RESET -iobm/ES<0> 3 7 FB6_8 STD RESET -iobm/ES<4> 4 7 FB6_10 STD RESET -iobm/IOS_FSM_FFd2 5 11 FB6_13 STD RESET -iobm/ES<2> 5 7 FB6_16 STD RESET -iobm/IOACT 6 12 FB6_18 STD RESET -cnt/LTimer<13> 3 15 FB7_1 STD RESET -cnt/LTimer<9> 4 12 FB7_3 STD RESET -cnt/LTimer<8> 4 11 FB7_4 STD RESET -cnt/LTimer<7> 4 10 FB7_7 STD RESET -cnt/LTimer<6> 4 9 FB7_10 STD RESET -cnt/LTimer<5> 4 8 FB7_13 STD RESET -cnt/LTimer<4> 4 7 FB7_15 STD RESET -cnt/LTimer<12> 4 15 FB7_16 STD RESET -cnt/LTimer<11> 4 14 FB7_17 STD RESET -cnt/LTimer<10> 4 13 FB7_18 STD RESET -iobs/Once 15 18 FB8_1 STD RESET -iobs/Clear1 1 3 FB8_3 STD RESET -iobs/ALE0 1 2 FB8_4 STD RESET -iobs/PS_FSM_FFd1 2 3 FB8_7 STD RESET -ram/RS_FSM_FFd1 8 11 FB8_9 STD RESET -ram/RS_FSM_FFd3 9 11 FB8_11 STD RESET +iobm/IOS_FSM_FFd3 3 6 FB6_3 STD RESET +iobm/ES<3> 3 6 FB6_4 STD RESET +iobm/ES<1> 3 4 FB6_5 STD RESET +iobm/ES<0> 3 7 FB6_6 STD RESET +iobm/DoutOE 3 6 FB6_7 STD RESET +iobm/ES<4> 4 7 FB6_8 STD RESET +iobm/IOS_FSM_FFd2 5 11 FB6_10 STD RESET +iobm/ES<2> 5 7 FB6_13 STD RESET +IOACT 6 12 FB6_16 STD RESET +IOBERR 9 13 FB6_18 STD RESET +cnt/LTimerTC 2 16 FB7_1 STD RESET +cnt/LTimer<9> 2 12 FB7_3 STD RESET +cnt/LTimer<8> 2 11 FB7_4 STD RESET +cnt/LTimer<7> 2 10 FB7_7 STD RESET +cnt/LTimer<6> 2 9 FB7_10 STD RESET +cnt/LTimer<5> 2 8 FB7_13 STD RESET +cnt/LTimer<4> 2 7 FB7_15 STD RESET +cnt/LTimer<12> 2 15 FB7_16 STD RESET +cnt/LTimer<11> 2 14 FB7_17 STD RESET +cnt/LTimer<10> 2 13 FB7_18 STD RESET +ram/RASEL 14 12 FB8_1 STD RESET +cnt/Timer<2> 5 6 FB8_3 STD RESET +cnt/Timer<0> 2 4 FB8_4 STD RESET +cnt/INITS_FSM_FFd2 2 6 FB8_7 STD RESET +fsb/Ready0r 2 7 FB8_9 STD RESET +cnt/Timer<1> 4 5 FB8_10 STD RESET +ram/RAMReady 9 12 FB8_11 STD RESET +ram/RAMEN 9 12 FB8_14 STD RESET +ram/RS_FSM_FFd3 13 12 FB8_16 STD RESET Signal Total Total Loc Pwr Reg Init Name Pts Inps Mode State -iobs/PS_FSM_FFd2 12 19 FB8_14 STD RESET -iobs/Load1 14 18 FB8_16 STD RESET -ram/BACTr 1 2 FB8_17 STD RESET +cnt/INITS_FSM_FFd1 1 7 FB8_17 STD RESET +cnt/LTimer<0> 1 3 FB8_18 STD RESET ** 35 Inputs ** @@ -276,66 +275,63 @@ Pin Type/Use - I - Input GCK - Global Clock X - Signal used as input to the macrocell logic. Pin No. - ~ - User Assigned *********************************** FB1 *********************************** -Number of function block inputs used/remaining: 28/26 -Number of signals used by logic mapping into function block: 28 +Number of function block inputs used/remaining: 21/33 +Number of signals used by logic mapping into function block: 21 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use -ram/RegUrgentSync 1 0 0 4 FB1_1 (b) (b) -ram/RefUrgent 1 0 0 4 FB1_2 11 I/O I -ram/RefReqSync 1 0 0 4 FB1_3 12 I/O I -ram/RefReq 1 0 0 4 FB1_4 (b) (b) -ram/RefRAS 1 0 0 4 FB1_5 13 I/O I -iobs/IOACTr 1 0 0 4 FB1_6 14 I/O I -fsb/ASrf 1 0 0 4 FB1_7 (b) (b) -iobs/IOU1 2 0 0 3 FB1_8 15 I/O I -iobs/IOL1 2 0 0 3 FB1_9 16 I/O I -cnt/TimerTC 2 0 0 3 FB1_10 (b) (b) -iobs/IOU0 3 0 0 2 FB1_11 17 I/O I -iobs/IOL0 3 0 0 2 FB1_12 18 I/O I -cnt/Timer<3> 3 0 0 2 FB1_13 (b) (b) -cnt/Timer<2> 3 0 0 2 FB1_14 19 I/O I -cnt/Timer<1> 3 0 0 2 FB1_15 20 I/O I -cnt/RefUrgent 3 0 0 2 FB1_16 (b) (b) -iobs/IOReady 4 0 0 1 FB1_17 22 GCK/I/O GCK -cnt/RefReq 4 0 0 1 FB1_18 (b) (b) +ram/RefUrg 1 0 0 4 FB1_1 (b) (b) +ram/RefReqSync 1 0 0 4 FB1_2 11 I/O I +ram/RefReq 1 0 0 4 FB1_3 12 I/O I +iobs/IOACTr 1 0 0 4 FB1_4 (b) (b) +iobm/Er 1 0 0 4 FB1_5 13 I/O I +iobm/DTACKrr 1 0 0 4 FB1_6 14 I/O I +iobm/DTACKrf 1 0 0 4 FB1_7 (b) (b) +iobm/BERRrr 1 0 0 4 FB1_8 15 I/O I +iobm/BERRrf 1 0 0 4 FB1_9 16 I/O I +cnt/nIPL2r 1 0 0 4 FB1_10 (b) (b) +cnt/Er<0> 1 0 0 4 FB1_11 17 I/O I +ALE0S 1 0 0 4 FB1_12 18 I/O I +ram/RS_FSM_FFd1 2 0 0 3 FB1_13 (b) (b) +iobs/IOU1 2 0 0 3 FB1_14 19 I/O I +iobs/IOL1 2 0 0 3 FB1_15 20 I/O I +iobm/IOS_FSM_FFd1 2 0 0 3 FB1_16 (b) (b) +ALE0M 2 0 0 3 FB1_17 22 GCK/I/O GCK +ram/RefDone 3 0 0 2 FB1_18 (b) (b) Signals Used by Logic in Function Block - 1: E 11: iobm/IOBERR 20: nADoutLE1 - 2: cnt/RefReq 12: iobs/IOACTr 21: nAS_FSB - 3: cnt/RefUrgent 13: iobs/IOL1 22: nLDS_FSB - 4: cnt/Timer<0> 14: iobs/IOReady 23: nUDS_FSB - 5: cnt/Timer<1> 15: iobs/IOU1 24: ram/RS_FSM_FFd1 - 6: cnt/Timer<2> 16: iobs/Load1 25: ram/RS_FSM_FFd2 - 7: cnt/Timer<3> 17: iobs/Once 26: ram/RefDone - 8: cnt/TimerTC 18: iobs/PS_FSM_FFd1 27: ram/RefReqSync - 9: fsb/ASrf 19: iobs/PS_FSM_FFd2 28: ram/RegUrgentSync - 10: iobm/IOACT + 1: E 8: iobs/Load1 15: nUDS_FSB + 2: IOACT 9: iobs/PS_FSM_FFd1 16: ram/RS_FSM_FFd1 + 3: RefReq 10: iobs/PS_FSM_FFd2 17: ram/RS_FSM_FFd2 + 4: iobm/IOREQr 11: nBERR_IOB 18: ram/RS_FSM_FFd3 + 5: iobm/IOS_FSM_FFd1 12: nDTACK_IOB 19: ram/RefDone + 6: iobm/IOS_FSM_FFd2 13: nIPL2 20: ram/RefReqSync + 7: iobm/IOS_FSM_FFd3 14: nLDS_FSB 21: ram/RegUrgSync Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs -ram/RegUrgentSync ..X..................................... 1 -ram/RefUrgent .........................X.X............ 2 -ram/RefReqSync .X...................................... 1 -ram/RefReq .........................XX............. 2 -ram/RefRAS .......................XX............... 2 -iobs/IOACTr .........X.............................. 1 -fsb/ASrf ....................X................... 1 -iobs/IOU1 ...............X......X................. 2 -iobs/IOL1 ...............X.....X.................. 2 -cnt/TimerTC X..XXXX................................. 5 -iobs/IOU0 ..............X..XXX..X................. 5 -iobs/IOL0 ............X....XXX.X.................. 5 -cnt/Timer<3> X..XXXXX................................ 6 -cnt/Timer<2> X..XXX.X................................ 5 -cnt/Timer<1> X..XX..X................................ 4 -cnt/RefUrgent X..XXXX................................. 5 -iobs/IOReady ........X.XX.X..X.XXX................... 8 -cnt/RefReq X..XXXX................................. 5 +ram/RefUrg ..................X.X................... 2 +ram/RefReqSync ..X..................................... 1 +ram/RefReq ..................XX.................... 2 +iobs/IOACTr .X...................................... 1 +iobm/Er X....................................... 1 +iobm/DTACKrr ...........X............................ 1 +iobm/DTACKrf ...........X............................ 1 +iobm/BERRrr ..........X............................. 1 +iobm/BERRrf ..........X............................. 1 +cnt/nIPL2r ............X........................... 1 +cnt/Er<0> X....................................... 1 +ALE0S ........XX.............................. 2 +ram/RS_FSM_FFd1 ...............XXX...................... 3 +iobs/IOU1 .......X......X......................... 2 +iobs/IOL1 .......X.....X.......................... 2 +iobm/IOS_FSM_FFd1 ....XXX................................. 3 +ALE0M ...XXXX................................. 4 +ram/RefDone ...............XXXXX.................... 5 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB2 *********************************** -Number of function block inputs used/remaining: 8/46 -Number of signals used by logic mapping into function block: 8 +Number of function block inputs used/remaining: 4/50 +Number of signals used by logic mapping into function block: 4 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use (unused) 0 0 0 5 FB2_1 (b) @@ -346,384 +342,392 @@ Name Pt Pt Pt Pt # Type Use (unused) 0 0 0 5 FB2_6 2 GTS/I/O I (unused) 0 0 0 5 FB2_7 (b) (unused) 0 0 0 5 FB2_8 3 GTS/I/O I -iobm/VPArr 1 0 0 4 FB2_9 4 GTS/I/O I -iobm/VPArf 1 0 0 4 FB2_10 (b) (b) -iobm/RESrr 1 0 0 4 FB2_11 6 I/O I -iobm/RESrf 1 0 0 4 FB2_12 7 I/O I -iobm/IOREQr 1 0 0 4 FB2_13 (b) (b) -iobm/Er2 1 0 0 4 FB2_14 8 I/O I -iobm/Er 1 0 0 4 FB2_15 9 I/O I -iobm/DTACKrr 1 0 0 4 FB2_16 (b) (b) -iobm/DTACKrf 1 0 0 4 FB2_17 10 I/O I -cnt/Timer<0> 2 0 0 3 FB2_18 (b) (b) +(unused) 0 0 0 5 FB2_9 4 GTS/I/O I +(unused) 0 0 0 5 FB2_10 (b) +(unused) 0 0 0 5 FB2_11 6 I/O I +(unused) 0 0 0 5 FB2_12 7 I/O I +iobm/VPArr 1 0 0 4 FB2_13 (b) (b) +iobm/VPArf 1 0 0 4 FB2_14 8 I/O I +iobm/RESrr 1 0 0 4 FB2_15 9 I/O I +iobm/RESrf 1 0 0 4 FB2_16 (b) (b) +iobm/IOREQr 1 0 0 4 FB2_17 10 I/O I +iobm/Er2 1 0 0 4 FB2_18 (b) (b) Signals Used by Logic in Function Block - 1: E 4: cnt/TimerTC 7: nDTACK_IOB - 2: nRES.PIN 5: iobm/Er 8: nVPA_IOB - 3: cnt/Timer<0> 6: iobs/IOREQ + 1: IOREQ 3: iobm/Er 4: nVPA_IOB + 2: nRES.PIN Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs -iobm/VPArr .......X................................ 1 -iobm/VPArf .......X................................ 1 +iobm/VPArr ...X.................................... 1 +iobm/VPArf ...X.................................... 1 iobm/RESrr .X...................................... 1 iobm/RESrf .X...................................... 1 -iobm/IOREQr .....X.................................. 1 -iobm/Er2 ....X................................... 1 -iobm/Er X....................................... 1 -iobm/DTACKrr ......X................................. 1 -iobm/DTACKrf ......X................................. 1 -cnt/Timer<0> X.XX.................................... 3 +iobm/IOREQr X....................................... 1 +iobm/Er2 ..X..................................... 1 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB3 *********************************** -Number of function block inputs used/remaining: 33/21 -Number of signals used by logic mapping into function block: 33 -Signal Total Imp Exp Unused Loc Pin Pin Pin -Name Pt Pt Pt Pt # Type Use -fsb/VPA 18 13<- 0 0 FB3_1 (b) (b) -(unused) 0 0 /\5 0 FB3_2 23 GCK/I/O GCK/I -(unused) 0 0 /\3 2 FB3_3 (b) (b) -(unused) 0 0 0 5 FB3_4 (b) -(unused) 0 0 \/5 0 FB3_5 24 I/O I -(unused) 0 0 \/5 0 FB3_6 25 I/O I -iobs/IOREQ 13 10<- \/2 0 FB3_7 (b) (b) -(unused) 0 0 \/5 0 FB3_8 27 GCK/I/O GCK -nDTACK_FSB 10 7<- \/2 0 FB3_9 28 I/O O -fsb/Ready1r 6 2<- \/1 0 FB3_10 (b) (b) -(unused) 0 0 \/5 0 FB3_11 29 I/O I -iobs/IORW1 16 11<- 0 0 FB3_12 30 I/O I -(unused) 0 0 /\5 0 FB3_13 (b) (b) -(unused) 0 0 \/5 0 FB3_14 32 I/O I -iobs/IORW0 17 12<- 0 0 FB3_15 33 I/O I -(unused) 0 0 /\5 0 FB3_16 (b) (b) -nROMWE 1 0 /\2 2 FB3_17 34 I/O O -(unused) 0 0 \/5 0 FB3_18 (b) (b) - -Signals Used by Logic in Function Block - 1: A_FSB<10> 12: A_FSB<21> 23: iobs/IORW0 - 2: A_FSB<11> 13: A_FSB<22> 24: iobs/IORW1 - 3: A_FSB<12> 14: A_FSB<23> 25: iobs/IOReady - 4: A_FSB<13> 15: A_FSB<8> 26: iobs/Once - 5: A_FSB<14> 16: A_FSB<9> 27: iobs/PS_FSM_FFd1 - 6: A_FSB<15> 17: cs/nOverlay1 28: iobs/PS_FSM_FFd2 - 7: A_FSB<16> 18: fsb/ASrf 29: nADoutLE1 - 8: A_FSB<17> 19: fsb/Ready0r 30: nAS_FSB - 9: A_FSB<18> 20: fsb/Ready1r 31: nDTACK_FSB - 10: A_FSB<19> 21: fsb/VPA 32: nWE_FSB - 11: A_FSB<20> 22: iobs/IOACTr 33: ram/RAMReady - -Signal 1 2 3 4 FB -Name 0----+----0----+----0----+----0----+----0 Inputs -fsb/VPA XXXXXXXXXXXXXXXXXXXXX...X...XX.XX....... 26 -iobs/IOREQ ...XX.XXXXXXXX..XX...X...XXXXX.X........ 19 -nDTACK_FSB XXXXXXXXXXXXXXXXXXXX....X...XXXXX....... 26 -fsb/Ready1r ...XX.XXXXXXXX..XX.X....X...XX.X........ 17 -iobs/IORW1 ...XX.XXXXXXXX..XX.....X.XXXXX.X........ 19 -iobs/IORW0 ...XX.XXXXXXXX..XX....XX.XXXXX.X........ 20 -nROMWE .............................X.X........ 2 - 0----+----1----+----2----+----3----+----4 - 0 0 0 0 - *********************************** FB4 *********************************** Number of function block inputs used/remaining: 34/20 Number of signals used by logic mapping into function block: 34 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use -(unused) 0 0 /\3 2 FB4_1 (b) (b) -nAoutOE 1 0 0 4 FB4_2 87 I/O O -iobm/BERRrr 1 0 0 4 FB4_3 (b) (b) -iobm/BERRrf 1 0 0 4 FB4_4 (b) (b) -nDoutOE 1 0 0 4 FB4_5 89 I/O O -nDinOE 3 0 0 2 FB4_6 90 I/O O -cnt/PORS_FSM_FFd1 1 0 0 4 FB4_7 (b) (b) -nRES 1 0 0 4 FB4_8 91 I/O I/O -cnt/IPL2r 1 0 0 4 FB4_9 92 I/O I -iobm/IOS_FSM_FFd1 2 0 0 3 FB4_10 (b) (b) -nVPA_FSB 1 0 0 4 FB4_11 93 I/O O -cnt/nRESout 2 0 0 3 FB4_12 94 I/O I -cnt/PORS_FSM_FFd2 2 0 0 3 FB4_13 (b) (b) -cnt/LTimer<0> 2 0 0 3 FB4_14 95 I/O I -cnt/LTimer<3> 4 0 0 1 FB4_15 96 I/O I -cnt/LTimer<2> 4 0 0 1 FB4_16 (b) (b) -cnt/LTimer<1> 4 0 \/1 0 FB4_17 97 I/O I -iobm/IOBERR 9 4<- 0 0 FB4_18 (b) (b) +IORW0 17 12<- 0 0 FB3_1 (b) (b) +(unused) 0 0 /\5 0 FB3_2 23 GCK/I/O GCK/I +(unused) 0 0 /\3 2 FB3_3 (b) (b) +(unused) 0 0 \/1 4 FB3_4 (b) (b) +(unused) 0 0 \/5 0 FB3_5 24 I/O I +fsb/VPA 16 11<- 0 0 FB3_6 25 I/O I +(unused) 0 0 /\5 0 FB3_7 (b) (b) +(unused) 0 0 \/5 0 FB3_8 27 GCK/I/O GCK +nDTACK_FSB 9 5<- \/1 0 FB3_9 28 I/O O +(unused) 0 0 \/5 0 FB3_10 (b) (b) +iobs/IORW1 16 11<- 0 0 FB3_11 29 I/O I +(unused) 0 0 /\5 0 FB3_12 30 I/O I +fsb/Ready1r 6 1<- 0 0 FB3_13 (b) (b) +cs/nOverlay 3 0 /\1 1 FB3_14 32 I/O I +(unused) 0 0 \/5 0 FB3_15 33 I/O I +IOREQ 13 8<- 0 0 FB3_16 (b) (b) +nROMWE 1 0 /\3 1 FB3_17 34 I/O O +iobs/Clear1 1 0 \/4 0 FB3_18 (b) (b) Signals Used by Logic in Function Block - 1: A_FSB<20> 13: cnt/PORS_FSM_FFd2 24: iobm/IOS_FSM_FFd1 - 2: A_FSB<21> 14: cnt/TimerTC 25: iobm/IOS_FSM_FFd2 - 3: A_FSB<22> 15: cnt/nRESout 26: iobm/IOS_FSM_FFd3 - 4: A_FSB<23> 16: fsb/VPA 27: iobm/RESrf - 5: C8M 17: iobm/BERRrf 28: iobm/RESrr - 6: cnt/IPL2r 18: iobm/BERRrr 29: nAS_FSB - 7: cnt/LTimer<0> 19: iobm/DTACKrf 30: nAoutOE - 8: cnt/LTimer<13> 20: iobm/DTACKrr 31: nBERR_IOB - 9: cnt/LTimer<1> 21: iobm/DoutOE 32: nBR_IOB - 10: cnt/LTimer<2> 22: iobm/ETACK 33: nIPL2 - 11: cnt/LTimer<3> 23: iobm/IOBERR 34: nWE_FSB - 12: cnt/PORS_FSM_FFd1 + 1: A_FSB<10> 13: A_FSB<22> 24: iobs/IOACTr + 2: A_FSB<11> 14: A_FSB<23> 25: iobs/IORW1 + 3: A_FSB<12> 15: A_FSB<8> 26: iobs/IOReady + 4: A_FSB<13> 16: A_FSB<9> 27: iobs/Once + 5: A_FSB<14> 17: IORW0 28: iobs/PS_FSM_FFd1 + 6: A_FSB<15> 18: nRES.PIN 29: iobs/PS_FSM_FFd2 + 7: A_FSB<16> 19: cs/nOverlay 30: nADoutLE1 + 8: A_FSB<17> 20: fsb/ASrf 31: nAS_FSB + 9: A_FSB<18> 21: fsb/Ready0r 32: nDTACK_FSB + 10: A_FSB<19> 22: fsb/Ready1r 33: nWE_FSB + 11: A_FSB<20> 23: fsb/VPA 34: ram/RAMReady + 12: A_FSB<21> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs -nAoutOE ...........XX..................X........ 3 -iobm/BERRrr ..............................X......... 1 -iobm/BERRrf ..............................X......... 1 -nDoutOE ....................X........X.......... 2 -nDinOE XXXX........................X....X...... 6 -cnt/PORS_FSM_FFd1 .....X.X...XX........................... 4 -nRES ..............X......................... 1 -cnt/IPL2r ................................X....... 1 -iobm/IOS_FSM_FFd1 .......................XXX.............. 3 -nVPA_FSB ...............X............X........... 2 -cnt/nRESout .......X...XX.X......................... 4 -cnt/PORS_FSM_FFd2 .......X...XX........................... 3 -cnt/LTimer<0> ......XX.....X.......................... 3 -cnt/LTimer<3> ......XXXXX..X.......................... 6 -cnt/LTimer<2> ......XXXX...X.......................... 5 -cnt/LTimer<1> ......XXX....X.......................... 4 -iobm/IOBERR ....X...........XXXX.XXXXXXX..X......... 13 +IORW0 ...XX.XXXXXXXX..X.XX....X.XXXXX.X....... 20 +fsb/VPA XXXXXXXXXXXXXXXX..XXXXX..X...XX.XX...... 26 +nDTACK_FSB XXXXXXXXXXXXXXXX..XXXX...X...XXXXX...... 26 +iobs/IORW1 ...XX.XXXXXXXX....XX....X.XXXXX.X....... 19 +fsb/Ready1r ...XX.XXXXXXXX....XX.X...X...XX.X....... 17 +cs/nOverlay ..........XXXX...XXX..........X......... 8 +IOREQ ...XX.XXXXXXXX....XX...X..XXXXX.X....... 19 +nROMWE ..............................X.X....... 2 +iobs/Clear1 ...........................XXX.......... 3 + 0----+----1----+----2----+----3----+----4 + 0 0 0 0 + *********************************** FB4 *********************************** +Number of function block inputs used/remaining: 31/23 +Number of signals used by logic mapping into function block: 31 +Signal Total Imp Exp Unused Loc Pin Pin Pin +Name Pt Pt Pt Pt # Type Use +ram/RegUrgSync 1 0 0 4 FB4_1 (b) (b) +nAoutOE 2 0 0 3 FB4_2 87 I/O O +ram/BACTr 1 0 0 4 FB4_3 (b) (b) +nRESout 1 0 0 4 FB4_4 (b) (b) +nDoutOE 1 0 0 4 FB4_5 89 I/O O +nDinOE 3 0 0 2 FB4_6 90 I/O O +fsb/ASrf 1 0 0 4 FB4_7 (b) (b) +nRES 1 0 0 4 FB4_8 91 I/O I/O +cnt/Er<1> 1 0 0 4 FB4_9 92 I/O I +cnt/TimerTC 2 0 0 3 FB4_10 (b) (b) +nVPA_FSB 1 0 0 4 FB4_11 93 I/O O +cnt/LTimer<3> 2 0 0 3 FB4_12 94 I/O I +cnt/LTimer<2> 2 0 0 3 FB4_13 (b) (b) +cnt/LTimer<1> 2 0 0 3 FB4_14 95 I/O I +RefReq 2 0 0 3 FB4_15 96 I/O I +IOU0 3 0 0 2 FB4_16 (b) (b) +IOL0 3 0 0 2 FB4_17 97 I/O I +RefUrg 5 0 0 0 FB4_18 (b) (b) + +Signals Used by Logic in Function Block + 1: A_FSB<20> 12: cnt/LTimer<2> 22: iobs/PS_FSM_FFd1 + 2: A_FSB<21> 13: cnt/Timer<0> 23: iobs/PS_FSM_FFd2 + 3: A_FSB<22> 14: cnt/Timer<1> 24: nADoutLE1 + 4: A_FSB<23> 15: cnt/Timer<2> 25: nAS_FSB + 5: RefUrg 16: cnt/TimerTC 26: nAoutOE + 6: cnt/Er<0> 17: fsb/ASrf 27: nBR_IOB + 7: cnt/Er<1> 18: fsb/VPA 28: nLDS_FSB + 8: cnt/INITS_FSM_FFd1 19: iobm/DoutOE 29: nRESout + 9: cnt/INITS_FSM_FFd2 20: iobs/IOL1 30: nUDS_FSB + 10: cnt/LTimer<0> 21: iobs/IOU1 31: nWE_FSB + 11: cnt/LTimer<1> + +Signal 1 2 3 4 FB +Name 0----+----0----+----0----+----0----+----0 Inputs +ram/RegUrgSync ....X................................... 1 +nAoutOE .......XX................XX............. 4 +ram/BACTr ................X.......X............... 2 +nRESout .......XX............................... 2 +nDoutOE ..................X......X.............. 2 +nDinOE XXXX....................X.....X......... 6 +fsb/ASrf ........................X............... 1 +nRES ............................X........... 1 +cnt/Er<1> .....X.................................. 1 +cnt/TimerTC ....XXX.....XXX......................... 6 +nVPA_FSB .................X......X............... 2 +cnt/LTimer<3> .....XX..XXX...X........................ 6 +cnt/LTimer<2> .....XX..XX....X........................ 5 +cnt/LTimer<1> .....XX..X.....X........................ 4 +RefReq ....XXX......XX......................... 5 +IOU0 ....................XXXX.....X.......... 5 +IOL0 ...................X.XXX...X............ 5 +RefUrg ....XXX.....XXXX........................ 7 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB5 *********************************** -Number of function block inputs used/remaining: 32/22 -Number of signals used by logic mapping into function block: 32 +Number of function block inputs used/remaining: 34/20 +Number of signals used by logic mapping into function block: 34 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use -ram/RASEL 17 12<- 0 0 FB5_1 (b) (b) -nROMCS 2 2<- /\5 0 FB5_2 35 I/O O -ram/RefDone 2 0 /\2 1 FB5_3 (b) (b) -cs/nOverlay1 2 0 0 3 FB5_4 (b) (b) -nCAS 1 0 0 4 FB5_5 36 I/O O -nOE 1 0 0 4 FB5_6 37 I/O O -fsb/Ready0r 3 0 0 2 FB5_7 (b) (b) -cs/nOverlay0 3 0 \/1 1 FB5_8 39 I/O (b) -RA<4> 2 1<- \/4 0 FB5_9 40 I/O O -ram/RAMEN 9 4<- 0 0 FB5_10 (b) (b) -RA<3> 2 0 \/2 1 FB5_11 41 I/O O -RA<5> 2 2<- \/5 0 FB5_12 42 I/O O -ram/RS_FSM_FFd2 10 5<- 0 0 FB5_13 (b) (b) +(unused) 0 0 \/1 4 FB5_1 (b) (b) +nROMCS 2 1<- \/4 0 FB5_2 35 I/O O +iobs/Load1 14 9<- 0 0 FB5_3 (b) (b) +(unused) 0 0 /\5 0 FB5_4 (b) (b) +nCAS 1 0 \/1 3 FB5_5 36 I/O O +nOE 1 1<- \/5 0 FB5_6 37 I/O O +iobs/PS_FSM_FFd2 12 7<- 0 0 FB5_7 (b) (b) +ram/RS_FSM_FFd2 8 5<- /\2 0 FB5_8 39 I/O (b) +RA<4> 2 2<- /\5 0 FB5_9 40 I/O O +iobs/PS_FSM_FFd1 2 0 /\2 1 FB5_10 (b) (b) +RA<3> 2 0 0 3 FB5_11 41 I/O O +RA<5> 2 0 0 3 FB5_12 42 I/O O +(unused) 0 0 0 5 FB5_13 (b) RA<2> 2 0 \/1 2 FB5_14 43 I/O O RA<6> 2 1<- \/4 0 FB5_15 46 I/O O -(unused) 0 0 \/5 0 FB5_16 (b) (b) -ram/RAMReady 12 9<- \/2 0 FB5_17 49 I/O (b) -(unused) 0 0 \/5 0 FB5_18 (b) (b) +iobs/IOReady 4 4<- \/5 0 FB5_16 (b) (b) +iobs/Once 15 10<- 0 0 FB5_17 49 I/O (b) +(unused) 0 0 /\5 0 FB5_18 (b) (b) Signals Used by Logic in Function Block - 1: A_FSB<12> 12: A_FSB<5> 23: ram/RAMEN - 2: A_FSB<13> 13: A_FSB<6> 24: ram/RAMReady - 3: A_FSB<14> 14: A_FSB<7> 25: ram/RASEL - 4: A_FSB<15> 15: nRES.PIN 26: ram/RS_FSM_FFd1 - 5: A_FSB<16> 16: cs/nOverlay0 27: ram/RS_FSM_FFd2 - 6: A_FSB<20> 17: cs/nOverlay1 28: ram/RS_FSM_FFd3 - 7: A_FSB<21> 18: fsb/ASrf 29: ram/RefDone - 8: A_FSB<22> 19: fsb/Ready0r 30: ram/RefReq - 9: A_FSB<23> 20: nAS_FSB 31: ram/RefReqSync - 10: A_FSB<3> 21: nWE_FSB 32: ram/RefUrgent - 11: A_FSB<4> 22: ram/BACTr + 1: A_FSB<12> 13: A_FSB<3> 24: iobs/PS_FSM_FFd1 + 2: A_FSB<13> 14: A_FSB<4> 25: iobs/PS_FSM_FFd2 + 3: A_FSB<14> 15: A_FSB<5> 26: nADoutLE1 + 4: A_FSB<15> 16: A_FSB<6> 27: nAS_FSB + 5: A_FSB<16> 17: A_FSB<7> 28: nWE_FSB + 6: A_FSB<17> 18: IOBERR 29: ram/RAMEN + 7: A_FSB<18> 19: cs/nOverlay 30: ram/RASEL + 8: A_FSB<19> 20: fsb/ASrf 31: ram/RS_FSM_FFd1 + 9: A_FSB<20> 21: iobs/IOACTr 32: ram/RS_FSM_FFd2 + 10: A_FSB<21> 22: iobs/IOReady 33: ram/RS_FSM_FFd3 + 11: A_FSB<22> 23: iobs/Once 34: ram/RefUrg + 12: A_FSB<23> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs -ram/RASEL ......XXX.......XX.X.XX..XXX.X.X........ 13 -nROMCS .....XXXX.......X....................... 5 -ram/RefDone .........................XX.X.X......... 4 -cs/nOverlay1 ...............X.X.X.................... 3 -nCAS ........................X............... 1 -nOE ...................XX................... 2 -fsb/Ready0r ......XXX.......XXXX...X................ 8 -cs/nOverlay0 .....XXXX.....XX.X.X.................... 8 -RA<4> ..X........X............X............... 3 -ram/RAMEN ......XXX.......XX.X.XX..XXX.X.X........ 13 -RA<3> .X........X.............X............... 3 -RA<5> ...X........X...........X............... 3 -ram/RS_FSM_FFd2 ......XXX.......XX.X.X...XXX.X.X........ 12 -RA<2> X........X..............X............... 3 -RA<6> ....X........X..........X............... 3 -ram/RAMReady ......XXX.......XX.X.XX..XXX.X.X........ 13 +nROMCS ........XXXX......X..................... 5 +iobs/Load1 .XX.XXXXXXXX......XX..XXXXXX............ 18 +nCAS .............................X.......... 1 +nOE ..........................XX............ 2 +iobs/PS_FSM_FFd2 .XX.XXXXXXXX......XXX.XXXXXX............ 19 +ram/RS_FSM_FFd2 ..........XX......XX......X.X.XXXX...... 10 +RA<4> ..X...........X..............X.......... 3 +iobs/PS_FSM_FFd1 ....................X..XX............... 3 +RA<3> .X...........X...............X.......... 3 +RA<5> ...X...........X.............X.......... 3 +RA<2> X...........X................X.......... 3 +RA<6> ....X...........X............X.......... 3 +iobs/IOReady .................X.XXXX.XXX............. 8 +iobs/Once .XX.XXXXXXXX......XX..XXXXXX............ 18 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB6 *********************************** -Number of function block inputs used/remaining: 32/22 -Number of signals used by logic mapping into function block: 32 +Number of function block inputs used/remaining: 34/20 +Number of signals used by logic mapping into function block: 34 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use iobm/ETACK 1 0 0 4 FB6_1 (b) (b) nVMA_IOB 3 0 0 2 FB6_2 74 I/O O -iobm/DoutOE 2 0 0 3 FB6_3 (b) (b) -iobm/ALE0 2 0 0 3 FB6_4 (b) (b) -iobm/IOS_FSM_FFd3 3 0 0 2 FB6_5 76 I/O I -iobm/ES<3> 3 0 0 2 FB6_6 77 I/O I -iobm/ES<1> 3 0 0 2 FB6_7 (b) (b) -iobm/ES<0> 3 0 0 2 FB6_8 78 I/O I +iobm/IOS_FSM_FFd3 3 0 0 2 FB6_3 (b) (b) +iobm/ES<3> 3 0 0 2 FB6_4 (b) (b) +iobm/ES<1> 3 0 0 2 FB6_5 76 I/O I +iobm/ES<0> 3 0 0 2 FB6_6 77 I/O I +iobm/DoutOE 3 0 0 2 FB6_7 (b) (b) +iobm/ES<4> 4 0 0 1 FB6_8 78 I/O I nLDS_IOB 4 0 0 1 FB6_9 79 I/O O -iobm/ES<4> 4 0 0 1 FB6_10 (b) (b) +iobm/IOS_FSM_FFd2 5 0 0 0 FB6_10 (b) (b) nUDS_IOB 4 0 0 1 FB6_11 80 I/O O nAS_IOB 3 0 0 2 FB6_12 81 I/O O -iobm/IOS_FSM_FFd2 5 0 0 0 FB6_13 (b) (b) +iobm/ES<2> 5 0 0 0 FB6_13 (b) (b) nADoutLE1 2 0 0 3 FB6_14 82 I/O O -nADoutLE0 1 0 0 4 FB6_15 85 I/O O -iobm/ES<2> 5 0 0 0 FB6_16 (b) (b) -nDinLE 1 0 \/1 3 FB6_17 86 I/O O -iobm/IOACT 6 1<- 0 0 FB6_18 (b) (b) +nADoutLE0 1 0 \/1 3 FB6_15 85 I/O O +IOACT 6 1<- 0 0 FB6_16 (b) (b) +nDinLE 1 0 \/4 0 FB6_17 86 I/O O +IOBERR 9 4<- 0 0 FB6_18 (b) (b) Signals Used by Logic in Function Block - 1: C8M 12: iobm/ETACK 23: iobm/VPArr - 2: iobm/ALE0 13: iobm/Er 24: iobs/ALE0 - 3: iobm/BERRrf 14: iobm/Er2 25: iobs/Clear1 - 4: iobm/BERRrr 15: iobm/IOACT 26: iobs/IOL0 - 5: iobm/DTACKrf 16: iobm/IOREQr 27: iobs/IORW0 - 6: iobm/DTACKrr 17: iobm/IOS_FSM_FFd1 28: iobs/IOU0 - 7: iobm/ES<0> 18: iobm/IOS_FSM_FFd2 29: iobs/Load1 - 8: iobm/ES<1> 19: iobm/IOS_FSM_FFd3 30: nADoutLE1 - 9: iobm/ES<2> 20: iobm/RESrf 31: nAoutOE - 10: iobm/ES<3> 21: iobm/RESrr 32: nVMA_IOB - 11: iobm/ES<4> 22: iobm/VPArf + 1: ALE0M 13: iobm/ES<0> 24: iobm/IOS_FSM_FFd3 + 2: ALE0S 14: iobm/ES<1> 25: iobm/RESrf + 3: C8M 15: iobm/ES<2> 26: iobm/RESrr + 4: IOACT 16: iobm/ES<3> 27: iobm/VPArf + 5: IOBERR 17: iobm/ES<4> 28: iobm/VPArr + 6: IOL0 18: iobm/ETACK 29: iobs/Clear1 + 7: IORW0 19: iobm/Er 30: iobs/Load1 + 8: IOU0 20: iobm/Er2 31: nADoutLE1 + 9: iobm/BERRrf 21: iobm/IOREQr 32: nAoutOE + 10: iobm/BERRrr 22: iobm/IOS_FSM_FFd1 33: nBERR_IOB + 11: iobm/DTACKrf 23: iobm/IOS_FSM_FFd2 34: nVMA_IOB + 12: iobm/DTACKrr Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs -iobm/ETACK ......XXXXX....................X........ 6 -nVMA_IOB ......XXXXX...X......XX.......XX........ 10 -iobm/DoutOE .................XX.......X............. 3 -iobm/ALE0 ...............XXXX..................... 4 -iobm/IOS_FSM_FFd3 X..............XXXX...........X......... 6 -iobm/ES<3> ......XXXX..XX.......................... 6 -iobm/ES<1> ......XX....XX.......................... 4 -iobm/ES<0> ......XXXXX.XX.......................... 7 -nLDS_IOB ................XXX......XX...X......... 6 -iobm/ES<4> ......XXXXX.XX.......................... 7 -nUDS_IOB ................XXX.......XX..X......... 6 -nAS_IOB ................XXX...........X......... 4 -iobm/IOS_FSM_FFd2 X.XXXX.....X....XXXXX................... 11 -nADoutLE1 ........................X...XX.......... 3 -nADoutLE0 .X.....................X................ 2 -iobm/ES<2> ......XXXXX.XX.......................... 7 -nDinLE ................XX...................... 2 -iobm/IOACT X.XXXX.....X...XXXXXX................... 12 +iobm/ETACK ............XXXXX................X...... 6 +nVMA_IOB ...X........XXXXX.........XX...X.X...... 10 +iobm/IOS_FSM_FFd3 ..X.................XXXX.......X........ 6 +iobm/ES<3> ............XXXX..XX.................... 6 +iobm/ES<1> ............XX....XX.................... 4 +iobm/ES<0> ............XXXXX.XX.................... 7 +iobm/DoutOE ......X.............XXXX.......X........ 6 +iobm/ES<4> ............XXXXX.XX.................... 7 +nLDS_IOB .....XX..............XXX.......X........ 6 +iobm/IOS_FSM_FFd2 ..X.....XXXX.....X...XXXXX.............. 11 +nUDS_IOB ......XX.............XXX.......X........ 6 +nAS_IOB .....................XXX.......X........ 4 +iobm/ES<2> ............XXXXX.XX.................... 7 +nADoutLE1 ............................XXX......... 3 +nADoutLE0 XX...................................... 2 +IOACT ..X.....XXXX.....X..XXXXXX.............. 12 +nDinLE .....................XX................. 2 +IOBERR ..X.X...XXXX.....X...XXXXX......X....... 13 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB7 *********************************** -Number of function block inputs used/remaining: 30/24 -Number of signals used by logic mapping into function block: 30 +Number of function block inputs used/remaining: 31/23 +Number of signals used by logic mapping into function block: 31 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use -cnt/LTimer<13> 3 0 0 2 FB7_1 (b) (b) +cnt/LTimerTC 2 0 0 3 FB7_1 (b) (b) RA<1> 2 0 0 3 FB7_2 50 I/O O -cnt/LTimer<9> 4 0 0 1 FB7_3 (b) (b) -cnt/LTimer<8> 4 0 0 1 FB7_4 (b) (b) +cnt/LTimer<9> 2 0 0 3 FB7_3 (b) (b) +cnt/LTimer<8> 2 0 0 3 FB7_4 (b) (b) RA<7> 2 0 0 3 FB7_5 52 I/O O RA<0> 2 0 0 3 FB7_6 53 I/O O -cnt/LTimer<7> 4 0 \/1 0 FB7_7 (b) (b) -RA<8> 7 2<- 0 0 FB7_8 54 I/O O -RA<10> 1 0 /\1 3 FB7_9 55 I/O O -cnt/LTimer<6> 4 0 0 1 FB7_10 (b) (b) +cnt/LTimer<7> 2 0 0 3 FB7_7 (b) (b) +RA<8> 5 0 0 0 FB7_8 54 I/O O +RA<10> 1 0 0 4 FB7_9 55 I/O O +cnt/LTimer<6> 2 0 0 3 FB7_10 (b) (b) RA<9> 2 0 0 3 FB7_11 56 I/O O C25MEN 0 0 0 5 FB7_12 58 I/O O -cnt/LTimer<5> 4 0 0 1 FB7_13 (b) (b) +cnt/LTimer<5> 2 0 0 3 FB7_13 (b) (b) C20MEN 0 0 0 5 FB7_14 59 I/O O -cnt/LTimer<4> 4 0 0 1 FB7_15 60 I/O (b) -cnt/LTimer<12> 4 0 0 1 FB7_16 (b) (b) -cnt/LTimer<11> 4 0 0 1 FB7_17 61 I/O (b) -cnt/LTimer<10> 4 0 0 1 FB7_18 (b) (b) +cnt/LTimer<4> 2 0 0 3 FB7_15 60 I/O (b) +cnt/LTimer<12> 2 0 0 3 FB7_16 (b) (b) +cnt/LTimer<11> 2 0 0 3 FB7_17 61 I/O (b) +cnt/LTimer<10> 2 0 0 3 FB7_18 (b) (b) Signals Used by Logic in Function Block - 1: A_FSB<10> 11: A_FSB<2> 21: cnt/LTimer<3> - 2: A_FSB<11> 12: A_FSB<8> 22: cnt/LTimer<4> - 3: A_FSB<17> 13: A_FSB<9> 23: cnt/LTimer<5> - 4: A_FSB<18> 14: cnt/LTimer<0> 24: cnt/LTimer<6> - 5: A_FSB<19> 15: cnt/LTimer<10> 25: cnt/LTimer<7> - 6: A_FSB<1> 16: cnt/LTimer<11> 26: cnt/LTimer<8> - 7: A_FSB<20> 17: cnt/LTimer<12> 27: cnt/LTimer<9> - 8: A_FSB<21> 18: cnt/LTimer<13> 28: cnt/TimerTC - 9: A_FSB<22> 19: cnt/LTimer<1> 29: cs/nOverlay1 - 10: A_FSB<23> 20: cnt/LTimer<2> 30: ram/RASEL + 1: A_FSB<10> 12: A_FSB<8> 22: cnt/LTimer<3> + 2: A_FSB<11> 13: A_FSB<9> 23: cnt/LTimer<4> + 3: A_FSB<17> 14: cnt/Er<0> 24: cnt/LTimer<5> + 4: A_FSB<18> 15: cnt/Er<1> 25: cnt/LTimer<6> + 5: A_FSB<19> 16: cnt/LTimer<0> 26: cnt/LTimer<7> + 6: A_FSB<1> 17: cnt/LTimer<10> 27: cnt/LTimer<8> + 7: A_FSB<20> 18: cnt/LTimer<11> 28: cnt/LTimer<9> + 8: A_FSB<21> 19: cnt/LTimer<12> 29: cnt/TimerTC + 9: A_FSB<22> 20: cnt/LTimer<1> 30: cs/nOverlay + 10: A_FSB<23> 21: cnt/LTimer<2> 31: ram/RASEL + 11: A_FSB<2> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs -cnt/LTimer<13> .............XXXXXXXXXXXXXXX............ 15 -RA<1> .X........X..................X.......... 3 -cnt/LTimer<9> .............X...XXXXXXXXXXX............ 12 -cnt/LTimer<8> .............X...XXXXXXXXX.X............ 11 -RA<7> ..X........X.................X.......... 3 -RA<0> X....X.......................X.......... 3 -cnt/LTimer<7> .............X...XXXXXXXX..X............ 10 -RA<8> ...X...XXX..X...............XX.......... 7 +cnt/LTimerTC .............XXXXXXXXXXXXXXXX........... 16 +RA<1> .X........X...................X......... 3 +cnt/LTimer<9> .............XXX...XXXXXXXX.X........... 12 +cnt/LTimer<8> .............XXX...XXXXXXX..X........... 11 +RA<7> ..X........X..................X......... 3 +RA<0> X....X........................X......... 3 +cnt/LTimer<7> .............XXX...XXXXXX...X........... 10 +RA<8> ...X....XX..X................XX......... 6 RA<10> .......X................................ 1 -cnt/LTimer<6> .............X...XXXXXXX...X............ 9 -RA<9> ....X.X......................X.......... 3 +cnt/LTimer<6> .............XXX...XXXXX....X........... 9 +RA<9> ....X.X.......................X......... 3 C25MEN ........................................ 0 -cnt/LTimer<5> .............X...XXXXXX....X............ 8 +cnt/LTimer<5> .............XXX...XXXX.....X........... 8 C20MEN ........................................ 0 -cnt/LTimer<4> .............X...XXXXX.....X............ 7 -cnt/LTimer<12> .............XXXXXXXXXXXXXXX............ 15 -cnt/LTimer<11> .............XXX.XXXXXXXXXXX............ 14 -cnt/LTimer<10> .............XX..XXXXXXXXXXX............ 13 +cnt/LTimer<4> .............XXX...XXX......X........... 7 +cnt/LTimer<12> .............XXXXX.XXXXXXXXXX........... 15 +cnt/LTimer<11> .............XXXX..XXXXXXXXXX........... 14 +cnt/LTimer<10> .............XXX...XXXXXXXXXX........... 13 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB8 *********************************** -Number of function block inputs used/remaining: 33/21 -Number of signals used by logic mapping into function block: 33 +Number of function block inputs used/remaining: 35/19 +Number of signals used by logic mapping into function block: 35 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use -iobs/Once 15 10<- 0 0 FB8_1 (b) (b) +ram/RASEL 14 9<- 0 0 FB8_1 (b) (b) RA<11> 1 1<- /\5 0 FB8_2 63 I/O O -iobs/Clear1 1 0 /\1 3 FB8_3 (b) (b) -iobs/ALE0 1 0 0 4 FB8_4 (b) (b) -nRAS 3 0 0 2 FB8_5 64 I/O O +cnt/Timer<2> 5 1<- /\1 0 FB8_3 (b) (b) +cnt/Timer<0> 2 0 /\1 2 FB8_4 (b) (b) +nRAS 0 0 0 5 FB8_5 64 I/O O nRAMLWE 1 0 0 4 FB8_6 65 I/O O -iobs/PS_FSM_FFd1 2 0 \/1 2 FB8_7 (b) (b) -nRAMUWE 1 1<- \/5 0 FB8_8 66 I/O O -ram/RS_FSM_FFd1 8 5<- \/2 0 FB8_9 67 I/O (b) -(unused) 0 0 \/5 0 FB8_10 (b) (b) -ram/RS_FSM_FFd3 9 7<- \/3 0 FB8_11 68 I/O (b) -nBERR_FSB 4 3<- \/4 0 FB8_12 70 I/O O +cnt/INITS_FSM_FFd2 2 0 0 3 FB8_7 (b) (b) +nRAMUWE 1 0 0 4 FB8_8 66 I/O O +fsb/Ready0r 2 0 \/2 1 FB8_9 67 I/O (b) +cnt/Timer<1> 4 2<- \/3 0 FB8_10 (b) (b) +ram/RAMReady 9 4<- 0 0 FB8_11 68 I/O (b) +nBERR_FSB 4 0 /\1 0 FB8_12 70 I/O O (unused) 0 0 \/5 0 FB8_13 (b) (b) -iobs/PS_FSM_FFd2 12 9<- \/2 0 FB8_14 71 I/O (b) -nBR_IOB 2 2<- \/5 0 FB8_15 72 I/O O -iobs/Load1 14 9<- 0 0 FB8_16 (b) (b) -ram/BACTr 1 0 /\4 0 FB8_17 73 I/O (b) -(unused) 0 0 \/5 0 FB8_18 (b) (b) +ram/RAMEN 9 5<- \/1 0 FB8_14 71 I/O (b) +nBR_IOB 2 1<- \/4 0 FB8_15 72 I/O O +ram/RS_FSM_FFd3 13 8<- 0 0 FB8_16 (b) (b) +cnt/INITS_FSM_FFd1 1 0 /\4 0 FB8_17 73 I/O (b) +cnt/LTimer<0> 1 0 \/4 0 FB8_18 (b) (b) Signals Used by Logic in Function Block - 1: A_FSB<13> 12: cnt/PORS_FSM_FFd1 23: nBERR_FSB - 2: A_FSB<14> 13: cnt/PORS_FSM_FFd2 24: nBR_IOB - 3: A_FSB<16> 14: cs/nOverlay1 25: nLDS_FSB - 4: A_FSB<17> 15: fsb/ASrf 26: nUDS_FSB - 5: A_FSB<18> 16: iobm/IOBERR 27: nWE_FSB - 6: A_FSB<19> 17: iobs/IOACTr 28: ram/RAMEN - 7: A_FSB<20> 18: iobs/Once 29: ram/RS_FSM_FFd1 - 8: A_FSB<21> 19: iobs/PS_FSM_FFd1 30: ram/RS_FSM_FFd2 - 9: A_FSB<22> 20: iobs/PS_FSM_FFd2 31: ram/RS_FSM_FFd3 - 10: A_FSB<23> 21: nADoutLE1 32: ram/RefRAS - 11: cnt/IPL2r 22: nAS_FSB 33: ram/RefUrgent + 1: A_FSB<19> 13: cnt/TimerTC 25: nLDS_FSB + 2: A_FSB<22> 14: cnt/nIPL2r 26: nUDS_FSB + 3: A_FSB<23> 15: cs/nOverlay 27: nWE_FSB + 4: IOBERR 16: fsb/ASrf 28: ram/BACTr + 5: cnt/Er<0> 17: fsb/Ready0r 29: ram/RAMEN + 6: cnt/Er<1> 18: iobs/IOACTr 30: ram/RAMReady + 7: cnt/INITS_FSM_FFd1 19: iobs/Once 31: ram/RS_FSM_FFd1 + 8: cnt/INITS_FSM_FFd2 20: iobs/PS_FSM_FFd2 32: ram/RS_FSM_FFd2 + 9: cnt/LTimerTC 21: nADoutLE1 33: ram/RS_FSM_FFd3 + 10: cnt/Timer<0> 22: nAS_FSB 34: ram/RefReq + 11: cnt/Timer<1> 23: nBERR_FSB 35: ram/RefUrg + 12: cnt/Timer<2> 24: nBR_IOB Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs -iobs/Once XXXXXXXXXX...XX..XXXXX....X............. 18 -RA<11> .....X.................................. 1 -iobs/Clear1 ..................XXX................... 3 -iobs/ALE0 ..................XX.................... 2 -nRAS .......XXX...X.......X.....X...X........ 7 -nRAMLWE .....................X..X.XX............ 4 -iobs/PS_FSM_FFd1 ................X.XX.................... 3 -nRAMUWE .....................X...XXX............ 4 -ram/RS_FSM_FFd1 .......XXX...XX......X.....XXXX.X....... 11 -ram/RS_FSM_FFd3 .......XXX...XX......X.....XXXX.X....... 11 -nBERR_FSB ..............XXXX.XXXX................. 8 -iobs/PS_FSM_FFd2 XXXXXXXXXX...XX.XXXXXX....X............. 19 -nBR_IOB ..........XXX..........X................ 4 -iobs/Load1 XXXXXXXXXX...XX..XXXXX....X............. 18 -ram/BACTr ..............X......X.................. 2 +ram/RASEL .XX...........XX.....X.....XX.XXXXX..... 12 +RA<11> X....................................... 1 +cnt/Timer<2> ....XX...XXXX........................... 6 +cnt/Timer<0> ....XX...X..X........................... 4 +nRAS ........................................ 0 +nRAMLWE .....................X..X.X.X........... 4 +cnt/INITS_FSM_FFd2 ....XXXXX...X........................... 6 +nRAMUWE .....................X...XX.X........... 4 +fsb/Ready0r .XX...........XXX....X.......X.......... 7 +cnt/Timer<1> ....XX...XX.X........................... 5 +ram/RAMReady .XX...........XX.....X.....XX.XXXXX..... 12 +nBERR_FSB ...X...........X.XXXXXX................. 8 +ram/RAMEN .XX...........XX.....X.....XX.XXXXX..... 12 +nBR_IOB ......XX.....X.........X................ 4 +ram/RS_FSM_FFd3 .XX...........XX.....X.....XX.XXXXX..... 12 +cnt/INITS_FSM_FFd1 ....XXXXX...XX.......................... 7 +cnt/LTimer<0> ....XX......X........................... 3 0----+----1----+----2----+----3----+----4 0 0 0 0 ******************************* Equations ******************************** ********** Mapped Logic ********** +FDCPE_ALE0M: FDCPE port map (ALE0M,ALE0M_D,C16M,'0','0'); +ALE0M_D <= ((iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2) + OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2 AND + NOT iobm/IOREQr)); -assign C20MEN = 1'b1; +FDCPE_ALE0S: FDCPE port map (ALE0S,ALE0S_D,FCLK,'0','0'); +ALE0S_D <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1); -assign C25MEN = 1'b1; +C20MEN <= '1'; +C25MEN <= '1'; @@ -751,855 +755,831 @@ assign C25MEN = 1'b1; - - - - - -assign RA[0] = ((A_FSB[10] && !ram/RASEL) - || (ram/RASEL && A_FSB[1])); - - -assign RA[1] = ((A_FSB[11] && !ram/RASEL) - || (ram/RASEL && A_FSB[2])); - - -assign RA[2] = ((A_FSB[12] && !ram/RASEL) - || (ram/RASEL && A_FSB[3])); - - -assign RA[3] = ((A_FSB[13] && !ram/RASEL) - || (ram/RASEL && A_FSB[4])); - - -assign RA[4] = ((ram/RASEL && A_FSB[5]) - || (A_FSB[14] && !ram/RASEL)); - - -assign RA[5] = ((A_FSB[15] && !ram/RASEL) - || (ram/RASEL && A_FSB[6])); - - -assign RA[6] = ((ram/RASEL && A_FSB[7]) - || (A_FSB[16] && !ram/RASEL)); - - -assign RA[7] = ((A_FSB[8] && ram/RASEL) - || (A_FSB[17] && !ram/RASEL)); - - -assign RA[8] = ((A_FSB[9] && !A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && - ram/RASEL) - || (A_FSB[9] && !A_FSB[23] && A_FSB[22] && A_FSB[21] && - !cs/nOverlay1 && ram/RASEL) - || (A_FSB[23] && A_FSB[18]) - || (A_FSB[18] && !ram/RASEL) - || (A_FSB[22] && !A_FSB[21] && A_FSB[18]) - || (A_FSB[22] && A_FSB[18] && cs/nOverlay1) - || (!A_FSB[22] && A_FSB[18] && !cs/nOverlay1)); - - -assign RA[9] = ((A_FSB[20] && ram/RASEL) - || (A_FSB[19] && !ram/RASEL)); - - -assign RA[10] = A_FSB[21]; - - -assign RA[11] = A_FSB[19]; - -FDCPE FDCPE_cnt/IPL2r (cnt/IPL2r,!nIPL2,!C8M,1'b0,1'b0); - -FTCPE FTCPE_cnt/LTimer0 (cnt/LTimer[0],cnt/LTimer_T[0],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_T[0] = (!cnt/LTimer[0] && cnt/LTimer[13] && cnt/TimerTC); - -FDCPE FDCPE_cnt/LTimer1 (cnt/LTimer[1],cnt/LTimer_D[1],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_D[1] = ((cnt/LTimer[0] && cnt/LTimer[1]) - || (!cnt/LTimer[0] && !cnt/LTimer[1]) - || (cnt/LTimer[13] && cnt/TimerTC)); - -FTCPE FTCPE_cnt/LTimer2 (cnt/LTimer[2],cnt/LTimer_T[2],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_T[2] = ((cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1]) - || (cnt/LTimer[0] && cnt/LTimer[1] && !cnt/TimerTC) - || (cnt/LTimer[13] && cnt/LTimer[2] && cnt/TimerTC)); - -FTCPE FTCPE_cnt/LTimer3 (cnt/LTimer[3],cnt/LTimer_T[3],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_T[3] = ((cnt/LTimer[13] && cnt/LTimer[3] && cnt/TimerTC) - || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && - cnt/LTimer[2]) - || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && - !cnt/TimerTC)); - -FTCPE FTCPE_cnt/LTimer4 (cnt/LTimer[4],cnt/LTimer_T[4],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_T[4] = ((cnt/LTimer[13] && cnt/LTimer[4] && cnt/TimerTC) - || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && - cnt/LTimer[2] && cnt/LTimer[3]) - || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && - cnt/LTimer[3] && !cnt/TimerTC)); - -FTCPE FTCPE_cnt/LTimer5 (cnt/LTimer[5],cnt/LTimer_T[5],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_T[5] = ((cnt/LTimer[13] && cnt/LTimer[5] && cnt/TimerTC) - || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && - cnt/LTimer[2] && cnt/LTimer[3] && cnt/LTimer[4]) - || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && - cnt/LTimer[3] && cnt/LTimer[4] && !cnt/TimerTC)); - -FTCPE FTCPE_cnt/LTimer6 (cnt/LTimer[6],cnt/LTimer_T[6],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_T[6] = ((cnt/LTimer[13] && cnt/LTimer[6] && cnt/TimerTC) - || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && - cnt/LTimer[2] && cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4]) - || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && - cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && !cnt/TimerTC)); - -FTCPE FTCPE_cnt/LTimer7 (cnt/LTimer[7],cnt/LTimer_T[7],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_T[7] = ((cnt/LTimer[13] && cnt/LTimer[7] && cnt/TimerTC) - || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && - cnt/LTimer[2] && cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && - cnt/LTimer[6]) - || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && - cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && cnt/LTimer[6] && - !cnt/TimerTC)); - -FTCPE FTCPE_cnt/LTimer8 (cnt/LTimer[8],cnt/LTimer_T[8],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_T[8] = ((cnt/LTimer[13] && cnt/LTimer[8] && cnt/TimerTC) - || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && - cnt/LTimer[2] && cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && - cnt/LTimer[6] && cnt/LTimer[7]) - || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && - cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && cnt/LTimer[6] && - cnt/LTimer[7] && !cnt/TimerTC)); - -FTCPE FTCPE_cnt/LTimer9 (cnt/LTimer[9],cnt/LTimer_T[9],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_T[9] = ((cnt/LTimer[13] && cnt/LTimer[9] && cnt/TimerTC) - || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && - cnt/LTimer[2] && cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && - cnt/LTimer[6] && cnt/LTimer[7] && cnt/LTimer[8]) - || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && - cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && cnt/LTimer[6] && - cnt/LTimer[7] && cnt/LTimer[8] && !cnt/TimerTC)); - -FTCPE FTCPE_cnt/LTimer10 (cnt/LTimer[10],cnt/LTimer_T[10],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_T[10] = ((cnt/LTimer[13] && cnt/LTimer[10] && cnt/TimerTC) - || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && - cnt/LTimer[2] && cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && - cnt/LTimer[6] && cnt/LTimer[7] && cnt/LTimer[9] && cnt/LTimer[8]) - || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && - cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && cnt/LTimer[6] && - cnt/LTimer[7] && cnt/LTimer[9] && cnt/LTimer[8] && !cnt/TimerTC)); - -FTCPE FTCPE_cnt/LTimer11 (cnt/LTimer[11],cnt/LTimer_T[11],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_T[11] = ((cnt/LTimer[13] && cnt/LTimer[11] && cnt/TimerTC) - || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && - cnt/LTimer[2] && cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && - cnt/LTimer[6] && cnt/LTimer[7] && cnt/LTimer[9] && cnt/LTimer[10] && - cnt/LTimer[8]) - || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && - cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && cnt/LTimer[6] && - cnt/LTimer[7] && cnt/LTimer[9] && cnt/LTimer[10] && cnt/LTimer[8] && - !cnt/TimerTC)); - -FTCPE FTCPE_cnt/LTimer12 (cnt/LTimer[12],cnt/LTimer_T[12],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_T[12] = ((cnt/LTimer[13] && cnt/LTimer[12] && cnt/TimerTC) - || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && - cnt/LTimer[2] && cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && - cnt/LTimer[6] && cnt/LTimer[7] && cnt/LTimer[9] && cnt/LTimer[10] && - cnt/LTimer[11] && cnt/LTimer[8]) - || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && - cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && cnt/LTimer[6] && - cnt/LTimer[7] && cnt/LTimer[9] && cnt/LTimer[10] && cnt/LTimer[11] && - cnt/LTimer[8] && !cnt/TimerTC)); - -FTCPE FTCPE_cnt/LTimer13 (cnt/LTimer[13],cnt/LTimer_T[13],!C8M,1'b0,1'b0,cnt/TimerTC); -assign cnt/LTimer_T[13] = ((cnt/LTimer[13] && cnt/TimerTC) - || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && - cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && cnt/LTimer[6] && - cnt/LTimer[7] && cnt/LTimer[9] && cnt/LTimer[10] && cnt/LTimer[11] && - cnt/LTimer[8] && cnt/LTimer[12])); - -FTCPE FTCPE_cnt/PORS_FSM_FFd1 (cnt/PORS_FSM_FFd1,cnt/PORS_FSM_FFd1_T,!C8M,1'b0,1'b0); -assign cnt/PORS_FSM_FFd1_T = (cnt/LTimer[13] && !cnt/PORS_FSM_FFd1 && - cnt/PORS_FSM_FFd2 && !cnt/IPL2r); - -FDCPE FDCPE_cnt/PORS_FSM_FFd2 (cnt/PORS_FSM_FFd2,cnt/PORS_FSM_FFd2_D,!C8M,1'b0,1'b0); -assign cnt/PORS_FSM_FFd2_D = ((cnt/LTimer[13] && !cnt/PORS_FSM_FFd1) - || (!cnt/LTimer[13] && cnt/PORS_FSM_FFd2)); - -FDCPE FDCPE_cnt/RefReq (cnt/RefReq,cnt/RefReq_D,E,1'b0,1'b0); -assign cnt/RefReq_D = ((cnt/Timer[1] && !cnt/Timer[3]) - || (cnt/Timer[2] && !cnt/Timer[3]) - || (!cnt/Timer[1] && !cnt/Timer[2] && !cnt/Timer[0] && - cnt/Timer[3])); - -FDCPE FDCPE_cnt/RefUrgent (cnt/RefUrgent,cnt/RefUrgent_D,E,1'b0,1'b0); -assign cnt/RefUrgent_D = ((cnt/Timer[1] && cnt/Timer[2] && !cnt/Timer[3]) - || (!cnt/Timer[1] && !cnt/Timer[2] && !cnt/Timer[0] && - cnt/Timer[3])); - -FDCPE FDCPE_cnt/Timer0 (cnt/Timer[0],cnt/Timer_D[0],E,1'b0,1'b0); -assign cnt/Timer_D[0] = (!cnt/TimerTC && !cnt/Timer[0]); - -FDCPE FDCPE_cnt/Timer1 (cnt/Timer[1],cnt/Timer_D[1],E,1'b0,1'b0); -assign cnt/Timer_D[1] = ((!cnt/TimerTC && cnt/Timer[1] && !cnt/Timer[0]) - || (!cnt/TimerTC && !cnt/Timer[1] && cnt/Timer[0])); - -FTCPE FTCPE_cnt/Timer2 (cnt/Timer[2],cnt/Timer_T[2],E,1'b0,1'b0); -assign cnt/Timer_T[2] = ((cnt/TimerTC && cnt/Timer[2]) - || (!cnt/TimerTC && cnt/Timer[1] && cnt/Timer[0])); - -FTCPE FTCPE_cnt/Timer3 (cnt/Timer[3],cnt/Timer_T[3],E,1'b0,1'b0); -assign cnt/Timer_T[3] = ((cnt/TimerTC && cnt/Timer[3]) - || (!cnt/TimerTC && cnt/Timer[1] && cnt/Timer[2] && - cnt/Timer[0])); - -FDCPE FDCPE_cnt/TimerTC (cnt/TimerTC,cnt/TimerTC_D,E,1'b0,1'b0); -assign cnt/TimerTC_D = (!cnt/Timer[1] && !cnt/Timer[2] && !cnt/Timer[0] && - cnt/Timer[3]); - -FDCPE FDCPE_cnt/nRESout (cnt/nRESout,cnt/nRESout_D,!C8M,1'b0,1'b0); -assign cnt/nRESout_D = ((cnt/LTimer[13] && cnt/PORS_FSM_FFd1 && - !cnt/PORS_FSM_FFd2) - || (cnt/PORS_FSM_FFd1 && !cnt/PORS_FSM_FFd2 && - cnt/nRESout)); - -FTCPE FTCPE_cs/nOverlay0 (cs/nOverlay0,cs/nOverlay0_T,FCLK,!nRES.PIN,1'b0); -assign cs/nOverlay0_T = ((!A_FSB[23] && A_FSB[22] && !A_FSB[21] && !A_FSB[20] && - !cs/nOverlay0 && !nAS_FSB) - || (!A_FSB[23] && A_FSB[22] && !A_FSB[21] && !A_FSB[20] && - !cs/nOverlay0 && fsb/ASrf)); - -FDCPE FDCPE_cs/nOverlay1 (cs/nOverlay1,cs/nOverlay0,FCLK,1'b0,1'b0,cs/nOverlay1_CE); -assign cs/nOverlay1_CE = (nAS_FSB && !fsb/ASrf); - -FDCPE FDCPE_fsb/ASrf (fsb/ASrf,!nAS_FSB,!FCLK,1'b0,1'b0); - -FDCPE FDCPE_fsb/Ready0r (fsb/Ready0r,fsb/Ready0r_D,FCLK,1'b0,1'b0); -assign fsb/Ready0r_D = ((nAS_FSB && !fsb/ASrf) - || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && - !fsb/Ready0r && !ram/RAMReady) - || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && - !cs/nOverlay1 && !fsb/Ready0r && !ram/RAMReady)); - -FDCPE FDCPE_fsb/Ready1r (fsb/Ready1r,fsb/Ready1r_D,FCLK,1'b0,1'b0); -assign fsb/Ready1r_D = ((A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && - !fsb/Ready1r && !iobs/IOReady && !nADoutLE1) - || (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && - !fsb/Ready1r && !iobs/IOReady && !nADoutLE1) - || (nAS_FSB && !fsb/ASrf) - || (A_FSB[23] && !fsb/Ready1r && !iobs/IOReady) - || (A_FSB[22] && A_FSB[21] && !fsb/Ready1r && - !iobs/IOReady) - || (A_FSB[22] && A_FSB[20] && !fsb/Ready1r && - !iobs/IOReady)); - -FDCPE FDCPE_fsb/VPA (fsb/VPA,fsb/VPA_D,FCLK,1'b0,1'b0); -assign fsb/VPA_D = ((EXP15_.EXP) - || (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && - !fsb/Ready1r && fsb/VPA && !iobs/IOReady && !nAS_FSB && !nADoutLE1) - || (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && - !fsb/Ready1r && fsb/VPA && !iobs/IOReady && fsb/ASrf && !nADoutLE1) - || (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && - !fsb/Ready1r && fsb/VPA && !iobs/IOReady && !nAS_FSB && !nADoutLE1) - || (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && - !fsb/Ready1r && fsb/VPA && !iobs/IOReady && fsb/ASrf && !nADoutLE1) - || (A_FSB[9] && A_FSB[8] && A_FSB[15] && A_FSB[14] && - A_FSB[13] && A_FSB[12] && A_FSB[11] && A_FSB[10] && A_FSB[23] && - A_FSB[22] && A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && - A_FSB[17] && A_FSB[16] && iobs/IOReady && !nAS_FSB) - || (A_FSB[22] && A_FSB[20] && !fsb/Ready1r && fsb/VPA && - !iobs/IOReady && fsb/ASrf) - || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && - !fsb/Ready0r && fsb/VPA && !nAS_FSB && !ram/RAMReady) - || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && - !fsb/Ready0r && fsb/VPA && fsb/ASrf && !ram/RAMReady) - || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && - !cs/nOverlay1 && !fsb/Ready0r && fsb/VPA && !nAS_FSB && !ram/RAMReady) - || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && - !cs/nOverlay1 && !fsb/Ready0r && fsb/VPA && fsb/ASrf && !ram/RAMReady) - || (A_FSB[23] && !fsb/Ready1r && fsb/VPA && - !iobs/IOReady && !nAS_FSB) - || (A_FSB[23] && !fsb/Ready1r && fsb/VPA && - !iobs/IOReady && fsb/ASrf) - || (A_FSB[22] && A_FSB[21] && !fsb/Ready1r && fsb/VPA && - !iobs/IOReady && !nAS_FSB) - || (A_FSB[22] && A_FSB[21] && !fsb/Ready1r && fsb/VPA && - !iobs/IOReady && fsb/ASrf) - || (A_FSB[22] && A_FSB[20] && !fsb/Ready1r && fsb/VPA && - !iobs/IOReady && !nAS_FSB)); - -FDCPE FDCPE_iobm/ALE0 (iobm/ALE0,iobm/ALE0_D,C16M,1'b0,1'b0); -assign iobm/ALE0_D = ((iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2) - || (!iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd2 && - !iobm/IOREQr)); - -FDCPE FDCPE_iobm/BERRrf (iobm/BERRrf,!nBERR_IOB,!C16M,1'b0,1'b0); - -FDCPE FDCPE_iobm/BERRrr (iobm/BERRrr,!nBERR_IOB,C16M,1'b0,1'b0); - -FDCPE FDCPE_iobm/DTACKrf (iobm/DTACKrf,!nDTACK_IOB,!C16M,1'b0,1'b0); - -FDCPE FDCPE_iobm/DTACKrr (iobm/DTACKrr,!nDTACK_IOB,C16M,1'b0,1'b0); - -FDCPE FDCPE_iobm/DoutOE (iobm/DoutOE,iobm/DoutOE_D,C16M,1'b0,1'b0); -assign iobm/DoutOE_D = ((iobs/IORW0 && iobm/IOS_FSM_FFd3) - || (iobs/IORW0 && iobm/IOS_FSM_FFd2)); - -FTCPE FTCPE_iobm/ES0 (iobm/ES[0],iobm/ES_T[0],C16M,1'b0,1'b0); -assign iobm/ES_T[0] = ((iobm/ES[0] && !iobm/Er && iobm/Er2) - || (!iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] && - !iobm/ES[3] && !iobm/ES[4] && iobm/Er) - || (!iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] && - !iobm/ES[3] && !iobm/ES[4] && !iobm/Er2)); - -FDCPE FDCPE_iobm/ES1 (iobm/ES[1],iobm/ES_D[1],C16M,1'b0,1'b0); -assign iobm/ES_D[1] = ((iobm/ES[0] && iobm/ES[1]) - || (!iobm/ES[0] && !iobm/ES[1]) - || (!iobm/Er && iobm/Er2)); - -FDCPE FDCPE_iobm/ES2 (iobm/ES[2],iobm/ES_D[2],C16M,1'b0,1'b0); -assign iobm/ES_D[2] = ((!iobm/ES[0] && !iobm/ES[2]) - || (!iobm/ES[1] && !iobm/ES[2]) - || (!iobm/Er && iobm/Er2) - || (iobm/ES[0] && iobm/ES[1] && iobm/ES[2]) - || (!iobm/ES[2] && !iobm/ES[3] && iobm/ES[4])); - -FTCPE FTCPE_iobm/ES3 (iobm/ES[3],iobm/ES_T[3],C16M,1'b0,1'b0); -assign iobm/ES_T[3] = ((iobm/ES[3] && !iobm/Er && iobm/Er2) - || (iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && iobm/Er) - || (iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && !iobm/Er2)); - -FTCPE FTCPE_iobm/ES4 (iobm/ES[4],iobm/ES_T[4],C16M,1'b0,1'b0); -assign iobm/ES_T[4] = ((iobm/ES[4] && !iobm/Er && iobm/Er2) - || (iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && - iobm/ES[3] && iobm/Er) - || (iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && - iobm/ES[3] && !iobm/Er2) - || (iobm/ES[0] && iobm/ES[1] && !iobm/ES[2] && - !iobm/ES[3] && iobm/ES[4])); - -FDCPE FDCPE_iobm/ETACK (iobm/ETACK,iobm/ETACK_D,C16M,1'b0,1'b0); -assign iobm/ETACK_D = (!nVMA_IOB && !iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] && - !iobm/ES[3] && iobm/ES[4]); - -FDCPE FDCPE_iobm/Er (iobm/Er,E,!C8M,1'b0,1'b0); - -FDCPE FDCPE_iobm/Er2 (iobm/Er2,iobm/Er,C16M,1'b0,1'b0); - -FDCPE FDCPE_iobm/IOACT (iobm/IOACT,iobm/IOACT_D,C16M,1'b0,1'b0); -assign iobm/IOACT_D = ((C8M && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && - iobm/RESrf && iobm/RESrr) - || (iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2) - || (!iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd2 && - !iobm/IOREQr) - || (C8M && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && +FDCPE_IOACT: FDCPE port map (IOACT,IOACT_D,C16M,'0','0'); +IOACT_D <= ((C8M AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND + iobm/RESrf AND iobm/RESrr) + OR (iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2) + OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2 AND + NOT iobm/IOREQr) + OR (C8M AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND iobm/ETACK) - || (C8M && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && - iobm/BERRrf && iobm/BERRrr) - || (C8M && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && - iobm/DTACKrf && iobm/DTACKrr)); + OR (C8M AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND + iobm/DTACKrf AND iobm/DTACKrr) + OR (C8M AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND + iobm/BERRrf AND iobm/BERRrr)); -FTCPE FTCPE_iobm/IOBERR (iobm/IOBERR,iobm/IOBERR_T,C16M,1'b0,1'b0); -assign iobm/IOBERR_T = ((C8M && !nBERR_IOB && iobm/IOS_FSM_FFd3 && - iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/BERRrf && - iobm/BERRrr) - || (C8M && !nBERR_IOB && iobm/IOS_FSM_FFd3 && - iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/DTACKrf && +FTCPE_IOBERR: FTCPE port map (IOBERR,IOBERR_T,C16M,'0','0'); +IOBERR_T <= ((C8M AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND + iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/RESrf AND + iobm/RESrr) + OR (C8M AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND + iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/DTACKrf AND iobm/DTACKrr) - || (C8M && !nBERR_IOB && iobm/IOS_FSM_FFd3 && - iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/RESrf && - iobm/RESrr) - || (C8M && nBERR_IOB && iobm/IOS_FSM_FFd3 && - iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/RESrf && - iobm/RESrr) - || (iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd1 && - !iobm/IOS_FSM_FFd2 && iobm/IOBERR) - || (C8M && nBERR_IOB && iobm/IOS_FSM_FFd3 && - iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/ETACK) - || (C8M && !nBERR_IOB && iobm/IOS_FSM_FFd3 && - iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/ETACK) - || (C8M && nBERR_IOB && iobm/IOS_FSM_FFd3 && - iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/BERRrf && + OR (C8M AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND + iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/BERRrf AND iobm/BERRrr) - || (C8M && nBERR_IOB && iobm/IOS_FSM_FFd3 && - iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/DTACKrf && - iobm/DTACKrr)); + OR (C8M AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND + iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/RESrf AND + iobm/RESrr) + OR (iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND + NOT iobm/IOS_FSM_FFd2 AND IOBERR) + OR (C8M AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND + iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/ETACK) + OR (C8M AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND + iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/ETACK) + OR (C8M AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND + iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/DTACKrf AND + iobm/DTACKrr) + OR (C8M AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND + iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/BERRrf AND + iobm/BERRrr)); -FDCPE FDCPE_iobm/IOREQr (iobm/IOREQr,iobs/IOREQ,!C16M,1'b0,1'b0); +FDCPE_IOL0: FDCPE port map (IOL0,IOL0_D,FCLK,'0','0',IOL0_CE); +IOL0_D <= ((NOT nLDS_FSB AND nADoutLE1) + OR (iobs/IOL1 AND NOT nADoutLE1)); +IOL0_CE <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1); -FDCPE FDCPE_iobm/IOS_FSM_FFd1 (iobm/IOS_FSM_FFd1,iobm/IOS_FSM_FFd1_D,C16M,1'b0,1'b0); -assign iobm/IOS_FSM_FFd1_D = ((iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1) - || (!iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd2)); +FDCPE_IOREQ: FDCPE port map (IOREQ,IOREQ_D,FCLK,'0','0'); +IOREQ_D <= ((A_FSB(22) AND A_FSB(21) AND NOT iobs/Once AND NOT nAS_FSB AND + NOT iobs/PS_FSM_FFd1) + OR (A_FSB(22) AND A_FSB(21) AND NOT iobs/Once AND + NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (A_FSB(22) AND A_FSB(20) AND NOT iobs/Once AND NOT nAS_FSB AND + NOT iobs/PS_FSM_FFd1) + OR (A_FSB(22) AND A_FSB(20) AND NOT iobs/Once AND + NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND + NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd1) + OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND + NOT nWE_FSB AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND + NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd1) + OR (A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND + NOT nWE_FSB AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) + OR (iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr) + OR (NOT iobs/PS_FSM_FFd1 AND NOT nADoutLE1) + OR (A_FSB(23) AND NOT iobs/Once AND NOT nAS_FSB AND + NOT iobs/PS_FSM_FFd1) + OR (A_FSB(23) AND NOT iobs/Once AND NOT iobs/PS_FSM_FFd1 AND + fsb/ASrf)); -FTCPE FTCPE_iobm/IOS_FSM_FFd2 (iobm/IOS_FSM_FFd2,iobm/IOS_FSM_FFd2_T,C16M,1'b0,1'b0); -assign iobm/IOS_FSM_FFd2_T = ((iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd1 && - !iobm/IOS_FSM_FFd2) - || (C8M && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && - iobm/IOS_FSM_FFd2 && iobm/ETACK) - || (C8M && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && - iobm/IOS_FSM_FFd2 && iobm/BERRrf && iobm/BERRrr) - || (C8M && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && - iobm/IOS_FSM_FFd2 && iobm/DTACKrf && iobm/DTACKrr) - || (C8M && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && - iobm/IOS_FSM_FFd2 && iobm/RESrf && iobm/RESrr)); - -FDCPE FDCPE_iobm/IOS_FSM_FFd3 (iobm/IOS_FSM_FFd3,iobm/IOS_FSM_FFd3_D,C16M,1'b0,1'b0); -assign iobm/IOS_FSM_FFd3_D = ((iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2) - || (iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd1 && - !iobm/IOS_FSM_FFd2) - || (!C8M && !iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2 && - iobm/IOREQr && !nAoutOE)); - -FDCPE FDCPE_iobm/RESrf (iobm/RESrf,!nRES.PIN,!C16M,1'b0,1'b0); - -FDCPE FDCPE_iobm/RESrr (iobm/RESrr,!nRES.PIN,C16M,1'b0,1'b0); - -FDCPE FDCPE_iobm/VPArf (iobm/VPArf,!nVPA_IOB,!C16M,1'b0,1'b0); - -FDCPE FDCPE_iobm/VPArr (iobm/VPArr,!nVPA_IOB,C16M,1'b0,1'b0); - -FDCPE FDCPE_iobs/ALE0 (iobs/ALE0,iobs/ALE0_D,FCLK,1'b0,1'b0); -assign iobs/ALE0_D = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1); - -FDCPE FDCPE_iobs/Clear1 (iobs/Clear1,iobs/Clear1_D,FCLK,1'b0,1'b0); -assign iobs/Clear1_D = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && !nADoutLE1); - -FDCPE FDCPE_iobs/IOACTr (iobs/IOACTr,iobm/IOACT,FCLK,1'b0,1'b0); - -FDCPE FDCPE_iobs/IOL0 (iobs/IOL0,iobs/IOL0_D,FCLK,1'b0,1'b0,iobs/IOL0_CE); -assign iobs/IOL0_D = ((!nLDS_FSB && nADoutLE1) - || (iobs/IOL1 && !nADoutLE1)); -assign iobs/IOL0_CE = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1); - -FDCPE FDCPE_iobs/IOL1 (iobs/IOL1,!nLDS_FSB,FCLK,1'b0,1'b0,iobs/Load1); - -FDCPE FDCPE_iobs/IOREQ (iobs/IOREQ,iobs/IOREQ_D,FCLK,1'b0,1'b0); -assign iobs/IOREQ_D = ((EXP16_.EXP) - || (A_FSB[23] && !iobs/Once && !nAS_FSB && - !iobs/PS_FSM_FFd1) - || (A_FSB[23] && !iobs/Once && !iobs/PS_FSM_FFd1 && - fsb/ASrf) - || (A_FSB[22] && A_FSB[21] && !iobs/Once && !nAS_FSB && - !iobs/PS_FSM_FFd1) - || (A_FSB[22] && A_FSB[21] && !iobs/Once && - !iobs/PS_FSM_FFd1 && fsb/ASrf) - || (A_FSB[22] && A_FSB[20] && !iobs/Once && !nAS_FSB && - !iobs/PS_FSM_FFd1) - || (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) - || (iobs/PS_FSM_FFd2 && !iobs/IOACTr) - || (!iobs/PS_FSM_FFd1 && !nADoutLE1)); - -FDCPE FDCPE_iobs/IORW0 (iobs/IORW0,iobs/IORW0_D,FCLK,1'b0,1'b0); -assign iobs/IORW0_D = ((!iobs/IORW1 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && - !nADoutLE1) - || (!A_FSB[23] && !A_FSB[21] && !A_FSB[20] && !iobs/IORW0 && +FDCPE_IORW0: FDCPE port map (IORW0,IORW0_D,FCLK,'0','0'); +IORW0_D <= ((EXP11_.EXP) + OR (A_FSB(22) AND A_FSB(21) AND NOT iobs/Once AND NOT nWE_FSB AND + NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) + OR (A_FSB(22) AND A_FSB(21) AND NOT iobs/Once AND NOT nWE_FSB AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1) + OR (A_FSB(22) AND A_FSB(20) AND NOT iobs/Once AND NOT nWE_FSB AND + NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) + OR (A_FSB(22) AND A_FSB(20) AND NOT iobs/Once AND NOT nWE_FSB AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1) + OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND + NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) - || (A_FSB[23] && !nWE_FSB && !iobs/Once && !nAS_FSB && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1) - || (A_FSB[23] && !nWE_FSB && !iobs/Once && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf && nADoutLE1) - || (A_FSB[22] && A_FSB[21] && !nWE_FSB && !iobs/Once && - !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1) - || (nROMWE_OBUF.EXP) - || (A_FSB[22] && A_FSB[21] && !nWE_FSB && !iobs/Once && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf && nADoutLE1) - || (A_FSB[22] && A_FSB[20] && !nWE_FSB && !iobs/Once && - !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1) - || (A_FSB[22] && A_FSB[20] && !nWE_FSB && !iobs/Once && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf && nADoutLE1) - || (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && - cs/nOverlay1 && !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && + OR (NOT iobs/IORW1 AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND + NOT nADoutLE1) + OR (NOT A_FSB(23) AND NOT A_FSB(21) AND NOT A_FSB(20) AND NOT IORW0 AND nADoutLE1) - || (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && - cs/nOverlay1 && !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && - nADoutLE1) - || (!iobs/IORW0 && iobs/PS_FSM_FFd2) - || (!iobs/IORW0 && iobs/PS_FSM_FFd1) - || (iobs/Once && !iobs/IORW0 && nADoutLE1) - || (!A_FSB[23] && !A_FSB[22] && !iobs/IORW0 && nADoutLE1) - || (!iobs/IORW0 && nAS_FSB && !fsb/ASrf && nADoutLE1)); + OR (A_FSB(23) AND NOT iobs/Once AND NOT nWE_FSB AND NOT nAS_FSB AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) + OR (A_FSB(23) AND NOT iobs/Once AND NOT nWE_FSB AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1) + OR (NOT IORW0 AND iobs/PS_FSM_FFd2) + OR (NOT IORW0 AND iobs/PS_FSM_FFd1) + OR (iobs/Once AND NOT IORW0 AND nADoutLE1) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT IORW0 AND nADoutLE1) + OR (NOT IORW0 AND nAS_FSB AND NOT fsb/ASrf AND nADoutLE1)); -FTCPE FTCPE_iobs/IORW1 (iobs/IORW1,iobs/IORW1_T,FCLK,1'b0,1'b0); -assign iobs/IORW1_T = ((iobs/Once) - || (!nADoutLE1) - || (fsb/Ready1r.EXP) - || (nAS_FSB && !fsb/ASrf) - || (!A_FSB[23] && !A_FSB[22] && !A_FSB[21]) - || (!A_FSB[23] && !A_FSB[22] && !A_FSB[19]) - || (!A_FSB[23] && !A_FSB[22] && nWE_FSB) - || (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1) - || (!A_FSB[23] && !A_FSB[22] && !A_FSB[20]) - || (!A_FSB[23] && !A_FSB[22] && !A_FSB[18]) - || (!A_FSB[23] && !A_FSB[22] && !A_FSB[17]) - || (!A_FSB[23] && !A_FSB[22] && !A_FSB[16]) - || (!A_FSB[23] && !A_FSB[21] && !A_FSB[20]) - || (nWE_FSB && iobs/IORW1) - || (!nWE_FSB && !iobs/IORW1) - || (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)); - -FTCPE FTCPE_iobs/IOReady (iobs/IOReady,iobs/IOReady_T,FCLK,1'b0,1'b0); -assign iobs/IOReady_T = ((iobs/IOReady && nAS_FSB && !fsb/ASrf) - || (iobs/Once && iobs/IOReady && !iobs/PS_FSM_FFd2 && - !iobs/IOACTr && iobm/IOBERR && nADoutLE1) - || (iobs/Once && !iobs/IOReady && !nAS_FSB && - !iobs/PS_FSM_FFd2 && !iobs/IOACTr && !iobm/IOBERR && nADoutLE1) - || (iobs/Once && !iobs/IOReady && !iobs/PS_FSM_FFd2 && - !iobs/IOACTr && !iobm/IOBERR && fsb/ASrf && nADoutLE1)); - -FDCPE FDCPE_iobs/IOU0 (iobs/IOU0,iobs/IOU0_D,FCLK,1'b0,1'b0,iobs/IOU0_CE); -assign iobs/IOU0_D = ((!nUDS_FSB && nADoutLE1) - || (iobs/IOU1 && !nADoutLE1)); -assign iobs/IOU0_CE = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1); - -FDCPE FDCPE_iobs/IOU1 (iobs/IOU1,!nUDS_FSB,FCLK,1'b0,1'b0,iobs/Load1); - -FDCPE FDCPE_iobs/Load1 (iobs/Load1,iobs/Load1_D,FCLK,1'b0,1'b0); -assign iobs/Load1_D = ((iobs/Once) - || (!nADoutLE1) - || (!A_FSB[23] && !A_FSB[22] && !A_FSB[21]) - || (!A_FSB[23] && !A_FSB[22] && !A_FSB[19]) - || (!A_FSB[23] && !A_FSB[22] && !A_FSB[17]) - || (!A_FSB[23] && !A_FSB[22] && !A_FSB[16]) - || (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1) - || (!A_FSB[23] && !A_FSB[22] && !A_FSB[20]) - || (!A_FSB[23] && !A_FSB[22] && !A_FSB[18]) - || (!A_FSB[23] && !A_FSB[21] && !A_FSB[20]) - || (!A_FSB[14] && !A_FSB[13] && !A_FSB[23] && !A_FSB[22]) - || (nAS_FSB && !fsb/ASrf) - || (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) - || (!A_FSB[23] && !A_FSB[22] && nWE_FSB)); - -FTCPE FTCPE_iobs/Once (iobs/Once,iobs/Once_T,FCLK,1'b0,1'b0); -assign iobs/Once_T = ((A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && - cs/nOverlay1 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf) - || (A_FSB[14] && !A_FSB[23] && !A_FSB[22] && A_FSB[21] && - A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && - !nWE_FSB && !iobs/Once && cs/nOverlay1 && !nAS_FSB && nADoutLE1) - || (A_FSB[14] && !A_FSB[23] && !A_FSB[22] && A_FSB[21] && - A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && - !nWE_FSB && !iobs/Once && cs/nOverlay1 && fsb/ASrf && nADoutLE1) - || (A_FSB[13] && !A_FSB[23] && !A_FSB[22] && A_FSB[21] && - A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && - !nWE_FSB && !iobs/Once && cs/nOverlay1 && !nAS_FSB && nADoutLE1) - || (A_FSB[13] && !A_FSB[23] && !A_FSB[22] && A_FSB[21] && - A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && - !nWE_FSB && !iobs/Once && cs/nOverlay1 && fsb/ASrf && nADoutLE1) - || (A_FSB[22] && A_FSB[21] && !iobs/Once && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf) - || (A_FSB[22] && A_FSB[20] && !iobs/Once && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf) - || (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && - cs/nOverlay1 && !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) - || (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && - cs/nOverlay1 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf) - || (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && - cs/nOverlay1 && !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) - || (iobs/Once && nAS_FSB && !fsb/ASrf) - || (A_FSB[23] && !iobs/Once && !nAS_FSB && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) - || (A_FSB[23] && !iobs/Once && !iobs/PS_FSM_FFd2 && - !iobs/PS_FSM_FFd1 && fsb/ASrf) - || (A_FSB[22] && A_FSB[21] && !iobs/Once && !nAS_FSB && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) - || (A_FSB[22] && A_FSB[20] && !iobs/Once && !nAS_FSB && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)); - -FDCPE FDCPE_iobs/PS_FSM_FFd1 (iobs/PS_FSM_FFd1,iobs/PS_FSM_FFd1_D,FCLK,1'b0,1'b0); -assign iobs/PS_FSM_FFd1_D = ((iobs/PS_FSM_FFd2) - || (iobs/PS_FSM_FFd1 && iobs/IOACTr)); - -FTCPE FTCPE_iobs/PS_FSM_FFd2 (iobs/PS_FSM_FFd2,iobs/PS_FSM_FFd2_T,FCLK,1'b0,1'b0); -assign iobs/PS_FSM_FFd2_T = ((iobs/nBERR_FSB.EXP) - || (A_FSB[23] && !iobs/Once && !iobs/PS_FSM_FFd2 && - !iobs/PS_FSM_FFd1 && fsb/ASrf) - || (A_FSB[22] && A_FSB[21] && !iobs/Once && !nAS_FSB && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) - || (A_FSB[22] && A_FSB[21] && !iobs/Once && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf) - || (A_FSB[22] && A_FSB[20] && !iobs/Once && !nAS_FSB && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) - || (A_FSB[22] && A_FSB[20] && !iobs/Once && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf) - || (iobs/PS_FSM_FFd1 && iobs/IOACTr) - || (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && !nADoutLE1) - || (A_FSB[23] && !iobs/Once && !nAS_FSB && - !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)); +FDCPE_IOU0: FDCPE port map (IOU0,IOU0_D,FCLK,'0','0',IOU0_CE); +IOU0_D <= ((NOT nUDS_FSB AND nADoutLE1) + OR (iobs/IOU1 AND NOT nADoutLE1)); +IOU0_CE <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1); -assign nADoutLE0 = (!iobm/ALE0 && !iobs/ALE0); +RA(0) <= ((A_FSB(10) AND NOT ram/RASEL) + OR (ram/RASEL AND A_FSB(1))); -FDCPE FDCPE_nADoutLE1 (nADoutLE1,nADoutLE1_D,FCLK,1'b0,1'b0); -assign nADoutLE1_D = ((iobs/Load1) - || (!iobs/Clear1 && !nADoutLE1)); -FDCPE FDCPE_nAS_IOB (nAS_IOB_I,nAS_IOB,!C16M,1'b0,1'b0); -assign nAS_IOB = ((!iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd2) - || (iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2)); -assign nAS_IOB = nAS_IOB_OE ? nAS_IOB_I : 1'bZ; -assign nAS_IOB_OE = !nAoutOE; +RA(1) <= ((A_FSB(11) AND NOT ram/RASEL) + OR (ram/RASEL AND A_FSB(2))); -FDCPE FDCPE_nAoutOE (nAoutOE,nAoutOE_D,!C8M,1'b0,1'b0); -assign nAoutOE_D = (!nBR_IOB && cnt/PORS_FSM_FFd1 && !cnt/PORS_FSM_FFd2); -FTCPE FTCPE_nBERR_FSB (nBERR_FSB,nBERR_FSB_T,FCLK,1'b0,1'b0); -assign nBERR_FSB_T = ((iobs/Once && !nBERR_FSB && !iobs/PS_FSM_FFd2 && - !iobs/IOACTr && !iobm/IOBERR && nADoutLE1) - || (iobs/Once && !nAS_FSB && nBERR_FSB && - !iobs/PS_FSM_FFd2 && !iobs/IOACTr && iobm/IOBERR && nADoutLE1) - || (iobs/Once && nBERR_FSB && !iobs/PS_FSM_FFd2 && - !iobs/IOACTr && iobm/IOBERR && fsb/ASrf && nADoutLE1) - || (nAS_FSB && !nBERR_FSB && !fsb/ASrf)); +RA(2) <= ((A_FSB(12) AND NOT ram/RASEL) + OR (ram/RASEL AND A_FSB(3))); -FTCPE FTCPE_nBR_IOB (nBR_IOB,nBR_IOB_T,!C8M,1'b0,1'b0); -assign nBR_IOB_T = ((nBR_IOB && !cnt/PORS_FSM_FFd1 && !cnt/PORS_FSM_FFd2) - || (!nBR_IOB && !cnt/PORS_FSM_FFd1 && cnt/PORS_FSM_FFd2 && - cnt/IPL2r)); -FDCPE FDCPE_nCAS (nCAS,!ram/RASEL,!FCLK,1'b0,1'b0); +RA(3) <= ((A_FSB(13) AND NOT ram/RASEL) + OR (ram/RASEL AND A_FSB(4))); -FDCPE FDCPE_nDTACK_FSB (nDTACK_FSB,nDTACK_FSB_D,FCLK,1'b0,1'b0); -assign nDTACK_FSB_D = ((iobs/IOREQ.EXP) - || (nAS_FSB && !fsb/ASrf) - || (A_FSB[23] && !fsb/Ready1r && !iobs/IOReady && + +RA(4) <= ((A_FSB(14) AND NOT ram/RASEL) + OR (ram/RASEL AND A_FSB(5))); + + +RA(5) <= ((A_FSB(15) AND NOT ram/RASEL) + OR (ram/RASEL AND A_FSB(6))); + + +RA(6) <= ((ram/RASEL AND A_FSB(7)) + OR (A_FSB(16) AND NOT ram/RASEL)); + + +RA(7) <= ((A_FSB(8) AND ram/RASEL) + OR (A_FSB(17) AND NOT ram/RASEL)); + + +RA(8) <= ((A_FSB(23) AND A_FSB(18)) + OR (A_FSB(22) AND A_FSB(18)) + OR (A_FSB(18) AND NOT cs/nOverlay) + OR (A_FSB(18) AND NOT ram/RASEL) + OR (A_FSB(9) AND NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND + ram/RASEL)); + + +RA(9) <= ((A_FSB(20) AND ram/RASEL) + OR (A_FSB(19) AND NOT ram/RASEL)); + + +RA(10) <= A_FSB(21); + + +RA(11) <= A_FSB(19); + +FDCPE_RefReq: FDCPE port map (RefReq,RefReq_D,FCLK,'0','0',RefReq_CE); +RefReq_D <= (NOT RefUrg AND NOT cnt/Timer(1) AND NOT cnt/Timer(2)); +RefReq_CE <= (NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_RefUrg: FTCPE port map (RefUrg,RefUrg_T,FCLK,'0','0',RefUrg_CE); +RefUrg_T <= ((RefUrg AND cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)) + OR (cnt/Timer(0) AND cnt/Timer(1) AND cnt/Timer(2) AND + NOT cnt/TimerTC) + OR (cnt/Timer(0) AND cnt/Timer(1) AND cnt/Timer(2) AND + cnt/Er(0)) + OR (cnt/Timer(0) AND cnt/Timer(1) AND cnt/Timer(2) AND + NOT cnt/Er(1))); +RefUrg_CE <= (NOT cnt/Er(0) AND cnt/Er(1)); + +FDCPE_cnt/Er0: FDCPE port map (cnt/Er(0),E,FCLK,'0','0'); + +FDCPE_cnt/Er1: FDCPE port map (cnt/Er(1),cnt/Er(0),FCLK,'0','0'); + +FTCPE_cnt/INITS_FSM_FFd1: FTCPE port map (cnt/INITS_FSM_FFd1,cnt/INITS_FSM_FFd1_T,FCLK,'0','0'); +cnt/INITS_FSM_FFd1_T <= (cnt/TimerTC AND cnt/LTimerTC AND NOT cnt/INITS_FSM_FFd1 AND + cnt/INITS_FSM_FFd2 AND NOT cnt/Er(0) AND cnt/nIPL2r AND cnt/Er(1)); + +FTCPE_cnt/INITS_FSM_FFd2: FTCPE port map (cnt/INITS_FSM_FFd2,cnt/INITS_FSM_FFd2_T,FCLK,'0','0'); +cnt/INITS_FSM_FFd2_T <= ((cnt/TimerTC AND cnt/LTimerTC AND cnt/INITS_FSM_FFd1 AND + cnt/INITS_FSM_FFd2 AND NOT cnt/Er(0) AND cnt/Er(1)) + OR (cnt/TimerTC AND cnt/LTimerTC AND NOT cnt/INITS_FSM_FFd1 AND + NOT cnt/INITS_FSM_FFd2 AND NOT cnt/Er(0) AND cnt/Er(1))); + +FTCPE_cnt/LTimer0: FTCPE port map (cnt/LTimer(0),'1',FCLK,'0','0',cnt/LTimer_CE(0)); +cnt/LTimer_CE(0) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_cnt/LTimer1: FTCPE port map (cnt/LTimer(1),cnt/LTimer(0),FCLK,'0','0',cnt/LTimer_CE(1)); +cnt/LTimer_CE(1) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_cnt/LTimer2: FTCPE port map (cnt/LTimer(2),cnt/LTimer_T(2),FCLK,'0','0',cnt/LTimer_CE(2)); +cnt/LTimer_T(2) <= (cnt/LTimer(0) AND cnt/LTimer(1)); +cnt/LTimer_CE(2) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_cnt/LTimer3: FTCPE port map (cnt/LTimer(3),cnt/LTimer_T(3),FCLK,'0','0',cnt/LTimer_CE(3)); +cnt/LTimer_T(3) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2)); +cnt/LTimer_CE(3) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_cnt/LTimer4: FTCPE port map (cnt/LTimer(4),cnt/LTimer_T(4),FCLK,'0','0',cnt/LTimer_CE(4)); +cnt/LTimer_T(4) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND + cnt/LTimer(3)); +cnt/LTimer_CE(4) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_cnt/LTimer5: FTCPE port map (cnt/LTimer(5),cnt/LTimer_T(5),FCLK,'0','0',cnt/LTimer_CE(5)); +cnt/LTimer_T(5) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND + cnt/LTimer(3) AND cnt/LTimer(4)); +cnt/LTimer_CE(5) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_cnt/LTimer6: FTCPE port map (cnt/LTimer(6),cnt/LTimer_T(6),FCLK,'0','0',cnt/LTimer_CE(6)); +cnt/LTimer_T(6) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND + cnt/LTimer(3) AND cnt/LTimer(4) AND cnt/LTimer(5)); +cnt/LTimer_CE(6) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_cnt/LTimer7: FTCPE port map (cnt/LTimer(7),cnt/LTimer_T(7),FCLK,'0','0',cnt/LTimer_CE(7)); +cnt/LTimer_T(7) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND + cnt/LTimer(3) AND cnt/LTimer(4) AND cnt/LTimer(5) AND cnt/LTimer(6)); +cnt/LTimer_CE(7) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_cnt/LTimer8: FTCPE port map (cnt/LTimer(8),cnt/LTimer_T(8),FCLK,'0','0',cnt/LTimer_CE(8)); +cnt/LTimer_T(8) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND + cnt/LTimer(3) AND cnt/LTimer(4) AND cnt/LTimer(5) AND cnt/LTimer(6) AND + cnt/LTimer(7)); +cnt/LTimer_CE(8) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_cnt/LTimer9: FTCPE port map (cnt/LTimer(9),cnt/LTimer_T(9),FCLK,'0','0',cnt/LTimer_CE(9)); +cnt/LTimer_T(9) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND + cnt/LTimer(3) AND cnt/LTimer(4) AND cnt/LTimer(5) AND cnt/LTimer(6) AND + cnt/LTimer(7) AND cnt/LTimer(8)); +cnt/LTimer_CE(9) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_cnt/LTimer10: FTCPE port map (cnt/LTimer(10),cnt/LTimer_T(10),FCLK,'0','0',cnt/LTimer_CE(10)); +cnt/LTimer_T(10) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND + cnt/LTimer(3) AND cnt/LTimer(4) AND cnt/LTimer(5) AND cnt/LTimer(6) AND + cnt/LTimer(7) AND cnt/LTimer(8) AND cnt/LTimer(9)); +cnt/LTimer_CE(10) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_cnt/LTimer11: FTCPE port map (cnt/LTimer(11),cnt/LTimer_T(11),FCLK,'0','0',cnt/LTimer_CE(11)); +cnt/LTimer_T(11) <= (cnt/LTimer(0) AND cnt/LTimer(10) AND cnt/LTimer(1) AND + cnt/LTimer(2) AND cnt/LTimer(3) AND cnt/LTimer(4) AND cnt/LTimer(5) AND + cnt/LTimer(6) AND cnt/LTimer(7) AND cnt/LTimer(8) AND cnt/LTimer(9)); +cnt/LTimer_CE(11) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_cnt/LTimer12: FTCPE port map (cnt/LTimer(12),cnt/LTimer_T(12),FCLK,'0','0',cnt/LTimer_CE(12)); +cnt/LTimer_T(12) <= (cnt/LTimer(0) AND cnt/LTimer(10) AND cnt/LTimer(11) AND + cnt/LTimer(1) AND cnt/LTimer(2) AND cnt/LTimer(3) AND cnt/LTimer(4) AND + cnt/LTimer(5) AND cnt/LTimer(6) AND cnt/LTimer(7) AND cnt/LTimer(8) AND + cnt/LTimer(9)); +cnt/LTimer_CE(12) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FDCPE_cnt/LTimerTC: FDCPE port map (cnt/LTimerTC,cnt/LTimerTC_D,FCLK,'0','0',cnt/LTimerTC_CE); +cnt/LTimerTC_D <= (NOT cnt/LTimer(0) AND cnt/LTimer(10) AND cnt/LTimer(11) AND + cnt/LTimer(1) AND cnt/LTimer(2) AND cnt/LTimer(3) AND cnt/LTimer(4) AND + cnt/LTimer(5) AND cnt/LTimer(6) AND cnt/LTimer(7) AND cnt/LTimer(8) AND + cnt/LTimer(9) AND cnt/LTimer(12)); +cnt/LTimerTC_CE <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); + +FTCPE_cnt/Timer0: FTCPE port map (cnt/Timer(0),cnt/Timer_T(0),FCLK,'0','0',cnt/Timer_CE(0)); +cnt/Timer_T(0) <= (NOT cnt/Timer(0) AND cnt/TimerTC AND NOT cnt/Er(0) AND + cnt/Er(1)); +cnt/Timer_CE(0) <= (NOT cnt/Er(0) AND cnt/Er(1)); + +FDCPE_cnt/Timer1: FDCPE port map (cnt/Timer(1),cnt/Timer_D(1),FCLK,'0','0',cnt/Timer_CE(1)); +cnt/Timer_D(1) <= ((NOT cnt/Timer(0) AND NOT cnt/Timer(1)) + OR (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)) + OR (cnt/Timer(0) AND cnt/Timer(1))); +cnt/Timer_CE(1) <= (NOT cnt/Er(0) AND cnt/Er(1)); + +FDCPE_cnt/Timer2: FDCPE port map (cnt/Timer(2),cnt/Timer_D(2),FCLK,'0','0',cnt/Timer_CE(2)); +cnt/Timer_D(2) <= ((cnt/Timer(0) AND cnt/Timer(1) AND cnt/Timer(2)) + OR (NOT cnt/Timer(0) AND NOT cnt/Timer(2)) + OR (NOT cnt/Timer(1) AND NOT cnt/Timer(2)) + OR (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1))); +cnt/Timer_CE(2) <= (NOT cnt/Er(0) AND cnt/Er(1)); + +FDCPE_cnt/TimerTC: FDCPE port map (cnt/TimerTC,cnt/TimerTC_D,FCLK,'0','0',cnt/TimerTC_CE); +cnt/TimerTC_D <= (RefUrg AND cnt/Timer(0) AND NOT cnt/Timer(1) AND + NOT cnt/Timer(2)); +cnt/TimerTC_CE <= (NOT cnt/Er(0) AND cnt/Er(1)); + +FDCPE_cnt/nIPL2r: FDCPE port map (cnt/nIPL2r,nIPL2,FCLK,'0','0'); + +FTCPE_cs/nOverlay: FTCPE port map (cs/nOverlay,cs/nOverlay_T,FCLK,NOT nRES.PIN,'0'); +cs/nOverlay_T <= ((NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND + NOT cs/nOverlay AND NOT nAS_FSB) + OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND + NOT cs/nOverlay AND fsb/ASrf)); + +FDCPE_fsb/ASrf: FDCPE port map (fsb/ASrf,NOT nAS_FSB,NOT FCLK,'0','0'); + +FDCPE_fsb/Ready0r: FDCPE port map (fsb/Ready0r,fsb/Ready0r_D,FCLK,'0','0'); +fsb/Ready0r_D <= ((nAS_FSB AND NOT fsb/ASrf) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND + NOT fsb/Ready0r AND NOT ram/RAMReady)); + +FDCPE_fsb/Ready1r: FDCPE port map (fsb/Ready1r,fsb/Ready1r_D,FCLK,'0','0'); +fsb/Ready1r_D <= ((A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND cs/nOverlay AND + NOT fsb/Ready1r AND NOT nWE_FSB AND NOT iobs/IOReady AND NOT nADoutLE1) + OR (nAS_FSB AND NOT fsb/ASrf) + OR (A_FSB(23) AND NOT fsb/Ready1r AND NOT iobs/IOReady) + OR (A_FSB(22) AND A_FSB(21) AND NOT fsb/Ready1r AND + NOT iobs/IOReady) + OR (A_FSB(22) AND A_FSB(20) AND NOT fsb/Ready1r AND + NOT iobs/IOReady) + OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND cs/nOverlay AND + NOT fsb/Ready1r AND NOT nWE_FSB AND NOT iobs/IOReady AND NOT nADoutLE1)); + +FDCPE_fsb/VPA: FDCPE port map (fsb/VPA,fsb/VPA_D,FCLK,'0','0'); +fsb/VPA_D <= ((EXP12_.EXP) + OR (A_FSB(22) AND A_FSB(20) AND NOT fsb/Ready1r AND fsb/VPA AND + NOT iobs/IOReady AND fsb/ASrf) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND + NOT fsb/Ready0r AND fsb/VPA AND NOT nAS_FSB AND NOT ram/RAMReady) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND + NOT fsb/Ready0r AND fsb/VPA AND fsb/ASrf AND NOT ram/RAMReady) + OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND cs/nOverlay AND + NOT fsb/Ready1r AND fsb/VPA AND NOT nWE_FSB AND NOT iobs/IOReady AND NOT nAS_FSB AND + NOT nADoutLE1) + OR (A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND cs/nOverlay AND + NOT fsb/Ready1r AND fsb/VPA AND NOT nWE_FSB AND NOT iobs/IOReady AND NOT nAS_FSB AND + NOT nADoutLE1) + OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND cs/nOverlay AND + NOT fsb/Ready1r AND fsb/VPA AND NOT nWE_FSB AND NOT iobs/IOReady AND fsb/ASrf AND + NOT nADoutLE1) + OR (A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND cs/nOverlay AND + NOT fsb/Ready1r AND fsb/VPA AND NOT nWE_FSB AND NOT iobs/IOReady AND fsb/ASrf AND + NOT nADoutLE1) + OR (A_FSB(9) AND A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND + A_FSB(13) AND A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND A_FSB(23) AND + A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND + A_FSB(17) AND A_FSB(16) AND fsb/Ready1r AND NOT nAS_FSB) + OR (A_FSB(9) AND A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND + A_FSB(13) AND A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND A_FSB(23) AND + A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND + A_FSB(17) AND A_FSB(16) AND iobs/IOReady AND NOT nAS_FSB) + OR (A_FSB(9) AND A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND + A_FSB(13) AND A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND A_FSB(23) AND + A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND + A_FSB(17) AND A_FSB(16) AND iobs/IOReady AND fsb/ASrf) + OR (A_FSB(23) AND NOT fsb/Ready1r AND fsb/VPA AND + NOT iobs/IOReady AND NOT nAS_FSB) + OR (A_FSB(23) AND NOT fsb/Ready1r AND fsb/VPA AND + NOT iobs/IOReady AND fsb/ASrf) + OR (A_FSB(22) AND A_FSB(21) AND NOT fsb/Ready1r AND fsb/VPA AND + NOT iobs/IOReady AND NOT nAS_FSB) + OR (A_FSB(22) AND A_FSB(21) AND NOT fsb/Ready1r AND fsb/VPA AND + NOT iobs/IOReady AND fsb/ASrf) + OR (A_FSB(22) AND A_FSB(20) AND NOT fsb/Ready1r AND fsb/VPA AND + NOT iobs/IOReady AND NOT nAS_FSB)); + +FDCPE_iobm/BERRrf: FDCPE port map (iobm/BERRrf,NOT nBERR_IOB,NOT C16M,'0','0'); + +FDCPE_iobm/BERRrr: FDCPE port map (iobm/BERRrr,NOT nBERR_IOB,C16M,'0','0'); + +FDCPE_iobm/DTACKrf: FDCPE port map (iobm/DTACKrf,NOT nDTACK_IOB,NOT C16M,'0','0'); + +FDCPE_iobm/DTACKrr: FDCPE port map (iobm/DTACKrr,NOT nDTACK_IOB,C16M,'0','0'); + +FDCPE_iobm/DoutOE: FDCPE port map (iobm/DoutOE,iobm/DoutOE_D,C16M,'0','0'); +iobm/DoutOE_D <= ((NOT IORW0 AND iobm/IOS_FSM_FFd3) + OR (NOT IORW0 AND iobm/IOS_FSM_FFd2) + OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND + NOT iobm/IOS_FSM_FFd2 AND NOT iobm/IOREQr AND NOT nAoutOE)); + +FTCPE_iobm/ES0: FTCPE port map (iobm/ES(0),iobm/ES_T(0),C16M,'0','0'); +iobm/ES_T(0) <= ((iobm/ES(0) AND NOT iobm/Er AND iobm/Er2) + OR (NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND + NOT iobm/ES(3) AND NOT iobm/ES(4) AND iobm/Er) + OR (NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND + NOT iobm/ES(3) AND NOT iobm/ES(4) AND NOT iobm/Er2)); + +FDCPE_iobm/ES1: FDCPE port map (iobm/ES(1),iobm/ES_D(1),C16M,'0','0'); +iobm/ES_D(1) <= ((iobm/ES(0) AND iobm/ES(1)) + OR (NOT iobm/ES(0) AND NOT iobm/ES(1)) + OR (NOT iobm/Er AND iobm/Er2)); + +FDCPE_iobm/ES2: FDCPE port map (iobm/ES(2),iobm/ES_D(2),C16M,'0','0'); +iobm/ES_D(2) <= ((NOT iobm/ES(0) AND NOT iobm/ES(2)) + OR (NOT iobm/ES(1) AND NOT iobm/ES(2)) + OR (NOT iobm/Er AND iobm/Er2) + OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2)) + OR (NOT iobm/ES(2) AND NOT iobm/ES(3) AND iobm/ES(4))); + +FTCPE_iobm/ES3: FTCPE port map (iobm/ES(3),iobm/ES_T(3),C16M,'0','0'); +iobm/ES_T(3) <= ((iobm/ES(3) AND NOT iobm/Er AND iobm/Er2) + OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND iobm/Er) + OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND NOT iobm/Er2)); + +FTCPE_iobm/ES4: FTCPE port map (iobm/ES(4),iobm/ES_T(4),C16M,'0','0'); +iobm/ES_T(4) <= ((iobm/ES(4) AND NOT iobm/Er AND iobm/Er2) + OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND + iobm/ES(3) AND iobm/Er) + OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND + iobm/ES(3) AND NOT iobm/Er2) + OR (iobm/ES(0) AND iobm/ES(1) AND NOT iobm/ES(2) AND + NOT iobm/ES(3) AND iobm/ES(4))); + +FDCPE_iobm/ETACK: FDCPE port map (iobm/ETACK,iobm/ETACK_D,C16M,'0','0'); +iobm/ETACK_D <= (NOT nVMA_IOB AND NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND + NOT iobm/ES(3) AND iobm/ES(4)); + +FDCPE_iobm/Er: FDCPE port map (iobm/Er,E,NOT C8M,'0','0'); + +FDCPE_iobm/Er2: FDCPE port map (iobm/Er2,iobm/Er,C16M,'0','0'); + +FDCPE_iobm/IOREQr: FDCPE port map (iobm/IOREQr,IOREQ,NOT C16M,'0','0'); + +FDCPE_iobm/IOS_FSM_FFd1: FDCPE port map (iobm/IOS_FSM_FFd1,iobm/IOS_FSM_FFd1_D,C16M,'0','0'); +iobm/IOS_FSM_FFd1_D <= ((iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1) + OR (NOT iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2)); + +FTCPE_iobm/IOS_FSM_FFd2: FTCPE port map (iobm/IOS_FSM_FFd2,iobm/IOS_FSM_FFd2_T,C16M,'0','0'); +iobm/IOS_FSM_FFd2_T <= ((iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND + NOT iobm/IOS_FSM_FFd2) + OR (C8M AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND + iobm/IOS_FSM_FFd2 AND iobm/ETACK) + OR (C8M AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND + iobm/IOS_FSM_FFd2 AND iobm/DTACKrf AND iobm/DTACKrr) + OR (C8M AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND + iobm/IOS_FSM_FFd2 AND iobm/BERRrf AND iobm/BERRrr) + OR (C8M AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND + iobm/IOS_FSM_FFd2 AND iobm/RESrf AND iobm/RESrr)); + +FDCPE_iobm/IOS_FSM_FFd3: FDCPE port map (iobm/IOS_FSM_FFd3,iobm/IOS_FSM_FFd3_D,C16M,'0','0'); +iobm/IOS_FSM_FFd3_D <= ((iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2) + OR (iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND + NOT iobm/IOS_FSM_FFd2) + OR (NOT C8M AND NOT iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2 AND + iobm/IOREQr AND NOT nAoutOE)); + +FDCPE_iobm/RESrf: FDCPE port map (iobm/RESrf,NOT nRES.PIN,NOT C16M,'0','0'); + +FDCPE_iobm/RESrr: FDCPE port map (iobm/RESrr,NOT nRES.PIN,C16M,'0','0'); + +FDCPE_iobm/VPArf: FDCPE port map (iobm/VPArf,NOT nVPA_IOB,NOT C16M,'0','0'); + +FDCPE_iobm/VPArr: FDCPE port map (iobm/VPArr,NOT nVPA_IOB,C16M,'0','0'); + +FDCPE_iobs/Clear1: FDCPE port map (iobs/Clear1,iobs/Clear1_D,FCLK,'0','0'); +iobs/Clear1_D <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND NOT nADoutLE1); + +FDCPE_iobs/IOACTr: FDCPE port map (iobs/IOACTr,IOACT,FCLK,'0','0'); + +FDCPE_iobs/IOL1: FDCPE port map (iobs/IOL1,NOT nLDS_FSB,FCLK,'0','0',iobs/Load1); + +FTCPE_iobs/IORW1: FTCPE port map (iobs/IORW1,iobs/IORW1_T,FCLK,'0','0'); +iobs/IORW1_T <= ((iobs/Once) + OR (NOT nADoutLE1) + OR (nDTACK_FSB_OBUF.EXP) + OR (nAS_FSB AND NOT fsb/ASrf) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21)) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(19)) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND nWE_FSB) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(20)) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(18)) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(17)) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(16)) + OR (NOT A_FSB(23) AND NOT A_FSB(21) AND NOT A_FSB(20)) + OR (nWE_FSB AND iobs/IORW1) + OR (NOT nWE_FSB AND NOT iobs/IORW1) + OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1)); + +FTCPE_iobs/IOReady: FTCPE port map (iobs/IOReady,iobs/IOReady_T,FCLK,'0','0'); +iobs/IOReady_T <= ((iobs/IOReady AND nAS_FSB AND NOT fsb/ASrf) + OR (iobs/Once AND iobs/IOReady AND NOT iobs/PS_FSM_FFd2 AND + NOT iobs/IOACTr AND IOBERR AND nADoutLE1) + OR (iobs/Once AND NOT iobs/IOReady AND NOT nAS_FSB AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND NOT IOBERR AND nADoutLE1) + OR (iobs/Once AND NOT iobs/IOReady AND NOT iobs/PS_FSM_FFd2 AND + NOT iobs/IOACTr AND NOT IOBERR AND fsb/ASrf AND nADoutLE1)); + +FDCPE_iobs/IOU1: FDCPE port map (iobs/IOU1,NOT nUDS_FSB,FCLK,'0','0',iobs/Load1); + +FDCPE_iobs/Load1: FDCPE port map (iobs/Load1,iobs/Load1_D,FCLK,'0','0'); +iobs/Load1_D <= ((iobs/Once) + OR (NOT nADoutLE1) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21)) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(19)) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(16)) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND nWE_FSB) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(20)) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(18)) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(17)) + OR (NOT A_FSB(23) AND NOT A_FSB(21) AND NOT A_FSB(20)) + OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND NOT A_FSB(22)) + OR (nAS_FSB AND NOT fsb/ASrf) + OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay)); + +FTCPE_iobs/Once: FTCPE port map (iobs/Once,iobs/Once_T,FCLK,'0','0'); +iobs/Once_T <= ((A_FSB(22) AND A_FSB(21) AND NOT iobs/Once AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (A_FSB(22) AND A_FSB(20) AND NOT iobs/Once AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND + NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) + OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND + NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND + NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) + OR (A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND + NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (A_FSB(14) AND NOT A_FSB(23) AND NOT A_FSB(22) AND A_FSB(21) AND + A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND + NOT iobs/Once AND cs/nOverlay AND NOT nWE_FSB AND NOT nAS_FSB AND nADoutLE1) + OR (A_FSB(14) AND NOT A_FSB(23) AND NOT A_FSB(22) AND A_FSB(21) AND + A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND + NOT iobs/Once AND cs/nOverlay AND NOT nWE_FSB AND fsb/ASrf AND nADoutLE1) + OR (A_FSB(13) AND NOT A_FSB(23) AND NOT A_FSB(22) AND A_FSB(21) AND + A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND + NOT iobs/Once AND cs/nOverlay AND NOT nWE_FSB AND NOT nAS_FSB AND nADoutLE1) + OR (A_FSB(13) AND NOT A_FSB(23) AND NOT A_FSB(22) AND A_FSB(21) AND + A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND + NOT iobs/Once AND cs/nOverlay AND NOT nWE_FSB AND fsb/ASrf AND nADoutLE1) + OR (iobs/Once AND nAS_FSB AND NOT fsb/ASrf) + OR (A_FSB(23) AND NOT iobs/Once AND NOT nAS_FSB AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) + OR (A_FSB(23) AND NOT iobs/Once AND NOT iobs/PS_FSM_FFd2 AND + NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (A_FSB(22) AND A_FSB(21) AND NOT iobs/Once AND NOT nAS_FSB AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) + OR (A_FSB(22) AND A_FSB(20) AND NOT iobs/Once AND NOT nAS_FSB AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1)); + +FDCPE_iobs/PS_FSM_FFd1: FDCPE port map (iobs/PS_FSM_FFd1,iobs/PS_FSM_FFd1_D,FCLK,'0','0'); +iobs/PS_FSM_FFd1_D <= ((iobs/PS_FSM_FFd2) + OR (iobs/PS_FSM_FFd1 AND iobs/IOACTr)); + +FTCPE_iobs/PS_FSM_FFd2: FTCPE port map (iobs/PS_FSM_FFd2,iobs/PS_FSM_FFd2_T,FCLK,'0','0'); +iobs/PS_FSM_FFd2_T <= ((A_FSB(22) AND A_FSB(21) AND NOT iobs/Once AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (A_FSB(22) AND A_FSB(20) AND NOT iobs/Once AND NOT nAS_FSB AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) + OR (A_FSB(22) AND A_FSB(20) AND NOT iobs/Once AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND + NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) + OR (A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND + NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) + OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND + NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND + NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (iobs/PS_FSM_FFd1 AND iobs/IOACTr) + OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND NOT nADoutLE1) + OR (A_FSB(23) AND NOT iobs/Once AND NOT nAS_FSB AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) + OR (A_FSB(23) AND NOT iobs/Once AND NOT iobs/PS_FSM_FFd2 AND + NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) + OR (A_FSB(22) AND A_FSB(21) AND NOT iobs/Once AND NOT nAS_FSB AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1)); + + +nADoutLE0 <= (NOT ALE0M AND NOT ALE0S); + +FDCPE_nADoutLE1: FDCPE port map (nADoutLE1,nADoutLE1_D,FCLK,'0','0'); +nADoutLE1_D <= ((iobs/Load1) + OR (NOT iobs/Clear1 AND NOT nADoutLE1)); + +FDCPE_nAS_IOB: FDCPE port map (nAS_IOB_I,nAS_IOB,NOT C16M,'0','0'); +nAS_IOB <= ((NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2) + OR (iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2)); +nAS_IOB <= nAS_IOB_I when nAS_IOB_OE = '1' else 'Z'; +nAS_IOB_OE <= NOT nAoutOE; + +FDCPE_nAoutOE: FDCPE port map (nAoutOE,nAoutOE_D,FCLK,'0','0'); +nAoutOE_D <= ((NOT nBR_IOB AND cnt/INITS_FSM_FFd1 AND + cnt/INITS_FSM_FFd2) + OR (cnt/INITS_FSM_FFd1 AND NOT cnt/INITS_FSM_FFd2 AND + NOT nAoutOE)); + +FTCPE_nBERR_FSB: FTCPE port map (nBERR_FSB,nBERR_FSB_T,FCLK,'0','0'); +nBERR_FSB_T <= ((NOT nBERR_FSB AND nAS_FSB AND NOT fsb/ASrf) + OR (iobs/Once AND NOT nBERR_FSB AND NOT iobs/PS_FSM_FFd2 AND + NOT iobs/IOACTr AND NOT IOBERR AND nADoutLE1) + OR (iobs/Once AND nBERR_FSB AND NOT nAS_FSB AND + NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND IOBERR AND nADoutLE1) + OR (iobs/Once AND nBERR_FSB AND NOT iobs/PS_FSM_FFd2 AND + NOT iobs/IOACTr AND IOBERR AND fsb/ASrf AND nADoutLE1)); + +FTCPE_nBR_IOB: FTCPE port map (nBR_IOB,nBR_IOB_T,FCLK,'0','0'); +nBR_IOB_T <= ((NOT nBR_IOB AND NOT cnt/INITS_FSM_FFd1 AND + cnt/INITS_FSM_FFd2 AND NOT cnt/nIPL2r) + OR (nBR_IOB AND NOT cnt/INITS_FSM_FFd1 AND + NOT cnt/INITS_FSM_FFd2)); + +FDCPE_nCAS: FDCPE port map (nCAS,NOT ram/RASEL,NOT FCLK,'0','0'); + +FDCPE_nDTACK_FSB: FDCPE port map (nDTACK_FSB,nDTACK_FSB_D,FCLK,'0','0'); +nDTACK_FSB_D <= ((nAS_FSB AND NOT fsb/ASrf) + OR (A_FSB(23) AND NOT fsb/Ready1r AND NOT iobs/IOReady AND nDTACK_FSB) - || (A_FSB[22] && A_FSB[21] && !fsb/Ready1r && - !iobs/IOReady && nDTACK_FSB) - || (A_FSB[22] && A_FSB[20] && !fsb/Ready1r && - !iobs/IOReady && nDTACK_FSB) - || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && - !fsb/Ready0r && nDTACK_FSB && !ram/RAMReady) - || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && - !cs/nOverlay1 && !fsb/Ready0r && nDTACK_FSB && !ram/RAMReady) - || (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && - !fsb/Ready1r && !iobs/IOReady && nDTACK_FSB && !nADoutLE1) - || (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && - A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && - !fsb/Ready1r && !iobs/IOReady && nDTACK_FSB && !nADoutLE1)); + OR (A_FSB(22) AND A_FSB(20) AND NOT fsb/Ready1r AND + NOT iobs/IOReady AND nDTACK_FSB) + OR (A_FSB(9) AND A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND + A_FSB(13) AND A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND A_FSB(23) AND + A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND + A_FSB(17) AND A_FSB(16) AND fsb/Ready1r) + OR (A_FSB(9) AND A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND + A_FSB(13) AND A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND A_FSB(23) AND + A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND + A_FSB(17) AND A_FSB(16) AND iobs/IOReady) + OR (A_FSB(22) AND A_FSB(21) AND NOT fsb/Ready1r AND + NOT iobs/IOReady AND nDTACK_FSB) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND + NOT fsb/Ready0r AND nDTACK_FSB AND NOT ram/RAMReady) + OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND cs/nOverlay AND + NOT fsb/Ready1r AND NOT nWE_FSB AND NOT iobs/IOReady AND nDTACK_FSB AND NOT nADoutLE1) + OR (A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND + A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND cs/nOverlay AND + NOT fsb/Ready1r AND NOT nWE_FSB AND NOT iobs/IOReady AND nDTACK_FSB AND NOT nADoutLE1)); -FDCPE FDCPE_nDinLE (nDinLE,nDinLE_D,!C16M,1'b0,1'b0); -assign nDinLE_D = (iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2); +FDCPE_nDinLE: FDCPE port map (nDinLE,nDinLE_D,NOT C16M,'0','0'); +nDinLE_D <= (iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2); -assign nDinOE = ((A_FSB[23] && nWE_FSB && !nAS_FSB) - || (A_FSB[22] && A_FSB[21] && nWE_FSB && !nAS_FSB) - || (A_FSB[22] && A_FSB[20] && nWE_FSB && !nAS_FSB)); +nDinOE <= ((A_FSB(23) AND nWE_FSB AND NOT nAS_FSB) + OR (A_FSB(22) AND A_FSB(21) AND nWE_FSB AND NOT nAS_FSB) + OR (A_FSB(22) AND A_FSB(20) AND nWE_FSB AND NOT nAS_FSB)); -assign nDoutOE = !((iobm/DoutOE && !nAoutOE)); +nDoutOE <= NOT ((iobm/DoutOE AND NOT nAoutOE)); -FDCPE FDCPE_nLDS_IOB (nLDS_IOB_I,nLDS_IOB,!C16M,1'b0,1'b0); -assign nLDS_IOB = ((iobs/IOL0 && !iobm/IOS_FSM_FFd3 && - iobm/IOS_FSM_FFd2) - || (iobs/IOL0 && iobm/IOS_FSM_FFd1 && - iobm/IOS_FSM_FFd2) - || (!iobs/IORW0 && iobs/IOL0 && iobm/IOS_FSM_FFd3 && - !iobm/IOS_FSM_FFd1)); -assign nLDS_IOB = nLDS_IOB_OE ? nLDS_IOB_I : 1'bZ; -assign nLDS_IOB_OE = !nAoutOE; +FDCPE_nLDS_IOB: FDCPE port map (nLDS_IOB_I,nLDS_IOB,NOT C16M,'0','0'); +nLDS_IOB <= ((IOL0 AND NOT iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2) + OR (IOL0 AND iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2) + OR (IORW0 AND IOL0 AND iobm/IOS_FSM_FFd3 AND + NOT iobm/IOS_FSM_FFd1)); +nLDS_IOB <= nLDS_IOB_I when nLDS_IOB_OE = '1' else 'Z'; +nLDS_IOB_OE <= NOT nAoutOE; -assign nOE = !((nWE_FSB && !nAS_FSB)); +nOE <= NOT ((nWE_FSB AND NOT nAS_FSB)); -assign nRAMLWE = !((!nWE_FSB && !nLDS_FSB && !nAS_FSB && ram/RAMEN)); +nRAMLWE <= NOT ((NOT nLDS_FSB AND NOT nWE_FSB AND NOT nAS_FSB AND ram/RAMEN)); -assign nRAMUWE = !((!nWE_FSB && !nUDS_FSB && !nAS_FSB && ram/RAMEN)); +nRAMUWE <= NOT ((NOT nWE_FSB AND NOT nUDS_FSB AND NOT nAS_FSB AND ram/RAMEN)); -assign nRAS = !(((ram/RefRAS) - || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && !nAS_FSB && - ram/RAMEN) - || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && - !cs/nOverlay1 && !nAS_FSB && ram/RAMEN))); +nRAS <= '1'; -assign nRES_I = 1'b0; -assign nRES = nRES_OE ? nRES_I : 1'bZ; -assign nRES_OE = !cnt/nRESout; +nRES_I <= '0'; +nRES <= nRES_I when nRES_OE = '1' else 'Z'; +nRES_OE <= NOT nRESout; + +FDCPE_nRESout: FDCPE port map (nRESout,nRESout_D,FCLK,'0','0'); +nRESout_D <= (cnt/INITS_FSM_FFd1 AND NOT cnt/INITS_FSM_FFd2); -assign nROMCS = !(((!A_FSB[23] && A_FSB[22] && !A_FSB[21] && !A_FSB[20]) - || (!A_FSB[23] && !A_FSB[21] && !A_FSB[20] && - !cs/nOverlay1))); +nROMCS <= NOT (((NOT A_FSB(23) AND NOT A_FSB(21) AND NOT A_FSB(20) AND NOT cs/nOverlay) + OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20)))); -assign nROMWE = !((!nWE_FSB && !nAS_FSB)); +nROMWE <= NOT ((NOT nWE_FSB AND NOT nAS_FSB)); -FDCPE FDCPE_nUDS_IOB (nUDS_IOB_I,nUDS_IOB,!C16M,1'b0,1'b0); -assign nUDS_IOB = ((iobs/IOU0 && !iobm/IOS_FSM_FFd3 && - iobm/IOS_FSM_FFd2) - || (iobs/IOU0 && iobm/IOS_FSM_FFd1 && - iobm/IOS_FSM_FFd2) - || (!iobs/IORW0 && iobs/IOU0 && iobm/IOS_FSM_FFd3 && - !iobm/IOS_FSM_FFd1)); -assign nUDS_IOB = nUDS_IOB_OE ? nUDS_IOB_I : 1'bZ; -assign nUDS_IOB_OE = !nAoutOE; +FDCPE_nUDS_IOB: FDCPE port map (nUDS_IOB_I,nUDS_IOB,NOT C16M,'0','0'); +nUDS_IOB <= ((IOU0 AND NOT iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2) + OR (IOU0 AND iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2) + OR (IORW0 AND IOU0 AND iobm/IOS_FSM_FFd3 AND + NOT iobm/IOS_FSM_FFd1)); +nUDS_IOB <= nUDS_IOB_I when nUDS_IOB_OE = '1' else 'Z'; +nUDS_IOB_OE <= NOT nAoutOE; -FTCPE FTCPE_nVMA_IOB (nVMA_IOB_I,nVMA_IOB_T,C16M,1'b0,1'b0); -assign nVMA_IOB_T = ((!nVMA_IOB && !iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] && - !iobm/ES[3] && !iobm/ES[4]) - || (nVMA_IOB && iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && - !iobm/ES[3] && !iobm/ES[4] && iobm/IOACT && iobm/VPArf && - iobm/VPArr)); -assign nVMA_IOB = nVMA_IOB_OE ? nVMA_IOB_I : 1'bZ; -assign nVMA_IOB_OE = !nAoutOE; +FTCPE_nVMA_IOB: FTCPE port map (nVMA_IOB_I,nVMA_IOB_T,C16M,'0','0'); +nVMA_IOB_T <= ((NOT nVMA_IOB AND NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND + NOT iobm/ES(3) AND NOT iobm/ES(4)) + OR (nVMA_IOB AND iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND + NOT iobm/ES(3) AND NOT iobm/ES(4) AND IOACT AND iobm/VPArf AND iobm/VPArr)); +nVMA_IOB <= nVMA_IOB_I when nVMA_IOB_OE = '1' else 'Z'; +nVMA_IOB_OE <= NOT nAoutOE; -assign nVPA_FSB = !((fsb/VPA && !nAS_FSB)); +nVPA_FSB <= NOT ((fsb/VPA AND NOT nAS_FSB)); -FDCPE FDCPE_ram/BACTr (ram/BACTr,ram/BACTr_D,FCLK,1'b0,1'b0); -assign ram/BACTr_D = (nAS_FSB && !fsb/ASrf); +FDCPE_ram/BACTr: FDCPE port map (ram/BACTr,ram/BACTr_D,FCLK,'0','0'); +ram/BACTr_D <= (nAS_FSB AND NOT fsb/ASrf); -FDCPE FDCPE_ram/RAMEN (ram/RAMEN,ram/RAMEN_D,FCLK,1'b0,1'b0); -assign ram/RAMEN_D = ((!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && !nAS_FSB && - !ram/RS_FSM_FFd1 && ram/RAMEN) - || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && - !ram/RS_FSM_FFd1 && ram/RAMEN && fsb/ASrf) - || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && - !cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd1 && ram/RAMEN) - || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && - !cs/nOverlay1 && !ram/RS_FSM_FFd1 && ram/RAMEN && fsb/ASrf) - || (ram/RS_FSM_FFd2 && ram/RAMEN) - || (ram/RS_FSM_FFd3 && ram/RAMEN) - || (!ram/RS_FSM_FFd1 && !ram/RefUrgent && ram/RAMEN && +FDCPE_ram/RAMEN: FDCPE port map (ram/RAMEN,ram/RAMEN_D,FCLK,'0','0'); +ram/RAMEN_D <= ((ram/RS_FSM_FFd3 AND ram/RAMEN) + OR (ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND ram/RAMEN) + OR (NOT ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd2 AND ram/RAMEN) + OR (nAS_FSB AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT fsb/ASrf) + OR (nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT fsb/ASrf) + OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RefUrg AND ram/RAMEN AND ram/BACTr) - || (!ram/RS_FSM_FFd1 && !ram/RefUrgent && ram/RAMEN && - !ram/RefReq) - || (nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RefUrgent && - !ram/RS_FSM_FFd3 && !fsb/ASrf)); + OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RefUrg AND ram/RAMEN AND + NOT ram/RefReq) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND NOT nAS_FSB AND + NOT ram/RS_FSM_FFd1 AND ram/RAMEN) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND + NOT ram/RS_FSM_FFd1 AND ram/RAMEN AND fsb/ASrf)); -FDCPE FDCPE_ram/RAMReady (ram/RAMReady,ram/RAMReady_D,FCLK,1'b0,1'b0); -assign ram/RAMReady_D = ((RA_6_OBUF.EXP) - || (A_FSB[23] && !ram/RS_FSM_FFd2 && !ram/RefUrgent && - !ram/RS_FSM_FFd3 && !ram/RefReq) - || (A_FSB[22] && !A_FSB[21] && !ram/RS_FSM_FFd2 && - !ram/RefUrgent && !ram/RS_FSM_FFd3 && ram/BACTr) - || (A_FSB[22] && !A_FSB[21] && !ram/RS_FSM_FFd2 && - !ram/RefUrgent && !ram/RS_FSM_FFd3 && !ram/RefReq) - || (A_FSB[22] && cs/nOverlay1 && !ram/RS_FSM_FFd2 && - !ram/RefUrgent && !ram/RS_FSM_FFd3 && ram/BACTr) - || (!A_FSB[22] && !cs/nOverlay1 && !ram/RS_FSM_FFd2 && - !ram/RefUrgent && !ram/RS_FSM_FFd3 && ram/BACTr) - || (ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && - !ram/RefUrgent && !ram/RS_FSM_FFd3) - || (A_FSB[23] && !ram/RS_FSM_FFd2 && !ram/RefUrgent && - !ram/RS_FSM_FFd3 && ram/BACTr) - || (nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RefUrgent && - !ram/RS_FSM_FFd3 && !fsb/ASrf)); +FDCPE_ram/RAMReady: FDCPE port map (ram/RAMReady,ram/RAMReady_D,FCLK,'0','0'); +ram/RAMReady_D <= ((A_FSB(23) AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT ram/RefReq) + OR (A_FSB(22) AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND ram/BACTr) + OR (A_FSB(22) AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT ram/RefReq) + OR (A_FSB(23) AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND ram/BACTr) + OR (ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg) + OR (NOT cs/nOverlay AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND ram/BACTr) + OR (NOT cs/nOverlay AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT ram/RefReq) + OR (nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT fsb/ASrf) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND + NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND + NOT ram/RAMEN)); -FDCPE FDCPE_ram/RASEL (ram/RASEL,ram/RASEL_D,FCLK,1'b0,1'b0); -assign ram/RASEL_D = ((A_FSB[22] && !A_FSB[21] && !ram/RS_FSM_FFd2 && - !ram/RefUrgent && !ram/RS_FSM_FFd3 && !ram/RefReq) - || (A_FSB[22] && cs/nOverlay1 && !ram/RS_FSM_FFd2 && - !ram/RefUrgent && !ram/RS_FSM_FFd3 && !ram/RefReq) - || (!A_FSB[22] && !cs/nOverlay1 && !ram/RS_FSM_FFd2 && - !ram/RefUrgent && !ram/RS_FSM_FFd3 && !ram/RefReq) - || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && !nAS_FSB && - !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && !ram/RAMEN) - || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && - !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && !ram/RAMEN && fsb/ASrf) - || (ram/RAMReady.EXP) - || (A_FSB[23] && !ram/RS_FSM_FFd2 && !ram/RefUrgent && - !ram/RS_FSM_FFd3 && ram/BACTr) - || (A_FSB[23] && !ram/RS_FSM_FFd2 && !ram/RefUrgent && - !ram/RS_FSM_FFd3 && !ram/RefReq) - || (A_FSB[22] && !A_FSB[21] && !ram/RS_FSM_FFd2 && - !ram/RefUrgent && !ram/RS_FSM_FFd3 && ram/BACTr) - || (A_FSB[22] && cs/nOverlay1 && !ram/RS_FSM_FFd2 && - !ram/RefUrgent && !ram/RS_FSM_FFd3 && ram/BACTr) - || (!A_FSB[22] && !cs/nOverlay1 && !ram/RS_FSM_FFd2 && - !ram/RefUrgent && !ram/RS_FSM_FFd3 && ram/BACTr) - || (ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2) - || (ram/RS_FSM_FFd2 && ram/RS_FSM_FFd3) - || (!nAS_FSB && ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3) - || (ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && fsb/ASrf) - || (nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RefUrgent && - !ram/RS_FSM_FFd3 && !fsb/ASrf)); +FDCPE_ram/RASEL: FDCPE port map (ram/RASEL,ram/RASEL_D,FCLK,'0','0'); +ram/RASEL_D <= ((A_FSB(23) AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND + NOT ram/RefUrg AND NOT ram/RefReq) + OR (A_FSB(22) AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND + NOT ram/RefUrg AND NOT ram/RefReq) + OR (nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND + NOT ram/RefUrg AND NOT fsb/ASrf) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND NOT nAS_FSB AND + NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND NOT ram/RAMEN) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND + NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND NOT ram/RAMEN AND fsb/ASrf) + OR (A_FSB(23) AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND + NOT ram/RefUrg AND ram/BACTr) + OR (A_FSB(22) AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND + NOT ram/RefUrg AND ram/BACTr) + OR (NOT cs/nOverlay AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND + NOT ram/RefUrg AND ram/BACTr) + OR (NOT cs/nOverlay AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND + NOT ram/RefUrg AND NOT ram/RefReq) + OR (NOT nAS_FSB AND ram/RS_FSM_FFd1) + OR (ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2) + OR (ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3) + OR (ram/RS_FSM_FFd1 AND NOT ram/RefUrg) + OR (ram/RS_FSM_FFd1 AND fsb/ASrf)); -FDCPE FDCPE_ram/RS_FSM_FFd1 (ram/RS_FSM_FFd1,ram/RS_FSM_FFd1_D,FCLK,1'b0,1'b0); -assign ram/RS_FSM_FFd1_D = ((ram/RS_FSM_FFd1 && ram/RefUrgent && - !ram/RS_FSM_FFd3 && fsb/ASrf) - || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && !nAS_FSB && - !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && ram/RefUrgent && !ram/RAMEN) - || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && - !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && ram/RefUrgent && !ram/RAMEN && +FDCPE_ram/RS_FSM_FFd1: FDCPE port map (ram/RS_FSM_FFd1,ram/RS_FSM_FFd1_D,FCLK,'0','0'); +ram/RS_FSM_FFd1_D <= ((ram/RS_FSM_FFd3) + OR (ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2)); + +FDCPE_ram/RS_FSM_FFd2: FDCPE port map (ram/RS_FSM_FFd2,ram/RS_FSM_FFd2_D,FCLK,'0','0'); +ram/RS_FSM_FFd2_D <= ((ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd2 AND ram/RefUrg AND fsb/ASrf) - || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && - !cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && - ram/RefUrgent && !ram/RAMEN) - || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && - !cs/nOverlay1 && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && - ram/RefUrgent && !ram/RAMEN && fsb/ASrf) - || (ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2) - || (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd3) - || (!nAS_FSB && ram/RS_FSM_FFd1 && ram/RefUrgent && - !ram/RS_FSM_FFd3)); + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND NOT nAS_FSB AND + NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND ram/RefUrg) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND NOT nAS_FSB AND + NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND ram/RAMEN) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND + NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND ram/RefUrg AND + fsb/ASrf) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND + NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND ram/RAMEN AND + fsb/ASrf) + OR (ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3) + OR (ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3) + OR (NOT nAS_FSB AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd2 AND + ram/RefUrg)); -FDCPE FDCPE_ram/RS_FSM_FFd2 (ram/RS_FSM_FFd2,ram/RS_FSM_FFd2_D,FCLK,1'b0,1'b0); -assign ram/RS_FSM_FFd2_D = ((nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RefUrgent && - !ram/RS_FSM_FFd3 && !fsb/ASrf) - || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && !nAS_FSB && - !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3) - || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && - !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && fsb/ASrf) - || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && - !cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3) - || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && - !cs/nOverlay1 && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && fsb/ASrf) - || (ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2) - || (!nAS_FSB && ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3) - || (ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && fsb/ASrf) - || (!ram/RS_FSM_FFd2 && !ram/RefUrgent && - !ram/RS_FSM_FFd3 && ram/BACTr) - || (!ram/RS_FSM_FFd2 && !ram/RefUrgent && - !ram/RS_FSM_FFd3 && !ram/RefReq)); - -FTCPE FTCPE_ram/RS_FSM_FFd3 (ram/RS_FSM_FFd3,ram/RS_FSM_FFd3_T,FCLK,1'b0,1'b0); -assign ram/RS_FSM_FFd3_T = ((ram/RS_FSM_FFd1.EXP) - || (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2 && +FTCPE_ram/RS_FSM_FFd3: FTCPE port map (ram/RS_FSM_FFd3,ram/RS_FSM_FFd3_T,FCLK,'0','0'); +ram/RS_FSM_FFd3_T <= ((A_FSB(23) AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND ram/BACTr) + OR (A_FSB(22) AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND ram/BACTr) + OR (A_FSB(22) AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT ram/RefReq) + OR (NOT cs/nOverlay AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT ram/RefReq) + OR (A_FSB(23) AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT ram/RefReq) + OR (nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT fsb/ASrf) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND NOT nAS_FSB AND + NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND NOT ram/RAMEN) + OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND + NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND NOT ram/RAMEN AND + fsb/ASrf) + OR (NOT ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3) - || (A_FSB[23] && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && - !ram/RS_FSM_FFd3) - || (nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && - !fsb/ASrf) - || (!ram/RS_FSM_FFd2 && !ram/RefUrgent && - !ram/RS_FSM_FFd3 && !ram/RAMEN) - || (A_FSB[22] && !A_FSB[21] && !ram/RS_FSM_FFd1 && - !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3) - || (A_FSB[22] && cs/nOverlay1 && !ram/RS_FSM_FFd1 && - !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3) - || (!A_FSB[22] && !cs/nOverlay1 && !ram/RS_FSM_FFd1 && - !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3)); + OR (NOT nAS_FSB AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3) + OR (ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg) + OR (ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND fsb/ASrf) + OR (NOT cs/nOverlay AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND ram/BACTr)); -FDCPE FDCPE_ram/RefDone (ram/RefDone,ram/RefDone_D,FCLK,1'b0,1'b0); -assign ram/RefDone_D = ((ram/RefDone && ram/RefReqSync) - || (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2 && - ram/RefReqSync)); +FDCPE_ram/RefDone: FDCPE port map (ram/RefDone,ram/RefDone_D,FCLK,'0','0'); +ram/RefDone_D <= ((ram/RefDone AND ram/RefReqSync) + OR (ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + NOT ram/RS_FSM_FFd3 AND ram/RefReqSync) + OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND + ram/RS_FSM_FFd3 AND ram/RefReqSync)); -FDCPE FDCPE_ram/RefRAS (ram/RefRAS,ram/RefRAS_D,FCLK,1'b0,1'b0); -assign ram/RefRAS_D = (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2); +FDCPE_ram/RefReq: FDCPE port map (ram/RefReq,ram/RefReq_D,FCLK,'0','0'); +ram/RefReq_D <= (NOT ram/RefDone AND ram/RefReqSync); -FDCPE FDCPE_ram/RefReq (ram/RefReq,ram/RefReq_D,FCLK,1'b0,1'b0); -assign ram/RefReq_D = (!ram/RefDone && ram/RefReqSync); +FDCPE_ram/RefReqSync: FDCPE port map (ram/RefReqSync,RefReq,FCLK,'0','0'); -FDCPE FDCPE_ram/RefReqSync (ram/RefReqSync,cnt/RefReq,FCLK,1'b0,1'b0); +FDCPE_ram/RefUrg: FDCPE port map (ram/RefUrg,ram/RefUrg_D,FCLK,'0','0'); +ram/RefUrg_D <= (NOT ram/RefDone AND ram/RegUrgSync); -FDCPE FDCPE_ram/RefUrgent (ram/RefUrgent,ram/RefUrgent_D,FCLK,1'b0,1'b0); -assign ram/RefUrgent_D = (!ram/RefDone && ram/RegUrgentSync); - -FDCPE FDCPE_ram/RegUrgentSync (ram/RegUrgentSync,cnt/RefUrgent,FCLK,1'b0,1'b0); +FDCPE_ram/RegUrgSync: FDCPE port map (ram/RegUrgSync,RefUrg,FCLK,'0','0'); Register Legend: FDCPE (Q,D,C,CLR,PRE,CE); @@ -1730,7 +1710,7 @@ Global Clock Optimization : ON Global Set/Reset Optimization : ON Global Ouput Enable Optimization : ON Input Limit : 54 -Pterm Limit : 50 +Pterm Limit : 25
diff --git a/cpld/XC95144XL/WarpSE_html/fit/defeqns.htm b/cpld/XC95144XL/WarpSE_html/fit/defeqns.htm index 9136855..79685ca 100644 --- a/cpld/XC95144XL/WarpSE_html/fit/defeqns.htm +++ b/cpld/XC95144XL/WarpSE_html/fit/defeqns.htm @@ -5,13 +5,19 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -46,6 +72,84 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -177,8 +281,8 @@ - - + + @@ -202,7 +306,46 @@ - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -215,21 +358,47 @@ - - - - - + + + + + - + - + + + + + + + + + + + + + + + + + + + + + + + + + + + - + @@ -242,7 +411,7 @@ - + @@ -255,7 +424,7 @@ - + @@ -267,37 +436,24 @@ - - - - - - - - - - - - - - + - + - + - + - + @@ -307,20 +463,20 @@ - + - + - + - + @@ -333,7 +489,7 @@ - + @@ -346,7 +502,7 @@ - + @@ -359,7 +515,7 @@ - + @@ -372,7 +528,7 @@ - + @@ -385,7 +541,7 @@ - + @@ -397,50 +553,11 @@ - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + @@ -451,9 +568,9 @@ - - - + + + @@ -463,36 +580,23 @@ - - - + + + - - - + + + - - - - - - - - - - - - - - - + + @@ -503,7 +607,20 @@ - + + + + + + + + + + + + + + @@ -514,49 +631,23 @@ - - - - - - - - - - - - - - + - - + + - + - - - - - - - - - - - - - - + - + @@ -567,14 +658,14 @@ - - - - + + + + - - + + @@ -583,7 +674,7 @@ - + @@ -593,88 +684,75 @@ - + - + - - - - - - - - - - - - - - - - + + + - - + + - - - + + + - - + + - - - + + + - - + + - - - + + + - - + + - - - + + + - + - + @@ -687,10 +765,10 @@ - + - + @@ -700,12 +778,12 @@ - + - - - + + + @@ -713,7 +791,7 @@ - + @@ -726,12 +804,12 @@ - + - - - + + + @@ -739,12 +817,12 @@ - + - - - + + + @@ -765,72 +843,46 @@ - + - - - + + + - - + + - + - - - - - - - - - - - - - - - - - - - - - - - - - - - + - - - + + + - - + + @@ -843,7 +895,7 @@ - + @@ -856,12 +908,12 @@ - + - - - + + + @@ -869,12 +921,12 @@ - + - - - + + + @@ -882,10 +934,10 @@ - + - + @@ -895,12 +947,12 @@ - + - - - + + + @@ -908,20 +960,7 @@ - - - - - - - - - - - - - - + @@ -933,8 +972,8 @@ - - + + @@ -947,25 +986,12 @@ - + - - - - - - - - - - - - - - - + + @@ -973,36 +999,10 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - + @@ -1012,10 +1012,10 @@ - + - + @@ -1024,26 +1024,13 @@ - - + + - - - - - - - - - - - - - - - + + @@ -1051,10 +1038,10 @@ - + - + @@ -1063,8 +1050,8 @@ - - + + @@ -1076,12 +1063,12 @@ - - + + - - + + @@ -1089,8 +1076,8 @@ - - + + @@ -1102,12 +1089,12 @@ - - + + - - + + @@ -1152,8 +1139,8 @@ - - + + @@ -1204,7 +1191,7 @@ - + @@ -1308,8 +1295,8 @@ - - + + @@ -1333,6 +1320,19 @@ + + + + + + + + + + + + + @@ -1401,84 +1401,32 @@ - - + + - - + + - - - + + + - - + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + @@ -1489,11 +1437,11 @@ - - - - - + + + + + @@ -1502,16 +1450,55 @@ - - + + - + - + + + + + + + + + + + + + + - + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -1519,32 +1506,6 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - @@ -1554,10 +1515,36 @@ - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/cpld/XC95144XL/WarpSE_html/fit/maplogic_01.htm b/cpld/XC95144XL/WarpSE_html/fit/maplogic_01.htm index c0e0856..de2d94d 100644 --- a/cpld/XC95144XL/WarpSE_html/fit/maplogic_01.htm +++ b/cpld/XC95144XL/WarpSE_html/fit/maplogic_01.htm @@ -20,9 +20,9 @@ - - + + @@ -33,9 +33,9 @@ - + + - @@ -46,9 +46,9 @@ - - + + @@ -59,9 +59,9 @@ - + + - @@ -72,9 +72,9 @@ - + + - @@ -85,7 +85,7 @@ - + @@ -98,7 +98,7 @@ - + @@ -111,9 +111,9 @@ - - - + + + @@ -124,9 +124,9 @@ - - - + + + @@ -137,9 +137,9 @@ - - - + + + @@ -150,9 +150,9 @@ - - - + + + @@ -163,9 +163,9 @@ - - - + + + @@ -176,9 +176,9 @@ - + + - @@ -189,9 +189,9 @@ - - - + + + @@ -202,9 +202,9 @@ - - - + + + @@ -215,9 +215,9 @@ - + + - @@ -228,9 +228,9 @@ - + + - @@ -241,8 +241,8 @@ - - + + @@ -258,58 +258,6 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - @@ -319,7 +267,7 @@ - + @@ -332,7 +280,7 @@ - + @@ -345,7 +293,7 @@ - + @@ -358,7 +306,7 @@ - + @@ -371,9 +319,9 @@ - - - + + + @@ -384,9 +332,9 @@ - - - + + + @@ -397,21 +345,21 @@ - - - + + + - + - - - + + + - + @@ -423,45 +371,58 @@ - - - - - - - - - - - - - - + - + - + + - - + - + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -475,9 +436,35 @@ - + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -488,9 +475,9 @@ - - + + @@ -501,9 +488,9 @@ - - + + @@ -540,9 +527,9 @@ - + + - @@ -566,7 +553,7 @@ - + @@ -579,9 +566,9 @@ - + - + @@ -605,9 +592,9 @@ - + - + @@ -618,9 +605,9 @@ - + - + @@ -631,9 +618,9 @@ - + - + @@ -644,9 +631,9 @@ - - - + + + @@ -657,8 +644,8 @@ - - + + @@ -670,9 +657,9 @@ - - - + + + @@ -683,9 +670,9 @@ - - - + + + @@ -696,19 +683,6 @@ - - - - - - - - - - - - - @@ -722,9 +696,9 @@ - - - + + + @@ -735,19 +709,6 @@ - - - - - - - - - - - - - @@ -774,9 +735,9 @@ - - - + + + @@ -787,9 +748,9 @@ - - + + @@ -813,9 +774,9 @@ - - - + + + @@ -852,19 +813,6 @@ - - - - - - - - - - - - - @@ -891,9 +839,22 @@ - - - + + + + + + + + + + + + + + + + @@ -930,9 +891,9 @@ - - + + @@ -943,9 +904,9 @@ - - - + + + @@ -956,9 +917,9 @@ - + - + @@ -969,9 +930,9 @@ - + - + @@ -982,9 +943,9 @@ - + - + @@ -995,8 +956,8 @@ - - + + @@ -1021,9 +982,9 @@ - - - + + + @@ -1060,9 +1021,9 @@ - + - + @@ -1099,9 +1060,9 @@ - - - + + + @@ -1125,9 +1086,9 @@ - - - + + + @@ -1138,9 +1099,9 @@ - - - + + + @@ -1165,7 +1126,7 @@ - + @@ -1178,7 +1139,7 @@ - + @@ -1217,7 +1178,7 @@ - + @@ -1230,8 +1191,8 @@ - - + + @@ -1256,7 +1217,7 @@ - + @@ -1295,7 +1256,7 @@ - + @@ -1321,7 +1282,7 @@ - + @@ -1334,7 +1295,7 @@ - + @@ -1347,7 +1308,7 @@ - + @@ -1360,7 +1321,7 @@ - + @@ -1372,9 +1333,9 @@ - - - + + + @@ -1398,9 +1359,9 @@ - - - + + + @@ -1411,9 +1372,9 @@ - - + + @@ -1425,8 +1386,8 @@ - - + + @@ -1450,9 +1411,9 @@ - + - + @@ -1476,9 +1437,9 @@ - - - + + + @@ -1489,9 +1450,22 @@ - + + + + + + + + + + + + + + - + @@ -1515,9 +1489,9 @@ - + + - @@ -1541,9 +1515,9 @@ - - - + + + @@ -1554,9 +1528,9 @@ - + - + @@ -1566,6 +1540,19 @@ + + + + + + + + + + + + +
********** Mapped Logic **********
+FDCPE_ALE0M: FDCPE port map (ALE0M,ALE0M_D,C16M,'0','0'); +
     ALE0M_D <= ((iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2) +
      OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2 AND +
      NOT iobm/IOREQr));
-assign C20MEN = 1'b1; +FDCPE_ALE0S: FDCPE port map (ALE0S,ALE0S_D,FCLK,'0','0'); +
     ALE0S_D <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1);
-assign C25MEN = 1'b1; +C20MEN <= '1';
+C25MEN <= '1';
@@ -39,855 +45,831 @@ assign C25MEN = 1'b1;
-
-
-
-
-
-assign RA[0] = ((A_FSB[10] && !ram/RASEL) -
      || (ram/RASEL && A_FSB[1])); -
-
-assign RA[1] = ((A_FSB[11] && !ram/RASEL) -
      || (ram/RASEL && A_FSB[2])); -
-
-assign RA[2] = ((A_FSB[12] && !ram/RASEL) -
      || (ram/RASEL && A_FSB[3])); -
-
-assign RA[3] = ((A_FSB[13] && !ram/RASEL) -
      || (ram/RASEL && A_FSB[4])); -
-
-assign RA[4] = ((ram/RASEL && A_FSB[5]) -
      || (A_FSB[14] && !ram/RASEL)); -
-
-assign RA[5] = ((A_FSB[15] && !ram/RASEL) -
      || (ram/RASEL && A_FSB[6])); -
-
-assign RA[6] = ((ram/RASEL && A_FSB[7]) -
      || (A_FSB[16] && !ram/RASEL)); -
-
-assign RA[7] = ((A_FSB[8] && ram/RASEL) -
      || (A_FSB[17] && !ram/RASEL)); -
-
-assign RA[8] = ((A_FSB[9] && !A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && -
      ram/RASEL) -
      || (A_FSB[9] && !A_FSB[23] && A_FSB[22] && A_FSB[21] && -
      !cs/nOverlay1 && ram/RASEL) -
      || (A_FSB[23] && A_FSB[18]) -
      || (A_FSB[18] && !ram/RASEL) -
      || (A_FSB[22] && !A_FSB[21] && A_FSB[18]) -
      || (A_FSB[22] && A_FSB[18] && cs/nOverlay1) -
      || (!A_FSB[22] && A_FSB[18] && !cs/nOverlay1)); -
-
-assign RA[9] = ((A_FSB[20] && ram/RASEL) -
      || (A_FSB[19] && !ram/RASEL)); -
-
-assign RA[10] = A_FSB[21]; -
-
-assign RA[11] = A_FSB[19]; -
-FDCPE FDCPE_cnt/IPL2r (cnt/IPL2r,!nIPL2,!C8M,1'b0,1'b0); -
-FTCPE FTCPE_cnt/LTimer0 (cnt/LTimer[0],cnt/LTimer_T[0],!C8M,1'b0,1'b0,cnt/TimerTC); -
     assign cnt/LTimer_T[0] = (!cnt/LTimer[0] && cnt/LTimer[13] && cnt/TimerTC); -
-FDCPE FDCPE_cnt/LTimer1 (cnt/LTimer[1],cnt/LTimer_D[1],!C8M,1'b0,1'b0,cnt/TimerTC); -
     assign cnt/LTimer_D[1] = ((cnt/LTimer[0] && cnt/LTimer[1]) -
      || (!cnt/LTimer[0] && !cnt/LTimer[1]) -
      || (cnt/LTimer[13] && cnt/TimerTC)); -
-FTCPE FTCPE_cnt/LTimer2 (cnt/LTimer[2],cnt/LTimer_T[2],!C8M,1'b0,1'b0,cnt/TimerTC); -
     assign cnt/LTimer_T[2] = ((cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1]) -
      || (cnt/LTimer[0] && cnt/LTimer[1] && !cnt/TimerTC) -
      || (cnt/LTimer[13] && cnt/LTimer[2] && cnt/TimerTC)); -
-FTCPE FTCPE_cnt/LTimer3 (cnt/LTimer[3],cnt/LTimer_T[3],!C8M,1'b0,1'b0,cnt/TimerTC); -
     assign cnt/LTimer_T[3] = ((cnt/LTimer[13] && cnt/LTimer[3] && cnt/TimerTC) -
      || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && -
      cnt/LTimer[2]) -
      || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && -
      !cnt/TimerTC)); -
-FTCPE FTCPE_cnt/LTimer4 (cnt/LTimer[4],cnt/LTimer_T[4],!C8M,1'b0,1'b0,cnt/TimerTC); -
     assign cnt/LTimer_T[4] = ((cnt/LTimer[13] && cnt/LTimer[4] && cnt/TimerTC) -
      || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && -
      cnt/LTimer[2] && cnt/LTimer[3]) -
      || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && -
      cnt/LTimer[3] && !cnt/TimerTC)); -
-FTCPE FTCPE_cnt/LTimer5 (cnt/LTimer[5],cnt/LTimer_T[5],!C8M,1'b0,1'b0,cnt/TimerTC); -
     assign cnt/LTimer_T[5] = ((cnt/LTimer[13] && cnt/LTimer[5] && cnt/TimerTC) -
      || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && -
      cnt/LTimer[2] && cnt/LTimer[3] && cnt/LTimer[4]) -
      || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && -
      cnt/LTimer[3] && cnt/LTimer[4] && !cnt/TimerTC)); -
-FTCPE FTCPE_cnt/LTimer6 (cnt/LTimer[6],cnt/LTimer_T[6],!C8M,1'b0,1'b0,cnt/TimerTC); -
     assign cnt/LTimer_T[6] = ((cnt/LTimer[13] && cnt/LTimer[6] && cnt/TimerTC) -
      || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && -
      cnt/LTimer[2] && cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4]) -
      || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && -
      cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && !cnt/TimerTC)); -
-FTCPE FTCPE_cnt/LTimer7 (cnt/LTimer[7],cnt/LTimer_T[7],!C8M,1'b0,1'b0,cnt/TimerTC); -
     assign cnt/LTimer_T[7] = ((cnt/LTimer[13] && cnt/LTimer[7] && cnt/TimerTC) -
      || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && -
      cnt/LTimer[2] && cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && -
      cnt/LTimer[6]) -
      || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && -
      cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && cnt/LTimer[6] && -
      !cnt/TimerTC)); -
-FTCPE FTCPE_cnt/LTimer8 (cnt/LTimer[8],cnt/LTimer_T[8],!C8M,1'b0,1'b0,cnt/TimerTC); -
     assign cnt/LTimer_T[8] = ((cnt/LTimer[13] && cnt/LTimer[8] && cnt/TimerTC) -
      || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && -
      cnt/LTimer[2] && cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && -
      cnt/LTimer[6] && cnt/LTimer[7]) -
      || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && -
      cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && cnt/LTimer[6] && -
      cnt/LTimer[7] && !cnt/TimerTC)); -
-FTCPE FTCPE_cnt/LTimer9 (cnt/LTimer[9],cnt/LTimer_T[9],!C8M,1'b0,1'b0,cnt/TimerTC); -
     assign cnt/LTimer_T[9] = ((cnt/LTimer[13] && cnt/LTimer[9] && cnt/TimerTC) -
      || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && -
      cnt/LTimer[2] && cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && -
      cnt/LTimer[6] && cnt/LTimer[7] && cnt/LTimer[8]) -
      || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && -
      cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && cnt/LTimer[6] && -
      cnt/LTimer[7] && cnt/LTimer[8] && !cnt/TimerTC)); -
-FTCPE FTCPE_cnt/LTimer10 (cnt/LTimer[10],cnt/LTimer_T[10],!C8M,1'b0,1'b0,cnt/TimerTC); -
     assign cnt/LTimer_T[10] = ((cnt/LTimer[13] && cnt/LTimer[10] && cnt/TimerTC) -
      || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && -
      cnt/LTimer[2] && cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && -
      cnt/LTimer[6] && cnt/LTimer[7] && cnt/LTimer[9] && cnt/LTimer[8]) -
      || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && -
      cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && cnt/LTimer[6] && -
      cnt/LTimer[7] && cnt/LTimer[9] && cnt/LTimer[8] && !cnt/TimerTC)); -
-FTCPE FTCPE_cnt/LTimer11 (cnt/LTimer[11],cnt/LTimer_T[11],!C8M,1'b0,1'b0,cnt/TimerTC); -
     assign cnt/LTimer_T[11] = ((cnt/LTimer[13] && cnt/LTimer[11] && cnt/TimerTC) -
      || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && -
      cnt/LTimer[2] && cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && -
      cnt/LTimer[6] && cnt/LTimer[7] && cnt/LTimer[9] && cnt/LTimer[10] && -
      cnt/LTimer[8]) -
      || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && -
      cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && cnt/LTimer[6] && -
      cnt/LTimer[7] && cnt/LTimer[9] && cnt/LTimer[10] && cnt/LTimer[8] && -
      !cnt/TimerTC)); -
-FTCPE FTCPE_cnt/LTimer12 (cnt/LTimer[12],cnt/LTimer_T[12],!C8M,1'b0,1'b0,cnt/TimerTC); -
     assign cnt/LTimer_T[12] = ((cnt/LTimer[13] && cnt/LTimer[12] && cnt/TimerTC) -
      || (cnt/LTimer[0] && !cnt/LTimer[13] && cnt/LTimer[1] && -
      cnt/LTimer[2] && cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && -
      cnt/LTimer[6] && cnt/LTimer[7] && cnt/LTimer[9] && cnt/LTimer[10] && -
      cnt/LTimer[11] && cnt/LTimer[8]) -
      || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && -
      cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && cnt/LTimer[6] && -
      cnt/LTimer[7] && cnt/LTimer[9] && cnt/LTimer[10] && cnt/LTimer[11] && -
      cnt/LTimer[8] && !cnt/TimerTC)); -
-FTCPE FTCPE_cnt/LTimer13 (cnt/LTimer[13],cnt/LTimer_T[13],!C8M,1'b0,1'b0,cnt/TimerTC); -
     assign cnt/LTimer_T[13] = ((cnt/LTimer[13] && cnt/TimerTC) -
      || (cnt/LTimer[0] && cnt/LTimer[1] && cnt/LTimer[2] && -
      cnt/LTimer[3] && cnt/LTimer[5] && cnt/LTimer[4] && cnt/LTimer[6] && -
      cnt/LTimer[7] && cnt/LTimer[9] && cnt/LTimer[10] && cnt/LTimer[11] && -
      cnt/LTimer[8] && cnt/LTimer[12])); -
-FTCPE FTCPE_cnt/PORS_FSM_FFd1 (cnt/PORS_FSM_FFd1,cnt/PORS_FSM_FFd1_T,!C8M,1'b0,1'b0); -
     assign cnt/PORS_FSM_FFd1_T = (cnt/LTimer[13] && !cnt/PORS_FSM_FFd1 && -
      cnt/PORS_FSM_FFd2 && !cnt/IPL2r); -
-FDCPE FDCPE_cnt/PORS_FSM_FFd2 (cnt/PORS_FSM_FFd2,cnt/PORS_FSM_FFd2_D,!C8M,1'b0,1'b0); -
     assign cnt/PORS_FSM_FFd2_D = ((cnt/LTimer[13] && !cnt/PORS_FSM_FFd1) -
      || (!cnt/LTimer[13] && cnt/PORS_FSM_FFd2)); -
-FDCPE FDCPE_cnt/RefReq (cnt/RefReq,cnt/RefReq_D,E,1'b0,1'b0); -
     assign cnt/RefReq_D = ((cnt/Timer[1] && !cnt/Timer[3]) -
      || (cnt/Timer[2] && !cnt/Timer[3]) -
      || (!cnt/Timer[1] && !cnt/Timer[2] && !cnt/Timer[0] && -
      cnt/Timer[3])); -
-FDCPE FDCPE_cnt/RefUrgent (cnt/RefUrgent,cnt/RefUrgent_D,E,1'b0,1'b0); -
     assign cnt/RefUrgent_D = ((cnt/Timer[1] && cnt/Timer[2] && !cnt/Timer[3]) -
      || (!cnt/Timer[1] && !cnt/Timer[2] && !cnt/Timer[0] && -
      cnt/Timer[3])); -
-FDCPE FDCPE_cnt/Timer0 (cnt/Timer[0],cnt/Timer_D[0],E,1'b0,1'b0); -
     assign cnt/Timer_D[0] = (!cnt/TimerTC && !cnt/Timer[0]); -
-FDCPE FDCPE_cnt/Timer1 (cnt/Timer[1],cnt/Timer_D[1],E,1'b0,1'b0); -
     assign cnt/Timer_D[1] = ((!cnt/TimerTC && cnt/Timer[1] && !cnt/Timer[0]) -
      || (!cnt/TimerTC && !cnt/Timer[1] && cnt/Timer[0])); -
-FTCPE FTCPE_cnt/Timer2 (cnt/Timer[2],cnt/Timer_T[2],E,1'b0,1'b0); -
     assign cnt/Timer_T[2] = ((cnt/TimerTC && cnt/Timer[2]) -
      || (!cnt/TimerTC && cnt/Timer[1] && cnt/Timer[0])); -
-FTCPE FTCPE_cnt/Timer3 (cnt/Timer[3],cnt/Timer_T[3],E,1'b0,1'b0); -
     assign cnt/Timer_T[3] = ((cnt/TimerTC && cnt/Timer[3]) -
      || (!cnt/TimerTC && cnt/Timer[1] && cnt/Timer[2] && -
      cnt/Timer[0])); -
-FDCPE FDCPE_cnt/TimerTC (cnt/TimerTC,cnt/TimerTC_D,E,1'b0,1'b0); -
     assign cnt/TimerTC_D = (!cnt/Timer[1] && !cnt/Timer[2] && !cnt/Timer[0] && -
      cnt/Timer[3]); -
-FDCPE FDCPE_cnt/nRESout (cnt/nRESout,cnt/nRESout_D,!C8M,1'b0,1'b0); -
     assign cnt/nRESout_D = ((cnt/LTimer[13] && cnt/PORS_FSM_FFd1 && -
      !cnt/PORS_FSM_FFd2) -
      || (cnt/PORS_FSM_FFd1 && !cnt/PORS_FSM_FFd2 && -
      cnt/nRESout)); -
-FTCPE FTCPE_cs/nOverlay0 (cs/nOverlay0,cs/nOverlay0_T,FCLK,!nRES.PIN,1'b0); -
     assign cs/nOverlay0_T = ((!A_FSB[23] && A_FSB[22] && !A_FSB[21] && !A_FSB[20] && -
      !cs/nOverlay0 && !nAS_FSB) -
      || (!A_FSB[23] && A_FSB[22] && !A_FSB[21] && !A_FSB[20] && -
      !cs/nOverlay0 && fsb/ASrf)); -
-FDCPE FDCPE_cs/nOverlay1 (cs/nOverlay1,cs/nOverlay0,FCLK,1'b0,1'b0,cs/nOverlay1_CE); -
     assign cs/nOverlay1_CE = (nAS_FSB && !fsb/ASrf); -
-FDCPE FDCPE_fsb/ASrf (fsb/ASrf,!nAS_FSB,!FCLK,1'b0,1'b0); -
-FDCPE FDCPE_fsb/Ready0r (fsb/Ready0r,fsb/Ready0r_D,FCLK,1'b0,1'b0); -
     assign fsb/Ready0r_D = ((nAS_FSB && !fsb/ASrf) -
      || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && -
      !fsb/Ready0r && !ram/RAMReady) -
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && -
      !cs/nOverlay1 && !fsb/Ready0r && !ram/RAMReady)); -
-FDCPE FDCPE_fsb/Ready1r (fsb/Ready1r,fsb/Ready1r_D,FCLK,1'b0,1'b0); -
     assign fsb/Ready1r_D = ((A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && -
      A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && -
      !fsb/Ready1r && !iobs/IOReady && !nADoutLE1) -
      || (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && -
      A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && -
      !fsb/Ready1r && !iobs/IOReady && !nADoutLE1) -
      || (nAS_FSB && !fsb/ASrf) -
      || (A_FSB[23] && !fsb/Ready1r && !iobs/IOReady) -
      || (A_FSB[22] && A_FSB[21] && !fsb/Ready1r && -
      !iobs/IOReady) -
      || (A_FSB[22] && A_FSB[20] && !fsb/Ready1r && -
      !iobs/IOReady)); -
-FDCPE FDCPE_fsb/VPA (fsb/VPA,fsb/VPA_D,FCLK,1'b0,1'b0); -
     assign fsb/VPA_D = ((EXP15_.EXP) -
      || (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && -
      A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && -
      !fsb/Ready1r && fsb/VPA && !iobs/IOReady && !nAS_FSB && !nADoutLE1) -
      || (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && -
      A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && -
      !fsb/Ready1r && fsb/VPA && !iobs/IOReady && fsb/ASrf && !nADoutLE1) -
      || (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && -
      A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && -
      !fsb/Ready1r && fsb/VPA && !iobs/IOReady && !nAS_FSB && !nADoutLE1) -
      || (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && -
      A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && -
      !fsb/Ready1r && fsb/VPA && !iobs/IOReady && fsb/ASrf && !nADoutLE1) -
      || (A_FSB[9] && A_FSB[8] && A_FSB[15] && A_FSB[14] && -
      A_FSB[13] && A_FSB[12] && A_FSB[11] && A_FSB[10] && A_FSB[23] && -
      A_FSB[22] && A_FSB[21] && A_FSB[20] && A_FSB[19] && A_FSB[18] && -
      A_FSB[17] && A_FSB[16] && iobs/IOReady && !nAS_FSB) -
      || (A_FSB[22] && A_FSB[20] && !fsb/Ready1r && fsb/VPA && -
      !iobs/IOReady && fsb/ASrf) -
      || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && -
      !fsb/Ready0r && fsb/VPA && !nAS_FSB && !ram/RAMReady) -
      || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && -
      !fsb/Ready0r && fsb/VPA && fsb/ASrf && !ram/RAMReady) -
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && -
      !cs/nOverlay1 && !fsb/Ready0r && fsb/VPA && !nAS_FSB && !ram/RAMReady) -
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && -
      !cs/nOverlay1 && !fsb/Ready0r && fsb/VPA && fsb/ASrf && !ram/RAMReady) -
      || (A_FSB[23] && !fsb/Ready1r && fsb/VPA && -
      !iobs/IOReady && !nAS_FSB) -
      || (A_FSB[23] && !fsb/Ready1r && fsb/VPA && -
      !iobs/IOReady && fsb/ASrf) -
      || (A_FSB[22] && A_FSB[21] && !fsb/Ready1r && fsb/VPA && -
      !iobs/IOReady && !nAS_FSB) -
      || (A_FSB[22] && A_FSB[21] && !fsb/Ready1r && fsb/VPA && -
      !iobs/IOReady && fsb/ASrf) -
      || (A_FSB[22] && A_FSB[20] && !fsb/Ready1r && fsb/VPA && -
      !iobs/IOReady && !nAS_FSB)); -
-FDCPE FDCPE_iobm/ALE0 (iobm/ALE0,iobm/ALE0_D,C16M,1'b0,1'b0); -
     assign iobm/ALE0_D = ((iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2) -
      || (!iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd2 && -
      !iobm/IOREQr)); -
-FDCPE FDCPE_iobm/BERRrf (iobm/BERRrf,!nBERR_IOB,!C16M,1'b0,1'b0); -
-FDCPE FDCPE_iobm/BERRrr (iobm/BERRrr,!nBERR_IOB,C16M,1'b0,1'b0); -
-FDCPE FDCPE_iobm/DTACKrf (iobm/DTACKrf,!nDTACK_IOB,!C16M,1'b0,1'b0); -
-FDCPE FDCPE_iobm/DTACKrr (iobm/DTACKrr,!nDTACK_IOB,C16M,1'b0,1'b0); -
-FDCPE FDCPE_iobm/DoutOE (iobm/DoutOE,iobm/DoutOE_D,C16M,1'b0,1'b0); -
     assign iobm/DoutOE_D = ((iobs/IORW0 && iobm/IOS_FSM_FFd3) -
      || (iobs/IORW0 && iobm/IOS_FSM_FFd2)); -
-FTCPE FTCPE_iobm/ES0 (iobm/ES[0],iobm/ES_T[0],C16M,1'b0,1'b0); -
     assign iobm/ES_T[0] = ((iobm/ES[0] && !iobm/Er && iobm/Er2) -
      || (!iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] && -
      !iobm/ES[3] && !iobm/ES[4] && iobm/Er) -
      || (!iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] && -
      !iobm/ES[3] && !iobm/ES[4] && !iobm/Er2)); -
-FDCPE FDCPE_iobm/ES1 (iobm/ES[1],iobm/ES_D[1],C16M,1'b0,1'b0); -
     assign iobm/ES_D[1] = ((iobm/ES[0] && iobm/ES[1]) -
      || (!iobm/ES[0] && !iobm/ES[1]) -
      || (!iobm/Er && iobm/Er2)); -
-FDCPE FDCPE_iobm/ES2 (iobm/ES[2],iobm/ES_D[2],C16M,1'b0,1'b0); -
     assign iobm/ES_D[2] = ((!iobm/ES[0] && !iobm/ES[2]) -
      || (!iobm/ES[1] && !iobm/ES[2]) -
      || (!iobm/Er && iobm/Er2) -
      || (iobm/ES[0] && iobm/ES[1] && iobm/ES[2]) -
      || (!iobm/ES[2] && !iobm/ES[3] && iobm/ES[4])); -
-FTCPE FTCPE_iobm/ES3 (iobm/ES[3],iobm/ES_T[3],C16M,1'b0,1'b0); -
     assign iobm/ES_T[3] = ((iobm/ES[3] && !iobm/Er && iobm/Er2) -
      || (iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && iobm/Er) -
      || (iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && !iobm/Er2)); -
-FTCPE FTCPE_iobm/ES4 (iobm/ES[4],iobm/ES_T[4],C16M,1'b0,1'b0); -
     assign iobm/ES_T[4] = ((iobm/ES[4] && !iobm/Er && iobm/Er2) -
      || (iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && -
      iobm/ES[3] && iobm/Er) -
      || (iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && -
      iobm/ES[3] && !iobm/Er2) -
      || (iobm/ES[0] && iobm/ES[1] && !iobm/ES[2] && -
      !iobm/ES[3] && iobm/ES[4])); -
-FDCPE FDCPE_iobm/ETACK (iobm/ETACK,iobm/ETACK_D,C16M,1'b0,1'b0); -
     assign iobm/ETACK_D = (!nVMA_IOB && !iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] && -
      !iobm/ES[3] && iobm/ES[4]); -
-FDCPE FDCPE_iobm/Er (iobm/Er,E,!C8M,1'b0,1'b0); -
-FDCPE FDCPE_iobm/Er2 (iobm/Er2,iobm/Er,C16M,1'b0,1'b0); -
-FDCPE FDCPE_iobm/IOACT (iobm/IOACT,iobm/IOACT_D,C16M,1'b0,1'b0); -
     assign iobm/IOACT_D = ((C8M && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && -
      iobm/RESrf && iobm/RESrr) -
      || (iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2) -
      || (!iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd2 && -
      !iobm/IOREQr) -
      || (C8M && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && +FDCPE_IOACT: FDCPE port map (IOACT,IOACT_D,C16M,'0','0'); +
     IOACT_D <= ((C8M AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND +
      iobm/RESrf AND iobm/RESrr) +
      OR (iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2) +
      OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2 AND +
      NOT iobm/IOREQr) +
      OR (C8M AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND
      iobm/ETACK) -
      || (C8M && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && -
      iobm/BERRrf && iobm/BERRrr) -
      || (C8M && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && -
      iobm/DTACKrf && iobm/DTACKrr)); +
      OR (C8M AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND +
      iobm/DTACKrf AND iobm/DTACKrr) +
      OR (C8M AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND +
      iobm/BERRrf AND iobm/BERRrr));
-FTCPE FTCPE_iobm/IOBERR (iobm/IOBERR,iobm/IOBERR_T,C16M,1'b0,1'b0); -
     assign iobm/IOBERR_T = ((C8M && !nBERR_IOB && iobm/IOS_FSM_FFd3 && -
      iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/BERRrf && -
      iobm/BERRrr) -
      || (C8M && !nBERR_IOB && iobm/IOS_FSM_FFd3 && -
      iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/DTACKrf && +FTCPE_IOBERR: FTCPE port map (IOBERR,IOBERR_T,C16M,'0','0'); +
     IOBERR_T <= ((C8M AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND +
      iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/RESrf AND +
      iobm/RESrr) +
      OR (C8M AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND +
      iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/DTACKrf AND
      iobm/DTACKrr) -
      || (C8M && !nBERR_IOB && iobm/IOS_FSM_FFd3 && -
      iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/RESrf && -
      iobm/RESrr) -
      || (C8M && nBERR_IOB && iobm/IOS_FSM_FFd3 && -
      iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/RESrf && -
      iobm/RESrr) -
      || (iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd1 && -
      !iobm/IOS_FSM_FFd2 && iobm/IOBERR) -
      || (C8M && nBERR_IOB && iobm/IOS_FSM_FFd3 && -
      iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/ETACK) -
      || (C8M && !nBERR_IOB && iobm/IOS_FSM_FFd3 && -
      iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && !iobm/IOBERR && iobm/ETACK) -
      || (C8M && nBERR_IOB && iobm/IOS_FSM_FFd3 && -
      iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/BERRrf && +
      OR (C8M AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND +
      iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/BERRrf AND
      iobm/BERRrr) -
      || (C8M && nBERR_IOB && iobm/IOS_FSM_FFd3 && -
      iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2 && iobm/IOBERR && iobm/DTACKrf && -
      iobm/DTACKrr)); +
      OR (C8M AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND +
      iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/RESrf AND +
      iobm/RESrr) +
      OR (iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND +
      NOT iobm/IOS_FSM_FFd2 AND IOBERR) +
      OR (C8M AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND +
      iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/ETACK) +
      OR (C8M AND NOT nBERR_IOB AND iobm/IOS_FSM_FFd3 AND +
      iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND NOT IOBERR AND iobm/ETACK) +
      OR (C8M AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND +
      iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/DTACKrf AND +
      iobm/DTACKrr) +
      OR (C8M AND nBERR_IOB AND iobm/IOS_FSM_FFd3 AND +
      iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2 AND IOBERR AND iobm/BERRrf AND +
      iobm/BERRrr));
-FDCPE FDCPE_iobm/IOREQr (iobm/IOREQr,iobs/IOREQ,!C16M,1'b0,1'b0); +FDCPE_IOL0: FDCPE port map (IOL0,IOL0_D,FCLK,'0','0',IOL0_CE); +
     IOL0_D <= ((NOT nLDS_FSB AND nADoutLE1) +
      OR (iobs/IOL1 AND NOT nADoutLE1)); +
     IOL0_CE <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1);
-FDCPE FDCPE_iobm/IOS_FSM_FFd1 (iobm/IOS_FSM_FFd1,iobm/IOS_FSM_FFd1_D,C16M,1'b0,1'b0); -
     assign iobm/IOS_FSM_FFd1_D = ((iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1) -
      || (!iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd2)); +FDCPE_IOREQ: FDCPE port map (IOREQ,IOREQ_D,FCLK,'0','0'); +
     IOREQ_D <= ((A_FSB(22) AND A_FSB(21) AND NOT iobs/Once AND NOT nAS_FSB AND +
      NOT iobs/PS_FSM_FFd1) +
      OR (A_FSB(22) AND A_FSB(21) AND NOT iobs/Once AND +
      NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) +
      OR (A_FSB(22) AND A_FSB(20) AND NOT iobs/Once AND NOT nAS_FSB AND +
      NOT iobs/PS_FSM_FFd1) +
      OR (A_FSB(22) AND A_FSB(20) AND NOT iobs/Once AND +
      NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) +
      OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND +
      A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND +
      NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd1) +
      OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND +
      A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND +
      NOT nWE_FSB AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) +
      OR (A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND +
      A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND +
      NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd1) +
      OR (A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND +
      A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND +
      NOT nWE_FSB AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) +
      OR (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) +
      OR (iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr) +
      OR (NOT iobs/PS_FSM_FFd1 AND NOT nADoutLE1) +
      OR (A_FSB(23) AND NOT iobs/Once AND NOT nAS_FSB AND +
      NOT iobs/PS_FSM_FFd1) +
      OR (A_FSB(23) AND NOT iobs/Once AND NOT iobs/PS_FSM_FFd1 AND +
      fsb/ASrf));
-FTCPE FTCPE_iobm/IOS_FSM_FFd2 (iobm/IOS_FSM_FFd2,iobm/IOS_FSM_FFd2_T,C16M,1'b0,1'b0); -
     assign iobm/IOS_FSM_FFd2_T = ((iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd1 && -
      !iobm/IOS_FSM_FFd2) -
      || (C8M && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && -
      iobm/IOS_FSM_FFd2 && iobm/ETACK) -
      || (C8M && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && -
      iobm/IOS_FSM_FFd2 && iobm/BERRrf && iobm/BERRrr) -
      || (C8M && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && -
      iobm/IOS_FSM_FFd2 && iobm/DTACKrf && iobm/DTACKrr) -
      || (C8M && iobm/IOS_FSM_FFd3 && iobm/IOS_FSM_FFd1 && -
      iobm/IOS_FSM_FFd2 && iobm/RESrf && iobm/RESrr)); -
-FDCPE FDCPE_iobm/IOS_FSM_FFd3 (iobm/IOS_FSM_FFd3,iobm/IOS_FSM_FFd3_D,C16M,1'b0,1'b0); -
     assign iobm/IOS_FSM_FFd3_D = ((iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2) -
      || (iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd1 && -
      !iobm/IOS_FSM_FFd2) -
      || (!C8M && !iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2 && -
      iobm/IOREQr && !nAoutOE)); -
-FDCPE FDCPE_iobm/RESrf (iobm/RESrf,!nRES.PIN,!C16M,1'b0,1'b0); -
-FDCPE FDCPE_iobm/RESrr (iobm/RESrr,!nRES.PIN,C16M,1'b0,1'b0); -
-FDCPE FDCPE_iobm/VPArf (iobm/VPArf,!nVPA_IOB,!C16M,1'b0,1'b0); -
-FDCPE FDCPE_iobm/VPArr (iobm/VPArr,!nVPA_IOB,C16M,1'b0,1'b0); -
-FDCPE FDCPE_iobs/ALE0 (iobs/ALE0,iobs/ALE0_D,FCLK,1'b0,1'b0); -
     assign iobs/ALE0_D = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1); -
-FDCPE FDCPE_iobs/Clear1 (iobs/Clear1,iobs/Clear1_D,FCLK,1'b0,1'b0); -
     assign iobs/Clear1_D = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && !nADoutLE1); -
-FDCPE FDCPE_iobs/IOACTr (iobs/IOACTr,iobm/IOACT,FCLK,1'b0,1'b0); -
-FDCPE FDCPE_iobs/IOL0 (iobs/IOL0,iobs/IOL0_D,FCLK,1'b0,1'b0,iobs/IOL0_CE); -
     assign iobs/IOL0_D = ((!nLDS_FSB && nADoutLE1) -
      || (iobs/IOL1 && !nADoutLE1)); -
     assign iobs/IOL0_CE = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1); -
-FDCPE FDCPE_iobs/IOL1 (iobs/IOL1,!nLDS_FSB,FCLK,1'b0,1'b0,iobs/Load1); -
-FDCPE FDCPE_iobs/IOREQ (iobs/IOREQ,iobs/IOREQ_D,FCLK,1'b0,1'b0); -
     assign iobs/IOREQ_D = ((EXP16_.EXP) -
      || (A_FSB[23] && !iobs/Once && !nAS_FSB && -
      !iobs/PS_FSM_FFd1) -
      || (A_FSB[23] && !iobs/Once && !iobs/PS_FSM_FFd1 && -
      fsb/ASrf) -
      || (A_FSB[22] && A_FSB[21] && !iobs/Once && !nAS_FSB && -
      !iobs/PS_FSM_FFd1) -
      || (A_FSB[22] && A_FSB[21] && !iobs/Once && -
      !iobs/PS_FSM_FFd1 && fsb/ASrf) -
      || (A_FSB[22] && A_FSB[20] && !iobs/Once && !nAS_FSB && -
      !iobs/PS_FSM_FFd1) -
      || (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) -
      || (iobs/PS_FSM_FFd2 && !iobs/IOACTr) -
      || (!iobs/PS_FSM_FFd1 && !nADoutLE1)); -
-FDCPE FDCPE_iobs/IORW0 (iobs/IORW0,iobs/IORW0_D,FCLK,1'b0,1'b0); -
     assign iobs/IORW0_D = ((!iobs/IORW1 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && -
      !nADoutLE1) -
      || (!A_FSB[23] && !A_FSB[21] && !A_FSB[20] && !iobs/IORW0 && +FDCPE_IORW0: FDCPE port map (IORW0,IORW0_D,FCLK,'0','0'); +
     IORW0_D <= ((EXP11_.EXP) +
      OR (A_FSB(22) AND A_FSB(21) AND NOT iobs/Once AND NOT nWE_FSB AND +
      NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) +
      OR (A_FSB(22) AND A_FSB(21) AND NOT iobs/Once AND NOT nWE_FSB AND +
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1) +
      OR (A_FSB(22) AND A_FSB(20) AND NOT iobs/Once AND NOT nWE_FSB AND +
      NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) +
      OR (A_FSB(22) AND A_FSB(20) AND NOT iobs/Once AND NOT nWE_FSB AND +
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1) +
      OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND +
      A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND +
      NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND
      nADoutLE1) -
      || (A_FSB[23] && !nWE_FSB && !iobs/Once && !nAS_FSB && -
      !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1) -
      || (A_FSB[23] && !nWE_FSB && !iobs/Once && -
      !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf && nADoutLE1) -
      || (A_FSB[22] && A_FSB[21] && !nWE_FSB && !iobs/Once && -
      !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1) -
      || (nROMWE_OBUF.EXP) -
      || (A_FSB[22] && A_FSB[21] && !nWE_FSB && !iobs/Once && -
      !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf && nADoutLE1) -
      || (A_FSB[22] && A_FSB[20] && !nWE_FSB && !iobs/Once && -
      !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && nADoutLE1) -
      || (A_FSB[22] && A_FSB[20] && !nWE_FSB && !iobs/Once && -
      !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf && nADoutLE1) -
      || (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && -
      A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && -
      cs/nOverlay1 && !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && +
      OR (NOT iobs/IORW1 AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND +
      NOT nADoutLE1) +
      OR (NOT A_FSB(23) AND NOT A_FSB(21) AND NOT A_FSB(20) AND NOT IORW0 AND
      nADoutLE1) -
      || (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && -
      A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && -
      cs/nOverlay1 && !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && -
      nADoutLE1) -
      || (!iobs/IORW0 && iobs/PS_FSM_FFd2) -
      || (!iobs/IORW0 && iobs/PS_FSM_FFd1) -
      || (iobs/Once && !iobs/IORW0 && nADoutLE1) -
      || (!A_FSB[23] && !A_FSB[22] && !iobs/IORW0 && nADoutLE1) -
      || (!iobs/IORW0 && nAS_FSB && !fsb/ASrf && nADoutLE1)); +
      OR (A_FSB(23) AND NOT iobs/Once AND NOT nWE_FSB AND NOT nAS_FSB AND +
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND nADoutLE1) +
      OR (A_FSB(23) AND NOT iobs/Once AND NOT nWE_FSB AND +
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf AND nADoutLE1) +
      OR (NOT IORW0 AND iobs/PS_FSM_FFd2) +
      OR (NOT IORW0 AND iobs/PS_FSM_FFd1) +
      OR (iobs/Once AND NOT IORW0 AND nADoutLE1) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT IORW0 AND nADoutLE1) +
      OR (NOT IORW0 AND nAS_FSB AND NOT fsb/ASrf AND nADoutLE1));
-FTCPE FTCPE_iobs/IORW1 (iobs/IORW1,iobs/IORW1_T,FCLK,1'b0,1'b0); -
     assign iobs/IORW1_T = ((iobs/Once) -
      || (!nADoutLE1) -
      || (fsb/Ready1r.EXP) -
      || (nAS_FSB && !fsb/ASrf) -
      || (!A_FSB[23] && !A_FSB[22] && !A_FSB[21]) -
      || (!A_FSB[23] && !A_FSB[22] && !A_FSB[19]) -
      || (!A_FSB[23] && !A_FSB[22] && nWE_FSB) -
      || (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1) -
      || (!A_FSB[23] && !A_FSB[22] && !A_FSB[20]) -
      || (!A_FSB[23] && !A_FSB[22] && !A_FSB[18]) -
      || (!A_FSB[23] && !A_FSB[22] && !A_FSB[17]) -
      || (!A_FSB[23] && !A_FSB[22] && !A_FSB[16]) -
      || (!A_FSB[23] && !A_FSB[21] && !A_FSB[20]) -
      || (nWE_FSB && iobs/IORW1) -
      || (!nWE_FSB && !iobs/IORW1) -
      || (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)); -
-FTCPE FTCPE_iobs/IOReady (iobs/IOReady,iobs/IOReady_T,FCLK,1'b0,1'b0); -
     assign iobs/IOReady_T = ((iobs/IOReady && nAS_FSB && !fsb/ASrf) -
      || (iobs/Once && iobs/IOReady && !iobs/PS_FSM_FFd2 && -
      !iobs/IOACTr && iobm/IOBERR && nADoutLE1) -
      || (iobs/Once && !iobs/IOReady && !nAS_FSB && -
      !iobs/PS_FSM_FFd2 && !iobs/IOACTr && !iobm/IOBERR && nADoutLE1) -
      || (iobs/Once && !iobs/IOReady && !iobs/PS_FSM_FFd2 && -
      !iobs/IOACTr && !iobm/IOBERR && fsb/ASrf && nADoutLE1)); -
-FDCPE FDCPE_iobs/IOU0 (iobs/IOU0,iobs/IOU0_D,FCLK,1'b0,1'b0,iobs/IOU0_CE); -
     assign iobs/IOU0_D = ((!nUDS_FSB && nADoutLE1) -
      || (iobs/IOU1 && !nADoutLE1)); -
     assign iobs/IOU0_CE = (iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1); -
-FDCPE FDCPE_iobs/IOU1 (iobs/IOU1,!nUDS_FSB,FCLK,1'b0,1'b0,iobs/Load1); -
-FDCPE FDCPE_iobs/Load1 (iobs/Load1,iobs/Load1_D,FCLK,1'b0,1'b0); -
     assign iobs/Load1_D = ((iobs/Once) -
      || (!nADoutLE1) -
      || (!A_FSB[23] && !A_FSB[22] && !A_FSB[21]) -
      || (!A_FSB[23] && !A_FSB[22] && !A_FSB[19]) -
      || (!A_FSB[23] && !A_FSB[22] && !A_FSB[17]) -
      || (!A_FSB[23] && !A_FSB[22] && !A_FSB[16]) -
      || (!A_FSB[23] && !A_FSB[22] && !cs/nOverlay1) -
      || (!A_FSB[23] && !A_FSB[22] && !A_FSB[20]) -
      || (!A_FSB[23] && !A_FSB[22] && !A_FSB[18]) -
      || (!A_FSB[23] && !A_FSB[21] && !A_FSB[20]) -
      || (!A_FSB[14] && !A_FSB[13] && !A_FSB[23] && !A_FSB[22]) -
      || (nAS_FSB && !fsb/ASrf) -
      || (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) -
      || (!A_FSB[23] && !A_FSB[22] && nWE_FSB)); -
-FTCPE FTCPE_iobs/Once (iobs/Once,iobs/Once_T,FCLK,1'b0,1'b0); -
     assign iobs/Once_T = ((A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && -
      A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && -
      cs/nOverlay1 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf) -
      || (A_FSB[14] && !A_FSB[23] && !A_FSB[22] && A_FSB[21] && -
      A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && -
      !nWE_FSB && !iobs/Once && cs/nOverlay1 && !nAS_FSB && nADoutLE1) -
      || (A_FSB[14] && !A_FSB[23] && !A_FSB[22] && A_FSB[21] && -
      A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && -
      !nWE_FSB && !iobs/Once && cs/nOverlay1 && fsb/ASrf && nADoutLE1) -
      || (A_FSB[13] && !A_FSB[23] && !A_FSB[22] && A_FSB[21] && -
      A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && -
      !nWE_FSB && !iobs/Once && cs/nOverlay1 && !nAS_FSB && nADoutLE1) -
      || (A_FSB[13] && !A_FSB[23] && !A_FSB[22] && A_FSB[21] && -
      A_FSB[20] && A_FSB[19] && A_FSB[18] && A_FSB[17] && A_FSB[16] && -
      !nWE_FSB && !iobs/Once && cs/nOverlay1 && fsb/ASrf && nADoutLE1) -
      || (A_FSB[22] && A_FSB[21] && !iobs/Once && -
      !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf) -
      || (A_FSB[22] && A_FSB[20] && !iobs/Once && -
      !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf) -
      || (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && -
      A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && -
      cs/nOverlay1 && !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) -
      || (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && -
      A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && -
      cs/nOverlay1 && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf) -
      || (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && -
      A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && !iobs/Once && -
      cs/nOverlay1 && !nAS_FSB && !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) -
      || (iobs/Once && nAS_FSB && !fsb/ASrf) -
      || (A_FSB[23] && !iobs/Once && !nAS_FSB && -
      !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) -
      || (A_FSB[23] && !iobs/Once && !iobs/PS_FSM_FFd2 && -
      !iobs/PS_FSM_FFd1 && fsb/ASrf) -
      || (A_FSB[22] && A_FSB[21] && !iobs/Once && !nAS_FSB && -
      !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) -
      || (A_FSB[22] && A_FSB[20] && !iobs/Once && !nAS_FSB && -
      !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)); -
-FDCPE FDCPE_iobs/PS_FSM_FFd1 (iobs/PS_FSM_FFd1,iobs/PS_FSM_FFd1_D,FCLK,1'b0,1'b0); -
     assign iobs/PS_FSM_FFd1_D = ((iobs/PS_FSM_FFd2) -
      || (iobs/PS_FSM_FFd1 && iobs/IOACTr)); -
-FTCPE FTCPE_iobs/PS_FSM_FFd2 (iobs/PS_FSM_FFd2,iobs/PS_FSM_FFd2_T,FCLK,1'b0,1'b0); -
     assign iobs/PS_FSM_FFd2_T = ((iobs/nBERR_FSB.EXP) -
      || (A_FSB[23] && !iobs/Once && !iobs/PS_FSM_FFd2 && -
      !iobs/PS_FSM_FFd1 && fsb/ASrf) -
      || (A_FSB[22] && A_FSB[21] && !iobs/Once && !nAS_FSB && -
      !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) -
      || (A_FSB[22] && A_FSB[21] && !iobs/Once && -
      !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf) -
      || (A_FSB[22] && A_FSB[20] && !iobs/Once && !nAS_FSB && -
      !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1) -
      || (A_FSB[22] && A_FSB[20] && !iobs/Once && -
      !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && fsb/ASrf) -
      || (iobs/PS_FSM_FFd1 && iobs/IOACTr) -
      || (!iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1 && !nADoutLE1) -
      || (A_FSB[23] && !iobs/Once && !nAS_FSB && -
      !iobs/PS_FSM_FFd2 && !iobs/PS_FSM_FFd1)); +FDCPE_IOU0: FDCPE port map (IOU0,IOU0_D,FCLK,'0','0',IOU0_CE); +
     IOU0_D <= ((NOT nUDS_FSB AND nADoutLE1) +
      OR (iobs/IOU1 AND NOT nADoutLE1)); +
     IOU0_CE <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1);
-assign nADoutLE0 = (!iobm/ALE0 && !iobs/ALE0); +RA(0) <= ((A_FSB(10) AND NOT ram/RASEL) +
      OR (ram/RASEL AND A_FSB(1)));
-FDCPE FDCPE_nADoutLE1 (nADoutLE1,nADoutLE1_D,FCLK,1'b0,1'b0); -
     assign nADoutLE1_D = ((iobs/Load1) -
      || (!iobs/Clear1 && !nADoutLE1));
-FDCPE FDCPE_nAS_IOB (nAS_IOB_I,nAS_IOB,!C16M,1'b0,1'b0); -
     assign nAS_IOB = ((!iobm/IOS_FSM_FFd3 && !iobm/IOS_FSM_FFd2) -
      || (iobm/IOS_FSM_FFd1 && !iobm/IOS_FSM_FFd2)); -
     assign nAS_IOB = nAS_IOB_OE ? nAS_IOB_I : 1'bZ; -
     assign nAS_IOB_OE = !nAoutOE; +RA(1) <= ((A_FSB(11) AND NOT ram/RASEL) +
      OR (ram/RASEL AND A_FSB(2)));
-FDCPE FDCPE_nAoutOE (nAoutOE,nAoutOE_D,!C8M,1'b0,1'b0); -
     assign nAoutOE_D = (!nBR_IOB && cnt/PORS_FSM_FFd1 && !cnt/PORS_FSM_FFd2);
-FTCPE FTCPE_nBERR_FSB (nBERR_FSB,nBERR_FSB_T,FCLK,1'b0,1'b0); -
     assign nBERR_FSB_T = ((iobs/Once && !nBERR_FSB && !iobs/PS_FSM_FFd2 && -
      !iobs/IOACTr && !iobm/IOBERR && nADoutLE1) -
      || (iobs/Once && !nAS_FSB && nBERR_FSB && -
      !iobs/PS_FSM_FFd2 && !iobs/IOACTr && iobm/IOBERR && nADoutLE1) -
      || (iobs/Once && nBERR_FSB && !iobs/PS_FSM_FFd2 && -
      !iobs/IOACTr && iobm/IOBERR && fsb/ASrf && nADoutLE1) -
      || (nAS_FSB && !nBERR_FSB && !fsb/ASrf)); +RA(2) <= ((A_FSB(12) AND NOT ram/RASEL) +
      OR (ram/RASEL AND A_FSB(3)));
-FTCPE FTCPE_nBR_IOB (nBR_IOB,nBR_IOB_T,!C8M,1'b0,1'b0); -
     assign nBR_IOB_T = ((nBR_IOB && !cnt/PORS_FSM_FFd1 && !cnt/PORS_FSM_FFd2) -
      || (!nBR_IOB && !cnt/PORS_FSM_FFd1 && cnt/PORS_FSM_FFd2 && -
      cnt/IPL2r));
-FDCPE FDCPE_nCAS (nCAS,!ram/RASEL,!FCLK,1'b0,1'b0); +RA(3) <= ((A_FSB(13) AND NOT ram/RASEL) +
      OR (ram/RASEL AND A_FSB(4)));
-FDCPE FDCPE_nDTACK_FSB (nDTACK_FSB,nDTACK_FSB_D,FCLK,1'b0,1'b0); -
     assign nDTACK_FSB_D = ((iobs/IOREQ.EXP) -
      || (nAS_FSB && !fsb/ASrf) -
      || (A_FSB[23] && !fsb/Ready1r && !iobs/IOReady && +
+RA(4) <= ((A_FSB(14) AND NOT ram/RASEL) +
      OR (ram/RASEL AND A_FSB(5))); +
+
+RA(5) <= ((A_FSB(15) AND NOT ram/RASEL) +
      OR (ram/RASEL AND A_FSB(6))); +
+
+RA(6) <= ((ram/RASEL AND A_FSB(7)) +
      OR (A_FSB(16) AND NOT ram/RASEL)); +
+
+RA(7) <= ((A_FSB(8) AND ram/RASEL) +
      OR (A_FSB(17) AND NOT ram/RASEL)); +
+
+RA(8) <= ((A_FSB(23) AND A_FSB(18)) +
      OR (A_FSB(22) AND A_FSB(18)) +
      OR (A_FSB(18) AND NOT cs/nOverlay) +
      OR (A_FSB(18) AND NOT ram/RASEL) +
      OR (A_FSB(9) AND NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND +
      ram/RASEL)); +
+
+RA(9) <= ((A_FSB(20) AND ram/RASEL) +
      OR (A_FSB(19) AND NOT ram/RASEL)); +
+
+RA(10) <= A_FSB(21); +
+
+RA(11) <= A_FSB(19); +
+FDCPE_RefReq: FDCPE port map (RefReq,RefReq_D,FCLK,'0','0',RefReq_CE); +
     RefReq_D <= (NOT RefUrg AND NOT cnt/Timer(1) AND NOT cnt/Timer(2)); +
     RefReq_CE <= (NOT cnt/Er(0) AND cnt/Er(1)); +
+FTCPE_RefUrg: FTCPE port map (RefUrg,RefUrg_T,FCLK,'0','0',RefUrg_CE); +
     RefUrg_T <= ((RefUrg AND cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)) +
      OR (cnt/Timer(0) AND cnt/Timer(1) AND cnt/Timer(2) AND +
      NOT cnt/TimerTC) +
      OR (cnt/Timer(0) AND cnt/Timer(1) AND cnt/Timer(2) AND +
      cnt/Er(0)) +
      OR (cnt/Timer(0) AND cnt/Timer(1) AND cnt/Timer(2) AND +
      NOT cnt/Er(1))); +
     RefUrg_CE <= (NOT cnt/Er(0) AND cnt/Er(1)); +
+FDCPE_cnt/Er0: FDCPE port map (cnt/Er(0),E,FCLK,'0','0'); +
+FDCPE_cnt/Er1: FDCPE port map (cnt/Er(1),cnt/Er(0),FCLK,'0','0'); +
+FTCPE_cnt/INITS_FSM_FFd1: FTCPE port map (cnt/INITS_FSM_FFd1,cnt/INITS_FSM_FFd1_T,FCLK,'0','0'); +
     cnt/INITS_FSM_FFd1_T <= (cnt/TimerTC AND cnt/LTimerTC AND NOT cnt/INITS_FSM_FFd1 AND +
      cnt/INITS_FSM_FFd2 AND NOT cnt/Er(0) AND cnt/nIPL2r AND cnt/Er(1)); +
+FTCPE_cnt/INITS_FSM_FFd2: FTCPE port map (cnt/INITS_FSM_FFd2,cnt/INITS_FSM_FFd2_T,FCLK,'0','0'); +
     cnt/INITS_FSM_FFd2_T <= ((cnt/TimerTC AND cnt/LTimerTC AND cnt/INITS_FSM_FFd1 AND +
      cnt/INITS_FSM_FFd2 AND NOT cnt/Er(0) AND cnt/Er(1)) +
      OR (cnt/TimerTC AND cnt/LTimerTC AND NOT cnt/INITS_FSM_FFd1 AND +
      NOT cnt/INITS_FSM_FFd2 AND NOT cnt/Er(0) AND cnt/Er(1))); +
+FTCPE_cnt/LTimer0: FTCPE port map (cnt/LTimer(0),'1',FCLK,'0','0',cnt/LTimer_CE(0)); +
     cnt/LTimer_CE(0) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); +
+FTCPE_cnt/LTimer1: FTCPE port map (cnt/LTimer(1),cnt/LTimer(0),FCLK,'0','0',cnt/LTimer_CE(1)); +
     cnt/LTimer_CE(1) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); +
+FTCPE_cnt/LTimer2: FTCPE port map (cnt/LTimer(2),cnt/LTimer_T(2),FCLK,'0','0',cnt/LTimer_CE(2)); +
     cnt/LTimer_T(2) <= (cnt/LTimer(0) AND cnt/LTimer(1)); +
     cnt/LTimer_CE(2) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); +
+FTCPE_cnt/LTimer3: FTCPE port map (cnt/LTimer(3),cnt/LTimer_T(3),FCLK,'0','0',cnt/LTimer_CE(3)); +
     cnt/LTimer_T(3) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2)); +
     cnt/LTimer_CE(3) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); +
+FTCPE_cnt/LTimer4: FTCPE port map (cnt/LTimer(4),cnt/LTimer_T(4),FCLK,'0','0',cnt/LTimer_CE(4)); +
     cnt/LTimer_T(4) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND +
      cnt/LTimer(3)); +
     cnt/LTimer_CE(4) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); +
+FTCPE_cnt/LTimer5: FTCPE port map (cnt/LTimer(5),cnt/LTimer_T(5),FCLK,'0','0',cnt/LTimer_CE(5)); +
     cnt/LTimer_T(5) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND +
      cnt/LTimer(3) AND cnt/LTimer(4)); +
     cnt/LTimer_CE(5) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); +
+FTCPE_cnt/LTimer6: FTCPE port map (cnt/LTimer(6),cnt/LTimer_T(6),FCLK,'0','0',cnt/LTimer_CE(6)); +
     cnt/LTimer_T(6) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND +
      cnt/LTimer(3) AND cnt/LTimer(4) AND cnt/LTimer(5)); +
     cnt/LTimer_CE(6) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); +
+FTCPE_cnt/LTimer7: FTCPE port map (cnt/LTimer(7),cnt/LTimer_T(7),FCLK,'0','0',cnt/LTimer_CE(7)); +
     cnt/LTimer_T(7) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND +
      cnt/LTimer(3) AND cnt/LTimer(4) AND cnt/LTimer(5) AND cnt/LTimer(6)); +
     cnt/LTimer_CE(7) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); +
+FTCPE_cnt/LTimer8: FTCPE port map (cnt/LTimer(8),cnt/LTimer_T(8),FCLK,'0','0',cnt/LTimer_CE(8)); +
     cnt/LTimer_T(8) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND +
      cnt/LTimer(3) AND cnt/LTimer(4) AND cnt/LTimer(5) AND cnt/LTimer(6) AND +
      cnt/LTimer(7)); +
     cnt/LTimer_CE(8) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); +
+FTCPE_cnt/LTimer9: FTCPE port map (cnt/LTimer(9),cnt/LTimer_T(9),FCLK,'0','0',cnt/LTimer_CE(9)); +
     cnt/LTimer_T(9) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND +
      cnt/LTimer(3) AND cnt/LTimer(4) AND cnt/LTimer(5) AND cnt/LTimer(6) AND +
      cnt/LTimer(7) AND cnt/LTimer(8)); +
     cnt/LTimer_CE(9) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); +
+FTCPE_cnt/LTimer10: FTCPE port map (cnt/LTimer(10),cnt/LTimer_T(10),FCLK,'0','0',cnt/LTimer_CE(10)); +
     cnt/LTimer_T(10) <= (cnt/LTimer(0) AND cnt/LTimer(1) AND cnt/LTimer(2) AND +
      cnt/LTimer(3) AND cnt/LTimer(4) AND cnt/LTimer(5) AND cnt/LTimer(6) AND +
      cnt/LTimer(7) AND cnt/LTimer(8) AND cnt/LTimer(9)); +
     cnt/LTimer_CE(10) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); +
+FTCPE_cnt/LTimer11: FTCPE port map (cnt/LTimer(11),cnt/LTimer_T(11),FCLK,'0','0',cnt/LTimer_CE(11)); +
     cnt/LTimer_T(11) <= (cnt/LTimer(0) AND cnt/LTimer(10) AND cnt/LTimer(1) AND +
      cnt/LTimer(2) AND cnt/LTimer(3) AND cnt/LTimer(4) AND cnt/LTimer(5) AND +
      cnt/LTimer(6) AND cnt/LTimer(7) AND cnt/LTimer(8) AND cnt/LTimer(9)); +
     cnt/LTimer_CE(11) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); +
+FTCPE_cnt/LTimer12: FTCPE port map (cnt/LTimer(12),cnt/LTimer_T(12),FCLK,'0','0',cnt/LTimer_CE(12)); +
     cnt/LTimer_T(12) <= (cnt/LTimer(0) AND cnt/LTimer(10) AND cnt/LTimer(11) AND +
      cnt/LTimer(1) AND cnt/LTimer(2) AND cnt/LTimer(3) AND cnt/LTimer(4) AND +
      cnt/LTimer(5) AND cnt/LTimer(6) AND cnt/LTimer(7) AND cnt/LTimer(8) AND +
      cnt/LTimer(9)); +
     cnt/LTimer_CE(12) <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); +
+FDCPE_cnt/LTimerTC: FDCPE port map (cnt/LTimerTC,cnt/LTimerTC_D,FCLK,'0','0',cnt/LTimerTC_CE); +
     cnt/LTimerTC_D <= (NOT cnt/LTimer(0) AND cnt/LTimer(10) AND cnt/LTimer(11) AND +
      cnt/LTimer(1) AND cnt/LTimer(2) AND cnt/LTimer(3) AND cnt/LTimer(4) AND +
      cnt/LTimer(5) AND cnt/LTimer(6) AND cnt/LTimer(7) AND cnt/LTimer(8) AND +
      cnt/LTimer(9) AND cnt/LTimer(12)); +
     cnt/LTimerTC_CE <= (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)); +
+FTCPE_cnt/Timer0: FTCPE port map (cnt/Timer(0),cnt/Timer_T(0),FCLK,'0','0',cnt/Timer_CE(0)); +
     cnt/Timer_T(0) <= (NOT cnt/Timer(0) AND cnt/TimerTC AND NOT cnt/Er(0) AND +
      cnt/Er(1)); +
     cnt/Timer_CE(0) <= (NOT cnt/Er(0) AND cnt/Er(1)); +
+FDCPE_cnt/Timer1: FDCPE port map (cnt/Timer(1),cnt/Timer_D(1),FCLK,'0','0',cnt/Timer_CE(1)); +
     cnt/Timer_D(1) <= ((NOT cnt/Timer(0) AND NOT cnt/Timer(1)) +
      OR (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1)) +
      OR (cnt/Timer(0) AND cnt/Timer(1))); +
     cnt/Timer_CE(1) <= (NOT cnt/Er(0) AND cnt/Er(1)); +
+FDCPE_cnt/Timer2: FDCPE port map (cnt/Timer(2),cnt/Timer_D(2),FCLK,'0','0',cnt/Timer_CE(2)); +
     cnt/Timer_D(2) <= ((cnt/Timer(0) AND cnt/Timer(1) AND cnt/Timer(2)) +
      OR (NOT cnt/Timer(0) AND NOT cnt/Timer(2)) +
      OR (NOT cnt/Timer(1) AND NOT cnt/Timer(2)) +
      OR (cnt/TimerTC AND NOT cnt/Er(0) AND cnt/Er(1))); +
     cnt/Timer_CE(2) <= (NOT cnt/Er(0) AND cnt/Er(1)); +
+FDCPE_cnt/TimerTC: FDCPE port map (cnt/TimerTC,cnt/TimerTC_D,FCLK,'0','0',cnt/TimerTC_CE); +
     cnt/TimerTC_D <= (RefUrg AND cnt/Timer(0) AND NOT cnt/Timer(1) AND +
      NOT cnt/Timer(2)); +
     cnt/TimerTC_CE <= (NOT cnt/Er(0) AND cnt/Er(1)); +
+FDCPE_cnt/nIPL2r: FDCPE port map (cnt/nIPL2r,nIPL2,FCLK,'0','0'); +
+FTCPE_cs/nOverlay: FTCPE port map (cs/nOverlay,cs/nOverlay_T,FCLK,NOT nRES.PIN,'0'); +
     cs/nOverlay_T <= ((NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND +
      NOT cs/nOverlay AND NOT nAS_FSB) +
      OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20) AND +
      NOT cs/nOverlay AND fsb/ASrf)); +
+FDCPE_fsb/ASrf: FDCPE port map (fsb/ASrf,NOT nAS_FSB,NOT FCLK,'0','0'); +
+FDCPE_fsb/Ready0r: FDCPE port map (fsb/Ready0r,fsb/Ready0r_D,FCLK,'0','0'); +
     fsb/Ready0r_D <= ((nAS_FSB AND NOT fsb/ASrf) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND +
      NOT fsb/Ready0r AND NOT ram/RAMReady)); +
+FDCPE_fsb/Ready1r: FDCPE port map (fsb/Ready1r,fsb/Ready1r_D,FCLK,'0','0'); +
     fsb/Ready1r_D <= ((A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND +
      A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND cs/nOverlay AND +
      NOT fsb/Ready1r AND NOT nWE_FSB AND NOT iobs/IOReady AND NOT nADoutLE1) +
      OR (nAS_FSB AND NOT fsb/ASrf) +
      OR (A_FSB(23) AND NOT fsb/Ready1r AND NOT iobs/IOReady) +
      OR (A_FSB(22) AND A_FSB(21) AND NOT fsb/Ready1r AND +
      NOT iobs/IOReady) +
      OR (A_FSB(22) AND A_FSB(20) AND NOT fsb/Ready1r AND +
      NOT iobs/IOReady) +
      OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND +
      A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND cs/nOverlay AND +
      NOT fsb/Ready1r AND NOT nWE_FSB AND NOT iobs/IOReady AND NOT nADoutLE1)); +
+FDCPE_fsb/VPA: FDCPE port map (fsb/VPA,fsb/VPA_D,FCLK,'0','0'); +
     fsb/VPA_D <= ((EXP12_.EXP) +
      OR (A_FSB(22) AND A_FSB(20) AND NOT fsb/Ready1r AND fsb/VPA AND +
      NOT iobs/IOReady AND fsb/ASrf) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND +
      NOT fsb/Ready0r AND fsb/VPA AND NOT nAS_FSB AND NOT ram/RAMReady) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND +
      NOT fsb/Ready0r AND fsb/VPA AND fsb/ASrf AND NOT ram/RAMReady) +
      OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND +
      A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND cs/nOverlay AND +
      NOT fsb/Ready1r AND fsb/VPA AND NOT nWE_FSB AND NOT iobs/IOReady AND NOT nAS_FSB AND +
      NOT nADoutLE1) +
      OR (A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND +
      A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND cs/nOverlay AND +
      NOT fsb/Ready1r AND fsb/VPA AND NOT nWE_FSB AND NOT iobs/IOReady AND NOT nAS_FSB AND +
      NOT nADoutLE1) +
      OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND +
      A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND cs/nOverlay AND +
      NOT fsb/Ready1r AND fsb/VPA AND NOT nWE_FSB AND NOT iobs/IOReady AND fsb/ASrf AND +
      NOT nADoutLE1) +
      OR (A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND +
      A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND cs/nOverlay AND +
      NOT fsb/Ready1r AND fsb/VPA AND NOT nWE_FSB AND NOT iobs/IOReady AND fsb/ASrf AND +
      NOT nADoutLE1) +
      OR (A_FSB(9) AND A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND +
      A_FSB(13) AND A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND A_FSB(23) AND +
      A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND +
      A_FSB(17) AND A_FSB(16) AND fsb/Ready1r AND NOT nAS_FSB) +
      OR (A_FSB(9) AND A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND +
      A_FSB(13) AND A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND A_FSB(23) AND +
      A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND +
      A_FSB(17) AND A_FSB(16) AND iobs/IOReady AND NOT nAS_FSB) +
      OR (A_FSB(9) AND A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND +
      A_FSB(13) AND A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND A_FSB(23) AND +
      A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND +
      A_FSB(17) AND A_FSB(16) AND iobs/IOReady AND fsb/ASrf) +
      OR (A_FSB(23) AND NOT fsb/Ready1r AND fsb/VPA AND +
      NOT iobs/IOReady AND NOT nAS_FSB) +
      OR (A_FSB(23) AND NOT fsb/Ready1r AND fsb/VPA AND +
      NOT iobs/IOReady AND fsb/ASrf) +
      OR (A_FSB(22) AND A_FSB(21) AND NOT fsb/Ready1r AND fsb/VPA AND +
      NOT iobs/IOReady AND NOT nAS_FSB) +
      OR (A_FSB(22) AND A_FSB(21) AND NOT fsb/Ready1r AND fsb/VPA AND +
      NOT iobs/IOReady AND fsb/ASrf) +
      OR (A_FSB(22) AND A_FSB(20) AND NOT fsb/Ready1r AND fsb/VPA AND +
      NOT iobs/IOReady AND NOT nAS_FSB)); +
+FDCPE_iobm/BERRrf: FDCPE port map (iobm/BERRrf,NOT nBERR_IOB,NOT C16M,'0','0'); +
+FDCPE_iobm/BERRrr: FDCPE port map (iobm/BERRrr,NOT nBERR_IOB,C16M,'0','0'); +
+FDCPE_iobm/DTACKrf: FDCPE port map (iobm/DTACKrf,NOT nDTACK_IOB,NOT C16M,'0','0'); +
+FDCPE_iobm/DTACKrr: FDCPE port map (iobm/DTACKrr,NOT nDTACK_IOB,C16M,'0','0'); +
+FDCPE_iobm/DoutOE: FDCPE port map (iobm/DoutOE,iobm/DoutOE_D,C16M,'0','0'); +
     iobm/DoutOE_D <= ((NOT IORW0 AND iobm/IOS_FSM_FFd3) +
      OR (NOT IORW0 AND iobm/IOS_FSM_FFd2) +
      OR (NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND +
      NOT iobm/IOS_FSM_FFd2 AND NOT iobm/IOREQr AND NOT nAoutOE)); +
+FTCPE_iobm/ES0: FTCPE port map (iobm/ES(0),iobm/ES_T(0),C16M,'0','0'); +
     iobm/ES_T(0) <= ((iobm/ES(0) AND NOT iobm/Er AND iobm/Er2) +
      OR (NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND +
      NOT iobm/ES(3) AND NOT iobm/ES(4) AND iobm/Er) +
      OR (NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND +
      NOT iobm/ES(3) AND NOT iobm/ES(4) AND NOT iobm/Er2)); +
+FDCPE_iobm/ES1: FDCPE port map (iobm/ES(1),iobm/ES_D(1),C16M,'0','0'); +
     iobm/ES_D(1) <= ((iobm/ES(0) AND iobm/ES(1)) +
      OR (NOT iobm/ES(0) AND NOT iobm/ES(1)) +
      OR (NOT iobm/Er AND iobm/Er2)); +
+FDCPE_iobm/ES2: FDCPE port map (iobm/ES(2),iobm/ES_D(2),C16M,'0','0'); +
     iobm/ES_D(2) <= ((NOT iobm/ES(0) AND NOT iobm/ES(2)) +
      OR (NOT iobm/ES(1) AND NOT iobm/ES(2)) +
      OR (NOT iobm/Er AND iobm/Er2) +
      OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2)) +
      OR (NOT iobm/ES(2) AND NOT iobm/ES(3) AND iobm/ES(4))); +
+FTCPE_iobm/ES3: FTCPE port map (iobm/ES(3),iobm/ES_T(3),C16M,'0','0'); +
     iobm/ES_T(3) <= ((iobm/ES(3) AND NOT iobm/Er AND iobm/Er2) +
      OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND iobm/Er) +
      OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND NOT iobm/Er2)); +
+FTCPE_iobm/ES4: FTCPE port map (iobm/ES(4),iobm/ES_T(4),C16M,'0','0'); +
     iobm/ES_T(4) <= ((iobm/ES(4) AND NOT iobm/Er AND iobm/Er2) +
      OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND +
      iobm/ES(3) AND iobm/Er) +
      OR (iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND +
      iobm/ES(3) AND NOT iobm/Er2) +
      OR (iobm/ES(0) AND iobm/ES(1) AND NOT iobm/ES(2) AND +
      NOT iobm/ES(3) AND iobm/ES(4))); +
+FDCPE_iobm/ETACK: FDCPE port map (iobm/ETACK,iobm/ETACK_D,C16M,'0','0'); +
     iobm/ETACK_D <= (NOT nVMA_IOB AND NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND +
      NOT iobm/ES(3) AND iobm/ES(4)); +
+FDCPE_iobm/Er: FDCPE port map (iobm/Er,E,NOT C8M,'0','0'); +
+FDCPE_iobm/Er2: FDCPE port map (iobm/Er2,iobm/Er,C16M,'0','0'); +
+FDCPE_iobm/IOREQr: FDCPE port map (iobm/IOREQr,IOREQ,NOT C16M,'0','0'); +
+FDCPE_iobm/IOS_FSM_FFd1: FDCPE port map (iobm/IOS_FSM_FFd1,iobm/IOS_FSM_FFd1_D,C16M,'0','0'); +
     iobm/IOS_FSM_FFd1_D <= ((iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1) +
      OR (NOT iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2)); +
+FTCPE_iobm/IOS_FSM_FFd2: FTCPE port map (iobm/IOS_FSM_FFd2,iobm/IOS_FSM_FFd2_T,C16M,'0','0'); +
     iobm/IOS_FSM_FFd2_T <= ((iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND +
      NOT iobm/IOS_FSM_FFd2) +
      OR (C8M AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND +
      iobm/IOS_FSM_FFd2 AND iobm/ETACK) +
      OR (C8M AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND +
      iobm/IOS_FSM_FFd2 AND iobm/DTACKrf AND iobm/DTACKrr) +
      OR (C8M AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND +
      iobm/IOS_FSM_FFd2 AND iobm/BERRrf AND iobm/BERRrr) +
      OR (C8M AND iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd1 AND +
      iobm/IOS_FSM_FFd2 AND iobm/RESrf AND iobm/RESrr)); +
+FDCPE_iobm/IOS_FSM_FFd3: FDCPE port map (iobm/IOS_FSM_FFd3,iobm/IOS_FSM_FFd3_D,C16M,'0','0'); +
     iobm/IOS_FSM_FFd3_D <= ((iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2) +
      OR (iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd1 AND +
      NOT iobm/IOS_FSM_FFd2) +
      OR (NOT C8M AND NOT iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2 AND +
      iobm/IOREQr AND NOT nAoutOE)); +
+FDCPE_iobm/RESrf: FDCPE port map (iobm/RESrf,NOT nRES.PIN,NOT C16M,'0','0'); +
+FDCPE_iobm/RESrr: FDCPE port map (iobm/RESrr,NOT nRES.PIN,C16M,'0','0'); +
+FDCPE_iobm/VPArf: FDCPE port map (iobm/VPArf,NOT nVPA_IOB,NOT C16M,'0','0'); +
+FDCPE_iobm/VPArr: FDCPE port map (iobm/VPArr,NOT nVPA_IOB,C16M,'0','0'); +
+FDCPE_iobs/Clear1: FDCPE port map (iobs/Clear1,iobs/Clear1_D,FCLK,'0','0'); +
     iobs/Clear1_D <= (iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND NOT nADoutLE1); +
+FDCPE_iobs/IOACTr: FDCPE port map (iobs/IOACTr,IOACT,FCLK,'0','0'); +
+FDCPE_iobs/IOL1: FDCPE port map (iobs/IOL1,NOT nLDS_FSB,FCLK,'0','0',iobs/Load1); +
+FTCPE_iobs/IORW1: FTCPE port map (iobs/IORW1,iobs/IORW1_T,FCLK,'0','0'); +
     iobs/IORW1_T <= ((iobs/Once) +
      OR (NOT nADoutLE1) +
      OR (nDTACK_FSB_OBUF.EXP) +
      OR (nAS_FSB AND NOT fsb/ASrf) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21)) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(19)) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND nWE_FSB) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(20)) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(18)) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(17)) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(16)) +
      OR (NOT A_FSB(23) AND NOT A_FSB(21) AND NOT A_FSB(20)) +
      OR (nWE_FSB AND iobs/IORW1) +
      OR (NOT nWE_FSB AND NOT iobs/IORW1) +
      OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1)); +
+FTCPE_iobs/IOReady: FTCPE port map (iobs/IOReady,iobs/IOReady_T,FCLK,'0','0'); +
     iobs/IOReady_T <= ((iobs/IOReady AND nAS_FSB AND NOT fsb/ASrf) +
      OR (iobs/Once AND iobs/IOReady AND NOT iobs/PS_FSM_FFd2 AND +
      NOT iobs/IOACTr AND IOBERR AND nADoutLE1) +
      OR (iobs/Once AND NOT iobs/IOReady AND NOT nAS_FSB AND +
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND NOT IOBERR AND nADoutLE1) +
      OR (iobs/Once AND NOT iobs/IOReady AND NOT iobs/PS_FSM_FFd2 AND +
      NOT iobs/IOACTr AND NOT IOBERR AND fsb/ASrf AND nADoutLE1)); +
+FDCPE_iobs/IOU1: FDCPE port map (iobs/IOU1,NOT nUDS_FSB,FCLK,'0','0',iobs/Load1); +
+FDCPE_iobs/Load1: FDCPE port map (iobs/Load1,iobs/Load1_D,FCLK,'0','0'); +
     iobs/Load1_D <= ((iobs/Once) +
      OR (NOT nADoutLE1) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(21)) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(19)) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(16)) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND nWE_FSB) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(20)) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(18)) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT A_FSB(17)) +
      OR (NOT A_FSB(23) AND NOT A_FSB(21) AND NOT A_FSB(20)) +
      OR (NOT A_FSB(14) AND NOT A_FSB(13) AND NOT A_FSB(23) AND NOT A_FSB(22)) +
      OR (nAS_FSB AND NOT fsb/ASrf) +
      OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND NOT cs/nOverlay)); +
+FTCPE_iobs/Once: FTCPE port map (iobs/Once,iobs/Once_T,FCLK,'0','0'); +
     iobs/Once_T <= ((A_FSB(22) AND A_FSB(21) AND NOT iobs/Once AND +
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) +
      OR (A_FSB(22) AND A_FSB(20) AND NOT iobs/Once AND +
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) +
      OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND +
      A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND +
      NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) +
      OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND +
      A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND +
      NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) +
      OR (A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND +
      A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND +
      NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) +
      OR (A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND +
      A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND +
      NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) +
      OR (A_FSB(14) AND NOT A_FSB(23) AND NOT A_FSB(22) AND A_FSB(21) AND +
      A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND +
      NOT iobs/Once AND cs/nOverlay AND NOT nWE_FSB AND NOT nAS_FSB AND nADoutLE1) +
      OR (A_FSB(14) AND NOT A_FSB(23) AND NOT A_FSB(22) AND A_FSB(21) AND +
      A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND +
      NOT iobs/Once AND cs/nOverlay AND NOT nWE_FSB AND fsb/ASrf AND nADoutLE1) +
      OR (A_FSB(13) AND NOT A_FSB(23) AND NOT A_FSB(22) AND A_FSB(21) AND +
      A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND +
      NOT iobs/Once AND cs/nOverlay AND NOT nWE_FSB AND NOT nAS_FSB AND nADoutLE1) +
      OR (A_FSB(13) AND NOT A_FSB(23) AND NOT A_FSB(22) AND A_FSB(21) AND +
      A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND +
      NOT iobs/Once AND cs/nOverlay AND NOT nWE_FSB AND fsb/ASrf AND nADoutLE1) +
      OR (iobs/Once AND nAS_FSB AND NOT fsb/ASrf) +
      OR (A_FSB(23) AND NOT iobs/Once AND NOT nAS_FSB AND +
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) +
      OR (A_FSB(23) AND NOT iobs/Once AND NOT iobs/PS_FSM_FFd2 AND +
      NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) +
      OR (A_FSB(22) AND A_FSB(21) AND NOT iobs/Once AND NOT nAS_FSB AND +
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) +
      OR (A_FSB(22) AND A_FSB(20) AND NOT iobs/Once AND NOT nAS_FSB AND +
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1)); +
+FDCPE_iobs/PS_FSM_FFd1: FDCPE port map (iobs/PS_FSM_FFd1,iobs/PS_FSM_FFd1_D,FCLK,'0','0'); +
     iobs/PS_FSM_FFd1_D <= ((iobs/PS_FSM_FFd2) +
      OR (iobs/PS_FSM_FFd1 AND iobs/IOACTr)); +
+FTCPE_iobs/PS_FSM_FFd2: FTCPE port map (iobs/PS_FSM_FFd2,iobs/PS_FSM_FFd2_T,FCLK,'0','0'); +
     iobs/PS_FSM_FFd2_T <= ((A_FSB(22) AND A_FSB(21) AND NOT iobs/Once AND +
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) +
      OR (A_FSB(22) AND A_FSB(20) AND NOT iobs/Once AND NOT nAS_FSB AND +
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) +
      OR (A_FSB(22) AND A_FSB(20) AND NOT iobs/Once AND +
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) +
      OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND +
      A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND +
      NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) +
      OR (A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND +
      A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND +
      NOT nWE_FSB AND NOT nAS_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) +
      OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND +
      A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND +
      NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) +
      OR (A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND +
      A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND NOT iobs/Once AND cs/nOverlay AND +
      NOT nWE_FSB AND NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) +
      OR (iobs/PS_FSM_FFd1 AND iobs/IOACTr) +
      OR (NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1 AND NOT nADoutLE1) +
      OR (A_FSB(23) AND NOT iobs/Once AND NOT nAS_FSB AND +
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1) +
      OR (A_FSB(23) AND NOT iobs/Once AND NOT iobs/PS_FSM_FFd2 AND +
      NOT iobs/PS_FSM_FFd1 AND fsb/ASrf) +
      OR (A_FSB(22) AND A_FSB(21) AND NOT iobs/Once AND NOT nAS_FSB AND +
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/PS_FSM_FFd1)); +
+
+nADoutLE0 <= (NOT ALE0M AND NOT ALE0S); +
+FDCPE_nADoutLE1: FDCPE port map (nADoutLE1,nADoutLE1_D,FCLK,'0','0'); +
     nADoutLE1_D <= ((iobs/Load1) +
      OR (NOT iobs/Clear1 AND NOT nADoutLE1)); +
+FDCPE_nAS_IOB: FDCPE port map (nAS_IOB_I,nAS_IOB,NOT C16M,'0','0'); +
     nAS_IOB <= ((NOT iobm/IOS_FSM_FFd3 AND NOT iobm/IOS_FSM_FFd2) +
      OR (iobm/IOS_FSM_FFd1 AND NOT iobm/IOS_FSM_FFd2)); +
     nAS_IOB <= nAS_IOB_I when nAS_IOB_OE = '1' else 'Z'; +
     nAS_IOB_OE <= NOT nAoutOE; +
+FDCPE_nAoutOE: FDCPE port map (nAoutOE,nAoutOE_D,FCLK,'0','0'); +
     nAoutOE_D <= ((NOT nBR_IOB AND cnt/INITS_FSM_FFd1 AND +
      cnt/INITS_FSM_FFd2) +
      OR (cnt/INITS_FSM_FFd1 AND NOT cnt/INITS_FSM_FFd2 AND +
      NOT nAoutOE)); +
+FTCPE_nBERR_FSB: FTCPE port map (nBERR_FSB,nBERR_FSB_T,FCLK,'0','0'); +
     nBERR_FSB_T <= ((NOT nBERR_FSB AND nAS_FSB AND NOT fsb/ASrf) +
      OR (iobs/Once AND NOT nBERR_FSB AND NOT iobs/PS_FSM_FFd2 AND +
      NOT iobs/IOACTr AND NOT IOBERR AND nADoutLE1) +
      OR (iobs/Once AND nBERR_FSB AND NOT nAS_FSB AND +
      NOT iobs/PS_FSM_FFd2 AND NOT iobs/IOACTr AND IOBERR AND nADoutLE1) +
      OR (iobs/Once AND nBERR_FSB AND NOT iobs/PS_FSM_FFd2 AND +
      NOT iobs/IOACTr AND IOBERR AND fsb/ASrf AND nADoutLE1)); +
+FTCPE_nBR_IOB: FTCPE port map (nBR_IOB,nBR_IOB_T,FCLK,'0','0'); +
     nBR_IOB_T <= ((NOT nBR_IOB AND NOT cnt/INITS_FSM_FFd1 AND +
      cnt/INITS_FSM_FFd2 AND NOT cnt/nIPL2r) +
      OR (nBR_IOB AND NOT cnt/INITS_FSM_FFd1 AND +
      NOT cnt/INITS_FSM_FFd2)); +
+FDCPE_nCAS: FDCPE port map (nCAS,NOT ram/RASEL,NOT FCLK,'0','0'); +
+FDCPE_nDTACK_FSB: FDCPE port map (nDTACK_FSB,nDTACK_FSB_D,FCLK,'0','0'); +
     nDTACK_FSB_D <= ((nAS_FSB AND NOT fsb/ASrf) +
      OR (A_FSB(23) AND NOT fsb/Ready1r AND NOT iobs/IOReady AND
      nDTACK_FSB) -
      || (A_FSB[22] && A_FSB[21] && !fsb/Ready1r && -
      !iobs/IOReady && nDTACK_FSB) -
      || (A_FSB[22] && A_FSB[20] && !fsb/Ready1r && -
      !iobs/IOReady && nDTACK_FSB) -
      || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && -
      !fsb/Ready0r && nDTACK_FSB && !ram/RAMReady) -
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && -
      !cs/nOverlay1 && !fsb/Ready0r && nDTACK_FSB && !ram/RAMReady) -
      || (A_FSB[14] && A_FSB[21] && A_FSB[20] && A_FSB[19] && -
      A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && -
      !fsb/Ready1r && !iobs/IOReady && nDTACK_FSB && !nADoutLE1) -
      || (A_FSB[13] && A_FSB[21] && A_FSB[20] && A_FSB[19] && -
      A_FSB[18] && A_FSB[17] && A_FSB[16] && !nWE_FSB && cs/nOverlay1 && -
      !fsb/Ready1r && !iobs/IOReady && nDTACK_FSB && !nADoutLE1)); +
      OR (A_FSB(22) AND A_FSB(20) AND NOT fsb/Ready1r AND +
      NOT iobs/IOReady AND nDTACK_FSB) +
      OR (A_FSB(9) AND A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND +
      A_FSB(13) AND A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND A_FSB(23) AND +
      A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND +
      A_FSB(17) AND A_FSB(16) AND fsb/Ready1r) +
      OR (A_FSB(9) AND A_FSB(8) AND A_FSB(15) AND A_FSB(14) AND +
      A_FSB(13) AND A_FSB(12) AND A_FSB(11) AND A_FSB(10) AND A_FSB(23) AND +
      A_FSB(22) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND A_FSB(18) AND +
      A_FSB(17) AND A_FSB(16) AND iobs/IOReady) +
      OR (A_FSB(22) AND A_FSB(21) AND NOT fsb/Ready1r AND +
      NOT iobs/IOReady AND nDTACK_FSB) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND +
      NOT fsb/Ready0r AND nDTACK_FSB AND NOT ram/RAMReady) +
      OR (A_FSB(14) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND +
      A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND cs/nOverlay AND +
      NOT fsb/Ready1r AND NOT nWE_FSB AND NOT iobs/IOReady AND nDTACK_FSB AND NOT nADoutLE1) +
      OR (A_FSB(13) AND A_FSB(21) AND A_FSB(20) AND A_FSB(19) AND +
      A_FSB(18) AND A_FSB(17) AND A_FSB(16) AND cs/nOverlay AND +
      NOT fsb/Ready1r AND NOT nWE_FSB AND NOT iobs/IOReady AND nDTACK_FSB AND NOT nADoutLE1));
-FDCPE FDCPE_nDinLE (nDinLE,nDinLE_D,!C16M,1'b0,1'b0); -
     assign nDinLE_D = (iobm/IOS_FSM_FFd1 && iobm/IOS_FSM_FFd2); +FDCPE_nDinLE: FDCPE port map (nDinLE,nDinLE_D,NOT C16M,'0','0'); +
     nDinLE_D <= (iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2);
-assign nDinOE = ((A_FSB[23] && nWE_FSB && !nAS_FSB) -
      || (A_FSB[22] && A_FSB[21] && nWE_FSB && !nAS_FSB) -
      || (A_FSB[22] && A_FSB[20] && nWE_FSB && !nAS_FSB)); +nDinOE <= ((A_FSB(23) AND nWE_FSB AND NOT nAS_FSB) +
      OR (A_FSB(22) AND A_FSB(21) AND nWE_FSB AND NOT nAS_FSB) +
      OR (A_FSB(22) AND A_FSB(20) AND nWE_FSB AND NOT nAS_FSB));
-assign nDoutOE = !((iobm/DoutOE && !nAoutOE)); +nDoutOE <= NOT ((iobm/DoutOE AND NOT nAoutOE));
-FDCPE FDCPE_nLDS_IOB (nLDS_IOB_I,nLDS_IOB,!C16M,1'b0,1'b0); -
     assign nLDS_IOB = ((iobs/IOL0 && !iobm/IOS_FSM_FFd3 && -
      iobm/IOS_FSM_FFd2) -
      || (iobs/IOL0 && iobm/IOS_FSM_FFd1 && -
      iobm/IOS_FSM_FFd2) -
      || (!iobs/IORW0 && iobs/IOL0 && iobm/IOS_FSM_FFd3 && -
      !iobm/IOS_FSM_FFd1)); -
     assign nLDS_IOB = nLDS_IOB_OE ? nLDS_IOB_I : 1'bZ; -
     assign nLDS_IOB_OE = !nAoutOE; +FDCPE_nLDS_IOB: FDCPE port map (nLDS_IOB_I,nLDS_IOB,NOT C16M,'0','0'); +
     nLDS_IOB <= ((IOL0 AND NOT iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2) +
      OR (IOL0 AND iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2) +
      OR (IORW0 AND IOL0 AND iobm/IOS_FSM_FFd3 AND +
      NOT iobm/IOS_FSM_FFd1)); +
     nLDS_IOB <= nLDS_IOB_I when nLDS_IOB_OE = '1' else 'Z'; +
     nLDS_IOB_OE <= NOT nAoutOE;
-assign nOE = !((nWE_FSB && !nAS_FSB)); +nOE <= NOT ((nWE_FSB AND NOT nAS_FSB));
-assign nRAMLWE = !((!nWE_FSB && !nLDS_FSB && !nAS_FSB && ram/RAMEN)); +nRAMLWE <= NOT ((NOT nLDS_FSB AND NOT nWE_FSB AND NOT nAS_FSB AND ram/RAMEN));
-assign nRAMUWE = !((!nWE_FSB && !nUDS_FSB && !nAS_FSB && ram/RAMEN)); +nRAMUWE <= NOT ((NOT nWE_FSB AND NOT nUDS_FSB AND NOT nAS_FSB AND ram/RAMEN));
-assign nRAS = !(((ram/RefRAS) -
      || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && !nAS_FSB && -
      ram/RAMEN) -
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && -
      !cs/nOverlay1 && !nAS_FSB && ram/RAMEN))); +nRAS <= '1';
-assign nRES_I = 1'b0; -
     assign nRES = nRES_OE ? nRES_I : 1'bZ; -
     assign nRES_OE = !cnt/nRESout; +nRES_I <= '0'; +
     nRES <= nRES_I when nRES_OE = '1' else 'Z'; +
     nRES_OE <= NOT nRESout; +
+FDCPE_nRESout: FDCPE port map (nRESout,nRESout_D,FCLK,'0','0'); +
     nRESout_D <= (cnt/INITS_FSM_FFd1 AND NOT cnt/INITS_FSM_FFd2);
-assign nROMCS = !(((!A_FSB[23] && A_FSB[22] && !A_FSB[21] && !A_FSB[20]) -
      || (!A_FSB[23] && !A_FSB[21] && !A_FSB[20] && -
      !cs/nOverlay1))); +nROMCS <= NOT (((NOT A_FSB(23) AND NOT A_FSB(21) AND NOT A_FSB(20) AND NOT cs/nOverlay) +
      OR (NOT A_FSB(23) AND A_FSB(22) AND NOT A_FSB(21) AND NOT A_FSB(20))));
-assign nROMWE = !((!nWE_FSB && !nAS_FSB)); +nROMWE <= NOT ((NOT nWE_FSB AND NOT nAS_FSB));
-FDCPE FDCPE_nUDS_IOB (nUDS_IOB_I,nUDS_IOB,!C16M,1'b0,1'b0); -
     assign nUDS_IOB = ((iobs/IOU0 && !iobm/IOS_FSM_FFd3 && -
      iobm/IOS_FSM_FFd2) -
      || (iobs/IOU0 && iobm/IOS_FSM_FFd1 && -
      iobm/IOS_FSM_FFd2) -
      || (!iobs/IORW0 && iobs/IOU0 && iobm/IOS_FSM_FFd3 && -
      !iobm/IOS_FSM_FFd1)); -
     assign nUDS_IOB = nUDS_IOB_OE ? nUDS_IOB_I : 1'bZ; -
     assign nUDS_IOB_OE = !nAoutOE; +FDCPE_nUDS_IOB: FDCPE port map (nUDS_IOB_I,nUDS_IOB,NOT C16M,'0','0'); +
     nUDS_IOB <= ((IOU0 AND NOT iobm/IOS_FSM_FFd3 AND iobm/IOS_FSM_FFd2) +
      OR (IOU0 AND iobm/IOS_FSM_FFd1 AND iobm/IOS_FSM_FFd2) +
      OR (IORW0 AND IOU0 AND iobm/IOS_FSM_FFd3 AND +
      NOT iobm/IOS_FSM_FFd1)); +
     nUDS_IOB <= nUDS_IOB_I when nUDS_IOB_OE = '1' else 'Z'; +
     nUDS_IOB_OE <= NOT nAoutOE;
-FTCPE FTCPE_nVMA_IOB (nVMA_IOB_I,nVMA_IOB_T,C16M,1'b0,1'b0); -
     assign nVMA_IOB_T = ((!nVMA_IOB && !iobm/ES[0] && !iobm/ES[1] && !iobm/ES[2] && -
      !iobm/ES[3] && !iobm/ES[4]) -
      || (nVMA_IOB && iobm/ES[0] && iobm/ES[1] && iobm/ES[2] && -
      !iobm/ES[3] && !iobm/ES[4] && iobm/IOACT && iobm/VPArf && -
      iobm/VPArr)); -
     assign nVMA_IOB = nVMA_IOB_OE ? nVMA_IOB_I : 1'bZ; -
     assign nVMA_IOB_OE = !nAoutOE; +FTCPE_nVMA_IOB: FTCPE port map (nVMA_IOB_I,nVMA_IOB_T,C16M,'0','0'); +
     nVMA_IOB_T <= ((NOT nVMA_IOB AND NOT iobm/ES(0) AND NOT iobm/ES(1) AND NOT iobm/ES(2) AND +
      NOT iobm/ES(3) AND NOT iobm/ES(4)) +
      OR (nVMA_IOB AND iobm/ES(0) AND iobm/ES(1) AND iobm/ES(2) AND +
      NOT iobm/ES(3) AND NOT iobm/ES(4) AND IOACT AND iobm/VPArf AND iobm/VPArr)); +
     nVMA_IOB <= nVMA_IOB_I when nVMA_IOB_OE = '1' else 'Z'; +
     nVMA_IOB_OE <= NOT nAoutOE;
-assign nVPA_FSB = !((fsb/VPA && !nAS_FSB)); +nVPA_FSB <= NOT ((fsb/VPA AND NOT nAS_FSB));
-FDCPE FDCPE_ram/BACTr (ram/BACTr,ram/BACTr_D,FCLK,1'b0,1'b0); -
     assign ram/BACTr_D = (nAS_FSB && !fsb/ASrf); +FDCPE_ram/BACTr: FDCPE port map (ram/BACTr,ram/BACTr_D,FCLK,'0','0'); +
     ram/BACTr_D <= (nAS_FSB AND NOT fsb/ASrf);
-FDCPE FDCPE_ram/RAMEN (ram/RAMEN,ram/RAMEN_D,FCLK,1'b0,1'b0); -
     assign ram/RAMEN_D = ((!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && !nAS_FSB && -
      !ram/RS_FSM_FFd1 && ram/RAMEN) -
      || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && -
      !ram/RS_FSM_FFd1 && ram/RAMEN && fsb/ASrf) -
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && -
      !cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd1 && ram/RAMEN) -
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && -
      !cs/nOverlay1 && !ram/RS_FSM_FFd1 && ram/RAMEN && fsb/ASrf) -
      || (ram/RS_FSM_FFd2 && ram/RAMEN) -
      || (ram/RS_FSM_FFd3 && ram/RAMEN) -
      || (!ram/RS_FSM_FFd1 && !ram/RefUrgent && ram/RAMEN && +FDCPE_ram/RAMEN: FDCPE port map (ram/RAMEN,ram/RAMEN_D,FCLK,'0','0'); +
     ram/RAMEN_D <= ((ram/RS_FSM_FFd3 AND ram/RAMEN) +
      OR (ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND ram/RAMEN) +
      OR (NOT ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd2 AND ram/RAMEN) +
      OR (nAS_FSB AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd2 AND +
      NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT fsb/ASrf) +
      OR (nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND +
      NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT fsb/ASrf) +
      OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RefUrg AND ram/RAMEN AND
      ram/BACTr) -
      || (!ram/RS_FSM_FFd1 && !ram/RefUrgent && ram/RAMEN && -
      !ram/RefReq) -
      || (nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RefUrgent && -
      !ram/RS_FSM_FFd3 && !fsb/ASrf)); +
      OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RefUrg AND ram/RAMEN AND +
      NOT ram/RefReq) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND NOT nAS_FSB AND +
      NOT ram/RS_FSM_FFd1 AND ram/RAMEN) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND +
      NOT ram/RS_FSM_FFd1 AND ram/RAMEN AND fsb/ASrf));
-FDCPE FDCPE_ram/RAMReady (ram/RAMReady,ram/RAMReady_D,FCLK,1'b0,1'b0); -
     assign ram/RAMReady_D = ((RA_6_OBUF.EXP) -
      || (A_FSB[23] && !ram/RS_FSM_FFd2 && !ram/RefUrgent && -
      !ram/RS_FSM_FFd3 && !ram/RefReq) -
      || (A_FSB[22] && !A_FSB[21] && !ram/RS_FSM_FFd2 && -
      !ram/RefUrgent && !ram/RS_FSM_FFd3 && ram/BACTr) -
      || (A_FSB[22] && !A_FSB[21] && !ram/RS_FSM_FFd2 && -
      !ram/RefUrgent && !ram/RS_FSM_FFd3 && !ram/RefReq) -
      || (A_FSB[22] && cs/nOverlay1 && !ram/RS_FSM_FFd2 && -
      !ram/RefUrgent && !ram/RS_FSM_FFd3 && ram/BACTr) -
      || (!A_FSB[22] && !cs/nOverlay1 && !ram/RS_FSM_FFd2 && -
      !ram/RefUrgent && !ram/RS_FSM_FFd3 && ram/BACTr) -
      || (ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && -
      !ram/RefUrgent && !ram/RS_FSM_FFd3) -
      || (A_FSB[23] && !ram/RS_FSM_FFd2 && !ram/RefUrgent && -
      !ram/RS_FSM_FFd3 && ram/BACTr) -
      || (nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RefUrgent && -
      !ram/RS_FSM_FFd3 && !fsb/ASrf)); +FDCPE_ram/RAMReady: FDCPE port map (ram/RAMReady,ram/RAMReady_D,FCLK,'0','0'); +
     ram/RAMReady_D <= ((A_FSB(23) AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND +
      NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT ram/RefReq) +
      OR (A_FSB(22) AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND +
      NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND ram/BACTr) +
      OR (A_FSB(22) AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND +
      NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT ram/RefReq) +
      OR (A_FSB(23) AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND +
      NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND ram/BACTr) +
      OR (ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd2 AND +
      NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg) +
      OR (NOT cs/nOverlay AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND +
      NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND ram/BACTr) +
      OR (NOT cs/nOverlay AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND +
      NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT ram/RefReq) +
      OR (nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND +
      NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT fsb/ASrf) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND +
      NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND +
      NOT ram/RAMEN));
-FDCPE FDCPE_ram/RASEL (ram/RASEL,ram/RASEL_D,FCLK,1'b0,1'b0); -
     assign ram/RASEL_D = ((A_FSB[22] && !A_FSB[21] && !ram/RS_FSM_FFd2 && -
      !ram/RefUrgent && !ram/RS_FSM_FFd3 && !ram/RefReq) -
      || (A_FSB[22] && cs/nOverlay1 && !ram/RS_FSM_FFd2 && -
      !ram/RefUrgent && !ram/RS_FSM_FFd3 && !ram/RefReq) -
      || (!A_FSB[22] && !cs/nOverlay1 && !ram/RS_FSM_FFd2 && -
      !ram/RefUrgent && !ram/RS_FSM_FFd3 && !ram/RefReq) -
      || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && !nAS_FSB && -
      !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && !ram/RAMEN) -
      || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && -
      !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && !ram/RAMEN && fsb/ASrf) -
      || (ram/RAMReady.EXP) -
      || (A_FSB[23] && !ram/RS_FSM_FFd2 && !ram/RefUrgent && -
      !ram/RS_FSM_FFd3 && ram/BACTr) -
      || (A_FSB[23] && !ram/RS_FSM_FFd2 && !ram/RefUrgent && -
      !ram/RS_FSM_FFd3 && !ram/RefReq) -
      || (A_FSB[22] && !A_FSB[21] && !ram/RS_FSM_FFd2 && -
      !ram/RefUrgent && !ram/RS_FSM_FFd3 && ram/BACTr) -
      || (A_FSB[22] && cs/nOverlay1 && !ram/RS_FSM_FFd2 && -
      !ram/RefUrgent && !ram/RS_FSM_FFd3 && ram/BACTr) -
      || (!A_FSB[22] && !cs/nOverlay1 && !ram/RS_FSM_FFd2 && -
      !ram/RefUrgent && !ram/RS_FSM_FFd3 && ram/BACTr) -
      || (ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2) -
      || (ram/RS_FSM_FFd2 && ram/RS_FSM_FFd3) -
      || (!nAS_FSB && ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3) -
      || (ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && fsb/ASrf) -
      || (nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RefUrgent && -
      !ram/RS_FSM_FFd3 && !fsb/ASrf)); +FDCPE_ram/RASEL: FDCPE port map (ram/RASEL,ram/RASEL_D,FCLK,'0','0'); +
     ram/RASEL_D <= ((A_FSB(23) AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND +
      NOT ram/RefUrg AND NOT ram/RefReq) +
      OR (A_FSB(22) AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND +
      NOT ram/RefUrg AND NOT ram/RefReq) +
      OR (nAS_FSB AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND +
      NOT ram/RefUrg AND NOT fsb/ASrf) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND NOT nAS_FSB AND +
      NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND NOT ram/RAMEN) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND +
      NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND NOT ram/RAMEN AND fsb/ASrf) +
      OR (A_FSB(23) AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND +
      NOT ram/RefUrg AND ram/BACTr) +
      OR (A_FSB(22) AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND +
      NOT ram/RefUrg AND ram/BACTr) +
      OR (NOT cs/nOverlay AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND +
      NOT ram/RefUrg AND ram/BACTr) +
      OR (NOT cs/nOverlay AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND +
      NOT ram/RefUrg AND NOT ram/RefReq) +
      OR (NOT nAS_FSB AND ram/RS_FSM_FFd1) +
      OR (ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2) +
      OR (ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3) +
      OR (ram/RS_FSM_FFd1 AND NOT ram/RefUrg) +
      OR (ram/RS_FSM_FFd1 AND fsb/ASrf));
-FDCPE FDCPE_ram/RS_FSM_FFd1 (ram/RS_FSM_FFd1,ram/RS_FSM_FFd1_D,FCLK,1'b0,1'b0); -
     assign ram/RS_FSM_FFd1_D = ((ram/RS_FSM_FFd1 && ram/RefUrgent && -
      !ram/RS_FSM_FFd3 && fsb/ASrf) -
      || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && !nAS_FSB && -
      !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && ram/RefUrgent && !ram/RAMEN) -
      || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && -
      !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && ram/RefUrgent && !ram/RAMEN && +FDCPE_ram/RS_FSM_FFd1: FDCPE port map (ram/RS_FSM_FFd1,ram/RS_FSM_FFd1_D,FCLK,'0','0'); +
     ram/RS_FSM_FFd1_D <= ((ram/RS_FSM_FFd3) +
      OR (ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2)); +
+FDCPE_ram/RS_FSM_FFd2: FDCPE port map (ram/RS_FSM_FFd2,ram/RS_FSM_FFd2_D,FCLK,'0','0'); +
     ram/RS_FSM_FFd2_D <= ((ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd2 AND ram/RefUrg AND
      fsb/ASrf) -
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && -
      !cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && -
      ram/RefUrgent && !ram/RAMEN) -
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && -
      !cs/nOverlay1 && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && -
      ram/RefUrgent && !ram/RAMEN && fsb/ASrf) -
      || (ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2) -
      || (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd3) -
      || (!nAS_FSB && ram/RS_FSM_FFd1 && ram/RefUrgent && -
      !ram/RS_FSM_FFd3)); +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND NOT nAS_FSB AND +
      NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND ram/RefUrg) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND NOT nAS_FSB AND +
      NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND ram/RAMEN) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND +
      NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND ram/RefUrg AND +
      fsb/ASrf) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND +
      NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND ram/RAMEN AND +
      fsb/ASrf) +
      OR (ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd3) +
      OR (ram/RS_FSM_FFd2 AND ram/RS_FSM_FFd3) +
      OR (NOT nAS_FSB AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd2 AND +
      ram/RefUrg));
-FDCPE FDCPE_ram/RS_FSM_FFd2 (ram/RS_FSM_FFd2,ram/RS_FSM_FFd2_D,FCLK,1'b0,1'b0); -
     assign ram/RS_FSM_FFd2_D = ((nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RefUrgent && -
      !ram/RS_FSM_FFd3 && !fsb/ASrf) -
      || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && !nAS_FSB && -
      !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3) -
      || (!A_FSB[23] && !A_FSB[22] && cs/nOverlay1 && -
      !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && fsb/ASrf) -
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && -
      !cs/nOverlay1 && !nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3) -
      || (!A_FSB[23] && A_FSB[22] && A_FSB[21] && -
      !cs/nOverlay1 && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && fsb/ASrf) -
      || (ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2) -
      || (!nAS_FSB && ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3) -
      || (ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd3 && fsb/ASrf) -
      || (!ram/RS_FSM_FFd2 && !ram/RefUrgent && -
      !ram/RS_FSM_FFd3 && ram/BACTr) -
      || (!ram/RS_FSM_FFd2 && !ram/RefUrgent && -
      !ram/RS_FSM_FFd3 && !ram/RefReq)); -
-FTCPE FTCPE_ram/RS_FSM_FFd3 (ram/RS_FSM_FFd3,ram/RS_FSM_FFd3_T,FCLK,1'b0,1'b0); -
     assign ram/RS_FSM_FFd3_T = ((ram/RS_FSM_FFd1.EXP) -
      || (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2 && +FTCPE_ram/RS_FSM_FFd3: FTCPE port map (ram/RS_FSM_FFd3,ram/RS_FSM_FFd3_T,FCLK,'0','0'); +
     ram/RS_FSM_FFd3_T <= ((A_FSB(23) AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND +
      NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND ram/BACTr) +
      OR (A_FSB(22) AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND +
      NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND ram/BACTr) +
      OR (A_FSB(22) AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND +
      NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT ram/RefReq) +
      OR (NOT cs/nOverlay AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND +
      NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT ram/RefReq) +
      OR (A_FSB(23) AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND +
      NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT ram/RefReq) +
      OR (nAS_FSB AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND +
      NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND NOT fsb/ASrf) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND NOT nAS_FSB AND +
      NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND NOT ram/RAMEN) +
      OR (NOT A_FSB(23) AND NOT A_FSB(22) AND cs/nOverlay AND +
      NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND NOT ram/RS_FSM_FFd3 AND NOT ram/RAMEN AND +
      fsb/ASrf) +
      OR (NOT ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd2 AND
      ram/RS_FSM_FFd3) -
      || (A_FSB[23] && !ram/RS_FSM_FFd1 && !ram/RS_FSM_FFd2 && -
      !ram/RS_FSM_FFd3) -
      || (nAS_FSB && !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3 && -
      !fsb/ASrf) -
      || (!ram/RS_FSM_FFd2 && !ram/RefUrgent && -
      !ram/RS_FSM_FFd3 && !ram/RAMEN) -
      || (A_FSB[22] && !A_FSB[21] && !ram/RS_FSM_FFd1 && -
      !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3) -
      || (A_FSB[22] && cs/nOverlay1 && !ram/RS_FSM_FFd1 && -
      !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3) -
      || (!A_FSB[22] && !cs/nOverlay1 && !ram/RS_FSM_FFd1 && -
      !ram/RS_FSM_FFd2 && !ram/RS_FSM_FFd3)); +
      OR (NOT nAS_FSB AND ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd2 AND +
      NOT ram/RS_FSM_FFd3) +
      OR (ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd2 AND +
      NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg) +
      OR (ram/RS_FSM_FFd1 AND ram/RS_FSM_FFd2 AND +
      NOT ram/RS_FSM_FFd3 AND fsb/ASrf) +
      OR (NOT cs/nOverlay AND NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND +
      NOT ram/RS_FSM_FFd3 AND NOT ram/RefUrg AND ram/BACTr));
-FDCPE FDCPE_ram/RefDone (ram/RefDone,ram/RefDone_D,FCLK,1'b0,1'b0); -
     assign ram/RefDone_D = ((ram/RefDone && ram/RefReqSync) -
      || (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2 && -
      ram/RefReqSync)); +FDCPE_ram/RefDone: FDCPE port map (ram/RefDone,ram/RefDone_D,FCLK,'0','0'); +
     ram/RefDone_D <= ((ram/RefDone AND ram/RefReqSync) +
      OR (ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND +
      NOT ram/RS_FSM_FFd3 AND ram/RefReqSync) +
      OR (NOT ram/RS_FSM_FFd1 AND NOT ram/RS_FSM_FFd2 AND +
      ram/RS_FSM_FFd3 AND ram/RefReqSync));
-FDCPE FDCPE_ram/RefRAS (ram/RefRAS,ram/RefRAS_D,FCLK,1'b0,1'b0); -
     assign ram/RefRAS_D = (!ram/RS_FSM_FFd1 && ram/RS_FSM_FFd2); +FDCPE_ram/RefReq: FDCPE port map (ram/RefReq,ram/RefReq_D,FCLK,'0','0'); +
     ram/RefReq_D <= (NOT ram/RefDone AND ram/RefReqSync);
-FDCPE FDCPE_ram/RefReq (ram/RefReq,ram/RefReq_D,FCLK,1'b0,1'b0); -
     assign ram/RefReq_D = (!ram/RefDone && ram/RefReqSync); +FDCPE_ram/RefReqSync: FDCPE port map (ram/RefReqSync,RefReq,FCLK,'0','0');
-FDCPE FDCPE_ram/RefReqSync (ram/RefReqSync,cnt/RefReq,FCLK,1'b0,1'b0); +FDCPE_ram/RefUrg: FDCPE port map (ram/RefUrg,ram/RefUrg_D,FCLK,'0','0'); +
     ram/RefUrg_D <= (NOT ram/RefDone AND ram/RegUrgSync);
-FDCPE FDCPE_ram/RefUrgent (ram/RefUrgent,ram/RefUrgent_D,FCLK,1'b0,1'b0); -
     assign ram/RefUrgent_D = (!ram/RefDone && ram/RegUrgentSync); -
-FDCPE FDCPE_ram/RegUrgentSync (ram/RegUrgentSync,cnt/RefUrgent,FCLK,1'b0,1'b0); +FDCPE_ram/RegUrgSync: FDCPE port map (ram/RegUrgSync,RefUrg,FCLK,'0','0');
Register Legend:
      FDCPE (Q,D,C,CLR,PRE,CE); diff --git a/cpld/XC95144XL/WarpSE_html/fit/eqns.htm b/cpld/XC95144XL/WarpSE_html/fit/eqns.htm index 85f944b..bbd1f94 100644 --- a/cpld/XC95144XL/WarpSE_html/fit/eqns.htm +++ b/cpld/XC95144XL/WarpSE_html/fit/eqns.htm @@ -3,9 +3,9 @@ + @@ -52,8 +52,8 @@ + +
 

  diff --git a/cpld/XC95144XL/WarpSE_html/fit/maplogic_00.htm b/cpld/XC95144XL/WarpSE_html/fit/maplogic_00.htm index a3d79e5..6c75daf 100644 --- a/cpld/XC95144XL/WarpSE_html/fit/maplogic_00.htm +++ b/cpld/XC95144XL/WarpSE_html/fit/maplogic_00.htm @@ -20,6 +20,32 @@ 		Reg Init State
ALE0M24FB1MC17STD 22I/O/GCK1GCKRESET
ALE0S12FB1MC12STD 18I/OIRESET
C20MEN 0 0 
IOACT612FB6MC16STD  (b)(b)RESET
IOBERR913FB6MC18STD  (b)(b)RESET
IOL035FB4MC17STD 97I/OIRESET
IOREQ1319FB3MC16STD  (b)(b)RESET
IORW01720FB3MC1STD  (b)(b)RESET
IOU035FB4MC16STD  (b)(b)RESET
RA<0> 2 3
RA<8>7756 FB7 MC8 STD 
cnt/IPL2rRefReq25FB4MC15STD 96I/OIRESET
RefUrg57FB4MC18STD  (b)(b)RESET
cnt/Er<0>11FB1MC11STD 17I/OIRESET
cnt/Er<1> 1 1 FB4RESET
cnt/LTimer<0>23FB4MC14cnt/INITS_FSM_FFd117FB8MC17 STD  9573 I/OI(b)RESET
cnt/INITS_FSM_FFd226FB8MC7STD  (b)(b)RESET
cnt/LTimer<0>13FB8MC18STD  (b)(b) RESET
cnt/LTimer<10>42 13 FB7 MC18
cnt/LTimer<11>42 14 FB7 MC17
cnt/LTimer<12>42 15 FB7 MC16RESET
cnt/LTimer<13>315FB7MC1STD  (b)(b)RESET
cnt/LTimer<1>42 4 FB4MC17MC14 STD  9795 I/O I RESET
cnt/LTimer<2>42 5 FB4MC16MC13 STD    
cnt/LTimer<3>42 6 FB4MC15MC12 STD  9694 I/O I RESET
cnt/LTimer<4>42 7 FB7 MC15
cnt/LTimer<5>42 8 FB7 MC13
cnt/LTimer<6>42 9 FB7 MC10
cnt/LTimer<7>42 10 FB7 MC7
cnt/LTimer<8>42 11 FB7 MC4
cnt/LTimer<9>42 12 FB7 MC3RESET
cnt/PORS_FSM_FFd114FB4MC7STD  (b)(b)RESET
cnt/PORS_FSM_FFd2cnt/LTimerTC 23FB4MC13STD  (b)(b)RESET
cnt/RefReq45FB1MC18STD  (b)(b)RESET
cnt/RefUrgent35FB1MC1616FB7MC1 STD    
cnt/Timer<0> 23FB2MC184FB8MC4 STD    
cnt/Timer<1>3 4FB1MC155FB8MC10 STD  20I/OI (b)(b) RESET
cnt/Timer<2>3 5FB1MC14STD 19I/OIRESET
cnt/Timer<3>3 6FB1MC13FB8MC3 STD    
cnt/TimerTC 256FB4MC10STD  (b)(b)RESET
cnt/nIPL2r11 FB1 MC10 STDRESET
cnt/nRESout24FB4MC12STD 94I/OIRESET
cs/nOverlay0cs/nOverlay 3 8FB5MC8FB3MC14 STD  3932 I/O(b)RESET
cs/nOverlay123FB5MC4STD  (b)(b)I RESET
fsb/ASrf 1 1FB1FB4 MC7 STD  
fsb/Ready0r38FB5MC727FB8MC9 STD   (b)67I/O (b) RESET
6 17 FB3MC10MC13 STD    
fsb/VPA1816 26 FB3MC1MC6 STD   (b)(b)RESET
iobm/ALE024FB6MC4STD  (b)(b)25I/OI RESET
iobm/BERRrf 1 1FB4MC4FB1MC9 STD   (b)(b)16I/OI RESET
iobm/BERRrr 1 1FB4MC3FB1MC8 STD   (b)(b)15I/OI RESET
iobm/DTACKrf 1 1FB2MC17FB1MC7 STD  10I/OI (b)(b) RESET
iobm/DTACKrr 1 1FB2MC16FB1MC6 STD   (b)(b)14I/OI RESET
iobm/DoutOE2 36 FB6MC3MC7 STD    3 7 FB6MC8MC6 STD  7877 I/O I RESET3 4 FB6MC7MC5 STD   (b)(b)76I/OI RESET
5 7 FB6MC16MC13 STD    3 6 FB6MC6MC4 STD  77I/OI (b)(b) RESET
4 7 FB6MC10MC8 STD   (b)(b)78I/OI RESET
1 1 FB2MC14MC18 STD  8I/OI (b)(b) RESET
iobm/Er 1 1FB2MC15FB1MC5 STD  913 I/O I RESET
iobm/IOACT612FB6MC18STD  (b)(b)RESET
iobm/IOBERR913FB4MC18STD  (b)(b)RESET
iobm/IOREQr 1 1 FB2MC13MC17 STD   (b)(b)10I/OI RESET
iobm/IOS_FSM_FFd1 2 3FB4MC10FB1MC16 STD    5 11 FB6MC13MC10 STD    3 6 FB6MC5MC3 STD  76I/OI (b)(b) RESET
1 1 FB2MC12MC16 STD  7I/OI (b)(b) RESET
1 1 FB2MC11MC15 STD  69 I/O I RESET1 1 FB2MC10MC14 STD   (b)(b)8I/OI RESET
1 1 FB2MC9STD 4I/O/GTS2IRESET
iobs/ALE012FB8MC4MC13 STD    iobs/Clear1 1 3FB8MC3FB3MC18 STD    1 1 FB1MC6MC4 STD  14I/OIRESET
iobs/IOL035FB1MC12STD  18I/OI(b)(b) RESET
2 2 FB1MC9STD 16I/OIRESET
iobs/IOREQ1319FB3MC7STD  (b)(b)RESET
iobs/IORW01720FB3 MC15 STD  3320 I/O I RESET16 19 FB3MC12MC11 STD  3029 I/O I RESETiobs/IOReady 4 8FB1MC17FB5MC16 STD  22I/O/GCK1GCKRESET
iobs/IOU035FB1MC11STD  17I/OI(b)(b) RESET
2 2 FB1MC8MC14 STD  1519 I/O I RESETiobs/Load1 14 18FB8MC16FB5MC3 STD    iobs/Once 15 18FB8MC1FB5MC17 STD   (b)49I/O (b) RESET
iobs/PS_FSM_FFd1 2 3FB8MC7FB5MC10 STD    iobs/PS_FSM_FFd2 12 19FB8MC14FB5MC7 STD  71I/O (b) (b) RESET
nAoutOE1324 FB4 MC2 STD
nDTACK_FSB109 26 FB3 MC9
nRAS3700 FB8 MC5 STD 
nRESout12FB4MC4STD  (b)(b)RESET
nROMCS 2 5ram/BACTr 1 2FB8MC17FB4MC3 STD  73I/O (b) (b) RESET
ram/RAMEN 913FB5MC1012FB8MC14 STD   (b)71I/O (b) RESET
ram/RAMReady1213FB5MC17STD 49I/O(b)RESET
ram/RASEL1713FB5MC1STD  (b)(b)RESET
ram/RS_FSM_FFd1811FB8MC9STD 67I/O(b)RESET
ram/RS_FSM_FFd21012FB5MC13STD  (b)(b)RESET
ram/RS_FSM_FFd3 91112 FB8 MC11 STDRESET
ram/RefDone24FB5MC3ram/RASEL1412FB8MC1 STD    RESET
ram/RefRAS1ram/RS_FSM_FFd1 23 FB1MC5MC13 STD  13 (b)(b)RESET
ram/RS_FSM_FFd2810FB5MC8STD 39 I/OI(b)RESET
ram/RS_FSM_FFd31312FB8MC16STD  (b)(b)RESET
ram/RefDone35FB1MC18STD  (b)(b) RESET
1 1 FB1MC3STD 12I/OIRESET
ram/RefReq12FB1MC4STD  (b)(b)RESET
ram/RefUrgent12FB1 MC2 STD  RESET
ram/RegUrgentSync1ram/RefReq 12 FB1MC3STD 12I/OIRESET
ram/RefUrg12FB1MC1STD  (b)(b)RESET
ram/RegUrgSync11FB4 MC1 STD  Reg Init State
ram/RegUrgentSync1ram/RefUrg 12 FB1 MC1 STDRESET
ram/RefUrgentram/RefReqSync1 12 FB1 MC2 STDRESET
ram/RefReqSync1ram/RefReq 12 FB1 MC3 STDRESET
ram/RefReqiobs/IOACTr1 12 FB1 MC4 STDRESET
ram/RefRASiobm/Er1 12 FB1 MC5 STDRESET
iobs/IOACTriobm/DTACKrr 1 1 FB1RESET
fsb/ASrfiobm/DTACKrf 1 1 FB1RESET
iobs/IOU122iobm/BERRrr11 FB1 MC8 STDRESET
iobs/IOL122iobm/BERRrf11 FB1 MC9 STDRESET
cnt/TimerTC25cnt/nIPL2r11 FB1 MC10 STDRESET
iobs/IOU035cnt/Er<0>11 FB1 MC11 STDRESET
iobs/IOL035ALE0S12 FB1 MC12 STDRESET
cnt/Timer<3>ram/RS_FSM_FFd12 36 FB1 MC13 STDRESET
cnt/Timer<2>35iobs/IOU122 FB1 MC14 STDRESET
cnt/Timer<1>34iobs/IOL122 FB1 MC15 STDRESET
cnt/RefUrgentiobm/IOS_FSM_FFd12 35 FB1 MC16 STDRESET
iobs/IOReadyALE0M2 48 FB1 MC17 STDRESET
cnt/RefReq4ram/RefDone3 5 FB1 MC181 1 FB2MC9STD 4I/O/GTS2IRESET
iobm/VPArf11FB2MC10STD  (b)(b)RESET
iobm/RESrr11FB2MC11STD 6I/OIRESET
iobm/RESrf11FB2MC12STD 7I/OIRESET
iobm/IOREQr11FB2 MC13 STD  RESET
iobm/Er2iobm/VPArf 1 1 FB2RESET
iobm/Eriobm/RESrr 1 1 FB2RESET
iobm/DTACKrriobm/RESrf 1 1 FB2RESET
iobm/DTACKrfiobm/IOREQr 1 1 FB2RESET
cnt/Timer<0>23iobm/Er211 FB2 MC18 STDRESET
fsb/VPA1826IORW01720 FB3 MC1 STDRESET
iobs/IOREQ1319fsb/VPA1626 FB3MC7MC6 STD   (b)(b)25I/OI RESET
nDTACK_FSB109 26 FB3 MC9RESET
fsb/Ready1r617FB3MC10STD  (b)(b)RESET
iobs/IORW1 16 19 FB3MC12MC11 STD  3029 I/O I RESET
iobs/IORW0fsb/Ready1r6 1720 FB3MC15MC13 STD  33 (b)(b)RESET
cs/nOverlay38FB3MC14STD 32 I/O I RESET
IOREQ1319FB3MC16STD  (b)(b)RESET
nROMWE 1 2 
nAoutOEiobs/Clear1 1 3FB3MC18STD  (b)(b)RESET
ram/RegUrgSync11FB4MC1STD  (b)(b)RESET
nAoutOE24 FB4 MC2 STDSET
iobm/BERRrr1ram/BACTr 12 FB4 MC3 STDRESET
iobm/BERRrf1nRESout 12 FB4 MC4 STD 
cnt/PORS_FSM_FFd1fsb/ASrf1 14 FB4 MC7 STD 
cnt/IPL2rcnt/Er<1> 1 1 FB4RESET
iobm/IOS_FSM_FFd1cnt/TimerTC 236 FB4 MC10 STD 
cnt/nRESoutcnt/LTimer<3> 246 FB4 MC12 STDRESET
cnt/PORS_FSM_FFd2cnt/LTimer<2> 235 FB4 MC13 STDRESET
cnt/LTimer<0>cnt/LTimer<1> 234 FB4 MC14 STDRESET
cnt/LTimer<3>46RefReq25 FB4 MC15 STDRESET
cnt/LTimer<2>4IOU03 5 FB4 MC16RESET
cnt/LTimer<1>44IOL035 FB4 MC17 STDRESET
iobm/IOBERR913RefUrg57 FB4 MC18 STDRESET
ram/RASEL1713FB5MC1STD  (b)(b)RESET
nROMCS 2 5 
ram/RefDone24iobs/Load11418 FB5 MC3 STDRESET
cs/nOverlay123FB5MC4STD  (b)(b)RESET
nCAS 1 1 
fsb/Ready0r38iobs/PS_FSM_FFd21219 FB5 MC7 STDRESET
cs/nOverlay03ram/RS_FSM_FFd2 810 FB5 MC8 STD 
ram/RAMEN913iobs/PS_FSM_FFd123 FB5 MC10 STD 
ram/RS_FSM_FFd21012FB5MC13STD  (b)(b)RESET
RA<2> 2 3 
ram/RAMReady1213iobs/IOReady48FB5MC16STD  (b)(b)RESET
iobs/Once1518 FB5 MC17 STDRESET
iobm/DoutOE2iobm/IOS_FSM_FFd3 36 FB6 MC3 STDRESET
iobm/ALE024iobm/ES<3>36 FB6 MC4 STDRESET
iobm/IOS_FSM_FFd3iobm/ES<1> 364 FB6 MC5 STDRESET
iobm/ES<3>iobm/ES<0> 367 FB6 MC6 STDRESET
iobm/ES<1>iobm/DoutOE 346 FB6 MC7 STDRESET
iobm/ES<0>3iobm/ES<4>4 7 FB6 MC8RESET
iobm/ES<4>47iobm/IOS_FSM_FFd2511 FB6 MC10 STDRESET
iobm/IOS_FSM_FFd2iobm/ES<2> 5117 FB6 MC13 STD 
iobm/ES<2>57IOACT612 FB6 MC16 STDRESET
iobm/IOACT612IOBERR913 FB6 MC18 STDRESET
cnt/LTimer<13>315cnt/LTimerTC216 FB7 MC1 STD
cnt/LTimer<9>42 12 FB7 MC3
cnt/LTimer<8>42 11 FB7 MC4
cnt/LTimer<7>42 10 FB7 MC7
RA<8>7756 FB7 MC8 STD
cnt/LTimer<6>42 9 FB7 MC10
cnt/LTimer<5>42 8 FB7 MC13
cnt/LTimer<4>42 7 FB7 MC15
cnt/LTimer<12>42 15 FB7 MC16
cnt/LTimer<11>42 14 FB7 MC17
cnt/LTimer<10>42 13 FB7 MC18RESET
iobs/Once1518ram/RASEL1412 FB8 MC1 STD 
iobs/Clear113cnt/Timer<2>56 FB8 MC3 STDRESET
iobs/ALE01cnt/Timer<0> 24 FB8 MC4 STD
nRAS3700 FB8 MC5 STD 
iobs/PS_FSM_FFd1cnt/INITS_FSM_FFd2 236 FB8 MC7 STD 
ram/RS_FSM_FFd1811fsb/Ready0r27 FB8 MC9 STDRESET
ram/RS_FSM_FFd3cnt/Timer<1>45FB8MC10STD  (b)(b)RESET
ram/RAMReady 91112 FB8 MC11 STDRESET
iobs/PS_FSM_FFd2ram/RAMEN9 1219 FB8 MC14 STDRESET
iobs/Load11418ram/RS_FSM_FFd31312 FB8 MC16 STDRESET
ram/BACTrcnt/INITS_FSM_FFd1 127 FB8 MC17 STD(b) RESET
cnt/LTimer<0>13FB8MC18STD  (b)(b)RESET
 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + @@ -72,7 +33,7 @@ - + @@ -85,7 +46,7 @@ - + @@ -98,9 +59,9 @@ - + + - @@ -111,9 +72,9 @@ - - + + @@ -124,9 +85,9 @@ - + + - @@ -137,7 +98,7 @@ - + @@ -150,9 +111,9 @@ - - - + + + @@ -163,9 +124,9 @@ - - - + + + @@ -176,9 +137,9 @@ - - - + + + @@ -189,9 +150,9 @@ - - - + + + @@ -202,9 +163,9 @@ - - - + + + @@ -215,9 +176,9 @@ - - - + + + @@ -228,9 +189,9 @@ - + + - @@ -241,8 +202,21 @@ + + + + + + + + + + + + + - + @@ -258,23 +232,23 @@ - + - + - - - + + + - + - + @@ -332,9 +306,9 @@ - - + + @@ -410,9 +384,9 @@ - - - + + + @@ -463,8 +437,8 @@ - - + + @@ -528,7 +502,7 @@ - + @@ -541,7 +515,7 @@ - + @@ -567,8 +541,8 @@ - - + + @@ -605,9 +579,9 @@ - - - + + + @@ -618,9 +592,9 @@ - + - + @@ -644,9 +618,9 @@ - + + - @@ -670,9 +644,9 @@ - + - + @@ -696,9 +670,9 @@ - + - + @@ -709,9 +683,9 @@ - + - + @@ -722,8 +696,8 @@ - - + + @@ -814,8 +788,8 @@ - - + + @@ -865,7 +839,7 @@ - + @@ -891,9 +865,9 @@ - + - + @@ -904,9 +878,9 @@ - + - + @@ -917,9 +891,9 @@ - - - + + + @@ -930,9 +904,9 @@ - - - + + + @@ -943,9 +917,9 @@ - - + + @@ -959,9 +933,9 @@ - + + - @@ -975,7 +949,7 @@ - + @@ -991,9 +965,9 @@ - - - + + + @@ -1007,9 +981,9 @@ - + + - @@ -1017,15 +991,15 @@ - + - + + - @@ -1039,8 +1013,8 @@ - - + + @@ -1055,23 +1029,7 @@ - - - - - - - - - - - - - - - - - + @@ -1087,7 +1045,7 @@ - + @@ -1103,9 +1061,9 @@ - - - + + + @@ -1119,9 +1077,9 @@ - - - + + + @@ -1135,27 +1093,11 @@ - - - - - - - - - - - - - - - - - + @@ -1167,10 +1109,58 @@ - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -1183,9 +1173,9 @@ - - + + @@ -1199,9 +1189,9 @@ - + + - @@ -1209,15 +1199,15 @@ - + - + - + @@ -1231,27 +1221,11 @@ - - - - - - - - - - - - - - - - - + - + @@ -1263,9 +1237,25 @@ - - - + + + + + + + + + + + + + + + + + + + @@ -1279,25 +1269,9 @@ - - - - - - - - - - - - - - - - - - - + + + @@ -1311,25 +1285,9 @@ - - - - - - - - - - - - - - - - - - - + + + @@ -1337,15 +1295,15 @@ - + - - - + + + @@ -1359,17 +1317,17 @@ - - - + + + - + - + @@ -1391,9 +1349,9 @@ - - + + @@ -1407,9 +1365,9 @@ - - - + + + @@ -1417,15 +1375,15 @@ - + - + - + @@ -1439,27 +1397,11 @@ - - - - - - - - - - - - - - - - - + @@ -1475,6 +1417,22 @@ + + + + + + + + + + + + + + + + @@ -1487,9 +1445,9 @@ - - - + + + @@ -1497,30 +1455,30 @@ - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + - + @@ -1536,7 +1494,7 @@ - + @@ -1552,7 +1510,7 @@ - + @@ -1568,7 +1526,7 @@ - + @@ -1584,7 +1542,7 @@ - + @@ -1600,7 +1558,7 @@ - + @@ -1616,7 +1574,7 @@ - + @@ -1631,9 +1589,9 @@ - - - + + + @@ -1641,15 +1599,15 @@ - + - - - + + + @@ -1663,9 +1621,9 @@ - - + + @@ -1673,15 +1631,15 @@ - + - + - + @@ -1689,15 +1647,31 @@ + + + + + + + + + + + + + + + + - - - + + + @@ -1705,7 +1679,23 @@ - + + + + + + + + + + + + + + + + + diff --git a/cpld/XC95144XL/WarpSE_html/fit/options.htm b/cpld/XC95144XL/WarpSE_html/fit/options.htm index c3e00cc..3b7441a 100644 --- a/cpld/XC95144XL/WarpSE_html/fit/options.htm +++ b/cpld/XC95144XL/WarpSE_html/fit/options.htm @@ -96,7 +96,7 @@ - +
diff --git a/cpld/XC95144XL/WarpSE_html/fit/maplogic_02.htm b/cpld/XC95144XL/WarpSE_html/fit/maplogic_02.htm index 8d9ee73..a5cd9c8 100644 --- a/cpld/XC95144XL/WarpSE_html/fit/maplogic_02.htm +++ b/cpld/XC95144XL/WarpSE_html/fit/maplogic_02.htm @@ -20,46 +20,7 @@ Reg Init State
iobm/VPArr11FB2MC9STD 4I/O/GTS2IRESET
iobm/RESrr11FB2MC11STD 6I/OIRESET
iobm/RESrf11FB2MC12STD 7I/OIRESET
iobm/Er2iobm/VPArf 1 1 FB2RESET
iobm/Eriobm/RESrr 1 1 FB2RESET
iobm/DTACKrfiobm/IOREQr 1 1 FB2RESET
ram/RefUrgentram/RefReqSync1 12 FB1 MC2 STDRESET
ram/RefReqSync1ram/RefReq 12 FB1 MC3 STDRESET
ram/RefRASiobm/Er1 12 FB1 MC5 STDRESET
iobs/IOACTriobm/DTACKrr 1 1 FB1RESET
iobs/IOU122iobm/BERRrr11 FB1 MC8 STDRESET
iobs/IOL122iobm/BERRrf11 FB1 MC9 STDRESET
iobs/IOU035cnt/Er<0>11 FB1 MC11 STDRESET
iobs/IOL035ALE0S12 FB1 MC12 STDRESET
cnt/Timer<2>35iobs/IOU122 FB1 MC14 STDRESET
cnt/Timer<1>34iobs/IOL122 FB1 MC15 STDRESET
iobs/IOReadyALE0M2 48 FB1 MC17 STDRESET
fsb/VPA1626FB3MC6STD 25I/OIRESET
nDTACK_FSB109 26 FB3 MC916 19 FB3MC12MC11 STD  3029 I/O I RESET
iobs/IORW01720cs/nOverlay38 FB3MC15MC14 STD  3332 I/O I RESET 
cs/nOverlay03ram/RS_FSM_FFd2 810 FB5 MC8 STD 
ram/RAMReady1213iobs/Once1518 FB5 MC17 STD
RA<8>7756 FB7 MC8 STD
cnt/LTimer<4>42 7 FB7 MC15
cnt/LTimer<11>42 14 FB7 MC17
nRAS3700 FB8 MC5 STD 
ram/RS_FSM_FFd1811fsb/Ready0r27 FB8 MC9 STDRESET
ram/RS_FSM_FFd3ram/RAMReady 91112 FB8 MC11 STDRESET
iobs/PS_FSM_FFd2ram/RAMEN9 1219 FB8 MC14 STDRESET
ram/BACTrcnt/INITS_FSM_FFd1 127 FB8 MC17 STDRESET
iobm/IOS_FSM_FFd3iobm/ES<1> 364 FB6 MC5 STDRESET
iobm/ES<3>iobm/ES<0> 367 FB6 MC6 STDRESET
iobm/ES<0>3iobm/ES<4>4 7 FB6 MC8
nAoutOE1324 FB4 MC2 STD 
cnt/IPL2rcnt/Er<1> 1 1 FB4 
cnt/nRESoutcnt/LTimer<3> 246 FB4 MC12 STDRESET
cnt/LTimer<0>cnt/LTimer<1> 234 FB4 MC14 STDRESET
cnt/LTimer<3>46RefReq25 FB4 MC15 STDRESET
cnt/LTimer<1>44IOL035 FB4 MC17 STDRESET
ram/RegUrgentSync1ram/RefUrg 12 FB1 MC1 STDRESET
ram/RefReqiobs/IOACTr1 12 FB1 MC4 STDRESET
fsb/ASrfiobm/DTACKrf 1 1 FB1RESET
cnt/TimerTC25cnt/nIPL2r11 FB1 MC10 STDRESET
cnt/Timer<3>ram/RS_FSM_FFd12 36 FB1 MC13 STD  (b) (b)TD     RESET
cnt/RefUrgentiobm/IOS_FSM_FFd12 35 FB1 MC16 STDRESET
cnt/RefReq4ram/RefDone3 5 FB1 MC18RESET
iobm/VPArf11FB2MC10STD  (b)(b)D  RESET
iobm/IOREQriobm/VPArr 1 1 FB2RESET
iobm/DTACKrriobm/RESrf 1 1 FB2RESET
cnt/Timer<0>23iobm/Er211 FB2 MC18 STDRESET
fsb/VPA1826IORW01720 FB3 MC1 STDRESET
iobs/IOREQ1319FB3MC7STD  (b)(b)D  RESET
fsb/Ready1r 6 17 FB3MC10MC13 STD    RESET
iobm/BERRrrIOREQ1319FB3MC16STD  (b)(b)D  RESET
iobs/Clear113FB3MC18STD  (b)(b)D  RESET
ram/RegUrgSync 1 1 FB4MC1STD  (b)(b)D  RESET
ram/BACTr12FB4 MC3 STD  RESET
iobm/BERRrf1nRESout 12 FB4 MC4 STDRESET
cnt/PORS_FSM_FFd1fsb/ASrf1 14 FB4 MC7 STD  (b) (b)TD     RESET
iobm/IOS_FSM_FFd1cnt/TimerTC 236 FB4 MC10 STDRESET
cnt/PORS_FSM_FFd223FB4MC13STD  (b)(b)D  RESET
cnt/LTimer<2>42 5 FB4MC16MC13 STD    RESET
iobm/IOBERR913IOU035FB4MC16STD  (b)(b)D  RESET
RefUrg57 FB4 MC18 STDRESET
ram/RASEL1713FB5MC1STD  (b)(b)D  RESET
ram/RefDone24iobs/Load11418 FB5 MC3 STDRESET
cs/nOverlay123FB5MC4STD  (b)(b)D  RESET
fsb/Ready0r38iobs/PS_FSM_FFd21219 FB5 MC7 STD  (b) (b)DT     RESET
ram/RAMEN913iobs/PS_FSM_FFd123 FB5 MC10 STDRESET
ram/RS_FSM_FFd21012iobs/IOReady48 FB5MC13MC16 STD     (b) (b)DT     RESETRESET
iobm/DoutOE2iobm/IOS_FSM_FFd3 36 FB6 MC3 STDRESET
iobm/ALE024iobm/ES<3>36 FB6 MC4 STD  (b) (b)DT     RESET
iobm/ES<1>iobm/DoutOE 346 FB6 MC7 STDRESET
iobm/ES<4>47FB6MC10STD  (b)(b)T  RESET
iobm/IOS_FSM_FFd2 5 11 FB6MC13MC10 STD    5 7 FB6MC13STD  (b)(b)D  RESET
IOACT612FB6 MC16 STD  RESET
iobm/IOACT612IOBERR913 FB6 MC18 STD  (b) (b)D  RESET
cnt/LTimer<13>315FB7MC1STD  (b)(b) T     RESET
cnt/LTimerTC216FB7MC1STD  (b)(b)D  RESET
cnt/LTimer<9>42 12 FB7 MC3
cnt/LTimer<8>42 11 FB7 MC4
cnt/LTimer<7>42 10 FB7 MC7
cnt/LTimer<6>42 9 FB7 MC10
cnt/LTimer<5>42 8 FB7 MC13
cnt/LTimer<12>42 15 FB7 MC16
cnt/LTimer<10>42 13 FB7 MC18RESET
iobs/Once1518ram/RASEL1412 FB8 MC1 STD  (b) (b)TD     RESET
iobs/Clear113cnt/Timer<2>56 FB8 MC3 STDRESET
iobs/ALE01cnt/Timer<0> 24 FB8 MC4 STD  (b) (b)DT     RESET
iobs/PS_FSM_FFd1cnt/INITS_FSM_FFd2 236 FB8 MC7 STD  (b) (b)T  RESET
cnt/Timer<1>45FB8MC10STD  (b)(b) D     RESET
iobs/Load11418ram/RS_FSM_FFd31312 FB8 MC16 STD  (b) (b)DT  RESET
cnt/LTimer<0>13FB8MC18STD  (b)(b)T     RESET
 Pterm Limit (1-90) 50 25
diff --git a/cpld/XC95144XL/WarpSE_html/fit/summary.htm b/cpld/XC95144XL/WarpSE_html/fit/summary.htm index 88af5c6..ca457ca 100644 --- a/cpld/XC95144XL/WarpSE_html/fit/summary.htm +++ b/cpld/XC95144XL/WarpSE_html/fit/summary.htm @@ -30,7 +30,7 @@ - +
 Date   3-25-2023, 0:52AM  3-26-2023, 4:30AM

RESOURCES SUMMARY
@@ -42,11 +42,11 @@ - - - + + + - +
Function Block Inputs Used
119/144  (83%)428/720  (60%)94/144  (66%)118/144  (82%)384/720  (54%)93/144  (65%) 71/81  (88%)230/432  (54%)224/432  (52%)

PIN RESOURCES
@@ -133,7 +133,7 @@
- + @@ -141,7 +141,7 @@ - +
 Macrocells in high performance mode (MCHP) 119 118
 Macrocells in low power mode (MCLP)
 Total macrocells used (MC) 119 118
diff --git a/cpld/XC95144XL/WarpSE_html/fit/time.htm b/cpld/XC95144XL/WarpSE_html/fit/time.htm index ae0d1cd..f8cf5e6 100644 --- a/cpld/XC95144XL/WarpSE_html/fit/time.htm +++ b/cpld/XC95144XL/WarpSE_html/fit/time.htm @@ -1,923 +1,4 @@ 
-                           Performance Summary Report
-                           --------------------------
-
-Design:     WarpSE
-Device:     XC95144XL-10-TQ100
-Speed File: Version 3.0
-Program:    Timing Report Generator:  version P.20131013
-Date:       Mon Mar 28 09:28:06 2022
-
-Timing Constraint Summary:
-
-TS_CLK_IOB=PERIOD:CLK_IOB:142.857nS:HIGH:71.428nS                            N/A
-TS_CLK_FSB=PERIOD:CLK_FSB:40.000nS:HIGH:20.000nS                             Met
-TS_CLK2X_IOB=PERIOD:CLK2X_IOB:66.666nS:HIGH:33.333nS                         Met
-
-Performance Summary:
-
-Pad to Pad (tPD)                          :         11.0ns (1 macrocell levels)
-Pad 'A_FSB<11>' to Pad 'RA<1>'                                    
-
-Clock net 'CLK_IOB' path delays:
-
-Setup to Clock at the Pad (tSU)           :          6.5ns (0 macrocell levels)
-Data signal 'E_IOB' to DFF D input Pin at 'iobm/Er.D'
-Clock pad 'CLK_IOB'                                                       (GCK)
-
-                          Minimum Clock Period: 9.0ns
-                     Maximum Internal Clock Speed: 111.1Mhz
-                         (Limited by Clock Pulse Width)
-
-Clock net 'CLK_FSB' path delays:
-
-Clock Pad to Output Pad (tCO)             :         14.5ns (2 macrocell levels)
-Clock Pad 'CLK_FSB' to Output Pad 'RA<1>'                                 (GCK)
-
-Clock to Setup (tCYC)                     :         20.1ns (2 macrocell levels)
-Clock to Q, net 'cs/nOverlay1.Q' to DFF Setup(D) at 'fsb/VPA.D'           (GCK)
-Target FF drives output net 'fsb/VPA'
-
-Setup to Clock at the Pad (tSU)           :         16.6ns (1 macrocell levels)
-Data signal 'A_FSB<23>' to DFF D input Pin at 'fsb/VPA.D'
-Clock pad 'CLK_FSB'                                                       (GCK)
-
-                          Minimum Clock Period: 20.1ns
-                     Maximum Internal Clock Speed: 49.7Mhz
-                            (Limited by Cycle Time)
-
-Clock net 'CLK2X_IOB' path delays:
-
-Clock Pad to Output Pad (tCO)             :         14.5ns (2 macrocell levels)
-Clock Pad 'CLK2X_IOB' to Output Pad 'nVMA_IOB'                            (GCK)
-
-Clock to Setup (tCYC)                     :         11.0ns (1 macrocell levels)
-Clock to Q, net 'iobm/IOS_FSM_FFd3.Q' to DFF Setup(D) at 'IOACT.D'        (GCK)
-Target FF drives output net 'IOACT'
-
-Setup to Clock at the Pad (tSU)           :          7.5ns (0 macrocell levels)
-Data signal 'CLK_IOB' to DFF D input Pin at 'IOACT.D'
-Clock pad 'CLK2X_IOB'                                                     (GCK)
-
-                          Minimum Clock Period: 11.0ns
-                     Maximum Internal Clock Speed: 90.9Mhz
-                            (Limited by Cycle Time)
-
---------------------------------------------------------------------------------
-                            Pad to Pad (tPD) (nsec)
-
-\ From        A     A     A     A     A     A     A     A     A     A     A
- \            _     _     _     _     _     _     _     _     _     _     _
-  \           F     F     F     F     F     F     F     F     F     F     F
-   \          S     S     S     S     S     S     S     S     S     S     S
-    \         B     B     B     B     B     B     B     B     B     B     B
-     \        <     <     <     <     <     <     <     <     <     <     <
-      \       1     1     1     1     1     1     1     1     1     1     1
-       \      0     1     2     3     4     5     6     7     8     9     >
-        \     >     >     >     >     >     >     >     >     >     >      
-  To     \------------------------------------------------------------------
-
-CLK20EN                                                                    
-CLK25EN                                                                    
-RA<0>      10.0                                                        10.0
-RA<10>                                                                     
-RA<11>                                                           10.0      
-RA<1>            11.0                                                      
-RA<2>                  11.0                                                
-RA<3>                        10.0                                          
-RA<4>                              11.0                                    
-RA<5>                                    11.0                              
-RA<6>                                          10.0                        
-RA<7>                                                10.0                  
-RA<8>                                                      10.0            
-RA<9>                                                            10.0      
-nBERR_FSB                                                                  
-nDinOE                                                                     
-nOE                                                                        
-nRAMLWE                                                                    
-nRAMUWE                                                                    
-nRAS                                                                       
-nROMCS                                                                     
-nROMWE                                                                     
-nVPA_FSB                                                                   
-
---------------------------------------------------------------------------------
-                            Pad to Pad (tPD) (nsec)
-
-\ From        A     A     A     A     A     A     A     A     A     A     A
- \            _     _     _     _     _     _     _     _     _     _     _
-  \           F     F     F     F     F     F     F     F     F     F     F
-   \          S     S     S     S     S     S     S     S     S     S     S
-    \         B     B     B     B     B     B     B     B     B     B     B
-     \        <     <     <     <     <     <     <     <     <     <     <
-      \       2     2     2     2     2     3     4     5     6     7     8
-       \      0     1     2     3     >     >     >     >     >     >     >
-        \     >     >     >     >                                          
-  To     \------------------------------------------------------------------
-
-CLK20EN                                                                    
-CLK25EN                                                                    
-RA<0>                                                                      
-RA<10>           10.0                                                      
-RA<11>                                                                     
-RA<1>                              11.0                                    
-RA<2>                                    11.0                              
-RA<3>                                          10.0                        
-RA<4>                                                11.0                  
-RA<5>                                                      11.0            
-RA<6>                                                            10.0      
-RA<7>                                                                  10.0
-RA<8>            11.0  11.0  11.0                                          
-RA<9>      10.0                                                            
-nBERR_FSB  11.0  11.0  11.0  11.0                                          
-nDinOE     10.0  10.0  10.0  10.0                                          
-nOE                                                                        
-nRAMLWE                                                                    
-nRAMUWE                                                                    
-nRAS             11.0  11.0  11.0                                          
-nROMCS     11.0  11.0  11.0  11.0                                          
-nROMWE                                                                     
-nVPA_FSB                                                                   
-
---------------------------------------------------------------------------------
-                            Pad to Pad (tPD) (nsec)
-
-\ From        A     S     S     n     n     n     n
- \            _     W     W     A     L     U     W
-  \           F     <     <     S     D     D     E
-   \          S     0     1     _     S     S     _
-    \         B     >     >     F     _     _     F
-     \        <                 S     F     F     S
-      \       9                 B     S     S     B
-       \      >                       B     B      
-        \                                          
-  To     \------------------------------------------
-
-CLK20EN          10.0                              
-CLK25EN          10.0                              
-RA<0>                                              
-RA<10>                                             
-RA<11>                                             
-RA<1>                                              
-RA<2>                                              
-RA<3>                                              
-RA<4>                                              
-RA<5>                                              
-RA<6>                                              
-RA<7>                                              
-RA<8>      11.0                                    
-RA<9>                                              
-nBERR_FSB                    10.0                  
-nDinOE                 10.0  10.0              10.0
-nOE                          10.0              10.0
-nRAMLWE                      10.0  10.0        10.0
-nRAMUWE                      11.0        11.0  11.0
-nRAS                         11.0                  
-nROMCS                 11.0                        
-nROMWE                       10.0              10.0
-nVPA_FSB                     10.0                  
-
---------------------------------------------------------------------------------
-                      Clock Pad to Output Pad (tCO) (nsec)
-
-\ From         C     C
- \             L     L
-  \            K     K
-   \           2     _
-    \          X     F
-     \         _     S
-      \        I     B
-       \       O      
-        \      B      
-         \            
-  To      \------------
-
-RA<0>             13.5
-RA<1>             14.5
-RA<2>             14.5
-RA<3>             13.5
-RA<4>             14.5
-RA<5>             14.5
-RA<6>             13.5
-RA<7>             13.5
-RA<8>             14.5
-RA<9>             13.5
-nADoutLE0   13.5  13.5
-nADoutLE1          5.8
-nAS_IOB     14.5      
-nAoutOE      5.8      
-nBERR_FSB         14.5
-nBR_IOB            5.8
-nCAS               5.8
-nDTACK_FSB         5.8
-nDinLE       5.8      
-nDoutOE      5.8      
-nLDS_IOB    14.5      
-nRAMLWE           13.5
-nRAMUWE           14.5
-nRAS              14.5
-nROMCS            14.5
-nUDS_IOB    14.5      
-nVMA_IOB    14.5      
-nVPA_FSB          13.5
-
---------------------------------------------------------------------------------
-                   Setup to Clock at Pad (tSU or tSUF) (nsec)
-
-\ From         C     C     C
- \             L     L     L
-  \            K     K     K
-   \           2     _     _
-    \          X     F     I
-     \         _     S     O
-      \        I     B     B
-       \       O            
-        \      B            
-         \                  
-  To      \------------------
-
-A_FSB<10>          7.9      
-A_FSB<11>          7.9      
-A_FSB<12>          7.9      
-A_FSB<13>          7.9      
-A_FSB<14>          7.9      
-A_FSB<15>          7.9      
-A_FSB<16>          7.9      
-A_FSB<17>          7.9      
-A_FSB<18>          7.9      
-A_FSB<19>          7.9      
-A_FSB<20>         15.6      
-A_FSB<21>         16.6      
-A_FSB<22>         16.6      
-A_FSB<23>         16.6      
-A_FSB<8>           7.9      
-A_FSB<9>           7.9      
-CLK_IOB      7.5            
-E_IOB                    6.5
-SW<1>              7.9      
-nAS_FSB           15.6      
-nBERR_IOB    7.5            
-nBG_IOB      6.5            
-nDTACK_IOB   6.5            
-nIPL2              6.5      
-nLDS_FSB           6.5      
-nRES         6.5   6.5      
-nUDS_FSB           6.5      
-nVPA_IOB     6.5            
-nWE_FSB            7.9      
-
---------------------------------------------------------------------------------
-                          Clock to Setup (tCYC) (nsec)
-                                (Clock: CLK_FSB)
-
-\ From                 B     I     I     I     R     R     R     R     R     T
- \                     E     O     P     P     E     E     E     E     e     i
-  \                    R     R     L     L     S     S     S     S     f     m
-   \                   R     W     2     2     D     r     r     r     A     e
-    \                  _     0     r     r     o     0     1     2     c     o
-     \                 I     .     0     1     n     .     .     .     k     u
-      \                O     Q     .     .     e     Q     Q     Q     .     t
-       \               B           Q     Q     .                       Q     A
-        \              S                       Q                             .
-         \             .                                                     Q
-          \            Q                                                      
-           \                                                                  
-            \                                                                 
-             \                                                                
-              \                                                               
-               \                                                              
-                \                                                             
-                 \                                                            
-  To              \------------------------------------------------------------
-
-ALE0S.D                                                                       
-BERR_IOBS.D         10.0                                                      
-IOL0.CE                                                                       
-IOL0.D                                                                        
-IOREQ.D                                                                       
-IORW0.D                   11.4                                                
-IOU0.CE                                                                       
-IOU0.D                                                                        
-IPL2r1.D                        10.0                                          
-RESDone.CE                                        10.0  10.0  10.0            
-RESr1.D                                           10.0                        
-RESr2.D                                                 10.0                  
-RefAck.D                                                                      
-TimeoutA.D                                                                10.0
-TimeoutB.D                                                                    
-cnt/RefCnt<1>.D                                                               
-cnt/RefCnt<2>.D                                                               
-cnt/RefCnt<3>.D                                                               
-cnt/RefCnt<4>.D                                                               
-cnt/RefCnt<5>.D                                                               
-cnt/RefCnt<6>.D                                                               
-cnt/RefCnt<7>.D                                                               
-cnt/RefDone.D                                                       10.0      
-cnt/TimeoutBPre.D                                                             
-cs/nOverlay0.D                                                                
-cs/nOverlay1.CE                                                               
-cs/nOverlay1.D                                                                
-fsb/BERR0r.D                                                                  
-fsb/BERR1r.D        10.0                                                      
-fsb/Ready0r.D                                                                 
-fsb/Ready1r.D                                                                 
-fsb/Ready2r.D                                                             11.0
-fsb/VPA.D           11.4                                                  11.4
-iobs/Clear1.D                                                                 
-iobs/IOL1.CE                                                                  
-iobs/IORW1.D                                                                  
-iobs/IOReady.D                                                                
-iobs/IOU1.CE                                                                  
-iobs/Load1.D                                                                  
-iobs/Once.D                                                                   
-iobs/PS_FSM_FFd1.D                                                            
-iobs/PS_FSM_FFd2.D                                                            
-nADoutLE1.D                                                                   
-nBR_IOB.CE                      10.0  10.0  10.0  10.0  10.0  10.0            
-nCAS.D                                                                        
-nDTACK_FSB.D        11.4                                                  11.4
-ram/BACTr.D                                                                   
-ram/Once.D                                                                    
-ram/RAMDIS1.D                                                                 
-ram/RAMDIS2.D                                                                 
-ram/RAMReady.D                                                                
-ram/RASEL.D                                                                   
-ram/RS_FSM_FFd1.D                                                             
-ram/RS_FSM_FFd2.D                                                             
-ram/RS_FSM_FFd3.D                                                             
-
---------------------------------------------------------------------------------
-                          Clock to Setup (tCYC) (nsec)
-                                (Clock: CLK_FSB)
-
-\ From                 T     c     c     c     c     c     c     c     c     c
- \                     i     n     n     n     n     n     n     n     n     n
-  \                    m     t     t     t     t     t     t     t     t     t
-   \                   e     /     /     /     /     /     /     /     /     /
-    \                  o     R     R     R     R     R     R     R     R     R
-     \                 u     e     e     e     e     e     e     e     e     e
-      \                t     f     f     f     f     f     f     f     f     f
-       \               B     C     C     C     C     C     C     C     C     D
-        \              .     n     n     n     n     n     n     n     n     o
-         \             Q     t     t     t     t     t     t     t     t     n
-          \                  <     <     <     <     <     <     <     <     e
-           \                 0     1     2     3     4     5     6     7     .
-            \                >     >     >     >     >     >     >     >     Q
-             \               .     .     .     .     .     .     .     .      
-              \              Q     Q     Q     Q     Q     Q     Q     Q      
-               \                                                              
-                \                                                             
-                 \                                                            
-  To              \------------------------------------------------------------
-
-ALE0S.D                                                                       
-BERR_IOBS.D                                                                   
-IOL0.CE                                                                       
-IOL0.D                                                                        
-IOREQ.D                                                                       
-IORW0.D                                                                       
-IOU0.CE                                                                       
-IOU0.D                                                                        
-IPL2r1.D                                                                      
-RESDone.CE                                                                    
-RESr1.D                                                                       
-RESr2.D                                                                       
-RefAck.D                                                                      
-TimeoutA.D                10.0  10.0  10.0  10.0  10.0  10.0  10.0            
-TimeoutB.D          10.0  10.0  10.0  10.0  10.0  10.0  10.0  10.0  10.0      
-cnt/RefCnt<1>.D           10.0                                                
-cnt/RefCnt<2>.D           10.0  10.0                                          
-cnt/RefCnt<3>.D           10.0  10.0  10.0                                    
-cnt/RefCnt<4>.D           10.0  10.0  10.0  10.0                              
-cnt/RefCnt<5>.D           10.0  10.0  10.0  10.0  10.0                        
-cnt/RefCnt<6>.D           10.0  10.0  10.0  10.0  10.0  10.0                  
-cnt/RefCnt<7>.D           10.0  10.0  10.0  10.0  10.0  10.0  10.0            
-cnt/RefDone.D             10.0  10.0  10.0  10.0  10.0  10.0  10.0  10.0  10.0
-cnt/TimeoutBPre.D         10.0  10.0  10.0  10.0  10.0  10.0  10.0  10.0      
-cs/nOverlay0.D                                                                
-cs/nOverlay1.CE                                                               
-cs/nOverlay1.D                                                                
-fsb/BERR0r.D        10.0                                                      
-fsb/BERR1r.D                                                                  
-fsb/Ready0r.D                                                                 
-fsb/Ready1r.D                                                                 
-fsb/Ready2r.D                                                                 
-fsb/VPA.D           19.1                                                      
-iobs/Clear1.D                                                                 
-iobs/IOL1.CE                                                                  
-iobs/IORW1.D                                                                  
-iobs/IOReady.D                                                                
-iobs/IOU1.CE                                                                  
-iobs/Load1.D                                                                  
-iobs/Once.D                                                                   
-iobs/PS_FSM_FFd1.D                                                            
-iobs/PS_FSM_FFd2.D                                                            
-nADoutLE1.D                                                                   
-nBR_IOB.CE                                                                    
-nCAS.D                                                                        
-nDTACK_FSB.D        19.1                                                      
-ram/BACTr.D                                                                   
-ram/Once.D                                                                    
-ram/RAMDIS1.D                                           11.4  11.4  11.4  11.4
-ram/RAMDIS2.D                                           11.0  11.0  11.0  11.0
-ram/RAMReady.D                                          11.4  11.4  11.4  11.4
-ram/RASEL.D                                             11.4  11.4  11.4  11.4
-ram/RS_FSM_FFd1.D                                                             
-ram/RS_FSM_FFd2.D                                       11.4  11.4  11.4  11.4
-ram/RS_FSM_FFd3.D                                       11.0  11.0  11.0  11.0
-
---------------------------------------------------------------------------------
-                          Clock to Setup (tCYC) (nsec)
-                                (Clock: CLK_FSB)
-
-\ From                 c     c     c     f     f     f     f     f     f     f
- \                     n     s     s     s     s     s     s     s     s     s
-  \                    t     /     /     b     b     b     b     b     b     b
-   \                   /     n     n     /     /     /     /     /     /     /
-    \                  T     O     O     A     B     B     R     R     R     V
-     \                 i     v     v     S     E     E     e     e     e     P
-      \                m     e     e     r     R     R     a     a     a     A
-       \               e     r     r     f     R     R     d     d     d     .
-        \              o     l     l     .     0     1     y     y     y     Q
-         \             u     a     a     Q     r     r     0     1     2      
-          \            t     y     y           .     .     r     r     r      
-           \           B     0     1           Q     Q     .     .     .      
-            \          P     .     .                       Q     Q     Q      
-             \         r     Q     Q                                          
-              \        e                                                      
-               \       .                                                      
-                \      Q                                                      
-                 \                                                            
-  To              \------------------------------------------------------------
-
-ALE0S.D                                                                       
-BERR_IOBS.D                           10.0                                    
-IOL0.CE                                                                       
-IOL0.D                                                                        
-IOREQ.D                         11.0  10.0                                    
-IORW0.D                         10.0  11.0                                    
-IOU0.CE                                                                       
-IOU0.D                                                                        
-IPL2r1.D                                                                      
-RESDone.CE                                                                    
-RESr1.D                                                                       
-RESr2.D                                                                       
-RefAck.D                                                                      
-TimeoutA.D                            10.0                                    
-TimeoutB.D          10.0              10.0                                    
-cnt/RefCnt<1>.D                                                               
-cnt/RefCnt<2>.D                                                               
-cnt/RefCnt<3>.D                                                               
-cnt/RefCnt<4>.D                                                               
-cnt/RefCnt<5>.D                                                               
-cnt/RefCnt<6>.D                                                               
-cnt/RefCnt<7>.D                                                               
-cnt/RefDone.D                                                                 
-cnt/TimeoutBPre.D   10.0              10.0                                    
-cs/nOverlay0.D            10.0        10.0                                    
-cs/nOverlay1.CE                       10.0                                    
-cs/nOverlay1.D            10.0                                                
-fsb/BERR0r.D                          10.0  10.0                              
-fsb/BERR1r.D                          10.0        10.0                        
-fsb/Ready0r.D                   10.0  10.0              10.0                  
-fsb/Ready1r.D                   11.0  10.0                    11.0            
-fsb/Ready2r.D                   11.0  11.0                          11.0      
-fsb/VPA.D                       20.1  19.1  11.4  11.4  20.1  11.4  11.4  11.4
-iobs/Clear1.D                                                                 
-iobs/IOL1.CE                                                                  
-iobs/IORW1.D                    11.4  11.0                                    
-iobs/IOReady.D                        10.0                                    
-iobs/IOU1.CE                                                                  
-iobs/Load1.D                    11.0  10.0                                    
-iobs/Once.D                     11.4  10.0                                    
-iobs/PS_FSM_FFd1.D                                                            
-iobs/PS_FSM_FFd2.D              11.0  10.0                                    
-nADoutLE1.D                                                                   
-nBR_IOB.CE                                                                    
-nCAS.D                                                                        
-nDTACK_FSB.D                    20.1  11.0  11.4  11.4  20.1  11.4  11.4      
-ram/BACTr.D                           10.0                                    
-ram/Once.D                      10.0  10.0                                    
-ram/RAMDIS1.D                   11.4  11.0                                    
-ram/RAMDIS2.D                   11.0  11.0                                    
-ram/RAMReady.D                  11.0  11.0                                    
-ram/RASEL.D                     11.4  11.4                                    
-ram/RS_FSM_FFd1.D               10.0  10.0                                    
-ram/RS_FSM_FFd2.D               11.4  11.4                                    
-ram/RS_FSM_FFd3.D               11.0  11.0                                    
-
---------------------------------------------------------------------------------
-                          Clock to Setup (tCYC) (nsec)
-                                (Clock: CLK_FSB)
-
-\ From                 i     i     i     i     i     i     i     i     i     i
- \                     o     o     o     o     o     o     o     o     o     o
-  \                    b     b     b     b     b     b     b     b     b     b
-   \                   s     s     s     s     s     s     s     s     s     s
-    \                  /     /     /     /     /     /     /     /     /     /
-     \                 C     I     I     I     I     I     L     O     P     P
-      \                l     O     O     O     O     O     o     n     S     S
-       \               e     A     L     R     R     U     a     c     _     _
-        \              a     C     1     W     e     1     d     e     F     F
-         \             r     T     .     1     a     .     1     .     S     S
-          \            1     r     Q     .     d     Q     .     Q     M     M
-           \           .     .           Q     y           Q           _     _
-            \          Q     Q                 .                       F     F
-             \                                 Q                       F     F
-              \                                                        d     d
-               \                                                       1     2
-                \                                                      .     .
-                 \                                                     Q     Q
-  To              \------------------------------------------------------------
-
-ALE0S.D                                                             10.0  10.0
-BERR_IOBS.D               10.0                                10.0        10.0
-IOL0.CE                                                             10.0  10.0
-IOL0.D                          10.0                                          
-IOREQ.D                   10.0                                10.0  10.0  11.0
-IORW0.D                               11.0                    11.4  11.4  11.4
-IOU0.CE                                                             10.0  10.0
-IOU0.D                                            10.0                        
-IPL2r1.D                                                                      
-RESDone.CE                                                                    
-RESr1.D                                                                       
-RESr2.D                                                                       
-RefAck.D                                                                      
-TimeoutA.D                                                                    
-TimeoutB.D                                                                    
-cnt/RefCnt<1>.D                                                               
-cnt/RefCnt<2>.D                                                               
-cnt/RefCnt<3>.D                                                               
-cnt/RefCnt<4>.D                                                               
-cnt/RefCnt<5>.D                                                               
-cnt/RefCnt<6>.D                                                               
-cnt/RefCnt<7>.D                                                               
-cnt/RefDone.D                                                                 
-cnt/TimeoutBPre.D                                                             
-cs/nOverlay0.D                                                                
-cs/nOverlay1.CE                                                               
-cs/nOverlay1.D                                                                
-fsb/BERR0r.D                                                                  
-fsb/BERR1r.D                                                                  
-fsb/Ready0r.D                                                                 
-fsb/Ready1r.D                               11.0                              
-fsb/Ready2r.D                                                                 
-fsb/VPA.D                                   11.4                              
-iobs/Clear1.D                                                       10.0  10.0
-iobs/IOL1.CE                                            10.0                  
-iobs/IORW1.D                          10.0                    10.0  11.0  11.0
-iobs/IOReady.D            10.0              10.0              10.0        10.0
-iobs/IOU1.CE                                            10.0                  
-iobs/Load1.D                                                  10.0  10.0  10.0
-iobs/Once.D                                                   11.4  11.0  10.0
-iobs/PS_FSM_FFd1.D        10.0                                      10.0  10.0
-iobs/PS_FSM_FFd2.D        10.0                                10.0  11.0  11.0
-nADoutLE1.D         10.0                                10.0                  
-nBR_IOB.CE                                                                    
-nCAS.D                                                                        
-nDTACK_FSB.D                                11.4                              
-ram/BACTr.D                                                                   
-ram/Once.D                                                                    
-ram/RAMDIS1.D                                                                 
-ram/RAMDIS2.D                                                                 
-ram/RAMReady.D                                                                
-ram/RASEL.D                                                                   
-ram/RS_FSM_FFd1.D                                                             
-ram/RS_FSM_FFd2.D                                                             
-ram/RS_FSM_FFd3.D                                                             
-
---------------------------------------------------------------------------------
-                          Clock to Setup (tCYC) (nsec)
-                                (Clock: CLK_FSB)
-
-\ From                 n     n     n     r     r     r     r     r     r     r
- \                     A     B     D     a     a     a     a     a     a     a
-  \                    D     R     T     m     m     m     m     m     m     m
-   \                   o     _     A     /     /     /     /     /     /     /
-    \                  u     I     C     B     O     R     R     R     R     R
-     \                 t     O     K     A     n     A     A     A     S     S
-      \                L     B     _     C     c     M     M     S     _     _
-       \               E     .     F     T     e     D     R     E     F     F
-        \              1     Q     S     r     .     I     e     L     S     S
-         \             .           B     .     Q     S     a     .     M     M
-          \            Q           .     Q           2     d     Q     _     _
-           \                       Q                 .     y           F     F
-            \                                        Q     .           F     F
-             \                                             Q           d     d
-              \                                                        1     2
-               \                                                       .     .
-                \                                                      Q     Q
-                 \                                                            
-  To              \------------------------------------------------------------
-
-ALE0S.D                                                                       
-BERR_IOBS.D         10.0                                                      
-IOL0.CE                                                                       
-IOL0.D              10.0                                                      
-IOREQ.D             11.0                                                      
-IORW0.D             11.4                                                      
-IOU0.CE                                                                       
-IOU0.D              10.0                                                      
-IPL2r1.D                                                                      
-RESDone.CE                                                                    
-RESr1.D                                                                       
-RESr2.D                                                                       
-RefAck.D                                                            10.0  10.0
-TimeoutA.D                                                                    
-TimeoutB.D                                                                    
-cnt/RefCnt<1>.D                                                               
-cnt/RefCnt<2>.D                                                               
-cnt/RefCnt<3>.D                                                               
-cnt/RefCnt<4>.D                                                               
-cnt/RefCnt<5>.D                                                               
-cnt/RefCnt<6>.D                                                               
-cnt/RefCnt<7>.D                                                               
-cnt/RefDone.D                                                                 
-cnt/TimeoutBPre.D                                                             
-cs/nOverlay0.D                                                                
-cs/nOverlay1.CE                                                               
-cs/nOverlay1.D                                                                
-fsb/BERR0r.D                                                                  
-fsb/BERR1r.D                                                                  
-fsb/Ready0r.D                                           10.0                  
-fsb/Ready1r.D       11.0                                                      
-fsb/Ready2r.D                                                                 
-fsb/VPA.D           11.0  11.4                          20.1                  
-iobs/Clear1.D       10.0                                                      
-iobs/IOL1.CE                                                                  
-iobs/IORW1.D        10.0                                                      
-iobs/IOReady.D      10.0                                                      
-iobs/IOU1.CE                                                                  
-iobs/Load1.D        10.0                                                      
-iobs/Once.D         11.0                                                      
-iobs/PS_FSM_FFd1.D                                                            
-iobs/PS_FSM_FFd2.D  11.0                                                      
-nADoutLE1.D         10.0                                                      
-nBR_IOB.CE                                                                    
-nCAS.D                                                        10.0            
-nDTACK_FSB.D        11.0  11.4  11.4                    20.1                  
-ram/BACTr.D                                                                   
-ram/Once.D                                  10.0                    10.0  10.0
-ram/RAMDIS1.D                         11.0  11.0                    11.4  11.0
-ram/RAMDIS2.D                               11.0  11.0              11.0  11.0
-ram/RAMReady.D                        11.0  11.0                    11.0  11.0
-ram/RASEL.D                           11.0  11.4                    11.4  11.4
-ram/RS_FSM_FFd1.D                           10.0                    10.0  10.0
-ram/RS_FSM_FFd2.D                     11.0                          11.4  11.4
-ram/RS_FSM_FFd3.D                           10.0                    11.0  11.0
-
---------------------------------------------------------------------------------
-                          Clock to Setup (tCYC) (nsec)
-                                (Clock: CLK_FSB)
-
-\ From                 r
- \                     a
-  \                    m
-   \                   /
-    \                  R
-     \                 S
-      \                _
-       \               F
-        \              S
-         \             M
-          \            _
-           \           F
-            \          F
-             \         d
-              \        3
-               \       .
-                \      Q
-                 \      
-  To              \------
-
-ALE0S.D                 
-BERR_IOBS.D             
-IOL0.CE                 
-IOL0.D                  
-IOREQ.D                 
-IORW0.D                 
-IOU0.CE                 
-IOU0.D                  
-IPL2r1.D                
-RESDone.CE              
-RESr1.D                 
-RESr2.D                 
-RefAck.D                
-TimeoutA.D              
-TimeoutB.D              
-cnt/RefCnt<1>.D         
-cnt/RefCnt<2>.D         
-cnt/RefCnt<3>.D         
-cnt/RefCnt<4>.D         
-cnt/RefCnt<5>.D         
-cnt/RefCnt<6>.D         
-cnt/RefCnt<7>.D         
-cnt/RefDone.D           
-cnt/TimeoutBPre.D       
-cs/nOverlay0.D          
-cs/nOverlay1.CE         
-cs/nOverlay1.D          
-fsb/BERR0r.D            
-fsb/BERR1r.D            
-fsb/Ready0r.D           
-fsb/Ready1r.D           
-fsb/Ready2r.D           
-fsb/VPA.D               
-iobs/Clear1.D           
-iobs/IOL1.CE            
-iobs/IORW1.D            
-iobs/IOReady.D          
-iobs/IOU1.CE            
-iobs/Load1.D            
-iobs/Once.D             
-iobs/PS_FSM_FFd1.D      
-iobs/PS_FSM_FFd2.D      
-nADoutLE1.D             
-nBR_IOB.CE              
-nCAS.D                  
-nDTACK_FSB.D            
-ram/BACTr.D             
-ram/Once.D          10.0
-ram/RAMDIS1.D       11.0
-ram/RAMDIS2.D       11.0
-ram/RAMReady.D      11.0
-ram/RASEL.D         11.0
-ram/RS_FSM_FFd1.D   10.0
-ram/RS_FSM_FFd2.D   11.4
-ram/RS_FSM_FFd3.D   11.0
-
---------------------------------------------------------------------------------
-                          Clock to Setup (tCYC) (nsec)
-                               (Clock: CLK2X_IOB)
-
-\ From                  I     I     i     i     i     i     i     i     i     i
- \                      O     O     o     o     o     o     o     o     o     o
-  \                     A     B     b     b     b     b     b     b     b     b
-   \                    C     E     m     m     m     m     m     m     m     m
-    \                   T     R     /     /     /     /     /     /     /     /
-     \                  .     R     B     B     B     B     D     D     E     E
-      \                 Q     .     E     E     G     G     T     T     S     S
-       \                      Q     R     R     r     r     A     A     <     <
-        \                           R     R     0     1     C     C     0     1
-         \                          r     r     .     .     K     K     >     >
-          \                         f     r     Q     Q     r     r     .     .
-           \                        .     .                 f     r     Q     Q
-            \                       Q     Q                 .     .            
-             \                                              Q     Q            
-              \                                                                
-               \                                                               
-                \                                                              
-                 \                                                             
-                  \                                                            
-  To               \------------------------------------------------------------
-
-ALE0M.D                                                                        
-IOACT.D                          10.0  10.0              11.0  11.0            
-IOBERR.D                   11.0  11.0  11.0              11.0  11.0            
-iobm/BGr1.D                                  10.0                              
-iobm/ES<0>.D                                                         10.0  10.0
-iobm/ES<1>.D                                                         10.0  10.0
-iobm/ES<2>.D                                                         10.0  10.0
-iobm/ES<3>.D                                                         10.0  10.0
-iobm/ES<4>.D                                                         10.0  10.0
-iobm/ETACK.D                                                         10.0  10.0
-iobm/IOS_FSM_FFd1.D                                                            
-iobm/IOS_FSM_FFd2.D              10.0  10.0              10.0  10.0            
-iobm/IOS_FSM_FFd3.D                                                            
-nAS_IOB.D                                                                      
-nAoutOE.D                                    10.0  10.0                        
-nDinLE.D                                                                       
-nDoutOE.D                                                                      
-nLDS_IOB.D                                                                     
-nUDS_IOB.D                                                                     
-nVMA_IOB.D           10.0                                            10.0  10.0
-
---------------------------------------------------------------------------------
-                          Clock to Setup (tCYC) (nsec)
-                               (Clock: CLK2X_IOB)
-
-\ From                  i     i     i     i     i     i     i     i     i     i
- \                      o     o     o     o     o     o     o     o     o     o
-  \                     b     b     b     b     b     b     b     b     b     b
-   \                    m     m     m     m     m     m     m     m     m     m
-    \                   /     /     /     /     /     /     /     /     /     /
-     \                  E     E     E     E     E     I     I     I     I     R
-      \                 S     S     S     T     r     O     O     O     O     E
-       \                <     <     <     A     2     R     S     S     S     S
-        \               2     3     4     C     .     E     _     _     _     r
-         \              >     >     >     K     Q     Q     F     F     F     f
-          \             .     .     .     .           r     S     S     S     .
-           \            Q     Q     Q     Q           .     M     M     M     Q
-            \                                         Q     _     _     _      
-             \                                              F     F     F      
-              \                                             F     F     F      
-               \                                            d     d     d      
-                \                                           1     2     3      
-                 \                                          .     .     .      
-                  \                                         Q     Q     Q      
-  To               \------------------------------------------------------------
-
-ALE0M.D                                            10.0  10.0  10.0  10.0      
-IOACT.D                                10.0        10.0  11.0  10.0  11.0  11.0
-IOBERR.D                               10.0              11.0  11.0  11.0  11.0
-iobm/BGr1.D                                                                    
-iobm/ES<0>.D         10.0  10.0  10.0        10.0                              
-iobm/ES<1>.D                                 10.0                              
-iobm/ES<2>.D         10.0  10.0  10.0        10.0                              
-iobm/ES<3>.D         10.0  10.0              10.0                              
-iobm/ES<4>.D         10.0  10.0  10.0        10.0                              
-iobm/ETACK.D         10.0  10.0  10.0                                          
-iobm/IOS_FSM_FFd1.D                                      10.0  10.0  10.0      
-iobm/IOS_FSM_FFd2.D                    10.0              10.0  10.0  10.0  10.0
-iobm/IOS_FSM_FFd3.D                                10.0  10.0  10.0  10.0      
-nAS_IOB.D                                                10.0  10.0  10.0      
-nAoutOE.D                                                                      
-nDinLE.D                                                 10.0  10.0            
-nDoutOE.D                                                      10.0  10.0      
-nLDS_IOB.D                                               10.0  10.0  10.0      
-nUDS_IOB.D                                               10.0  10.0  10.0      
-nVMA_IOB.D           10.0  10.0  10.0                                          
-
---------------------------------------------------------------------------------
-                          Clock to Setup (tCYC) (nsec)
-                               (Clock: CLK2X_IOB)
-
-\ From                  i     i     i     n     n     n
- \                      o     o     o     A     A     V
-  \                     b     b     b     S     o     M
-   \                    m     m     m     _     u     A
-    \                   /     /     /     I     t     _
-     \                  R     V     V     O     O     I
-      \                 E     P     P     B     E     O
-       \                S     A     A     .     .     B
-        \               r     r     r     Q     Q     .
-         \              r     f     r                 Q
-          \             .     .     .                  
-           \            Q     Q     Q                  
-            \                                          
-             \                                         
-              \                                        
-               \                                       
-                \                                      
-                 \                                     
-                  \                                    
-  To               \------------------------------------
-
-ALE0M.D                                      10.0      
-IOACT.D              11.0                    10.0      
-IOBERR.D             11.0                              
-iobm/BGr1.D                                            
-iobm/ES<0>.D                                           
-iobm/ES<1>.D                                           
-iobm/ES<2>.D                                           
-iobm/ES<3>.D                                           
-iobm/ES<4>.D                                           
-iobm/ETACK.D                                       10.0
-iobm/IOS_FSM_FFd1.D                                    
-iobm/IOS_FSM_FFd2.D  10.0                              
-iobm/IOS_FSM_FFd3.D                          10.0      
-nAS_IOB.D                                              
-nAoutOE.D                              10.0  10.0      
-nDinLE.D                                               
-nDoutOE.D                                              
-nLDS_IOB.D                                             
-nUDS_IOB.D                                             
-nVMA_IOB.D                 10.0  10.0              10.0
-
-Path Type Definition: 
-
-Pad to Pad (tPD) -                        Reports pad to pad paths that start 
-                                          at input pads and end at output pads. 
-                                          Paths are not traced through 
-                                          registers. 
-
-Clock Pad to Output Pad (tCO) -           Reports paths that start at input 
-                                          pads trace through clock inputs of 
-                                          registers and end at output pads. 
-                                          Paths are not traced through PRE/CLR 
-                                          inputs of registers. 
-
-Setup to Clock at Pad (tSU or tSUF) -     Reports external setup time of data 
-                                          to clock at pad. Data path starts at 
-                                          an input pad and ends at register 
-                                          (Fast Input Register for tSUF) D/T 
-                                          input. Clock path starts at input pad 
-                                          and ends at the register clock input. 
-                                          Paths are not traced through 
-                                          registers. Pin-to-pin setup 
-                                          requirement is not reported or 
-                                          guaranteed for product-term clocks 
-                                          derived from macrocell feedback 
-                                          signals. 
-
-Clock to Setup (tCYC) -                   Register to register cycle time. 
-                                          Include source register tCO and 
-                                          destination register tSU. Note that 
-                                          when the computed Maximum Clock Speed 
-                                          is limited by tCYC it is computed 
-                                          assuming that all registers are 
-                                          rising-edge sensitive. 
-
diff --git a/cpld/XC95144XL/WarpSE_html/tim/timing_report.htm b/cpld/XC95144XL/WarpSE_html/tim/timing_report.htm index bcf71ad..b19a2f4 100644 --- a/cpld/XC95144XL/WarpSE_html/tim/timing_report.htm +++ b/cpld/XC95144XL/WarpSE_html/tim/timing_report.htm @@ -27,7 +27,7 @@ - @@ -38,20 +38,31 @@
XC95144XL, -10 (3.0)
Date Created Sat Mar 25 00:05:47 2023 + Date Created Sun Mar 26 03:18:38 2023

Summary

+ + + + + + + + + + +
Notes and Warnings
Note: This design contains no timing constraints.
Note: A default set of constraints using a delay of 0.000ns will be used for analysis.

- + - + - + @@ -81,4670 +92,100 @@ - - - - + + + + - - - - + + + + - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Performance Summary
Min. Clock Period14.000 ns.11.400 ns.
Max. Clock Frequency (fSYSTEM)71.429 MHz. 87.719 MHz.
Limited by Clock Pulse Width for ELimited by Cycle Time for FCLK
Clock to Setup (tCYC)Paths Failing
TS_CLK_IOB142.810.0136TS10000.00.00 0
TS_CLK_FSB40.011.4164TS10010.00.00 0
TS_CLK2X_IOB66.611.0100TS10020.00.0 00
AUTO_TS_F2F0.011.4476476
AUTO_TS_P2P0.014.57070
AUTO_TS_P2F0.09.7179179
AUTO_TS_F2P0.012.73333


- -

Constraint: TS_CLK_IOB

+ +

Constraint: TS1000

- + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Description: PERIOD:CLK_IOB:142.857nS:HIGH:71.428nSDescription: PERIOD:PERIOD_C8M:0.000 nS
Path Requirement (ns) Delay (ns) Slack (ns)
cnt/IPL2r.Q to cnt/PORS_FSM_FFd1.D142.80010.000132.800
cnt/IPL2r.Q to nBR_IOB.D142.80010.000132.800
cnt/LTimer<0>.Q to cnt/LTimer<0>.D142.80010.000132.800
cnt/LTimer<0>.Q to cnt/LTimer<10>.D142.80010.000132.800
cnt/LTimer<0>.Q to cnt/LTimer<11>.D142.80010.000132.800
cnt/LTimer<0>.Q to cnt/LTimer<12>.D142.80010.000132.800
cnt/LTimer<0>.Q to cnt/LTimer<13>.D142.80010.000132.800
cnt/LTimer<0>.Q to cnt/LTimer<1>.D142.80010.000132.800
cnt/LTimer<0>.Q to cnt/LTimer<2>.D142.80010.000132.800
cnt/LTimer<0>.Q to cnt/LTimer<3>.D142.80010.000132.800
cnt/LTimer<0>.Q to cnt/LTimer<4>.D142.80010.000132.800
cnt/LTimer<0>.Q to cnt/LTimer<5>.D142.80010.000132.800
cnt/LTimer<0>.Q to cnt/LTimer<6>.D142.80010.000132.800
cnt/LTimer<0>.Q to cnt/LTimer<7>.D142.80010.000132.800
cnt/LTimer<0>.Q to cnt/LTimer<8>.D142.80010.000132.800
cnt/LTimer<0>.Q to cnt/LTimer<9>.D142.80010.000132.800
cnt/LTimer<10>.Q to cnt/LTimer<10>.D142.80010.000132.800
cnt/LTimer<10>.Q to cnt/LTimer<11>.D142.80010.000132.800
cnt/LTimer<10>.Q to cnt/LTimer<12>.D142.80010.000132.800
cnt/LTimer<10>.Q to cnt/LTimer<13>.D142.80010.000132.800
cnt/LTimer<11>.Q to cnt/LTimer<11>.D142.80010.000132.800
cnt/LTimer<11>.Q to cnt/LTimer<12>.D142.80010.000132.800
cnt/LTimer<11>.Q to cnt/LTimer<13>.D142.80010.000132.800
cnt/LTimer<12>.Q to cnt/LTimer<12>.D142.80010.000132.800
cnt/LTimer<12>.Q to cnt/LTimer<13>.D142.80010.000132.800
cnt/LTimer<13>.Q to cnt/LTimer<0>.D142.80010.000132.800
cnt/LTimer<13>.Q to cnt/LTimer<10>.D142.80010.000132.800
cnt/LTimer<13>.Q to cnt/LTimer<11>.D142.80010.000132.800
cnt/LTimer<13>.Q to cnt/LTimer<12>.D142.80010.000132.800
cnt/LTimer<13>.Q to cnt/LTimer<13>.D142.80010.000132.800
cnt/LTimer<13>.Q to cnt/LTimer<1>.D142.80010.000132.800
cnt/LTimer<13>.Q to cnt/LTimer<2>.D142.80010.000132.800
cnt/LTimer<13>.Q to cnt/LTimer<3>.D142.80010.000132.800
cnt/LTimer<13>.Q to cnt/LTimer<4>.D142.80010.000132.800
cnt/LTimer<13>.Q to cnt/LTimer<5>.D142.80010.000132.800
cnt/LTimer<13>.Q to cnt/LTimer<6>.D142.80010.000132.800
cnt/LTimer<13>.Q to cnt/LTimer<7>.D142.80010.000132.800
cnt/LTimer<13>.Q to cnt/LTimer<8>.D142.80010.000132.800
cnt/LTimer<13>.Q to cnt/LTimer<9>.D142.80010.000132.800
cnt/LTimer<13>.Q to cnt/PORS_FSM_FFd1.D142.80010.000132.800
cnt/LTimer<13>.Q to cnt/PORS_FSM_FFd2.D142.80010.000132.800
cnt/LTimer<13>.Q to cnt/nRESout.D142.80010.000132.800
cnt/LTimer<1>.Q to cnt/LTimer<10>.D142.80010.000132.800
cnt/LTimer<1>.Q to cnt/LTimer<11>.D142.80010.000132.800
cnt/LTimer<1>.Q to cnt/LTimer<12>.D142.80010.000132.800
cnt/LTimer<1>.Q to cnt/LTimer<13>.D142.80010.000132.800
cnt/LTimer<1>.Q to cnt/LTimer<1>.D142.80010.000132.800
cnt/LTimer<1>.Q to cnt/LTimer<2>.D142.80010.000132.800
cnt/LTimer<1>.Q to cnt/LTimer<3>.D142.80010.000132.800
cnt/LTimer<1>.Q to cnt/LTimer<4>.D142.80010.000132.800
cnt/LTimer<1>.Q to cnt/LTimer<5>.D142.80010.000132.800
cnt/LTimer<1>.Q to cnt/LTimer<6>.D142.80010.000132.800
cnt/LTimer<1>.Q to cnt/LTimer<7>.D142.80010.000132.800
cnt/LTimer<1>.Q to cnt/LTimer<8>.D142.80010.000132.800
cnt/LTimer<1>.Q to cnt/LTimer<9>.D142.80010.000132.800
cnt/LTimer<2>.Q to cnt/LTimer<10>.D142.80010.000132.800
cnt/LTimer<2>.Q to cnt/LTimer<11>.D142.80010.000132.800
cnt/LTimer<2>.Q to cnt/LTimer<12>.D142.80010.000132.800
cnt/LTimer<2>.Q to cnt/LTimer<13>.D142.80010.000132.800
cnt/LTimer<2>.Q to cnt/LTimer<2>.D142.80010.000132.800
cnt/LTimer<2>.Q to cnt/LTimer<3>.D142.80010.000132.800
cnt/LTimer<2>.Q to cnt/LTimer<4>.D142.80010.000132.800
cnt/LTimer<2>.Q to cnt/LTimer<5>.D142.80010.000132.800
cnt/LTimer<2>.Q to cnt/LTimer<6>.D142.80010.000132.800
cnt/LTimer<2>.Q to cnt/LTimer<7>.D142.80010.000132.800
cnt/LTimer<2>.Q to cnt/LTimer<8>.D142.80010.000132.800
cnt/LTimer<2>.Q to cnt/LTimer<9>.D142.80010.000132.800
cnt/LTimer<3>.Q to cnt/LTimer<10>.D142.80010.000132.800
cnt/LTimer<3>.Q to cnt/LTimer<11>.D142.80010.000132.800
cnt/LTimer<3>.Q to cnt/LTimer<12>.D142.80010.000132.800
cnt/LTimer<3>.Q to cnt/LTimer<13>.D142.80010.000132.800
cnt/LTimer<3>.Q to cnt/LTimer<3>.D142.80010.000132.800
cnt/LTimer<3>.Q to cnt/LTimer<4>.D142.80010.000132.800
cnt/LTimer<3>.Q to cnt/LTimer<5>.D142.80010.000132.800
cnt/LTimer<3>.Q to cnt/LTimer<6>.D142.80010.000132.800
cnt/LTimer<3>.Q to cnt/LTimer<7>.D142.80010.000132.800
cnt/LTimer<3>.Q to cnt/LTimer<8>.D142.80010.000132.800
cnt/LTimer<3>.Q to cnt/LTimer<9>.D142.80010.000132.800
cnt/LTimer<4>.Q to cnt/LTimer<10>.D142.80010.000132.800
cnt/LTimer<4>.Q to cnt/LTimer<11>.D142.80010.000132.800
cnt/LTimer<4>.Q to cnt/LTimer<12>.D142.80010.000132.800
cnt/LTimer<4>.Q to cnt/LTimer<13>.D142.80010.000132.800
cnt/LTimer<4>.Q to cnt/LTimer<4>.D142.80010.000132.800
cnt/LTimer<4>.Q to cnt/LTimer<5>.D142.80010.000132.800
cnt/LTimer<4>.Q to cnt/LTimer<6>.D142.80010.000132.800
cnt/LTimer<4>.Q to cnt/LTimer<7>.D142.80010.000132.800
cnt/LTimer<4>.Q to cnt/LTimer<8>.D142.80010.000132.800
cnt/LTimer<4>.Q to cnt/LTimer<9>.D142.80010.000132.800
cnt/LTimer<5>.Q to cnt/LTimer<10>.D142.80010.000132.800
cnt/LTimer<5>.Q to cnt/LTimer<11>.D142.80010.000132.800
cnt/LTimer<5>.Q to cnt/LTimer<12>.D142.80010.000132.800
cnt/LTimer<5>.Q to cnt/LTimer<13>.D142.80010.000132.800
cnt/LTimer<5>.Q to cnt/LTimer<5>.D142.80010.000132.800
cnt/LTimer<5>.Q to cnt/LTimer<6>.D142.80010.000132.800
cnt/LTimer<5>.Q to cnt/LTimer<7>.D142.80010.000132.800
cnt/LTimer<5>.Q to cnt/LTimer<8>.D142.80010.000132.800
cnt/LTimer<5>.Q to cnt/LTimer<9>.D142.80010.000132.800
cnt/LTimer<6>.Q to cnt/LTimer<10>.D142.80010.000132.800
cnt/LTimer<6>.Q to cnt/LTimer<11>.D142.80010.000132.800
cnt/LTimer<6>.Q to cnt/LTimer<12>.D142.80010.000132.800
cnt/LTimer<6>.Q to cnt/LTimer<13>.D142.80010.000132.800
cnt/LTimer<6>.Q to cnt/LTimer<6>.D142.80010.000132.800
cnt/LTimer<6>.Q to cnt/LTimer<7>.D142.80010.000132.800
cnt/LTimer<6>.Q to cnt/LTimer<8>.D142.80010.000132.800
cnt/LTimer<6>.Q to cnt/LTimer<9>.D142.80010.000132.800
cnt/LTimer<7>.Q to cnt/LTimer<10>.D142.80010.000132.800
cnt/LTimer<7>.Q to cnt/LTimer<11>.D142.80010.000132.800
cnt/LTimer<7>.Q to cnt/LTimer<12>.D142.80010.000132.800
cnt/LTimer<7>.Q to cnt/LTimer<13>.D142.80010.000132.800
cnt/LTimer<7>.Q to cnt/LTimer<7>.D142.80010.000132.800
cnt/LTimer<7>.Q to cnt/LTimer<8>.D142.80010.000132.800
cnt/LTimer<7>.Q to cnt/LTimer<9>.D142.80010.000132.800
cnt/LTimer<8>.Q to cnt/LTimer<10>.D142.80010.000132.800
cnt/LTimer<8>.Q to cnt/LTimer<11>.D142.80010.000132.800
cnt/LTimer<8>.Q to cnt/LTimer<12>.D142.80010.000132.800
cnt/LTimer<8>.Q to cnt/LTimer<13>.D142.80010.000132.800
cnt/LTimer<8>.Q to cnt/LTimer<8>.D142.80010.000132.800
cnt/LTimer<8>.Q to cnt/LTimer<9>.D142.80010.000132.800
cnt/LTimer<9>.Q to cnt/LTimer<10>.D142.80010.000132.800
cnt/LTimer<9>.Q to cnt/LTimer<11>.D142.80010.000132.800
cnt/LTimer<9>.Q to cnt/LTimer<12>.D142.80010.000132.800
cnt/LTimer<9>.Q to cnt/LTimer<13>.D142.80010.000132.800
cnt/LTimer<9>.Q to cnt/LTimer<9>.D142.80010.000132.800
cnt/PORS_FSM_FFd1.Q to cnt/PORS_FSM_FFd1.D142.80010.000132.800
cnt/PORS_FSM_FFd1.Q to cnt/PORS_FSM_FFd2.D142.80010.000132.800
cnt/PORS_FSM_FFd1.Q to cnt/nRESout.D142.80010.000132.800
cnt/PORS_FSM_FFd1.Q to nAoutOE.D142.80010.000132.800
cnt/PORS_FSM_FFd1.Q to nBR_IOB.D142.80010.000132.800
cnt/PORS_FSM_FFd2.Q to cnt/PORS_FSM_FFd1.D142.80010.000132.800
cnt/PORS_FSM_FFd2.Q to cnt/PORS_FSM_FFd2.D142.80010.000132.800
cnt/PORS_FSM_FFd2.Q to cnt/nRESout.D142.80010.000132.800
cnt/PORS_FSM_FFd2.Q to nAoutOE.D142.80010.000132.800
cnt/PORS_FSM_FFd2.Q to nBR_IOB.D142.80010.000132.800
cnt/nRESout.Q to cnt/nRESout.D142.80010.000132.800
nBR_IOB.Q to nAoutOE.D142.80010.000132.800
nBR_IOB.Q to nBR_IOB.D142.80010.000132.800

- -

Constraint: TS_CLK_FSB

+ +

Constraint: TS1001

- + + + + + + + +
Description: PERIOD:CLK_FSB:40.000nS:HIGH:20.000nSDescription: PERIOD:PERIOD_FCLK:0.000 nS
PathRequirement (ns)Delay (ns)Slack (ns)
+
+
+ +

Constraint: TS1002

+ + + + + + + + +
Description: PERIOD:PERIOD_C16M:0.000 nS
PathRequirement (ns)Delay (ns)Slack (ns)
+
+
+ +

Constraint: AUTO_TS_F2F

+ + @@ -4752,19 +193,19 @@ function TS_CLK_IOB_nBR_IOB_Q_to_nBR_IOB_D() { - - - - - + + + + + - - - - - + + + + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Description: MAXDELAY:FROM:FFS(*):TO:FFS(*):0.000 nS
Path Requirement (ns)Slack (ns)
cs/nOverlay1.Q to fsb/VPA.D40.00011.40028.600cs/nOverlay1.Q to IOREQ.D0.00011.400-11.400
cs/nOverlay1.Q to iobs/IORW0.D40.00011.40028.600cs/nOverlay1.Q to IORW0.D0.00011.400-11.400
cs/nOverlay1.Q to iobs/Once.D40.00011.40028.600
cs/nOverlay1.Q to ram/RAMReady.D40.00011.40028.600
cs/nOverlay1.Q to ram/RASEL.D40.00011.40028.600
fsb/ASrf.Q to fsb/VPA.D20.00011.4008.600
fsb/ASrf.Q to iobs/IORW0.D20.00011.4008.600
fsb/ASrf.Q to nDTACK_FSB.D20.00011.4008.600
fsb/ASrf.Q to ram/RASEL.D20.00011.4008.600
fsb/Ready1r.Q to fsb/VPA.D40.00011.40028.600
fsb/Ready1r.Q to nDTACK_FSB.D40.00011.40028.600
fsb/VPA.Q to fsb/VPA.D40.00011.40028.600
iobs/IORW0.Q to iobs/IORW0.D40.00011.40028.600
iobs/IOReady.Q to fsb/VPA.D40.00011.40028.600
iobs/IOReady.Q to nDTACK_FSB.D40.00011.40028.600
iobs/Once.Q to iobs/IORW0.D40.00011.40028.600
iobs/Once.Q to iobs/Once.D40.00011.40028.600
iobs/PS_FSM_FFd1.Q to iobs/IORW0.D40.00011.40028.600
iobs/PS_FSM_FFd2.Q to iobs/IOREQ.D40.00011.40028.600
iobs/PS_FSM_FFd2.Q to iobs/IORW0.D40.00011.40028.600
nADoutLE1.Q to fsb/VPA.D40.00011.40028.600
nADoutLE1.Q to iobs/IOREQ.D40.00011.40028.600
nADoutLE1.Q to iobs/IORW0.D40.00011.40028.600
nDTACK_FSB.Q to nDTACK_FSB.D40.00011.40028.600
ram/RAMEN.Q to ram/RAMReady.D40.00011.40028.600
ram/RAMEN.Q to ram/RASEL.D40.00011.40028.600
ram/RS_FSM_FFd2.Q to ram/RAMReady.D40.00011.40028.600
ram/RS_FSM_FFd2.Q to ram/RASEL.D40.00011.40028.600
ram/RS_FSM_FFd3.Q to ram/RAMReady.D40.00011.40028.600
ram/RS_FSM_FFd3.Q to ram/RASEL.D40.00011.40028.600
ram/RefReq.Q to ram/RAMReady.D40.00011.40028.600
ram/RefUrgent.Q to ram/RAMReady.D40.00011.40028.600
cs/nOverlay1.Q to fsb/Ready1r.D40.00011.00029.000
cs/nOverlay1.Q to iobs/IOREQ.D40.00011.00029.000
cs/nOverlay1.Q to iobs/IORW1.D40.00011.00029.000
cs/nOverlay1.Q to iobs/Load1.D40.00011.00029.000
cs/nOverlay1.Q to iobs/PS_FSM_FFd2.D40.00011.00029.000cs/nOverlay1.Q to iobs/PS_FSM_FFd2.D0.00011.400-11.400
cs/nOverlay1.Q to nDTACK_FSB.D40.00011.00029.000
cs/nOverlay1.Q to ram/RAMEN.D40.00011.00029.000
cs/nOverlay1.Q to ram/RS_FSM_FFd1.D40.00011.00029.000
cs/nOverlay1.Q to ram/RS_FSM_FFd2.D40.00011.00029.000
fsb/ASrf.Q to fsb/Ready0r.D20.00011.0009.000
fsb/ASrf.Q to iobs/IORW1.D20.00011.0009.000
fsb/ASrf.Q to iobs/IOReady.D20.00011.0009.000
fsb/ASrf.Q to ram/RAMEN.D20.00011.0009.000
fsb/ASrf.Q to ram/RS_FSM_FFd1.D20.00011.0009.000
fsb/ASrf.Q to ram/RS_FSM_FFd2.D20.00011.0009.000
fsb/ASrf.Q to ram/RS_FSM_FFd3.D20.00011.0009.000
fsb/Ready0r.Q to fsb/VPA.D40.00011.00029.000
fsb/Ready0r.Q to nDTACK_FSB.D40.00011.00029.000
fsb/Ready1r.Q to fsb/Ready1r.D40.00011.00029.000
iobs/IOACTr.Q to iobs/IOReady.D40.00011.00029.000
iobs/IORW1.Q to iobs/IORW1.D40.00011.00029.000
iobs/IOReady.Q to fsb/Ready1r.D40.00011.00029.000
iobs/IOReady.Q to iobs/IOReady.D40.00011.00029.000
iobs/Once.Q to iobs/IOReady.D40.00011.00029.000
iobs/PS_FSM_FFd1.Q to iobs/IORW1.D40.00011.00029.000
iobs/PS_FSM_FFd1.Q to iobs/Once.D40.00011.00029.000
iobs/PS_FSM_FFd1.Q to iobs/PS_FSM_FFd2.D40.00011.00029.000
iobs/PS_FSM_FFd2.Q to iobs/IORW1.D40.00011.00029.000
iobs/PS_FSM_FFd2.Q to iobs/IOReady.D40.00011.00029.000
iobs/PS_FSM_FFd2.Q to iobs/Once.D40.00011.00029.000
iobs/PS_FSM_FFd2.Q to iobs/PS_FSM_FFd2.D40.00011.00029.000
nADoutLE1.Q to fsb/Ready1r.D40.00011.00029.000
nADoutLE1.Q to iobs/IOReady.D40.00011.00029.000
nADoutLE1.Q to iobs/Once.D40.00011.00029.000
nADoutLE1.Q to iobs/PS_FSM_FFd2.D40.00011.00029.000
ram/BACTr.Q to ram/RAMReady.D40.00011.00029.000
ram/BACTr.Q to ram/RASEL.D40.00011.00029.000
ram/RAMEN.Q to ram/RAMEN.D40.00011.00029.000
ram/RAMEN.Q to ram/RS_FSM_FFd1.D40.00011.00029.000
ram/RAMReady.Q to fsb/VPA.D40.00011.00029.000
ram/RAMReady.Q to nDTACK_FSB.D40.00011.00029.000
ram/RS_FSM_FFd1.Q to ram/RAMEN.D40.00011.00029.000
ram/RS_FSM_FFd1.Q to ram/RS_FSM_FFd1.D40.00011.00029.000
ram/RS_FSM_FFd1.Q to ram/RS_FSM_FFd3.D40.00011.00029.000
ram/RS_FSM_FFd2.Q to ram/RS_FSM_FFd1.D40.00011.00029.000
ram/RS_FSM_FFd2.Q to ram/RS_FSM_FFd2.D40.00011.00029.000
ram/RS_FSM_FFd2.Q to ram/RS_FSM_FFd3.D40.00011.00029.000
ram/RS_FSM_FFd3.Q to ram/RS_FSM_FFd2.D40.00011.00029.000
ram/RS_FSM_FFd3.Q to ram/RS_FSM_FFd3.D40.00011.00029.000
ram/RefReq.Q to ram/RASEL.D40.00011.00029.000
ram/RefUrgent.Q to ram/RASEL.D40.00011.00029.000
ram/RefUrgent.Q to ram/RS_FSM_FFd1.D40.00011.00029.000
ram/RefUrgent.Q to ram/RS_FSM_FFd2.D40.00011.00029.000
ram/RefUrgent.Q to ram/RS_FSM_FFd3.D40.00011.00029.000
cs/nOverlay0.Q to cs/nOverlay0.D40.00010.00030.000
cs/nOverlay0.Q to cs/nOverlay1.D40.00010.00030.000
cs/nOverlay1.Q to fsb/Ready0r.D40.00010.00030.000
cs/nOverlay1.Q to ram/RS_FSM_FFd3.D40.00010.00030.000
fsb/ASrf.Q to cs/nOverlay0.D20.00010.00010.000
fsb/ASrf.Q to cs/nOverlay1.CE40.00010.00030.000
fsb/ASrf.Q to fsb/Ready1r.D20.00010.00010.000
fsb/ASrf.Q to iobs/IOREQ.D20.00010.00010.000
fsb/ASrf.Q to iobs/Load1.D20.00010.00010.000
fsb/ASrf.Q to iobs/Once.D20.00010.00010.000
fsb/ASrf.Q to iobs/PS_FSM_FFd2.D20.00010.00010.000
fsb/ASrf.Q to nBERR_FSB.D20.00010.00010.000
fsb/ASrf.Q to ram/BACTr.D20.00010.00010.000
fsb/ASrf.Q to ram/RAMReady.D20.00010.00010.000
fsb/Ready0r.Q to fsb/Ready0r.D40.00010.00030.000
iobs/Clear1.Q to nADoutLE1.D40.00010.00030.000
iobs/IOACTr.Q to iobs/IOREQ.D40.00010.00030.000
iobs/IOACTr.Q to iobs/PS_FSM_FFd1.D40.00010.00030.000
iobs/IOACTr.Q to iobs/PS_FSM_FFd2.D40.00010.00030.000
iobs/IOACTr.Q to nBERR_FSB.D40.00010.00030.000
iobs/IOL1.Q to iobs/IOL0.D40.00010.00030.000
iobs/IORW1.Q to iobs/IORW0.D40.00010.00030.000
iobs/IOU1.Q to iobs/IOU0.D40.00010.00030.000
iobs/Load1.Q to iobs/IOL1.CE40.00010.00030.000
iobs/Load1.Q to iobs/IOU1.CE40.00010.00030.000
iobs/Load1.Q to nADoutLE1.D40.00010.00030.000
iobs/Once.Q to iobs/IOREQ.D40.00010.00030.000
iobs/Once.Q to iobs/IORW1.D40.00010.00030.000
iobs/Once.Q to iobs/Load1.D40.00010.00030.000
iobs/Once.Q to iobs/PS_FSM_FFd2.D40.00010.00030.000
iobs/Once.Q to nBERR_FSB.D40.00010.00030.000
iobs/PS_FSM_FFd1.Q to iobs/ALE0.D40.00010.00030.000
iobs/PS_FSM_FFd1.Q to iobs/Clear1.D40.00010.00030.000
iobs/PS_FSM_FFd1.Q to iobs/IOL0.CE40.00010.00030.000
iobs/PS_FSM_FFd1.Q to iobs/IOREQ.D40.00010.00030.000
iobs/PS_FSM_FFd1.Q to iobs/IOU0.CE40.00010.00030.000
iobs/PS_FSM_FFd1.Q to iobs/Load1.D40.00010.00030.000
iobs/PS_FSM_FFd1.Q to iobs/PS_FSM_FFd1.D40.00010.00030.000
iobs/PS_FSM_FFd2.Q to iobs/ALE0.D40.00010.00030.000
iobs/PS_FSM_FFd2.Q to iobs/Clear1.D40.00010.00030.000
iobs/PS_FSM_FFd2.Q to iobs/IOL0.CE40.00010.00030.000
iobs/PS_FSM_FFd2.Q to iobs/IOU0.CE40.00010.00030.000
iobs/PS_FSM_FFd2.Q to iobs/Load1.D40.00010.00030.000
iobs/PS_FSM_FFd2.Q to iobs/PS_FSM_FFd1.D40.00010.00030.000
iobs/PS_FSM_FFd2.Q to nBERR_FSB.D40.00010.00030.000
nADoutLE1.Q to iobs/Clear1.D40.00010.00030.000
nADoutLE1.Q to iobs/IOL0.D40.00010.00030.000
nADoutLE1.Q to iobs/IORW1.D40.00010.00030.000
nADoutLE1.Q to iobs/IOU0.D40.00010.00030.000
nADoutLE1.Q to iobs/Load1.D40.00010.00030.000
nADoutLE1.Q to nADoutLE1.D40.00010.00030.000
nADoutLE1.Q to nBERR_FSB.D40.00010.00030.000
nADoutLE1.Q to nDTACK_FSB.D40.00010.00030.000
nBERR_FSB.Q to nBERR_FSB.D40.00010.00030.000
ram/BACTr.Q to ram/RAMEN.D40.00010.00030.000
ram/BACTr.Q to ram/RS_FSM_FFd2.D40.00010.00030.000
ram/RAMEN.Q to ram/RS_FSM_FFd3.D40.00010.00030.000
ram/RAMReady.Q to fsb/Ready0r.D40.00010.00030.000
ram/RASEL.Q to nCAS.D20.00010.00010.000
ram/RS_FSM_FFd1.Q to ram/RAMReady.D40.00010.00030.000
ram/RS_FSM_FFd1.Q to ram/RASEL.D40.00010.00030.000
ram/RS_FSM_FFd1.Q to ram/RS_FSM_FFd2.D40.00010.00030.000
ram/RS_FSM_FFd1.Q to ram/RefDone.D40.00010.00030.000
ram/RS_FSM_FFd1.Q to ram/RefRAS.D40.00010.00030.000
ram/RS_FSM_FFd2.Q to ram/RAMEN.D40.00010.00030.000
ram/RS_FSM_FFd2.Q to ram/RefDone.D40.00010.00030.000
ram/RS_FSM_FFd2.Q to ram/RefRAS.D40.00010.00030.000
ram/RS_FSM_FFd3.Q to ram/RAMEN.D40.00010.00030.000
ram/RS_FSM_FFd3.Q to ram/RS_FSM_FFd1.D40.00010.00030.000
ram/RefDone.Q to ram/RefDone.D40.00010.00030.000
ram/RefDone.Q to ram/RefReq.D40.00010.00030.000
ram/RefDone.Q to ram/RefUrgent.D40.00010.00030.000
ram/RefReq.Q to ram/RAMEN.D40.00010.00030.000
ram/RefReq.Q to ram/RS_FSM_FFd2.D40.00010.00030.000
ram/RefReqSync.Q to ram/RefDone.D40.00010.00030.000
ram/RefReqSync.Q to ram/RefReq.D40.00010.00030.000
ram/RefUrgent.Q to ram/RAMEN.D40.00010.00030.000
ram/RegUrgentSync.Q to ram/RefUrgent.D40.00010.00030.000

- -

Constraint: TS_CLK2X_IOB

+ +

Constraint: AUTO_TS_P2P

- + @@ -10341,19 +308,19 @@ function TS_CLK_FSB_ram_RegUrgentSync_Q_to_ram_RefUrgent_D() { - - - - - + + + + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + - - - - - - - - - - - - - - - - - - - - - + + + + + - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + +
Description: PERIOD:CLK2X_IOB:66.666nS:HIGH:33.333nSDescription: MAXDELAY:FROM:PADS(*):TO:PADS(*):0.000 nS
Path Requirement (ns)Slack (ns)
iobm/BERRrf.Q to iobm/IOBERR.D33.30011.00022.300FCLK to RA<1>0.00014.500-14.500
iobm/BERRrr.Q to iobm/IOBERR.D66.60011.00055.600
iobm/DTACKrf.Q to iobm/IOBERR.D33.30011.00022.300
iobm/DTACKrr.Q to iobm/IOBERR.D66.60011.00055.600
iobm/IOBERR.Q to iobm/IOBERR.D66.60011.00055.600
iobm/IOS_FSM_FFd1.Q to iobm/IOACT.D66.60011.00055.600
iobm/IOS_FSM_FFd1.Q to iobm/IOBERR.D66.60011.00055.600
iobm/IOS_FSM_FFd2.Q to iobm/IOBERR.D66.60011.00055.600
iobm/IOS_FSM_FFd3.Q to iobm/IOACT.D66.60011.00055.600
iobm/IOS_FSM_FFd3.Q to iobm/IOBERR.D66.60011.00055.600
iobm/RESrf.Q to iobm/IOACT.D33.30011.00022.300
iobm/RESrf.Q to iobm/IOBERR.D33.30011.00022.300
iobm/RESrr.Q to iobm/IOACT.D66.60011.00055.600
iobm/RESrr.Q to iobm/IOBERR.D66.60011.00055.600
iobm/BERRrf.Q to iobm/IOACT.D33.30010.00023.300
iobm/BERRrf.Q to iobm/IOS_FSM_FFd2.D33.30010.00023.300
iobm/BERRrr.Q to iobm/IOACT.D66.60010.00056.600
iobm/BERRrr.Q to iobm/IOS_FSM_FFd2.D66.60010.00056.600
iobm/BG.Q to iobm/IOS_FSM_FFd3.D66.60010.00056.600
iobm/DTACKrf.Q to iobm/IOACT.D33.30010.00023.300
iobm/DTACKrf.Q to iobm/IOS_FSM_FFd2.D33.30010.00023.300
iobm/DTACKrr.Q to iobm/IOACT.D66.60010.00056.600
iobm/DTACKrr.Q to iobm/IOS_FSM_FFd2.D66.60010.00056.600
iobm/ES<0>.Q to iobm/ES<0>.D66.60010.00056.600
iobm/ES<0>.Q to iobm/ES<1>.D66.60010.00056.600
iobm/ES<0>.Q to iobm/ES<2>.D66.60010.00056.600
iobm/ES<0>.Q to iobm/ES<3>.D66.60010.00056.600
iobm/ES<0>.Q to iobm/ES<4>.D66.60010.00056.600
iobm/ES<0>.Q to iobm/ETACK.D66.60010.00056.600
iobm/ES<0>.Q to nVMA_IOB.D66.60010.00056.600
iobm/ES<1>.Q to iobm/ES<0>.D66.60010.00056.600
iobm/ES<1>.Q to iobm/ES<1>.D66.60010.00056.600
iobm/ES<1>.Q to iobm/ES<2>.D66.60010.00056.600
iobm/ES<1>.Q to iobm/ES<3>.D66.60010.00056.600
iobm/ES<1>.Q to iobm/ES<4>.D66.60010.00056.600
iobm/ES<1>.Q to iobm/ETACK.D66.60010.00056.600
iobm/ES<1>.Q to nVMA_IOB.D66.60010.00056.600
iobm/ES<2>.Q to iobm/ES<0>.D66.60010.00056.600
iobm/ES<2>.Q to iobm/ES<2>.D66.60010.00056.600
iobm/ES<2>.Q to iobm/ES<3>.D66.60010.00056.600
iobm/ES<2>.Q to iobm/ES<4>.D66.60010.00056.600
iobm/ES<2>.Q to iobm/ETACK.D66.60010.00056.600
iobm/ES<2>.Q to nVMA_IOB.D66.60010.00056.600
iobm/ES<3>.Q to iobm/ES<0>.D66.60010.00056.600
iobm/ES<3>.Q to iobm/ES<2>.D66.60010.00056.600
iobm/ES<3>.Q to iobm/ES<3>.D66.60010.00056.600
iobm/ES<3>.Q to iobm/ES<4>.D66.60010.00056.600
iobm/ES<3>.Q to iobm/ETACK.D66.60010.00056.600
iobm/ES<3>.Q to nVMA_IOB.D66.60010.00056.600
iobm/ES<4>.Q to iobm/ES<0>.D66.60010.00056.600
iobm/ES<4>.Q to iobm/ES<2>.D66.60010.00056.600
iobm/ES<4>.Q to iobm/ES<4>.D66.60010.00056.600
iobm/ES<4>.Q to iobm/ETACK.D66.60010.00056.600
iobm/ES<4>.Q to nVMA_IOB.D66.60010.00056.600
iobm/ETACK.Q to iobm/IOACT.D66.60010.00056.600
iobm/ETACK.Q to iobm/IOBERR.D66.60010.00056.600
iobm/ETACK.Q to iobm/IOS_FSM_FFd2.D66.60010.00056.600
iobm/Er2.Q to iobm/ES<0>.D66.60010.00056.600
iobm/Er2.Q to iobm/ES<1>.D66.60010.00056.600
iobm/Er2.Q to iobm/ES<2>.D66.60010.00056.600
iobm/Er2.Q to iobm/ES<3>.D66.60010.00056.600
iobm/Er2.Q to iobm/ES<4>.D66.60010.00056.600
iobm/IOACT.Q to nVMA_IOB.D66.60010.00056.600
iobm/IOREQr.Q to iobm/ALE0.D33.30010.00023.300
iobm/IOREQr.Q to iobm/IOACT.D33.30010.00023.300
iobm/IOREQr.Q to iobm/IOS_FSM_FFd3.D33.30010.00023.300
iobm/IOS_FSM_FFd1.Q to iobm/ALE0.D66.60010.00056.600
iobm/IOS_FSM_FFd1.Q to iobm/IOS_FSM_FFd1.D66.60010.00056.600
iobm/IOS_FSM_FFd1.Q to iobm/IOS_FSM_FFd2.D66.60010.00056.600
iobm/IOS_FSM_FFd1.Q to iobm/IOS_FSM_FFd3.D66.60010.00056.600
iobm/IOS_FSM_FFd1.Q to nAS_IOB.D33.30010.00023.300
iobm/IOS_FSM_FFd1.Q to nDinLE.D33.30010.00023.300
iobm/IOS_FSM_FFd1.Q to nLDS_IOB.D33.30010.00023.300
iobm/IOS_FSM_FFd1.Q to nUDS_IOB.D33.30010.00023.300
iobm/IOS_FSM_FFd2.Q to iobm/ALE0.D66.60010.00056.600
iobm/IOS_FSM_FFd2.Q to iobm/DoutOE.D66.60010.00056.600
iobm/IOS_FSM_FFd2.Q to iobm/IOACT.D66.60010.00056.600
iobm/IOS_FSM_FFd2.Q to iobm/IOS_FSM_FFd1.D66.60010.00056.600
iobm/IOS_FSM_FFd2.Q to iobm/IOS_FSM_FFd2.D66.60010.00056.600
iobm/IOS_FSM_FFd2.Q to iobm/IOS_FSM_FFd3.D66.60010.00056.600
iobm/IOS_FSM_FFd2.Q to nAS_IOB.D33.30010.00023.300
iobm/IOS_FSM_FFd2.Q to nDinLE.D33.30010.00023.300
iobm/IOS_FSM_FFd2.Q to nLDS_IOB.D33.30010.00023.300
iobm/IOS_FSM_FFd2.Q to nUDS_IOB.D33.30010.00023.300
iobm/IOS_FSM_FFd3.Q to iobm/ALE0.D66.60010.00056.600
iobm/IOS_FSM_FFd3.Q to iobm/DoutOE.D66.60010.00056.600
iobm/IOS_FSM_FFd3.Q to iobm/IOS_FSM_FFd1.D66.60010.00056.600
iobm/IOS_FSM_FFd3.Q to iobm/IOS_FSM_FFd2.D66.60010.00056.600
iobm/IOS_FSM_FFd3.Q to iobm/IOS_FSM_FFd3.D66.60010.00056.600
iobm/IOS_FSM_FFd3.Q to nAS_IOB.D33.30010.00023.300
iobm/IOS_FSM_FFd3.Q to nLDS_IOB.D33.30010.00023.300
iobm/IOS_FSM_FFd3.Q to nUDS_IOB.D33.30010.00023.300
iobm/RESrf.Q to iobm/IOS_FSM_FFd2.D33.30010.00023.300
iobm/RESrr.Q to iobm/IOS_FSM_FFd2.D66.60010.00056.600
iobm/VPArf.Q to nVMA_IOB.D33.30010.00023.300FCLK to RA<2>0.00014.500-14.500
iobm/VPArr.Q to nVMA_IOB.D66.60010.00056.600
iobm/nASr.Q to iobm/BG.CE66.60010.00056.600
nAS_IOB.Q to iobm/nASr.D33.30010.00023.300FCLK to RA<4>0.00014.500-14.500
nVMA_IOB.Q to iobm/ETACK.D66.60010.00056.600
nVMA_IOB.Q to nVMA_IOB.D66.60010.00056.600
A_FSB<10> to nDTACK_FSB.D0.0009.700-9.700
A_FSB<11> to fsb/VPA.D0.0009.700-9.700
 +
+
+ +

Constraint: AUTO_TS_F2P

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Description: MAXDELAY:FROM:FFS(*):TO:PADS(*):0.000 nS
PathRequirement (ns)Delay (ns)Slack (ns)
cs/nOverlay1.Q to RA<8>0.00012.700-12.700
cs/nOverlay1.Q to nROMCS0.00012.700-12.700
nAoutOE.Q to nAS_IOB0.00012.700-12.700
 +
+
+
Number of constraints not met: 4

Data Sheet Report

@@ -13756,20 +715,15 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { Reason - E - 71.429 - Limited by Clock Pulse Width for E + C8M + 111.111 + Limited by Clock Pulse Width for C8M FCLK 87.719 Limited by Cycle Time for FCLK - - C8M - 100.000 - Limited by Cycle Time for C8M - C16M 90.909 @@ -13779,6 +733,19 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {

Setup/Hold Times for Clocks

+ + + + + + + + + + + + +
Setup/Hold Times for Clock C8M
Source PadSetup to clk (edge) Hold to clk (edge)
E6.5000.000

@@ -13866,11 +833,21 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { + + + + + + + + + + @@ -13887,24 +864,6 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
Setup/Hold Times for Clock FCLK
7.900 0.000
E6.5000.000
nAS_FSB 7.900 0.000
nIPL26.5000.000
nLDS_FSB 6.5000.000

- - - - - - - - - - - - - - - - - -
Setup/Hold Times for Clock C8M
Source PadSetup to clk (edge) Hold to clk (edge)
E6.5000.000
nIPL26.5000.000

@@ -13922,11 +881,6 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - - - - - @@ -13952,6 +906,14 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { + + + + + + + + @@ -13960,38 +922,46 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - - - - - + + + + + + + + + + + + + + + + + - - - - - - - - + + + + @@ -14005,11 +975,7 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - - - - - + @@ -14020,10 +986,18 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { + + + + + + + + @@ -14033,45 +1007,6 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {
Setup/Hold Times for Clock C16M
7.500 0.000
nBG_IOB6.5000.000
nDTACK_IOB 6.500Destination Pad Clock (edge) to Pad
RA<1>14.500
RA<2>14.500
RA<4> 14.500RA<5> 14.500
RA<6>14.500
RA<8> 14.500
nRAMLWEnAS_IOB14.500
nLDS_IOB14.500
nRES 14.500
nROMCS 14.500
nUDS_IOB14.500
nVMA_IOB14.500
RA<0> 13.500
RA<1>13.500
RA<2>13.500
RA<3> 13.500
RA<6>13.500
RA<7> 13.50013.500
nRAMUWE13.500
nRASnDoutOE 13.500
nADoutLE1 5.800
nAoutOE5.800
nBERR_FSB 5.800
nBR_IOB5.800
nCAS 5.8005.800

- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Clock C8M to Pad
Destination PadClock (edge) to Pad
nAS_IOB14.500
nLDS_IOB14.500
nRES14.500
nUDS_IOB14.500
nVMA_IOB14.500
nDoutOE13.500
nAoutOE5.800
nBR_IOB5.800

@@ -14110,144 +1045,6 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() {

Clock to Setup Times for Clocks

-
Clock C16M to Pad
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Clock to Setup for clock E
SourceDestinationDelay
cnt/Timer<0>.Qcnt/RefReq.D10.000
cnt/Timer<0>.Qcnt/RefUrgent.D10.000
cnt/Timer<0>.Qcnt/Timer<0>.D10.000
cnt/Timer<0>.Qcnt/Timer<1>.D10.000
cnt/Timer<0>.Qcnt/Timer<2>.D10.000
cnt/Timer<0>.Qcnt/Timer<3>.D10.000
cnt/Timer<0>.Qcnt/TimerTC.D10.000
cnt/Timer<1>.Qcnt/RefReq.D10.000
cnt/Timer<1>.Qcnt/RefUrgent.D10.000
cnt/Timer<1>.Qcnt/Timer<1>.D10.000
cnt/Timer<1>.Qcnt/Timer<2>.D10.000
cnt/Timer<1>.Qcnt/Timer<3>.D10.000
cnt/Timer<1>.Qcnt/TimerTC.D10.000
cnt/Timer<2>.Qcnt/RefReq.D10.000
cnt/Timer<2>.Qcnt/RefUrgent.D10.000
cnt/Timer<2>.Qcnt/Timer<2>.D10.000
cnt/Timer<2>.Qcnt/Timer<3>.D10.000
cnt/Timer<2>.Qcnt/TimerTC.D10.000
cnt/Timer<3>.Qcnt/RefReq.D10.000
cnt/Timer<3>.Qcnt/RefUrgent.D10.000
cnt/Timer<3>.Qcnt/Timer<3>.D10.000
cnt/Timer<3>.Qcnt/TimerTC.D10.000
cnt/TimerTC.Qcnt/Timer<0>.D10.000
cnt/TimerTC.Qcnt/Timer<1>.D10.000
cnt/TimerTC.Qcnt/Timer<2>.D10.000
cnt/TimerTC.Qcnt/Timer<3>.D10.000

@@ -14257,17 +1054,17 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - + - + - + @@ -14280,6 +1077,21 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { + + + + + + + + + + + + + + + @@ -14287,12 +1099,7 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - - - - - - + @@ -14300,6 +1107,11 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { + + + + + @@ -14310,16 +1122,6 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - - - - - - - - - - @@ -14332,51 +1134,51 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - + - + + + + + + - + + + + + + + + + + + - + - + - + - - - - - - - - - - - - - - - - + @@ -14385,6 +1187,21 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { + + + + + + + + + + + + + + + @@ -14395,6 +1212,11 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { + + + + + @@ -14405,16 +1227,26 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { + + + + + - + + + + + + @@ -14422,7 +1254,7 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - + @@ -14437,7 +1269,7 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - + @@ -14445,26 +1277,6 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - - - - - - - - - - - - - - - - - - - - @@ -14472,7 +1284,12 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - + + + + + + @@ -14482,17 +1299,7 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - - - - - - - - - - - + @@ -14511,13 +1318,13 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - - + + - + @@ -14525,19 +1332,9 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - - - - - - - - - - - + @@ -14545,31 +1342,11 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - - - - - - - - - - - - - - - - - - - - @@ -14577,7 +1354,7 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - + @@ -14586,13 +1363,13 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - - + + - + @@ -14601,13 +1378,13 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - - + + - + @@ -14627,17 +1404,12 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - - - - - - + - + @@ -14646,8 +1418,8 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - - + + @@ -14655,36 +1427,1021 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - - - - - - + + + + + + + + + + + - - - - - - + - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -14702,7 +2459,12 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - + + + + + + @@ -14715,6 +2477,11 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { + + + + + @@ -14722,7 +2489,7 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - + @@ -14730,16 +2497,6 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - - - - - - - - - - @@ -14752,7 +2509,7 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - + @@ -14767,7 +2524,12 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - + + + + + + @@ -14787,17 +2549,22 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - + - + + + + + + - + @@ -14817,12 +2584,12 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - + - + @@ -14832,109 +2599,134 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - @@ -14950,24 +2742,34 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { + + + + + - - + + - - + + - + + + + + + @@ -14980,11 +2782,6 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - - - - - @@ -14992,7 +2789,7 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - + @@ -15000,14 +2797,9 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - - - - - - + @@ -15015,21 +2807,16 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - - - - - - - - - - + + + + + @@ -15042,7 +2829,7 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - + @@ -15050,11 +2837,6 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - - - - - @@ -15066,701 +2848,8 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { - - - - - - - - - -
Clock to Setup for clock FCLK
cs/nOverlay1.Qfsb/VPA.DIOREQ.D 11.400
cs/nOverlay1.Qiobs/IORW0.DIORW0.D 11.400
cs/nOverlay1.Qiobs/Once.Diobs/PS_FSM_FFd2.D 11.400
ram/RASEL.D 11.400
cs/nOverlay1.Qram/RS_FSM_FFd3.D11.400
fsb/ASrf.QIOREQ.D11.400
fsb/ASrf.QIORW0.D11.400
fsb/ASrf.Q fsb/VPA.D
fsb/ASrf.Qiobs/IORW0.D11.400
fsb/ASrf.QnDTACK_FSB.Diobs/PS_FSM_FFd2.D 11.400
ram/RASEL.D 11.400
fsb/ASrf.Qram/RS_FSM_FFd3.D11.400
fsb/Ready1r.Q fsb/VPA.DnDTACK_FSB.D 11.400
fsb/VPA.Qfsb/VPA.D11.400
iobs/IORW0.Qiobs/IORW0.D11.400
iobs/IOReady.Q fsb/VPA.D
iobs/Once.Qiobs/IORW0.DIOREQ.D 11.400
iobs/Once.Qiobs/Once.DIORW0.D11.400
iobs/Once.Qiobs/PS_FSM_FFd2.D 11.400
iobs/PS_FSM_FFd1.Qiobs/IORW0.DIOREQ.D11.400
iobs/PS_FSM_FFd1.QIORW0.D11.400
iobs/PS_FSM_FFd1.Qiobs/PS_FSM_FFd2.D 11.400
iobs/PS_FSM_FFd2.Qiobs/IOREQ.DIORW0.D 11.400
iobs/PS_FSM_FFd2.Qiobs/IORW0.Diobs/PS_FSM_FFd2.D 11.400
nADoutLE1.Qfsb/VPA.DIORW0.D 11.400
nADoutLE1.Qiobs/IOREQ.D11.400
nADoutLE1.Qiobs/IORW0.D11.400
nDTACK_FSB.QnDTACK_FSB.D11.400
ram/RAMEN.Qram/BACTr.Q ram/RAMReady.D 11.400
ram/RASEL.D 11.400
ram/RAMEN.Qram/RS_FSM_FFd3.D11.400
ram/RS_FSM_FFd1.Qram/RAMReady.D11.400
ram/RS_FSM_FFd1.Qram/RS_FSM_FFd3.D11.400
ram/RS_FSM_FFd2.Q ram/RAMReady.Dram/RASEL.D 11.400
ram/RS_FSM_FFd2.Qram/RS_FSM_FFd3.D11.400
ram/RS_FSM_FFd3.Q ram/RAMReady.Dram/RASEL.D 11.400
ram/RS_FSM_FFd3.Qram/RS_FSM_FFd3.D11.400
ram/RefReq.Q ram/RAMReady.D 11.400
ram/RefUrgent.Qram/RefUrg.Q ram/RAMReady.D 11.400
IORW0.QIORW0.D11.000
cs/nOverlay1.Q fsb/Ready1r.D
cs/nOverlay1.Qiobs/IOREQ.Dfsb/VPA.D 11.000
cs/nOverlay1.Qiobs/PS_FSM_FFd2.Diobs/Once.D 11.000
nDTACK_FSB.D 11.000
cs/nOverlay1.Qram/RAMEN.D11.000
cs/nOverlay1.Qram/RS_FSM_FFd1.D11.000
cs/nOverlay1.Qram/RS_FSM_FFd2.D11.000
fsb/ASrf.Qfsb/Ready0r.D11.000
fsb/ASrf.Q iobs/IORW1.D
fsb/ASrf.Qiobs/IOReady.Diobs/Once.D11.000
fsb/ASrf.QnDTACK_FSB.D 11.000
fsb/ASrf.Qram/RS_FSM_FFd1.D11.000
fsb/ASrf.Qram/RS_FSM_FFd2.D11.000
fsb/ASrf.Qram/RS_FSM_FFd3.Dram/RAMReady.D 11.000
11.000
iobs/IOACTr.Qiobs/IOReady.Dfsb/VPA.Qfsb/VPA.D 11.000
iobs/IORW1.Qiobs/IORW1.DIORW0.D 11.000
fsb/Ready1r.D 11.000
iobs/IOReady.Qiobs/IOReady.D11.000
iobs/Once.Qiobs/IOReady.D11.000
iobs/PS_FSM_FFd1.Qiobs/IORW1.Diobs/Once.D 11.000
iobs/Once.D 11.000
iobs/PS_FSM_FFd1.Qiobs/PS_FSM_FFd2.D11.000
iobs/PS_FSM_FFd2.Qiobs/IORW1.D11.000
iobs/PS_FSM_FFd2.Qiobs/IOReady.D11.000
iobs/PS_FSM_FFd2.Q iobs/Once.D 11.000
iobs/PS_FSM_FFd2.Qiobs/PS_FSM_FFd2.D11.000
nADoutLE1.Q fsb/Ready1r.D
nADoutLE1.Qiobs/IOReady.Dfsb/VPA.D 11.000
11.000
nADoutLE1.Qiobs/PS_FSM_FFd2.DnDTACK_FSB.QnDTACK_FSB.D 11.000
ram/BACTr.Qram/RAMReady.Dram/RAMEN.D 11.000
11.000
ram/RAMEN.Qram/RAMEN.Dram/BACTr.Qram/RS_FSM_FFd3.D 11.000
ram/RAMEN.Qram/RS_FSM_FFd1.Dram/RAMEN.D 11.000
ram/RS_FSM_FFd1.Qram/RS_FSM_FFd1.D11.000
ram/RS_FSM_FFd1.Qram/RS_FSM_FFd3.Dram/RS_FSM_FFd2.D 11.000
ram/RS_FSM_FFd2.Qram/RS_FSM_FFd1.Dram/RAMEN.D 11.000
11.000
ram/RS_FSM_FFd2.Qram/RS_FSM_FFd3.Dram/RS_FSM_FFd3.Qram/RAMEN.D 11.000
ram/RS_FSM_FFd2.D 11.000
ram/RS_FSM_FFd3.Qram/RS_FSM_FFd3.D11.000
ram/RefReq.Q ram/RASEL.D 11.000
ram/RefUrgent.Qram/RefReq.Qram/RS_FSM_FFd3.D11.000
ram/RefUrg.Qram/RAMEN.D11.000
ram/RefUrg.Q ram/RASEL.D 11.000
ram/RefUrgent.Qram/RS_FSM_FFd1.D11.000
ram/RefUrgent.Qram/RefUrg.Q ram/RS_FSM_FFd2.D 11.000
ram/RefUrgent.Qram/RefUrg.Q ram/RS_FSM_FFd3.D 11.000
RefReq.Qram/RefReqSync.D10.000
RefUrg.QRefReq.D10.000
RefUrg.QRefUrg.D10.000
RefUrg.Qcnt/TimerTC.D10.000
RefUrg.Qram/RegUrgSync.D10.000
cnt/Er<0>.QRefReq.CE10.000
cnt/Er<0>.QRefUrg.CE10.000
cnt/Er<0>.QRefUrg.D10.000
cnt/Er<0>.Qcnt/Er<1>.D10.000
cnt/Er<0>.Qcnt/INITS_FSM_FFd1.D10.000
cnt/Er<0>.Qcnt/INITS_FSM_FFd2.D10.000
cnt/Er<0>.Qcnt/LTimer<0>.CE10.000
cnt/Er<0>.Qcnt/LTimer<10>.CE10.000
cnt/Er<0>.Qcnt/LTimer<11>.CE10.000
cnt/Er<0>.Qcnt/LTimer<12>.CE10.000
cnt/Er<0>.Qcnt/LTimer<1>.CE10.000
cnt/Er<0>.Qcnt/LTimer<2>.CE10.000
cnt/Er<0>.Qcnt/LTimer<3>.CE10.000
cnt/Er<0>.Qcnt/LTimer<4>.CE10.000
cnt/Er<0>.Qcnt/LTimer<5>.CE10.000
cnt/Er<0>.Qcnt/LTimer<6>.CE10.000
cnt/Er<0>.Qcnt/LTimer<7>.CE10.000
cnt/Er<0>.Qcnt/LTimer<8>.CE10.000
cnt/Er<0>.Qcnt/LTimer<9>.CE10.000
cnt/Er<0>.Qcnt/LTimerTC.CE10.000
cnt/Er<0>.Qcnt/Timer<0>.CE10.000
cnt/Er<0>.Qcnt/Timer<0>.D10.000
cnt/Er<0>.Qcnt/Timer<1>.CE10.000
cnt/Er<0>.Qcnt/Timer<1>.D10.000
cnt/Er<0>.Qcnt/Timer<2>.CE10.000
cnt/Er<0>.Qcnt/Timer<2>.D10.000
cnt/Er<0>.Qcnt/TimerTC.CE10.000
cnt/Er<1>.QRefReq.CE10.000
cnt/Er<1>.QRefUrg.CE10.000
cnt/Er<1>.QRefUrg.D10.000
cnt/Er<1>.Qcnt/INITS_FSM_FFd1.D10.000
cnt/Er<1>.Qcnt/INITS_FSM_FFd2.D10.000
cnt/Er<1>.Qcnt/LTimer<0>.CE10.000
cnt/Er<1>.Qcnt/LTimer<10>.CE10.000
cnt/Er<1>.Qcnt/LTimer<11>.CE10.000
cnt/Er<1>.Qcnt/LTimer<12>.CE10.000
cnt/Er<1>.Qcnt/LTimer<1>.CE10.000
cnt/Er<1>.Qcnt/LTimer<2>.CE10.000
cnt/Er<1>.Qcnt/LTimer<3>.CE10.000
cnt/Er<1>.Qcnt/LTimer<4>.CE10.000
cnt/Er<1>.Qcnt/LTimer<5>.CE10.000
cnt/Er<1>.Qcnt/LTimer<6>.CE10.000
cnt/Er<1>.Qcnt/LTimer<7>.CE10.000
cnt/Er<1>.Qcnt/LTimer<8>.CE10.000
cnt/Er<1>.Qcnt/LTimer<9>.CE10.000
cnt/Er<1>.Qcnt/LTimerTC.CE10.000
cnt/Er<1>.Qcnt/Timer<0>.CE10.000
cnt/Er<1>.Qcnt/Timer<0>.D10.000
cnt/Er<1>.Qcnt/Timer<1>.CE10.000
cnt/Er<1>.Qcnt/Timer<1>.D10.000
cnt/Er<1>.Qcnt/Timer<2>.CE10.000
cnt/Er<1>.Qcnt/Timer<2>.D10.000
cnt/Er<1>.Qcnt/TimerTC.CE10.000
cnt/INITS_FSM_FFd1.Qcnt/INITS_FSM_FFd1.D10.000
cnt/INITS_FSM_FFd1.Qcnt/INITS_FSM_FFd2.D10.000
cnt/INITS_FSM_FFd1.QnAoutOE.D10.000
cnt/INITS_FSM_FFd1.QnBR_IOB.D10.000
cnt/INITS_FSM_FFd1.QnRESout.D10.000
cnt/INITS_FSM_FFd2.Qcnt/INITS_FSM_FFd1.D10.000
cnt/INITS_FSM_FFd2.Qcnt/INITS_FSM_FFd2.D10.000
cnt/INITS_FSM_FFd2.QnAoutOE.D10.000
cnt/INITS_FSM_FFd2.QnBR_IOB.D10.000
cnt/INITS_FSM_FFd2.QnRESout.D10.000
cnt/LTimer<0>.Qcnt/LTimer<10>.D10.000
cnt/LTimer<0>.Qcnt/LTimer<11>.D10.000
cnt/LTimer<0>.Qcnt/LTimer<12>.D10.000
cnt/LTimer<0>.Qcnt/LTimer<1>.D10.000
cnt/LTimer<0>.Qcnt/LTimer<2>.D10.000
cnt/LTimer<0>.Qcnt/LTimer<3>.D10.000
cnt/LTimer<0>.Qcnt/LTimer<4>.D10.000
cnt/LTimer<0>.Qcnt/LTimer<5>.D10.000
cnt/LTimer<0>.Qcnt/LTimer<6>.D10.000
cnt/LTimer<0>.Qcnt/LTimer<7>.D10.000
cnt/LTimer<0>.Qcnt/LTimer<8>.D10.000
cnt/LTimer<0>.Qcnt/LTimer<9>.D10.000
cnt/LTimer<0>.Qcnt/LTimerTC.D10.000
cnt/LTimer<10>.Qcnt/LTimer<11>.D10.000
cnt/LTimer<10>.Qcnt/LTimer<12>.D10.000
cnt/LTimer<10>.Qcnt/LTimerTC.D10.000
cnt/LTimer<11>.Qcnt/LTimer<12>.D10.000
cnt/LTimer<11>.Qcnt/LTimerTC.D10.000
cnt/LTimer<12>.Qcnt/LTimerTC.D10.000
cnt/LTimer<1>.Qcnt/LTimer<10>.D10.000
cnt/LTimer<1>.Qcnt/LTimer<11>.D10.000
cnt/LTimer<1>.Qcnt/LTimer<12>.D10.000
cnt/LTimer<1>.Qcnt/LTimer<2>.D10.000
cnt/LTimer<1>.Qcnt/LTimer<3>.D10.000
cnt/LTimer<1>.Qcnt/LTimer<4>.D10.000
cnt/LTimer<1>.Qcnt/LTimer<5>.D10.000
cnt/LTimer<1>.Qcnt/LTimer<6>.D10.000
cnt/LTimer<1>.Qcnt/LTimer<7>.D10.000
cnt/LTimer<1>.Qcnt/LTimer<8>.D10.000
cnt/LTimer<1>.Qcnt/LTimer<9>.D10.000
cnt/LTimer<1>.Qcnt/LTimerTC.D10.000
cnt/LTimer<2>.Qcnt/LTimer<10>.D10.000
cnt/LTimer<2>.Qcnt/LTimer<11>.D10.000
cnt/LTimer<2>.Qcnt/LTimer<12>.D10.000
cnt/LTimer<2>.Qcnt/LTimer<3>.D10.000
cnt/LTimer<2>.Qcnt/LTimer<4>.D10.000
cnt/LTimer<2>.Qcnt/LTimer<5>.D10.000
cnt/LTimer<2>.Qcnt/LTimer<6>.D10.000
cnt/LTimer<2>.Qcnt/LTimer<7>.D10.000
cnt/LTimer<2>.Qcnt/LTimer<8>.D10.000
cnt/LTimer<2>.Qcnt/LTimer<9>.D10.000
cnt/LTimer<2>.Qcnt/LTimerTC.D10.000
cnt/LTimer<3>.Qcnt/LTimer<10>.D10.000
cnt/LTimer<3>.Qcnt/LTimer<11>.D10.000
cnt/LTimer<3>.Qcnt/LTimer<12>.D10.000
cnt/LTimer<3>.Qcnt/LTimer<4>.D10.000
cnt/LTimer<3>.Qcnt/LTimer<5>.D10.000
cnt/LTimer<3>.Qcnt/LTimer<6>.D10.000
cnt/LTimer<3>.Qcnt/LTimer<7>.D10.000
cnt/LTimer<3>.Qcnt/LTimer<8>.D10.000
cnt/LTimer<3>.Qcnt/LTimer<9>.D10.000
cnt/LTimer<3>.Qcnt/LTimerTC.D10.000
cnt/LTimer<4>.Qcnt/LTimer<10>.D10.000
cnt/LTimer<4>.Qcnt/LTimer<11>.D10.000
cnt/LTimer<4>.Qcnt/LTimer<12>.D10.000
cnt/LTimer<4>.Qcnt/LTimer<5>.D10.000
cnt/LTimer<4>.Qcnt/LTimer<6>.D10.000
cnt/LTimer<4>.Qcnt/LTimer<7>.D10.000
cnt/LTimer<4>.Qcnt/LTimer<8>.D10.000
cnt/LTimer<4>.Qcnt/LTimer<9>.D10.000
cnt/LTimer<4>.Qcnt/LTimerTC.D10.000
cnt/LTimer<5>.Qcnt/LTimer<10>.D10.000
cnt/LTimer<5>.Qcnt/LTimer<11>.D10.000
cnt/LTimer<5>.Qcnt/LTimer<12>.D10.000
cnt/LTimer<5>.Qcnt/LTimer<6>.D10.000
cnt/LTimer<5>.Qcnt/LTimer<7>.D10.000
cnt/LTimer<5>.Qcnt/LTimer<8>.D10.000
cnt/LTimer<5>.Qcnt/LTimer<9>.D10.000
cnt/LTimer<5>.Qcnt/LTimerTC.D10.000
cnt/LTimer<6>.Qcnt/LTimer<10>.D10.000
cnt/LTimer<6>.Qcnt/LTimer<11>.D10.000
cnt/LTimer<6>.Qcnt/LTimer<12>.D10.000
cnt/LTimer<6>.Qcnt/LTimer<7>.D10.000
cnt/LTimer<6>.Qcnt/LTimer<8>.D10.000
cnt/LTimer<6>.Qcnt/LTimer<9>.D10.000
cnt/LTimer<6>.Qcnt/LTimerTC.D10.000
cnt/LTimer<7>.Qcnt/LTimer<10>.D10.000
cnt/LTimer<7>.Qcnt/LTimer<11>.D10.000
cnt/LTimer<7>.Qcnt/LTimer<12>.D10.000
cnt/LTimer<7>.Qcnt/LTimer<8>.D10.000
cnt/LTimer<7>.Qcnt/LTimer<9>.D10.000
cnt/LTimer<7>.Qcnt/LTimerTC.D10.000
cnt/LTimer<8>.Qcnt/LTimer<10>.D10.000
cnt/LTimer<8>.Qcnt/LTimer<11>.D10.000
cnt/LTimer<8>.Qcnt/LTimer<12>.D10.000
cnt/LTimer<8>.Qcnt/LTimer<9>.D10.000
cnt/LTimer<8>.Qcnt/LTimerTC.D10.000
cnt/LTimer<9>.Qcnt/LTimer<10>.D10.000
cnt/LTimer<9>.Qcnt/LTimer<11>.D10.000
cnt/LTimer<9>.Qcnt/LTimer<12>.D10.000
cnt/LTimer<9>.Qcnt/LTimerTC.D10.000
cnt/LTimerTC.Qcnt/INITS_FSM_FFd1.D10.000
cnt/LTimerTC.Qcnt/INITS_FSM_FFd2.D10.000
cnt/Timer<0>.QRefUrg.D10.000
cnt/Timer<0>.Qcnt/Timer<0>.D10.000
cnt/Timer<0>.Qcnt/Timer<1>.D10.000
cnt/Timer<0>.Qcnt/Timer<2>.D10.000
cnt/Timer<0>.Qcnt/TimerTC.D10.000
cnt/Timer<1>.QRefReq.D10.000
cnt/Timer<1>.QRefUrg.D10.000
cnt/Timer<1>.Qcnt/Timer<1>.D10.000
cnt/Timer<1>.Qcnt/Timer<2>.D10.000
cnt/Timer<1>.Qcnt/TimerTC.D10.000
cnt/Timer<2>.QRefReq.D10.000
cnt/Timer<2>.QRefUrg.D10.000
cnt/Timer<2>.Qcnt/Timer<2>.D10.000
cnt/Timer<2>.Qcnt/TimerTC.D10.000
cnt/TimerTC.QRefUrg.D10.000
cnt/TimerTC.Qcnt/INITS_FSM_FFd1.D10.000
cnt/TimerTC.Qcnt/INITS_FSM_FFd2.D10.000
cnt/TimerTC.Qcnt/LTimer<0>.CE10.000
cnt/TimerTC.Qcnt/LTimer<10>.CE10.000
cnt/TimerTC.Qcnt/LTimer<11>.CE10.000
cnt/TimerTC.Qcnt/LTimer<12>.CE10.000
cnt/TimerTC.Qcnt/LTimer<1>.CE10.000
cnt/TimerTC.Qcnt/LTimer<2>.CE10.000
cnt/TimerTC.Qcnt/LTimer<3>.CE10.000
cnt/TimerTC.Qcnt/LTimer<4>.CE10.000
cnt/TimerTC.Qcnt/LTimer<5>.CE10.000
cnt/TimerTC.Qcnt/LTimer<6>.CE10.000
cnt/TimerTC.Qcnt/LTimer<7>.CE10.000
cnt/TimerTC.Qcnt/LTimer<8>.CE10.000
cnt/TimerTC.Qcnt/LTimer<9>.CE10.000
cnt/TimerTC.Qcnt/LTimerTC.CE10.000
cnt/TimerTC.Qcnt/Timer<0>.D10.000
cnt/TimerTC.Qcnt/Timer<1>.D10.000
cnt/TimerTC.Qcnt/Timer<2>.D10.000
cnt/nIPL2r.Qcnt/INITS_FSM_FFd1.D10.000
cnt/nIPL2r.QnBR_IOB.D10.000
cs/nOverlay0.Q cs/nOverlay0.D
cs/nOverlay1.Qram/RS_FSM_FFd3.Dram/RAMEN.D10.000
cs/nOverlay1.Qram/RS_FSM_FFd2.D 10.000
cs/nOverlay1.CE 10.000
fsb/ASrf.Qfsb/Ready0r.D10.000
fsb/ASrf.Q fsb/Ready1r.D
fsb/ASrf.Qiobs/IOREQ.Diobs/IOReady.D 10.000
iobs/Load1.D 10.000
fsb/ASrf.Qiobs/Once.D10.000
fsb/ASrf.Qiobs/PS_FSM_FFd2.D10.000
fsb/ASrf.Q nBERR_FSB.D
fsb/ASrf.Qram/RAMReady.Dram/RS_FSM_FFd2.D 10.000
iobs/IOACTr.Qiobs/IOREQ.DIOREQ.D10.000
iobs/IOACTr.Qiobs/IOReady.D 10.000
iobs/IOL1.Qiobs/IOL0.DIOL0.D 10.000
iobs/IORW1.Qiobs/IORW0.Diobs/IORW1.D10.000
iobs/IOReady.Qiobs/IOReady.D 10.000
iobs/IOU1.Qiobs/IOU0.DIOU0.D 10.000
iobs/Once.Qiobs/IOREQ.Diobs/IORW1.D 10.000
iobs/Once.Qiobs/IORW1.Diobs/IOReady.D 10.000
iobs/Once.QnBERR_FSB.D10.000
iobs/PS_FSM_FFd1.QALE0S.D10.000
iobs/PS_FSM_FFd1.QIOL0.CE10.000
iobs/PS_FSM_FFd1.QIOU0.CE10.000
iobs/PS_FSM_FFd1.Qiobs/Clear1.D10.000
iobs/PS_FSM_FFd1.Qiobs/IORW1.D10.000
iobs/PS_FSM_FFd1.Qiobs/Load1.D10.000
iobs/PS_FSM_FFd1.Qiobs/PS_FSM_FFd1.D10.000
iobs/PS_FSM_FFd2.QALE0S.D10.000
iobs/PS_FSM_FFd2.QIOL0.CE10.000
iobs/PS_FSM_FFd2.QIOREQ.D10.000
iobs/PS_FSM_FFd2.QIOU0.CE10.000
iobs/PS_FSM_FFd2.Qiobs/Clear1.D10.000
iobs/PS_FSM_FFd2.Qiobs/IORW1.D10.000
iobs/PS_FSM_FFd2.Qiobs/IOReady.D10.000
iobs/PS_FSM_FFd2.Qiobs/Load1.D10.000
iobs/PS_FSM_FFd2.Qiobs/PS_FSM_FFd1.D10.000
iobs/PS_FSM_FFd2.QnBERR_FSB.D10.000
nADoutLE1.QIOL0.D10.000
nADoutLE1.QIOREQ.D10.000
nADoutLE1.QIOU0.D10.000
nADoutLE1.Qiobs/Clear1.D10.000
nADoutLE1.Qiobs/IORW1.D10.000
nADoutLE1.Qiobs/IOReady.D10.000
nADoutLE1.Qiobs/Load1.D10.000
nADoutLE1.Q iobs/PS_FSM_FFd2.D 10.000
iobs/Once.QnBERR_FSB.D10.000
iobs/PS_FSM_FFd1.Qiobs/ALE0.D10.000
iobs/PS_FSM_FFd1.Qiobs/Clear1.D10.000
iobs/PS_FSM_FFd1.Qiobs/IOL0.CE10.000
iobs/PS_FSM_FFd1.Qiobs/IOREQ.D10.000
iobs/PS_FSM_FFd1.Qiobs/IOU0.CE10.000
iobs/PS_FSM_FFd1.Qiobs/Load1.D10.000
iobs/PS_FSM_FFd1.Qiobs/PS_FSM_FFd1.D10.000
iobs/PS_FSM_FFd2.Qiobs/ALE0.D10.000
iobs/PS_FSM_FFd2.Qiobs/Clear1.D10.000
iobs/PS_FSM_FFd2.Qiobs/IOL0.CE10.000
iobs/PS_FSM_FFd2.Qiobs/IOU0.CE10.000
iobs/PS_FSM_FFd2.Qiobs/Load1.D10.000
iobs/PS_FSM_FFd2.Qiobs/PS_FSM_FFd1.D10.000
iobs/PS_FSM_FFd2.QnBERR_FSB.D10.000
nADoutLE1.Qiobs/Clear1.D10.000
nADoutLE1.Qiobs/IOL0.D10.000
nADoutLE1.Qiobs/IORW1.D10.000
nADoutLE1.Qiobs/IOU0.D10.000
nADoutLE1.Qiobs/Load1.D10.000
nADoutLE1.Q nADoutLE1.DnDTACK_FSB.D 10.000
nAoutOE.QnAoutOE.D10.000
nBERR_FSB.Q nBERR_FSB.D 10.000
ram/BACTr.Qram/RAMEN.DnBR_IOB.QnAoutOE.D 10.000
ram/BACTr.Qram/RS_FSM_FFd2.DnBR_IOB.QnBR_IOB.D 10.000
ram/RAMEN.Qram/RS_FSM_FFd3.Dram/RAMReady.D10.000
ram/RAMEN.Qram/RS_FSM_FFd2.D 10.000
nCAS.D 10.000
ram/RS_FSM_FFd1.Qram/RAMReady.D10.000
ram/RS_FSM_FFd1.Q ram/RASEL.D
ram/RS_FSM_FFd1.Qram/RS_FSM_FFd2.Dram/RS_FSM_FFd1.D 10.000
ram/RefDone.D 10.000
ram/RS_FSM_FFd1.Qram/RefRAS.D10.000
ram/RS_FSM_FFd2.Qram/RAMEN.Dram/RS_FSM_FFd1.D 10.000
ram/RefDone.D 10.000
ram/RS_FSM_FFd2.Qram/RefRAS.D10.000
ram/RS_FSM_FFd3.Qram/RAMEN.D10.000
ram/RS_FSM_FFd3.Q ram/RS_FSM_FFd1.D 10.000
ram/RS_FSM_FFd3.Qram/RefDone.D10.000
ram/RefDone.Q ram/RefDone.D
ram/RefDone.Qram/RefUrgent.Dram/RefUrg.D 10.000
ram/RAMEN.D 10.000
ram/RefReq.Qram/RS_FSM_FFd2.D10.000
ram/RefReqSync.Q ram/RefDone.D10.000
ram/RefUrgent.Qram/RAMEN.D10.000
ram/RegUrgentSync.Qram/RefUrgent.D10.000

- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + +
Clock to Setup for clock C8M
SourceDestinationDelay
cnt/IPL2r.Qcnt/PORS_FSM_FFd1.D10.000
cnt/IPL2r.QnBR_IOB.D10.000
cnt/LTimer<0>.Qcnt/LTimer<0>.D10.000
cnt/LTimer<0>.Qcnt/LTimer<10>.D10.000
cnt/LTimer<0>.Qcnt/LTimer<11>.D10.000
cnt/LTimer<0>.Qcnt/LTimer<12>.D10.000
cnt/LTimer<0>.Qcnt/LTimer<13>.D10.000
cnt/LTimer<0>.Qcnt/LTimer<1>.D10.000
cnt/LTimer<0>.Qcnt/LTimer<2>.D10.000
cnt/LTimer<0>.Qcnt/LTimer<3>.D10.000
cnt/LTimer<0>.Qcnt/LTimer<4>.D10.000
cnt/LTimer<0>.Qcnt/LTimer<5>.D10.000
cnt/LTimer<0>.Qcnt/LTimer<6>.D10.000
cnt/LTimer<0>.Qcnt/LTimer<7>.D10.000
cnt/LTimer<0>.Qcnt/LTimer<8>.D10.000
cnt/LTimer<0>.Qcnt/LTimer<9>.D10.000
cnt/LTimer<10>.Qcnt/LTimer<10>.D10.000
cnt/LTimer<10>.Qcnt/LTimer<11>.D10.000
cnt/LTimer<10>.Qcnt/LTimer<12>.D10.000
cnt/LTimer<10>.Qcnt/LTimer<13>.D10.000
cnt/LTimer<11>.Qcnt/LTimer<11>.D10.000
cnt/LTimer<11>.Qcnt/LTimer<12>.D10.000
cnt/LTimer<11>.Qcnt/LTimer<13>.D10.000
cnt/LTimer<12>.Qcnt/LTimer<12>.D10.000
cnt/LTimer<12>.Qcnt/LTimer<13>.D10.000
cnt/LTimer<13>.Qcnt/LTimer<0>.D10.000
cnt/LTimer<13>.Qcnt/LTimer<10>.D10.000
cnt/LTimer<13>.Qcnt/LTimer<11>.D10.000
cnt/LTimer<13>.Qcnt/LTimer<12>.D10.000
cnt/LTimer<13>.Qcnt/LTimer<13>.D10.000
cnt/LTimer<13>.Qcnt/LTimer<1>.D10.000
cnt/LTimer<13>.Qcnt/LTimer<2>.D10.000
cnt/LTimer<13>.Qcnt/LTimer<3>.D10.000
cnt/LTimer<13>.Qcnt/LTimer<4>.D10.000
cnt/LTimer<13>.Qcnt/LTimer<5>.D10.000
cnt/LTimer<13>.Qcnt/LTimer<6>.D10.000
cnt/LTimer<13>.Qcnt/LTimer<7>.D10.000
cnt/LTimer<13>.Qcnt/LTimer<8>.D10.000
cnt/LTimer<13>.Qcnt/LTimer<9>.D10.000
cnt/LTimer<13>.Qcnt/PORS_FSM_FFd1.D10.000
cnt/LTimer<13>.Qcnt/PORS_FSM_FFd2.D10.000
cnt/LTimer<13>.Qcnt/nRESout.D10.000
cnt/LTimer<1>.Qcnt/LTimer<10>.D10.000
cnt/LTimer<1>.Qcnt/LTimer<11>.D10.000
cnt/LTimer<1>.Qcnt/LTimer<12>.D10.000
cnt/LTimer<1>.Qcnt/LTimer<13>.D10.000
cnt/LTimer<1>.Qcnt/LTimer<1>.D10.000
cnt/LTimer<1>.Qcnt/LTimer<2>.D10.000
cnt/LTimer<1>.Qcnt/LTimer<3>.D10.000
cnt/LTimer<1>.Qcnt/LTimer<4>.D10.000
cnt/LTimer<1>.Qcnt/LTimer<5>.D10.000
cnt/LTimer<1>.Qcnt/LTimer<6>.D10.000
cnt/LTimer<1>.Qcnt/LTimer<7>.D10.000
cnt/LTimer<1>.Qcnt/LTimer<8>.D10.000
cnt/LTimer<1>.Qcnt/LTimer<9>.D10.000
cnt/LTimer<2>.Qcnt/LTimer<10>.D10.000
cnt/LTimer<2>.Qcnt/LTimer<11>.D10.000
cnt/LTimer<2>.Qcnt/LTimer<12>.D10.000
cnt/LTimer<2>.Qcnt/LTimer<13>.D10.000
cnt/LTimer<2>.Qcnt/LTimer<2>.D10.000
cnt/LTimer<2>.Qcnt/LTimer<3>.D10.000
cnt/LTimer<2>.Qcnt/LTimer<4>.D10.000
cnt/LTimer<2>.Qcnt/LTimer<5>.D10.000
cnt/LTimer<2>.Qcnt/LTimer<6>.D10.000
cnt/LTimer<2>.Qcnt/LTimer<7>.D10.000
cnt/LTimer<2>.Qcnt/LTimer<8>.D10.000
cnt/LTimer<2>.Qcnt/LTimer<9>.D10.000
cnt/LTimer<3>.Qcnt/LTimer<10>.D10.000
cnt/LTimer<3>.Qcnt/LTimer<11>.D10.000
cnt/LTimer<3>.Qcnt/LTimer<12>.D10.000
cnt/LTimer<3>.Qcnt/LTimer<13>.D10.000
cnt/LTimer<3>.Qcnt/LTimer<3>.D10.000
cnt/LTimer<3>.Qcnt/LTimer<4>.D10.000
cnt/LTimer<3>.Qcnt/LTimer<5>.D10.000
cnt/LTimer<3>.Qcnt/LTimer<6>.D10.000
cnt/LTimer<3>.Qcnt/LTimer<7>.D10.000
cnt/LTimer<3>.Qcnt/LTimer<8>.D10.000
cnt/LTimer<3>.Qcnt/LTimer<9>.D10.000
cnt/LTimer<4>.Qcnt/LTimer<10>.D10.000
cnt/LTimer<4>.Qcnt/LTimer<11>.D10.000
cnt/LTimer<4>.Qcnt/LTimer<12>.D10.000
cnt/LTimer<4>.Qcnt/LTimer<13>.D10.000
cnt/LTimer<4>.Qcnt/LTimer<4>.D10.000
cnt/LTimer<4>.Qcnt/LTimer<5>.D10.000
cnt/LTimer<4>.Qcnt/LTimer<6>.D10.000
cnt/LTimer<4>.Qcnt/LTimer<7>.D10.000
cnt/LTimer<4>.Qcnt/LTimer<8>.D10.000
cnt/LTimer<4>.Qcnt/LTimer<9>.D10.000
cnt/LTimer<5>.Qcnt/LTimer<10>.D10.000
cnt/LTimer<5>.Qcnt/LTimer<11>.D10.000
cnt/LTimer<5>.Qcnt/LTimer<12>.D10.000
cnt/LTimer<5>.Qcnt/LTimer<13>.D10.000
cnt/LTimer<5>.Qcnt/LTimer<5>.D10.000
cnt/LTimer<5>.Qcnt/LTimer<6>.D10.000
cnt/LTimer<5>.Qcnt/LTimer<7>.D10.000
cnt/LTimer<5>.Qcnt/LTimer<8>.D10.000
cnt/LTimer<5>.Qcnt/LTimer<9>.D10.000
cnt/LTimer<6>.Qcnt/LTimer<10>.D10.000
cnt/LTimer<6>.Qcnt/LTimer<11>.D10.000
cnt/LTimer<6>.Qcnt/LTimer<12>.D10.000
cnt/LTimer<6>.Qcnt/LTimer<13>.D10.000
cnt/LTimer<6>.Qcnt/LTimer<6>.D10.000
cnt/LTimer<6>.Qcnt/LTimer<7>.D10.000
cnt/LTimer<6>.Qcnt/LTimer<8>.D10.000
cnt/LTimer<6>.Qcnt/LTimer<9>.D10.000
cnt/LTimer<7>.Qcnt/LTimer<10>.D10.000
cnt/LTimer<7>.Qcnt/LTimer<11>.D10.000
cnt/LTimer<7>.Qcnt/LTimer<12>.D10.000
cnt/LTimer<7>.Qcnt/LTimer<13>.D10.000
cnt/LTimer<7>.Qcnt/LTimer<7>.D10.000
cnt/LTimer<7>.Qcnt/LTimer<8>.D10.000
cnt/LTimer<7>.Qcnt/LTimer<9>.D10.000
cnt/LTimer<8>.Qcnt/LTimer<10>.D10.000
cnt/LTimer<8>.Qcnt/LTimer<11>.D10.000
cnt/LTimer<8>.Qcnt/LTimer<12>.D10.000
cnt/LTimer<8>.Qcnt/LTimer<13>.D10.000
cnt/LTimer<8>.Qcnt/LTimer<8>.D10.000
cnt/LTimer<8>.Qcnt/LTimer<9>.D10.000
cnt/LTimer<9>.Qcnt/LTimer<10>.D10.000
cnt/LTimer<9>.Qcnt/LTimer<11>.D10.000
cnt/LTimer<9>.Qcnt/LTimer<12>.D10.000
cnt/LTimer<9>.Qcnt/LTimer<13>.D10.000
cnt/LTimer<9>.Qcnt/LTimer<9>.D10.000
cnt/PORS_FSM_FFd1.Qcnt/PORS_FSM_FFd1.D10.000
cnt/PORS_FSM_FFd1.Qcnt/PORS_FSM_FFd2.D10.000
cnt/PORS_FSM_FFd1.Qcnt/nRESout.D10.000
cnt/PORS_FSM_FFd1.QnAoutOE.D10.000
cnt/PORS_FSM_FFd1.QnBR_IOB.D10.000
cnt/PORS_FSM_FFd2.Qcnt/PORS_FSM_FFd1.D10.000
cnt/PORS_FSM_FFd2.Qcnt/PORS_FSM_FFd2.D10.000
cnt/PORS_FSM_FFd2.Qcnt/nRESout.D10.000
cnt/PORS_FSM_FFd2.QnAoutOE.D10.000
cnt/PORS_FSM_FFd2.QnBR_IOB.D10.000
cnt/nRESout.Qcnt/nRESout.D10.000
nBR_IOB.QnAoutOE.D10.000
nBR_IOB.QnBR_IOB.Dram/RegUrgSync.Qram/RefUrg.D 10.000

@@ -15771,79 +2860,84 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { Destination Delay + + IOBERR.Q + IOBERR.D + 11.000 + iobm/BERRrf.Q - iobm/IOBERR.D + IOBERR.D 11.000 iobm/BERRrr.Q - iobm/IOBERR.D + IOBERR.D 11.000 iobm/DTACKrf.Q - iobm/IOBERR.D + IOBERR.D 11.000 iobm/DTACKrr.Q - iobm/IOBERR.D - 11.000 - - - iobm/IOBERR.Q - iobm/IOBERR.D + IOBERR.D 11.000 iobm/IOS_FSM_FFd1.Q - iobm/IOACT.D + IOACT.D 11.000 iobm/IOS_FSM_FFd1.Q - iobm/IOBERR.D + IOBERR.D 11.000 iobm/IOS_FSM_FFd2.Q - iobm/IOBERR.D + IOBERR.D 11.000 iobm/IOS_FSM_FFd3.Q - iobm/IOACT.D + IOACT.D 11.000 iobm/IOS_FSM_FFd3.Q - iobm/IOBERR.D + IOBERR.D 11.000 iobm/RESrf.Q - iobm/IOACT.D + IOACT.D 11.000 iobm/RESrf.Q - iobm/IOBERR.D + IOBERR.D 11.000 iobm/RESrr.Q - iobm/IOACT.D + IOACT.D 11.000 iobm/RESrr.Q - iobm/IOBERR.D + IOBERR.D 11.000 + + IOACT.Q + nVMA_IOB.D + 10.000 + iobm/BERRrf.Q - iobm/IOACT.D + IOACT.D 10.000 @@ -15853,7 +2947,7 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { iobm/BERRrr.Q - iobm/IOACT.D + IOACT.D 10.000 @@ -15861,14 +2955,9 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { iobm/IOS_FSM_FFd2.D 10.000 - - iobm/BG.Q - iobm/IOS_FSM_FFd3.D - 10.000 - iobm/DTACKrf.Q - iobm/IOACT.D + IOACT.D 10.000 @@ -15878,7 +2967,7 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { iobm/DTACKrr.Q - iobm/IOACT.D + IOACT.D 10.000 @@ -16043,12 +3132,12 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { iobm/ETACK.Q - iobm/IOACT.D + IOACT.D 10.000 iobm/ETACK.Q - iobm/IOBERR.D + IOBERR.D 10.000 @@ -16082,18 +3171,18 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { 10.000 - iobm/IOACT.Q - nVMA_IOB.D + iobm/IOREQr.Q + ALE0M.D 10.000 iobm/IOREQr.Q - iobm/ALE0.D + IOACT.D 10.000 iobm/IOREQr.Q - iobm/IOACT.D + iobm/DoutOE.D 10.000 @@ -16103,7 +3192,12 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { iobm/IOS_FSM_FFd1.Q - iobm/ALE0.D + ALE0M.D + 10.000 + + + iobm/IOS_FSM_FFd1.Q + iobm/DoutOE.D 10.000 @@ -16143,7 +3237,12 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { iobm/IOS_FSM_FFd2.Q - iobm/ALE0.D + ALE0M.D + 10.000 + + + iobm/IOS_FSM_FFd2.Q + IOACT.D 10.000 @@ -16151,11 +3250,6 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { iobm/DoutOE.D 10.000 - - iobm/IOS_FSM_FFd2.Q - iobm/IOACT.D - 10.000 - iobm/IOS_FSM_FFd2.Q iobm/IOS_FSM_FFd1.D @@ -16193,7 +3287,7 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { iobm/IOS_FSM_FFd3.Q - iobm/ALE0.D + ALE0M.D 10.000 @@ -16251,16 +3345,6 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { nVMA_IOB.D 10.000 - - iobm/nASr.Q - iobm/BG.CE - 10.000 - - - nAS_IOB.Q - iobm/nASr.D - 10.000 - nVMA_IOB.Q iobm/ETACK.D @@ -16281,6 +3365,21 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { Destination Pad Delay + + A_FSB<11> + RA<1> + 11.000 + + + A_FSB<12> + RA<2> + 11.000 + + + A_FSB<14> + RA<4> + 11.000 + A_FSB<15> RA<5> @@ -16321,6 +3420,16 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { nROMCS 11.000 + + A_FSB<2> + RA<1> + 11.000 + + + A_FSB<3> + RA<2> + 11.000 + A_FSB<5> RA<4> @@ -16331,56 +3440,21 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { RA<5> 11.000 - - A_FSB<7> - RA<6> - 11.000 - A_FSB<9> RA<8> 11.000 - - nAS_FSB - nRAMLWE - 11.000 - - - nLDS_FSB - nRAMLWE - 11.000 - - - nWE_FSB - nRAMLWE - 11.000 - A_FSB<10> RA<0> 10.000 - - A_FSB<11> - RA<1> - 10.000 - - - A_FSB<12> - RA<2> - 10.000 - A_FSB<13> RA<3> 10.000 - - A_FSB<14> - RA<4> - 10.000 - A_FSB<16> RA<6> @@ -16431,46 +3505,26 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { nDinOE 10.000 - - A_FSB<21> - nRAS - 10.000 - A_FSB<22> nDinOE 10.000 - - A_FSB<22> - nRAS - 10.000 - A_FSB<23> nDinOE 10.000 - - A_FSB<23> - nRAS - 10.000 - - - A_FSB<2> - RA<1> - 10.000 - - - A_FSB<3> - RA<2> - 10.000 - A_FSB<4> RA<3> 10.000 + + A_FSB<7> + RA<6> + 10.000 + A_FSB<8> RA<7> @@ -16486,31 +3540,11 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { nOE 10.000 - - nAS_FSB - nRAMUWE - 10.000 - - - nAS_FSB - nRAS - 10.000 - - - nAS_FSB - nROMWE - 10.000 - nAS_FSB nVPA_FSB 10.000 - - nUDS_FSB - nRAMUWE - 10.000 - nWE_FSB nDinOE @@ -16521,24 +3555,14 @@ function TS_CLK2X_IOB_nVMA_IOB_Q_to_nVMA_IOB_D() { nOE 10.000 - - nWE_FSB - nRAMUWE - 10.000 - - - nWE_FSB - nROMWE - 10.000 -

Number of paths analyzed: -400 +758
Number of Timing errors: -0 -
Analysis Completed: Sat Mar 25 00:05:47 2023 +758 +
Analysis Completed: Sun Mar 26 03:18:38 2023
diff --git a/cpld/XC95144XL/WarpSE_ngdbuild.xrpt b/cpld/XC95144XL/WarpSE_ngdbuild.xrpt index e48de28..dcb9547 100644 --- a/cpld/XC95144XL/WarpSE_ngdbuild.xrpt +++ b/cpld/XC95144XL/WarpSE_ngdbuild.xrpt @@ -5,7 +5,7 @@ The structure and the elements are likely to change over the next few releases. This means code written to parse this file will need to be revisited each subsequent release.--> - +
@@ -67,33 +67,34 @@
- - + + - - - + + + - + - + - + +
- - + + - + - + - + - - + +
diff --git a/cpld/XC95144XL/WarpSE_pad.csv b/cpld/XC95144XL/WarpSE_pad.csv index d608956..81071d7 100644 --- a/cpld/XC95144XL/WarpSE_pad.csv +++ b/cpld/XC95144XL/WarpSE_pad.csv @@ -1,7 +1,7 @@ Release 8.1i - Fit P.20131013 Copyright(c) 1995-2003 Xilinx Inc. All rights reserved - 3-25-2023 0:52AM + 3-26-2023 4:30AM NOTE: This file is designed to be imported into a spreadsheet program such as Microsoft Excel for viewing, printing and sorting. The comma ',' diff --git a/cpld/XC95144XL/WarpSE_summary.html b/cpld/XC95144XL/WarpSE_summary.html index 61e962a..8b1927b 100644 --- a/cpld/XC95144XL/WarpSE_summary.html +++ b/cpld/XC95144XL/WarpSE_summary.html @@ -2,7 +2,7 @@
- + @@ -65,9 +65,9 @@ System Settings - - - + + +
WarpSE Project Status (03/25/2023 - 00:52:44)
WarpSE Project Status (03/26/2023 - 04:30:29)
Project File: WarpSE.xise
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis ReportCurrentSat Mar 25 00:52:16 202305 Warnings (0 new)0
Translation ReportCurrentSat Mar 25 00:52:22 2023000
CPLD Fitter Report (Text)CurrentSat Mar 25 00:52:35 202305 Warnings (1 new)3 Infos (3 new)
Synthesis ReportCurrentSun Mar 26 04:30:02 202305 Warnings (0 new)0
Translation ReportCurrentSun Mar 26 04:30:07 2023000
CPLD Fitter Report (Text)CurrentSun Mar 26 04:30:20 202305 Warnings (1 new)3 Infos (3 new)
Power Report     
 
@@ -77,5 +77,5 @@ System Settings
-
Date Generated: 03/25/2023 - 00:52:44
+
Date Generated: 03/26/2023 - 04:30:29
\ No newline at end of file diff --git a/cpld/XC95144XL/WarpSE_tim.html b/cpld/XC95144XL/WarpSE_tim.html deleted file mode 100644 index 660759c..0000000 --- a/cpld/XC95144XL/WarpSE_tim.html +++ /dev/null @@ -1 +0,0 @@ -CPLD Timing Report (Text)
CPLD Timing Report (Text)
Mon Mar 28 09:30:32 2022


                           Performance Summary Report
                           --------------------------

Design:     WarpSE
Device:     XC95144XL-10-TQ100
Speed File: Version 3.0
Program:    Timing Report Generator:  version P.20131013
Date:       Mon Mar 28 09:28:06 2022

Timing Constraint Summary:

TS_CLK_IOB=PERIOD:CLK_IOB:142.857nS:HIGH:71.428nS                            N/A
TS_CLK_FSB=PERIOD:CLK_FSB:40.000nS:HIGH:20.000nS                             Met
TS_CLK2X_IOB=PERIOD:CLK2X_IOB:66.666nS:HIGH:33.333nS                         Met

Performance Summary:

Pad to Pad (tPD)                          :         11.0ns (1 macrocell levels)
Pad 'A_FSB<11>' to Pad 'RA<1>'                                    

Clock net 'CLK_IOB' path delays:

Setup to Clock at the Pad (tSU)           :          6.5ns (0 macrocell levels)
Data signal 'E_IOB' to DFF D input Pin at 'iobm/Er.D'
Clock pad 'CLK_IOB'                                                       (GCK)

                          Minimum Clock Period: 9.0ns
                     Maximum Internal Clock Speed: 111.1Mhz
                         (Limited by Clock Pulse Width)

Clock net 'CLK_FSB' path delays:

Clock Pad to Output Pad (tCO)             :         14.5ns (2 macrocell levels)
Clock Pad 'CLK_FSB' to Output Pad 'RA<1>'                                 (GCK)

Clock to Setup (tCYC)                     :         20.1ns (2 macrocell levels)
Clock to Q, net 'cs/nOverlay1.Q' to DFF Setup(D) at 'fsb/VPA.D'           (GCK)
Target FF drives output net 'fsb/VPA'

Setup to Clock at the Pad (tSU)           :         16.6ns (1 macrocell levels)
Data signal 'A_FSB<23>' to DFF D input Pin at 'fsb/VPA.D'
Clock pad 'CLK_FSB'                                                       (GCK)

                          Minimum Clock Period: 20.1ns
                     Maximum Internal Clock Speed: 49.7Mhz
                            (Limited by Cycle Time)

Clock net 'CLK2X_IOB' path delays:

Clock Pad to Output Pad (tCO)             :         14.5ns (2 macrocell levels)
Clock Pad 'CLK2X_IOB' to Output Pad 'nVMA_IOB'                            (GCK)

Clock to Setup (tCYC)                     :         11.0ns (1 macrocell levels)
Clock to Q, net 'iobm/IOS_FSM_FFd3.Q' to DFF Setup(D) at 'IOACT.D'        (GCK)
Target FF drives output net 'IOACT'

Setup to Clock at the Pad (tSU)           :          7.5ns (0 macrocell levels)
Data signal 'CLK_IOB' to DFF D input Pin at 'IOACT.D'
Clock pad 'CLK2X_IOB'                                                     (GCK)

                          Minimum Clock Period: 11.0ns
                     Maximum Internal Clock Speed: 90.9Mhz
                            (Limited by Cycle Time)

--------------------------------------------------------------------------------
                            Pad to Pad (tPD) (nsec)

\ From        A     A     A     A     A     A     A     A     A     A     A
 \            _     _     _     _     _     _     _     _     _     _     _
  \           F     F     F     F     F     F     F     F     F     F     F
   \          S     S     S     S     S     S     S     S     S     S     S
    \         B     B     B     B     B     B     B     B     B     B     B
     \        <     <     <     <     <     <     <     <     <     <     <
      \       1     1     1     1     1     1     1     1     1     1     1
       \      0     1     2     3     4     5     6     7     8     9     >
        \     >     >     >     >     >     >     >     >     >     >      
  To     \------------------------------------------------------------------

CLK20EN                                                                    
CLK25EN                                                                    
RA<0>      10.0                                                        10.0
RA<10>                                                                     
RA<11>                                                           10.0      
RA<1>            11.0                                                      
RA<2>                  11.0                                                
RA<3>                        10.0                                          
RA<4>                              11.0                                    
RA<5>                                    11.0                              
RA<6>                                          10.0                        
RA<7>                                                10.0                  
RA<8>                                                      10.0            
RA<9>                                                            10.0      
nBERR_FSB                                                                  
nDinOE                                                                     
nOE                                                                        
nRAMLWE                                                                    
nRAMUWE                                                                    
nRAS                                                                       
nROMCS                                                                     
nROMWE                                                                     
nVPA_FSB                                                                   

--------------------------------------------------------------------------------
                            Pad to Pad (tPD) (nsec)

\ From        A     A     A     A     A     A     A     A     A     A     A
 \            _     _     _     _     _     _     _     _     _     _     _
  \           F     F     F     F     F     F     F     F     F     F     F
   \          S     S     S     S     S     S     S     S     S     S     S
    \         B     B     B     B     B     B     B     B     B     B     B
     \        <     <     <     <     <     <     <     <     <     <     <
      \       2     2     2     2     2     3     4     5     6     7     8
       \      0     1     2     3     >     >     >     >     >     >     >
        \     >     >     >     >                                          
  To     \------------------------------------------------------------------

CLK20EN                                                                    
CLK25EN                                                                    
RA<0>                                                                      
RA<10>           10.0                                                      
RA<11>                                                                     
RA<1>                              11.0                                    
RA<2>                                    11.0                              
RA<3>                                          10.0                        
RA<4>                                                11.0                  
RA<5>                                                      11.0            
RA<6>                                                            10.0      
RA<7>                                                                  10.0
RA<8>            11.0  11.0  11.0                                          
RA<9>      10.0                                                            
nBERR_FSB  11.0  11.0  11.0  11.0                                          
nDinOE     10.0  10.0  10.0  10.0                                          
nOE                                                                        
nRAMLWE                                                                    
nRAMUWE                                                                    
nRAS             11.0  11.0  11.0                                          
nROMCS     11.0  11.0  11.0  11.0                                          
nROMWE                                                                     
nVPA_FSB                                                                   

--------------------------------------------------------------------------------
                            Pad to Pad (tPD) (nsec)

\ From        A     S     S     n     n     n     n
 \            _     W     W     A     L     U     W
  \           F     <     <     S     D     D     E
   \          S     0     1     _     S     S     _
    \         B     >     >     F     _     _     F
     \        <                 S     F     F     S
      \       9                 B     S     S     B
       \      >                       B     B      
        \                                          
  To     \------------------------------------------

CLK20EN          10.0                              
CLK25EN          10.0                              
RA<0>                                              
RA<10>                                             
RA<11>                                             
RA<1>                                              
RA<2>                                              
RA<3>                                              
RA<4>                                              
RA<5>                                              
RA<6>                                              
RA<7>                                              
RA<8>      11.0                                    
RA<9>                                              
nBERR_FSB                    10.0                  
nDinOE                 10.0  10.0              10.0
nOE                          10.0              10.0
nRAMLWE                      10.0  10.0        10.0
nRAMUWE                      11.0        11.0  11.0
nRAS                         11.0                  
nROMCS                 11.0                        
nROMWE                       10.0              10.0
nVPA_FSB                     10.0                  

--------------------------------------------------------------------------------
                      Clock Pad to Output Pad (tCO) (nsec)

\ From         C     C
 \             L     L
  \            K     K
   \           2     _
    \          X     F
     \         _     S
      \        I     B
       \       O      
        \      B      
         \            
  To      \------------

RA<0>             13.5
RA<1>             14.5
RA<2>             14.5
RA<3>             13.5
RA<4>             14.5
RA<5>             14.5
RA<6>             13.5
RA<7>             13.5
RA<8>             14.5
RA<9>             13.5
nADoutLE0   13.5  13.5
nADoutLE1          5.8
nAS_IOB     14.5      
nAoutOE      5.8      
nBERR_FSB         14.5
nBR_IOB            5.8
nCAS               5.8
nDTACK_FSB         5.8
nDinLE       5.8      
nDoutOE      5.8      
nLDS_IOB    14.5      
nRAMLWE           13.5
nRAMUWE           14.5
nRAS              14.5
nROMCS            14.5
nUDS_IOB    14.5      
nVMA_IOB    14.5      
nVPA_FSB          13.5

--------------------------------------------------------------------------------
                   Setup to Clock at Pad (tSU or tSUF) (nsec)

\ From         C     C     C
 \             L     L     L
  \            K     K     K
   \           2     _     _
    \          X     F     I
     \         _     S     O
      \        I     B     B
       \       O            
        \      B            
         \                  
  To      \------------------

A_FSB<10>          7.9      
A_FSB<11>          7.9      
A_FSB<12>          7.9      
A_FSB<13>          7.9      
A_FSB<14>          7.9      
A_FSB<15>          7.9      
A_FSB<16>          7.9      
A_FSB<17>          7.9      
A_FSB<18>          7.9      
A_FSB<19>          7.9      
A_FSB<20>         15.6      
A_FSB<21>         16.6      
A_FSB<22>         16.6      
A_FSB<23>         16.6      
A_FSB<8>           7.9      
A_FSB<9>           7.9      
CLK_IOB      7.5            
E_IOB                    6.5
SW<1>              7.9      
nAS_FSB           15.6      
nBERR_IOB    7.5            
nBG_IOB      6.5            
nDTACK_IOB   6.5            
nIPL2              6.5      
nLDS_FSB           6.5      
nRES         6.5   6.5      
nUDS_FSB           6.5      
nVPA_IOB     6.5            
nWE_FSB            7.9      

--------------------------------------------------------------------------------
                          Clock to Setup (tCYC) (nsec)
                                (Clock: CLK_FSB)

\ From                 B     I     I     I     R     R     R     R     R     T
 \                     E     O     P     P     E     E     E     E     e     i
  \                    R     R     L     L     S     S     S     S     f     m
   \                   R     W     2     2     D     r     r     r     A     e
    \                  _     0     r     r     o     0     1     2     c     o
     \                 I     .     0     1     n     .     .     .     k     u
      \                O     Q     .     .     e     Q     Q     Q     .     t
       \               B           Q     Q     .                       Q     A
        \              S                       Q                             .
         \             .                                                     Q
          \            Q                                                      
           \                                                                  
            \                                                                 
             \                                                                
              \                                                               
               \                                                              
                \                                                             
                 \                                                            
  To              \------------------------------------------------------------

ALE0S.D                                                                       
BERR_IOBS.D         10.0                                                      
IOL0.CE                                                                       
IOL0.D                                                                        
IOREQ.D                                                                       
IORW0.D                   11.4                                                
IOU0.CE                                                                       
IOU0.D                                                                        
IPL2r1.D                        10.0                                          
RESDone.CE                                        10.0  10.0  10.0            
RESr1.D                                           10.0                        
RESr2.D                                                 10.0                  
RefAck.D                                                                      
TimeoutA.D                                                                10.0
TimeoutB.D                                                                    
cnt/RefCnt<1>.D                                                               
cnt/RefCnt<2>.D                                                               
cnt/RefCnt<3>.D                                                               
cnt/RefCnt<4>.D                                                               
cnt/RefCnt<5>.D                                                               
cnt/RefCnt<6>.D                                                               
cnt/RefCnt<7>.D                                                               
cnt/RefDone.D                                                       10.0      
cnt/TimeoutBPre.D                                                             
cs/nOverlay0.D                                                                
cs/nOverlay1.CE                                                               
cs/nOverlay1.D                                                                
fsb/BERR0r.D                                                                  
fsb/BERR1r.D        10.0                                                      
fsb/Ready0r.D                                                                 
fsb/Ready1r.D                                                                 
fsb/Ready2r.D                                                             11.0
fsb/VPA.D           11.4                                                  11.4
iobs/Clear1.D                                                                 
iobs/IOL1.CE                                                                  
iobs/IORW1.D                                                                  
iobs/IOReady.D                                                                
iobs/IOU1.CE                                                                  
iobs/Load1.D                                                                  
iobs/Once.D                                                                   
iobs/PS_FSM_FFd1.D                                                            
iobs/PS_FSM_FFd2.D                                                            
nADoutLE1.D                                                                   
nBR_IOB.CE                      10.0  10.0  10.0  10.0  10.0  10.0            
nCAS.D                                                                        
nDTACK_FSB.D        11.4                                                  11.4
ram/BACTr.D                                                                   
ram/Once.D                                                                    
ram/RAMDIS1.D                                                                 
ram/RAMDIS2.D                                                                 
ram/RAMReady.D                                                                
ram/RASEL.D                                                                   
ram/RS_FSM_FFd1.D                                                             
ram/RS_FSM_FFd2.D                                                             
ram/RS_FSM_FFd3.D                                                             

--------------------------------------------------------------------------------
                          Clock to Setup (tCYC) (nsec)
                                (Clock: CLK_FSB)

\ From                 T     c     c     c     c     c     c     c     c     c
 \                     i     n     n     n     n     n     n     n     n     n
  \                    m     t     t     t     t     t     t     t     t     t
   \                   e     /     /     /     /     /     /     /     /     /
    \                  o     R     R     R     R     R     R     R     R     R
     \                 u     e     e     e     e     e     e     e     e     e
      \                t     f     f     f     f     f     f     f     f     f
       \               B     C     C     C     C     C     C     C     C     D
        \              .     n     n     n     n     n     n     n     n     o
         \             Q     t     t     t     t     t     t     t     t     n
          \                  <     <     <     <     <     <     <     <     e
           \                 0     1     2     3     4     5     6     7     .
            \                >     >     >     >     >     >     >     >     Q
             \               .     .     .     .     .     .     .     .      
              \              Q     Q     Q     Q     Q     Q     Q     Q      
               \                                                              
                \                                                             
                 \                                                            
  To              \------------------------------------------------------------

ALE0S.D                                                                       
BERR_IOBS.D                                                                   
IOL0.CE                                                                       
IOL0.D                                                                        
IOREQ.D                                                                       
IORW0.D                                                                       
IOU0.CE                                                                       
IOU0.D                                                                        
IPL2r1.D                                                                      
RESDone.CE                                                                    
RESr1.D                                                                       
RESr2.D                                                                       
RefAck.D                                                                      
TimeoutA.D                10.0  10.0  10.0  10.0  10.0  10.0  10.0            
TimeoutB.D          10.0  10.0  10.0  10.0  10.0  10.0  10.0  10.0  10.0      
cnt/RefCnt<1>.D           10.0                                                
cnt/RefCnt<2>.D           10.0  10.0                                          
cnt/RefCnt<3>.D           10.0  10.0  10.0                                    
cnt/RefCnt<4>.D           10.0  10.0  10.0  10.0                              
cnt/RefCnt<5>.D           10.0  10.0  10.0  10.0  10.0                        
cnt/RefCnt<6>.D           10.0  10.0  10.0  10.0  10.0  10.0                  
cnt/RefCnt<7>.D           10.0  10.0  10.0  10.0  10.0  10.0  10.0            
cnt/RefDone.D             10.0  10.0  10.0  10.0  10.0  10.0  10.0  10.0  10.0
cnt/TimeoutBPre.D         10.0  10.0  10.0  10.0  10.0  10.0  10.0  10.0      
cs/nOverlay0.D                                                                
cs/nOverlay1.CE                                                               
cs/nOverlay1.D                                                                
fsb/BERR0r.D        10.0                                                      
fsb/BERR1r.D                                                                  
fsb/Ready0r.D                                                                 
fsb/Ready1r.D                                                                 
fsb/Ready2r.D                                                                 
fsb/VPA.D           19.1                                                      
iobs/Clear1.D                                                                 
iobs/IOL1.CE                                                                  
iobs/IORW1.D                                                                  
iobs/IOReady.D                                                                
iobs/IOU1.CE                                                                  
iobs/Load1.D                                                                  
iobs/Once.D                                                                   
iobs/PS_FSM_FFd1.D                                                            
iobs/PS_FSM_FFd2.D                                                            
nADoutLE1.D                                                                   
nBR_IOB.CE                                                                    
nCAS.D                                                                        
nDTACK_FSB.D        19.1                                                      
ram/BACTr.D                                                                   
ram/Once.D                                                                    
ram/RAMDIS1.D                                           11.4  11.4  11.4  11.4
ram/RAMDIS2.D                                           11.0  11.0  11.0  11.0
ram/RAMReady.D                                          11.4  11.4  11.4  11.4
ram/RASEL.D                                             11.4  11.4  11.4  11.4
ram/RS_FSM_FFd1.D                                                             
ram/RS_FSM_FFd2.D                                       11.4  11.4  11.4  11.4
ram/RS_FSM_FFd3.D                                       11.0  11.0  11.0  11.0

--------------------------------------------------------------------------------
                          Clock to Setup (tCYC) (nsec)
                                (Clock: CLK_FSB)

\ From                 c     c     c     f     f     f     f     f     f     f
 \                     n     s     s     s     s     s     s     s     s     s
  \                    t     /     /     b     b     b     b     b     b     b
   \                   /     n     n     /     /     /     /     /     /     /
    \                  T     O     O     A     B     B     R     R     R     V
     \                 i     v     v     S     E     E     e     e     e     P
      \                m     e     e     r     R     R     a     a     a     A
       \               e     r     r     f     R     R     d     d     d     .
        \              o     l     l     .     0     1     y     y     y     Q
         \             u     a     a     Q     r     r     0     1     2      
          \            t     y     y           .     .     r     r     r      
           \           B     0     1           Q     Q     .     .     .      
            \          P     .     .                       Q     Q     Q      
             \         r     Q     Q                                          
              \        e                                                      
               \       .                                                      
                \      Q                                                      
                 \                                                            
  To              \------------------------------------------------------------

ALE0S.D                                                                       
BERR_IOBS.D                           10.0                                    
IOL0.CE                                                                       
IOL0.D                                                                        
IOREQ.D                         11.0  10.0                                    
IORW0.D                         10.0  11.0                                    
IOU0.CE                                                                       
IOU0.D                                                                        
IPL2r1.D                                                                      
RESDone.CE                                                                    
RESr1.D                                                                       
RESr2.D                                                                       
RefAck.D                                                                      
TimeoutA.D                            10.0                                    
TimeoutB.D          10.0              10.0                                    
cnt/RefCnt<1>.D                                                               
cnt/RefCnt<2>.D                                                               
cnt/RefCnt<3>.D                                                               
cnt/RefCnt<4>.D                                                               
cnt/RefCnt<5>.D                                                               
cnt/RefCnt<6>.D                                                               
cnt/RefCnt<7>.D                                                               
cnt/RefDone.D                                                                 
cnt/TimeoutBPre.D   10.0              10.0                                    
cs/nOverlay0.D            10.0        10.0                                    
cs/nOverlay1.CE                       10.0                                    
cs/nOverlay1.D            10.0                                                
fsb/BERR0r.D                          10.0  10.0                              
fsb/BERR1r.D                          10.0        10.0                        
fsb/Ready0r.D                   10.0  10.0              10.0                  
fsb/Ready1r.D                   11.0  10.0                    11.0            
fsb/Ready2r.D                   11.0  11.0                          11.0      
fsb/VPA.D                       20.1  19.1  11.4  11.4  20.1  11.4  11.4  11.4
iobs/Clear1.D                                                                 
iobs/IOL1.CE                                                                  
iobs/IORW1.D                    11.4  11.0                                    
iobs/IOReady.D                        10.0                                    
iobs/IOU1.CE                                                                  
iobs/Load1.D                    11.0  10.0                                    
iobs/Once.D                     11.4  10.0                                    
iobs/PS_FSM_FFd1.D                                                            
iobs/PS_FSM_FFd2.D              11.0  10.0                                    
nADoutLE1.D                                                                   
nBR_IOB.CE                                                                    
nCAS.D                                                                        
nDTACK_FSB.D                    20.1  11.0  11.4  11.4  20.1  11.4  11.4      
ram/BACTr.D                           10.0                                    
ram/Once.D                      10.0  10.0                                    
ram/RAMDIS1.D                   11.4  11.0                                    
ram/RAMDIS2.D                   11.0  11.0                                    
ram/RAMReady.D                  11.0  11.0                                    
ram/RASEL.D                     11.4  11.4                                    
ram/RS_FSM_FFd1.D               10.0  10.0                                    
ram/RS_FSM_FFd2.D               11.4  11.4                                    
ram/RS_FSM_FFd3.D               11.0  11.0                                    

--------------------------------------------------------------------------------
                          Clock to Setup (tCYC) (nsec)
                                (Clock: CLK_FSB)

\ From                 i     i     i     i     i     i     i     i     i     i
 \                     o     o     o     o     o     o     o     o     o     o
  \                    b     b     b     b     b     b     b     b     b     b
   \                   s     s     s     s     s     s     s     s     s     s
    \                  /     /     /     /     /     /     /     /     /     /
     \                 C     I     I     I     I     I     L     O     P     P
      \                l     O     O     O     O     O     o     n     S     S
       \               e     A     L     R     R     U     a     c     _     _
        \              a     C     1     W     e     1     d     e     F     F
         \             r     T     .     1     a     .     1     .     S     S
          \            1     r     Q     .     d     Q     .     Q     M     M
           \           .     .           Q     y           Q           _     _
            \          Q     Q                 .                       F     F
             \                                 Q                       F     F
              \                                                        d     d
               \                                                       1     2
                \                                                      .     .
                 \                                                     Q     Q
  To              \------------------------------------------------------------

ALE0S.D                                                             10.0  10.0
BERR_IOBS.D               10.0                                10.0        10.0
IOL0.CE                                                             10.0  10.0
IOL0.D                          10.0                                          
IOREQ.D                   10.0                                10.0  10.0  11.0
IORW0.D                               11.0                    11.4  11.4  11.4
IOU0.CE                                                             10.0  10.0
IOU0.D                                            10.0                        
IPL2r1.D                                                                      
RESDone.CE                                                                    
RESr1.D                                                                       
RESr2.D                                                                       
RefAck.D                                                                      
TimeoutA.D                                                                    
TimeoutB.D                                                                    
cnt/RefCnt<1>.D                                                               
cnt/RefCnt<2>.D                                                               
cnt/RefCnt<3>.D                                                               
cnt/RefCnt<4>.D                                                               
cnt/RefCnt<5>.D                                                               
cnt/RefCnt<6>.D                                                               
cnt/RefCnt<7>.D                                                               
cnt/RefDone.D                                                                 
cnt/TimeoutBPre.D                                                             
cs/nOverlay0.D                                                                
cs/nOverlay1.CE                                                               
cs/nOverlay1.D                                                                
fsb/BERR0r.D                                                                  
fsb/BERR1r.D                                                                  
fsb/Ready0r.D                                                                 
fsb/Ready1r.D                               11.0                              
fsb/Ready2r.D                                                                 
fsb/VPA.D                                   11.4                              
iobs/Clear1.D                                                       10.0  10.0
iobs/IOL1.CE                                            10.0                  
iobs/IORW1.D                          10.0                    10.0  11.0  11.0
iobs/IOReady.D            10.0              10.0              10.0        10.0
iobs/IOU1.CE                                            10.0                  
iobs/Load1.D                                                  10.0  10.0  10.0
iobs/Once.D                                                   11.4  11.0  10.0
iobs/PS_FSM_FFd1.D        10.0                                      10.0  10.0
iobs/PS_FSM_FFd2.D        10.0                                10.0  11.0  11.0
nADoutLE1.D         10.0                                10.0                  
nBR_IOB.CE                                                                    
nCAS.D                                                                        
nDTACK_FSB.D                                11.4                              
ram/BACTr.D                                                                   
ram/Once.D                                                                    
ram/RAMDIS1.D                                                                 
ram/RAMDIS2.D                                                                 
ram/RAMReady.D                                                                
ram/RASEL.D                                                                   
ram/RS_FSM_FFd1.D                                                             
ram/RS_FSM_FFd2.D                                                             
ram/RS_FSM_FFd3.D                                                             

--------------------------------------------------------------------------------
                          Clock to Setup (tCYC) (nsec)
                                (Clock: CLK_FSB)

\ From                 n     n     n     r     r     r     r     r     r     r
 \                     A     B     D     a     a     a     a     a     a     a
  \                    D     R     T     m     m     m     m     m     m     m
   \                   o     _     A     /     /     /     /     /     /     /
    \                  u     I     C     B     O     R     R     R     R     R
     \                 t     O     K     A     n     A     A     A     S     S
      \                L     B     _     C     c     M     M     S     _     _
       \               E     .     F     T     e     D     R     E     F     F
        \              1     Q     S     r     .     I     e     L     S     S
         \             .           B     .     Q     S     a     .     M     M
          \            Q           .     Q           2     d     Q     _     _
           \                       Q                 .     y           F     F
            \                                        Q     .           F     F
             \                                             Q           d     d
              \                                                        1     2
               \                                                       .     .
                \                                                      Q     Q
                 \                                                            
  To              \------------------------------------------------------------

ALE0S.D                                                                       
BERR_IOBS.D         10.0                                                      
IOL0.CE                                                                       
IOL0.D              10.0                                                      
IOREQ.D             11.0                                                      
IORW0.D             11.4                                                      
IOU0.CE                                                                       
IOU0.D              10.0                                                      
IPL2r1.D                                                                      
RESDone.CE                                                                    
RESr1.D                                                                       
RESr2.D                                                                       
RefAck.D                                                            10.0  10.0
TimeoutA.D                                                                    
TimeoutB.D                                                                    
cnt/RefCnt<1>.D                                                               
cnt/RefCnt<2>.D                                                               
cnt/RefCnt<3>.D                                                               
cnt/RefCnt<4>.D                                                               
cnt/RefCnt<5>.D                                                               
cnt/RefCnt<6>.D                                                               
cnt/RefCnt<7>.D                                                               
cnt/RefDone.D                                                                 
cnt/TimeoutBPre.D                                                             
cs/nOverlay0.D                                                                
cs/nOverlay1.CE                                                               
cs/nOverlay1.D                                                                
fsb/BERR0r.D                                                                  
fsb/BERR1r.D                                                                  
fsb/Ready0r.D                                           10.0                  
fsb/Ready1r.D       11.0                                                      
fsb/Ready2r.D                                                                 
fsb/VPA.D           11.0  11.4                          20.1                  
iobs/Clear1.D       10.0                                                      
iobs/IOL1.CE                                                                  
iobs/IORW1.D        10.0                                                      
iobs/IOReady.D      10.0                                                      
iobs/IOU1.CE                                                                  
iobs/Load1.D        10.0                                                      
iobs/Once.D         11.0                                                      
iobs/PS_FSM_FFd1.D                                                            
iobs/PS_FSM_FFd2.D  11.0                                                      
nADoutLE1.D         10.0                                                      
nBR_IOB.CE                                                                    
nCAS.D                                                        10.0            
nDTACK_FSB.D        11.0  11.4  11.4                    20.1                  
ram/BACTr.D                                                                   
ram/Once.D                                  10.0                    10.0  10.0
ram/RAMDIS1.D                         11.0  11.0                    11.4  11.0
ram/RAMDIS2.D                               11.0  11.0              11.0  11.0
ram/RAMReady.D                        11.0  11.0                    11.0  11.0
ram/RASEL.D                           11.0  11.4                    11.4  11.4
ram/RS_FSM_FFd1.D                           10.0                    10.0  10.0
ram/RS_FSM_FFd2.D                     11.0                          11.4  11.4
ram/RS_FSM_FFd3.D                           10.0                    11.0  11.0

--------------------------------------------------------------------------------
                          Clock to Setup (tCYC) (nsec)
                                (Clock: CLK_FSB)

\ From                 r
 \                     a
  \                    m
   \                   /
    \                  R
     \                 S
      \                _
       \               F
        \              S
         \             M
          \            _
           \           F
            \          F
             \         d
              \        3
               \       .
                \      Q
                 \      
  To              \------

ALE0S.D                 
BERR_IOBS.D             
IOL0.CE                 
IOL0.D                  
IOREQ.D                 
IORW0.D                 
IOU0.CE                 
IOU0.D                  
IPL2r1.D                
RESDone.CE              
RESr1.D                 
RESr2.D                 
RefAck.D                
TimeoutA.D              
TimeoutB.D              
cnt/RefCnt<1>.D         
cnt/RefCnt<2>.D         
cnt/RefCnt<3>.D         
cnt/RefCnt<4>.D         
cnt/RefCnt<5>.D         
cnt/RefCnt<6>.D         
cnt/RefCnt<7>.D         
cnt/RefDone.D           
cnt/TimeoutBPre.D       
cs/nOverlay0.D          
cs/nOverlay1.CE         
cs/nOverlay1.D          
fsb/BERR0r.D            
fsb/BERR1r.D            
fsb/Ready0r.D           
fsb/Ready1r.D           
fsb/Ready2r.D           
fsb/VPA.D               
iobs/Clear1.D           
iobs/IOL1.CE            
iobs/IORW1.D            
iobs/IOReady.D          
iobs/IOU1.CE            
iobs/Load1.D            
iobs/Once.D             
iobs/PS_FSM_FFd1.D      
iobs/PS_FSM_FFd2.D      
nADoutLE1.D             
nBR_IOB.CE              
nCAS.D                  
nDTACK_FSB.D            
ram/BACTr.D             
ram/Once.D          10.0
ram/RAMDIS1.D       11.0
ram/RAMDIS2.D       11.0
ram/RAMReady.D      11.0
ram/RASEL.D         11.0
ram/RS_FSM_FFd1.D   10.0
ram/RS_FSM_FFd2.D   11.4
ram/RS_FSM_FFd3.D   11.0

--------------------------------------------------------------------------------
                          Clock to Setup (tCYC) (nsec)
                               (Clock: CLK2X_IOB)

\ From                  I     I     i     i     i     i     i     i     i     i
 \                      O     O     o     o     o     o     o     o     o     o
  \                     A     B     b     b     b     b     b     b     b     b
   \                    C     E     m     m     m     m     m     m     m     m
    \                   T     R     /     /     /     /     /     /     /     /
     \                  .     R     B     B     B     B     D     D     E     E
      \                 Q     .     E     E     G     G     T     T     S     S
       \                      Q     R     R     r     r     A     A     <     <
        \                           R     R     0     1     C     C     0     1
         \                          r     r     .     .     K     K     >     >
          \                         f     r     Q     Q     r     r     .     .
           \                        .     .                 f     r     Q     Q
            \                       Q     Q                 .     .            
             \                                              Q     Q            
              \                                                                
               \                                                               
                \                                                              
                 \                                                             
                  \                                                            
  To               \------------------------------------------------------------

ALE0M.D                                                                        
IOACT.D                          10.0  10.0              11.0  11.0            
IOBERR.D                   11.0  11.0  11.0              11.0  11.0            
iobm/BGr1.D                                  10.0                              
iobm/ES<0>.D                                                         10.0  10.0
iobm/ES<1>.D                                                         10.0  10.0
iobm/ES<2>.D                                                         10.0  10.0
iobm/ES<3>.D                                                         10.0  10.0
iobm/ES<4>.D                                                         10.0  10.0
iobm/ETACK.D                                                         10.0  10.0
iobm/IOS_FSM_FFd1.D                                                            
iobm/IOS_FSM_FFd2.D              10.0  10.0              10.0  10.0            
iobm/IOS_FSM_FFd3.D                                                            
nAS_IOB.D                                                                      
nAoutOE.D                                    10.0  10.0                        
nDinLE.D                                                                       
nDoutOE.D                                                                      
nLDS_IOB.D                                                                     
nUDS_IOB.D                                                                     
nVMA_IOB.D           10.0                                            10.0  10.0

--------------------------------------------------------------------------------
                          Clock to Setup (tCYC) (nsec)
                               (Clock: CLK2X_IOB)

\ From                  i     i     i     i     i     i     i     i     i     i
 \                      o     o     o     o     o     o     o     o     o     o
  \                     b     b     b     b     b     b     b     b     b     b
   \                    m     m     m     m     m     m     m     m     m     m
    \                   /     /     /     /     /     /     /     /     /     /
     \                  E     E     E     E     E     I     I     I     I     R
      \                 S     S     S     T     r     O     O     O     O     E
       \                <     <     <     A     2     R     S     S     S     S
        \               2     3     4     C     .     E     _     _     _     r
         \              >     >     >     K     Q     Q     F     F     F     f
          \             .     .     .     .           r     S     S     S     .
           \            Q     Q     Q     Q           .     M     M     M     Q
            \                                         Q     _     _     _      
             \                                              F     F     F      
              \                                             F     F     F      
               \                                            d     d     d      
                \                                           1     2     3      
                 \                                          .     .     .      
                  \                                         Q     Q     Q      
  To               \------------------------------------------------------------

ALE0M.D                                            10.0  10.0  10.0  10.0      
IOACT.D                                10.0        10.0  11.0  10.0  11.0  11.0
IOBERR.D                               10.0              11.0  11.0  11.0  11.0
iobm/BGr1.D                                                                    
iobm/ES<0>.D         10.0  10.0  10.0        10.0                              
iobm/ES<1>.D                                 10.0                              
iobm/ES<2>.D         10.0  10.0  10.0        10.0                              
iobm/ES<3>.D         10.0  10.0              10.0                              
iobm/ES<4>.D         10.0  10.0  10.0        10.0                              
iobm/ETACK.D         10.0  10.0  10.0                                          
iobm/IOS_FSM_FFd1.D                                      10.0  10.0  10.0      
iobm/IOS_FSM_FFd2.D                    10.0              10.0  10.0  10.0  10.0
iobm/IOS_FSM_FFd3.D                                10.0  10.0  10.0  10.0      
nAS_IOB.D                                                10.0  10.0  10.0      
nAoutOE.D                                                                      
nDinLE.D                                                 10.0  10.0            
nDoutOE.D                                                      10.0  10.0      
nLDS_IOB.D                                               10.0  10.0  10.0      
nUDS_IOB.D                                               10.0  10.0  10.0      
nVMA_IOB.D           10.0  10.0  10.0                                          

--------------------------------------------------------------------------------
                          Clock to Setup (tCYC) (nsec)
                               (Clock: CLK2X_IOB)

\ From                  i     i     i     n     n     n
 \                      o     o     o     A     A     V
  \                     b     b     b     S     o     M
   \                    m     m     m     _     u     A
    \                   /     /     /     I     t     _
     \                  R     V     V     O     O     I
      \                 E     P     P     B     E     O
       \                S     A     A     .     .     B
        \               r     r     r     Q     Q     .
         \              r     f     r                 Q
          \             .     .     .                  
           \            Q     Q     Q                  
            \                                          
             \                                         
              \                                        
               \                                       
                \                                      
                 \                                     
                  \                                    
  To               \------------------------------------

ALE0M.D                                      10.0      
IOACT.D              11.0                    10.0      
IOBERR.D             11.0                              
iobm/BGr1.D                                            
iobm/ES<0>.D                                           
iobm/ES<1>.D                                           
iobm/ES<2>.D                                           
iobm/ES<3>.D                                           
iobm/ES<4>.D                                           
iobm/ETACK.D                                       10.0
iobm/IOS_FSM_FFd1.D                                    
iobm/IOS_FSM_FFd2.D  10.0                              
iobm/IOS_FSM_FFd3.D                          10.0      
nAS_IOB.D                                              
nAoutOE.D                              10.0  10.0      
nDinLE.D                                               
nDoutOE.D                                              
nLDS_IOB.D                                             
nUDS_IOB.D                                             
nVMA_IOB.D                 10.0  10.0              10.0

Path Type Definition: 

Pad to Pad (tPD) -                        Reports pad to pad paths that start 
                                          at input pads and end at output pads. 
                                          Paths are not traced through 
                                          registers. 

Clock Pad to Output Pad (tCO) -           Reports paths that start at input 
                                          pads trace through clock inputs of 
                                          registers and end at output pads. 
                                          Paths are not traced through PRE/CLR 
                                          inputs of registers. 

Setup to Clock at Pad (tSU or tSUF) -     Reports external setup time of data 
                                          to clock at pad. Data path starts at 
                                          an input pad and ends at register 
                                          (Fast Input Register for tSUF) D/T 
                                          input. Clock path starts at input pad 
                                          and ends at the register clock input. 
                                          Paths are not traced through 
                                          registers. Pin-to-pin setup 
                                          requirement is not reported or 
                                          guaranteed for product-term clocks 
                                          derived from macrocell feedback 
                                          signals. 

Clock to Setup (tCYC) -                   Register to register cycle time. 
                                          Include source register tCO and 
                                          destination register tSU. Note that 
                                          when the computed Maximum Clock Speed 
                                          is limited by tCYC it is computed 
                                          assuming that all registers are 
                                          rising-edge sensitive. 

\ No newline at end of file diff --git a/cpld/XC95144XL/WarpSE_xst.xrpt b/cpld/XC95144XL/WarpSE_xst.xrpt index 16abc98..1f9d614 100644 --- a/cpld/XC95144XL/WarpSE_xst.xrpt +++ b/cpld/XC95144XL/WarpSE_xst.xrpt @@ -5,7 +5,7 @@ The structure and the elements are likely to change over the next few releases. This means code written to parse this file will need to be revisited each subsequent release.--> - +
@@ -57,9 +57,9 @@ - + - + @@ -78,8 +78,9 @@ - - + + + @@ -90,8 +91,8 @@ - - + +
@@ -105,25 +106,25 @@ - +
- + - - - - - - + + + + + + - - - + + + diff --git a/cpld/XC95144XL/_impact.cmd b/cpld/XC95144XL/_impact.cmd deleted file mode 100644 index e69de29..0000000 diff --git a/cpld/XC95144XL/_impact.log b/cpld/XC95144XL/_impact.log deleted file mode 100644 index 6dfc460..0000000 --- a/cpld/XC95144XL/_impact.log +++ /dev/null @@ -1,121 +0,0 @@ -iMPACT Version: 14.7 - -iMPACT log file Started on Sat Mar 25 00:06:03 2023 - -Welcome to iMPACT -iMPACT Version: 14.7 -// *** BATCH CMD : setMode -bs -// *** BATCH CMD : addDevice -p 1 -file"C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.jed" -'1': Loading file'C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.jed' ... -done. -INFO:iMPACT:1777 - - Reading C:/Xilinx/14.7/ISE_DS/ISE/xc9500xl/data/xc95144xl.bsd... -INFO:iMPACT:501 - '1': Added Device xc95144xl successfully. ----------------------------------------------------------------------- -GUI --- Auto connect to cable... -// *** BATCH CMD : setCable -port auto -INFO:iMPACT - Digilent Plugin: Plugin Version: 2.4.4 -INFO:iMPACT - Digilent Plugin: found 1 device(s). -INFO:iMPACT - Digilent Plugin: opening device: "JtagSmt2", SN:210251A08870 -INFO:iMPACT - Digilent Plugin: User Name: JtagSmt2 -INFO:iMPACT - Digilent Plugin: Product Name: Digilent JTAG-SMT2 -INFO:iMPACT - Digilent Plugin: Serial Number: 210251A08870 -INFO:iMPACT - Digilent Plugin: Product ID: 31000154 -INFO:iMPACT - Digilent Plugin: Firmware Version: 0108 -INFO:iMPACT - Digilent Plugin: JTAG Port Number: 0 -INFO:iMPACT - Digilent Plugin: JTAG Clock Frequency: 10000000 Hz -INFO:iMPACT - Current time: 3/25/2023 12:06:33 AM -// *** BATCH CMD : Program -p 1 -e -Maximum TCK operating frequency for this device chain: 10000000. -Validating chain... -Boundary-scan chain validated successfully. -'1': Erasing device... -PROGRESS_START - Starting Operation. -'1': Erasure completed successfully. -'1': Programming device... -done. -'1': Putting device in ISP mode...done. -'1': Putting device in ISP mode...done. -'1': Programming completed successfully. -PROGRESS_END - End Operation. -Elapsed time = 4 sec. -INFO:iMPACT - Current time: 3/25/2023 12:15:44 AM -Updating config fileC:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.jed... -// *** BATCH CMD : Program -p 1 -e -Maximum TCK operating frequency for this device chain: 10000000. -Validating chain... -Boundary-scan chain validated successfully. -'1': Erasing device... -PROGRESS_START - Starting Operation. -'1': Erasure completed successfully. -'1': Programming device... -done. -'1': Putting device in ISP mode...done. -'1': Putting device in ISP mode...done. -'1': Programming completed successfully. -PROGRESS_END - End Operation. -Elapsed time = 2 sec. -INFO:iMPACT - Current time: 3/25/2023 12:25:37 AM -Updating config fileC:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.jed... -// *** BATCH CMD : Program -p 1 -e -Maximum TCK operating frequency for this device chain: 10000000. -Validating chain... -Boundary-scan chain validated successfully. -'1': Erasing device... -PROGRESS_START - Starting Operation. -'1': Erasure completed successfully. -'1': Programming device... -done. -'1': Putting device in ISP mode...done. -'1': Putting device in ISP mode...done. -'1': Programming completed successfully. -PROGRESS_END - End Operation. -Elapsed time = 5 sec. -INFO:iMPACT - Current time: 3/25/2023 12:28:53 AM -Updating config fileC:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.jed... -// *** BATCH CMD : Program -p 1 -e -Maximum TCK operating frequency for this device chain: 10000000. -Validating chain... -Boundary-scan chain validated successfully. -'1': Erasing device... -PROGRESS_START - Starting Operation. -'1': Erasure completed successfully. -'1': Programming device... -done. -'1': Putting device in ISP mode...done. -'1': Putting device in ISP mode...done. -'1': Programming completed successfully. -PROGRESS_END - End Operation. -Elapsed time = 5 sec. -INFO:iMPACT - Current time: 3/25/2023 12:45:23 AM -Updating config fileC:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.jed... -// *** BATCH CMD : Program -p 1 -e -Maximum TCK operating frequency for this device chain: 10000000. -Validating chain... -Boundary-scan chain validated successfully. -'1': Erasing device... -PROGRESS_START - Starting Operation. -'1': Erasure completed successfully. -'1': Programming device... -done. -'1': Putting device in ISP mode...done. -'1': Putting device in ISP mode...done. -'1': Programming completed successfully. -PROGRESS_END - End Operation. -Elapsed time = 4 sec. -INFO:iMPACT - Current time: 3/25/2023 12:54:24 AM -Updating config fileC:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/WarpSE.jed... -// *** BATCH CMD : Program -p 1 -e -Maximum TCK operating frequency for this device chain: 10000000. -Validating chain... -Boundary-scan chain validated successfully. -'1': Erasing device... -PROGRESS_START - Starting Operation. -'1': Erasure completed successfully. -'1': Programming device... -done. -'1': Putting device in ISP mode...done. -'1': Putting device in ISP mode...done. -'1': Programming completed successfully. -PROGRESS_END - End Operation. -Elapsed time = 5 sec. diff --git a/cpld/XC95144XL/_ngo/netlist.lst b/cpld/XC95144XL/_ngo/netlist.lst index 4b32a75..d20c1c2 100644 --- a/cpld/XC95144XL/_ngo/netlist.lst +++ b/cpld/XC95144XL/_ngo/netlist.lst @@ -1,2 +1,2 @@ -C:\Users\Wolf\Documents\GitHub\Warp-SE\cpld\XC95144XL\WarpSE.ngc 1679719936 +C:\Users\Wolf\Documents\GitHub\Warp-SE\cpld\XC95144XL\WarpSE.ngc 1679819402 OK diff --git a/cpld/XC95144XL/_xmsgs/pn_parser.xmsgs b/cpld/XC95144XL/_xmsgs/pn_parser.xmsgs index f90a5c8..989b3dc 100644 --- a/cpld/XC95144XL/_xmsgs/pn_parser.xmsgs +++ b/cpld/XC95144XL/_xmsgs/pn_parser.xmsgs @@ -8,7 +8,7 @@ -Analyzing Verilog file "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/FSB.v" into library work +Analyzing Verilog file "C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/CS.v" into library work diff --git a/cpld/XC95144XL/_xmsgs/xst.xmsgs b/cpld/XC95144XL/_xmsgs/xst.xmsgs index e9ee543..92b937a 100644 --- a/cpld/XC95144XL/_xmsgs/xst.xmsgs +++ b/cpld/XC95144XL/_xmsgs/xst.xmsgs @@ -5,7 +5,10 @@ behavior or data corruption. It is strongly advised that users do not edit the contents of this file. --> -"../WarpSE.v" line 141 Connection to input port 'Ready2' does not match port size +"../WarpSE.v" line 139 Connection to input port 'Ready2' does not match port size + + +Signal <RefRAS> is assigned but never used. This unconnected signal will be trimmed during the optimization process. Input <SW> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. @@ -17,8 +20,5 @@ Signal <SndRAMCSWR> is assigned but never used. This unconnected signal will be trimmed during the optimization process. -Signal <SCSICS> is assigned but never used. This unconnected signal will be trimmed during the optimization process. - - diff --git a/cpld/XC95144XL/iseconfig/MXSE.xreport b/cpld/XC95144XL/iseconfig/MXSE.xreport deleted file mode 100644 index 5de4388..0000000 --- a/cpld/XC95144XL/iseconfig/MXSE.xreport +++ /dev/null @@ -1,215 +0,0 @@ - - -
- 2022-03-28T09:27:54 - MXSE - 2022-03-28T09:27:01 - Z:/Warp-SE/cpld/XC95144XL/iseconfig/MXSE.xreport - Z:/Warp-SE/cpld/XC95144XL\ - 2022-03-28T09:18:55 - false -
- - - - - - - - - - - - - - - - - - - - - - - - diff --git a/cpld/XC95144XL/iseconfig/WarpSE.projectmgr b/cpld/XC95144XL/iseconfig/WarpSE.projectmgr index cc2d495..7f1d9f6 100644 --- a/cpld/XC95144XL/iseconfig/WarpSE.projectmgr +++ b/cpld/XC95144XL/iseconfig/WarpSE.projectmgr @@ -7,7 +7,6 @@ 2 - /MXSE Z:|Warp-SE|cpld|WarpSE.v WarpSE (C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE.v) @@ -18,13 +17,10 @@ true WarpSE (C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/WarpSE.v) - + 1 Design Utilities - Implement Design/Optional Implementation Tools - Implement Design/Synthesize - XST - User Constraints @@ -42,7 +38,7 @@ 0 0 - 000000ff000000000000000100000000000000000100000000000000000000000000000000000003a3000000040101000100000000000000000000000064ffffffff0000008100000000000000040000004900000001000000000000009d0000000100000000000000660000000100000000000002570000000100000000 + 000000ff000000000000000100000000000000000100000000000000000000000000000000000003a3000000040101000100000000000000000000000064ffffffff000000810000000000000004000000420000000100000000000000240000000100000000000000660000000100000000000002d70000000100000000 false CNT.v @@ -58,32 +54,37 @@ false work + + + 1 + Design Utilities + Implement Design/Configure Target Device + Implement Design/Optional Implementation Tools + Implement Design/Synthesize - XST + User Constraints + + + Implement Design + + 0 + 0 + 000000ff000000000000000100000001000000000000000000000000000000000000000000000000f8000000010000000100000000000000000000000064ffffffff000000810000000000000001000000f80000000100000000 + false + Implement Design + 1 User Constraints - + User Constraints 0 0 000000ff000000000000000100000001000000000000000000000000000000000000000000000000f8000000010000000100000000000000000000000064ffffffff000000810000000000000001000000f80000000100000000 false - - - - - 1 - - - Design Utilities - - 0 - 0 - 000000ff000000000000000100000001000000000000000000000000000000000000000000000000f8000000010000000100000000000000000000000064ffffffff000000810000000000000001000000f80000000100000000 - false - Design Utilities + User Constraints 000000ff00000000000000020000011b0000011b01000000050100000002 Implementation diff --git a/cpld/XC95144XL/iseconfig/WarpSE.xreport b/cpld/XC95144XL/iseconfig/WarpSE.xreport index 2c16786..ee42510 100644 --- a/cpld/XC95144XL/iseconfig/WarpSE.xreport +++ b/cpld/XC95144XL/iseconfig/WarpSE.xreport @@ -1,12 +1,12 @@
- 2023-03-25T00:05:10 + 2023-03-26T03:40:09 WarpSE Unknown C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL/iseconfig/WarpSE.xreport C:/Users/Wolf/Documents/GitHub/Warp-SE/cpld/XC95144XL\ - 2022-03-28T09:29:43 + 2023-03-26T03:17:53 false
diff --git a/cpld/XC95144XL/webtalk_pn.xml b/cpld/XC95144XL/webtalk_pn.xml index 79fb39d..0364f26 100644 --- a/cpld/XC95144XL/webtalk_pn.xml +++ b/cpld/XC95144XL/webtalk_pn.xml @@ -3,12 +3,12 @@ - +
- + - +
@@ -18,19 +18,14 @@ This means code written to parse this file will need to be revisited each subseq - - - - + + - - - diff --git a/cpld/XC95144XL/xlnx_auto_0_xdb/cst.xbcd b/cpld/XC95144XL/xlnx_auto_0_xdb/cst.xbcd index 1c3bef3..8d92657 100644 Binary files a/cpld/XC95144XL/xlnx_auto_0_xdb/cst.xbcd and b/cpld/XC95144XL/xlnx_auto_0_xdb/cst.xbcd differ diff --git a/cpld/XC95144XL/xst/work/hdllib.ref b/cpld/XC95144XL/xst/work/hdllib.ref index 321ecd1..3a84236 100644 --- a/cpld/XC95144XL/xst/work/hdllib.ref +++ b/cpld/XC95144XL/xst/work/hdllib.ref @@ -1,8 +1,7 @@ -MO CNT NULL ../CNT.v vlg65/_c_n_t.bin 1679719921 -MO CS NULL ../CS.v vlg22/_c_s.bin 1679719921 -MO FSB NULL ../FSB.v vlg37/_f_s_b.bin 1679719921 -MO IOBM NULL ../IOBM.v vlg73/_i_o_b_m.bin 1679719921 -MO WarpSE NULL ../WarpSE.v vlg52/_warp_s_e.bin 1679719921 -MO IOBS NULL ../IOBS.v vlg79/_i_o_b_s.bin 1679719921 -MO RAM NULL ../RAM.v vlg14/_r_a_m.bin 1679719921 -MO MXSE NULL ../MXSE.v vlg15/_m_x_s_e.bin 1648473402 +MO CNT NULL ../CNT.v vlg65/_c_n_t.bin 1679819397 +MO CS NULL ../CS.v vlg22/_c_s.bin 1679819397 +MO FSB NULL ../FSB.v vlg37/_f_s_b.bin 1679819397 +MO IOBM NULL ../IOBM.v vlg73/_i_o_b_m.bin 1679819397 +MO WarpSE NULL ../WarpSE.v vlg52/_warp_s_e.bin 1679819397 +MO IOBS NULL ../IOBS.v vlg79/_i_o_b_s.bin 1679819397 +MO RAM NULL ../RAM.v vlg14/_r_a_m.bin 1679819397 diff --git a/cpld/XC95144XL/xst/work/vlg14/_r_a_m.bin b/cpld/XC95144XL/xst/work/vlg14/_r_a_m.bin index 609d4f1..8c42c74 100644 Binary files a/cpld/XC95144XL/xst/work/vlg14/_r_a_m.bin and b/cpld/XC95144XL/xst/work/vlg14/_r_a_m.bin differ diff --git a/cpld/XC95144XL/xst/work/vlg15/_m_x_s_e.bin b/cpld/XC95144XL/xst/work/vlg15/_m_x_s_e.bin deleted file mode 100644 index dd007cf..0000000 Binary files a/cpld/XC95144XL/xst/work/vlg15/_m_x_s_e.bin and /dev/null differ diff --git a/cpld/XC95144XL/xst/work/vlg22/_c_s.bin b/cpld/XC95144XL/xst/work/vlg22/_c_s.bin index 4ff801d..e99dd0a 100644 Binary files a/cpld/XC95144XL/xst/work/vlg22/_c_s.bin and b/cpld/XC95144XL/xst/work/vlg22/_c_s.bin differ diff --git a/cpld/XC95144XL/xst/work/vlg37/_f_s_b.bin b/cpld/XC95144XL/xst/work/vlg37/_f_s_b.bin index 527a31f..f80befd 100644 Binary files a/cpld/XC95144XL/xst/work/vlg37/_f_s_b.bin and b/cpld/XC95144XL/xst/work/vlg37/_f_s_b.bin differ diff --git a/cpld/XC95144XL/xst/work/vlg52/_warp_s_e.bin b/cpld/XC95144XL/xst/work/vlg52/_warp_s_e.bin index fc01353..347aaf2 100644 Binary files a/cpld/XC95144XL/xst/work/vlg52/_warp_s_e.bin and b/cpld/XC95144XL/xst/work/vlg52/_warp_s_e.bin differ diff --git a/cpld/XC95144XL/xst/work/vlg65/_c_n_t.bin b/cpld/XC95144XL/xst/work/vlg65/_c_n_t.bin index 32a5204..7c1d68b 100644 Binary files a/cpld/XC95144XL/xst/work/vlg65/_c_n_t.bin and b/cpld/XC95144XL/xst/work/vlg65/_c_n_t.bin differ diff --git a/cpld/XC95144XL/xst/work/vlg73/_i_o_b_m.bin b/cpld/XC95144XL/xst/work/vlg73/_i_o_b_m.bin index 02fc395..2c020b2 100644 Binary files a/cpld/XC95144XL/xst/work/vlg73/_i_o_b_m.bin and b/cpld/XC95144XL/xst/work/vlg73/_i_o_b_m.bin differ diff --git a/cpld/XC95144XL/xst/work/vlg79/_i_o_b_s.bin b/cpld/XC95144XL/xst/work/vlg79/_i_o_b_s.bin index d8df2ff..99defda 100644 Binary files a/cpld/XC95144XL/xst/work/vlg79/_i_o_b_s.bin and b/cpld/XC95144XL/xst/work/vlg79/_i_o_b_s.bin differ